diff options
204 files changed, 5 insertions, 18406 deletions
diff --git a/MAINTAINERS b/MAINTAINERS index 7ffd78c4e277..7e5c7b0290bb 100644 --- a/MAINTAINERS +++ b/MAINTAINERS | |||
@@ -4131,9 +4131,6 @@ W: http://www.uclinux.org/ | |||
4131 | L: uclinux-dev@uclinux.org (subscribers-only) | 4131 | L: uclinux-dev@uclinux.org (subscribers-only) |
4132 | S: Maintained | 4132 | S: Maintained |
4133 | 4133 | ||
4134 | UCLINUX FOR NEC V850 | ||
4135 | P: Miles Bader | ||
4136 | |||
4137 | UCLINUX FOR RENESAS H8/300 | 4134 | UCLINUX FOR RENESAS H8/300 |
4138 | P: Yoshinori Sato | 4135 | P: Yoshinori Sato |
4139 | M: ysato@users.sourceforge.jp | 4136 | M: ysato@users.sourceforge.jp |
diff --git a/arch/v850/Kconfig b/arch/v850/Kconfig deleted file mode 100644 index 4379f43505ef..000000000000 --- a/arch/v850/Kconfig +++ /dev/null | |||
@@ -1,353 +0,0 @@ | |||
1 | ############################################################################# | ||
2 | # | ||
3 | # For a description of the syntax of this configuration file, | ||
4 | # see Documentation/kbuild/kconfig-language.txt. | ||
5 | # | ||
6 | ############################################################################# | ||
7 | |||
8 | mainmenu "uClinux/v850 (w/o MMU) Kernel Configuration" | ||
9 | |||
10 | config MMU | ||
11 | bool | ||
12 | default n | ||
13 | config ZONE_DMA | ||
14 | bool | ||
15 | default y | ||
16 | config RWSEM_GENERIC_SPINLOCK | ||
17 | bool | ||
18 | default y | ||
19 | config RWSEM_XCHGADD_ALGORITHM | ||
20 | bool | ||
21 | default n | ||
22 | config GENERIC_FIND_NEXT_BIT | ||
23 | bool | ||
24 | default y | ||
25 | config GENERIC_HWEIGHT | ||
26 | bool | ||
27 | default y | ||
28 | config GENERIC_CALIBRATE_DELAY | ||
29 | bool | ||
30 | default y | ||
31 | |||
32 | config GENERIC_HARDIRQS | ||
33 | bool | ||
34 | default y | ||
35 | |||
36 | config GENERIC_IRQ_PROBE | ||
37 | bool | ||
38 | default y | ||
39 | |||
40 | config GENERIC_TIME | ||
41 | bool | ||
42 | default y | ||
43 | |||
44 | config TIME_LOW_RES | ||
45 | bool | ||
46 | default y | ||
47 | |||
48 | config ARCH_HAS_ILOG2_U32 | ||
49 | bool | ||
50 | default n | ||
51 | |||
52 | config ARCH_HAS_ILOG2_U64 | ||
53 | bool | ||
54 | default n | ||
55 | |||
56 | config ARCH_SUPPORTS_AOUT | ||
57 | def_bool y | ||
58 | |||
59 | # Turn off some random 386 crap that can affect device config | ||
60 | config ISA | ||
61 | bool | ||
62 | default n | ||
63 | config ISAPNP | ||
64 | bool | ||
65 | default n | ||
66 | config EISA | ||
67 | bool | ||
68 | default n | ||
69 | config MCA | ||
70 | bool | ||
71 | default n | ||
72 | |||
73 | |||
74 | ############################################################################# | ||
75 | #### v850-specific config | ||
76 | |||
77 | # Define the architecture | ||
78 | config V850 | ||
79 | bool | ||
80 | default y | ||
81 | select HAVE_IDE | ||
82 | |||
83 | menu "Processor type and features" | ||
84 | |||
85 | choice | ||
86 | prompt "Platform" | ||
87 | default GDB | ||
88 | config V850E_SIM | ||
89 | bool "GDB" | ||
90 | config RTE_CB_MA1 | ||
91 | bool "RTE-V850E/MA1-CB" | ||
92 | config RTE_CB_NB85E | ||
93 | bool "RTE-V850E/NB85E-CB" | ||
94 | config RTE_CB_ME2 | ||
95 | bool "RTE-V850E/ME2-CB" | ||
96 | config V850E_AS85EP1 | ||
97 | bool "AS85EP1" | ||
98 | config V850E2_SIM85E2C | ||
99 | bool "sim85e2c" | ||
100 | config V850E2_SIM85E2S | ||
101 | bool "sim85e2s" | ||
102 | config V850E2_FPGA85E2C | ||
103 | bool "NA85E2C-FPGA" | ||
104 | config V850E2_ANNA | ||
105 | bool "Anna" | ||
106 | endchoice | ||
107 | |||
108 | #### V850E processor-specific config | ||
109 | |||
110 | # All CPUs currently supported use the v850e architecture | ||
111 | config V850E | ||
112 | bool | ||
113 | default y | ||
114 | |||
115 | # The RTE-V850E/MA1-CB is the only type of V850E/MA1 platform we | ||
116 | # currently support | ||
117 | config V850E_MA1 | ||
118 | bool | ||
119 | depends on RTE_CB_MA1 | ||
120 | default y | ||
121 | # Similarly for the RTE-V850E/NB85E-CB - V850E/TEG | ||
122 | config V850E_TEG | ||
123 | bool | ||
124 | depends on RTE_CB_NB85E | ||
125 | default y | ||
126 | # ... and the RTE-V850E/ME2-CB - V850E/ME2 | ||
127 | config V850E_ME2 | ||
128 | bool | ||
129 | depends on RTE_CB_ME2 | ||
130 | default y | ||
131 | |||
132 | |||
133 | #### sim85e2-specific config | ||
134 | |||
135 | config V850E2_SIM85E2 | ||
136 | bool | ||
137 | depends on V850E2_SIM85E2C || V850E2_SIM85E2S | ||
138 | default y | ||
139 | |||
140 | |||
141 | #### V850E2 processor-specific config | ||
142 | |||
143 | # V850E2 processors | ||
144 | config V850E2 | ||
145 | bool | ||
146 | depends on V850E2_SIM85E2 || V850E2_FPGA85E2C || V850E2_ANNA | ||
147 | default y | ||
148 | |||
149 | |||
150 | #### RTE-CB platform-specific config | ||
151 | |||
152 | # Boards in the RTE-x-CB series | ||
153 | config RTE_CB | ||
154 | bool | ||
155 | depends on RTE_CB_MA1 || RTE_CB_NB85E || RTE_CB_ME2 | ||
156 | default y | ||
157 | |||
158 | config RTE_CB_MULTI | ||
159 | bool | ||
160 | # RTE_CB_NB85E can either have multi ROM support or not, but | ||
161 | # other platforms (currently only RTE_CB_MA1) require it. | ||
162 | prompt "Multi monitor ROM support" if RTE_CB_NB85E | ||
163 | depends on RTE_CB_MA1 || RTE_CB_NB85E | ||
164 | default y | ||
165 | |||
166 | config RTE_CB_MULTI_DBTRAP | ||
167 | bool "Pass illegal insn trap / dbtrap to kernel" | ||
168 | depends on RTE_CB_MULTI | ||
169 | default n | ||
170 | |||
171 | config RTE_CB_MA1_KSRAM | ||
172 | bool "Kernel in SRAM (limits size of kernel)" | ||
173 | depends on RTE_CB_MA1 && RTE_CB_MULTI | ||
174 | default n | ||
175 | |||
176 | config RTE_MB_A_PCI | ||
177 | bool "Mother-A PCI support" | ||
178 | depends on RTE_CB | ||
179 | default y | ||
180 | |||
181 | # The GBUS is used to talk to the RTE-MOTHER-A board | ||
182 | config RTE_GBUS_INT | ||
183 | bool | ||
184 | depends on RTE_MB_A_PCI | ||
185 | default y | ||
186 | |||
187 | # The only PCI bus we support is on the RTE-MOTHER-A board | ||
188 | config PCI | ||
189 | bool | ||
190 | default RTE_MB_A_PCI | ||
191 | |||
192 | #### Some feature-specific configs | ||
193 | |||
194 | # Everything except for the GDB simulator uses the same interrupt controller | ||
195 | config V850E_INTC | ||
196 | bool | ||
197 | default !V850E_SIM | ||
198 | |||
199 | # Everything except for the various simulators uses the "Timer D" unit | ||
200 | config V850E_TIMER_D | ||
201 | bool | ||
202 | default !V850E_SIM && !V850E2_SIM85E2 | ||
203 | |||
204 | # Cache control used on some v850e1 processors | ||
205 | config V850E_CACHE | ||
206 | bool | ||
207 | default V850E_TEG || V850E_ME2 | ||
208 | |||
209 | # Cache control used on v850e2 processors; I think this should | ||
210 | # actually apply to more, but currently only the SIM85E2S uses it | ||
211 | config V850E2_CACHE | ||
212 | bool | ||
213 | default V850E2_SIM85E2S | ||
214 | |||
215 | config NO_CACHE | ||
216 | bool | ||
217 | default !V850E_CACHE && !V850E2_CACHE | ||
218 | |||
219 | # HZ depends on the platform | ||
220 | config HZ | ||
221 | int | ||
222 | default 24 if V850E_SIM || V850E2_SIM85E2 | ||
223 | default 122 if V850E2_FPGA85E2C | ||
224 | default 100 | ||
225 | |||
226 | #### Misc config | ||
227 | |||
228 | config ROM_KERNEL | ||
229 | bool "Kernel in ROM" | ||
230 | depends on V850E2_ANNA || V850E_AS85EP1 || RTE_CB_ME2 | ||
231 | |||
232 | # Some platforms pre-zero memory, in which case the kernel doesn't need to | ||
233 | config ZERO_BSS | ||
234 | bool | ||
235 | depends on !V850E2_SIM85E2C | ||
236 | default y | ||
237 | |||
238 | # The crappy-ass zone allocator requires that the start of allocatable | ||
239 | # memory be aligned to the largest possible allocation. | ||
240 | config FORCE_MAX_ZONEORDER | ||
241 | int | ||
242 | default 8 if V850E2_SIM85E2C || V850E2_FPGA85E2C | ||
243 | |||
244 | config V850E_HIGHRES_TIMER | ||
245 | bool "High resolution timer support" | ||
246 | depends on V850E_TIMER_D | ||
247 | config TIME_BOOTUP | ||
248 | bool "Time bootup" | ||
249 | depends on V850E_HIGHRES_TIMER | ||
250 | |||
251 | config RESET_GUARD | ||
252 | bool "Reset Guard" | ||
253 | |||
254 | source "mm/Kconfig" | ||
255 | |||
256 | endmenu | ||
257 | |||
258 | |||
259 | ############################################################################# | ||
260 | |||
261 | source init/Kconfig | ||
262 | |||
263 | ############################################################################# | ||
264 | |||
265 | menu "Bus options (PCI, PCMCIA, EISA, MCA, ISA)" | ||
266 | |||
267 | # config PCI | ||
268 | # bool "PCI support" | ||
269 | # help | ||
270 | # Support for PCI bus. | ||
271 | |||
272 | source "drivers/pci/Kconfig" | ||
273 | |||
274 | source "drivers/pcmcia/Kconfig" | ||
275 | |||
276 | source "drivers/pci/hotplug/Kconfig" | ||
277 | |||
278 | endmenu | ||
279 | |||
280 | menu "Executable file formats" | ||
281 | |||
282 | source "fs/Kconfig.binfmt" | ||
283 | |||
284 | endmenu | ||
285 | |||
286 | source "net/Kconfig" | ||
287 | |||
288 | ############################################################################# | ||
289 | |||
290 | source "drivers/base/Kconfig" | ||
291 | |||
292 | source drivers/mtd/Kconfig | ||
293 | |||
294 | source drivers/parport/Kconfig | ||
295 | |||
296 | #source drivers/pnp/Kconfig | ||
297 | |||
298 | source drivers/block/Kconfig | ||
299 | |||
300 | ############################################################################# | ||
301 | |||
302 | menu "Disk device support" | ||
303 | |||
304 | source "drivers/ide/Kconfig" | ||
305 | |||
306 | source "drivers/scsi/Kconfig" | ||
307 | |||
308 | endmenu | ||
309 | |||
310 | ############################################################################# | ||
311 | |||
312 | |||
313 | source "drivers/md/Kconfig" | ||
314 | |||
315 | source "drivers/message/fusion/Kconfig" | ||
316 | |||
317 | source "drivers/ieee1394/Kconfig" | ||
318 | |||
319 | source "drivers/message/i2o/Kconfig" | ||
320 | |||
321 | source "drivers/net/Kconfig" | ||
322 | |||
323 | source "drivers/isdn/Kconfig" | ||
324 | |||
325 | #source "drivers/telephony/Kconfig" | ||
326 | |||
327 | # | ||
328 | # input before char - char/joystick depends on it. As does USB. | ||
329 | # | ||
330 | source "drivers/input/Kconfig" | ||
331 | |||
332 | source "drivers/char/Kconfig" | ||
333 | |||
334 | #source drivers/misc/Config.in | ||
335 | source "drivers/media/Kconfig" | ||
336 | |||
337 | source "fs/Kconfig" | ||
338 | |||
339 | source "drivers/video/Kconfig" | ||
340 | |||
341 | source "sound/Kconfig" | ||
342 | |||
343 | source "drivers/usb/Kconfig" | ||
344 | |||
345 | source "arch/v850/Kconfig.debug" | ||
346 | |||
347 | source "security/Kconfig" | ||
348 | |||
349 | source "crypto/Kconfig" | ||
350 | |||
351 | source "lib/Kconfig" | ||
352 | |||
353 | ############################################################################# | ||
diff --git a/arch/v850/Kconfig.debug b/arch/v850/Kconfig.debug deleted file mode 100644 index 4acfb9cca1ca..000000000000 --- a/arch/v850/Kconfig.debug +++ /dev/null | |||
@@ -1,10 +0,0 @@ | |||
1 | menu "Kernel hacking" | ||
2 | |||
3 | source "lib/Kconfig.debug" | ||
4 | |||
5 | config NO_KERNEL_MSG | ||
6 | bool "Suppress Kernel BUG Messages" | ||
7 | help | ||
8 | Do not output any debug BUG messages within the kernel. | ||
9 | |||
10 | endmenu | ||
diff --git a/arch/v850/Makefile b/arch/v850/Makefile deleted file mode 100644 index 8b629df0029a..000000000000 --- a/arch/v850/Makefile +++ /dev/null | |||
@@ -1,54 +0,0 @@ | |||
1 | # | ||
2 | # arch/v850/Makefile | ||
3 | # | ||
4 | # Copyright (C) 2001,02,03,05 NEC Corporation | ||
5 | # Copyright (C) 2001,02,03,05 Miles Bader <miles@gnu.org> | ||
6 | # | ||
7 | # This file is included by the global makefile so that you can add your own | ||
8 | # architecture-specific flags and dependencies. Remember to do have actions | ||
9 | # for "archclean" and "archdep" for cleaning up and making dependencies for | ||
10 | # this architecture | ||
11 | # | ||
12 | # This file is subject to the terms and conditions of the GNU General Public | ||
13 | # License. See the file "COPYING" in the main directory of this archive | ||
14 | # for more details. | ||
15 | # | ||
16 | |||
17 | arch_dir = arch/v850 | ||
18 | |||
19 | KBUILD_CFLAGS += -mv850e | ||
20 | # r16 is a fixed pointer to the current task | ||
21 | KBUILD_CFLAGS += -ffixed-r16 -mno-prolog-function | ||
22 | KBUILD_CFLAGS += -fno-builtin | ||
23 | KBUILD_CFLAGS += -D__linux__ -DUTS_SYSNAME=\"uClinux\" | ||
24 | |||
25 | # By default, build a kernel that runs on the gdb v850 simulator. | ||
26 | KBUILD_DEFCONFIG := sim_defconfig | ||
27 | |||
28 | # This prevents the linker from consolidating the .gnu.linkonce.this_module | ||
29 | # section into .text (which the v850 default linker script for -r does for | ||
30 | # some reason) | ||
31 | LDFLAGS_MODULE += --unique=.gnu.linkonce.this_module | ||
32 | |||
33 | OBJCOPY_FLAGS_BLOB := -I binary -O elf32-little -B v850e | ||
34 | |||
35 | |||
36 | head-y := $(arch_dir)/kernel/head.o $(arch_dir)/kernel/init_task.o | ||
37 | core-y += $(arch_dir)/kernel/ | ||
38 | libs-y += $(arch_dir)/lib/ | ||
39 | |||
40 | |||
41 | # Deal with the initial contents of the root device | ||
42 | ifdef ROOT_FS_IMAGE | ||
43 | core-y += root_fs_image.o | ||
44 | |||
45 | # Because the kernel build-system erases all explicit .o build rules, we | ||
46 | # have to use an intermediate target to fool it into building for us. | ||
47 | # This results in it being built anew each time, but that's alright. | ||
48 | root_fs_image.o: root_fs_image_force | ||
49 | |||
50 | root_fs_image_force: $(ROOT_FS_IMAGE) | ||
51 | $(OBJCOPY) $(OBJCOPY_FLAGS_BLOB) --rename-section .data=.root,alloc,load,readonly,data,contents $< root_fs_image.o | ||
52 | endif | ||
53 | |||
54 | CLEAN_FILES += root_fs_image.o | ||
diff --git a/arch/v850/README b/arch/v850/README deleted file mode 100644 index 12f7f7a665e0..000000000000 --- a/arch/v850/README +++ /dev/null | |||
@@ -1,44 +0,0 @@ | |||
1 | This port to the NEC V850E processor supports the following platforms: | ||
2 | |||
3 | "sim" | ||
4 | The gdb v850e simulator (CONFIG_V850E_SIM). | ||
5 | |||
6 | "rte-ma1-cb" | ||
7 | The Midas labs RTE-V850E/MA1-CB and RTE-V850E/NB85E-CB evaluation | ||
8 | boards (CONFIG_RTE_CB_MA1 and CONFIG_RTE_CB_NB85E). This support | ||
9 | has only been tested when running with the Multi-debugger monitor | ||
10 | ROM (for the Green Hills Multi debugger). The optional NEC | ||
11 | Solution Gear RTE-MOTHER-A motherboard is also supported, which | ||
12 | allows PCI boards to be used (CONFIG_RTE_MB_A_PCI). | ||
13 | |||
14 | "rte-me2-cb" | ||
15 | The Midas labs RTE-V850E/ME2-CB evaluation board (CONFIG_RTE_CB_ME2). | ||
16 | This has only been tested using a kernel downloaded via an ICE | ||
17 | connection using the Multi debugger. Support for the RTE-MOTHER-A is | ||
18 | present, but hasn't been tested (unlike the other Midas labs cpu | ||
19 | boards, the RTE-V850E/ME2-CB includes an ethernet adaptor). | ||
20 | |||
21 | "as85ep1" | ||
22 | The NEC AS85EP1 V850E evaluation chip/board (CONFIG_V850E_AS85EP1). | ||
23 | |||
24 | "anna" | ||
25 | The NEC `Anna' (board/chip) implementation of the V850E2 processor | ||
26 | (CONFIG_V850E2_ANNA). | ||
27 | |||
28 | "sim85e2c", "sim85e2s" | ||
29 | The sim85e2c and sim85e2s simulators, which are verilog simulations | ||
30 | of the V850E2 NA85E2C/NA85E2S cpu cores (CONFIG_V850E2_SIM85E2C and | ||
31 | CONFIG_V850E2_SIM85E2S). | ||
32 | |||
33 | "fpga85e2c" | ||
34 | A FPGA implementation of the V850E2 NA85E2C cpu core | ||
35 | (CONFIG_V850E2_FPGA85E2C). | ||
36 | |||
37 | To get a default kernel configuration for a particular platform, you can | ||
38 | use a <platform>_defconfig make target (e.g., "make rte-me2-cb_defconfig"); | ||
39 | to see which default configurations are possible, look in the directory | ||
40 | "arch/v850/configs". | ||
41 | |||
42 | Porting to anything with a V850E/MA1 or MA2 processor should be simple. | ||
43 | See the file <asm-v850/machdep.h> and the files it includes for an example of | ||
44 | how to add platform/chip-specific support. | ||
diff --git a/arch/v850/configs/rte-ma1-cb_defconfig b/arch/v850/configs/rte-ma1-cb_defconfig deleted file mode 100644 index 1a5beda36e29..000000000000 --- a/arch/v850/configs/rte-ma1-cb_defconfig +++ /dev/null | |||
@@ -1,617 +0,0 @@ | |||
1 | # | ||
2 | # Automatically generated make config: don't edit | ||
3 | # Linux kernel version: 2.6.13-uc0 | ||
4 | # Fri Sep 2 13:54:27 2005 | ||
5 | # | ||
6 | # CONFIG_MMU is not set | ||
7 | # CONFIG_UID16 is not set | ||
8 | CONFIG_RWSEM_GENERIC_SPINLOCK=y | ||
9 | # CONFIG_RWSEM_XCHGADD_ALGORITHM is not set | ||
10 | CONFIG_GENERIC_CALIBRATE_DELAY=y | ||
11 | # CONFIG_ISA is not set | ||
12 | # CONFIG_ISAPNP is not set | ||
13 | # CONFIG_EISA is not set | ||
14 | # CONFIG_MCA is not set | ||
15 | CONFIG_V850=y | ||
16 | |||
17 | # | ||
18 | # Processor type and features | ||
19 | # | ||
20 | # CONFIG_V850E_SIM is not set | ||
21 | CONFIG_RTE_CB_MA1=y | ||
22 | # CONFIG_RTE_CB_NB85E is not set | ||
23 | # CONFIG_RTE_CB_ME2 is not set | ||
24 | # CONFIG_V850E_AS85EP1 is not set | ||
25 | # CONFIG_V850E2_SIM85E2C is not set | ||
26 | # CONFIG_V850E2_SIM85E2S is not set | ||
27 | # CONFIG_V850E2_FPGA85E2C is not set | ||
28 | # CONFIG_V850E2_ANNA is not set | ||
29 | CONFIG_V850E=y | ||
30 | CONFIG_V850E_MA1=y | ||
31 | CONFIG_RTE_CB=y | ||
32 | CONFIG_RTE_CB_MULTI=y | ||
33 | CONFIG_RTE_CB_MULTI_DBTRAP=y | ||
34 | # CONFIG_RTE_CB_MA1_KSRAM is not set | ||
35 | CONFIG_RTE_MB_A_PCI=y | ||
36 | CONFIG_RTE_GBUS_INT=y | ||
37 | CONFIG_PCI=y | ||
38 | CONFIG_V850E_INTC=y | ||
39 | CONFIG_V850E_TIMER_D=y | ||
40 | # CONFIG_V850E_CACHE is not set | ||
41 | # CONFIG_V850E2_CACHE is not set | ||
42 | CONFIG_NO_CACHE=y | ||
43 | CONFIG_ZERO_BSS=y | ||
44 | # CONFIG_V850E_HIGHRES_TIMER is not set | ||
45 | # CONFIG_RESET_GUARD is not set | ||
46 | CONFIG_LARGE_ALLOCS=y | ||
47 | CONFIG_FLATMEM=y | ||
48 | CONFIG_FLAT_NODE_MEM_MAP=y | ||
49 | |||
50 | # | ||
51 | # Code maturity level options | ||
52 | # | ||
53 | # CONFIG_EXPERIMENTAL is not set | ||
54 | CONFIG_CLEAN_COMPILE=y | ||
55 | CONFIG_BROKEN_ON_SMP=y | ||
56 | CONFIG_INIT_ENV_ARG_LIMIT=32 | ||
57 | |||
58 | # | ||
59 | # General setup | ||
60 | # | ||
61 | CONFIG_LOCALVERSION="" | ||
62 | # CONFIG_BSD_PROCESS_ACCT is not set | ||
63 | # CONFIG_SYSCTL is not set | ||
64 | # CONFIG_AUDIT is not set | ||
65 | # CONFIG_HOTPLUG is not set | ||
66 | CONFIG_KOBJECT_UEVENT=y | ||
67 | # CONFIG_IKCONFIG is not set | ||
68 | CONFIG_EMBEDDED=y | ||
69 | # CONFIG_KALLSYMS is not set | ||
70 | CONFIG_PRINTK=y | ||
71 | CONFIG_BUG=y | ||
72 | # CONFIG_BASE_FULL is not set | ||
73 | # CONFIG_FUTEX is not set | ||
74 | # CONFIG_EPOLL is not set | ||
75 | CONFIG_CC_OPTIMIZE_FOR_SIZE=y | ||
76 | CONFIG_CC_ALIGN_FUNCTIONS=0 | ||
77 | CONFIG_CC_ALIGN_LABELS=0 | ||
78 | CONFIG_CC_ALIGN_LOOPS=0 | ||
79 | CONFIG_CC_ALIGN_JUMPS=0 | ||
80 | CONFIG_BASE_SMALL=1 | ||
81 | |||
82 | # | ||
83 | # Loadable module support | ||
84 | # | ||
85 | CONFIG_MODULES=y | ||
86 | CONFIG_MODULE_UNLOAD=y | ||
87 | CONFIG_OBSOLETE_MODPARM=y | ||
88 | # CONFIG_MODULE_SRCVERSION_ALL is not set | ||
89 | CONFIG_KMOD=y | ||
90 | |||
91 | # | ||
92 | # Bus options (PCI, PCMCIA, EISA, MCA, ISA) | ||
93 | # | ||
94 | # CONFIG_PCI_LEGACY_PROC is not set | ||
95 | # CONFIG_PCI_NAMES is not set | ||
96 | # CONFIG_PCI_DEBUG is not set | ||
97 | |||
98 | # | ||
99 | # PCCARD (PCMCIA/CardBus) support | ||
100 | # | ||
101 | # CONFIG_PCCARD is not set | ||
102 | |||
103 | # | ||
104 | # PCI Hotplug Support | ||
105 | # | ||
106 | |||
107 | # | ||
108 | # Executable file formats | ||
109 | # | ||
110 | CONFIG_BINFMT_FLAT=y | ||
111 | # CONFIG_BINFMT_ZFLAT is not set | ||
112 | # CONFIG_BINFMT_SHARED_FLAT is not set | ||
113 | # CONFIG_BINFMT_MISC is not set | ||
114 | |||
115 | # | ||
116 | # Networking | ||
117 | # | ||
118 | CONFIG_NET=y | ||
119 | |||
120 | # | ||
121 | # Networking options | ||
122 | # | ||
123 | # CONFIG_PACKET is not set | ||
124 | # CONFIG_UNIX is not set | ||
125 | # CONFIG_NET_KEY is not set | ||
126 | CONFIG_INET=y | ||
127 | # CONFIG_IP_MULTICAST is not set | ||
128 | # CONFIG_IP_ADVANCED_ROUTER is not set | ||
129 | CONFIG_IP_FIB_HASH=y | ||
130 | # CONFIG_IP_PNP is not set | ||
131 | # CONFIG_NET_IPIP is not set | ||
132 | # CONFIG_NET_IPGRE is not set | ||
133 | # CONFIG_SYN_COOKIES is not set | ||
134 | # CONFIG_INET_AH is not set | ||
135 | # CONFIG_INET_ESP is not set | ||
136 | # CONFIG_INET_IPCOMP is not set | ||
137 | # CONFIG_INET_TUNNEL is not set | ||
138 | # CONFIG_IP_TCPDIAG is not set | ||
139 | # CONFIG_IP_TCPDIAG_IPV6 is not set | ||
140 | # CONFIG_TCP_CONG_ADVANCED is not set | ||
141 | CONFIG_TCP_CONG_BIC=y | ||
142 | # CONFIG_IPV6 is not set | ||
143 | # CONFIG_NETFILTER is not set | ||
144 | # CONFIG_BRIDGE is not set | ||
145 | # CONFIG_VLAN_8021Q is not set | ||
146 | # CONFIG_DECNET is not set | ||
147 | # CONFIG_LLC2 is not set | ||
148 | # CONFIG_IPX is not set | ||
149 | # CONFIG_ATALK is not set | ||
150 | # CONFIG_NET_SCHED is not set | ||
151 | # CONFIG_NET_CLS_ROUTE is not set | ||
152 | |||
153 | # | ||
154 | # Network testing | ||
155 | # | ||
156 | # CONFIG_NET_PKTGEN is not set | ||
157 | # CONFIG_HAMRADIO is not set | ||
158 | # CONFIG_IRDA is not set | ||
159 | # CONFIG_BT is not set | ||
160 | |||
161 | # | ||
162 | # Generic Driver Options | ||
163 | # | ||
164 | CONFIG_STANDALONE=y | ||
165 | CONFIG_PREVENT_FIRMWARE_BUILD=y | ||
166 | # CONFIG_FW_LOADER is not set | ||
167 | # CONFIG_DEBUG_DRIVER is not set | ||
168 | |||
169 | # | ||
170 | # Memory Technology Devices (MTD) | ||
171 | # | ||
172 | CONFIG_MTD=y | ||
173 | # CONFIG_MTD_DEBUG is not set | ||
174 | # CONFIG_MTD_CONCAT is not set | ||
175 | # CONFIG_MTD_PARTITIONS is not set | ||
176 | |||
177 | # | ||
178 | # User Modules And Translation Layers | ||
179 | # | ||
180 | # CONFIG_MTD_CHAR is not set | ||
181 | CONFIG_MTD_BLOCK=y | ||
182 | # CONFIG_FTL is not set | ||
183 | # CONFIG_NFTL is not set | ||
184 | # CONFIG_INFTL is not set | ||
185 | |||
186 | # | ||
187 | # RAM/ROM/Flash chip drivers | ||
188 | # | ||
189 | # CONFIG_MTD_CFI is not set | ||
190 | # CONFIG_MTD_JEDECPROBE is not set | ||
191 | CONFIG_MTD_MAP_BANK_WIDTH_1=y | ||
192 | CONFIG_MTD_MAP_BANK_WIDTH_2=y | ||
193 | CONFIG_MTD_MAP_BANK_WIDTH_4=y | ||
194 | # CONFIG_MTD_MAP_BANK_WIDTH_8 is not set | ||
195 | # CONFIG_MTD_MAP_BANK_WIDTH_16 is not set | ||
196 | # CONFIG_MTD_MAP_BANK_WIDTH_32 is not set | ||
197 | CONFIG_MTD_CFI_I1=y | ||
198 | CONFIG_MTD_CFI_I2=y | ||
199 | # CONFIG_MTD_CFI_I4 is not set | ||
200 | # CONFIG_MTD_CFI_I8 is not set | ||
201 | # CONFIG_MTD_RAM is not set | ||
202 | # CONFIG_MTD_ROM is not set | ||
203 | # CONFIG_MTD_ABSENT is not set | ||
204 | |||
205 | # | ||
206 | # Mapping drivers for chip access | ||
207 | # | ||
208 | # CONFIG_MTD_COMPLEX_MAPPINGS is not set | ||
209 | # CONFIG_MTD_PLATRAM is not set | ||
210 | |||
211 | # | ||
212 | # Self-contained MTD device drivers | ||
213 | # | ||
214 | # CONFIG_MTD_PMC551 is not set | ||
215 | CONFIG_MTD_SLRAM=y | ||
216 | # CONFIG_MTD_PHRAM is not set | ||
217 | # CONFIG_MTD_MTDRAM is not set | ||
218 | # CONFIG_MTD_BLKMTD is not set | ||
219 | |||
220 | # | ||
221 | # Disk-On-Chip Device Drivers | ||
222 | # | ||
223 | # CONFIG_MTD_DOC2000 is not set | ||
224 | # CONFIG_MTD_DOC2001 is not set | ||
225 | # CONFIG_MTD_DOC2001PLUS is not set | ||
226 | |||
227 | # | ||
228 | # NAND Flash Device Drivers | ||
229 | # | ||
230 | # CONFIG_MTD_NAND is not set | ||
231 | |||
232 | # | ||
233 | # Parallel port support | ||
234 | # | ||
235 | # CONFIG_PARPORT is not set | ||
236 | |||
237 | # | ||
238 | # Block devices | ||
239 | # | ||
240 | # CONFIG_BLK_DEV_FD is not set | ||
241 | # CONFIG_BLK_CPQ_DA is not set | ||
242 | # CONFIG_BLK_CPQ_CISS_DA is not set | ||
243 | # CONFIG_BLK_DEV_DAC960 is not set | ||
244 | # CONFIG_BLK_DEV_COW_COMMON is not set | ||
245 | # CONFIG_BLK_DEV_LOOP is not set | ||
246 | # CONFIG_BLK_DEV_NBD is not set | ||
247 | # CONFIG_BLK_DEV_SX8 is not set | ||
248 | # CONFIG_BLK_DEV_RAM is not set | ||
249 | CONFIG_BLK_DEV_RAM_COUNT=16 | ||
250 | CONFIG_INITRAMFS_SOURCE="" | ||
251 | # CONFIG_CDROM_PKTCDVD is not set | ||
252 | |||
253 | # | ||
254 | # IO Schedulers | ||
255 | # | ||
256 | CONFIG_IOSCHED_NOOP=y | ||
257 | # CONFIG_IOSCHED_AS is not set | ||
258 | # CONFIG_IOSCHED_DEADLINE is not set | ||
259 | # CONFIG_IOSCHED_CFQ is not set | ||
260 | # CONFIG_ATA_OVER_ETH is not set | ||
261 | |||
262 | # | ||
263 | # Disk device support | ||
264 | # | ||
265 | |||
266 | # | ||
267 | # ATA/ATAPI/MFM/RLL support | ||
268 | # | ||
269 | # CONFIG_IDE is not set | ||
270 | |||
271 | # | ||
272 | # SCSI device support | ||
273 | # | ||
274 | # CONFIG_SCSI is not set | ||
275 | |||
276 | # | ||
277 | # Multi-device support (RAID and LVM) | ||
278 | # | ||
279 | # CONFIG_MD is not set | ||
280 | |||
281 | # | ||
282 | # Fusion MPT device support | ||
283 | # | ||
284 | # CONFIG_FUSION is not set | ||
285 | |||
286 | # | ||
287 | # IEEE 1394 (FireWire) support | ||
288 | # | ||
289 | # CONFIG_IEEE1394 is not set | ||
290 | |||
291 | # | ||
292 | # I2O device support | ||
293 | # | ||
294 | # CONFIG_I2O is not set | ||
295 | |||
296 | # | ||
297 | # Network device support | ||
298 | # | ||
299 | CONFIG_NETDEVICES=y | ||
300 | # CONFIG_DUMMY is not set | ||
301 | # CONFIG_BONDING is not set | ||
302 | # CONFIG_EQUALIZER is not set | ||
303 | # CONFIG_TUN is not set | ||
304 | |||
305 | # | ||
306 | # ARCnet devices | ||
307 | # | ||
308 | # CONFIG_ARCNET is not set | ||
309 | |||
310 | # | ||
311 | # Ethernet (10 or 100Mbit) | ||
312 | # | ||
313 | CONFIG_NET_ETHERNET=y | ||
314 | CONFIG_MII=y | ||
315 | # CONFIG_HAPPYMEAL is not set | ||
316 | # CONFIG_SUNGEM is not set | ||
317 | # CONFIG_NET_VENDOR_3COM is not set | ||
318 | # CONFIG_NET_VENDOR_SMC is not set | ||
319 | |||
320 | # | ||
321 | # Tulip family network device support | ||
322 | # | ||
323 | # CONFIG_NET_TULIP is not set | ||
324 | # CONFIG_HP100 is not set | ||
325 | # CONFIG_NE2000 is not set | ||
326 | CONFIG_NET_PCI=y | ||
327 | # CONFIG_PCNET32 is not set | ||
328 | # CONFIG_AMD8111_ETH is not set | ||
329 | # CONFIG_ADAPTEC_STARFIRE is not set | ||
330 | # CONFIG_DGRS is not set | ||
331 | CONFIG_EEPRO100=y | ||
332 | # CONFIG_E100 is not set | ||
333 | # CONFIG_FEALNX is not set | ||
334 | # CONFIG_NATSEMI is not set | ||
335 | # CONFIG_NE2K_PCI is not set | ||
336 | # CONFIG_8139TOO is not set | ||
337 | # CONFIG_SIS900 is not set | ||
338 | # CONFIG_EPIC100 is not set | ||
339 | # CONFIG_SUNDANCE is not set | ||
340 | # CONFIG_TLAN is not set | ||
341 | # CONFIG_VIA_RHINE is not set | ||
342 | |||
343 | # | ||
344 | # Ethernet (1000 Mbit) | ||
345 | # | ||
346 | # CONFIG_ACENIC is not set | ||
347 | # CONFIG_DL2K is not set | ||
348 | # CONFIG_E1000 is not set | ||
349 | # CONFIG_NS83820 is not set | ||
350 | # CONFIG_HAMACHI is not set | ||
351 | # CONFIG_R8169 is not set | ||
352 | # CONFIG_SK98LIN is not set | ||
353 | # CONFIG_VIA_VELOCITY is not set | ||
354 | # CONFIG_TIGON3 is not set | ||
355 | # CONFIG_BNX2 is not set | ||
356 | |||
357 | # | ||
358 | # Ethernet (10000 Mbit) | ||
359 | # | ||
360 | # CONFIG_IXGB is not set | ||
361 | # CONFIG_S2IO is not set | ||
362 | |||
363 | # | ||
364 | # Token Ring devices | ||
365 | # | ||
366 | # CONFIG_TR is not set | ||
367 | |||
368 | # | ||
369 | # Wireless LAN (non-hamradio) | ||
370 | # | ||
371 | # CONFIG_NET_RADIO is not set | ||
372 | |||
373 | # | ||
374 | # Wan interfaces | ||
375 | # | ||
376 | # CONFIG_WAN is not set | ||
377 | # CONFIG_FDDI is not set | ||
378 | # CONFIG_PPP is not set | ||
379 | # CONFIG_SLIP is not set | ||
380 | # CONFIG_NETPOLL is not set | ||
381 | # CONFIG_NET_POLL_CONTROLLER is not set | ||
382 | |||
383 | # | ||
384 | # ISDN subsystem | ||
385 | # | ||
386 | # CONFIG_ISDN is not set | ||
387 | |||
388 | # | ||
389 | # Input device support | ||
390 | # | ||
391 | CONFIG_INPUT=y | ||
392 | |||
393 | # | ||
394 | # Userland interfaces | ||
395 | # | ||
396 | # CONFIG_INPUT_MOUSEDEV is not set | ||
397 | # CONFIG_INPUT_JOYDEV is not set | ||
398 | # CONFIG_INPUT_TSDEV is not set | ||
399 | # CONFIG_INPUT_EVDEV is not set | ||
400 | # CONFIG_INPUT_EVBUG is not set | ||
401 | |||
402 | # | ||
403 | # Input Device Drivers | ||
404 | # | ||
405 | # CONFIG_INPUT_KEYBOARD is not set | ||
406 | # CONFIG_INPUT_MOUSE is not set | ||
407 | # CONFIG_INPUT_JOYSTICK is not set | ||
408 | # CONFIG_INPUT_TOUCHSCREEN is not set | ||
409 | # CONFIG_INPUT_MISC is not set | ||
410 | |||
411 | # | ||
412 | # Hardware I/O ports | ||
413 | # | ||
414 | # CONFIG_SERIO is not set | ||
415 | # CONFIG_GAMEPORT is not set | ||
416 | |||
417 | # | ||
418 | # Character devices | ||
419 | # | ||
420 | # CONFIG_VT is not set | ||
421 | # CONFIG_SERIAL_NONSTANDARD is not set | ||
422 | |||
423 | # | ||
424 | # Serial drivers | ||
425 | # | ||
426 | # CONFIG_SERIAL_8250 is not set | ||
427 | |||
428 | # | ||
429 | # Non-8250 serial port support | ||
430 | # | ||
431 | CONFIG_V850E_UART=y | ||
432 | CONFIG_V850E_UART_CONSOLE=y | ||
433 | CONFIG_SERIAL_CORE=y | ||
434 | CONFIG_SERIAL_CORE_CONSOLE=y | ||
435 | # CONFIG_SERIAL_JSM is not set | ||
436 | # CONFIG_UNIX98_PTYS is not set | ||
437 | # CONFIG_LEGACY_PTYS is not set | ||
438 | |||
439 | # | ||
440 | # IPMI | ||
441 | # | ||
442 | # CONFIG_IPMI_HANDLER is not set | ||
443 | |||
444 | # | ||
445 | # Watchdog Cards | ||
446 | # | ||
447 | # CONFIG_WATCHDOG is not set | ||
448 | # CONFIG_RTC is not set | ||
449 | # CONFIG_GEN_RTC is not set | ||
450 | # CONFIG_DTLK is not set | ||
451 | # CONFIG_R3964 is not set | ||
452 | # CONFIG_APPLICOM is not set | ||
453 | |||
454 | # | ||
455 | # Ftape, the floppy tape device driver | ||
456 | # | ||
457 | # CONFIG_DRM is not set | ||
458 | # CONFIG_RAW_DRIVER is not set | ||
459 | |||
460 | # | ||
461 | # TPM devices | ||
462 | # | ||
463 | |||
464 | # | ||
465 | # Multimedia devices | ||
466 | # | ||
467 | # CONFIG_VIDEO_DEV is not set | ||
468 | |||
469 | # | ||
470 | # Digital Video Broadcasting Devices | ||
471 | # | ||
472 | # CONFIG_DVB is not set | ||
473 | |||
474 | # | ||
475 | # File systems | ||
476 | # | ||
477 | # CONFIG_EXT2_FS is not set | ||
478 | # CONFIG_EXT3_FS is not set | ||
479 | # CONFIG_JBD is not set | ||
480 | # CONFIG_REISERFS_FS is not set | ||
481 | # CONFIG_JFS_FS is not set | ||
482 | # CONFIG_FS_POSIX_ACL is not set | ||
483 | |||
484 | # | ||
485 | # XFS support | ||
486 | # | ||
487 | # CONFIG_XFS_FS is not set | ||
488 | # CONFIG_MINIX_FS is not set | ||
489 | CONFIG_ROMFS_FS=y | ||
490 | # CONFIG_MAGIC_ROM_PTR is not set | ||
491 | CONFIG_INOTIFY=y | ||
492 | # CONFIG_QUOTA is not set | ||
493 | CONFIG_DNOTIFY=y | ||
494 | # CONFIG_AUTOFS_FS is not set | ||
495 | # CONFIG_AUTOFS4_FS is not set | ||
496 | |||
497 | # | ||
498 | # CD-ROM/DVD Filesystems | ||
499 | # | ||
500 | # CONFIG_ISO9660_FS is not set | ||
501 | # CONFIG_UDF_FS is not set | ||
502 | |||
503 | # | ||
504 | # DOS/FAT/NT Filesystems | ||
505 | # | ||
506 | # CONFIG_MSDOS_FS is not set | ||
507 | # CONFIG_VFAT_FS is not set | ||
508 | # CONFIG_NTFS_FS is not set | ||
509 | |||
510 | # | ||
511 | # Pseudo filesystems | ||
512 | # | ||
513 | CONFIG_PROC_FS=y | ||
514 | CONFIG_SYSFS=y | ||
515 | # CONFIG_TMPFS is not set | ||
516 | # CONFIG_HUGETLB_PAGE is not set | ||
517 | CONFIG_RAMFS=y | ||
518 | |||
519 | # | ||
520 | # Miscellaneous filesystems | ||
521 | # | ||
522 | # CONFIG_HFSPLUS_FS is not set | ||
523 | # CONFIG_JFFS_FS is not set | ||
524 | # CONFIG_JFFS2_FS is not set | ||
525 | # CONFIG_CRAMFS is not set | ||
526 | # CONFIG_VXFS_FS is not set | ||
527 | # CONFIG_HPFS_FS is not set | ||
528 | # CONFIG_QNX4FS_FS is not set | ||
529 | # CONFIG_SYSV_FS is not set | ||
530 | # CONFIG_UFS_FS is not set | ||
531 | |||
532 | # | ||
533 | # Network File Systems | ||
534 | # | ||
535 | CONFIG_NFS_FS=y | ||
536 | CONFIG_NFS_V3=y | ||
537 | # CONFIG_NFS_V3_ACL is not set | ||
538 | # CONFIG_NFSD is not set | ||
539 | CONFIG_LOCKD=y | ||
540 | CONFIG_LOCKD_V4=y | ||
541 | CONFIG_NFS_COMMON=y | ||
542 | CONFIG_SUNRPC=y | ||
543 | # CONFIG_SMB_FS is not set | ||
544 | # CONFIG_CIFS is not set | ||
545 | # CONFIG_NCP_FS is not set | ||
546 | # CONFIG_CODA_FS is not set | ||
547 | |||
548 | # | ||
549 | # Partition Types | ||
550 | # | ||
551 | # CONFIG_PARTITION_ADVANCED is not set | ||
552 | CONFIG_MSDOS_PARTITION=y | ||
553 | |||
554 | # | ||
555 | # Native Language Support | ||
556 | # | ||
557 | # CONFIG_NLS is not set | ||
558 | |||
559 | # | ||
560 | # Graphics support | ||
561 | # | ||
562 | # CONFIG_FB is not set | ||
563 | |||
564 | # | ||
565 | # Sound | ||
566 | # | ||
567 | # CONFIG_SOUND is not set | ||
568 | |||
569 | # | ||
570 | # USB support | ||
571 | # | ||
572 | CONFIG_USB_ARCH_HAS_HCD=y | ||
573 | CONFIG_USB_ARCH_HAS_OHCI=y | ||
574 | # CONFIG_USB is not set | ||
575 | |||
576 | # | ||
577 | # USB Gadget Support | ||
578 | # | ||
579 | # CONFIG_USB_GADGET is not set | ||
580 | |||
581 | # | ||
582 | # Kernel hacking | ||
583 | # | ||
584 | # CONFIG_PRINTK_TIME is not set | ||
585 | CONFIG_DEBUG_KERNEL=y | ||
586 | # CONFIG_MAGIC_SYSRQ is not set | ||
587 | CONFIG_LOG_BUF_SHIFT=14 | ||
588 | # CONFIG_SCHEDSTATS is not set | ||
589 | # CONFIG_DEBUG_SLAB is not set | ||
590 | # CONFIG_DEBUG_SPINLOCK is not set | ||
591 | # CONFIG_DEBUG_SPINLOCK_SLEEP is not set | ||
592 | # CONFIG_DEBUG_KOBJECT is not set | ||
593 | CONFIG_DEBUG_INFO=y | ||
594 | # CONFIG_DEBUG_FS is not set | ||
595 | # CONFIG_NO_KERNEL_MSG is not set | ||
596 | |||
597 | # | ||
598 | # Security options | ||
599 | # | ||
600 | # CONFIG_KEYS is not set | ||
601 | # CONFIG_SECURITY is not set | ||
602 | |||
603 | # | ||
604 | # Cryptographic options | ||
605 | # | ||
606 | # CONFIG_CRYPTO is not set | ||
607 | |||
608 | # | ||
609 | # Hardware crypto devices | ||
610 | # | ||
611 | |||
612 | # | ||
613 | # Library routines | ||
614 | # | ||
615 | # CONFIG_CRC_CCITT is not set | ||
616 | # CONFIG_CRC32 is not set | ||
617 | # CONFIG_LIBCRC32C is not set | ||
diff --git a/arch/v850/configs/rte-me2-cb_defconfig b/arch/v850/configs/rte-me2-cb_defconfig deleted file mode 100644 index 15e666478061..000000000000 --- a/arch/v850/configs/rte-me2-cb_defconfig +++ /dev/null | |||
@@ -1,462 +0,0 @@ | |||
1 | # | ||
2 | # Automatically generated make config: don't edit | ||
3 | # Linux kernel version: 2.6.13-uc0 | ||
4 | # Fri Sep 2 13:47:50 2005 | ||
5 | # | ||
6 | # CONFIG_MMU is not set | ||
7 | # CONFIG_UID16 is not set | ||
8 | CONFIG_RWSEM_GENERIC_SPINLOCK=y | ||
9 | # CONFIG_RWSEM_XCHGADD_ALGORITHM is not set | ||
10 | CONFIG_GENERIC_CALIBRATE_DELAY=y | ||
11 | # CONFIG_ISA is not set | ||
12 | # CONFIG_ISAPNP is not set | ||
13 | # CONFIG_EISA is not set | ||
14 | # CONFIG_MCA is not set | ||
15 | CONFIG_V850=y | ||
16 | |||
17 | # | ||
18 | # Processor type and features | ||
19 | # | ||
20 | # CONFIG_V850E_SIM is not set | ||
21 | # CONFIG_RTE_CB_MA1 is not set | ||
22 | # CONFIG_RTE_CB_NB85E is not set | ||
23 | CONFIG_RTE_CB_ME2=y | ||
24 | # CONFIG_V850E_AS85EP1 is not set | ||
25 | # CONFIG_V850E2_SIM85E2C is not set | ||
26 | # CONFIG_V850E2_SIM85E2S is not set | ||
27 | # CONFIG_V850E2_FPGA85E2C is not set | ||
28 | # CONFIG_V850E2_ANNA is not set | ||
29 | CONFIG_V850E=y | ||
30 | CONFIG_V850E_ME2=y | ||
31 | CONFIG_RTE_CB=y | ||
32 | # CONFIG_RTE_MB_A_PCI is not set | ||
33 | # CONFIG_PCI is not set | ||
34 | CONFIG_V850E_INTC=y | ||
35 | CONFIG_V850E_TIMER_D=y | ||
36 | CONFIG_V850E_CACHE=y | ||
37 | # CONFIG_V850E2_CACHE is not set | ||
38 | # CONFIG_NO_CACHE is not set | ||
39 | # CONFIG_ROM_KERNEL is not set | ||
40 | CONFIG_ZERO_BSS=y | ||
41 | # CONFIG_V850E_HIGHRES_TIMER is not set | ||
42 | # CONFIG_RESET_GUARD is not set | ||
43 | CONFIG_LARGE_ALLOCS=y | ||
44 | CONFIG_FLATMEM=y | ||
45 | CONFIG_FLAT_NODE_MEM_MAP=y | ||
46 | |||
47 | # | ||
48 | # Code maturity level options | ||
49 | # | ||
50 | # CONFIG_EXPERIMENTAL is not set | ||
51 | CONFIG_CLEAN_COMPILE=y | ||
52 | CONFIG_BROKEN_ON_SMP=y | ||
53 | CONFIG_INIT_ENV_ARG_LIMIT=32 | ||
54 | |||
55 | # | ||
56 | # General setup | ||
57 | # | ||
58 | CONFIG_LOCALVERSION="" | ||
59 | # CONFIG_BSD_PROCESS_ACCT is not set | ||
60 | # CONFIG_SYSCTL is not set | ||
61 | # CONFIG_HOTPLUG is not set | ||
62 | # CONFIG_IKCONFIG is not set | ||
63 | CONFIG_EMBEDDED=y | ||
64 | # CONFIG_KALLSYMS is not set | ||
65 | CONFIG_PRINTK=y | ||
66 | CONFIG_BUG=y | ||
67 | # CONFIG_BASE_FULL is not set | ||
68 | # CONFIG_FUTEX is not set | ||
69 | # CONFIG_EPOLL is not set | ||
70 | CONFIG_CC_OPTIMIZE_FOR_SIZE=y | ||
71 | CONFIG_CC_ALIGN_FUNCTIONS=0 | ||
72 | CONFIG_CC_ALIGN_LABELS=0 | ||
73 | CONFIG_CC_ALIGN_LOOPS=0 | ||
74 | CONFIG_CC_ALIGN_JUMPS=0 | ||
75 | CONFIG_BASE_SMALL=1 | ||
76 | |||
77 | # | ||
78 | # Loadable module support | ||
79 | # | ||
80 | CONFIG_MODULES=y | ||
81 | CONFIG_MODULE_UNLOAD=y | ||
82 | CONFIG_OBSOLETE_MODPARM=y | ||
83 | # CONFIG_MODULE_SRCVERSION_ALL is not set | ||
84 | CONFIG_KMOD=y | ||
85 | |||
86 | # | ||
87 | # Bus options (PCI, PCMCIA, EISA, MCA, ISA) | ||
88 | # | ||
89 | |||
90 | # | ||
91 | # PCCARD (PCMCIA/CardBus) support | ||
92 | # | ||
93 | # CONFIG_PCCARD is not set | ||
94 | |||
95 | # | ||
96 | # PCI Hotplug Support | ||
97 | # | ||
98 | |||
99 | # | ||
100 | # Executable file formats | ||
101 | # | ||
102 | CONFIG_BINFMT_FLAT=y | ||
103 | # CONFIG_BINFMT_ZFLAT is not set | ||
104 | # CONFIG_BINFMT_SHARED_FLAT is not set | ||
105 | # CONFIG_BINFMT_MISC is not set | ||
106 | |||
107 | # | ||
108 | # Networking | ||
109 | # | ||
110 | # CONFIG_NET is not set | ||
111 | |||
112 | # | ||
113 | # Generic Driver Options | ||
114 | # | ||
115 | CONFIG_STANDALONE=y | ||
116 | CONFIG_PREVENT_FIRMWARE_BUILD=y | ||
117 | # CONFIG_FW_LOADER is not set | ||
118 | # CONFIG_DEBUG_DRIVER is not set | ||
119 | |||
120 | # | ||
121 | # Memory Technology Devices (MTD) | ||
122 | # | ||
123 | CONFIG_MTD=y | ||
124 | # CONFIG_MTD_DEBUG is not set | ||
125 | # CONFIG_MTD_CONCAT is not set | ||
126 | # CONFIG_MTD_PARTITIONS is not set | ||
127 | |||
128 | # | ||
129 | # User Modules And Translation Layers | ||
130 | # | ||
131 | # CONFIG_MTD_CHAR is not set | ||
132 | CONFIG_MTD_BLOCK=y | ||
133 | # CONFIG_FTL is not set | ||
134 | # CONFIG_NFTL is not set | ||
135 | # CONFIG_INFTL is not set | ||
136 | |||
137 | # | ||
138 | # RAM/ROM/Flash chip drivers | ||
139 | # | ||
140 | # CONFIG_MTD_CFI is not set | ||
141 | # CONFIG_MTD_JEDECPROBE is not set | ||
142 | CONFIG_MTD_MAP_BANK_WIDTH_1=y | ||
143 | CONFIG_MTD_MAP_BANK_WIDTH_2=y | ||
144 | CONFIG_MTD_MAP_BANK_WIDTH_4=y | ||
145 | # CONFIG_MTD_MAP_BANK_WIDTH_8 is not set | ||
146 | # CONFIG_MTD_MAP_BANK_WIDTH_16 is not set | ||
147 | # CONFIG_MTD_MAP_BANK_WIDTH_32 is not set | ||
148 | CONFIG_MTD_CFI_I1=y | ||
149 | CONFIG_MTD_CFI_I2=y | ||
150 | # CONFIG_MTD_CFI_I4 is not set | ||
151 | # CONFIG_MTD_CFI_I8 is not set | ||
152 | # CONFIG_MTD_RAM is not set | ||
153 | # CONFIG_MTD_ROM is not set | ||
154 | # CONFIG_MTD_ABSENT is not set | ||
155 | |||
156 | # | ||
157 | # Mapping drivers for chip access | ||
158 | # | ||
159 | # CONFIG_MTD_COMPLEX_MAPPINGS is not set | ||
160 | # CONFIG_MTD_PLATRAM is not set | ||
161 | |||
162 | # | ||
163 | # Self-contained MTD device drivers | ||
164 | # | ||
165 | CONFIG_MTD_SLRAM=y | ||
166 | # CONFIG_MTD_PHRAM is not set | ||
167 | # CONFIG_MTD_MTDRAM is not set | ||
168 | # CONFIG_MTD_BLKMTD is not set | ||
169 | |||
170 | # | ||
171 | # Disk-On-Chip Device Drivers | ||
172 | # | ||
173 | # CONFIG_MTD_DOC2000 is not set | ||
174 | # CONFIG_MTD_DOC2001 is not set | ||
175 | # CONFIG_MTD_DOC2001PLUS is not set | ||
176 | |||
177 | # | ||
178 | # NAND Flash Device Drivers | ||
179 | # | ||
180 | # CONFIG_MTD_NAND is not set | ||
181 | |||
182 | # | ||
183 | # Parallel port support | ||
184 | # | ||
185 | # CONFIG_PARPORT is not set | ||
186 | |||
187 | # | ||
188 | # Block devices | ||
189 | # | ||
190 | # CONFIG_BLK_DEV_FD is not set | ||
191 | # CONFIG_BLK_DEV_COW_COMMON is not set | ||
192 | # CONFIG_BLK_DEV_LOOP is not set | ||
193 | # CONFIG_BLK_DEV_RAM is not set | ||
194 | CONFIG_BLK_DEV_RAM_COUNT=16 | ||
195 | CONFIG_INITRAMFS_SOURCE="" | ||
196 | # CONFIG_CDROM_PKTCDVD is not set | ||
197 | |||
198 | # | ||
199 | # IO Schedulers | ||
200 | # | ||
201 | CONFIG_IOSCHED_NOOP=y | ||
202 | # CONFIG_IOSCHED_AS is not set | ||
203 | # CONFIG_IOSCHED_DEADLINE is not set | ||
204 | # CONFIG_IOSCHED_CFQ is not set | ||
205 | |||
206 | # | ||
207 | # Disk device support | ||
208 | # | ||
209 | |||
210 | # | ||
211 | # ATA/ATAPI/MFM/RLL support | ||
212 | # | ||
213 | # CONFIG_IDE is not set | ||
214 | |||
215 | # | ||
216 | # SCSI device support | ||
217 | # | ||
218 | # CONFIG_SCSI is not set | ||
219 | |||
220 | # | ||
221 | # Multi-device support (RAID and LVM) | ||
222 | # | ||
223 | # CONFIG_MD is not set | ||
224 | |||
225 | # | ||
226 | # Fusion MPT device support | ||
227 | # | ||
228 | # CONFIG_FUSION is not set | ||
229 | |||
230 | # | ||
231 | # IEEE 1394 (FireWire) support | ||
232 | # | ||
233 | |||
234 | # | ||
235 | # I2O device support | ||
236 | # | ||
237 | |||
238 | # | ||
239 | # Network device support | ||
240 | # | ||
241 | # CONFIG_NETPOLL is not set | ||
242 | # CONFIG_NET_POLL_CONTROLLER is not set | ||
243 | |||
244 | # | ||
245 | # ISDN subsystem | ||
246 | # | ||
247 | |||
248 | # | ||
249 | # Input device support | ||
250 | # | ||
251 | CONFIG_INPUT=y | ||
252 | |||
253 | # | ||
254 | # Userland interfaces | ||
255 | # | ||
256 | # CONFIG_INPUT_MOUSEDEV is not set | ||
257 | # CONFIG_INPUT_JOYDEV is not set | ||
258 | # CONFIG_INPUT_TSDEV is not set | ||
259 | # CONFIG_INPUT_EVDEV is not set | ||
260 | # CONFIG_INPUT_EVBUG is not set | ||
261 | |||
262 | # | ||
263 | # Input Device Drivers | ||
264 | # | ||
265 | # CONFIG_INPUT_KEYBOARD is not set | ||
266 | # CONFIG_INPUT_MOUSE is not set | ||
267 | # CONFIG_INPUT_JOYSTICK is not set | ||
268 | # CONFIG_INPUT_TOUCHSCREEN is not set | ||
269 | # CONFIG_INPUT_MISC is not set | ||
270 | |||
271 | # | ||
272 | # Hardware I/O ports | ||
273 | # | ||
274 | CONFIG_SERIO=y | ||
275 | # CONFIG_SERIO_I8042 is not set | ||
276 | # CONFIG_SERIO_SERPORT is not set | ||
277 | # CONFIG_SERIO_LIBPS2 is not set | ||
278 | # CONFIG_SERIO_RAW is not set | ||
279 | # CONFIG_GAMEPORT is not set | ||
280 | |||
281 | # | ||
282 | # Character devices | ||
283 | # | ||
284 | # CONFIG_VT is not set | ||
285 | # CONFIG_SERIAL_NONSTANDARD is not set | ||
286 | |||
287 | # | ||
288 | # Serial drivers | ||
289 | # | ||
290 | CONFIG_SERIAL_8250=y | ||
291 | CONFIG_SERIAL_8250_CONSOLE=y | ||
292 | CONFIG_SERIAL_8250_NR_UARTS=1 | ||
293 | # CONFIG_SERIAL_8250_EXTENDED is not set | ||
294 | |||
295 | # | ||
296 | # Non-8250 serial port support | ||
297 | # | ||
298 | # CONFIG_V850E_UART is not set | ||
299 | CONFIG_SERIAL_CORE=y | ||
300 | CONFIG_SERIAL_CORE_CONSOLE=y | ||
301 | # CONFIG_UNIX98_PTYS is not set | ||
302 | # CONFIG_LEGACY_PTYS is not set | ||
303 | |||
304 | # | ||
305 | # IPMI | ||
306 | # | ||
307 | # CONFIG_IPMI_HANDLER is not set | ||
308 | |||
309 | # | ||
310 | # Watchdog Cards | ||
311 | # | ||
312 | # CONFIG_WATCHDOG is not set | ||
313 | # CONFIG_RTC is not set | ||
314 | # CONFIG_GEN_RTC is not set | ||
315 | # CONFIG_DTLK is not set | ||
316 | # CONFIG_R3964 is not set | ||
317 | |||
318 | # | ||
319 | # Ftape, the floppy tape device driver | ||
320 | # | ||
321 | # CONFIG_RAW_DRIVER is not set | ||
322 | |||
323 | # | ||
324 | # TPM devices | ||
325 | # | ||
326 | |||
327 | # | ||
328 | # Multimedia devices | ||
329 | # | ||
330 | # CONFIG_VIDEO_DEV is not set | ||
331 | |||
332 | # | ||
333 | # Digital Video Broadcasting Devices | ||
334 | # | ||
335 | |||
336 | # | ||
337 | # File systems | ||
338 | # | ||
339 | # CONFIG_EXT2_FS is not set | ||
340 | # CONFIG_EXT3_FS is not set | ||
341 | # CONFIG_JBD is not set | ||
342 | # CONFIG_REISERFS_FS is not set | ||
343 | # CONFIG_JFS_FS is not set | ||
344 | # CONFIG_FS_POSIX_ACL is not set | ||
345 | |||
346 | # | ||
347 | # XFS support | ||
348 | # | ||
349 | # CONFIG_XFS_FS is not set | ||
350 | # CONFIG_MINIX_FS is not set | ||
351 | CONFIG_ROMFS_FS=y | ||
352 | # CONFIG_MAGIC_ROM_PTR is not set | ||
353 | CONFIG_INOTIFY=y | ||
354 | # CONFIG_QUOTA is not set | ||
355 | CONFIG_DNOTIFY=y | ||
356 | # CONFIG_AUTOFS_FS is not set | ||
357 | # CONFIG_AUTOFS4_FS is not set | ||
358 | |||
359 | # | ||
360 | # CD-ROM/DVD Filesystems | ||
361 | # | ||
362 | # CONFIG_ISO9660_FS is not set | ||
363 | # CONFIG_UDF_FS is not set | ||
364 | |||
365 | # | ||
366 | # DOS/FAT/NT Filesystems | ||
367 | # | ||
368 | # CONFIG_MSDOS_FS is not set | ||
369 | # CONFIG_VFAT_FS is not set | ||
370 | # CONFIG_NTFS_FS is not set | ||
371 | |||
372 | # | ||
373 | # Pseudo filesystems | ||
374 | # | ||
375 | CONFIG_PROC_FS=y | ||
376 | CONFIG_SYSFS=y | ||
377 | # CONFIG_TMPFS is not set | ||
378 | # CONFIG_HUGETLB_PAGE is not set | ||
379 | CONFIG_RAMFS=y | ||
380 | |||
381 | # | ||
382 | # Miscellaneous filesystems | ||
383 | # | ||
384 | # CONFIG_HFSPLUS_FS is not set | ||
385 | # CONFIG_JFFS_FS is not set | ||
386 | # CONFIG_JFFS2_FS is not set | ||
387 | # CONFIG_CRAMFS is not set | ||
388 | # CONFIG_VXFS_FS is not set | ||
389 | # CONFIG_HPFS_FS is not set | ||
390 | # CONFIG_QNX4FS_FS is not set | ||
391 | # CONFIG_SYSV_FS is not set | ||
392 | # CONFIG_UFS_FS is not set | ||
393 | |||
394 | # | ||
395 | # Partition Types | ||
396 | # | ||
397 | # CONFIG_PARTITION_ADVANCED is not set | ||
398 | CONFIG_MSDOS_PARTITION=y | ||
399 | |||
400 | # | ||
401 | # Native Language Support | ||
402 | # | ||
403 | # CONFIG_NLS is not set | ||
404 | |||
405 | # | ||
406 | # Graphics support | ||
407 | # | ||
408 | # CONFIG_FB is not set | ||
409 | |||
410 | # | ||
411 | # Sound | ||
412 | # | ||
413 | # CONFIG_SOUND is not set | ||
414 | |||
415 | # | ||
416 | # USB support | ||
417 | # | ||
418 | # CONFIG_USB_ARCH_HAS_HCD is not set | ||
419 | # CONFIG_USB_ARCH_HAS_OHCI is not set | ||
420 | |||
421 | # | ||
422 | # USB Gadget Support | ||
423 | # | ||
424 | # CONFIG_USB_GADGET is not set | ||
425 | |||
426 | # | ||
427 | # Kernel hacking | ||
428 | # | ||
429 | # CONFIG_PRINTK_TIME is not set | ||
430 | CONFIG_DEBUG_KERNEL=y | ||
431 | # CONFIG_MAGIC_SYSRQ is not set | ||
432 | CONFIG_LOG_BUF_SHIFT=14 | ||
433 | # CONFIG_SCHEDSTATS is not set | ||
434 | # CONFIG_DEBUG_SLAB is not set | ||
435 | # CONFIG_DEBUG_SPINLOCK is not set | ||
436 | # CONFIG_DEBUG_SPINLOCK_SLEEP is not set | ||
437 | # CONFIG_DEBUG_KOBJECT is not set | ||
438 | CONFIG_DEBUG_INFO=y | ||
439 | # CONFIG_DEBUG_FS is not set | ||
440 | # CONFIG_NO_KERNEL_MSG is not set | ||
441 | |||
442 | # | ||
443 | # Security options | ||
444 | # | ||
445 | # CONFIG_KEYS is not set | ||
446 | # CONFIG_SECURITY is not set | ||
447 | |||
448 | # | ||
449 | # Cryptographic options | ||
450 | # | ||
451 | # CONFIG_CRYPTO is not set | ||
452 | |||
453 | # | ||
454 | # Hardware crypto devices | ||
455 | # | ||
456 | |||
457 | # | ||
458 | # Library routines | ||
459 | # | ||
460 | # CONFIG_CRC_CCITT is not set | ||
461 | # CONFIG_CRC32 is not set | ||
462 | # CONFIG_LIBCRC32C is not set | ||
diff --git a/arch/v850/configs/sim_defconfig b/arch/v850/configs/sim_defconfig deleted file mode 100644 index f31ba7398ad0..000000000000 --- a/arch/v850/configs/sim_defconfig +++ /dev/null | |||
@@ -1,451 +0,0 @@ | |||
1 | # | ||
2 | # Automatically generated make config: don't edit | ||
3 | # Linux kernel version: 2.6.13-uc0 | ||
4 | # Fri Sep 2 13:36:43 2005 | ||
5 | # | ||
6 | # CONFIG_MMU is not set | ||
7 | # CONFIG_UID16 is not set | ||
8 | CONFIG_RWSEM_GENERIC_SPINLOCK=y | ||
9 | # CONFIG_RWSEM_XCHGADD_ALGORITHM is not set | ||
10 | CONFIG_GENERIC_CALIBRATE_DELAY=y | ||
11 | # CONFIG_ISA is not set | ||
12 | # CONFIG_ISAPNP is not set | ||
13 | # CONFIG_EISA is not set | ||
14 | # CONFIG_MCA is not set | ||
15 | CONFIG_V850=y | ||
16 | |||
17 | # | ||
18 | # Processor type and features | ||
19 | # | ||
20 | CONFIG_V850E_SIM=y | ||
21 | # CONFIG_RTE_CB_MA1 is not set | ||
22 | # CONFIG_RTE_CB_NB85E is not set | ||
23 | # CONFIG_RTE_CB_ME2 is not set | ||
24 | # CONFIG_V850E_AS85EP1 is not set | ||
25 | # CONFIG_V850E2_SIM85E2C is not set | ||
26 | # CONFIG_V850E2_SIM85E2S is not set | ||
27 | # CONFIG_V850E2_FPGA85E2C is not set | ||
28 | # CONFIG_V850E2_ANNA is not set | ||
29 | CONFIG_V850E=y | ||
30 | # CONFIG_PCI is not set | ||
31 | # CONFIG_V850E_INTC is not set | ||
32 | # CONFIG_V850E_TIMER_D is not set | ||
33 | # CONFIG_V850E_CACHE is not set | ||
34 | # CONFIG_V850E2_CACHE is not set | ||
35 | CONFIG_NO_CACHE=y | ||
36 | CONFIG_ZERO_BSS=y | ||
37 | # CONFIG_RESET_GUARD is not set | ||
38 | CONFIG_LARGE_ALLOCS=y | ||
39 | CONFIG_FLATMEM=y | ||
40 | CONFIG_FLAT_NODE_MEM_MAP=y | ||
41 | |||
42 | # | ||
43 | # Code maturity level options | ||
44 | # | ||
45 | # CONFIG_EXPERIMENTAL is not set | ||
46 | CONFIG_CLEAN_COMPILE=y | ||
47 | CONFIG_BROKEN_ON_SMP=y | ||
48 | CONFIG_INIT_ENV_ARG_LIMIT=32 | ||
49 | |||
50 | # | ||
51 | # General setup | ||
52 | # | ||
53 | CONFIG_LOCALVERSION="" | ||
54 | # CONFIG_BSD_PROCESS_ACCT is not set | ||
55 | # CONFIG_SYSCTL is not set | ||
56 | # CONFIG_HOTPLUG is not set | ||
57 | # CONFIG_IKCONFIG is not set | ||
58 | CONFIG_EMBEDDED=y | ||
59 | # CONFIG_KALLSYMS is not set | ||
60 | CONFIG_PRINTK=y | ||
61 | CONFIG_BUG=y | ||
62 | # CONFIG_BASE_FULL is not set | ||
63 | # CONFIG_FUTEX is not set | ||
64 | # CONFIG_EPOLL is not set | ||
65 | CONFIG_CC_OPTIMIZE_FOR_SIZE=y | ||
66 | CONFIG_CC_ALIGN_FUNCTIONS=0 | ||
67 | CONFIG_CC_ALIGN_LABELS=0 | ||
68 | CONFIG_CC_ALIGN_LOOPS=0 | ||
69 | CONFIG_CC_ALIGN_JUMPS=0 | ||
70 | CONFIG_BASE_SMALL=1 | ||
71 | |||
72 | # | ||
73 | # Loadable module support | ||
74 | # | ||
75 | CONFIG_MODULES=y | ||
76 | CONFIG_MODULE_UNLOAD=y | ||
77 | CONFIG_OBSOLETE_MODPARM=y | ||
78 | # CONFIG_MODULE_SRCVERSION_ALL is not set | ||
79 | CONFIG_KMOD=y | ||
80 | |||
81 | # | ||
82 | # Bus options (PCI, PCMCIA, EISA, MCA, ISA) | ||
83 | # | ||
84 | |||
85 | # | ||
86 | # PCCARD (PCMCIA/CardBus) support | ||
87 | # | ||
88 | # CONFIG_PCCARD is not set | ||
89 | |||
90 | # | ||
91 | # PCI Hotplug Support | ||
92 | # | ||
93 | |||
94 | # | ||
95 | # Executable file formats | ||
96 | # | ||
97 | CONFIG_BINFMT_FLAT=y | ||
98 | # CONFIG_BINFMT_ZFLAT is not set | ||
99 | # CONFIG_BINFMT_SHARED_FLAT is not set | ||
100 | # CONFIG_BINFMT_MISC is not set | ||
101 | |||
102 | # | ||
103 | # Networking | ||
104 | # | ||
105 | # CONFIG_NET is not set | ||
106 | |||
107 | # | ||
108 | # Generic Driver Options | ||
109 | # | ||
110 | CONFIG_STANDALONE=y | ||
111 | CONFIG_PREVENT_FIRMWARE_BUILD=y | ||
112 | # CONFIG_FW_LOADER is not set | ||
113 | # CONFIG_DEBUG_DRIVER is not set | ||
114 | |||
115 | # | ||
116 | # Memory Technology Devices (MTD) | ||
117 | # | ||
118 | CONFIG_MTD=y | ||
119 | # CONFIG_MTD_DEBUG is not set | ||
120 | # CONFIG_MTD_CONCAT is not set | ||
121 | # CONFIG_MTD_PARTITIONS is not set | ||
122 | |||
123 | # | ||
124 | # User Modules And Translation Layers | ||
125 | # | ||
126 | # CONFIG_MTD_CHAR is not set | ||
127 | CONFIG_MTD_BLOCK=y | ||
128 | # CONFIG_FTL is not set | ||
129 | # CONFIG_NFTL is not set | ||
130 | # CONFIG_INFTL is not set | ||
131 | |||
132 | # | ||
133 | # RAM/ROM/Flash chip drivers | ||
134 | # | ||
135 | # CONFIG_MTD_CFI is not set | ||
136 | # CONFIG_MTD_JEDECPROBE is not set | ||
137 | CONFIG_MTD_MAP_BANK_WIDTH_1=y | ||
138 | CONFIG_MTD_MAP_BANK_WIDTH_2=y | ||
139 | CONFIG_MTD_MAP_BANK_WIDTH_4=y | ||
140 | # CONFIG_MTD_MAP_BANK_WIDTH_8 is not set | ||
141 | # CONFIG_MTD_MAP_BANK_WIDTH_16 is not set | ||
142 | # CONFIG_MTD_MAP_BANK_WIDTH_32 is not set | ||
143 | CONFIG_MTD_CFI_I1=y | ||
144 | CONFIG_MTD_CFI_I2=y | ||
145 | # CONFIG_MTD_CFI_I4 is not set | ||
146 | # CONFIG_MTD_CFI_I8 is not set | ||
147 | # CONFIG_MTD_RAM is not set | ||
148 | # CONFIG_MTD_ROM is not set | ||
149 | # CONFIG_MTD_ABSENT is not set | ||
150 | |||
151 | # | ||
152 | # Mapping drivers for chip access | ||
153 | # | ||
154 | # CONFIG_MTD_COMPLEX_MAPPINGS is not set | ||
155 | # CONFIG_MTD_PLATRAM is not set | ||
156 | |||
157 | # | ||
158 | # Self-contained MTD device drivers | ||
159 | # | ||
160 | CONFIG_MTD_SLRAM=y | ||
161 | # CONFIG_MTD_PHRAM is not set | ||
162 | # CONFIG_MTD_MTDRAM is not set | ||
163 | # CONFIG_MTD_BLKMTD is not set | ||
164 | |||
165 | # | ||
166 | # Disk-On-Chip Device Drivers | ||
167 | # | ||
168 | # CONFIG_MTD_DOC2000 is not set | ||
169 | # CONFIG_MTD_DOC2001 is not set | ||
170 | # CONFIG_MTD_DOC2001PLUS is not set | ||
171 | |||
172 | # | ||
173 | # NAND Flash Device Drivers | ||
174 | # | ||
175 | # CONFIG_MTD_NAND is not set | ||
176 | |||
177 | # | ||
178 | # Parallel port support | ||
179 | # | ||
180 | # CONFIG_PARPORT is not set | ||
181 | |||
182 | # | ||
183 | # Block devices | ||
184 | # | ||
185 | # CONFIG_BLK_DEV_FD is not set | ||
186 | # CONFIG_BLK_DEV_COW_COMMON is not set | ||
187 | # CONFIG_BLK_DEV_LOOP is not set | ||
188 | # CONFIG_BLK_DEV_RAM is not set | ||
189 | CONFIG_BLK_DEV_RAM_COUNT=16 | ||
190 | CONFIG_INITRAMFS_SOURCE="" | ||
191 | # CONFIG_CDROM_PKTCDVD is not set | ||
192 | |||
193 | # | ||
194 | # IO Schedulers | ||
195 | # | ||
196 | CONFIG_IOSCHED_NOOP=y | ||
197 | # CONFIG_IOSCHED_AS is not set | ||
198 | # CONFIG_IOSCHED_DEADLINE is not set | ||
199 | # CONFIG_IOSCHED_CFQ is not set | ||
200 | |||
201 | # | ||
202 | # Disk device support | ||
203 | # | ||
204 | |||
205 | # | ||
206 | # ATA/ATAPI/MFM/RLL support | ||
207 | # | ||
208 | # CONFIG_IDE is not set | ||
209 | |||
210 | # | ||
211 | # SCSI device support | ||
212 | # | ||
213 | # CONFIG_SCSI is not set | ||
214 | |||
215 | # | ||
216 | # Multi-device support (RAID and LVM) | ||
217 | # | ||
218 | # CONFIG_MD is not set | ||
219 | |||
220 | # | ||
221 | # Fusion MPT device support | ||
222 | # | ||
223 | # CONFIG_FUSION is not set | ||
224 | |||
225 | # | ||
226 | # IEEE 1394 (FireWire) support | ||
227 | # | ||
228 | |||
229 | # | ||
230 | # I2O device support | ||
231 | # | ||
232 | |||
233 | # | ||
234 | # Network device support | ||
235 | # | ||
236 | # CONFIG_NETPOLL is not set | ||
237 | # CONFIG_NET_POLL_CONTROLLER is not set | ||
238 | |||
239 | # | ||
240 | # ISDN subsystem | ||
241 | # | ||
242 | |||
243 | # | ||
244 | # Input device support | ||
245 | # | ||
246 | CONFIG_INPUT=y | ||
247 | |||
248 | # | ||
249 | # Userland interfaces | ||
250 | # | ||
251 | # CONFIG_INPUT_MOUSEDEV is not set | ||
252 | # CONFIG_INPUT_JOYDEV is not set | ||
253 | # CONFIG_INPUT_TSDEV is not set | ||
254 | # CONFIG_INPUT_EVDEV is not set | ||
255 | # CONFIG_INPUT_EVBUG is not set | ||
256 | |||
257 | # | ||
258 | # Input Device Drivers | ||
259 | # | ||
260 | # CONFIG_INPUT_KEYBOARD is not set | ||
261 | # CONFIG_INPUT_MOUSE is not set | ||
262 | # CONFIG_INPUT_JOYSTICK is not set | ||
263 | # CONFIG_INPUT_TOUCHSCREEN is not set | ||
264 | # CONFIG_INPUT_MISC is not set | ||
265 | |||
266 | # | ||
267 | # Hardware I/O ports | ||
268 | # | ||
269 | CONFIG_SERIO=y | ||
270 | # CONFIG_SERIO_I8042 is not set | ||
271 | # CONFIG_SERIO_SERPORT is not set | ||
272 | # CONFIG_SERIO_LIBPS2 is not set | ||
273 | # CONFIG_SERIO_RAW is not set | ||
274 | # CONFIG_GAMEPORT is not set | ||
275 | |||
276 | # | ||
277 | # Character devices | ||
278 | # | ||
279 | # CONFIG_VT is not set | ||
280 | # CONFIG_SERIAL_NONSTANDARD is not set | ||
281 | |||
282 | # | ||
283 | # Serial drivers | ||
284 | # | ||
285 | # CONFIG_SERIAL_8250 is not set | ||
286 | |||
287 | # | ||
288 | # Non-8250 serial port support | ||
289 | # | ||
290 | # CONFIG_UNIX98_PTYS is not set | ||
291 | # CONFIG_LEGACY_PTYS is not set | ||
292 | |||
293 | # | ||
294 | # IPMI | ||
295 | # | ||
296 | # CONFIG_IPMI_HANDLER is not set | ||
297 | |||
298 | # | ||
299 | # Watchdog Cards | ||
300 | # | ||
301 | # CONFIG_WATCHDOG is not set | ||
302 | # CONFIG_RTC is not set | ||
303 | # CONFIG_GEN_RTC is not set | ||
304 | # CONFIG_DTLK is not set | ||
305 | # CONFIG_R3964 is not set | ||
306 | |||
307 | # | ||
308 | # Ftape, the floppy tape device driver | ||
309 | # | ||
310 | # CONFIG_RAW_DRIVER is not set | ||
311 | |||
312 | # | ||
313 | # TPM devices | ||
314 | # | ||
315 | |||
316 | # | ||
317 | # Multimedia devices | ||
318 | # | ||
319 | # CONFIG_VIDEO_DEV is not set | ||
320 | |||
321 | # | ||
322 | # Digital Video Broadcasting Devices | ||
323 | # | ||
324 | |||
325 | # | ||
326 | # File systems | ||
327 | # | ||
328 | # CONFIG_EXT2_FS is not set | ||
329 | # CONFIG_EXT3_FS is not set | ||
330 | # CONFIG_JBD is not set | ||
331 | # CONFIG_REISERFS_FS is not set | ||
332 | # CONFIG_JFS_FS is not set | ||
333 | # CONFIG_FS_POSIX_ACL is not set | ||
334 | |||
335 | # | ||
336 | # XFS support | ||
337 | # | ||
338 | # CONFIG_XFS_FS is not set | ||
339 | # CONFIG_MINIX_FS is not set | ||
340 | CONFIG_ROMFS_FS=y | ||
341 | # CONFIG_MAGIC_ROM_PTR is not set | ||
342 | CONFIG_INOTIFY=y | ||
343 | # CONFIG_QUOTA is not set | ||
344 | CONFIG_DNOTIFY=y | ||
345 | # CONFIG_AUTOFS_FS is not set | ||
346 | # CONFIG_AUTOFS4_FS is not set | ||
347 | |||
348 | # | ||
349 | # CD-ROM/DVD Filesystems | ||
350 | # | ||
351 | # CONFIG_ISO9660_FS is not set | ||
352 | # CONFIG_UDF_FS is not set | ||
353 | |||
354 | # | ||
355 | # DOS/FAT/NT Filesystems | ||
356 | # | ||
357 | # CONFIG_MSDOS_FS is not set | ||
358 | # CONFIG_VFAT_FS is not set | ||
359 | # CONFIG_NTFS_FS is not set | ||
360 | |||
361 | # | ||
362 | # Pseudo filesystems | ||
363 | # | ||
364 | CONFIG_PROC_FS=y | ||
365 | CONFIG_SYSFS=y | ||
366 | # CONFIG_TMPFS is not set | ||
367 | # CONFIG_HUGETLB_PAGE is not set | ||
368 | CONFIG_RAMFS=y | ||
369 | |||
370 | # | ||
371 | # Miscellaneous filesystems | ||
372 | # | ||
373 | # CONFIG_HFSPLUS_FS is not set | ||
374 | # CONFIG_JFFS_FS is not set | ||
375 | # CONFIG_JFFS2_FS is not set | ||
376 | # CONFIG_CRAMFS is not set | ||
377 | # CONFIG_VXFS_FS is not set | ||
378 | # CONFIG_HPFS_FS is not set | ||
379 | # CONFIG_QNX4FS_FS is not set | ||
380 | # CONFIG_SYSV_FS is not set | ||
381 | # CONFIG_UFS_FS is not set | ||
382 | |||
383 | # | ||
384 | # Partition Types | ||
385 | # | ||
386 | # CONFIG_PARTITION_ADVANCED is not set | ||
387 | CONFIG_MSDOS_PARTITION=y | ||
388 | |||
389 | # | ||
390 | # Native Language Support | ||
391 | # | ||
392 | # CONFIG_NLS is not set | ||
393 | |||
394 | # | ||
395 | # Graphics support | ||
396 | # | ||
397 | # CONFIG_FB is not set | ||
398 | |||
399 | # | ||
400 | # Sound | ||
401 | # | ||
402 | # CONFIG_SOUND is not set | ||
403 | |||
404 | # | ||
405 | # USB support | ||
406 | # | ||
407 | # CONFIG_USB_ARCH_HAS_HCD is not set | ||
408 | # CONFIG_USB_ARCH_HAS_OHCI is not set | ||
409 | |||
410 | # | ||
411 | # USB Gadget Support | ||
412 | # | ||
413 | # CONFIG_USB_GADGET is not set | ||
414 | |||
415 | # | ||
416 | # Kernel hacking | ||
417 | # | ||
418 | # CONFIG_PRINTK_TIME is not set | ||
419 | CONFIG_DEBUG_KERNEL=y | ||
420 | # CONFIG_MAGIC_SYSRQ is not set | ||
421 | CONFIG_LOG_BUF_SHIFT=14 | ||
422 | # CONFIG_SCHEDSTATS is not set | ||
423 | # CONFIG_DEBUG_SLAB is not set | ||
424 | # CONFIG_DEBUG_SPINLOCK is not set | ||
425 | # CONFIG_DEBUG_SPINLOCK_SLEEP is not set | ||
426 | # CONFIG_DEBUG_KOBJECT is not set | ||
427 | CONFIG_DEBUG_INFO=y | ||
428 | # CONFIG_DEBUG_FS is not set | ||
429 | # CONFIG_NO_KERNEL_MSG is not set | ||
430 | |||
431 | # | ||
432 | # Security options | ||
433 | # | ||
434 | # CONFIG_KEYS is not set | ||
435 | # CONFIG_SECURITY is not set | ||
436 | |||
437 | # | ||
438 | # Cryptographic options | ||
439 | # | ||
440 | # CONFIG_CRYPTO is not set | ||
441 | |||
442 | # | ||
443 | # Hardware crypto devices | ||
444 | # | ||
445 | |||
446 | # | ||
447 | # Library routines | ||
448 | # | ||
449 | # CONFIG_CRC_CCITT is not set | ||
450 | # CONFIG_CRC32 is not set | ||
451 | # CONFIG_LIBCRC32C is not set | ||
diff --git a/arch/v850/kernel/Makefile b/arch/v850/kernel/Makefile deleted file mode 100644 index da5889c53576..000000000000 --- a/arch/v850/kernel/Makefile +++ /dev/null | |||
@@ -1,40 +0,0 @@ | |||
1 | # | ||
2 | # arch/v850/kernel/Makefile | ||
3 | # | ||
4 | # Copyright (C) 2001,02,03 NEC Electronics Corporation | ||
5 | # Copyright (C) 2001,02,03 Miles Bader <miles@gnu.org> | ||
6 | # | ||
7 | # This file is subject to the terms and conditions of the GNU General Public | ||
8 | # License. See the file "COPYING" in the main directory of this archive | ||
9 | # for more details. | ||
10 | # | ||
11 | |||
12 | extra-y := head.o init_task.o vmlinux.lds | ||
13 | |||
14 | obj-y += intv.o entry.o process.o syscalls.o time.o setup.o \ | ||
15 | signal.o irq.o mach.o ptrace.o bug.o | ||
16 | obj-$(CONFIG_MODULES) += module.o v850_ksyms.o | ||
17 | # chip-specific code | ||
18 | obj-$(CONFIG_V850E_MA1) += ma.o | ||
19 | obj-$(CONFIG_V850E_ME2) += me2.o | ||
20 | obj-$(CONFIG_V850E_TEG) += teg.o | ||
21 | obj-$(CONFIG_V850E_AS85EP1) += as85ep1.o | ||
22 | obj-$(CONFIG_V850E2_ANNA) += anna.o | ||
23 | # platform-specific code | ||
24 | obj-$(CONFIG_V850E_SIM) += sim.o simcons.o | ||
25 | obj-$(CONFIG_V850E2_SIM85E2) += sim85e2.o memcons.o | ||
26 | obj-$(CONFIG_V850E2_FPGA85E2C) += fpga85e2c.o memcons.o | ||
27 | obj-$(CONFIG_RTE_CB) += rte_cb.o rte_cb_leds.o | ||
28 | obj-$(CONFIG_RTE_CB_MA1) += rte_ma1_cb.o | ||
29 | obj-$(CONFIG_RTE_CB_ME2) += rte_me2_cb.o | ||
30 | obj-$(CONFIG_RTE_CB_NB85E) += rte_nb85e_cb.o | ||
31 | obj-$(CONFIG_RTE_CB_MULTI) += rte_cb_multi.o | ||
32 | obj-$(CONFIG_RTE_MB_A_PCI) += rte_mb_a_pci.o | ||
33 | obj-$(CONFIG_RTE_GBUS_INT) += gbus_int.o | ||
34 | # feature-specific code | ||
35 | obj-$(CONFIG_V850E_INTC) += v850e_intc.o | ||
36 | obj-$(CONFIG_V850E_TIMER_D) += v850e_timer_d.o v850e_utils.o | ||
37 | obj-$(CONFIG_V850E_CACHE) += v850e_cache.o | ||
38 | obj-$(CONFIG_V850E2_CACHE) += v850e2_cache.o | ||
39 | obj-$(CONFIG_V850E_HIGHRES_TIMER) += highres_timer.o | ||
40 | obj-$(CONFIG_PROC_FS) += procfs.o | ||
diff --git a/arch/v850/kernel/anna-rom.ld b/arch/v850/kernel/anna-rom.ld deleted file mode 100644 index 7c54e7e3f1b1..000000000000 --- a/arch/v850/kernel/anna-rom.ld +++ /dev/null | |||
@@ -1,16 +0,0 @@ | |||
1 | /* Linker script for the Midas labs Anna V850E2 evaluation board | ||
2 | (CONFIG_V850E2_ANNA), with kernel in ROM (CONFIG_ROM_KERNEL). */ | ||
3 | |||
4 | MEMORY { | ||
5 | /* 8MB of flash ROM. */ | ||
6 | ROM : ORIGIN = 0, LENGTH = 0x00800000 | ||
7 | |||
8 | /* 1MB of static RAM. This memory is mirrored 64 times. */ | ||
9 | SRAM : ORIGIN = SRAM_ADDR, LENGTH = SRAM_SIZE | ||
10 | /* 64MB of DRAM. */ | ||
11 | SDRAM : ORIGIN = SDRAM_ADDR, LENGTH = SDRAM_SIZE | ||
12 | } | ||
13 | |||
14 | SECTIONS { | ||
15 | ROMK_SECTIONS(ROM, SRAM) | ||
16 | } | ||
diff --git a/arch/v850/kernel/anna.c b/arch/v850/kernel/anna.c deleted file mode 100644 index 5978a25170fb..000000000000 --- a/arch/v850/kernel/anna.c +++ /dev/null | |||
@@ -1,202 +0,0 @@ | |||
1 | /* | ||
2 | * arch/v850/kernel/anna.c -- Anna V850E2 evaluation chip/board | ||
3 | * | ||
4 | * Copyright (C) 2002,03 NEC Electronics Corporation | ||
5 | * Copyright (C) 2002,03 Miles Bader <miles@gnu.org> | ||
6 | * | ||
7 | * This file is subject to the terms and conditions of the GNU General | ||
8 | * Public License. See the file COPYING in the main directory of this | ||
9 | * archive for more details. | ||
10 | * | ||
11 | * Written by Miles Bader <miles@gnu.org> | ||
12 | */ | ||
13 | |||
14 | #include <linux/kernel.h> | ||
15 | #include <linux/module.h> | ||
16 | #include <linux/init.h> | ||
17 | #include <linux/bootmem.h> | ||
18 | #include <linux/major.h> | ||
19 | #include <linux/irq.h> | ||
20 | |||
21 | #include <asm/machdep.h> | ||
22 | #include <asm/atomic.h> | ||
23 | #include <asm/page.h> | ||
24 | #include <asm/v850e_timer_d.h> | ||
25 | #include <asm/v850e_uart.h> | ||
26 | |||
27 | #include "mach.h" | ||
28 | |||
29 | |||
30 | /* SRAM and SDRAM are vaguely contiguous (with a big hole in between; see | ||
31 | mach_reserve_bootmem for details); use both as one big area. */ | ||
32 | #define RAM_START SRAM_ADDR | ||
33 | #define RAM_END (SDRAM_ADDR + SDRAM_SIZE) | ||
34 | |||
35 | /* The bits of this port are connected to an 8-LED bar-graph. */ | ||
36 | #define LEDS_PORT 0 | ||
37 | |||
38 | |||
39 | static void anna_led_tick (void); | ||
40 | |||
41 | |||
42 | void __init mach_early_init (void) | ||
43 | { | ||
44 | ANNA_ILBEN = 0; | ||
45 | |||
46 | V850E2_CSC(0) = 0x402F; | ||
47 | V850E2_CSC(1) = 0x4000; | ||
48 | V850E2_BPC = 0; | ||
49 | V850E2_BSC = 0xAAAA; | ||
50 | V850E2_BEC = 0; | ||
51 | |||
52 | #if 0 | ||
53 | V850E2_BHC = 0xFFFF; /* icache all memory, dcache all */ | ||
54 | #else | ||
55 | V850E2_BHC = 0; /* cache no memory */ | ||
56 | #endif | ||
57 | V850E2_BCT(0) = 0xB088; | ||
58 | V850E2_BCT(1) = 0x0008; | ||
59 | V850E2_DWC(0) = 0x0027; | ||
60 | V850E2_DWC(1) = 0; | ||
61 | V850E2_BCC = 0x0006; | ||
62 | V850E2_ASC = 0; | ||
63 | V850E2_LBS = 0x0089; | ||
64 | V850E2_SCR(3) = 0x21A9; | ||
65 | V850E2_RFS(3) = 0x8121; | ||
66 | |||
67 | v850e_intc_disable_irqs (); | ||
68 | } | ||
69 | |||
70 | void __init mach_setup (char **cmdline) | ||
71 | { | ||
72 | ANNA_PORT_PM (LEDS_PORT) = 0; /* Make all LED pins output pins. */ | ||
73 | mach_tick = anna_led_tick; | ||
74 | } | ||
75 | |||
76 | void __init mach_get_physical_ram (unsigned long *ram_start, | ||
77 | unsigned long *ram_len) | ||
78 | { | ||
79 | *ram_start = RAM_START; | ||
80 | *ram_len = RAM_END - RAM_START; | ||
81 | } | ||
82 | |||
83 | void __init mach_reserve_bootmem () | ||
84 | { | ||
85 | /* The space between SRAM and SDRAM is filled with duplicate | ||
86 | images of SRAM. Prevent the kernel from using them. */ | ||
87 | reserve_bootmem (SRAM_ADDR + SRAM_SIZE, | ||
88 | SDRAM_ADDR - (SRAM_ADDR + SRAM_SIZE), | ||
89 | BOOTMEM_DEFAULT); | ||
90 | } | ||
91 | |||
92 | void mach_gettimeofday (struct timespec *tv) | ||
93 | { | ||
94 | tv->tv_sec = 0; | ||
95 | tv->tv_nsec = 0; | ||
96 | } | ||
97 | |||
98 | void __init mach_sched_init (struct irqaction *timer_action) | ||
99 | { | ||
100 | /* Start hardware timer. */ | ||
101 | v850e_timer_d_configure (0, HZ); | ||
102 | /* Install timer interrupt handler. */ | ||
103 | setup_irq (IRQ_INTCMD(0), timer_action); | ||
104 | } | ||
105 | |||
106 | static struct v850e_intc_irq_init irq_inits[] = { | ||
107 | { "IRQ", 0, NUM_MACH_IRQS, 1, 7 }, | ||
108 | { "PIN", IRQ_INTP(0), IRQ_INTP_NUM, 1, 4 }, | ||
109 | { "CCC", IRQ_INTCCC(0), IRQ_INTCCC_NUM, 1, 5 }, | ||
110 | { "CMD", IRQ_INTCMD(0), IRQ_INTCMD_NUM, 1, 5 }, | ||
111 | { "DMA", IRQ_INTDMA(0), IRQ_INTDMA_NUM, 1, 2 }, | ||
112 | { "DMXER", IRQ_INTDMXER,1, 1, 2 }, | ||
113 | { "SRE", IRQ_INTSRE(0), IRQ_INTSRE_NUM, 3, 3 }, | ||
114 | { "SR", IRQ_INTSR(0), IRQ_INTSR_NUM, 3, 4 }, | ||
115 | { "ST", IRQ_INTST(0), IRQ_INTST_NUM, 3, 5 }, | ||
116 | { 0 } | ||
117 | }; | ||
118 | #define NUM_IRQ_INITS (ARRAY_SIZE(irq_inits) - 1) | ||
119 | |||
120 | static struct hw_interrupt_type hw_itypes[NUM_IRQ_INITS]; | ||
121 | |||
122 | void __init mach_init_irqs (void) | ||
123 | { | ||
124 | v850e_intc_init_irq_types (irq_inits, hw_itypes); | ||
125 | } | ||
126 | |||
127 | void machine_restart (char *__unused) | ||
128 | { | ||
129 | #ifdef CONFIG_RESET_GUARD | ||
130 | disable_reset_guard (); | ||
131 | #endif | ||
132 | asm ("jmp r0"); /* Jump to the reset vector. */ | ||
133 | } | ||
134 | |||
135 | void machine_halt (void) | ||
136 | { | ||
137 | #ifdef CONFIG_RESET_GUARD | ||
138 | disable_reset_guard (); | ||
139 | #endif | ||
140 | local_irq_disable (); /* Ignore all interrupts. */ | ||
141 | ANNA_PORT_IO(LEDS_PORT) = 0xAA; /* Note that we halted. */ | ||
142 | for (;;) | ||
143 | asm ("halt; nop; nop; nop; nop; nop"); | ||
144 | } | ||
145 | |||
146 | void machine_power_off (void) | ||
147 | { | ||
148 | machine_halt (); | ||
149 | } | ||
150 | |||
151 | /* Called before configuring an on-chip UART. */ | ||
152 | void anna_uart_pre_configure (unsigned chan, unsigned cflags, unsigned baud) | ||
153 | { | ||
154 | /* The Anna connects some general-purpose I/O pins on the CPU to | ||
155 | the RTS/CTS lines of UART 1's serial connection. I/O pins P07 | ||
156 | and P37 are RTS and CTS respectively. */ | ||
157 | if (chan == 1) { | ||
158 | ANNA_PORT_PM(0) &= ~0x80; /* P07 in output mode */ | ||
159 | ANNA_PORT_PM(3) |= 0x80; /* P37 in input mode */ | ||
160 | } | ||
161 | } | ||
162 | |||
163 | /* Minimum and maximum bounds for the moving upper LED boundary in the | ||
164 | clock tick display. We can't use the last bit because it's used for | ||
165 | UART0's CTS output. */ | ||
166 | #define MIN_MAX_POS 0 | ||
167 | #define MAX_MAX_POS 6 | ||
168 | |||
169 | /* There are MAX_MAX_POS^2 - MIN_MAX_POS^2 cycles in the animation, so if | ||
170 | we pick 6 and 0 as above, we get 49 cycles, which is when divided into | ||
171 | the standard 100 value for HZ, gives us an almost 1s total time. */ | ||
172 | #define TICKS_PER_FRAME \ | ||
173 | (HZ / (MAX_MAX_POS * MAX_MAX_POS - MIN_MAX_POS * MIN_MAX_POS)) | ||
174 | |||
175 | static void anna_led_tick () | ||
176 | { | ||
177 | static unsigned counter = 0; | ||
178 | |||
179 | if (++counter == TICKS_PER_FRAME) { | ||
180 | static int pos = 0, max_pos = MAX_MAX_POS, dir = 1; | ||
181 | |||
182 | if (dir > 0 && pos == max_pos) { | ||
183 | dir = -1; | ||
184 | if (max_pos == MIN_MAX_POS) | ||
185 | max_pos = MAX_MAX_POS; | ||
186 | else | ||
187 | max_pos--; | ||
188 | } else { | ||
189 | if (dir < 0 && pos == 0) | ||
190 | dir = 1; | ||
191 | |||
192 | if (pos + dir <= max_pos) { | ||
193 | /* Each bit of port 0 has a LED. */ | ||
194 | clear_bit (pos, &ANNA_PORT_IO(LEDS_PORT)); | ||
195 | pos += dir; | ||
196 | set_bit (pos, &ANNA_PORT_IO(LEDS_PORT)); | ||
197 | } | ||
198 | } | ||
199 | |||
200 | counter = 0; | ||
201 | } | ||
202 | } | ||
diff --git a/arch/v850/kernel/anna.ld b/arch/v850/kernel/anna.ld deleted file mode 100644 index df7f80f2833d..000000000000 --- a/arch/v850/kernel/anna.ld +++ /dev/null | |||
@@ -1,20 +0,0 @@ | |||
1 | /* Linker script for the Midas labs Anna V850E2 evaluation board | ||
2 | (CONFIG_V850E2_ANNA). */ | ||
3 | |||
4 | MEMORY { | ||
5 | /* 256KB of internal memory (followed by one mirror). */ | ||
6 | iMEM0 : ORIGIN = 0, LENGTH = 0x00040000 | ||
7 | /* 256KB of internal memory (followed by one mirror). */ | ||
8 | iMEM1 : ORIGIN = 0x00040000, LENGTH = 0x00040000 | ||
9 | |||
10 | /* 1MB of static RAM. This memory is mirrored 64 times. */ | ||
11 | SRAM : ORIGIN = SRAM_ADDR, LENGTH = SRAM_SIZE | ||
12 | /* 64MB of DRAM. */ | ||
13 | SDRAM : ORIGIN = SDRAM_ADDR, LENGTH = SDRAM_SIZE | ||
14 | } | ||
15 | |||
16 | SECTIONS { | ||
17 | .intv : { INTV_CONTENTS } > iMEM0 | ||
18 | .sram : { RAMK_KRAM_CONTENTS } > SRAM | ||
19 | .root : { ROOT_FS_CONTENTS } > SDRAM | ||
20 | } | ||
diff --git a/arch/v850/kernel/as85ep1-rom.ld b/arch/v850/kernel/as85ep1-rom.ld deleted file mode 100644 index fe2a9a3ab525..000000000000 --- a/arch/v850/kernel/as85ep1-rom.ld +++ /dev/null | |||
@@ -1,21 +0,0 @@ | |||
1 | /* Linker script for the NEC AS85EP1 V850E evaluation board | ||
2 | (CONFIG_V850E_AS85EP1), with kernel in ROM (CONFIG_ROM_KERNEL). */ | ||
3 | |||
4 | MEMORY { | ||
5 | /* 4MB of flash ROM. */ | ||
6 | ROM : ORIGIN = 0, LENGTH = 0x00400000 | ||
7 | |||
8 | /* 1MB of static RAM. */ | ||
9 | SRAM : ORIGIN = SRAM_ADDR, LENGTH = SRAM_SIZE | ||
10 | |||
11 | /* About 58MB of DRAM. This can actually be at one of two | ||
12 | positions, determined by jumper JP3; we have to use the first | ||
13 | position because the second is partially out of processor | ||
14 | instruction addressing range (though in the second position | ||
15 | there's actually 64MB available). */ | ||
16 | SDRAM : ORIGIN = SDRAM_ADDR, LENGTH = SDRAM_SIZE | ||
17 | } | ||
18 | |||
19 | SECTIONS { | ||
20 | ROMK_SECTIONS(ROM, SRAM) | ||
21 | } | ||
diff --git a/arch/v850/kernel/as85ep1.c b/arch/v850/kernel/as85ep1.c deleted file mode 100644 index b525ecf3aea4..000000000000 --- a/arch/v850/kernel/as85ep1.c +++ /dev/null | |||
@@ -1,234 +0,0 @@ | |||
1 | /* | ||
2 | * arch/v850/kernel/as85ep1.c -- AS85EP1 V850E evaluation chip/board | ||
3 | * | ||
4 | * Copyright (C) 2002,03 NEC Electronics Corporation | ||
5 | * Copyright (C) 2002,03 Miles Bader <miles@gnu.org> | ||
6 | * | ||
7 | * This file is subject to the terms and conditions of the GNU General | ||
8 | * Public License. See the file COPYING in the main directory of this | ||
9 | * archive for more details. | ||
10 | * | ||
11 | * Written by Miles Bader <miles@gnu.org> | ||
12 | */ | ||
13 | |||
14 | #include <linux/kernel.h> | ||
15 | #include <linux/module.h> | ||
16 | #include <linux/init.h> | ||
17 | #include <linux/bootmem.h> | ||
18 | #include <linux/major.h> | ||
19 | #include <linux/irq.h> | ||
20 | |||
21 | #include <asm/machdep.h> | ||
22 | #include <asm/atomic.h> | ||
23 | #include <asm/page.h> | ||
24 | #include <asm/v850e_timer_d.h> | ||
25 | #include <asm/v850e_uart.h> | ||
26 | |||
27 | #include "mach.h" | ||
28 | |||
29 | |||
30 | /* SRAM and SDRAM are vaguely contiguous (with a big hole in between; see | ||
31 | mach_reserve_bootmem for details); use both as one big area. */ | ||
32 | #define RAM_START SRAM_ADDR | ||
33 | #define RAM_END (SDRAM_ADDR + SDRAM_SIZE) | ||
34 | |||
35 | /* The bits of this port are connected to an 8-LED bar-graph. */ | ||
36 | #define LEDS_PORT 4 | ||
37 | |||
38 | |||
39 | static void as85ep1_led_tick (void); | ||
40 | |||
41 | extern char _intv_copy_src_start, _intv_copy_src_end; | ||
42 | extern char _intv_copy_dst_start; | ||
43 | |||
44 | |||
45 | void __init mach_early_init (void) | ||
46 | { | ||
47 | #ifndef CONFIG_ROM_KERNEL | ||
48 | const u32 *src; | ||
49 | register u32 *dst asm ("ep"); | ||
50 | #endif | ||
51 | |||
52 | AS85EP1_CSC(0) = 0x0403; | ||
53 | AS85EP1_BCT(0) = 0xB8B8; | ||
54 | AS85EP1_DWC(0) = 0x0104; | ||
55 | AS85EP1_BCC = 0x0012; | ||
56 | AS85EP1_ASC = 0; | ||
57 | AS85EP1_LBS = 0x00A9; | ||
58 | |||
59 | AS85EP1_PORT_PMC(6) = 0xFF; /* valid A0,A1,A20-A25 */ | ||
60 | AS85EP1_PORT_PMC(7) = 0x0E; /* valid CS1-CS3 */ | ||
61 | AS85EP1_PORT_PMC(9) = 0xFF; /* valid D16-D23 */ | ||
62 | AS85EP1_PORT_PMC(10) = 0xFF; /* valid D24-D31 */ | ||
63 | |||
64 | AS85EP1_RFS(1) = 0x800c; | ||
65 | AS85EP1_RFS(3) = 0x800c; | ||
66 | AS85EP1_SCR(1) = 0x20A9; | ||
67 | AS85EP1_SCR(3) = 0x20A9; | ||
68 | |||
69 | #ifndef CONFIG_ROM_KERNEL | ||
70 | /* The early chip we have is buggy, and writing the interrupt | ||
71 | vectors into low RAM may screw up, so for non-ROM kernels, we | ||
72 | only rely on the reset vector being downloaded, and copy the | ||
73 | rest of the interrupt vectors into place here. The specific bug | ||
74 | is that writing address N, where (N & 0x10) == 0x10, will _also_ | ||
75 | write to address (N - 0x10). We avoid this (effectively) by | ||
76 | writing in 16-byte chunks backwards from the end. */ | ||
77 | |||
78 | AS85EP1_IRAMM = 0x3; /* "write-mode" for the internal instruction memory */ | ||
79 | |||
80 | src = (u32 *)(((u32)&_intv_copy_src_end - 1) & ~0xF); | ||
81 | dst = (u32 *)&_intv_copy_dst_start | ||
82 | + (src - (u32 *)&_intv_copy_src_start); | ||
83 | do { | ||
84 | u32 t0 = src[0], t1 = src[1], t2 = src[2], t3 = src[3]; | ||
85 | dst[0] = t0; dst[1] = t1; dst[2] = t2; dst[3] = t3; | ||
86 | dst -= 4; | ||
87 | src -= 4; | ||
88 | } while (src > (u32 *)&_intv_copy_src_start); | ||
89 | |||
90 | AS85EP1_IRAMM = 0x0; /* "read-mode" for the internal instruction memory */ | ||
91 | #endif /* !CONFIG_ROM_KERNEL */ | ||
92 | |||
93 | v850e_intc_disable_irqs (); | ||
94 | } | ||
95 | |||
96 | void __init mach_setup (char **cmdline) | ||
97 | { | ||
98 | AS85EP1_PORT_PMC (LEDS_PORT) = 0; /* Make the LEDs port an I/O port. */ | ||
99 | AS85EP1_PORT_PM (LEDS_PORT) = 0; /* Make all the bits output pins. */ | ||
100 | mach_tick = as85ep1_led_tick; | ||
101 | } | ||
102 | |||
103 | void __init mach_get_physical_ram (unsigned long *ram_start, | ||
104 | unsigned long *ram_len) | ||
105 | { | ||
106 | *ram_start = RAM_START; | ||
107 | *ram_len = RAM_END - RAM_START; | ||
108 | } | ||
109 | |||
110 | /* Convenience macros. */ | ||
111 | #define SRAM_END (SRAM_ADDR + SRAM_SIZE) | ||
112 | #define SDRAM_END (SDRAM_ADDR + SDRAM_SIZE) | ||
113 | |||
114 | void __init mach_reserve_bootmem () | ||
115 | { | ||
116 | if (SDRAM_ADDR < RAM_END && SDRAM_ADDR > RAM_START) | ||
117 | /* We can't use the space between SRAM and SDRAM, so | ||
118 | prevent the kernel from trying. */ | ||
119 | reserve_bootmem(SRAM_END, SDRAM_ADDR - SRAM_END, | ||
120 | BOOTMEM_DEFAULT); | ||
121 | } | ||
122 | |||
123 | void mach_gettimeofday (struct timespec *tv) | ||
124 | { | ||
125 | tv->tv_sec = 0; | ||
126 | tv->tv_nsec = 0; | ||
127 | } | ||
128 | |||
129 | void __init mach_sched_init (struct irqaction *timer_action) | ||
130 | { | ||
131 | /* Start hardware timer. */ | ||
132 | v850e_timer_d_configure (0, HZ); | ||
133 | /* Install timer interrupt handler. */ | ||
134 | setup_irq (IRQ_INTCMD(0), timer_action); | ||
135 | } | ||
136 | |||
137 | static struct v850e_intc_irq_init irq_inits[] = { | ||
138 | { "IRQ", 0, NUM_MACH_IRQS, 1, 7 }, | ||
139 | { "CCC", IRQ_INTCCC(0), IRQ_INTCCC_NUM, 1, 5 }, | ||
140 | { "CMD", IRQ_INTCMD(0), IRQ_INTCMD_NUM, 1, 5 }, | ||
141 | { "SRE", IRQ_INTSRE(0), IRQ_INTSRE_NUM, 3, 3 }, | ||
142 | { "SR", IRQ_INTSR(0), IRQ_INTSR_NUM, 3, 4 }, | ||
143 | { "ST", IRQ_INTST(0), IRQ_INTST_NUM, 3, 5 }, | ||
144 | { 0 } | ||
145 | }; | ||
146 | #define NUM_IRQ_INITS (ARRAY_SIZE(irq_inits) - 1) | ||
147 | |||
148 | static struct hw_interrupt_type hw_itypes[NUM_IRQ_INITS]; | ||
149 | |||
150 | void __init mach_init_irqs (void) | ||
151 | { | ||
152 | v850e_intc_init_irq_types (irq_inits, hw_itypes); | ||
153 | } | ||
154 | |||
155 | void machine_restart (char *__unused) | ||
156 | { | ||
157 | #ifdef CONFIG_RESET_GUARD | ||
158 | disable_reset_guard (); | ||
159 | #endif | ||
160 | asm ("jmp r0"); /* Jump to the reset vector. */ | ||
161 | } | ||
162 | |||
163 | void machine_halt (void) | ||
164 | { | ||
165 | #ifdef CONFIG_RESET_GUARD | ||
166 | disable_reset_guard (); | ||
167 | #endif | ||
168 | local_irq_disable (); /* Ignore all interrupts. */ | ||
169 | AS85EP1_PORT_IO (LEDS_PORT) = 0xAA; /* Note that we halted. */ | ||
170 | for (;;) | ||
171 | asm ("halt; nop; nop; nop; nop; nop"); | ||
172 | } | ||
173 | |||
174 | void machine_power_off (void) | ||
175 | { | ||
176 | machine_halt (); | ||
177 | } | ||
178 | |||
179 | /* Called before configuring an on-chip UART. */ | ||
180 | void as85ep1_uart_pre_configure (unsigned chan, unsigned cflags, unsigned baud) | ||
181 | { | ||
182 | /* Make the shared uart/port pins be uart pins. */ | ||
183 | AS85EP1_PORT_PMC(3) |= (0x5 << chan); | ||
184 | |||
185 | /* The AS85EP1 connects some general-purpose I/O pins on the CPU to | ||
186 | the RTS/CTS lines of UART 1's serial connection. I/O pins P53 | ||
187 | and P54 are RTS and CTS respectively. */ | ||
188 | if (chan == 1) { | ||
189 | /* Put P53 & P54 in I/O port mode. */ | ||
190 | AS85EP1_PORT_PMC(5) &= ~0x18; | ||
191 | /* Make P53 an output, and P54 an input. */ | ||
192 | AS85EP1_PORT_PM(5) |= 0x10; | ||
193 | } | ||
194 | } | ||
195 | |||
196 | /* Minimum and maximum bounds for the moving upper LED boundary in the | ||
197 | clock tick display. */ | ||
198 | #define MIN_MAX_POS 0 | ||
199 | #define MAX_MAX_POS 7 | ||
200 | |||
201 | /* There are MAX_MAX_POS^2 - MIN_MAX_POS^2 cycles in the animation, so if | ||
202 | we pick 6 and 0 as above, we get 49 cycles, which is when divided into | ||
203 | the standard 100 value for HZ, gives us an almost 1s total time. */ | ||
204 | #define TICKS_PER_FRAME \ | ||
205 | (HZ / (MAX_MAX_POS * MAX_MAX_POS - MIN_MAX_POS * MIN_MAX_POS)) | ||
206 | |||
207 | static void as85ep1_led_tick () | ||
208 | { | ||
209 | static unsigned counter = 0; | ||
210 | |||
211 | if (++counter == TICKS_PER_FRAME) { | ||
212 | static int pos = 0, max_pos = MAX_MAX_POS, dir = 1; | ||
213 | |||
214 | if (dir > 0 && pos == max_pos) { | ||
215 | dir = -1; | ||
216 | if (max_pos == MIN_MAX_POS) | ||
217 | max_pos = MAX_MAX_POS; | ||
218 | else | ||
219 | max_pos--; | ||
220 | } else { | ||
221 | if (dir < 0 && pos == 0) | ||
222 | dir = 1; | ||
223 | |||
224 | if (pos + dir <= max_pos) { | ||
225 | /* Each bit of port 0 has a LED. */ | ||
226 | set_bit (pos, &AS85EP1_PORT_IO(LEDS_PORT)); | ||
227 | pos += dir; | ||
228 | clear_bit (pos, &AS85EP1_PORT_IO(LEDS_PORT)); | ||
229 | } | ||
230 | } | ||
231 | |||
232 | counter = 0; | ||
233 | } | ||
234 | } | ||
diff --git a/arch/v850/kernel/as85ep1.ld b/arch/v850/kernel/as85ep1.ld deleted file mode 100644 index ef2c4399063e..000000000000 --- a/arch/v850/kernel/as85ep1.ld +++ /dev/null | |||
@@ -1,49 +0,0 @@ | |||
1 | /* Linker script for the NEC AS85EP1 V850E evaluation board | ||
2 | (CONFIG_V850E_AS85EP1). */ | ||
3 | |||
4 | MEMORY { | ||
5 | /* 1MB of internal instruction memory. */ | ||
6 | iMEM0 : ORIGIN = 0, LENGTH = 0x00100000 | ||
7 | |||
8 | /* 1MB of static RAM. */ | ||
9 | SRAM : ORIGIN = SRAM_ADDR, LENGTH = SRAM_SIZE | ||
10 | |||
11 | /* About 58MB of DRAM. This can actually be at one of two | ||
12 | positions, determined by jump JP3; we have to use the first | ||
13 | position because the second is partially out of processor | ||
14 | instruction addressing range (though in the second position | ||
15 | there's actually 64MB available). */ | ||
16 | SDRAM : ORIGIN = SDRAM_ADDR, LENGTH = SDRAM_SIZE | ||
17 | } | ||
18 | |||
19 | SECTIONS { | ||
20 | .resetv : { | ||
21 | __intv_start = . ; | ||
22 | *(.intv.reset) /* Reset vector */ | ||
23 | } > iMEM0 | ||
24 | |||
25 | .sram : { | ||
26 | RAMK_KRAM_CONTENTS | ||
27 | |||
28 | /* We stick most of the interrupt vectors here; they'll be | ||
29 | copied into the proper location by the early init code (we | ||
30 | can't put them directly in the right place because of | ||
31 | hardware bugs). The vectors shouldn't need to be | ||
32 | relocated, so we don't have to use `> ... AT> ...' to | ||
33 | split the load/vm addresses (and we can't because of | ||
34 | problems with the loader). */ | ||
35 | . = ALIGN (0x10) ; | ||
36 | __intv_copy_src_start = . ; | ||
37 | *(.intv.common) /* Vectors common to all v850e proc. */ | ||
38 | *(.intv.mach) /* Machine-specific int. vectors. */ | ||
39 | . = ALIGN (0x10) ; | ||
40 | __intv_copy_src_end = . ; | ||
41 | } > SRAM | ||
42 | |||
43 | /* Where we end up putting the vectors. */ | ||
44 | __intv_copy_dst_start = 0x10 ; | ||
45 | __intv_copy_dst_end = __intv_copy_dst_start + (__intv_copy_src_end - __intv_copy_src_start) ; | ||
46 | __intv_end = __intv_copy_dst_end ; | ||
47 | |||
48 | .root : { ROOT_FS_CONTENTS } > SDRAM | ||
49 | } | ||
diff --git a/arch/v850/kernel/asm-offsets.c b/arch/v850/kernel/asm-offsets.c deleted file mode 100644 index 581e6986a776..000000000000 --- a/arch/v850/kernel/asm-offsets.c +++ /dev/null | |||
@@ -1,58 +0,0 @@ | |||
1 | /* | ||
2 | * This program is used to generate definitions needed by | ||
3 | * assembly language modules. | ||
4 | * | ||
5 | * We use the technique used in the OSF Mach kernel code: | ||
6 | * generate asm statements containing #defines, | ||
7 | * compile this file to assembler, and then extract the | ||
8 | * #defines from the assembly-language output. | ||
9 | */ | ||
10 | |||
11 | #include <linux/stddef.h> | ||
12 | #include <linux/sched.h> | ||
13 | #include <linux/kernel_stat.h> | ||
14 | #include <linux/ptrace.h> | ||
15 | #include <linux/hardirq.h> | ||
16 | #include <linux/kbuild.h> | ||
17 | |||
18 | #include <asm/irq.h> | ||
19 | #include <asm/errno.h> | ||
20 | |||
21 | int main (void) | ||
22 | { | ||
23 | /* offsets into the task struct */ | ||
24 | DEFINE (TASK_STATE, offsetof (struct task_struct, state)); | ||
25 | DEFINE (TASK_FLAGS, offsetof (struct task_struct, flags)); | ||
26 | DEFINE (TASK_PTRACE, offsetof (struct task_struct, ptrace)); | ||
27 | DEFINE (TASK_BLOCKED, offsetof (struct task_struct, blocked)); | ||
28 | DEFINE (TASK_THREAD, offsetof (struct task_struct, thread)); | ||
29 | DEFINE (TASK_THREAD_INFO, offsetof (struct task_struct, stack)); | ||
30 | DEFINE (TASK_MM, offsetof (struct task_struct, mm)); | ||
31 | DEFINE (TASK_ACTIVE_MM, offsetof (struct task_struct, active_mm)); | ||
32 | DEFINE (TASK_PID, offsetof (struct task_struct, pid)); | ||
33 | |||
34 | /* offsets into the kernel_stat struct */ | ||
35 | DEFINE (STAT_IRQ, offsetof (struct kernel_stat, irqs)); | ||
36 | |||
37 | |||
38 | /* signal defines */ | ||
39 | DEFINE (SIGSEGV, SIGSEGV); | ||
40 | DEFINE (SEGV_MAPERR, SEGV_MAPERR); | ||
41 | DEFINE (SIGTRAP, SIGTRAP); | ||
42 | DEFINE (SIGCHLD, SIGCHLD); | ||
43 | DEFINE (SIGILL, SIGILL); | ||
44 | DEFINE (TRAP_TRACE, TRAP_TRACE); | ||
45 | |||
46 | /* ptrace flag bits */ | ||
47 | DEFINE (PT_PTRACED, PT_PTRACED); | ||
48 | DEFINE (PT_DTRACE, PT_DTRACE); | ||
49 | |||
50 | /* error values */ | ||
51 | DEFINE (ENOSYS, ENOSYS); | ||
52 | |||
53 | /* clone flag bits */ | ||
54 | DEFINE (CLONE_VFORK, CLONE_VFORK); | ||
55 | DEFINE (CLONE_VM, CLONE_VM); | ||
56 | |||
57 | return 0; | ||
58 | } | ||
diff --git a/arch/v850/kernel/bug.c b/arch/v850/kernel/bug.c deleted file mode 100644 index c78cf750915a..000000000000 --- a/arch/v850/kernel/bug.c +++ /dev/null | |||
@@ -1,142 +0,0 @@ | |||
1 | /* | ||
2 | * arch/v850/kernel/bug.c -- Bug reporting functions | ||
3 | * | ||
4 | * Copyright (C) 2001,02,03 NEC Electronics Corporation | ||
5 | * Copyright (C) 2001,02,03 Miles Bader <miles@gnu.org> | ||
6 | * | ||
7 | * This file is subject to the terms and conditions of the GNU General | ||
8 | * Public License. See the file COPYING in the main directory of this | ||
9 | * archive for more details. | ||
10 | * | ||
11 | * Written by Miles Bader <miles@gnu.org> | ||
12 | */ | ||
13 | |||
14 | #include <linux/kernel.h> | ||
15 | #include <linux/reboot.h> | ||
16 | #include <linux/sched.h> | ||
17 | #include <linux/module.h> | ||
18 | |||
19 | #include <asm/errno.h> | ||
20 | #include <asm/ptrace.h> | ||
21 | #include <asm/processor.h> | ||
22 | #include <asm/current.h> | ||
23 | |||
24 | /* We should use __builtin_return_address, but it doesn't work in gcc-2.90 | ||
25 | (which is currently our standard compiler on the v850). */ | ||
26 | #define ret_addr() ({ register u32 lp asm ("lp"); lp; }) | ||
27 | #define stack_addr() ({ register u32 sp asm ("sp"); sp; }) | ||
28 | |||
29 | void __bug () | ||
30 | { | ||
31 | printk (KERN_CRIT "kernel BUG at PC 0x%x (SP ~0x%x)!\n", | ||
32 | ret_addr() - 4, /* - 4 for `jarl' */ | ||
33 | stack_addr()); | ||
34 | machine_halt (); | ||
35 | } | ||
36 | |||
37 | int bad_trap (int trap_num, struct pt_regs *regs) | ||
38 | { | ||
39 | printk (KERN_CRIT | ||
40 | "unimplemented trap %d called at 0x%08lx, pid %d!\n", | ||
41 | trap_num, regs->pc, current->pid); | ||
42 | return -ENOSYS; | ||
43 | } | ||
44 | |||
45 | #ifdef CONFIG_RESET_GUARD | ||
46 | void unexpected_reset (unsigned long ret_addr, unsigned long kmode, | ||
47 | struct task_struct *task, unsigned long sp) | ||
48 | { | ||
49 | printk (KERN_CRIT | ||
50 | "unexpected reset in %s mode, pid %d" | ||
51 | " (ret_addr = 0x%lx, sp = 0x%lx)\n", | ||
52 | kmode ? "kernel" : "user", | ||
53 | task ? task->pid : -1, | ||
54 | ret_addr, sp); | ||
55 | |||
56 | machine_halt (); | ||
57 | } | ||
58 | #endif /* CONFIG_RESET_GUARD */ | ||
59 | |||
60 | |||
61 | |||
62 | struct spec_reg_name { | ||
63 | const char *name; | ||
64 | int gpr; | ||
65 | }; | ||
66 | |||
67 | struct spec_reg_name spec_reg_names[] = { | ||
68 | { "sp", GPR_SP }, | ||
69 | { "gp", GPR_GP }, | ||
70 | { "tp", GPR_TP }, | ||
71 | { "ep", GPR_EP }, | ||
72 | { "lp", GPR_LP }, | ||
73 | { 0, 0 } | ||
74 | }; | ||
75 | |||
76 | void show_regs (struct pt_regs *regs) | ||
77 | { | ||
78 | int gpr_base, gpr_offs; | ||
79 | |||
80 | printk (" pc 0x%08lx psw 0x%08lx kernel_mode %d\n", | ||
81 | regs->pc, regs->psw, regs->kernel_mode); | ||
82 | printk (" ctpc 0x%08lx ctpsw 0x%08lx ctbp 0x%08lx\n", | ||
83 | regs->ctpc, regs->ctpsw, regs->ctbp); | ||
84 | |||
85 | for (gpr_base = 0; gpr_base < NUM_GPRS; gpr_base += 4) { | ||
86 | for (gpr_offs = 0; gpr_offs < 4; gpr_offs++) { | ||
87 | int gpr = gpr_base + gpr_offs; | ||
88 | long val = regs->gpr[gpr]; | ||
89 | struct spec_reg_name *srn; | ||
90 | |||
91 | for (srn = spec_reg_names; srn->name; srn++) | ||
92 | if (srn->gpr == gpr) | ||
93 | break; | ||
94 | |||
95 | if (srn->name) | ||
96 | printk ("%7s 0x%08lx", srn->name, val); | ||
97 | else | ||
98 | printk (" r%02d 0x%08lx", gpr, val); | ||
99 | } | ||
100 | |||
101 | printk ("\n"); | ||
102 | } | ||
103 | } | ||
104 | |||
105 | /* | ||
106 | * TASK is a pointer to the task whose backtrace we want to see (or NULL | ||
107 | * for current task), SP is the stack pointer of the first frame that | ||
108 | * should be shown in the back trace (or NULL if the entire call-chain of | ||
109 | * the task should be shown). | ||
110 | */ | ||
111 | void show_stack (struct task_struct *task, unsigned long *sp) | ||
112 | { | ||
113 | unsigned long addr, end; | ||
114 | |||
115 | if (sp) | ||
116 | addr = (unsigned long)sp; | ||
117 | else if (task) | ||
118 | addr = task_sp (task); | ||
119 | else | ||
120 | addr = stack_addr (); | ||
121 | |||
122 | addr = addr & ~3; | ||
123 | end = (addr + THREAD_SIZE - 1) & THREAD_MASK; | ||
124 | |||
125 | while (addr < end) { | ||
126 | printk ("%8lX: ", addr); | ||
127 | while (addr < end) { | ||
128 | printk (" %8lX", *(unsigned long *)addr); | ||
129 | addr += sizeof (unsigned long); | ||
130 | if (! (addr & 0xF)) | ||
131 | break; | ||
132 | } | ||
133 | printk ("\n"); | ||
134 | } | ||
135 | } | ||
136 | |||
137 | void dump_stack () | ||
138 | { | ||
139 | show_stack (0, 0); | ||
140 | } | ||
141 | |||
142 | EXPORT_SYMBOL(dump_stack); | ||
diff --git a/arch/v850/kernel/entry.S b/arch/v850/kernel/entry.S deleted file mode 100644 index e4327a8d6bcd..000000000000 --- a/arch/v850/kernel/entry.S +++ /dev/null | |||
@@ -1,1121 +0,0 @@ | |||
1 | /* | ||
2 | * arch/v850/kernel/entry.S -- Low-level system-call handling, trap handlers, | ||
3 | * and context-switching | ||
4 | * | ||
5 | * Copyright (C) 2001,02,03 NEC Electronics Corporation | ||
6 | * Copyright (C) 2001,02,03 Miles Bader <miles@gnu.org> | ||
7 | * | ||
8 | * This file is subject to the terms and conditions of the GNU General | ||
9 | * Public License. See the file COPYING in the main directory of this | ||
10 | * archive for more details. | ||
11 | * | ||
12 | * Written by Miles Bader <miles@gnu.org> | ||
13 | */ | ||
14 | |||
15 | #include <linux/sys.h> | ||
16 | |||
17 | #include <asm/entry.h> | ||
18 | #include <asm/current.h> | ||
19 | #include <asm/thread_info.h> | ||
20 | #include <asm/clinkage.h> | ||
21 | #include <asm/processor.h> | ||
22 | #include <asm/irq.h> | ||
23 | #include <asm/errno.h> | ||
24 | |||
25 | #include <asm/asm-offsets.h> | ||
26 | |||
27 | |||
28 | /* Make a slightly more convenient alias for C_SYMBOL_NAME. */ | ||
29 | #define CSYM C_SYMBOL_NAME | ||
30 | |||
31 | |||
32 | /* The offset of the struct pt_regs in a state-save-frame on the stack. */ | ||
33 | #define PTO STATE_SAVE_PT_OFFSET | ||
34 | |||
35 | |||
36 | /* Save argument registers to the state-save-frame pointed to by EP. */ | ||
37 | #define SAVE_ARG_REGS \ | ||
38 | sst.w r6, PTO+PT_GPR(6)[ep]; \ | ||
39 | sst.w r7, PTO+PT_GPR(7)[ep]; \ | ||
40 | sst.w r8, PTO+PT_GPR(8)[ep]; \ | ||
41 | sst.w r9, PTO+PT_GPR(9)[ep] | ||
42 | /* Restore argument registers from the state-save-frame pointed to by EP. */ | ||
43 | #define RESTORE_ARG_REGS \ | ||
44 | sld.w PTO+PT_GPR(6)[ep], r6; \ | ||
45 | sld.w PTO+PT_GPR(7)[ep], r7; \ | ||
46 | sld.w PTO+PT_GPR(8)[ep], r8; \ | ||
47 | sld.w PTO+PT_GPR(9)[ep], r9 | ||
48 | |||
49 | /* Save value return registers to the state-save-frame pointed to by EP. */ | ||
50 | #define SAVE_RVAL_REGS \ | ||
51 | sst.w r10, PTO+PT_GPR(10)[ep]; \ | ||
52 | sst.w r11, PTO+PT_GPR(11)[ep] | ||
53 | /* Restore value return registers from the state-save-frame pointed to by EP. */ | ||
54 | #define RESTORE_RVAL_REGS \ | ||
55 | sld.w PTO+PT_GPR(10)[ep], r10; \ | ||
56 | sld.w PTO+PT_GPR(11)[ep], r11 | ||
57 | |||
58 | |||
59 | #define SAVE_CALL_CLOBBERED_REGS_BEFORE_ARGS \ | ||
60 | sst.w r1, PTO+PT_GPR(1)[ep]; \ | ||
61 | sst.w r5, PTO+PT_GPR(5)[ep] | ||
62 | #define SAVE_CALL_CLOBBERED_REGS_AFTER_RVAL \ | ||
63 | sst.w r12, PTO+PT_GPR(12)[ep]; \ | ||
64 | sst.w r13, PTO+PT_GPR(13)[ep]; \ | ||
65 | sst.w r14, PTO+PT_GPR(14)[ep]; \ | ||
66 | sst.w r15, PTO+PT_GPR(15)[ep]; \ | ||
67 | sst.w r16, PTO+PT_GPR(16)[ep]; \ | ||
68 | sst.w r17, PTO+PT_GPR(17)[ep]; \ | ||
69 | sst.w r18, PTO+PT_GPR(18)[ep]; \ | ||
70 | sst.w r19, PTO+PT_GPR(19)[ep] | ||
71 | #define RESTORE_CALL_CLOBBERED_REGS_BEFORE_ARGS \ | ||
72 | sld.w PTO+PT_GPR(1)[ep], r1; \ | ||
73 | sld.w PTO+PT_GPR(5)[ep], r5 | ||
74 | #define RESTORE_CALL_CLOBBERED_REGS_AFTER_RVAL \ | ||
75 | sld.w PTO+PT_GPR(12)[ep], r12; \ | ||
76 | sld.w PTO+PT_GPR(13)[ep], r13; \ | ||
77 | sld.w PTO+PT_GPR(14)[ep], r14; \ | ||
78 | sld.w PTO+PT_GPR(15)[ep], r15; \ | ||
79 | sld.w PTO+PT_GPR(16)[ep], r16; \ | ||
80 | sld.w PTO+PT_GPR(17)[ep], r17; \ | ||
81 | sld.w PTO+PT_GPR(18)[ep], r18; \ | ||
82 | sld.w PTO+PT_GPR(19)[ep], r19 | ||
83 | |||
84 | /* Save `call clobbered' registers to the state-save-frame pointed to by EP. */ | ||
85 | #define SAVE_CALL_CLOBBERED_REGS \ | ||
86 | SAVE_CALL_CLOBBERED_REGS_BEFORE_ARGS; \ | ||
87 | SAVE_ARG_REGS; \ | ||
88 | SAVE_RVAL_REGS; \ | ||
89 | SAVE_CALL_CLOBBERED_REGS_AFTER_RVAL | ||
90 | /* Restore `call clobbered' registers from the state-save-frame pointed to | ||
91 | by EP. */ | ||
92 | #define RESTORE_CALL_CLOBBERED_REGS \ | ||
93 | RESTORE_CALL_CLOBBERED_REGS_BEFORE_ARGS; \ | ||
94 | RESTORE_ARG_REGS; \ | ||
95 | RESTORE_RVAL_REGS; \ | ||
96 | RESTORE_CALL_CLOBBERED_REGS_AFTER_RVAL | ||
97 | |||
98 | /* Save `call clobbered' registers except for the return-value registers | ||
99 | to the state-save-frame pointed to by EP. */ | ||
100 | #define SAVE_CALL_CLOBBERED_REGS_NO_RVAL \ | ||
101 | SAVE_CALL_CLOBBERED_REGS_BEFORE_ARGS; \ | ||
102 | SAVE_ARG_REGS; \ | ||
103 | SAVE_CALL_CLOBBERED_REGS_AFTER_RVAL | ||
104 | /* Restore `call clobbered' registers except for the return-value registers | ||
105 | from the state-save-frame pointed to by EP. */ | ||
106 | #define RESTORE_CALL_CLOBBERED_REGS_NO_RVAL \ | ||
107 | RESTORE_CALL_CLOBBERED_REGS_BEFORE_ARGS; \ | ||
108 | RESTORE_ARG_REGS; \ | ||
109 | RESTORE_CALL_CLOBBERED_REGS_AFTER_RVAL | ||
110 | |||
111 | /* Save `call saved' registers to the state-save-frame pointed to by EP. */ | ||
112 | #define SAVE_CALL_SAVED_REGS \ | ||
113 | sst.w r2, PTO+PT_GPR(2)[ep]; \ | ||
114 | sst.w r20, PTO+PT_GPR(20)[ep]; \ | ||
115 | sst.w r21, PTO+PT_GPR(21)[ep]; \ | ||
116 | sst.w r22, PTO+PT_GPR(22)[ep]; \ | ||
117 | sst.w r23, PTO+PT_GPR(23)[ep]; \ | ||
118 | sst.w r24, PTO+PT_GPR(24)[ep]; \ | ||
119 | sst.w r25, PTO+PT_GPR(25)[ep]; \ | ||
120 | sst.w r26, PTO+PT_GPR(26)[ep]; \ | ||
121 | sst.w r27, PTO+PT_GPR(27)[ep]; \ | ||
122 | sst.w r28, PTO+PT_GPR(28)[ep]; \ | ||
123 | sst.w r29, PTO+PT_GPR(29)[ep] | ||
124 | /* Restore `call saved' registers from the state-save-frame pointed to by EP. */ | ||
125 | #define RESTORE_CALL_SAVED_REGS \ | ||
126 | sld.w PTO+PT_GPR(2)[ep], r2; \ | ||
127 | sld.w PTO+PT_GPR(20)[ep], r20; \ | ||
128 | sld.w PTO+PT_GPR(21)[ep], r21; \ | ||
129 | sld.w PTO+PT_GPR(22)[ep], r22; \ | ||
130 | sld.w PTO+PT_GPR(23)[ep], r23; \ | ||
131 | sld.w PTO+PT_GPR(24)[ep], r24; \ | ||
132 | sld.w PTO+PT_GPR(25)[ep], r25; \ | ||
133 | sld.w PTO+PT_GPR(26)[ep], r26; \ | ||
134 | sld.w PTO+PT_GPR(27)[ep], r27; \ | ||
135 | sld.w PTO+PT_GPR(28)[ep], r28; \ | ||
136 | sld.w PTO+PT_GPR(29)[ep], r29 | ||
137 | |||
138 | |||
139 | /* Save the PC stored in the special register SAVEREG to the state-save-frame | ||
140 | pointed to by EP. r19 is clobbered. */ | ||
141 | #define SAVE_PC(savereg) \ | ||
142 | stsr SR_ ## savereg, r19; \ | ||
143 | sst.w r19, PTO+PT_PC[ep] | ||
144 | /* Restore the PC from the state-save-frame pointed to by EP, to the special | ||
145 | register SAVEREG. LP is clobbered (it is used as a scratch register | ||
146 | because the POP_STATE macro restores it, and this macro is usually used | ||
147 | inside POP_STATE). */ | ||
148 | #define RESTORE_PC(savereg) \ | ||
149 | sld.w PTO+PT_PC[ep], lp; \ | ||
150 | ldsr lp, SR_ ## savereg | ||
151 | /* Save the PSW register stored in the special register SAVREG to the | ||
152 | state-save-frame pointed to by EP. r19 is clobbered. */ | ||
153 | #define SAVE_PSW(savereg) \ | ||
154 | stsr SR_ ## savereg, r19; \ | ||
155 | sst.w r19, PTO+PT_PSW[ep] | ||
156 | /* Restore the PSW register from the state-save-frame pointed to by EP, to | ||
157 | the special register SAVEREG. LP is clobbered (it is used as a scratch | ||
158 | register because the POP_STATE macro restores it, and this macro is | ||
159 | usually used inside POP_STATE). */ | ||
160 | #define RESTORE_PSW(savereg) \ | ||
161 | sld.w PTO+PT_PSW[ep], lp; \ | ||
162 | ldsr lp, SR_ ## savereg | ||
163 | |||
164 | /* Save CTPC/CTPSW/CTBP registers to the state-save-frame pointed to by REG. | ||
165 | r19 is clobbered. */ | ||
166 | #define SAVE_CT_REGS \ | ||
167 | stsr SR_CTPC, r19; \ | ||
168 | sst.w r19, PTO+PT_CTPC[ep]; \ | ||
169 | stsr SR_CTPSW, r19; \ | ||
170 | sst.w r19, PTO+PT_CTPSW[ep]; \ | ||
171 | stsr SR_CTBP, r19; \ | ||
172 | sst.w r19, PTO+PT_CTBP[ep] | ||
173 | /* Restore CTPC/CTPSW/CTBP registers from the state-save-frame pointed to by EP. | ||
174 | LP is clobbered (it is used as a scratch register because the POP_STATE | ||
175 | macro restores it, and this macro is usually used inside POP_STATE). */ | ||
176 | #define RESTORE_CT_REGS \ | ||
177 | sld.w PTO+PT_CTPC[ep], lp; \ | ||
178 | ldsr lp, SR_CTPC; \ | ||
179 | sld.w PTO+PT_CTPSW[ep], lp; \ | ||
180 | ldsr lp, SR_CTPSW; \ | ||
181 | sld.w PTO+PT_CTBP[ep], lp; \ | ||
182 | ldsr lp, SR_CTBP | ||
183 | |||
184 | |||
185 | /* Push register state, except for the stack pointer, on the stack in the | ||
186 | form of a state-save-frame (plus some extra padding), in preparation for | ||
187 | a system call. This macro makes sure that the EP, GP, and LP | ||
188 | registers are saved, and TYPE identifies the set of extra registers to | ||
189 | be saved as well. Also copies (the new value of) SP to EP. */ | ||
190 | #define PUSH_STATE(type) \ | ||
191 | addi -STATE_SAVE_SIZE, sp, sp; /* Make room on the stack. */ \ | ||
192 | st.w ep, PTO+PT_GPR(GPR_EP)[sp]; \ | ||
193 | mov sp, ep; \ | ||
194 | sst.w gp, PTO+PT_GPR(GPR_GP)[ep]; \ | ||
195 | sst.w lp, PTO+PT_GPR(GPR_LP)[ep]; \ | ||
196 | type ## _STATE_SAVER | ||
197 | /* Pop a register state pushed by PUSH_STATE, except for the stack pointer, | ||
198 | from the stack. */ | ||
199 | #define POP_STATE(type) \ | ||
200 | mov sp, ep; \ | ||
201 | type ## _STATE_RESTORER; \ | ||
202 | sld.w PTO+PT_GPR(GPR_GP)[ep], gp; \ | ||
203 | sld.w PTO+PT_GPR(GPR_LP)[ep], lp; \ | ||
204 | sld.w PTO+PT_GPR(GPR_EP)[ep], ep; \ | ||
205 | addi STATE_SAVE_SIZE, sp, sp /* Clean up our stack space. */ | ||
206 | |||
207 | |||
208 | /* Switch to the kernel stack if necessary, and push register state on the | ||
209 | stack in the form of a state-save-frame. Also load the current task | ||
210 | pointer if switching from user mode. The stack-pointer (r3) should have | ||
211 | already been saved to the memory location SP_SAVE_LOC (the reason for | ||
212 | this is that the interrupt vectors may be beyond a 22-bit signed offset | ||
213 | jump from the actual interrupt handler, and this allows them to save the | ||
214 | stack-pointer and use that register to do an indirect jump). This macro | ||
215 | makes sure that `special' registers, system registers, and the stack | ||
216 | pointer are saved; TYPE identifies the set of extra registers to be | ||
217 | saved as well. SYSCALL_NUM is the register in which the system-call | ||
218 | number this state is for is stored (r0 if this isn't a system call). | ||
219 | Interrupts should already be disabled when calling this. */ | ||
220 | #define SAVE_STATE(type, syscall_num, sp_save_loc) \ | ||
221 | tst1 0, KM; /* See if already in kernel mode. */ \ | ||
222 | bz 1f; \ | ||
223 | ld.w sp_save_loc, sp; /* ... yes, use saved SP. */ \ | ||
224 | br 2f; \ | ||
225 | 1: ld.w KSP, sp; /* ... no, switch to kernel stack. */ \ | ||
226 | 2: PUSH_STATE(type); \ | ||
227 | ld.b KM, r19; /* Remember old kernel-mode. */ \ | ||
228 | sst.w r19, PTO+PT_KERNEL_MODE[ep]; \ | ||
229 | ld.w sp_save_loc, r19; /* Remember old SP. */ \ | ||
230 | sst.w r19, PTO+PT_GPR(GPR_SP)[ep]; \ | ||
231 | mov 1, r19; /* Now definitely in kernel-mode. */ \ | ||
232 | st.b r19, KM; \ | ||
233 | GET_CURRENT_TASK(CURRENT_TASK); /* Fetch the current task pointer. */ \ | ||
234 | /* Save away the syscall number. */ \ | ||
235 | sst.w syscall_num, PTO+PT_CUR_SYSCALL[ep] | ||
236 | |||
237 | |||
238 | /* Save register state not normally saved by PUSH_STATE for TYPE, to the | ||
239 | state-save-frame on the stack; also copies SP to EP. r19 may be trashed. */ | ||
240 | #define SAVE_EXTRA_STATE(type) \ | ||
241 | mov sp, ep; \ | ||
242 | type ## _EXTRA_STATE_SAVER | ||
243 | /* Restore register state not normally restored by POP_STATE for TYPE, | ||
244 | from the state-save-frame on the stack; also copies SP to EP. | ||
245 | r19 may be trashed. */ | ||
246 | #define RESTORE_EXTRA_STATE(type) \ | ||
247 | mov sp, ep; \ | ||
248 | type ## _EXTRA_STATE_RESTORER | ||
249 | |||
250 | /* Save any call-clobbered registers not normally saved by PUSH_STATE for | ||
251 | TYPE, to the state-save-frame on the stack. | ||
252 | EP may be trashed, but is not guaranteed to contain a copy of SP | ||
253 | (unlike after most SAVE_... macros). r19 may be trashed. */ | ||
254 | #define SAVE_EXTRA_STATE_FOR_SCHEDULE(type) \ | ||
255 | type ## _SCHEDULE_EXTRA_STATE_SAVER | ||
256 | /* Restore any call-clobbered registers not normally restored by | ||
257 | POP_STATE for TYPE, to the state-save-frame on the stack. | ||
258 | EP may be trashed, but is not guaranteed to contain a copy of SP | ||
259 | (unlike after most RESTORE_... macros). r19 may be trashed. */ | ||
260 | #define RESTORE_EXTRA_STATE_FOR_SCHEDULE(type) \ | ||
261 | type ## _SCHEDULE_EXTRA_STATE_RESTORER | ||
262 | |||
263 | |||
264 | /* These are extra_state_saver/restorer values for a user trap. Note | ||
265 | that we save the argument registers so that restarted syscalls will | ||
266 | function properly (otherwise it wouldn't be necessary), and we must | ||
267 | _not_ restore the return-value registers (so that traps can return a | ||
268 | value!), but call-clobbered registers are not saved at all, as the | ||
269 | caller of the syscall function should have saved them. */ | ||
270 | |||
271 | #define TRAP_RET reti | ||
272 | /* Traps don't save call-clobbered registers (but do still save arg regs). | ||
273 | We preserve PSw to keep long-term state, namely interrupt status (for traps | ||
274 | from kernel-mode), and the single-step flag (for user traps). */ | ||
275 | #define TRAP_STATE_SAVER \ | ||
276 | SAVE_ARG_REGS; \ | ||
277 | SAVE_PC(EIPC); \ | ||
278 | SAVE_PSW(EIPSW) | ||
279 | /* When traps return, they just leave call-clobbered registers (except for arg | ||
280 | regs) with whatever value they have from the kernel. Traps don't preserve | ||
281 | the PSW, but we zero EIPSW to ensure it doesn't contain anything dangerous | ||
282 | (in particular, the single-step flag). */ | ||
283 | #define TRAP_STATE_RESTORER \ | ||
284 | RESTORE_ARG_REGS; \ | ||
285 | RESTORE_PC(EIPC); \ | ||
286 | RESTORE_PSW(EIPSW) | ||
287 | /* Save registers not normally saved by traps. We need to save r12, even | ||
288 | though it's nominally call-clobbered, because it's used when restarting | ||
289 | a system call (the signal-handling path uses SAVE_EXTRA_STATE, and | ||
290 | expects r12 to be restored when the trap returns). */ | ||
291 | #define TRAP_EXTRA_STATE_SAVER \ | ||
292 | SAVE_RVAL_REGS; \ | ||
293 | sst.w r12, PTO+PT_GPR(12)[ep]; \ | ||
294 | SAVE_CALL_SAVED_REGS; \ | ||
295 | SAVE_CT_REGS | ||
296 | #define TRAP_EXTRA_STATE_RESTORER \ | ||
297 | RESTORE_RVAL_REGS; \ | ||
298 | sld.w PTO+PT_GPR(12)[ep], r12; \ | ||
299 | RESTORE_CALL_SAVED_REGS; \ | ||
300 | RESTORE_CT_REGS | ||
301 | /* Save registers prior to calling scheduler (just before trap returns). | ||
302 | We have to save the return-value registers to preserve the trap's return | ||
303 | value. Note that ..._SCHEDULE_EXTRA_STATE_SAVER, unlike most ..._SAVER | ||
304 | macros, is required to setup EP itself if EP is needed (this is because | ||
305 | in many cases, the macro is empty). */ | ||
306 | #define TRAP_SCHEDULE_EXTRA_STATE_SAVER \ | ||
307 | mov sp, ep; \ | ||
308 | SAVE_RVAL_REGS | ||
309 | /* Note that ..._SCHEDULE_EXTRA_STATE_RESTORER, unlike most ..._RESTORER | ||
310 | macros, is required to setup EP itself if EP is needed (this is because | ||
311 | in many cases, the macro is empty). */ | ||
312 | #define TRAP_SCHEDULE_EXTRA_STATE_RESTORER \ | ||
313 | mov sp, ep; \ | ||
314 | RESTORE_RVAL_REGS | ||
315 | |||
316 | /* Register saving/restoring for maskable interrupts. */ | ||
317 | #define IRQ_RET reti | ||
318 | #define IRQ_STATE_SAVER \ | ||
319 | SAVE_CALL_CLOBBERED_REGS; \ | ||
320 | SAVE_PC(EIPC); \ | ||
321 | SAVE_PSW(EIPSW) | ||
322 | #define IRQ_STATE_RESTORER \ | ||
323 | RESTORE_CALL_CLOBBERED_REGS; \ | ||
324 | RESTORE_PC(EIPC); \ | ||
325 | RESTORE_PSW(EIPSW) | ||
326 | #define IRQ_EXTRA_STATE_SAVER \ | ||
327 | SAVE_CALL_SAVED_REGS; \ | ||
328 | SAVE_CT_REGS | ||
329 | #define IRQ_EXTRA_STATE_RESTORER \ | ||
330 | RESTORE_CALL_SAVED_REGS; \ | ||
331 | RESTORE_CT_REGS | ||
332 | #define IRQ_SCHEDULE_EXTRA_STATE_SAVER /* nothing */ | ||
333 | #define IRQ_SCHEDULE_EXTRA_STATE_RESTORER /* nothing */ | ||
334 | |||
335 | /* Register saving/restoring for non-maskable interrupts. */ | ||
336 | #define NMI_RET reti | ||
337 | #define NMI_STATE_SAVER \ | ||
338 | SAVE_CALL_CLOBBERED_REGS; \ | ||
339 | SAVE_PC(FEPC); \ | ||
340 | SAVE_PSW(FEPSW); | ||
341 | #define NMI_STATE_RESTORER \ | ||
342 | RESTORE_CALL_CLOBBERED_REGS; \ | ||
343 | RESTORE_PC(FEPC); \ | ||
344 | RESTORE_PSW(FEPSW); | ||
345 | #define NMI_EXTRA_STATE_SAVER \ | ||
346 | SAVE_CALL_SAVED_REGS; \ | ||
347 | SAVE_CT_REGS | ||
348 | #define NMI_EXTRA_STATE_RESTORER \ | ||
349 | RESTORE_CALL_SAVED_REGS; \ | ||
350 | RESTORE_CT_REGS | ||
351 | #define NMI_SCHEDULE_EXTRA_STATE_SAVER /* nothing */ | ||
352 | #define NMI_SCHEDULE_EXTRA_STATE_RESTORER /* nothing */ | ||
353 | |||
354 | /* Register saving/restoring for debug traps. */ | ||
355 | #define DBTRAP_RET .long 0x014607E0 /* `dbret', but gas doesn't support it. */ | ||
356 | #define DBTRAP_STATE_SAVER \ | ||
357 | SAVE_CALL_CLOBBERED_REGS; \ | ||
358 | SAVE_PC(DBPC); \ | ||
359 | SAVE_PSW(DBPSW) | ||
360 | #define DBTRAP_STATE_RESTORER \ | ||
361 | RESTORE_CALL_CLOBBERED_REGS; \ | ||
362 | RESTORE_PC(DBPC); \ | ||
363 | RESTORE_PSW(DBPSW) | ||
364 | #define DBTRAP_EXTRA_STATE_SAVER \ | ||
365 | SAVE_CALL_SAVED_REGS; \ | ||
366 | SAVE_CT_REGS | ||
367 | #define DBTRAP_EXTRA_STATE_RESTORER \ | ||
368 | RESTORE_CALL_SAVED_REGS; \ | ||
369 | RESTORE_CT_REGS | ||
370 | #define DBTRAP_SCHEDULE_EXTRA_STATE_SAVER /* nothing */ | ||
371 | #define DBTRAP_SCHEDULE_EXTRA_STATE_RESTORER /* nothing */ | ||
372 | |||
373 | /* Register saving/restoring for a context switch. We don't need to save | ||
374 | too many registers, because context-switching looks like a function call | ||
375 | (via the function `switch_thread'), so callers will save any | ||
376 | call-clobbered registers themselves. We do need to save the CT regs, as | ||
377 | they're normally not saved during kernel entry (the kernel doesn't use | ||
378 | them). We save PSW so that interrupt-status state will correctly follow | ||
379 | each thread (mostly NMI vs. normal-IRQ/trap), though for the most part | ||
380 | it doesn't matter since threads are always in almost exactly the same | ||
381 | processor state during a context switch. The stack pointer and return | ||
382 | value are handled by switch_thread itself. */ | ||
383 | #define SWITCH_STATE_SAVER \ | ||
384 | SAVE_CALL_SAVED_REGS; \ | ||
385 | SAVE_PSW(PSW); \ | ||
386 | SAVE_CT_REGS | ||
387 | #define SWITCH_STATE_RESTORER \ | ||
388 | RESTORE_CALL_SAVED_REGS; \ | ||
389 | RESTORE_PSW(PSW); \ | ||
390 | RESTORE_CT_REGS | ||
391 | |||
392 | |||
393 | /* Restore register state from the state-save-frame on the stack, switch back | ||
394 | to the user stack if necessary, and return from the trap/interrupt. | ||
395 | EXTRA_STATE_RESTORER is a sequence of assembly language statements to | ||
396 | restore anything not restored by this macro. Only registers not saved by | ||
397 | the C compiler are restored (that is, R3(sp), R4(gp), R31(lp), and | ||
398 | anything restored by EXTRA_STATE_RESTORER). */ | ||
399 | #define RETURN(type) \ | ||
400 | ld.b PTO+PT_KERNEL_MODE[sp], r19; \ | ||
401 | di; /* Disable interrupts */ \ | ||
402 | cmp r19, r0; /* See if returning to kernel mode, */\ | ||
403 | bne 2f; /* ... if so, skip resched &c. */ \ | ||
404 | \ | ||
405 | /* We're returning to user mode, so check for various conditions that \ | ||
406 | trigger rescheduling. */ \ | ||
407 | GET_CURRENT_THREAD(r18); \ | ||
408 | ld.w TI_FLAGS[r18], r19; \ | ||
409 | andi _TIF_NEED_RESCHED, r19, r0; \ | ||
410 | bnz 3f; /* Call the scheduler. */ \ | ||
411 | 5: andi _TIF_SIGPENDING, r19, r18; \ | ||
412 | ld.w TASK_PTRACE[CURRENT_TASK], r19; /* ptrace flags */ \ | ||
413 | or r18, r19; /* see if either is non-zero */ \ | ||
414 | bnz 4f; /* if so, handle them */ \ | ||
415 | \ | ||
416 | /* Return to user state. */ \ | ||
417 | 1: st.b r0, KM; /* Now officially in user state. */ \ | ||
418 | \ | ||
419 | /* Final return. The stack-pointer fiddling is not needed when returning \ | ||
420 | to kernel-mode, but they don't hurt, and this way we can share the \ | ||
421 | (sometimes rather lengthy) POP_STATE macro. */ \ | ||
422 | 2: POP_STATE(type); \ | ||
423 | st.w sp, KSP; /* Save the kernel stack pointer. */ \ | ||
424 | ld.w PT_GPR(GPR_SP)-PT_SIZE[sp], sp; /* Restore stack pointer. */ \ | ||
425 | type ## _RET; /* Return from the trap/interrupt. */ \ | ||
426 | \ | ||
427 | /* Call the scheduler before returning from a syscall/trap. */ \ | ||
428 | 3: SAVE_EXTRA_STATE_FOR_SCHEDULE(type); /* Prepare to call scheduler. */ \ | ||
429 | jarl call_scheduler, lp; /* Call scheduler */ \ | ||
430 | di; /* The scheduler enables interrupts */\ | ||
431 | RESTORE_EXTRA_STATE_FOR_SCHEDULE(type); \ | ||
432 | GET_CURRENT_THREAD(r18); \ | ||
433 | ld.w TI_FLAGS[r18], r19; \ | ||
434 | br 5b; /* Continue with return path. */ \ | ||
435 | \ | ||
436 | /* Handle a signal or ptraced process return. \ | ||
437 | r18 should be non-zero if there are pending signals. */ \ | ||
438 | 4: /* Not all registers are saved by the normal trap/interrupt entry \ | ||
439 | points (for instance, call-saved registers (because the normal \ | ||
440 | C-compiler calling sequence in the kernel makes sure they're \ | ||
441 | preserved), and call-clobbered registers in the case of \ | ||
442 | traps), but signal handlers may want to examine or change the \ | ||
443 | complete register state. Here we save anything not saved by \ | ||
444 | the normal entry sequence, so that it may be safely restored \ | ||
445 | (in a possibly modified form) after do_signal returns. */ \ | ||
446 | SAVE_EXTRA_STATE(type); /* Save state not saved by entry. */ \ | ||
447 | jarl handle_signal_or_ptrace_return, lp; \ | ||
448 | RESTORE_EXTRA_STATE(type); /* Restore extra regs. */ \ | ||
449 | br 1b | ||
450 | |||
451 | |||
452 | /* Jump to the appropriate function for the system call number in r12 | ||
453 | (r12 is not preserved), or return an error if r12 is not valid. The | ||
454 | LP register should point to the location where the called function | ||
455 | should return. [note that MAKE_SYS_CALL uses label 1] */ | ||
456 | #define MAKE_SYS_CALL \ | ||
457 | /* Figure out which function to use for this system call. */ \ | ||
458 | shl 2, r12; \ | ||
459 | /* See if the system call number is valid. */ \ | ||
460 | addi lo(CSYM(sys_call_table) - sys_call_table_end), r12, r0; \ | ||
461 | bnh 1f; \ | ||
462 | mov hilo(CSYM(sys_call_table)), r19; \ | ||
463 | add r19, r12; \ | ||
464 | ld.w 0[r12], r12; \ | ||
465 | /* Make the system call. */ \ | ||
466 | jmp [r12]; \ | ||
467 | /* The syscall number is invalid, return an error. */ \ | ||
468 | 1: addi -ENOSYS, r0, r10; \ | ||
469 | jmp [lp] | ||
470 | |||
471 | |||
472 | .text | ||
473 | |||
474 | /* | ||
475 | * User trap. | ||
476 | * | ||
477 | * Trap 0 system calls are also handled here. | ||
478 | * | ||
479 | * The stack-pointer (r3) should have already been saved to the memory | ||
480 | * location ENTRY_SP (the reason for this is that the interrupt vectors may be | ||
481 | * beyond a 22-bit signed offset jump from the actual interrupt handler, and | ||
482 | * this allows them to save the stack-pointer and use that register to do an | ||
483 | * indirect jump). | ||
484 | * | ||
485 | * Syscall protocol: | ||
486 | * Syscall number in r12, args in r6-r9 | ||
487 | * Return value in r10 | ||
488 | */ | ||
489 | G_ENTRY(trap): | ||
490 | SAVE_STATE (TRAP, r12, ENTRY_SP) // Save registers. | ||
491 | stsr SR_ECR, r19 // Find out which trap it was. | ||
492 | ei // Enable interrupts. | ||
493 | mov hilo(ret_from_trap), lp // where the trap should return | ||
494 | |||
495 | // The following two shifts (1) clear out extraneous NMI data in the | ||
496 | // upper 16-bits, (2) convert the 0x40 - 0x5f range of trap ECR | ||
497 | // numbers into the (0-31) << 2 range we want, (3) set the flags. | ||
498 | shl 27, r19 // chop off all high bits | ||
499 | shr 25, r19 // scale back down and then << 2 | ||
500 | bnz 2f // See if not trap 0. | ||
501 | |||
502 | // Trap 0 is a `short' system call, skip general trap table. | ||
503 | MAKE_SYS_CALL // Jump to the syscall function. | ||
504 | |||
505 | 2: // For other traps, use a table lookup. | ||
506 | mov hilo(CSYM(trap_table)), r18 | ||
507 | add r19, r18 | ||
508 | ld.w 0[r18], r18 | ||
509 | jmp [r18] // Jump to the trap handler. | ||
510 | END(trap) | ||
511 | |||
512 | /* This is just like ret_from_trap, but first restores extra registers | ||
513 | saved by some wrappers. */ | ||
514 | L_ENTRY(restore_extra_regs_and_ret_from_trap): | ||
515 | RESTORE_EXTRA_STATE(TRAP) | ||
516 | // fall through | ||
517 | END(restore_extra_regs_and_ret_from_trap) | ||
518 | |||
519 | /* Entry point used to return from a syscall/trap. */ | ||
520 | L_ENTRY(ret_from_trap): | ||
521 | RETURN(TRAP) | ||
522 | END(ret_from_trap) | ||
523 | |||
524 | |||
525 | /* This the initial entry point for a new child thread, with an appropriate | ||
526 | stack in place that makes it look that the child is in the middle of an | ||
527 | syscall. This function is actually `returned to' from switch_thread | ||
528 | (copy_thread makes ret_from_fork the return address in each new thread's | ||
529 | saved context). */ | ||
530 | C_ENTRY(ret_from_fork): | ||
531 | mov r10, r6 // switch_thread returns the prev task. | ||
532 | jarl CSYM(schedule_tail), lp // ...which is schedule_tail's arg | ||
533 | mov r0, r10 // Child's fork call should return 0. | ||
534 | br ret_from_trap // Do normal trap return. | ||
535 | C_END(ret_from_fork) | ||
536 | |||
537 | |||
538 | /* | ||
539 | * Trap 1: `long' system calls | ||
540 | * `Long' syscall protocol: | ||
541 | * Syscall number in r12, args in r6-r9, r13-r14 | ||
542 | * Return value in r10 | ||
543 | */ | ||
544 | L_ENTRY(syscall_long): | ||
545 | // Push extra arguments on the stack. Note that by default, the trap | ||
546 | // handler reserves enough stack space for 6 arguments, so we don't | ||
547 | // have to make any additional room. | ||
548 | st.w r13, 16[sp] // arg 5 | ||
549 | st.w r14, 20[sp] // arg 6 | ||
550 | |||
551 | // Make sure r13 and r14 are preserved, in case we have to restart a | ||
552 | // system call because of a signal (ep has already been set by caller). | ||
553 | st.w r13, PTO+PT_GPR(13)[sp] | ||
554 | st.w r14, PTO+PT_GPR(13)[sp] | ||
555 | mov hilo(ret_from_long_syscall), lp | ||
556 | |||
557 | MAKE_SYS_CALL // Jump to the syscall function. | ||
558 | END(syscall_long) | ||
559 | |||
560 | /* Entry point used to return from a long syscall. Only needed to restore | ||
561 | r13/r14 if the general trap mechanism doesnt' do so. */ | ||
562 | L_ENTRY(ret_from_long_syscall): | ||
563 | ld.w PTO+PT_GPR(13)[sp], r13 // Restore the extra registers | ||
564 | ld.w PTO+PT_GPR(13)[sp], r14 | ||
565 | br ret_from_trap // The rest is the same as other traps | ||
566 | END(ret_from_long_syscall) | ||
567 | |||
568 | |||
569 | /* These syscalls need access to the struct pt_regs on the stack, so we | ||
570 | implement them in assembly (they're basically all wrappers anyway). */ | ||
571 | |||
572 | L_ENTRY(sys_fork_wrapper): | ||
573 | #ifdef CONFIG_MMU | ||
574 | addi SIGCHLD, r0, r6 // Arg 0: flags | ||
575 | ld.w PTO+PT_GPR(GPR_SP)[sp], r7 // Arg 1: child SP (use parent's) | ||
576 | movea PTO, sp, r8 // Arg 2: parent context | ||
577 | mov r0, r9 // Arg 3/4/5: 0 | ||
578 | st.w r0, 16[sp] | ||
579 | st.w r0, 20[sp] | ||
580 | mov hilo(CSYM(do_fork)), r18 // Where the real work gets done | ||
581 | br save_extra_state_tramp // Save state and go there | ||
582 | #else | ||
583 | // fork almost works, enough to trick you into looking elsewhere :-( | ||
584 | addi -EINVAL, r0, r10 | ||
585 | jmp [lp] | ||
586 | #endif | ||
587 | END(sys_fork_wrapper) | ||
588 | |||
589 | L_ENTRY(sys_vfork_wrapper): | ||
590 | addi CLONE_VFORK | CLONE_VM | SIGCHLD, r0, r6 // Arg 0: flags | ||
591 | ld.w PTO+PT_GPR(GPR_SP)[sp], r7 // Arg 1: child SP (use parent's) | ||
592 | movea PTO, sp, r8 // Arg 2: parent context | ||
593 | mov r0, r9 // Arg 3/4/5: 0 | ||
594 | st.w r0, 16[sp] | ||
595 | st.w r0, 20[sp] | ||
596 | mov hilo(CSYM(do_fork)), r18 // Where the real work gets done | ||
597 | br save_extra_state_tramp // Save state and go there | ||
598 | END(sys_vfork_wrapper) | ||
599 | |||
600 | L_ENTRY(sys_clone_wrapper): | ||
601 | ld.w PTO+PT_GPR(GPR_SP)[sp], r19// parent's stack pointer | ||
602 | cmp r7, r0 // See if child SP arg (arg 1) is 0. | ||
603 | cmov z, r19, r7, r7 // ... and use the parent's if so. | ||
604 | movea PTO, sp, r8 // Arg 2: parent context | ||
605 | mov r0, r9 // Arg 3/4/5: 0 | ||
606 | st.w r0, 16[sp] | ||
607 | st.w r0, 20[sp] | ||
608 | mov hilo(CSYM(do_fork)), r18 // Where the real work gets done | ||
609 | br save_extra_state_tramp // Save state and go there | ||
610 | END(sys_clone_wrapper) | ||
611 | |||
612 | |||
613 | L_ENTRY(sys_execve_wrapper): | ||
614 | movea PTO, sp, r9 // add user context as 4th arg | ||
615 | jr CSYM(sys_execve) // Do real work (tail-call). | ||
616 | END(sys_execve_wrapper) | ||
617 | |||
618 | |||
619 | L_ENTRY(sys_sigsuspend_wrapper): | ||
620 | movea PTO, sp, r7 // add user context as 2nd arg | ||
621 | mov hilo(CSYM(sys_sigsuspend)), r18 // syscall function | ||
622 | jarl save_extra_state_tramp, lp // Save state and do it | ||
623 | br restore_extra_regs_and_ret_from_trap | ||
624 | END(sys_sigsuspend_wrapper) | ||
625 | L_ENTRY(sys_rt_sigsuspend_wrapper): | ||
626 | movea PTO, sp, r8 // add user context as 3rd arg | ||
627 | mov hilo(CSYM(sys_rt_sigsuspend)), r18 // syscall function | ||
628 | jarl save_extra_state_tramp, lp // Save state and do it | ||
629 | br restore_extra_regs_and_ret_from_trap | ||
630 | END(sys_rt_sigsuspend_wrapper) | ||
631 | |||
632 | L_ENTRY(sys_sigreturn_wrapper): | ||
633 | movea PTO, sp, r6 // add user context as 1st arg | ||
634 | mov hilo(CSYM(sys_sigreturn)), r18 // syscall function | ||
635 | jarl save_extra_state_tramp, lp // Save state and do it | ||
636 | br restore_extra_regs_and_ret_from_trap | ||
637 | END(sys_sigreturn_wrapper) | ||
638 | L_ENTRY(sys_rt_sigreturn_wrapper): | ||
639 | movea PTO, sp, r6 // add user context as 1st arg | ||
640 | mov hilo(CSYM(sys_rt_sigreturn)), r18// syscall function | ||
641 | jarl save_extra_state_tramp, lp // Save state and do it | ||
642 | br restore_extra_regs_and_ret_from_trap | ||
643 | END(sys_rt_sigreturn_wrapper) | ||
644 | |||
645 | |||
646 | /* Save any state not saved by SAVE_STATE(TRAP), and jump to r18. | ||
647 | It's main purpose is to share the rather lengthy code sequence that | ||
648 | SAVE_STATE expands into among the above wrapper functions. */ | ||
649 | L_ENTRY(save_extra_state_tramp): | ||
650 | SAVE_EXTRA_STATE(TRAP) // Save state not saved by entry. | ||
651 | jmp [r18] // Do the work the caller wants | ||
652 | END(save_extra_state_tramp) | ||
653 | |||
654 | |||
655 | /* | ||
656 | * Hardware maskable interrupts. | ||
657 | * | ||
658 | * The stack-pointer (r3) should have already been saved to the memory | ||
659 | * location ENTRY_SP (the reason for this is that the interrupt vectors may be | ||
660 | * beyond a 22-bit signed offset jump from the actual interrupt handler, and | ||
661 | * this allows them to save the stack-pointer and use that register to do an | ||
662 | * indirect jump). | ||
663 | */ | ||
664 | G_ENTRY(irq): | ||
665 | SAVE_STATE (IRQ, r0, ENTRY_SP) // Save registers. | ||
666 | |||
667 | stsr SR_ECR, r6 // Find out which interrupt it was. | ||
668 | movea PTO, sp, r7 // User regs are arg2 | ||
669 | |||
670 | // All v850 implementations I know about encode their interrupts as | ||
671 | // multiples of 0x10, starting at 0x80 (after NMIs and software | ||
672 | // interrupts). Convert this number into a simple IRQ index for the | ||
673 | // rest of the kernel. We also clear the upper 16 bits, which hold | ||
674 | // NMI info, and don't appear to be cleared when a NMI returns. | ||
675 | shl 16, r6 // clear upper 16 bits | ||
676 | shr 20, r6 // shift back, and remove lower nibble | ||
677 | add -8, r6 // remove bias for irqs | ||
678 | |||
679 | // Call the high-level interrupt handling code. | ||
680 | jarl CSYM(handle_irq), lp | ||
681 | |||
682 | RETURN(IRQ) | ||
683 | END(irq) | ||
684 | |||
685 | |||
686 | /* | ||
687 | * Debug trap / illegal-instruction exception | ||
688 | * | ||
689 | * The stack-pointer (r3) should have already been saved to the memory | ||
690 | * location ENTRY_SP (the reason for this is that the interrupt vectors may be | ||
691 | * beyond a 22-bit signed offset jump from the actual interrupt handler, and | ||
692 | * this allows them to save the stack-pointer and use that register to do an | ||
693 | * indirect jump). | ||
694 | */ | ||
695 | G_ENTRY(dbtrap): | ||
696 | SAVE_STATE (DBTRAP, r0, ENTRY_SP)// Save registers. | ||
697 | |||
698 | /* First see if we came from kernel mode; if so, the dbtrap | ||
699 | instruction has a special meaning, to set the DIR (`debug | ||
700 | information register') register. This is because the DIR register | ||
701 | can _only_ be manipulated/read while in `debug mode,' and debug | ||
702 | mode is only active while we're inside the dbtrap handler. The | ||
703 | exact functionality is: { DIR = (DIR | r6) & ~r7; return DIR; }. */ | ||
704 | ld.b PTO+PT_KERNEL_MODE[sp], r19 | ||
705 | cmp r19, r0 | ||
706 | bz 1f | ||
707 | |||
708 | stsr SR_DIR, r10 | ||
709 | or r6, r10 | ||
710 | not r7, r7 | ||
711 | and r7, r10 | ||
712 | ldsr r10, SR_DIR | ||
713 | stsr SR_DIR, r10 // Confirm the value we set | ||
714 | st.w r10, PTO+PT_GPR(10)[sp] // return it | ||
715 | br 3f | ||
716 | |||
717 | 1: ei // Enable interrupts. | ||
718 | |||
719 | /* The default signal type we raise. */ | ||
720 | mov SIGTRAP, r6 | ||
721 | |||
722 | /* See if it's a single-step trap. */ | ||
723 | stsr SR_DBPSW, r19 | ||
724 | andi 0x0800, r19, r19 | ||
725 | bnz 2f | ||
726 | |||
727 | /* Look to see if the preceding instruction was is a dbtrap or not, | ||
728 | to decide which signal we should use. */ | ||
729 | stsr SR_DBPC, r19 // PC following trapping insn | ||
730 | ld.hu -2[r19], r19 | ||
731 | ori 0xf840, r0, r20 // DBTRAP insn | ||
732 | cmp r19, r20 // Was this trap caused by DBTRAP? | ||
733 | cmov ne, SIGILL, r6, r6 // Choose signal appropriately | ||
734 | |||
735 | /* Raise the desired signal. */ | ||
736 | 2: mov CURRENT_TASK, r7 // Arg 1: task | ||
737 | jarl CSYM(send_sig), lp // tail call | ||
738 | |||
739 | 3: RETURN(DBTRAP) | ||
740 | END(dbtrap) | ||
741 | |||
742 | |||
743 | /* | ||
744 | * Hardware non-maskable interrupts. | ||
745 | * | ||
746 | * The stack-pointer (r3) should have already been saved to the memory | ||
747 | * location ENTRY_SP (the reason for this is that the interrupt vectors may be | ||
748 | * beyond a 22-bit signed offset jump from the actual interrupt handler, and | ||
749 | * this allows them to save the stack-pointer and use that register to do an | ||
750 | * indirect jump). | ||
751 | */ | ||
752 | G_ENTRY(nmi): | ||
753 | SAVE_STATE (NMI, r0, NMI_ENTRY_SP); /* Save registers. */ | ||
754 | |||
755 | stsr SR_ECR, r6; /* Find out which nmi it was. */ | ||
756 | shr 20, r6; /* Extract NMI code in bits 20-24. */ | ||
757 | movea PTO, sp, r7; /* User regs are arg2. */ | ||
758 | |||
759 | /* Non-maskable interrupts always lie right after maskable interrupts. | ||
760 | Call the generic IRQ handler, with two arguments, the IRQ number, | ||
761 | and a pointer to the user registers, to handle the specifics. | ||
762 | (we subtract one because the first NMI has code 1). */ | ||
763 | addi FIRST_NMI - 1, r6, r6 | ||
764 | jarl CSYM(handle_irq), lp | ||
765 | |||
766 | RETURN(NMI) | ||
767 | END(nmi) | ||
768 | |||
769 | |||
770 | /* | ||
771 | * Trap with no handler | ||
772 | */ | ||
773 | L_ENTRY(bad_trap_wrapper): | ||
774 | mov r19, r6 // Arg 0: trap number | ||
775 | movea PTO, sp, r7 // Arg 1: user regs | ||
776 | jr CSYM(bad_trap) // tail call handler | ||
777 | END(bad_trap_wrapper) | ||
778 | |||
779 | |||
780 | /* | ||
781 | * Invoke the scheduler, called from the trap/irq kernel exit path. | ||
782 | * | ||
783 | * This basically just calls `schedule', but also arranges for extra | ||
784 | * registers to be saved for ptrace'd processes, so ptrace can modify them. | ||
785 | */ | ||
786 | L_ENTRY(call_scheduler): | ||
787 | ld.w TASK_PTRACE[CURRENT_TASK], r19 // See if task is ptrace'd | ||
788 | cmp r19, r0 | ||
789 | bnz 1f // ... yes, do special stuff | ||
790 | jr CSYM(schedule) // ... no, just tail-call scheduler | ||
791 | |||
792 | // Save extra regs for ptrace'd task. We want to save anything | ||
793 | // that would otherwise only be `implicitly' saved by the normal | ||
794 | // compiler calling-convention. | ||
795 | 1: mov sp, ep // Setup EP for SAVE_CALL_SAVED_REGS | ||
796 | SAVE_CALL_SAVED_REGS // Save call-saved registers to stack | ||
797 | mov lp, r20 // Save LP in a callee-saved register | ||
798 | |||
799 | jarl CSYM(schedule), lp // Call scheduler | ||
800 | |||
801 | mov r20, lp | ||
802 | mov sp, ep // We can't rely on EP after return | ||
803 | RESTORE_CALL_SAVED_REGS // Restore (possibly modified) regs | ||
804 | jmp [lp] // Return to the return path | ||
805 | END(call_scheduler) | ||
806 | |||
807 | |||
808 | /* | ||
809 | * This is an out-of-line handler for two special cases during the kernel | ||
810 | * trap/irq exit sequence: | ||
811 | * | ||
812 | * (1) If r18 is non-zero then a signal needs to be handled, which is | ||
813 | * done, and then the caller returned to. | ||
814 | * | ||
815 | * (2) If r18 is non-zero then we're returning to a ptraced process, which | ||
816 | * has several special cases -- single-stepping and trap tracing, both | ||
817 | * of which require using the `dbret' instruction to exit the kernel | ||
818 | * instead of the normal `reti' (this is because the CPU not correctly | ||
819 | * single-step after a reti). In this case, of course, this handler | ||
820 | * never returns to the caller. | ||
821 | * | ||
822 | * In either case, all registers should have been saved to the current | ||
823 | * state-save-frame on the stack, except for callee-saved registers. | ||
824 | * | ||
825 | * [These two different cases are combined merely to avoid bloating the | ||
826 | * macro-inlined code, not because they really make much sense together!] | ||
827 | */ | ||
828 | L_ENTRY(handle_signal_or_ptrace_return): | ||
829 | cmp r18, r0 // See if handling a signal | ||
830 | bz 1f // ... nope, go do ptrace return | ||
831 | |||
832 | // Handle a signal | ||
833 | mov lp, r20 // Save link-pointer | ||
834 | mov r10, r21 // Save return-values (for trap) | ||
835 | mov r11, r22 | ||
836 | |||
837 | movea PTO, sp, r6 // Arg 1: struct pt_regs *regs | ||
838 | mov r0, r7 // Arg 2: sigset_t *oldset | ||
839 | jarl CSYM(do_signal), lp // Handle the signal | ||
840 | di // sig handling enables interrupts | ||
841 | |||
842 | mov r20, lp // Restore link-pointer | ||
843 | mov r21, r10 // Restore return-values (for trap) | ||
844 | mov r22, r11 | ||
845 | ld.w TASK_PTRACE[CURRENT_TASK], r19 // check ptrace flags too | ||
846 | cmp r19, r0 | ||
847 | bnz 1f // ... some set, so look more | ||
848 | 2: jmp [lp] // ... none set, so return normally | ||
849 | |||
850 | // ptrace return | ||
851 | 1: ld.w PTO+PT_PSW[sp], r19 // Look at user-processes's flags | ||
852 | andi 0x0800, r19, r19 // See if single-step flag is set | ||
853 | bz 2b // ... nope, return normally | ||
854 | |||
855 | // Return as if from a dbtrap insn | ||
856 | st.b r0, KM // Now officially in user state. | ||
857 | POP_STATE(DBTRAP) // Restore regs | ||
858 | st.w sp, KSP // Save the kernel stack pointer. | ||
859 | ld.w PT_GPR(GPR_SP)-PT_SIZE[sp], sp // Restore user stack pointer. | ||
860 | DBTRAP_RET // Return from the trap/interrupt. | ||
861 | END(handle_signal_or_ptrace_return) | ||
862 | |||
863 | |||
864 | /* | ||
865 | * This is where we switch between two threads. The arguments are: | ||
866 | * r6 -- pointer to the struct thread for the `current' process | ||
867 | * r7 -- pointer to the struct thread for the `new' process. | ||
868 | * when this function returns, it will return to the new thread. | ||
869 | */ | ||
870 | C_ENTRY(switch_thread): | ||
871 | // Return the previous task (r10 is not clobbered by restore below) | ||
872 | mov CURRENT_TASK, r10 | ||
873 | // First, push the current processor state on the stack | ||
874 | PUSH_STATE(SWITCH) | ||
875 | // Now save the location of the kernel stack pointer for this thread; | ||
876 | // since we've pushed all other state on the stack, this is enough to | ||
877 | // restore it all later. | ||
878 | st.w sp, THREAD_KSP[r6] | ||
879 | // Now restore the stack pointer from the new process | ||
880 | ld.w THREAD_KSP[r7], sp | ||
881 | // ... and restore all state from that | ||
882 | POP_STATE(SWITCH) | ||
883 | // Update the current task pointer | ||
884 | GET_CURRENT_TASK(CURRENT_TASK) | ||
885 | // Now return into the new thread | ||
886 | jmp [lp] | ||
887 | C_END(switch_thread) | ||
888 | |||
889 | |||
890 | .data | ||
891 | |||
892 | .align 4 | ||
893 | C_DATA(trap_table): | ||
894 | .long bad_trap_wrapper // trap 0, doesn't use trap table. | ||
895 | .long syscall_long // trap 1, `long' syscall. | ||
896 | .long bad_trap_wrapper | ||
897 | .long bad_trap_wrapper | ||
898 | .long bad_trap_wrapper | ||
899 | .long bad_trap_wrapper | ||
900 | .long bad_trap_wrapper | ||
901 | .long bad_trap_wrapper | ||
902 | .long bad_trap_wrapper | ||
903 | .long bad_trap_wrapper | ||
904 | .long bad_trap_wrapper | ||
905 | .long bad_trap_wrapper | ||
906 | .long bad_trap_wrapper | ||
907 | .long bad_trap_wrapper | ||
908 | .long bad_trap_wrapper | ||
909 | .long bad_trap_wrapper | ||
910 | C_END(trap_table) | ||
911 | |||
912 | |||
913 | .section .rodata | ||
914 | |||
915 | .align 4 | ||
916 | C_DATA(sys_call_table): | ||
917 | .long CSYM(sys_restart_syscall) // 0 | ||
918 | .long CSYM(sys_exit) | ||
919 | .long sys_fork_wrapper | ||
920 | .long CSYM(sys_read) | ||
921 | .long CSYM(sys_write) | ||
922 | .long CSYM(sys_open) // 5 | ||
923 | .long CSYM(sys_close) | ||
924 | .long CSYM(sys_waitpid) | ||
925 | .long CSYM(sys_creat) | ||
926 | .long CSYM(sys_link) | ||
927 | .long CSYM(sys_unlink) // 10 | ||
928 | .long sys_execve_wrapper | ||
929 | .long CSYM(sys_chdir) | ||
930 | .long CSYM(sys_time) | ||
931 | .long CSYM(sys_mknod) | ||
932 | .long CSYM(sys_chmod) // 15 | ||
933 | .long CSYM(sys_chown) | ||
934 | .long CSYM(sys_ni_syscall) // was: break | ||
935 | .long CSYM(sys_ni_syscall) // was: oldstat (aka stat) | ||
936 | .long CSYM(sys_lseek) | ||
937 | .long CSYM(sys_getpid) // 20 | ||
938 | .long CSYM(sys_mount) | ||
939 | .long CSYM(sys_oldumount) | ||
940 | .long CSYM(sys_setuid) | ||
941 | .long CSYM(sys_getuid) | ||
942 | .long CSYM(sys_stime) // 25 | ||
943 | .long CSYM(sys_ptrace) | ||
944 | .long CSYM(sys_alarm) | ||
945 | .long CSYM(sys_ni_syscall) // was: oldfstat (aka fstat) | ||
946 | .long CSYM(sys_pause) | ||
947 | .long CSYM(sys_utime) // 30 | ||
948 | .long CSYM(sys_ni_syscall) // was: stty | ||
949 | .long CSYM(sys_ni_syscall) // was: gtty | ||
950 | .long CSYM(sys_access) | ||
951 | .long CSYM(sys_nice) | ||
952 | .long CSYM(sys_ni_syscall) // 35, was: ftime | ||
953 | .long CSYM(sys_sync) | ||
954 | .long CSYM(sys_kill) | ||
955 | .long CSYM(sys_rename) | ||
956 | .long CSYM(sys_mkdir) | ||
957 | .long CSYM(sys_rmdir) // 40 | ||
958 | .long CSYM(sys_dup) | ||
959 | .long CSYM(sys_pipe) | ||
960 | .long CSYM(sys_times) | ||
961 | .long CSYM(sys_ni_syscall) // was: prof | ||
962 | .long CSYM(sys_brk) // 45 | ||
963 | .long CSYM(sys_setgid) | ||
964 | .long CSYM(sys_getgid) | ||
965 | .long CSYM(sys_signal) | ||
966 | .long CSYM(sys_geteuid) | ||
967 | .long CSYM(sys_getegid) // 50 | ||
968 | .long CSYM(sys_acct) | ||
969 | .long CSYM(sys_umount) // recycled never used phys() | ||
970 | .long CSYM(sys_ni_syscall) // was: lock | ||
971 | .long CSYM(sys_ioctl) | ||
972 | .long CSYM(sys_fcntl) // 55 | ||
973 | .long CSYM(sys_ni_syscall) // was: mpx | ||
974 | .long CSYM(sys_setpgid) | ||
975 | .long CSYM(sys_ni_syscall) // was: ulimit | ||
976 | .long CSYM(sys_ni_syscall) | ||
977 | .long CSYM(sys_umask) // 60 | ||
978 | .long CSYM(sys_chroot) | ||
979 | .long CSYM(sys_ustat) | ||
980 | .long CSYM(sys_dup2) | ||
981 | .long CSYM(sys_getppid) | ||
982 | .long CSYM(sys_getpgrp) // 65 | ||
983 | .long CSYM(sys_setsid) | ||
984 | .long CSYM(sys_sigaction) | ||
985 | .long CSYM(sys_sgetmask) | ||
986 | .long CSYM(sys_ssetmask) | ||
987 | .long CSYM(sys_setreuid) // 70 | ||
988 | .long CSYM(sys_setregid) | ||
989 | .long sys_sigsuspend_wrapper | ||
990 | .long CSYM(sys_sigpending) | ||
991 | .long CSYM(sys_sethostname) | ||
992 | .long CSYM(sys_setrlimit) // 75 | ||
993 | .long CSYM(sys_getrlimit) | ||
994 | .long CSYM(sys_getrusage) | ||
995 | .long CSYM(sys_gettimeofday) | ||
996 | .long CSYM(sys_settimeofday) | ||
997 | .long CSYM(sys_getgroups) // 80 | ||
998 | .long CSYM(sys_setgroups) | ||
999 | .long CSYM(sys_select) | ||
1000 | .long CSYM(sys_symlink) | ||
1001 | .long CSYM(sys_ni_syscall) // was: oldlstat (aka lstat) | ||
1002 | .long CSYM(sys_readlink) // 85 | ||
1003 | .long CSYM(sys_uselib) | ||
1004 | .long CSYM(sys_swapon) | ||
1005 | .long CSYM(sys_reboot) | ||
1006 | .long CSYM(old_readdir) | ||
1007 | .long CSYM(sys_mmap) // 90 | ||
1008 | .long CSYM(sys_munmap) | ||
1009 | .long CSYM(sys_truncate) | ||
1010 | .long CSYM(sys_ftruncate) | ||
1011 | .long CSYM(sys_fchmod) | ||
1012 | .long CSYM(sys_fchown) // 95 | ||
1013 | .long CSYM(sys_getpriority) | ||
1014 | .long CSYM(sys_setpriority) | ||
1015 | .long CSYM(sys_ni_syscall) // was: profil | ||
1016 | .long CSYM(sys_statfs) | ||
1017 | .long CSYM(sys_fstatfs) // 100 | ||
1018 | .long CSYM(sys_ni_syscall) // i386: ioperm | ||
1019 | .long CSYM(sys_socketcall) | ||
1020 | .long CSYM(sys_syslog) | ||
1021 | .long CSYM(sys_setitimer) | ||
1022 | .long CSYM(sys_getitimer) // 105 | ||
1023 | .long CSYM(sys_newstat) | ||
1024 | .long CSYM(sys_newlstat) | ||
1025 | .long CSYM(sys_newfstat) | ||
1026 | .long CSYM(sys_ni_syscall) // was: olduname (aka uname) | ||
1027 | .long CSYM(sys_ni_syscall) // 110, i386: iopl | ||
1028 | .long CSYM(sys_vhangup) | ||
1029 | .long CSYM(sys_ni_syscall) // was: idle | ||
1030 | .long CSYM(sys_ni_syscall) // i386: vm86old | ||
1031 | .long CSYM(sys_wait4) | ||
1032 | .long CSYM(sys_swapoff) // 115 | ||
1033 | .long CSYM(sys_sysinfo) | ||
1034 | .long CSYM(sys_ipc) | ||
1035 | .long CSYM(sys_fsync) | ||
1036 | .long sys_sigreturn_wrapper | ||
1037 | .long sys_clone_wrapper // 120 | ||
1038 | .long CSYM(sys_setdomainname) | ||
1039 | .long CSYM(sys_newuname) | ||
1040 | .long CSYM(sys_ni_syscall) // i386: modify_ldt, m68k: cacheflush | ||
1041 | .long CSYM(sys_adjtimex) | ||
1042 | .long CSYM(sys_ni_syscall) // 125 - sys_mprotect | ||
1043 | .long CSYM(sys_sigprocmask) | ||
1044 | .long CSYM(sys_ni_syscall) // sys_create_module | ||
1045 | .long CSYM(sys_init_module) | ||
1046 | .long CSYM(sys_delete_module) | ||
1047 | .long CSYM(sys_ni_syscall) // 130 - sys_get_kernel_syms | ||
1048 | .long CSYM(sys_quotactl) | ||
1049 | .long CSYM(sys_getpgid) | ||
1050 | .long CSYM(sys_fchdir) | ||
1051 | .long CSYM(sys_bdflush) | ||
1052 | .long CSYM(sys_sysfs) // 135 | ||
1053 | .long CSYM(sys_personality) | ||
1054 | .long CSYM(sys_ni_syscall) // for afs_syscall | ||
1055 | .long CSYM(sys_setfsuid) | ||
1056 | .long CSYM(sys_setfsgid) | ||
1057 | .long CSYM(sys_llseek) // 140 | ||
1058 | .long CSYM(sys_getdents) | ||
1059 | .long CSYM(sys_select) // for backward compat; remove someday | ||
1060 | .long CSYM(sys_flock) | ||
1061 | .long CSYM(sys_ni_syscall) // sys_msync | ||
1062 | .long CSYM(sys_readv) // 145 | ||
1063 | .long CSYM(sys_writev) | ||
1064 | .long CSYM(sys_getsid) | ||
1065 | .long CSYM(sys_fdatasync) | ||
1066 | .long CSYM(sys_sysctl) | ||
1067 | .long CSYM(sys_ni_syscall) // 150 - sys_mlock | ||
1068 | .long CSYM(sys_ni_syscall) // sys_munlock | ||
1069 | .long CSYM(sys_ni_syscall) // sys_mlockall | ||
1070 | .long CSYM(sys_ni_syscall) // sys_munlockall | ||
1071 | .long CSYM(sys_sched_setparam) | ||
1072 | .long CSYM(sys_sched_getparam) // 155 | ||
1073 | .long CSYM(sys_sched_setscheduler) | ||
1074 | .long CSYM(sys_sched_getscheduler) | ||
1075 | .long CSYM(sys_sched_yield) | ||
1076 | .long CSYM(sys_sched_get_priority_max) | ||
1077 | .long CSYM(sys_sched_get_priority_min) // 160 | ||
1078 | .long CSYM(sys_sched_rr_get_interval) | ||
1079 | .long CSYM(sys_nanosleep) | ||
1080 | .long CSYM(sys_ni_syscall) // sys_mremap | ||
1081 | .long CSYM(sys_setresuid) | ||
1082 | .long CSYM(sys_getresuid) // 165 | ||
1083 | .long CSYM(sys_ni_syscall) // for vm86 | ||
1084 | .long CSYM(sys_ni_syscall) // sys_query_module | ||
1085 | .long CSYM(sys_poll) | ||
1086 | .long CSYM(sys_nfsservctl) | ||
1087 | .long CSYM(sys_setresgid) // 170 | ||
1088 | .long CSYM(sys_getresgid) | ||
1089 | .long CSYM(sys_prctl) | ||
1090 | .long sys_rt_sigreturn_wrapper | ||
1091 | .long CSYM(sys_rt_sigaction) | ||
1092 | .long CSYM(sys_rt_sigprocmask) // 175 | ||
1093 | .long CSYM(sys_rt_sigpending) | ||
1094 | .long CSYM(sys_rt_sigtimedwait) | ||
1095 | .long CSYM(sys_rt_sigqueueinfo) | ||
1096 | .long sys_rt_sigsuspend_wrapper | ||
1097 | .long CSYM(sys_pread64) // 180 | ||
1098 | .long CSYM(sys_pwrite64) | ||
1099 | .long CSYM(sys_lchown) | ||
1100 | .long CSYM(sys_getcwd) | ||
1101 | .long CSYM(sys_capget) | ||
1102 | .long CSYM(sys_capset) // 185 | ||
1103 | .long CSYM(sys_sigaltstack) | ||
1104 | .long CSYM(sys_sendfile) | ||
1105 | .long CSYM(sys_ni_syscall) // streams1 | ||
1106 | .long CSYM(sys_ni_syscall) // streams2 | ||
1107 | .long sys_vfork_wrapper // 190 | ||
1108 | .long CSYM(sys_ni_syscall) | ||
1109 | .long CSYM(sys_mmap2) | ||
1110 | .long CSYM(sys_truncate64) | ||
1111 | .long CSYM(sys_ftruncate64) | ||
1112 | .long CSYM(sys_stat64) // 195 | ||
1113 | .long CSYM(sys_lstat64) | ||
1114 | .long CSYM(sys_fstat64) | ||
1115 | .long CSYM(sys_fcntl64) | ||
1116 | .long CSYM(sys_getdents64) | ||
1117 | .long CSYM(sys_pivot_root) // 200 | ||
1118 | .long CSYM(sys_gettid) | ||
1119 | .long CSYM(sys_tkill) | ||
1120 | sys_call_table_end: | ||
1121 | C_END(sys_call_table) | ||
diff --git a/arch/v850/kernel/fpga85e2c.c b/arch/v850/kernel/fpga85e2c.c deleted file mode 100644 index ab9cf16a85c8..000000000000 --- a/arch/v850/kernel/fpga85e2c.c +++ /dev/null | |||
@@ -1,167 +0,0 @@ | |||
1 | /* | ||
2 | * arch/v850/kernel/fpga85e2c.h -- Machine-dependent defs for | ||
3 | * FPGA implementation of V850E2/NA85E2C | ||
4 | * | ||
5 | * Copyright (C) 2002,03 NEC Electronics Corporation | ||
6 | * Copyright (C) 2002,03 Miles Bader <miles@gnu.org> | ||
7 | * | ||
8 | * This file is subject to the terms and conditions of the GNU General | ||
9 | * Public License. See the file COPYING in the main directory of this | ||
10 | * archive for more details. | ||
11 | * | ||
12 | * Written by Miles Bader <miles@gnu.org> | ||
13 | */ | ||
14 | |||
15 | #include <linux/kernel.h> | ||
16 | #include <linux/module.h> | ||
17 | #include <linux/init.h> | ||
18 | #include <linux/mm.h> | ||
19 | #include <linux/swap.h> | ||
20 | #include <linux/bootmem.h> | ||
21 | #include <linux/irq.h> | ||
22 | #include <linux/bitops.h> | ||
23 | |||
24 | #include <asm/atomic.h> | ||
25 | #include <asm/page.h> | ||
26 | #include <asm/machdep.h> | ||
27 | |||
28 | #include "mach.h" | ||
29 | |||
30 | extern void memcons_setup (void); | ||
31 | |||
32 | |||
33 | #define REG_DUMP_ADDR 0x220000 | ||
34 | |||
35 | |||
36 | extern struct irqaction reg_snap_action; /* fwd decl */ | ||
37 | |||
38 | |||
39 | void __init mach_early_init (void) | ||
40 | { | ||
41 | int i; | ||
42 | const u32 *src; | ||
43 | register u32 *dst asm ("ep"); | ||
44 | extern u32 _intv_end, _intv_load_start; | ||
45 | |||
46 | /* Set bus sizes: CS0 32-bit, CS1 16-bit, CS7 8-bit, | ||
47 | everything else 32-bit. */ | ||
48 | V850E2_BSC = 0x2AA6; | ||
49 | for (i = 2; i <= 6; i++) | ||
50 | CSDEV(i) = 0; /* 32 bit */ | ||
51 | |||
52 | /* Ensure that the simulator halts on a panic, instead of going | ||
53 | into an infinite loop inside the panic function. */ | ||
54 | panic_timeout = -1; | ||
55 | |||
56 | /* Move the interrupt vectors into their real location. Note that | ||
57 | any relocations there are relative to the real location, so we | ||
58 | don't have to fix anything up. We use a loop instead of calling | ||
59 | memcpy to keep this a leaf function (to avoid a function | ||
60 | prologue being generated). */ | ||
61 | dst = 0x10; /* &_intv_start + 0x10. */ | ||
62 | src = &_intv_load_start; | ||
63 | do { | ||
64 | u32 t0 = src[0], t1 = src[1], t2 = src[2], t3 = src[3]; | ||
65 | u32 t4 = src[4], t5 = src[5], t6 = src[6], t7 = src[7]; | ||
66 | dst[0] = t0; dst[1] = t1; dst[2] = t2; dst[3] = t3; | ||
67 | dst[4] = t4; dst[5] = t5; dst[6] = t6; dst[7] = t7; | ||
68 | dst += 8; | ||
69 | src += 8; | ||
70 | } while (dst < &_intv_end); | ||
71 | } | ||
72 | |||
73 | void __init mach_setup (char **cmdline) | ||
74 | { | ||
75 | memcons_setup (); | ||
76 | |||
77 | /* Setup up NMI0 to copy the registers to a known memory location. | ||
78 | The FGPA board has a button that produces NMI0 when pressed, so | ||
79 | this allows us to push the button, and then look at memory to see | ||
80 | what's in the registers (there's no other way to easily do so). | ||
81 | We have to use `setup_irq' instead of `request_irq' because it's | ||
82 | still too early to do memory allocation. */ | ||
83 | setup_irq (IRQ_NMI (0), ®_snap_action); | ||
84 | } | ||
85 | |||
86 | void mach_get_physical_ram (unsigned long *ram_start, unsigned long *ram_len) | ||
87 | { | ||
88 | *ram_start = ERAM_ADDR; | ||
89 | *ram_len = ERAM_SIZE; | ||
90 | } | ||
91 | |||
92 | void __init mach_sched_init (struct irqaction *timer_action) | ||
93 | { | ||
94 | /* Setup up the timer interrupt. The FPGA peripheral control | ||
95 | registers _only_ work with single-bit writes (set1/clr1)! */ | ||
96 | __clear_bit (RPU_GTMC_CE_BIT, &RPU_GTMC); | ||
97 | __clear_bit (RPU_GTMC_CLK_BIT, &RPU_GTMC); | ||
98 | __set_bit (RPU_GTMC_CE_BIT, &RPU_GTMC); | ||
99 | |||
100 | /* We use the first RPU interrupt, which occurs every 8.192ms. */ | ||
101 | setup_irq (IRQ_RPU (0), timer_action); | ||
102 | } | ||
103 | |||
104 | |||
105 | void mach_gettimeofday (struct timespec *tv) | ||
106 | { | ||
107 | tv->tv_sec = 0; | ||
108 | tv->tv_nsec = 0; | ||
109 | } | ||
110 | |||
111 | void machine_halt (void) __attribute__ ((noreturn)); | ||
112 | void machine_halt (void) | ||
113 | { | ||
114 | for (;;) { | ||
115 | DWC(0) = 0x7777; | ||
116 | DWC(1) = 0x7777; | ||
117 | ASC = 0xffff; | ||
118 | FLGREG(0) = 1; /* Halt immediately. */ | ||
119 | asm ("di; halt; nop; nop; nop; nop; nop"); | ||
120 | } | ||
121 | } | ||
122 | |||
123 | void machine_restart (char *__unused) | ||
124 | { | ||
125 | machine_halt (); | ||
126 | } | ||
127 | |||
128 | void machine_power_off (void) | ||
129 | { | ||
130 | machine_halt (); | ||
131 | } | ||
132 | |||
133 | |||
134 | /* Interrupts */ | ||
135 | |||
136 | struct v850e_intc_irq_init irq_inits[] = { | ||
137 | { "IRQ", 0, NUM_MACH_IRQS, 1, 7 }, | ||
138 | { "RPU", IRQ_RPU(0), IRQ_RPU_NUM, 1, 6 }, | ||
139 | { 0 } | ||
140 | }; | ||
141 | #define NUM_IRQ_INITS (ARRAY_SIZE(irq_inits) - 1) | ||
142 | |||
143 | struct hw_interrupt_type hw_itypes[NUM_IRQ_INITS]; | ||
144 | |||
145 | /* Initialize interrupts. */ | ||
146 | void __init mach_init_irqs (void) | ||
147 | { | ||
148 | v850e_intc_init_irq_types (irq_inits, hw_itypes); | ||
149 | } | ||
150 | |||
151 | |||
152 | /* An interrupt handler that copies the registers to a known memory location, | ||
153 | for debugging purposes. */ | ||
154 | |||
155 | static void make_reg_snap (int irq, void *dummy, struct pt_regs *regs) | ||
156 | { | ||
157 | (*(unsigned *)REG_DUMP_ADDR)++; | ||
158 | (*(struct pt_regs *)(REG_DUMP_ADDR + sizeof (unsigned))) = *regs; | ||
159 | } | ||
160 | |||
161 | static int reg_snap_dev_id; | ||
162 | static struct irqaction reg_snap_action = { | ||
163 | .handler = make_reg_snap, | ||
164 | .mask = CPU_MASK_NONE, | ||
165 | .name = "reg_snap", | ||
166 | .dev_id = ®_snap_dev_id, | ||
167 | }; | ||
diff --git a/arch/v850/kernel/fpga85e2c.ld b/arch/v850/kernel/fpga85e2c.ld deleted file mode 100644 index b5d4578ae411..000000000000 --- a/arch/v850/kernel/fpga85e2c.ld +++ /dev/null | |||
@@ -1,62 +0,0 @@ | |||
1 | /* Linker script for the FPGA implementation of the V850E2 NA85E2C cpu core | ||
2 | (CONFIG_V850E2_FPGA85E2C). */ | ||
3 | |||
4 | MEMORY { | ||
5 | /* Reset vector. */ | ||
6 | RESET : ORIGIN = 0, LENGTH = 0x10 | ||
7 | /* Interrupt vectors. */ | ||
8 | INTV : ORIGIN = 0x10, LENGTH = 0x470 | ||
9 | /* The `window' in RAM were we're allowed to load stuff. */ | ||
10 | RAM_LOW : ORIGIN = 0x480, LENGTH = 0x0005FB80 | ||
11 | /* Some more ram above the window were we can put bss &c. */ | ||
12 | RAM_HIGH : ORIGIN = 0x00060000, LENGTH = 0x000A0000 | ||
13 | /* This is the area visible from the outside world (we can use | ||
14 | this only for uninitialized data). */ | ||
15 | VISIBLE : ORIGIN = 0x00200000, LENGTH = 0x00060000 | ||
16 | } | ||
17 | |||
18 | SECTIONS { | ||
19 | .reset : { | ||
20 | __kram_start = . ; | ||
21 | __intv_start = . ; | ||
22 | *(.intv.reset) /* Reset vector */ | ||
23 | } > RESET | ||
24 | |||
25 | .ram_low : { | ||
26 | __r0_ram = . ; /* Must be near address 0. */ | ||
27 | . = . + 32 ; | ||
28 | |||
29 | TEXT_CONTENTS | ||
30 | DATA_CONTENTS | ||
31 | ROOT_FS_CONTENTS | ||
32 | RAMK_INIT_CONTENTS_NO_END | ||
33 | INITRAMFS_CONTENTS | ||
34 | } > RAM_LOW | ||
35 | |||
36 | /* Where the interrupt vectors are initially loaded. */ | ||
37 | __intv_load_start = . ; | ||
38 | |||
39 | .intv : { | ||
40 | *(.intv.common) /* Vectors common to all v850e proc. */ | ||
41 | *(.intv.mach) /* Machine-specific int. vectors. */ | ||
42 | __intv_end = . ; | ||
43 | } > INTV AT> RAM_LOW | ||
44 | |||
45 | .ram_high : { | ||
46 | /* This is here so that when we free init memory the | ||
47 | load-time copy of the interrupt vectors and any empty | ||
48 | space at the end of the `RAM_LOW' area is freed too. */ | ||
49 | . = ALIGN (4096); | ||
50 | __init_end = . ; | ||
51 | |||
52 | BSS_CONTENTS | ||
53 | __kram_end = . ; | ||
54 | BOOTMAP_CONTENTS | ||
55 | } > RAM_HIGH | ||
56 | |||
57 | .visible : { | ||
58 | _memcons_output = . ; | ||
59 | . = . + 0x8000 ; | ||
60 | _memcons_output_end = . ; | ||
61 | } > VISIBLE | ||
62 | } | ||
diff --git a/arch/v850/kernel/gbus_int.c b/arch/v850/kernel/gbus_int.c deleted file mode 100644 index b2bcc251f65b..000000000000 --- a/arch/v850/kernel/gbus_int.c +++ /dev/null | |||
@@ -1,271 +0,0 @@ | |||
1 | /* | ||
2 | * arch/v850/kernel/gbus_int.c -- Midas labs GBUS interrupt support | ||
3 | * | ||
4 | * Copyright (C) 2001,02,03 NEC Electronics Corporation | ||
5 | * Copyright (C) 2001,02,03 Miles Bader <miles@gnu.org> | ||
6 | * | ||
7 | * This file is subject to the terms and conditions of the GNU General | ||
8 | * Public License. See the file COPYING in the main directory of this | ||
9 | * archive for more details. | ||
10 | * | ||
11 | * Written by Miles Bader <miles@gnu.org> | ||
12 | */ | ||
13 | |||
14 | #include <linux/types.h> | ||
15 | #include <linux/init.h> | ||
16 | #include <linux/irq.h> | ||
17 | #include <linux/interrupt.h> | ||
18 | #include <linux/signal.h> | ||
19 | #include <linux/kernel.h> | ||
20 | |||
21 | #include <asm/machdep.h> | ||
22 | |||
23 | |||
24 | /* The number of shared GINT interrupts. */ | ||
25 | #define NUM_GINTS 4 | ||
26 | |||
27 | /* For each GINT interrupt, how many GBUS interrupts are using it. */ | ||
28 | static unsigned gint_num_active_irqs[NUM_GINTS] = { 0 }; | ||
29 | |||
30 | /* A table of GINTn interrupts we actually use. | ||
31 | Note that we don't use GINT0 because all the boards we support treat it | ||
32 | specially. */ | ||
33 | struct used_gint { | ||
34 | unsigned gint; | ||
35 | unsigned priority; | ||
36 | } used_gint[] = { | ||
37 | { 1, GBUS_INT_PRIORITY_HIGH }, | ||
38 | { 3, GBUS_INT_PRIORITY_LOW } | ||
39 | }; | ||
40 | #define NUM_USED_GINTS ARRAY_SIZE(used_gint) | ||
41 | |||
42 | /* A table of which GINT is used by each GBUS interrupts (they are | ||
43 | assigned based on priority). */ | ||
44 | static unsigned char gbus_int_gint[IRQ_GBUS_INT_NUM]; | ||
45 | |||
46 | |||
47 | /* Interrupt enabling/disabling. */ | ||
48 | |||
49 | /* Enable interrupt handling for interrupt IRQ. */ | ||
50 | void gbus_int_enable_irq (unsigned irq) | ||
51 | { | ||
52 | unsigned gint = gbus_int_gint[irq - GBUS_INT_BASE_IRQ]; | ||
53 | GBUS_INT_ENABLE (GBUS_INT_IRQ_WORD(irq), gint) | ||
54 | |= GBUS_INT_IRQ_MASK (irq); | ||
55 | } | ||
56 | |||
57 | /* Disable interrupt handling for interrupt IRQ. Note that any | ||
58 | interrupts received while disabled will be delivered once the | ||
59 | interrupt is enabled again, unless they are explicitly cleared using | ||
60 | `gbus_int_clear_pending_irq'. */ | ||
61 | void gbus_int_disable_irq (unsigned irq) | ||
62 | { | ||
63 | unsigned gint = gbus_int_gint[irq - GBUS_INT_BASE_IRQ]; | ||
64 | GBUS_INT_ENABLE (GBUS_INT_IRQ_WORD(irq), gint) | ||
65 | &= ~GBUS_INT_IRQ_MASK (irq); | ||
66 | } | ||
67 | |||
68 | /* Return true if interrupt handling for interrupt IRQ is enabled. */ | ||
69 | int gbus_int_irq_enabled (unsigned irq) | ||
70 | { | ||
71 | unsigned gint = gbus_int_gint[irq - GBUS_INT_BASE_IRQ]; | ||
72 | return (GBUS_INT_ENABLE (GBUS_INT_IRQ_WORD(irq), gint) | ||
73 | & GBUS_INT_IRQ_MASK(irq)); | ||
74 | } | ||
75 | |||
76 | /* Disable all GBUS irqs. */ | ||
77 | void gbus_int_disable_irqs () | ||
78 | { | ||
79 | unsigned w, n; | ||
80 | for (w = 0; w < GBUS_INT_NUM_WORDS; w++) | ||
81 | for (n = 0; n < IRQ_GINT_NUM; n++) | ||
82 | GBUS_INT_ENABLE (w, n) = 0; | ||
83 | } | ||
84 | |||
85 | /* Clear any pending interrupts for IRQ. */ | ||
86 | void gbus_int_clear_pending_irq (unsigned irq) | ||
87 | { | ||
88 | GBUS_INT_CLEAR (GBUS_INT_IRQ_WORD(irq)) = GBUS_INT_IRQ_MASK (irq); | ||
89 | } | ||
90 | |||
91 | /* Return true if interrupt IRQ is pending (but disabled). */ | ||
92 | int gbus_int_irq_pending (unsigned irq) | ||
93 | { | ||
94 | return (GBUS_INT_STATUS (GBUS_INT_IRQ_WORD(irq)) | ||
95 | & GBUS_INT_IRQ_MASK(irq)); | ||
96 | } | ||
97 | |||
98 | |||
99 | /* Delegating interrupts. */ | ||
100 | |||
101 | /* Handle a shared GINT interrupt by passing to the appropriate GBUS | ||
102 | interrupt handler. */ | ||
103 | static irqreturn_t gbus_int_handle_irq (int irq, void *dev_id, | ||
104 | struct pt_regs *regs) | ||
105 | { | ||
106 | unsigned w; | ||
107 | irqreturn_t rval = IRQ_NONE; | ||
108 | unsigned gint = irq - IRQ_GINT (0); | ||
109 | |||
110 | for (w = 0; w < GBUS_INT_NUM_WORDS; w++) { | ||
111 | unsigned status = GBUS_INT_STATUS (w); | ||
112 | unsigned enable = GBUS_INT_ENABLE (w, gint); | ||
113 | |||
114 | /* Only pay attention to enabled interrupts. */ | ||
115 | status &= enable; | ||
116 | if (status) { | ||
117 | irq = IRQ_GBUS_INT (w * GBUS_INT_BITS_PER_WORD); | ||
118 | do { | ||
119 | /* There's an active interrupt in word | ||
120 | W, find out which one, and call its | ||
121 | handler. */ | ||
122 | |||
123 | while (! (status & 0x1)) { | ||
124 | irq++; | ||
125 | status >>= 1; | ||
126 | } | ||
127 | status &= ~0x1; | ||
128 | |||
129 | /* Recursively call handle_irq to handle it. */ | ||
130 | handle_irq (irq, regs); | ||
131 | rval = IRQ_HANDLED; | ||
132 | } while (status); | ||
133 | } | ||
134 | } | ||
135 | |||
136 | /* Toggle the `all enable' bit back and forth, which should cause | ||
137 | another edge transition if there are any other interrupts | ||
138 | still pending, and so result in another CPU interrupt. */ | ||
139 | GBUS_INT_ENABLE (0, gint) &= ~0x1; | ||
140 | GBUS_INT_ENABLE (0, gint) |= 0x1; | ||
141 | |||
142 | return rval; | ||
143 | } | ||
144 | |||
145 | |||
146 | /* Initialize GBUS interrupt sources. */ | ||
147 | |||
148 | static void irq_nop (unsigned irq) { } | ||
149 | |||
150 | static unsigned gbus_int_startup_irq (unsigned irq) | ||
151 | { | ||
152 | unsigned gint = gbus_int_gint[irq - GBUS_INT_BASE_IRQ]; | ||
153 | |||
154 | if (gint_num_active_irqs[gint] == 0) { | ||
155 | /* First enable the CPU interrupt. */ | ||
156 | int rval = | ||
157 | request_irq (IRQ_GINT(gint), gbus_int_handle_irq, | ||
158 | IRQF_DISABLED, | ||
159 | "gbus_int_handler", | ||
160 | &gint_num_active_irqs[gint]); | ||
161 | if (rval != 0) | ||
162 | return rval; | ||
163 | } | ||
164 | |||
165 | gint_num_active_irqs[gint]++; | ||
166 | |||
167 | gbus_int_clear_pending_irq (irq); | ||
168 | gbus_int_enable_irq (irq); | ||
169 | |||
170 | return 0; | ||
171 | } | ||
172 | |||
173 | static void gbus_int_shutdown_irq (unsigned irq) | ||
174 | { | ||
175 | unsigned gint = gbus_int_gint[irq - GBUS_INT_BASE_IRQ]; | ||
176 | |||
177 | gbus_int_disable_irq (irq); | ||
178 | |||
179 | if (--gint_num_active_irqs[gint] == 0) | ||
180 | /* Disable the CPU interrupt. */ | ||
181 | free_irq (IRQ_GINT(gint), &gint_num_active_irqs[gint]); | ||
182 | } | ||
183 | |||
184 | /* Initialize HW_IRQ_TYPES for INTC-controlled irqs described in array | ||
185 | INITS (which is terminated by an entry with the name field == 0). */ | ||
186 | void __init gbus_int_init_irq_types (struct gbus_int_irq_init *inits, | ||
187 | struct hw_interrupt_type *hw_irq_types) | ||
188 | { | ||
189 | struct gbus_int_irq_init *init; | ||
190 | for (init = inits; init->name; init++) { | ||
191 | unsigned i; | ||
192 | struct hw_interrupt_type *hwit = hw_irq_types++; | ||
193 | |||
194 | hwit->typename = init->name; | ||
195 | |||
196 | hwit->startup = gbus_int_startup_irq; | ||
197 | hwit->shutdown = gbus_int_shutdown_irq; | ||
198 | hwit->enable = gbus_int_enable_irq; | ||
199 | hwit->disable = gbus_int_disable_irq; | ||
200 | hwit->ack = irq_nop; | ||
201 | hwit->end = irq_nop; | ||
202 | |||
203 | /* Initialize kernel IRQ infrastructure for this interrupt. */ | ||
204 | init_irq_handlers(init->base, init->num, init->interval, hwit); | ||
205 | |||
206 | /* Set the interrupt priorities. */ | ||
207 | for (i = 0; i < init->num; i++) { | ||
208 | unsigned j; | ||
209 | for (j = 0; j < NUM_USED_GINTS; j++) | ||
210 | if (used_gint[j].priority > init->priority) | ||
211 | break; | ||
212 | /* Wherever we stopped looking is one past the | ||
213 | GINT we want. */ | ||
214 | gbus_int_gint[init->base + i * init->interval | ||
215 | - GBUS_INT_BASE_IRQ] | ||
216 | = used_gint[j > 0 ? j - 1 : 0].gint; | ||
217 | } | ||
218 | } | ||
219 | } | ||
220 | |||
221 | |||
222 | /* Initialize IRQS. */ | ||
223 | |||
224 | /* Chip interrupts (GINTn) shared among GBUS interrupts. */ | ||
225 | static struct hw_interrupt_type gint_hw_itypes[NUM_USED_GINTS]; | ||
226 | |||
227 | |||
228 | /* GBUS interrupts themselves. */ | ||
229 | |||
230 | struct gbus_int_irq_init gbus_irq_inits[] __initdata = { | ||
231 | /* First set defaults. */ | ||
232 | { "GBUS_INT", IRQ_GBUS_INT(0), IRQ_GBUS_INT_NUM, 1, 6}, | ||
233 | { 0 } | ||
234 | }; | ||
235 | #define NUM_GBUS_IRQ_INITS (ARRAY_SIZE(gbus_irq_inits) - 1) | ||
236 | |||
237 | static struct hw_interrupt_type gbus_hw_itypes[NUM_GBUS_IRQ_INITS]; | ||
238 | |||
239 | |||
240 | /* Initialize GBUS interrupts. */ | ||
241 | void __init gbus_int_init_irqs (void) | ||
242 | { | ||
243 | unsigned i; | ||
244 | |||
245 | /* First initialize the shared gint interrupts. */ | ||
246 | for (i = 0; i < NUM_USED_GINTS; i++) { | ||
247 | unsigned gint = used_gint[i].gint; | ||
248 | struct v850e_intc_irq_init gint_irq_init[2]; | ||
249 | |||
250 | /* We initialize one GINT interrupt at a time. */ | ||
251 | gint_irq_init[0].name = "GINT"; | ||
252 | gint_irq_init[0].base = IRQ_GINT (gint); | ||
253 | gint_irq_init[0].num = 1; | ||
254 | gint_irq_init[0].interval = 1; | ||
255 | gint_irq_init[0].priority = used_gint[i].priority; | ||
256 | |||
257 | gint_irq_init[1].name = 0; /* Terminate the vector. */ | ||
258 | |||
259 | v850e_intc_init_irq_types (gint_irq_init, gint_hw_itypes); | ||
260 | } | ||
261 | |||
262 | /* Then the GBUS interrupts. */ | ||
263 | gbus_int_disable_irqs (); | ||
264 | gbus_int_init_irq_types (gbus_irq_inits, gbus_hw_itypes); | ||
265 | /* Turn on the `all enable' bits, which are ANDed with | ||
266 | individual interrupt enable bits; we only want to bother with | ||
267 | the latter. They are the first bit in the first word of each | ||
268 | interrupt-enable area. */ | ||
269 | for (i = 0; i < NUM_USED_GINTS; i++) | ||
270 | GBUS_INT_ENABLE (0, used_gint[i].gint) = 0x1; | ||
271 | } | ||
diff --git a/arch/v850/kernel/head.S b/arch/v850/kernel/head.S deleted file mode 100644 index c490b937ef14..000000000000 --- a/arch/v850/kernel/head.S +++ /dev/null | |||
@@ -1,128 +0,0 @@ | |||
1 | /* | ||
2 | * arch/v850/kernel/head.S -- Lowest-level startup code | ||
3 | * | ||
4 | * Copyright (C) 2001,02,03 NEC Electronics Corporation | ||
5 | * Copyright (C) 2001,02,03 Miles Bader <miles@gnu.org> | ||
6 | * | ||
7 | * This file is subject to the terms and conditions of the GNU General | ||
8 | * Public License. See the file COPYING in the main directory of this | ||
9 | * archive for more details. | ||
10 | * | ||
11 | * Written by Miles Bader <miles@gnu.org> | ||
12 | */ | ||
13 | |||
14 | #include <asm/clinkage.h> | ||
15 | #include <asm/current.h> | ||
16 | #include <asm/entry.h> | ||
17 | #include <asm/thread_info.h> | ||
18 | #include <asm/irq.h> | ||
19 | |||
20 | |||
21 | /* Make a slightly more convenient alias for C_SYMBOL_NAME. */ | ||
22 | #define CSYM C_SYMBOL_NAME | ||
23 | |||
24 | |||
25 | .text | ||
26 | |||
27 | // Define `mach_early_init' as a weak symbol | ||
28 | .global CSYM(mach_early_init) | ||
29 | .weak CSYM(mach_early_init) | ||
30 | |||
31 | C_ENTRY(start): | ||
32 | // Make sure interrupts are turned off, just in case | ||
33 | di | ||
34 | |||
35 | #ifdef CONFIG_RESET_GUARD | ||
36 | // See if we got here via an unexpected reset | ||
37 | ld.w RESET_GUARD, r19 // Check current value of reset guard | ||
38 | mov RESET_GUARD_ACTIVE, r20 | ||
39 | cmp r19, r20 | ||
40 | bne 1f // Guard was not active | ||
41 | |||
42 | // If we get here, the reset guard was active. Load up some | ||
43 | // interesting values as arguments, and jump to the handler. | ||
44 | st.w r0, RESET_GUARD // Allow further resets to succeed | ||
45 | mov lp, r6 // Arg 0: return address | ||
46 | ld.b KM, r7 // Arg 1: kernel mode | ||
47 | mov sp, r9 // Arg 3: stack pointer | ||
48 | ld.w KSP, r19 // maybe switch to kernel stack | ||
49 | cmp r7, r0 // see if already in kernel mode | ||
50 | cmov z, r19, sp, sp // and switch to kernel stack if not | ||
51 | GET_CURRENT_TASK(r8) // Arg 2: task pointer | ||
52 | jr CSYM(unexpected_reset) | ||
53 | |||
54 | 1: st.w r20, RESET_GUARD // Turn on reset guard | ||
55 | #endif /* CONFIG_RESET_GUARD */ | ||
56 | |||
57 | // Setup a temporary stack for doing pre-initialization function calls. | ||
58 | // | ||
59 | // We can't use the initial kernel stack, because (1) it may be | ||
60 | // located in memory we're not allowed to touch, and (2) since | ||
61 | // it's in the data segment, calling memcpy to initialize that | ||
62 | // area from ROM will overwrite memcpy's return address. | ||
63 | mov hilo(CSYM(_init_stack_end) - 4), sp | ||
64 | |||
65 | // See if there's a platform-specific early-initialization routine | ||
66 | // defined; it's a weak symbol, so it will have an address of zero if | ||
67 | // there's not. | ||
68 | mov hilo(CSYM(mach_early_init)), r6 | ||
69 | cmp r6, r0 | ||
70 | bz 3f | ||
71 | |||
72 | // There is one, so call it. If this function is written in C, it | ||
73 | // should be very careful -- the stack pointer is valid, but very | ||
74 | // little else is (e.g., bss is not zeroed yet, and initialized data | ||
75 | // hasn't been). | ||
76 | jarl 2f, lp // first figure out return address | ||
77 | 2: add 3f - ., lp | ||
78 | jmp [r6] // do call | ||
79 | 3: | ||
80 | |||
81 | #ifdef CONFIG_ROM_KERNEL | ||
82 | // Copy the data area from ROM to RAM | ||
83 | mov hilo(CSYM(_rom_copy_dst_start)), r6 | ||
84 | mov hilo(CSYM(_rom_copy_src_start)), r7 | ||
85 | mov hilo(CSYM(_rom_copy_dst_end)), r8 | ||
86 | sub r6, r8 | ||
87 | jarl CSYM(memcpy), lp | ||
88 | #endif | ||
89 | |||
90 | // Load the initial thread's stack, and current task pointer (in r16) | ||
91 | mov hilo(CSYM(init_thread_union)), r19 | ||
92 | movea THREAD_SIZE, r19, sp | ||
93 | ld.w TI_TASK[r19], CURRENT_TASK | ||
94 | |||
95 | #ifdef CONFIG_TIME_BOOTUP | ||
96 | /* This stuff must come after mach_early_init, because interrupts may | ||
97 | not work until after its been called. */ | ||
98 | jarl CSYM(highres_timer_reset), lp | ||
99 | jarl CSYM(highres_timer_start), lp | ||
100 | #endif | ||
101 | |||
102 | // Kernel stack pointer save location | ||
103 | st.w sp, KSP | ||
104 | |||
105 | // Assert that we're in `kernel mode' | ||
106 | mov 1, r19 | ||
107 | st.w r19, KM | ||
108 | |||
109 | #ifdef CONFIG_ZERO_BSS | ||
110 | // Zero bss area, since we can't rely upon any loader to do so | ||
111 | mov hilo(CSYM(_sbss)), r6 | ||
112 | mov r0, r7 | ||
113 | mov hilo(CSYM(_ebss)), r8 | ||
114 | sub r6, r8 | ||
115 | jarl CSYM(memset), lp | ||
116 | #endif | ||
117 | |||
118 | // What happens if the main kernel function returns (it shouldn't) | ||
119 | mov hilo(CSYM(machine_halt)), lp | ||
120 | |||
121 | // Start the linux kernel. We use an indirect jump to get extra | ||
122 | // range, because on some platforms this initial startup code | ||
123 | // (and the associated platform-specific code in mach_early_init) | ||
124 | // are located far away from the main kernel, e.g. so that they | ||
125 | // can initialize RAM first and copy the kernel or something. | ||
126 | mov hilo(CSYM(start_kernel)), r12 | ||
127 | jmp [r12] | ||
128 | C_END(start) | ||
diff --git a/arch/v850/kernel/highres_timer.c b/arch/v850/kernel/highres_timer.c deleted file mode 100644 index b16ad1eaf966..000000000000 --- a/arch/v850/kernel/highres_timer.c +++ /dev/null | |||
@@ -1,132 +0,0 @@ | |||
1 | /* | ||
2 | * arch/v850/kernel/highres_timer.c -- High resolution timing routines | ||
3 | * | ||
4 | * Copyright (C) 2001,02,03 NEC Electronics Corporation | ||
5 | * Copyright (C) 2001,02,03 Miles Bader <miles@gnu.org> | ||
6 | * | ||
7 | * This file is subject to the terms and conditions of the GNU General | ||
8 | * Public License. See the file COPYING in the main directory of this | ||
9 | * archive for more details. | ||
10 | * | ||
11 | * Written by Miles Bader <miles@gnu.org> | ||
12 | */ | ||
13 | |||
14 | #include <asm/system.h> | ||
15 | #include <asm/v850e_timer_d.h> | ||
16 | #include <asm/highres_timer.h> | ||
17 | |||
18 | #define HIGHRES_TIMER_USEC_SHIFT 12 | ||
19 | |||
20 | /* Pre-calculated constant used for converting ticks to real time | ||
21 | units. We initialize it to prevent it being put into BSS. */ | ||
22 | static u32 highres_timer_usec_prescale = 1; | ||
23 | |||
24 | void highres_timer_slow_tick_irq (void) __attribute__ ((noreturn)); | ||
25 | void highres_timer_slow_tick_irq (void) | ||
26 | { | ||
27 | /* This is an interrupt handler, so it must be very careful to | ||
28 | not to trash any registers. At this point, the stack-pointer | ||
29 | (r3) has been saved in the chip ram location ENTRY_SP by the | ||
30 | interrupt vector, so we can use it as a scratch register; we | ||
31 | must also restore it before returning. */ | ||
32 | asm ("ld.w %0[r0], sp;" | ||
33 | "add 1, sp;" | ||
34 | "st.w sp, %0[r0];" | ||
35 | "ld.w %1[r0], sp;" /* restore pre-irq stack-pointer */ | ||
36 | "reti" | ||
37 | :: | ||
38 | "i" (HIGHRES_TIMER_SLOW_TICKS_ADDR), | ||
39 | "i" (ENTRY_SP_ADDR) | ||
40 | : "memory"); | ||
41 | } | ||
42 | |||
43 | void highres_timer_reset (void) | ||
44 | { | ||
45 | V850E_TIMER_D_TMD (HIGHRES_TIMER_TIMER_D_UNIT) = 0; | ||
46 | HIGHRES_TIMER_SLOW_TICKS = 0; | ||
47 | } | ||
48 | |||
49 | void highres_timer_start (void) | ||
50 | { | ||
51 | u32 fast_tick_rate; | ||
52 | |||
53 | /* Start hardware timer. */ | ||
54 | v850e_timer_d_configure (HIGHRES_TIMER_TIMER_D_UNIT, | ||
55 | HIGHRES_TIMER_SLOW_TICK_RATE); | ||
56 | |||
57 | fast_tick_rate = | ||
58 | (V850E_TIMER_D_BASE_FREQ | ||
59 | >> V850E_TIMER_D_DIVLOG2 (HIGHRES_TIMER_TIMER_D_UNIT)); | ||
60 | |||
61 | /* The obvious way of calculating microseconds from fast ticks | ||
62 | is to do: | ||
63 | |||
64 | usec = fast_ticks * 10^6 / fast_tick_rate | ||
65 | |||
66 | However, divisions are much slower than multiplications, and | ||
67 | the above calculation can overflow, so we do this instead: | ||
68 | |||
69 | usec = fast_ticks * (10^6 * 2^12 / fast_tick_rate) / 2^12 | ||
70 | |||
71 | since we can pre-calculate (10^6 * (2^12 / fast_tick_rate)) | ||
72 | and use a shift for dividing by 2^12, this avoids division, | ||
73 | and is almost as accurate (it differs by about 2 microseconds | ||
74 | at the extreme value of the fast-tick counter's ranger). */ | ||
75 | highres_timer_usec_prescale = ((1000000 << HIGHRES_TIMER_USEC_SHIFT) | ||
76 | / fast_tick_rate); | ||
77 | |||
78 | /* Enable the interrupt (which is hardwired to this use), and | ||
79 | give it the highest priority. */ | ||
80 | V850E_INTC_IC (IRQ_INTCMD (HIGHRES_TIMER_TIMER_D_UNIT)) = 0; | ||
81 | } | ||
82 | |||
83 | void highres_timer_stop (void) | ||
84 | { | ||
85 | /* Stop the timer. */ | ||
86 | V850E_TIMER_D_TMCD (HIGHRES_TIMER_TIMER_D_UNIT) = | ||
87 | V850E_TIMER_D_TMCD_CAE; | ||
88 | /* Disable its interrupt, just in case. */ | ||
89 | v850e_intc_disable_irq (IRQ_INTCMD (HIGHRES_TIMER_TIMER_D_UNIT)); | ||
90 | } | ||
91 | |||
92 | inline void highres_timer_read_ticks (u32 *slow_ticks, u32 *fast_ticks) | ||
93 | { | ||
94 | int flags; | ||
95 | u32 fast_ticks_1, fast_ticks_2, _slow_ticks; | ||
96 | |||
97 | local_irq_save (flags); | ||
98 | fast_ticks_1 = V850E_TIMER_D_TMD (HIGHRES_TIMER_TIMER_D_UNIT); | ||
99 | _slow_ticks = HIGHRES_TIMER_SLOW_TICKS; | ||
100 | fast_ticks_2 = V850E_TIMER_D_TMD (HIGHRES_TIMER_TIMER_D_UNIT); | ||
101 | local_irq_restore (flags); | ||
102 | |||
103 | if (fast_ticks_2 < fast_ticks_1) | ||
104 | _slow_ticks++; | ||
105 | |||
106 | *slow_ticks = _slow_ticks; | ||
107 | *fast_ticks = fast_ticks_2; | ||
108 | } | ||
109 | |||
110 | inline void highres_timer_ticks_to_timeval (u32 slow_ticks, u32 fast_ticks, | ||
111 | struct timeval *tv) | ||
112 | { | ||
113 | unsigned long sec, sec_rem, usec; | ||
114 | |||
115 | usec = ((fast_ticks * highres_timer_usec_prescale) | ||
116 | >> HIGHRES_TIMER_USEC_SHIFT); | ||
117 | |||
118 | sec = slow_ticks / HIGHRES_TIMER_SLOW_TICK_RATE; | ||
119 | sec_rem = slow_ticks % HIGHRES_TIMER_SLOW_TICK_RATE; | ||
120 | |||
121 | usec += sec_rem * (1000000 / HIGHRES_TIMER_SLOW_TICK_RATE); | ||
122 | |||
123 | tv->tv_sec = sec; | ||
124 | tv->tv_usec = usec; | ||
125 | } | ||
126 | |||
127 | void highres_timer_read (struct timeval *tv) | ||
128 | { | ||
129 | u32 fast_ticks, slow_ticks; | ||
130 | highres_timer_read_ticks (&slow_ticks, &fast_ticks); | ||
131 | highres_timer_ticks_to_timeval (slow_ticks, fast_ticks, tv); | ||
132 | } | ||
diff --git a/arch/v850/kernel/init_task.c b/arch/v850/kernel/init_task.c deleted file mode 100644 index 44b274dff33f..000000000000 --- a/arch/v850/kernel/init_task.c +++ /dev/null | |||
@@ -1,48 +0,0 @@ | |||
1 | /* | ||
2 | * arch/v850/kernel/init_task.c -- Initial task/thread structures | ||
3 | * | ||
4 | * Copyright (C) 2002,03 NEC Electronics Corporation | ||
5 | * Copyright (C) 2002,03 Miles Bader <miles@gnu.org> | ||
6 | * | ||
7 | * This file is subject to the terms and conditions of the GNU General | ||
8 | * Public License. See the file COPYING in the main directory of this | ||
9 | * archive for more details. | ||
10 | */ | ||
11 | |||
12 | #include <linux/mm.h> | ||
13 | #include <linux/module.h> | ||
14 | #include <linux/sched.h> | ||
15 | #include <linux/init.h> | ||
16 | #include <linux/init_task.h> | ||
17 | #include <linux/fs.h> | ||
18 | #include <linux/mqueue.h> | ||
19 | |||
20 | #include <asm/uaccess.h> | ||
21 | #include <asm/pgtable.h> | ||
22 | |||
23 | static struct fs_struct init_fs = INIT_FS; | ||
24 | static struct signal_struct init_signals = INIT_SIGNALS (init_signals); | ||
25 | static struct sighand_struct init_sighand = INIT_SIGHAND(init_sighand); | ||
26 | struct mm_struct init_mm = INIT_MM (init_mm); | ||
27 | |||
28 | EXPORT_SYMBOL(init_mm); | ||
29 | |||
30 | /* | ||
31 | * Initial task structure. | ||
32 | * | ||
33 | * All other task structs will be allocated on slabs in fork.c | ||
34 | */ | ||
35 | struct task_struct init_task = INIT_TASK (init_task); | ||
36 | |||
37 | EXPORT_SYMBOL(init_task); | ||
38 | |||
39 | /* | ||
40 | * Initial thread structure. | ||
41 | * | ||
42 | * We need to make sure that this is 8192-byte aligned due to the | ||
43 | * way process stacks are handled. This is done by having a special | ||
44 | * "init_task" linker map entry. | ||
45 | */ | ||
46 | union thread_union init_thread_union | ||
47 | __attribute__((__section__(".data.init_task"))) = | ||
48 | { INIT_THREAD_INFO(init_task) }; | ||
diff --git a/arch/v850/kernel/intv.S b/arch/v850/kernel/intv.S deleted file mode 100644 index 671e4c6150dd..000000000000 --- a/arch/v850/kernel/intv.S +++ /dev/null | |||
@@ -1,87 +0,0 @@ | |||
1 | /* | ||
2 | * arch/v850/kernel/intv.S -- Interrupt vectors | ||
3 | * | ||
4 | * Copyright (C) 2001,02,03 NEC Electronics Corporation | ||
5 | * Copyright (C) 2001,02,03 Miles Bader <miles@gnu.org> | ||
6 | * | ||
7 | * This file is subject to the terms and conditions of the GNU General | ||
8 | * Public License. See the file COPYING in the main directory of this | ||
9 | * archive for more details. | ||
10 | * | ||
11 | * Written by Miles Bader <miles@gnu.org> | ||
12 | */ | ||
13 | |||
14 | #include <asm/clinkage.h> | ||
15 | #include <asm/irq.h> | ||
16 | #include <asm/machdep.h> | ||
17 | #include <asm/entry.h> | ||
18 | |||
19 | #ifdef CONFIG_V850E_HIGHRES_TIMER | ||
20 | #include <asm/highres_timer.h> | ||
21 | #endif | ||
22 | |||
23 | /* Jump to an interrupt/trap handler. These handlers (defined in entry.S) | ||
24 | expect the stack-pointer to be saved in ENTRY_SP, so we use sp to do an | ||
25 | indirect jump (which avoids problems when the handler is more than a signed | ||
26 | 22-bit offset away). */ | ||
27 | #define JUMP_TO_HANDLER(name, sp_save_loc) \ | ||
28 | st.w sp, sp_save_loc; \ | ||
29 | mov hilo(name), sp; \ | ||
30 | jmp [sp] | ||
31 | |||
32 | |||
33 | /* Reset vector. */ | ||
34 | .section .intv.reset, "ax" | ||
35 | .org 0x0 | ||
36 | mov hilo(C_SYMBOL_NAME(start)), r1; | ||
37 | jmp [r1] | ||
38 | |||
39 | |||
40 | /* Generic interrupt vectors. */ | ||
41 | .section .intv.common, "ax" | ||
42 | .balign 0x10 | ||
43 | JUMP_TO_HANDLER (nmi, NMI_ENTRY_SP) // 0x10 - NMI0 | ||
44 | .balign 0x10 | ||
45 | JUMP_TO_HANDLER (nmi, NMI_ENTRY_SP) // 0x20 - NMI1 | ||
46 | .balign 0x10 | ||
47 | JUMP_TO_HANDLER (nmi, NMI_ENTRY_SP) // 0x30 - NMI2 | ||
48 | |||
49 | .balign 0x10 | ||
50 | JUMP_TO_HANDLER (trap, ENTRY_SP) // 0x40 - TRAP0n | ||
51 | .balign 0x10 | ||
52 | JUMP_TO_HANDLER (trap, ENTRY_SP) // 0x50 - TRAP1n | ||
53 | |||
54 | .balign 0x10 | ||
55 | JUMP_TO_HANDLER (dbtrap, ENTRY_SP) // 0x60 - Illegal op / DBTRAP insn | ||
56 | |||
57 | |||
58 | /* Hardware interrupt vectors. */ | ||
59 | .section .intv.mach, "ax" | ||
60 | .org 0x0 | ||
61 | |||
62 | #if defined (CONFIG_V850E_HIGHRES_TIMER) && defined (IRQ_INTCMD) | ||
63 | |||
64 | /* Interrupts before the highres timer interrupt. */ | ||
65 | .rept IRQ_INTCMD (HIGHRES_TIMER_TIMER_D_UNIT) | ||
66 | .balign 0x10 | ||
67 | JUMP_TO_HANDLER (irq, ENTRY_SP) | ||
68 | .endr | ||
69 | |||
70 | /* The highres timer interrupt. */ | ||
71 | .balign 0x10 | ||
72 | JUMP_TO_HANDLER (C_SYMBOL_NAME (highres_timer_slow_tick_irq), ENTRY_SP) | ||
73 | |||
74 | /* Interrupts after the highres timer interrupt. */ | ||
75 | .rept NUM_CPU_IRQS - IRQ_INTCMD (HIGHRES_TIMER_TIMER_D_UNIT) - 1 | ||
76 | .balign 0x10 | ||
77 | JUMP_TO_HANDLER (irq, ENTRY_SP) | ||
78 | .endr | ||
79 | |||
80 | #else /* No highres timer */ | ||
81 | |||
82 | .rept NUM_CPU_IRQS | ||
83 | .balign 0x10 | ||
84 | JUMP_TO_HANDLER (irq, ENTRY_SP) | ||
85 | .endr | ||
86 | |||
87 | #endif /* Highres timer */ | ||
diff --git a/arch/v850/kernel/irq.c b/arch/v850/kernel/irq.c deleted file mode 100644 index 858c45819aab..000000000000 --- a/arch/v850/kernel/irq.c +++ /dev/null | |||
@@ -1,123 +0,0 @@ | |||
1 | /* | ||
2 | * arch/v850/kernel/irq.c -- High-level interrupt handling | ||
3 | * | ||
4 | * Copyright (C) 2001,02,03,04,05 NEC Electronics Corporation | ||
5 | * Copyright (C) 2001,02,03,04,05 Miles Bader <miles@gnu.org> | ||
6 | * Copyright (C) 1994-2000 Ralf Baechle | ||
7 | * Copyright (C) 1992 Linus Torvalds | ||
8 | * | ||
9 | * This file is subject to the terms and conditions of the GNU General | ||
10 | * Public License. See the file COPYING in the main directory of this | ||
11 | * archive for more details. | ||
12 | * | ||
13 | * This file was was derived from the mips version, arch/mips/kernel/irq.c | ||
14 | */ | ||
15 | |||
16 | #include <linux/kernel.h> | ||
17 | #include <linux/module.h> | ||
18 | #include <linux/irq.h> | ||
19 | #include <linux/init.h> | ||
20 | #include <linux/interrupt.h> | ||
21 | #include <linux/kernel_stat.h> | ||
22 | #include <linux/slab.h> | ||
23 | #include <linux/mm.h> | ||
24 | #include <linux/random.h> | ||
25 | #include <linux/seq_file.h> | ||
26 | |||
27 | #include <asm/system.h> | ||
28 | |||
29 | /* | ||
30 | * 'what should we do if we get a hw irq event on an illegal vector'. | ||
31 | * each architecture has to answer this themselves, it doesn't deserve | ||
32 | * a generic callback i think. | ||
33 | */ | ||
34 | void ack_bad_irq(unsigned int irq) | ||
35 | { | ||
36 | printk("received IRQ %d with unknown interrupt type\n", irq); | ||
37 | } | ||
38 | |||
39 | volatile unsigned long irq_err_count, spurious_count; | ||
40 | |||
41 | /* | ||
42 | * Generic, controller-independent functions: | ||
43 | */ | ||
44 | |||
45 | int show_interrupts(struct seq_file *p, void *v) | ||
46 | { | ||
47 | int irq = *(loff_t *) v; | ||
48 | |||
49 | if (irq == 0) { | ||
50 | int cpu; | ||
51 | seq_puts(p, " "); | ||
52 | for (cpu=0; cpu < 1 /*smp_num_cpus*/; cpu++) | ||
53 | seq_printf(p, "CPU%d ", cpu); | ||
54 | seq_putc(p, '\n'); | ||
55 | } | ||
56 | |||
57 | if (irq < NR_IRQS) { | ||
58 | unsigned long flags; | ||
59 | struct irqaction *action; | ||
60 | |||
61 | spin_lock_irqsave(&irq_desc[irq].lock, flags); | ||
62 | |||
63 | action = irq_desc[irq].action; | ||
64 | if (action) { | ||
65 | int j; | ||
66 | int count = 0; | ||
67 | int num = -1; | ||
68 | const char *type_name = irq_desc[irq].chip->typename; | ||
69 | |||
70 | for (j = 0; j < NR_IRQS; j++) | ||
71 | if (irq_desc[j].chip->typename == type_name){ | ||
72 | if (irq == j) | ||
73 | num = count; | ||
74 | count++; | ||
75 | } | ||
76 | |||
77 | seq_printf(p, "%3d: ",irq); | ||
78 | seq_printf(p, "%10u ", kstat_irqs(irq)); | ||
79 | if (count > 1) { | ||
80 | int prec = (num >= 100 ? 3 : num >= 10 ? 2 : 1); | ||
81 | seq_printf(p, " %*s%d", 14 - prec, | ||
82 | type_name, num); | ||
83 | } else | ||
84 | seq_printf(p, " %14s", type_name); | ||
85 | |||
86 | seq_printf(p, " %s", action->name); | ||
87 | for (action=action->next; action; action = action->next) | ||
88 | seq_printf(p, ", %s", action->name); | ||
89 | seq_putc(p, '\n'); | ||
90 | } | ||
91 | |||
92 | spin_unlock_irqrestore(&irq_desc[irq].lock, flags); | ||
93 | } else if (irq == NR_IRQS) | ||
94 | seq_printf(p, "ERR: %10lu\n", irq_err_count); | ||
95 | |||
96 | return 0; | ||
97 | } | ||
98 | |||
99 | /* Handle interrupt IRQ. REGS are the registers at the time of ther | ||
100 | interrupt. */ | ||
101 | unsigned int handle_irq (int irq, struct pt_regs *regs) | ||
102 | { | ||
103 | irq_enter(); | ||
104 | __do_IRQ(irq, regs); | ||
105 | irq_exit(); | ||
106 | return 1; | ||
107 | } | ||
108 | |||
109 | /* Initialize irq handling for IRQs. | ||
110 | BASE_IRQ, BASE_IRQ+INTERVAL, ..., BASE_IRQ+NUM*INTERVAL | ||
111 | to IRQ_TYPE. An IRQ_TYPE of 0 means to use a generic interrupt type. */ | ||
112 | void __init | ||
113 | init_irq_handlers (int base_irq, int num, int interval, | ||
114 | struct hw_interrupt_type *irq_type) | ||
115 | { | ||
116 | while (num-- > 0) { | ||
117 | irq_desc[base_irq].status = IRQ_DISABLED; | ||
118 | irq_desc[base_irq].action = NULL; | ||
119 | irq_desc[base_irq].depth = 1; | ||
120 | irq_desc[base_irq].chip = irq_type; | ||
121 | base_irq += interval; | ||
122 | } | ||
123 | } | ||
diff --git a/arch/v850/kernel/ma.c b/arch/v850/kernel/ma.c deleted file mode 100644 index 143774de75e1..000000000000 --- a/arch/v850/kernel/ma.c +++ /dev/null | |||
@@ -1,69 +0,0 @@ | |||
1 | /* | ||
2 | * arch/v850/kernel/ma.c -- V850E/MA series of cpu chips | ||
3 | * | ||
4 | * Copyright (C) 2001,02,03 NEC Electronics Corporation | ||
5 | * Copyright (C) 2001,02,03 Miles Bader <miles@gnu.org> | ||
6 | * | ||
7 | * This file is subject to the terms and conditions of the GNU General | ||
8 | * Public License. See the file COPYING in the main directory of this | ||
9 | * archive for more details. | ||
10 | * | ||
11 | * Written by Miles Bader <miles@gnu.org> | ||
12 | */ | ||
13 | |||
14 | #include <linux/kernel.h> | ||
15 | #include <linux/init.h> | ||
16 | #include <linux/mm.h> | ||
17 | #include <linux/swap.h> | ||
18 | #include <linux/bootmem.h> | ||
19 | #include <linux/irq.h> | ||
20 | |||
21 | #include <asm/atomic.h> | ||
22 | #include <asm/page.h> | ||
23 | #include <asm/machdep.h> | ||
24 | #include <asm/v850e_timer_d.h> | ||
25 | |||
26 | #include "mach.h" | ||
27 | |||
28 | void __init mach_sched_init (struct irqaction *timer_action) | ||
29 | { | ||
30 | /* Start hardware timer. */ | ||
31 | v850e_timer_d_configure (0, HZ); | ||
32 | /* Install timer interrupt handler. */ | ||
33 | setup_irq (IRQ_INTCMD(0), timer_action); | ||
34 | } | ||
35 | |||
36 | static struct v850e_intc_irq_init irq_inits[] = { | ||
37 | { "IRQ", 0, NUM_MACH_IRQS, 1, 7 }, | ||
38 | { "CMD", IRQ_INTCMD(0), IRQ_INTCMD_NUM, 1, 5 }, | ||
39 | { "DMA", IRQ_INTDMA(0), IRQ_INTDMA_NUM, 1, 2 }, | ||
40 | { "CSI", IRQ_INTCSI(0), IRQ_INTCSI_NUM, 4, 4 }, | ||
41 | { "SER", IRQ_INTSER(0), IRQ_INTSER_NUM, 4, 3 }, | ||
42 | { "SR", IRQ_INTSR(0), IRQ_INTSR_NUM, 4, 4 }, | ||
43 | { "ST", IRQ_INTST(0), IRQ_INTST_NUM, 4, 5 }, | ||
44 | { 0 } | ||
45 | }; | ||
46 | #define NUM_IRQ_INITS (ARRAY_SIZE(irq_inits) - 1) | ||
47 | |||
48 | static struct hw_interrupt_type hw_itypes[NUM_IRQ_INITS]; | ||
49 | |||
50 | /* Initialize MA chip interrupts. */ | ||
51 | void __init ma_init_irqs (void) | ||
52 | { | ||
53 | v850e_intc_init_irq_types (irq_inits, hw_itypes); | ||
54 | } | ||
55 | |||
56 | /* Called before configuring an on-chip UART. */ | ||
57 | void ma_uart_pre_configure (unsigned chan, unsigned cflags, unsigned baud) | ||
58 | { | ||
59 | /* We only know about the first two UART channels (though | ||
60 | specific chips may have more). */ | ||
61 | if (chan < 2) { | ||
62 | unsigned bits = 0x3 << (chan * 3); | ||
63 | /* Specify that the relevant pins on the chip should do | ||
64 | serial I/O, not direct I/O. */ | ||
65 | MA_PORT4_PMC |= bits; | ||
66 | /* Specify that we're using the UART, not the CSI device. */ | ||
67 | MA_PORT4_PFC |= bits; | ||
68 | } | ||
69 | } | ||
diff --git a/arch/v850/kernel/mach.c b/arch/v850/kernel/mach.c deleted file mode 100644 index b9db278d2b71..000000000000 --- a/arch/v850/kernel/mach.c +++ /dev/null | |||
@@ -1,17 +0,0 @@ | |||
1 | /* | ||
2 | * arch/v850/kernel/mach.c -- Defaults for some things defined by "mach.h" | ||
3 | * | ||
4 | * Copyright (C) 2001 NEC Corporation | ||
5 | * Copyright (C) 2001 Miles Bader <miles@gnu.org> | ||
6 | * | ||
7 | * This file is subject to the terms and conditions of the GNU General | ||
8 | * Public License. See the file COPYING in the main directory of this | ||
9 | * archive for more details. | ||
10 | * | ||
11 | * Written by Miles Bader <miles@gnu.org> | ||
12 | */ | ||
13 | |||
14 | #include "mach.h" | ||
15 | |||
16 | /* Called with each timer tick, if non-zero. */ | ||
17 | void (*mach_tick)(void) = 0; | ||
diff --git a/arch/v850/kernel/mach.h b/arch/v850/kernel/mach.h deleted file mode 100644 index 9e0e4816ec56..000000000000 --- a/arch/v850/kernel/mach.h +++ /dev/null | |||
@@ -1,56 +0,0 @@ | |||
1 | /* | ||
2 | * arch/v850/kernel/mach.h -- Machine-dependent functions used by v850 port | ||
3 | * | ||
4 | * Copyright (C) 2001,02,03 NEC Electronics Corporation | ||
5 | * Copyright (C) 2001,02,03 Miles Bader <miles@gnu.org> | ||
6 | * | ||
7 | * This file is subject to the terms and conditions of the GNU General | ||
8 | * Public License. See the file COPYING in the main directory of this | ||
9 | * archive for more details. | ||
10 | * | ||
11 | * Written by Miles Bader <miles@gnu.org> | ||
12 | */ | ||
13 | |||
14 | #ifndef __V850_MACH_H__ | ||
15 | #define __V850_MACH_H__ | ||
16 | |||
17 | #include <linux/kernel.h> | ||
18 | #include <linux/time.h> | ||
19 | #include <linux/spinlock.h> | ||
20 | #include <linux/interrupt.h> | ||
21 | #include <linux/fs.h> | ||
22 | #include <linux/seq_file.h> | ||
23 | |||
24 | #include <asm/ptrace.h> | ||
25 | #include <asm/entry.h> | ||
26 | #include <asm/clinkage.h> | ||
27 | |||
28 | void mach_setup (char **cmdline); | ||
29 | void mach_gettimeofday (struct timespec *tv); | ||
30 | void mach_sched_init (struct irqaction *timer_action); | ||
31 | void mach_get_physical_ram (unsigned long *ram_start, unsigned long *ram_len); | ||
32 | void mach_init_irqs (void); | ||
33 | |||
34 | /* If defined, is called very early in the kernel initialization. The | ||
35 | stack pointer is valid, but very little has been initialized (e.g., | ||
36 | bss is not zeroed yet) when this is called, so care must taken. */ | ||
37 | void mach_early_init (void); | ||
38 | |||
39 | /* If defined, called after the bootmem allocator has been initialized, | ||
40 | to allow the platform-dependent code to reserve any areas of RAM that | ||
41 | the kernel shouldn't touch. */ | ||
42 | void mach_reserve_bootmem (void) __attribute__ ((__weak__)); | ||
43 | |||
44 | /* Called with each timer tick, if non-zero. */ | ||
45 | extern void (*mach_tick) (void); | ||
46 | |||
47 | /* The following establishes aliases for various mach_ functions to the | ||
48 | name by which the rest of the kernel calls them. These statements | ||
49 | should only have an effect in the file that defines the actual functions. */ | ||
50 | #define MACH_ALIAS(to, from) \ | ||
51 | asm (".global " macrology_stringify (C_SYMBOL_NAME (to)) ";" \ | ||
52 | macrology_stringify (C_SYMBOL_NAME (to)) \ | ||
53 | " = " macrology_stringify (C_SYMBOL_NAME (from))) | ||
54 | /* e.g.: MACH_ALIAS (kernel_name, arch_spec_name); */ | ||
55 | |||
56 | #endif /* __V850_MACH_H__ */ | ||
diff --git a/arch/v850/kernel/me2.c b/arch/v850/kernel/me2.c deleted file mode 100644 index 007115dc9ce0..000000000000 --- a/arch/v850/kernel/me2.c +++ /dev/null | |||
@@ -1,73 +0,0 @@ | |||
1 | /* | ||
2 | * arch/v850/kernel/me2.c -- V850E/ME2 chip-specific support | ||
3 | * | ||
4 | * Copyright (C) 2003 NEC Corporation | ||
5 | * Copyright (C) 2003 Miles Bader <miles@gnu.org> | ||
6 | * | ||
7 | * This file is subject to the terms and conditions of the GNU General | ||
8 | * Public License. See the file COPYING in the main directory of this | ||
9 | * archive for more details. | ||
10 | * | ||
11 | * Written by Miles Bader <miles@gnu.org> | ||
12 | */ | ||
13 | |||
14 | #include <linux/kernel.h> | ||
15 | #include <linux/init.h> | ||
16 | #include <linux/mm.h> | ||
17 | #include <linux/swap.h> | ||
18 | #include <linux/bootmem.h> | ||
19 | #include <linux/irq.h> | ||
20 | |||
21 | #include <asm/atomic.h> | ||
22 | #include <asm/page.h> | ||
23 | #include <asm/machdep.h> | ||
24 | #include <asm/v850e_timer_d.h> | ||
25 | |||
26 | #include "mach.h" | ||
27 | |||
28 | void __init mach_sched_init (struct irqaction *timer_action) | ||
29 | { | ||
30 | /* Start hardware timer. */ | ||
31 | v850e_timer_d_configure (0, HZ); | ||
32 | /* Install timer interrupt handler. */ | ||
33 | setup_irq (IRQ_INTCMD(0), timer_action); | ||
34 | } | ||
35 | |||
36 | static struct v850e_intc_irq_init irq_inits[] = { | ||
37 | { "IRQ", 0, NUM_CPU_IRQS, 1, 7 }, | ||
38 | { "INTP", IRQ_INTP(0), IRQ_INTP_NUM, 1, 5 }, | ||
39 | { "CMD", IRQ_INTCMD(0), IRQ_INTCMD_NUM, 1, 3 }, | ||
40 | { "UBTIRE", IRQ_INTUBTIRE(0), IRQ_INTUBTIRE_NUM, 5, 4 }, | ||
41 | { "UBTIR", IRQ_INTUBTIR(0), IRQ_INTUBTIR_NUM, 5, 4 }, | ||
42 | { "UBTIT", IRQ_INTUBTIT(0), IRQ_INTUBTIT_NUM, 5, 4 }, | ||
43 | { "UBTIF", IRQ_INTUBTIF(0), IRQ_INTUBTIF_NUM, 5, 4 }, | ||
44 | { "UBTITO", IRQ_INTUBTITO(0), IRQ_INTUBTITO_NUM, 5, 4 }, | ||
45 | { 0 } | ||
46 | }; | ||
47 | #define NUM_IRQ_INITS (ARRAY_SIZE(irq_inits) - 1) | ||
48 | |||
49 | static struct hw_interrupt_type hw_itypes[NUM_IRQ_INITS]; | ||
50 | |||
51 | /* Initialize V850E/ME2 chip interrupts. */ | ||
52 | void __init me2_init_irqs (void) | ||
53 | { | ||
54 | v850e_intc_init_irq_types (irq_inits, hw_itypes); | ||
55 | } | ||
56 | |||
57 | /* Called before configuring an on-chip UART. */ | ||
58 | void me2_uart_pre_configure (unsigned chan, unsigned cflags, unsigned baud) | ||
59 | { | ||
60 | if (chan == 0) { | ||
61 | /* Specify that the relevant pins on the chip should do | ||
62 | serial I/O, not direct I/O. */ | ||
63 | ME2_PORT1_PMC |= 0xC; | ||
64 | /* Specify that we're using the UART, not the CSI device. */ | ||
65 | ME2_PORT1_PFC |= 0xC; | ||
66 | } else if (chan == 1) { | ||
67 | /* Specify that the relevant pins on the chip should do | ||
68 | serial I/O, not direct I/O. */ | ||
69 | ME2_PORT2_PMC |= 0x6; | ||
70 | /* Specify that we're using the UART, not the CSI device. */ | ||
71 | ME2_PORT2_PFC |= 0x6; | ||
72 | } | ||
73 | } | ||
diff --git a/arch/v850/kernel/memcons.c b/arch/v850/kernel/memcons.c deleted file mode 100644 index 92f514fdcc79..000000000000 --- a/arch/v850/kernel/memcons.c +++ /dev/null | |||
@@ -1,135 +0,0 @@ | |||
1 | /* | ||
2 | * arch/v850/kernel/memcons.c -- Console I/O to a memory buffer | ||
3 | * | ||
4 | * Copyright (C) 2001,02 NEC Corporation | ||
5 | * Copyright (C) 2001,02 Miles Bader <miles@gnu.org> | ||
6 | * | ||
7 | * This file is subject to the terms and conditions of the GNU General | ||
8 | * Public License. See the file COPYING in the main directory of this | ||
9 | * archive for more details. | ||
10 | * | ||
11 | * Written by Miles Bader <miles@gnu.org> | ||
12 | */ | ||
13 | |||
14 | #include <linux/kernel.h> | ||
15 | #include <linux/console.h> | ||
16 | #include <linux/tty.h> | ||
17 | #include <linux/tty_driver.h> | ||
18 | #include <linux/init.h> | ||
19 | |||
20 | /* If this device is enabled, the linker map should define start and | ||
21 | end points for its buffer. */ | ||
22 | extern char memcons_output[], memcons_output_end; | ||
23 | |||
24 | /* Current offset into the buffer. */ | ||
25 | static unsigned long memcons_offs = 0; | ||
26 | |||
27 | /* Spinlock protecting memcons_offs. */ | ||
28 | static DEFINE_SPINLOCK(memcons_lock); | ||
29 | |||
30 | |||
31 | static size_t write (const char *buf, size_t len) | ||
32 | { | ||
33 | unsigned long flags; | ||
34 | char *point; | ||
35 | |||
36 | spin_lock_irqsave (memcons_lock, flags); | ||
37 | |||
38 | point = memcons_output + memcons_offs; | ||
39 | if (point + len >= &memcons_output_end) { | ||
40 | len = &memcons_output_end - point; | ||
41 | memcons_offs = 0; | ||
42 | } else | ||
43 | memcons_offs += len; | ||
44 | |||
45 | spin_unlock_irqrestore (memcons_lock, flags); | ||
46 | |||
47 | memcpy (point, buf, len); | ||
48 | |||
49 | return len; | ||
50 | } | ||
51 | |||
52 | |||
53 | /* Low-level console. */ | ||
54 | |||
55 | static void memcons_write (struct console *co, const char *buf, unsigned len) | ||
56 | { | ||
57 | while (len > 0) | ||
58 | len -= write (buf, len); | ||
59 | } | ||
60 | |||
61 | static struct tty_driver *tty_driver; | ||
62 | |||
63 | static struct tty_driver *memcons_device (struct console *co, int *index) | ||
64 | { | ||
65 | *index = co->index; | ||
66 | return tty_driver; | ||
67 | } | ||
68 | |||
69 | static struct console memcons = | ||
70 | { | ||
71 | .name = "memcons", | ||
72 | .write = memcons_write, | ||
73 | .device = memcons_device, | ||
74 | .flags = CON_PRINTBUFFER, | ||
75 | .index = -1, | ||
76 | }; | ||
77 | |||
78 | void memcons_setup (void) | ||
79 | { | ||
80 | register_console (&memcons); | ||
81 | printk (KERN_INFO "Console: static memory buffer (memcons)\n"); | ||
82 | } | ||
83 | |||
84 | /* Higher level TTY interface. */ | ||
85 | |||
86 | int memcons_tty_open (struct tty_struct *tty, struct file *filp) | ||
87 | { | ||
88 | return 0; | ||
89 | } | ||
90 | |||
91 | int memcons_tty_write (struct tty_struct *tty, const unsigned char *buf, int len) | ||
92 | { | ||
93 | return write (buf, len); | ||
94 | } | ||
95 | |||
96 | int memcons_tty_write_room (struct tty_struct *tty) | ||
97 | { | ||
98 | return &memcons_output_end - (memcons_output + memcons_offs); | ||
99 | } | ||
100 | |||
101 | int memcons_tty_chars_in_buffer (struct tty_struct *tty) | ||
102 | { | ||
103 | /* We have no buffer. */ | ||
104 | return 0; | ||
105 | } | ||
106 | |||
107 | static const struct tty_operations ops = { | ||
108 | .open = memcons_tty_open, | ||
109 | .write = memcons_tty_write, | ||
110 | .write_room = memcons_tty_write_room, | ||
111 | .chars_in_buffer = memcons_tty_chars_in_buffer, | ||
112 | }; | ||
113 | |||
114 | int __init memcons_tty_init (void) | ||
115 | { | ||
116 | int err; | ||
117 | struct tty_driver *driver = alloc_tty_driver(1); | ||
118 | if (!driver) | ||
119 | return -ENOMEM; | ||
120 | |||
121 | driver->name = "memcons"; | ||
122 | driver->major = TTY_MAJOR; | ||
123 | driver->minor_start = 64; | ||
124 | driver->type = TTY_DRIVER_TYPE_SYSCONS; | ||
125 | driver->init_termios = tty_std_termios; | ||
126 | tty_set_operations(driver, &ops); | ||
127 | err = tty_register_driver(driver); | ||
128 | if (err) { | ||
129 | put_tty_driver(driver); | ||
130 | return err; | ||
131 | } | ||
132 | tty_driver = driver; | ||
133 | return 0; | ||
134 | } | ||
135 | __initcall (memcons_tty_init); | ||
diff --git a/arch/v850/kernel/module.c b/arch/v850/kernel/module.c deleted file mode 100644 index 64aeb3e37c52..000000000000 --- a/arch/v850/kernel/module.c +++ /dev/null | |||
@@ -1,237 +0,0 @@ | |||
1 | /* | ||
2 | * arch/v850/kernel/module.c -- Architecture-specific module functions | ||
3 | * | ||
4 | * Copyright (C) 2002,03 NEC Electronics Corporation | ||
5 | * Copyright (C) 2002,03 Miles Bader <miles@gnu.org> | ||
6 | * Copyright (C) 2001,03 Rusty Russell | ||
7 | * | ||
8 | * This file is subject to the terms and conditions of the GNU General | ||
9 | * Public License. See the file COPYING in the main directory of this | ||
10 | * archive for more details. | ||
11 | * | ||
12 | * Written by Miles Bader <miles@gnu.org> | ||
13 | * | ||
14 | * Derived in part from arch/ppc/kernel/module.c | ||
15 | */ | ||
16 | |||
17 | #include <linux/kernel.h> | ||
18 | #include <linux/vmalloc.h> | ||
19 | #include <linux/moduleloader.h> | ||
20 | #include <linux/elf.h> | ||
21 | |||
22 | #if 0 | ||
23 | #define DEBUGP printk | ||
24 | #else | ||
25 | #define DEBUGP(fmt , ...) | ||
26 | #endif | ||
27 | |||
28 | void *module_alloc (unsigned long size) | ||
29 | { | ||
30 | return size == 0 ? 0 : vmalloc (size); | ||
31 | } | ||
32 | |||
33 | void module_free (struct module *mod, void *module_region) | ||
34 | { | ||
35 | vfree (module_region); | ||
36 | /* FIXME: If module_region == mod->init_region, trim exception | ||
37 | table entries. */ | ||
38 | } | ||
39 | |||
40 | int module_finalize (const Elf_Ehdr *hdr, const Elf_Shdr *sechdrs, | ||
41 | struct module *mod) | ||
42 | { | ||
43 | return 0; | ||
44 | } | ||
45 | |||
46 | /* Count how many different relocations (different symbol, different | ||
47 | addend) */ | ||
48 | static unsigned int count_relocs(const Elf32_Rela *rela, unsigned int num) | ||
49 | { | ||
50 | unsigned int i, j, ret = 0; | ||
51 | |||
52 | /* Sure, this is order(n^2), but it's usually short, and not | ||
53 | time critical */ | ||
54 | for (i = 0; i < num; i++) { | ||
55 | for (j = 0; j < i; j++) { | ||
56 | /* If this addend appeared before, it's | ||
57 | already been counted */ | ||
58 | if (ELF32_R_SYM(rela[i].r_info) | ||
59 | == ELF32_R_SYM(rela[j].r_info) | ||
60 | && rela[i].r_addend == rela[j].r_addend) | ||
61 | break; | ||
62 | } | ||
63 | if (j == i) ret++; | ||
64 | } | ||
65 | return ret; | ||
66 | } | ||
67 | |||
68 | /* Get the potential trampolines size required of the init and | ||
69 | non-init sections */ | ||
70 | static unsigned long get_plt_size(const Elf32_Ehdr *hdr, | ||
71 | const Elf32_Shdr *sechdrs, | ||
72 | const char *secstrings, | ||
73 | int is_init) | ||
74 | { | ||
75 | unsigned long ret = 0; | ||
76 | unsigned i; | ||
77 | |||
78 | /* Everything marked ALLOC (this includes the exported | ||
79 | symbols) */ | ||
80 | for (i = 1; i < hdr->e_shnum; i++) { | ||
81 | /* If it's called *.init*, and we're not init, we're | ||
82 | not interested */ | ||
83 | if ((strstr(secstrings + sechdrs[i].sh_name, ".init") != 0) | ||
84 | != is_init) | ||
85 | continue; | ||
86 | |||
87 | if (sechdrs[i].sh_type == SHT_RELA) { | ||
88 | DEBUGP("Found relocations in section %u\n", i); | ||
89 | DEBUGP("Ptr: %p. Number: %u\n", | ||
90 | (void *)hdr + sechdrs[i].sh_offset, | ||
91 | sechdrs[i].sh_size / sizeof(Elf32_Rela)); | ||
92 | ret += count_relocs((void *)hdr | ||
93 | + sechdrs[i].sh_offset, | ||
94 | sechdrs[i].sh_size | ||
95 | / sizeof(Elf32_Rela)) | ||
96 | * sizeof(struct v850_plt_entry); | ||
97 | } | ||
98 | } | ||
99 | |||
100 | return ret; | ||
101 | } | ||
102 | |||
103 | int module_frob_arch_sections(Elf32_Ehdr *hdr, | ||
104 | Elf32_Shdr *sechdrs, | ||
105 | char *secstrings, | ||
106 | struct module *me) | ||
107 | { | ||
108 | unsigned int i; | ||
109 | |||
110 | /* Find .plt and .pltinit sections */ | ||
111 | for (i = 0; i < hdr->e_shnum; i++) { | ||
112 | if (strcmp(secstrings + sechdrs[i].sh_name, ".init.plt") == 0) | ||
113 | me->arch.init_plt_section = i; | ||
114 | else if (strcmp(secstrings + sechdrs[i].sh_name, ".plt") == 0) | ||
115 | me->arch.core_plt_section = i; | ||
116 | } | ||
117 | if (!me->arch.core_plt_section || !me->arch.init_plt_section) { | ||
118 | printk("Module doesn't contain .plt or .plt.init sections.\n"); | ||
119 | return -ENOEXEC; | ||
120 | } | ||
121 | |||
122 | /* Override their sizes */ | ||
123 | sechdrs[me->arch.core_plt_section].sh_size | ||
124 | = get_plt_size(hdr, sechdrs, secstrings, 0); | ||
125 | sechdrs[me->arch.init_plt_section].sh_size | ||
126 | = get_plt_size(hdr, sechdrs, secstrings, 1); | ||
127 | return 0; | ||
128 | } | ||
129 | |||
130 | int apply_relocate (Elf32_Shdr *sechdrs, const char *strtab, | ||
131 | unsigned int symindex, unsigned int relsec, | ||
132 | struct module *mod) | ||
133 | { | ||
134 | printk ("Barf\n"); | ||
135 | return -ENOEXEC; | ||
136 | } | ||
137 | |||
138 | /* Set up a trampoline in the PLT to bounce us to the distant function */ | ||
139 | static uint32_t do_plt_call (void *location, Elf32_Addr val, | ||
140 | Elf32_Shdr *sechdrs, struct module *mod) | ||
141 | { | ||
142 | struct v850_plt_entry *entry; | ||
143 | /* Instructions used to do the indirect jump. */ | ||
144 | uint32_t tramp[2]; | ||
145 | |||
146 | /* We have to trash a register, so we assume that any control | ||
147 | transfer more than 21-bits away must be a function call | ||
148 | (so we can use a call-clobbered register). */ | ||
149 | tramp[0] = 0x0621 + ((val & 0xffff) << 16); /* mov sym, r1 ... */ | ||
150 | tramp[1] = ((val >> 16) & 0xffff) + 0x610000; /* ...; jmp r1 */ | ||
151 | |||
152 | /* Init, or core PLT? */ | ||
153 | if (location >= mod->module_core | ||
154 | && location < mod->module_core + mod->core_size) | ||
155 | entry = (void *)sechdrs[mod->arch.core_plt_section].sh_addr; | ||
156 | else | ||
157 | entry = (void *)sechdrs[mod->arch.init_plt_section].sh_addr; | ||
158 | |||
159 | /* Find this entry, or if that fails, the next avail. entry */ | ||
160 | while (entry->tramp[0]) | ||
161 | if (entry->tramp[0] == tramp[0] && entry->tramp[1] == tramp[1]) | ||
162 | return (uint32_t)entry; | ||
163 | else | ||
164 | entry++; | ||
165 | |||
166 | entry->tramp[0] = tramp[0]; | ||
167 | entry->tramp[1] = tramp[1]; | ||
168 | |||
169 | return (uint32_t)entry; | ||
170 | } | ||
171 | |||
172 | int apply_relocate_add (Elf32_Shdr *sechdrs, const char *strtab, | ||
173 | unsigned int symindex, unsigned int relsec, | ||
174 | struct module *mod) | ||
175 | { | ||
176 | unsigned int i; | ||
177 | Elf32_Rela *rela = (void *)sechdrs[relsec].sh_addr; | ||
178 | |||
179 | DEBUGP ("Applying relocate section %u to %u\n", relsec, | ||
180 | sechdrs[relsec].sh_info); | ||
181 | |||
182 | for (i = 0; i < sechdrs[relsec].sh_size / sizeof (*rela); i++) { | ||
183 | /* This is where to make the change */ | ||
184 | uint32_t *loc | ||
185 | = ((void *)sechdrs[sechdrs[relsec].sh_info].sh_addr | ||
186 | + rela[i].r_offset); | ||
187 | /* This is the symbol it is referring to. Note that all | ||
188 | undefined symbols have been resolved. */ | ||
189 | Elf32_Sym *sym | ||
190 | = ((Elf32_Sym *)sechdrs[symindex].sh_addr | ||
191 | + ELF32_R_SYM (rela[i].r_info)); | ||
192 | uint32_t val = sym->st_value + rela[i].r_addend; | ||
193 | |||
194 | switch (ELF32_R_TYPE (rela[i].r_info)) { | ||
195 | case R_V850_32: | ||
196 | /* We write two shorts instead of a long because even | ||
197 | 32-bit insns only need half-word alignment, but | ||
198 | 32-bit data writes need to be long-word aligned. */ | ||
199 | val += ((uint16_t *)loc)[0]; | ||
200 | val += ((uint16_t *)loc)[1] << 16; | ||
201 | ((uint16_t *)loc)[0] = val & 0xffff; | ||
202 | ((uint16_t *)loc)[1] = (val >> 16) & 0xffff; | ||
203 | break; | ||
204 | |||
205 | case R_V850_22_PCREL: | ||
206 | /* Maybe jump indirectly via a PLT table entry. */ | ||
207 | if ((int32_t)(val - (uint32_t)loc) > 0x1fffff | ||
208 | || (int32_t)(val - (uint32_t)loc) < -0x200000) | ||
209 | val = do_plt_call (loc, val, sechdrs, mod); | ||
210 | |||
211 | val -= (uint32_t)loc; | ||
212 | |||
213 | /* We write two shorts instead of a long because | ||
214 | even 32-bit insns only need half-word alignment, | ||
215 | but 32-bit data writes need to be long-word | ||
216 | aligned. */ | ||
217 | ((uint16_t *)loc)[0] = | ||
218 | (*(uint16_t *)loc & 0xffc0) /* opcode + reg */ | ||
219 | | ((val >> 16) & 0xffc03f); /* offs high */ | ||
220 | ((uint16_t *)loc)[1] = | ||
221 | (val & 0xffff); /* offs low */ | ||
222 | break; | ||
223 | |||
224 | default: | ||
225 | printk (KERN_ERR "module %s: Unknown reloc: %u\n", | ||
226 | mod->name, ELF32_R_TYPE (rela[i].r_info)); | ||
227 | return -ENOEXEC; | ||
228 | } | ||
229 | } | ||
230 | |||
231 | return 0; | ||
232 | } | ||
233 | |||
234 | void | ||
235 | module_arch_cleanup(struct module *mod) | ||
236 | { | ||
237 | } | ||
diff --git a/arch/v850/kernel/process.c b/arch/v850/kernel/process.c deleted file mode 100644 index e4a4b8e7d5a3..000000000000 --- a/arch/v850/kernel/process.c +++ /dev/null | |||
@@ -1,217 +0,0 @@ | |||
1 | /* | ||
2 | * arch/v850/kernel/process.c -- Arch-dependent process handling | ||
3 | * | ||
4 | * Copyright (C) 2001,02,03 NEC Electronics Corporation | ||
5 | * Copyright (C) 2001,02,03 Miles Bader <miles@gnu.org> | ||
6 | * | ||
7 | * This file is subject to the terms and conditions of the GNU General | ||
8 | * Public License. See the file COPYING in the main directory of this | ||
9 | * archive for more details. | ||
10 | * | ||
11 | * Written by Miles Bader <miles@gnu.org> | ||
12 | */ | ||
13 | |||
14 | #include <linux/errno.h> | ||
15 | #include <linux/sched.h> | ||
16 | #include <linux/kernel.h> | ||
17 | #include <linux/mm.h> | ||
18 | #include <linux/smp.h> | ||
19 | #include <linux/stddef.h> | ||
20 | #include <linux/unistd.h> | ||
21 | #include <linux/ptrace.h> | ||
22 | #include <linux/slab.h> | ||
23 | #include <linux/user.h> | ||
24 | #include <linux/a.out.h> | ||
25 | #include <linux/reboot.h> | ||
26 | |||
27 | #include <asm/uaccess.h> | ||
28 | #include <asm/system.h> | ||
29 | #include <asm/pgtable.h> | ||
30 | |||
31 | void (*pm_power_off)(void) = NULL; | ||
32 | EXPORT_SYMBOL(pm_power_off); | ||
33 | |||
34 | extern void ret_from_fork (void); | ||
35 | |||
36 | |||
37 | /* The idle loop. */ | ||
38 | static void default_idle (void) | ||
39 | { | ||
40 | while (! need_resched ()) | ||
41 | asm ("halt; nop; nop; nop; nop; nop" ::: "cc"); | ||
42 | } | ||
43 | |||
44 | void (*idle)(void) = default_idle; | ||
45 | |||
46 | /* | ||
47 | * The idle thread. There's no useful work to be | ||
48 | * done, so just try to conserve power and have a | ||
49 | * low exit latency (ie sit in a loop waiting for | ||
50 | * somebody to say that they'd like to reschedule) | ||
51 | */ | ||
52 | void cpu_idle (void) | ||
53 | { | ||
54 | /* endless idle loop with no priority at all */ | ||
55 | while (1) { | ||
56 | while (!need_resched()) | ||
57 | (*idle) (); | ||
58 | |||
59 | preempt_enable_no_resched(); | ||
60 | schedule(); | ||
61 | preempt_disable(); | ||
62 | } | ||
63 | } | ||
64 | |||
65 | /* | ||
66 | * This is the mechanism for creating a new kernel thread. | ||
67 | * | ||
68 | * NOTE! Only a kernel-only process (ie the swapper or direct descendants who | ||
69 | * haven't done an "execve()") should use this: it will work within a system | ||
70 | * call from a "real" process, but the process memory space will not be free'd | ||
71 | * until both the parent and the child have exited. | ||
72 | */ | ||
73 | int kernel_thread (int (*fn)(void *), void *arg, unsigned long flags) | ||
74 | { | ||
75 | register mm_segment_t fs = get_fs (); | ||
76 | register unsigned long syscall asm (SYSCALL_NUM); | ||
77 | register unsigned long arg0 asm (SYSCALL_ARG0); | ||
78 | register unsigned long ret asm (SYSCALL_RET); | ||
79 | |||
80 | set_fs (KERNEL_DS); | ||
81 | |||
82 | /* Clone this thread. Note that we don't pass the clone syscall's | ||
83 | second argument -- it's ignored for calls from kernel mode (the | ||
84 | child's SP is always set to the top of the kernel stack). */ | ||
85 | arg0 = flags | CLONE_VM; | ||
86 | syscall = __NR_clone; | ||
87 | asm volatile ("trap " SYSCALL_SHORT_TRAP | ||
88 | : "=r" (ret), "=r" (syscall) | ||
89 | : "1" (syscall), "r" (arg0) | ||
90 | : SYSCALL_SHORT_CLOBBERS); | ||
91 | |||
92 | if (ret == 0) { | ||
93 | /* In child thread, call FN and exit. */ | ||
94 | arg0 = (*fn) (arg); | ||
95 | syscall = __NR_exit; | ||
96 | asm volatile ("trap " SYSCALL_SHORT_TRAP | ||
97 | : "=r" (ret), "=r" (syscall) | ||
98 | : "1" (syscall), "r" (arg0) | ||
99 | : SYSCALL_SHORT_CLOBBERS); | ||
100 | } | ||
101 | |||
102 | /* In parent. */ | ||
103 | set_fs (fs); | ||
104 | |||
105 | return ret; | ||
106 | } | ||
107 | |||
108 | void flush_thread (void) | ||
109 | { | ||
110 | set_fs (USER_DS); | ||
111 | } | ||
112 | |||
113 | int copy_thread (int nr, unsigned long clone_flags, | ||
114 | unsigned long stack_start, unsigned long stack_size, | ||
115 | struct task_struct *p, struct pt_regs *regs) | ||
116 | { | ||
117 | /* Start pushing stuff from the top of the child's kernel stack. */ | ||
118 | unsigned long orig_ksp = task_tos(p); | ||
119 | unsigned long ksp = orig_ksp; | ||
120 | /* We push two `state save' stack fames (see entry.S) on the new | ||
121 | kernel stack: | ||
122 | 1) The innermost one is what switch_thread would have | ||
123 | pushed, and is used when we context switch to the child | ||
124 | thread for the first time. It's set up to return to | ||
125 | ret_from_fork in entry.S. | ||
126 | 2) The outermost one (nearest the top) is what a syscall | ||
127 | trap would have pushed, and is set up to return to the | ||
128 | same location as the parent thread, but with a return | ||
129 | value of 0. */ | ||
130 | struct pt_regs *child_switch_regs, *child_trap_regs; | ||
131 | |||
132 | /* Trap frame. */ | ||
133 | ksp -= STATE_SAVE_SIZE; | ||
134 | child_trap_regs = (struct pt_regs *)(ksp + STATE_SAVE_PT_OFFSET); | ||
135 | /* Switch frame. */ | ||
136 | ksp -= STATE_SAVE_SIZE; | ||
137 | child_switch_regs = (struct pt_regs *)(ksp + STATE_SAVE_PT_OFFSET); | ||
138 | |||
139 | /* First copy parent's register state to child. */ | ||
140 | *child_switch_regs = *regs; | ||
141 | *child_trap_regs = *regs; | ||
142 | |||
143 | /* switch_thread returns to the restored value of the lp | ||
144 | register (r31), so we make that the place where we want to | ||
145 | jump when the child thread begins running. */ | ||
146 | child_switch_regs->gpr[GPR_LP] = (v850_reg_t)ret_from_fork; | ||
147 | |||
148 | if (regs->kernel_mode) | ||
149 | /* Since we're returning to kernel-mode, make sure the child's | ||
150 | stored kernel stack pointer agrees with what the actual | ||
151 | stack pointer will be at that point (the trap return code | ||
152 | always restores the SP, even when returning to | ||
153 | kernel-mode). */ | ||
154 | child_trap_regs->gpr[GPR_SP] = orig_ksp; | ||
155 | else | ||
156 | /* Set the child's user-mode stack-pointer (the name | ||
157 | `stack_start' is a misnomer, it's just the initial SP | ||
158 | value). */ | ||
159 | child_trap_regs->gpr[GPR_SP] = stack_start; | ||
160 | |||
161 | /* Thread state for the child (everything else is on the stack). */ | ||
162 | p->thread.ksp = ksp; | ||
163 | |||
164 | return 0; | ||
165 | } | ||
166 | |||
167 | /* | ||
168 | * sys_execve() executes a new program. | ||
169 | */ | ||
170 | int sys_execve (char *name, char **argv, char **envp, struct pt_regs *regs) | ||
171 | { | ||
172 | char *filename = getname (name); | ||
173 | int error = PTR_ERR (filename); | ||
174 | |||
175 | if (! IS_ERR (filename)) { | ||
176 | error = do_execve (filename, argv, envp, regs); | ||
177 | putname (filename); | ||
178 | } | ||
179 | |||
180 | return error; | ||
181 | } | ||
182 | |||
183 | |||
184 | /* | ||
185 | * These bracket the sleeping functions.. | ||
186 | */ | ||
187 | #define first_sched ((unsigned long)__sched_text_start) | ||
188 | #define last_sched ((unsigned long)__sched_text_end) | ||
189 | |||
190 | unsigned long get_wchan (struct task_struct *p) | ||
191 | { | ||
192 | #if 0 /* Barf. Figure out the stack-layout later. XXX */ | ||
193 | unsigned long fp, pc; | ||
194 | int count = 0; | ||
195 | |||
196 | if (!p || p == current || p->state == TASK_RUNNING) | ||
197 | return 0; | ||
198 | |||
199 | pc = thread_saved_pc (p); | ||
200 | |||
201 | /* This quite disgusting function walks up the stack, following | ||
202 | saved return address, until it something that's out of bounds | ||
203 | (as defined by `first_sched' and `last_sched'). It then | ||
204 | returns the last PC that was in-bounds. */ | ||
205 | do { | ||
206 | if (fp < stack_page + sizeof (struct task_struct) || | ||
207 | fp >= 8184+stack_page) | ||
208 | return 0; | ||
209 | pc = ((unsigned long *)fp)[1]; | ||
210 | if (pc < first_sched || pc >= last_sched) | ||
211 | return pc; | ||
212 | fp = *(unsigned long *) fp; | ||
213 | } while (count++ < 16); | ||
214 | #endif | ||
215 | |||
216 | return 0; | ||
217 | } | ||
diff --git a/arch/v850/kernel/procfs.c b/arch/v850/kernel/procfs.c deleted file mode 100644 index e433cde789b4..000000000000 --- a/arch/v850/kernel/procfs.c +++ /dev/null | |||
@@ -1,67 +0,0 @@ | |||
1 | /* | ||
2 | * arch/v850/kernel/procfs.c -- Introspection functions for /proc filesystem | ||
3 | * | ||
4 | * Copyright (C) 2001,02 NEC Corporation | ||
5 | * Copyright (C) 2001,02 Miles Bader <miles@gnu.org> | ||
6 | * | ||
7 | * This file is subject to the terms and conditions of the GNU General | ||
8 | * Public License. See the file COPYING in the main directory of this | ||
9 | * archive for more details. | ||
10 | * | ||
11 | * Written by Miles Bader <miles@gnu.org> | ||
12 | */ | ||
13 | |||
14 | #include "mach.h" | ||
15 | |||
16 | static int cpuinfo_print (struct seq_file *m, void *v) | ||
17 | { | ||
18 | extern unsigned long loops_per_jiffy; | ||
19 | |||
20 | seq_printf (m, "CPU-Family: v850\nCPU-Arch: %s\n", CPU_ARCH); | ||
21 | |||
22 | #ifdef CPU_MODEL_LONG | ||
23 | seq_printf (m, "CPU-Model: %s (%s)\n", CPU_MODEL, CPU_MODEL_LONG); | ||
24 | #else | ||
25 | seq_printf (m, "CPU-Model: %s\n", CPU_MODEL); | ||
26 | #endif | ||
27 | |||
28 | #ifdef CPU_CLOCK_FREQ | ||
29 | seq_printf (m, "CPU-Clock: %ld (%ld MHz)\n", | ||
30 | (long)CPU_CLOCK_FREQ, | ||
31 | (long)CPU_CLOCK_FREQ / 1000000); | ||
32 | #endif | ||
33 | |||
34 | seq_printf (m, "BogoMips: %lu.%02lu\n", | ||
35 | loops_per_jiffy/(500000/HZ), | ||
36 | (loops_per_jiffy/(5000/HZ)) % 100); | ||
37 | |||
38 | #ifdef PLATFORM_LONG | ||
39 | seq_printf (m, "Platform: %s (%s)\n", PLATFORM, PLATFORM_LONG); | ||
40 | #elif defined (PLATFORM) | ||
41 | seq_printf (m, "Platform: %s\n", PLATFORM); | ||
42 | #endif | ||
43 | |||
44 | return 0; | ||
45 | } | ||
46 | |||
47 | static void *cpuinfo_start (struct seq_file *m, loff_t *pos) | ||
48 | { | ||
49 | return *pos < NR_CPUS ? ((void *) 0x12345678) : NULL; | ||
50 | } | ||
51 | |||
52 | static void *cpuinfo_next (struct seq_file *m, void *v, loff_t *pos) | ||
53 | { | ||
54 | ++*pos; | ||
55 | return cpuinfo_start (m, pos); | ||
56 | } | ||
57 | |||
58 | static void cpuinfo_stop (struct seq_file *m, void *v) | ||
59 | { | ||
60 | } | ||
61 | |||
62 | const struct seq_operations cpuinfo_op = { | ||
63 | .start = cpuinfo_start, | ||
64 | .next = cpuinfo_next, | ||
65 | .stop = cpuinfo_stop, | ||
66 | .show = cpuinfo_print | ||
67 | }; | ||
diff --git a/arch/v850/kernel/ptrace.c b/arch/v850/kernel/ptrace.c deleted file mode 100644 index a458ac941b25..000000000000 --- a/arch/v850/kernel/ptrace.c +++ /dev/null | |||
@@ -1,235 +0,0 @@ | |||
1 | /* | ||
2 | * arch/v850/kernel/ptrace.c -- `ptrace' system call | ||
3 | * | ||
4 | * Copyright (C) 2002,03,04 NEC Electronics Corporation | ||
5 | * Copyright (C) 2002,03,04 Miles Bader <miles@gnu.org> | ||
6 | * | ||
7 | * Derived from arch/mips/kernel/ptrace.c: | ||
8 | * | ||
9 | * Copyright (C) 1992 Ross Biro | ||
10 | * Copyright (C) Linus Torvalds | ||
11 | * Copyright (C) 1994, 95, 96, 97, 98, 2000 Ralf Baechle | ||
12 | * Copyright (C) 1996 David S. Miller | ||
13 | * Kevin D. Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com | ||
14 | * Copyright (C) 1999 MIPS Technologies, Inc. | ||
15 | * | ||
16 | * This file is subject to the terms and conditions of the GNU General | ||
17 | * Public License. See the file COPYING in the main directory of this | ||
18 | * archive for more details. | ||
19 | */ | ||
20 | |||
21 | #include <linux/kernel.h> | ||
22 | #include <linux/mm.h> | ||
23 | #include <linux/sched.h> | ||
24 | #include <linux/ptrace.h> | ||
25 | #include <linux/signal.h> | ||
26 | |||
27 | #include <asm/errno.h> | ||
28 | #include <asm/ptrace.h> | ||
29 | #include <asm/processor.h> | ||
30 | #include <asm/uaccess.h> | ||
31 | |||
32 | /* Returns the address where the register at REG_OFFS in P is stashed away. */ | ||
33 | static v850_reg_t *reg_save_addr (unsigned reg_offs, struct task_struct *t) | ||
34 | { | ||
35 | struct pt_regs *regs; | ||
36 | |||
37 | /* Three basic cases: | ||
38 | |||
39 | (1) A register normally saved before calling the scheduler, is | ||
40 | available in the kernel entry pt_regs structure at the top | ||
41 | of the kernel stack. The kernel trap/irq exit path takes | ||
42 | care to save/restore almost all registers for ptrace'd | ||
43 | processes. | ||
44 | |||
45 | (2) A call-clobbered register, where the process P entered the | ||
46 | kernel via [syscall] trap, is not stored anywhere; that's | ||
47 | OK, because such registers are not expected to be preserved | ||
48 | when the trap returns anyway (so we don't actually bother to | ||
49 | test for this case). | ||
50 | |||
51 | (3) A few registers not used at all by the kernel, and so | ||
52 | normally never saved except by context-switches, are in the | ||
53 | context switch state. */ | ||
54 | |||
55 | if (reg_offs == PT_CTPC || reg_offs == PT_CTPSW || reg_offs == PT_CTBP) | ||
56 | /* Register saved during context switch. */ | ||
57 | regs = thread_saved_regs (t); | ||
58 | else | ||
59 | /* Register saved during kernel entry (or not available). */ | ||
60 | regs = task_pt_regs (t); | ||
61 | |||
62 | return (v850_reg_t *)((char *)regs + reg_offs); | ||
63 | } | ||
64 | |||
65 | /* Set the bits SET and clear the bits CLEAR in the v850e DIR | ||
66 | (`debug information register'). Returns the new value of DIR. */ | ||
67 | static inline v850_reg_t set_dir (v850_reg_t set, v850_reg_t clear) | ||
68 | { | ||
69 | register v850_reg_t rval asm ("r10"); | ||
70 | register v850_reg_t arg0 asm ("r6") = set; | ||
71 | register v850_reg_t arg1 asm ("r7") = clear; | ||
72 | |||
73 | /* The dbtrap handler has exactly this functionality when called | ||
74 | from kernel mode. 0xf840 is a `dbtrap' insn. */ | ||
75 | asm (".short 0xf840" : "=r" (rval) : "r" (arg0), "r" (arg1)); | ||
76 | |||
77 | return rval; | ||
78 | } | ||
79 | |||
80 | /* Makes sure hardware single-stepping is (globally) enabled. | ||
81 | Returns true if successful. */ | ||
82 | static inline int enable_single_stepping (void) | ||
83 | { | ||
84 | static int enabled = 0; /* Remember whether we already did it. */ | ||
85 | if (! enabled) { | ||
86 | /* Turn on the SE (`single-step enable') bit, 0x100, in the | ||
87 | DIR (`debug information register'). This may fail if a | ||
88 | processor doesn't support it or something. We also try | ||
89 | to clear bit 0x40 (`INI'), which is necessary to use the | ||
90 | debug stuff on the v850e2; on the v850e, clearing 0x40 | ||
91 | shouldn't cause any problem. */ | ||
92 | v850_reg_t dir = set_dir (0x100, 0x40); | ||
93 | /* Make sure it really got set. */ | ||
94 | if (dir & 0x100) | ||
95 | enabled = 1; | ||
96 | } | ||
97 | return enabled; | ||
98 | } | ||
99 | |||
100 | /* Try to set CHILD's single-step flag to VAL. Returns true if successful. */ | ||
101 | static int set_single_step (struct task_struct *t, int val) | ||
102 | { | ||
103 | v850_reg_t *psw_addr = reg_save_addr(PT_PSW, t); | ||
104 | if (val) { | ||
105 | /* Make sure single-stepping is enabled. */ | ||
106 | if (! enable_single_stepping ()) | ||
107 | return 0; | ||
108 | /* Set T's single-step flag. */ | ||
109 | *psw_addr |= 0x800; | ||
110 | } else | ||
111 | *psw_addr &= ~0x800; | ||
112 | return 1; | ||
113 | } | ||
114 | |||
115 | long arch_ptrace(struct task_struct *child, long request, long addr, long data) | ||
116 | { | ||
117 | int rval; | ||
118 | |||
119 | switch (request) { | ||
120 | unsigned long val; | ||
121 | |||
122 | case PTRACE_PEEKTEXT: /* read word at location addr. */ | ||
123 | case PTRACE_PEEKDATA: | ||
124 | rval = generic_ptrace_peekdata(child, addr, data); | ||
125 | goto out; | ||
126 | |||
127 | case PTRACE_POKETEXT: /* write the word at location addr. */ | ||
128 | case PTRACE_POKEDATA: | ||
129 | rval = generic_ptrace_pokedata(child, addr, data); | ||
130 | goto out; | ||
131 | |||
132 | /* Read/write the word at location ADDR in the registers. */ | ||
133 | case PTRACE_PEEKUSR: | ||
134 | case PTRACE_POKEUSR: | ||
135 | rval = 0; | ||
136 | if (addr >= PT_SIZE && request == PTRACE_PEEKUSR) { | ||
137 | /* Special requests that don't actually correspond | ||
138 | to offsets in struct pt_regs. */ | ||
139 | if (addr == PT_TEXT_ADDR) | ||
140 | val = child->mm->start_code; | ||
141 | else if (addr == PT_DATA_ADDR) | ||
142 | val = child->mm->start_data; | ||
143 | else if (addr == PT_TEXT_LEN) | ||
144 | val = child->mm->end_code | ||
145 | - child->mm->start_code; | ||
146 | else | ||
147 | rval = -EIO; | ||
148 | } else if (addr >= 0 && addr < PT_SIZE && (addr & 0x3) == 0) { | ||
149 | v850_reg_t *reg_addr = reg_save_addr(addr, child); | ||
150 | if (request == PTRACE_PEEKUSR) | ||
151 | val = *reg_addr; | ||
152 | else | ||
153 | *reg_addr = data; | ||
154 | } else | ||
155 | rval = -EIO; | ||
156 | |||
157 | if (rval == 0 && request == PTRACE_PEEKUSR) | ||
158 | rval = put_user (val, (unsigned long *)data); | ||
159 | goto out; | ||
160 | |||
161 | /* Continue and stop at next (return from) syscall */ | ||
162 | case PTRACE_SYSCALL: | ||
163 | /* Restart after a signal. */ | ||
164 | case PTRACE_CONT: | ||
165 | /* Execute a single instruction. */ | ||
166 | case PTRACE_SINGLESTEP: | ||
167 | rval = -EIO; | ||
168 | if (!valid_signal(data)) | ||
169 | break; | ||
170 | |||
171 | /* Turn CHILD's single-step flag on or off. */ | ||
172 | if (! set_single_step (child, request == PTRACE_SINGLESTEP)) | ||
173 | break; | ||
174 | |||
175 | if (request == PTRACE_SYSCALL) | ||
176 | set_tsk_thread_flag(child, TIF_SYSCALL_TRACE); | ||
177 | else | ||
178 | clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE); | ||
179 | |||
180 | child->exit_code = data; | ||
181 | wake_up_process(child); | ||
182 | rval = 0; | ||
183 | break; | ||
184 | |||
185 | /* | ||
186 | * make the child exit. Best I can do is send it a sigkill. | ||
187 | * perhaps it should be put in the status that it wants to | ||
188 | * exit. | ||
189 | */ | ||
190 | case PTRACE_KILL: | ||
191 | rval = 0; | ||
192 | if (child->exit_state == EXIT_ZOMBIE) /* already dead */ | ||
193 | break; | ||
194 | child->exit_code = SIGKILL; | ||
195 | wake_up_process(child); | ||
196 | break; | ||
197 | |||
198 | case PTRACE_DETACH: /* detach a process that was attached. */ | ||
199 | set_single_step (child, 0); /* Clear single-step flag */ | ||
200 | rval = ptrace_detach(child, data); | ||
201 | break; | ||
202 | |||
203 | default: | ||
204 | rval = -EIO; | ||
205 | goto out; | ||
206 | } | ||
207 | out: | ||
208 | return rval; | ||
209 | } | ||
210 | |||
211 | asmlinkage void syscall_trace(void) | ||
212 | { | ||
213 | if (!test_thread_flag(TIF_SYSCALL_TRACE)) | ||
214 | return; | ||
215 | if (!(current->ptrace & PT_PTRACED)) | ||
216 | return; | ||
217 | /* The 0x80 provides a way for the tracing parent to distinguish | ||
218 | between a syscall stop and SIGTRAP delivery */ | ||
219 | ptrace_notify(SIGTRAP | ((current->ptrace & PT_TRACESYSGOOD) | ||
220 | ? 0x80 : 0)); | ||
221 | /* | ||
222 | * this isn't the same as continuing with a signal, but it will do | ||
223 | * for normal use. strace only continues with a signal if the | ||
224 | * stopping signal is not SIGTRAP. -brl | ||
225 | */ | ||
226 | if (current->exit_code) { | ||
227 | send_sig(current->exit_code, current, 1); | ||
228 | current->exit_code = 0; | ||
229 | } | ||
230 | } | ||
231 | |||
232 | void ptrace_disable (struct task_struct *child) | ||
233 | { | ||
234 | /* nothing to do */ | ||
235 | } | ||
diff --git a/arch/v850/kernel/rte_cb.c b/arch/v850/kernel/rte_cb.c deleted file mode 100644 index 43018e1edebd..000000000000 --- a/arch/v850/kernel/rte_cb.c +++ /dev/null | |||
@@ -1,193 +0,0 @@ | |||
1 | /* | ||
2 | * include/asm-v850/rte_cb.c -- Midas lab RTE-CB series of evaluation boards | ||
3 | * | ||
4 | * Copyright (C) 2001,02,03 NEC Electronics Corporation | ||
5 | * Copyright (C) 2001,02,03 Miles Bader <miles@gnu.org> | ||
6 | * | ||
7 | * This file is subject to the terms and conditions of the GNU General | ||
8 | * Public License. See the file COPYING in the main directory of this | ||
9 | * archive for more details. | ||
10 | * | ||
11 | * Written by Miles Bader <miles@gnu.org> | ||
12 | */ | ||
13 | |||
14 | #include <linux/init.h> | ||
15 | #include <linux/irq.h> | ||
16 | #include <linux/fs.h> | ||
17 | #include <linux/module.h> | ||
18 | #include <linux/kernel.h> | ||
19 | |||
20 | #include <asm/machdep.h> | ||
21 | #include <asm/v850e_uart.h> | ||
22 | |||
23 | #include "mach.h" | ||
24 | |||
25 | static void led_tick (void); | ||
26 | |||
27 | /* LED access routines. */ | ||
28 | extern unsigned read_leds (int pos, char *buf, int len); | ||
29 | extern unsigned write_leds (int pos, const char *buf, int len); | ||
30 | |||
31 | #ifdef CONFIG_RTE_CB_MULTI | ||
32 | extern void multi_init (void); | ||
33 | #endif | ||
34 | |||
35 | |||
36 | void __init rte_cb_early_init (void) | ||
37 | { | ||
38 | v850e_intc_disable_irqs (); | ||
39 | |||
40 | #ifdef CONFIG_RTE_CB_MULTI | ||
41 | multi_init (); | ||
42 | #endif | ||
43 | } | ||
44 | |||
45 | void __init mach_setup (char **cmdline) | ||
46 | { | ||
47 | #ifdef CONFIG_RTE_MB_A_PCI | ||
48 | /* Probe for Mother-A, and print a message if we find it. */ | ||
49 | *(volatile unsigned long *)MB_A_SRAM_ADDR = 0xDEADBEEF; | ||
50 | if (*(volatile unsigned long *)MB_A_SRAM_ADDR == 0xDEADBEEF) { | ||
51 | *(volatile unsigned long *)MB_A_SRAM_ADDR = 0x12345678; | ||
52 | if (*(volatile unsigned long *)MB_A_SRAM_ADDR == 0x12345678) | ||
53 | printk (KERN_INFO | ||
54 | " NEC SolutionGear/Midas lab" | ||
55 | " RTE-MOTHER-A motherboard\n"); | ||
56 | } | ||
57 | #endif /* CONFIG_RTE_MB_A_PCI */ | ||
58 | |||
59 | mach_tick = led_tick; | ||
60 | } | ||
61 | |||
62 | void machine_restart (char *__unused) | ||
63 | { | ||
64 | #ifdef CONFIG_RESET_GUARD | ||
65 | disable_reset_guard (); | ||
66 | #endif | ||
67 | asm ("jmp r0"); /* Jump to the reset vector. */ | ||
68 | } | ||
69 | |||
70 | /* This says `HALt.' in LEDese. */ | ||
71 | static unsigned char halt_leds_msg[] = { 0x76, 0x77, 0x38, 0xF8 }; | ||
72 | |||
73 | void machine_halt (void) | ||
74 | { | ||
75 | #ifdef CONFIG_RESET_GUARD | ||
76 | disable_reset_guard (); | ||
77 | #endif | ||
78 | |||
79 | /* Ignore all interrupts. */ | ||
80 | local_irq_disable (); | ||
81 | |||
82 | /* Write a little message. */ | ||
83 | write_leds (0, halt_leds_msg, sizeof halt_leds_msg); | ||
84 | |||
85 | /* Really halt. */ | ||
86 | for (;;) | ||
87 | asm ("halt; nop; nop; nop; nop; nop"); | ||
88 | } | ||
89 | |||
90 | void machine_power_off (void) | ||
91 | { | ||
92 | machine_halt (); | ||
93 | } | ||
94 | |||
95 | |||
96 | /* Animated LED display for timer tick. */ | ||
97 | |||
98 | #define TICK_UPD_FREQ 6 | ||
99 | static int tick_frames[][10] = { | ||
100 | { 0x01, 0x02, 0x04, 0x08, 0x10, 0x20, -1 }, | ||
101 | { 0x63, 0x5c, -1 }, | ||
102 | { 0x5c, 0x00, -1 }, | ||
103 | { 0x63, 0x00, -1 }, | ||
104 | { -1 } | ||
105 | }; | ||
106 | |||
107 | static void led_tick () | ||
108 | { | ||
109 | static unsigned counter = 0; | ||
110 | |||
111 | if (++counter == (HZ / TICK_UPD_FREQ)) { | ||
112 | /* Which frame we're currently displaying for each digit. */ | ||
113 | static unsigned frame_nums[LED_NUM_DIGITS] = { 0 }; | ||
114 | /* Display image. */ | ||
115 | static unsigned char image[LED_NUM_DIGITS] = { 0 }; | ||
116 | unsigned char prev_image[LED_NUM_DIGITS]; | ||
117 | int write_to_leds = 1; /* true if we should actually display */ | ||
118 | int digit; | ||
119 | |||
120 | /* We check to see if the physical LEDs contains what we last | ||
121 | wrote to them; if not, we suppress display (this is so that | ||
122 | users can write to the LEDs, and not have their output | ||
123 | overwritten). As a special case, we start writing again if | ||
124 | all the LEDs are blank, or our display image is all zeros | ||
125 | (indicating that this is the initial update, when the actual | ||
126 | LEDs might contain random data). */ | ||
127 | read_leds (0, prev_image, LED_NUM_DIGITS); | ||
128 | for (digit = 0; digit < LED_NUM_DIGITS; digit++) | ||
129 | if (image[digit] != prev_image[digit] | ||
130 | && image[digit] && prev_image[digit]) | ||
131 | { | ||
132 | write_to_leds = 0; | ||
133 | break; | ||
134 | } | ||
135 | |||
136 | /* Update display image. */ | ||
137 | for (digit = 0; | ||
138 | digit < LED_NUM_DIGITS && tick_frames[digit][0] >= 0; | ||
139 | digit++) | ||
140 | { | ||
141 | int frame = tick_frames[digit][frame_nums[digit]]; | ||
142 | if (frame < 0) { | ||
143 | image[digit] = tick_frames[digit][0]; | ||
144 | frame_nums[digit] = 1; | ||
145 | } else { | ||
146 | image[digit] = frame; | ||
147 | frame_nums[digit]++; | ||
148 | break; | ||
149 | } | ||
150 | } | ||
151 | |||
152 | if (write_to_leds) | ||
153 | /* Write the display image to the physical LEDs. */ | ||
154 | write_leds (0, image, LED_NUM_DIGITS); | ||
155 | |||
156 | counter = 0; | ||
157 | } | ||
158 | } | ||
159 | |||
160 | |||
161 | /* Mother-A interrupts. */ | ||
162 | |||
163 | #ifdef CONFIG_RTE_GBUS_INT | ||
164 | |||
165 | #define L GBUS_INT_PRIORITY_LOW | ||
166 | #define M GBUS_INT_PRIORITY_MEDIUM | ||
167 | #define H GBUS_INT_PRIORITY_HIGH | ||
168 | |||
169 | static struct gbus_int_irq_init gbus_irq_inits[] = { | ||
170 | #ifdef CONFIG_RTE_MB_A_PCI | ||
171 | { "MB_A_LAN", IRQ_MB_A_LAN, 1, 1, L }, | ||
172 | { "MB_A_PCI1", IRQ_MB_A_PCI1(0), IRQ_MB_A_PCI1_NUM, 1, L }, | ||
173 | { "MB_A_PCI2", IRQ_MB_A_PCI2(0), IRQ_MB_A_PCI2_NUM, 1, L }, | ||
174 | { "MB_A_EXT", IRQ_MB_A_EXT(0), IRQ_MB_A_EXT_NUM, 1, L }, | ||
175 | { "MB_A_USB_OC",IRQ_MB_A_USB_OC(0), IRQ_MB_A_USB_OC_NUM, 1, L }, | ||
176 | { "MB_A_PCMCIA_OC",IRQ_MB_A_PCMCIA_OC, 1, 1, L }, | ||
177 | #endif | ||
178 | { 0 } | ||
179 | }; | ||
180 | #define NUM_GBUS_IRQ_INITS (ARRAY_SIZE(gbus_irq_inits) - 1) | ||
181 | |||
182 | static struct hw_interrupt_type gbus_hw_itypes[NUM_GBUS_IRQ_INITS]; | ||
183 | |||
184 | #endif /* CONFIG_RTE_GBUS_INT */ | ||
185 | |||
186 | |||
187 | void __init rte_cb_init_irqs (void) | ||
188 | { | ||
189 | #ifdef CONFIG_RTE_GBUS_INT | ||
190 | gbus_int_init_irqs (); | ||
191 | gbus_int_init_irq_types (gbus_irq_inits, gbus_hw_itypes); | ||
192 | #endif /* CONFIG_RTE_GBUS_INT */ | ||
193 | } | ||
diff --git a/arch/v850/kernel/rte_cb_leds.c b/arch/v850/kernel/rte_cb_leds.c deleted file mode 100644 index aa47ab1dcd87..000000000000 --- a/arch/v850/kernel/rte_cb_leds.c +++ /dev/null | |||
@@ -1,137 +0,0 @@ | |||
1 | /* | ||
2 | * include/asm-v850/rte_cb_leds.c -- Midas lab RTE-CB board LED device support | ||
3 | * | ||
4 | * Copyright (C) 2002,03 NEC Electronics Corporation | ||
5 | * Copyright (C) 2002,03 Miles Bader <miles@gnu.org> | ||
6 | * | ||
7 | * This file is subject to the terms and conditions of the GNU General | ||
8 | * Public License. See the file COPYING in the main directory of this | ||
9 | * archive for more details. | ||
10 | * | ||
11 | * Written by Miles Bader <miles@gnu.org> | ||
12 | */ | ||
13 | |||
14 | #include <linux/init.h> | ||
15 | #include <linux/spinlock.h> | ||
16 | #include <linux/fs.h> | ||
17 | #include <linux/miscdevice.h> | ||
18 | |||
19 | #include <asm/uaccess.h> | ||
20 | |||
21 | #define LEDS_MINOR 169 /* Minor device number, using misc major. */ | ||
22 | |||
23 | /* The actual LED hardware is write-only, so we hold the contents here too. */ | ||
24 | static unsigned char leds_image[LED_NUM_DIGITS] = { 0 }; | ||
25 | |||
26 | /* Spinlock protecting the above leds. */ | ||
27 | static DEFINE_SPINLOCK(leds_lock); | ||
28 | |||
29 | /* Common body of LED read/write functions, checks POS and LEN for | ||
30 | correctness, declares a variable using IMG_DECL, initialized pointing at | ||
31 | the POS position in the LED image buffer, and and iterates COPY_EXPR | ||
32 | until BUF is equal to the last buffer position; finally, sets LEN to be | ||
33 | the amount actually copied. IMG should be a variable declaration | ||
34 | (without an initializer or a terminating semicolon); POS, BUF, and LEN | ||
35 | should all be simple variables. */ | ||
36 | #define DO_LED_COPY(img_decl, pos, buf, len, copy_expr) \ | ||
37 | do { \ | ||
38 | if (pos > LED_NUM_DIGITS) \ | ||
39 | len = 0; \ | ||
40 | else { \ | ||
41 | if (pos + len > LED_NUM_DIGITS) \ | ||
42 | len = LED_NUM_DIGITS - pos; \ | ||
43 | \ | ||
44 | if (len > 0) { \ | ||
45 | unsigned long _flags; \ | ||
46 | const char *_end = buf + len; \ | ||
47 | img_decl = &leds_image[pos]; \ | ||
48 | \ | ||
49 | spin_lock_irqsave (leds_lock, _flags); \ | ||
50 | do \ | ||
51 | (copy_expr); \ | ||
52 | while (buf != _end); \ | ||
53 | spin_unlock_irqrestore (leds_lock, _flags); \ | ||
54 | } \ | ||
55 | } \ | ||
56 | } while (0) | ||
57 | |||
58 | /* Read LEN bytes from LEDs at position POS, into BUF. | ||
59 | Returns actual amount read. */ | ||
60 | unsigned read_leds (unsigned pos, char *buf, unsigned len) | ||
61 | { | ||
62 | DO_LED_COPY (const char *img, pos, buf, len, *buf++ = *img++); | ||
63 | return len; | ||
64 | } | ||
65 | |||
66 | /* Write LEN bytes to LEDs at position POS, from BUF. | ||
67 | Returns actual amount written. */ | ||
68 | unsigned write_leds (unsigned pos, const char *buf, unsigned len) | ||
69 | { | ||
70 | /* We write the actual LED values backwards, because | ||
71 | increasing memory addresses reflect LEDs right-to-left. */ | ||
72 | volatile char *led = &LED (LED_NUM_DIGITS - pos - 1); | ||
73 | /* We invert the value written to the hardware, because 1 = off, | ||
74 | and 0 = on. */ | ||
75 | DO_LED_COPY (char *img, pos, buf, len, | ||
76 | *led-- = 0xFF ^ (*img++ = *buf++)); | ||
77 | return len; | ||
78 | } | ||
79 | |||
80 | |||
81 | /* Device functions. */ | ||
82 | |||
83 | static ssize_t leds_dev_read (struct file *file, char *buf, size_t len, | ||
84 | loff_t *pos) | ||
85 | { | ||
86 | char temp_buf[LED_NUM_DIGITS]; | ||
87 | len = read_leds (*pos, temp_buf, len); | ||
88 | if (copy_to_user (buf, temp_buf, len)) | ||
89 | return -EFAULT; | ||
90 | *pos += len; | ||
91 | return len; | ||
92 | } | ||
93 | |||
94 | static ssize_t leds_dev_write (struct file *file, const char *buf, size_t len, | ||
95 | loff_t *pos) | ||
96 | { | ||
97 | char temp_buf[LED_NUM_DIGITS]; | ||
98 | if (copy_from_user (temp_buf, buf, min_t(size_t, len, LED_NUM_DIGITS))) | ||
99 | return -EFAULT; | ||
100 | len = write_leds (*pos, temp_buf, len); | ||
101 | *pos += len; | ||
102 | return len; | ||
103 | } | ||
104 | |||
105 | static loff_t leds_dev_lseek (struct file *file, loff_t offs, int whence) | ||
106 | { | ||
107 | if (whence == 1) | ||
108 | offs += file->f_pos; /* relative */ | ||
109 | else if (whence == 2) | ||
110 | offs += LED_NUM_DIGITS; /* end-relative */ | ||
111 | |||
112 | if (offs < 0 || offs > LED_NUM_DIGITS) | ||
113 | return -EINVAL; | ||
114 | |||
115 | file->f_pos = offs; | ||
116 | |||
117 | return 0; | ||
118 | } | ||
119 | |||
120 | static const struct file_operations leds_fops = { | ||
121 | .read = leds_dev_read, | ||
122 | .write = leds_dev_write, | ||
123 | .llseek = leds_dev_lseek | ||
124 | }; | ||
125 | |||
126 | static struct miscdevice leds_miscdev = { | ||
127 | .name = "leds", | ||
128 | .minor = LEDS_MINOR, | ||
129 | .fops = &leds_fops | ||
130 | }; | ||
131 | |||
132 | int __init leds_dev_init (void) | ||
133 | { | ||
134 | return misc_register (&leds_miscdev); | ||
135 | } | ||
136 | |||
137 | __initcall (leds_dev_init); | ||
diff --git a/arch/v850/kernel/rte_cb_multi.c b/arch/v850/kernel/rte_cb_multi.c deleted file mode 100644 index 963d55ab34cc..000000000000 --- a/arch/v850/kernel/rte_cb_multi.c +++ /dev/null | |||
@@ -1,121 +0,0 @@ | |||
1 | /* | ||
2 | * include/asm-v850/rte_multi.c -- Support for Multi debugger monitor ROM | ||
3 | * on Midas lab RTE-CB series of evaluation boards | ||
4 | * | ||
5 | * Copyright (C) 2001,02,03 NEC Electronics Corporation | ||
6 | * Copyright (C) 2001,02,03 Miles Bader <miles@gnu.org> | ||
7 | * | ||
8 | * This file is subject to the terms and conditions of the GNU General | ||
9 | * Public License. See the file COPYING in the main directory of this | ||
10 | * archive for more details. | ||
11 | * | ||
12 | * Written by Miles Bader <miles@gnu.org> | ||
13 | */ | ||
14 | |||
15 | #include <linux/init.h> | ||
16 | |||
17 | #include <asm/machdep.h> | ||
18 | |||
19 | #define IRQ_ADDR(irq) (0x80 + (irq) * 0x10) | ||
20 | |||
21 | /* A table of which interrupt vectors to install, since blindly | ||
22 | installing all of them makes the debugger stop working. This is a | ||
23 | list of offsets in the interrupt vector area; each entry means to | ||
24 | copy that particular 16-byte vector. An entry less than zero ends | ||
25 | the table. */ | ||
26 | static long multi_intv_install_table[] = { | ||
27 | /* Trap vectors */ | ||
28 | 0x40, 0x50, | ||
29 | |||
30 | #ifdef CONFIG_RTE_CB_MULTI_DBTRAP | ||
31 | /* Illegal insn / dbtrap. These are used by multi, so only handle | ||
32 | them if configured to do so. */ | ||
33 | 0x60, | ||
34 | #endif | ||
35 | |||
36 | /* GINT1 - GINT3 (note, not GINT0!) */ | ||
37 | IRQ_ADDR (IRQ_GINT(1)), | ||
38 | IRQ_ADDR (IRQ_GINT(2)), | ||
39 | IRQ_ADDR (IRQ_GINT(3)), | ||
40 | |||
41 | /* Timer D interrupts (up to 4 timers) */ | ||
42 | IRQ_ADDR (IRQ_INTCMD(0)), | ||
43 | #if IRQ_INTCMD_NUM > 1 | ||
44 | IRQ_ADDR (IRQ_INTCMD(1)), | ||
45 | #if IRQ_INTCMD_NUM > 2 | ||
46 | IRQ_ADDR (IRQ_INTCMD(2)), | ||
47 | #if IRQ_INTCMD_NUM > 3 | ||
48 | IRQ_ADDR (IRQ_INTCMD(3)), | ||
49 | #endif | ||
50 | #endif | ||
51 | #endif | ||
52 | |||
53 | /* UART interrupts (up to 3 channels) */ | ||
54 | IRQ_ADDR (IRQ_INTSER (0)), /* err */ | ||
55 | IRQ_ADDR (IRQ_INTSR (0)), /* rx */ | ||
56 | IRQ_ADDR (IRQ_INTST (0)), /* tx */ | ||
57 | #if IRQ_INTSR_NUM > 1 | ||
58 | IRQ_ADDR (IRQ_INTSER (1)), /* err */ | ||
59 | IRQ_ADDR (IRQ_INTSR (1)), /* rx */ | ||
60 | IRQ_ADDR (IRQ_INTST (1)), /* tx */ | ||
61 | #if IRQ_INTSR_NUM > 2 | ||
62 | IRQ_ADDR (IRQ_INTSER (2)), /* err */ | ||
63 | IRQ_ADDR (IRQ_INTSR (2)), /* rx */ | ||
64 | IRQ_ADDR (IRQ_INTST (2)), /* tx */ | ||
65 | #endif | ||
66 | #endif | ||
67 | |||
68 | -1 | ||
69 | }; | ||
70 | |||
71 | /* Early initialization for kernel using Multi debugger ROM monitor. */ | ||
72 | void __init multi_init (void) | ||
73 | { | ||
74 | /* We're using the Multi debugger monitor, so we have to install | ||
75 | the interrupt vectors. The monitor doesn't allow them to be | ||
76 | initially downloaded into their final destination because | ||
77 | it's in the monitor's scratch-RAM area. Unfortunately, Multi | ||
78 | also doesn't deal correctly with ELF sections where the LMA | ||
79 | and VMA differ -- it just ignores the LMA -- so we can't use | ||
80 | that feature to work around the problem. What we do instead | ||
81 | is just put the interrupt vectors into a normal section, and | ||
82 | do the necessary copying and relocation here. Since the | ||
83 | interrupt vector basically only contains `jr' instructions | ||
84 | and no-ops, it's not that hard. */ | ||
85 | extern unsigned long _intv_load_start, _intv_start; | ||
86 | register unsigned long *src = &_intv_load_start; | ||
87 | register unsigned long *dst = (unsigned long *)INTV_BASE; | ||
88 | register unsigned long jr_fixup = (char *)&_intv_start - (char *)dst; | ||
89 | register long *ii; | ||
90 | |||
91 | /* Copy interrupt vectors as instructed by multi_intv_install_table. */ | ||
92 | for (ii = multi_intv_install_table; *ii >= 0; ii++) { | ||
93 | /* Copy 16-byte interrupt vector at offset *ii. */ | ||
94 | int boffs; | ||
95 | for (boffs = 0; boffs < 0x10; boffs += sizeof *src) { | ||
96 | /* Copy a single word, fixing up the jump offs | ||
97 | if it's a `jr' instruction. */ | ||
98 | int woffs = (*ii + boffs) / sizeof *src; | ||
99 | unsigned long word = src[woffs]; | ||
100 | |||
101 | if ((word & 0xFC0) == 0x780) { | ||
102 | /* A `jr' insn, fix up its offset (and yes, the | ||
103 | weird half-word swapping is intentional). */ | ||
104 | unsigned short hi = word & 0xFFFF; | ||
105 | unsigned short lo = word >> 16; | ||
106 | unsigned long udisp22 | ||
107 | = lo + ((hi & 0x3F) << 16); | ||
108 | long disp22 = (long)(udisp22 << 10) >> 10; | ||
109 | |||
110 | disp22 += jr_fixup; | ||
111 | |||
112 | hi = ((disp22 >> 16) & 0x3F) | 0x780; | ||
113 | lo = disp22 & 0xFFFF; | ||
114 | |||
115 | word = hi + (lo << 16); | ||
116 | } | ||
117 | |||
118 | dst[woffs] = word; | ||
119 | } | ||
120 | } | ||
121 | } | ||
diff --git a/arch/v850/kernel/rte_ma1_cb-rom.ld b/arch/v850/kernel/rte_ma1_cb-rom.ld deleted file mode 100644 index 87b618f8253b..000000000000 --- a/arch/v850/kernel/rte_ma1_cb-rom.ld +++ /dev/null | |||
@@ -1,14 +0,0 @@ | |||
1 | /* Linker script for the Midas labs RTE-V850E/MA1-CB evaluation board | ||
2 | (CONFIG_RTE_CB_MA1), with kernel in ROM. */ | ||
3 | |||
4 | MEMORY { | ||
5 | ROM : ORIGIN = 0x00000000, LENGTH = 0x00100000 | ||
6 | /* 1MB of SRAM. This memory is mirrored 4 times. */ | ||
7 | SRAM : ORIGIN = SRAM_ADDR, LENGTH = SRAM_SIZE | ||
8 | /* 32MB of SDRAM. */ | ||
9 | SDRAM : ORIGIN = SDRAM_ADDR, LENGTH = SDRAM_SIZE | ||
10 | } | ||
11 | |||
12 | SECTIONS { | ||
13 | ROMK_SECTIONS(ROM, SRAM) | ||
14 | } | ||
diff --git a/arch/v850/kernel/rte_ma1_cb.c b/arch/v850/kernel/rte_ma1_cb.c deleted file mode 100644 index 08abf3d5f8df..000000000000 --- a/arch/v850/kernel/rte_ma1_cb.c +++ /dev/null | |||
@@ -1,107 +0,0 @@ | |||
1 | /* | ||
2 | * arch/v850/kernel/rte_ma1_cb.c -- Midas labs RTE-V850E/MA1-CB board | ||
3 | * | ||
4 | * Copyright (C) 2001,02,03 NEC Electronics Corporation | ||
5 | * Copyright (C) 2001,02,03 Miles Bader <miles@gnu.org> | ||
6 | * | ||
7 | * This file is subject to the terms and conditions of the GNU General | ||
8 | * Public License. See the file COPYING in the main directory of this | ||
9 | * archive for more details. | ||
10 | * | ||
11 | * Written by Miles Bader <miles@gnu.org> | ||
12 | */ | ||
13 | |||
14 | #include <linux/kernel.h> | ||
15 | #include <linux/init.h> | ||
16 | #include <linux/bootmem.h> | ||
17 | |||
18 | #include <asm/atomic.h> | ||
19 | #include <asm/page.h> | ||
20 | #include <asm/ma1.h> | ||
21 | #include <asm/rte_ma1_cb.h> | ||
22 | #include <asm/v850e_timer_c.h> | ||
23 | |||
24 | #include "mach.h" | ||
25 | |||
26 | |||
27 | /* SRAM and SDRAM are almost contiguous (with a small hole in between; | ||
28 | see mach_reserve_bootmem for details), so just use both as one big area. */ | ||
29 | #define RAM_START SRAM_ADDR | ||
30 | #define RAM_END (SDRAM_ADDR + SDRAM_SIZE) | ||
31 | |||
32 | |||
33 | void __init mach_early_init (void) | ||
34 | { | ||
35 | rte_cb_early_init (); | ||
36 | } | ||
37 | |||
38 | void __init mach_get_physical_ram (unsigned long *ram_start, | ||
39 | unsigned long *ram_len) | ||
40 | { | ||
41 | *ram_start = RAM_START; | ||
42 | *ram_len = RAM_END - RAM_START; | ||
43 | } | ||
44 | |||
45 | void __init mach_reserve_bootmem () | ||
46 | { | ||
47 | #ifdef CONFIG_RTE_CB_MULTI | ||
48 | /* Prevent the kernel from touching the monitor's scratch RAM. */ | ||
49 | reserve_bootmem(MON_SCRATCH_ADDR, MON_SCRATCH_SIZE, | ||
50 | BOOTMEM_DEFAULT); | ||
51 | #endif | ||
52 | |||
53 | /* The space between SRAM and SDRAM is filled with duplicate | ||
54 | images of SRAM. Prevent the kernel from using them. */ | ||
55 | reserve_bootmem (SRAM_ADDR + SRAM_SIZE, | ||
56 | SDRAM_ADDR - (SRAM_ADDR + SRAM_SIZE), | ||
57 | BOOTMEM_DEFAULT); | ||
58 | } | ||
59 | |||
60 | void mach_gettimeofday (struct timespec *tv) | ||
61 | { | ||
62 | tv->tv_sec = 0; | ||
63 | tv->tv_nsec = 0; | ||
64 | } | ||
65 | |||
66 | /* Called before configuring an on-chip UART. */ | ||
67 | void rte_ma1_cb_uart_pre_configure (unsigned chan, | ||
68 | unsigned cflags, unsigned baud) | ||
69 | { | ||
70 | /* The RTE-MA1-CB connects some general-purpose I/O pins on the | ||
71 | CPU to the RTS/CTS lines of UART 0's serial connection. | ||
72 | I/O pins P42 and P43 are RTS and CTS respectively. */ | ||
73 | if (chan == 0) { | ||
74 | /* Put P42 & P43 in I/O port mode. */ | ||
75 | MA_PORT4_PMC &= ~0xC; | ||
76 | /* Make P42 an output, and P43 an input. */ | ||
77 | MA_PORT4_PM = (MA_PORT4_PM & ~0xC) | 0x8; | ||
78 | } | ||
79 | |||
80 | /* Do pre-configuration for the actual UART. */ | ||
81 | ma_uart_pre_configure (chan, cflags, baud); | ||
82 | } | ||
83 | |||
84 | void __init mach_init_irqs (void) | ||
85 | { | ||
86 | unsigned tc; | ||
87 | |||
88 | /* Initialize interrupts. */ | ||
89 | ma_init_irqs (); | ||
90 | rte_cb_init_irqs (); | ||
91 | |||
92 | /* Use falling-edge-sensitivity for interrupts . */ | ||
93 | V850E_TIMER_C_SESC (0) &= ~0xC; | ||
94 | V850E_TIMER_C_SESC (1) &= ~0xF; | ||
95 | |||
96 | /* INTP000-INTP011 are shared with `Timer C', so we have to set | ||
97 | up Timer C to pass them through as raw interrupts. */ | ||
98 | for (tc = 0; tc < 2; tc++) | ||
99 | /* Turn on the timer. */ | ||
100 | V850E_TIMER_C_TMCC0 (tc) |= V850E_TIMER_C_TMCC0_CAE; | ||
101 | |||
102 | /* Make sure the relevant port0/port1 pins are assigned | ||
103 | interrupt duty. We used INTP001-INTP011 (don't screw with | ||
104 | INTP000 because the monitor uses it). */ | ||
105 | MA_PORT0_PMC |= 0x4; /* P02 (INTP001) in IRQ mode. */ | ||
106 | MA_PORT1_PMC |= 0x6; /* P11 (INTP010) & P12 (INTP011) in IRQ mode.*/ | ||
107 | } | ||
diff --git a/arch/v850/kernel/rte_ma1_cb.ld b/arch/v850/kernel/rte_ma1_cb.ld deleted file mode 100644 index c8e16d16be41..000000000000 --- a/arch/v850/kernel/rte_ma1_cb.ld +++ /dev/null | |||
@@ -1,57 +0,0 @@ | |||
1 | /* Linker script for the Midas labs RTE-V850E/MA1-CB evaluation board | ||
2 | (CONFIG_RTE_CB_MA1), with kernel in SDRAM, under Multi debugger. */ | ||
3 | |||
4 | MEMORY { | ||
5 | /* 1MB of SRAM; we can't use the last 32KB, because it's used by | ||
6 | the monitor scratch-RAM. This memory is mirrored 4 times. */ | ||
7 | SRAM : ORIGIN = SRAM_ADDR, LENGTH = (SRAM_SIZE - MON_SCRATCH_SIZE) | ||
8 | /* Monitor scratch RAM; only the interrupt vectors should go here. */ | ||
9 | MRAM : ORIGIN = MON_SCRATCH_ADDR, LENGTH = MON_SCRATCH_SIZE | ||
10 | /* 32MB of SDRAM. */ | ||
11 | SDRAM : ORIGIN = SDRAM_ADDR, LENGTH = SDRAM_SIZE | ||
12 | } | ||
13 | |||
14 | #ifdef CONFIG_RTE_CB_MA1_KSRAM | ||
15 | # define KRAM SRAM | ||
16 | #else | ||
17 | # define KRAM SDRAM | ||
18 | #endif | ||
19 | |||
20 | SECTIONS { | ||
21 | /* We can't use RAMK_KRAM_CONTENTS because that puts the whole | ||
22 | kernel in a single ELF segment, and the Multi debugger (which | ||
23 | we use to load the kernel) appears to have bizarre problems | ||
24 | dealing with it. */ | ||
25 | |||
26 | .text : { | ||
27 | __kram_start = . ; | ||
28 | TEXT_CONTENTS | ||
29 | } > KRAM | ||
30 | |||
31 | .data : { | ||
32 | DATA_CONTENTS | ||
33 | BSS_CONTENTS | ||
34 | RAMK_INIT_CONTENTS | ||
35 | __kram_end = . ; | ||
36 | BOOTMAP_CONTENTS | ||
37 | |||
38 | /* The address at which the interrupt vectors are initially | ||
39 | loaded by the loader. We can't load the interrupt vectors | ||
40 | directly into their target location, because the monitor | ||
41 | ROM for the GHS Multi debugger barfs if we try. | ||
42 | Unfortunately, Multi also doesn't deal correctly with ELF | ||
43 | sections where the LMA and VMA differ (it just ignores the | ||
44 | LMA), so we can't use that feature to work around the | ||
45 | problem! What we do instead is just put the interrupt | ||
46 | vectors into a normal section, and have the | ||
47 | `mach_early_init' function for Midas boards do the | ||
48 | necessary copying and relocation at runtime (this section | ||
49 | basically only contains `jr' instructions, so it's not | ||
50 | that hard). */ | ||
51 | . = ALIGN (0x10) ; | ||
52 | __intv_load_start = . ; | ||
53 | INTV_CONTENTS | ||
54 | } > KRAM | ||
55 | |||
56 | .root ALIGN (4096) : { ROOT_FS_CONTENTS } > SDRAM | ||
57 | } | ||
diff --git a/arch/v850/kernel/rte_mb_a_pci.c b/arch/v850/kernel/rte_mb_a_pci.c deleted file mode 100644 index 687e367d8b64..000000000000 --- a/arch/v850/kernel/rte_mb_a_pci.c +++ /dev/null | |||
@@ -1,819 +0,0 @@ | |||
1 | /* | ||
2 | * arch/v850/kernel/mb_a_pci.c -- PCI support for Midas lab RTE-MOTHER-A board | ||
3 | * | ||
4 | * Copyright (C) 2001,02,03,05 NEC Electronics Corporation | ||
5 | * Copyright (C) 2001,02,03,05 Miles Bader <miles@gnu.org> | ||
6 | * | ||
7 | * This file is subject to the terms and conditions of the GNU General | ||
8 | * Public License. See the file COPYING in the main directory of this | ||
9 | * archive for more details. | ||
10 | * | ||
11 | * Written by Miles Bader <miles@gnu.org> | ||
12 | */ | ||
13 | |||
14 | #include <linux/kernel.h> | ||
15 | #include <linux/module.h> | ||
16 | #include <linux/init.h> | ||
17 | #include <linux/slab.h> | ||
18 | #include <linux/spinlock.h> | ||
19 | #include <linux/pci.h> | ||
20 | |||
21 | #include <asm/machdep.h> | ||
22 | |||
23 | /* __nomods_init is like __devinit, but is a no-op when modules are enabled. | ||
24 | This is used by some routines that can be called either during boot | ||
25 | or by a module. */ | ||
26 | #ifdef CONFIG_MODULES | ||
27 | #define __nomods_init /*nothing*/ | ||
28 | #else | ||
29 | #define __nomods_init __devinit | ||
30 | #endif | ||
31 | |||
32 | /* PCI devices on the Mother-A board can only do DMA to/from the MB SRAM | ||
33 | (the RTE-V850E/MA1-CB cpu board doesn't support PCI access to | ||
34 | CPU-board memory), and since linux DMA buffers are allocated in | ||
35 | normal kernel memory, we basically have to copy DMA blocks around | ||
36 | (this is like a `bounce buffer'). When a DMA block is `mapped', we | ||
37 | allocate an identically sized block in MB SRAM, and if we're doing | ||
38 | output to the device, copy the CPU-memory block to the MB-SRAM block. | ||
39 | When an active block is `unmapped', we will copy the block back to | ||
40 | CPU memory if necessary, and then deallocate the MB SRAM block. | ||
41 | Ack. */ | ||
42 | |||
43 | /* Where the motherboard SRAM is in the PCI-bus address space (the | ||
44 | first 512K of it is also mapped at PCI address 0). */ | ||
45 | #define PCI_MB_SRAM_ADDR 0x800000 | ||
46 | |||
47 | /* Convert CPU-view MB SRAM address to/from PCI-view addresses of the | ||
48 | same memory. */ | ||
49 | #define MB_SRAM_TO_PCI(mb_sram_addr) \ | ||
50 | ((dma_addr_t)mb_sram_addr - MB_A_SRAM_ADDR + PCI_MB_SRAM_ADDR) | ||
51 | #define PCI_TO_MB_SRAM(pci_addr) \ | ||
52 | (void *)(pci_addr - PCI_MB_SRAM_ADDR + MB_A_SRAM_ADDR) | ||
53 | |||
54 | static void pcibios_assign_resources (void); | ||
55 | |||
56 | struct mb_pci_dev_irq { | ||
57 | unsigned dev; /* PCI device number */ | ||
58 | unsigned irq_base; /* First IRQ */ | ||
59 | unsigned query_pin; /* True if we should read the device's | ||
60 | Interrupt Pin info, and allocate | ||
61 | interrupt IRQ_BASE + PIN. */ | ||
62 | }; | ||
63 | |||
64 | /* PCI interrupts are mapped statically to GBUS interrupts. */ | ||
65 | static struct mb_pci_dev_irq mb_pci_dev_irqs[] = { | ||
66 | /* Motherboard SB82558 ethernet controller */ | ||
67 | { 10, IRQ_MB_A_LAN, 0 }, | ||
68 | /* PCI slot 1 */ | ||
69 | { 8, IRQ_MB_A_PCI1(0), 1 }, | ||
70 | /* PCI slot 2 */ | ||
71 | { 9, IRQ_MB_A_PCI2(0), 1 } | ||
72 | }; | ||
73 | #define NUM_MB_PCI_DEV_IRQS ARRAY_SIZE(mb_pci_dev_irqs) | ||
74 | |||
75 | |||
76 | /* PCI configuration primitives. */ | ||
77 | |||
78 | #define CONFIG_DMCFGA(bus, devfn, offs) \ | ||
79 | (0x80000000 \ | ||
80 | | ((offs) & ~0x3) \ | ||
81 | | ((devfn) << 8) \ | ||
82 | | ((bus)->number << 16)) | ||
83 | |||
84 | static int | ||
85 | mb_pci_read (struct pci_bus *bus, unsigned devfn, int offs, int size, u32 *rval) | ||
86 | { | ||
87 | u32 addr; | ||
88 | int flags; | ||
89 | |||
90 | local_irq_save (flags); | ||
91 | |||
92 | MB_A_PCI_PCICR = 0x7; | ||
93 | MB_A_PCI_DMCFGA = CONFIG_DMCFGA (bus, devfn, offs); | ||
94 | |||
95 | addr = MB_A_PCI_IO_ADDR + (offs & 0x3); | ||
96 | |||
97 | switch (size) { | ||
98 | case 1: *rval = *(volatile u8 *)addr; break; | ||
99 | case 2: *rval = *(volatile u16 *)addr; break; | ||
100 | case 4: *rval = *(volatile u32 *)addr; break; | ||
101 | } | ||
102 | |||
103 | if (MB_A_PCI_PCISR & 0x2000) { | ||
104 | MB_A_PCI_PCISR = 0x2000; | ||
105 | *rval = ~0; | ||
106 | } | ||
107 | |||
108 | MB_A_PCI_DMCFGA = 0; | ||
109 | |||
110 | local_irq_restore (flags); | ||
111 | |||
112 | return PCIBIOS_SUCCESSFUL; | ||
113 | } | ||
114 | |||
115 | static int | ||
116 | mb_pci_write (struct pci_bus *bus, unsigned devfn, int offs, int size, u32 val) | ||
117 | { | ||
118 | u32 addr; | ||
119 | int flags; | ||
120 | |||
121 | local_irq_save (flags); | ||
122 | |||
123 | MB_A_PCI_PCICR = 0x7; | ||
124 | MB_A_PCI_DMCFGA = CONFIG_DMCFGA (bus, devfn, offs); | ||
125 | |||
126 | addr = MB_A_PCI_IO_ADDR + (offs & 0x3); | ||
127 | |||
128 | switch (size) { | ||
129 | case 1: *(volatile u8 *)addr = val; break; | ||
130 | case 2: *(volatile u16 *)addr = val; break; | ||
131 | case 4: *(volatile u32 *)addr = val; break; | ||
132 | } | ||
133 | |||
134 | if (MB_A_PCI_PCISR & 0x2000) | ||
135 | MB_A_PCI_PCISR = 0x2000; | ||
136 | |||
137 | MB_A_PCI_DMCFGA = 0; | ||
138 | |||
139 | local_irq_restore (flags); | ||
140 | |||
141 | return PCIBIOS_SUCCESSFUL; | ||
142 | } | ||
143 | |||
144 | static struct pci_ops mb_pci_config_ops = { | ||
145 | .read = mb_pci_read, | ||
146 | .write = mb_pci_write, | ||
147 | }; | ||
148 | |||
149 | |||
150 | /* PCI Initialization. */ | ||
151 | |||
152 | static struct pci_bus *mb_pci_bus = 0; | ||
153 | |||
154 | /* Do initial PCI setup. */ | ||
155 | static int __devinit pcibios_init (void) | ||
156 | { | ||
157 | u32 id = MB_A_PCI_PCIHIDR; | ||
158 | u16 vendor = id & 0xFFFF; | ||
159 | u16 device = (id >> 16) & 0xFFFF; | ||
160 | |||
161 | if (vendor == PCI_VENDOR_ID_PLX && device == PCI_DEVICE_ID_PLX_9080) { | ||
162 | printk (KERN_INFO | ||
163 | "PCI: PLX Technology PCI9080 HOST/PCI bridge\n"); | ||
164 | |||
165 | MB_A_PCI_PCICR = 0x147; | ||
166 | |||
167 | MB_A_PCI_PCIBAR0 = 0x007FFF00; | ||
168 | MB_A_PCI_PCIBAR1 = 0x0000FF00; | ||
169 | MB_A_PCI_PCIBAR2 = 0x00800000; | ||
170 | |||
171 | MB_A_PCI_PCILTR = 0x20; | ||
172 | |||
173 | MB_A_PCI_PCIPBAM |= 0x3; | ||
174 | |||
175 | MB_A_PCI_PCISR = ~0; /* Clear errors. */ | ||
176 | |||
177 | /* Reprogram the motherboard's IO/config address space, | ||
178 | as we don't support the GCS7 address space that the | ||
179 | default uses. */ | ||
180 | |||
181 | /* Significant address bits used for decoding PCI GCS5 space | ||
182 | accesses. */ | ||
183 | MB_A_PCI_DMRR = ~(MB_A_PCI_MEM_SIZE - 1); | ||
184 | |||
185 | /* I don't understand this, but the SolutionGear example code | ||
186 | uses such an offset, and it doesn't work without it. XXX */ | ||
187 | #if GCS5_SIZE == 0x00800000 | ||
188 | #define GCS5_CFG_OFFS 0x00800000 | ||
189 | #else | ||
190 | #define GCS5_CFG_OFFS 0 | ||
191 | #endif | ||
192 | |||
193 | /* Address bit values for matching. Note that we have to give | ||
194 | the address from the motherboard's point of view, which is | ||
195 | different than the CPU's. */ | ||
196 | /* PCI memory space. */ | ||
197 | MB_A_PCI_DMLBAM = GCS5_CFG_OFFS + 0x0; | ||
198 | /* PCI I/O space. */ | ||
199 | MB_A_PCI_DMLBAI = | ||
200 | GCS5_CFG_OFFS + (MB_A_PCI_IO_ADDR - GCS5_ADDR); | ||
201 | |||
202 | mb_pci_bus = pci_scan_bus (0, &mb_pci_config_ops, 0); | ||
203 | |||
204 | pcibios_assign_resources (); | ||
205 | } else | ||
206 | printk (KERN_ERR "PCI: HOST/PCI bridge not found\n"); | ||
207 | |||
208 | return 0; | ||
209 | } | ||
210 | |||
211 | subsys_initcall (pcibios_init); | ||
212 | |||
213 | char __devinit *pcibios_setup (char *option) | ||
214 | { | ||
215 | /* Don't handle any options. */ | ||
216 | return option; | ||
217 | } | ||
218 | |||
219 | |||
220 | int __nomods_init pcibios_enable_device (struct pci_dev *dev, int mask) | ||
221 | { | ||
222 | u16 cmd, old_cmd; | ||
223 | int idx; | ||
224 | struct resource *r; | ||
225 | |||
226 | pci_read_config_word(dev, PCI_COMMAND, &cmd); | ||
227 | old_cmd = cmd; | ||
228 | for (idx = 0; idx < 6; idx++) { | ||
229 | r = &dev->resource[idx]; | ||
230 | if (!r->start && r->end) { | ||
231 | printk(KERN_ERR "PCI: Device %s not available because " | ||
232 | "of resource collisions\n", pci_name(dev)); | ||
233 | return -EINVAL; | ||
234 | } | ||
235 | if (r->flags & IORESOURCE_IO) | ||
236 | cmd |= PCI_COMMAND_IO; | ||
237 | if (r->flags & IORESOURCE_MEM) | ||
238 | cmd |= PCI_COMMAND_MEMORY; | ||
239 | } | ||
240 | if (cmd != old_cmd) { | ||
241 | printk("PCI: Enabling device %s (%04x -> %04x)\n", | ||
242 | pci_name(dev), old_cmd, cmd); | ||
243 | pci_write_config_word(dev, PCI_COMMAND, cmd); | ||
244 | } | ||
245 | return 0; | ||
246 | } | ||
247 | |||
248 | |||
249 | /* Resource allocation. */ | ||
250 | static void __devinit pcibios_assign_resources (void) | ||
251 | { | ||
252 | struct pci_dev *dev = NULL; | ||
253 | struct resource *r; | ||
254 | |||
255 | for_each_pci_dev(dev) { | ||
256 | unsigned di_num; | ||
257 | unsigned class = dev->class >> 8; | ||
258 | |||
259 | if (class && class != PCI_CLASS_BRIDGE_HOST) { | ||
260 | unsigned r_num; | ||
261 | for(r_num = 0; r_num < 6; r_num++) { | ||
262 | r = &dev->resource[r_num]; | ||
263 | if (!r->start && r->end) | ||
264 | pci_assign_resource (dev, r_num); | ||
265 | } | ||
266 | } | ||
267 | |||
268 | /* Assign interrupts. */ | ||
269 | for (di_num = 0; di_num < NUM_MB_PCI_DEV_IRQS; di_num++) { | ||
270 | struct mb_pci_dev_irq *di = &mb_pci_dev_irqs[di_num]; | ||
271 | |||
272 | if (di->dev == PCI_SLOT (dev->devfn)) { | ||
273 | unsigned irq = di->irq_base; | ||
274 | |||
275 | if (di->query_pin) { | ||
276 | /* Find out which interrupt pin | ||
277 | this device uses (each PCI | ||
278 | slot has 4). */ | ||
279 | u8 irq_pin; | ||
280 | |||
281 | pci_read_config_byte (dev, | ||
282 | PCI_INTERRUPT_PIN, | ||
283 | &irq_pin); | ||
284 | |||
285 | if (irq_pin == 0) | ||
286 | /* Doesn't use interrupts. */ | ||
287 | continue; | ||
288 | else | ||
289 | irq += irq_pin - 1; | ||
290 | } | ||
291 | |||
292 | pcibios_update_irq (dev, irq); | ||
293 | } | ||
294 | } | ||
295 | } | ||
296 | } | ||
297 | |||
298 | void __devinit pcibios_update_irq (struct pci_dev *dev, int irq) | ||
299 | { | ||
300 | dev->irq = irq; | ||
301 | pci_write_config_byte (dev, PCI_INTERRUPT_LINE, irq); | ||
302 | } | ||
303 | |||
304 | void __devinit | ||
305 | pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region, | ||
306 | struct resource *res) | ||
307 | { | ||
308 | unsigned long offset = 0; | ||
309 | |||
310 | if (res->flags & IORESOURCE_IO) { | ||
311 | offset = MB_A_PCI_IO_ADDR; | ||
312 | } else if (res->flags & IORESOURCE_MEM) { | ||
313 | offset = MB_A_PCI_MEM_ADDR; | ||
314 | } | ||
315 | |||
316 | region->start = res->start - offset; | ||
317 | region->end = res->end - offset; | ||
318 | } | ||
319 | |||
320 | |||
321 | /* Stubs for things we don't use. */ | ||
322 | |||
323 | /* Called after each bus is probed, but before its children are examined. */ | ||
324 | void pcibios_fixup_bus(struct pci_bus *b) | ||
325 | { | ||
326 | } | ||
327 | |||
328 | void | ||
329 | pcibios_align_resource (void *data, struct resource *res, | ||
330 | resource_size_t size, resource_size_t align) | ||
331 | { | ||
332 | } | ||
333 | |||
334 | void pcibios_set_master (struct pci_dev *dev) | ||
335 | { | ||
336 | } | ||
337 | |||
338 | |||
339 | /* Mother-A SRAM memory allocation. This is a simple first-fit allocator. */ | ||
340 | |||
341 | /* A memory free-list node. */ | ||
342 | struct mb_sram_free_area { | ||
343 | void *mem; | ||
344 | unsigned long size; | ||
345 | struct mb_sram_free_area *next; | ||
346 | }; | ||
347 | |||
348 | /* The tail of the free-list, which starts out containing all the SRAM. */ | ||
349 | static struct mb_sram_free_area mb_sram_free_tail = { | ||
350 | (void *)MB_A_SRAM_ADDR, MB_A_SRAM_SIZE, 0 | ||
351 | }; | ||
352 | |||
353 | /* The free-list. */ | ||
354 | static struct mb_sram_free_area *mb_sram_free_areas = &mb_sram_free_tail; | ||
355 | |||
356 | /* The free-list of free free-list nodes. (:-) */ | ||
357 | static struct mb_sram_free_area *mb_sram_free_free_areas = 0; | ||
358 | |||
359 | /* Spinlock protecting the above globals. */ | ||
360 | static DEFINE_SPINLOCK(mb_sram_lock); | ||
361 | |||
362 | /* Allocate a memory block at least SIZE bytes long in the Mother-A SRAM | ||
363 | space. */ | ||
364 | static void *alloc_mb_sram (size_t size) | ||
365 | { | ||
366 | struct mb_sram_free_area *prev, *fa; | ||
367 | unsigned long flags; | ||
368 | void *mem = 0; | ||
369 | |||
370 | spin_lock_irqsave (mb_sram_lock, flags); | ||
371 | |||
372 | /* Look for a free area that can contain SIZE bytes. */ | ||
373 | for (prev = 0, fa = mb_sram_free_areas; fa; prev = fa, fa = fa->next) | ||
374 | if (fa->size >= size) { | ||
375 | /* Found one! */ | ||
376 | mem = fa->mem; | ||
377 | |||
378 | if (fa->size == size) { | ||
379 | /* In fact, it fits exactly, so remove | ||
380 | this node from the free-list. */ | ||
381 | if (prev) | ||
382 | prev->next = fa->next; | ||
383 | else | ||
384 | mb_sram_free_areas = fa->next; | ||
385 | /* Put it on the free-list-entry-free-list. */ | ||
386 | fa->next = mb_sram_free_free_areas; | ||
387 | mb_sram_free_free_areas = fa; | ||
388 | } else { | ||
389 | /* FA is bigger than SIZE, so just | ||
390 | reduce its size to account for this | ||
391 | allocation. */ | ||
392 | fa->mem += size; | ||
393 | fa->size -= size; | ||
394 | } | ||
395 | |||
396 | break; | ||
397 | } | ||
398 | |||
399 | spin_unlock_irqrestore (mb_sram_lock, flags); | ||
400 | |||
401 | return mem; | ||
402 | } | ||
403 | |||
404 | /* Return the memory area MEM of size SIZE to the MB SRAM free pool. */ | ||
405 | static void free_mb_sram (void *mem, size_t size) | ||
406 | { | ||
407 | struct mb_sram_free_area *prev, *fa, *new_fa; | ||
408 | unsigned long flags; | ||
409 | void *end = mem + size; | ||
410 | |||
411 | spin_lock_irqsave (mb_sram_lock, flags); | ||
412 | |||
413 | retry: | ||
414 | /* Find an adjacent free-list entry. */ | ||
415 | for (prev = 0, fa = mb_sram_free_areas; fa; prev = fa, fa = fa->next) | ||
416 | if (fa->mem == end) { | ||
417 | /* FA is just after MEM, grow down to encompass it. */ | ||
418 | fa->mem = mem; | ||
419 | fa->size += size; | ||
420 | goto done; | ||
421 | } else if (fa->mem + fa->size == mem) { | ||
422 | struct mb_sram_free_area *next_fa = fa->next; | ||
423 | |||
424 | /* FA is just before MEM, expand to encompass it. */ | ||
425 | fa->size += size; | ||
426 | |||
427 | /* See if FA can now be merged with its successor. */ | ||
428 | if (next_fa && fa->mem + fa->size == next_fa->mem) { | ||
429 | /* Yup; merge NEXT_FA's info into FA. */ | ||
430 | fa->size += next_fa->size; | ||
431 | fa->next = next_fa->next; | ||
432 | /* Free NEXT_FA. */ | ||
433 | next_fa->next = mb_sram_free_free_areas; | ||
434 | mb_sram_free_free_areas = next_fa; | ||
435 | } | ||
436 | goto done; | ||
437 | } else if (fa->mem > mem) | ||
438 | /* We've reached the right spot in the free-list | ||
439 | without finding an adjacent free-area, so add | ||
440 | a new free area to hold mem. */ | ||
441 | break; | ||
442 | |||
443 | /* Make a new free-list entry. */ | ||
444 | |||
445 | /* First, get a free-list entry. */ | ||
446 | if (! mb_sram_free_free_areas) { | ||
447 | /* There are none, so make some. */ | ||
448 | void *block; | ||
449 | size_t block_size = sizeof (struct mb_sram_free_area) * 8; | ||
450 | |||
451 | /* Don't hold the lock while calling kmalloc (I'm not | ||
452 | sure whether it would be a problem, since we use | ||
453 | GFP_ATOMIC, but it makes me nervous). */ | ||
454 | spin_unlock_irqrestore (mb_sram_lock, flags); | ||
455 | |||
456 | block = kmalloc (block_size, GFP_ATOMIC); | ||
457 | if (! block) | ||
458 | panic ("free_mb_sram: can't allocate free-list entry"); | ||
459 | |||
460 | /* Now get the lock back. */ | ||
461 | spin_lock_irqsave (mb_sram_lock, flags); | ||
462 | |||
463 | /* Add the new free free-list entries. */ | ||
464 | while (block_size > 0) { | ||
465 | struct mb_sram_free_area *nfa = block; | ||
466 | nfa->next = mb_sram_free_free_areas; | ||
467 | mb_sram_free_free_areas = nfa; | ||
468 | block += sizeof *nfa; | ||
469 | block_size -= sizeof *nfa; | ||
470 | } | ||
471 | |||
472 | /* Since we dropped the lock to call kmalloc, the | ||
473 | free-list could have changed, so retry from the | ||
474 | beginning. */ | ||
475 | goto retry; | ||
476 | } | ||
477 | |||
478 | /* Remove NEW_FA from the free-list of free-list entries. */ | ||
479 | new_fa = mb_sram_free_free_areas; | ||
480 | mb_sram_free_free_areas = new_fa->next; | ||
481 | |||
482 | /* NEW_FA initially holds only MEM. */ | ||
483 | new_fa->mem = mem; | ||
484 | new_fa->size = size; | ||
485 | |||
486 | /* Insert NEW_FA in the free-list between PREV and FA. */ | ||
487 | new_fa->next = fa; | ||
488 | if (prev) | ||
489 | prev->next = new_fa; | ||
490 | else | ||
491 | mb_sram_free_areas = new_fa; | ||
492 | |||
493 | done: | ||
494 | spin_unlock_irqrestore (mb_sram_lock, flags); | ||
495 | } | ||
496 | |||
497 | |||
498 | /* Maintainence of CPU -> Mother-A DMA mappings. */ | ||
499 | |||
500 | struct dma_mapping { | ||
501 | void *cpu_addr; | ||
502 | void *mb_sram_addr; | ||
503 | size_t size; | ||
504 | struct dma_mapping *next; | ||
505 | }; | ||
506 | |||
507 | /* A list of mappings from CPU addresses to MB SRAM addresses for active | ||
508 | DMA blocks (that have been `granted' to the PCI device). */ | ||
509 | static struct dma_mapping *active_dma_mappings = 0; | ||
510 | |||
511 | /* A list of free mapping objects. */ | ||
512 | static struct dma_mapping *free_dma_mappings = 0; | ||
513 | |||
514 | /* Spinlock protecting the above globals. */ | ||
515 | static DEFINE_SPINLOCK(dma_mappings_lock); | ||
516 | |||
517 | static struct dma_mapping *new_dma_mapping (size_t size) | ||
518 | { | ||
519 | unsigned long flags; | ||
520 | struct dma_mapping *mapping; | ||
521 | void *mb_sram_block = alloc_mb_sram (size); | ||
522 | |||
523 | if (! mb_sram_block) | ||
524 | return 0; | ||
525 | |||
526 | spin_lock_irqsave (dma_mappings_lock, flags); | ||
527 | |||
528 | if (! free_dma_mappings) { | ||
529 | /* We're out of mapping structures, make more. */ | ||
530 | void *mblock; | ||
531 | size_t mblock_size = sizeof (struct dma_mapping) * 8; | ||
532 | |||
533 | /* Don't hold the lock while calling kmalloc (I'm not | ||
534 | sure whether it would be a problem, since we use | ||
535 | GFP_ATOMIC, but it makes me nervous). */ | ||
536 | spin_unlock_irqrestore (dma_mappings_lock, flags); | ||
537 | |||
538 | mblock = kmalloc (mblock_size, GFP_ATOMIC); | ||
539 | if (! mblock) { | ||
540 | free_mb_sram (mb_sram_block, size); | ||
541 | return 0; | ||
542 | } | ||
543 | |||
544 | /* Get the lock back. */ | ||
545 | spin_lock_irqsave (dma_mappings_lock, flags); | ||
546 | |||
547 | /* Add the new mapping structures to the free-list. */ | ||
548 | while (mblock_size > 0) { | ||
549 | struct dma_mapping *fm = mblock; | ||
550 | fm->next = free_dma_mappings; | ||
551 | free_dma_mappings = fm; | ||
552 | mblock += sizeof *fm; | ||
553 | mblock_size -= sizeof *fm; | ||
554 | } | ||
555 | } | ||
556 | |||
557 | /* Get a mapping struct from the freelist. */ | ||
558 | mapping = free_dma_mappings; | ||
559 | free_dma_mappings = mapping->next; | ||
560 | |||
561 | /* Initialize the mapping. Other fields should be filled in by | ||
562 | caller. */ | ||
563 | mapping->mb_sram_addr = mb_sram_block; | ||
564 | mapping->size = size; | ||
565 | |||
566 | /* Add it to the list of active mappings. */ | ||
567 | mapping->next = active_dma_mappings; | ||
568 | active_dma_mappings = mapping; | ||
569 | |||
570 | spin_unlock_irqrestore (dma_mappings_lock, flags); | ||
571 | |||
572 | return mapping; | ||
573 | } | ||
574 | |||
575 | static struct dma_mapping *find_dma_mapping (void *mb_sram_addr) | ||
576 | { | ||
577 | unsigned long flags; | ||
578 | struct dma_mapping *mapping; | ||
579 | |||
580 | spin_lock_irqsave (dma_mappings_lock, flags); | ||
581 | |||
582 | for (mapping = active_dma_mappings; mapping; mapping = mapping->next) | ||
583 | if (mapping->mb_sram_addr == mb_sram_addr) { | ||
584 | spin_unlock_irqrestore (dma_mappings_lock, flags); | ||
585 | return mapping; | ||
586 | } | ||
587 | |||
588 | panic ("find_dma_mapping: unmapped PCI DMA addr 0x%x", | ||
589 | MB_SRAM_TO_PCI (mb_sram_addr)); | ||
590 | } | ||
591 | |||
592 | static struct dma_mapping *deactivate_dma_mapping (void *mb_sram_addr) | ||
593 | { | ||
594 | unsigned long flags; | ||
595 | struct dma_mapping *mapping, *prev; | ||
596 | |||
597 | spin_lock_irqsave (dma_mappings_lock, flags); | ||
598 | |||
599 | for (prev = 0, mapping = active_dma_mappings; | ||
600 | mapping; | ||
601 | prev = mapping, mapping = mapping->next) | ||
602 | { | ||
603 | if (mapping->mb_sram_addr == mb_sram_addr) { | ||
604 | /* This is the MAPPING; deactivate it. */ | ||
605 | if (prev) | ||
606 | prev->next = mapping->next; | ||
607 | else | ||
608 | active_dma_mappings = mapping->next; | ||
609 | |||
610 | spin_unlock_irqrestore (dma_mappings_lock, flags); | ||
611 | |||
612 | return mapping; | ||
613 | } | ||
614 | } | ||
615 | |||
616 | panic ("deactivate_dma_mapping: unmapped PCI DMA addr 0x%x", | ||
617 | MB_SRAM_TO_PCI (mb_sram_addr)); | ||
618 | } | ||
619 | |||
620 | /* Return MAPPING to the freelist. */ | ||
621 | static inline void | ||
622 | free_dma_mapping (struct dma_mapping *mapping) | ||
623 | { | ||
624 | unsigned long flags; | ||
625 | |||
626 | free_mb_sram (mapping->mb_sram_addr, mapping->size); | ||
627 | |||
628 | spin_lock_irqsave (dma_mappings_lock, flags); | ||
629 | |||
630 | mapping->next = free_dma_mappings; | ||
631 | free_dma_mappings = mapping; | ||
632 | |||
633 | spin_unlock_irqrestore (dma_mappings_lock, flags); | ||
634 | } | ||
635 | |||
636 | |||
637 | /* Single PCI DMA mappings. */ | ||
638 | |||
639 | /* `Grant' to PDEV the memory block at CPU_ADDR, for doing DMA. The | ||
640 | 32-bit PCI bus mastering address to use is returned. the device owns | ||
641 | this memory until either pci_unmap_single or pci_dma_sync_single is | ||
642 | performed. */ | ||
643 | dma_addr_t | ||
644 | pci_map_single (struct pci_dev *pdev, void *cpu_addr, size_t size, int dir) | ||
645 | { | ||
646 | struct dma_mapping *mapping = new_dma_mapping (size); | ||
647 | |||
648 | if (! mapping) | ||
649 | return 0; | ||
650 | |||
651 | mapping->cpu_addr = cpu_addr; | ||
652 | |||
653 | if (dir == PCI_DMA_BIDIRECTIONAL || dir == PCI_DMA_TODEVICE) | ||
654 | memcpy (mapping->mb_sram_addr, cpu_addr, size); | ||
655 | |||
656 | return MB_SRAM_TO_PCI (mapping->mb_sram_addr); | ||
657 | } | ||
658 | |||
659 | /* Return to the CPU the PCI DMA memory block previously `granted' to | ||
660 | PDEV, at DMA_ADDR. */ | ||
661 | void pci_unmap_single (struct pci_dev *pdev, dma_addr_t dma_addr, size_t size, | ||
662 | int dir) | ||
663 | { | ||
664 | void *mb_sram_addr = PCI_TO_MB_SRAM (dma_addr); | ||
665 | struct dma_mapping *mapping = deactivate_dma_mapping (mb_sram_addr); | ||
666 | |||
667 | if (size != mapping->size) | ||
668 | panic ("pci_unmap_single: size (%d) doesn't match" | ||
669 | " size of mapping at PCI DMA addr 0x%x (%d)\n", | ||
670 | size, dma_addr, mapping->size); | ||
671 | |||
672 | /* Copy back the DMA'd contents if necessary. */ | ||
673 | if (dir == PCI_DMA_BIDIRECTIONAL || dir == PCI_DMA_FROMDEVICE) | ||
674 | memcpy (mapping->cpu_addr, mb_sram_addr, size); | ||
675 | |||
676 | /* Return mapping to the freelist. */ | ||
677 | free_dma_mapping (mapping); | ||
678 | } | ||
679 | |||
680 | /* Make physical memory consistent for a single streaming mode DMA | ||
681 | translation after a transfer. | ||
682 | |||
683 | If you perform a pci_map_single() but wish to interrogate the | ||
684 | buffer using the cpu, yet do not wish to teardown the PCI dma | ||
685 | mapping, you must call this function before doing so. At the next | ||
686 | point you give the PCI dma address back to the card, you must first | ||
687 | perform a pci_dma_sync_for_device, and then the device again owns | ||
688 | the buffer. */ | ||
689 | void | ||
690 | pci_dma_sync_single_for_cpu (struct pci_dev *pdev, dma_addr_t dma_addr, size_t size, | ||
691 | int dir) | ||
692 | { | ||
693 | void *mb_sram_addr = PCI_TO_MB_SRAM (dma_addr); | ||
694 | struct dma_mapping *mapping = find_dma_mapping (mb_sram_addr); | ||
695 | |||
696 | /* Synchronize the DMA buffer with the CPU buffer if necessary. */ | ||
697 | if (dir == PCI_DMA_FROMDEVICE) | ||
698 | memcpy (mapping->cpu_addr, mb_sram_addr, size); | ||
699 | else if (dir == PCI_DMA_TODEVICE) | ||
700 | ; /* nothing to do */ | ||
701 | else | ||
702 | panic("pci_dma_sync_single: unsupported sync dir: %d", dir); | ||
703 | } | ||
704 | |||
705 | void | ||
706 | pci_dma_sync_single_for_device (struct pci_dev *pdev, dma_addr_t dma_addr, size_t size, | ||
707 | int dir) | ||
708 | { | ||
709 | void *mb_sram_addr = PCI_TO_MB_SRAM (dma_addr); | ||
710 | struct dma_mapping *mapping = find_dma_mapping (mb_sram_addr); | ||
711 | |||
712 | /* Synchronize the DMA buffer with the CPU buffer if necessary. */ | ||
713 | if (dir == PCI_DMA_FROMDEVICE) | ||
714 | ; /* nothing to do */ | ||
715 | else if (dir == PCI_DMA_TODEVICE) | ||
716 | memcpy (mb_sram_addr, mapping->cpu_addr, size); | ||
717 | else | ||
718 | panic("pci_dma_sync_single: unsupported sync dir: %d", dir); | ||
719 | } | ||
720 | |||
721 | |||
722 | /* Scatter-gather PCI DMA mappings. */ | ||
723 | |||
724 | /* Do multiple DMA mappings at once. */ | ||
725 | int | ||
726 | pci_map_sg (struct pci_dev *pdev, struct scatterlist *sg, int sg_len, int dir) | ||
727 | { | ||
728 | BUG (); | ||
729 | return 0; | ||
730 | } | ||
731 | |||
732 | /* Unmap multiple DMA mappings at once. */ | ||
733 | void | ||
734 | pci_unmap_sg (struct pci_dev *pdev, struct scatterlist *sg, int sg_len,int dir) | ||
735 | { | ||
736 | BUG (); | ||
737 | } | ||
738 | |||
739 | /* Make physical memory consistent for a set of streaming mode DMA | ||
740 | translations after a transfer. The same as pci_dma_sync_single_* but | ||
741 | for a scatter-gather list, same rules and usage. */ | ||
742 | |||
743 | void | ||
744 | pci_dma_sync_sg_for_cpu (struct pci_dev *dev, | ||
745 | struct scatterlist *sg, int sg_len, | ||
746 | int dir) | ||
747 | { | ||
748 | BUG (); | ||
749 | } | ||
750 | |||
751 | void | ||
752 | pci_dma_sync_sg_for_device (struct pci_dev *dev, | ||
753 | struct scatterlist *sg, int sg_len, | ||
754 | int dir) | ||
755 | { | ||
756 | BUG (); | ||
757 | } | ||
758 | |||
759 | |||
760 | /* PCI mem mapping. */ | ||
761 | |||
762 | /* Allocate and map kernel buffer using consistent mode DMA for PCI | ||
763 | device. Returns non-NULL cpu-view pointer to the buffer if | ||
764 | successful and sets *DMA_ADDR to the pci side dma address as well, | ||
765 | else DMA_ADDR is undefined. */ | ||
766 | void * | ||
767 | pci_alloc_consistent (struct pci_dev *pdev, size_t size, dma_addr_t *dma_addr) | ||
768 | { | ||
769 | void *mb_sram_mem = alloc_mb_sram (size); | ||
770 | if (mb_sram_mem) | ||
771 | *dma_addr = MB_SRAM_TO_PCI (mb_sram_mem); | ||
772 | return mb_sram_mem; | ||
773 | } | ||
774 | |||
775 | /* Free and unmap a consistent DMA buffer. CPU_ADDR and DMA_ADDR must | ||
776 | be values that were returned from pci_alloc_consistent. SIZE must be | ||
777 | the same as what as passed into pci_alloc_consistent. References to | ||
778 | the memory and mappings associated with CPU_ADDR or DMA_ADDR past | ||
779 | this call are illegal. */ | ||
780 | void | ||
781 | pci_free_consistent (struct pci_dev *pdev, size_t size, void *cpu_addr, | ||
782 | dma_addr_t dma_addr) | ||
783 | { | ||
784 | void *mb_sram_mem = PCI_TO_MB_SRAM (dma_addr); | ||
785 | free_mb_sram (mb_sram_mem, size); | ||
786 | } | ||
787 | |||
788 | |||
789 | /* iomap/iomap */ | ||
790 | |||
791 | void __iomem *pci_iomap (struct pci_dev *dev, int bar, unsigned long max) | ||
792 | { | ||
793 | resource_size_t start = pci_resource_start (dev, bar); | ||
794 | resource_size_t len = pci_resource_len (dev, bar); | ||
795 | |||
796 | if (!start || len == 0) | ||
797 | return 0; | ||
798 | |||
799 | /* None of the ioremap functions actually do anything, other than | ||
800 | re-casting their argument, so don't bother differentiating them. */ | ||
801 | return ioremap (start, len); | ||
802 | } | ||
803 | |||
804 | void pci_iounmap (struct pci_dev *dev, void __iomem *addr) | ||
805 | { | ||
806 | /* nothing */ | ||
807 | } | ||
808 | |||
809 | |||
810 | /* symbol exports (for modules) */ | ||
811 | |||
812 | EXPORT_SYMBOL (pci_map_single); | ||
813 | EXPORT_SYMBOL (pci_unmap_single); | ||
814 | EXPORT_SYMBOL (pci_alloc_consistent); | ||
815 | EXPORT_SYMBOL (pci_free_consistent); | ||
816 | EXPORT_SYMBOL (pci_dma_sync_single_for_cpu); | ||
817 | EXPORT_SYMBOL (pci_dma_sync_single_for_device); | ||
818 | EXPORT_SYMBOL (pci_iomap); | ||
819 | EXPORT_SYMBOL (pci_iounmap); | ||
diff --git a/arch/v850/kernel/rte_me2_cb.c b/arch/v850/kernel/rte_me2_cb.c deleted file mode 100644 index 46803d48dffe..000000000000 --- a/arch/v850/kernel/rte_me2_cb.c +++ /dev/null | |||
@@ -1,298 +0,0 @@ | |||
1 | /* | ||
2 | * arch/v850/kernel/rte_me2_cb.c -- Midas labs RTE-V850E/ME2-CB board | ||
3 | * | ||
4 | * Copyright (C) 2001,02,03 NEC Electronics Corporation | ||
5 | * Copyright (C) 2001,02,03 Miles Bader <miles@gnu.org> | ||
6 | * | ||
7 | * This file is subject to the terms and conditions of the GNU General | ||
8 | * Public License. See the file COPYING in the main directory of this | ||
9 | * archive for more details. | ||
10 | * | ||
11 | * Written by Miles Bader <miles@gnu.org> | ||
12 | */ | ||
13 | |||
14 | #include <linux/kernel.h> | ||
15 | #include <linux/init.h> | ||
16 | #include <linux/bootmem.h> | ||
17 | #include <linux/irq.h> | ||
18 | #include <linux/fs.h> | ||
19 | #include <linux/major.h> | ||
20 | #include <linux/sched.h> | ||
21 | #include <linux/delay.h> | ||
22 | |||
23 | #include <asm/atomic.h> | ||
24 | #include <asm/page.h> | ||
25 | #include <asm/me2.h> | ||
26 | #include <asm/rte_me2_cb.h> | ||
27 | #include <asm/machdep.h> | ||
28 | #include <asm/v850e_intc.h> | ||
29 | #include <asm/v850e_cache.h> | ||
30 | #include <asm/irq.h> | ||
31 | |||
32 | #include "mach.h" | ||
33 | |||
34 | extern unsigned long *_intv_start; | ||
35 | extern unsigned long *_intv_end; | ||
36 | |||
37 | /* LED access routines. */ | ||
38 | extern unsigned read_leds (int pos, char *buf, int len); | ||
39 | extern unsigned write_leds (int pos, const char *buf, int len); | ||
40 | |||
41 | |||
42 | /* SDRAM are almost contiguous (with a small hole in between; | ||
43 | see mach_reserve_bootmem for details), so just use both as one big area. */ | ||
44 | #define RAM_START SDRAM_ADDR | ||
45 | #define RAM_END (SDRAM_ADDR + SDRAM_SIZE) | ||
46 | |||
47 | |||
48 | void __init mach_get_physical_ram (unsigned long *ram_start, | ||
49 | unsigned long *ram_len) | ||
50 | { | ||
51 | *ram_start = RAM_START; | ||
52 | *ram_len = RAM_END - RAM_START; | ||
53 | } | ||
54 | |||
55 | void mach_gettimeofday (struct timespec *tv) | ||
56 | { | ||
57 | tv->tv_sec = 0; | ||
58 | tv->tv_nsec = 0; | ||
59 | } | ||
60 | |||
61 | /* Called before configuring an on-chip UART. */ | ||
62 | void rte_me2_cb_uart_pre_configure (unsigned chan, | ||
63 | unsigned cflags, unsigned baud) | ||
64 | { | ||
65 | /* The RTE-V850E/ME2-CB connects some general-purpose I/O | ||
66 | pins on the CPU to the RTS/CTS lines of UARTB channel 0's | ||
67 | serial connection. | ||
68 | I/O pins P21 and P22 are RTS and CTS respectively. */ | ||
69 | if (chan == 0) { | ||
70 | /* Put P21 & P22 in I/O port mode. */ | ||
71 | ME2_PORT2_PMC &= ~0x6; | ||
72 | /* Make P21 and output, and P22 an input. */ | ||
73 | ME2_PORT2_PM = (ME2_PORT2_PM & ~0xC) | 0x4; | ||
74 | } | ||
75 | |||
76 | me2_uart_pre_configure (chan, cflags, baud); | ||
77 | } | ||
78 | |||
79 | void __init mach_init_irqs (void) | ||
80 | { | ||
81 | /* Initialize interrupts. */ | ||
82 | me2_init_irqs (); | ||
83 | rte_me2_cb_init_irqs (); | ||
84 | } | ||
85 | |||
86 | #ifdef CONFIG_ROM_KERNEL | ||
87 | /* Initialization for kernel in ROM. */ | ||
88 | static inline rom_kernel_init (void) | ||
89 | { | ||
90 | /* If the kernel is in ROM, we have to copy any initialized data | ||
91 | from ROM into RAM. */ | ||
92 | extern unsigned long _data_load_start, _sdata, _edata; | ||
93 | register unsigned long *src = &_data_load_start; | ||
94 | register unsigned long *dst = &_sdata, *end = &_edata; | ||
95 | |||
96 | while (dst != end) | ||
97 | *dst++ = *src++; | ||
98 | } | ||
99 | #endif /* CONFIG_ROM_KERNEL */ | ||
100 | |||
101 | static void install_interrupt_vectors (void) | ||
102 | { | ||
103 | unsigned long *p1, *p2; | ||
104 | |||
105 | ME2_IRAMM = 0x03; /* V850E/ME2 iRAM write mode */ | ||
106 | |||
107 | /* vector copy to iRAM */ | ||
108 | p1 = (unsigned long *)0; /* v85x vector start */ | ||
109 | p2 = (unsigned long *)&_intv_start; | ||
110 | while (p2 < (unsigned long *)&_intv_end) | ||
111 | *p1++ = *p2++; | ||
112 | |||
113 | ME2_IRAMM = 0x00; /* V850E/ME2 iRAM read mode */ | ||
114 | } | ||
115 | |||
116 | /* CompactFlash */ | ||
117 | |||
118 | static void cf_power_on (void) | ||
119 | { | ||
120 | /* CF card detected? */ | ||
121 | if (CB_CF_STS0 & 0x0030) | ||
122 | return; | ||
123 | |||
124 | CB_CF_REG0 = 0x0002; /* reest on */ | ||
125 | mdelay (10); | ||
126 | CB_CF_REG0 = 0x0003; /* power on */ | ||
127 | mdelay (10); | ||
128 | CB_CF_REG0 = 0x0001; /* reset off */ | ||
129 | mdelay (10); | ||
130 | } | ||
131 | |||
132 | static void cf_power_off (void) | ||
133 | { | ||
134 | CB_CF_REG0 = 0x0003; /* power on */ | ||
135 | mdelay (10); | ||
136 | CB_CF_REG0 = 0x0002; /* reest on */ | ||
137 | mdelay (10); | ||
138 | } | ||
139 | |||
140 | void __init mach_early_init (void) | ||
141 | { | ||
142 | install_interrupt_vectors (); | ||
143 | |||
144 | /* CS1 SDRAM instruction cache enable */ | ||
145 | v850e_cache_enable (0x04, 0x03, 0); | ||
146 | |||
147 | rte_cb_early_init (); | ||
148 | |||
149 | /* CompactFlash power on */ | ||
150 | cf_power_on (); | ||
151 | |||
152 | #if defined (CONFIG_ROM_KERNEL) | ||
153 | rom_kernel_init (); | ||
154 | #endif | ||
155 | } | ||
156 | |||
157 | |||
158 | /* RTE-V850E/ME2-CB Programmable Interrupt Controller. */ | ||
159 | |||
160 | static struct cb_pic_irq_init cb_pic_irq_inits[] = { | ||
161 | { "CB_EXTTM0", IRQ_CB_EXTTM0, 1, 1, 6 }, | ||
162 | { "CB_EXTSIO", IRQ_CB_EXTSIO, 1, 1, 6 }, | ||
163 | { "CB_TOVER", IRQ_CB_TOVER, 1, 1, 6 }, | ||
164 | { "CB_GINT0", IRQ_CB_GINT0, 1, 1, 6 }, | ||
165 | { "CB_USB", IRQ_CB_USB, 1, 1, 6 }, | ||
166 | { "CB_LANC", IRQ_CB_LANC, 1, 1, 6 }, | ||
167 | { "CB_USB_VBUS_ON", IRQ_CB_USB_VBUS_ON, 1, 1, 6 }, | ||
168 | { "CB_USB_VBUS_OFF", IRQ_CB_USB_VBUS_OFF, 1, 1, 6 }, | ||
169 | { "CB_EXTTM1", IRQ_CB_EXTTM1, 1, 1, 6 }, | ||
170 | { "CB_EXTTM2", IRQ_CB_EXTTM2, 1, 1, 6 }, | ||
171 | { 0 } | ||
172 | }; | ||
173 | #define NUM_CB_PIC_IRQ_INITS (ARRAY_SIZE(cb_pic_irq_inits) - 1) | ||
174 | |||
175 | static struct hw_interrupt_type cb_pic_hw_itypes[NUM_CB_PIC_IRQ_INITS]; | ||
176 | static unsigned char cb_pic_active_irqs = 0; | ||
177 | |||
178 | void __init rte_me2_cb_init_irqs (void) | ||
179 | { | ||
180 | cb_pic_init_irq_types (cb_pic_irq_inits, cb_pic_hw_itypes); | ||
181 | |||
182 | /* Initalize on board PIC1 (not PIC0) enable */ | ||
183 | CB_PIC_INT0M = 0x0000; | ||
184 | CB_PIC_INT1M = 0x0000; | ||
185 | CB_PIC_INTR = 0x0000; | ||
186 | CB_PIC_INTEN |= CB_PIC_INT1EN; | ||
187 | |||
188 | ME2_PORT2_PMC |= 0x08; /* INTP23/SCK1 mode */ | ||
189 | ME2_PORT2_PFC &= ~0x08; /* INTP23 mode */ | ||
190 | ME2_INTR(2) &= ~0x08; /* INTP23 falling-edge detect */ | ||
191 | ME2_INTF(2) &= ~0x08; /* " */ | ||
192 | |||
193 | rte_cb_init_irqs (); /* gbus &c */ | ||
194 | } | ||
195 | |||
196 | |||
197 | /* Enable interrupt handling for interrupt IRQ. */ | ||
198 | void cb_pic_enable_irq (unsigned irq) | ||
199 | { | ||
200 | CB_PIC_INT1M |= 1 << (irq - CB_PIC_BASE_IRQ); | ||
201 | } | ||
202 | |||
203 | void cb_pic_disable_irq (unsigned irq) | ||
204 | { | ||
205 | CB_PIC_INT1M &= ~(1 << (irq - CB_PIC_BASE_IRQ)); | ||
206 | } | ||
207 | |||
208 | void cb_pic_shutdown_irq (unsigned irq) | ||
209 | { | ||
210 | cb_pic_disable_irq (irq); | ||
211 | |||
212 | if (--cb_pic_active_irqs == 0) | ||
213 | free_irq (IRQ_CB_PIC, 0); | ||
214 | |||
215 | CB_PIC_INT1M &= ~(1 << (irq - CB_PIC_BASE_IRQ)); | ||
216 | } | ||
217 | |||
218 | static irqreturn_t cb_pic_handle_irq (int irq, void *dev_id, | ||
219 | struct pt_regs *regs) | ||
220 | { | ||
221 | irqreturn_t rval = IRQ_NONE; | ||
222 | unsigned status = CB_PIC_INTR; | ||
223 | unsigned enable = CB_PIC_INT1M; | ||
224 | |||
225 | /* Only pay attention to enabled interrupts. */ | ||
226 | status &= enable; | ||
227 | |||
228 | CB_PIC_INTEN &= ~CB_PIC_INT1EN; | ||
229 | |||
230 | if (status) { | ||
231 | unsigned mask = 1; | ||
232 | |||
233 | irq = CB_PIC_BASE_IRQ; | ||
234 | do { | ||
235 | /* There's an active interrupt, find out which one, | ||
236 | and call its handler. */ | ||
237 | while (! (status & mask)) { | ||
238 | irq++; | ||
239 | mask <<= 1; | ||
240 | } | ||
241 | status &= ~mask; | ||
242 | |||
243 | CB_PIC_INTR = mask; | ||
244 | |||
245 | /* Recursively call handle_irq to handle it. */ | ||
246 | handle_irq (irq, regs); | ||
247 | rval = IRQ_HANDLED; | ||
248 | } while (status); | ||
249 | } | ||
250 | |||
251 | CB_PIC_INTEN |= CB_PIC_INT1EN; | ||
252 | |||
253 | return rval; | ||
254 | } | ||
255 | |||
256 | |||
257 | static void irq_nop (unsigned irq) { } | ||
258 | |||
259 | static unsigned cb_pic_startup_irq (unsigned irq) | ||
260 | { | ||
261 | int rval; | ||
262 | |||
263 | if (cb_pic_active_irqs == 0) { | ||
264 | rval = request_irq (IRQ_CB_PIC, cb_pic_handle_irq, | ||
265 | IRQF_DISABLED, "cb_pic_handler", 0); | ||
266 | if (rval != 0) | ||
267 | return rval; | ||
268 | } | ||
269 | |||
270 | cb_pic_active_irqs++; | ||
271 | |||
272 | cb_pic_enable_irq (irq); | ||
273 | |||
274 | return 0; | ||
275 | } | ||
276 | |||
277 | /* Initialize HW_IRQ_TYPES for INTC-controlled irqs described in array | ||
278 | INITS (which is terminated by an entry with the name field == 0). */ | ||
279 | void __init cb_pic_init_irq_types (struct cb_pic_irq_init *inits, | ||
280 | struct hw_interrupt_type *hw_irq_types) | ||
281 | { | ||
282 | struct cb_pic_irq_init *init; | ||
283 | for (init = inits; init->name; init++) { | ||
284 | struct hw_interrupt_type *hwit = hw_irq_types++; | ||
285 | |||
286 | hwit->typename = init->name; | ||
287 | |||
288 | hwit->startup = cb_pic_startup_irq; | ||
289 | hwit->shutdown = cb_pic_shutdown_irq; | ||
290 | hwit->enable = cb_pic_enable_irq; | ||
291 | hwit->disable = cb_pic_disable_irq; | ||
292 | hwit->ack = irq_nop; | ||
293 | hwit->end = irq_nop; | ||
294 | |||
295 | /* Initialize kernel IRQ infrastructure for this interrupt. */ | ||
296 | init_irq_handlers(init->base, init->num, init->interval, hwit); | ||
297 | } | ||
298 | } | ||
diff --git a/arch/v850/kernel/rte_me2_cb.ld b/arch/v850/kernel/rte_me2_cb.ld deleted file mode 100644 index cf0766065ec6..000000000000 --- a/arch/v850/kernel/rte_me2_cb.ld +++ /dev/null | |||
@@ -1,30 +0,0 @@ | |||
1 | /* Linker script for the Midas labs RTE-V850E/ME2-CB evaluation board | ||
2 | (CONFIG_RTE_CB_ME2), with kernel in SDRAM. */ | ||
3 | |||
4 | MEMORY { | ||
5 | /* 128Kbyte of IRAM */ | ||
6 | IRAM : ORIGIN = 0x00000000, LENGTH = 0x00020000 | ||
7 | |||
8 | /* 32MB of SDRAM. */ | ||
9 | SDRAM : ORIGIN = SDRAM_ADDR, LENGTH = SDRAM_SIZE | ||
10 | } | ||
11 | |||
12 | #define KRAM SDRAM | ||
13 | |||
14 | SECTIONS { | ||
15 | .text : { | ||
16 | __kram_start = . ; | ||
17 | TEXT_CONTENTS | ||
18 | INTV_CONTENTS /* copy to iRAM (0x0-0x620) */ | ||
19 | } > KRAM | ||
20 | |||
21 | .data : { | ||
22 | DATA_CONTENTS | ||
23 | BSS_CONTENTS | ||
24 | RAMK_INIT_CONTENTS | ||
25 | __kram_end = . ; | ||
26 | BOOTMAP_CONTENTS | ||
27 | } > KRAM | ||
28 | |||
29 | .root ALIGN (4096) : { ROOT_FS_CONTENTS } > SDRAM | ||
30 | } | ||
diff --git a/arch/v850/kernel/rte_nb85e_cb-multi.ld b/arch/v850/kernel/rte_nb85e_cb-multi.ld deleted file mode 100644 index de347b4fffac..000000000000 --- a/arch/v850/kernel/rte_nb85e_cb-multi.ld +++ /dev/null | |||
@@ -1,57 +0,0 @@ | |||
1 | /* Linker script for the Midas labs RTE-NB85E-CB evaluation board | ||
2 | (CONFIG_RTE_CB_NB85E), with the Multi debugger ROM monitor . */ | ||
3 | |||
4 | MEMORY { | ||
5 | /* 1MB of SRAM; we can't use the last 96KB, because it's used by | ||
6 | the monitor scratch-RAM. This memory is mirrored 4 times. */ | ||
7 | SRAM : ORIGIN = SRAM_ADDR, LENGTH = (SRAM_SIZE - MON_SCRATCH_SIZE) | ||
8 | /* Monitor scratch RAM; only the interrupt vectors should go here. */ | ||
9 | MRAM : ORIGIN = MON_SCRATCH_ADDR, LENGTH = MON_SCRATCH_SIZE | ||
10 | /* 16MB of SDRAM. */ | ||
11 | SDRAM : ORIGIN = SDRAM_ADDR, LENGTH = SDRAM_SIZE | ||
12 | } | ||
13 | |||
14 | #ifdef CONFIG_RTE_CB_NB85E_KSRAM | ||
15 | # define KRAM SRAM | ||
16 | #else | ||
17 | # define KRAM SDRAM | ||
18 | #endif | ||
19 | |||
20 | SECTIONS { | ||
21 | /* We can't use RAMK_KRAM_CONTENTS because that puts the whole | ||
22 | kernel in a single ELF segment, and the Multi debugger (which | ||
23 | we use to load the kernel) appears to have bizarre problems | ||
24 | dealing with it. */ | ||
25 | |||
26 | .text : { | ||
27 | __kram_start = . ; | ||
28 | TEXT_CONTENTS | ||
29 | } > KRAM | ||
30 | |||
31 | .data : { | ||
32 | DATA_CONTENTS | ||
33 | BSS_CONTENTS | ||
34 | RAMK_INIT_CONTENTS | ||
35 | __kram_end = . ; | ||
36 | BOOTMAP_CONTENTS | ||
37 | |||
38 | /* The address at which the interrupt vectors are initially | ||
39 | loaded by the loader. We can't load the interrupt vectors | ||
40 | directly into their target location, because the monitor | ||
41 | ROM for the GHS Multi debugger barfs if we try. | ||
42 | Unfortunately, Multi also doesn't deal correctly with ELF | ||
43 | sections where the LMA and VMA differ (it just ignores the | ||
44 | LMA), so we can't use that feature to work around the | ||
45 | problem! What we do instead is just put the interrupt | ||
46 | vectors into a normal section, and have the | ||
47 | `mach_early_init' function for Midas boards do the | ||
48 | necessary copying and relocation at runtime (this section | ||
49 | basically only contains `jr' instructions, so it's not | ||
50 | that hard). */ | ||
51 | . = ALIGN (0x10) ; | ||
52 | __intv_load_start = . ; | ||
53 | INTV_CONTENTS | ||
54 | } > KRAM | ||
55 | |||
56 | .root ALIGN (4096) : { ROOT_FS_CONTENTS } > SDRAM | ||
57 | } | ||
diff --git a/arch/v850/kernel/rte_nb85e_cb.c b/arch/v850/kernel/rte_nb85e_cb.c deleted file mode 100644 index b4a045da5d70..000000000000 --- a/arch/v850/kernel/rte_nb85e_cb.c +++ /dev/null | |||
@@ -1,81 +0,0 @@ | |||
1 | /* | ||
2 | * arch/v850/kernel/rte_nb85e_cb.c -- Midas labs RTE-V850E/NB85E-CB board | ||
3 | * | ||
4 | * Copyright (C) 2001,02,03 NEC Electronics Corporation | ||
5 | * Copyright (C) 2001,02,03 Miles Bader <miles@gnu.org> | ||
6 | * | ||
7 | * This file is subject to the terms and conditions of the GNU General | ||
8 | * Public License. See the file COPYING in the main directory of this | ||
9 | * archive for more details. | ||
10 | * | ||
11 | * Written by Miles Bader <miles@gnu.org> | ||
12 | */ | ||
13 | |||
14 | #include <linux/kernel.h> | ||
15 | #include <linux/init.h> | ||
16 | #include <linux/mm.h> | ||
17 | #include <linux/swap.h> | ||
18 | #include <linux/bootmem.h> | ||
19 | #include <linux/irq.h> | ||
20 | |||
21 | #include <asm/atomic.h> | ||
22 | #include <asm/page.h> | ||
23 | #include <asm/v850e.h> | ||
24 | #include <asm/rte_nb85e_cb.h> | ||
25 | |||
26 | #include "mach.h" | ||
27 | |||
28 | void __init mach_early_init (void) | ||
29 | { | ||
30 | /* Configure caching; some possible settings: | ||
31 | |||
32 | BHC = 0x0000, DCC = 0x0000 -- all caching disabled | ||
33 | BHC = 0x0040, DCC = 0x0000 -- SDRAM: icache only | ||
34 | BHC = 0x0080, DCC = 0x0C00 -- SDRAM: write-back dcache only | ||
35 | BHC = 0x00C0, DCC = 0x0C00 -- SDRAM: icache + write-back dcache | ||
36 | BHC = 0x00C0, DCC = 0x0800 -- SDRAM: icache + write-thru dcache | ||
37 | |||
38 | We can only cache SDRAM (we can't use cache SRAM because it's in | ||
39 | the same memory region as the on-chip RAM and I/O space). | ||
40 | |||
41 | Unfortunately, the dcache seems to be buggy, so we only use the | ||
42 | icache for now. */ | ||
43 | v850e_cache_enable (0x0040 /*BHC*/, 0x0003 /*ICC*/, 0x0000 /*DCC*/); | ||
44 | |||
45 | rte_cb_early_init (); | ||
46 | } | ||
47 | |||
48 | void __init mach_get_physical_ram (unsigned long *ram_start, | ||
49 | unsigned long *ram_len) | ||
50 | { | ||
51 | /* We just use SDRAM here. */ | ||
52 | *ram_start = SDRAM_ADDR; | ||
53 | *ram_len = SDRAM_SIZE; | ||
54 | } | ||
55 | |||
56 | void mach_gettimeofday (struct timespec *tv) | ||
57 | { | ||
58 | tv->tv_sec = 0; | ||
59 | tv->tv_nsec = 0; | ||
60 | } | ||
61 | |||
62 | /* Called before configuring an on-chip UART. */ | ||
63 | void rte_nb85e_cb_uart_pre_configure (unsigned chan, | ||
64 | unsigned cflags, unsigned baud) | ||
65 | { | ||
66 | /* The RTE-NB85E-CB connects some general-purpose I/O pins on the | ||
67 | CPU to the RTS/CTS lines the UART's serial connection, as follows: | ||
68 | P00 = CTS (in), P01 = DSR (in), P02 = RTS (out), P03 = DTR (out). */ | ||
69 | |||
70 | TEG_PORT0_PM = 0x03; /* P00 and P01 inputs, P02 and P03 outputs */ | ||
71 | TEG_PORT0_IO = 0x03; /* Accept input */ | ||
72 | |||
73 | /* Do pre-configuration for the actual UART. */ | ||
74 | teg_uart_pre_configure (chan, cflags, baud); | ||
75 | } | ||
76 | |||
77 | void __init mach_init_irqs (void) | ||
78 | { | ||
79 | teg_init_irqs (); | ||
80 | rte_cb_init_irqs (); | ||
81 | } | ||
diff --git a/arch/v850/kernel/rte_nb85e_cb.ld b/arch/v850/kernel/rte_nb85e_cb.ld deleted file mode 100644 index b672f484f085..000000000000 --- a/arch/v850/kernel/rte_nb85e_cb.ld +++ /dev/null | |||
@@ -1,22 +0,0 @@ | |||
1 | /* Linker script for the Midas labs RTE-NB85E-CB evaluation board | ||
2 | (CONFIG_RTE_CB_NB85E). */ | ||
3 | |||
4 | MEMORY { | ||
5 | LOW : ORIGIN = 0x0, LENGTH = 0x00100000 | ||
6 | /* 1MB of SRAM This memory is mirrored 4 times. */ | ||
7 | SRAM : ORIGIN = SRAM_ADDR, LENGTH = SRAM_SIZE | ||
8 | /* 16MB of SDRAM. */ | ||
9 | SDRAM : ORIGIN = SDRAM_ADDR, LENGTH = SDRAM_SIZE | ||
10 | } | ||
11 | |||
12 | #ifdef CONFIG_RTE_CB_NB85E_KSRAM | ||
13 | # define KRAM SRAM | ||
14 | #else | ||
15 | # define KRAM SDRAM | ||
16 | #endif | ||
17 | |||
18 | SECTIONS { | ||
19 | .intv : { INTV_CONTENTS } > LOW | ||
20 | .sram : { RAMK_KRAM_CONTENTS } > KRAM | ||
21 | .root : { ROOT_FS_CONTENTS } > SDRAM | ||
22 | } | ||
diff --git a/arch/v850/kernel/setup.c b/arch/v850/kernel/setup.c deleted file mode 100644 index 10335cecf7bd..000000000000 --- a/arch/v850/kernel/setup.c +++ /dev/null | |||
@@ -1,329 +0,0 @@ | |||
1 | /* | ||
2 | * arch/v850/kernel/setup.c -- Arch-dependent initialization functions | ||
3 | * | ||
4 | * Copyright (C) 2001,02,03,05,06 NEC Electronics Corporation | ||
5 | * Copyright (C) 2001,02,03,05,06 Miles Bader <miles@gnu.org> | ||
6 | * | ||
7 | * This file is subject to the terms and conditions of the GNU General | ||
8 | * Public License. See the file COPYING in the main directory of this | ||
9 | * archive for more details. | ||
10 | * | ||
11 | * Written by Miles Bader <miles@gnu.org> | ||
12 | */ | ||
13 | |||
14 | #include <linux/mm.h> | ||
15 | #include <linux/bootmem.h> | ||
16 | #include <linux/swap.h> /* we don't have swap, but for nr_free_pages */ | ||
17 | #include <linux/irq.h> | ||
18 | #include <linux/reboot.h> | ||
19 | #include <linux/personality.h> | ||
20 | #include <linux/major.h> | ||
21 | #include <linux/root_dev.h> | ||
22 | #include <linux/mtd/mtd.h> | ||
23 | #include <linux/init.h> | ||
24 | |||
25 | #include <asm/irq.h> | ||
26 | #include <asm/setup.h> | ||
27 | |||
28 | #include "mach.h" | ||
29 | |||
30 | /* These symbols are all defined in the linker map to delineate various | ||
31 | statically allocated regions of memory. */ | ||
32 | |||
33 | extern char _intv_start, _intv_end; | ||
34 | /* `kram' is only used if the kernel uses part of normal user RAM. */ | ||
35 | extern char _kram_start __attribute__ ((__weak__)); | ||
36 | extern char _kram_end __attribute__ ((__weak__)); | ||
37 | extern char _init_start, _init_end; | ||
38 | extern char _bootmap; | ||
39 | extern char _stext, _etext, _sdata, _edata, _sbss, _ebss; | ||
40 | /* Many platforms use an embedded root image. */ | ||
41 | extern char _root_fs_image_start __attribute__ ((__weak__)); | ||
42 | extern char _root_fs_image_end __attribute__ ((__weak__)); | ||
43 | |||
44 | |||
45 | char __initdata command_line[COMMAND_LINE_SIZE]; | ||
46 | |||
47 | /* Memory not used by the kernel. */ | ||
48 | static unsigned long total_ram_pages; | ||
49 | |||
50 | /* System RAM. */ | ||
51 | static unsigned long ram_start = 0, ram_len = 0; | ||
52 | |||
53 | |||
54 | #define ADDR_TO_PAGE_UP(x) ((((unsigned long)x) + PAGE_SIZE-1) >> PAGE_SHIFT) | ||
55 | #define ADDR_TO_PAGE(x) (((unsigned long)x) >> PAGE_SHIFT) | ||
56 | #define PAGE_TO_ADDR(x) (((unsigned long)x) << PAGE_SHIFT) | ||
57 | |||
58 | static void init_mem_alloc (unsigned long ram_start, unsigned long ram_len); | ||
59 | |||
60 | void set_mem_root (void *addr, size_t len, char *cmd_line); | ||
61 | |||
62 | |||
63 | void __init setup_arch (char **cmdline) | ||
64 | { | ||
65 | /* Keep a copy of command line */ | ||
66 | *cmdline = command_line; | ||
67 | memcpy (boot_command_line, command_line, COMMAND_LINE_SIZE); | ||
68 | boot_command_line[COMMAND_LINE_SIZE - 1] = '\0'; | ||
69 | |||
70 | console_verbose (); | ||
71 | |||
72 | init_mm.start_code = (unsigned long) &_stext; | ||
73 | init_mm.end_code = (unsigned long) &_etext; | ||
74 | init_mm.end_data = (unsigned long) &_edata; | ||
75 | init_mm.brk = (unsigned long) &_kram_end; | ||
76 | |||
77 | /* Find out what mem this machine has. */ | ||
78 | mach_get_physical_ram (&ram_start, &ram_len); | ||
79 | /* ... and tell the kernel about it. */ | ||
80 | init_mem_alloc (ram_start, ram_len); | ||
81 | |||
82 | printk (KERN_INFO "CPU: %s\nPlatform: %s\n", | ||
83 | CPU_MODEL_LONG, PLATFORM_LONG); | ||
84 | |||
85 | /* do machine-specific setups. */ | ||
86 | mach_setup (cmdline); | ||
87 | |||
88 | #ifdef CONFIG_MTD | ||
89 | if (!ROOT_DEV && &_root_fs_image_end > &_root_fs_image_start) | ||
90 | set_mem_root (&_root_fs_image_start, | ||
91 | &_root_fs_image_end - &_root_fs_image_start, | ||
92 | *cmdline); | ||
93 | #endif | ||
94 | } | ||
95 | |||
96 | void __init trap_init (void) | ||
97 | { | ||
98 | } | ||
99 | |||
100 | #ifdef CONFIG_MTD | ||
101 | |||
102 | /* From drivers/mtd/devices/slram.c */ | ||
103 | #define SLRAM_BLK_SZ 0x4000 | ||
104 | |||
105 | /* Set the root filesystem to be the given memory region. | ||
106 | Some parameter may be appended to CMD_LINE. */ | ||
107 | void set_mem_root (void *addr, size_t len, char *cmd_line) | ||
108 | { | ||
109 | /* Some sort of idiocy in MTD means we must supply a length that's | ||
110 | a multiple of SLRAM_BLK_SZ. We just round up the real length, | ||
111 | as the file system shouldn't attempt to access anything beyond | ||
112 | the end of the image anyway. */ | ||
113 | len = (((len - 1) + SLRAM_BLK_SZ) / SLRAM_BLK_SZ) * SLRAM_BLK_SZ; | ||
114 | |||
115 | /* The only way to pass info to the MTD slram driver is via | ||
116 | the command line. */ | ||
117 | if (*cmd_line) { | ||
118 | cmd_line += strlen (cmd_line); | ||
119 | *cmd_line++ = ' '; | ||
120 | } | ||
121 | sprintf (cmd_line, "slram=root,0x%x,+0x%x", (u32)addr, (u32)len); | ||
122 | |||
123 | ROOT_DEV = MKDEV (MTD_BLOCK_MAJOR, 0); | ||
124 | } | ||
125 | #endif | ||
126 | |||
127 | |||
128 | static void irq_nop (unsigned irq) { } | ||
129 | static unsigned irq_zero (unsigned irq) { return 0; } | ||
130 | |||
131 | static void nmi_end (unsigned irq) | ||
132 | { | ||
133 | if (irq != IRQ_NMI (0)) { | ||
134 | printk (KERN_CRIT "NMI %d is unrecoverable; restarting...", | ||
135 | irq - IRQ_NMI (0)); | ||
136 | machine_restart (0); | ||
137 | } | ||
138 | } | ||
139 | |||
140 | static struct hw_interrupt_type nmi_irq_type = { | ||
141 | .typename = "NMI", | ||
142 | .startup = irq_zero, /* startup */ | ||
143 | .shutdown = irq_nop, /* shutdown */ | ||
144 | .enable = irq_nop, /* enable */ | ||
145 | .disable = irq_nop, /* disable */ | ||
146 | .ack = irq_nop, /* ack */ | ||
147 | .end = nmi_end, /* end */ | ||
148 | }; | ||
149 | |||
150 | void __init init_IRQ (void) | ||
151 | { | ||
152 | init_irq_handlers (0, NUM_MACH_IRQS, 1, 0); | ||
153 | init_irq_handlers (IRQ_NMI (0), NUM_NMIS, 1, &nmi_irq_type); | ||
154 | mach_init_irqs (); | ||
155 | } | ||
156 | |||
157 | |||
158 | void __init mem_init (void) | ||
159 | { | ||
160 | max_mapnr = MAP_NR (ram_start + ram_len); | ||
161 | |||
162 | num_physpages = ADDR_TO_PAGE (ram_len); | ||
163 | |||
164 | total_ram_pages = free_all_bootmem (); | ||
165 | |||
166 | printk (KERN_INFO | ||
167 | "Memory: %luK/%luK available" | ||
168 | " (%luK kernel code, %luK data)\n", | ||
169 | PAGE_TO_ADDR (nr_free_pages()) / 1024, | ||
170 | ram_len / 1024, | ||
171 | ((unsigned long)&_etext - (unsigned long)&_stext) / 1024, | ||
172 | ((unsigned long)&_ebss - (unsigned long)&_sdata) / 1024); | ||
173 | } | ||
174 | |||
175 | void free_initmem (void) | ||
176 | { | ||
177 | unsigned long ram_end = ram_start + ram_len; | ||
178 | unsigned long start = PAGE_ALIGN ((unsigned long)(&_init_start)); | ||
179 | |||
180 | if (start >= ram_start && start < ram_end) { | ||
181 | unsigned long addr; | ||
182 | unsigned long end = PAGE_ALIGN ((unsigned long)(&_init_end)); | ||
183 | |||
184 | if (end > ram_end) | ||
185 | end = ram_end; | ||
186 | |||
187 | printk("Freeing unused kernel memory: %ldK freed\n", | ||
188 | (end - start) / 1024); | ||
189 | |||
190 | for (addr = start; addr < end; addr += PAGE_SIZE) { | ||
191 | struct page *page = virt_to_page (addr); | ||
192 | ClearPageReserved (page); | ||
193 | init_page_count (page); | ||
194 | __free_page (page); | ||
195 | total_ram_pages++; | ||
196 | } | ||
197 | } | ||
198 | } | ||
199 | |||
200 | |||
201 | /* Initialize the `bootmem allocator'. RAM_START and RAM_LEN identify | ||
202 | what RAM may be used. */ | ||
203 | static void __init | ||
204 | init_bootmem_alloc (unsigned long ram_start, unsigned long ram_len) | ||
205 | { | ||
206 | /* The part of the kernel that's in the same managed RAM space | ||
207 | used for general allocation. */ | ||
208 | unsigned long kram_start = (unsigned long)&_kram_start; | ||
209 | unsigned long kram_end = (unsigned long)&_kram_end; | ||
210 | /* End of the managed RAM space. */ | ||
211 | unsigned long ram_end = ram_start + ram_len; | ||
212 | /* Address range of the interrupt vector table. */ | ||
213 | unsigned long intv_start = (unsigned long)&_intv_start; | ||
214 | unsigned long intv_end = (unsigned long)&_intv_end; | ||
215 | /* True if the interrupt vectors are in the managed RAM area. */ | ||
216 | int intv_in_ram = (intv_end > ram_start && intv_start < ram_end); | ||
217 | /* True if the interrupt vectors are inside the kernel's RAM. */ | ||
218 | int intv_in_kram = (intv_end > kram_start && intv_start < kram_end); | ||
219 | /* A pointer to an optional function that reserves platform-specific | ||
220 | memory regions. We declare the pointer `volatile' to avoid gcc | ||
221 | turning the call into a static call (the problem is that since | ||
222 | it's a weak symbol, a static call may end up trying to reference | ||
223 | the location 0x0, which is not always reachable). */ | ||
224 | void (*volatile mrb) (void) = mach_reserve_bootmem; | ||
225 | /* The bootmem allocator's allocation bitmap. */ | ||
226 | unsigned long bootmap = (unsigned long)&_bootmap; | ||
227 | unsigned long bootmap_len; | ||
228 | |||
229 | /* Round bootmap location up to next page. */ | ||
230 | bootmap = PAGE_TO_ADDR (ADDR_TO_PAGE_UP (bootmap)); | ||
231 | |||
232 | /* Initialize bootmem allocator. */ | ||
233 | bootmap_len = init_bootmem_node (NODE_DATA (0), | ||
234 | ADDR_TO_PAGE (bootmap), | ||
235 | ADDR_TO_PAGE (PAGE_OFFSET), | ||
236 | ADDR_TO_PAGE (ram_end)); | ||
237 | |||
238 | /* Now make the RAM actually allocatable (it starts out `reserved'). */ | ||
239 | free_bootmem (ram_start, ram_len); | ||
240 | |||
241 | if (kram_end > kram_start) | ||
242 | /* Reserve the RAM part of the kernel's address space, so it | ||
243 | doesn't get allocated. */ | ||
244 | reserve_bootmem(kram_start, kram_end - kram_start, | ||
245 | BOOTMEM_DEFAULT); | ||
246 | |||
247 | if (intv_in_ram && !intv_in_kram) | ||
248 | /* Reserve the interrupt vector space. */ | ||
249 | reserve_bootmem(intv_start, intv_end - intv_start, | ||
250 | BOOTMEM_DEFAULT); | ||
251 | |||
252 | if (bootmap >= ram_start && bootmap < ram_end) | ||
253 | /* Reserve the bootmap space. */ | ||
254 | reserve_bootmem(bootmap, bootmap_len, | ||
255 | BOOTMEM_DEFAULT); | ||
256 | |||
257 | /* Reserve the memory used by the root filesystem image if it's | ||
258 | in RAM. */ | ||
259 | if (&_root_fs_image_end > &_root_fs_image_start | ||
260 | && (unsigned long)&_root_fs_image_start >= ram_start | ||
261 | && (unsigned long)&_root_fs_image_start < ram_end) | ||
262 | reserve_bootmem ((unsigned long)&_root_fs_image_start, | ||
263 | &_root_fs_image_end - &_root_fs_image_start, | ||
264 | BOOTMEM_DEFAULT); | ||
265 | |||
266 | /* Let the platform-dependent code reserve some too. */ | ||
267 | if (mrb) | ||
268 | (*mrb) (); | ||
269 | } | ||
270 | |||
271 | /* Tell the kernel about what RAM it may use for memory allocation. */ | ||
272 | static void __init | ||
273 | init_mem_alloc (unsigned long ram_start, unsigned long ram_len) | ||
274 | { | ||
275 | unsigned i; | ||
276 | unsigned long zones_size[MAX_NR_ZONES]; | ||
277 | |||
278 | init_bootmem_alloc (ram_start, ram_len); | ||
279 | |||
280 | for (i = 0; i < MAX_NR_ZONES; i++) | ||
281 | zones_size[i] = 0; | ||
282 | |||
283 | /* We stuff all the memory into one area, which includes the | ||
284 | initial gap from PAGE_OFFSET to ram_start. */ | ||
285 | zones_size[ZONE_DMA] | ||
286 | = ADDR_TO_PAGE (ram_len + (ram_start - PAGE_OFFSET)); | ||
287 | |||
288 | /* The allocator is very picky about the address of the first | ||
289 | allocatable page -- it must be at least as aligned as the | ||
290 | maximum allocation -- so try to detect cases where it will get | ||
291 | confused and signal them at compile time (this is a common | ||
292 | problem when porting to a new platform with ). There is a | ||
293 | similar runtime check in free_area_init_core. */ | ||
294 | #if ((PAGE_OFFSET >> PAGE_SHIFT) & ((1UL << (MAX_ORDER - 1)) - 1)) | ||
295 | #error MAX_ORDER is too large for given PAGE_OFFSET (use CONFIG_FORCE_MAX_ZONEORDER to change it) | ||
296 | #endif | ||
297 | NODE_DATA(0)->node_mem_map = NULL; | ||
298 | free_area_init_node(0, zones_size, ADDR_TO_PAGE (PAGE_OFFSET), 0); | ||
299 | } | ||
300 | |||
301 | |||
302 | |||
303 | /* Taken from m68knommu */ | ||
304 | void show_mem(void) | ||
305 | { | ||
306 | unsigned long i; | ||
307 | int free = 0, total = 0, reserved = 0, shared = 0; | ||
308 | int cached = 0; | ||
309 | |||
310 | printk(KERN_INFO "\nMem-info:\n"); | ||
311 | show_free_areas(); | ||
312 | i = max_mapnr; | ||
313 | while (i-- > 0) { | ||
314 | total++; | ||
315 | if (PageReserved(mem_map+i)) | ||
316 | reserved++; | ||
317 | else if (PageSwapCache(mem_map+i)) | ||
318 | cached++; | ||
319 | else if (!page_count(mem_map+i)) | ||
320 | free++; | ||
321 | else | ||
322 | shared += page_count(mem_map+i) - 1; | ||
323 | } | ||
324 | printk(KERN_INFO "%d pages of RAM\n",total); | ||
325 | printk(KERN_INFO "%d free pages\n",free); | ||
326 | printk(KERN_INFO "%d reserved pages\n",reserved); | ||
327 | printk(KERN_INFO "%d pages shared\n",shared); | ||
328 | printk(KERN_INFO "%d pages swap cached\n",cached); | ||
329 | } | ||
diff --git a/arch/v850/kernel/signal.c b/arch/v850/kernel/signal.c deleted file mode 100644 index bf166e7e762c..000000000000 --- a/arch/v850/kernel/signal.c +++ /dev/null | |||
@@ -1,523 +0,0 @@ | |||
1 | /* | ||
2 | * arch/v850/kernel/signal.c -- Signal handling | ||
3 | * | ||
4 | * Copyright (C) 2001,02,03 NEC Electronics Corporation | ||
5 | * Copyright (C) 2001,02,03 Miles Bader <miles@gnu.org> | ||
6 | * Copyright (C) 1999,2000,2002 Niibe Yutaka & Kaz Kojima | ||
7 | * Copyright (C) 1991,1992 Linus Torvalds | ||
8 | * | ||
9 | * This file is subject to the terms and conditions of the GNU General | ||
10 | * Public License. See the file COPYING in the main directory of this | ||
11 | * archive for more details. | ||
12 | * | ||
13 | * 1997-11-28 Modified for POSIX.1b signals by Richard Henderson | ||
14 | * | ||
15 | * This file was derived from the sh version, arch/sh/kernel/signal.c | ||
16 | */ | ||
17 | |||
18 | #include <linux/mm.h> | ||
19 | #include <linux/smp.h> | ||
20 | #include <linux/kernel.h> | ||
21 | #include <linux/signal.h> | ||
22 | #include <linux/errno.h> | ||
23 | #include <linux/wait.h> | ||
24 | #include <linux/ptrace.h> | ||
25 | #include <linux/unistd.h> | ||
26 | #include <linux/stddef.h> | ||
27 | #include <linux/personality.h> | ||
28 | #include <linux/tty.h> | ||
29 | |||
30 | #include <asm/ucontext.h> | ||
31 | #include <asm/uaccess.h> | ||
32 | #include <asm/pgtable.h> | ||
33 | #include <asm/pgalloc.h> | ||
34 | #include <asm/thread_info.h> | ||
35 | #include <asm/cacheflush.h> | ||
36 | |||
37 | #define DEBUG_SIG 0 | ||
38 | |||
39 | #define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP))) | ||
40 | |||
41 | asmlinkage int do_signal(struct pt_regs *regs, sigset_t *oldset); | ||
42 | |||
43 | /* | ||
44 | * Atomically swap in the new signal mask, and wait for a signal. | ||
45 | */ | ||
46 | asmlinkage int | ||
47 | sys_sigsuspend(old_sigset_t mask, struct pt_regs *regs) | ||
48 | { | ||
49 | sigset_t saveset; | ||
50 | |||
51 | mask &= _BLOCKABLE; | ||
52 | spin_lock_irq(¤t->sighand->siglock); | ||
53 | saveset = current->blocked; | ||
54 | siginitset(¤t->blocked, mask); | ||
55 | recalc_sigpending(); | ||
56 | spin_unlock_irq(¤t->sighand->siglock); | ||
57 | |||
58 | regs->gpr[GPR_RVAL] = -EINTR; | ||
59 | while (1) { | ||
60 | current->state = TASK_INTERRUPTIBLE; | ||
61 | schedule(); | ||
62 | if (do_signal(regs, &saveset)) | ||
63 | return -EINTR; | ||
64 | } | ||
65 | } | ||
66 | |||
67 | asmlinkage int | ||
68 | sys_rt_sigsuspend(sigset_t *unewset, size_t sigsetsize, | ||
69 | struct pt_regs *regs) | ||
70 | { | ||
71 | sigset_t saveset, newset; | ||
72 | |||
73 | /* XXX: Don't preclude handling different sized sigset_t's. */ | ||
74 | if (sigsetsize != sizeof(sigset_t)) | ||
75 | return -EINVAL; | ||
76 | |||
77 | if (copy_from_user(&newset, unewset, sizeof(newset))) | ||
78 | return -EFAULT; | ||
79 | sigdelsetmask(&newset, ~_BLOCKABLE); | ||
80 | spin_lock_irq(¤t->sighand->siglock); | ||
81 | saveset = current->blocked; | ||
82 | current->blocked = newset; | ||
83 | recalc_sigpending(); | ||
84 | spin_unlock_irq(¤t->sighand->siglock); | ||
85 | |||
86 | regs->gpr[GPR_RVAL] = -EINTR; | ||
87 | while (1) { | ||
88 | current->state = TASK_INTERRUPTIBLE; | ||
89 | schedule(); | ||
90 | if (do_signal(regs, &saveset)) | ||
91 | return -EINTR; | ||
92 | } | ||
93 | } | ||
94 | |||
95 | asmlinkage int | ||
96 | sys_sigaction(int sig, const struct old_sigaction *act, | ||
97 | struct old_sigaction *oact) | ||
98 | { | ||
99 | struct k_sigaction new_ka, old_ka; | ||
100 | int ret; | ||
101 | |||
102 | if (act) { | ||
103 | old_sigset_t mask; | ||
104 | if (!access_ok(VERIFY_READ, act, sizeof(*act)) || | ||
105 | __get_user(new_ka.sa.sa_handler, &act->sa_handler) || | ||
106 | __get_user(new_ka.sa.sa_restorer, &act->sa_restorer)) | ||
107 | return -EFAULT; | ||
108 | __get_user(new_ka.sa.sa_flags, &act->sa_flags); | ||
109 | __get_user(mask, &act->sa_mask); | ||
110 | siginitset(&new_ka.sa.sa_mask, mask); | ||
111 | } | ||
112 | |||
113 | ret = do_sigaction(sig, act ? &new_ka : NULL, oact ? &old_ka : NULL); | ||
114 | |||
115 | if (!ret && oact) { | ||
116 | if (!access_ok(VERIFY_WRITE, oact, sizeof(*oact)) || | ||
117 | __put_user(old_ka.sa.sa_handler, &oact->sa_handler) || | ||
118 | __put_user(old_ka.sa.sa_restorer, &oact->sa_restorer)) | ||
119 | return -EFAULT; | ||
120 | __put_user(old_ka.sa.sa_flags, &oact->sa_flags); | ||
121 | __put_user(old_ka.sa.sa_mask.sig[0], &oact->sa_mask); | ||
122 | } | ||
123 | |||
124 | return ret; | ||
125 | } | ||
126 | |||
127 | asmlinkage int | ||
128 | sys_sigaltstack(const stack_t *uss, stack_t *uoss, | ||
129 | struct pt_regs *regs) | ||
130 | { | ||
131 | return do_sigaltstack(uss, uoss, regs->gpr[GPR_SP]); | ||
132 | } | ||
133 | |||
134 | |||
135 | /* | ||
136 | * Do a signal return; undo the signal stack. | ||
137 | */ | ||
138 | |||
139 | struct sigframe | ||
140 | { | ||
141 | struct sigcontext sc; | ||
142 | unsigned long extramask[_NSIG_WORDS-1]; | ||
143 | unsigned long tramp[2]; /* signal trampoline */ | ||
144 | }; | ||
145 | |||
146 | struct rt_sigframe | ||
147 | { | ||
148 | struct siginfo info; | ||
149 | struct ucontext uc; | ||
150 | unsigned long tramp[2]; /* signal trampoline */ | ||
151 | }; | ||
152 | |||
153 | static int | ||
154 | restore_sigcontext(struct pt_regs *regs, struct sigcontext *sc, int *rval_p) | ||
155 | { | ||
156 | unsigned int err = 0; | ||
157 | |||
158 | #define COPY(x) err |= __get_user(regs->x, &sc->regs.x) | ||
159 | COPY(gpr[0]); COPY(gpr[1]); COPY(gpr[2]); COPY(gpr[3]); | ||
160 | COPY(gpr[4]); COPY(gpr[5]); COPY(gpr[6]); COPY(gpr[7]); | ||
161 | COPY(gpr[8]); COPY(gpr[9]); COPY(gpr[10]); COPY(gpr[11]); | ||
162 | COPY(gpr[12]); COPY(gpr[13]); COPY(gpr[14]); COPY(gpr[15]); | ||
163 | COPY(gpr[16]); COPY(gpr[17]); COPY(gpr[18]); COPY(gpr[19]); | ||
164 | COPY(gpr[20]); COPY(gpr[21]); COPY(gpr[22]); COPY(gpr[23]); | ||
165 | COPY(gpr[24]); COPY(gpr[25]); COPY(gpr[26]); COPY(gpr[27]); | ||
166 | COPY(gpr[28]); COPY(gpr[29]); COPY(gpr[30]); COPY(gpr[31]); | ||
167 | COPY(pc); COPY(psw); | ||
168 | COPY(ctpc); COPY(ctpsw); COPY(ctbp); | ||
169 | #undef COPY | ||
170 | |||
171 | return err; | ||
172 | } | ||
173 | |||
174 | asmlinkage int sys_sigreturn(struct pt_regs *regs) | ||
175 | { | ||
176 | struct sigframe *frame = (struct sigframe *)regs->gpr[GPR_SP]; | ||
177 | sigset_t set; | ||
178 | int rval; | ||
179 | |||
180 | if (!access_ok(VERIFY_READ, frame, sizeof(*frame))) | ||
181 | goto badframe; | ||
182 | |||
183 | if (__get_user(set.sig[0], &frame->sc.oldmask) | ||
184 | || (_NSIG_WORDS > 1 | ||
185 | && __copy_from_user(&set.sig[1], &frame->extramask, | ||
186 | sizeof(frame->extramask)))) | ||
187 | goto badframe; | ||
188 | |||
189 | sigdelsetmask(&set, ~_BLOCKABLE); | ||
190 | spin_lock_irq(¤t->sighand->siglock); | ||
191 | current->blocked = set; | ||
192 | recalc_sigpending(); | ||
193 | spin_unlock_irq(¤t->sighand->siglock); | ||
194 | |||
195 | if (restore_sigcontext(regs, &frame->sc, &rval)) | ||
196 | goto badframe; | ||
197 | return rval; | ||
198 | |||
199 | badframe: | ||
200 | force_sig(SIGSEGV, current); | ||
201 | return 0; | ||
202 | } | ||
203 | |||
204 | asmlinkage int sys_rt_sigreturn(struct pt_regs *regs) | ||
205 | { | ||
206 | struct rt_sigframe *frame = (struct rt_sigframe *)regs->gpr[GPR_SP]; | ||
207 | sigset_t set; | ||
208 | stack_t st; | ||
209 | int rval; | ||
210 | |||
211 | if (!access_ok(VERIFY_READ, frame, sizeof(*frame))) | ||
212 | goto badframe; | ||
213 | |||
214 | if (__copy_from_user(&set, &frame->uc.uc_sigmask, sizeof(set))) | ||
215 | goto badframe; | ||
216 | |||
217 | sigdelsetmask(&set, ~_BLOCKABLE); | ||
218 | spin_lock_irq(¤t->sighand->siglock); | ||
219 | current->blocked = set; | ||
220 | recalc_sigpending(); | ||
221 | spin_unlock_irq(¤t->sighand->siglock); | ||
222 | |||
223 | if (restore_sigcontext(regs, &frame->uc.uc_mcontext, &rval)) | ||
224 | goto badframe; | ||
225 | |||
226 | if (__copy_from_user(&st, &frame->uc.uc_stack, sizeof(st))) | ||
227 | goto badframe; | ||
228 | /* It is more difficult to avoid calling this function than to | ||
229 | call it and ignore errors. */ | ||
230 | do_sigaltstack(&st, NULL, regs->gpr[GPR_SP]); | ||
231 | |||
232 | return rval; | ||
233 | |||
234 | badframe: | ||
235 | force_sig(SIGSEGV, current); | ||
236 | return 0; | ||
237 | } | ||
238 | |||
239 | /* | ||
240 | * Set up a signal frame. | ||
241 | */ | ||
242 | |||
243 | static int | ||
244 | setup_sigcontext(struct sigcontext *sc, struct pt_regs *regs, | ||
245 | unsigned long mask) | ||
246 | { | ||
247 | int err = 0; | ||
248 | |||
249 | #define COPY(x) err |= __put_user(regs->x, &sc->regs.x) | ||
250 | COPY(gpr[0]); COPY(gpr[1]); COPY(gpr[2]); COPY(gpr[3]); | ||
251 | COPY(gpr[4]); COPY(gpr[5]); COPY(gpr[6]); COPY(gpr[7]); | ||
252 | COPY(gpr[8]); COPY(gpr[9]); COPY(gpr[10]); COPY(gpr[11]); | ||
253 | COPY(gpr[12]); COPY(gpr[13]); COPY(gpr[14]); COPY(gpr[15]); | ||
254 | COPY(gpr[16]); COPY(gpr[17]); COPY(gpr[18]); COPY(gpr[19]); | ||
255 | COPY(gpr[20]); COPY(gpr[21]); COPY(gpr[22]); COPY(gpr[23]); | ||
256 | COPY(gpr[24]); COPY(gpr[25]); COPY(gpr[26]); COPY(gpr[27]); | ||
257 | COPY(gpr[28]); COPY(gpr[29]); COPY(gpr[30]); COPY(gpr[31]); | ||
258 | COPY(pc); COPY(psw); | ||
259 | COPY(ctpc); COPY(ctpsw); COPY(ctbp); | ||
260 | #undef COPY | ||
261 | |||
262 | err |= __put_user(mask, &sc->oldmask); | ||
263 | |||
264 | return err; | ||
265 | } | ||
266 | |||
267 | /* | ||
268 | * Determine which stack to use.. | ||
269 | */ | ||
270 | static inline void * | ||
271 | get_sigframe(struct k_sigaction *ka, struct pt_regs *regs, size_t frame_size) | ||
272 | { | ||
273 | /* Default to using normal stack */ | ||
274 | unsigned long sp = regs->gpr[GPR_SP]; | ||
275 | |||
276 | if ((ka->sa.sa_flags & SA_ONSTACK) != 0 && ! sas_ss_flags(sp)) | ||
277 | sp = current->sas_ss_sp + current->sas_ss_size; | ||
278 | |||
279 | return (void *)((sp - frame_size) & -8UL); | ||
280 | } | ||
281 | |||
282 | static void setup_frame(int sig, struct k_sigaction *ka, | ||
283 | sigset_t *set, struct pt_regs *regs) | ||
284 | { | ||
285 | struct sigframe *frame; | ||
286 | int err = 0; | ||
287 | int signal; | ||
288 | |||
289 | frame = get_sigframe(ka, regs, sizeof(*frame)); | ||
290 | |||
291 | if (!access_ok(VERIFY_WRITE, frame, sizeof(*frame))) | ||
292 | goto give_sigsegv; | ||
293 | |||
294 | signal = current_thread_info()->exec_domain | ||
295 | && current_thread_info()->exec_domain->signal_invmap | ||
296 | && sig < 32 | ||
297 | ? current_thread_info()->exec_domain->signal_invmap[sig] | ||
298 | : sig; | ||
299 | |||
300 | err |= setup_sigcontext(&frame->sc, regs, set->sig[0]); | ||
301 | |||
302 | if (_NSIG_WORDS > 1) { | ||
303 | err |= __copy_to_user(frame->extramask, &set->sig[1], | ||
304 | sizeof(frame->extramask)); | ||
305 | } | ||
306 | |||
307 | /* Set up to return from userspace. If provided, use a stub | ||
308 | already in userspace. */ | ||
309 | if (ka->sa.sa_flags & SA_RESTORER) { | ||
310 | regs->gpr[GPR_LP] = (unsigned long) ka->sa.sa_restorer; | ||
311 | } else { | ||
312 | /* Note, these encodings are _little endian_! */ | ||
313 | |||
314 | /* addi __NR_sigreturn, r0, r12 */ | ||
315 | err |= __put_user(0x6600 | (__NR_sigreturn << 16), | ||
316 | frame->tramp + 0); | ||
317 | /* trap 0 */ | ||
318 | err |= __put_user(0x010007e0, | ||
319 | frame->tramp + 1); | ||
320 | |||
321 | regs->gpr[GPR_LP] = (unsigned long)frame->tramp; | ||
322 | |||
323 | flush_cache_sigtramp (regs->gpr[GPR_LP]); | ||
324 | } | ||
325 | |||
326 | if (err) | ||
327 | goto give_sigsegv; | ||
328 | |||
329 | /* Set up registers for signal handler. */ | ||
330 | regs->pc = (v850_reg_t) ka->sa.sa_handler; | ||
331 | regs->gpr[GPR_SP] = (v850_reg_t)frame; | ||
332 | /* Signal handler args: */ | ||
333 | regs->gpr[GPR_ARG0] = signal; /* arg 0: signum */ | ||
334 | regs->gpr[GPR_ARG1] = (v850_reg_t)&frame->sc;/* arg 1: sigcontext */ | ||
335 | |||
336 | set_fs(USER_DS); | ||
337 | |||
338 | #if DEBUG_SIG | ||
339 | printk("SIG deliver (%s:%d): sp=%p pc=%08lx ra=%08lx\n", | ||
340 | current->comm, current->pid, frame, regs->pc, ); | ||
341 | #endif | ||
342 | |||
343 | return; | ||
344 | |||
345 | give_sigsegv: | ||
346 | force_sigsegv(sig, current); | ||
347 | } | ||
348 | |||
349 | static void setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info, | ||
350 | sigset_t *set, struct pt_regs *regs) | ||
351 | { | ||
352 | struct rt_sigframe *frame; | ||
353 | int err = 0; | ||
354 | int signal; | ||
355 | |||
356 | frame = get_sigframe(ka, regs, sizeof(*frame)); | ||
357 | |||
358 | if (!access_ok(VERIFY_WRITE, frame, sizeof(*frame))) | ||
359 | goto give_sigsegv; | ||
360 | |||
361 | signal = current_thread_info()->exec_domain | ||
362 | && current_thread_info()->exec_domain->signal_invmap | ||
363 | && sig < 32 | ||
364 | ? current_thread_info()->exec_domain->signal_invmap[sig] | ||
365 | : sig; | ||
366 | |||
367 | err |= copy_siginfo_to_user(&frame->info, info); | ||
368 | |||
369 | /* Create the ucontext. */ | ||
370 | err |= __put_user(0, &frame->uc.uc_flags); | ||
371 | err |= __put_user(0, &frame->uc.uc_link); | ||
372 | err |= __put_user((void *)current->sas_ss_sp, | ||
373 | &frame->uc.uc_stack.ss_sp); | ||
374 | err |= __put_user(sas_ss_flags(regs->gpr[GPR_SP]), | ||
375 | &frame->uc.uc_stack.ss_flags); | ||
376 | err |= __put_user(current->sas_ss_size, &frame->uc.uc_stack.ss_size); | ||
377 | err |= setup_sigcontext(&frame->uc.uc_mcontext, | ||
378 | regs, set->sig[0]); | ||
379 | err |= __copy_to_user(&frame->uc.uc_sigmask, set, sizeof(*set)); | ||
380 | |||
381 | /* Set up to return from userspace. If provided, use a stub | ||
382 | already in userspace. */ | ||
383 | if (ka->sa.sa_flags & SA_RESTORER) { | ||
384 | regs->gpr[GPR_LP] = (unsigned long) ka->sa.sa_restorer; | ||
385 | } else { | ||
386 | /* Note, these encodings are _little endian_! */ | ||
387 | |||
388 | /* addi __NR_sigreturn, r0, r12 */ | ||
389 | err |= __put_user(0x6600 | (__NR_sigreturn << 16), | ||
390 | frame->tramp + 0); | ||
391 | /* trap 0 */ | ||
392 | err |= __put_user(0x010007e0, | ||
393 | frame->tramp + 1); | ||
394 | |||
395 | regs->gpr[GPR_LP] = (unsigned long)frame->tramp; | ||
396 | |||
397 | flush_cache_sigtramp (regs->gpr[GPR_LP]); | ||
398 | } | ||
399 | |||
400 | if (err) | ||
401 | goto give_sigsegv; | ||
402 | |||
403 | /* Set up registers for signal handler. */ | ||
404 | regs->pc = (v850_reg_t) ka->sa.sa_handler; | ||
405 | regs->gpr[GPR_SP] = (v850_reg_t)frame; | ||
406 | /* Signal handler args: */ | ||
407 | regs->gpr[GPR_ARG0] = signal; /* arg 0: signum */ | ||
408 | regs->gpr[GPR_ARG1] = (v850_reg_t)&frame->info; /* arg 1: siginfo */ | ||
409 | regs->gpr[GPR_ARG2] = (v850_reg_t)&frame->uc; /* arg 2: ucontext */ | ||
410 | |||
411 | set_fs(USER_DS); | ||
412 | |||
413 | #if DEBUG_SIG | ||
414 | printk("SIG deliver (%s:%d): sp=%p pc=%08lx pr=%08lx\n", | ||
415 | current->comm, current->pid, frame, regs->pc, regs->pr); | ||
416 | #endif | ||
417 | |||
418 | return; | ||
419 | |||
420 | give_sigsegv: | ||
421 | force_sigsegv(sig, current); | ||
422 | } | ||
423 | |||
424 | /* | ||
425 | * OK, we're invoking a handler | ||
426 | */ | ||
427 | |||
428 | static void | ||
429 | handle_signal(unsigned long sig, siginfo_t *info, struct k_sigaction *ka, | ||
430 | sigset_t *oldset, struct pt_regs * regs) | ||
431 | { | ||
432 | /* Are we from a system call? */ | ||
433 | if (PT_REGS_SYSCALL (regs)) { | ||
434 | /* If so, check system call restarting.. */ | ||
435 | switch (regs->gpr[GPR_RVAL]) { | ||
436 | case -ERESTART_RESTARTBLOCK: | ||
437 | current_thread_info()->restart_block.fn = | ||
438 | do_no_restart_syscall; | ||
439 | /* fall through */ | ||
440 | case -ERESTARTNOHAND: | ||
441 | regs->gpr[GPR_RVAL] = -EINTR; | ||
442 | break; | ||
443 | |||
444 | case -ERESTARTSYS: | ||
445 | if (!(ka->sa.sa_flags & SA_RESTART)) { | ||
446 | regs->gpr[GPR_RVAL] = -EINTR; | ||
447 | break; | ||
448 | } | ||
449 | /* fallthrough */ | ||
450 | case -ERESTARTNOINTR: | ||
451 | regs->gpr[12] = PT_REGS_SYSCALL (regs); | ||
452 | regs->pc -= 4; /* Size of `trap 0' insn. */ | ||
453 | } | ||
454 | |||
455 | PT_REGS_SET_SYSCALL (regs, 0); | ||
456 | } | ||
457 | |||
458 | /* Set up the stack frame */ | ||
459 | if (ka->sa.sa_flags & SA_SIGINFO) | ||
460 | setup_rt_frame(sig, ka, info, oldset, regs); | ||
461 | else | ||
462 | setup_frame(sig, ka, oldset, regs); | ||
463 | |||
464 | spin_lock_irq(¤t->sighand->siglock); | ||
465 | sigorsets(¤t->blocked,¤t->blocked,&ka->sa.sa_mask); | ||
466 | if (!(ka->sa.sa_flags & SA_NODEFER)) | ||
467 | sigaddset(¤t->blocked,sig); | ||
468 | recalc_sigpending(); | ||
469 | spin_unlock_irq(¤t->sighand->siglock); | ||
470 | } | ||
471 | |||
472 | /* | ||
473 | * Note that 'init' is a special process: it doesn't get signals it doesn't | ||
474 | * want to handle. Thus you cannot kill init even with a SIGKILL even by | ||
475 | * mistake. | ||
476 | * | ||
477 | * Note that we go through the signals twice: once to check the signals that | ||
478 | * the kernel can handle, and then we build all the user-level signal handling | ||
479 | * stack-frames in one go after that. | ||
480 | */ | ||
481 | int do_signal(struct pt_regs *regs, sigset_t *oldset) | ||
482 | { | ||
483 | siginfo_t info; | ||
484 | int signr; | ||
485 | struct k_sigaction ka; | ||
486 | |||
487 | /* | ||
488 | * We want the common case to go fast, which | ||
489 | * is why we may in certain cases get here from | ||
490 | * kernel mode. Just return without doing anything | ||
491 | * if so. | ||
492 | */ | ||
493 | if (!user_mode(regs)) | ||
494 | return 1; | ||
495 | |||
496 | if (!oldset) | ||
497 | oldset = ¤t->blocked; | ||
498 | |||
499 | signr = get_signal_to_deliver(&info, &ka, regs, NULL); | ||
500 | if (signr > 0) { | ||
501 | /* Whee! Actually deliver the signal. */ | ||
502 | handle_signal(signr, &info, &ka, oldset, regs); | ||
503 | return 1; | ||
504 | } | ||
505 | |||
506 | /* Did we come from a system call? */ | ||
507 | if (PT_REGS_SYSCALL (regs)) { | ||
508 | int rval = (int)regs->gpr[GPR_RVAL]; | ||
509 | /* Restart the system call - no handlers present */ | ||
510 | if (rval == -ERESTARTNOHAND | ||
511 | || rval == -ERESTARTSYS | ||
512 | || rval == -ERESTARTNOINTR) | ||
513 | { | ||
514 | regs->gpr[12] = PT_REGS_SYSCALL (regs); | ||
515 | regs->pc -= 4; /* Size of `trap 0' insn. */ | ||
516 | } | ||
517 | else if (rval == -ERESTART_RESTARTBLOCK) { | ||
518 | regs->gpr[12] = __NR_restart_syscall; | ||
519 | regs->pc -= 4; /* Size of `trap 0' insn. */ | ||
520 | } | ||
521 | } | ||
522 | return 0; | ||
523 | } | ||
diff --git a/arch/v850/kernel/sim.c b/arch/v850/kernel/sim.c deleted file mode 100644 index 467b4aa0acdd..000000000000 --- a/arch/v850/kernel/sim.c +++ /dev/null | |||
@@ -1,172 +0,0 @@ | |||
1 | /* | ||
2 | * arch/v850/kernel/sim.c -- Machine-specific stuff for GDB v850e simulator | ||
3 | * | ||
4 | * Copyright (C) 2001,02 NEC Corporation | ||
5 | * Copyright (C) 2001,02 Miles Bader <miles@gnu.org> | ||
6 | * | ||
7 | * This file is subject to the terms and conditions of the GNU General | ||
8 | * Public License. See the file COPYING in the main directory of this | ||
9 | * archive for more details. | ||
10 | * | ||
11 | * Written by Miles Bader <miles@gnu.org> | ||
12 | */ | ||
13 | |||
14 | #include <linux/kernel.h> | ||
15 | #include <linux/module.h> | ||
16 | #include <linux/init.h> | ||
17 | #include <linux/mm.h> | ||
18 | #include <linux/swap.h> | ||
19 | #include <linux/bootmem.h> | ||
20 | #include <linux/irq.h> | ||
21 | |||
22 | #include <asm/atomic.h> | ||
23 | #include <asm/page.h> | ||
24 | #include <asm/machdep.h> | ||
25 | #include <asm/simsyscall.h> | ||
26 | |||
27 | #include "mach.h" | ||
28 | |||
29 | /* The name of a file containing the root filesystem. */ | ||
30 | #define ROOT_FS "rootfs.image" | ||
31 | |||
32 | extern void simcons_setup (void); | ||
33 | extern void simcons_poll_ttys (void); | ||
34 | extern void set_mem_root (void *addr, size_t len, char *cmd_line); | ||
35 | |||
36 | static int read_file (const char *name, | ||
37 | unsigned long *addr, unsigned long *len, | ||
38 | const char **err); | ||
39 | |||
40 | void __init mach_setup (char **cmdline) | ||
41 | { | ||
42 | const char *err; | ||
43 | unsigned long root_dev_addr, root_dev_len; | ||
44 | |||
45 | simcons_setup (); | ||
46 | |||
47 | printk (KERN_INFO "Reading root filesystem: %s", ROOT_FS); | ||
48 | |||
49 | if (read_file (ROOT_FS, &root_dev_addr, &root_dev_len, &err)) { | ||
50 | printk (" (size %luK)\n", root_dev_len / 1024); | ||
51 | set_mem_root ((void *)root_dev_addr, (size_t)root_dev_len, | ||
52 | *cmdline); | ||
53 | } else | ||
54 | printk ("...%s failed!\n", err); | ||
55 | } | ||
56 | |||
57 | void mach_get_physical_ram (unsigned long *ram_start, unsigned long *ram_len) | ||
58 | { | ||
59 | *ram_start = RAM_ADDR; | ||
60 | *ram_len = RAM_SIZE; | ||
61 | } | ||
62 | |||
63 | void __init mach_sched_init (struct irqaction *timer_action) | ||
64 | { | ||
65 | /* ...do magic timer initialization?... */ | ||
66 | mach_tick = simcons_poll_ttys; | ||
67 | setup_irq (0, timer_action); | ||
68 | } | ||
69 | |||
70 | |||
71 | static void irq_nop (unsigned irq) { } | ||
72 | static unsigned irq_zero (unsigned irq) { return 0; } | ||
73 | |||
74 | static struct hw_interrupt_type sim_irq_type = { | ||
75 | .typename = "IRQ", | ||
76 | .startup = irq_zero, /* startup */ | ||
77 | .shutdown = irq_nop, /* shutdown */ | ||
78 | .enable = irq_nop, /* enable */ | ||
79 | .disable = irq_nop, /* disable */ | ||
80 | .ack = irq_nop, /* ack */ | ||
81 | .end = irq_nop, /* end */ | ||
82 | }; | ||
83 | |||
84 | void __init mach_init_irqs (void) | ||
85 | { | ||
86 | init_irq_handlers (0, NUM_MACH_IRQS, 1, &sim_irq_type); | ||
87 | } | ||
88 | |||
89 | |||
90 | void mach_gettimeofday (struct timespec *tv) | ||
91 | { | ||
92 | long timeval[2], timezone[2]; | ||
93 | int rval = V850_SIM_SYSCALL (gettimeofday, timeval, timezone); | ||
94 | if (rval == 0) { | ||
95 | tv->tv_sec = timeval[0]; | ||
96 | tv->tv_nsec = timeval[1] * 1000; | ||
97 | } | ||
98 | } | ||
99 | |||
100 | void machine_restart (char *__unused) | ||
101 | { | ||
102 | V850_SIM_SYSCALL (write, 1, "RESTART\n", 8); | ||
103 | V850_SIM_SYSCALL (exit, 0); | ||
104 | } | ||
105 | |||
106 | void machine_halt (void) | ||
107 | { | ||
108 | V850_SIM_SYSCALL (write, 1, "HALT\n", 5); | ||
109 | V850_SIM_SYSCALL (exit, 0); | ||
110 | } | ||
111 | |||
112 | void machine_power_off (void) | ||
113 | { | ||
114 | V850_SIM_SYSCALL (write, 1, "POWER OFF\n", 10); | ||
115 | V850_SIM_SYSCALL (exit, 0); | ||
116 | } | ||
117 | |||
118 | |||
119 | /* Load data from a file called NAME into ram. The address and length | ||
120 | of the data image are returned in ADDR and LEN. */ | ||
121 | static int __init | ||
122 | read_file (const char *name, | ||
123 | unsigned long *addr, unsigned long *len, | ||
124 | const char **err) | ||
125 | { | ||
126 | int rval, fd; | ||
127 | unsigned long cur, left; | ||
128 | /* Note this is not a normal stat buffer, it's an ad-hoc | ||
129 | structure defined by the simulator. */ | ||
130 | unsigned long stat_buf[10]; | ||
131 | |||
132 | /* Stat the file to find out the length. */ | ||
133 | rval = V850_SIM_SYSCALL (stat, name, stat_buf); | ||
134 | if (rval < 0) { | ||
135 | if (err) *err = "stat"; | ||
136 | return 0; | ||
137 | } | ||
138 | *len = stat_buf[4]; | ||
139 | |||
140 | /* Open the file; `0' is O_RDONLY. */ | ||
141 | fd = V850_SIM_SYSCALL (open, name, 0); | ||
142 | if (fd < 0) { | ||
143 | if (err) *err = "open"; | ||
144 | return 0; | ||
145 | } | ||
146 | |||
147 | *addr = (unsigned long)alloc_bootmem(*len); | ||
148 | if (! *addr) { | ||
149 | V850_SIM_SYSCALL (close, fd); | ||
150 | if (err) *err = "alloc_bootmem"; | ||
151 | return 0; | ||
152 | } | ||
153 | |||
154 | cur = *addr; | ||
155 | left = *len; | ||
156 | while (left > 0) { | ||
157 | int chunk = V850_SIM_SYSCALL (read, fd, cur, left); | ||
158 | if (chunk <= 0) | ||
159 | break; | ||
160 | cur += chunk; | ||
161 | left -= chunk; | ||
162 | } | ||
163 | V850_SIM_SYSCALL (close, fd); | ||
164 | if (left > 0) { | ||
165 | /* Some read failed. */ | ||
166 | free_bootmem (*addr, *len); | ||
167 | if (err) *err = "read"; | ||
168 | return 0; | ||
169 | } | ||
170 | |||
171 | return 1; | ||
172 | } | ||
diff --git a/arch/v850/kernel/sim.ld b/arch/v850/kernel/sim.ld deleted file mode 100644 index 101885f3c9f0..000000000000 --- a/arch/v850/kernel/sim.ld +++ /dev/null | |||
@@ -1,13 +0,0 @@ | |||
1 | /* Linker script for the gdb v850e simulator (CONFIG_V850E_SIM). */ | ||
2 | |||
3 | MEMORY { | ||
4 | /* Interrupt vectors. */ | ||
5 | INTV : ORIGIN = 0x0, LENGTH = 0xe0 | ||
6 | /* Main RAM. */ | ||
7 | RAM : ORIGIN = RAM_ADDR, LENGTH = RAM_SIZE | ||
8 | } | ||
9 | |||
10 | SECTIONS { | ||
11 | .intv : { INTV_CONTENTS } > INTV | ||
12 | .ram : { RAMK_KRAM_CONTENTS } > RAM | ||
13 | } | ||
diff --git a/arch/v850/kernel/sim85e2.c b/arch/v850/kernel/sim85e2.c deleted file mode 100644 index 566dde5e6070..000000000000 --- a/arch/v850/kernel/sim85e2.c +++ /dev/null | |||
@@ -1,195 +0,0 @@ | |||
1 | /* | ||
2 | * arch/v850/kernel/sim85e2.c -- Machine-specific stuff for | ||
3 | * V850E2 RTL simulator | ||
4 | * | ||
5 | * Copyright (C) 2002,03 NEC Electronics Corporation | ||
6 | * Copyright (C) 2002,03 Miles Bader <miles@gnu.org> | ||
7 | * | ||
8 | * This file is subject to the terms and conditions of the GNU General | ||
9 | * Public License. See the file COPYING in the main directory of this | ||
10 | * archive for more details. | ||
11 | * | ||
12 | * Written by Miles Bader <miles@gnu.org> | ||
13 | */ | ||
14 | |||
15 | #include <linux/kernel.h> | ||
16 | #include <linux/module.h> | ||
17 | #include <linux/init.h> | ||
18 | #include <linux/mm.h> | ||
19 | #include <linux/swap.h> | ||
20 | #include <linux/bootmem.h> | ||
21 | #include <linux/irq.h> | ||
22 | |||
23 | #include <asm/atomic.h> | ||
24 | #include <asm/page.h> | ||
25 | #include <asm/machdep.h> | ||
26 | |||
27 | #include "mach.h" | ||
28 | |||
29 | |||
30 | /* There are 4 possible areas we can use: | ||
31 | |||
32 | IRAM (1MB) is fast for instruction fetches, but slow for data | ||
33 | DRAM (1020KB) is fast for data, but slow for instructions | ||
34 | ERAM is cached, so should be fast for both insns and data | ||
35 | SDRAM is external DRAM, similar to ERAM | ||
36 | */ | ||
37 | |||
38 | #define INIT_MEMC_FOR_SDRAM | ||
39 | #define USE_SDRAM_AREA | ||
40 | #define KERNEL_IN_SDRAM_AREA | ||
41 | |||
42 | #define DCACHE_MODE V850E2_CACHE_BTSC_DCM_WT | ||
43 | /*#define DCACHE_MODE V850E2_CACHE_BTSC_DCM_WB_ALLOC*/ | ||
44 | |||
45 | #ifdef USE_SDRAM_AREA | ||
46 | #define RAM_START SDRAM_ADDR | ||
47 | #define RAM_END (SDRAM_ADDR + SDRAM_SIZE) | ||
48 | #else | ||
49 | /* When we use DRAM, we need to account for the fact that the end of it is | ||
50 | used for R0_RAM. */ | ||
51 | #define RAM_START DRAM_ADDR | ||
52 | #define RAM_END R0_RAM_ADDR | ||
53 | #endif | ||
54 | |||
55 | |||
56 | extern void memcons_setup (void); | ||
57 | |||
58 | |||
59 | #ifdef KERNEL_IN_SDRAM_AREA | ||
60 | #define EARLY_INIT_SECTION_ATTR __attribute__ ((section (".early.text"))) | ||
61 | #else | ||
62 | #define EARLY_INIT_SECTION_ATTR __init | ||
63 | #endif | ||
64 | |||
65 | void EARLY_INIT_SECTION_ATTR mach_early_init (void) | ||
66 | { | ||
67 | /* The sim85e2 simulator tracks `undefined' values, so to make | ||
68 | debugging easier, we begin by zeroing out all otherwise | ||
69 | undefined registers. This is not strictly necessary. | ||
70 | |||
71 | The registers we zero are: | ||
72 | Every GPR except: | ||
73 | stack-pointer (r3) | ||
74 | task-pointer (r16) | ||
75 | our return addr (r31) | ||
76 | Every system register (SPR) that we know about except for | ||
77 | the PSW (SPR 5), which we zero except for the | ||
78 | disable-interrupts bit. | ||
79 | */ | ||
80 | |||
81 | /* GPRs */ | ||
82 | asm volatile (" mov r0, r1 ; mov r0, r2 "); | ||
83 | asm volatile ("mov r0, r4 ; mov r0, r5 ; mov r0, r6 ; mov r0, r7 "); | ||
84 | asm volatile ("mov r0, r8 ; mov r0, r9 ; mov r0, r10; mov r0, r11"); | ||
85 | asm volatile ("mov r0, r12; mov r0, r13; mov r0, r14; mov r0, r15"); | ||
86 | asm volatile (" mov r0, r17; mov r0, r18; mov r0, r19"); | ||
87 | asm volatile ("mov r0, r20; mov r0, r21; mov r0, r22; mov r0, r23"); | ||
88 | asm volatile ("mov r0, r24; mov r0, r25; mov r0, r26; mov r0, r27"); | ||
89 | asm volatile ("mov r0, r28; mov r0, r29; mov r0, r30"); | ||
90 | |||
91 | /* SPRs */ | ||
92 | asm volatile ("ldsr r0, 0; ldsr r0, 1; ldsr r0, 2; ldsr r0, 3"); | ||
93 | asm volatile ("ldsr r0, 4"); | ||
94 | asm volatile ("addi 0x20, r0, r1; ldsr r1, 5"); /* PSW */ | ||
95 | asm volatile ("ldsr r0, 16; ldsr r0, 17; ldsr r0, 18; ldsr r0, 19"); | ||
96 | asm volatile ("ldsr r0, 20"); | ||
97 | |||
98 | |||
99 | #ifdef INIT_MEMC_FOR_SDRAM | ||
100 | /* Settings for SDRAM controller. */ | ||
101 | V850E2_VSWC = 0x0042; | ||
102 | V850E2_BSC = 0x9286; | ||
103 | V850E2_BCT(0) = 0xb000; /* was: 0 */ | ||
104 | V850E2_BCT(1) = 0x000b; | ||
105 | V850E2_ASC = 0; | ||
106 | V850E2_LBS = 0xa9aa; /* was: 0xaaaa */ | ||
107 | V850E2_LBC(0) = 0; | ||
108 | V850E2_LBC(1) = 0; /* was: 0x3 */ | ||
109 | V850E2_BCC = 0; | ||
110 | V850E2_RFS(4) = 0x800a; /* was: 0xf109 */ | ||
111 | V850E2_SCR(4) = 0x2091; /* was: 0x20a1 */ | ||
112 | V850E2_RFS(3) = 0x800c; | ||
113 | V850E2_SCR(3) = 0x20a1; | ||
114 | V850E2_DWC(0) = 0; | ||
115 | V850E2_DWC(1) = 0; | ||
116 | #endif | ||
117 | |||
118 | #if 0 | ||
119 | #ifdef CONFIG_V850E2_SIM85E2S | ||
120 | /* Turn on the caches. */ | ||
121 | V850E2_CACHE_BTSC = V850E2_CACHE_BTSC_ICM | DCACHE_MODE; | ||
122 | V850E2_BHC = 0x1010; | ||
123 | #elif CONFIG_V850E2_SIM85E2C | ||
124 | V850E2_CACHE_BTSC |= (V850E2_CACHE_BTSC_ICM | V850E2_CACHE_BTSC_DCM0); | ||
125 | V850E2_BUSM_BHC = 0xFFFF; | ||
126 | #endif | ||
127 | #else | ||
128 | V850E2_BHC = 0; | ||
129 | #endif | ||
130 | |||
131 | /* Don't stop the simulator at `halt' instructions. */ | ||
132 | SIM85E2_NOTHAL = 1; | ||
133 | |||
134 | /* Ensure that the simulator halts on a panic, instead of going | ||
135 | into an infinite loop inside the panic function. */ | ||
136 | panic_timeout = -1; | ||
137 | } | ||
138 | |||
139 | void __init mach_setup (char **cmdline) | ||
140 | { | ||
141 | memcons_setup (); | ||
142 | } | ||
143 | |||
144 | void mach_get_physical_ram (unsigned long *ram_start, unsigned long *ram_len) | ||
145 | { | ||
146 | *ram_start = RAM_START; | ||
147 | *ram_len = RAM_END - RAM_START; | ||
148 | } | ||
149 | |||
150 | void __init mach_sched_init (struct irqaction *timer_action) | ||
151 | { | ||
152 | /* The simulator actually cycles through all interrupts | ||
153 | periodically. We just pay attention to IRQ0, which gives us | ||
154 | 1/64 the rate of the periodic interrupts. */ | ||
155 | setup_irq (0, timer_action); | ||
156 | } | ||
157 | |||
158 | void mach_gettimeofday (struct timespec *tv) | ||
159 | { | ||
160 | tv->tv_sec = 0; | ||
161 | tv->tv_nsec = 0; | ||
162 | } | ||
163 | |||
164 | /* Interrupts */ | ||
165 | |||
166 | struct v850e_intc_irq_init irq_inits[] = { | ||
167 | { "IRQ", 0, NUM_MACH_IRQS, 1, 7 }, | ||
168 | { 0 } | ||
169 | }; | ||
170 | struct hw_interrupt_type hw_itypes[1]; | ||
171 | |||
172 | /* Initialize interrupts. */ | ||
173 | void __init mach_init_irqs (void) | ||
174 | { | ||
175 | v850e_intc_init_irq_types (irq_inits, hw_itypes); | ||
176 | } | ||
177 | |||
178 | |||
179 | void machine_halt (void) __attribute__ ((noreturn)); | ||
180 | void machine_halt (void) | ||
181 | { | ||
182 | SIM85E2_SIMFIN = 0; /* Halt immediately. */ | ||
183 | for (;;) {} | ||
184 | } | ||
185 | |||
186 | void machine_restart (char *__unused) | ||
187 | { | ||
188 | machine_halt (); | ||
189 | } | ||
190 | |||
191 | void machine_power_off (void) | ||
192 | { | ||
193 | machine_halt (); | ||
194 | } | ||
195 | |||
diff --git a/arch/v850/kernel/sim85e2.ld b/arch/v850/kernel/sim85e2.ld deleted file mode 100644 index 7470fd2ffb5b..000000000000 --- a/arch/v850/kernel/sim85e2.ld +++ /dev/null | |||
@@ -1,36 +0,0 @@ | |||
1 | /* Linker script for the sim85e2c simulator, which is a verilog simulation of | ||
2 | the V850E2 NA85E2C cpu core (CONFIG_V850E2_SIM85E2C). */ | ||
3 | |||
4 | MEMORY { | ||
5 | /* 1MB of `instruction RAM', starting at 0. | ||
6 | Instruction fetches are much faster from IRAM than from DRAM. */ | ||
7 | IRAM : ORIGIN = IRAM_ADDR, LENGTH = IRAM_SIZE | ||
8 | |||
9 | /* 1MB of `data RAM', below and contiguous with the I/O space. | ||
10 | Data fetches are much faster from DRAM than from IRAM. */ | ||
11 | DRAM : ORIGIN = DRAM_ADDR, LENGTH = DRAM_SIZE | ||
12 | |||
13 | /* `external ram' (CS1 area), comes after IRAM. */ | ||
14 | ERAM : ORIGIN = ERAM_ADDR, LENGTH = ERAM_SIZE | ||
15 | |||
16 | /* Dynamic RAM; uses memory controller. */ | ||
17 | SDRAM : ORIGIN = SDRAM_ADDR, LENGTH = SDRAM_SIZE | ||
18 | } | ||
19 | |||
20 | SECTIONS { | ||
21 | .iram : { | ||
22 | INTV_CONTENTS | ||
23 | *arch/v850/kernel/head.o | ||
24 | *(.early.text) | ||
25 | } > IRAM | ||
26 | .dram : { | ||
27 | _memcons_output = . ; | ||
28 | . = . + 0x8000 ; | ||
29 | _memcons_output_end = . ; | ||
30 | } > DRAM | ||
31 | .sdram : { | ||
32 | /* We stick console output into a buffer here. */ | ||
33 | RAMK_KRAM_CONTENTS | ||
34 | ROOT_FS_CONTENTS | ||
35 | } > SDRAM | ||
36 | } | ||
diff --git a/arch/v850/kernel/simcons.c b/arch/v850/kernel/simcons.c deleted file mode 100644 index 9973596ae304..000000000000 --- a/arch/v850/kernel/simcons.c +++ /dev/null | |||
@@ -1,161 +0,0 @@ | |||
1 | /* | ||
2 | * arch/v850/kernel/simcons.c -- Console I/O for GDB v850e simulator | ||
3 | * | ||
4 | * Copyright (C) 2001,02,03 NEC Electronics Corporation | ||
5 | * Copyright (C) 2001,02,03 Miles Bader <miles@gnu.org> | ||
6 | * | ||
7 | * This file is subject to the terms and conditions of the GNU General | ||
8 | * Public License. See the file COPYING in the main directory of this | ||
9 | * archive for more details. | ||
10 | * | ||
11 | * Written by Miles Bader <miles@gnu.org> | ||
12 | */ | ||
13 | |||
14 | #include <linux/kernel.h> | ||
15 | #include <linux/console.h> | ||
16 | #include <linux/tty.h> | ||
17 | #include <linux/tty_flip.h> | ||
18 | #include <linux/tty_driver.h> | ||
19 | #include <linux/init.h> | ||
20 | |||
21 | #include <asm/poll.h> | ||
22 | #include <asm/string.h> | ||
23 | #include <asm/simsyscall.h> | ||
24 | |||
25 | |||
26 | /* Low-level console. */ | ||
27 | |||
28 | static void simcons_write (struct console *co, const char *buf, unsigned len) | ||
29 | { | ||
30 | V850_SIM_SYSCALL (write, 1, buf, len); | ||
31 | } | ||
32 | |||
33 | static int simcons_read (struct console *co, char *buf, unsigned len) | ||
34 | { | ||
35 | return V850_SIM_SYSCALL (read, 0, buf, len); | ||
36 | } | ||
37 | |||
38 | static struct tty_driver *tty_driver; | ||
39 | static struct tty_driver *simcons_device (struct console *c, int *index) | ||
40 | { | ||
41 | *index = c->index; | ||
42 | return tty_driver; | ||
43 | } | ||
44 | |||
45 | static struct console simcons = | ||
46 | { | ||
47 | .name = "simcons", | ||
48 | .write = simcons_write, | ||
49 | .read = simcons_read, | ||
50 | .device = simcons_device, | ||
51 | .flags = CON_PRINTBUFFER, | ||
52 | .index = -1, | ||
53 | }; | ||
54 | |||
55 | /* Higher level TTY interface. */ | ||
56 | |||
57 | int simcons_tty_open (struct tty_struct *tty, struct file *filp) | ||
58 | { | ||
59 | return 0; | ||
60 | } | ||
61 | |||
62 | int simcons_tty_write (struct tty_struct *tty, | ||
63 | const unsigned char *buf, int count) | ||
64 | { | ||
65 | return V850_SIM_SYSCALL (write, 1, buf, count); | ||
66 | } | ||
67 | |||
68 | int simcons_tty_write_room (struct tty_struct *tty) | ||
69 | { | ||
70 | /* Completely arbitrary. */ | ||
71 | return 0x100000; | ||
72 | } | ||
73 | |||
74 | int simcons_tty_chars_in_buffer (struct tty_struct *tty) | ||
75 | { | ||
76 | /* We have no buffer. */ | ||
77 | return 0; | ||
78 | } | ||
79 | |||
80 | static const struct tty_operations ops = { | ||
81 | .open = simcons_tty_open, | ||
82 | .write = simcons_tty_write, | ||
83 | .write_room = simcons_tty_write_room, | ||
84 | .chars_in_buffer = simcons_tty_chars_in_buffer, | ||
85 | }; | ||
86 | |||
87 | int __init simcons_tty_init (void) | ||
88 | { | ||
89 | struct tty_driver *driver = alloc_tty_driver(1); | ||
90 | int err; | ||
91 | if (!driver) | ||
92 | return -ENOMEM; | ||
93 | driver->name = "simcons"; | ||
94 | driver->major = TTY_MAJOR; | ||
95 | driver->minor_start = 64; | ||
96 | driver->type = TTY_DRIVER_TYPE_SYSCONS; | ||
97 | driver->init_termios = tty_std_termios; | ||
98 | tty_set_operations(driver, &ops); | ||
99 | err = tty_register_driver(driver); | ||
100 | if (err) { | ||
101 | put_tty_driver(driver); | ||
102 | return err; | ||
103 | } | ||
104 | tty_driver = driver; | ||
105 | return 0; | ||
106 | } | ||
107 | /* We use `late_initcall' instead of just `__initcall' as a workaround for | ||
108 | the fact that (1) simcons_tty_init can't be called before tty_init, | ||
109 | (2) tty_init is called via `module_init', (3) if statically linked, | ||
110 | module_init == device_init, and (4) there's no ordering of init lists. | ||
111 | We can do this easily because simcons is always statically linked, but | ||
112 | other tty drivers that depend on tty_init and which must use | ||
113 | `module_init' to declare their init routines are likely to be broken. */ | ||
114 | late_initcall(simcons_tty_init); | ||
115 | |||
116 | /* Poll for input on the console, and if there's any, deliver it to the | ||
117 | tty driver. */ | ||
118 | void simcons_poll_tty (struct tty_struct *tty) | ||
119 | { | ||
120 | char buf[32]; /* Not the nicest way to do it but I need it correct first */ | ||
121 | int flip = 0, send_break = 0; | ||
122 | struct pollfd pfd; | ||
123 | pfd.fd = 0; | ||
124 | pfd.events = POLLIN; | ||
125 | |||
126 | if (V850_SIM_SYSCALL (poll, &pfd, 1, 0) > 0) { | ||
127 | if (pfd.revents & POLLIN) { | ||
128 | /* Real block hardware knows the transfer size before | ||
129 | transfer so the new tty buffering doesn't try to handle | ||
130 | this rather weird simulator specific case well */ | ||
131 | int rd = V850_SIM_SYSCALL (read, 0, buf, 32); | ||
132 | if (rd > 0) { | ||
133 | tty_insert_flip_string(tty, buf, rd); | ||
134 | flip = 1; | ||
135 | } else | ||
136 | send_break = 1; | ||
137 | } else if (pfd.revents & POLLERR) | ||
138 | send_break = 1; | ||
139 | } | ||
140 | |||
141 | if (send_break) { | ||
142 | tty_insert_flip_char (tty, 0, TTY_BREAK); | ||
143 | flip = 1; | ||
144 | } | ||
145 | |||
146 | if (flip) | ||
147 | tty_schedule_flip (tty); | ||
148 | } | ||
149 | |||
150 | void simcons_poll_ttys (void) | ||
151 | { | ||
152 | if (tty_driver && tty_driver->ttys[0]) | ||
153 | simcons_poll_tty (tty_driver->ttys[0]); | ||
154 | } | ||
155 | |||
156 | void simcons_setup (void) | ||
157 | { | ||
158 | V850_SIM_SYSCALL (make_raw, 0); | ||
159 | register_console (&simcons); | ||
160 | printk (KERN_INFO "Console: GDB V850E simulator stdio\n"); | ||
161 | } | ||
diff --git a/arch/v850/kernel/syscalls.c b/arch/v850/kernel/syscalls.c deleted file mode 100644 index 1a83daf8e24f..000000000000 --- a/arch/v850/kernel/syscalls.c +++ /dev/null | |||
@@ -1,196 +0,0 @@ | |||
1 | /* | ||
2 | * arch/v850/kernel/syscalls.c -- Various system-call definitions not | ||
3 | * defined in machine-independent code | ||
4 | * | ||
5 | * Copyright (C) 2001,02 NEC Corporation | ||
6 | * Copyright (C) 2001,02 Miles Bader <miles@gnu.org> | ||
7 | * | ||
8 | * This file is subject to the terms and conditions of the GNU General | ||
9 | * Public License. See the file COPYING in the main directory of this | ||
10 | * archive for more details. | ||
11 | * | ||
12 | * This file was derived the ppc version, arch/ppc/kernel/syscalls.c | ||
13 | * ... which was derived from "arch/i386/kernel/sys_i386.c" by Gary Thomas; | ||
14 | * modified by Cort Dougan (cort@cs.nmt.edu) | ||
15 | * and Paul Mackerras (paulus@cs.anu.edu.au). | ||
16 | */ | ||
17 | |||
18 | #include <linux/errno.h> | ||
19 | #include <linux/mm.h> | ||
20 | #include <linux/smp.h> | ||
21 | #include <linux/syscalls.h> | ||
22 | #include <linux/sem.h> | ||
23 | #include <linux/msg.h> | ||
24 | #include <linux/shm.h> | ||
25 | #include <linux/stat.h> | ||
26 | #include <linux/mman.h> | ||
27 | #include <linux/sys.h> | ||
28 | #include <linux/ipc.h> | ||
29 | #include <linux/utsname.h> | ||
30 | #include <linux/file.h> | ||
31 | |||
32 | #include <asm/uaccess.h> | ||
33 | #include <asm/unistd.h> | ||
34 | |||
35 | /* | ||
36 | * sys_ipc() is the de-multiplexer for the SysV IPC calls.. | ||
37 | * | ||
38 | * This is really horribly ugly. | ||
39 | */ | ||
40 | int | ||
41 | sys_ipc (uint call, int first, int second, int third, void *ptr, long fifth) | ||
42 | { | ||
43 | int version, ret; | ||
44 | |||
45 | version = call >> 16; /* hack for backward compatibility */ | ||
46 | call &= 0xffff; | ||
47 | |||
48 | ret = -EINVAL; | ||
49 | switch (call) { | ||
50 | case SEMOP: | ||
51 | ret = sys_semop (first, (struct sembuf *)ptr, second); | ||
52 | break; | ||
53 | case SEMGET: | ||
54 | ret = sys_semget (first, second, third); | ||
55 | break; | ||
56 | case SEMCTL: | ||
57 | { | ||
58 | union semun fourth; | ||
59 | |||
60 | if (!ptr) | ||
61 | break; | ||
62 | if ((ret = access_ok(VERIFY_READ, ptr, sizeof(long)) ? 0 : -EFAULT) | ||
63 | || (ret = get_user(fourth.__pad, (void **)ptr))) | ||
64 | break; | ||
65 | ret = sys_semctl (first, second, third, fourth); | ||
66 | break; | ||
67 | } | ||
68 | case MSGSND: | ||
69 | ret = sys_msgsnd (first, (struct msgbuf *) ptr, second, third); | ||
70 | break; | ||
71 | case MSGRCV: | ||
72 | switch (version) { | ||
73 | case 0: { | ||
74 | struct ipc_kludge tmp; | ||
75 | |||
76 | if (!ptr) | ||
77 | break; | ||
78 | if ((ret = access_ok(VERIFY_READ, ptr, sizeof(tmp)) ? 0 : -EFAULT) | ||
79 | || (ret = copy_from_user(&tmp, | ||
80 | (struct ipc_kludge *) ptr, | ||
81 | sizeof (tmp)))) | ||
82 | break; | ||
83 | ret = sys_msgrcv (first, tmp.msgp, second, tmp.msgtyp, | ||
84 | third); | ||
85 | break; | ||
86 | } | ||
87 | default: | ||
88 | ret = sys_msgrcv (first, (struct msgbuf *) ptr, | ||
89 | second, fifth, third); | ||
90 | break; | ||
91 | } | ||
92 | break; | ||
93 | case MSGGET: | ||
94 | ret = sys_msgget ((key_t) first, second); | ||
95 | break; | ||
96 | case MSGCTL: | ||
97 | ret = sys_msgctl (first, second, (struct msqid_ds *) ptr); | ||
98 | break; | ||
99 | case SHMAT: | ||
100 | switch (version) { | ||
101 | default: { | ||
102 | ulong raddr; | ||
103 | |||
104 | if ((ret = access_ok(VERIFY_WRITE, (ulong*) third, | ||
105 | sizeof(ulong)) ? 0 : -EFAULT)) | ||
106 | break; | ||
107 | ret = do_shmat (first, (char *) ptr, second, &raddr); | ||
108 | if (ret) | ||
109 | break; | ||
110 | ret = put_user (raddr, (ulong *) third); | ||
111 | break; | ||
112 | } | ||
113 | case 1: /* iBCS2 emulator entry point */ | ||
114 | if (!segment_eq(get_fs(), get_ds())) | ||
115 | break; | ||
116 | ret = do_shmat (first, (char *) ptr, second, | ||
117 | (ulong *) third); | ||
118 | break; | ||
119 | } | ||
120 | break; | ||
121 | case SHMDT: | ||
122 | ret = sys_shmdt ((char *)ptr); | ||
123 | break; | ||
124 | case SHMGET: | ||
125 | ret = sys_shmget (first, second, third); | ||
126 | break; | ||
127 | case SHMCTL: | ||
128 | ret = sys_shmctl (first, second, (struct shmid_ds *) ptr); | ||
129 | break; | ||
130 | } | ||
131 | |||
132 | return ret; | ||
133 | } | ||
134 | |||
135 | static inline unsigned long | ||
136 | do_mmap2 (unsigned long addr, size_t len, | ||
137 | unsigned long prot, unsigned long flags, | ||
138 | unsigned long fd, unsigned long pgoff) | ||
139 | { | ||
140 | struct file * file = NULL; | ||
141 | int ret = -EBADF; | ||
142 | |||
143 | flags &= ~(MAP_EXECUTABLE | MAP_DENYWRITE); | ||
144 | if (! (flags & MAP_ANONYMOUS)) { | ||
145 | if (!(file = fget (fd))) | ||
146 | goto out; | ||
147 | } | ||
148 | |||
149 | down_write (¤t->mm->mmap_sem); | ||
150 | ret = do_mmap_pgoff (file, addr, len, prot, flags, pgoff); | ||
151 | up_write (¤t->mm->mmap_sem); | ||
152 | if (file) | ||
153 | fput (file); | ||
154 | out: | ||
155 | return ret; | ||
156 | } | ||
157 | |||
158 | unsigned long sys_mmap2 (unsigned long addr, size_t len, | ||
159 | unsigned long prot, unsigned long flags, | ||
160 | unsigned long fd, unsigned long pgoff) | ||
161 | { | ||
162 | return do_mmap2 (addr, len, prot, flags, fd, pgoff); | ||
163 | } | ||
164 | |||
165 | unsigned long sys_mmap (unsigned long addr, size_t len, | ||
166 | unsigned long prot, unsigned long flags, | ||
167 | unsigned long fd, off_t offset) | ||
168 | { | ||
169 | int err = -EINVAL; | ||
170 | |||
171 | if (offset & ~PAGE_MASK) | ||
172 | goto out; | ||
173 | |||
174 | err = do_mmap2 (addr, len, prot, flags, fd, offset >> PAGE_SHIFT); | ||
175 | out: | ||
176 | return err; | ||
177 | } | ||
178 | |||
179 | /* | ||
180 | * Do a system call from kernel instead of calling sys_execve so we | ||
181 | * end up with proper pt_regs. | ||
182 | */ | ||
183 | int kernel_execve(const char *filename, char *const argv[], char *const envp[]) | ||
184 | { | ||
185 | register char *__a __asm__ ("r6") = filename; | ||
186 | register void *__b __asm__ ("r7") = argv; | ||
187 | register void *__c __asm__ ("r8") = envp; | ||
188 | register unsigned long __syscall __asm__ ("r12") = __NR_execve; | ||
189 | register unsigned long __ret __asm__ ("r10"); | ||
190 | __asm__ __volatile__ ("trap 0" | ||
191 | : "=r" (__ret), "=r" (__syscall) | ||
192 | : "1" (__syscall), "r" (__a), "r" (__b), "r" (__c) | ||
193 | : "r1", "r5", "r11", "r13", "r14", | ||
194 | "r15", "r16", "r17", "r18", "r19"); | ||
195 | return __ret; | ||
196 | } | ||
diff --git a/arch/v850/kernel/teg.c b/arch/v850/kernel/teg.c deleted file mode 100644 index 699248f92aae..000000000000 --- a/arch/v850/kernel/teg.c +++ /dev/null | |||
@@ -1,62 +0,0 @@ | |||
1 | /* | ||
2 | * arch/v850/kernel/teg.c -- NB85E-TEG cpu chip | ||
3 | * | ||
4 | * Copyright (C) 2001,02,03 NEC Electronics Corporation | ||
5 | * Copyright (C) 2001,02,03 Miles Bader <miles@gnu.org> | ||
6 | * | ||
7 | * This file is subject to the terms and conditions of the GNU General | ||
8 | * Public License. See the file COPYING in the main directory of this | ||
9 | * archive for more details. | ||
10 | * | ||
11 | * Written by Miles Bader <miles@gnu.org> | ||
12 | */ | ||
13 | |||
14 | #include <linux/kernel.h> | ||
15 | #include <linux/init.h> | ||
16 | #include <linux/mm.h> | ||
17 | #include <linux/swap.h> | ||
18 | #include <linux/bootmem.h> | ||
19 | #include <linux/irq.h> | ||
20 | |||
21 | #include <asm/atomic.h> | ||
22 | #include <asm/page.h> | ||
23 | #include <asm/machdep.h> | ||
24 | #include <asm/v850e_timer_d.h> | ||
25 | |||
26 | #include "mach.h" | ||
27 | |||
28 | void __init mach_sched_init (struct irqaction *timer_action) | ||
29 | { | ||
30 | /* Select timer interrupt instead of external pin. */ | ||
31 | TEG_ISS |= 0x1; | ||
32 | /* Start hardware timer. */ | ||
33 | v850e_timer_d_configure (0, HZ); | ||
34 | /* Install timer interrupt handler. */ | ||
35 | setup_irq (IRQ_INTCMD(0), timer_action); | ||
36 | } | ||
37 | |||
38 | static struct v850e_intc_irq_init irq_inits[] = { | ||
39 | { "IRQ", 0, NUM_CPU_IRQS, 1, 7 }, | ||
40 | { "CMD", IRQ_INTCMD(0), IRQ_INTCMD_NUM, 1, 5 }, | ||
41 | { "SER", IRQ_INTSER(0), IRQ_INTSER_NUM, 1, 3 }, | ||
42 | { "SR", IRQ_INTSR(0), IRQ_INTSR_NUM, 1, 4 }, | ||
43 | { "ST", IRQ_INTST(0), IRQ_INTST_NUM, 1, 5 }, | ||
44 | { 0 } | ||
45 | }; | ||
46 | #define NUM_IRQ_INITS (ARRAY_SIZE(irq_inits) - 1) | ||
47 | |||
48 | static struct hw_interrupt_type hw_itypes[NUM_IRQ_INITS]; | ||
49 | |||
50 | /* Initialize MA chip interrupts. */ | ||
51 | void __init teg_init_irqs (void) | ||
52 | { | ||
53 | v850e_intc_init_irq_types (irq_inits, hw_itypes); | ||
54 | } | ||
55 | |||
56 | /* Called before configuring an on-chip UART. */ | ||
57 | void teg_uart_pre_configure (unsigned chan, unsigned cflags, unsigned baud) | ||
58 | { | ||
59 | /* Enable UART I/O pins instead of external interrupt pins, and | ||
60 | UART interrupts instead of external pin interrupts. */ | ||
61 | TEG_ISS |= 0x4E; | ||
62 | } | ||
diff --git a/arch/v850/kernel/time.c b/arch/v850/kernel/time.c deleted file mode 100644 index d810c93fe665..000000000000 --- a/arch/v850/kernel/time.c +++ /dev/null | |||
@@ -1,106 +0,0 @@ | |||
1 | /* | ||
2 | * linux/arch/v850/kernel/time.c -- Arch-dependent timer functions | ||
3 | * | ||
4 | * Copyright (C) 1991, 1992, 1995, 2001, 2002 Linus Torvalds | ||
5 | * | ||
6 | * This file contains the v850-specific time handling details. | ||
7 | * Most of the stuff is located in the machine specific files. | ||
8 | * | ||
9 | * 1997-09-10 Updated NTP code according to technical memorandum Jan '96 | ||
10 | * "A Kernel Model for Precision Timekeeping" by Dave Mills | ||
11 | */ | ||
12 | |||
13 | #include <linux/errno.h> | ||
14 | #include <linux/kernel.h> | ||
15 | #include <linux/module.h> | ||
16 | #include <linux/param.h> | ||
17 | #include <linux/string.h> | ||
18 | #include <linux/mm.h> | ||
19 | #include <linux/interrupt.h> | ||
20 | #include <linux/time.h> | ||
21 | #include <linux/timex.h> | ||
22 | #include <linux/profile.h> | ||
23 | |||
24 | #include <asm/io.h> | ||
25 | |||
26 | #include "mach.h" | ||
27 | |||
28 | #define TICK_SIZE (tick_nsec / 1000) | ||
29 | |||
30 | /* | ||
31 | * timer_interrupt() needs to keep up the real-time clock, | ||
32 | * as well as call the "do_timer()" routine every clocktick | ||
33 | */ | ||
34 | static irqreturn_t timer_interrupt (int irq, void *dummy, struct pt_regs *regs) | ||
35 | { | ||
36 | #if 0 | ||
37 | /* last time the cmos clock got updated */ | ||
38 | static long last_rtc_update=0; | ||
39 | #endif | ||
40 | |||
41 | /* may need to kick the hardware timer */ | ||
42 | if (mach_tick) | ||
43 | mach_tick (); | ||
44 | |||
45 | do_timer (1); | ||
46 | #ifndef CONFIG_SMP | ||
47 | update_process_times(user_mode(regs)); | ||
48 | #endif | ||
49 | profile_tick(CPU_PROFILING, regs); | ||
50 | #if 0 | ||
51 | /* | ||
52 | * If we have an externally synchronized Linux clock, then update | ||
53 | * CMOS clock accordingly every ~11 minutes. Set_rtc_mmss() has to be | ||
54 | * called as close as possible to 500 ms before the new second starts. | ||
55 | */ | ||
56 | if (ntp_synced() && | ||
57 | xtime.tv_sec > last_rtc_update + 660 && | ||
58 | (xtime.tv_nsec / 1000) >= 500000 - ((unsigned) TICK_SIZE) / 2 && | ||
59 | (xtime.tv_nsec / 1000) <= 500000 + ((unsigned) TICK_SIZE) / 2) { | ||
60 | if (set_rtc_mmss (xtime.tv_sec) == 0) | ||
61 | last_rtc_update = xtime.tv_sec; | ||
62 | else | ||
63 | last_rtc_update = xtime.tv_sec - 600; /* do it again in 60 s */ | ||
64 | } | ||
65 | #ifdef CONFIG_HEARTBEAT | ||
66 | /* use power LED as a heartbeat instead -- much more useful | ||
67 | for debugging -- based on the version for PReP by Cort */ | ||
68 | /* acts like an actual heart beat -- ie thump-thump-pause... */ | ||
69 | if (mach_heartbeat) { | ||
70 | static unsigned cnt = 0, period = 0, dist = 0; | ||
71 | |||
72 | if (cnt == 0 || cnt == dist) | ||
73 | mach_heartbeat ( 1 ); | ||
74 | else if (cnt == 7 || cnt == dist+7) | ||
75 | mach_heartbeat ( 0 ); | ||
76 | |||
77 | if (++cnt > period) { | ||
78 | cnt = 0; | ||
79 | /* The hyperbolic function below modifies the heartbeat period | ||
80 | * length in dependency of the current (5min) load. It goes | ||
81 | * through the points f(0)=126, f(1)=86, f(5)=51, | ||
82 | * f(inf)->30. */ | ||
83 | period = ((672<<FSHIFT)/(5*avenrun[0]+(7<<FSHIFT))) + 30; | ||
84 | dist = period / 4; | ||
85 | } | ||
86 | } | ||
87 | #endif /* CONFIG_HEARTBEAT */ | ||
88 | #endif /* 0 */ | ||
89 | |||
90 | return IRQ_HANDLED; | ||
91 | } | ||
92 | |||
93 | static int timer_dev_id; | ||
94 | static struct irqaction timer_irqaction = { | ||
95 | .handler = timer_interrupt, | ||
96 | .flags = IRQF_DISABLED, | ||
97 | .mask = CPU_MASK_NONE, | ||
98 | .name = "timer", | ||
99 | .dev_id = &timer_dev_id, | ||
100 | }; | ||
101 | |||
102 | void time_init (void) | ||
103 | { | ||
104 | mach_gettimeofday (&xtime); | ||
105 | mach_sched_init (&timer_irqaction); | ||
106 | } | ||
diff --git a/arch/v850/kernel/v850_ksyms.c b/arch/v850/kernel/v850_ksyms.c deleted file mode 100644 index 8d386a5dbc4a..000000000000 --- a/arch/v850/kernel/v850_ksyms.c +++ /dev/null | |||
@@ -1,51 +0,0 @@ | |||
1 | #include <linux/module.h> | ||
2 | #include <linux/linkage.h> | ||
3 | #include <linux/sched.h> | ||
4 | #include <linux/string.h> | ||
5 | #include <linux/mm.h> | ||
6 | #include <linux/user.h> | ||
7 | #include <linux/elfcore.h> | ||
8 | #include <linux/in6.h> | ||
9 | #include <linux/interrupt.h> | ||
10 | |||
11 | #include <asm/pgalloc.h> | ||
12 | #include <asm/irq.h> | ||
13 | #include <asm/io.h> | ||
14 | #include <asm/checksum.h> | ||
15 | #include <asm/current.h> | ||
16 | |||
17 | |||
18 | extern void *trap_table; | ||
19 | EXPORT_SYMBOL (trap_table); | ||
20 | |||
21 | /* platform dependent support */ | ||
22 | EXPORT_SYMBOL (kernel_thread); | ||
23 | EXPORT_SYMBOL (__bug); | ||
24 | |||
25 | /* Networking helper routines. */ | ||
26 | EXPORT_SYMBOL (csum_partial_copy_nocheck); | ||
27 | EXPORT_SYMBOL (csum_partial_copy_from_user); | ||
28 | EXPORT_SYMBOL (ip_compute_csum); | ||
29 | EXPORT_SYMBOL (ip_fast_csum); | ||
30 | |||
31 | /* string / mem functions */ | ||
32 | EXPORT_SYMBOL (memset); | ||
33 | EXPORT_SYMBOL (memcpy); | ||
34 | EXPORT_SYMBOL (memmove); | ||
35 | |||
36 | /* | ||
37 | * libgcc functions - functions that are used internally by the | ||
38 | * compiler... (prototypes are not correct though, but that | ||
39 | * doesn't really matter since they're not versioned). | ||
40 | */ | ||
41 | extern void __ashldi3 (void); | ||
42 | extern void __ashrdi3 (void); | ||
43 | extern void __lshrdi3 (void); | ||
44 | extern void __muldi3 (void); | ||
45 | extern void __negdi2 (void); | ||
46 | |||
47 | EXPORT_SYMBOL (__ashldi3); | ||
48 | EXPORT_SYMBOL (__ashrdi3); | ||
49 | EXPORT_SYMBOL (__lshrdi3); | ||
50 | EXPORT_SYMBOL (__muldi3); | ||
51 | EXPORT_SYMBOL (__negdi2); | ||
diff --git a/arch/v850/kernel/v850e2_cache.c b/arch/v850/kernel/v850e2_cache.c deleted file mode 100644 index 4570312c689c..000000000000 --- a/arch/v850/kernel/v850e2_cache.c +++ /dev/null | |||
@@ -1,127 +0,0 @@ | |||
1 | /* | ||
2 | * arch/v850/kernel/v850e2_cache.c -- Cache control for V850E2 cache | ||
3 | * memories | ||
4 | * | ||
5 | * Copyright (C) 2003 NEC Electronics Corporation | ||
6 | * Copyright (C) 2003 Miles Bader <miles@gnu.org> | ||
7 | * | ||
8 | * This file is subject to the terms and conditions of the GNU General | ||
9 | * Public License. See the file COPYING in the main directory of this | ||
10 | * archive for more details. | ||
11 | * | ||
12 | * Written by Miles Bader <miles@gnu.org> | ||
13 | */ | ||
14 | |||
15 | #include <linux/mm.h> | ||
16 | |||
17 | #include <asm/v850e2_cache.h> | ||
18 | |||
19 | /* Cache operations we can do. The encoding corresponds directly to the | ||
20 | value we need to write into the COPR register. */ | ||
21 | enum cache_op { | ||
22 | OP_SYNC_IF_DIRTY = V850E2_CACHE_COPR_CFC(0), /* 000 */ | ||
23 | OP_SYNC_IF_VALID = V850E2_CACHE_COPR_CFC(1), /* 001 */ | ||
24 | OP_SYNC_IF_VALID_AND_CLEAR = V850E2_CACHE_COPR_CFC(3), /* 011 */ | ||
25 | OP_WAY_CLEAR = V850E2_CACHE_COPR_CFC(4), /* 100 */ | ||
26 | OP_FILL = V850E2_CACHE_COPR_CFC(5), /* 101 */ | ||
27 | OP_CLEAR = V850E2_CACHE_COPR_CFC(6), /* 110 */ | ||
28 | OP_CREATE_DIRTY = V850E2_CACHE_COPR_CFC(7) /* 111 */ | ||
29 | }; | ||
30 | |||
31 | /* Which cache to use. This encoding also corresponds directly to the | ||
32 | value we need to write into the COPR register. */ | ||
33 | enum cache { | ||
34 | ICACHE = 0, | ||
35 | DCACHE = V850E2_CACHE_COPR_LBSL | ||
36 | }; | ||
37 | |||
38 | /* Returns ADDR rounded down to the beginning of its cache-line. */ | ||
39 | #define CACHE_LINE_ADDR(addr) \ | ||
40 | ((addr) & ~(V850E2_CACHE_LINE_SIZE - 1)) | ||
41 | /* Returns END_ADDR rounded up to the `limit' of its cache-line. */ | ||
42 | #define CACHE_LINE_END_ADDR(end_addr) \ | ||
43 | CACHE_LINE_ADDR(end_addr + (V850E2_CACHE_LINE_SIZE - 1)) | ||
44 | |||
45 | |||
46 | /* Low-level cache ops. */ | ||
47 | |||
48 | /* Apply cache-op OP to all entries in CACHE. */ | ||
49 | static inline void cache_op_all (enum cache_op op, enum cache cache) | ||
50 | { | ||
51 | int cmd = op | cache | V850E2_CACHE_COPR_WSLE | V850E2_CACHE_COPR_STRT; | ||
52 | |||
53 | if (op != OP_WAY_CLEAR) { | ||
54 | /* The WAY_CLEAR operation does the whole way, but other | ||
55 | ops take begin-index and count params; we just indicate | ||
56 | the entire cache. */ | ||
57 | V850E2_CACHE_CADL = 0; | ||
58 | V850E2_CACHE_CADH = 0; | ||
59 | V850E2_CACHE_CCNT = V850E2_CACHE_WAY_SIZE - 1; | ||
60 | } | ||
61 | |||
62 | V850E2_CACHE_COPR = cmd | V850E2_CACHE_COPR_WSL(0); /* way 0 */ | ||
63 | V850E2_CACHE_COPR = cmd | V850E2_CACHE_COPR_WSL(1); /* way 1 */ | ||
64 | V850E2_CACHE_COPR = cmd | V850E2_CACHE_COPR_WSL(2); /* way 2 */ | ||
65 | V850E2_CACHE_COPR = cmd | V850E2_CACHE_COPR_WSL(3); /* way 3 */ | ||
66 | } | ||
67 | |||
68 | /* Apply cache-op OP to all entries in CACHE covering addresses ADDR | ||
69 | through ADDR+LEN. */ | ||
70 | static inline void cache_op_range (enum cache_op op, u32 addr, u32 len, | ||
71 | enum cache cache) | ||
72 | { | ||
73 | u32 start = CACHE_LINE_ADDR (addr); | ||
74 | u32 end = CACHE_LINE_END_ADDR (addr + len); | ||
75 | u32 num_lines = (end - start) >> V850E2_CACHE_LINE_SIZE_BITS; | ||
76 | |||
77 | V850E2_CACHE_CADL = start & 0xFFFF; | ||
78 | V850E2_CACHE_CADH = start >> 16; | ||
79 | V850E2_CACHE_CCNT = num_lines - 1; | ||
80 | |||
81 | V850E2_CACHE_COPR = op | cache | V850E2_CACHE_COPR_STRT; | ||
82 | } | ||
83 | |||
84 | |||
85 | /* High-level ops. */ | ||
86 | |||
87 | static void cache_exec_after_store_all (void) | ||
88 | { | ||
89 | cache_op_all (OP_SYNC_IF_DIRTY, DCACHE); | ||
90 | cache_op_all (OP_WAY_CLEAR, ICACHE); | ||
91 | } | ||
92 | |||
93 | static void cache_exec_after_store_range (u32 start, u32 len) | ||
94 | { | ||
95 | cache_op_range (OP_SYNC_IF_DIRTY, start, len, DCACHE); | ||
96 | cache_op_range (OP_CLEAR, start, len, ICACHE); | ||
97 | } | ||
98 | |||
99 | |||
100 | /* Exported functions. */ | ||
101 | |||
102 | void flush_icache (void) | ||
103 | { | ||
104 | cache_exec_after_store_all (); | ||
105 | } | ||
106 | |||
107 | void flush_icache_range (unsigned long start, unsigned long end) | ||
108 | { | ||
109 | cache_exec_after_store_range (start, end - start); | ||
110 | } | ||
111 | |||
112 | void flush_icache_page (struct vm_area_struct *vma, struct page *page) | ||
113 | { | ||
114 | cache_exec_after_store_range (page_to_virt (page), PAGE_SIZE); | ||
115 | } | ||
116 | |||
117 | void flush_icache_user_range (struct vm_area_struct *vma, struct page *page, | ||
118 | unsigned long addr, int len) | ||
119 | { | ||
120 | cache_exec_after_store_range (addr, len); | ||
121 | } | ||
122 | |||
123 | void flush_cache_sigtramp (unsigned long addr) | ||
124 | { | ||
125 | /* For the exact size, see signal.c, but 16 bytes should be enough. */ | ||
126 | cache_exec_after_store_range (addr, 16); | ||
127 | } | ||
diff --git a/arch/v850/kernel/v850e_cache.c b/arch/v850/kernel/v850e_cache.c deleted file mode 100644 index ea3e51cfb259..000000000000 --- a/arch/v850/kernel/v850e_cache.c +++ /dev/null | |||
@@ -1,174 +0,0 @@ | |||
1 | /* | ||
2 | * arch/v850/kernel/v850e_cache.c -- Cache control for V850E cache memories | ||
3 | * | ||
4 | * Copyright (C) 2003 NEC Electronics Corporation | ||
5 | * Copyright (C) 2003 Miles Bader <miles@gnu.org> | ||
6 | * | ||
7 | * This file is subject to the terms and conditions of the GNU General | ||
8 | * Public License. See the file COPYING in the main directory of this | ||
9 | * archive for more details. | ||
10 | * | ||
11 | * Written by Miles Bader <miles@gnu.org> | ||
12 | */ | ||
13 | |||
14 | /* This file implements cache control for the rather simple cache used on | ||
15 | some V850E CPUs, specifically the NB85E/TEG CPU-core and the V850E/ME2 | ||
16 | CPU. V850E2 processors have their own (better) cache | ||
17 | implementation. */ | ||
18 | |||
19 | #include <asm/entry.h> | ||
20 | #include <asm/cacheflush.h> | ||
21 | #include <asm/v850e_cache.h> | ||
22 | |||
23 | #define WAIT_UNTIL_CLEAR(value) while (value) {} | ||
24 | |||
25 | /* Set caching params via the BHC and DCC registers. */ | ||
26 | void v850e_cache_enable (u16 bhc, u16 icc, u16 dcc) | ||
27 | { | ||
28 | unsigned long *r0_ram = (unsigned long *)R0_RAM_ADDR; | ||
29 | register u16 bhc_val asm ("r6") = bhc; | ||
30 | |||
31 | /* Read the instruction cache control register (ICC) and confirm | ||
32 | that bits 0 and 1 (TCLR0, TCLR1) are all cleared. */ | ||
33 | WAIT_UNTIL_CLEAR (V850E_CACHE_ICC & 0x3); | ||
34 | V850E_CACHE_ICC = icc; | ||
35 | |||
36 | #ifdef V850E_CACHE_DCC | ||
37 | /* Configure data-cache. */ | ||
38 | V850E_CACHE_DCC = dcc; | ||
39 | #endif /* V850E_CACHE_DCC */ | ||
40 | |||
41 | /* Configure caching for various memory regions by writing the BHC | ||
42 | register. The documentation says that an instruction _cannot_ | ||
43 | enable/disable caching for the memory region in which the | ||
44 | instruction itself exists; to work around this, we store | ||
45 | appropriate instructions into the on-chip RAM area (which is never | ||
46 | cached), and briefly jump there to do the work. */ | ||
47 | #ifdef V850E_CACHE_WRITE_IBS | ||
48 | *r0_ram++ = 0xf0720760; /* st.h r0, 0xfffff072[r0] */ | ||
49 | #endif | ||
50 | *r0_ram++ = 0xf06a3760; /* st.h r6, 0xfffff06a[r0] */ | ||
51 | *r0_ram = 0x5640006b; /* jmp [r11] */ | ||
52 | |||
53 | asm ("mov hilo(1f), r11; jmp [%1]; 1:;" | ||
54 | :: "r" (bhc_val), "r" (R0_RAM_ADDR) : "r11"); | ||
55 | } | ||
56 | |||
57 | static void clear_icache (void) | ||
58 | { | ||
59 | /* 1. Read the instruction cache control register (ICC) and confirm | ||
60 | that bits 0 and 1 (TCLR0, TCLR1) are all cleared. */ | ||
61 | WAIT_UNTIL_CLEAR (V850E_CACHE_ICC & 0x3); | ||
62 | |||
63 | /* 2. Read the ICC register and confirm that bit 12 (LOCK0) is | ||
64 | cleared. Bit 13 of the ICC register is always cleared. */ | ||
65 | WAIT_UNTIL_CLEAR (V850E_CACHE_ICC & 0x1000); | ||
66 | |||
67 | /* 3. Set the TCLR0 and TCLR1 bits of the ICC register as follows, | ||
68 | when clearing way 0 and way 1 at the same time: | ||
69 | (a) Set the TCLR0 and TCLR1 bits. | ||
70 | (b) Read the TCLR0 and TCLR1 bits to confirm that these bits | ||
71 | are cleared. | ||
72 | (c) Perform (a) and (b) above again. */ | ||
73 | V850E_CACHE_ICC |= 0x3; | ||
74 | WAIT_UNTIL_CLEAR (V850E_CACHE_ICC & 0x3); | ||
75 | |||
76 | #ifdef V850E_CACHE_REPEAT_ICC_WRITE | ||
77 | /* Do it again. */ | ||
78 | V850E_CACHE_ICC |= 0x3; | ||
79 | WAIT_UNTIL_CLEAR (V850E_CACHE_ICC & 0x3); | ||
80 | #endif | ||
81 | } | ||
82 | |||
83 | #ifdef V850E_CACHE_DCC | ||
84 | /* Flush or clear (or both) the data cache, depending on the value of FLAGS; | ||
85 | the procedure is the same for both, just the control bits used differ (and | ||
86 | both may be performed simultaneously). */ | ||
87 | static void dcache_op (unsigned short flags) | ||
88 | { | ||
89 | /* 1. Read the data cache control register (DCC) and confirm that bits | ||
90 | 0, 1, 4, and 5 (DC00, DC01, DC04, DC05) are all cleared. */ | ||
91 | WAIT_UNTIL_CLEAR (V850E_CACHE_DCC & 0x33); | ||
92 | |||
93 | /* 2. Clear DCC register bit 12 (DC12), bit 13 (DC13), or both | ||
94 | depending on the way for which tags are to be cleared. */ | ||
95 | V850E_CACHE_DCC &= ~0xC000; | ||
96 | |||
97 | /* 3. Set DCC register bit 0 (DC00), bit 1 (DC01) or both depending on | ||
98 | the way for which tags are to be cleared. | ||
99 | ... | ||
100 | Set DCC register bit 4 (DC04), bit 5 (DC05), or both depending | ||
101 | on the way to be data flushed. */ | ||
102 | V850E_CACHE_DCC |= flags; | ||
103 | |||
104 | /* 4. Read DCC register bit DC00, DC01 [DC04, DC05], or both depending | ||
105 | on the way for which tags were cleared [flushed] and confirm | ||
106 | that that bit is cleared. */ | ||
107 | WAIT_UNTIL_CLEAR (V850E_CACHE_DCC & flags); | ||
108 | } | ||
109 | #endif /* V850E_CACHE_DCC */ | ||
110 | |||
111 | /* Flushes the contents of the dcache to memory. */ | ||
112 | static inline void flush_dcache (void) | ||
113 | { | ||
114 | #ifdef V850E_CACHE_DCC | ||
115 | /* We only need to do something if in write-back mode. */ | ||
116 | if (V850E_CACHE_DCC & 0x0400) | ||
117 | dcache_op (0x30); | ||
118 | #endif /* V850E_CACHE_DCC */ | ||
119 | } | ||
120 | |||
121 | /* Flushes the contents of the dcache to memory, and then clears it. */ | ||
122 | static inline void clear_dcache (void) | ||
123 | { | ||
124 | #ifdef V850E_CACHE_DCC | ||
125 | /* We only need to do something if the dcache is enabled. */ | ||
126 | if (V850E_CACHE_DCC & 0x0C00) | ||
127 | dcache_op (0x33); | ||
128 | #endif /* V850E_CACHE_DCC */ | ||
129 | } | ||
130 | |||
131 | /* Clears the dcache without flushing to memory first. */ | ||
132 | static inline void clear_dcache_no_flush (void) | ||
133 | { | ||
134 | #ifdef V850E_CACHE_DCC | ||
135 | /* We only need to do something if the dcache is enabled. */ | ||
136 | if (V850E_CACHE_DCC & 0x0C00) | ||
137 | dcache_op (0x3); | ||
138 | #endif /* V850E_CACHE_DCC */ | ||
139 | } | ||
140 | |||
141 | static inline void cache_exec_after_store (void) | ||
142 | { | ||
143 | flush_dcache (); | ||
144 | clear_icache (); | ||
145 | } | ||
146 | |||
147 | |||
148 | /* Exported functions. */ | ||
149 | |||
150 | void flush_icache (void) | ||
151 | { | ||
152 | cache_exec_after_store (); | ||
153 | } | ||
154 | |||
155 | void flush_icache_range (unsigned long start, unsigned long end) | ||
156 | { | ||
157 | cache_exec_after_store (); | ||
158 | } | ||
159 | |||
160 | void flush_icache_page (struct vm_area_struct *vma, struct page *page) | ||
161 | { | ||
162 | cache_exec_after_store (); | ||
163 | } | ||
164 | |||
165 | void flush_icache_user_range (struct vm_area_struct *vma, struct page *page, | ||
166 | unsigned long adr, int len) | ||
167 | { | ||
168 | cache_exec_after_store (); | ||
169 | } | ||
170 | |||
171 | void flush_cache_sigtramp (unsigned long addr) | ||
172 | { | ||
173 | cache_exec_after_store (); | ||
174 | } | ||
diff --git a/arch/v850/kernel/v850e_intc.c b/arch/v850/kernel/v850e_intc.c deleted file mode 100644 index 8d39a52ee6d1..000000000000 --- a/arch/v850/kernel/v850e_intc.c +++ /dev/null | |||
@@ -1,104 +0,0 @@ | |||
1 | /* | ||
2 | * arch/v850/kernel/v850e_intc.c -- V850E interrupt controller (INTC) | ||
3 | * | ||
4 | * Copyright (C) 2001,02,03 NEC Electronics Corporation | ||
5 | * Copyright (C) 2001,02,03 Miles Bader <miles@gnu.org> | ||
6 | * | ||
7 | * This file is subject to the terms and conditions of the GNU General | ||
8 | * Public License. See the file COPYING in the main directory of this | ||
9 | * archive for more details. | ||
10 | * | ||
11 | * Written by Miles Bader <miles@gnu.org> | ||
12 | */ | ||
13 | |||
14 | #include <linux/kernel.h> | ||
15 | #include <linux/init.h> | ||
16 | #include <linux/irq.h> | ||
17 | |||
18 | #include <asm/v850e_intc.h> | ||
19 | |||
20 | static void irq_nop (unsigned irq) { } | ||
21 | |||
22 | static unsigned v850e_intc_irq_startup (unsigned irq) | ||
23 | { | ||
24 | v850e_intc_clear_pending_irq (irq); | ||
25 | v850e_intc_enable_irq (irq); | ||
26 | return 0; | ||
27 | } | ||
28 | |||
29 | static void v850e_intc_end_irq (unsigned irq) | ||
30 | { | ||
31 | unsigned long psw, temp; | ||
32 | |||
33 | /* Clear the highest-level bit in the In-service priority register | ||
34 | (ISPR), to allow this interrupt (or another of the same or | ||
35 | lesser priority) to happen again. | ||
36 | |||
37 | The `reti' instruction normally does this automatically when the | ||
38 | PSW bits EP and NP are zero, but we can't always rely on reti | ||
39 | being used consistently to return after an interrupt (another | ||
40 | process can be scheduled, for instance, which can delay the | ||
41 | associated reti for a long time, or this process may be being | ||
42 | single-stepped, which uses the `dbret' instruction to return | ||
43 | from the kernel). | ||
44 | |||
45 | We also set the PSW EP bit, which prevents reti from also | ||
46 | trying to modify the ISPR itself. */ | ||
47 | |||
48 | /* Get PSW and disable interrupts. */ | ||
49 | asm volatile ("stsr psw, %0; di" : "=r" (psw)); | ||
50 | /* We don't want to do anything for NMIs (they don't use the ISPR). */ | ||
51 | if (! (psw & 0xC0)) { | ||
52 | /* Transition to `trap' state, so that an eventual real | ||
53 | reti instruction won't modify the ISPR. */ | ||
54 | psw |= 0x40; | ||
55 | /* Fake an interrupt return, which automatically clears the | ||
56 | appropriate bit in the ISPR. */ | ||
57 | asm volatile ("mov hilo(1f), %0;" | ||
58 | "ldsr %0, eipc; ldsr %1, eipsw;" | ||
59 | "reti;" | ||
60 | "1:" | ||
61 | : "=&r" (temp) : "r" (psw)); | ||
62 | } | ||
63 | } | ||
64 | |||
65 | /* Initialize HW_IRQ_TYPES for INTC-controlled irqs described in array | ||
66 | INITS (which is terminated by an entry with the name field == 0). */ | ||
67 | void __init v850e_intc_init_irq_types (struct v850e_intc_irq_init *inits, | ||
68 | struct hw_interrupt_type *hw_irq_types) | ||
69 | { | ||
70 | struct v850e_intc_irq_init *init; | ||
71 | for (init = inits; init->name; init++) { | ||
72 | unsigned i; | ||
73 | struct hw_interrupt_type *hwit = hw_irq_types++; | ||
74 | |||
75 | hwit->typename = init->name; | ||
76 | |||
77 | hwit->startup = v850e_intc_irq_startup; | ||
78 | hwit->shutdown = v850e_intc_disable_irq; | ||
79 | hwit->enable = v850e_intc_enable_irq; | ||
80 | hwit->disable = v850e_intc_disable_irq; | ||
81 | hwit->ack = irq_nop; | ||
82 | hwit->end = v850e_intc_end_irq; | ||
83 | |||
84 | /* Initialize kernel IRQ infrastructure for this interrupt. */ | ||
85 | init_irq_handlers(init->base, init->num, init->interval, hwit); | ||
86 | |||
87 | /* Set the interrupt priorities. */ | ||
88 | for (i = 0; i < init->num; i++) { | ||
89 | unsigned irq = init->base + i * init->interval; | ||
90 | |||
91 | /* If the interrupt is currently enabled (all | ||
92 | interrupts are initially disabled), then | ||
93 | assume whoever enabled it has set things up | ||
94 | properly, and avoid messing with it. */ | ||
95 | if (! v850e_intc_irq_enabled (irq)) | ||
96 | /* This write also (1) disables the | ||
97 | interrupt, and (2) clears any pending | ||
98 | interrupts. */ | ||
99 | V850E_INTC_IC (irq) | ||
100 | = (V850E_INTC_IC_PR (init->priority) | ||
101 | | V850E_INTC_IC_MK); | ||
102 | } | ||
103 | } | ||
104 | } | ||
diff --git a/arch/v850/kernel/v850e_timer_d.c b/arch/v850/kernel/v850e_timer_d.c deleted file mode 100644 index d2a4ece2574c..000000000000 --- a/arch/v850/kernel/v850e_timer_d.c +++ /dev/null | |||
@@ -1,54 +0,0 @@ | |||
1 | /* | ||
2 | * include/asm-v850/v850e_timer_d.c -- `Timer D' component often used | ||
3 | * with V850E CPUs | ||
4 | * | ||
5 | * Copyright (C) 2001,02,03 NEC Electronics Corporation | ||
6 | * Copyright (C) 2001,02,03 Miles Bader <miles@gnu.org> | ||
7 | * | ||
8 | * This file is subject to the terms and conditions of the GNU General | ||
9 | * Public License. See the file COPYING in the main directory of this | ||
10 | * archive for more details. | ||
11 | * | ||
12 | * Written by Miles Bader <miles@gnu.org> | ||
13 | */ | ||
14 | |||
15 | #include <linux/kernel.h> | ||
16 | |||
17 | #include <asm/v850e_utils.h> | ||
18 | #include <asm/v850e_timer_d.h> | ||
19 | |||
20 | /* Start interval timer TIMER (0-3). The timer will issue the | ||
21 | corresponding INTCMD interrupt RATE times per second. | ||
22 | This function does not enable the interrupt. */ | ||
23 | void v850e_timer_d_configure (unsigned timer, unsigned rate) | ||
24 | { | ||
25 | unsigned divlog2, count; | ||
26 | |||
27 | /* Calculate params for timer. */ | ||
28 | if (! calc_counter_params ( | ||
29 | V850E_TIMER_D_BASE_FREQ, rate, | ||
30 | V850E_TIMER_D_TMCD_CS_MIN, V850E_TIMER_D_TMCD_CS_MAX, 16, | ||
31 | &divlog2, &count)) | ||
32 | printk (KERN_WARNING | ||
33 | "Cannot find interval timer %d setting suitable" | ||
34 | " for rate of %dHz.\n" | ||
35 | "Using rate of %dHz instead.\n", | ||
36 | timer, rate, | ||
37 | (V850E_TIMER_D_BASE_FREQ >> divlog2) >> 16); | ||
38 | |||
39 | /* Do the actual hardware timer initialization: */ | ||
40 | |||
41 | /* Enable timer. */ | ||
42 | V850E_TIMER_D_TMCD(timer) = V850E_TIMER_D_TMCD_CAE; | ||
43 | /* Set clock divider. */ | ||
44 | V850E_TIMER_D_TMCD(timer) | ||
45 | = V850E_TIMER_D_TMCD_CAE | ||
46 | | V850E_TIMER_D_TMCD_CS(divlog2); | ||
47 | /* Set timer compare register. */ | ||
48 | V850E_TIMER_D_CMD(timer) = count; | ||
49 | /* Start counting. */ | ||
50 | V850E_TIMER_D_TMCD(timer) | ||
51 | = V850E_TIMER_D_TMCD_CAE | ||
52 | | V850E_TIMER_D_TMCD_CS(divlog2) | ||
53 | | V850E_TIMER_D_TMCD_CE; | ||
54 | } | ||
diff --git a/arch/v850/kernel/v850e_utils.c b/arch/v850/kernel/v850e_utils.c deleted file mode 100644 index e6807ef8dee6..000000000000 --- a/arch/v850/kernel/v850e_utils.c +++ /dev/null | |||
@@ -1,62 +0,0 @@ | |||
1 | /* | ||
2 | * include/asm-v850/v850e_utils.h -- Utility functions associated with | ||
3 | * V850E CPUs | ||
4 | * | ||
5 | * Copyright (C) 2001,02,03 NEC Electronics Corporation | ||
6 | * Copyright (C) 2001,02,03 Miles Bader <miles@gnu.org> | ||
7 | * | ||
8 | * This file is subject to the terms and conditions of the GNU General | ||
9 | * Public License. See the file COPYING in the main directory of this | ||
10 | * archive for more details. | ||
11 | * | ||
12 | * Written by Miles Bader <miles@gnu.org> | ||
13 | */ | ||
14 | |||
15 | #include <asm/v850e_utils.h> | ||
16 | |||
17 | /* Calculate counter clock-divider and count values to attain the | ||
18 | desired frequency RATE from the base frequency BASE_FREQ. The | ||
19 | counter is expected to have a clock-divider, which can divide the | ||
20 | system cpu clock by a power of two value from MIN_DIVLOG2 to | ||
21 | MAX_DIV_LOG2, and a word-size of COUNTER_SIZE bits (the counter | ||
22 | counts up and resets whenever it's equal to the compare register, | ||
23 | generating an interrupt or whatever when it does so). The returned | ||
24 | values are: *DIVLOG2 -- log2 of the desired clock divider and *COUNT | ||
25 | -- the counter compare value to use. Returns true if it was possible | ||
26 | to find a reasonable value, otherwise false (and the other return | ||
27 | values will be set to be as good as possible). */ | ||
28 | int calc_counter_params (unsigned long base_freq, | ||
29 | unsigned long rate, | ||
30 | unsigned min_divlog2, unsigned max_divlog2, | ||
31 | unsigned counter_size, | ||
32 | unsigned *divlog2, unsigned *count) | ||
33 | { | ||
34 | unsigned _divlog2; | ||
35 | int ok = 0; | ||
36 | |||
37 | /* Find the lowest clock divider setting that can represent RATE. */ | ||
38 | for (_divlog2 = min_divlog2; _divlog2 <= max_divlog2; _divlog2++) { | ||
39 | /* Minimum interrupt rate possible using this divider. */ | ||
40 | unsigned min_int_rate | ||
41 | = (base_freq >> _divlog2) >> counter_size; | ||
42 | |||
43 | if (min_int_rate <= rate) { | ||
44 | /* This setting is the highest resolution | ||
45 | setting that's slow enough enough to attain | ||
46 | RATE interrupts per second, so use it. */ | ||
47 | ok = 1; | ||
48 | break; | ||
49 | } | ||
50 | } | ||
51 | |||
52 | if (_divlog2 > max_divlog2) | ||
53 | /* Can't find correct setting. */ | ||
54 | _divlog2 = max_divlog2; | ||
55 | |||
56 | if (divlog2) | ||
57 | *divlog2 = _divlog2; | ||
58 | if (count) | ||
59 | *count = ((base_freq >> _divlog2) + rate/2) / rate; | ||
60 | |||
61 | return ok; | ||
62 | } | ||
diff --git a/arch/v850/kernel/vmlinux.lds.S b/arch/v850/kernel/vmlinux.lds.S deleted file mode 100644 index d08cd1d27f27..000000000000 --- a/arch/v850/kernel/vmlinux.lds.S +++ /dev/null | |||
@@ -1,306 +0,0 @@ | |||
1 | /* | ||
2 | * arch/v850/vmlinux.lds.S -- kernel linker script for v850 platforms | ||
3 | * | ||
4 | * Copyright (C) 2002,03,04,05 NEC Electronics Corporation | ||
5 | * Copyright (C) 2002,03,04,05 Miles Bader <miles@gnu.org> | ||
6 | * | ||
7 | * This file is subject to the terms and conditions of the GNU General | ||
8 | * Public License. See the file COPYING in the main directory of this | ||
9 | * archive for more details. | ||
10 | * | ||
11 | * Written by Miles Bader <miles@gnu.org> | ||
12 | */ | ||
13 | |||
14 | |||
15 | #define VMLINUX_SYMBOL(_sym_) _##_sym_ | ||
16 | #include <asm-generic/vmlinux.lds.h> | ||
17 | |||
18 | /* For most platforms, this will define useful things like RAM addr/size. */ | ||
19 | #include <asm/machdep.h> | ||
20 | |||
21 | |||
22 | /* The following macros contain the usual definitions for various data areas. | ||
23 | The prefix `RAMK_' is used to indicate macros suitable for kernels loaded | ||
24 | into RAM, and similarly `ROMK_' for ROM-resident kernels. Note that all | ||
25 | symbols are prefixed with an extra `_' for compatibility with the v850 | ||
26 | toolchain. */ | ||
27 | |||
28 | |||
29 | /* Interrupt vectors. */ | ||
30 | #define INTV_CONTENTS \ | ||
31 | . = ALIGN (0x10) ; \ | ||
32 | __intv_start = . ; \ | ||
33 | *(.intv.reset) /* Reset vector */ \ | ||
34 | . = __intv_start + 0x10 ; \ | ||
35 | *(.intv.common) /* Vectors common to all v850e proc */\ | ||
36 | . = __intv_start + 0x80 ; \ | ||
37 | *(.intv.mach) /* Machine-specific int. vectors. */ \ | ||
38 | __intv_end = . ; | ||
39 | |||
40 | #define RODATA_CONTENTS \ | ||
41 | . = ALIGN (16) ; \ | ||
42 | *(.rodata) *(.rodata.*) \ | ||
43 | *(__vermagic) /* Kernel version magic */ \ | ||
44 | *(.rodata1) \ | ||
45 | /* PCI quirks */ \ | ||
46 | ___start_pci_fixups_early = . ; \ | ||
47 | *(.pci_fixup_early) \ | ||
48 | ___end_pci_fixups_early = . ; \ | ||
49 | ___start_pci_fixups_header = . ; \ | ||
50 | *(.pci_fixup_header) \ | ||
51 | ___end_pci_fixups_header = . ; \ | ||
52 | ___start_pci_fixups_final = . ; \ | ||
53 | *(.pci_fixup_final) \ | ||
54 | ___end_pci_fixups_final = . ; \ | ||
55 | ___start_pci_fixups_enable = . ; \ | ||
56 | *(.pci_fixup_enable) \ | ||
57 | ___end_pci_fixups_enable = . ; \ | ||
58 | /* Kernel symbol table: Normal symbols */ \ | ||
59 | ___start___ksymtab = .; \ | ||
60 | *(__ksymtab) \ | ||
61 | ___stop___ksymtab = .; \ | ||
62 | /* Kernel symbol table: GPL-only symbols */ \ | ||
63 | ___start___ksymtab_gpl = .; \ | ||
64 | *(__ksymtab_gpl) \ | ||
65 | ___stop___ksymtab_gpl = .; \ | ||
66 | /* Kernel symbol table: GPL-future symbols */ \ | ||
67 | ___start___ksymtab_gpl_future = .; \ | ||
68 | *(__ksymtab_gpl_future) \ | ||
69 | ___stop___ksymtab_gpl_future = .; \ | ||
70 | /* Kernel symbol table: strings */ \ | ||
71 | *(__ksymtab_strings) \ | ||
72 | /* Kernel symbol table: Normal symbols */ \ | ||
73 | ___start___kcrctab = .; \ | ||
74 | *(__kcrctab) \ | ||
75 | ___stop___kcrctab = .; \ | ||
76 | /* Kernel symbol table: GPL-only symbols */ \ | ||
77 | ___start___kcrctab_gpl = .; \ | ||
78 | *(__kcrctab_gpl) \ | ||
79 | ___stop___kcrctab_gpl = .; \ | ||
80 | /* Kernel symbol table: GPL-future symbols */ \ | ||
81 | ___start___kcrctab_gpl_future = .; \ | ||
82 | *(__kcrctab_gpl_future) \ | ||
83 | ___stop___kcrctab_gpl_future = .; \ | ||
84 | /* Built-in module parameters */ \ | ||
85 | . = ALIGN (4) ; \ | ||
86 | ___start___param = .; \ | ||
87 | *(__param) \ | ||
88 | ___stop___param = .; | ||
89 | |||
90 | |||
91 | /* Kernel text segment, and some constant data areas. */ | ||
92 | #define TEXT_CONTENTS \ | ||
93 | _text = .; \ | ||
94 | __stext = . ; \ | ||
95 | TEXT_TEXT \ | ||
96 | SCHED_TEXT \ | ||
97 | *(.exit.text) /* 2.5 convention */ \ | ||
98 | *(.text.exit) /* 2.4 convention */ \ | ||
99 | *(.text.lock) \ | ||
100 | *(.exitcall.exit) \ | ||
101 | __real_etext = . ; /* There may be data after here. */ \ | ||
102 | RODATA_CONTENTS \ | ||
103 | . = ALIGN (4) ; \ | ||
104 | *(.call_table_data) \ | ||
105 | *(.call_table_text) \ | ||
106 | . = ALIGN (16) ; /* Exception table. */ \ | ||
107 | ___start___ex_table = . ; \ | ||
108 | *(__ex_table) \ | ||
109 | ___stop___ex_table = . ; \ | ||
110 | . = ALIGN (4) ; \ | ||
111 | __etext = . ; | ||
112 | |||
113 | /* Kernel data segment. */ | ||
114 | #define DATA_CONTENTS \ | ||
115 | __sdata = . ; \ | ||
116 | DATA_DATA \ | ||
117 | EXIT_DATA /* 2.5 convention */ \ | ||
118 | *(.data.exit) /* 2.4 convention */ \ | ||
119 | . = ALIGN (16) ; \ | ||
120 | *(.data.cacheline_aligned) \ | ||
121 | . = ALIGN (0x2000) ; \ | ||
122 | *(.data.init_task) \ | ||
123 | . = ALIGN (0x2000) ; \ | ||
124 | __edata = . ; | ||
125 | |||
126 | /* Kernel BSS segment. */ | ||
127 | #define BSS_CONTENTS \ | ||
128 | __sbss = . ; \ | ||
129 | *(.bss) \ | ||
130 | *(COMMON) \ | ||
131 | . = ALIGN (4) ; \ | ||
132 | __init_stack_end = . ; \ | ||
133 | __ebss = . ; | ||
134 | |||
135 | /* `initcall' tables. */ | ||
136 | #define INITCALL_CONTENTS \ | ||
137 | . = ALIGN (16) ; \ | ||
138 | ___setup_start = . ; \ | ||
139 | *(.init.setup) /* 2.5 convention */ \ | ||
140 | *(.setup.init) /* 2.4 convention */ \ | ||
141 | ___setup_end = . ; \ | ||
142 | ___initcall_start = . ; \ | ||
143 | *(.initcall.init) \ | ||
144 | INITCALLS \ | ||
145 | . = ALIGN (4) ; \ | ||
146 | ___initcall_end = . ; \ | ||
147 | ___con_initcall_start = .; \ | ||
148 | *(.con_initcall.init) \ | ||
149 | ___con_initcall_end = .; | ||
150 | |||
151 | /* Contents of `init' section for a kernel that's loaded into RAM. */ | ||
152 | #define RAMK_INIT_CONTENTS \ | ||
153 | RAMK_INIT_CONTENTS_NO_END \ | ||
154 | __init_end = . ; | ||
155 | /* Same as RAMK_INIT_CONTENTS, but doesn't define the `__init_end' symbol. */ | ||
156 | #define RAMK_INIT_CONTENTS_NO_END \ | ||
157 | . = ALIGN (4096) ; \ | ||
158 | __init_start = . ; \ | ||
159 | __sinittext = .; \ | ||
160 | INIT_TEXT /* 2.5 convention */ \ | ||
161 | __einittext = .; \ | ||
162 | INIT_DATA \ | ||
163 | *(.text.init) /* 2.4 convention */ \ | ||
164 | *(.data.init) \ | ||
165 | INITCALL_CONTENTS \ | ||
166 | INITRAMFS_CONTENTS | ||
167 | |||
168 | /* The contents of `init' section for a ROM-resident kernel which | ||
169 | should go into RAM. */ | ||
170 | #define ROMK_INIT_RAM_CONTENTS \ | ||
171 | . = ALIGN (4096) ; \ | ||
172 | __init_start = . ; \ | ||
173 | INIT_DATA /* 2.5 convention */ \ | ||
174 | *(.data.init) /* 2.4 convention */ \ | ||
175 | __init_end = . ; \ | ||
176 | . = ALIGN (4096) ; | ||
177 | |||
178 | /* The contents of `init' section for a ROM-resident kernel which | ||
179 | should go into ROM. */ | ||
180 | #define ROMK_INIT_ROM_CONTENTS \ | ||
181 | _sinittext = .; \ | ||
182 | INIT_TEXT /* 2.5 convention */ \ | ||
183 | _einittext = .; \ | ||
184 | *(.text.init) /* 2.4 convention */ \ | ||
185 | INITCALL_CONTENTS \ | ||
186 | INITRAMFS_CONTENTS | ||
187 | |||
188 | /* A root filesystem image, for kernels with an embedded root filesystem. */ | ||
189 | #define ROOT_FS_CONTENTS \ | ||
190 | __root_fs_image_start = . ; \ | ||
191 | *(.root) \ | ||
192 | __root_fs_image_end = . ; | ||
193 | |||
194 | #ifdef CONFIG_BLK_DEV_INITRD | ||
195 | /* The initramfs archive. */ | ||
196 | #define INITRAMFS_CONTENTS \ | ||
197 | . = ALIGN (4) ; \ | ||
198 | ___initramfs_start = . ; \ | ||
199 | *(.init.ramfs) \ | ||
200 | ___initramfs_end = . ; | ||
201 | #endif | ||
202 | |||
203 | /* Where the initial bootmap (bitmap for the boot-time memory allocator) | ||
204 | should be place. */ | ||
205 | #define BOOTMAP_CONTENTS \ | ||
206 | . = ALIGN (4096) ; \ | ||
207 | __bootmap = . ; \ | ||
208 | . = . + 4096 ; /* enough for 128MB. */ | ||
209 | |||
210 | /* The contents of a `typical' kram area for a kernel in RAM. */ | ||
211 | #define RAMK_KRAM_CONTENTS \ | ||
212 | __kram_start = . ; \ | ||
213 | TEXT_CONTENTS \ | ||
214 | DATA_CONTENTS \ | ||
215 | BSS_CONTENTS \ | ||
216 | RAMK_INIT_CONTENTS \ | ||
217 | __kram_end = . ; \ | ||
218 | BOOTMAP_CONTENTS | ||
219 | |||
220 | |||
221 | /* Define output sections normally used for a ROM-resident kernel. | ||
222 | ROM and RAM should be appropriate memory areas to use for kernel | ||
223 | ROM and RAM data. This assumes that ROM starts at 0 (and thus can | ||
224 | hold the interrupt vectors). */ | ||
225 | #define ROMK_SECTIONS(ROM, RAM) \ | ||
226 | .rom : { \ | ||
227 | INTV_CONTENTS \ | ||
228 | TEXT_CONTENTS \ | ||
229 | ROMK_INIT_ROM_CONTENTS \ | ||
230 | ROOT_FS_CONTENTS \ | ||
231 | } > ROM \ | ||
232 | \ | ||
233 | __rom_copy_src_start = . ; \ | ||
234 | \ | ||
235 | .data : { \ | ||
236 | __kram_start = . ; \ | ||
237 | __rom_copy_dst_start = . ; \ | ||
238 | DATA_CONTENTS \ | ||
239 | ROMK_INIT_RAM_CONTENTS \ | ||
240 | __rom_copy_dst_end = . ; \ | ||
241 | } > RAM AT> ROM \ | ||
242 | \ | ||
243 | .bss ALIGN (4) : { \ | ||
244 | BSS_CONTENTS \ | ||
245 | __kram_end = . ; \ | ||
246 | BOOTMAP_CONTENTS \ | ||
247 | } > RAM | ||
248 | |||
249 | |||
250 | /* The 32-bit variable `jiffies' is just the lower 32-bits of `jiffies_64'. */ | ||
251 | _jiffies = _jiffies_64 ; | ||
252 | |||
253 | |||
254 | /* Include an appropriate platform-dependent linker-script (which | ||
255 | usually should use the above macros to do most of the work). */ | ||
256 | |||
257 | #ifdef CONFIG_V850E_SIM | ||
258 | # include "sim.ld" | ||
259 | #endif | ||
260 | |||
261 | #ifdef CONFIG_V850E2_SIM85E2 | ||
262 | # include "sim85e2.ld" | ||
263 | #endif | ||
264 | |||
265 | #ifdef CONFIG_V850E2_FPGA85E2C | ||
266 | # include "fpga85e2c.ld" | ||
267 | #endif | ||
268 | |||
269 | #ifdef CONFIG_V850E2_ANNA | ||
270 | # ifdef CONFIG_ROM_KERNEL | ||
271 | # include "anna-rom.ld" | ||
272 | # else | ||
273 | # include "anna.ld" | ||
274 | # endif | ||
275 | #endif | ||
276 | |||
277 | #ifdef CONFIG_V850E_AS85EP1 | ||
278 | # ifdef CONFIG_ROM_KERNEL | ||
279 | # include "as85ep1-rom.ld" | ||
280 | # else | ||
281 | # include "as85ep1.ld" | ||
282 | # endif | ||
283 | #endif | ||
284 | |||
285 | #ifdef CONFIG_RTE_CB_MA1 | ||
286 | # ifdef CONFIG_ROM_KERNEL | ||
287 | # include "rte_ma1_cb-rom.ld" | ||
288 | # else | ||
289 | # include "rte_ma1_cb.ld" | ||
290 | # endif | ||
291 | #endif | ||
292 | |||
293 | #ifdef CONFIG_RTE_CB_NB85E | ||
294 | # ifdef CONFIG_ROM_KERNEL | ||
295 | # include "rte_nb85e_cb-rom.ld" | ||
296 | # elif defined(CONFIG_RTE_CB_MULTI) | ||
297 | # include "rte_nb85e_cb-multi.ld" | ||
298 | # else | ||
299 | # include "rte_nb85e_cb.ld" | ||
300 | # endif | ||
301 | #endif | ||
302 | |||
303 | #ifdef CONFIG_RTE_CB_ME2 | ||
304 | # include "rte_me2_cb.ld" | ||
305 | #endif | ||
306 | |||
diff --git a/arch/v850/lib/Makefile b/arch/v850/lib/Makefile deleted file mode 100644 index 1c78b728a117..000000000000 --- a/arch/v850/lib/Makefile +++ /dev/null | |||
@@ -1,6 +0,0 @@ | |||
1 | # | ||
2 | # arch/v850/lib/Makefile | ||
3 | # | ||
4 | |||
5 | lib-y = ashrdi3.o ashldi3.o lshrdi3.o muldi3.o negdi2.o \ | ||
6 | checksum.o memcpy.o memset.o | ||
diff --git a/arch/v850/lib/ashldi3.c b/arch/v850/lib/ashldi3.c deleted file mode 100644 index 9e792d53f0e4..000000000000 --- a/arch/v850/lib/ashldi3.c +++ /dev/null | |||
@@ -1,62 +0,0 @@ | |||
1 | /* ashldi3.c extracted from gcc-2.95.2/libgcc2.c which is: */ | ||
2 | /* Copyright (C) 1989, 92-98, 1999 Free Software Foundation, Inc. | ||
3 | |||
4 | This file is part of GNU CC. | ||
5 | |||
6 | GNU CC is free software; you can redistribute it and/or modify | ||
7 | it under the terms of the GNU General Public License as published by | ||
8 | the Free Software Foundation; either version 2, or (at your option) | ||
9 | any later version. | ||
10 | |||
11 | GNU CC is distributed in the hope that it will be useful, | ||
12 | but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
14 | GNU General Public License for more details. | ||
15 | |||
16 | You should have received a copy of the GNU General Public License | ||
17 | along with GNU CC; see the file COPYING. If not, write to | ||
18 | the Free Software Foundation, 59 Temple Place - Suite 330, | ||
19 | Boston, MA 02111-1307, USA. */ | ||
20 | |||
21 | #define BITS_PER_UNIT 8 | ||
22 | |||
23 | typedef int SItype __attribute__ ((mode (SI))); | ||
24 | typedef unsigned int USItype __attribute__ ((mode (SI))); | ||
25 | typedef int DItype __attribute__ ((mode (DI))); | ||
26 | typedef int word_type __attribute__ ((mode (__word__))); | ||
27 | |||
28 | struct DIstruct {SItype high, low;}; | ||
29 | |||
30 | typedef union | ||
31 | { | ||
32 | struct DIstruct s; | ||
33 | DItype ll; | ||
34 | } DIunion; | ||
35 | |||
36 | DItype | ||
37 | __ashldi3 (DItype u, word_type b) | ||
38 | { | ||
39 | DIunion w; | ||
40 | word_type bm; | ||
41 | DIunion uu; | ||
42 | |||
43 | if (b == 0) | ||
44 | return u; | ||
45 | |||
46 | uu.ll = u; | ||
47 | |||
48 | bm = (sizeof (SItype) * BITS_PER_UNIT) - b; | ||
49 | if (bm <= 0) | ||
50 | { | ||
51 | w.s.low = 0; | ||
52 | w.s.high = (USItype)uu.s.low << -bm; | ||
53 | } | ||
54 | else | ||
55 | { | ||
56 | USItype carries = (USItype)uu.s.low >> bm; | ||
57 | w.s.low = (USItype)uu.s.low << b; | ||
58 | w.s.high = ((USItype)uu.s.high << b) | carries; | ||
59 | } | ||
60 | |||
61 | return w.ll; | ||
62 | } | ||
diff --git a/arch/v850/lib/ashrdi3.c b/arch/v850/lib/ashrdi3.c deleted file mode 100644 index 78efb65e315a..000000000000 --- a/arch/v850/lib/ashrdi3.c +++ /dev/null | |||
@@ -1,63 +0,0 @@ | |||
1 | /* ashrdi3.c extracted from gcc-2.7.2/libgcc2.c which is: */ | ||
2 | /* Copyright (C) 1989, 1992, 1993, 1994, 1995 Free Software Foundation, Inc. | ||
3 | |||
4 | This file is part of GNU CC. | ||
5 | |||
6 | GNU CC is free software; you can redistribute it and/or modify | ||
7 | it under the terms of the GNU General Public License as published by | ||
8 | the Free Software Foundation; either version 2, or (at your option) | ||
9 | any later version. | ||
10 | |||
11 | GNU CC is distributed in the hope that it will be useful, | ||
12 | but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
14 | GNU General Public License for more details. | ||
15 | |||
16 | You should have received a copy of the GNU General Public License | ||
17 | along with GNU CC; see the file COPYING. If not, write to | ||
18 | the Free Software Foundation, 59 Temple Place - Suite 330, | ||
19 | Boston, MA 02111-1307, USA. */ | ||
20 | |||
21 | #define BITS_PER_UNIT 8 | ||
22 | |||
23 | typedef int SItype __attribute__ ((mode (SI))); | ||
24 | typedef unsigned int USItype __attribute__ ((mode (SI))); | ||
25 | typedef int DItype __attribute__ ((mode (DI))); | ||
26 | typedef int word_type __attribute__ ((mode (__word__))); | ||
27 | |||
28 | struct DIstruct {SItype high, low;}; | ||
29 | |||
30 | typedef union | ||
31 | { | ||
32 | struct DIstruct s; | ||
33 | DItype ll; | ||
34 | } DIunion; | ||
35 | |||
36 | DItype | ||
37 | __ashrdi3 (DItype u, word_type b) | ||
38 | { | ||
39 | DIunion w; | ||
40 | word_type bm; | ||
41 | DIunion uu; | ||
42 | |||
43 | if (b == 0) | ||
44 | return u; | ||
45 | |||
46 | uu.ll = u; | ||
47 | |||
48 | bm = (sizeof (SItype) * BITS_PER_UNIT) - b; | ||
49 | if (bm <= 0) | ||
50 | { | ||
51 | /* w.s.high = 1..1 or 0..0 */ | ||
52 | w.s.high = uu.s.high >> (sizeof (SItype) * BITS_PER_UNIT - 1); | ||
53 | w.s.low = uu.s.high >> -bm; | ||
54 | } | ||
55 | else | ||
56 | { | ||
57 | USItype carries = (USItype)uu.s.high << bm; | ||
58 | w.s.high = uu.s.high >> b; | ||
59 | w.s.low = ((USItype)uu.s.low >> b) | carries; | ||
60 | } | ||
61 | |||
62 | return w.ll; | ||
63 | } | ||
diff --git a/arch/v850/lib/checksum.c b/arch/v850/lib/checksum.c deleted file mode 100644 index 042158dfe17a..000000000000 --- a/arch/v850/lib/checksum.c +++ /dev/null | |||
@@ -1,155 +0,0 @@ | |||
1 | /* | ||
2 | * INET An implementation of the TCP/IP protocol suite for the LINUX | ||
3 | * operating system. INET is implemented using the BSD Socket | ||
4 | * interface as the means of communication with the user level. | ||
5 | * | ||
6 | * MIPS specific IP/TCP/UDP checksumming routines | ||
7 | * | ||
8 | * Authors: Ralf Baechle, <ralf@waldorf-gmbh.de> | ||
9 | * Lots of code moved from tcp.c and ip.c; see those files | ||
10 | * for more names. | ||
11 | * | ||
12 | * This program is free software; you can redistribute it and/or | ||
13 | * modify it under the terms of the GNU General Public License | ||
14 | * as published by the Free Software Foundation; either version | ||
15 | * 2 of the License, or (at your option) any later version. | ||
16 | * | ||
17 | * $Id: checksum.c,v 1.1 2002/09/28 14:58:40 gerg Exp $ | ||
18 | */ | ||
19 | #include <net/checksum.h> | ||
20 | #include <linux/module.h> | ||
21 | #include <linux/types.h> | ||
22 | #include <asm/byteorder.h> | ||
23 | #include <asm/string.h> | ||
24 | #include <asm/uaccess.h> | ||
25 | |||
26 | static inline unsigned short from32to16 (unsigned long sum) | ||
27 | { | ||
28 | unsigned int result; | ||
29 | /* | ||
30 | %0 %1 | ||
31 | hsw %1, %0 H L L H | ||
32 | add %1, %0 H L H+L+C H+L | ||
33 | */ | ||
34 | asm ("hsw %1, %0; add %1, %0" : "=&r" (result) : "r" (sum)); | ||
35 | return result >> 16; | ||
36 | } | ||
37 | |||
38 | static inline unsigned int do_csum(const unsigned char * buff, int len) | ||
39 | { | ||
40 | int odd, count; | ||
41 | unsigned int result = 0; | ||
42 | |||
43 | if (len <= 0) | ||
44 | goto out; | ||
45 | odd = 1 & (unsigned long) buff; | ||
46 | if (odd) { | ||
47 | result = be16_to_cpu(*buff); | ||
48 | len--; | ||
49 | buff++; | ||
50 | } | ||
51 | count = len >> 1; /* nr of 16-bit words.. */ | ||
52 | if (count) { | ||
53 | if (2 & (unsigned long) buff) { | ||
54 | result += *(unsigned short *) buff; | ||
55 | count--; | ||
56 | len -= 2; | ||
57 | buff += 2; | ||
58 | } | ||
59 | count >>= 1; /* nr of 32-bit words.. */ | ||
60 | if (count) { | ||
61 | unsigned int carry = 0; | ||
62 | do { | ||
63 | unsigned int w = *(unsigned int *) buff; | ||
64 | count--; | ||
65 | buff += 4; | ||
66 | result += carry; | ||
67 | result += w; | ||
68 | carry = (w > result); | ||
69 | } while (count); | ||
70 | result += carry; | ||
71 | result = (result & 0xffff) + (result >> 16); | ||
72 | } | ||
73 | if (len & 2) { | ||
74 | result += *(unsigned short *) buff; | ||
75 | buff += 2; | ||
76 | } | ||
77 | } | ||
78 | if (len & 1) | ||
79 | result += le16_to_cpu(*buff); | ||
80 | result = from32to16(result); | ||
81 | if (odd) | ||
82 | result = ((result >> 8) & 0xff) | ((result & 0xff) << 8); | ||
83 | out: | ||
84 | return result; | ||
85 | } | ||
86 | |||
87 | /* | ||
88 | * This is a version of ip_compute_csum() optimized for IP headers, | ||
89 | * which always checksum on 4 octet boundaries. | ||
90 | */ | ||
91 | __sum16 ip_fast_csum(const void *iph, unsigned int ihl) | ||
92 | { | ||
93 | return (__force __sum16)~do_csum(iph,ihl*4); | ||
94 | } | ||
95 | |||
96 | /* | ||
97 | * this routine is used for miscellaneous IP-like checksums, mainly | ||
98 | * in icmp.c | ||
99 | */ | ||
100 | __sum16 ip_compute_csum(const void *buff, int len) | ||
101 | { | ||
102 | return (__force __sum16)~do_csum(buff,len); | ||
103 | } | ||
104 | |||
105 | /* | ||
106 | * computes a partial checksum, e.g. for TCP/UDP fragments | ||
107 | */ | ||
108 | __wsum csum_partial(const void *buff, int len, __wsum sum) | ||
109 | { | ||
110 | unsigned int result = do_csum(buff, len); | ||
111 | |||
112 | /* add in old sum, and carry.. */ | ||
113 | result += (__force u32)sum; | ||
114 | if ((__force u32)sum > result) | ||
115 | result += 1; | ||
116 | return (__force __wsum)result; | ||
117 | } | ||
118 | |||
119 | EXPORT_SYMBOL(csum_partial); | ||
120 | |||
121 | /* | ||
122 | * copy while checksumming, otherwise like csum_partial | ||
123 | */ | ||
124 | __wsum csum_partial_copy_nocheck(const void *src, void *dst, | ||
125 | int len, __wsum sum) | ||
126 | { | ||
127 | /* | ||
128 | * It's 2:30 am and I don't feel like doing it real ... | ||
129 | * This is lots slower than the real thing (tm) | ||
130 | */ | ||
131 | sum = csum_partial(src, len, sum); | ||
132 | memcpy(dst, src, len); | ||
133 | |||
134 | return sum; | ||
135 | } | ||
136 | |||
137 | /* | ||
138 | * Copy from userspace and compute checksum. If we catch an exception | ||
139 | * then zero the rest of the buffer. | ||
140 | */ | ||
141 | __wsum csum_partial_copy_from_user (const void *src, | ||
142 | void *dst, | ||
143 | int len, __wsum sum, | ||
144 | int *err_ptr) | ||
145 | { | ||
146 | int missing; | ||
147 | |||
148 | missing = copy_from_user(dst, src, len); | ||
149 | if (missing) { | ||
150 | memset(dst + len - missing, 0, missing); | ||
151 | *err_ptr = -EFAULT; | ||
152 | } | ||
153 | |||
154 | return csum_partial(dst, len, sum); | ||
155 | } | ||
diff --git a/arch/v850/lib/lshrdi3.c b/arch/v850/lib/lshrdi3.c deleted file mode 100644 index 93b1cb6fdee8..000000000000 --- a/arch/v850/lib/lshrdi3.c +++ /dev/null | |||
@@ -1,62 +0,0 @@ | |||
1 | /* lshrdi3.c extracted from gcc-2.7.2/libgcc2.c which is: */ | ||
2 | /* Copyright (C) 1989, 1992, 1993, 1994, 1995 Free Software Foundation, Inc. | ||
3 | |||
4 | This file is part of GNU CC. | ||
5 | |||
6 | GNU CC is free software; you can redistribute it and/or modify | ||
7 | it under the terms of the GNU General Public License as published by | ||
8 | the Free Software Foundation; either version 2, or (at your option) | ||
9 | any later version. | ||
10 | |||
11 | GNU CC is distributed in the hope that it will be useful, | ||
12 | but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
14 | GNU General Public License for more details. | ||
15 | |||
16 | You should have received a copy of the GNU General Public License | ||
17 | along with GNU CC; see the file COPYING. If not, write to | ||
18 | the Free Software Foundation, 59 Temple Place - Suite 330, | ||
19 | Boston, MA 02111-1307, USA. */ | ||
20 | |||
21 | #define BITS_PER_UNIT 8 | ||
22 | |||
23 | typedef int SItype __attribute__ ((mode (SI))); | ||
24 | typedef unsigned int USItype __attribute__ ((mode (SI))); | ||
25 | typedef int DItype __attribute__ ((mode (DI))); | ||
26 | typedef int word_type __attribute__ ((mode (__word__))); | ||
27 | |||
28 | struct DIstruct {SItype high, low;}; | ||
29 | |||
30 | typedef union | ||
31 | { | ||
32 | struct DIstruct s; | ||
33 | DItype ll; | ||
34 | } DIunion; | ||
35 | |||
36 | DItype | ||
37 | __lshrdi3 (DItype u, word_type b) | ||
38 | { | ||
39 | DIunion w; | ||
40 | word_type bm; | ||
41 | DIunion uu; | ||
42 | |||
43 | if (b == 0) | ||
44 | return u; | ||
45 | |||
46 | uu.ll = u; | ||
47 | |||
48 | bm = (sizeof (SItype) * BITS_PER_UNIT) - b; | ||
49 | if (bm <= 0) | ||
50 | { | ||
51 | w.s.high = 0; | ||
52 | w.s.low = (USItype)uu.s.high >> -bm; | ||
53 | } | ||
54 | else | ||
55 | { | ||
56 | USItype carries = (USItype)uu.s.high << bm; | ||
57 | w.s.high = (USItype)uu.s.high >> b; | ||
58 | w.s.low = ((USItype)uu.s.low >> b) | carries; | ||
59 | } | ||
60 | |||
61 | return w.ll; | ||
62 | } | ||
diff --git a/arch/v850/lib/memcpy.c b/arch/v850/lib/memcpy.c deleted file mode 100644 index 492847b3e612..000000000000 --- a/arch/v850/lib/memcpy.c +++ /dev/null | |||
@@ -1,92 +0,0 @@ | |||
1 | /* | ||
2 | * arch/v850/lib/memcpy.c -- Memory copying | ||
3 | * | ||
4 | * Copyright (C) 2001,02 NEC Corporation | ||
5 | * Copyright (C) 2001,02 Miles Bader <miles@gnu.org> | ||
6 | * | ||
7 | * This file is subject to the terms and conditions of the GNU General | ||
8 | * Public License. See the file COPYING in the main directory of this | ||
9 | * archive for more details. | ||
10 | * | ||
11 | * Written by Miles Bader <miles@gnu.org> | ||
12 | */ | ||
13 | |||
14 | #include <linux/types.h> | ||
15 | #include <asm/string.h> | ||
16 | |||
17 | #define CHUNK_SIZE 32 /* bytes */ | ||
18 | #define CHUNK_ALIGNED(addr) (((unsigned long)addr & 0x3) == 0) | ||
19 | |||
20 | /* Note that this macro uses 8 call-clobbered registers (not including | ||
21 | R1), which are few enough so that the following functions don't need | ||
22 | to spill anything to memory. It also uses R1, which is nominally | ||
23 | reserved for the assembler, but here it should be OK. */ | ||
24 | #define COPY_CHUNK(src, dst) \ | ||
25 | asm ("mov %0, ep;" \ | ||
26 | "sld.w 0[ep], r1; sld.w 4[ep], r12;" \ | ||
27 | "sld.w 8[ep], r13; sld.w 12[ep], r14;" \ | ||
28 | "sld.w 16[ep], r15; sld.w 20[ep], r17;" \ | ||
29 | "sld.w 24[ep], r18; sld.w 28[ep], r19;" \ | ||
30 | "mov %1, ep;" \ | ||
31 | "sst.w r1, 0[ep]; sst.w r12, 4[ep];" \ | ||
32 | "sst.w r13, 8[ep]; sst.w r14, 12[ep];" \ | ||
33 | "sst.w r15, 16[ep]; sst.w r17, 20[ep];" \ | ||
34 | "sst.w r18, 24[ep]; sst.w r19, 28[ep]" \ | ||
35 | :: "r" (src), "r" (dst) \ | ||
36 | : "r1", "r12", "r13", "r14", "r15", \ | ||
37 | "r17", "r18", "r19", "ep", "memory"); | ||
38 | |||
39 | void *memcpy (void *dst, const void *src, __kernel_size_t size) | ||
40 | { | ||
41 | char *_dst = dst; | ||
42 | const char *_src = src; | ||
43 | |||
44 | if (size >= CHUNK_SIZE && CHUNK_ALIGNED(_src) && CHUNK_ALIGNED(_dst)) { | ||
45 | /* Copy large blocks efficiently. */ | ||
46 | unsigned count; | ||
47 | for (count = size / CHUNK_SIZE; count; count--) { | ||
48 | COPY_CHUNK (_src, _dst); | ||
49 | _src += CHUNK_SIZE; | ||
50 | _dst += CHUNK_SIZE; | ||
51 | } | ||
52 | size %= CHUNK_SIZE; | ||
53 | } | ||
54 | |||
55 | if (size > 0) | ||
56 | do | ||
57 | *_dst++ = *_src++; | ||
58 | while (--size); | ||
59 | |||
60 | return dst; | ||
61 | } | ||
62 | |||
63 | void *memmove (void *dst, const void *src, __kernel_size_t size) | ||
64 | { | ||
65 | if ((unsigned long)dst < (unsigned long)src | ||
66 | || (unsigned long)src + size < (unsigned long)dst) | ||
67 | return memcpy (dst, src, size); | ||
68 | else { | ||
69 | char *_dst = dst + size; | ||
70 | const char *_src = src + size; | ||
71 | |||
72 | if (size >= CHUNK_SIZE | ||
73 | && CHUNK_ALIGNED (_src) && CHUNK_ALIGNED (_dst)) | ||
74 | { | ||
75 | /* Copy large blocks efficiently. */ | ||
76 | unsigned count; | ||
77 | for (count = size / CHUNK_SIZE; count; count--) { | ||
78 | _src -= CHUNK_SIZE; | ||
79 | _dst -= CHUNK_SIZE; | ||
80 | COPY_CHUNK (_src, _dst); | ||
81 | } | ||
82 | size %= CHUNK_SIZE; | ||
83 | } | ||
84 | |||
85 | if (size > 0) | ||
86 | do | ||
87 | *--_dst = *--_src; | ||
88 | while (--size); | ||
89 | |||
90 | return _dst; | ||
91 | } | ||
92 | } | ||
diff --git a/arch/v850/lib/memset.c b/arch/v850/lib/memset.c deleted file mode 100644 index d1b2ad821b15..000000000000 --- a/arch/v850/lib/memset.c +++ /dev/null | |||
@@ -1,68 +0,0 @@ | |||
1 | /* | ||
2 | * arch/v850/lib/memset.c -- Memory initialization | ||
3 | * | ||
4 | * Copyright (C) 2001,02,04 NEC Corporation | ||
5 | * Copyright (C) 2001,02,04 Miles Bader <miles@gnu.org> | ||
6 | * | ||
7 | * This file is subject to the terms and conditions of the GNU General | ||
8 | * Public License. See the file COPYING in the main directory of this | ||
9 | * archive for more details. | ||
10 | * | ||
11 | * Written by Miles Bader <miles@gnu.org> | ||
12 | */ | ||
13 | |||
14 | #include <linux/types.h> | ||
15 | |||
16 | void *memset (void *dst, int val, __kernel_size_t count) | ||
17 | { | ||
18 | if (count) { | ||
19 | register unsigned loop; | ||
20 | register void *ptr asm ("ep") = dst; | ||
21 | |||
22 | /* replicate VAL into a long. */ | ||
23 | val &= 0xff; | ||
24 | val |= val << 8; | ||
25 | val |= val << 16; | ||
26 | |||
27 | /* copy initial unaligned bytes. */ | ||
28 | if ((long)ptr & 1) { | ||
29 | *(char *)ptr = val; | ||
30 | ptr = (void *)((char *)ptr + 1); | ||
31 | count--; | ||
32 | } | ||
33 | if (count > 2 && ((long)ptr & 2)) { | ||
34 | *(short *)ptr = val; | ||
35 | ptr = (void *)((short *)ptr + 1); | ||
36 | count -= 2; | ||
37 | } | ||
38 | |||
39 | /* 32-byte copying loop. */ | ||
40 | for (loop = count / 32; loop; loop--) { | ||
41 | asm ("sst.w %0, 0[ep]; sst.w %0, 4[ep];" | ||
42 | "sst.w %0, 8[ep]; sst.w %0, 12[ep];" | ||
43 | "sst.w %0, 16[ep]; sst.w %0, 20[ep];" | ||
44 | "sst.w %0, 24[ep]; sst.w %0, 28[ep]" | ||
45 | :: "r" (val) : "memory"); | ||
46 | ptr += 32; | ||
47 | } | ||
48 | count %= 32; | ||
49 | |||
50 | /* long copying loop. */ | ||
51 | for (loop = count / 4; loop; loop--) { | ||
52 | *(long *)ptr = val; | ||
53 | ptr = (void *)((long *)ptr + 1); | ||
54 | } | ||
55 | count %= 4; | ||
56 | |||
57 | /* finish up with any trailing bytes. */ | ||
58 | if (count & 2) { | ||
59 | *(short *)ptr = val; | ||
60 | ptr = (void *)((short *)ptr + 1); | ||
61 | } | ||
62 | if (count & 1) { | ||
63 | *(char *)ptr = val; | ||
64 | } | ||
65 | } | ||
66 | |||
67 | return dst; | ||
68 | } | ||
diff --git a/arch/v850/lib/muldi3.c b/arch/v850/lib/muldi3.c deleted file mode 100644 index 277ca25c82c8..000000000000 --- a/arch/v850/lib/muldi3.c +++ /dev/null | |||
@@ -1,61 +0,0 @@ | |||
1 | /* muldi3.c extracted from gcc-2.7.2.3/libgcc2.c and | ||
2 | gcc-2.7.2.3/longlong.h which is: */ | ||
3 | /* Copyright (C) 1989, 1992, 1993, 1994, 1995, 2001 Free Software Foundation, Inc. | ||
4 | |||
5 | This file is part of GNU CC. | ||
6 | |||
7 | GNU CC is free software; you can redistribute it and/or modify | ||
8 | it under the terms of the GNU General Public License as published by | ||
9 | the Free Software Foundation; either version 2, or (at your option) | ||
10 | any later version. | ||
11 | |||
12 | GNU CC is distributed in the hope that it will be useful, | ||
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
15 | GNU General Public License for more details. | ||
16 | |||
17 | You should have received a copy of the GNU General Public License | ||
18 | along with GNU CC; see the file COPYING. If not, write to | ||
19 | the Free Software Foundation, 59 Temple Place - Suite 330, | ||
20 | Boston, MA 02111-1307, USA. */ | ||
21 | |||
22 | #define umul_ppmm(w1, w0, u, v) \ | ||
23 | __asm__ ("mulu %3, %0, %1" \ | ||
24 | : "=r" ((USItype)(w0)), \ | ||
25 | "=r" ((USItype)(w1)) \ | ||
26 | : "%0" ((USItype)(u)), \ | ||
27 | "r" ((USItype)(v))) | ||
28 | |||
29 | #define __umulsidi3(u, v) \ | ||
30 | ({DIunion __w; \ | ||
31 | umul_ppmm (__w.s.high, __w.s.low, u, v); \ | ||
32 | __w.ll; }) | ||
33 | |||
34 | typedef int SItype __attribute__ ((mode (SI))); | ||
35 | typedef unsigned int USItype __attribute__ ((mode (SI))); | ||
36 | typedef int DItype __attribute__ ((mode (DI))); | ||
37 | typedef int word_type __attribute__ ((mode (__word__))); | ||
38 | |||
39 | struct DIstruct {SItype high, low;}; | ||
40 | |||
41 | typedef union | ||
42 | { | ||
43 | struct DIstruct s; | ||
44 | DItype ll; | ||
45 | } DIunion; | ||
46 | |||
47 | DItype | ||
48 | __muldi3 (DItype u, DItype v) | ||
49 | { | ||
50 | DIunion w; | ||
51 | DIunion uu, vv; | ||
52 | |||
53 | uu.ll = u, | ||
54 | vv.ll = v; | ||
55 | |||
56 | w.ll = __umulsidi3 (uu.s.low, vv.s.low); | ||
57 | w.s.high += ((USItype) uu.s.low * (USItype) vv.s.high | ||
58 | + (USItype) uu.s.high * (USItype) vv.s.low); | ||
59 | |||
60 | return w.ll; | ||
61 | } | ||
diff --git a/arch/v850/lib/negdi2.c b/arch/v850/lib/negdi2.c deleted file mode 100644 index 571e04fc619a..000000000000 --- a/arch/v850/lib/negdi2.c +++ /dev/null | |||
@@ -1,25 +0,0 @@ | |||
1 | /* | ||
2 | * arch/v850/lib/negdi2.c -- 64-bit negation | ||
3 | * | ||
4 | * Copyright (C) 2001 NEC Corporation | ||
5 | * Copyright (C) 2001 Miles Bader <miles@gnu.org> | ||
6 | * | ||
7 | * This file is subject to the terms and conditions of the GNU General | ||
8 | * Public License. See the file COPYING in the main directory of this | ||
9 | * archive for more details. | ||
10 | * | ||
11 | * Written by Miles Bader <miles@gnu.org> | ||
12 | */ | ||
13 | |||
14 | typedef int DItype __attribute__ ((mode (DI))); | ||
15 | |||
16 | DItype __negdi2 (DItype x) | ||
17 | { | ||
18 | __asm__ __volatile__ | ||
19 | ("not r6, r10;" | ||
20 | "add 1, r10;" | ||
21 | "setf c, r6;" | ||
22 | "not r7, r11;" | ||
23 | "add r6, r11" | ||
24 | ::: "r6", "r7", "r10", "r11"); | ||
25 | } | ||
diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig index 8fc7451c0049..3b4a14e355c1 100644 --- a/drivers/serial/Kconfig +++ b/drivers/serial/Kconfig | |||
@@ -942,22 +942,6 @@ config SERIAL_IP22_ZILOG_CONSOLE | |||
942 | depends on SERIAL_IP22_ZILOG=y | 942 | depends on SERIAL_IP22_ZILOG=y |
943 | select SERIAL_CORE_CONSOLE | 943 | select SERIAL_CORE_CONSOLE |
944 | 944 | ||
945 | config V850E_UART | ||
946 | bool "NEC V850E on-chip UART support" | ||
947 | depends on V850E_MA1 || V850E_ME2 || V850E_TEG || V850E2_ANNA || V850E_AS85EP1 | ||
948 | select SERIAL_CORE | ||
949 | default y | ||
950 | |||
951 | config V850E_UARTB | ||
952 | bool | ||
953 | depends on V850E_UART && V850E_ME2 | ||
954 | default y | ||
955 | |||
956 | config V850E_UART_CONSOLE | ||
957 | bool "Use NEC V850E on-chip UART for console" | ||
958 | depends on V850E_UART | ||
959 | select SERIAL_CORE_CONSOLE | ||
960 | |||
961 | config SERIAL_SH_SCI | 945 | config SERIAL_SH_SCI |
962 | tristate "SuperH SCI(F) serial port support" | 946 | tristate "SuperH SCI(F) serial port support" |
963 | depends on SUPERH || H8300 | 947 | depends on SUPERH || H8300 |
diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig index ccb78f66c2b6..48399e134c0d 100644 --- a/drivers/watchdog/Kconfig +++ b/drivers/watchdog/Kconfig | |||
@@ -788,8 +788,6 @@ config WATCHDOG_RIO | |||
788 | machines. The watchdog timeout period is normally one minute but | 788 | machines. The watchdog timeout period is normally one minute but |
789 | can be changed with a boot-time parameter. | 789 | can be changed with a boot-time parameter. |
790 | 790 | ||
791 | # V850 Architecture | ||
792 | |||
793 | # XTENSA Architecture | 791 | # XTENSA Architecture |
794 | 792 | ||
795 | # | 793 | # |
diff --git a/drivers/watchdog/Makefile b/drivers/watchdog/Makefile index 25b352b664d9..edd305a64e63 100644 --- a/drivers/watchdog/Makefile +++ b/drivers/watchdog/Makefile | |||
@@ -119,8 +119,6 @@ obj-$(CONFIG_SH_WDT) += shwdt.o | |||
119 | 119 | ||
120 | # SPARC64 Architecture | 120 | # SPARC64 Architecture |
121 | 121 | ||
122 | # V850 Architecture | ||
123 | |||
124 | # XTENSA Architecture | 122 | # XTENSA Architecture |
125 | 123 | ||
126 | # Architecture Independant | 124 | # Architecture Independant |
diff --git a/include/asm-v850/Kbuild b/include/asm-v850/Kbuild deleted file mode 100644 index c68e1680da01..000000000000 --- a/include/asm-v850/Kbuild +++ /dev/null | |||
@@ -1 +0,0 @@ | |||
1 | include include/asm-generic/Kbuild.asm | ||
diff --git a/include/asm-v850/a.out.h b/include/asm-v850/a.out.h deleted file mode 100644 index e9439a0708f6..000000000000 --- a/include/asm-v850/a.out.h +++ /dev/null | |||
@@ -1,21 +0,0 @@ | |||
1 | #ifndef __V850_A_OUT_H__ | ||
2 | #define __V850_A_OUT_H__ | ||
3 | |||
4 | struct exec | ||
5 | { | ||
6 | unsigned long a_info; /* Use macros N_MAGIC, etc for access */ | ||
7 | unsigned a_text; /* length of text, in bytes */ | ||
8 | unsigned a_data; /* length of data, in bytes */ | ||
9 | unsigned a_bss; /* length of uninitialized data area for file, in bytes */ | ||
10 | unsigned a_syms; /* length of symbol table data in file, in bytes */ | ||
11 | unsigned a_entry; /* start address */ | ||
12 | unsigned a_trsize; /* length of relocation info for text, in bytes */ | ||
13 | unsigned a_drsize; /* length of relocation info for data, in bytes */ | ||
14 | }; | ||
15 | |||
16 | #define N_TRSIZE(a) ((a).a_trsize) | ||
17 | #define N_DRSIZE(a) ((a).a_drsize) | ||
18 | #define N_SYMSIZE(a) ((a).a_syms) | ||
19 | |||
20 | |||
21 | #endif /* __V850_A_OUT_H__ */ | ||
diff --git a/include/asm-v850/anna.h b/include/asm-v850/anna.h deleted file mode 100644 index cd5eaee103b0..000000000000 --- a/include/asm-v850/anna.h +++ /dev/null | |||
@@ -1,137 +0,0 @@ | |||
1 | /* | ||
2 | * include/asm-v850/anna.h -- Anna V850E2 evaluation cpu chip/board | ||
3 | * | ||
4 | * Copyright (C) 2001,02,03 NEC Electronics Corporation | ||
5 | * Copyright (C) 2001,02,03 Miles Bader <miles@gnu.org> | ||
6 | * | ||
7 | * This file is subject to the terms and conditions of the GNU General | ||
8 | * Public License. See the file COPYING in the main directory of this | ||
9 | * archive for more details. | ||
10 | * | ||
11 | * Written by Miles Bader <miles@gnu.org> | ||
12 | */ | ||
13 | |||
14 | #ifndef __V850_ANNA_H__ | ||
15 | #define __V850_ANNA_H__ | ||
16 | |||
17 | #include <asm/v850e2.h> /* Based on V850E2 core. */ | ||
18 | |||
19 | |||
20 | #define CPU_MODEL "v850e2/anna" | ||
21 | #define CPU_MODEL_LONG "NEC V850E2/Anna" | ||
22 | #define PLATFORM "anna" | ||
23 | #define PLATFORM_LONG "NEC/Midas lab V850E2/Anna evaluation board" | ||
24 | |||
25 | #define CPU_CLOCK_FREQ 200000000 /* 200MHz */ | ||
26 | #define SYS_CLOCK_FREQ 33300000 /* 33.3MHz */ | ||
27 | |||
28 | |||
29 | /* 1MB of static RAM. This memory is mirrored 64 times. */ | ||
30 | #define SRAM_ADDR 0x04000000 | ||
31 | #define SRAM_SIZE 0x00100000 /* 1MB */ | ||
32 | /* 64MB of DRAM. */ | ||
33 | #define SDRAM_ADDR 0x08000000 | ||
34 | #define SDRAM_SIZE 0x04000000 /* 64MB */ | ||
35 | |||
36 | |||
37 | /* For <asm/page.h> */ | ||
38 | #define PAGE_OFFSET SRAM_ADDR | ||
39 | |||
40 | /* We use on-chip RAM, for a few miscellaneous variables that must be | ||
41 | accessible using a load instruction relative to R0. The Anna chip has | ||
42 | 128K of `dLB' ram nominally located at 0xFFF00000, but it's mirrored | ||
43 | every 128K, so we can use the `last mirror' (except for the portion at | ||
44 | the top which is overridden by I/O space). In addition, the early | ||
45 | sample chip we're using has lots of memory errors in the dLB ram, so we | ||
46 | use a specially chosen location that has at least 20 bytes of contiguous | ||
47 | valid memory (xxxF0020 - xxxF003F). */ | ||
48 | #define R0_RAM_ADDR 0xFFFF8020 | ||
49 | |||
50 | |||
51 | /* Anna specific control registers. */ | ||
52 | #define ANNA_ILBEN_ADDR 0xFFFFF7F2 | ||
53 | #define ANNA_ILBEN (*(volatile u16 *)ANNA_ILBEN_ADDR) | ||
54 | |||
55 | |||
56 | /* I/O port P0-P3. */ | ||
57 | /* Direct I/O. Bits 0-7 are pins Pn0-Pn7. */ | ||
58 | #define ANNA_PORT_IO_ADDR(n) (0xFFFFF400 + (n) * 2) | ||
59 | #define ANNA_PORT_IO(n) (*(volatile u8 *)ANNA_PORT_IO_ADDR(n)) | ||
60 | /* Port mode (for direct I/O, 0 = output, 1 = input). */ | ||
61 | #define ANNA_PORT_PM_ADDR(n) (0xFFFFF410 + (n) * 2) | ||
62 | #define ANNA_PORT_PM(n) (*(volatile u8 *)ANNA_PORT_PM_ADDR(n)) | ||
63 | |||
64 | |||
65 | /* Hardware-specific interrupt numbers (in the kernel IRQ namespace). */ | ||
66 | #define IRQ_INTP(n) (n) /* Pnnn (pin) interrupts 0-15 */ | ||
67 | #define IRQ_INTP_NUM 16 | ||
68 | #define IRQ_INTOV(n) (0x10 + (n)) /* 0-2 */ | ||
69 | #define IRQ_INTOV_NUM 2 | ||
70 | #define IRQ_INTCCC(n) (0x12 + (n)) | ||
71 | #define IRQ_INTCCC_NUM 4 | ||
72 | #define IRQ_INTCMD(n) (0x16 + (n)) /* interval timer interrupts 0-5 */ | ||
73 | #define IRQ_INTCMD_NUM 6 | ||
74 | #define IRQ_INTDMA(n) (0x1C + (n)) /* DMA interrupts 0-3 */ | ||
75 | #define IRQ_INTDMA_NUM 4 | ||
76 | #define IRQ_INTDMXER 0x20 | ||
77 | #define IRQ_INTSRE(n) (0x21 + (n)*3) /* UART 0-1 reception error */ | ||
78 | #define IRQ_INTSRE_NUM 2 | ||
79 | #define IRQ_INTSR(n) (0x22 + (n)*3) /* UART 0-1 reception completion */ | ||
80 | #define IRQ_INTSR_NUM 2 | ||
81 | #define IRQ_INTST(n) (0x23 + (n)*3) /* UART 0-1 transmission completion */ | ||
82 | #define IRQ_INTST_NUM 2 | ||
83 | |||
84 | #define NUM_CPU_IRQS 64 | ||
85 | |||
86 | #ifndef __ASSEMBLY__ | ||
87 | /* Initialize chip interrupts. */ | ||
88 | extern void anna_init_irqs (void); | ||
89 | #endif | ||
90 | |||
91 | |||
92 | /* Anna UART details (basically the same as the V850E/MA1, but 2 channels). */ | ||
93 | #define V850E_UART_NUM_CHANNELS 2 | ||
94 | #define V850E_UART_BASE_FREQ (SYS_CLOCK_FREQ / 2) | ||
95 | #define V850E_UART_CHIP_NAME "V850E2/NA85E2A" | ||
96 | |||
97 | /* This is the UART channel that's actually connected on the board. */ | ||
98 | #define V850E_UART_CONSOLE_CHANNEL 1 | ||
99 | |||
100 | /* This is a function that gets called before configuring the UART. */ | ||
101 | #define V850E_UART_PRE_CONFIGURE anna_uart_pre_configure | ||
102 | #ifndef __ASSEMBLY__ | ||
103 | extern void anna_uart_pre_configure (unsigned chan, | ||
104 | unsigned cflags, unsigned baud); | ||
105 | #endif | ||
106 | |||
107 | /* This board supports RTS/CTS for the on-chip UART, but only for channel 1. */ | ||
108 | |||
109 | /* CTS for UART channel 1 is pin P37 (bit 7 of port 3). */ | ||
110 | #define V850E_UART_CTS(chan) ((chan) == 1 ? !(ANNA_PORT_IO(3) & 0x80) : 1) | ||
111 | /* RTS for UART channel 1 is pin P07 (bit 7 of port 0). */ | ||
112 | #define V850E_UART_SET_RTS(chan, val) \ | ||
113 | do { \ | ||
114 | if (chan == 1) { \ | ||
115 | unsigned old = ANNA_PORT_IO(0); \ | ||
116 | if (val) \ | ||
117 | ANNA_PORT_IO(0) = old & ~0x80; \ | ||
118 | else \ | ||
119 | ANNA_PORT_IO(0) = old | 0x80; \ | ||
120 | } \ | ||
121 | } while (0) | ||
122 | |||
123 | |||
124 | /* Timer C details. */ | ||
125 | #define V850E_TIMER_C_BASE_ADDR 0xFFFFF600 | ||
126 | |||
127 | /* Timer D details (the Anna actually has 5 of these; should change later). */ | ||
128 | #define V850E_TIMER_D_BASE_ADDR 0xFFFFF540 | ||
129 | #define V850E_TIMER_D_TMD_BASE_ADDR (V850E_TIMER_D_BASE_ADDR + 0x0) | ||
130 | #define V850E_TIMER_D_CMD_BASE_ADDR (V850E_TIMER_D_BASE_ADDR + 0x2) | ||
131 | #define V850E_TIMER_D_TMCD_BASE_ADDR (V850E_TIMER_D_BASE_ADDR + 0x4) | ||
132 | |||
133 | #define V850E_TIMER_D_BASE_FREQ SYS_CLOCK_FREQ | ||
134 | #define V850E_TIMER_D_TMCD_CS_MIN 1 /* min 2^1 divider */ | ||
135 | |||
136 | |||
137 | #endif /* __V850_ANNA_H__ */ | ||
diff --git a/include/asm-v850/as85ep1.h b/include/asm-v850/as85ep1.h deleted file mode 100644 index 5a5ca9073d09..000000000000 --- a/include/asm-v850/as85ep1.h +++ /dev/null | |||
@@ -1,152 +0,0 @@ | |||
1 | /* | ||
2 | * include/asm-v850/as85ep1.h -- AS85EP1 evaluation CPU chip/board | ||
3 | * | ||
4 | * Copyright (C) 2001,02,03 NEC Electronics Corporation | ||
5 | * Copyright (C) 2001,02,03 Miles Bader <miles@gnu.org> | ||
6 | * | ||
7 | * This file is subject to the terms and conditions of the GNU General | ||
8 | * Public License. See the file COPYING in the main directory of this | ||
9 | * archive for more details. | ||
10 | * | ||
11 | * Written by Miles Bader <miles@gnu.org> | ||
12 | */ | ||
13 | |||
14 | #ifndef __V850_AS85EP1_H__ | ||
15 | #define __V850_AS85EP1_H__ | ||
16 | |||
17 | #include <asm/v850e.h> | ||
18 | |||
19 | |||
20 | #define CPU_MODEL "as85ep1" | ||
21 | #define CPU_MODEL_LONG "NEC V850E/AS85EP1" | ||
22 | #define PLATFORM "AS85EP1" | ||
23 | #define PLATFORM_LONG "NEC V850E/AS85EP1 evaluation board" | ||
24 | |||
25 | #define CPU_CLOCK_FREQ 96000000 /* 96MHz */ | ||
26 | #define SYS_CLOCK_FREQ CPU_CLOCK_FREQ | ||
27 | |||
28 | |||
29 | /* 1MB of static RAM. */ | ||
30 | #define SRAM_ADDR 0x00400000 | ||
31 | #define SRAM_SIZE 0x00100000 /* 1MB */ | ||
32 | /* About 58MB of DRAM. This can actually be at one of two positions, | ||
33 | determined by jump JP3; we have to use the first position because the | ||
34 | second is partially out of processor instruction addressing range | ||
35 | (though in the second position there's actually 64MB available). */ | ||
36 | #define SDRAM_ADDR 0x00600000 | ||
37 | #define SDRAM_SIZE 0x039F8000 /* approx 58MB */ | ||
38 | |||
39 | /* For <asm/page.h> */ | ||
40 | #define PAGE_OFFSET SRAM_ADDR | ||
41 | |||
42 | /* We use on-chip RAM, for a few miscellaneous variables that must be | ||
43 | accessible using a load instruction relative to R0. The AS85EP1 chip | ||
44 | 16K of internal RAM located slightly before I/O space. */ | ||
45 | #define R0_RAM_ADDR 0xFFFF8000 | ||
46 | |||
47 | |||
48 | /* AS85EP1 specific control registers. */ | ||
49 | #define AS85EP1_CSC_ADDR(n) (0xFFFFF060 + (n) * 2) | ||
50 | #define AS85EP1_CSC(n) (*(volatile u16 *)AS85EP1_CSC_ADDR(n)) | ||
51 | #define AS85EP1_BSC_ADDR 0xFFFFF066 | ||
52 | #define AS85EP1_BSC (*(volatile u16 *)AS85EP1_BSC_ADDR) | ||
53 | #define AS85EP1_BCT_ADDR(n) (0xFFFFF480 + (n) * 2) | ||
54 | #define AS85EP1_BCT(n) (*(volatile u16 *)AS85EP1_BCT_ADDR(n)) | ||
55 | #define AS85EP1_DWC_ADDR(n) (0xFFFFF484 + (n) * 2) | ||
56 | #define AS85EP1_DWC(n) (*(volatile u16 *)AS85EP1_DWC_ADDR(n)) | ||
57 | #define AS85EP1_BCC_ADDR 0xFFFFF488 | ||
58 | #define AS85EP1_BCC (*(volatile u16 *)AS85EP1_BCC_ADDR) | ||
59 | #define AS85EP1_ASC_ADDR 0xFFFFF48A | ||
60 | #define AS85EP1_ASC (*(volatile u16 *)AS85EP1_ASC_ADDR) | ||
61 | #define AS85EP1_BCP_ADDR 0xFFFFF48C | ||
62 | #define AS85EP1_BCP (*(volatile u16 *)AS85EP1_BCP_ADDR) | ||
63 | #define AS85EP1_LBS_ADDR 0xFFFFF48E | ||
64 | #define AS85EP1_LBS (*(volatile u16 *)AS85EP1_LBS_ADDR) | ||
65 | #define AS85EP1_BMC_ADDR 0xFFFFF498 | ||
66 | #define AS85EP1_BMC (*(volatile u16 *)AS85EP1_BMC_ADDR) | ||
67 | #define AS85EP1_PRC_ADDR 0xFFFFF49A | ||
68 | #define AS85EP1_PRC (*(volatile u16 *)AS85EP1_PRC_ADDR) | ||
69 | #define AS85EP1_SCR_ADDR(n) (0xFFFFF4A0 + (n) * 4) | ||
70 | #define AS85EP1_SCR(n) (*(volatile u16 *)AS85EP1_SCR_ADDR(n)) | ||
71 | #define AS85EP1_RFS_ADDR(n) (0xFFFFF4A2 + (n) * 4) | ||
72 | #define AS85EP1_RFS(n) (*(volatile u16 *)AS85EP1_RFS_ADDR(n)) | ||
73 | #define AS85EP1_IRAMM_ADDR 0xFFFFF80A | ||
74 | #define AS85EP1_IRAMM (*(volatile u8 *)AS85EP1_IRAMM_ADDR) | ||
75 | |||
76 | |||
77 | |||
78 | /* I/O port P0-P13. */ | ||
79 | /* Direct I/O. Bits 0-7 are pins Pn0-Pn7. */ | ||
80 | #define AS85EP1_PORT_IO_ADDR(n) (0xFFFFF400 + (n) * 2) | ||
81 | #define AS85EP1_PORT_IO(n) (*(volatile u8 *)AS85EP1_PORT_IO_ADDR(n)) | ||
82 | /* Port mode (for direct I/O, 0 = output, 1 = input). */ | ||
83 | #define AS85EP1_PORT_PM_ADDR(n) (0xFFFFF420 + (n) * 2) | ||
84 | #define AS85EP1_PORT_PM(n) (*(volatile u8 *)AS85EP1_PORT_PM_ADDR(n)) | ||
85 | /* Port mode control (0 = direct I/O mode, 1 = alternative I/O mode). */ | ||
86 | #define AS85EP1_PORT_PMC_ADDR(n) (0xFFFFF440 + (n) * 2) | ||
87 | #define AS85EP1_PORT_PMC(n) (*(volatile u8 *)AS85EP1_PORT_PMC_ADDR(n)) | ||
88 | |||
89 | |||
90 | /* Hardware-specific interrupt numbers (in the kernel IRQ namespace). */ | ||
91 | #define IRQ_INTCCC(n) (0x0C + (n)) | ||
92 | #define IRQ_INTCCC_NUM 8 | ||
93 | #define IRQ_INTCMD(n) (0x14 + (n)) /* interval timer interrupts 0-5 */ | ||
94 | #define IRQ_INTCMD_NUM 6 | ||
95 | #define IRQ_INTSRE(n) (0x1E + (n)*3) /* UART 0-1 reception error */ | ||
96 | #define IRQ_INTSRE_NUM 2 | ||
97 | #define IRQ_INTSR(n) (0x1F + (n)*3) /* UART 0-1 reception completion */ | ||
98 | #define IRQ_INTSR_NUM 2 | ||
99 | #define IRQ_INTST(n) (0x20 + (n)*3) /* UART 0-1 transmission completion */ | ||
100 | #define IRQ_INTST_NUM 2 | ||
101 | |||
102 | #define NUM_CPU_IRQS 64 | ||
103 | |||
104 | #ifndef __ASSEMBLY__ | ||
105 | /* Initialize chip interrupts. */ | ||
106 | extern void as85ep1_init_irqs (void); | ||
107 | #endif | ||
108 | |||
109 | |||
110 | /* AS85EP1 UART details (basically the same as the V850E/MA1, but 2 channels). */ | ||
111 | #define V850E_UART_NUM_CHANNELS 2 | ||
112 | #define V850E_UART_BASE_FREQ (SYS_CLOCK_FREQ / 4) | ||
113 | #define V850E_UART_CHIP_NAME "V850E/NA85E" | ||
114 | |||
115 | /* This is a function that gets called before configuring the UART. */ | ||
116 | #define V850E_UART_PRE_CONFIGURE as85ep1_uart_pre_configure | ||
117 | #ifndef __ASSEMBLY__ | ||
118 | extern void as85ep1_uart_pre_configure (unsigned chan, | ||
119 | unsigned cflags, unsigned baud); | ||
120 | #endif | ||
121 | |||
122 | /* This board supports RTS/CTS for the on-chip UART, but only for channel 1. */ | ||
123 | |||
124 | /* CTS for UART channel 1 is pin P54 (bit 4 of port 5). */ | ||
125 | #define V850E_UART_CTS(chan) ((chan) == 1 ? !(AS85EP1_PORT_IO(5) & 0x10) : 1) | ||
126 | /* RTS for UART channel 1 is pin P53 (bit 3 of port 5). */ | ||
127 | #define V850E_UART_SET_RTS(chan, val) \ | ||
128 | do { \ | ||
129 | if (chan == 1) { \ | ||
130 | unsigned old = AS85EP1_PORT_IO(5); \ | ||
131 | if (val) \ | ||
132 | AS85EP1_PORT_IO(5) = old & ~0x8; \ | ||
133 | else \ | ||
134 | AS85EP1_PORT_IO(5) = old | 0x8; \ | ||
135 | } \ | ||
136 | } while (0) | ||
137 | |||
138 | |||
139 | /* Timer C details. */ | ||
140 | #define V850E_TIMER_C_BASE_ADDR 0xFFFFF600 | ||
141 | |||
142 | /* Timer D details (the AS85EP1 actually has 5 of these; should change later). */ | ||
143 | #define V850E_TIMER_D_BASE_ADDR 0xFFFFF540 | ||
144 | #define V850E_TIMER_D_TMD_BASE_ADDR (V850E_TIMER_D_BASE_ADDR + 0x0) | ||
145 | #define V850E_TIMER_D_CMD_BASE_ADDR (V850E_TIMER_D_BASE_ADDR + 0x2) | ||
146 | #define V850E_TIMER_D_TMCD_BASE_ADDR (V850E_TIMER_D_BASE_ADDR + 0x4) | ||
147 | |||
148 | #define V850E_TIMER_D_BASE_FREQ SYS_CLOCK_FREQ | ||
149 | #define V850E_TIMER_D_TMCD_CS_MIN 2 /* min 2^2 divider */ | ||
150 | |||
151 | |||
152 | #endif /* __V850_AS85EP1_H__ */ | ||
diff --git a/include/asm-v850/asm.h b/include/asm-v850/asm.h deleted file mode 100644 index bf1e785a5dde..000000000000 --- a/include/asm-v850/asm.h +++ /dev/null | |||
@@ -1,32 +0,0 @@ | |||
1 | /* | ||
2 | * include/asm-v850/asm.h -- Macros for writing assembly code | ||
3 | * | ||
4 | * Copyright (C) 2001,02,03 NEC Electronics Corporation | ||
5 | * Copyright (C) 2001,02,03 Miles Bader <miles@gnu.org> | ||
6 | * | ||
7 | * This file is subject to the terms and conditions of the GNU General | ||
8 | * Public License. See the file COPYING in the main directory of this | ||
9 | * archive for more details. | ||
10 | * | ||
11 | * Written by Miles Bader <miles@gnu.org> | ||
12 | */ | ||
13 | |||
14 | #define G_ENTRY(name) \ | ||
15 | .balign 4; \ | ||
16 | .globl name; \ | ||
17 | .type name,@function; \ | ||
18 | name | ||
19 | #define G_DATA(name) \ | ||
20 | .globl name; \ | ||
21 | .type name,@object; \ | ||
22 | name | ||
23 | #define END(name) \ | ||
24 | .size name,.-name | ||
25 | |||
26 | #define L_ENTRY(name) \ | ||
27 | .balign 4; \ | ||
28 | .type name,@function; \ | ||
29 | name | ||
30 | #define L_DATA(name) \ | ||
31 | .type name,@object; \ | ||
32 | name | ||
diff --git a/include/asm-v850/atomic.h b/include/asm-v850/atomic.h deleted file mode 100644 index e4e57de08f73..000000000000 --- a/include/asm-v850/atomic.h +++ /dev/null | |||
@@ -1,131 +0,0 @@ | |||
1 | /* | ||
2 | * include/asm-v850/atomic.h -- Atomic operations | ||
3 | * | ||
4 | * Copyright (C) 2001,02 NEC Corporation | ||
5 | * Copyright (C) 2001,02 Miles Bader <miles@gnu.org> | ||
6 | * | ||
7 | * This file is subject to the terms and conditions of the GNU General | ||
8 | * Public License. See the file COPYING in the main directory of this | ||
9 | * archive for more details. | ||
10 | * | ||
11 | * Written by Miles Bader <miles@gnu.org> | ||
12 | */ | ||
13 | |||
14 | #ifndef __V850_ATOMIC_H__ | ||
15 | #define __V850_ATOMIC_H__ | ||
16 | |||
17 | |||
18 | #include <asm/system.h> | ||
19 | |||
20 | #ifdef CONFIG_SMP | ||
21 | #error SMP not supported | ||
22 | #endif | ||
23 | |||
24 | typedef struct { int counter; } atomic_t; | ||
25 | |||
26 | #define ATOMIC_INIT(i) { (i) } | ||
27 | |||
28 | #ifdef __KERNEL__ | ||
29 | |||
30 | #define atomic_read(v) ((v)->counter) | ||
31 | #define atomic_set(v,i) (((v)->counter) = (i)) | ||
32 | |||
33 | static inline int atomic_add_return (int i, volatile atomic_t *v) | ||
34 | { | ||
35 | unsigned long flags; | ||
36 | int res; | ||
37 | |||
38 | local_irq_save (flags); | ||
39 | res = v->counter + i; | ||
40 | v->counter = res; | ||
41 | local_irq_restore (flags); | ||
42 | |||
43 | return res; | ||
44 | } | ||
45 | |||
46 | static __inline__ int atomic_sub_return (int i, volatile atomic_t *v) | ||
47 | { | ||
48 | unsigned long flags; | ||
49 | int res; | ||
50 | |||
51 | local_irq_save (flags); | ||
52 | res = v->counter - i; | ||
53 | v->counter = res; | ||
54 | local_irq_restore (flags); | ||
55 | |||
56 | return res; | ||
57 | } | ||
58 | |||
59 | static __inline__ void atomic_clear_mask (unsigned long mask, unsigned long *addr) | ||
60 | { | ||
61 | unsigned long flags; | ||
62 | |||
63 | local_irq_save (flags); | ||
64 | *addr &= ~mask; | ||
65 | local_irq_restore (flags); | ||
66 | } | ||
67 | |||
68 | #endif | ||
69 | |||
70 | #define atomic_add(i, v) atomic_add_return ((i), (v)) | ||
71 | #define atomic_sub(i, v) atomic_sub_return ((i), (v)) | ||
72 | |||
73 | #define atomic_dec_return(v) atomic_sub_return (1, (v)) | ||
74 | #define atomic_inc_return(v) atomic_add_return (1, (v)) | ||
75 | #define atomic_inc(v) atomic_inc_return (v) | ||
76 | #define atomic_dec(v) atomic_dec_return (v) | ||
77 | |||
78 | /* | ||
79 | * atomic_inc_and_test - increment and test | ||
80 | * @v: pointer of type atomic_t | ||
81 | * | ||
82 | * Atomically increments @v by 1 | ||
83 | * and returns true if the result is zero, or false for all | ||
84 | * other cases. | ||
85 | */ | ||
86 | #define atomic_inc_and_test(v) (atomic_inc_return(v) == 0) | ||
87 | |||
88 | #define atomic_sub_and_test(i,v) (atomic_sub_return ((i), (v)) == 0) | ||
89 | #define atomic_dec_and_test(v) (atomic_sub_return (1, (v)) == 0) | ||
90 | #define atomic_add_negative(i,v) (atomic_add_return ((i), (v)) < 0) | ||
91 | |||
92 | static inline int atomic_cmpxchg(atomic_t *v, int old, int new) | ||
93 | { | ||
94 | int ret; | ||
95 | unsigned long flags; | ||
96 | |||
97 | local_irq_save(flags); | ||
98 | ret = v->counter; | ||
99 | if (likely(ret == old)) | ||
100 | v->counter = new; | ||
101 | local_irq_restore(flags); | ||
102 | |||
103 | return ret; | ||
104 | } | ||
105 | |||
106 | #define atomic_xchg(v, new) (xchg(&((v)->counter), new)) | ||
107 | |||
108 | static inline int atomic_add_unless(atomic_t *v, int a, int u) | ||
109 | { | ||
110 | int ret; | ||
111 | unsigned long flags; | ||
112 | |||
113 | local_irq_save(flags); | ||
114 | ret = v->counter; | ||
115 | if (ret != u) | ||
116 | v->counter += a; | ||
117 | local_irq_restore(flags); | ||
118 | |||
119 | return ret != u; | ||
120 | } | ||
121 | |||
122 | #define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0) | ||
123 | |||
124 | /* Atomic operations are already serializing on ARM */ | ||
125 | #define smp_mb__before_atomic_dec() barrier() | ||
126 | #define smp_mb__after_atomic_dec() barrier() | ||
127 | #define smp_mb__before_atomic_inc() barrier() | ||
128 | #define smp_mb__after_atomic_inc() barrier() | ||
129 | |||
130 | #include <asm-generic/atomic.h> | ||
131 | #endif /* __V850_ATOMIC_H__ */ | ||
diff --git a/include/asm-v850/auxvec.h b/include/asm-v850/auxvec.h deleted file mode 100644 index f493232d0224..000000000000 --- a/include/asm-v850/auxvec.h +++ /dev/null | |||
@@ -1,4 +0,0 @@ | |||
1 | #ifndef __V850_AUXVEC_H__ | ||
2 | #define __V850_AUXVEC_H__ | ||
3 | |||
4 | #endif /* __V850_AUXVEC_H__ */ | ||
diff --git a/include/asm-v850/bitops.h b/include/asm-v850/bitops.h deleted file mode 100644 index f82f5b4a56e0..000000000000 --- a/include/asm-v850/bitops.h +++ /dev/null | |||
@@ -1,161 +0,0 @@ | |||
1 | /* | ||
2 | * include/asm-v850/bitops.h -- Bit operations | ||
3 | * | ||
4 | * Copyright (C) 2001,02,03,04,05 NEC Electronics Corporation | ||
5 | * Copyright (C) 2001,02,03,04,05 Miles Bader <miles@gnu.org> | ||
6 | * Copyright (C) 1992 Linus Torvalds. | ||
7 | * | ||
8 | * This file is subject to the terms and conditions of the GNU General | ||
9 | * Public License. See the file COPYING in the main directory of this | ||
10 | * archive for more details. | ||
11 | */ | ||
12 | |||
13 | #ifndef __V850_BITOPS_H__ | ||
14 | #define __V850_BITOPS_H__ | ||
15 | |||
16 | #ifndef _LINUX_BITOPS_H | ||
17 | #error only <linux/bitops.h> can be included directly | ||
18 | #endif | ||
19 | |||
20 | #include <linux/compiler.h> /* unlikely */ | ||
21 | #include <asm/byteorder.h> /* swab32 */ | ||
22 | #include <asm/system.h> /* interrupt enable/disable */ | ||
23 | |||
24 | |||
25 | #ifdef __KERNEL__ | ||
26 | |||
27 | #include <asm-generic/bitops/ffz.h> | ||
28 | |||
29 | /* | ||
30 | * The __ functions are not atomic | ||
31 | */ | ||
32 | |||
33 | /* In the following constant-bit-op macros, a "g" constraint is used when | ||
34 | we really need an integer ("i" constraint). This is to avoid | ||
35 | warnings/errors from the compiler in the case where the associated | ||
36 | operand _isn't_ an integer, and shouldn't produce bogus assembly because | ||
37 | use of that form is protected by a guard statement that checks for | ||
38 | constants, and should otherwise be removed by the optimizer. This | ||
39 | _usually_ works -- however, __builtin_constant_p returns true for a | ||
40 | variable with a known constant value too, and unfortunately gcc will | ||
41 | happily put the variable in a register and use the register for the "g" | ||
42 | constraint'd asm operand. To avoid the latter problem, we add a | ||
43 | constant offset to the operand and subtract it back in the asm code; | ||
44 | forcing gcc to do arithmetic on the value is usually enough to get it | ||
45 | to use a real constant value. This is horrible, and ultimately | ||
46 | unreliable too, but it seems to work for now (hopefully gcc will offer | ||
47 | us more control in the future, so we can do a better job). */ | ||
48 | |||
49 | #define __const_bit_op(op, nr, addr) \ | ||
50 | ({ __asm__ (op " (%0 - 0x123), %1" \ | ||
51 | :: "g" (((nr) & 0x7) + 0x123), \ | ||
52 | "m" (*((char *)(addr) + ((nr) >> 3))) \ | ||
53 | : "memory"); }) | ||
54 | #define __var_bit_op(op, nr, addr) \ | ||
55 | ({ int __nr = (nr); \ | ||
56 | __asm__ (op " %0, [%1]" \ | ||
57 | :: "r" (__nr & 0x7), \ | ||
58 | "r" ((char *)(addr) + (__nr >> 3)) \ | ||
59 | : "memory"); }) | ||
60 | #define __bit_op(op, nr, addr) \ | ||
61 | ((__builtin_constant_p (nr) && (unsigned)(nr) <= 0x7FFFF) \ | ||
62 | ? __const_bit_op (op, nr, addr) \ | ||
63 | : __var_bit_op (op, nr, addr)) | ||
64 | |||
65 | #define __set_bit(nr, addr) __bit_op ("set1", nr, addr) | ||
66 | #define __clear_bit(nr, addr) __bit_op ("clr1", nr, addr) | ||
67 | #define __change_bit(nr, addr) __bit_op ("not1", nr, addr) | ||
68 | |||
69 | /* The bit instructions used by `non-atomic' variants are actually atomic. */ | ||
70 | #define set_bit __set_bit | ||
71 | #define clear_bit __clear_bit | ||
72 | #define change_bit __change_bit | ||
73 | |||
74 | |||
75 | #define __const_tns_bit_op(op, nr, addr) \ | ||
76 | ({ int __tns_res; \ | ||
77 | __asm__ __volatile__ ( \ | ||
78 | "tst1 (%1 - 0x123), %2; setf nz, %0; " op " (%1 - 0x123), %2" \ | ||
79 | : "=&r" (__tns_res) \ | ||
80 | : "g" (((nr) & 0x7) + 0x123), \ | ||
81 | "m" (*((char *)(addr) + ((nr) >> 3))) \ | ||
82 | : "memory"); \ | ||
83 | __tns_res; \ | ||
84 | }) | ||
85 | #define __var_tns_bit_op(op, nr, addr) \ | ||
86 | ({ int __nr = (nr); \ | ||
87 | int __tns_res; \ | ||
88 | __asm__ __volatile__ ( \ | ||
89 | "tst1 %1, [%2]; setf nz, %0; " op " %1, [%2]" \ | ||
90 | : "=&r" (__tns_res) \ | ||
91 | : "r" (__nr & 0x7), \ | ||
92 | "r" ((char *)(addr) + (__nr >> 3)) \ | ||
93 | : "memory"); \ | ||
94 | __tns_res; \ | ||
95 | }) | ||
96 | #define __tns_bit_op(op, nr, addr) \ | ||
97 | ((__builtin_constant_p (nr) && (unsigned)(nr) <= 0x7FFFF) \ | ||
98 | ? __const_tns_bit_op (op, nr, addr) \ | ||
99 | : __var_tns_bit_op (op, nr, addr)) | ||
100 | #define __tns_atomic_bit_op(op, nr, addr) \ | ||
101 | ({ int __tns_atomic_res, __tns_atomic_flags; \ | ||
102 | local_irq_save (__tns_atomic_flags); \ | ||
103 | __tns_atomic_res = __tns_bit_op (op, nr, addr); \ | ||
104 | local_irq_restore (__tns_atomic_flags); \ | ||
105 | __tns_atomic_res; \ | ||
106 | }) | ||
107 | |||
108 | #define __test_and_set_bit(nr, addr) __tns_bit_op ("set1", nr, addr) | ||
109 | #define test_and_set_bit(nr, addr) __tns_atomic_bit_op ("set1", nr, addr) | ||
110 | |||
111 | #define __test_and_clear_bit(nr, addr) __tns_bit_op ("clr1", nr, addr) | ||
112 | #define test_and_clear_bit(nr, addr) __tns_atomic_bit_op ("clr1", nr, addr) | ||
113 | |||
114 | #define __test_and_change_bit(nr, addr) __tns_bit_op ("not1", nr, addr) | ||
115 | #define test_and_change_bit(nr, addr) __tns_atomic_bit_op ("not1", nr, addr) | ||
116 | |||
117 | |||
118 | #define __const_test_bit(nr, addr) \ | ||
119 | ({ int __test_bit_res; \ | ||
120 | __asm__ __volatile__ ("tst1 (%1 - 0x123), %2; setf nz, %0" \ | ||
121 | : "=r" (__test_bit_res) \ | ||
122 | : "g" (((nr) & 0x7) + 0x123), \ | ||
123 | "m" (*((const char *)(addr) + ((nr) >> 3)))); \ | ||
124 | __test_bit_res; \ | ||
125 | }) | ||
126 | static inline int __test_bit (int nr, const void *addr) | ||
127 | { | ||
128 | int res; | ||
129 | __asm__ __volatile__ ("tst1 %1, [%2]; setf nz, %0" | ||
130 | : "=r" (res) | ||
131 | : "r" (nr & 0x7), "r" (addr + (nr >> 3))); | ||
132 | return res; | ||
133 | } | ||
134 | #define test_bit(nr,addr) \ | ||
135 | ((__builtin_constant_p (nr) && (unsigned)(nr) <= 0x7FFFF) \ | ||
136 | ? __const_test_bit ((nr), (addr)) \ | ||
137 | : __test_bit ((nr), (addr))) | ||
138 | |||
139 | |||
140 | /* clear_bit doesn't provide any barrier for the compiler. */ | ||
141 | #define smp_mb__before_clear_bit() barrier () | ||
142 | #define smp_mb__after_clear_bit() barrier () | ||
143 | |||
144 | #include <asm-generic/bitops/ffs.h> | ||
145 | #include <asm-generic/bitops/fls.h> | ||
146 | #include <asm-generic/bitops/fls64.h> | ||
147 | #include <asm-generic/bitops/__ffs.h> | ||
148 | #include <asm-generic/bitops/find.h> | ||
149 | #include <asm-generic/bitops/sched.h> | ||
150 | #include <asm-generic/bitops/hweight.h> | ||
151 | #include <asm-generic/bitops/lock.h> | ||
152 | |||
153 | #include <asm-generic/bitops/ext2-non-atomic.h> | ||
154 | #define ext2_set_bit_atomic(l,n,a) test_and_set_bit(n,a) | ||
155 | #define ext2_clear_bit_atomic(l,n,a) test_and_clear_bit(n,a) | ||
156 | |||
157 | #include <asm-generic/bitops/minix.h> | ||
158 | |||
159 | #endif /* __KERNEL__ */ | ||
160 | |||
161 | #endif /* __V850_BITOPS_H__ */ | ||
diff --git a/include/asm-v850/bug.h b/include/asm-v850/bug.h deleted file mode 100644 index b0ed2d35f3e8..000000000000 --- a/include/asm-v850/bug.h +++ /dev/null | |||
@@ -1,25 +0,0 @@ | |||
1 | /* | ||
2 | * include/asm-v850/bug.h -- Bug reporting | ||
3 | * | ||
4 | * Copyright (C) 2003 NEC Electronics Corporation | ||
5 | * Copyright (C) 2003 Miles Bader <miles@gnu.org> | ||
6 | * | ||
7 | * This file is subject to the terms and conditions of the GNU General | ||
8 | * Public License. See the file COPYING in the main directory of this | ||
9 | * archive for more details. | ||
10 | * | ||
11 | * Written by Miles Bader <miles@gnu.org> | ||
12 | */ | ||
13 | |||
14 | #ifndef __V850_BUG_H__ | ||
15 | #define __V850_BUG_H__ | ||
16 | |||
17 | #ifdef CONFIG_BUG | ||
18 | extern void __bug (void) __attribute__ ((noreturn)); | ||
19 | #define BUG() __bug() | ||
20 | #define HAVE_ARCH_BUG | ||
21 | #endif | ||
22 | |||
23 | #include <asm-generic/bug.h> | ||
24 | |||
25 | #endif /* __V850_BUG_H__ */ | ||
diff --git a/include/asm-v850/bugs.h b/include/asm-v850/bugs.h deleted file mode 100644 index 71110a65c1d7..000000000000 --- a/include/asm-v850/bugs.h +++ /dev/null | |||
@@ -1,16 +0,0 @@ | |||
1 | /* | ||
2 | * include/asm-v850e/bugs.h | ||
3 | * | ||
4 | * Copyright (C) 1994 Linus Torvalds | ||
5 | */ | ||
6 | |||
7 | /* | ||
8 | * This is included by init/main.c to check for architecture-dependent bugs. | ||
9 | * | ||
10 | * Needs: | ||
11 | * void check_bugs(void); | ||
12 | */ | ||
13 | |||
14 | static void check_bugs(void) | ||
15 | { | ||
16 | } | ||
diff --git a/include/asm-v850/byteorder.h b/include/asm-v850/byteorder.h deleted file mode 100644 index a6f07530050e..000000000000 --- a/include/asm-v850/byteorder.h +++ /dev/null | |||
@@ -1,48 +0,0 @@ | |||
1 | /* | ||
2 | * include/asm-v850/byteorder.h -- Endian id and conversion ops | ||
3 | * | ||
4 | * Copyright (C) 2001 NEC Corporation | ||
5 | * Copyright (C) 2001 Miles Bader <miles@gnu.org> | ||
6 | * | ||
7 | * This file is subject to the terms and conditions of the GNU General | ||
8 | * Public License. See the file COPYING in the main directory of this | ||
9 | * archive for more details. | ||
10 | * | ||
11 | * Written by Miles Bader <miles@gnu.org> | ||
12 | */ | ||
13 | |||
14 | #ifndef __V850_BYTEORDER_H__ | ||
15 | #define __V850_BYTEORDER_H__ | ||
16 | |||
17 | #include <asm/types.h> | ||
18 | #include <linux/compiler.h> | ||
19 | |||
20 | #ifdef __GNUC__ | ||
21 | |||
22 | static __inline__ __attribute_const__ __u32 ___arch__swab32 (__u32 word) | ||
23 | { | ||
24 | __u32 res; | ||
25 | __asm__ ("bsw %1, %0" : "=r" (res) : "r" (word)); | ||
26 | return res; | ||
27 | } | ||
28 | |||
29 | static __inline__ __attribute_const__ __u16 ___arch__swab16 (__u16 half_word) | ||
30 | { | ||
31 | __u16 res; | ||
32 | __asm__ ("bsh %1, %0" : "=r" (res) : "r" (half_word)); | ||
33 | return res; | ||
34 | } | ||
35 | |||
36 | #define __arch__swab32(x) ___arch__swab32(x) | ||
37 | #define __arch__swab16(x) ___arch__swab16(x) | ||
38 | |||
39 | #if !defined(__STRICT_ANSI__) || defined(__KERNEL__) | ||
40 | # define __BYTEORDER_HAS_U64__ | ||
41 | # define __SWAB_64_THRU_32__ | ||
42 | #endif | ||
43 | |||
44 | #endif /* __GNUC__ */ | ||
45 | |||
46 | #include <linux/byteorder/little_endian.h> | ||
47 | |||
48 | #endif /* __V850_BYTEORDER_H__ */ | ||
diff --git a/include/asm-v850/cache.h b/include/asm-v850/cache.h deleted file mode 100644 index 8832c7ea3242..000000000000 --- a/include/asm-v850/cache.h +++ /dev/null | |||
@@ -1,26 +0,0 @@ | |||
1 | /* | ||
2 | * include/asm-v850/cache.h -- Cache operations | ||
3 | * | ||
4 | * Copyright (C) 2001,05 NEC Corporation | ||
5 | * Copyright (C) 2001,05 Miles Bader <miles@gnu.org> | ||
6 | * | ||
7 | * This file is subject to the terms and conditions of the GNU General | ||
8 | * Public License. See the file COPYING in the main directory of this | ||
9 | * archive for more details. | ||
10 | * | ||
11 | * Written by Miles Bader <miles@gnu.org> | ||
12 | */ | ||
13 | |||
14 | #ifndef __V850_CACHE_H__ | ||
15 | #define __V850_CACHE_H__ | ||
16 | |||
17 | /* All cache operations are machine-dependent. */ | ||
18 | #include <asm/machdep.h> | ||
19 | |||
20 | #ifndef L1_CACHE_BYTES | ||
21 | /* This processor has no cache, so just choose an arbitrary value. */ | ||
22 | #define L1_CACHE_BYTES 16 | ||
23 | #define L1_CACHE_SHIFT 4 | ||
24 | #endif | ||
25 | |||
26 | #endif /* __V850_CACHE_H__ */ | ||
diff --git a/include/asm-v850/cacheflush.h b/include/asm-v850/cacheflush.h deleted file mode 100644 index 9ece05a202ef..000000000000 --- a/include/asm-v850/cacheflush.h +++ /dev/null | |||
@@ -1,70 +0,0 @@ | |||
1 | /* | ||
2 | * include/asm-v850/cacheflush.h | ||
3 | * | ||
4 | * Copyright (C) 2001,02,03 NEC Electronics Corporation | ||
5 | * Copyright (C) 2001,02,03 Miles Bader <miles@gnu.org> | ||
6 | * | ||
7 | * This file is subject to the terms and conditions of the GNU General | ||
8 | * Public License. See the file COPYING in the main directory of this | ||
9 | * archive for more details. | ||
10 | * | ||
11 | * Written by Miles Bader <miles@gnu.org> | ||
12 | */ | ||
13 | |||
14 | #ifndef __V850_CACHEFLUSH_H__ | ||
15 | #define __V850_CACHEFLUSH_H__ | ||
16 | |||
17 | /* Somebody depends on this; sigh... */ | ||
18 | #include <linux/mm.h> | ||
19 | |||
20 | #include <asm/machdep.h> | ||
21 | |||
22 | |||
23 | /* The following are all used by the kernel in ways that only affect | ||
24 | systems with MMUs, so we don't need them. */ | ||
25 | #define flush_cache_all() ((void)0) | ||
26 | #define flush_cache_mm(mm) ((void)0) | ||
27 | #define flush_cache_dup_mm(mm) ((void)0) | ||
28 | #define flush_cache_range(vma, start, end) ((void)0) | ||
29 | #define flush_cache_page(vma, vmaddr, pfn) ((void)0) | ||
30 | #define flush_dcache_page(page) ((void)0) | ||
31 | #define flush_dcache_mmap_lock(mapping) ((void)0) | ||
32 | #define flush_dcache_mmap_unlock(mapping) ((void)0) | ||
33 | #define flush_cache_vmap(start, end) ((void)0) | ||
34 | #define flush_cache_vunmap(start, end) ((void)0) | ||
35 | |||
36 | #ifdef CONFIG_NO_CACHE | ||
37 | |||
38 | /* Some systems have no cache at all, in which case we don't need these | ||
39 | either. */ | ||
40 | #define flush_icache() ((void)0) | ||
41 | #define flush_icache_range(start, end) ((void)0) | ||
42 | #define flush_icache_page(vma,pg) ((void)0) | ||
43 | #define flush_icache_user_range(vma,pg,adr,len) ((void)0) | ||
44 | #define flush_cache_sigtramp(vaddr) ((void)0) | ||
45 | |||
46 | #else /* !CONFIG_NO_CACHE */ | ||
47 | |||
48 | struct page; | ||
49 | struct mm_struct; | ||
50 | struct vm_area_struct; | ||
51 | |||
52 | /* Otherwise, somebody had better define them. */ | ||
53 | extern void flush_icache (void); | ||
54 | extern void flush_icache_range (unsigned long start, unsigned long end); | ||
55 | extern void flush_icache_page (struct vm_area_struct *vma, struct page *page); | ||
56 | extern void flush_icache_user_range (struct vm_area_struct *vma, | ||
57 | struct page *page, | ||
58 | unsigned long adr, int len); | ||
59 | extern void flush_cache_sigtramp (unsigned long addr); | ||
60 | |||
61 | #endif /* CONFIG_NO_CACHE */ | ||
62 | |||
63 | #define copy_to_user_page(vma, page, vaddr, dst, src, len) \ | ||
64 | do { memcpy(dst, src, len); \ | ||
65 | flush_icache_user_range(vma, page, vaddr, len); \ | ||
66 | } while (0) | ||
67 | #define copy_from_user_page(vma, page, vaddr, dst, src, len) \ | ||
68 | memcpy(dst, src, len) | ||
69 | |||
70 | #endif /* __V850_CACHEFLUSH_H__ */ | ||
diff --git a/include/asm-v850/checksum.h b/include/asm-v850/checksum.h deleted file mode 100644 index d1dddd938262..000000000000 --- a/include/asm-v850/checksum.h +++ /dev/null | |||
@@ -1,112 +0,0 @@ | |||
1 | /* | ||
2 | * include/asm-v850/checksum.h -- Checksum ops | ||
3 | * | ||
4 | * Copyright (C) 2001,2005 NEC Corporation | ||
5 | * Copyright (C) 2001,2005 Miles Bader <miles@gnu.org> | ||
6 | * | ||
7 | * This file is subject to the terms and conditions of the GNU General | ||
8 | * Public License. See the file COPYING in the main directory of this | ||
9 | * archive for more details. | ||
10 | * | ||
11 | * Written by Miles Bader <miles@gnu.org> | ||
12 | */ | ||
13 | |||
14 | #ifndef __V850_CHECKSUM_H__ | ||
15 | #define __V850_CHECKSUM_H__ | ||
16 | |||
17 | /* | ||
18 | * computes the checksum of a memory block at buff, length len, | ||
19 | * and adds in "sum" (32-bit) | ||
20 | * | ||
21 | * returns a 32-bit number suitable for feeding into itself | ||
22 | * or csum_tcpudp_magic | ||
23 | * | ||
24 | * this function must be called with even lengths, except | ||
25 | * for the last fragment, which may be odd | ||
26 | * | ||
27 | * it's best to have buff aligned on a 32-bit boundary | ||
28 | */ | ||
29 | extern __wsum csum_partial(const void *buff, int len, __wsum sum); | ||
30 | |||
31 | /* | ||
32 | * the same as csum_partial, but copies from src while it | ||
33 | * checksums | ||
34 | * | ||
35 | * here even more important to align src and dst on a 32-bit (or even | ||
36 | * better 64-bit) boundary | ||
37 | */ | ||
38 | extern __wsum csum_partial_copy_nocheck(const void *src, | ||
39 | void *dst, int len, __wsum sum); | ||
40 | |||
41 | |||
42 | /* | ||
43 | * the same as csum_partial_copy, but copies from user space. | ||
44 | * | ||
45 | * here even more important to align src and dst on a 32-bit (or even | ||
46 | * better 64-bit) boundary | ||
47 | */ | ||
48 | extern __wsum csum_partial_copy_from_user (const void *src, | ||
49 | void *dst, | ||
50 | int len, __wsum sum, | ||
51 | int *csum_err); | ||
52 | |||
53 | __sum16 ip_fast_csum(const void *iph, unsigned int ihl); | ||
54 | |||
55 | /* | ||
56 | * Fold a partial checksum | ||
57 | */ | ||
58 | static inline __sum16 csum_fold (__wsum sum) | ||
59 | { | ||
60 | unsigned int result; | ||
61 | /* | ||
62 | %0 %1 | ||
63 | hsw %1, %0 H L L H | ||
64 | add %1, %0 H L H+L+C H+L | ||
65 | */ | ||
66 | asm ("hsw %1, %0; add %1, %0" : "=&r" (result) : "r" (sum)); | ||
67 | return (__force __sum16)(~result >> 16); | ||
68 | } | ||
69 | |||
70 | |||
71 | /* | ||
72 | * computes the checksum of the TCP/UDP pseudo-header | ||
73 | * returns a 16-bit checksum, already complemented | ||
74 | */ | ||
75 | static inline __wsum | ||
76 | csum_tcpudp_nofold (__be32 saddr, __be32 daddr, | ||
77 | unsigned short len, | ||
78 | unsigned short proto, __wsum sum) | ||
79 | { | ||
80 | int __carry; | ||
81 | __asm__ ("add %2, %0;" | ||
82 | "setf c, %1;" | ||
83 | "add %1, %0;" | ||
84 | "add %3, %0;" | ||
85 | "setf c, %1;" | ||
86 | "add %1, %0;" | ||
87 | "add %4, %0;" | ||
88 | "setf c, %1;" | ||
89 | "add %1, %0" | ||
90 | : "=&r" (sum), "=&r" (__carry) | ||
91 | : "r" (daddr), "r" (saddr), | ||
92 | "r" ((len + proto) << 8), | ||
93 | "0" (sum)); | ||
94 | return sum; | ||
95 | } | ||
96 | |||
97 | static inline __sum16 | ||
98 | csum_tcpudp_magic (__be32 saddr, __be32 daddr, | ||
99 | unsigned short len, | ||
100 | unsigned short proto, __wsum sum) | ||
101 | { | ||
102 | return csum_fold (csum_tcpudp_nofold (saddr, daddr, len, proto, sum)); | ||
103 | } | ||
104 | |||
105 | /* | ||
106 | * this routine is used for miscellaneous IP-like checksums, mainly | ||
107 | * in icmp.c | ||
108 | */ | ||
109 | extern __sum16 ip_compute_csum(const void *buff, int len); | ||
110 | |||
111 | |||
112 | #endif /* __V850_CHECKSUM_H__ */ | ||
diff --git a/include/asm-v850/clinkage.h b/include/asm-v850/clinkage.h deleted file mode 100644 index c389691d6f86..000000000000 --- a/include/asm-v850/clinkage.h +++ /dev/null | |||
@@ -1,26 +0,0 @@ | |||
1 | /* | ||
2 | * include/asm-v850/clinkage.h -- Macros to reflect C symbol-naming conventions | ||
3 | * | ||
4 | * Copyright (C) 2001,02 NEC Corporatione | ||
5 | * Copyright (C) 2001,02 Miles Bader <miles@gnu.org> | ||
6 | * | ||
7 | * This file is subject to the terms and conditions of the GNU General | ||
8 | * Public License. See the file COPYING in the main directory of this | ||
9 | * archive for more details. | ||
10 | * | ||
11 | * Written by Miles Bader <miles@gnu.org> | ||
12 | */ | ||
13 | |||
14 | #ifndef __V850_CLINKAGE_H__ | ||
15 | #define __V850_CLINKAGE_H__ | ||
16 | |||
17 | #include <asm/macrology.h> | ||
18 | #include <asm/asm.h> | ||
19 | |||
20 | #define C_SYMBOL_NAME(name) macrology_paste(_, name) | ||
21 | #define C_SYMBOL_STRING(name) macrology_stringify(C_SYMBOL_NAME(name)) | ||
22 | #define C_ENTRY(name) G_ENTRY(C_SYMBOL_NAME(name)) | ||
23 | #define C_DATA(name) G_DATA(C_SYMBOL_NAME(name)) | ||
24 | #define C_END(name) END(C_SYMBOL_NAME(name)) | ||
25 | |||
26 | #endif /* __V850_CLINKAGE_H__ */ | ||
diff --git a/include/asm-v850/cputime.h b/include/asm-v850/cputime.h deleted file mode 100644 index 7c799c33b8a9..000000000000 --- a/include/asm-v850/cputime.h +++ /dev/null | |||
@@ -1,6 +0,0 @@ | |||
1 | #ifndef __V850_CPUTIME_H | ||
2 | #define __V850_CPUTIME_H | ||
3 | |||
4 | #include <asm-generic/cputime.h> | ||
5 | |||
6 | #endif /* __V850_CPUTIME_H */ | ||
diff --git a/include/asm-v850/current.h b/include/asm-v850/current.h deleted file mode 100644 index 30aae5673770..000000000000 --- a/include/asm-v850/current.h +++ /dev/null | |||
@@ -1,47 +0,0 @@ | |||
1 | /* | ||
2 | * include/asm-v850/current.h -- Current task | ||
3 | * | ||
4 | * Copyright (C) 2001,02 NEC Corporation | ||
5 | * Copyright (C) 2001,02 Miles Bader <miles@gnu.org> | ||
6 | * | ||
7 | * This file is subject to the terms and conditions of the GNU General | ||
8 | * Public License. See the file COPYING in the main directory of this | ||
9 | * archive for more details. | ||
10 | * | ||
11 | * Written by Miles Bader <miles@gnu.org> | ||
12 | */ | ||
13 | |||
14 | #ifndef __V850_CURRENT_H__ | ||
15 | #define __V850_CURRENT_H__ | ||
16 | |||
17 | #ifndef __ASSEMBLY__ /* <linux/thread_info.h> is not asm-safe. */ | ||
18 | #include <linux/thread_info.h> | ||
19 | #endif | ||
20 | |||
21 | #include <asm/macrology.h> | ||
22 | |||
23 | |||
24 | /* Register used to hold the current task pointer while in the kernel. | ||
25 | Any `call clobbered' register without a special meaning should be OK, | ||
26 | but check asm/v850/kernel/entry.S to be sure. */ | ||
27 | #define CURRENT_TASK_REGNUM 16 | ||
28 | #define CURRENT_TASK macrology_paste (r, CURRENT_TASK_REGNUM) | ||
29 | |||
30 | |||
31 | #ifdef __ASSEMBLY__ | ||
32 | |||
33 | /* Put a pointer to the current task structure into REG. */ | ||
34 | #define GET_CURRENT_TASK(reg) \ | ||
35 | GET_CURRENT_THREAD(reg); \ | ||
36 | ld.w TI_TASK[reg], reg | ||
37 | |||
38 | #else /* !__ASSEMBLY__ */ | ||
39 | |||
40 | /* A pointer to the current task. */ | ||
41 | register struct task_struct *current \ | ||
42 | __asm__ (macrology_stringify (CURRENT_TASK)); | ||
43 | |||
44 | #endif /* __ASSEMBLY__ */ | ||
45 | |||
46 | |||
47 | #endif /* _V850_CURRENT_H */ | ||
diff --git a/include/asm-v850/delay.h b/include/asm-v850/delay.h deleted file mode 100644 index 6d028e6b2354..000000000000 --- a/include/asm-v850/delay.h +++ /dev/null | |||
@@ -1,47 +0,0 @@ | |||
1 | /* | ||
2 | * include/asm-v850/delay.h -- Delay routines, using a pre-computed | ||
3 | * "loops_per_second" value | ||
4 | * | ||
5 | * Copyright (C) 2001,03 NEC Corporation | ||
6 | * Copyright (C) 2001,03 Miles Bader <miles@gnu.org> | ||
7 | * Copyright (C) 1994 Hamish Macdonald | ||
8 | * | ||
9 | * This file is subject to the terms and conditions of the GNU General | ||
10 | * Public License. See the file COPYING in the main directory of this | ||
11 | * archive for more details. | ||
12 | */ | ||
13 | |||
14 | #ifndef __V850_DELAY_H__ | ||
15 | #define __V850_DELAY_H__ | ||
16 | |||
17 | #include <asm/param.h> | ||
18 | |||
19 | static inline void __delay(unsigned long loops) | ||
20 | { | ||
21 | if (loops) | ||
22 | __asm__ __volatile__ ("1: add -1, %0; bnz 1b" | ||
23 | : "=r" (loops) : "0" (loops)); | ||
24 | } | ||
25 | |||
26 | /* | ||
27 | * Use only for very small delays ( < 1 msec). Should probably use a | ||
28 | * lookup table, really, as the multiplications take much too long with | ||
29 | * short delays. This is a "reasonable" implementation, though (and the | ||
30 | * first constant multiplications gets optimized away if the delay is | ||
31 | * a constant) | ||
32 | */ | ||
33 | |||
34 | extern unsigned long loops_per_jiffy; | ||
35 | |||
36 | static inline void udelay(unsigned long usecs) | ||
37 | { | ||
38 | register unsigned long full_loops, part_loops; | ||
39 | |||
40 | full_loops = ((usecs * HZ) / 1000000) * loops_per_jiffy; | ||
41 | usecs %= (1000000 / HZ); | ||
42 | part_loops = (usecs * HZ * loops_per_jiffy) / 1000000; | ||
43 | |||
44 | __delay(full_loops + part_loops); | ||
45 | } | ||
46 | |||
47 | #endif /* __V850_DELAY_H__ */ | ||
diff --git a/include/asm-v850/device.h b/include/asm-v850/device.h deleted file mode 100644 index d8f9872b0e2d..000000000000 --- a/include/asm-v850/device.h +++ /dev/null | |||
@@ -1,7 +0,0 @@ | |||
1 | /* | ||
2 | * Arch specific extensions to struct device | ||
3 | * | ||
4 | * This file is released under the GPLv2 | ||
5 | */ | ||
6 | #include <asm-generic/device.h> | ||
7 | |||
diff --git a/include/asm-v850/div64.h b/include/asm-v850/div64.h deleted file mode 100644 index 6cd978cefb28..000000000000 --- a/include/asm-v850/div64.h +++ /dev/null | |||
@@ -1 +0,0 @@ | |||
1 | #include <asm-generic/div64.h> | ||
diff --git a/include/asm-v850/dma-mapping.h b/include/asm-v850/dma-mapping.h deleted file mode 100644 index 1cc42c603a1b..000000000000 --- a/include/asm-v850/dma-mapping.h +++ /dev/null | |||
@@ -1,11 +0,0 @@ | |||
1 | #ifndef __V850_DMA_MAPPING_H__ | ||
2 | #define __V850_DMA_MAPPING_H__ | ||
3 | |||
4 | |||
5 | #ifdef CONFIG_PCI | ||
6 | #include <asm-generic/dma-mapping.h> | ||
7 | #else | ||
8 | #include <asm-generic/dma-mapping-broken.h> | ||
9 | #endif | ||
10 | |||
11 | #endif /* __V850_DMA_MAPPING_H__ */ | ||
diff --git a/include/asm-v850/dma.h b/include/asm-v850/dma.h deleted file mode 100644 index 2369849e2d0a..000000000000 --- a/include/asm-v850/dma.h +++ /dev/null | |||
@@ -1,18 +0,0 @@ | |||
1 | #ifndef __V850_DMA_H__ | ||
2 | #define __V850_DMA_H__ | ||
3 | |||
4 | /* What should this be? */ | ||
5 | #define MAX_DMA_ADDRESS 0xFFFFFFFF | ||
6 | |||
7 | /* reserve a DMA channel */ | ||
8 | extern int request_dma (unsigned int dmanr, const char * device_id); | ||
9 | /* release it again */ | ||
10 | extern void free_dma (unsigned int dmanr); | ||
11 | |||
12 | #ifdef CONFIG_PCI | ||
13 | extern int isa_dma_bridge_buggy; | ||
14 | #else | ||
15 | #define isa_dma_bridge_buggy (0) | ||
16 | #endif | ||
17 | |||
18 | #endif /* __V850_DMA_H__ */ | ||
diff --git a/include/asm-v850/elf.h b/include/asm-v850/elf.h deleted file mode 100644 index 28f5b176ff1a..000000000000 --- a/include/asm-v850/elf.h +++ /dev/null | |||
@@ -1,99 +0,0 @@ | |||
1 | #ifndef __V850_ELF_H__ | ||
2 | #define __V850_ELF_H__ | ||
3 | |||
4 | /* | ||
5 | * ELF register definitions.. | ||
6 | */ | ||
7 | |||
8 | #include <asm/ptrace.h> | ||
9 | #include <asm/user.h> | ||
10 | #include <asm/byteorder.h> | ||
11 | |||
12 | typedef unsigned long elf_greg_t; | ||
13 | |||
14 | #define ELF_NGREG (sizeof (struct pt_regs) / sizeof(elf_greg_t)) | ||
15 | typedef elf_greg_t elf_gregset_t[ELF_NGREG]; | ||
16 | |||
17 | typedef struct user_fpu_struct elf_fpregset_t; | ||
18 | |||
19 | /* | ||
20 | * This is used to ensure we don't load something for the wrong architecture. | ||
21 | */ | ||
22 | #define elf_check_arch(x) \ | ||
23 | ((x)->e_machine == EM_V850 || (x)->e_machine == EM_CYGNUS_V850) | ||
24 | |||
25 | |||
26 | /* v850 relocation types. */ | ||
27 | #define R_V850_NONE 0 | ||
28 | #define R_V850_9_PCREL 1 | ||
29 | #define R_V850_22_PCREL 2 | ||
30 | #define R_V850_HI16_S 3 | ||
31 | #define R_V850_HI16 4 | ||
32 | #define R_V850_LO16 5 | ||
33 | #define R_V850_32 6 | ||
34 | #define R_V850_16 7 | ||
35 | #define R_V850_8 8 | ||
36 | #define R_V850_SDA_16_16_OFFSET 9 /* For ld.b, st.b, set1, clr1, | ||
37 | not1, tst1, movea, movhi */ | ||
38 | #define R_V850_SDA_15_16_OFFSET 10 /* For ld.w, ld.h, ld.hu, st.w, st.h */ | ||
39 | #define R_V850_ZDA_16_16_OFFSET 11 /* For ld.b, st.b, set1, clr1, | ||
40 | not1, tst1, movea, movhi */ | ||
41 | #define R_V850_ZDA_15_16_OFFSET 12 /* For ld.w, ld.h, ld.hu, st.w, st.h */ | ||
42 | #define R_V850_TDA_6_8_OFFSET 13 /* For sst.w, sld.w */ | ||
43 | #define R_V850_TDA_7_8_OFFSET 14 /* For sst.h, sld.h */ | ||
44 | #define R_V850_TDA_7_7_OFFSET 15 /* For sst.b, sld.b */ | ||
45 | #define R_V850_TDA_16_16_OFFSET 16 /* For set1, clr1, not1, tst1, | ||
46 | movea, movhi */ | ||
47 | #define R_V850_NUM 17 | ||
48 | |||
49 | |||
50 | /* | ||
51 | * These are used to set parameters in the core dumps. | ||
52 | */ | ||
53 | #define ELF_CLASS ELFCLASS32 | ||
54 | #ifdef __LITTLE_ENDIAN__ | ||
55 | #define ELF_DATA ELFDATA2LSB | ||
56 | #else | ||
57 | #define ELF_DATA ELFDATA2MSB | ||
58 | #endif | ||
59 | #define ELF_ARCH EM_V850 | ||
60 | |||
61 | #define USE_ELF_CORE_DUMP | ||
62 | #define ELF_EXEC_PAGESIZE 4096 | ||
63 | |||
64 | |||
65 | #define ELF_CORE_COPY_REGS(_dest,_regs) \ | ||
66 | memcpy((char *) &_dest, (char *) _regs, \ | ||
67 | sizeof(struct pt_regs)); | ||
68 | |||
69 | /* This yields a mask that user programs can use to figure out what | ||
70 | instruction set this CPU supports. This could be done in user space, | ||
71 | but it's not easy, and we've already done it here. */ | ||
72 | |||
73 | #define ELF_HWCAP (0) | ||
74 | |||
75 | /* This yields a string that ld.so will use to load implementation | ||
76 | specific libraries for optimization. This is more specific in | ||
77 | intent than poking at uname or /proc/cpuinfo. | ||
78 | |||
79 | For the moment, we have only optimizations for the Intel generations, | ||
80 | but that could change... */ | ||
81 | |||
82 | #define ELF_PLATFORM (NULL) | ||
83 | |||
84 | #define ELF_PLAT_INIT(_r, load_addr) \ | ||
85 | do { \ | ||
86 | _r->gpr[0] = _r->gpr[1] = _r->gpr[2] = _r->gpr[3] = \ | ||
87 | _r->gpr[4] = _r->gpr[5] = _r->gpr[6] = _r->gpr[7] = \ | ||
88 | _r->gpr[8] = _r->gpr[9] = _r->gpr[10] = _r->gpr[11] = \ | ||
89 | _r->gpr[12] = _r->gpr[13] = _r->gpr[14] = _r->gpr[15] = \ | ||
90 | _r->gpr[16] = _r->gpr[17] = _r->gpr[18] = _r->gpr[19] = \ | ||
91 | _r->gpr[20] = _r->gpr[21] = _r->gpr[22] = _r->gpr[23] = \ | ||
92 | _r->gpr[24] = _r->gpr[25] = _r->gpr[26] = _r->gpr[27] = \ | ||
93 | _r->gpr[28] = _r->gpr[29] = _r->gpr[30] = _r->gpr[31] = \ | ||
94 | 0; \ | ||
95 | } while (0) | ||
96 | |||
97 | #define SET_PERSONALITY(ex, ibcs2) set_personality(PER_LINUX_32BIT) | ||
98 | |||
99 | #endif /* __V850_ELF_H__ */ | ||
diff --git a/include/asm-v850/emergency-restart.h b/include/asm-v850/emergency-restart.h deleted file mode 100644 index 108d8c48e42e..000000000000 --- a/include/asm-v850/emergency-restart.h +++ /dev/null | |||
@@ -1,6 +0,0 @@ | |||
1 | #ifndef _ASM_EMERGENCY_RESTART_H | ||
2 | #define _ASM_EMERGENCY_RESTART_H | ||
3 | |||
4 | #include <asm-generic/emergency-restart.h> | ||
5 | |||
6 | #endif /* _ASM_EMERGENCY_RESTART_H */ | ||
diff --git a/include/asm-v850/entry.h b/include/asm-v850/entry.h deleted file mode 100644 index d9df8ac48584..000000000000 --- a/include/asm-v850/entry.h +++ /dev/null | |||
@@ -1,113 +0,0 @@ | |||
1 | /* | ||
2 | * include/asm-v850/entry.h -- Definitions used by low-level trap handlers | ||
3 | * | ||
4 | * Copyright (C) 2001,02,03 NEC Electronics Corporation | ||
5 | * Copyright (C) 2001,02,03 Miles Bader <miles@gnu.org> | ||
6 | * | ||
7 | * This file is subject to the terms and conditions of the GNU General | ||
8 | * Public License. See the file COPYING in the main directory of this | ||
9 | * archive for more details. | ||
10 | * | ||
11 | * Written by Miles Bader <miles@gnu.org> | ||
12 | */ | ||
13 | |||
14 | #ifndef __V850_ENTRY_H__ | ||
15 | #define __V850_ENTRY_H__ | ||
16 | |||
17 | |||
18 | #include <asm/ptrace.h> | ||
19 | #include <asm/machdep.h> | ||
20 | |||
21 | |||
22 | /* These are special variables using by the kernel trap/interrupt code | ||
23 | to save registers in, at a time when there are no spare registers we | ||
24 | can use to do so, and we can't depend on the value of the stack | ||
25 | pointer. This means that they must be within a signed 16-bit | ||
26 | displacement of 0x00000000. */ | ||
27 | |||
28 | #define KERNEL_VAR_SPACE_ADDR R0_RAM_ADDR | ||
29 | |||
30 | #ifdef __ASSEMBLY__ | ||
31 | #define KERNEL_VAR(addr) addr[r0] | ||
32 | #else | ||
33 | #define KERNEL_VAR(addr) (*(volatile unsigned long *)(addr)) | ||
34 | #endif | ||
35 | |||
36 | /* Kernel stack pointer, 4 bytes. */ | ||
37 | #define KSP_ADDR (KERNEL_VAR_SPACE_ADDR + 0) | ||
38 | #define KSP KERNEL_VAR (KSP_ADDR) | ||
39 | /* 1 if in kernel-mode, 0 if in user mode, 1 byte. */ | ||
40 | #define KM_ADDR (KERNEL_VAR_SPACE_ADDR + 4) | ||
41 | #define KM KERNEL_VAR (KM_ADDR) | ||
42 | /* Temporary storage for interrupt handlers, 4 bytes. */ | ||
43 | #define INT_SCRATCH_ADDR (KERNEL_VAR_SPACE_ADDR + 8) | ||
44 | #define INT_SCRATCH KERNEL_VAR (INT_SCRATCH_ADDR) | ||
45 | /* Where the stack-pointer is saved when jumping to various sorts of | ||
46 | interrupt handlers. ENTRY_SP is used by everything except NMIs, | ||
47 | which have their own location. Higher-priority NMIs can clobber the | ||
48 | value written by a lower priority NMI, since they can't be disabled, | ||
49 | but that's OK, because only NMI0 (the lowest-priority one) is allowed | ||
50 | to return. */ | ||
51 | #define ENTRY_SP_ADDR (KERNEL_VAR_SPACE_ADDR + 12) | ||
52 | #define ENTRY_SP KERNEL_VAR (ENTRY_SP_ADDR) | ||
53 | #define NMI_ENTRY_SP_ADDR (KERNEL_VAR_SPACE_ADDR + 16) | ||
54 | #define NMI_ENTRY_SP KERNEL_VAR (NMI_ENTRY_SP_ADDR) | ||
55 | |||
56 | #ifdef CONFIG_RESET_GUARD | ||
57 | /* Used to detect unexpected resets (since the v850 has no MMU, any call | ||
58 | through a null pointer will jump to the reset vector). We detect | ||
59 | such resets by checking for a magic value, RESET_GUARD_ACTIVE, in | ||
60 | this location. Properly resetting the machine stores zero there, so | ||
61 | it shouldn't trigger the guard; the power-on value is uncertain, but | ||
62 | it's unlikely to be RESET_GUARD_ACTIVE. */ | ||
63 | #define RESET_GUARD_ADDR (KERNEL_VAR_SPACE_ADDR + 28) | ||
64 | #define RESET_GUARD KERNEL_VAR (RESET_GUARD_ADDR) | ||
65 | #define RESET_GUARD_ACTIVE 0xFAB4BEEF | ||
66 | #endif /* CONFIG_RESET_GUARD */ | ||
67 | |||
68 | #ifdef CONFIG_V850E_HIGHRES_TIMER | ||
69 | #define HIGHRES_TIMER_SLOW_TICKS_ADDR (KERNEL_VAR_SPACE_ADDR + 32) | ||
70 | #define HIGHRES_TIMER_SLOW_TICKS KERNEL_VAR (HIGHRES_TIMER_SLOW_TICKS_ADDR) | ||
71 | #endif /* CONFIG_V850E_HIGHRES_TIMER */ | ||
72 | |||
73 | #ifndef __ASSEMBLY__ | ||
74 | |||
75 | #ifdef CONFIG_RESET_GUARD | ||
76 | /* Turn off reset guard, so that resetting the machine works normally. | ||
77 | This should be called in the various machine_halt, etc., functions. */ | ||
78 | static inline void disable_reset_guard (void) | ||
79 | { | ||
80 | RESET_GUARD = 0; | ||
81 | } | ||
82 | #endif /* CONFIG_RESET_GUARD */ | ||
83 | |||
84 | #endif /* !__ASSEMBLY__ */ | ||
85 | |||
86 | |||
87 | /* A `state save frame' is a struct pt_regs preceded by some extra space | ||
88 | suitable for a function call stack frame. */ | ||
89 | |||
90 | /* Amount of room on the stack reserved for arguments and to satisfy the | ||
91 | C calling conventions, in addition to the space used by the struct | ||
92 | pt_regs that actually holds saved values. */ | ||
93 | #define STATE_SAVE_ARG_SPACE (6*4) /* Up to six arguments. */ | ||
94 | |||
95 | |||
96 | #ifdef __ASSEMBLY__ | ||
97 | |||
98 | /* The size of a state save frame. */ | ||
99 | #define STATE_SAVE_SIZE (PT_SIZE + STATE_SAVE_ARG_SPACE) | ||
100 | |||
101 | #else /* !__ASSEMBLY__ */ | ||
102 | |||
103 | /* The size of a state save frame. */ | ||
104 | #define STATE_SAVE_SIZE (sizeof (struct pt_regs) + STATE_SAVE_ARG_SPACE) | ||
105 | |||
106 | #endif /* __ASSEMBLY__ */ | ||
107 | |||
108 | |||
109 | /* Offset of the struct pt_regs in a state save frame. */ | ||
110 | #define STATE_SAVE_PT_OFFSET STATE_SAVE_ARG_SPACE | ||
111 | |||
112 | |||
113 | #endif /* __V850_ENTRY_H__ */ | ||
diff --git a/include/asm-v850/errno.h b/include/asm-v850/errno.h deleted file mode 100644 index 31c91df01205..000000000000 --- a/include/asm-v850/errno.h +++ /dev/null | |||
@@ -1,6 +0,0 @@ | |||
1 | #ifndef __V850_ERRNO_H__ | ||
2 | #define __V850_ERRNO_H__ | ||
3 | |||
4 | #include <asm-generic/errno.h> | ||
5 | |||
6 | #endif /* __V850_ERRNO_H__ */ | ||
diff --git a/include/asm-v850/fb.h b/include/asm-v850/fb.h deleted file mode 100644 index c7df38030992..000000000000 --- a/include/asm-v850/fb.h +++ /dev/null | |||
@@ -1,12 +0,0 @@ | |||
1 | #ifndef _ASM_FB_H_ | ||
2 | #define _ASM_FB_H_ | ||
3 | #include <linux/fb.h> | ||
4 | |||
5 | #define fb_pgprotect(...) do {} while (0) | ||
6 | |||
7 | static inline int fb_is_primary_device(struct fb_info *info) | ||
8 | { | ||
9 | return 0; | ||
10 | } | ||
11 | |||
12 | #endif /* _ASM_FB_H_ */ | ||
diff --git a/include/asm-v850/fcntl.h b/include/asm-v850/fcntl.h deleted file mode 100644 index 3af4d56776dd..000000000000 --- a/include/asm-v850/fcntl.h +++ /dev/null | |||
@@ -1,11 +0,0 @@ | |||
1 | #ifndef __V850_FCNTL_H__ | ||
2 | #define __V850_FCNTL_H__ | ||
3 | |||
4 | #define O_DIRECTORY 040000 /* must be a directory */ | ||
5 | #define O_NOFOLLOW 0100000 /* don't follow links */ | ||
6 | #define O_DIRECT 0200000 /* direct disk access hint - currently ignored */ | ||
7 | #define O_LARGEFILE 0400000 | ||
8 | |||
9 | #include <asm-generic/fcntl.h> | ||
10 | |||
11 | #endif /* __V850_FCNTL_H__ */ | ||
diff --git a/include/asm-v850/flat.h b/include/asm-v850/flat.h deleted file mode 100644 index 17f0ea566611..000000000000 --- a/include/asm-v850/flat.h +++ /dev/null | |||
@@ -1,133 +0,0 @@ | |||
1 | /* | ||
2 | * include/asm-v850/flat.h -- uClinux flat-format executables | ||
3 | * | ||
4 | * Copyright (C) 2002,03 NEC Electronics Corporation | ||
5 | * Copyright (C) 2002,03 Miles Bader <miles@gnu.org> | ||
6 | * | ||
7 | * This file is subject to the terms and conditions of the GNU General | ||
8 | * Public License. See the file COPYING in the main directory of this | ||
9 | * archive for more details. | ||
10 | * | ||
11 | * Written by Miles Bader <miles@gnu.org> | ||
12 | */ | ||
13 | |||
14 | #ifndef __V850_FLAT_H__ | ||
15 | #define __V850_FLAT_H__ | ||
16 | |||
17 | /* The amount by which a relocation can exceed the program image limits | ||
18 | without being regarded as an error. On the v850, the relocations of | ||
19 | some base-pointers can be offset by 0x8000 (to allow better usage of the | ||
20 | space offered by 16-bit signed offsets -- in most cases the offsets used | ||
21 | with such a base-pointer will be negative). */ | ||
22 | |||
23 | #define flat_reloc_valid(reloc, size) ((reloc) <= (size + 0x8000)) | ||
24 | |||
25 | #define flat_stack_align(sp) /* nothing needed */ | ||
26 | #define flat_argvp_envp_on_stack() 0 | ||
27 | #define flat_old_ram_flag(flags) (flags) | ||
28 | #define flat_set_persistent(relval, p) 0 | ||
29 | |||
30 | /* We store the type of relocation in the top 4 bits of the `relval.' */ | ||
31 | |||
32 | /* Convert a relocation entry into an address. */ | ||
33 | static inline unsigned long | ||
34 | flat_get_relocate_addr (unsigned long relval) | ||
35 | { | ||
36 | return relval & 0x0fffffff; /* Mask out top 4-bits */ | ||
37 | } | ||
38 | |||
39 | #define flat_v850_get_reloc_type(relval) ((relval) >> 28) | ||
40 | |||
41 | #define FLAT_V850_R_32 0 /* Normal 32-bit reloc */ | ||
42 | #define FLAT_V850_R_HI16S_LO15 1 /* High 16-bits + signed 15-bit low field */ | ||
43 | #define FLAT_V850_R_HI16S_LO16 2 /* High 16-bits + signed 16-bit low field */ | ||
44 | |||
45 | /* Extract the address to be relocated from the symbol reference at RP; | ||
46 | RELVAL is the raw relocation-table entry from which RP is derived. | ||
47 | For the v850, RP should always be half-word aligned. */ | ||
48 | static inline unsigned long flat_get_addr_from_rp (unsigned long *rp, | ||
49 | unsigned long relval, | ||
50 | unsigned long flags, | ||
51 | unsigned long *persistent) | ||
52 | { | ||
53 | short *srp = (short *)rp; | ||
54 | |||
55 | switch (flat_v850_get_reloc_type (relval)) | ||
56 | { | ||
57 | case FLAT_V850_R_32: | ||
58 | /* Simple 32-bit address. */ | ||
59 | return srp[0] | (srp[1] << 16); | ||
60 | |||
61 | case FLAT_V850_R_HI16S_LO16: | ||
62 | /* The high and low halves of the address are in the 16 | ||
63 | bits at RP, and the 2nd word of the 32-bit instruction | ||
64 | following that, respectively. The low half is _signed_ | ||
65 | so we have to sign-extend it and add it to the upper | ||
66 | half instead of simply or-ing them together. | ||
67 | |||
68 | Unlike most relocated address, this one is stored in | ||
69 | native (little-endian) byte-order to avoid problems with | ||
70 | trashing the low-order bit, so we have to convert to | ||
71 | network-byte-order before returning, as that's what the | ||
72 | caller expects. */ | ||
73 | return htonl ((srp[0] << 16) + srp[2]); | ||
74 | |||
75 | case FLAT_V850_R_HI16S_LO15: | ||
76 | /* The high and low halves of the address are in the 16 | ||
77 | bits at RP, and the upper 15 bits of the 2nd word of the | ||
78 | 32-bit instruction following that, respectively. The | ||
79 | low half is _signed_ so we have to sign-extend it and | ||
80 | add it to the upper half instead of simply or-ing them | ||
81 | together. The lowest bit is always zero. | ||
82 | |||
83 | Unlike most relocated address, this one is stored in | ||
84 | native (little-endian) byte-order to avoid problems with | ||
85 | trashing the low-order bit, so we have to convert to | ||
86 | network-byte-order before returning, as that's what the | ||
87 | caller expects. */ | ||
88 | return htonl ((srp[0] << 16) + (srp[2] & ~0x1)); | ||
89 | |||
90 | default: | ||
91 | return ~0; /* bogus value */ | ||
92 | } | ||
93 | } | ||
94 | |||
95 | /* Insert the address ADDR into the symbol reference at RP; | ||
96 | RELVAL is the raw relocation-table entry from which RP is derived. | ||
97 | For the v850, RP should always be half-word aligned. */ | ||
98 | static inline void flat_put_addr_at_rp (unsigned long *rp, unsigned long addr, | ||
99 | unsigned long relval) | ||
100 | { | ||
101 | short *srp = (short *)rp; | ||
102 | |||
103 | switch (flat_v850_get_reloc_type (relval)) { | ||
104 | case FLAT_V850_R_32: | ||
105 | /* Simple 32-bit address. */ | ||
106 | srp[0] = addr & 0xFFFF; | ||
107 | srp[1] = (addr >> 16); | ||
108 | break; | ||
109 | |||
110 | case FLAT_V850_R_HI16S_LO16: | ||
111 | /* The high and low halves of the address are in the 16 | ||
112 | bits at RP, and the 2nd word of the 32-bit instruction | ||
113 | following that, respectively. The low half is _signed_ | ||
114 | so we must carry its sign bit to the upper half before | ||
115 | writing the upper half. */ | ||
116 | srp[0] = (addr >> 16) + ((addr >> 15) & 0x1); | ||
117 | srp[2] = addr & 0xFFFF; | ||
118 | break; | ||
119 | |||
120 | case FLAT_V850_R_HI16S_LO15: | ||
121 | /* The high and low halves of the address are in the 16 | ||
122 | bits at RP, and the upper 15 bits of the 2nd word of the | ||
123 | 32-bit instruction following that, respectively. The | ||
124 | low half is _signed_ so we must carry its sign bit to | ||
125 | the upper half before writing the upper half. The | ||
126 | lowest bit we preserve from the existing instruction. */ | ||
127 | srp[0] = (addr >> 16) + ((addr >> 15) & 0x1); | ||
128 | srp[2] = (addr & 0xFFFE) | (srp[2] & 0x1); | ||
129 | break; | ||
130 | } | ||
131 | } | ||
132 | |||
133 | #endif /* __V850_FLAT_H__ */ | ||
diff --git a/include/asm-v850/fpga85e2c.h b/include/asm-v850/fpga85e2c.h deleted file mode 100644 index 23aae666c718..000000000000 --- a/include/asm-v850/fpga85e2c.h +++ /dev/null | |||
@@ -1,82 +0,0 @@ | |||
1 | /* | ||
2 | * include/asm-v850/fpga85e2c.h -- Machine-dependent defs for | ||
3 | * FPGA implementation of V850E2/NA85E2C | ||
4 | * | ||
5 | * Copyright (C) 2002,03 NEC Electronics Corporation | ||
6 | * Copyright (C) 2002,03 Miles Bader <miles@gnu.org> | ||
7 | * | ||
8 | * This file is subject to the terms and conditions of the GNU General | ||
9 | * Public License. See the file COPYING in the main directory of this | ||
10 | * archive for more details. | ||
11 | * | ||
12 | * Written by Miles Bader <miles@gnu.org> | ||
13 | */ | ||
14 | |||
15 | #ifndef __V850_FPGA85E2C_H__ | ||
16 | #define __V850_FPGA85E2C_H__ | ||
17 | |||
18 | #include <asm/v850e2.h> | ||
19 | #include <asm/clinkage.h> | ||
20 | |||
21 | |||
22 | #define CPU_MODEL "v850e2/fpga85e2c" | ||
23 | #define CPU_MODEL_LONG "NEC V850E2/NA85E2C" | ||
24 | #define PLATFORM "fpga85e2c" | ||
25 | #define PLATFORM_LONG "NA85E2C FPGA implementation" | ||
26 | |||
27 | |||
28 | /* `external ram'. */ | ||
29 | #define ERAM_ADDR 0 | ||
30 | #define ERAM_SIZE 0x00100000 /* 1MB */ | ||
31 | |||
32 | |||
33 | /* FPGA specific control registers. */ | ||
34 | |||
35 | /* Writing a non-zero value to FLGREG(0) will signal the controlling CPU | ||
36 | to stop execution. */ | ||
37 | #define FLGREG_ADDR(n) (0xFFE80100 + 2*(n)) | ||
38 | #define FLGREG(n) (*(volatile unsigned char *)FLGREG_ADDR (n)) | ||
39 | #define FLGREG_NUM 2 | ||
40 | |||
41 | #define CSDEV_ADDR(n) (0xFFE80110 + 2*(n)) | ||
42 | #define CSDEV(n) (*(volatile unsigned char *)CSDEV_ADDR (n)) | ||
43 | |||
44 | |||
45 | /* Timer interrupts 0-3, interrupt at intervals from CLK/4096 to CLK/16384. */ | ||
46 | #define IRQ_RPU(n) (60 + (n)) | ||
47 | #define IRQ_RPU_NUM 4 | ||
48 | |||
49 | /* For <asm/irq.h> */ | ||
50 | #define NUM_CPU_IRQS 64 | ||
51 | |||
52 | |||
53 | /* General-purpose timer. */ | ||
54 | /* control/status register (can only be read/written via bit insns) */ | ||
55 | #define RPU_GTMC_ADDR 0xFFFFFB00 | ||
56 | #define RPU_GTMC (*(volatile unsigned char *)RPU_GTMC_ADDR) | ||
57 | #define RPU_GTMC_CE_BIT 7 /* clock enable (control) */ | ||
58 | #define RPU_GTMC_OV_BIT 6 /* overflow (status) */ | ||
59 | #define RPU_GTMC_CLK_BIT 1 /* 0 = .5 MHz CLK, 1 = 1 Mhz (control) */ | ||
60 | /* 32-bit count (8 least-significant bits are always zero). */ | ||
61 | #define RPU_GTM_ADDR 0xFFFFFB28 | ||
62 | #define RPU_GTM (*(volatile unsigned long *)RPU_GTMC_ADDR) | ||
63 | |||
64 | |||
65 | /* For <asm/page.h> */ | ||
66 | #define PAGE_OFFSET ERAM_ADDR /* minimum allocatable address */ | ||
67 | |||
68 | |||
69 | /* For <asm/entry.h> */ | ||
70 | /* `R0 RAM', used for a few miscellaneous variables that must be accessible | ||
71 | using a load instruction relative to R0. The FPGA implementation | ||
72 | actually has no on-chip RAM, so we use part of main ram just after the | ||
73 | interrupt vectors. */ | ||
74 | #ifdef __ASSEMBLY__ | ||
75 | #define R0_RAM_ADDR lo(C_SYMBOL_NAME(_r0_ram)) | ||
76 | #else | ||
77 | extern char _r0_ram; | ||
78 | #define R0_RAM_ADDR ((unsigned long)&_r0_ram); | ||
79 | #endif | ||
80 | |||
81 | |||
82 | #endif /* __V850_FPGA85E2C_H__ */ | ||
diff --git a/include/asm-v850/futex.h b/include/asm-v850/futex.h deleted file mode 100644 index 6a332a9f099c..000000000000 --- a/include/asm-v850/futex.h +++ /dev/null | |||
@@ -1,6 +0,0 @@ | |||
1 | #ifndef _ASM_FUTEX_H | ||
2 | #define _ASM_FUTEX_H | ||
3 | |||
4 | #include <asm-generic/futex.h> | ||
5 | |||
6 | #endif | ||
diff --git a/include/asm-v850/gbus_int.h b/include/asm-v850/gbus_int.h deleted file mode 100644 index 0c4bce753c7e..000000000000 --- a/include/asm-v850/gbus_int.h +++ /dev/null | |||
@@ -1,97 +0,0 @@ | |||
1 | /* | ||
2 | * include/asm-v850/gbus_int.h -- Midas labs GBUS interrupt support | ||
3 | * | ||
4 | * Copyright (C) 2001,02 NEC Corporation | ||
5 | * Copyright (C) 2001,02 Miles Bader <miles@gnu.org> | ||
6 | * | ||
7 | * This file is subject to the terms and conditions of the GNU General | ||
8 | * Public License. See the file COPYING in the main directory of this | ||
9 | * archive for more details. | ||
10 | * | ||
11 | * Written by Miles Bader <miles@gnu.org> | ||
12 | */ | ||
13 | |||
14 | #ifndef __V850_GBUS_INT_H__ | ||
15 | #define __V850_GBUS_INT_H__ | ||
16 | |||
17 | |||
18 | /* The GBUS interrupt interface has 32 interrupts shared among 4 | ||
19 | processor interrupts. The 32 GBUS interrupts are divided into two | ||
20 | sets of 16 each, for allocating among control registers, etc (there | ||
21 | are two of each control register, with bits 0-15 controlling an | ||
22 | interrupt each). */ | ||
23 | |||
24 | /* The GBUS interrupts themselves. */ | ||
25 | #define IRQ_GBUS_INT(n) (GBUS_INT_BASE_IRQ + (n)) | ||
26 | #define IRQ_GBUS_INT_NUM 32 | ||
27 | |||
28 | /* Control registers. */ | ||
29 | #define GBUS_INT_STATUS_ADDR(w) (GBUS_INT_BASE_ADDR + (w)*0x40) | ||
30 | #define GBUS_INT_STATUS(w) (*(volatile u16 *)GBUS_INT_STATUS_ADDR(w)) | ||
31 | #define GBUS_INT_CLEAR_ADDR(w) (GBUS_INT_BASE_ADDR + 0x10 + (w)*0x40) | ||
32 | #define GBUS_INT_CLEAR(w) (*(volatile u16 *)GBUS_INT_CLEAR_ADDR(w)) | ||
33 | #define GBUS_INT_EDGE_ADDR(w) (GBUS_INT_BASE_ADDR + 0x20 + (w)*0x40) | ||
34 | #define GBUS_INT_EDGE(w) (*(volatile u16 *)GBUS_INT_EDGE_ADDR(w)) | ||
35 | #define GBUS_INT_POLARITY_ADDR(w) (GBUS_INT_BASE_ADDR + 0x30 + (w)*0x40) | ||
36 | #define GBUS_INT_POLARITY(w) (*(volatile u16 *)GBUS_INT_POLARITY_ADDR(w)) | ||
37 | /* This allows enabling interrupt bits in word W for interrupt GINTn. */ | ||
38 | #define GBUS_INT_ENABLE_ADDR(w, n) \ | ||
39 | (GBUS_INT_BASE_ADDR + 0x100 + (w)*0x10 + (n)*0x20) | ||
40 | #define GBUS_INT_ENABLE(w, n) (*(volatile u16 *)GBUS_INT_ENABLE_ADDR(w, n)) | ||
41 | |||
42 | /* Mapping between kernel interrupt numbers and hardware control regs/bits. */ | ||
43 | #define GBUS_INT_BITS_PER_WORD 16 | ||
44 | #define GBUS_INT_NUM_WORDS (IRQ_GBUS_INT_NUM / GBUS_INT_BITS_PER_WORD) | ||
45 | #define GBUS_INT_IRQ_WORD(irq) (((irq) - GBUS_INT_BASE_IRQ) >> 4) | ||
46 | #define GBUS_INT_IRQ_BIT(irq) (((irq) - GBUS_INT_BASE_IRQ) & 0xF) | ||
47 | #define GBUS_INT_IRQ_MASK(irq) (1 << GBUS_INT_IRQ_BIT(irq)) | ||
48 | |||
49 | |||
50 | /* Possible priorities for GBUS interrupts. */ | ||
51 | #define GBUS_INT_PRIORITY_HIGH 2 | ||
52 | #define GBUS_INT_PRIORITY_MEDIUM 4 | ||
53 | #define GBUS_INT_PRIORITY_LOW 6 | ||
54 | |||
55 | |||
56 | #ifndef __ASSEMBLY__ | ||
57 | |||
58 | /* Enable interrupt handling for interrupt IRQ. */ | ||
59 | extern void gbus_int_enable_irq (unsigned irq); | ||
60 | /* Disable interrupt handling for interrupt IRQ. Note that any | ||
61 | interrupts received while disabled will be delivered once the | ||
62 | interrupt is enabled again, unless they are explicitly cleared using | ||
63 | `gbus_int_clear_pending_irq'. */ | ||
64 | extern void gbus_int_disable_irq (unsigned irq); | ||
65 | /* Return true if interrupt handling for interrupt IRQ is enabled. */ | ||
66 | extern int gbus_int_irq_enabled (unsigned irq); | ||
67 | /* Disable all GBUS irqs. */ | ||
68 | extern void gbus_int_disable_irqs (void); | ||
69 | /* Clear any pending interrupts for IRQ. */ | ||
70 | extern void gbus_int_clear_pending_irq (unsigned irq); | ||
71 | /* Return true if interrupt IRQ is pending (but disabled). */ | ||
72 | extern int gbus_int_irq_pending (unsigned irq); | ||
73 | |||
74 | |||
75 | struct gbus_int_irq_init { | ||
76 | const char *name; /* name of interrupt type */ | ||
77 | |||
78 | /* Range of kernel irq numbers for this type: | ||
79 | BASE, BASE+INTERVAL, ..., BASE+INTERVAL*NUM */ | ||
80 | unsigned base, num, interval; | ||
81 | |||
82 | unsigned priority; /* interrupt priority to assign */ | ||
83 | }; | ||
84 | struct hw_interrupt_type; /* fwd decl */ | ||
85 | |||
86 | /* Initialize HW_IRQ_TYPES for GBUS irqs described in array | ||
87 | INITS (which is terminated by an entry with the name field == 0). */ | ||
88 | extern void gbus_int_init_irq_types (struct gbus_int_irq_init *inits, | ||
89 | struct hw_interrupt_type *hw_irq_types); | ||
90 | |||
91 | /* Initialize GBUS interrupts. */ | ||
92 | extern void gbus_int_init_irqs (void); | ||
93 | |||
94 | #endif /* !__ASSEMBLY__ */ | ||
95 | |||
96 | |||
97 | #endif /* __V850_GBUS_INT_H__ */ | ||
diff --git a/include/asm-v850/hardirq.h b/include/asm-v850/hardirq.h deleted file mode 100644 index 04e20127c5af..000000000000 --- a/include/asm-v850/hardirq.h +++ /dev/null | |||
@@ -1,28 +0,0 @@ | |||
1 | #ifndef __V850_HARDIRQ_H__ | ||
2 | #define __V850_HARDIRQ_H__ | ||
3 | |||
4 | #include <linux/threads.h> | ||
5 | #include <linux/cache.h> | ||
6 | |||
7 | #include <asm/irq.h> | ||
8 | |||
9 | typedef struct { | ||
10 | unsigned int __softirq_pending; | ||
11 | } ____cacheline_aligned irq_cpustat_t; | ||
12 | |||
13 | #include <linux/irq_cpustat.h> /* Standard mappings for irq_cpustat_t above */ | ||
14 | |||
15 | #define HARDIRQ_BITS 8 | ||
16 | |||
17 | /* | ||
18 | * The hardirq mask has to be large enough to have | ||
19 | * space for potentially all IRQ sources in the system | ||
20 | * nesting on a single CPU: | ||
21 | */ | ||
22 | #if (1 << HARDIRQ_BITS) < NR_IRQS | ||
23 | # error HARDIRQ_BITS is too low! | ||
24 | #endif | ||
25 | |||
26 | void ack_bad_irq(unsigned int irq); | ||
27 | |||
28 | #endif /* __V850_HARDIRQ_H__ */ | ||
diff --git a/include/asm-v850/highres_timer.h b/include/asm-v850/highres_timer.h deleted file mode 100644 index 486fb49ceab6..000000000000 --- a/include/asm-v850/highres_timer.h +++ /dev/null | |||
@@ -1,44 +0,0 @@ | |||
1 | /* | ||
2 | * include/asm-v850/highres_timer.h -- High resolution timing routines | ||
3 | * | ||
4 | * Copyright (C) 2001,03 NEC Electronics Corporation | ||
5 | * Copyright (C) 2001,03 Miles Bader <miles@gnu.org> | ||
6 | * | ||
7 | * This file is subject to the terms and conditions of the GNU General | ||
8 | * Public License. See the file COPYING in the main directory of this | ||
9 | * archive for more details. | ||
10 | * | ||
11 | * Written by Miles Bader <miles@gnu.org> | ||
12 | */ | ||
13 | |||
14 | #ifndef __V850_HIGHRES_TIMER_H__ | ||
15 | #define __V850_HIGHRES_TIMER_H__ | ||
16 | |||
17 | #ifndef __ASSEMBLY__ | ||
18 | #include <linux/time.h> | ||
19 | #endif | ||
20 | |||
21 | #include <asm/entry.h> | ||
22 | |||
23 | |||
24 | /* Frequency of the `slow ticks' (one tick each time the fast-tick | ||
25 | counter overflows). */ | ||
26 | #define HIGHRES_TIMER_SLOW_TICK_RATE 25 | ||
27 | |||
28 | /* Which timer in the V850E `Timer D' we use. */ | ||
29 | #define HIGHRES_TIMER_TIMER_D_UNIT 3 | ||
30 | |||
31 | |||
32 | #ifndef __ASSEMBLY__ | ||
33 | |||
34 | extern void highres_timer_start (void), highres_timer_stop (void); | ||
35 | extern void highres_timer_reset (void); | ||
36 | extern void highres_timer_read_ticks (u32 *slow_ticks, u32 *fast_ticks); | ||
37 | extern void highres_timer_ticks_to_timeval (u32 slow_ticks, u32 fast_ticks, | ||
38 | struct timeval *tv); | ||
39 | extern void highres_timer_read (struct timeval *tv); | ||
40 | |||
41 | #endif /* !__ASSEMBLY__ */ | ||
42 | |||
43 | |||
44 | #endif /* __V850_HIGHRES_TIMER_H__ */ | ||
diff --git a/include/asm-v850/hw_irq.h b/include/asm-v850/hw_irq.h deleted file mode 100644 index 043e94bb6bd8..000000000000 --- a/include/asm-v850/hw_irq.h +++ /dev/null | |||
@@ -1,4 +0,0 @@ | |||
1 | #ifndef __V850_HW_IRQ_H__ | ||
2 | #define __V850_HW_IRQ_H__ | ||
3 | |||
4 | #endif /* __V850_HW_IRQ_H__ */ | ||
diff --git a/include/asm-v850/io.h b/include/asm-v850/io.h deleted file mode 100644 index cdad251fba9f..000000000000 --- a/include/asm-v850/io.h +++ /dev/null | |||
@@ -1,142 +0,0 @@ | |||
1 | /* | ||
2 | * include/asm-v850/io.h -- Misc I/O operations | ||
3 | * | ||
4 | * Copyright (C) 2001,02,03,04,05 NEC Electronics Corporation | ||
5 | * Copyright (C) 2001,02,03,04,05 Miles Bader <miles@gnu.org> | ||
6 | * | ||
7 | * This file is subject to the terms and conditions of the GNU General | ||
8 | * Public License. See the file COPYING in the main directory of this | ||
9 | * archive for more details. | ||
10 | * | ||
11 | * Written by Miles Bader <miles@gnu.org> | ||
12 | */ | ||
13 | |||
14 | #ifndef __V850_IO_H__ | ||
15 | #define __V850_IO_H__ | ||
16 | |||
17 | #define IO_SPACE_LIMIT 0xFFFFFFFF | ||
18 | |||
19 | #define readb(addr) \ | ||
20 | ({ unsigned char __v = (*(volatile unsigned char *) (addr)); __v; }) | ||
21 | #define readw(addr) \ | ||
22 | ({ unsigned short __v = (*(volatile unsigned short *) (addr)); __v; }) | ||
23 | #define readl(addr) \ | ||
24 | ({ unsigned long __v = (*(volatile unsigned long *) (addr)); __v; }) | ||
25 | |||
26 | #define readb_relaxed(a) readb(a) | ||
27 | #define readw_relaxed(a) readw(a) | ||
28 | #define readl_relaxed(a) readl(a) | ||
29 | |||
30 | #define writeb(val, addr) \ | ||
31 | (void)((*(volatile unsigned char *) (addr)) = (val)) | ||
32 | #define writew(val, addr) \ | ||
33 | (void)((*(volatile unsigned short *) (addr)) = (val)) | ||
34 | #define writel(val, addr) \ | ||
35 | (void)((*(volatile unsigned int *) (addr)) = (val)) | ||
36 | |||
37 | #define __raw_readb readb | ||
38 | #define __raw_readw readw | ||
39 | #define __raw_readl readl | ||
40 | #define __raw_writeb writeb | ||
41 | #define __raw_writew writew | ||
42 | #define __raw_writel writel | ||
43 | |||
44 | #define inb(addr) readb (addr) | ||
45 | #define inw(addr) readw (addr) | ||
46 | #define inl(addr) readl (addr) | ||
47 | #define outb(x, addr) ((void) writeb (x, addr)) | ||
48 | #define outw(x, addr) ((void) writew (x, addr)) | ||
49 | #define outl(x, addr) ((void) writel (x, addr)) | ||
50 | |||
51 | #define inb_p(port) inb((port)) | ||
52 | #define outb_p(val, port) outb((val), (port)) | ||
53 | #define inw_p(port) inw((port)) | ||
54 | #define outw_p(val, port) outw((val), (port)) | ||
55 | #define inl_p(port) inl((port)) | ||
56 | #define outl_p(val, port) outl((val), (port)) | ||
57 | |||
58 | static inline void insb (unsigned long port, void *dst, unsigned long count) | ||
59 | { | ||
60 | unsigned char *p = dst; | ||
61 | while (count--) | ||
62 | *p++ = inb (port); | ||
63 | } | ||
64 | static inline void insw (unsigned long port, void *dst, unsigned long count) | ||
65 | { | ||
66 | unsigned short *p = dst; | ||
67 | while (count--) | ||
68 | *p++ = inw (port); | ||
69 | } | ||
70 | static inline void insl (unsigned long port, void *dst, unsigned long count) | ||
71 | { | ||
72 | unsigned long *p = dst; | ||
73 | while (count--) | ||
74 | *p++ = inl (port); | ||
75 | } | ||
76 | |||
77 | static inline void | ||
78 | outsb (unsigned long port, const void *src, unsigned long count) | ||
79 | { | ||
80 | const unsigned char *p = src; | ||
81 | while (count--) | ||
82 | outb (*p++, port); | ||
83 | } | ||
84 | static inline void | ||
85 | outsw (unsigned long port, const void *src, unsigned long count) | ||
86 | { | ||
87 | const unsigned short *p = src; | ||
88 | while (count--) | ||
89 | outw (*p++, port); | ||
90 | } | ||
91 | static inline void | ||
92 | outsl (unsigned long port, const void *src, unsigned long count) | ||
93 | { | ||
94 | const unsigned long *p = src; | ||
95 | while (count--) | ||
96 | outl (*p++, port); | ||
97 | } | ||
98 | |||
99 | |||
100 | /* Some places try to pass in an loff_t for PHYSADDR (?!), so we cast it to | ||
101 | long before casting it to a pointer to avoid compiler warnings. */ | ||
102 | #define ioremap(physaddr, size) ((void __iomem *)(unsigned long)(physaddr)) | ||
103 | #define iounmap(addr) ((void)0) | ||
104 | |||
105 | #define ioremap_nocache(physaddr, size) ioremap (physaddr, size) | ||
106 | #define ioremap_writethrough(physaddr, size) ioremap (physaddr, size) | ||
107 | #define ioremap_fullcache(physaddr, size) ioremap (physaddr, size) | ||
108 | |||
109 | #define ioread8(addr) readb (addr) | ||
110 | #define ioread16(addr) readw (addr) | ||
111 | #define ioread32(addr) readl (addr) | ||
112 | #define iowrite8(val, addr) writeb (val, addr) | ||
113 | #define iowrite16(val, addr) writew (val, addr) | ||
114 | #define iowrite32(val, addr) writel (val, addr) | ||
115 | |||
116 | #define mmiowb() | ||
117 | |||
118 | #define page_to_phys(page) ((page - mem_map) << PAGE_SHIFT) | ||
119 | #if 0 | ||
120 | /* This is really stupid; don't define it. */ | ||
121 | #define page_to_bus(page) page_to_phys (page) | ||
122 | #endif | ||
123 | |||
124 | /* Conversion between virtual and physical mappings. */ | ||
125 | #define phys_to_virt(addr) ((void *)__phys_to_virt (addr)) | ||
126 | #define virt_to_phys(addr) ((unsigned long)__virt_to_phys (addr)) | ||
127 | |||
128 | #define memcpy_fromio(dst, src, len) memcpy (dst, (void *)src, len) | ||
129 | #define memcpy_toio(dst, src, len) memcpy ((void *)dst, src, len) | ||
130 | |||
131 | /* | ||
132 | * Convert a physical pointer to a virtual kernel pointer for /dev/mem | ||
133 | * access | ||
134 | */ | ||
135 | #define xlate_dev_mem_ptr(p) __va(p) | ||
136 | |||
137 | /* | ||
138 | * Convert a virtual cached pointer to an uncached pointer | ||
139 | */ | ||
140 | #define xlate_dev_kmem_ptr(p) p | ||
141 | |||
142 | #endif /* __V850_IO_H__ */ | ||
diff --git a/include/asm-v850/ioctl.h b/include/asm-v850/ioctl.h deleted file mode 100644 index b279fe06dfe5..000000000000 --- a/include/asm-v850/ioctl.h +++ /dev/null | |||
@@ -1 +0,0 @@ | |||
1 | #include <asm-generic/ioctl.h> | ||
diff --git a/include/asm-v850/ioctls.h b/include/asm-v850/ioctls.h deleted file mode 100644 index 5313abd5f388..000000000000 --- a/include/asm-v850/ioctls.h +++ /dev/null | |||
@@ -1,84 +0,0 @@ | |||
1 | #ifndef __V850_IOCTLS_H__ | ||
2 | #define __V850_IOCTLS_H__ | ||
3 | |||
4 | #include <asm/ioctl.h> | ||
5 | |||
6 | /* 0x54 is just a magic number to make these relatively unique ('T') */ | ||
7 | |||
8 | #define TCGETS 0x5401 | ||
9 | #define TCSETS 0x5402 | ||
10 | #define TCSETSW 0x5403 | ||
11 | #define TCSETSF 0x5404 | ||
12 | #define TCGETA 0x5405 | ||
13 | #define TCSETA 0x5406 | ||
14 | #define TCSETAW 0x5407 | ||
15 | #define TCSETAF 0x5408 | ||
16 | #define TCSBRK 0x5409 | ||
17 | #define TCXONC 0x540A | ||
18 | #define TCFLSH 0x540B | ||
19 | #define TIOCEXCL 0x540C | ||
20 | #define TIOCNXCL 0x540D | ||
21 | #define TIOCSCTTY 0x540E | ||
22 | #define TIOCGPGRP 0x540F | ||
23 | #define TIOCSPGRP 0x5410 | ||
24 | #define TIOCOUTQ 0x5411 | ||
25 | #define TIOCSTI 0x5412 | ||
26 | #define TIOCGWINSZ 0x5413 | ||
27 | #define TIOCSWINSZ 0x5414 | ||
28 | #define TIOCMGET 0x5415 | ||
29 | #define TIOCMBIS 0x5416 | ||
30 | #define TIOCMBIC 0x5417 | ||
31 | #define TIOCMSET 0x5418 | ||
32 | #define TIOCGSOFTCAR 0x5419 | ||
33 | #define TIOCSSOFTCAR 0x541A | ||
34 | #define FIONREAD 0x541B | ||
35 | #define TIOCINQ FIONREAD | ||
36 | #define TIOCLINUX 0x541C | ||
37 | #define TIOCCONS 0x541D | ||
38 | #define TIOCGSERIAL 0x541E | ||
39 | #define TIOCSSERIAL 0x541F | ||
40 | #define TIOCPKT 0x5420 | ||
41 | #define FIONBIO 0x5421 | ||
42 | #define TIOCNOTTY 0x5422 | ||
43 | #define TIOCSETD 0x5423 | ||
44 | #define TIOCGETD 0x5424 | ||
45 | #define TCSBRKP 0x5425 /* Needed for POSIX tcsendbreak() */ | ||
46 | #define TIOCSBRK 0x5427 /* BSD compatibility */ | ||
47 | #define TIOCCBRK 0x5428 /* BSD compatibility */ | ||
48 | #define TIOCGSID 0x5429 /* Return the session ID of FD */ | ||
49 | #define TCGETS2 _IOR('T',0x2A, struct termios2) | ||
50 | #define TCSETS2 _IOW('T',0x2B, struct termios2) | ||
51 | #define TCSETSW2 _IOW('T',0x2C, struct termios2) | ||
52 | #define TCSETSF2 _IOW('T',0x2D, struct termios2) | ||
53 | #define TIOCGPTN _IOR('T',0x30, unsigned int) /* Get Pty Number (of pty-mux device) */ | ||
54 | #define TIOCSPTLCK _IOW('T',0x31, int) /* Lock/unlock Pty */ | ||
55 | |||
56 | #define FIONCLEX 0x5450 /* these numbers need to be adjusted. */ | ||
57 | #define FIOCLEX 0x5451 | ||
58 | #define FIOASYNC 0x5452 | ||
59 | #define TIOCSERCONFIG 0x5453 | ||
60 | #define TIOCSERGWILD 0x5454 | ||
61 | #define TIOCSERSWILD 0x5455 | ||
62 | #define TIOCGLCKTRMIOS 0x5456 | ||
63 | #define TIOCSLCKTRMIOS 0x5457 | ||
64 | #define TIOCSERGSTRUCT 0x5458 /* For debugging only */ | ||
65 | #define TIOCSERGETLSR 0x5459 /* Get line status register */ | ||
66 | #define TIOCSERGETMULTI 0x545A /* Get multiport config */ | ||
67 | #define TIOCSERSETMULTI 0x545B /* Set multiport config */ | ||
68 | |||
69 | #define TIOCMIWAIT 0x545C /* wait for a change on serial input line(s) */ | ||
70 | #define TIOCGICOUNT 0x545D /* read serial port inline interrupt counts */ | ||
71 | #define FIOQSIZE 0x545E | ||
72 | |||
73 | /* Used for packet mode */ | ||
74 | #define TIOCPKT_DATA 0 | ||
75 | #define TIOCPKT_FLUSHREAD 1 | ||
76 | #define TIOCPKT_FLUSHWRITE 2 | ||
77 | #define TIOCPKT_STOP 4 | ||
78 | #define TIOCPKT_START 8 | ||
79 | #define TIOCPKT_NOSTOP 16 | ||
80 | #define TIOCPKT_DOSTOP 32 | ||
81 | |||
82 | #define TIOCSER_TEMT 0x01 /* Transmitter physically empty */ | ||
83 | |||
84 | #endif /* __V850_IOCTLS_H__ */ | ||
diff --git a/include/asm-v850/ipcbuf.h b/include/asm-v850/ipcbuf.h deleted file mode 100644 index d8cbe9886d95..000000000000 --- a/include/asm-v850/ipcbuf.h +++ /dev/null | |||
@@ -1,29 +0,0 @@ | |||
1 | #ifndef __V850E_IPCBUF_H__ | ||
2 | #define __V850E_IPCBUF_H__ | ||
3 | |||
4 | /* | ||
5 | * The user_ipc_perm structure for v850e architecture. | ||
6 | * Note extra padding because this structure is passed back and forth | ||
7 | * between kernel and user space. | ||
8 | * | ||
9 | * Pad space is left for: | ||
10 | * - 32-bit mode_t and seq | ||
11 | * - 2 miscellaneous 32-bit values | ||
12 | */ | ||
13 | |||
14 | struct ipc64_perm | ||
15 | { | ||
16 | __kernel_key_t key; | ||
17 | __kernel_uid32_t uid; | ||
18 | __kernel_gid32_t gid; | ||
19 | __kernel_uid32_t cuid; | ||
20 | __kernel_gid32_t cgid; | ||
21 | __kernel_mode_t mode; | ||
22 | unsigned short __pad1; | ||
23 | unsigned short seq; | ||
24 | unsigned short __pad2; | ||
25 | unsigned long __unused1; | ||
26 | unsigned long __unused2; | ||
27 | }; | ||
28 | |||
29 | #endif /* __V850E_IPCBUF_H__ */ | ||
diff --git a/include/asm-v850/irq.h b/include/asm-v850/irq.h deleted file mode 100644 index 7d0d4cd1ce54..000000000000 --- a/include/asm-v850/irq.h +++ /dev/null | |||
@@ -1,55 +0,0 @@ | |||
1 | /* | ||
2 | * include/asm-v850/irq.h -- Machine interrupt handling | ||
3 | * | ||
4 | * Copyright (C) 2001,02,04 NEC Electronics Corporation | ||
5 | * Copyright (C) 2001,02,04 Miles Bader <miles@gnu.org> | ||
6 | * | ||
7 | * This file is subject to the terms and conditions of the GNU General | ||
8 | * Public License. See the file COPYING in the main directory of this | ||
9 | * archive for more details. | ||
10 | * | ||
11 | * Written by Miles Bader <miles@gnu.org> | ||
12 | */ | ||
13 | |||
14 | #ifndef __V850_IRQ_H__ | ||
15 | #define __V850_IRQ_H__ | ||
16 | |||
17 | #include <asm/machdep.h> | ||
18 | |||
19 | /* Default NUM_MACH_IRQS. */ | ||
20 | #ifndef NUM_MACH_IRQS | ||
21 | #define NUM_MACH_IRQS NUM_CPU_IRQS | ||
22 | #endif | ||
23 | |||
24 | /* NMIs have IRQ numbers from FIRST_NMI to FIRST_NMI+NUM_NMIS-1. */ | ||
25 | #define FIRST_NMI NUM_MACH_IRQS | ||
26 | #define IRQ_NMI(n) (FIRST_NMI + (n)) | ||
27 | /* v850 processors have 3 non-maskable interrupts. */ | ||
28 | #define NUM_NMIS 3 | ||
29 | |||
30 | /* Includes both maskable and non-maskable irqs. */ | ||
31 | #define NR_IRQS (NUM_MACH_IRQS + NUM_NMIS) | ||
32 | |||
33 | |||
34 | #ifndef __ASSEMBLY__ | ||
35 | |||
36 | struct pt_regs; | ||
37 | struct hw_interrupt_type; | ||
38 | struct irqaction; | ||
39 | |||
40 | #define irq_canonicalize(irq) (irq) | ||
41 | |||
42 | /* Initialize irq handling for IRQs. | ||
43 | BASE_IRQ, BASE_IRQ+INTERVAL, ..., BASE_IRQ+NUM*INTERVAL | ||
44 | to IRQ_TYPE. An IRQ_TYPE of 0 means to use a generic interrupt type. */ | ||
45 | extern void | ||
46 | init_irq_handlers (int base_irq, int num, int interval, | ||
47 | struct hw_interrupt_type *irq_type); | ||
48 | |||
49 | /* Handle interrupt IRQ. REGS are the registers at the time of ther | ||
50 | interrupt. */ | ||
51 | extern unsigned int handle_irq (int irq, struct pt_regs *regs); | ||
52 | |||
53 | #endif /* !__ASSEMBLY__ */ | ||
54 | |||
55 | #endif /* __V850_IRQ_H__ */ | ||
diff --git a/include/asm-v850/irq_regs.h b/include/asm-v850/irq_regs.h deleted file mode 100644 index 3dd9c0b70270..000000000000 --- a/include/asm-v850/irq_regs.h +++ /dev/null | |||
@@ -1 +0,0 @@ | |||
1 | #include <asm-generic/irq_regs.h> | ||
diff --git a/include/asm-v850/kdebug.h b/include/asm-v850/kdebug.h deleted file mode 100644 index 6ece1b037665..000000000000 --- a/include/asm-v850/kdebug.h +++ /dev/null | |||
@@ -1 +0,0 @@ | |||
1 | #include <asm-generic/kdebug.h> | ||
diff --git a/include/asm-v850/kmap_types.h b/include/asm-v850/kmap_types.h deleted file mode 100644 index 3288976b161f..000000000000 --- a/include/asm-v850/kmap_types.h +++ /dev/null | |||
@@ -1,19 +0,0 @@ | |||
1 | #ifndef __V850_KMAP_TYPES_H__ | ||
2 | #define __V850_KMAP_TYPES_H__ | ||
3 | |||
4 | enum km_type { | ||
5 | KM_BOUNCE_READ, | ||
6 | KM_SKB_SUNRPC_DATA, | ||
7 | KM_SKB_DATA_SOFTIRQ, | ||
8 | KM_USER0, | ||
9 | KM_USER1, | ||
10 | KM_BIO_SRC_IRQ, | ||
11 | KM_BIO_DST_IRQ, | ||
12 | KM_PTE0, | ||
13 | KM_PTE1, | ||
14 | KM_IRQ0, | ||
15 | KM_IRQ1, | ||
16 | KM_TYPE_NR | ||
17 | }; | ||
18 | |||
19 | #endif /* __V850_KMAP_TYPES_H__ */ | ||
diff --git a/include/asm-v850/kvm.h b/include/asm-v850/kvm.h deleted file mode 100644 index 3f729b79febc..000000000000 --- a/include/asm-v850/kvm.h +++ /dev/null | |||
@@ -1,6 +0,0 @@ | |||
1 | #ifndef __LINUX_KVM_V850_H | ||
2 | #define __LINUX_KVM_V850_H | ||
3 | |||
4 | /* v850 does not support KVM */ | ||
5 | |||
6 | #endif | ||
diff --git a/include/asm-v850/linkage.h b/include/asm-v850/linkage.h deleted file mode 100644 index b6185d3cfe68..000000000000 --- a/include/asm-v850/linkage.h +++ /dev/null | |||
@@ -1,8 +0,0 @@ | |||
1 | #ifndef __ASM_LINKAGE_H | ||
2 | #define __ASM_LINKAGE_H | ||
3 | |||
4 | #ifdef __ASSEMBLY__ | ||
5 | #include <asm/asm.h> | ||
6 | #endif | ||
7 | |||
8 | #endif | ||
diff --git a/include/asm-v850/local.h b/include/asm-v850/local.h deleted file mode 100644 index 705148abe276..000000000000 --- a/include/asm-v850/local.h +++ /dev/null | |||
@@ -1,6 +0,0 @@ | |||
1 | #ifndef __V850_LOCAL_H__ | ||
2 | #define __V850_LOCAL_H__ | ||
3 | |||
4 | #include <asm-generic/local.h> | ||
5 | |||
6 | #endif /* __V850_LOCAL_H__ */ | ||
diff --git a/include/asm-v850/ma.h b/include/asm-v850/ma.h deleted file mode 100644 index 89e66473a176..000000000000 --- a/include/asm-v850/ma.h +++ /dev/null | |||
@@ -1,101 +0,0 @@ | |||
1 | /* | ||
2 | * include/asm-v850/ma.h -- V850E/MA series of cpu chips | ||
3 | * | ||
4 | * Copyright (C) 2001,02,03 NEC Electronics Corporation | ||
5 | * Copyright (C) 2001,02,03 Miles Bader <miles@gnu.org> | ||
6 | * | ||
7 | * This file is subject to the terms and conditions of the GNU General | ||
8 | * Public License. See the file COPYING in the main directory of this | ||
9 | * archive for more details. | ||
10 | * | ||
11 | * Written by Miles Bader <miles@gnu.org> | ||
12 | */ | ||
13 | |||
14 | #ifndef __V850_MA_H__ | ||
15 | #define __V850_MA_H__ | ||
16 | |||
17 | /* The MA series uses the V850E cpu core. */ | ||
18 | #include <asm/v850e.h> | ||
19 | |||
20 | |||
21 | /* For <asm/entry.h> */ | ||
22 | /* We use on-chip RAM, for a few miscellaneous variables that must be | ||
23 | accessible using a load instruction relative to R0. The amount | ||
24 | varies between chip models, but there's always at least 4K, and it | ||
25 | should always start at FFFFC000. */ | ||
26 | #define R0_RAM_ADDR 0xFFFFC000 | ||
27 | |||
28 | |||
29 | /* MA series UART details. */ | ||
30 | #define V850E_UART_BASE_FREQ CPU_CLOCK_FREQ | ||
31 | |||
32 | /* This is a function that gets called before configuring the UART. */ | ||
33 | #define V850E_UART_PRE_CONFIGURE ma_uart_pre_configure | ||
34 | #ifndef __ASSEMBLY__ | ||
35 | extern void ma_uart_pre_configure (unsigned chan, | ||
36 | unsigned cflags, unsigned baud); | ||
37 | #endif | ||
38 | |||
39 | |||
40 | /* MA series timer C details. */ | ||
41 | #define V850E_TIMER_C_BASE_ADDR 0xFFFFF600 | ||
42 | |||
43 | |||
44 | /* MA series timer D details. */ | ||
45 | #define V850E_TIMER_D_BASE_ADDR 0xFFFFF540 | ||
46 | #define V850E_TIMER_D_TMD_BASE_ADDR (V850E_TIMER_D_BASE_ADDR + 0x0) | ||
47 | #define V850E_TIMER_D_CMD_BASE_ADDR (V850E_TIMER_D_BASE_ADDR + 0x2) | ||
48 | #define V850E_TIMER_D_TMCD_BASE_ADDR (V850E_TIMER_D_BASE_ADDR + 0x4) | ||
49 | |||
50 | #define V850E_TIMER_D_BASE_FREQ CPU_CLOCK_FREQ | ||
51 | |||
52 | |||
53 | /* Port 0 */ | ||
54 | /* Direct I/O. Bits 0-7 are pins P00-P07. */ | ||
55 | #define MA_PORT0_IO_ADDR 0xFFFFF400 | ||
56 | #define MA_PORT0_IO (*(volatile u8 *)MA_PORT0_IO_ADDR) | ||
57 | /* Port mode (for direct I/O, 0 = output, 1 = input). */ | ||
58 | #define MA_PORT0_PM_ADDR 0xFFFFF420 | ||
59 | #define MA_PORT0_PM (*(volatile u8 *)MA_PORT0_PM_ADDR) | ||
60 | /* Port mode control (0 = direct I/O mode, 1 = alternative I/O mode). */ | ||
61 | #define MA_PORT0_PMC_ADDR 0xFFFFF440 | ||
62 | #define MA_PORT0_PMC (*(volatile u8 *)MA_PORT0_PMC_ADDR) | ||
63 | /* Port function control (for P04-P07, 0 = IRQ, 1 = DMARQ). */ | ||
64 | #define MA_PORT0_PFC_ADDR 0xFFFFF460 | ||
65 | #define MA_PORT0_PFC (*(volatile u8 *)MA_PORT0_PFC_ADDR) | ||
66 | |||
67 | /* Port 1 */ | ||
68 | /* Direct I/O. Bits 0-3 are pins P10-P13. */ | ||
69 | #define MA_PORT1_IO_ADDR 0xFFFFF402 | ||
70 | #define MA_PORT1_IO (*(volatile u8 *)MA_PORT1_IO_ADDR) | ||
71 | /* Port mode (for direct I/O, 0 = output, 1 = input). */ | ||
72 | #define MA_PORT1_PM_ADDR 0xFFFFF420 | ||
73 | #define MA_PORT1_PM (*(volatile u8 *)MA_PORT1_PM_ADDR) | ||
74 | /* Port mode control (0 = direct I/O mode, 1 = alternative I/O mode). */ | ||
75 | #define MA_PORT1_PMC_ADDR 0xFFFFF442 | ||
76 | #define MA_PORT1_PMC (*(volatile u8 *)MA_PORT1_PMC_ADDR) | ||
77 | |||
78 | /* Port 4 */ | ||
79 | /* Direct I/O. Bits 0-5 are pins P40-P45. */ | ||
80 | #define MA_PORT4_IO_ADDR 0xFFFFF408 | ||
81 | #define MA_PORT4_IO (*(volatile u8 *)MA_PORT4_IO_ADDR) | ||
82 | /* Port mode (for direct I/O, 0 = output, 1 = input). */ | ||
83 | #define MA_PORT4_PM_ADDR 0xFFFFF428 | ||
84 | #define MA_PORT4_PM (*(volatile u8 *)MA_PORT4_PM_ADDR) | ||
85 | /* Port mode control (0 = direct I/O mode, 1 = alternative I/O mode). */ | ||
86 | #define MA_PORT4_PMC_ADDR 0xFFFFF448 | ||
87 | #define MA_PORT4_PMC (*(volatile u8 *)MA_PORT4_PMC_ADDR) | ||
88 | /* Port function control (for serial interfaces, 0 = CSI, 1 = UART). */ | ||
89 | #define MA_PORT4_PFC_ADDR 0xFFFFF468 | ||
90 | #define MA_PORT4_PFC (*(volatile u8 *)MA_PORT4_PFC_ADDR) | ||
91 | |||
92 | |||
93 | #ifndef __ASSEMBLY__ | ||
94 | |||
95 | /* Initialize MA chip interrupts. */ | ||
96 | extern void ma_init_irqs (void); | ||
97 | |||
98 | #endif /* !__ASSEMBLY__ */ | ||
99 | |||
100 | |||
101 | #endif /* __V850_MA_H__ */ | ||
diff --git a/include/asm-v850/ma1.h b/include/asm-v850/ma1.h deleted file mode 100644 index ede1f1de2b7a..000000000000 --- a/include/asm-v850/ma1.h +++ /dev/null | |||
@@ -1,50 +0,0 @@ | |||
1 | /* | ||
2 | * include/asm-v850/ma1.h -- V850E/MA1 cpu chip | ||
3 | * | ||
4 | * Copyright (C) 2001,02,03 NEC Electronics Corporation | ||
5 | * Copyright (C) 2001,02,03 Miles Bader <miles@gnu.org> | ||
6 | * | ||
7 | * This file is subject to the terms and conditions of the GNU General | ||
8 | * Public License. See the file COPYING in the main directory of this | ||
9 | * archive for more details. | ||
10 | * | ||
11 | * Written by Miles Bader <miles@gnu.org> | ||
12 | */ | ||
13 | |||
14 | #ifndef __V850_MA1_H__ | ||
15 | #define __V850_MA1_H__ | ||
16 | |||
17 | /* Inherit more generic details from MA series. */ | ||
18 | #include <asm/ma.h> | ||
19 | |||
20 | |||
21 | #define CPU_MODEL "v850e/ma1" | ||
22 | #define CPU_MODEL_LONG "NEC V850E/MA1" | ||
23 | |||
24 | |||
25 | /* Hardware-specific interrupt numbers (in the kernel IRQ namespace). */ | ||
26 | #define IRQ_INTOV(n) (n) /* 0-3 */ | ||
27 | #define IRQ_INTOV_NUM 4 | ||
28 | #define IRQ_INTP(n) (0x4 + (n)) /* Pnnn (pin) interrupts */ | ||
29 | #define IRQ_INTP_NUM 24 | ||
30 | #define IRQ_INTCMD(n) (0x1c + (n)) /* interval timer interrupts 0-3 */ | ||
31 | #define IRQ_INTCMD_NUM 4 | ||
32 | #define IRQ_INTDMA(n) (0x20 + (n)) /* DMA interrupts 0-3 */ | ||
33 | #define IRQ_INTDMA_NUM 4 | ||
34 | #define IRQ_INTCSI(n) (0x24 + (n)*4)/* CSI 0-2 transmit/receive completion */ | ||
35 | #define IRQ_INTCSI_NUM 3 | ||
36 | #define IRQ_INTSER(n) (0x25 + (n)*4) /* UART 0-2 reception error */ | ||
37 | #define IRQ_INTSER_NUM 3 | ||
38 | #define IRQ_INTSR(n) (0x26 + (n)*4) /* UART 0-2 reception completion */ | ||
39 | #define IRQ_INTSR_NUM 3 | ||
40 | #define IRQ_INTST(n) (0x27 + (n)*4) /* UART 0-2 transmission completion */ | ||
41 | #define IRQ_INTST_NUM 3 | ||
42 | |||
43 | #define NUM_CPU_IRQS 0x30 | ||
44 | |||
45 | |||
46 | /* The MA1 has a UART with 3 channels. */ | ||
47 | #define V850E_UART_NUM_CHANNELS 3 | ||
48 | |||
49 | |||
50 | #endif /* __V850_MA1_H__ */ | ||
diff --git a/include/asm-v850/machdep.h b/include/asm-v850/machdep.h deleted file mode 100644 index f1e3b8b91508..000000000000 --- a/include/asm-v850/machdep.h +++ /dev/null | |||
@@ -1,60 +0,0 @@ | |||
1 | /* | ||
2 | * include/asm-v850/machdep.h -- Machine-dependent definitions | ||
3 | * | ||
4 | * Copyright (C) 2001,02,03 NEC Electronics Corporation | ||
5 | * Copyright (C) 2001,02,03 Miles Bader <miles@gnu.org> | ||
6 | * | ||
7 | * This file is subject to the terms and conditions of the GNU General | ||
8 | * Public License. See the file COPYING in the main directory of this | ||
9 | * archive for more details. | ||
10 | * | ||
11 | * Written by Miles Bader <miles@gnu.org> | ||
12 | */ | ||
13 | |||
14 | #ifndef __V850_MACHDEP_H__ | ||
15 | #define __V850_MACHDEP_H__ | ||
16 | |||
17 | |||
18 | /* chips */ | ||
19 | #ifdef CONFIG_V850E_MA1 | ||
20 | #include <asm/ma1.h> | ||
21 | #endif | ||
22 | #ifdef CONFIG_V850E_ME2 | ||
23 | #include <asm/me2.h> | ||
24 | #endif | ||
25 | #ifdef CONFIG_V850E_TEG | ||
26 | #include <asm/teg.h> | ||
27 | #endif | ||
28 | |||
29 | /* These are both chips _and_ platforms, so put them in the middle... */ | ||
30 | #ifdef CONFIG_V850E2_ANNA | ||
31 | #include <asm/anna.h> | ||
32 | #endif | ||
33 | #ifdef CONFIG_V850E_AS85EP1 | ||
34 | #include <asm/as85ep1.h> | ||
35 | #endif | ||
36 | |||
37 | /* platforms */ | ||
38 | #ifdef CONFIG_RTE_CB_MA1 | ||
39 | #include <asm/rte_ma1_cb.h> | ||
40 | #endif | ||
41 | #ifdef CONFIG_RTE_CB_ME2 | ||
42 | #include <asm/rte_me2_cb.h> | ||
43 | #endif | ||
44 | #ifdef CONFIG_RTE_CB_NB85E | ||
45 | #include <asm/rte_nb85e_cb.h> | ||
46 | #endif | ||
47 | #ifdef CONFIG_V850E_SIM | ||
48 | #include <asm/sim.h> | ||
49 | #endif | ||
50 | #ifdef CONFIG_V850E2_SIM85E2C | ||
51 | #include <asm/sim85e2c.h> | ||
52 | #endif | ||
53 | #ifdef CONFIG_V850E2_SIM85E2S | ||
54 | #include <asm/sim85e2s.h> | ||
55 | #endif | ||
56 | #ifdef CONFIG_V850E2_FPGA85E2C | ||
57 | #include <asm/fpga85e2c.h> | ||
58 | #endif | ||
59 | |||
60 | #endif /* __V850_MACHDEP_H__ */ | ||
diff --git a/include/asm-v850/macrology.h b/include/asm-v850/macrology.h deleted file mode 100644 index 37abf874832c..000000000000 --- a/include/asm-v850/macrology.h +++ /dev/null | |||
@@ -1,17 +0,0 @@ | |||
1 | /* | ||
2 | * include/asm-v850/macrology.h -- Various useful CPP macros | ||
3 | * | ||
4 | * Copyright (C) 2001 NEC Corporation | ||
5 | * Copyright (C) 2001 Miles Bader <miles@gnu.org> | ||
6 | * | ||
7 | * This file is subject to the terms and conditions of the GNU General | ||
8 | * Public License. See the file COPYING in the main directory of this | ||
9 | * archive for more details. | ||
10 | * | ||
11 | * Written by Miles Bader <miles@gnu.org> | ||
12 | */ | ||
13 | |||
14 | #define macrology_paste(arg1, arg2) macrology_paste_1(arg1, arg2) | ||
15 | #define macrology_paste_1(arg1, arg2) arg1 ## arg2 | ||
16 | #define macrology_stringify(sym) macrology_stringify_1(sym) | ||
17 | #define macrology_stringify_1(sym) #sym | ||
diff --git a/include/asm-v850/me2.h b/include/asm-v850/me2.h deleted file mode 100644 index ac7c9ce0bdc1..000000000000 --- a/include/asm-v850/me2.h +++ /dev/null | |||
@@ -1,182 +0,0 @@ | |||
1 | /* | ||
2 | * include/asm-v850/me2.h -- V850E/ME2 cpu chip | ||
3 | * | ||
4 | * Copyright (C) 2001,02,03 NEC Electronics Corporation | ||
5 | * Copyright (C) 2001,02,03 Miles Bader <miles@gnu.org> | ||
6 | * | ||
7 | * This file is subject to the terms and conditions of the GNU General | ||
8 | * Public License. See the file COPYING in the main directory of this | ||
9 | * archive for more details. | ||
10 | * | ||
11 | * Written by Miles Bader <miles@gnu.org> | ||
12 | */ | ||
13 | |||
14 | #ifndef __V850_ME2_H__ | ||
15 | #define __V850_ME2_H__ | ||
16 | |||
17 | #include <asm/v850e.h> | ||
18 | #include <asm/v850e_cache.h> | ||
19 | |||
20 | |||
21 | #define CPU_MODEL "v850e/me2" | ||
22 | #define CPU_MODEL_LONG "NEC V850E/ME2" | ||
23 | |||
24 | |||
25 | /* Hardware-specific interrupt numbers (in the kernel IRQ namespace). */ | ||
26 | #define IRQ_INTP(n) (n) /* Pnnn (pin) interrupts */ | ||
27 | #define IRQ_INTP_NUM 31 | ||
28 | #define IRQ_INTCMD(n) (0x31 + (n)) /* interval timer interrupts 0-3 */ | ||
29 | #define IRQ_INTCMD_NUM 4 | ||
30 | #define IRQ_INTDMA(n) (0x41 + (n)) /* DMA interrupts 0-3 */ | ||
31 | #define IRQ_INTDMA_NUM 4 | ||
32 | #define IRQ_INTUBTIRE(n) (0x49 + (n)*5)/* UARTB 0-1 reception error */ | ||
33 | #define IRQ_INTUBTIRE_NUM 2 | ||
34 | #define IRQ_INTUBTIR(n) (0x4a + (n)*5) /* UARTB 0-1 reception complete */ | ||
35 | #define IRQ_INTUBTIR_NUM 2 | ||
36 | #define IRQ_INTUBTIT(n) (0x4b + (n)*5) /* UARTB 0-1 transmission complete */ | ||
37 | #define IRQ_INTUBTIT_NUM 2 | ||
38 | #define IRQ_INTUBTIF(n) (0x4c + (n)*5) /* UARTB 0-1 FIFO trans. complete */ | ||
39 | #define IRQ_INTUBTIF_NUM 2 | ||
40 | #define IRQ_INTUBTITO(n) (0x4d + (n)*5) /* UARTB 0-1 reception timeout */ | ||
41 | #define IRQ_INTUBTITO_NUM 2 | ||
42 | |||
43 | /* For <asm/irq.h> */ | ||
44 | #define NUM_CPU_IRQS 0x59 /* V850E/ME2 */ | ||
45 | |||
46 | |||
47 | /* For <asm/entry.h> */ | ||
48 | /* We use on-chip RAM, for a few miscellaneous variables that must be | ||
49 | accessible using a load instruction relative to R0. */ | ||
50 | #define R0_RAM_ADDR 0xFFFFB000 /* V850E/ME2 */ | ||
51 | |||
52 | |||
53 | /* V850E/ME2 UARTB details.*/ | ||
54 | #define V850E_UART_NUM_CHANNELS 2 | ||
55 | #define V850E_UARTB_BASE_FREQ (CPU_CLOCK_FREQ / 4) | ||
56 | |||
57 | /* This is a function that gets called before configuring the UART. */ | ||
58 | #define V850E_UART_PRE_CONFIGURE me2_uart_pre_configure | ||
59 | #ifndef __ASSEMBLY__ | ||
60 | extern void me2_uart_pre_configure (unsigned chan, | ||
61 | unsigned cflags, unsigned baud); | ||
62 | #endif /* __ASSEMBLY__ */ | ||
63 | |||
64 | |||
65 | /* V850E/ME2 timer C details. */ | ||
66 | #define V850E_TIMER_C_BASE_ADDR 0xFFFFF600 | ||
67 | |||
68 | |||
69 | /* V850E/ME2 timer D details. */ | ||
70 | #define V850E_TIMER_D_BASE_ADDR 0xFFFFF540 | ||
71 | #define V850E_TIMER_D_TMD_BASE_ADDR (V850E_TIMER_D_BASE_ADDR + 0x0) | ||
72 | #define V850E_TIMER_D_CMD_BASE_ADDR (V850E_TIMER_D_BASE_ADDR + 0x2) | ||
73 | #define V850E_TIMER_D_TMCD_BASE_ADDR (V850E_TIMER_D_BASE_ADDR + 0x4) | ||
74 | |||
75 | #define V850E_TIMER_D_BASE_FREQ (CPU_CLOCK_FREQ / 2) | ||
76 | |||
77 | |||
78 | /* Select iRAM mode. */ | ||
79 | #define ME2_IRAMM_ADDR 0xFFFFF80A | ||
80 | #define ME2_IRAMM (*(volatile u8*)ME2_IRAMM_ADDR) | ||
81 | |||
82 | |||
83 | /* Interrupt edge-detection configuration. INTF(n) and INTR(n) are only | ||
84 | valid for n == 1, 2, or 5. */ | ||
85 | #define ME2_INTF_ADDR(n) (0xFFFFFC00 + (n) * 0x2) | ||
86 | #define ME2_INTF(n) (*(volatile u8*)ME2_INTF_ADDR(n)) | ||
87 | #define ME2_INTR_ADDR(n) (0xFFFFFC20 + (n) * 0x2) | ||
88 | #define ME2_INTR(n) (*(volatile u8*)ME2_INTR_ADDR(n)) | ||
89 | #define ME2_INTFAL_ADDR 0xFFFFFC10 | ||
90 | #define ME2_INTFAL (*(volatile u8*)ME2_INTFAL_ADDR) | ||
91 | #define ME2_INTRAL_ADDR 0xFFFFFC30 | ||
92 | #define ME2_INTRAL (*(volatile u8*)ME2_INTRAL_ADDR) | ||
93 | #define ME2_INTFDH_ADDR 0xFFFFFC16 | ||
94 | #define ME2_INTFDH (*(volatile u16*)ME2_INTFDH_ADDR) | ||
95 | #define ME2_INTRDH_ADDR 0xFFFFFC36 | ||
96 | #define ME2_INTRDH (*(volatile u16*)ME2_INTRDH_ADDR) | ||
97 | #define ME2_SESC_ADDR(n) (0xFFFFF609 + (n) * 0x10) | ||
98 | #define ME2_SESC(n) (*(volatile u8*)ME2_SESC_ADDR(n)) | ||
99 | #define ME2_SESA10_ADDR 0xFFFFF5AD | ||
100 | #define ME2_SESA10 (*(volatile u8*)ME2_SESA10_ADDR) | ||
101 | #define ME2_SESA11_ADDR 0xFFFFF5DD | ||
102 | #define ME2_SESA11 (*(volatile u8*)ME2_SESA11_ADDR) | ||
103 | |||
104 | |||
105 | /* Port 1 */ | ||
106 | /* Direct I/O. Bits 0-3 are pins P10-P13. */ | ||
107 | #define ME2_PORT1_IO_ADDR 0xFFFFF402 | ||
108 | #define ME2_PORT1_IO (*(volatile u8 *)ME2_PORT1_IO_ADDR) | ||
109 | /* Port mode (for direct I/O, 0 = output, 1 = input). */ | ||
110 | #define ME2_PORT1_PM_ADDR 0xFFFFF422 | ||
111 | #define ME2_PORT1_PM (*(volatile u8 *)ME2_PORT1_PM_ADDR) | ||
112 | /* Port mode control (0 = direct I/O mode, 1 = alternative I/O mode). */ | ||
113 | #define ME2_PORT1_PMC_ADDR 0xFFFFF442 | ||
114 | #define ME2_PORT1_PMC (*(volatile u8 *)ME2_PORT1_PMC_ADDR) | ||
115 | /* Port function control (for serial interfaces, 0 = CSI30, 1 = UARTB0 ). */ | ||
116 | #define ME2_PORT1_PFC_ADDR 0xFFFFF462 | ||
117 | #define ME2_PORT1_PFC (*(volatile u8 *)ME2_PORT1_PFC_ADDR) | ||
118 | |||
119 | /* Port 2 */ | ||
120 | /* Direct I/O. Bits 0-3 are pins P20-P25. */ | ||
121 | #define ME2_PORT2_IO_ADDR 0xFFFFF404 | ||
122 | #define ME2_PORT2_IO (*(volatile u8 *)ME2_PORT2_IO_ADDR) | ||
123 | /* Port mode (for direct I/O, 0 = output, 1 = input). */ | ||
124 | #define ME2_PORT2_PM_ADDR 0xFFFFF424 | ||
125 | #define ME2_PORT2_PM (*(volatile u8 *)ME2_PORT2_PM_ADDR) | ||
126 | /* Port mode control (0 = direct I/O mode, 1 = alternative I/O mode). */ | ||
127 | #define ME2_PORT2_PMC_ADDR 0xFFFFF444 | ||
128 | #define ME2_PORT2_PMC (*(volatile u8 *)ME2_PORT2_PMC_ADDR) | ||
129 | /* Port function control (for serial interfaces, 0 = INTP2x, 1 = UARTB1 ). */ | ||
130 | #define ME2_PORT2_PFC_ADDR 0xFFFFF464 | ||
131 | #define ME2_PORT2_PFC (*(volatile u8 *)ME2_PORT2_PFC_ADDR) | ||
132 | |||
133 | /* Port 5 */ | ||
134 | /* Direct I/O. Bits 0-5 are pins P50-P55. */ | ||
135 | #define ME2_PORT5_IO_ADDR 0xFFFFF40A | ||
136 | #define ME2_PORT5_IO (*(volatile u8 *)ME2_PORT5_IO_ADDR) | ||
137 | /* Port mode (for direct I/O, 0 = output, 1 = input). */ | ||
138 | #define ME2_PORT5_PM_ADDR 0xFFFFF42A | ||
139 | #define ME2_PORT5_PM (*(volatile u8 *)ME2_PORT5_PM_ADDR) | ||
140 | /* Port mode control (0 = direct I/O mode, 1 = alternative I/O mode). */ | ||
141 | #define ME2_PORT5_PMC_ADDR 0xFFFFF44A | ||
142 | #define ME2_PORT5_PMC (*(volatile u8 *)ME2_PORT5_PMC_ADDR) | ||
143 | /* Port function control (). */ | ||
144 | #define ME2_PORT5_PFC_ADDR 0xFFFFF46A | ||
145 | #define ME2_PORT5_PFC (*(volatile u8 *)ME2_PORT5_PFC_ADDR) | ||
146 | |||
147 | /* Port 6 */ | ||
148 | /* Direct I/O. Bits 5-7 are pins P65-P67. */ | ||
149 | #define ME2_PORT6_IO_ADDR 0xFFFFF40C | ||
150 | #define ME2_PORT6_IO (*(volatile u8 *)ME2_PORT6_IO_ADDR) | ||
151 | /* Port mode (for direct I/O, 0 = output, 1 = input). */ | ||
152 | #define ME2_PORT6_PM_ADDR 0xFFFFF42C | ||
153 | #define ME2_PORT6_PM (*(volatile u8 *)ME2_PORT6_PM_ADDR) | ||
154 | /* Port mode control (0 = direct I/O mode, 1 = alternative I/O mode). */ | ||
155 | #define ME2_PORT6_PMC_ADDR 0xFFFFF44C | ||
156 | #define ME2_PORT6_PMC (*(volatile u8 *)ME2_PORT6_PMC_ADDR) | ||
157 | /* Port function control (). */ | ||
158 | #define ME2_PORT6_PFC_ADDR 0xFFFFF46C | ||
159 | #define ME2_PORT6_PFC (*(volatile u8 *)ME2_PORT6_PFC_ADDR) | ||
160 | |||
161 | /* Port 7 */ | ||
162 | /* Direct I/O. Bits 2-7 are pins P72-P77. */ | ||
163 | #define ME2_PORT7_IO_ADDR 0xFFFFF40E | ||
164 | #define ME2_PORT7_IO (*(volatile u8 *)ME2_PORT7_IO_ADDR) | ||
165 | /* Port mode (for direct I/O, 0 = output, 1 = input). */ | ||
166 | #define ME2_PORT7_PM_ADDR 0xFFFFF42E | ||
167 | #define ME2_PORT7_PM (*(volatile u8 *)ME2_PORT7_PM_ADDR) | ||
168 | /* Port mode control (0 = direct I/O mode, 1 = alternative I/O mode). */ | ||
169 | #define ME2_PORT7_PMC_ADDR 0xFFFFF44E | ||
170 | #define ME2_PORT7_PMC (*(volatile u8 *)ME2_PORT7_PMC_ADDR) | ||
171 | /* Port function control (). */ | ||
172 | #define ME2_PORT7_PFC_ADDR 0xFFFFF46E | ||
173 | #define ME2_PORT7_PFC (*(volatile u8 *)ME2_PORT7_PFC_ADDR) | ||
174 | |||
175 | |||
176 | #ifndef __ASSEMBLY__ | ||
177 | /* Initialize V850E/ME2 chip interrupts. */ | ||
178 | extern void me2_init_irqs (void); | ||
179 | #endif /* !__ASSEMBLY__ */ | ||
180 | |||
181 | |||
182 | #endif /* __V850_ME2_H__ */ | ||
diff --git a/include/asm-v850/mman.h b/include/asm-v850/mman.h deleted file mode 100644 index edbf6edbfb37..000000000000 --- a/include/asm-v850/mman.h +++ /dev/null | |||
@@ -1,15 +0,0 @@ | |||
1 | #ifndef __V850_MMAN_H__ | ||
2 | #define __V850_MMAN_H__ | ||
3 | |||
4 | #include <asm-generic/mman.h> | ||
5 | |||
6 | #define MAP_GROWSDOWN 0x0100 /* stack-like segment */ | ||
7 | #define MAP_DENYWRITE 0x0800 /* ETXTBSY */ | ||
8 | #define MAP_EXECUTABLE 0x1000 /* mark it as an executable */ | ||
9 | #define MAP_LOCKED 0x2000 /* pages are locked */ | ||
10 | #define MAP_NORESERVE 0x4000 /* don't check for reservations */ | ||
11 | |||
12 | #define MCL_CURRENT 1 /* lock all current mappings */ | ||
13 | #define MCL_FUTURE 2 /* lock all future mappings */ | ||
14 | |||
15 | #endif /* __V850_MMAN_H__ */ | ||
diff --git a/include/asm-v850/mmu.h b/include/asm-v850/mmu.h deleted file mode 100644 index 267768c66ef6..000000000000 --- a/include/asm-v850/mmu.h +++ /dev/null | |||
@@ -1,11 +0,0 @@ | |||
1 | /* Copyright (C) 2002, 2005, David McCullough <davidm@snapgear.com> */ | ||
2 | |||
3 | #ifndef __V850_MMU_H__ | ||
4 | #define __V850_MMU_H__ | ||
5 | |||
6 | typedef struct { | ||
7 | struct vm_list_struct *vmlist; | ||
8 | unsigned long end_brk; | ||
9 | } mm_context_t; | ||
10 | |||
11 | #endif /* __V850_MMU_H__ */ | ||
diff --git a/include/asm-v850/mmu_context.h b/include/asm-v850/mmu_context.h deleted file mode 100644 index 01daacd5474e..000000000000 --- a/include/asm-v850/mmu_context.h +++ /dev/null | |||
@@ -1,13 +0,0 @@ | |||
1 | #ifndef __V850_MMU_CONTEXT_H__ | ||
2 | #define __V850_MMU_CONTEXT_H__ | ||
3 | |||
4 | #include <asm-generic/mm_hooks.h> | ||
5 | |||
6 | #define destroy_context(mm) ((void)0) | ||
7 | #define init_new_context(tsk,mm) 0 | ||
8 | #define switch_mm(prev,next,tsk) ((void)0) | ||
9 | #define deactivate_mm(tsk,mm) do { } while (0) | ||
10 | #define activate_mm(prev,next) ((void)0) | ||
11 | #define enter_lazy_tlb(mm,tsk) ((void)0) | ||
12 | |||
13 | #endif /* __V850_MMU_CONTEXT_H__ */ | ||
diff --git a/include/asm-v850/module.h b/include/asm-v850/module.h deleted file mode 100644 index 2c2f4944f09f..000000000000 --- a/include/asm-v850/module.h +++ /dev/null | |||
@@ -1,62 +0,0 @@ | |||
1 | /* | ||
2 | * include/asm-v850/module.h -- Architecture-specific module hooks | ||
3 | * | ||
4 | * Copyright (C) 2001,02,03,04 NEC Corporation | ||
5 | * Copyright (C) 2001,02,03,04 Miles Bader <miles@gnu.org> | ||
6 | * Copyright (C) 2001,03 Rusty Russell | ||
7 | * | ||
8 | * This file is subject to the terms and conditions of the GNU General | ||
9 | * Public License. See the file COPYING in the main directory of this | ||
10 | * archive for more details. | ||
11 | * | ||
12 | * Written by Miles Bader <miles@gnu.org> | ||
13 | * | ||
14 | * Derived in part from include/asm-ppc/module.h | ||
15 | */ | ||
16 | |||
17 | #ifndef __V850_MODULE_H__ | ||
18 | #define __V850_MODULE_H__ | ||
19 | |||
20 | #define MODULE_SYMBOL_PREFIX "_" | ||
21 | |||
22 | struct v850_plt_entry | ||
23 | { | ||
24 | /* Indirect jump instruction sequence (6-byte mov + 2-byte jr). */ | ||
25 | unsigned long tramp[2]; | ||
26 | }; | ||
27 | |||
28 | struct mod_arch_specific | ||
29 | { | ||
30 | /* Indices of PLT sections within module. */ | ||
31 | unsigned int core_plt_section, init_plt_section; | ||
32 | }; | ||
33 | |||
34 | #define Elf_Shdr Elf32_Shdr | ||
35 | #define Elf_Sym Elf32_Sym | ||
36 | #define Elf_Ehdr Elf32_Ehdr | ||
37 | |||
38 | /* Make empty sections for module_frob_arch_sections to expand. */ | ||
39 | #ifdef MODULE | ||
40 | asm(".section .plt,\"ax\",@nobits; .align 3; .previous"); | ||
41 | asm(".section .init.plt,\"ax\",@nobits; .align 3; .previous"); | ||
42 | #endif | ||
43 | |||
44 | /* We don't do exception tables. */ | ||
45 | struct exception_table_entry; | ||
46 | static inline const struct exception_table_entry * | ||
47 | search_extable(const struct exception_table_entry *first, | ||
48 | const struct exception_table_entry *last, | ||
49 | unsigned long value) | ||
50 | { | ||
51 | return 0; | ||
52 | } | ||
53 | #define ARCH_HAS_SEARCH_EXTABLE | ||
54 | static inline void | ||
55 | sort_extable(struct exception_table_entry *start, | ||
56 | struct exception_table_entry *finish) | ||
57 | { | ||
58 | /* nada */ | ||
59 | } | ||
60 | #define ARCH_HAS_SORT_EXTABLE | ||
61 | |||
62 | #endif /* __V850_MODULE_H__ */ | ||
diff --git a/include/asm-v850/msgbuf.h b/include/asm-v850/msgbuf.h deleted file mode 100644 index ed07dbd01637..000000000000 --- a/include/asm-v850/msgbuf.h +++ /dev/null | |||
@@ -1,31 +0,0 @@ | |||
1 | #ifndef __V850_MSGBUF_H__ | ||
2 | #define __V850_MSGBUF_H__ | ||
3 | |||
4 | /* | ||
5 | * The msqid64_ds structure for v850 architecture. | ||
6 | * Note extra padding because this structure is passed back and forth | ||
7 | * between kernel and user space. | ||
8 | * | ||
9 | * Pad space is left for: | ||
10 | * - 64-bit time_t to solve y2038 problem | ||
11 | * - 2 miscellaneous 32-bit values | ||
12 | */ | ||
13 | |||
14 | struct msqid64_ds { | ||
15 | struct ipc64_perm msg_perm; | ||
16 | __kernel_time_t msg_stime; /* last msgsnd time */ | ||
17 | unsigned long __unused1; | ||
18 | __kernel_time_t msg_rtime; /* last msgrcv time */ | ||
19 | unsigned long __unused2; | ||
20 | __kernel_time_t msg_ctime; /* last change time */ | ||
21 | unsigned long __unused3; | ||
22 | unsigned long msg_cbytes; /* current number of bytes on queue */ | ||
23 | unsigned long msg_qnum; /* number of messages in queue */ | ||
24 | unsigned long msg_qbytes; /* max number of bytes on queue */ | ||
25 | __kernel_pid_t msg_lspid; /* pid of last msgsnd */ | ||
26 | __kernel_pid_t msg_lrpid; /* last receive pid */ | ||
27 | unsigned long __unused4; | ||
28 | unsigned long __unused5; | ||
29 | }; | ||
30 | |||
31 | #endif /* __V850_MSGBUF_H__ */ | ||
diff --git a/include/asm-v850/mutex.h b/include/asm-v850/mutex.h deleted file mode 100644 index 458c1f7fbc18..000000000000 --- a/include/asm-v850/mutex.h +++ /dev/null | |||
@@ -1,9 +0,0 @@ | |||
1 | /* | ||
2 | * Pull in the generic implementation for the mutex fastpath. | ||
3 | * | ||
4 | * TODO: implement optimized primitives instead, or leave the generic | ||
5 | * implementation in place, or pick the atomic_xchg() based generic | ||
6 | * implementation. (see asm-generic/mutex-xchg.h for details) | ||
7 | */ | ||
8 | |||
9 | #include <asm-generic/mutex-dec.h> | ||
diff --git a/include/asm-v850/page.h b/include/asm-v850/page.h deleted file mode 100644 index f9de35d873fa..000000000000 --- a/include/asm-v850/page.h +++ /dev/null | |||
@@ -1,124 +0,0 @@ | |||
1 | /* | ||
2 | * include/asm-v850/page.h -- VM ops | ||
3 | * | ||
4 | * Copyright (C) 2001,02,03,05 NEC Electronics Corporation | ||
5 | * Copyright (C) 2001,02,03,05 Miles Bader <miles@gnu.org> | ||
6 | * | ||
7 | * This file is subject to the terms and conditions of the GNU General | ||
8 | * Public License. See the file COPYING in the main directory of this | ||
9 | * archive for more details. | ||
10 | * | ||
11 | * Written by Miles Bader <miles@gnu.org> | ||
12 | */ | ||
13 | |||
14 | #ifndef __V850_PAGE_H__ | ||
15 | #define __V850_PAGE_H__ | ||
16 | |||
17 | #include <asm/machdep.h> | ||
18 | |||
19 | |||
20 | #define PAGE_SHIFT 12 | ||
21 | #define PAGE_SIZE (1UL << PAGE_SHIFT) | ||
22 | #define PAGE_MASK (~(PAGE_SIZE-1)) | ||
23 | |||
24 | |||
25 | /* | ||
26 | * PAGE_OFFSET -- the first address of the first page of memory. For archs with | ||
27 | * no MMU this corresponds to the first free page in physical memory (aligned | ||
28 | * on a page boundary). | ||
29 | */ | ||
30 | #ifndef PAGE_OFFSET | ||
31 | #define PAGE_OFFSET 0x0000000 | ||
32 | #endif | ||
33 | |||
34 | |||
35 | #ifndef __ASSEMBLY__ | ||
36 | |||
37 | #define STRICT_MM_TYPECHECKS | ||
38 | |||
39 | #define clear_page(page) memset ((void *)(page), 0, PAGE_SIZE) | ||
40 | #define copy_page(to, from) memcpy ((void *)(to), (void *)from, PAGE_SIZE) | ||
41 | |||
42 | #define clear_user_page(addr, vaddr, page) \ | ||
43 | do { clear_page(addr); \ | ||
44 | flush_dcache_page(page); \ | ||
45 | } while (0) | ||
46 | #define copy_user_page(to, from, vaddr, page) \ | ||
47 | do { copy_page(to, from); \ | ||
48 | flush_dcache_page(page); \ | ||
49 | } while (0) | ||
50 | |||
51 | #ifdef STRICT_MM_TYPECHECKS | ||
52 | /* | ||
53 | * These are used to make use of C type-checking.. | ||
54 | */ | ||
55 | |||
56 | typedef struct { unsigned long pte; } pte_t; | ||
57 | typedef struct { unsigned long pmd; } pmd_t; | ||
58 | typedef struct { unsigned long pgd; } pgd_t; | ||
59 | typedef struct { unsigned long pgprot; } pgprot_t; | ||
60 | typedef struct page *pgtable_t; | ||
61 | |||
62 | #define pte_val(x) ((x).pte) | ||
63 | #define pmd_val(x) ((x).pmd) | ||
64 | #define pgd_val(x) ((x).pgd) | ||
65 | #define pgprot_val(x) ((x).pgprot) | ||
66 | |||
67 | #define __pte(x) ((pte_t) { (x) } ) | ||
68 | #define __pmd(x) ((pmd_t) { (x) } ) | ||
69 | #define __pgd(x) ((pgd_t) { (x) } ) | ||
70 | #define __pgprot(x) ((pgprot_t) { (x) } ) | ||
71 | |||
72 | #else /* !STRICT_MM_TYPECHECKS */ | ||
73 | /* | ||
74 | * .. while these make it easier on the compiler | ||
75 | */ | ||
76 | |||
77 | typedef unsigned long pte_t; | ||
78 | typedef unsigned long pmd_t; | ||
79 | typedef unsigned long pgd_t; | ||
80 | typedef unsigned long pgprot_t; | ||
81 | |||
82 | #define pte_val(x) (x) | ||
83 | #define pmd_val(x) (x) | ||
84 | #define pgd_val(x) (x) | ||
85 | #define pgprot_val(x) (x) | ||
86 | |||
87 | #define __pte(x) (x) | ||
88 | #define __pmd(x) (x) | ||
89 | #define __pgd(x) (x) | ||
90 | #define __pgprot(x) (x) | ||
91 | |||
92 | #endif /* STRICT_MM_TYPECHECKS */ | ||
93 | |||
94 | #endif /* !__ASSEMBLY__ */ | ||
95 | |||
96 | |||
97 | /* No current v850 processor has virtual memory. */ | ||
98 | #define __virt_to_phys(addr) (addr) | ||
99 | #define __phys_to_virt(addr) (addr) | ||
100 | |||
101 | #define virt_to_pfn(kaddr) (__virt_to_phys (kaddr) >> PAGE_SHIFT) | ||
102 | #define pfn_to_virt(pfn) __phys_to_virt ((pfn) << PAGE_SHIFT) | ||
103 | |||
104 | #define MAP_NR(kaddr) \ | ||
105 | (((unsigned long)(kaddr) - PAGE_OFFSET) >> PAGE_SHIFT) | ||
106 | #define virt_to_page(kaddr) (mem_map + MAP_NR (kaddr)) | ||
107 | #define page_to_virt(page) \ | ||
108 | ((((page) - mem_map) << PAGE_SHIFT) + PAGE_OFFSET) | ||
109 | |||
110 | #define ARCH_PFN_OFFSET (PAGE_OFFSET >> PAGE_SHIFT) | ||
111 | #define pfn_valid(pfn) ((pfn) < max_mapnr) | ||
112 | |||
113 | #define virt_addr_valid(kaddr) \ | ||
114 | (((void *)(kaddr) >= (void *)PAGE_OFFSET) && MAP_NR (kaddr) < max_mapnr) | ||
115 | |||
116 | |||
117 | #define __pa(x) __virt_to_phys ((unsigned long)(x)) | ||
118 | #define __va(x) ((void *)__phys_to_virt ((unsigned long)(x))) | ||
119 | |||
120 | |||
121 | #include <asm-generic/memory_model.h> | ||
122 | #include <asm-generic/page.h> | ||
123 | |||
124 | #endif /* __V850_PAGE_H__ */ | ||
diff --git a/include/asm-v850/param.h b/include/asm-v850/param.h deleted file mode 100644 index 4391f5fe0204..000000000000 --- a/include/asm-v850/param.h +++ /dev/null | |||
@@ -1,33 +0,0 @@ | |||
1 | /* | ||
2 | * include/asm-v850/param.h -- Varions kernel parameters | ||
3 | * | ||
4 | * Copyright (C) 2001,02 NEC Corporation | ||
5 | * Copyright (C) 2001,02 Miles Bader <miles@gnu.org> | ||
6 | * | ||
7 | * This file is subject to the terms and conditions of the GNU General | ||
8 | * Public License. See the file COPYING in the main directory of this | ||
9 | * archive for more details. | ||
10 | * | ||
11 | * Written by Miles Bader <miles@gnu.org> | ||
12 | */ | ||
13 | |||
14 | #ifndef __V850_PARAM_H__ | ||
15 | #define __V850_PARAM_H__ | ||
16 | |||
17 | #define EXEC_PAGESIZE 4096 | ||
18 | |||
19 | #ifndef NOGROUP | ||
20 | #define NOGROUP (-1) | ||
21 | #endif | ||
22 | |||
23 | #define MAXHOSTNAMELEN 64 /* max length of hostname */ | ||
24 | |||
25 | #ifdef __KERNEL__ | ||
26 | # define HZ CONFIG_HZ | ||
27 | # define USER_HZ 100 | ||
28 | # define CLOCKS_PER_SEC USER_HZ | ||
29 | #else | ||
30 | # define HZ 100 | ||
31 | #endif | ||
32 | |||
33 | #endif /* __V850_PARAM_H__ */ | ||
diff --git a/include/asm-v850/pci.h b/include/asm-v850/pci.h deleted file mode 100644 index de2a7d0a81cc..000000000000 --- a/include/asm-v850/pci.h +++ /dev/null | |||
@@ -1,119 +0,0 @@ | |||
1 | /* | ||
2 | * include/asm-v850/pci.h -- PCI support | ||
3 | * | ||
4 | * Copyright (C) 2001,02,05 NEC Corporation | ||
5 | * Copyright (C) 2001,02,05 Miles Bader <miles@gnu.org> | ||
6 | * | ||
7 | * This file is subject to the terms and conditions of the GNU General | ||
8 | * Public License. See the file COPYING in the main directory of this | ||
9 | * archive for more details. | ||
10 | * | ||
11 | * Written by Miles Bader <miles@gnu.org> | ||
12 | */ | ||
13 | |||
14 | #ifndef __V850_PCI_H__ | ||
15 | #define __V850_PCI_H__ | ||
16 | |||
17 | /* Get any platform-dependent definitions. */ | ||
18 | #include <asm/machdep.h> | ||
19 | |||
20 | #define pcibios_scan_all_fns(a, b) 0 | ||
21 | |||
22 | /* Generic declarations. */ | ||
23 | |||
24 | struct scatterlist; | ||
25 | |||
26 | extern void pcibios_set_master (struct pci_dev *dev); | ||
27 | |||
28 | /* `Grant' to PDEV the memory block at CPU_ADDR, for doing DMA. The | ||
29 | 32-bit PCI bus mastering address to use is returned. the device owns | ||
30 | this memory until either pci_unmap_single or pci_dma_sync_single_for_cpu is | ||
31 | performed. */ | ||
32 | extern dma_addr_t | ||
33 | pci_map_single (struct pci_dev *pdev, void *cpu_addr, size_t size, int dir); | ||
34 | |||
35 | /* Return to the CPU the PCI DMA memory block previously `granted' to | ||
36 | PDEV, at DMA_ADDR. */ | ||
37 | extern void | ||
38 | pci_unmap_single (struct pci_dev *pdev, dma_addr_t dma_addr, size_t size, | ||
39 | int dir); | ||
40 | |||
41 | /* Make physical memory consistent for a single streaming mode DMA | ||
42 | translation after a transfer. | ||
43 | |||
44 | If you perform a pci_map_single() but wish to interrogate the | ||
45 | buffer using the cpu, yet do not wish to teardown the PCI dma | ||
46 | mapping, you must call this function before doing so. At the next | ||
47 | point you give the PCI dma address back to the card, you must first | ||
48 | perform a pci_dma_sync_for_device, and then the device again owns | ||
49 | the buffer. */ | ||
50 | extern void | ||
51 | pci_dma_sync_single_for_cpu (struct pci_dev *dev, dma_addr_t dma_addr, | ||
52 | size_t size, int dir); | ||
53 | |||
54 | extern void | ||
55 | pci_dma_sync_single_for_device (struct pci_dev *dev, dma_addr_t dma_addr, | ||
56 | size_t size, int dir); | ||
57 | |||
58 | |||
59 | /* Do multiple DMA mappings at once. */ | ||
60 | extern int | ||
61 | pci_map_sg (struct pci_dev *pdev, struct scatterlist *sg, int sg_len, int dir); | ||
62 | |||
63 | /* Unmap multiple DMA mappings at once. */ | ||
64 | extern void | ||
65 | pci_unmap_sg (struct pci_dev *pdev, struct scatterlist *sg, int sg_len, | ||
66 | int dir); | ||
67 | |||
68 | /* SG-list versions of pci_dma_sync functions. */ | ||
69 | extern void | ||
70 | pci_dma_sync_sg_for_cpu (struct pci_dev *dev, | ||
71 | struct scatterlist *sg, int sg_len, | ||
72 | int dir); | ||
73 | extern void | ||
74 | pci_dma_sync_sg_for_device (struct pci_dev *dev, | ||
75 | struct scatterlist *sg, int sg_len, | ||
76 | int dir); | ||
77 | |||
78 | #define pci_map_page(dev, page, offs, size, dir) \ | ||
79 | pci_map_single(dev, (page_address(page) + (offs)), size, dir) | ||
80 | #define pci_unmap_page(dev,addr,sz,dir) \ | ||
81 | pci_unmap_single(dev, addr, sz, dir) | ||
82 | |||
83 | /* Test for pci_map_single or pci_map_page having generated an error. */ | ||
84 | static inline int | ||
85 | pci_dma_mapping_error (dma_addr_t dma_addr) | ||
86 | { | ||
87 | return dma_addr == 0; | ||
88 | } | ||
89 | |||
90 | /* Allocate and map kernel buffer using consistent mode DMA for PCI | ||
91 | device. Returns non-NULL cpu-view pointer to the buffer if | ||
92 | successful and sets *DMA_ADDR to the pci side dma address as well, | ||
93 | else DMA_ADDR is undefined. */ | ||
94 | extern void * | ||
95 | pci_alloc_consistent (struct pci_dev *pdev, size_t size, dma_addr_t *dma_addr); | ||
96 | |||
97 | /* Free and unmap a consistent DMA buffer. CPU_ADDR and DMA_ADDR must | ||
98 | be values that were returned from pci_alloc_consistent. SIZE must be | ||
99 | the same as what as passed into pci_alloc_consistent. References to | ||
100 | the memory and mappings assosciated with CPU_ADDR or DMA_ADDR past | ||
101 | this call are illegal. */ | ||
102 | extern void | ||
103 | pci_free_consistent (struct pci_dev *pdev, size_t size, void *cpu_addr, | ||
104 | dma_addr_t dma_addr); | ||
105 | |||
106 | #ifdef CONFIG_PCI | ||
107 | static inline void pci_dma_burst_advice(struct pci_dev *pdev, | ||
108 | enum pci_dma_burst_strategy *strat, | ||
109 | unsigned long *strategy_parameter) | ||
110 | { | ||
111 | *strat = PCI_DMA_BURST_INFINITY; | ||
112 | *strategy_parameter = ~0UL; | ||
113 | } | ||
114 | #endif | ||
115 | |||
116 | extern void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long max); | ||
117 | extern void pci_iounmap (struct pci_dev *dev, void __iomem *addr); | ||
118 | |||
119 | #endif /* __V850_PCI_H__ */ | ||
diff --git a/include/asm-v850/percpu.h b/include/asm-v850/percpu.h deleted file mode 100644 index 755ac6522b63..000000000000 --- a/include/asm-v850/percpu.h +++ /dev/null | |||
@@ -1,14 +0,0 @@ | |||
1 | #ifndef __V850_PERCPU_H__ | ||
2 | #define __V850_PERCPU_H__ | ||
3 | |||
4 | #include <asm-generic/percpu.h> | ||
5 | |||
6 | /* This is a stupid hack to satisfy some grotty implicit include-file | ||
7 | dependency; basically, <linux/smp.h> uses BUG_ON, which calls BUG, but | ||
8 | doesn't include the necessary headers to define it. In the twisted | ||
9 | festering mess of includes this must all be resolved somehow on other | ||
10 | platforms, but I haven't the faintest idea how, and don't care; here will | ||
11 | do, even though doesn't actually make any sense. */ | ||
12 | #include <asm/page.h> | ||
13 | |||
14 | #endif /* __V850_PERCPU_H__ */ | ||
diff --git a/include/asm-v850/pgalloc.h b/include/asm-v850/pgalloc.h deleted file mode 100644 index b91eb2d02bfd..000000000000 --- a/include/asm-v850/pgalloc.h +++ /dev/null | |||
@@ -1,22 +0,0 @@ | |||
1 | /* | ||
2 | * include/asm-v850/pgalloc.h | ||
3 | * | ||
4 | * Copyright (C) 2001,02 NEC Corporation | ||
5 | * Copyright (C) 2001,02 Miles Bader <miles@gnu.org> | ||
6 | * | ||
7 | * This file is subject to the terms and conditions of the GNU General | ||
8 | * Public License. See the file COPYING in the main directory of this | ||
9 | * archive for more details. | ||
10 | * | ||
11 | * Written by Miles Bader <miles@gnu.org> | ||
12 | */ | ||
13 | |||
14 | #ifndef __V850_PGALLOC_H__ | ||
15 | #define __V850_PGALLOC_H__ | ||
16 | |||
17 | #include <linux/mm.h> /* some crap code expects this */ | ||
18 | |||
19 | /* ... and then, there was one. */ | ||
20 | #define check_pgt_cache() ((void)0) | ||
21 | |||
22 | #endif /* __V850_PGALLOC_H__ */ | ||
diff --git a/include/asm-v850/pgtable.h b/include/asm-v850/pgtable.h deleted file mode 100644 index 1ea2a900f0f8..000000000000 --- a/include/asm-v850/pgtable.h +++ /dev/null | |||
@@ -1,59 +0,0 @@ | |||
1 | #ifndef __V850_PGTABLE_H__ | ||
2 | #define __V850_PGTABLE_H__ | ||
3 | |||
4 | #include <asm-generic/4level-fixup.h> | ||
5 | |||
6 | #include <asm/page.h> | ||
7 | |||
8 | |||
9 | #define pgd_present(pgd) (1) /* pages are always present on NO_MM */ | ||
10 | #define pgd_none(pgd) (0) | ||
11 | #define pgd_bad(pgd) (0) | ||
12 | #define pgd_clear(pgdp) ((void)0) | ||
13 | |||
14 | #define pmd_offset(a, b) ((void *)0) | ||
15 | |||
16 | #define kern_addr_valid(addr) (1) | ||
17 | |||
18 | |||
19 | #define __swp_type(x) (0) | ||
20 | #define __swp_offset(x) (0) | ||
21 | #define __swp_entry(typ,off) ((swp_entry_t) { ((typ) | ((off) << 7)) }) | ||
22 | #define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) }) | ||
23 | #define __swp_entry_to_pte(x) ((pte_t) { (x).val }) | ||
24 | |||
25 | static inline int pte_file (pte_t pte) { return 0; } | ||
26 | |||
27 | |||
28 | /* These mean nothing to !CONFIG_MMU. */ | ||
29 | #define PAGE_NONE __pgprot(0) | ||
30 | #define PAGE_SHARED __pgprot(0) | ||
31 | #define PAGE_COPY __pgprot(0) | ||
32 | #define PAGE_READONLY __pgprot(0) | ||
33 | #define PAGE_KERNEL __pgprot(0) | ||
34 | |||
35 | |||
36 | /* | ||
37 | * ZERO_PAGE is a global shared page that is always zero: used | ||
38 | * for zero-mapped memory areas etc. When CONFIG_MMU is not defined, this | ||
39 | * should never actually be used, so just define it to something that's | ||
40 | * will hopefully cause a bus error if it is. | ||
41 | */ | ||
42 | #define ZERO_PAGE(vaddr) ((void *)0x87654321) | ||
43 | |||
44 | |||
45 | /* Some bogus code in procfs uses these; whatever. */ | ||
46 | #define VMALLOC_START 0 | ||
47 | #define VMALLOC_END (~0) | ||
48 | |||
49 | |||
50 | extern void paging_init (void); | ||
51 | #define swapper_pg_dir ((pgd_t *) 0) | ||
52 | |||
53 | #define pgtable_cache_init() ((void)0) | ||
54 | |||
55 | |||
56 | extern unsigned int kobjsize(const void *objp); | ||
57 | |||
58 | |||
59 | #endif /* __V850_PGTABLE_H__ */ | ||
diff --git a/include/asm-v850/poll.h b/include/asm-v850/poll.h deleted file mode 100644 index 803cad0b9b59..000000000000 --- a/include/asm-v850/poll.h +++ /dev/null | |||
@@ -1,9 +0,0 @@ | |||
1 | #ifndef __V850_POLL_H__ | ||
2 | #define __V850_POLL_H__ | ||
3 | |||
4 | #define POLLWRNORM POLLOUT | ||
5 | #define POLLWRBAND 0x0100 | ||
6 | |||
7 | #include <asm-generic/poll.h> | ||
8 | |||
9 | #endif /* __V850_POLL_H__ */ | ||
diff --git a/include/asm-v850/posix_types.h b/include/asm-v850/posix_types.h deleted file mode 100644 index 7f403b765390..000000000000 --- a/include/asm-v850/posix_types.h +++ /dev/null | |||
@@ -1,72 +0,0 @@ | |||
1 | /* | ||
2 | * include/asm-v850/posix_types.h -- Kernel versions of standard types | ||
3 | * | ||
4 | * Copyright (C) 2001,02,03 NEC Electronics Corporation | ||
5 | * Copyright (C) 2001,02,03 Miles Bader <miles@gnu.org> | ||
6 | * | ||
7 | * This file is subject to the terms and conditions of the GNU General | ||
8 | * Public License. See the file COPYING in the main directory of this | ||
9 | * archive for more details. | ||
10 | * | ||
11 | * Written by Miles Bader <miles@gnu.org> | ||
12 | */ | ||
13 | |||
14 | #ifndef __V850_POSIX_TYPES_H__ | ||
15 | #define __V850_POSIX_TYPES_H__ | ||
16 | |||
17 | typedef unsigned long __kernel_ino_t; | ||
18 | typedef unsigned long long __kernel_ino64_t; | ||
19 | typedef unsigned int __kernel_mode_t; | ||
20 | typedef unsigned int __kernel_nlink_t; | ||
21 | typedef long __kernel_off_t; | ||
22 | typedef long long __kernel_loff_t; | ||
23 | typedef int __kernel_pid_t; | ||
24 | typedef unsigned short __kernel_ipc_pid_t; | ||
25 | typedef unsigned int __kernel_uid_t; | ||
26 | typedef unsigned int __kernel_gid_t; | ||
27 | typedef unsigned int __kernel_size_t; | ||
28 | typedef int __kernel_ssize_t; | ||
29 | typedef int __kernel_ptrdiff_t; | ||
30 | typedef long __kernel_time_t; | ||
31 | typedef long __kernel_suseconds_t; | ||
32 | typedef long __kernel_clock_t; | ||
33 | typedef int __kernel_timer_t; | ||
34 | typedef int __kernel_clockid_t; | ||
35 | typedef int __kernel_daddr_t; | ||
36 | typedef char * __kernel_caddr_t; | ||
37 | typedef unsigned short __kernel_uid16_t; | ||
38 | typedef unsigned short __kernel_gid16_t; | ||
39 | typedef unsigned int __kernel_uid32_t; | ||
40 | typedef unsigned int __kernel_gid32_t; | ||
41 | |||
42 | /* Some bogus code depends on this; we don't care. */ | ||
43 | typedef __kernel_uid_t __kernel_old_uid_t; | ||
44 | typedef unsigned int __kernel_old_dev_t; | ||
45 | |||
46 | typedef struct { | ||
47 | int val[2]; | ||
48 | } __kernel_fsid_t; | ||
49 | |||
50 | |||
51 | #if defined(__KERNEL__) | ||
52 | |||
53 | /* We used to include <asm/bitops.h> here, which seems the right thing, but | ||
54 | it caused nasty include-file definition order problems. Removing the | ||
55 | include seems to work, so fingers crossed... */ | ||
56 | |||
57 | #undef __FD_SET | ||
58 | #define __FD_SET(fd, fd_set) \ | ||
59 | __set_bit (fd, (void *)&((__kernel_fd_set *)fd_set)->fds_bits) | ||
60 | #undef __FD_CLR | ||
61 | #define __FD_CLR(fd, fd_set) \ | ||
62 | __clear_bit (fd, (void *)&((__kernel_fd_set *)fd_set)->fds_bits) | ||
63 | #undef __FD_ISSET | ||
64 | #define __FD_ISSET(fd, fd_set) \ | ||
65 | __test_bit (fd, (void *)&((__kernel_fd_set *)fd_set)->fds_bits) | ||
66 | #undef __FD_ZERO | ||
67 | #define __FD_ZERO(fd_set) \ | ||
68 | memset (fd_set, 0, sizeof (*(fd_set *)fd_set)) | ||
69 | |||
70 | #endif /* defined(__KERNEL__) */ | ||
71 | |||
72 | #endif /* __V850_POSIX_TYPES_H__ */ | ||
diff --git a/include/asm-v850/processor.h b/include/asm-v850/processor.h deleted file mode 100644 index 979e3467f9af..000000000000 --- a/include/asm-v850/processor.h +++ /dev/null | |||
@@ -1,120 +0,0 @@ | |||
1 | /* | ||
2 | * include/asm-v850/processor.h | ||
3 | * | ||
4 | * Copyright (C) 2001,02,03 NEC Electronics Corporation | ||
5 | * Copyright (C) 2001,02,03 Miles Bader <miles@gnu.org> | ||
6 | * | ||
7 | * This file is subject to the terms and conditions of the GNU General | ||
8 | * Public License. See the file COPYING in the main directory of this | ||
9 | * archive for more details. | ||
10 | * | ||
11 | * Written by Miles Bader <miles@gnu.org> | ||
12 | */ | ||
13 | |||
14 | #ifndef __V850_PROCESSOR_H__ | ||
15 | #define __V850_PROCESSOR_H__ | ||
16 | |||
17 | #ifndef __ASSEMBLY__ /* <linux/thread_info.h> is not asm-safe. */ | ||
18 | #include <linux/thread_info.h> | ||
19 | #endif | ||
20 | |||
21 | #include <linux/compiler.h> | ||
22 | #include <asm/ptrace.h> | ||
23 | #include <asm/entry.h> | ||
24 | |||
25 | /* Some code expects `segment' stuff to be defined here. */ | ||
26 | #include <asm/segment.h> | ||
27 | |||
28 | |||
29 | /* | ||
30 | * The only places this is used seem to be horrible bletcherous kludges, | ||
31 | * so we just define it to be as large as possible. | ||
32 | */ | ||
33 | #define TASK_SIZE (0xFFFFFFFF) | ||
34 | |||
35 | /* | ||
36 | * This decides where the kernel will search for a free chunk of vm | ||
37 | * space during mmap's. We won't be using it. | ||
38 | */ | ||
39 | #define TASK_UNMAPPED_BASE 0 | ||
40 | |||
41 | |||
42 | #ifndef __ASSEMBLY__ | ||
43 | |||
44 | |||
45 | /* | ||
46 | * Default implementation of macro that returns current | ||
47 | * instruction pointer ("program counter"). | ||
48 | */ | ||
49 | #define current_text_addr() ({ __label__ _l; _l: &&_l;}) | ||
50 | |||
51 | /* If you change this, you must change the associated assembly-languages | ||
52 | constants defined below, THREAD_*. */ | ||
53 | struct thread_struct { | ||
54 | /* kernel stack pointer (must be first field in structure) */ | ||
55 | unsigned long ksp; | ||
56 | }; | ||
57 | |||
58 | #define INIT_THREAD { sizeof init_stack + (unsigned long)init_stack } | ||
59 | |||
60 | |||
61 | /* Do necessary setup to start up a newly executed thread. */ | ||
62 | static inline void start_thread (struct pt_regs *regs, | ||
63 | unsigned long pc, unsigned long usp) | ||
64 | { | ||
65 | regs->pc = pc; | ||
66 | regs->gpr[GPR_SP] = usp; | ||
67 | regs->kernel_mode = 0; | ||
68 | } | ||
69 | |||
70 | /* Free all resources held by a thread. */ | ||
71 | static inline void release_thread (struct task_struct *dead_task) | ||
72 | { | ||
73 | } | ||
74 | |||
75 | /* Prepare to copy thread state - unlazy all lazy status */ | ||
76 | #define prepare_to_copy(tsk) do { } while (0) | ||
77 | |||
78 | extern int kernel_thread (int (*fn)(void *), void * arg, unsigned long flags); | ||
79 | |||
80 | /* Free current thread data structures etc. */ | ||
81 | static inline void exit_thread (void) | ||
82 | { | ||
83 | } | ||
84 | |||
85 | |||
86 | /* Return the registers saved during context-switch by the currently | ||
87 | not-running thread T. Note that this only includes some registers! | ||
88 | See entry.S for details. */ | ||
89 | #define thread_saved_regs(t) \ | ||
90 | ((struct pt_regs*)((t)->thread.ksp + STATE_SAVE_PT_OFFSET)) | ||
91 | /* Return saved (kernel) PC of a blocked thread. Actually, we return the | ||
92 | LP register, because the thread is actually blocked in switch_thread, | ||
93 | and we're interested in the PC it will _return_ to. */ | ||
94 | #define thread_saved_pc(t) (thread_saved_regs(t)->gpr[GPR_LP]) | ||
95 | |||
96 | |||
97 | unsigned long get_wchan (struct task_struct *p); | ||
98 | |||
99 | |||
100 | /* Return some info about the user process TASK. */ | ||
101 | #define task_tos(task) ((unsigned long)task_stack_page(task) + THREAD_SIZE) | ||
102 | #define task_pt_regs(task) ((struct pt_regs *)task_tos (task) - 1) | ||
103 | #define task_sp(task) (task_pt_regs (task)->gpr[GPR_SP]) | ||
104 | #define task_pc(task) (task_pt_regs (task)->pc) | ||
105 | /* Grotty old names for some. */ | ||
106 | #define KSTK_EIP(task) task_pc (task) | ||
107 | #define KSTK_ESP(task) task_sp (task) | ||
108 | |||
109 | |||
110 | #define cpu_relax() barrier() | ||
111 | |||
112 | |||
113 | #else /* __ASSEMBLY__ */ | ||
114 | |||
115 | #define THREAD_KSP 0 | ||
116 | |||
117 | #endif /* !__ASSEMBLY__ */ | ||
118 | |||
119 | |||
120 | #endif /* __V850_PROCESSOR_H__ */ | ||
diff --git a/include/asm-v850/ptrace.h b/include/asm-v850/ptrace.h deleted file mode 100644 index 4f35cf2cd641..000000000000 --- a/include/asm-v850/ptrace.h +++ /dev/null | |||
@@ -1,121 +0,0 @@ | |||
1 | /* | ||
2 | * include/asm-v850/ptrace.h -- Access to CPU registers | ||
3 | * | ||
4 | * Copyright (C) 2001,02,03 NEC Electronics Corporation | ||
5 | * Copyright (C) 2001,02,03 Miles Bader <miles@gnu.org> | ||
6 | * | ||
7 | * This file is subject to the terms and conditions of the GNU General | ||
8 | * Public License. See the file COPYING in the main directory of this | ||
9 | * archive for more details. | ||
10 | * | ||
11 | * Written by Miles Bader <miles@gnu.org> | ||
12 | */ | ||
13 | |||
14 | #ifndef __V850_PTRACE_H__ | ||
15 | #define __V850_PTRACE_H__ | ||
16 | |||
17 | |||
18 | /* v850 general purpose registers with special meanings. */ | ||
19 | #define GPR_ZERO 0 /* constant zero */ | ||
20 | #define GPR_ASM 1 /* reserved for assembler */ | ||
21 | #define GPR_SP 3 /* stack pointer */ | ||
22 | #define GPR_GP 4 /* global data pointer */ | ||
23 | #define GPR_TP 5 /* `text pointer' */ | ||
24 | #define GPR_EP 30 /* `element pointer' */ | ||
25 | #define GPR_LP 31 /* link pointer (current return address) */ | ||
26 | |||
27 | /* These aren't official names, but they make some code more descriptive. */ | ||
28 | #define GPR_ARG0 6 | ||
29 | #define GPR_ARG1 7 | ||
30 | #define GPR_ARG2 8 | ||
31 | #define GPR_ARG3 9 | ||
32 | #define GPR_RVAL0 10 | ||
33 | #define GPR_RVAL1 11 | ||
34 | #define GPR_RVAL GPR_RVAL0 | ||
35 | |||
36 | #define NUM_GPRS 32 | ||
37 | |||
38 | /* v850 `system' registers. */ | ||
39 | #define SR_EIPC 0 | ||
40 | #define SR_EIPSW 1 | ||
41 | #define SR_FEPC 2 | ||
42 | #define SR_FEPSW 3 | ||
43 | #define SR_ECR 4 | ||
44 | #define SR_PSW 5 | ||
45 | #define SR_CTPC 16 | ||
46 | #define SR_CTPSW 17 | ||
47 | #define SR_DBPC 18 | ||
48 | #define SR_DBPSW 19 | ||
49 | #define SR_CTBP 20 | ||
50 | #define SR_DIR 21 | ||
51 | #define SR_ASID 23 | ||
52 | |||
53 | |||
54 | #ifndef __ASSEMBLY__ | ||
55 | |||
56 | typedef unsigned long v850_reg_t; | ||
57 | |||
58 | /* How processor state is stored on the stack during a syscall/signal. | ||
59 | If you change this structure, change the associated assembly-language | ||
60 | macros below too (PT_*)! */ | ||
61 | struct pt_regs | ||
62 | { | ||
63 | /* General purpose registers. */ | ||
64 | v850_reg_t gpr[NUM_GPRS]; | ||
65 | |||
66 | v850_reg_t pc; /* program counter */ | ||
67 | v850_reg_t psw; /* program status word */ | ||
68 | |||
69 | /* Registers used by `callt' instruction: */ | ||
70 | v850_reg_t ctpc; /* saved program counter */ | ||
71 | v850_reg_t ctpsw; /* saved psw */ | ||
72 | v850_reg_t ctbp; /* base pointer for callt table */ | ||
73 | |||
74 | char kernel_mode; /* 1 if in `kernel mode', 0 if user mode */ | ||
75 | }; | ||
76 | |||
77 | |||
78 | #define instruction_pointer(regs) ((regs)->pc) | ||
79 | #define profile_pc(regs) instruction_pointer(regs) | ||
80 | #define user_mode(regs) (!(regs)->kernel_mode) | ||
81 | |||
82 | /* When a struct pt_regs is used to save user state for a system call in | ||
83 | the kernel, the system call is stored in the space for R0 (since it's | ||
84 | never used otherwise, R0 being a constant 0). Non-system-calls | ||
85 | simply store 0 there. */ | ||
86 | #define PT_REGS_SYSCALL(regs) (regs)->gpr[0] | ||
87 | #define PT_REGS_SET_SYSCALL(regs, val) ((regs)->gpr[0] = (val)) | ||
88 | |||
89 | #endif /* !__ASSEMBLY__ */ | ||
90 | |||
91 | |||
92 | /* The number of bytes used to store each register. */ | ||
93 | #define _PT_REG_SIZE 4 | ||
94 | |||
95 | /* Offset of a general purpose register in a struct pt_regs. */ | ||
96 | #define PT_GPR(num) ((num) * _PT_REG_SIZE) | ||
97 | |||
98 | /* Offsets of various special registers & fields in a struct pt_regs. */ | ||
99 | #define PT_PC ((NUM_GPRS + 0) * _PT_REG_SIZE) | ||
100 | #define PT_PSW ((NUM_GPRS + 1) * _PT_REG_SIZE) | ||
101 | #define PT_CTPC ((NUM_GPRS + 2) * _PT_REG_SIZE) | ||
102 | #define PT_CTPSW ((NUM_GPRS + 3) * _PT_REG_SIZE) | ||
103 | #define PT_CTBP ((NUM_GPRS + 4) * _PT_REG_SIZE) | ||
104 | #define PT_KERNEL_MODE ((NUM_GPRS + 5) * _PT_REG_SIZE) | ||
105 | |||
106 | /* Where the current syscall number is stashed; obviously only valid in | ||
107 | the kernel! */ | ||
108 | #define PT_CUR_SYSCALL PT_GPR(0) | ||
109 | |||
110 | /* Size of struct pt_regs, including alignment. */ | ||
111 | #define PT_SIZE ((NUM_GPRS + 6) * _PT_REG_SIZE) | ||
112 | |||
113 | |||
114 | /* These are `magic' values for PTRACE_PEEKUSR that return info about where | ||
115 | a process is located in memory. */ | ||
116 | #define PT_TEXT_ADDR (PT_SIZE + 1) | ||
117 | #define PT_TEXT_LEN (PT_SIZE + 2) | ||
118 | #define PT_DATA_ADDR (PT_SIZE + 3) | ||
119 | |||
120 | |||
121 | #endif /* __V850_PTRACE_H__ */ | ||
diff --git a/include/asm-v850/resource.h b/include/asm-v850/resource.h deleted file mode 100644 index 4b9dcd44f8d1..000000000000 --- a/include/asm-v850/resource.h +++ /dev/null | |||
@@ -1,6 +0,0 @@ | |||
1 | #ifndef __V850_RESOURCE_H__ | ||
2 | #define __V850_RESOURCE_H__ | ||
3 | |||
4 | #include <asm-generic/resource.h> | ||
5 | |||
6 | #endif /* __V850_RESOURCE_H__ */ | ||
diff --git a/include/asm-v850/rte_cb.h b/include/asm-v850/rte_cb.h deleted file mode 100644 index db9879f00aa7..000000000000 --- a/include/asm-v850/rte_cb.h +++ /dev/null | |||
@@ -1,78 +0,0 @@ | |||
1 | /* | ||
2 | * include/asm-v850/rte_cb.h -- Midas labs RTE-CB series of evaluation boards | ||
3 | * | ||
4 | * Copyright (C) 2001,02,03 NEC Electronics Corporation | ||
5 | * Copyright (C) 2001,02,03 Miles Bader <miles@gnu.org> | ||
6 | * | ||
7 | * This file is subject to the terms and conditions of the GNU General | ||
8 | * Public License. See the file COPYING in the main directory of this | ||
9 | * archive for more details. | ||
10 | * | ||
11 | * Written by Miles Bader <miles@gnu.org> | ||
12 | */ | ||
13 | |||
14 | #ifndef __V850_RTE_CB_H__ | ||
15 | #define __V850_RTE_CB_H__ | ||
16 | |||
17 | |||
18 | /* The SRAM on the Mother-A motherboard. */ | ||
19 | #define MB_A_SRAM_ADDR GCS0_ADDR | ||
20 | #define MB_A_SRAM_SIZE 0x00200000 /* 2MB */ | ||
21 | |||
22 | |||
23 | #ifdef CONFIG_RTE_GBUS_INT | ||
24 | /* GBUS interrupt support. */ | ||
25 | |||
26 | # include <asm/gbus_int.h> | ||
27 | |||
28 | # define GBUS_INT_BASE_IRQ NUM_RTE_CB_IRQS | ||
29 | # define GBUS_INT_BASE_ADDR (GCS2_ADDR + 0x00006000) | ||
30 | |||
31 | /* Some specific interrupts. */ | ||
32 | # define IRQ_MB_A_LAN IRQ_GBUS_INT(10) | ||
33 | # define IRQ_MB_A_PCI1(n) (IRQ_GBUS_INT(16) + (n)) | ||
34 | # define IRQ_MB_A_PCI1_NUM 4 | ||
35 | # define IRQ_MB_A_PCI2(n) (IRQ_GBUS_INT(20) + (n)) | ||
36 | # define IRQ_MB_A_PCI2_NUM 4 | ||
37 | # define IRQ_MB_A_EXT(n) (IRQ_GBUS_INT(24) + (n)) | ||
38 | # define IRQ_MB_A_EXT_NUM 4 | ||
39 | # define IRQ_MB_A_USB_OC(n) (IRQ_GBUS_INT(28) + (n)) | ||
40 | # define IRQ_MB_A_USB_OC_NUM 2 | ||
41 | # define IRQ_MB_A_PCMCIA_OC IRQ_GBUS_INT(30) | ||
42 | |||
43 | /* We define NUM_MACH_IRQS to include extra interrupts from the GBUS. */ | ||
44 | # define NUM_MACH_IRQS (NUM_RTE_CB_IRQS + IRQ_GBUS_INT_NUM) | ||
45 | |||
46 | #else /* !CONFIG_RTE_GBUS_INT */ | ||
47 | |||
48 | # define NUM_MACH_IRQS NUM_RTE_CB_IRQS | ||
49 | |||
50 | #endif /* CONFIG_RTE_GBUS_INT */ | ||
51 | |||
52 | |||
53 | #ifdef CONFIG_RTE_MB_A_PCI | ||
54 | /* Mother-A PCI bus support. */ | ||
55 | |||
56 | # include <asm/rte_mb_a_pci.h> | ||
57 | |||
58 | /* These are the base addresses used for allocating device address | ||
59 | space. 512K of the motherboard SRAM is in the same space, so we have | ||
60 | to be careful not to let it be allocated. */ | ||
61 | # define PCIBIOS_MIN_MEM (MB_A_PCI_MEM_ADDR + 0x80000) | ||
62 | # define PCIBIOS_MIN_IO MB_A_PCI_IO_ADDR | ||
63 | |||
64 | /* As we don't really support PCI DMA to cpu memory, and use bounce-buffers | ||
65 | instead, perversely enough, this becomes always true! */ | ||
66 | # define pci_dma_supported(dev, mask) 1 | ||
67 | # define pcibios_assign_all_busses() 1 | ||
68 | |||
69 | #endif /* CONFIG_RTE_MB_A_PCI */ | ||
70 | |||
71 | |||
72 | #ifndef __ASSEMBLY__ | ||
73 | extern void rte_cb_early_init (void); | ||
74 | extern void rte_cb_init_irqs (void); | ||
75 | #endif /* !__ASSEMBLY__ */ | ||
76 | |||
77 | |||
78 | #endif /* __V850_RTE_CB_H__ */ | ||
diff --git a/include/asm-v850/rte_ma1_cb.h b/include/asm-v850/rte_ma1_cb.h deleted file mode 100644 index bd3162ab9844..000000000000 --- a/include/asm-v850/rte_ma1_cb.h +++ /dev/null | |||
@@ -1,128 +0,0 @@ | |||
1 | /* | ||
2 | * include/asm-v850/rte_ma1_cb.h -- Midas labs RTE-V850/MA1-CB board | ||
3 | * | ||
4 | * Copyright (C) 2001,02,03 NEC Electronics Corporation | ||
5 | * Copyright (C) 2001,02,03 Miles Bader <miles@gnu.org> | ||
6 | * | ||
7 | * This file is subject to the terms and conditions of the GNU General | ||
8 | * Public License. See the file COPYING in the main directory of this | ||
9 | * archive for more details. | ||
10 | * | ||
11 | * Written by Miles Bader <miles@gnu.org> | ||
12 | */ | ||
13 | |||
14 | #ifndef __V850_RTE_MA1_CB_H__ | ||
15 | #define __V850_RTE_MA1_CB_H__ | ||
16 | |||
17 | #include <asm/rte_cb.h> /* Common defs for Midas RTE-CB boards. */ | ||
18 | |||
19 | |||
20 | #define PLATFORM "rte-v850e/ma1-cb" | ||
21 | #define PLATFORM_LONG "Midas lab RTE-V850E/MA1-CB" | ||
22 | |||
23 | #define CPU_CLOCK_FREQ 50000000 /* 50MHz */ | ||
24 | |||
25 | /* 1MB of onboard SRAM. Note that the monitor ROM uses parts of this | ||
26 | for its own purposes, so care must be taken. Some address lines are | ||
27 | not decoded, so the SRAM area is mirrored every 1MB from 0x400000 to | ||
28 | 0x800000 (exclusive). */ | ||
29 | #define SRAM_ADDR 0x00400000 | ||
30 | #define SRAM_SIZE 0x00100000 /* 1MB */ | ||
31 | |||
32 | /* 32MB of onbard SDRAM. */ | ||
33 | #define SDRAM_ADDR 0x00800000 | ||
34 | #define SDRAM_SIZE 0x02000000 /* 32MB */ | ||
35 | |||
36 | |||
37 | /* CPU addresses of GBUS memory spaces. */ | ||
38 | #define GCS0_ADDR 0x05000000 /* GCS0 - Common SRAM (2MB) */ | ||
39 | #define GCS0_SIZE 0x00200000 /* 2MB */ | ||
40 | #define GCS1_ADDR 0x06000000 /* GCS1 - Flash ROM (8MB) */ | ||
41 | #define GCS1_SIZE 0x00800000 /* 8MB */ | ||
42 | #define GCS2_ADDR 0x07900000 /* GCS2 - I/O registers */ | ||
43 | #define GCS2_SIZE 0x00400000 /* 4MB */ | ||
44 | #define GCS5_ADDR 0x04000000 /* GCS5 - PCI bus space */ | ||
45 | #define GCS5_SIZE 0x01000000 /* 16MB */ | ||
46 | #define GCS6_ADDR 0x07980000 /* GCS6 - PCI control registers */ | ||
47 | #define GCS6_SIZE 0x00000200 /* 512B */ | ||
48 | |||
49 | |||
50 | /* For <asm/page.h> */ | ||
51 | #define PAGE_OFFSET SRAM_ADDR | ||
52 | |||
53 | |||
54 | /* The GBUS GINT0 - GINT3 interrupts are connected to the INTP000 - INTP011 | ||
55 | pins on the CPU. These are shared among the GBUS interrupts. */ | ||
56 | #define IRQ_GINT(n) IRQ_INTP(n) | ||
57 | #define IRQ_GINT_NUM 4 | ||
58 | |||
59 | /* Used by <asm/rte_cb.h> to derive NUM_MACH_IRQS. */ | ||
60 | #define NUM_RTE_CB_IRQS NUM_CPU_IRQS | ||
61 | |||
62 | |||
63 | #ifdef CONFIG_ROM_KERNEL | ||
64 | /* Kernel is in ROM, starting at address 0. */ | ||
65 | |||
66 | #define INTV_BASE 0 | ||
67 | |||
68 | #else /* !CONFIG_ROM_KERNEL */ | ||
69 | |||
70 | #ifdef CONFIG_RTE_CB_MULTI | ||
71 | /* Using RAM kernel with ROM monitor for Multi debugger. */ | ||
72 | |||
73 | /* The chip's real interrupt vectors are in ROM, but they jump to a | ||
74 | secondary interrupt vector table in RAM. */ | ||
75 | #define INTV_BASE 0x004F8000 | ||
76 | |||
77 | /* Scratch memory used by the ROM monitor, which shouldn't be used by | ||
78 | linux (except for the alternate interrupt vector area, defined | ||
79 | above). */ | ||
80 | #define MON_SCRATCH_ADDR 0x004F8000 | ||
81 | #define MON_SCRATCH_SIZE 0x00008000 /* 32KB */ | ||
82 | |||
83 | #else /* !CONFIG_RTE_CB_MULTI */ | ||
84 | /* Using RAM-kernel. Assume some sort of boot-loader got us loaded at | ||
85 | address 0. */ | ||
86 | |||
87 | #define INTV_BASE 0 | ||
88 | |||
89 | #endif /* CONFIG_RTE_CB_MULTI */ | ||
90 | |||
91 | #endif /* CONFIG_ROM_KERNEL */ | ||
92 | |||
93 | |||
94 | /* Some misc. on-board devices. */ | ||
95 | |||
96 | /* Seven-segment LED display (two digits). Write-only. */ | ||
97 | #define LED_ADDR(n) (0x07802000 + (n)) | ||
98 | #define LED(n) (*(volatile unsigned char *)LED_ADDR(n)) | ||
99 | #define LED_NUM_DIGITS 2 | ||
100 | |||
101 | |||
102 | /* Override the basic MA uart pre-initialization so that we can | ||
103 | initialize extra stuff. */ | ||
104 | #undef V850E_UART_PRE_CONFIGURE /* should be defined by <asm/ma.h> */ | ||
105 | #define V850E_UART_PRE_CONFIGURE rte_ma1_cb_uart_pre_configure | ||
106 | #ifndef __ASSEMBLY__ | ||
107 | extern void rte_ma1_cb_uart_pre_configure (unsigned chan, | ||
108 | unsigned cflags, unsigned baud); | ||
109 | #endif | ||
110 | |||
111 | /* This board supports RTS/CTS for the on-chip UART, but only for channel 0. */ | ||
112 | |||
113 | /* CTS for UART channel 0 is pin P43 (bit 3 of port 4). */ | ||
114 | #define V850E_UART_CTS(chan) ((chan) == 0 ? !(MA_PORT4_IO & 0x8) : 1) | ||
115 | /* RTS for UART channel 0 is pin P42 (bit 2 of port 4). */ | ||
116 | #define V850E_UART_SET_RTS(chan, val) \ | ||
117 | do { \ | ||
118 | if (chan == 0) { \ | ||
119 | unsigned old = MA_PORT4_IO; \ | ||
120 | if (val) \ | ||
121 | MA_PORT4_IO = old & ~0x4; \ | ||
122 | else \ | ||
123 | MA_PORT4_IO = old | 0x4; \ | ||
124 | } \ | ||
125 | } while (0) | ||
126 | |||
127 | |||
128 | #endif /* __V850_RTE_MA1_CB_H__ */ | ||
diff --git a/include/asm-v850/rte_mb_a_pci.h b/include/asm-v850/rte_mb_a_pci.h deleted file mode 100644 index 41ac185ca9cd..000000000000 --- a/include/asm-v850/rte_mb_a_pci.h +++ /dev/null | |||
@@ -1,56 +0,0 @@ | |||
1 | /* | ||
2 | * include/asm-v850/mb_a_pci.h -- PCI support for Midas lab RTE-MOTHER-A board | ||
3 | * | ||
4 | * Copyright (C) 2001 NEC Corporation | ||
5 | * Copyright (C) 2001 Miles Bader <miles@gnu.org> | ||
6 | * | ||
7 | * This file is subject to the terms and conditions of the GNU General | ||
8 | * Public License. See the file COPYING in the main directory of this | ||
9 | * archive for more details. | ||
10 | * | ||
11 | * Written by Miles Bader <miles@gnu.org> | ||
12 | */ | ||
13 | |||
14 | #ifndef __V850_MB_A_PCI_H__ | ||
15 | #define __V850_MB_A_PCI_H__ | ||
16 | |||
17 | |||
18 | #define MB_A_PCI_MEM_ADDR GCS5_ADDR | ||
19 | #define MB_A_PCI_MEM_SIZE (GCS5_SIZE / 2) | ||
20 | #define MB_A_PCI_IO_ADDR (GCS5_ADDR + MB_A_PCI_MEM_SIZE) | ||
21 | #define MB_A_PCI_IO_SIZE (GCS5_SIZE / 2) | ||
22 | #define MB_A_PCI_REG_BASE_ADDR GCS6_ADDR | ||
23 | |||
24 | #define MB_A_PCI_PCICR_ADDR (MB_A_PCI_REG_BASE_ADDR + 0x4) | ||
25 | #define MB_A_PCI_PCICR (*(volatile u16 *)MB_A_PCI_PCICR_ADDR) | ||
26 | #define MB_A_PCI_PCISR_ADDR (MB_A_PCI_REG_BASE_ADDR + 0x6) | ||
27 | #define MB_A_PCI_PCISR (*(volatile u16 *)MB_A_PCI_PCISR_ADDR) | ||
28 | #define MB_A_PCI_PCILTR_ADDR (MB_A_PCI_REG_BASE_ADDR + 0xD) | ||
29 | #define MB_A_PCI_PCILTR (*(volatile u8 *)MB_A_PCI_PCILTR_ADDR) | ||
30 | #define MB_A_PCI_PCIBAR0_ADDR (MB_A_PCI_REG_BASE_ADDR + 0x10) | ||
31 | #define MB_A_PCI_PCIBAR0 (*(volatile u32 *)MB_A_PCI_PCIBAR0_ADDR) | ||
32 | #define MB_A_PCI_PCIBAR1_ADDR (MB_A_PCI_REG_BASE_ADDR + 0x14) | ||
33 | #define MB_A_PCI_PCIBAR1 (*(volatile u32 *)MB_A_PCI_PCIBAR1_ADDR) | ||
34 | #define MB_A_PCI_PCIBAR2_ADDR (MB_A_PCI_REG_BASE_ADDR + 0x18) | ||
35 | #define MB_A_PCI_PCIBAR2 (*(volatile u32 *)MB_A_PCI_PCIBAR2_ADDR) | ||
36 | #define MB_A_PCI_VENDOR_ID_ADDR (MB_A_PCI_REG_BASE_ADDR + 0x2C) | ||
37 | #define MB_A_PCI_VENDOR_ID (*(volatile u16 *)MB_A_PCI_VENDOR_ID_ADDR) | ||
38 | #define MB_A_PCI_DEVICE_ID_ADDR (MB_A_PCI_REG_BASE_ADDR + 0x2E) | ||
39 | #define MB_A_PCI_DEVICE_ID (*(volatile u16 *)MB_A_PCI_DEVICE_ID_ADDR) | ||
40 | #define MB_A_PCI_DMRR_ADDR (MB_A_PCI_REG_BASE_ADDR + 0x9C) | ||
41 | #define MB_A_PCI_DMRR (*(volatile u32 *)MB_A_PCI_DMRR_ADDR) | ||
42 | #define MB_A_PCI_DMLBAM_ADDR (MB_A_PCI_REG_BASE_ADDR + 0xA0) | ||
43 | #define MB_A_PCI_DMLBAM (*(volatile u32 *)MB_A_PCI_DMLBAM_ADDR) | ||
44 | #define MB_A_PCI_DMLBAI_ADDR (MB_A_PCI_REG_BASE_ADDR + 0xA4) | ||
45 | #define MB_A_PCI_DMLBAI (*(volatile u32 *)MB_A_PCI_DMLBAI_ADDR) | ||
46 | #define MB_A_PCI_PCIPBAM_ADDR (MB_A_PCI_REG_BASE_ADDR + 0xA8) | ||
47 | #define MB_A_PCI_PCIPBAM (*(volatile u32 *)MB_A_PCI_PCIPBAM_ADDR) | ||
48 | /* `PCI Configuration Address Register for Direct Master to PCI IO/CFG' */ | ||
49 | #define MB_A_PCI_DMCFGA_ADDR (MB_A_PCI_REG_BASE_ADDR + 0xAC) | ||
50 | #define MB_A_PCI_DMCFGA (*(volatile u32 *)MB_A_PCI_DMCFGA_ADDR) | ||
51 | /* `PCI Permanent Configuration ID Register' */ | ||
52 | #define MB_A_PCI_PCIHIDR_ADDR (MB_A_PCI_REG_BASE_ADDR + 0xF0) | ||
53 | #define MB_A_PCI_PCIHIDR (*(volatile u32 *)MB_A_PCI_PCIHIDR_ADDR) | ||
54 | |||
55 | |||
56 | #endif /* __V850_MB_A_PCI_H__ */ | ||
diff --git a/include/asm-v850/rte_me2_cb.h b/include/asm-v850/rte_me2_cb.h deleted file mode 100644 index 9922c85c85a8..000000000000 --- a/include/asm-v850/rte_me2_cb.h +++ /dev/null | |||
@@ -1,202 +0,0 @@ | |||
1 | /* | ||
2 | * include/asm-v850/rte_me2_cb.h -- Midas labs RTE-V850E/ME2-CB board | ||
3 | * | ||
4 | * Copyright (C) 2001,02,03 NEC Corporation | ||
5 | * Copyright (C) 2001,02,03 Miles Bader <miles@gnu.org> | ||
6 | * | ||
7 | * This file is subject to the terms and conditions of the GNU General | ||
8 | * Public License. See the file COPYING in the main directory of this | ||
9 | * archive for more details. | ||
10 | * | ||
11 | * Written by Miles Bader <miles@gnu.org> | ||
12 | */ | ||
13 | |||
14 | #ifndef __V850_RTE_ME2_CB_H__ | ||
15 | #define __V850_RTE_ME2_CB_H__ | ||
16 | |||
17 | #include <asm/rte_cb.h> /* Common defs for Midas RTE-CB boards. */ | ||
18 | |||
19 | |||
20 | #define PLATFORM "rte-v850e/me2-cb" | ||
21 | #define PLATFORM_LONG "Midas lab RTE-V850E/ME2-CB" | ||
22 | |||
23 | #define CPU_CLOCK_FREQ 150000000 /* 150MHz */ | ||
24 | #define FIXED_BOGOMIPS 50 | ||
25 | |||
26 | /* 32MB of onbard SDRAM. */ | ||
27 | #define SDRAM_ADDR 0x00800000 | ||
28 | #define SDRAM_SIZE 0x02000000 /* 32MB */ | ||
29 | |||
30 | |||
31 | /* CPU addresses of GBUS memory spaces. */ | ||
32 | #define GCS0_ADDR 0x04000000 /* GCS0 - Common SRAM (2MB) */ | ||
33 | #define GCS0_SIZE 0x00800000 /* 8MB */ | ||
34 | #define GCS1_ADDR 0x04800000 /* GCS1 - Flash ROM (8MB) */ | ||
35 | #define GCS1_SIZE 0x00800000 /* 8MB */ | ||
36 | #define GCS2_ADDR 0x07000000 /* GCS2 - I/O registers */ | ||
37 | #define GCS2_SIZE 0x00800000 /* 8MB */ | ||
38 | #define GCS5_ADDR 0x08000000 /* GCS5 - PCI bus space */ | ||
39 | #define GCS5_SIZE 0x02000000 /* 32MB */ | ||
40 | #define GCS6_ADDR 0x07800000 /* GCS6 - PCI control registers */ | ||
41 | #define GCS6_SIZE 0x00800000 /* 8MB */ | ||
42 | |||
43 | |||
44 | /* For <asm/page.h> */ | ||
45 | #define PAGE_OFFSET SDRAM_ADDR | ||
46 | |||
47 | |||
48 | #ifdef CONFIG_ROM_KERNEL | ||
49 | /* Kernel is in ROM, starting at address 0. */ | ||
50 | |||
51 | #define INTV_BASE 0 | ||
52 | #define ROOT_FS_IMAGE_RW 0 | ||
53 | |||
54 | #else /* !CONFIG_ROM_KERNEL */ | ||
55 | /* Using RAM-kernel. Assume some sort of boot-loader got us loaded at | ||
56 | address 0. */ | ||
57 | |||
58 | #define INTV_BASE 0 | ||
59 | #define ROOT_FS_IMAGE_RW 1 | ||
60 | |||
61 | #endif /* CONFIG_ROM_KERNEL */ | ||
62 | |||
63 | |||
64 | /* Some misc. on-board devices. */ | ||
65 | |||
66 | /* Seven-segment LED display (four digits). */ | ||
67 | #define LED_ADDR(n) (0x0FE02000 + (n)) | ||
68 | #define LED(n) (*(volatile unsigned char *)LED_ADDR(n)) | ||
69 | #define LED_NUM_DIGITS 4 | ||
70 | |||
71 | |||
72 | /* On-board PIC. */ | ||
73 | |||
74 | #define CB_PIC_BASE_ADDR 0x0FE04000 | ||
75 | |||
76 | #define CB_PIC_INT0M_ADDR (CB_PIC_BASE_ADDR + 0x00) | ||
77 | #define CB_PIC_INT0M (*(volatile u16 *)CB_PIC_INT0M_ADDR) | ||
78 | #define CB_PIC_INT1M_ADDR (CB_PIC_BASE_ADDR + 0x10) | ||
79 | #define CB_PIC_INT1M (*(volatile u16 *)CB_PIC_INT1M_ADDR) | ||
80 | #define CB_PIC_INTR_ADDR (CB_PIC_BASE_ADDR + 0x20) | ||
81 | #define CB_PIC_INTR (*(volatile u16 *)CB_PIC_INTR_ADDR) | ||
82 | #define CB_PIC_INTEN_ADDR (CB_PIC_BASE_ADDR + 0x30) | ||
83 | #define CB_PIC_INTEN (*(volatile u16 *)CB_PIC_INTEN_ADDR) | ||
84 | |||
85 | #define CB_PIC_INT0EN 0x0001 | ||
86 | #define CB_PIC_INT1EN 0x0002 | ||
87 | #define CB_PIC_INT0SEL 0x0080 | ||
88 | |||
89 | /* The PIC interrupts themselves. */ | ||
90 | #define CB_PIC_BASE_IRQ NUM_CPU_IRQS | ||
91 | #define IRQ_CB_PIC_NUM 10 | ||
92 | |||
93 | /* Some specific CB_PIC interrupts. */ | ||
94 | #define IRQ_CB_EXTTM0 (CB_PIC_BASE_IRQ + 0) | ||
95 | #define IRQ_CB_EXTSIO (CB_PIC_BASE_IRQ + 1) | ||
96 | #define IRQ_CB_TOVER (CB_PIC_BASE_IRQ + 2) | ||
97 | #define IRQ_CB_GINT0 (CB_PIC_BASE_IRQ + 3) | ||
98 | #define IRQ_CB_USB (CB_PIC_BASE_IRQ + 4) | ||
99 | #define IRQ_CB_LANC (CB_PIC_BASE_IRQ + 5) | ||
100 | #define IRQ_CB_USB_VBUS_ON (CB_PIC_BASE_IRQ + 6) | ||
101 | #define IRQ_CB_USB_VBUS_OFF (CB_PIC_BASE_IRQ + 7) | ||
102 | #define IRQ_CB_EXTTM1 (CB_PIC_BASE_IRQ + 8) | ||
103 | #define IRQ_CB_EXTTM2 (CB_PIC_BASE_IRQ + 9) | ||
104 | |||
105 | /* The GBUS GINT1 - GINT3 (note, not GINT0!) interrupts are connected to | ||
106 | the INTP65 - INTP67 pins on the CPU. These are shared among the GBUS | ||
107 | interrupts. */ | ||
108 | #define IRQ_GINT(n) IRQ_INTP((n) + 9) /* 0 is unused! */ | ||
109 | #define IRQ_GINT_NUM 4 /* 0 is unused! */ | ||
110 | |||
111 | /* The shared interrupt line from the PIC is connected to CPU pin INTP23. */ | ||
112 | #define IRQ_CB_PIC IRQ_INTP(4) /* P23 */ | ||
113 | |||
114 | /* Used by <asm/rte_cb.h> to derive NUM_MACH_IRQS. */ | ||
115 | #define NUM_RTE_CB_IRQS (NUM_CPU_IRQS + IRQ_CB_PIC_NUM) | ||
116 | |||
117 | |||
118 | #ifndef __ASSEMBLY__ | ||
119 | struct cb_pic_irq_init { | ||
120 | const char *name; /* name of interrupt type */ | ||
121 | |||
122 | /* Range of kernel irq numbers for this type: | ||
123 | BASE, BASE+INTERVAL, ..., BASE+INTERVAL*NUM */ | ||
124 | unsigned base, num, interval; | ||
125 | |||
126 | unsigned priority; /* interrupt priority to assign */ | ||
127 | }; | ||
128 | struct hw_interrupt_type; /* fwd decl */ | ||
129 | |||
130 | /* Enable interrupt handling for interrupt IRQ. */ | ||
131 | extern void cb_pic_enable_irq (unsigned irq); | ||
132 | /* Disable interrupt handling for interrupt IRQ. Note that any interrupts | ||
133 | received while disabled will be delivered once the interrupt is enabled | ||
134 | again, unless they are explicitly cleared using `cb_pic_clear_pending_irq'. */ | ||
135 | extern void cb_pic_disable_irq (unsigned irq); | ||
136 | /* Initialize HW_IRQ_TYPES for PIC irqs described in array INITS (which is | ||
137 | terminated by an entry with the name field == 0). */ | ||
138 | extern void cb_pic_init_irq_types (struct cb_pic_irq_init *inits, | ||
139 | struct hw_interrupt_type *hw_irq_types); | ||
140 | /* Initialize PIC interrupts. */ | ||
141 | extern void cb_pic_init_irqs (void); | ||
142 | #endif /* __ASSEMBLY__ */ | ||
143 | |||
144 | |||
145 | /* TL16C550C on board UART see also asm/serial.h */ | ||
146 | #define CB_UART_BASE 0x0FE08000 | ||
147 | #define CB_UART_REG_GAP 0x10 | ||
148 | #define CB_UART_CLOCK 0x16000000 | ||
149 | |||
150 | /* CompactFlash setting */ | ||
151 | #define CB_CF_BASE 0x0FE0C000 | ||
152 | #define CB_CF_CCR_ADDR (CB_CF_BASE+0x200) | ||
153 | #define CB_CF_CCR (*(volatile u8 *)CB_CF_CCR_ADDR) | ||
154 | #define CB_CF_REG0_ADDR (CB_CF_BASE+0x1000) | ||
155 | #define CB_CF_REG0 (*(volatile u16 *)CB_CF_REG0_ADDR) | ||
156 | #define CB_CF_STS0_ADDR (CB_CF_BASE+0x1004) | ||
157 | #define CB_CF_STS0 (*(volatile u16 *)CB_CF_STS0_ADDR) | ||
158 | #define CB_PCATA_BASE (CB_CF_BASE+0x800) | ||
159 | #define CB_IDE_BASE (CB_CF_BASE+0x9F0) | ||
160 | #define CB_IDE_CTRL (CB_CF_BASE+0xBF6) | ||
161 | #define CB_IDE_REG_OFFS 0x1 | ||
162 | |||
163 | |||
164 | /* SMSC LAN91C111 setting */ | ||
165 | #if defined(CONFIG_SMC91111) | ||
166 | #define CB_LANC_BASE 0x0FE10300 | ||
167 | #define CONFIG_SMC16BITONLY | ||
168 | #define ETH0_ADDR CB_LANC_BASE | ||
169 | #define ETH0_IRQ IRQ_CB_LANC | ||
170 | #endif /* CONFIG_SMC16BITONLY */ | ||
171 | |||
172 | |||
173 | #undef V850E_UART_PRE_CONFIGURE | ||
174 | #define V850E_UART_PRE_CONFIGURE rte_me2_cb_uart_pre_configure | ||
175 | #ifndef __ASSEMBLY__ | ||
176 | extern void rte_me2_cb_uart_pre_configure (unsigned chan, | ||
177 | unsigned cflags, unsigned baud); | ||
178 | #endif /* __ASSEMBLY__ */ | ||
179 | |||
180 | /* This board supports RTS/CTS for the on-chip UART, but only for channel 0. */ | ||
181 | |||
182 | /* CTS for UART channel 0 is pin P22 (bit 2 of port 2). */ | ||
183 | #define V850E_UART_CTS(chan) ((chan) == 0 ? !(ME2_PORT2_IO & 0x4) : 1) | ||
184 | /* RTS for UART channel 0 is pin P21 (bit 1 of port 2). */ | ||
185 | #define V850E_UART_SET_RTS(chan, val) \ | ||
186 | do { \ | ||
187 | if (chan == 0) { \ | ||
188 | unsigned old = ME2_PORT2_IO; \ | ||
189 | if (val) \ | ||
190 | ME2_PORT2_IO = old & ~0x2; \ | ||
191 | else \ | ||
192 | ME2_PORT2_IO = old | 0x2; \ | ||
193 | } \ | ||
194 | } while (0) | ||
195 | |||
196 | |||
197 | #ifndef __ASSEMBLY__ | ||
198 | extern void rte_me2_cb_init_irqs (void); | ||
199 | #endif /* !__ASSEMBLY__ */ | ||
200 | |||
201 | |||
202 | #endif /* __V850_RTE_ME2_CB_H__ */ | ||
diff --git a/include/asm-v850/rte_nb85e_cb.h b/include/asm-v850/rte_nb85e_cb.h deleted file mode 100644 index f56591cad90a..000000000000 --- a/include/asm-v850/rte_nb85e_cb.h +++ /dev/null | |||
@@ -1,111 +0,0 @@ | |||
1 | /* | ||
2 | * include/asm-v850/rte_nb85e_cb.h -- Midas labs RTE-V850/NB85E-CB board | ||
3 | * | ||
4 | * Copyright (C) 2001,02,03 NEC Electronics Corporation | ||
5 | * Copyright (C) 2001,02,03 Miles Bader <miles@gnu.org> | ||
6 | * | ||
7 | * This file is subject to the terms and conditions of the GNU General | ||
8 | * Public License. See the file COPYING in the main directory of this | ||
9 | * archive for more details. | ||
10 | * | ||
11 | * Written by Miles Bader <miles@gnu.org> | ||
12 | */ | ||
13 | |||
14 | #ifndef __V850_RTE_NB85E_CB_H__ | ||
15 | #define __V850_RTE_NB85E_CB_H__ | ||
16 | |||
17 | #include <asm/rte_cb.h> /* Common defs for Midas RTE-CB boards. */ | ||
18 | |||
19 | |||
20 | #define PLATFORM "rte-v850e/nb85e-cb" | ||
21 | #define PLATFORM_LONG "Midas lab RTE-V850E/NB85E-CB" | ||
22 | |||
23 | #define CPU_CLOCK_FREQ 50000000 /* 50MHz */ | ||
24 | |||
25 | /* 1MB of onboard SRAM. Note that the monitor ROM uses parts of this | ||
26 | for its own purposes, so care must be taken. */ | ||
27 | #define SRAM_ADDR 0x03C00000 | ||
28 | #define SRAM_SIZE 0x00100000 /* 1MB */ | ||
29 | |||
30 | /* 16MB of onbard SDRAM. */ | ||
31 | #define SDRAM_ADDR 0x01000000 | ||
32 | #define SDRAM_SIZE 0x01000000 /* 16MB */ | ||
33 | |||
34 | |||
35 | /* CPU addresses of GBUS memory spaces. */ | ||
36 | #define GCS0_ADDR 0x00400000 /* GCS0 - Common SRAM (2MB) */ | ||
37 | #define GCS0_SIZE 0x00400000 /* 4MB */ | ||
38 | #define GCS1_ADDR 0x02000000 /* GCS1 - Flash ROM (8MB) */ | ||
39 | #define GCS1_SIZE 0x00800000 /* 8MB */ | ||
40 | #define GCS2_ADDR 0x03900000 /* GCS2 - I/O registers */ | ||
41 | #define GCS2_SIZE 0x00080000 /* 512KB */ | ||
42 | #define GCS3_ADDR 0x02800000 /* GCS3 - EXT-bus: memory space */ | ||
43 | #define GCS3_SIZE 0x00800000 /* 8MB */ | ||
44 | #define GCS4_ADDR 0x03A00000 /* GCS4 - EXT-bus: I/O space */ | ||
45 | #define GCS4_SIZE 0x00200000 /* 2MB */ | ||
46 | #define GCS5_ADDR 0x00800000 /* GCS5 - PCI bus space */ | ||
47 | #define GCS5_SIZE 0x00800000 /* 8MB */ | ||
48 | #define GCS6_ADDR 0x03980000 /* GCS6 - PCI control registers */ | ||
49 | #define GCS6_SIZE 0x00010000 /* 64KB */ | ||
50 | |||
51 | |||
52 | /* The GBUS GINT0 - GINT3 interrupts are connected to CPU interrupts 10-12. | ||
53 | These are shared among the GBUS interrupts. */ | ||
54 | #define IRQ_GINT(n) (10 + (n)) | ||
55 | #define IRQ_GINT_NUM 3 | ||
56 | |||
57 | /* Used by <asm/rte_cb.h> to derive NUM_MACH_IRQS. */ | ||
58 | #define NUM_RTE_CB_IRQS NUM_CPU_IRQS | ||
59 | |||
60 | |||
61 | #ifdef CONFIG_ROM_KERNEL | ||
62 | /* Kernel is in ROM, starting at address 0. */ | ||
63 | |||
64 | #define INTV_BASE 0 | ||
65 | |||
66 | #else /* !CONFIG_ROM_KERNEL */ | ||
67 | /* We're using the ROM monitor. */ | ||
68 | |||
69 | /* The chip's real interrupt vectors are in ROM, but they jump to a | ||
70 | secondary interrupt vector table in RAM. */ | ||
71 | #define INTV_BASE 0x03CF8000 | ||
72 | |||
73 | /* Scratch memory used by the ROM monitor, which shouldn't be used by | ||
74 | linux (except for the alternate interrupt vector area, defined | ||
75 | above). */ | ||
76 | #define MON_SCRATCH_ADDR 0x03CE8000 | ||
77 | #define MON_SCRATCH_SIZE 0x00018000 /* 96KB */ | ||
78 | |||
79 | #endif /* CONFIG_ROM_KERNEL */ | ||
80 | |||
81 | |||
82 | /* Some misc. on-board devices. */ | ||
83 | |||
84 | /* Seven-segment LED display (two digits). Write-only. */ | ||
85 | #define LED_ADDR(n) (0x03802000 + (n)) | ||
86 | #define LED(n) (*(volatile unsigned char *)LED_ADDR(n)) | ||
87 | #define LED_NUM_DIGITS 4 | ||
88 | |||
89 | |||
90 | /* Override the basic TEG UART pre-initialization so that we can | ||
91 | initialize extra stuff. */ | ||
92 | #undef V850E_UART_PRE_CONFIGURE /* should be defined by <asm/teg.h> */ | ||
93 | #define V850E_UART_PRE_CONFIGURE rte_nb85e_cb_uart_pre_configure | ||
94 | #ifndef __ASSEMBLY__ | ||
95 | extern void rte_nb85e_cb_uart_pre_configure (unsigned chan, | ||
96 | unsigned cflags, unsigned baud); | ||
97 | #endif | ||
98 | |||
99 | /* This board supports RTS/CTS for the on-chip UART. */ | ||
100 | |||
101 | /* CTS is pin P00. */ | ||
102 | #define V850E_UART_CTS(chan) (! (TEG_PORT0_IO & 0x1)) | ||
103 | /* RTS is pin P02. */ | ||
104 | #define V850E_UART_SET_RTS(chan, val) \ | ||
105 | do { \ | ||
106 | unsigned old = TEG_PORT0_IO; \ | ||
107 | TEG_PORT0_IO = val ? (old & ~0x4) : (old | 0x4); \ | ||
108 | } while (0) | ||
109 | |||
110 | |||
111 | #endif /* __V850_RTE_NB85E_CB_H__ */ | ||
diff --git a/include/asm-v850/scatterlist.h b/include/asm-v850/scatterlist.h deleted file mode 100644 index 02d27b3fb061..000000000000 --- a/include/asm-v850/scatterlist.h +++ /dev/null | |||
@@ -1,31 +0,0 @@ | |||
1 | /* | ||
2 | * include/asm-v850/scatterlist.h | ||
3 | * | ||
4 | * Copyright (C) 2001,02 NEC Corporation | ||
5 | * Copyright (C) 2001,02 Miles Bader <miles@gnu.org> | ||
6 | * | ||
7 | * This file is subject to the terms and conditions of the GNU General | ||
8 | * Public License. See the file COPYING in the main directory of this | ||
9 | * archive for more details. | ||
10 | * | ||
11 | * Written by Miles Bader <miles@gnu.org> | ||
12 | */ | ||
13 | |||
14 | #ifndef __V850_SCATTERLIST_H__ | ||
15 | #define __V850_SCATTERLIST_H__ | ||
16 | |||
17 | #include <asm/types.h> | ||
18 | |||
19 | struct scatterlist { | ||
20 | #ifdef CONFIG_DEBUG_SG | ||
21 | unsigned long sg_magic; | ||
22 | #endif | ||
23 | unsigned long page_link; | ||
24 | unsigned offset; | ||
25 | dma_addr_t dma_address; | ||
26 | unsigned length; | ||
27 | }; | ||
28 | |||
29 | #define ISA_DMA_THRESHOLD (~0UL) | ||
30 | |||
31 | #endif /* __V850_SCATTERLIST_H__ */ | ||
diff --git a/include/asm-v850/sections.h b/include/asm-v850/sections.h deleted file mode 100644 index e0238253a0d0..000000000000 --- a/include/asm-v850/sections.h +++ /dev/null | |||
@@ -1,6 +0,0 @@ | |||
1 | #ifndef __V850_SECTIONS_H__ | ||
2 | #define __V850_SECTIONS_H__ | ||
3 | |||
4 | #include <asm-generic/sections.h> | ||
5 | |||
6 | #endif /* __V850_SECTIONS_H__ */ | ||
diff --git a/include/asm-v850/segment.h b/include/asm-v850/segment.h deleted file mode 100644 index 5e2b15dcf3d9..000000000000 --- a/include/asm-v850/segment.h +++ /dev/null | |||
@@ -1,36 +0,0 @@ | |||
1 | #ifndef __V850_SEGMENT_H__ | ||
2 | #define __V850_SEGMENT_H__ | ||
3 | |||
4 | |||
5 | #ifndef __ASSEMBLY__ | ||
6 | |||
7 | typedef unsigned long mm_segment_t; /* domain register */ | ||
8 | |||
9 | #endif /* !__ASSEMBLY__ */ | ||
10 | |||
11 | |||
12 | #define __KERNEL_CS 0x0 | ||
13 | #define __KERNEL_DS 0x0 | ||
14 | |||
15 | #define __USER_CS 0x1 | ||
16 | #define __USER_DS 0x1 | ||
17 | |||
18 | #define KERNEL_DS __KERNEL_DS | ||
19 | #define KERNEL_CS __KERNEL_CS | ||
20 | #define USER_DS __USER_DS | ||
21 | #define USER_CS __USER_CS | ||
22 | |||
23 | #define segment_eq(a,b) ((a) == (b)) | ||
24 | |||
25 | #define get_ds() (KERNEL_DS) | ||
26 | #define get_fs() (USER_DS) | ||
27 | |||
28 | #define set_fs(seg) ((void)(seg)) | ||
29 | |||
30 | |||
31 | #define copy_segments(task, mm) ((void)((void)(task), (mm))) | ||
32 | #define release_segments(mm) ((void)(mm)) | ||
33 | #define forget_segments() ((void)0) | ||
34 | |||
35 | |||
36 | #endif /* __V850_SEGMENT_H__ */ | ||
diff --git a/include/asm-v850/semaphore.h b/include/asm-v850/semaphore.h deleted file mode 100644 index d9b2034ed1d2..000000000000 --- a/include/asm-v850/semaphore.h +++ /dev/null | |||
@@ -1 +0,0 @@ | |||
1 | #include <linux/semaphore.h> | ||
diff --git a/include/asm-v850/sembuf.h b/include/asm-v850/sembuf.h deleted file mode 100644 index 1622231a8b85..000000000000 --- a/include/asm-v850/sembuf.h +++ /dev/null | |||
@@ -1,25 +0,0 @@ | |||
1 | #ifndef __V850_SEMBUF_H__ | ||
2 | #define __V850_SEMBUF_H__ | ||
3 | |||
4 | /* | ||
5 | * The semid64_ds structure for v850 architecture. | ||
6 | * Note extra padding because this structure is passed back and forth | ||
7 | * between kernel and user space. | ||
8 | * | ||
9 | * Pad space is left for: | ||
10 | * - 64-bit time_t to solve y2038 problem | ||
11 | * - 2 miscellaneous 32-bit values | ||
12 | */ | ||
13 | |||
14 | struct semid64_ds { | ||
15 | struct ipc64_perm sem_perm; /* permissions .. see ipc.h */ | ||
16 | __kernel_time_t sem_otime; /* last semop time */ | ||
17 | unsigned long __unused1; | ||
18 | __kernel_time_t sem_ctime; /* last change time */ | ||
19 | unsigned long __unused2; | ||
20 | unsigned long sem_nsems; /* no. of semaphores in array */ | ||
21 | unsigned long __unused3; | ||
22 | unsigned long __unused4; | ||
23 | }; | ||
24 | |||
25 | #endif /* __V850_SEMBUF_H__ */ | ||
diff --git a/include/asm-v850/serial.h b/include/asm-v850/serial.h deleted file mode 100644 index 36d8f4cbbf39..000000000000 --- a/include/asm-v850/serial.h +++ /dev/null | |||
@@ -1,56 +0,0 @@ | |||
1 | /* | ||
2 | * This file is subject to the terms and conditions of the GNU General Public | ||
3 | * License. See the file "COPYING" in the main directory of this archive | ||
4 | * for more details. | ||
5 | * | ||
6 | * Copyright (C) 1999 by Ralf Baechle | ||
7 | * Copyright (C) 1999, 2000 Silicon Graphics, Inc. | ||
8 | */ | ||
9 | |||
10 | #ifdef CONFIG_RTE_CB_ME2 | ||
11 | |||
12 | #include <asm/rte_me2_cb.h> | ||
13 | |||
14 | #define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST) | ||
15 | |||
16 | #define irq_cannonicalize(x) (x) | ||
17 | #define BASE_BAUD 250000 /* (16MHz / (16 * 38400)) * 9600 */ | ||
18 | #define SERIAL_PORT_DFNS \ | ||
19 | { 0, BASE_BAUD, CB_UART_BASE, IRQ_CB_EXTSIO, STD_COM_FLAGS }, | ||
20 | |||
21 | /* Redefine UART register offsets. */ | ||
22 | #undef UART_RX | ||
23 | #undef UART_TX | ||
24 | #undef UART_DLL | ||
25 | #undef UART_TRG | ||
26 | #undef UART_DLM | ||
27 | #undef UART_IER | ||
28 | #undef UART_FCTR | ||
29 | #undef UART_IIR | ||
30 | #undef UART_FCR | ||
31 | #undef UART_EFR | ||
32 | #undef UART_LCR | ||
33 | #undef UART_MCR | ||
34 | #undef UART_LSR | ||
35 | #undef UART_MSR | ||
36 | #undef UART_SCR | ||
37 | #undef UART_EMSR | ||
38 | |||
39 | #define UART_RX (0 * CB_UART_REG_GAP) | ||
40 | #define UART_TX (0 * CB_UART_REG_GAP) | ||
41 | #define UART_DLL (0 * CB_UART_REG_GAP) | ||
42 | #define UART_TRG (0 * CB_UART_REG_GAP) | ||
43 | #define UART_DLM (1 * CB_UART_REG_GAP) | ||
44 | #define UART_IER (1 * CB_UART_REG_GAP) | ||
45 | #define UART_FCTR (1 * CB_UART_REG_GAP) | ||
46 | #define UART_IIR (2 * CB_UART_REG_GAP) | ||
47 | #define UART_FCR (2 * CB_UART_REG_GAP) | ||
48 | #define UART_EFR (2 * CB_UART_REG_GAP) | ||
49 | #define UART_LCR (3 * CB_UART_REG_GAP) | ||
50 | #define UART_MCR (4 * CB_UART_REG_GAP) | ||
51 | #define UART_LSR (5 * CB_UART_REG_GAP) | ||
52 | #define UART_MSR (6 * CB_UART_REG_GAP) | ||
53 | #define UART_SCR (7 * CB_UART_REG_GAP) | ||
54 | #define UART_EMSR (7 * CB_UART_REG_GAP) | ||
55 | |||
56 | #endif /* CONFIG_RTE_CB_ME2 */ | ||
diff --git a/include/asm-v850/setup.h b/include/asm-v850/setup.h deleted file mode 100644 index c48a9b97d05b..000000000000 --- a/include/asm-v850/setup.h +++ /dev/null | |||
@@ -1,6 +0,0 @@ | |||
1 | #ifndef _V850_SETUP_H | ||
2 | #define _V850_SETUP_H | ||
3 | |||
4 | #define COMMAND_LINE_SIZE 512 | ||
5 | |||
6 | #endif /* __SETUP_H */ | ||
diff --git a/include/asm-v850/shmbuf.h b/include/asm-v850/shmbuf.h deleted file mode 100644 index 3d085c9c418e..000000000000 --- a/include/asm-v850/shmbuf.h +++ /dev/null | |||
@@ -1,42 +0,0 @@ | |||
1 | #ifndef __V850_SHMBUF_H__ | ||
2 | #define __V850_SHMBUF_H__ | ||
3 | |||
4 | /* | ||
5 | * The shmid64_ds structure for v850 architecture. | ||
6 | * Note extra padding because this structure is passed back and forth | ||
7 | * between kernel and user space. | ||
8 | * | ||
9 | * Pad space is left for: | ||
10 | * - 64-bit time_t to solve y2038 problem | ||
11 | * - 2 miscellaneous 32-bit values | ||
12 | */ | ||
13 | |||
14 | struct shmid64_ds { | ||
15 | struct ipc64_perm shm_perm; /* operation perms */ | ||
16 | size_t shm_segsz; /* size of segment (bytes) */ | ||
17 | __kernel_time_t shm_atime; /* last attach time */ | ||
18 | unsigned long __unused1; | ||
19 | __kernel_time_t shm_dtime; /* last detach time */ | ||
20 | unsigned long __unused2; | ||
21 | __kernel_time_t shm_ctime; /* last change time */ | ||
22 | unsigned long __unused3; | ||
23 | __kernel_pid_t shm_cpid; /* pid of creator */ | ||
24 | __kernel_pid_t shm_lpid; /* pid of last operator */ | ||
25 | unsigned long shm_nattch; /* no. of current attaches */ | ||
26 | unsigned long __unused4; | ||
27 | unsigned long __unused5; | ||
28 | }; | ||
29 | |||
30 | struct shminfo64 { | ||
31 | unsigned long shmmax; | ||
32 | unsigned long shmmin; | ||
33 | unsigned long shmmni; | ||
34 | unsigned long shmseg; | ||
35 | unsigned long shmall; | ||
36 | unsigned long __unused1; | ||
37 | unsigned long __unused2; | ||
38 | unsigned long __unused3; | ||
39 | unsigned long __unused4; | ||
40 | }; | ||
41 | |||
42 | #endif /* __V850_SHMBUF_H__ */ | ||
diff --git a/include/asm-v850/shmparam.h b/include/asm-v850/shmparam.h deleted file mode 100644 index 7dcb6739073e..000000000000 --- a/include/asm-v850/shmparam.h +++ /dev/null | |||
@@ -1,6 +0,0 @@ | |||
1 | #ifndef __V850_SHMPARAM_H__ | ||
2 | #define __V850_SHMPARAM_H__ | ||
3 | |||
4 | #define SHMLBA PAGE_SIZE /* attach addr a multiple of this */ | ||
5 | |||
6 | #endif /* __V850_SHMPARAM_H__ */ | ||
diff --git a/include/asm-v850/sigcontext.h b/include/asm-v850/sigcontext.h deleted file mode 100644 index e0890f6f4bc9..000000000000 --- a/include/asm-v850/sigcontext.h +++ /dev/null | |||
@@ -1,25 +0,0 @@ | |||
1 | /* | ||
2 | * include/asm-v850/sigcontext.h -- Signal contexts | ||
3 | * | ||
4 | * Copyright (C) 2001 NEC Corporation | ||
5 | * Copyright (C) 2001 Miles Bader <miles@gnu.org> | ||
6 | * | ||
7 | * This file is subject to the terms and conditions of the GNU General | ||
8 | * Public License. See the file COPYING in the main directory of this | ||
9 | * archive for more details. | ||
10 | * | ||
11 | * Written by Miles Bader <miles@gnu.org> | ||
12 | */ | ||
13 | |||
14 | #ifndef __V850_SIGCONTEXT_H__ | ||
15 | #define __V850_SIGCONTEXT_H__ | ||
16 | |||
17 | #include <asm/ptrace.h> | ||
18 | |||
19 | struct sigcontext | ||
20 | { | ||
21 | struct pt_regs regs; | ||
22 | unsigned long oldmask; | ||
23 | }; | ||
24 | |||
25 | #endif /* __V850_SIGCONTEXT_H__ */ | ||
diff --git a/include/asm-v850/siginfo.h b/include/asm-v850/siginfo.h deleted file mode 100644 index 7eb94703dce0..000000000000 --- a/include/asm-v850/siginfo.h +++ /dev/null | |||
@@ -1,6 +0,0 @@ | |||
1 | #ifndef __V850_SIGINFO_H__ | ||
2 | #define __V850_SIGINFO_H__ | ||
3 | |||
4 | #include <asm-generic/siginfo.h> | ||
5 | |||
6 | #endif /* __V850_SIGINFO_H__ */ | ||
diff --git a/include/asm-v850/signal.h b/include/asm-v850/signal.h deleted file mode 100644 index a38df0834bbf..000000000000 --- a/include/asm-v850/signal.h +++ /dev/null | |||
@@ -1,168 +0,0 @@ | |||
1 | #ifndef __V850_SIGNAL_H__ | ||
2 | #define __V850_SIGNAL_H__ | ||
3 | |||
4 | #include <linux/types.h> | ||
5 | |||
6 | /* Avoid too many header ordering problems. */ | ||
7 | struct siginfo; | ||
8 | |||
9 | |||
10 | #ifdef __KERNEL__ | ||
11 | |||
12 | /* Most things should be clean enough to redefine this at will, if care | ||
13 | is taken to make libc match. */ | ||
14 | #define _NSIG 64 | ||
15 | #define _NSIG_BPW 32 | ||
16 | #define _NSIG_WORDS (_NSIG / _NSIG_BPW) | ||
17 | |||
18 | typedef unsigned long old_sigset_t; /* at least 32 bits */ | ||
19 | |||
20 | typedef struct { | ||
21 | unsigned long sig[_NSIG_WORDS]; | ||
22 | } sigset_t; | ||
23 | |||
24 | #else /* !__KERNEL__ */ | ||
25 | |||
26 | /* Here we must cater to libcs that poke about in kernel headers. */ | ||
27 | |||
28 | #define NSIG 32 | ||
29 | typedef unsigned long sigset_t; | ||
30 | |||
31 | #endif /* __KERNEL__ */ | ||
32 | |||
33 | |||
34 | #define SIGHUP 1 | ||
35 | #define SIGINT 2 | ||
36 | #define SIGQUIT 3 | ||
37 | #define SIGILL 4 | ||
38 | #define SIGTRAP 5 | ||
39 | #define SIGABRT 6 | ||
40 | #define SIGIOT 6 | ||
41 | #define SIGBUS 7 | ||
42 | #define SIGFPE 8 | ||
43 | #define SIGKILL 9 | ||
44 | #define SIGUSR1 10 | ||
45 | #define SIGSEGV 11 | ||
46 | #define SIGUSR2 12 | ||
47 | #define SIGPIPE 13 | ||
48 | #define SIGALRM 14 | ||
49 | #define SIGTERM 15 | ||
50 | #define SIGSTKFLT 16 | ||
51 | #define SIGCHLD 17 | ||
52 | #define SIGCONT 18 | ||
53 | #define SIGSTOP 19 | ||
54 | #define SIGTSTP 20 | ||
55 | #define SIGTTIN 21 | ||
56 | #define SIGTTOU 22 | ||
57 | #define SIGURG 23 | ||
58 | #define SIGXCPU 24 | ||
59 | #define SIGXFSZ 25 | ||
60 | #define SIGVTALRM 26 | ||
61 | #define SIGPROF 27 | ||
62 | #define SIGWINCH 28 | ||
63 | #define SIGIO 29 | ||
64 | #define SIGPOLL SIGIO | ||
65 | /* | ||
66 | #define SIGLOST 29 | ||
67 | */ | ||
68 | #define SIGPWR 30 | ||
69 | #define SIGSYS 31 | ||
70 | #define SIGUNUSED 31 | ||
71 | |||
72 | /* These should not be considered constants from userland. */ | ||
73 | #define SIGRTMIN 32 | ||
74 | #define SIGRTMAX _NSIG | ||
75 | |||
76 | /* | ||
77 | * SA_FLAGS values: | ||
78 | * | ||
79 | * SA_ONSTACK indicates that a registered stack_t will be used. | ||
80 | * SA_RESTART flag to get restarting signals (which were the default long ago) | ||
81 | * SA_NOCLDSTOP flag to turn off SIGCHLD when children stop. | ||
82 | * SA_RESETHAND clears the handler when the signal is delivered. | ||
83 | * SA_NOCLDWAIT flag on SIGCHLD to inhibit zombies. | ||
84 | * SA_NODEFER prevents the current signal from being masked in the handler. | ||
85 | * | ||
86 | * SA_ONESHOT and SA_NOMASK are the historical Linux names for the Single | ||
87 | * Unix names RESETHAND and NODEFER respectively. | ||
88 | */ | ||
89 | #define SA_NOCLDSTOP 0x00000001 | ||
90 | #define SA_NOCLDWAIT 0x00000002 | ||
91 | #define SA_SIGINFO 0x00000004 | ||
92 | #define SA_ONSTACK 0x08000000 | ||
93 | #define SA_RESTART 0x10000000 | ||
94 | #define SA_NODEFER 0x40000000 | ||
95 | #define SA_RESETHAND 0x80000000 | ||
96 | |||
97 | #define SA_NOMASK SA_NODEFER | ||
98 | #define SA_ONESHOT SA_RESETHAND | ||
99 | |||
100 | #define SA_RESTORER 0x04000000 | ||
101 | |||
102 | /* | ||
103 | * sigaltstack controls | ||
104 | */ | ||
105 | #define SS_ONSTACK 1 | ||
106 | #define SS_DISABLE 2 | ||
107 | |||
108 | #define MINSIGSTKSZ 2048 | ||
109 | #define SIGSTKSZ 8192 | ||
110 | |||
111 | #include <asm-generic/signal.h> | ||
112 | |||
113 | #ifdef __KERNEL__ | ||
114 | |||
115 | struct old_sigaction { | ||
116 | __sighandler_t sa_handler; | ||
117 | old_sigset_t sa_mask; | ||
118 | unsigned long sa_flags; | ||
119 | void (*sa_restorer)(void); | ||
120 | }; | ||
121 | |||
122 | struct sigaction { | ||
123 | __sighandler_t sa_handler; | ||
124 | unsigned long sa_flags; | ||
125 | void (*sa_restorer)(void); | ||
126 | sigset_t sa_mask; /* mask last for extensibility */ | ||
127 | }; | ||
128 | |||
129 | struct k_sigaction { | ||
130 | struct sigaction sa; | ||
131 | }; | ||
132 | |||
133 | #else /* !__KERNEL__ */ | ||
134 | |||
135 | /* Here we must cater to libcs that poke about in kernel headers. */ | ||
136 | |||
137 | struct sigaction { | ||
138 | union { | ||
139 | __sighandler_t _sa_handler; | ||
140 | void (*_sa_sigaction)(int, struct siginfo *, void *); | ||
141 | } _u; | ||
142 | sigset_t sa_mask; | ||
143 | unsigned long sa_flags; | ||
144 | void (*sa_restorer)(void); | ||
145 | }; | ||
146 | |||
147 | #define sa_handler _u._sa_handler | ||
148 | #define sa_sigaction _u._sa_sigaction | ||
149 | |||
150 | #endif /* __KERNEL__ */ | ||
151 | |||
152 | |||
153 | typedef struct sigaltstack { | ||
154 | void *ss_sp; | ||
155 | int ss_flags; | ||
156 | size_t ss_size; | ||
157 | } stack_t; | ||
158 | |||
159 | #ifdef __KERNEL__ | ||
160 | |||
161 | #include <asm/sigcontext.h> | ||
162 | #undef __HAVE_ARCH_SIG_BITOPS | ||
163 | |||
164 | #define ptrace_signal_deliver(regs, cookie) do { } while (0) | ||
165 | |||
166 | #endif /* __KERNEL__ */ | ||
167 | |||
168 | #endif /* __V850_SIGNAL_H__ */ | ||
diff --git a/include/asm-v850/sim.h b/include/asm-v850/sim.h deleted file mode 100644 index 026932d476cd..000000000000 --- a/include/asm-v850/sim.h +++ /dev/null | |||
@@ -1,47 +0,0 @@ | |||
1 | /* | ||
2 | * include/asm-v850/sim.h -- Machine-dependent defs for GDB v850e simulator | ||
3 | * | ||
4 | * Copyright (C) 2001,02,03 NEC Electronics Corporation | ||
5 | * Copyright (C) 2001,02,03 Miles Bader <miles@gnu.org> | ||
6 | * | ||
7 | * This file is subject to the terms and conditions of the GNU General | ||
8 | * Public License. See the file COPYING in the main directory of this | ||
9 | * archive for more details. | ||
10 | * | ||
11 | * Written by Miles Bader <miles@gnu.org> | ||
12 | */ | ||
13 | |||
14 | #ifndef __V850_SIM_H__ | ||
15 | #define __V850_SIM_H__ | ||
16 | |||
17 | |||
18 | #define CPU_ARCH "v850e" | ||
19 | #define CPU_MODEL "v850e" | ||
20 | #define CPU_MODEL_LONG "NEC V850E" | ||
21 | #define PLATFORM "gdb/v850e" | ||
22 | #define PLATFORM_LONG "GDB V850E simulator" | ||
23 | |||
24 | |||
25 | /* We use a weird value for RAM, not just 0, for testing purposes. | ||
26 | These must match the values used in the linker script. */ | ||
27 | #define RAM_ADDR 0x8F000000 | ||
28 | #define RAM_SIZE 0x03000000 | ||
29 | |||
30 | |||
31 | /* For <asm/page.h> */ | ||
32 | #define PAGE_OFFSET RAM_ADDR | ||
33 | |||
34 | |||
35 | /* For <asm/entry.h> */ | ||
36 | /* `R0 RAM', used for a few miscellaneous variables that must be | ||
37 | accessible using a load instruction relative to R0. On real | ||
38 | processors, this usually is on-chip RAM, but here we just | ||
39 | choose an arbitrary address that meets the above constraint. */ | ||
40 | #define R0_RAM_ADDR 0xFFFFF000 | ||
41 | |||
42 | |||
43 | /* For <asm/irq.h> */ | ||
44 | #define NUM_CPU_IRQS 6 | ||
45 | |||
46 | |||
47 | #endif /* __V850_SIM_H__ */ | ||
diff --git a/include/asm-v850/sim85e2.h b/include/asm-v850/sim85e2.h deleted file mode 100644 index 8b4d6974066c..000000000000 --- a/include/asm-v850/sim85e2.h +++ /dev/null | |||
@@ -1,69 +0,0 @@ | |||
1 | /* | ||
2 | * include/asm-v850/sim85e2.h -- Machine-dependent defs for | ||
3 | * V850E2 RTL simulator | ||
4 | * | ||
5 | * Copyright (C) 2002,03 NEC Electronics Corporation | ||
6 | * Copyright (C) 2002,03 Miles Bader <miles@gnu.org> | ||
7 | * | ||
8 | * This file is subject to the terms and conditions of the GNU General | ||
9 | * Public License. See the file COPYING in the main directory of this | ||
10 | * archive for more details. | ||
11 | * | ||
12 | * Written by Miles Bader <miles@gnu.org> | ||
13 | */ | ||
14 | |||
15 | #ifndef __V850_SIM85E2_H__ | ||
16 | #define __V850_SIM85E2_H__ | ||
17 | |||
18 | |||
19 | #include <asm/v850e2.h> /* Based on V850E2 core. */ | ||
20 | |||
21 | |||
22 | /* Various memory areas supported by the simulator. | ||
23 | These should match the corresponding definitions in the linker script. */ | ||
24 | |||
25 | /* `instruction RAM'; instruction fetches are much faster from IRAM than | ||
26 | from DRAM. */ | ||
27 | #define IRAM_ADDR 0 | ||
28 | #define IRAM_SIZE 0x00100000 /* 1MB */ | ||
29 | /* `data RAM', below and contiguous with the I/O space. | ||
30 | Data fetches are much faster from DRAM than from IRAM. */ | ||
31 | #define DRAM_ADDR 0xfff00000 | ||
32 | #define DRAM_SIZE 0x000ff000 /* 1020KB */ | ||
33 | /* `external ram'. Unlike the above RAM areas, this memory is cached, | ||
34 | so both instruction and data fetches should be (mostly) fast -- | ||
35 | however, currently only write-through caching is supported, so writes | ||
36 | to ERAM will be slow. */ | ||
37 | #define ERAM_ADDR 0x00100000 | ||
38 | #define ERAM_SIZE 0x07f00000 /* 127MB (max) */ | ||
39 | /* Dynamic RAM; uses memory controller. */ | ||
40 | #define SDRAM_ADDR 0x10000000 | ||
41 | #define SDRAM_SIZE 0x01000000 /* 16MB */ | ||
42 | |||
43 | |||
44 | /* Simulator specific control registers. */ | ||
45 | /* NOTHAL controls whether the simulator will stop at a `halt' insn. */ | ||
46 | #define SIM85E2_NOTHAL_ADDR 0xffffff22 | ||
47 | #define SIM85E2_NOTHAL (*(volatile u8 *)SIM85E2_NOTHAL_ADDR) | ||
48 | /* The simulator will stop N cycles after N is written to SIMFIN. */ | ||
49 | #define SIM85E2_SIMFIN_ADDR 0xffffff24 | ||
50 | #define SIM85E2_SIMFIN (*(volatile u16 *)SIM85E2_SIMFIN_ADDR) | ||
51 | |||
52 | |||
53 | /* For <asm/irq.h> */ | ||
54 | #define NUM_CPU_IRQS 64 | ||
55 | |||
56 | |||
57 | /* For <asm/page.h> */ | ||
58 | #define PAGE_OFFSET SDRAM_ADDR | ||
59 | |||
60 | |||
61 | /* For <asm/entry.h> */ | ||
62 | /* `R0 RAM', used for a few miscellaneous variables that must be accessible | ||
63 | using a load instruction relative to R0. The sim85e2 simulator | ||
64 | actually puts 1020K of RAM from FFF00000 to FFFFF000, so we arbitarily | ||
65 | choose a small portion at the end of that. */ | ||
66 | #define R0_RAM_ADDR 0xFFFFE000 | ||
67 | |||
68 | |||
69 | #endif /* __V850_SIM85E2_H__ */ | ||
diff --git a/include/asm-v850/sim85e2c.h b/include/asm-v850/sim85e2c.h deleted file mode 100644 index eee543ff3af8..000000000000 --- a/include/asm-v850/sim85e2c.h +++ /dev/null | |||
@@ -1,26 +0,0 @@ | |||
1 | /* | ||
2 | * include/asm-v850/sim85e2c.h -- Machine-dependent defs for | ||
3 | * V850E2 RTL simulator | ||
4 | * | ||
5 | * Copyright (C) 2002 NEC Corporation | ||
6 | * Copyright (C) 2002 Miles Bader <miles@gnu.org> | ||
7 | * | ||
8 | * This file is subject to the terms and conditions of the GNU General | ||
9 | * Public License. See the file COPYING in the main directory of this | ||
10 | * archive for more details. | ||
11 | * | ||
12 | * Written by Miles Bader <miles@gnu.org> | ||
13 | */ | ||
14 | |||
15 | #ifndef __V850_SIM85E2C_H__ | ||
16 | #define __V850_SIM85E2C_H__ | ||
17 | |||
18 | /* Use generic sim85e2 settings, other than the various names. */ | ||
19 | #include <asm/sim85e2.h> | ||
20 | |||
21 | #define CPU_MODEL "v850e2" | ||
22 | #define CPU_MODEL_LONG "NEC V850E2" | ||
23 | #define PLATFORM "sim85e2c" | ||
24 | #define PLATFORM_LONG "SIM85E2C V850E2 simulator" | ||
25 | |||
26 | #endif /* __V850_SIM85E2C_H__ */ | ||
diff --git a/include/asm-v850/sim85e2s.h b/include/asm-v850/sim85e2s.h deleted file mode 100644 index ee066d5d3c51..000000000000 --- a/include/asm-v850/sim85e2s.h +++ /dev/null | |||
@@ -1,28 +0,0 @@ | |||
1 | /* | ||
2 | * include/asm-v850/sim85e2s.h -- Machine-dependent defs for | ||
3 | * V850E2 RTL simulator | ||
4 | * | ||
5 | * Copyright (C) 2003 NEC Electronics Corporation | ||
6 | * Copyright (C) 2003 Miles Bader <miles@gnu.org> | ||
7 | * | ||
8 | * This file is subject to the terms and conditions of the GNU General | ||
9 | * Public License. See the file COPYING in the main directory of this | ||
10 | * archive for more details. | ||
11 | * | ||
12 | * Written by Miles Bader <miles@gnu.org> | ||
13 | */ | ||
14 | |||
15 | #ifndef __V850_SIM85E2S_H__ | ||
16 | #define __V850_SIM85E2S_H__ | ||
17 | |||
18 | #include <asm/sim85e2.h> /* Use generic sim85e2 settings. */ | ||
19 | #if 0 | ||
20 | #include <asm/v850e2_cache.h> /* + cache */ | ||
21 | #endif | ||
22 | |||
23 | #define CPU_MODEL "v850e2" | ||
24 | #define CPU_MODEL_LONG "NEC V850E2" | ||
25 | #define PLATFORM "sim85e2s" | ||
26 | #define PLATFORM_LONG "SIM85E2S V850E2 simulator" | ||
27 | |||
28 | #endif /* __V850_SIM85E2S_H__ */ | ||
diff --git a/include/asm-v850/simsyscall.h b/include/asm-v850/simsyscall.h deleted file mode 100644 index 4a19d5ae9d17..000000000000 --- a/include/asm-v850/simsyscall.h +++ /dev/null | |||
@@ -1,99 +0,0 @@ | |||
1 | /* | ||
2 | * include/asm-v850/simsyscall.h -- `System calls' under the v850e emulator | ||
3 | * | ||
4 | * Copyright (C) 2001 NEC Corporation | ||
5 | * Copyright (C) 2001 Miles Bader <miles@gnu.org> | ||
6 | * | ||
7 | * This file is subject to the terms and conditions of the GNU General | ||
8 | * Public License. See the file COPYING in the main directory of this | ||
9 | * archive for more details. | ||
10 | * | ||
11 | * Written by Miles Bader <miles@gnu.org> | ||
12 | */ | ||
13 | |||
14 | #ifndef __V850_SIMSYSCALL_H__ | ||
15 | #define __V850_SIMSYSCALL_H__ | ||
16 | |||
17 | #define V850_SIM_SYS_exit(a...) V850_SIM_SYSCALL_1 (1 , ##a) | ||
18 | #define V850_SIM_SYS_fork(a...) V850_SIM_SYSCALL_0 (2 , ##a) | ||
19 | #define V850_SIM_SYS_read(a...) V850_SIM_SYSCALL_3 (3 , ##a) | ||
20 | #define V850_SIM_SYS_write(a...) V850_SIM_SYSCALL_3 (4 , ##a) | ||
21 | #define V850_SIM_SYS_open(a...) V850_SIM_SYSCALL_2 (5 , ##a) | ||
22 | #define V850_SIM_SYS_close(a...) V850_SIM_SYSCALL_1 (6 , ##a) | ||
23 | #define V850_SIM_SYS_wait4(a...) V850_SIM_SYSCALL_4 (7 , ##a) | ||
24 | /* #define V850_SIM_SYS_creat(a...) V850_SIM_SYSCALL_1 (8 , ##a) */ | ||
25 | /* #define V850_SIM_SYS_link(a...) V850_SIM_SYSCALL_1 (9 , ##a) */ | ||
26 | /* #define V850_SIM_SYS_unlink(a...) V850_SIM_SYSCALL_1 (10 , ##a) */ | ||
27 | #define V850_SIM_SYS_execv(a...) V850_SIM_SYSCALL_2 (11 , ##a) | ||
28 | /* #define V850_SIM_SYS_chdir(a...) V850_SIM_SYSCALL_1 (12 , ##a) */ | ||
29 | /* #define V850_SIM_SYS_mknod(a...) V850_SIM_SYSCALL_1 (14 , ##a) */ | ||
30 | #define V850_SIM_SYS_chmod(a...) V850_SIM_SYSCALL_2 (15 , ##a) | ||
31 | #define V850_SIM_SYS_chown(a...) V850_SIM_SYSCALL_2 (16 , ##a) | ||
32 | #define V850_SIM_SYS_lseek(a...) V850_SIM_SYSCALL_3 (19 , ##a) | ||
33 | /* #define V850_SIM_SYS_getpid(a...) V850_SIM_SYSCALL_1 (20 , ##a) */ | ||
34 | /* #define V850_SIM_SYS_isatty(a...) V850_SIM_SYSCALL_1 (21 , ##a) */ | ||
35 | /* #define V850_SIM_SYS_fstat(a...) V850_SIM_SYSCALL_1 (22 , ##a) */ | ||
36 | #define V850_SIM_SYS_time(a...) V850_SIM_SYSCALL_1 (23 , ##a) | ||
37 | #define V850_SIM_SYS_poll(a...) V850_SIM_SYSCALL_3 (24 , ##a) | ||
38 | #define V850_SIM_SYS_stat(a...) V850_SIM_SYSCALL_2 (38 , ##a) | ||
39 | #define V850_SIM_SYS_pipe(a...) V850_SIM_SYSCALL_1 (42 , ##a) | ||
40 | #define V850_SIM_SYS_times(a...) V850_SIM_SYSCALL_1 (43 , ##a) | ||
41 | #define V850_SIM_SYS_execve(a...) V850_SIM_SYSCALL_3 (59 , ##a) | ||
42 | #define V850_SIM_SYS_gettimeofday(a...) V850_SIM_SYSCALL_2 (116 , ##a) | ||
43 | /* #define V850_SIM_SYS_utime(a...) V850_SIM_SYSCALL_2 (201 , ##a) */ | ||
44 | /* #define V850_SIM_SYS_wait(a...) V850_SIM_SYSCALL_1 (202 , ##a) */ | ||
45 | |||
46 | #define V850_SIM_SYS_make_raw(a...) V850_SIM_SYSCALL_1 (1024 , ##a) | ||
47 | |||
48 | |||
49 | #define V850_SIM_SYSCALL_0(_call) \ | ||
50 | ({ \ | ||
51 | register int call __asm__ ("r6") = _call; \ | ||
52 | register int rval __asm__ ("r10"); \ | ||
53 | __asm__ __volatile__ ("trap 31" \ | ||
54 | : "=r" (rval) \ | ||
55 | : "r" (call) \ | ||
56 | : "r11", "memory"); \ | ||
57 | rval; \ | ||
58 | }) | ||
59 | #define V850_SIM_SYSCALL_1(_call, _arg0) \ | ||
60 | ({ \ | ||
61 | register int call __asm__ ("r6") = _call; \ | ||
62 | register long arg0 __asm__ ("r7") = (long)_arg0; \ | ||
63 | register int rval __asm__ ("r10"); \ | ||
64 | __asm__ __volatile__ ("trap 31" \ | ||
65 | : "=r" (rval) \ | ||
66 | : "r" (call), "r" (arg0) \ | ||
67 | : "r11", "memory"); \ | ||
68 | rval; \ | ||
69 | }) | ||
70 | #define V850_SIM_SYSCALL_2(_call, _arg0, _arg1) \ | ||
71 | ({ \ | ||
72 | register int call __asm__ ("r6") = _call; \ | ||
73 | register long arg0 __asm__ ("r7") = (long)_arg0; \ | ||
74 | register long arg1 __asm__ ("r8") = (long)_arg1; \ | ||
75 | register int rval __asm__ ("r10"); \ | ||
76 | __asm__ __volatile__ ("trap 31" \ | ||
77 | : "=r" (rval) \ | ||
78 | : "r" (call), "r" (arg0), "r" (arg1) \ | ||
79 | : "r11", "memory"); \ | ||
80 | rval; \ | ||
81 | }) | ||
82 | #define V850_SIM_SYSCALL_3(_call, _arg0, _arg1, _arg2) \ | ||
83 | ({ \ | ||
84 | register int call __asm__ ("r6") = _call; \ | ||
85 | register long arg0 __asm__ ("r7") = (long)_arg0; \ | ||
86 | register long arg1 __asm__ ("r8") = (long)_arg1; \ | ||
87 | register long arg2 __asm__ ("r9") = (long)_arg2; \ | ||
88 | register int rval __asm__ ("r10"); \ | ||
89 | __asm__ __volatile__ ("trap 31" \ | ||
90 | : "=r" (rval) \ | ||
91 | : "r" (call), "r" (arg0), "r" (arg1), "r" (arg2)\ | ||
92 | : "r11", "memory"); \ | ||
93 | rval; \ | ||
94 | }) | ||
95 | |||
96 | #define V850_SIM_SYSCALL(call, args...) \ | ||
97 | V850_SIM_SYS_##call (args) | ||
98 | |||
99 | #endif /* __V850_SIMSYSCALL_H__ */ | ||
diff --git a/include/asm-v850/socket.h b/include/asm-v850/socket.h deleted file mode 100644 index e199a2bf12aa..000000000000 --- a/include/asm-v850/socket.h +++ /dev/null | |||
@@ -1,57 +0,0 @@ | |||
1 | #ifndef __V850_SOCKET_H__ | ||
2 | #define __V850_SOCKET_H__ | ||
3 | |||
4 | #include <asm/sockios.h> | ||
5 | |||
6 | /* For setsockoptions(2) */ | ||
7 | #define SOL_SOCKET 1 | ||
8 | |||
9 | #define SO_DEBUG 1 | ||
10 | #define SO_REUSEADDR 2 | ||
11 | #define SO_TYPE 3 | ||
12 | #define SO_ERROR 4 | ||
13 | #define SO_DONTROUTE 5 | ||
14 | #define SO_BROADCAST 6 | ||
15 | #define SO_SNDBUF 7 | ||
16 | #define SO_RCVBUF 8 | ||
17 | #define SO_SNDBUFFORCE 32 | ||
18 | #define SO_RCVBUFFORCE 33 | ||
19 | #define SO_KEEPALIVE 9 | ||
20 | #define SO_OOBINLINE 10 | ||
21 | #define SO_NO_CHECK 11 | ||
22 | #define SO_PRIORITY 12 | ||
23 | #define SO_LINGER 13 | ||
24 | #define SO_BSDCOMPAT 14 | ||
25 | /* To add :#define SO_REUSEPORT 15 */ | ||
26 | #define SO_PASSCRED 16 | ||
27 | #define SO_PEERCRED 17 | ||
28 | #define SO_RCVLOWAT 18 | ||
29 | #define SO_SNDLOWAT 19 | ||
30 | #define SO_RCVTIMEO 20 | ||
31 | #define SO_SNDTIMEO 21 | ||
32 | |||
33 | /* Security levels - as per NRL IPv6 - don't actually do anything */ | ||
34 | #define SO_SECURITY_AUTHENTICATION 22 | ||
35 | #define SO_SECURITY_ENCRYPTION_TRANSPORT 23 | ||
36 | #define SO_SECURITY_ENCRYPTION_NETWORK 24 | ||
37 | |||
38 | #define SO_BINDTODEVICE 25 | ||
39 | |||
40 | /* Socket filtering */ | ||
41 | #define SO_ATTACH_FILTER 26 | ||
42 | #define SO_DETACH_FILTER 27 | ||
43 | |||
44 | #define SO_PEERNAME 28 | ||
45 | #define SO_TIMESTAMP 29 | ||
46 | #define SCM_TIMESTAMP SO_TIMESTAMP | ||
47 | |||
48 | #define SO_ACCEPTCONN 30 | ||
49 | |||
50 | #define SO_PEERSEC 31 | ||
51 | #define SO_PASSSEC 34 | ||
52 | #define SO_TIMESTAMPNS 35 | ||
53 | #define SCM_TIMESTAMPNS SO_TIMESTAMPNS | ||
54 | |||
55 | #define SO_MARK 36 | ||
56 | |||
57 | #endif /* __V850_SOCKET_H__ */ | ||
diff --git a/include/asm-v850/sockios.h b/include/asm-v850/sockios.h deleted file mode 100644 index 823e106e6cd0..000000000000 --- a/include/asm-v850/sockios.h +++ /dev/null | |||
@@ -1,13 +0,0 @@ | |||
1 | #ifndef __V850_SOCKIOS_H__ | ||
2 | #define __V850_SOCKIOS_H__ | ||
3 | |||
4 | /* Socket-level I/O control calls. */ | ||
5 | #define FIOSETOWN 0x8901 | ||
6 | #define SIOCSPGRP 0x8902 | ||
7 | #define FIOGETOWN 0x8903 | ||
8 | #define SIOCGPGRP 0x8904 | ||
9 | #define SIOCATMARK 0x8905 | ||
10 | #define SIOCGSTAMP 0x8906 /* Get stamp (timeval) */ | ||
11 | #define SIOCGSTAMPNS 0x8907 /* Get stamp (timespec) */ | ||
12 | |||
13 | #endif /* __V850_SOCKIOS_H__ */ | ||
diff --git a/include/asm-v850/stat.h b/include/asm-v850/stat.h deleted file mode 100644 index c68c60d06e2f..000000000000 --- a/include/asm-v850/stat.h +++ /dev/null | |||
@@ -1,73 +0,0 @@ | |||
1 | /* | ||
2 | * include/asm-v850/stat.h -- v850 stat structure | ||
3 | * | ||
4 | * Copyright (C) 2001,02,03 NEC Electronics Corporation | ||
5 | * Copyright (C) 2001,02,03 Miles Bader <miles@gnu.org> | ||
6 | * | ||
7 | * This file is subject to the terms and conditions of the GNU General | ||
8 | * Public License. See the file COPYING in the main directory of this | ||
9 | * archive for more details. | ||
10 | * | ||
11 | * Written by Miles Bader <miles@gnu.org> | ||
12 | */ | ||
13 | |||
14 | #ifndef __V850_STAT_H__ | ||
15 | #define __V850_STAT_H__ | ||
16 | |||
17 | #include <asm/posix_types.h> | ||
18 | |||
19 | struct stat { | ||
20 | unsigned int st_dev; | ||
21 | unsigned long st_ino; | ||
22 | unsigned int st_mode; | ||
23 | unsigned int st_nlink; | ||
24 | unsigned int st_uid; | ||
25 | unsigned int st_gid; | ||
26 | unsigned int st_rdev; | ||
27 | long st_size; | ||
28 | unsigned long st_blksize; | ||
29 | unsigned long st_blocks; | ||
30 | unsigned long st_atime; | ||
31 | unsigned long __unused1; | ||
32 | unsigned long st_mtime; | ||
33 | unsigned long __unused2; | ||
34 | unsigned long st_ctime; | ||
35 | unsigned long __unused3; | ||
36 | unsigned long __unused4; | ||
37 | unsigned long __unused5; | ||
38 | }; | ||
39 | |||
40 | struct stat64 { | ||
41 | unsigned long long st_dev; | ||
42 | unsigned long __unused1; | ||
43 | |||
44 | unsigned long long st_ino; | ||
45 | |||
46 | unsigned int st_mode; | ||
47 | unsigned int st_nlink; | ||
48 | |||
49 | unsigned int st_uid; | ||
50 | unsigned int st_gid; | ||
51 | |||
52 | unsigned long long st_rdev; | ||
53 | unsigned long __unused3; | ||
54 | |||
55 | long long st_size; | ||
56 | unsigned long st_blksize; | ||
57 | |||
58 | unsigned long st_blocks; /* No. of 512-byte blocks allocated */ | ||
59 | unsigned long __unused4; /* future possible st_blocks high bits */ | ||
60 | |||
61 | unsigned long st_atime; | ||
62 | unsigned long st_atime_nsec; | ||
63 | |||
64 | unsigned long st_mtime; | ||
65 | unsigned long st_mtime_nsec; | ||
66 | |||
67 | unsigned long st_ctime; | ||
68 | unsigned long st_ctime_nsec; | ||
69 | |||
70 | unsigned long __unused8; | ||
71 | }; | ||
72 | |||
73 | #endif /* __V850_STAT_H__ */ | ||
diff --git a/include/asm-v850/statfs.h b/include/asm-v850/statfs.h deleted file mode 100644 index ea1596607f26..000000000000 --- a/include/asm-v850/statfs.h +++ /dev/null | |||
@@ -1,6 +0,0 @@ | |||
1 | #ifndef __V850_STATFS_H__ | ||
2 | #define __V850_STATFS_H__ | ||
3 | |||
4 | #include <asm-generic/statfs.h> | ||
5 | |||
6 | #endif /* __V850_STATFS_H__ */ | ||
diff --git a/include/asm-v850/string.h b/include/asm-v850/string.h deleted file mode 100644 index 478e234789d6..000000000000 --- a/include/asm-v850/string.h +++ /dev/null | |||
@@ -1,25 +0,0 @@ | |||
1 | /* | ||
2 | * include/asm-v850/string.h -- Architecture specific string routines | ||
3 | * | ||
4 | * Copyright (C) 2001,02 NEC Corporation | ||
5 | * Copyright (C) 2001,02 Miles Bader <miles@gnu.org> | ||
6 | * | ||
7 | * This file is subject to the terms and conditions of the GNU General | ||
8 | * Public License. See the file COPYING in the main directory of this | ||
9 | * archive for more details. | ||
10 | * | ||
11 | * Written by Miles Bader <miles@gnu.org> | ||
12 | */ | ||
13 | |||
14 | #ifndef __V850_STRING_H__ | ||
15 | #define __V850_STRING_H__ | ||
16 | |||
17 | #define __HAVE_ARCH_MEMCPY | ||
18 | #define __HAVE_ARCH_MEMSET | ||
19 | #define __HAVE_ARCH_MEMMOVE | ||
20 | |||
21 | extern void *memcpy (void *, const void *, __kernel_size_t); | ||
22 | extern void *memset (void *, int, __kernel_size_t); | ||
23 | extern void *memmove (void *, const void *, __kernel_size_t); | ||
24 | |||
25 | #endif /* __V850_STRING_H__ */ | ||
diff --git a/include/asm-v850/system.h b/include/asm-v850/system.h deleted file mode 100644 index 7daf1fdee119..000000000000 --- a/include/asm-v850/system.h +++ /dev/null | |||
@@ -1,123 +0,0 @@ | |||
1 | /* | ||
2 | * include/asm-v850/system.h -- Low-level interrupt/thread ops | ||
3 | * | ||
4 | * Copyright (C) 2001,02,03 NEC Electronics Corporation | ||
5 | * Copyright (C) 2001,02,03 Miles Bader <miles@gnu.org> | ||
6 | * | ||
7 | * This file is subject to the terms and conditions of the GNU General | ||
8 | * Public License. See the file COPYING in the main directory of this | ||
9 | * archive for more details. | ||
10 | * | ||
11 | * Written by Miles Bader <miles@gnu.org> | ||
12 | */ | ||
13 | |||
14 | #ifndef __V850_SYSTEM_H__ | ||
15 | #define __V850_SYSTEM_H__ | ||
16 | |||
17 | #include <linux/linkage.h> | ||
18 | #include <asm/ptrace.h> | ||
19 | |||
20 | |||
21 | /* | ||
22 | * switch_to(n) should switch tasks to task ptr, first checking that | ||
23 | * ptr isn't the current task, in which case it does nothing. | ||
24 | */ | ||
25 | struct thread_struct; | ||
26 | extern void *switch_thread (struct thread_struct *last, | ||
27 | struct thread_struct *next); | ||
28 | #define switch_to(prev,next,last) \ | ||
29 | do { \ | ||
30 | if (prev != next) { \ | ||
31 | (last) = switch_thread (&prev->thread, &next->thread); \ | ||
32 | } \ | ||
33 | } while (0) | ||
34 | |||
35 | |||
36 | /* Enable/disable interrupts. */ | ||
37 | #define local_irq_enable() __asm__ __volatile__ ("ei") | ||
38 | #define local_irq_disable() __asm__ __volatile__ ("di") | ||
39 | |||
40 | #define local_save_flags(flags) \ | ||
41 | __asm__ __volatile__ ("stsr %1, %0" : "=r" (flags) : "i" (SR_PSW)) | ||
42 | #define local_restore_flags(flags) \ | ||
43 | __asm__ __volatile__ ("ldsr %0, %1" :: "r" (flags), "i" (SR_PSW)) | ||
44 | |||
45 | /* For spinlocks etc */ | ||
46 | #define local_irq_save(flags) \ | ||
47 | do { local_save_flags (flags); local_irq_disable (); } while (0) | ||
48 | #define local_irq_restore(flags) \ | ||
49 | local_restore_flags (flags); | ||
50 | |||
51 | |||
52 | static inline int irqs_disabled (void) | ||
53 | { | ||
54 | unsigned flags; | ||
55 | local_save_flags (flags); | ||
56 | return !!(flags & 0x20); | ||
57 | } | ||
58 | |||
59 | |||
60 | /* | ||
61 | * Force strict CPU ordering. | ||
62 | * Not really required on v850... | ||
63 | */ | ||
64 | #define nop() __asm__ __volatile__ ("nop") | ||
65 | #define mb() __asm__ __volatile__ ("" ::: "memory") | ||
66 | #define rmb() mb () | ||
67 | #define wmb() mb () | ||
68 | #define read_barrier_depends() ((void)0) | ||
69 | #define set_mb(var, value) do { xchg (&var, value); } while (0) | ||
70 | |||
71 | #define smp_mb() mb () | ||
72 | #define smp_rmb() rmb () | ||
73 | #define smp_wmb() wmb () | ||
74 | #define smp_read_barrier_depends() read_barrier_depends() | ||
75 | |||
76 | #define xchg(ptr, with) \ | ||
77 | ((__typeof__ (*(ptr)))__xchg ((unsigned long)(with), (ptr), sizeof (*(ptr)))) | ||
78 | |||
79 | static inline unsigned long __xchg (unsigned long with, | ||
80 | __volatile__ void *ptr, int size) | ||
81 | { | ||
82 | unsigned long tmp, flags; | ||
83 | |||
84 | local_irq_save (flags); | ||
85 | |||
86 | switch (size) { | ||
87 | case 1: | ||
88 | tmp = *(unsigned char *)ptr; | ||
89 | *(unsigned char *)ptr = with; | ||
90 | break; | ||
91 | case 2: | ||
92 | tmp = *(unsigned short *)ptr; | ||
93 | *(unsigned short *)ptr = with; | ||
94 | break; | ||
95 | case 4: | ||
96 | tmp = *(unsigned long *)ptr; | ||
97 | *(unsigned long *)ptr = with; | ||
98 | break; | ||
99 | } | ||
100 | |||
101 | local_irq_restore (flags); | ||
102 | |||
103 | return tmp; | ||
104 | } | ||
105 | |||
106 | #include <asm-generic/cmpxchg-local.h> | ||
107 | |||
108 | /* | ||
109 | * cmpxchg_local and cmpxchg64_local are atomic wrt current CPU. Always make | ||
110 | * them available. | ||
111 | */ | ||
112 | #define cmpxchg_local(ptr, o, n) \ | ||
113 | ((__typeof__(*(ptr)))__cmpxchg_local_generic((ptr), (unsigned long)(o),\ | ||
114 | (unsigned long)(n), sizeof(*(ptr)))) | ||
115 | #define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n)) | ||
116 | |||
117 | #ifndef CONFIG_SMP | ||
118 | #include <asm-generic/cmpxchg.h> | ||
119 | #endif | ||
120 | |||
121 | #define arch_align_stack(x) (x) | ||
122 | |||
123 | #endif /* __V850_SYSTEM_H__ */ | ||
diff --git a/include/asm-v850/teg.h b/include/asm-v850/teg.h deleted file mode 100644 index acc8c7d95329..000000000000 --- a/include/asm-v850/teg.h +++ /dev/null | |||
@@ -1,101 +0,0 @@ | |||
1 | /* | ||
2 | * include/asm-v850/teg.h -- NB85E-TEG cpu chip | ||
3 | * | ||
4 | * Copyright (C) 2001,02,03 NEC Electronics Corporation | ||
5 | * Copyright (C) 2001,02,03 Miles Bader <miles@gnu.org> | ||
6 | * | ||
7 | * This file is subject to the terms and conditions of the GNU General | ||
8 | * Public License. See the file COPYING in the main directory of this | ||
9 | * archive for more details. | ||
10 | * | ||
11 | * Written by Miles Bader <miles@gnu.org> | ||
12 | */ | ||
13 | |||
14 | #ifndef __V850_TEG_H__ | ||
15 | #define __V850_TEG_H__ | ||
16 | |||
17 | |||
18 | /* The TEG uses the V850E cpu core. */ | ||
19 | #include <asm/v850e.h> | ||
20 | #include <asm/v850e_cache.h> | ||
21 | |||
22 | |||
23 | #define CPU_MODEL "v850e/nb85e-teg" | ||
24 | #define CPU_MODEL_LONG "NEC V850E/NB85E TEG" | ||
25 | |||
26 | |||
27 | /* For <asm/entry.h> */ | ||
28 | /* We use on-chip RAM, for a few miscellaneous variables that must be | ||
29 | accessible using a load instruction relative to R0. On the NB85E/TEG, | ||
30 | There's 60KB of iRAM starting at 0xFFFF0000, however we need the base | ||
31 | address to be addressable by a 16-bit signed offset, so we only use the | ||
32 | second half of it starting from 0xFFFF8000. */ | ||
33 | #define R0_RAM_ADDR 0xFFFF8000 | ||
34 | |||
35 | |||
36 | /* Hardware-specific interrupt numbers (in the kernel IRQ namespace). | ||
37 | Some of these are parameterized even though there's only a single | ||
38 | interrupt, for compatibility with some generic code that works on other | ||
39 | processor models. */ | ||
40 | #define IRQ_INTCMD(n) 6 /* interval timer interrupt */ | ||
41 | #define IRQ_INTCMD_NUM 1 | ||
42 | #define IRQ_INTSER(n) 16 /* UART reception error */ | ||
43 | #define IRQ_INTSER_NUM 1 | ||
44 | #define IRQ_INTSR(n) 17 /* UART reception completion */ | ||
45 | #define IRQ_INTSR_NUM 1 | ||
46 | #define IRQ_INTST(n) 18 /* UART transmission completion */ | ||
47 | #define IRQ_INTST_NUM 1 | ||
48 | |||
49 | /* For <asm/irq.h> */ | ||
50 | #define NUM_CPU_IRQS 64 | ||
51 | |||
52 | |||
53 | /* TEG UART details. */ | ||
54 | #define V850E_UART_BASE_ADDR(n) (0xFFFFF600 + 0x10 * (n)) | ||
55 | #define V850E_UART_ASIM_ADDR(n) (V850E_UART_BASE_ADDR(n) + 0x0) | ||
56 | #define V850E_UART_ASIS_ADDR(n) (V850E_UART_BASE_ADDR(n) + 0x2) | ||
57 | #define V850E_UART_ASIF_ADDR(n) (V850E_UART_BASE_ADDR(n) + 0x4) | ||
58 | #define V850E_UART_CKSR_ADDR(n) (V850E_UART_BASE_ADDR(n) + 0x6) | ||
59 | #define V850E_UART_BRGC_ADDR(n) (V850E_UART_BASE_ADDR(n) + 0x8) | ||
60 | #define V850E_UART_TXB_ADDR(n) (V850E_UART_BASE_ADDR(n) + 0xA) | ||
61 | #define V850E_UART_RXB_ADDR(n) (V850E_UART_BASE_ADDR(n) + 0xC) | ||
62 | #define V850E_UART_NUM_CHANNELS 1 | ||
63 | #define V850E_UART_BASE_FREQ CPU_CLOCK_FREQ | ||
64 | /* This is a function that gets called before configuring the UART. */ | ||
65 | #define V850E_UART_PRE_CONFIGURE teg_uart_pre_configure | ||
66 | #ifndef __ASSEMBLY__ | ||
67 | extern void teg_uart_pre_configure (unsigned chan, | ||
68 | unsigned cflags, unsigned baud); | ||
69 | #endif | ||
70 | |||
71 | |||
72 | /* The TEG RTPU. */ | ||
73 | #define V850E_RTPU_BASE_ADDR 0xFFFFF210 | ||
74 | |||
75 | |||
76 | /* TEG series timer D details. */ | ||
77 | #define V850E_TIMER_D_BASE_ADDR 0xFFFFF210 | ||
78 | #define V850E_TIMER_D_TMCD_BASE_ADDR (V850E_TIMER_D_BASE_ADDR + 0x0) | ||
79 | #define V850E_TIMER_D_TMD_BASE_ADDR (V850E_TIMER_D_BASE_ADDR + 0x4) | ||
80 | #define V850E_TIMER_D_CMD_BASE_ADDR (V850E_TIMER_D_BASE_ADDR + 0x8) | ||
81 | #define V850E_TIMER_D_BASE_FREQ CPU_CLOCK_FREQ | ||
82 | |||
83 | |||
84 | /* `Interrupt Source Select' control register. */ | ||
85 | #define TEG_ISS_ADDR 0xFFFFF7FA | ||
86 | #define TEG_ISS (*(volatile u8 *)TEG_ISS_ADDR) | ||
87 | |||
88 | /* Port 0 I/O register (bits 0-3 used). */ | ||
89 | #define TEG_PORT0_IO_ADDR 0xFFFFF7F2 | ||
90 | #define TEG_PORT0_IO (*(volatile u8 *)TEG_PORT0_IO_ADDR) | ||
91 | /* Port 0 control register (bits 0-3 control mode, 0 = output, 1 = input). */ | ||
92 | #define TEG_PORT0_PM_ADDR 0xFFFFF7F4 | ||
93 | #define TEG_PORT0_PM (*(volatile u8 *)TEG_PORT0_PM_ADDR) | ||
94 | |||
95 | |||
96 | #ifndef __ASSEMBLY__ | ||
97 | extern void teg_init_irqs (void); | ||
98 | #endif | ||
99 | |||
100 | |||
101 | #endif /* __V850_TEG_H__ */ | ||
diff --git a/include/asm-v850/termbits.h b/include/asm-v850/termbits.h deleted file mode 100644 index 295d7bf69451..000000000000 --- a/include/asm-v850/termbits.h +++ /dev/null | |||
@@ -1,200 +0,0 @@ | |||
1 | #ifndef __V850_TERMBITS_H__ | ||
2 | #define __V850_TERMBITS_H__ | ||
3 | |||
4 | #include <linux/posix_types.h> | ||
5 | |||
6 | typedef unsigned char cc_t; | ||
7 | typedef unsigned int speed_t; | ||
8 | typedef unsigned int tcflag_t; | ||
9 | |||
10 | #define NCCS 19 | ||
11 | struct termios { | ||
12 | tcflag_t c_iflag; /* input mode flags */ | ||
13 | tcflag_t c_oflag; /* output mode flags */ | ||
14 | tcflag_t c_cflag; /* control mode flags */ | ||
15 | tcflag_t c_lflag; /* local mode flags */ | ||
16 | cc_t c_line; /* line discipline */ | ||
17 | cc_t c_cc[NCCS]; /* control characters */ | ||
18 | }; | ||
19 | |||
20 | struct termios2 { | ||
21 | tcflag_t c_iflag; /* input mode flags */ | ||
22 | tcflag_t c_oflag; /* output mode flags */ | ||
23 | tcflag_t c_cflag; /* control mode flags */ | ||
24 | tcflag_t c_lflag; /* local mode flags */ | ||
25 | cc_t c_line; /* line discipline */ | ||
26 | cc_t c_cc[NCCS]; /* control characters */ | ||
27 | speed_t c_ispeed; /* input speed */ | ||
28 | speed_t c_ospeed; /* output speed */ | ||
29 | }; | ||
30 | |||
31 | struct ktermios { | ||
32 | tcflag_t c_iflag; /* input mode flags */ | ||
33 | tcflag_t c_oflag; /* output mode flags */ | ||
34 | tcflag_t c_cflag; /* control mode flags */ | ||
35 | tcflag_t c_lflag; /* local mode flags */ | ||
36 | cc_t c_line; /* line discipline */ | ||
37 | cc_t c_cc[NCCS]; /* control characters */ | ||
38 | speed_t c_ispeed; /* input speed */ | ||
39 | speed_t c_ospeed; /* output speed */ | ||
40 | }; | ||
41 | |||
42 | /* c_cc characters */ | ||
43 | #define VINTR 0 | ||
44 | #define VQUIT 1 | ||
45 | #define VERASE 2 | ||
46 | #define VKILL 3 | ||
47 | #define VEOF 4 | ||
48 | #define VTIME 5 | ||
49 | #define VMIN 6 | ||
50 | #define VSWTC 7 | ||
51 | #define VSTART 8 | ||
52 | #define VSTOP 9 | ||
53 | #define VSUSP 10 | ||
54 | #define VEOL 11 | ||
55 | #define VREPRINT 12 | ||
56 | #define VDISCARD 13 | ||
57 | #define VWERASE 14 | ||
58 | #define VLNEXT 15 | ||
59 | #define VEOL2 16 | ||
60 | |||
61 | |||
62 | /* c_iflag bits */ | ||
63 | #define IGNBRK 0000001 | ||
64 | #define BRKINT 0000002 | ||
65 | #define IGNPAR 0000004 | ||
66 | #define PARMRK 0000010 | ||
67 | #define INPCK 0000020 | ||
68 | #define ISTRIP 0000040 | ||
69 | #define INLCR 0000100 | ||
70 | #define IGNCR 0000200 | ||
71 | #define ICRNL 0000400 | ||
72 | #define IUCLC 0001000 | ||
73 | #define IXON 0002000 | ||
74 | #define IXANY 0004000 | ||
75 | #define IXOFF 0010000 | ||
76 | #define IMAXBEL 0020000 | ||
77 | #define IUTF8 0040000 | ||
78 | |||
79 | /* c_oflag bits */ | ||
80 | #define OPOST 0000001 | ||
81 | #define OLCUC 0000002 | ||
82 | #define ONLCR 0000004 | ||
83 | #define OCRNL 0000010 | ||
84 | #define ONOCR 0000020 | ||
85 | #define ONLRET 0000040 | ||
86 | #define OFILL 0000100 | ||
87 | #define OFDEL 0000200 | ||
88 | #define NLDLY 0000400 | ||
89 | #define NL0 0000000 | ||
90 | #define NL1 0000400 | ||
91 | #define CRDLY 0003000 | ||
92 | #define CR0 0000000 | ||
93 | #define CR1 0001000 | ||
94 | #define CR2 0002000 | ||
95 | #define CR3 0003000 | ||
96 | #define TABDLY 0014000 | ||
97 | #define TAB0 0000000 | ||
98 | #define TAB1 0004000 | ||
99 | #define TAB2 0010000 | ||
100 | #define TAB3 0014000 | ||
101 | #define XTABS 0014000 | ||
102 | #define BSDLY 0020000 | ||
103 | #define BS0 0000000 | ||
104 | #define BS1 0020000 | ||
105 | #define VTDLY 0040000 | ||
106 | #define VT0 0000000 | ||
107 | #define VT1 0040000 | ||
108 | #define FFDLY 0100000 | ||
109 | #define FF0 0000000 | ||
110 | #define FF1 0100000 | ||
111 | |||
112 | /* c_cflag bit meaning */ | ||
113 | #define CBAUD 0010017 | ||
114 | #define B0 0000000 /* hang up */ | ||
115 | #define B50 0000001 | ||
116 | #define B75 0000002 | ||
117 | #define B110 0000003 | ||
118 | #define B134 0000004 | ||
119 | #define B150 0000005 | ||
120 | #define B200 0000006 | ||
121 | #define B300 0000007 | ||
122 | #define B600 0000010 | ||
123 | #define B1200 0000011 | ||
124 | #define B1800 0000012 | ||
125 | #define B2400 0000013 | ||
126 | #define B4800 0000014 | ||
127 | #define B9600 0000015 | ||
128 | #define B19200 0000016 | ||
129 | #define B38400 0000017 | ||
130 | #define EXTA B19200 | ||
131 | #define EXTB B38400 | ||
132 | #define CSIZE 0000060 | ||
133 | #define CS5 0000000 | ||
134 | #define CS6 0000020 | ||
135 | #define CS7 0000040 | ||
136 | #define CS8 0000060 | ||
137 | #define CSTOPB 0000100 | ||
138 | #define CREAD 0000200 | ||
139 | #define PARENB 0000400 | ||
140 | #define PARODD 0001000 | ||
141 | #define HUPCL 0002000 | ||
142 | #define CLOCAL 0004000 | ||
143 | #define CBAUDEX 0010000 | ||
144 | #define BOTHER 0010000 | ||
145 | #define B57600 0010001 | ||
146 | #define B115200 0010002 | ||
147 | #define B230400 0010003 | ||
148 | #define B460800 0010004 | ||
149 | #define B500000 0010005 | ||
150 | #define B576000 0010006 | ||
151 | #define B921600 0010007 | ||
152 | #define B1000000 0010010 | ||
153 | #define B1152000 0010011 | ||
154 | #define B1500000 0010012 | ||
155 | #define B2000000 0010013 | ||
156 | #define B2500000 0010014 | ||
157 | #define B3000000 0010015 | ||
158 | #define B3500000 0010016 | ||
159 | #define B4000000 0010017 | ||
160 | #define CIBAUD 002003600000 /* input baud rate */ | ||
161 | #define CMSPAR 010000000000 /* mark or space (stick) parity */ | ||
162 | #define CRTSCTS 020000000000 /* flow control */ | ||
163 | |||
164 | #define IBSHIFT 16 /* Shifr from CBAUD to CIBAUD */ | ||
165 | |||
166 | /* c_lflag bits */ | ||
167 | #define ISIG 0000001 | ||
168 | #define ICANON 0000002 | ||
169 | #define XCASE 0000004 | ||
170 | #define ECHO 0000010 | ||
171 | #define ECHOE 0000020 | ||
172 | #define ECHOK 0000040 | ||
173 | #define ECHONL 0000100 | ||
174 | #define NOFLSH 0000200 | ||
175 | #define TOSTOP 0000400 | ||
176 | #define ECHOCTL 0001000 | ||
177 | #define ECHOPRT 0002000 | ||
178 | #define ECHOKE 0004000 | ||
179 | #define FLUSHO 0010000 | ||
180 | #define PENDIN 0040000 | ||
181 | #define IEXTEN 0100000 | ||
182 | |||
183 | |||
184 | /* tcflow() and TCXONC use these */ | ||
185 | #define TCOOFF 0 | ||
186 | #define TCOON 1 | ||
187 | #define TCIOFF 2 | ||
188 | #define TCION 3 | ||
189 | |||
190 | /* tcflush() and TCFLSH use these */ | ||
191 | #define TCIFLUSH 0 | ||
192 | #define TCOFLUSH 1 | ||
193 | #define TCIOFLUSH 2 | ||
194 | |||
195 | /* tcsetattr uses these */ | ||
196 | #define TCSANOW 0 | ||
197 | #define TCSADRAIN 1 | ||
198 | #define TCSAFLUSH 2 | ||
199 | |||
200 | #endif /* __V850_TERMBITS_H__ */ | ||
diff --git a/include/asm-v850/termios.h b/include/asm-v850/termios.h deleted file mode 100644 index fcd171838d9c..000000000000 --- a/include/asm-v850/termios.h +++ /dev/null | |||
@@ -1,90 +0,0 @@ | |||
1 | #ifndef __V850_TERMIOS_H__ | ||
2 | #define __V850_TERMIOS_H__ | ||
3 | |||
4 | #include <asm/termbits.h> | ||
5 | #include <asm/ioctls.h> | ||
6 | |||
7 | struct winsize { | ||
8 | unsigned short ws_row; | ||
9 | unsigned short ws_col; | ||
10 | unsigned short ws_xpixel; | ||
11 | unsigned short ws_ypixel; | ||
12 | }; | ||
13 | |||
14 | #define NCC 8 | ||
15 | struct termio { | ||
16 | unsigned short c_iflag; /* input mode flags */ | ||
17 | unsigned short c_oflag; /* output mode flags */ | ||
18 | unsigned short c_cflag; /* control mode flags */ | ||
19 | unsigned short c_lflag; /* local mode flags */ | ||
20 | unsigned char c_line; /* line discipline */ | ||
21 | unsigned char c_cc[NCC]; /* control characters */ | ||
22 | }; | ||
23 | |||
24 | /* modem lines */ | ||
25 | #define TIOCM_LE 0x001 | ||
26 | #define TIOCM_DTR 0x002 | ||
27 | #define TIOCM_RTS 0x004 | ||
28 | #define TIOCM_ST 0x008 | ||
29 | #define TIOCM_SR 0x010 | ||
30 | #define TIOCM_CTS 0x020 | ||
31 | #define TIOCM_CAR 0x040 | ||
32 | #define TIOCM_RNG 0x080 | ||
33 | #define TIOCM_DSR 0x100 | ||
34 | #define TIOCM_CD TIOCM_CAR | ||
35 | #define TIOCM_RI TIOCM_RNG | ||
36 | #define TIOCM_OUT1 0x2000 | ||
37 | #define TIOCM_OUT2 0x4000 | ||
38 | #define TIOCM_LOOP 0x8000 | ||
39 | |||
40 | /* ioctl (fd, TIOCSERGETLSR, &result) where result may be as below */ | ||
41 | |||
42 | #ifdef __KERNEL__ | ||
43 | |||
44 | /* intr=^C quit=^\ erase=del kill=^U | ||
45 | eof=^D vtime=\0 vmin=\1 sxtc=\0 | ||
46 | start=^Q stop=^S susp=^Z eol=\0 | ||
47 | reprint=^R discard=^U werase=^W lnext=^V | ||
48 | eol2=\0 | ||
49 | */ | ||
50 | #define INIT_C_CC "\003\034\177\025\004\0\1\0\021\023\032\0\022\017\027\026\0" | ||
51 | |||
52 | /* | ||
53 | * Translate a "termio" structure into a "termios". Ugh. | ||
54 | */ | ||
55 | #define SET_LOW_TERMIOS_BITS(termios, termio, x) { \ | ||
56 | unsigned short __tmp; \ | ||
57 | get_user(__tmp,&(termio)->x); \ | ||
58 | *(unsigned short *) &(termios)->x = __tmp; \ | ||
59 | } | ||
60 | |||
61 | #define user_termio_to_kernel_termios(termios, termio) \ | ||
62 | ({ \ | ||
63 | SET_LOW_TERMIOS_BITS(termios, termio, c_iflag); \ | ||
64 | SET_LOW_TERMIOS_BITS(termios, termio, c_oflag); \ | ||
65 | SET_LOW_TERMIOS_BITS(termios, termio, c_cflag); \ | ||
66 | SET_LOW_TERMIOS_BITS(termios, termio, c_lflag); \ | ||
67 | copy_from_user((termios)->c_cc, (termio)->c_cc, NCC); \ | ||
68 | }) | ||
69 | |||
70 | /* | ||
71 | * Translate a "termios" structure into a "termio". Ugh. | ||
72 | */ | ||
73 | #define kernel_termios_to_user_termio(termio, termios) \ | ||
74 | ({ \ | ||
75 | put_user((termios)->c_iflag, &(termio)->c_iflag); \ | ||
76 | put_user((termios)->c_oflag, &(termio)->c_oflag); \ | ||
77 | put_user((termios)->c_cflag, &(termio)->c_cflag); \ | ||
78 | put_user((termios)->c_lflag, &(termio)->c_lflag); \ | ||
79 | put_user((termios)->c_line, &(termio)->c_line); \ | ||
80 | copy_to_user((termio)->c_cc, (termios)->c_cc, NCC); \ | ||
81 | }) | ||
82 | |||
83 | #define user_termios_to_kernel_termios(k, u) copy_from_user(k, u, sizeof(struct termios2)) | ||
84 | #define kernel_termios_to_user_termios(u, k) copy_to_user(u, k, sizeof(struct termios2)) | ||
85 | #define user_termios_to_kernel_termios_1(k, u) copy_from_user(k, u, sizeof(struct termios)) | ||
86 | #define kernel_termios_to_user_termios_1(u, k) copy_to_user(u, k, sizeof(struct termios)) | ||
87 | |||
88 | #endif /* __KERNEL__ */ | ||
89 | |||
90 | #endif /* __V850_TERMIOS_H__ */ | ||
diff --git a/include/asm-v850/thread_info.h b/include/asm-v850/thread_info.h deleted file mode 100644 index 1a9e6ae0c5fd..000000000000 --- a/include/asm-v850/thread_info.h +++ /dev/null | |||
@@ -1,129 +0,0 @@ | |||
1 | /* | ||
2 | * include/asm-v850/thread_info.h -- v850 low-level thread information | ||
3 | * | ||
4 | * Copyright (C) 2002 NEC Corporation | ||
5 | * Copyright (C) 2002 Miles Bader <miles@gnu.org> | ||
6 | * Copyright (C) 2002 David Howells (dhowells@redhat.com) | ||
7 | * - Incorporating suggestions made by Linus Torvalds and Dave Miller | ||
8 | * | ||
9 | * This file is subject to the terms and conditions of the GNU General | ||
10 | * Public License. See the file COPYING in the main directory of this | ||
11 | * archive for more details. | ||
12 | * | ||
13 | * This file was derived from the PPC version, include/asm-ppc/thread_info.h | ||
14 | * which was adapted from the i386 version by Paul Mackerras | ||
15 | */ | ||
16 | |||
17 | #ifndef __V850_THREAD_INFO_H__ | ||
18 | #define __V850_THREAD_INFO_H__ | ||
19 | |||
20 | #ifdef __KERNEL__ | ||
21 | |||
22 | #ifndef __ASSEMBLY__ | ||
23 | |||
24 | /* | ||
25 | * low level task data. | ||
26 | * If you change this, change the TI_* offsets below to match. | ||
27 | */ | ||
28 | struct thread_info { | ||
29 | struct task_struct *task; /* main task structure */ | ||
30 | struct exec_domain *exec_domain; /* execution domain */ | ||
31 | unsigned long flags; /* low level flags */ | ||
32 | int cpu; /* cpu we're on */ | ||
33 | int preempt_count; /* 0 => preemptable, | ||
34 | <0 => BUG */ | ||
35 | struct restart_block restart_block; | ||
36 | }; | ||
37 | |||
38 | #define INIT_THREAD_INFO(tsk) \ | ||
39 | { \ | ||
40 | .task = &tsk, \ | ||
41 | .exec_domain = &default_exec_domain, \ | ||
42 | .flags = 0, \ | ||
43 | .cpu = 0, \ | ||
44 | .preempt_count = 1, \ | ||
45 | .restart_block = { \ | ||
46 | .fn = do_no_restart_syscall, \ | ||
47 | }, \ | ||
48 | } | ||
49 | |||
50 | #define init_thread_info (init_thread_union.thread_info) | ||
51 | #define init_stack (init_thread_union.stack) | ||
52 | |||
53 | /* | ||
54 | * macros/functions for gaining access to the thread information structure | ||
55 | */ | ||
56 | |||
57 | /* thread information allocation */ | ||
58 | #define alloc_thread_info(tsk) ((struct thread_info *) \ | ||
59 | __get_free_pages(GFP_KERNEL, 1)) | ||
60 | #define free_thread_info(ti) free_pages((unsigned long) (ti), 1) | ||
61 | |||
62 | #endif /* __ASSEMBLY__ */ | ||
63 | |||
64 | |||
65 | /* | ||
66 | * Offsets in thread_info structure, used in assembly code | ||
67 | */ | ||
68 | #define TI_TASK 0 | ||
69 | #define TI_EXECDOMAIN 4 | ||
70 | #define TI_FLAGS 8 | ||
71 | #define TI_CPU 12 | ||
72 | #define TI_PREEMPT 16 | ||
73 | |||
74 | #define PREEMPT_ACTIVE 0x4000000 | ||
75 | |||
76 | /* | ||
77 | * thread information flag bit numbers | ||
78 | */ | ||
79 | #define TIF_SYSCALL_TRACE 0 /* syscall trace active */ | ||
80 | #define TIF_SIGPENDING 1 /* signal pending */ | ||
81 | #define TIF_NEED_RESCHED 2 /* rescheduling necessary */ | ||
82 | #define TIF_POLLING_NRFLAG 3 /* true if poll_idle() is polling | ||
83 | TIF_NEED_RESCHED */ | ||
84 | #define TIF_MEMDIE 4 | ||
85 | |||
86 | /* as above, but as bit values */ | ||
87 | #define _TIF_SYSCALL_TRACE (1<<TIF_SYSCALL_TRACE) | ||
88 | #define _TIF_SIGPENDING (1<<TIF_SIGPENDING) | ||
89 | #define _TIF_NEED_RESCHED (1<<TIF_NEED_RESCHED) | ||
90 | #define _TIF_POLLING_NRFLAG (1<<TIF_POLLING_NRFLAG) | ||
91 | |||
92 | |||
93 | /* Size of kernel stack for each process. */ | ||
94 | #define THREAD_SIZE 0x2000 | ||
95 | |||
96 | /* The alignment of kernel threads, with thread_info structures at their | ||
97 | base. Thus, a pointer for a task's task structure can be derived from | ||
98 | its kernel stack pointer. */ | ||
99 | #define THREAD_ALIGNMENT THREAD_SIZE | ||
100 | #define THREAD_MASK (-THREAD_ALIGNMENT) | ||
101 | |||
102 | |||
103 | #ifdef __ASSEMBLY__ | ||
104 | |||
105 | /* Put a pointer to the current thread_info structure into REG. Note that | ||
106 | this definition requires THREAD_MASK to be representable as a signed | ||
107 | 16-bit value. */ | ||
108 | #define GET_CURRENT_THREAD(reg) \ | ||
109 | /* Use `addi' and then `and' instead of just `andi', because \ | ||
110 | `addi' sign-extends the immediate value, whereas `andi' \ | ||
111 | zero-extends it. */ \ | ||
112 | addi THREAD_MASK, r0, reg; \ | ||
113 | and sp, reg | ||
114 | |||
115 | #else | ||
116 | |||
117 | /* Return a pointer to the current thread_info structure. */ | ||
118 | static inline struct thread_info *current_thread_info (void) | ||
119 | { | ||
120 | register unsigned long sp __asm__ ("sp"); | ||
121 | return (struct thread_info *)(sp & THREAD_MASK); | ||
122 | } | ||
123 | |||
124 | #endif /* __ASSEMBLY__ */ | ||
125 | |||
126 | |||
127 | #endif /* __KERNEL__ */ | ||
128 | |||
129 | #endif /* __V850_THREAD_INFO_H__ */ | ||
diff --git a/include/asm-v850/timex.h b/include/asm-v850/timex.h deleted file mode 100644 index 6279e5a0ee8e..000000000000 --- a/include/asm-v850/timex.h +++ /dev/null | |||
@@ -1,18 +0,0 @@ | |||
1 | /* | ||
2 | * linux/include/asm-v850/timex.h | ||
3 | * | ||
4 | * v850 architecture timex specifications | ||
5 | */ | ||
6 | #ifndef __V850_TIMEX_H__ | ||
7 | #define __V850_TIMEX_H__ | ||
8 | |||
9 | #define CLOCK_TICK_RATE 1193180 /* Underlying HZ */ | ||
10 | |||
11 | typedef unsigned long cycles_t; | ||
12 | |||
13 | static inline cycles_t get_cycles(void) | ||
14 | { | ||
15 | return 0; | ||
16 | } | ||
17 | |||
18 | #endif /* __V850_TIMEX_H__ */ | ||
diff --git a/include/asm-v850/tlb.h b/include/asm-v850/tlb.h deleted file mode 100644 index 73bc9ead40dd..000000000000 --- a/include/asm-v850/tlb.h +++ /dev/null | |||
@@ -1,21 +0,0 @@ | |||
1 | /* | ||
2 | * include/asm-v850/tlb.h | ||
3 | * | ||
4 | * Copyright (C) 2002 NEC Corporation | ||
5 | * Copyright (C) 2002 Miles Bader <miles@gnu.org> | ||
6 | * | ||
7 | * This file is subject to the terms and conditions of the GNU General | ||
8 | * Public License. See the file COPYING in the main directory of this | ||
9 | * archive for more details. | ||
10 | * | ||
11 | * Written by Miles Bader <miles@gnu.org> | ||
12 | */ | ||
13 | |||
14 | #ifndef __V850_TLB_H__ | ||
15 | #define __V850_TLB_H__ | ||
16 | |||
17 | #define tlb_flush(tlb) ((void)0) | ||
18 | |||
19 | #include <asm-generic/tlb.h> | ||
20 | |||
21 | #endif /* __V850_TLB_H__ */ | ||
diff --git a/include/asm-v850/tlbflush.h b/include/asm-v850/tlbflush.h deleted file mode 100644 index c44aa64449c8..000000000000 --- a/include/asm-v850/tlbflush.h +++ /dev/null | |||
@@ -1,64 +0,0 @@ | |||
1 | /* | ||
2 | * include/asm-v850/tlbflush.h | ||
3 | * | ||
4 | * Copyright (C) 2001,02,03 NEC Electronics Corporation | ||
5 | * Copyright (C) 2001,02,03 Miles Bader <miles@gnu.org> | ||
6 | * | ||
7 | * This file is subject to the terms and conditions of the GNU General | ||
8 | * Public License. See the file COPYING in the main directory of this | ||
9 | * archive for more details. | ||
10 | * | ||
11 | * Written by Miles Bader <miles@gnu.org> | ||
12 | */ | ||
13 | |||
14 | #ifndef __V850_TLBFLUSH_H__ | ||
15 | #define __V850_TLBFLUSH_H__ | ||
16 | |||
17 | #include <asm/machdep.h> | ||
18 | |||
19 | |||
20 | /* | ||
21 | * flush all user-space atc entries. | ||
22 | */ | ||
23 | static inline void __flush_tlb(void) | ||
24 | { | ||
25 | BUG (); | ||
26 | } | ||
27 | |||
28 | static inline void __flush_tlb_one(unsigned long addr) | ||
29 | { | ||
30 | BUG (); | ||
31 | } | ||
32 | |||
33 | #define flush_tlb() __flush_tlb() | ||
34 | |||
35 | /* | ||
36 | * flush all atc entries (both kernel and user-space entries). | ||
37 | */ | ||
38 | static inline void flush_tlb_all(void) | ||
39 | { | ||
40 | BUG (); | ||
41 | } | ||
42 | |||
43 | static inline void flush_tlb_mm(struct mm_struct *mm) | ||
44 | { | ||
45 | BUG (); | ||
46 | } | ||
47 | |||
48 | static inline void flush_tlb_page(struct vm_area_struct *vma, unsigned long addr) | ||
49 | { | ||
50 | BUG (); | ||
51 | } | ||
52 | |||
53 | static inline void flush_tlb_range(struct vm_area_struct *vma, | ||
54 | unsigned long start, unsigned long end) | ||
55 | { | ||
56 | BUG (); | ||
57 | } | ||
58 | |||
59 | static inline void flush_tlb_kernel_page(unsigned long addr) | ||
60 | { | ||
61 | BUG (); | ||
62 | } | ||
63 | |||
64 | #endif /* __V850_TLBFLUSH_H__ */ | ||
diff --git a/include/asm-v850/topology.h b/include/asm-v850/topology.h deleted file mode 100644 index 6040e41d7945..000000000000 --- a/include/asm-v850/topology.h +++ /dev/null | |||
@@ -1,6 +0,0 @@ | |||
1 | #ifndef __V850_TOPOLOGY_H__ | ||
2 | #define __V850_TOPOLOGY_H__ | ||
3 | |||
4 | #include <asm-generic/topology.h> | ||
5 | |||
6 | #endif /* __V850_TOPOLOGY_H__ */ | ||
diff --git a/include/asm-v850/types.h b/include/asm-v850/types.h deleted file mode 100644 index 89f735ee41dd..000000000000 --- a/include/asm-v850/types.h +++ /dev/null | |||
@@ -1,36 +0,0 @@ | |||
1 | #ifndef __V850_TYPES_H__ | ||
2 | #define __V850_TYPES_H__ | ||
3 | |||
4 | #ifndef __ASSEMBLY__ | ||
5 | |||
6 | /* | ||
7 | * This file is never included by application software unless | ||
8 | * explicitly requested (e.g., via linux/types.h) in which case the | ||
9 | * application is Linux specific so (user-) name space pollution is | ||
10 | * not a major issue. However, for interoperability, libraries still | ||
11 | * need to be careful to avoid a name clashes. | ||
12 | */ | ||
13 | #include <asm-generic/int-ll64.h> | ||
14 | |||
15 | typedef unsigned short umode_t; | ||
16 | |||
17 | #endif /* !__ASSEMBLY__ */ | ||
18 | |||
19 | /* | ||
20 | * These aren't exported outside the kernel to avoid name space clashes | ||
21 | */ | ||
22 | #ifdef __KERNEL__ | ||
23 | |||
24 | #define BITS_PER_LONG 32 | ||
25 | |||
26 | #ifndef __ASSEMBLY__ | ||
27 | |||
28 | /* Dma addresses are 32-bits wide. */ | ||
29 | |||
30 | typedef u32 dma_addr_t; | ||
31 | |||
32 | #endif /* !__ASSEMBLY__ */ | ||
33 | |||
34 | #endif /* __KERNEL__ */ | ||
35 | |||
36 | #endif /* __V850_TYPES_H__ */ | ||
diff --git a/include/asm-v850/uaccess.h b/include/asm-v850/uaccess.h deleted file mode 100644 index 64563c409bb2..000000000000 --- a/include/asm-v850/uaccess.h +++ /dev/null | |||
@@ -1,159 +0,0 @@ | |||
1 | #ifndef __V850_UACCESS_H__ | ||
2 | #define __V850_UACCESS_H__ | ||
3 | |||
4 | /* | ||
5 | * User space memory access functions | ||
6 | */ | ||
7 | |||
8 | #include <linux/errno.h> | ||
9 | #include <linux/string.h> | ||
10 | |||
11 | #include <asm/segment.h> | ||
12 | #include <asm/machdep.h> | ||
13 | |||
14 | #define VERIFY_READ 0 | ||
15 | #define VERIFY_WRITE 1 | ||
16 | |||
17 | static inline int access_ok (int type, const void *addr, unsigned long size) | ||
18 | { | ||
19 | /* XXX I guess we should check against real ram bounds at least, and | ||
20 | possibly make sure ADDR is not within the kernel. | ||
21 | For now we just check to make sure it's not a small positive | ||
22 | or negative value, as that will at least catch some kinds of | ||
23 | error. In particular, we make sure that ADDR's not within the | ||
24 | interrupt vector area, which we know starts at zero, or within the | ||
25 | peripheral-I/O area, which is located just _before_ zero. */ | ||
26 | unsigned long val = (unsigned long)addr; | ||
27 | return val >= (0x80 + NUM_CPU_IRQS*16) && val < 0xFFFFF000; | ||
28 | } | ||
29 | |||
30 | /* | ||
31 | * The exception table consists of pairs of addresses: the first is the | ||
32 | * address of an instruction that is allowed to fault, and the second is | ||
33 | * the address at which the program should continue. No registers are | ||
34 | * modified, so it is entirely up to the continuation code to figure out | ||
35 | * what to do. | ||
36 | * | ||
37 | * All the routines below use bits of fixup code that are out of line | ||
38 | * with the main instruction path. This means when everything is well, | ||
39 | * we don't even have to jump over them. Further, they do not intrude | ||
40 | * on our cache or tlb entries. | ||
41 | */ | ||
42 | |||
43 | struct exception_table_entry | ||
44 | { | ||
45 | unsigned long insn, fixup; | ||
46 | }; | ||
47 | |||
48 | /* Returns 0 if exception not found and fixup otherwise. */ | ||
49 | extern unsigned long search_exception_table (unsigned long); | ||
50 | |||
51 | |||
52 | /* | ||
53 | * These are the main single-value transfer routines. They automatically | ||
54 | * use the right size if we just have the right pointer type. | ||
55 | */ | ||
56 | |||
57 | extern int bad_user_access_length (void); | ||
58 | |||
59 | #define __get_user(var, ptr) \ | ||
60 | ({ \ | ||
61 | int __gu_err = 0; \ | ||
62 | typeof(*(ptr)) __gu_val = 0; \ | ||
63 | switch (sizeof (*(ptr))) { \ | ||
64 | case 1: \ | ||
65 | case 2: \ | ||
66 | case 4: \ | ||
67 | __gu_val = *(ptr); \ | ||
68 | break; \ | ||
69 | case 8: \ | ||
70 | memcpy(&__gu_val, ptr, sizeof(__gu_val)); \ | ||
71 | break; \ | ||
72 | default: \ | ||
73 | __gu_val = 0; \ | ||
74 | __gu_err = __get_user_bad (); \ | ||
75 | break; \ | ||
76 | } \ | ||
77 | (var) = __gu_val; \ | ||
78 | __gu_err; \ | ||
79 | }) | ||
80 | #define __get_user_bad() (bad_user_access_length (), (-EFAULT)) | ||
81 | |||
82 | #define __put_user(var, ptr) \ | ||
83 | ({ \ | ||
84 | int __pu_err = 0; \ | ||
85 | switch (sizeof (*(ptr))) { \ | ||
86 | case 1: \ | ||
87 | case 2: \ | ||
88 | case 4: \ | ||
89 | *(ptr) = (var); \ | ||
90 | break; \ | ||
91 | case 8: { \ | ||
92 | typeof(*(ptr)) __pu_val = 0; \ | ||
93 | memcpy(ptr, &__pu_val, sizeof(__pu_val)); \ | ||
94 | } \ | ||
95 | break; \ | ||
96 | default: \ | ||
97 | __pu_err = __put_user_bad (); \ | ||
98 | break; \ | ||
99 | } \ | ||
100 | __pu_err; \ | ||
101 | }) | ||
102 | #define __put_user_bad() (bad_user_access_length (), (-EFAULT)) | ||
103 | |||
104 | #define put_user(x, ptr) __put_user(x, ptr) | ||
105 | #define get_user(x, ptr) __get_user(x, ptr) | ||
106 | |||
107 | #define __copy_from_user(to, from, n) (memcpy (to, from, n), 0) | ||
108 | #define __copy_to_user(to, from, n) (memcpy(to, from, n), 0) | ||
109 | |||
110 | #define __copy_to_user_inatomic __copy_to_user | ||
111 | #define __copy_from_user_inatomic __copy_from_user | ||
112 | |||
113 | #define copy_from_user(to, from, n) __copy_from_user (to, from, n) | ||
114 | #define copy_to_user(to, from, n) __copy_to_user(to, from, n) | ||
115 | |||
116 | #define copy_to_user_ret(to,from,n,retval) \ | ||
117 | ({ if (copy_to_user (to,from,n)) return retval; }) | ||
118 | |||
119 | #define copy_from_user_ret(to,from,n,retval) \ | ||
120 | ({ if (copy_from_user (to,from,n)) return retval; }) | ||
121 | |||
122 | /* | ||
123 | * Copy a null terminated string from userspace. | ||
124 | */ | ||
125 | |||
126 | static inline long | ||
127 | strncpy_from_user (char *dst, const char *src, long count) | ||
128 | { | ||
129 | char *tmp; | ||
130 | strncpy (dst, src, count); | ||
131 | for (tmp = dst; *tmp && count > 0; tmp++, count--) | ||
132 | ; | ||
133 | return tmp - dst; | ||
134 | } | ||
135 | |||
136 | /* | ||
137 | * Return the size of a string (including the ending 0) | ||
138 | * | ||
139 | * Return 0 on exception, a value greater than N if too long | ||
140 | */ | ||
141 | static inline long strnlen_user (const char *src, long n) | ||
142 | { | ||
143 | return strlen (src) + 1; | ||
144 | } | ||
145 | |||
146 | #define strlen_user(str) strnlen_user (str, 32767) | ||
147 | |||
148 | /* | ||
149 | * Zero Userspace | ||
150 | */ | ||
151 | |||
152 | static inline unsigned long | ||
153 | clear_user (void *to, unsigned long n) | ||
154 | { | ||
155 | memset (to, 0, n); | ||
156 | return 0; | ||
157 | } | ||
158 | |||
159 | #endif /* __V850_UACCESS_H__ */ | ||
diff --git a/include/asm-v850/ucontext.h b/include/asm-v850/ucontext.h deleted file mode 100644 index 303c21590cff..000000000000 --- a/include/asm-v850/ucontext.h +++ /dev/null | |||
@@ -1,14 +0,0 @@ | |||
1 | #ifndef __V850_UCONTEXT_H__ | ||
2 | #define __V850_UCONTEXT_H__ | ||
3 | |||
4 | #include <asm/sigcontext.h> | ||
5 | |||
6 | struct ucontext { | ||
7 | unsigned long uc_flags; | ||
8 | struct ucontext *uc_link; | ||
9 | stack_t uc_stack; | ||
10 | struct sigcontext uc_mcontext; | ||
11 | sigset_t uc_sigmask; /* mask last for extensibility */ | ||
12 | }; | ||
13 | |||
14 | #endif /* __V850_UCONTEXT_H__ */ | ||
diff --git a/include/asm-v850/unaligned.h b/include/asm-v850/unaligned.h deleted file mode 100644 index 53122b28491e..000000000000 --- a/include/asm-v850/unaligned.h +++ /dev/null | |||
@@ -1,22 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2001 NEC Corporation | ||
3 | * Copyright (C) 2001 Miles Bader <miles@gnu.org> | ||
4 | * | ||
5 | * This file is subject to the terms and conditions of the GNU General | ||
6 | * Public License. See the file COPYING in the main directory of this | ||
7 | * archive for more details. | ||
8 | * | ||
9 | * Note that some v850 chips support unaligned access, but it seems too | ||
10 | * annoying to use. | ||
11 | */ | ||
12 | #ifndef _ASM_V850_UNALIGNED_H | ||
13 | #define _ASM_V850_UNALIGNED_H | ||
14 | |||
15 | #include <linux/unaligned/be_byteshift.h> | ||
16 | #include <linux/unaligned/le_byteshift.h> | ||
17 | #include <linux/unaligned/generic.h> | ||
18 | |||
19 | #define get_unaligned __get_unaligned_le | ||
20 | #define put_unaligned __put_unaligned_le | ||
21 | |||
22 | #endif /* _ASM_V850_UNALIGNED_H */ | ||
diff --git a/include/asm-v850/unistd.h b/include/asm-v850/unistd.h deleted file mode 100644 index 2241ed45ecfe..000000000000 --- a/include/asm-v850/unistd.h +++ /dev/null | |||
@@ -1,244 +0,0 @@ | |||
1 | /* | ||
2 | * include/asm-v850/unistd.h -- System call numbers and invocation mechanism | ||
3 | * | ||
4 | * Copyright (C) 2001,02,03,04 NEC Electronics Corporation | ||
5 | * Copyright (C) 2001,02,03,04 Miles Bader <miles@gnu.org> | ||
6 | * | ||
7 | * This file is subject to the terms and conditions of the GNU General | ||
8 | * Public License. See the file COPYING in the main directory of this | ||
9 | * archive for more details. | ||
10 | * | ||
11 | * Written by Miles Bader <miles@gnu.org> | ||
12 | */ | ||
13 | |||
14 | #ifndef __V850_UNISTD_H__ | ||
15 | #define __V850_UNISTD_H__ | ||
16 | |||
17 | #define __NR_restart_syscall 0 | ||
18 | #define __NR_exit 1 | ||
19 | #define __NR_fork 2 | ||
20 | #define __NR_read 3 | ||
21 | #define __NR_write 4 | ||
22 | #define __NR_open 5 | ||
23 | #define __NR_close 6 | ||
24 | #define __NR_waitpid 7 | ||
25 | #define __NR_creat 8 | ||
26 | #define __NR_link 9 | ||
27 | #define __NR_unlink 10 | ||
28 | #define __NR_execve 11 | ||
29 | #define __NR_chdir 12 | ||
30 | #define __NR_time 13 | ||
31 | #define __NR_mknod 14 | ||
32 | #define __NR_chmod 15 | ||
33 | #define __NR_chown 16 | ||
34 | #define __NR_break 17 | ||
35 | #define __NR_lseek 19 | ||
36 | #define __NR_getpid 20 | ||
37 | #define __NR_mount 21 | ||
38 | #define __NR_umount 22 | ||
39 | #define __NR_setuid 23 | ||
40 | #define __NR_getuid 24 | ||
41 | #define __NR_stime 25 | ||
42 | #define __NR_ptrace 26 | ||
43 | #define __NR_alarm 27 | ||
44 | #define __NR_pause 29 | ||
45 | #define __NR_utime 30 | ||
46 | #define __NR_stty 31 | ||
47 | #define __NR_gtty 32 | ||
48 | #define __NR_access 33 | ||
49 | #define __NR_nice 34 | ||
50 | #define __NR_ftime 35 | ||
51 | #define __NR_sync 36 | ||
52 | #define __NR_kill 37 | ||
53 | #define __NR_rename 38 | ||
54 | #define __NR_mkdir 39 | ||
55 | #define __NR_rmdir 40 | ||
56 | #define __NR_dup 41 | ||
57 | #define __NR_pipe 42 | ||
58 | #define __NR_times 43 | ||
59 | #define __NR_prof 44 | ||
60 | #define __NR_brk 45 | ||
61 | #define __NR_setgid 46 | ||
62 | #define __NR_getgid 47 | ||
63 | #define __NR_signal 48 | ||
64 | #define __NR_geteuid 49 | ||
65 | #define __NR_getegid 50 | ||
66 | #define __NR_acct 51 | ||
67 | #define __NR_umount2 52 | ||
68 | #define __NR_lock 53 | ||
69 | #define __NR_ioctl 54 | ||
70 | #define __NR_fcntl 55 | ||
71 | #define __NR_setpgid 57 | ||
72 | #define __NR_umask 60 | ||
73 | #define __NR_chroot 61 | ||
74 | #define __NR_ustat 62 | ||
75 | #define __NR_dup2 63 | ||
76 | #define __NR_getppid 64 | ||
77 | #define __NR_getpgrp 65 | ||
78 | #define __NR_setsid 66 | ||
79 | #define __NR_sigaction 67 | ||
80 | #define __NR_sgetmask 68 | ||
81 | #define __NR_ssetmask 69 | ||
82 | #define __NR_setreuid 70 | ||
83 | #define __NR_setregid 71 | ||
84 | #define __NR_sigsuspend 72 | ||
85 | #define __NR_sigpending 73 | ||
86 | #define __NR_sethostname 74 | ||
87 | #define __NR_setrlimit 75 | ||
88 | #define __NR_ugetrlimit 76 | ||
89 | #define __NR_getrusage 77 | ||
90 | #define __NR_gettimeofday 78 | ||
91 | #define __NR_settimeofday 79 | ||
92 | #define __NR_getgroups 80 | ||
93 | #define __NR_setgroups 81 | ||
94 | #define __NR_select 82 | ||
95 | #define __NR_symlink 83 | ||
96 | #define __NR_readlink 85 | ||
97 | #define __NR_uselib 86 | ||
98 | #define __NR_swapon 87 | ||
99 | #define __NR_reboot 88 | ||
100 | #define __NR_readdir 89 | ||
101 | #define __NR_mmap 90 | ||
102 | #define __NR_munmap 91 | ||
103 | #define __NR_truncate 92 | ||
104 | #define __NR_ftruncate 93 | ||
105 | #define __NR_fchmod 94 | ||
106 | #define __NR_fchown 95 | ||
107 | #define __NR_getpriority 96 | ||
108 | #define __NR_setpriority 97 | ||
109 | #define __NR_profil 98 | ||
110 | #define __NR_statfs 99 | ||
111 | #define __NR_fstatfs 100 | ||
112 | #define __NR_socketcall 102 | ||
113 | #define __NR_syslog 103 | ||
114 | #define __NR_setitimer 104 | ||
115 | #define __NR_getitimer 105 | ||
116 | #define __NR_stat 106 | ||
117 | #define __NR_lstat 107 | ||
118 | #define __NR_fstat 108 | ||
119 | #define __NR_vhangup 111 | ||
120 | #define __NR_wait4 114 | ||
121 | #define __NR_swapoff 115 | ||
122 | #define __NR_sysinfo 116 | ||
123 | #define __NR_ipc 117 | ||
124 | #define __NR_fsync 118 | ||
125 | #define __NR_sigreturn 119 | ||
126 | #define __NR_clone 120 | ||
127 | #define __NR_setdomainname 121 | ||
128 | #define __NR_uname 122 | ||
129 | #define __NR_cacheflush 123 | ||
130 | #define __NR_adjtimex 124 | ||
131 | #define __NR_mprotect 125 | ||
132 | #define __NR_sigprocmask 126 | ||
133 | #define __NR_create_module 127 | ||
134 | #define __NR_init_module 128 | ||
135 | #define __NR_delete_module 129 | ||
136 | #define __NR_get_kernel_syms 130 | ||
137 | #define __NR_quotactl 131 | ||
138 | #define __NR_getpgid 132 | ||
139 | #define __NR_fchdir 133 | ||
140 | #define __NR_bdflush 134 | ||
141 | #define __NR_sysfs 135 | ||
142 | #define __NR_personality 136 | ||
143 | #define __NR_afs_syscall 137 /* Syscall for Andrew File System */ | ||
144 | #define __NR_setfsuid 138 | ||
145 | #define __NR_setfsgid 139 | ||
146 | #define __NR__llseek 140 | ||
147 | #define __NR_getdents 141 | ||
148 | #define __NR_flock 143 | ||
149 | #define __NR_msync 144 | ||
150 | #define __NR_readv 145 | ||
151 | #define __NR_writev 146 | ||
152 | #define __NR_getsid 147 | ||
153 | #define __NR_fdatasync 148 | ||
154 | #define __NR__sysctl 149 | ||
155 | #define __NR_mlock 150 | ||
156 | #define __NR_munlock 151 | ||
157 | #define __NR_mlockall 152 | ||
158 | #define __NR_munlockall 153 | ||
159 | #define __NR_sched_setparam 154 | ||
160 | #define __NR_sched_getparam 155 | ||
161 | #define __NR_sched_setscheduler 156 | ||
162 | #define __NR_sched_getscheduler 157 | ||
163 | #define __NR_sched_yield 158 | ||
164 | #define __NR_sched_get_priority_max 159 | ||
165 | #define __NR_sched_get_priority_min 160 | ||
166 | #define __NR_sched_rr_get_interval 161 | ||
167 | #define __NR_nanosleep 162 | ||
168 | #define __NR_mremap 163 | ||
169 | #define __NR_setresuid 164 | ||
170 | #define __NR_getresuid 165 | ||
171 | #define __NR_query_module 167 | ||
172 | #define __NR_poll 168 | ||
173 | #define __NR_nfsservctl 169 | ||
174 | #define __NR_setresgid 170 | ||
175 | #define __NR_getresgid 171 | ||
176 | #define __NR_prctl 172 | ||
177 | #define __NR_rt_sigreturn 173 | ||
178 | #define __NR_rt_sigaction 174 | ||
179 | #define __NR_rt_sigprocmask 175 | ||
180 | #define __NR_rt_sigpending 176 | ||
181 | #define __NR_rt_sigtimedwait 177 | ||
182 | #define __NR_rt_sigqueueinfo 178 | ||
183 | #define __NR_rt_sigsuspend 179 | ||
184 | #define __NR_pread 180 | ||
185 | #define __NR_pwrite 181 | ||
186 | #define __NR_lchown 182 | ||
187 | #define __NR_getcwd 183 | ||
188 | #define __NR_capget 184 | ||
189 | #define __NR_capset 185 | ||
190 | #define __NR_sigaltstack 186 | ||
191 | #define __NR_sendfile 187 | ||
192 | #define __NR_getpmsg 188 /* some people actually want streams */ | ||
193 | #define __NR_putpmsg 189 /* some people actually want streams */ | ||
194 | #define __NR_vfork 190 | ||
195 | #define __NR_mmap2 192 | ||
196 | #define __NR_truncate64 193 | ||
197 | #define __NR_ftruncate64 194 | ||
198 | #define __NR_stat64 195 | ||
199 | #define __NR_lstat64 196 | ||
200 | #define __NR_fstat64 197 | ||
201 | #define __NR_fcntl64 198 | ||
202 | #define __NR_getdents64 199 | ||
203 | #define __NR_pivot_root 200 | ||
204 | #define __NR_gettid 201 | ||
205 | #define __NR_tkill 202 | ||
206 | |||
207 | #ifdef __KERNEL__ | ||
208 | |||
209 | #define __ARCH_WANT_IPC_PARSE_VERSION | ||
210 | #define __ARCH_WANT_OLD_READDIR | ||
211 | #define __ARCH_WANT_STAT64 | ||
212 | #define __ARCH_WANT_SYS_ALARM | ||
213 | #define __ARCH_WANT_SYS_GETHOSTNAME | ||
214 | #define __ARCH_WANT_SYS_PAUSE | ||
215 | #define __ARCH_WANT_SYS_SGETMASK | ||
216 | #define __ARCH_WANT_SYS_SIGNAL | ||
217 | #define __ARCH_WANT_SYS_TIME | ||
218 | #define __ARCH_WANT_SYS_UTIME | ||
219 | #define __ARCH_WANT_SYS_WAITPID | ||
220 | #define __ARCH_WANT_SYS_SOCKETCALL | ||
221 | #define __ARCH_WANT_SYS_FADVISE64 | ||
222 | #define __ARCH_WANT_SYS_GETPGRP | ||
223 | #define __ARCH_WANT_SYS_LLSEEK | ||
224 | #define __ARCH_WANT_SYS_NICE | ||
225 | #define __ARCH_WANT_SYS_OLDUMOUNT | ||
226 | #define __ARCH_WANT_SYS_SIGPENDING | ||
227 | #define __ARCH_WANT_SYS_SIGPROCMASK | ||
228 | #define __ARCH_WANT_SYS_RT_SIGACTION | ||
229 | |||
230 | /* | ||
231 | * "Conditional" syscalls | ||
232 | */ | ||
233 | #define cond_syscall(name) \ | ||
234 | asm (".weak\t" C_SYMBOL_STRING(name) ";" \ | ||
235 | ".set\t" C_SYMBOL_STRING(name) "," C_SYMBOL_STRING(sys_ni_syscall)) | ||
236 | #if 0 | ||
237 | /* This doesn't work if there's a function prototype for NAME visible, | ||
238 | because the argument types probably won't match. */ | ||
239 | #define cond_syscall(name) \ | ||
240 | void name (void) __attribute__ ((weak, alias ("sys_ni_syscall"))); | ||
241 | #endif | ||
242 | |||
243 | #endif /* __KERNEL__ */ | ||
244 | #endif /* __V850_UNISTD_H__ */ | ||
diff --git a/include/asm-v850/user.h b/include/asm-v850/user.h deleted file mode 100644 index 63cdc567d272..000000000000 --- a/include/asm-v850/user.h +++ /dev/null | |||
@@ -1,52 +0,0 @@ | |||
1 | #ifndef __V850_USER_H__ | ||
2 | #define __V850_USER_H__ | ||
3 | |||
4 | /* Adapted from <asm-ppc/user.h>. */ | ||
5 | |||
6 | #include <linux/ptrace.h> | ||
7 | #include <asm/page.h> | ||
8 | |||
9 | /* | ||
10 | * Core file format: The core file is written in such a way that gdb | ||
11 | * can understand it and provide useful information to the user (under | ||
12 | * linux we use the `trad-core' bfd, NOT the osf-core). The file contents | ||
13 | * are as follows: | ||
14 | * | ||
15 | * upage: 1 page consisting of a user struct that tells gdb | ||
16 | * what is present in the file. Directly after this is a | ||
17 | * copy of the task_struct, which is currently not used by gdb, | ||
18 | * but it may come in handy at some point. All of the registers | ||
19 | * are stored as part of the upage. The upage should always be | ||
20 | * only one page long. | ||
21 | * data: The data segment follows next. We use current->end_text to | ||
22 | * current->brk to pick up all of the user variables, plus any memory | ||
23 | * that may have been sbrk'ed. No attempt is made to determine if a | ||
24 | * page is demand-zero or if a page is totally unused, we just cover | ||
25 | * the entire range. All of the addresses are rounded in such a way | ||
26 | * that an integral number of pages is written. | ||
27 | * stack: We need the stack information in order to get a meaningful | ||
28 | * backtrace. We need to write the data from usp to | ||
29 | * current->start_stack, so we round each of these in order to be able | ||
30 | * to write an integer number of pages. | ||
31 | */ | ||
32 | struct user { | ||
33 | struct pt_regs regs; /* entire machine state */ | ||
34 | size_t u_tsize; /* text size (pages) */ | ||
35 | size_t u_dsize; /* data size (pages) */ | ||
36 | size_t u_ssize; /* stack size (pages) */ | ||
37 | unsigned long start_code; /* text starting address */ | ||
38 | unsigned long start_data; /* data starting address */ | ||
39 | unsigned long start_stack; /* stack starting address */ | ||
40 | long int signal; /* signal causing core dump */ | ||
41 | unsigned long u_ar0; /* help gdb find registers */ | ||
42 | unsigned long magic; /* identifies a core file */ | ||
43 | char u_comm[32]; /* user command name */ | ||
44 | }; | ||
45 | |||
46 | #define NBPG PAGE_SIZE | ||
47 | #define UPAGES 1 | ||
48 | #define HOST_TEXT_START_ADDR (u.start_code) | ||
49 | #define HOST_DATA_START_ADDR (u.start_data) | ||
50 | #define HOST_STACK_END_ADDR (u.start_stack + u.u_ssize * NBPG) | ||
51 | |||
52 | #endif /* __V850_USER_H__ */ | ||
diff --git a/include/asm-v850/v850e.h b/include/asm-v850/v850e.h deleted file mode 100644 index 5a222eb5117f..000000000000 --- a/include/asm-v850/v850e.h +++ /dev/null | |||
@@ -1,21 +0,0 @@ | |||
1 | /* | ||
2 | * include/asm-v850/v850e.h -- V850E CPU | ||
3 | * | ||
4 | * Copyright (C) 2001,02,03 NEC Electronics Corporation | ||
5 | * Copyright (C) 2001,02,03 Miles Bader <miles@gnu.org> | ||
6 | * | ||
7 | * This file is subject to the terms and conditions of the GNU General | ||
8 | * Public License. See the file COPYING in the main directory of this | ||
9 | * archive for more details. | ||
10 | * | ||
11 | * Written by Miles Bader <miles@gnu.org> | ||
12 | */ | ||
13 | |||
14 | #ifndef __V850_V850E_H__ | ||
15 | #define __V850_V850E_H__ | ||
16 | |||
17 | #include <asm/v850e_intc.h> | ||
18 | |||
19 | #define CPU_ARCH "v850e" | ||
20 | |||
21 | #endif /* __V850_V850E_H__ */ | ||
diff --git a/include/asm-v850/v850e2.h b/include/asm-v850/v850e2.h deleted file mode 100644 index 48680408ab7e..000000000000 --- a/include/asm-v850/v850e2.h +++ /dev/null | |||
@@ -1,69 +0,0 @@ | |||
1 | /* | ||
2 | * include/asm-v850/v850e2.h -- Machine-dependent defs for V850E2 CPUs | ||
3 | * | ||
4 | * Copyright (C) 2002,03 NEC Electronics Corporation | ||
5 | * Copyright (C) 2002,03 Miles Bader <miles@gnu.org> | ||
6 | * | ||
7 | * This file is subject to the terms and conditions of the GNU General | ||
8 | * Public License. See the file COPYING in the main directory of this | ||
9 | * archive for more details. | ||
10 | * | ||
11 | * Written by Miles Bader <miles@gnu.org> | ||
12 | */ | ||
13 | |||
14 | #ifndef __V850_V850E2_H__ | ||
15 | #define __V850_V850E2_H__ | ||
16 | |||
17 | #include <asm/v850e_intc.h> /* v850e-style interrupt system. */ | ||
18 | |||
19 | |||
20 | #define CPU_ARCH "v850e2" | ||
21 | |||
22 | |||
23 | /* Control registers. */ | ||
24 | |||
25 | /* Chip area select control */ | ||
26 | #define V850E2_CSC_ADDR(n) (0xFFFFF060 + (n) * 2) | ||
27 | #define V850E2_CSC(n) (*(volatile u16 *)V850E2_CSC_ADDR(n)) | ||
28 | /* I/O area select control */ | ||
29 | #define V850E2_BPC_ADDR 0xFFFFF064 | ||
30 | #define V850E2_BPC (*(volatile u16 *)V850E2_BPC_ADDR) | ||
31 | /* Bus size configuration */ | ||
32 | #define V850E2_BSC_ADDR 0xFFFFF066 | ||
33 | #define V850E2_BSC (*(volatile u16 *)V850E2_BSC_ADDR) | ||
34 | /* Endian configuration */ | ||
35 | #define V850E2_BEC_ADDR 0xFFFFF068 | ||
36 | #define V850E2_BEC (*(volatile u16 *)V850E2_BEC_ADDR) | ||
37 | /* Cache configuration */ | ||
38 | #define V850E2_BHC_ADDR 0xFFFFF06A | ||
39 | #define V850E2_BHC (*(volatile u16 *)V850E2_BHC_ADDR) | ||
40 | /* NPB strobe-wait configuration */ | ||
41 | #define V850E2_VSWC_ADDR 0xFFFFF06E | ||
42 | #define V850E2_VSWC (*(volatile u16 *)V850E2_VSWC_ADDR) | ||
43 | /* Bus cycle type */ | ||
44 | #define V850E2_BCT_ADDR(n) (0xFFFFF480 + (n) * 2) | ||
45 | #define V850E2_BCT(n) (*(volatile u16 *)V850E2_BCT_ADDR(n)) | ||
46 | /* Data wait control */ | ||
47 | #define V850E2_DWC_ADDR(n) (0xFFFFF484 + (n) * 2) | ||
48 | #define V850E2_DWC(n) (*(volatile u16 *)V850E2_DWC_ADDR(n)) | ||
49 | /* Bus cycle control */ | ||
50 | #define V850E2_BCC_ADDR 0xFFFFF488 | ||
51 | #define V850E2_BCC (*(volatile u16 *)V850E2_BCC_ADDR) | ||
52 | /* Address wait control */ | ||
53 | #define V850E2_ASC_ADDR 0xFFFFF48A | ||
54 | #define V850E2_ASC (*(volatile u16 *)V850E2_ASC_ADDR) | ||
55 | /* Local bus sizing control */ | ||
56 | #define V850E2_LBS_ADDR 0xFFFFF48E | ||
57 | #define V850E2_LBS (*(volatile u16 *)V850E2_LBS_ADDR) | ||
58 | /* Line buffer control */ | ||
59 | #define V850E2_LBC_ADDR(n) (0xFFFFF490 + (n) * 2) | ||
60 | #define V850E2_LBC(n) (*(volatile u16 *)V850E2_LBC_ADDR(n)) | ||
61 | /* SDRAM configuration */ | ||
62 | #define V850E2_SCR_ADDR(n) (0xFFFFF4A0 + (n) * 4) | ||
63 | #define V850E2_SCR(n) (*(volatile u16 *)V850E2_SCR_ADDR(n)) | ||
64 | /* SDRAM refresh cycle control */ | ||
65 | #define V850E2_RFS_ADDR(n) (0xFFFFF4A2 + (n) * 4) | ||
66 | #define V850E2_RFS(n) (*(volatile u16 *)V850E2_RFS_ADDR(n)) | ||
67 | |||
68 | |||
69 | #endif /* __V850_V850E2_H__ */ | ||
diff --git a/include/asm-v850/v850e2_cache.h b/include/asm-v850/v850e2_cache.h deleted file mode 100644 index 87edf0d311d5..000000000000 --- a/include/asm-v850/v850e2_cache.h +++ /dev/null | |||
@@ -1,75 +0,0 @@ | |||
1 | /* | ||
2 | * include/asm-v850/v850e2_cache_cache.h -- Cache control for V850E2 | ||
3 | * cache memories | ||
4 | * | ||
5 | * Copyright (C) 2003,05 NEC Electronics Corporation | ||
6 | * Copyright (C) 2003,05 Miles Bader <miles@gnu.org> | ||
7 | * | ||
8 | * This file is subject to the terms and conditions of the GNU General | ||
9 | * Public License. See the file COPYING in the main directory of this | ||
10 | * archive for more details. | ||
11 | * | ||
12 | * Written by Miles Bader <miles@gnu.org> | ||
13 | */ | ||
14 | |||
15 | #ifndef __V850_V850E2_CACHE_H__ | ||
16 | #define __V850_V850E2_CACHE_H__ | ||
17 | |||
18 | #include <asm/types.h> | ||
19 | |||
20 | |||
21 | /* Cache control registers. */ | ||
22 | |||
23 | /* Bus Transaction Control */ | ||
24 | #define V850E2_CACHE_BTSC_ADDR 0xFFFFF070 | ||
25 | #define V850E2_CACHE_BTSC (*(volatile u16 *)V850E2_CACHE_BTSC_ADDR) | ||
26 | #define V850E2_CACHE_BTSC_ICM 0x0001 /* icache enable */ | ||
27 | #define V850E2_CACHE_BTSC_DCM0 0x0004 /* dcache enable, bit 0 */ | ||
28 | #define V850E2_CACHE_BTSC_DCM1 0x0008 /* dcache enable, bit 1 */ | ||
29 | #define V850E2_CACHE_BTSC_DCM_WT /* write-through */ \ | ||
30 | V850E2_CACHE_BTSC_DCM0 | ||
31 | #ifdef CONFIG_V850E2_V850E2S | ||
32 | # define V850E2_CACHE_BTSC_DCM_WB_NO_ALLOC /* write-back, non-alloc */ \ | ||
33 | V850E2_CACHE_BTSC_DCM1 | ||
34 | # define V850E2_CACHE_BTSC_DCM_WB_ALLOC /* write-back, non-alloc */ \ | ||
35 | (V850E2_CACHE_BTSC_DCM1 | V850E2_CACHE_BTSC_DCM0) | ||
36 | # define V850E2_CACHE_BTSC_ISEQ 0x0010 /* icache `address sequence mode' */ | ||
37 | # define V850E2_CACHE_BTSC_DSEQ 0x0020 /* dcache `address sequence mode' */ | ||
38 | # define V850E2_CACHE_BTSC_IRFC 0x0030 | ||
39 | # define V850E2_CACHE_BTSC_ILCD 0x4000 | ||
40 | # define V850E2_CACHE_BTSC_VABE 0x8000 | ||
41 | #endif /* CONFIG_V850E2_V850E2S */ | ||
42 | |||
43 | /* Cache operation start address register (low-bits). */ | ||
44 | #define V850E2_CACHE_CADL_ADDR 0xFFFFF074 | ||
45 | #define V850E2_CACHE_CADL (*(volatile u16 *)V850E2_CACHE_CADL_ADDR) | ||
46 | /* Cache operation start address register (high-bits). */ | ||
47 | #define V850E2_CACHE_CADH_ADDR 0xFFFFF076 | ||
48 | #define V850E2_CACHE_CADH (*(volatile u16 *)V850E2_CACHE_CADH_ADDR) | ||
49 | /* Cache operation count register. */ | ||
50 | #define V850E2_CACHE_CCNT_ADDR 0xFFFFF078 | ||
51 | #define V850E2_CACHE_CCNT (*(volatile u16 *)V850E2_CACHE_CCNT_ADDR) | ||
52 | /* Cache operation specification register. */ | ||
53 | #define V850E2_CACHE_COPR_ADDR 0xFFFFF07A | ||
54 | #define V850E2_CACHE_COPR (*(volatile u16 *)V850E2_CACHE_COPR_ADDR) | ||
55 | #define V850E2_CACHE_COPR_STRT 0x0001 /* start cache operation */ | ||
56 | #define V850E2_CACHE_COPR_LBSL 0x0100 /* 0 = icache, 1 = dcache */ | ||
57 | #define V850E2_CACHE_COPR_WSLE 0x0200 /* operate on cache way */ | ||
58 | #define V850E2_CACHE_COPR_WSL(way) ((way) * 0x0400) /* way select */ | ||
59 | #define V850E2_CACHE_COPR_CFC(op) ((op) * 0x1000) /* cache function code */ | ||
60 | |||
61 | |||
62 | /* Size of a cache line in bytes. */ | ||
63 | #define V850E2_CACHE_LINE_SIZE_BITS 4 | ||
64 | #define V850E2_CACHE_LINE_SIZE (1 << V850E2_CACHE_LINE_SIZE_BITS) | ||
65 | |||
66 | /* The size of each cache `way' in lines. */ | ||
67 | #define V850E2_CACHE_WAY_SIZE 256 | ||
68 | |||
69 | |||
70 | /* For <asm/cache.h> */ | ||
71 | #define L1_CACHE_BYTES V850E2_CACHE_LINE_SIZE | ||
72 | #define L1_CACHE_SHIFT V850E2_CACHE_LINE_SIZE_BITS | ||
73 | |||
74 | |||
75 | #endif /* __V850_V850E2_CACHE_H__ */ | ||
diff --git a/include/asm-v850/v850e_cache.h b/include/asm-v850/v850e_cache.h deleted file mode 100644 index aa7d7eb9da50..000000000000 --- a/include/asm-v850/v850e_cache.h +++ /dev/null | |||
@@ -1,48 +0,0 @@ | |||
1 | /* | ||
2 | * include/asm-v850/v850e_cache.h -- Cache control for V850E cache memories | ||
3 | * | ||
4 | * Copyright (C) 2001,03 NEC Electronics Corporation | ||
5 | * Copyright (C) 2001,03 Miles Bader <miles@gnu.org> | ||
6 | * | ||
7 | * This file is subject to the terms and conditions of the GNU General | ||
8 | * Public License. See the file COPYING in the main directory of this | ||
9 | * archive for more details. | ||
10 | * | ||
11 | * Written by Miles Bader <miles@gnu.org> | ||
12 | */ | ||
13 | |||
14 | /* This file implements cache control for the rather simple cache used on | ||
15 | some V850E CPUs, specifically the NB85E/TEG CPU-core and the V850E/ME2 | ||
16 | CPU. V850E2 processors have their own (better) cache | ||
17 | implementation. */ | ||
18 | |||
19 | #ifndef __V850_V850E_CACHE_H__ | ||
20 | #define __V850_V850E_CACHE_H__ | ||
21 | |||
22 | #include <asm/types.h> | ||
23 | |||
24 | |||
25 | /* Cache control registers. */ | ||
26 | #define V850E_CACHE_BHC_ADDR 0xFFFFF06A | ||
27 | #define V850E_CACHE_BHC (*(volatile u16 *)V850E_CACHE_BHC_ADDR) | ||
28 | #define V850E_CACHE_ICC_ADDR 0xFFFFF070 | ||
29 | #define V850E_CACHE_ICC (*(volatile u16 *)V850E_CACHE_ICC_ADDR) | ||
30 | #define V850E_CACHE_ISI_ADDR 0xFFFFF072 | ||
31 | #define V850E_CACHE_ISI (*(volatile u16 *)V850E_CACHE_ISI_ADDR) | ||
32 | #define V850E_CACHE_DCC_ADDR 0xFFFFF078 | ||
33 | #define V850E_CACHE_DCC (*(volatile u16 *)V850E_CACHE_DCC_ADDR) | ||
34 | |||
35 | /* Size of a cache line in bytes. */ | ||
36 | #define V850E_CACHE_LINE_SIZE 16 | ||
37 | |||
38 | /* For <asm/cache.h> */ | ||
39 | #define L1_CACHE_BYTES V850E_CACHE_LINE_SIZE | ||
40 | |||
41 | |||
42 | #if defined(__KERNEL__) && !defined(__ASSEMBLY__) | ||
43 | /* Set caching params via the BHC, ICC, and DCC registers. */ | ||
44 | void v850e_cache_enable (u16 bhc, u16 icc, u16 dcc); | ||
45 | #endif /* __KERNEL__ && !__ASSEMBLY__ */ | ||
46 | |||
47 | |||
48 | #endif /* __V850_V850E_CACHE_H__ */ | ||
diff --git a/include/asm-v850/v850e_intc.h b/include/asm-v850/v850e_intc.h deleted file mode 100644 index 6fdf95708317..000000000000 --- a/include/asm-v850/v850e_intc.h +++ /dev/null | |||
@@ -1,133 +0,0 @@ | |||
1 | /* | ||
2 | * include/asm-v850/v850e_intc.h -- V850E CPU interrupt controller (INTC) | ||
3 | * | ||
4 | * Copyright (C) 2001,02,03 NEC Electronics Corporation | ||
5 | * Copyright (C) 2001,02,03 Miles Bader <miles@gnu.org> | ||
6 | * | ||
7 | * This file is subject to the terms and conditions of the GNU General | ||
8 | * Public License. See the file COPYING in the main directory of this | ||
9 | * archive for more details. | ||
10 | * | ||
11 | * Written by Miles Bader <miles@gnu.org> | ||
12 | */ | ||
13 | |||
14 | #ifndef __V850_V850E_INTC_H__ | ||
15 | #define __V850_V850E_INTC_H__ | ||
16 | |||
17 | |||
18 | /* There are 4 16-bit `Interrupt Mask Registers' located contiguously | ||
19 | starting from this base. Each interrupt uses a single bit to | ||
20 | indicated enabled/disabled status. */ | ||
21 | #define V850E_INTC_IMR_BASE_ADDR 0xFFFFF100 | ||
22 | #define V850E_INTC_IMR_ADDR(irq) (V850E_INTC_IMR_BASE_ADDR + ((irq) >> 3)) | ||
23 | #define V850E_INTC_IMR_BIT(irq) ((irq) & 0x7) | ||
24 | |||
25 | /* Each maskable interrupt has a single-byte control register at this | ||
26 | address. */ | ||
27 | #define V850E_INTC_IC_BASE_ADDR 0xFFFFF110 | ||
28 | #define V850E_INTC_IC_ADDR(irq) (V850E_INTC_IC_BASE_ADDR + ((irq) << 1)) | ||
29 | #define V850E_INTC_IC(irq) (*(volatile u8 *)V850E_INTC_IC_ADDR(irq)) | ||
30 | /* Encode priority PR for storing in an interrupt control register. */ | ||
31 | #define V850E_INTC_IC_PR(pr) (pr) | ||
32 | /* Interrupt disable bit in an interrupt control register. */ | ||
33 | #define V850E_INTC_IC_MK_BIT 6 | ||
34 | #define V850E_INTC_IC_MK (1 << V850E_INTC_IC_MK_BIT) | ||
35 | /* Interrupt pending flag in an interrupt control register. */ | ||
36 | #define V850E_INTC_IC_IF_BIT 7 | ||
37 | #define V850E_INTC_IC_IF (1 << V850E_INTC_IC_IF_BIT) | ||
38 | |||
39 | /* The ISPR (In-service priority register) contains one bit for each interrupt | ||
40 | priority level, which is set to one when that level is currently being | ||
41 | serviced (and thus blocking any interrupts of equal or lesser level). */ | ||
42 | #define V850E_INTC_ISPR_ADDR 0xFFFFF1FA | ||
43 | #define V850E_INTC_ISPR (*(volatile u8 *)V850E_INTC_ISPR_ADDR) | ||
44 | |||
45 | |||
46 | #ifndef __ASSEMBLY__ | ||
47 | |||
48 | /* Enable interrupt handling for interrupt IRQ. */ | ||
49 | static inline void v850e_intc_enable_irq (unsigned irq) | ||
50 | { | ||
51 | __asm__ __volatile__ ("clr1 %0, [%1]" | ||
52 | :: "r" (V850E_INTC_IMR_BIT (irq)), | ||
53 | "r" (V850E_INTC_IMR_ADDR (irq)) | ||
54 | : "memory"); | ||
55 | } | ||
56 | |||
57 | /* Disable interrupt handling for interrupt IRQ. Note that any | ||
58 | interrupts received while disabled will be delivered once the | ||
59 | interrupt is enabled again, unless they are explicitly cleared using | ||
60 | `v850e_intc_clear_pending_irq'. */ | ||
61 | static inline void v850e_intc_disable_irq (unsigned irq) | ||
62 | { | ||
63 | __asm__ __volatile__ ("set1 %0, [%1]" | ||
64 | :: "r" (V850E_INTC_IMR_BIT (irq)), | ||
65 | "r" (V850E_INTC_IMR_ADDR (irq)) | ||
66 | : "memory"); | ||
67 | } | ||
68 | |||
69 | /* Return true if interrupt handling for interrupt IRQ is enabled. */ | ||
70 | static inline int v850e_intc_irq_enabled (unsigned irq) | ||
71 | { | ||
72 | int rval; | ||
73 | __asm__ __volatile__ ("tst1 %1, [%2]; setf z, %0" | ||
74 | : "=r" (rval) | ||
75 | : "r" (V850E_INTC_IMR_BIT (irq)), | ||
76 | "r" (V850E_INTC_IMR_ADDR (irq))); | ||
77 | return rval; | ||
78 | } | ||
79 | |||
80 | /* Disable irqs from 0 until LIMIT. LIMIT must be a multiple of 8. */ | ||
81 | static inline void _v850e_intc_disable_irqs (unsigned limit) | ||
82 | { | ||
83 | unsigned long addr; | ||
84 | for (addr = V850E_INTC_IMR_BASE_ADDR; limit >= 8; addr++, limit -= 8) | ||
85 | *(char *)addr = 0xFF; | ||
86 | } | ||
87 | |||
88 | /* Disable all irqs. This is purposely a macro, because NUM_MACH_IRQS | ||
89 | will be only be defined later. */ | ||
90 | #define v850e_intc_disable_irqs() _v850e_intc_disable_irqs (NUM_MACH_IRQS) | ||
91 | |||
92 | /* Clear any pending interrupts for IRQ. */ | ||
93 | static inline void v850e_intc_clear_pending_irq (unsigned irq) | ||
94 | { | ||
95 | __asm__ __volatile__ ("clr1 %0, 0[%1]" | ||
96 | :: "i" (V850E_INTC_IC_IF_BIT), | ||
97 | "r" (V850E_INTC_IC_ADDR (irq)) | ||
98 | : "memory"); | ||
99 | } | ||
100 | |||
101 | /* Return true if interrupt IRQ is pending (but disabled). */ | ||
102 | static inline int v850e_intc_irq_pending (unsigned irq) | ||
103 | { | ||
104 | int rval; | ||
105 | __asm__ __volatile__ ("tst1 %1, 0[%2]; setf nz, %0" | ||
106 | : "=r" (rval) | ||
107 | : "i" (V850E_INTC_IC_IF_BIT), | ||
108 | "r" (V850E_INTC_IC_ADDR (irq))); | ||
109 | return rval; | ||
110 | } | ||
111 | |||
112 | |||
113 | struct v850e_intc_irq_init { | ||
114 | const char *name; /* name of interrupt type */ | ||
115 | |||
116 | /* Range of kernel irq numbers for this type: | ||
117 | BASE, BASE+INTERVAL, ..., BASE+INTERVAL*NUM */ | ||
118 | unsigned base, num, interval; | ||
119 | |||
120 | unsigned priority; /* interrupt priority to assign */ | ||
121 | }; | ||
122 | struct hw_interrupt_type; /* fwd decl */ | ||
123 | |||
124 | /* Initialize HW_IRQ_TYPES for INTC-controlled irqs described in array | ||
125 | INITS (which is terminated by an entry with the name field == 0). */ | ||
126 | extern void v850e_intc_init_irq_types (struct v850e_intc_irq_init *inits, | ||
127 | struct hw_interrupt_type *hw_irq_types); | ||
128 | |||
129 | |||
130 | #endif /* !__ASSEMBLY__ */ | ||
131 | |||
132 | |||
133 | #endif /* __V850_V850E_INTC_H__ */ | ||
diff --git a/include/asm-v850/v850e_timer_c.h b/include/asm-v850/v850e_timer_c.h deleted file mode 100644 index f70575df6ea9..000000000000 --- a/include/asm-v850/v850e_timer_c.h +++ /dev/null | |||
@@ -1,48 +0,0 @@ | |||
1 | /* | ||
2 | * include/asm-v850/v850e_timer_c.h -- `Timer C' component often used | ||
3 | * with the V850E cpu core | ||
4 | * | ||
5 | * Copyright (C) 2001,03 NEC Electronics Corporation | ||
6 | * Copyright (C) 2001,03 Miles Bader <miles@gnu.org> | ||
7 | * | ||
8 | * This file is subject to the terms and conditions of the GNU General | ||
9 | * Public License. See the file COPYING in the main directory of this | ||
10 | * archive for more details. | ||
11 | * | ||
12 | * Written by Miles Bader <miles@gnu.org> | ||
13 | */ | ||
14 | |||
15 | /* NOTE: this include file currently contains only enough to allow us to | ||
16 | use timer C as an interrupt pass-through. */ | ||
17 | |||
18 | #ifndef __V850_V850E_TIMER_C_H__ | ||
19 | #define __V850_V850E_TIMER_C_H__ | ||
20 | |||
21 | #include <asm/types.h> | ||
22 | #include <asm/machdep.h> /* Pick up chip-specific defs. */ | ||
23 | |||
24 | |||
25 | /* Timer C (16-bit interval timers). */ | ||
26 | |||
27 | /* Control register 0 for timer C. */ | ||
28 | #define V850E_TIMER_C_TMCC0_ADDR(n) (V850E_TIMER_C_BASE_ADDR + 0x6 + 0x10 *(n)) | ||
29 | #define V850E_TIMER_C_TMCC0(n) (*(volatile u8 *)V850E_TIMER_C_TMCC0_ADDR(n)) | ||
30 | #define V850E_TIMER_C_TMCC0_CAE 0x01 /* clock action enable */ | ||
31 | #define V850E_TIMER_C_TMCC0_CE 0x02 /* count enable */ | ||
32 | /* ... */ | ||
33 | |||
34 | /* Control register 1 for timer C. */ | ||
35 | #define V850E_TIMER_C_TMCC1_ADDR(n) (V850E_TIMER_C_BASE_ADDR + 0x8 + 0x10 *(n)) | ||
36 | #define V850E_TIMER_C_TMCC1(n) (*(volatile u8 *)V850E_TIMER_C_TMCC1_ADDR(n)) | ||
37 | #define V850E_TIMER_C_TMCC1_CMS0 0x01 /* capture/compare mode select (ccc0) */ | ||
38 | #define V850E_TIMER_C_TMCC1_CMS1 0x02 /* capture/compare mode select (ccc1) */ | ||
39 | /* ... */ | ||
40 | |||
41 | /* Interrupt edge-sensitivity control for timer C. */ | ||
42 | #define V850E_TIMER_C_SESC_ADDR(n) (V850E_TIMER_C_BASE_ADDR + 0x9 + 0x10 *(n)) | ||
43 | #define V850E_TIMER_C_SESC(n) (*(volatile u8 *)V850E_TIMER_C_SESC_ADDR(n)) | ||
44 | |||
45 | /* ...etc... */ | ||
46 | |||
47 | |||
48 | #endif /* __V850_V850E_TIMER_C_H__ */ | ||
diff --git a/include/asm-v850/v850e_timer_d.h b/include/asm-v850/v850e_timer_d.h deleted file mode 100644 index 417612c5b22f..000000000000 --- a/include/asm-v850/v850e_timer_d.h +++ /dev/null | |||
@@ -1,62 +0,0 @@ | |||
1 | /* | ||
2 | * include/asm-v850/v850e_timer_d.h -- `Timer D' component often used | ||
3 | * with the V850E cpu core | ||
4 | * | ||
5 | * Copyright (C) 2001,02,03 NEC Electronics Corporation | ||
6 | * Copyright (C) 2001,02,03 Miles Bader <miles@gnu.org> | ||
7 | * | ||
8 | * This file is subject to the terms and conditions of the GNU General | ||
9 | * Public License. See the file COPYING in the main directory of this | ||
10 | * archive for more details. | ||
11 | * | ||
12 | * Written by Miles Bader <miles@gnu.org> | ||
13 | */ | ||
14 | |||
15 | #ifndef __V850_V850E_TIMER_D_H__ | ||
16 | #define __V850_V850E_TIMER_D_H__ | ||
17 | |||
18 | #include <asm/types.h> | ||
19 | #include <asm/machdep.h> /* Pick up chip-specific defs. */ | ||
20 | |||
21 | |||
22 | /* Timer D (16-bit interval timers). */ | ||
23 | |||
24 | /* Count registers for timer D. */ | ||
25 | #define V850E_TIMER_D_TMD_ADDR(n) (V850E_TIMER_D_TMD_BASE_ADDR + 0x10 * (n)) | ||
26 | #define V850E_TIMER_D_TMD(n) (*(volatile u16 *)V850E_TIMER_D_TMD_ADDR(n)) | ||
27 | |||
28 | /* Count compare registers for timer D. */ | ||
29 | #define V850E_TIMER_D_CMD_ADDR(n) (V850E_TIMER_D_CMD_BASE_ADDR + 0x10 * (n)) | ||
30 | #define V850E_TIMER_D_CMD(n) (*(volatile u16 *)V850E_TIMER_D_CMD_ADDR(n)) | ||
31 | |||
32 | /* Control registers for timer D. */ | ||
33 | #define V850E_TIMER_D_TMCD_ADDR(n) (V850E_TIMER_D_TMCD_BASE_ADDR + 0x10 * (n)) | ||
34 | #define V850E_TIMER_D_TMCD(n) (*(volatile u8 *)V850E_TIMER_D_TMCD_ADDR(n)) | ||
35 | /* Control bits for timer D. */ | ||
36 | #define V850E_TIMER_D_TMCD_CE 0x2 /* count enable */ | ||
37 | #define V850E_TIMER_D_TMCD_CAE 0x1 /* clock action enable */ | ||
38 | /* Clock divider setting (log2). */ | ||
39 | #define V850E_TIMER_D_TMCD_CS(divlog2) (((divlog2) - V850E_TIMER_D_TMCD_CS_MIN) << 4) | ||
40 | /* Minimum clock divider setting (log2). */ | ||
41 | #ifndef V850E_TIMER_D_TMCD_CS_MIN /* Can be overridden by mach-specific hdrs */ | ||
42 | #define V850E_TIMER_D_TMCD_CS_MIN 2 /* Default is correct for the v850e/ma1 */ | ||
43 | #endif | ||
44 | /* Maximum clock divider setting (log2). */ | ||
45 | #define V850E_TIMER_D_TMCD_CS_MAX (V850E_TIMER_D_TMCD_CS_MIN + 7) | ||
46 | |||
47 | /* Return the clock-divider (log2) of timer D unit N. */ | ||
48 | #define V850E_TIMER_D_DIVLOG2(n) \ | ||
49 | (((V850E_TIMER_D_TMCD(n) >> 4) & 0x7) + V850E_TIMER_D_TMCD_CS_MIN) | ||
50 | |||
51 | |||
52 | #ifndef __ASSEMBLY__ | ||
53 | |||
54 | /* Start interval timer TIMER (0-3). The timer will issue the | ||
55 | corresponding INTCMD interrupt RATE times per second. This function | ||
56 | does not enable the interrupt. */ | ||
57 | extern void v850e_timer_d_configure (unsigned timer, unsigned rate); | ||
58 | |||
59 | #endif /* !__ASSEMBLY__ */ | ||
60 | |||
61 | |||
62 | #endif /* __V850_V850E_TIMER_D_H__ */ | ||
diff --git a/include/asm-v850/v850e_uart.h b/include/asm-v850/v850e_uart.h deleted file mode 100644 index 5182fb4cc989..000000000000 --- a/include/asm-v850/v850e_uart.h +++ /dev/null | |||
@@ -1,76 +0,0 @@ | |||
1 | /* | ||
2 | * include/asm-v850/v850e_uart.h -- common V850E on-chip UART driver | ||
3 | * | ||
4 | * Copyright (C) 2001,02,03 NEC Electronics Corporation | ||
5 | * Copyright (C) 2001,02,03 Miles Bader <miles@gnu.org> | ||
6 | * | ||
7 | * This file is subject to the terms and conditions of the GNU General | ||
8 | * Public License. See the file COPYING in the main directory of this | ||
9 | * archive for more details. | ||
10 | * | ||
11 | * Written by Miles Bader <miles@gnu.org> | ||
12 | */ | ||
13 | |||
14 | /* There's not actually a single UART implementation used by V850E CPUs, | ||
15 | but rather a series of implementations that are all `close' to one | ||
16 | another. This file corresponds to the single driver which handles all | ||
17 | of them. */ | ||
18 | |||
19 | #ifndef __V850_V850E_UART_H__ | ||
20 | #define __V850_V850E_UART_H__ | ||
21 | |||
22 | #include <linux/termios.h> | ||
23 | |||
24 | #include <asm/v850e_utils.h> | ||
25 | #include <asm/types.h> | ||
26 | #include <asm/machdep.h> /* Pick up chip-specific defs. */ | ||
27 | |||
28 | |||
29 | /* Include model-specific definitions. */ | ||
30 | #ifdef CONFIG_V850E_UART | ||
31 | # ifdef CONFIG_V850E_UARTB | ||
32 | # include <asm-v850/v850e_uartb.h> | ||
33 | # else | ||
34 | # include <asm-v850/v850e_uarta.h> /* original V850E UART */ | ||
35 | # endif | ||
36 | #endif | ||
37 | |||
38 | |||
39 | /* Optional capabilities some hardware provides. */ | ||
40 | |||
41 | /* This UART doesn't implement RTS/CTS by default, but some platforms | ||
42 | implement them externally, so check to see if <asm/machdep.h> defined | ||
43 | anything. */ | ||
44 | #ifdef V850E_UART_CTS | ||
45 | #define v850e_uart_cts(n) V850E_UART_CTS(n) | ||
46 | #else | ||
47 | #define v850e_uart_cts(n) (1) | ||
48 | #endif | ||
49 | |||
50 | /* Do the same for RTS. */ | ||
51 | #ifdef V850E_UART_SET_RTS | ||
52 | #define v850e_uart_set_rts(n,v) V850E_UART_SET_RTS(n,v) | ||
53 | #else | ||
54 | #define v850e_uart_set_rts(n,v) ((void)0) | ||
55 | #endif | ||
56 | |||
57 | |||
58 | /* This is the serial channel to use for the boot console (if desired). */ | ||
59 | #ifndef V850E_UART_CONSOLE_CHANNEL | ||
60 | # define V850E_UART_CONSOLE_CHANNEL 0 | ||
61 | #endif | ||
62 | |||
63 | |||
64 | #ifndef __ASSEMBLY__ | ||
65 | |||
66 | /* Setup a console using channel 0 of the builtin uart. */ | ||
67 | extern void v850e_uart_cons_init (unsigned chan); | ||
68 | |||
69 | /* Configure and turn on uart channel CHAN, using the termios `control | ||
70 | modes' bits in CFLAGS, and a baud-rate of BAUD. */ | ||
71 | void v850e_uart_configure (unsigned chan, unsigned cflags, unsigned baud); | ||
72 | |||
73 | #endif /* !__ASSEMBLY__ */ | ||
74 | |||
75 | |||
76 | #endif /* __V850_V850E_UART_H__ */ | ||
diff --git a/include/asm-v850/v850e_uarta.h b/include/asm-v850/v850e_uarta.h deleted file mode 100644 index e483e0950725..000000000000 --- a/include/asm-v850/v850e_uarta.h +++ /dev/null | |||
@@ -1,278 +0,0 @@ | |||
1 | /* | ||
2 | * include/asm-v850/v850e_uarta.h -- original V850E on-chip UART | ||
3 | * | ||
4 | * Copyright (C) 2001,02,03 NEC Electronics Corporation | ||
5 | * Copyright (C) 2001,02,03 Miles Bader <miles@gnu.org> | ||
6 | * | ||
7 | * This file is subject to the terms and conditions of the GNU General | ||
8 | * Public License. See the file COPYING in the main directory of this | ||
9 | * archive for more details. | ||
10 | * | ||
11 | * Written by Miles Bader <miles@gnu.org> | ||
12 | */ | ||
13 | |||
14 | /* This is the original V850E UART implementation is called just `UART' in | ||
15 | the docs, but we name this header file <asm/v850e_uarta.h> because the | ||
16 | name <asm/v850e_uart.h> is used for the common driver that handles both | ||
17 | `UART' and `UARTB' implementations. */ | ||
18 | |||
19 | #ifndef __V850_V850E_UARTA_H__ | ||
20 | #define __V850_V850E_UARTA_H__ | ||
21 | |||
22 | |||
23 | /* Raw hardware interface. */ | ||
24 | |||
25 | /* The base address of the UART control registers for channel N. | ||
26 | The default is the address used on the V850E/MA1. */ | ||
27 | #ifndef V850E_UART_BASE_ADDR | ||
28 | #define V850E_UART_BASE_ADDR(n) (0xFFFFFA00 + 0x10 * (n)) | ||
29 | #endif | ||
30 | |||
31 | /* Addresses of specific UART control registers for channel N. | ||
32 | The defaults are the addresses used on the V850E/MA1; if a platform | ||
33 | wants to redefine any of these, it must redefine them all. */ | ||
34 | #ifndef V850E_UART_ASIM_ADDR | ||
35 | #define V850E_UART_ASIM_ADDR(n) (V850E_UART_BASE_ADDR(n) + 0x0) | ||
36 | #define V850E_UART_RXB_ADDR(n) (V850E_UART_BASE_ADDR(n) + 0x2) | ||
37 | #define V850E_UART_ASIS_ADDR(n) (V850E_UART_BASE_ADDR(n) + 0x3) | ||
38 | #define V850E_UART_TXB_ADDR(n) (V850E_UART_BASE_ADDR(n) + 0x4) | ||
39 | #define V850E_UART_ASIF_ADDR(n) (V850E_UART_BASE_ADDR(n) + 0x5) | ||
40 | #define V850E_UART_CKSR_ADDR(n) (V850E_UART_BASE_ADDR(n) + 0x6) | ||
41 | #define V850E_UART_BRGC_ADDR(n) (V850E_UART_BASE_ADDR(n) + 0x7) | ||
42 | #endif | ||
43 | |||
44 | /* UART config registers. */ | ||
45 | #define V850E_UART_ASIM(n) (*(volatile u8 *)V850E_UART_ASIM_ADDR(n)) | ||
46 | /* Control bits for config registers. */ | ||
47 | #define V850E_UART_ASIM_CAE 0x80 /* clock enable */ | ||
48 | #define V850E_UART_ASIM_TXE 0x40 /* transmit enable */ | ||
49 | #define V850E_UART_ASIM_RXE 0x20 /* receive enable */ | ||
50 | #define V850E_UART_ASIM_PS_MASK 0x18 /* mask covering parity-select bits */ | ||
51 | #define V850E_UART_ASIM_PS_NONE 0x00 /* no parity */ | ||
52 | #define V850E_UART_ASIM_PS_ZERO 0x08 /* zero parity */ | ||
53 | #define V850E_UART_ASIM_PS_ODD 0x10 /* odd parity */ | ||
54 | #define V850E_UART_ASIM_PS_EVEN 0x18 /* even parity */ | ||
55 | #define V850E_UART_ASIM_CL_8 0x04 /* char len is 8 bits (otherwise, 7) */ | ||
56 | #define V850E_UART_ASIM_SL_2 0x02 /* 2 stop bits (otherwise, 1) */ | ||
57 | #define V850E_UART_ASIM_ISRM 0x01 /* generate INTSR interrupt on errors | ||
58 | (otherwise, generate INTSER) */ | ||
59 | |||
60 | /* UART serial interface status registers. */ | ||
61 | #define V850E_UART_ASIS(n) (*(volatile u8 *)V850E_UART_ASIS_ADDR(n)) | ||
62 | /* Control bits for status registers. */ | ||
63 | #define V850E_UART_ASIS_PE 0x04 /* parity error */ | ||
64 | #define V850E_UART_ASIS_FE 0x02 /* framing error */ | ||
65 | #define V850E_UART_ASIS_OVE 0x01 /* overrun error */ | ||
66 | |||
67 | /* UART serial interface transmission status registers. */ | ||
68 | #define V850E_UART_ASIF(n) (*(volatile u8 *)V850E_UART_ASIF_ADDR(n)) | ||
69 | #define V850E_UART_ASIF_TXBF 0x02 /* transmit buffer flag (data in TXB) */ | ||
70 | #define V850E_UART_ASIF_TXSF 0x01 /* transmit shift flag (sending data) */ | ||
71 | |||
72 | /* UART receive buffer register. */ | ||
73 | #define V850E_UART_RXB(n) (*(volatile u8 *)V850E_UART_RXB_ADDR(n)) | ||
74 | |||
75 | /* UART transmit buffer register. */ | ||
76 | #define V850E_UART_TXB(n) (*(volatile u8 *)V850E_UART_TXB_ADDR(n)) | ||
77 | |||
78 | /* UART baud-rate generator control registers. */ | ||
79 | #define V850E_UART_CKSR(n) (*(volatile u8 *)V850E_UART_CKSR_ADDR(n)) | ||
80 | #define V850E_UART_CKSR_MAX 11 | ||
81 | #define V850E_UART_BRGC(n) (*(volatile u8 *)V850E_UART_BRGC_ADDR(n)) | ||
82 | #define V850E_UART_BRGC_MIN 8 | ||
83 | |||
84 | |||
85 | #ifndef V850E_UART_CKSR_MAX_FREQ | ||
86 | #define V850E_UART_CKSR_MAX_FREQ (25*1000*1000) | ||
87 | #endif | ||
88 | |||
89 | /* Calculate the minimum value for CKSR on this processor. */ | ||
90 | static inline unsigned v850e_uart_cksr_min (void) | ||
91 | { | ||
92 | int min = 0; | ||
93 | unsigned freq = V850E_UART_BASE_FREQ; | ||
94 | while (freq > V850E_UART_CKSR_MAX_FREQ) { | ||
95 | freq >>= 1; | ||
96 | min++; | ||
97 | } | ||
98 | return min; | ||
99 | } | ||
100 | |||
101 | |||
102 | /* Slightly abstract interface used by driver. */ | ||
103 | |||
104 | |||
105 | /* Interrupts used by the UART. */ | ||
106 | |||
107 | /* Received when the most recently transmitted character has been sent. */ | ||
108 | #define V850E_UART_TX_IRQ(chan) IRQ_INTST (chan) | ||
109 | /* Received when a new character has been received. */ | ||
110 | #define V850E_UART_RX_IRQ(chan) IRQ_INTSR (chan) | ||
111 | |||
112 | |||
113 | /* UART clock generator interface. */ | ||
114 | |||
115 | /* This type encapsulates a particular uart frequency. */ | ||
116 | typedef struct { | ||
117 | unsigned clk_divlog2; | ||
118 | unsigned brgen_count; | ||
119 | } v850e_uart_speed_t; | ||
120 | |||
121 | /* Calculate a uart speed from BAUD for this uart. */ | ||
122 | static inline v850e_uart_speed_t v850e_uart_calc_speed (unsigned baud) | ||
123 | { | ||
124 | v850e_uart_speed_t speed; | ||
125 | |||
126 | /* Calculate the log2 clock divider and baud-rate counter values | ||
127 | (note that the UART divides the resulting clock by 2, so | ||
128 | multiply BAUD by 2 here to compensate). */ | ||
129 | calc_counter_params (V850E_UART_BASE_FREQ, baud * 2, | ||
130 | v850e_uart_cksr_min(), | ||
131 | V850E_UART_CKSR_MAX, 8/*bits*/, | ||
132 | &speed.clk_divlog2, &speed.brgen_count); | ||
133 | |||
134 | return speed; | ||
135 | } | ||
136 | |||
137 | /* Return the current speed of uart channel CHAN. */ | ||
138 | static inline v850e_uart_speed_t v850e_uart_speed (unsigned chan) | ||
139 | { | ||
140 | v850e_uart_speed_t speed; | ||
141 | speed.clk_divlog2 = V850E_UART_CKSR (chan); | ||
142 | speed.brgen_count = V850E_UART_BRGC (chan); | ||
143 | return speed; | ||
144 | } | ||
145 | |||
146 | /* Set the current speed of uart channel CHAN. */ | ||
147 | static inline void v850e_uart_set_speed(unsigned chan,v850e_uart_speed_t speed) | ||
148 | { | ||
149 | V850E_UART_CKSR (chan) = speed.clk_divlog2; | ||
150 | V850E_UART_BRGC (chan) = speed.brgen_count; | ||
151 | } | ||
152 | |||
153 | static inline int | ||
154 | v850e_uart_speed_eq (v850e_uart_speed_t speed1, v850e_uart_speed_t speed2) | ||
155 | { | ||
156 | return speed1.clk_divlog2 == speed2.clk_divlog2 | ||
157 | && speed1.brgen_count == speed2.brgen_count; | ||
158 | } | ||
159 | |||
160 | /* Minimum baud rate possible. */ | ||
161 | #define v850e_uart_min_baud() \ | ||
162 | ((V850E_UART_BASE_FREQ >> V850E_UART_CKSR_MAX) / (2 * 255) + 1) | ||
163 | |||
164 | /* Maximum baud rate possible. The error is quite high at max, though. */ | ||
165 | #define v850e_uart_max_baud() \ | ||
166 | ((V850E_UART_BASE_FREQ >> v850e_uart_cksr_min()) / (2 *V850E_UART_BRGC_MIN)) | ||
167 | |||
168 | /* The `maximum' clock rate the uart can used, which is wanted (though not | ||
169 | really used in any useful way) by the serial framework. */ | ||
170 | #define v850e_uart_max_clock() \ | ||
171 | ((V850E_UART_BASE_FREQ >> v850e_uart_cksr_min()) / 2) | ||
172 | |||
173 | |||
174 | /* UART configuration interface. */ | ||
175 | |||
176 | /* Type of the uart config register; must be a scalar. */ | ||
177 | typedef u16 v850e_uart_config_t; | ||
178 | |||
179 | /* The uart hardware config register for channel CHAN. */ | ||
180 | #define V850E_UART_CONFIG(chan) V850E_UART_ASIM (chan) | ||
181 | |||
182 | /* This config bit set if the uart is enabled. */ | ||
183 | #define V850E_UART_CONFIG_ENABLED V850E_UART_ASIM_CAE | ||
184 | /* If the uart _isn't_ enabled, store this value to it to do so. */ | ||
185 | #define V850E_UART_CONFIG_INIT V850E_UART_ASIM_CAE | ||
186 | /* Store this config value to disable the uart channel completely. */ | ||
187 | #define V850E_UART_CONFIG_FINI 0 | ||
188 | |||
189 | /* Setting/clearing these bits enable/disable TX/RX, respectively (but | ||
190 | otherwise generally leave things running). */ | ||
191 | #define V850E_UART_CONFIG_RX_ENABLE V850E_UART_ASIM_RXE | ||
192 | #define V850E_UART_CONFIG_TX_ENABLE V850E_UART_ASIM_TXE | ||
193 | |||
194 | /* These masks define which config bits affect TX/RX modes, respectively. */ | ||
195 | #define V850E_UART_CONFIG_RX_BITS \ | ||
196 | (V850E_UART_ASIM_PS_MASK | V850E_UART_ASIM_CL_8 | V850E_UART_ASIM_ISRM) | ||
197 | #define V850E_UART_CONFIG_TX_BITS \ | ||
198 | (V850E_UART_ASIM_PS_MASK | V850E_UART_ASIM_CL_8 | V850E_UART_ASIM_SL_2) | ||
199 | |||
200 | static inline v850e_uart_config_t v850e_uart_calc_config (unsigned cflags) | ||
201 | { | ||
202 | v850e_uart_config_t config = 0; | ||
203 | |||
204 | /* Figure out new configuration of control register. */ | ||
205 | if (cflags & CSTOPB) | ||
206 | /* Number of stop bits, 1 or 2. */ | ||
207 | config |= V850E_UART_ASIM_SL_2; | ||
208 | if ((cflags & CSIZE) == CS8) | ||
209 | /* Number of data bits, 7 or 8. */ | ||
210 | config |= V850E_UART_ASIM_CL_8; | ||
211 | if (! (cflags & PARENB)) | ||
212 | /* No parity check/generation. */ | ||
213 | config |= V850E_UART_ASIM_PS_NONE; | ||
214 | else if (cflags & PARODD) | ||
215 | /* Odd parity check/generation. */ | ||
216 | config |= V850E_UART_ASIM_PS_ODD; | ||
217 | else | ||
218 | /* Even parity check/generation. */ | ||
219 | config |= V850E_UART_ASIM_PS_EVEN; | ||
220 | if (cflags & CREAD) | ||
221 | /* Reading enabled. */ | ||
222 | config |= V850E_UART_ASIM_RXE; | ||
223 | |||
224 | config |= V850E_UART_ASIM_CAE; | ||
225 | config |= V850E_UART_ASIM_TXE; /* Writing is always enabled. */ | ||
226 | config |= V850E_UART_ASIM_ISRM; /* Errors generate a read-irq. */ | ||
227 | |||
228 | return config; | ||
229 | } | ||
230 | |||
231 | /* This should delay as long as necessary for a recently written config | ||
232 | setting to settle, before we turn the uart back on. */ | ||
233 | static inline void | ||
234 | v850e_uart_config_delay (v850e_uart_config_t config, v850e_uart_speed_t speed) | ||
235 | { | ||
236 | /* The UART may not be reset properly unless we wait at least 2 | ||
237 | `basic-clocks' until turning on the TXE/RXE bits again. | ||
238 | A `basic clock' is the clock used by the baud-rate generator, | ||
239 | i.e., the cpu clock divided by the 2^new_clk_divlog2. | ||
240 | The loop takes 2 insns, so loop CYCLES / 2 times. */ | ||
241 | register unsigned count = 1 << speed.clk_divlog2; | ||
242 | while (--count != 0) | ||
243 | /* nothing */; | ||
244 | } | ||
245 | |||
246 | |||
247 | /* RX/TX interface. */ | ||
248 | |||
249 | /* Return true if all characters awaiting transmission on uart channel N | ||
250 | have been transmitted. */ | ||
251 | #define v850e_uart_xmit_done(n) \ | ||
252 | (! (V850E_UART_ASIF(n) & V850E_UART_ASIF_TXBF)) | ||
253 | /* Wait for this to be true. */ | ||
254 | #define v850e_uart_wait_for_xmit_done(n) \ | ||
255 | do { } while (! v850e_uart_xmit_done (n)) | ||
256 | |||
257 | /* Return true if uart channel N is ready to transmit a character. */ | ||
258 | #define v850e_uart_xmit_ok(n) \ | ||
259 | (v850e_uart_xmit_done(n) && v850e_uart_cts(n)) | ||
260 | /* Wait for this to be true. */ | ||
261 | #define v850e_uart_wait_for_xmit_ok(n) \ | ||
262 | do { } while (! v850e_uart_xmit_ok (n)) | ||
263 | |||
264 | /* Write character CH to uart channel CHAN. */ | ||
265 | #define v850e_uart_putc(chan, ch) (V850E_UART_TXB(chan) = (ch)) | ||
266 | |||
267 | /* Return latest character read on channel CHAN. */ | ||
268 | #define v850e_uart_getc(chan) V850E_UART_RXB (chan) | ||
269 | |||
270 | /* Return bit-mask of uart error status. */ | ||
271 | #define v850e_uart_err(chan) V850E_UART_ASIS (chan) | ||
272 | /* Various error bits set in the error result. */ | ||
273 | #define V850E_UART_ERR_OVERRUN V850E_UART_ASIS_OVE | ||
274 | #define V850E_UART_ERR_FRAME V850E_UART_ASIS_FE | ||
275 | #define V850E_UART_ERR_PARITY V850E_UART_ASIS_PE | ||
276 | |||
277 | |||
278 | #endif /* __V850_V850E_UARTA_H__ */ | ||
diff --git a/include/asm-v850/v850e_uartb.h b/include/asm-v850/v850e_uartb.h deleted file mode 100644 index 6d4767d5a835..000000000000 --- a/include/asm-v850/v850e_uartb.h +++ /dev/null | |||
@@ -1,262 +0,0 @@ | |||
1 | /* | ||
2 | * include/asm-v850/v850e_uartb.h -- V850E on-chip `UARTB' UART | ||
3 | * | ||
4 | * Copyright (C) 2001,02,03 NEC Electronics Corporation | ||
5 | * Copyright (C) 2001,02,03 Miles Bader <miles@gnu.org> | ||
6 | * | ||
7 | * This file is subject to the terms and conditions of the GNU General | ||
8 | * Public License. See the file COPYING in the main directory of this | ||
9 | * archive for more details. | ||
10 | * | ||
11 | * Written by Miles Bader <miles@gnu.org> | ||
12 | */ | ||
13 | |||
14 | /* The V850E UARTB is basically a superset of the original V850E UART, but | ||
15 | even where it's the same, the names and details have changed a bit. | ||
16 | It's similar enough to use the same driver (v850e_uart.c), but the | ||
17 | details have been abstracted slightly to do so. */ | ||
18 | |||
19 | #ifndef __V850_V850E_UARTB_H__ | ||
20 | #define __V850_V850E_UARTB_H__ | ||
21 | |||
22 | |||
23 | /* Raw hardware interface. */ | ||
24 | |||
25 | #define V850E_UARTB_BASE_ADDR(n) (0xFFFFFA00 + 0x10 * (n)) | ||
26 | |||
27 | /* Addresses of specific UART control registers for channel N. */ | ||
28 | #define V850E_UARTB_CTL0_ADDR(n) (V850E_UARTB_BASE_ADDR(n) + 0x0) | ||
29 | #define V850E_UARTB_CTL2_ADDR(n) (V850E_UARTB_BASE_ADDR(n) + 0x2) | ||
30 | #define V850E_UARTB_STR_ADDR(n) (V850E_UARTB_BASE_ADDR(n) + 0x4) | ||
31 | #define V850E_UARTB_RX_ADDR(n) (V850E_UARTB_BASE_ADDR(n) + 0x6) | ||
32 | #define V850E_UARTB_RXAP_ADDR(n) (V850E_UARTB_BASE_ADDR(n) + 0x6) | ||
33 | #define V850E_UARTB_TX_ADDR(n) (V850E_UARTB_BASE_ADDR(n) + 0x8) | ||
34 | #define V850E_UARTB_FIC0_ADDR(n) (V850E_UARTB_BASE_ADDR(n) + 0xA) | ||
35 | #define V850E_UARTB_FIC1_ADDR(n) (V850E_UARTB_BASE_ADDR(n) + 0xB) | ||
36 | #define V850E_UARTB_FIC2_ADDR(n) (V850E_UARTB_BASE_ADDR(n) + 0xC) | ||
37 | #define V850E_UARTB_FIS0_ADDR(n) (V850E_UARTB_BASE_ADDR(n) + 0xE) | ||
38 | #define V850E_UARTB_FIS1_ADDR(n) (V850E_UARTB_BASE_ADDR(n) + 0xF) | ||
39 | |||
40 | /* UARTB control register 0 (general config). */ | ||
41 | #define V850E_UARTB_CTL0(n) (*(volatile u8 *)V850E_UARTB_CTL0_ADDR(n)) | ||
42 | /* Control bits for config registers. */ | ||
43 | #define V850E_UARTB_CTL0_PWR 0x80 /* clock enable */ | ||
44 | #define V850E_UARTB_CTL0_TXE 0x40 /* transmit enable */ | ||
45 | #define V850E_UARTB_CTL0_RXE 0x20 /* receive enable */ | ||
46 | #define V850E_UARTB_CTL0_DIR 0x10 /* */ | ||
47 | #define V850E_UARTB_CTL0_PS1 0x08 /* parity */ | ||
48 | #define V850E_UARTB_CTL0_PS0 0x04 /* parity */ | ||
49 | #define V850E_UARTB_CTL0_CL 0x02 /* char len 1:8bit, 0:7bit */ | ||
50 | #define V850E_UARTB_CTL0_SL 0x01 /* stop bit 1:2bit, 0:1bit */ | ||
51 | #define V850E_UARTB_CTL0_PS_MASK 0x0C /* mask covering parity bits */ | ||
52 | #define V850E_UARTB_CTL0_PS_NONE 0x00 /* no parity */ | ||
53 | #define V850E_UARTB_CTL0_PS_ZERO 0x04 /* zero parity */ | ||
54 | #define V850E_UARTB_CTL0_PS_ODD 0x08 /* odd parity */ | ||
55 | #define V850E_UARTB_CTL0_PS_EVEN 0x0C /* even parity */ | ||
56 | #define V850E_UARTB_CTL0_CL_8 0x02 /* char len 1:8bit, 0:7bit */ | ||
57 | #define V850E_UARTB_CTL0_SL_2 0x01 /* stop bit 1:2bit, 0:1bit */ | ||
58 | |||
59 | /* UARTB control register 2 (clock divider). */ | ||
60 | #define V850E_UARTB_CTL2(n) (*(volatile u16 *)V850E_UARTB_CTL2_ADDR(n)) | ||
61 | #define V850E_UARTB_CTL2_MIN 4 | ||
62 | #define V850E_UARTB_CTL2_MAX 0xFFFF | ||
63 | |||
64 | /* UARTB serial interface status register. */ | ||
65 | #define V850E_UARTB_STR(n) (*(volatile u8 *)V850E_UARTB_STR_ADDR(n)) | ||
66 | /* Control bits for status registers. */ | ||
67 | #define V850E_UARTB_STR_TSF 0x80 /* UBTX or FIFO exist data */ | ||
68 | #define V850E_UARTB_STR_OVF 0x08 /* overflow error */ | ||
69 | #define V850E_UARTB_STR_PE 0x04 /* parity error */ | ||
70 | #define V850E_UARTB_STR_FE 0x02 /* framing error */ | ||
71 | #define V850E_UARTB_STR_OVE 0x01 /* overrun error */ | ||
72 | |||
73 | /* UARTB receive data register. */ | ||
74 | #define V850E_UARTB_RX(n) (*(volatile u8 *)V850E_UARTB_RX_ADDR(n)) | ||
75 | #define V850E_UARTB_RXAP(n) (*(volatile u16 *)V850E_UARTB_RXAP_ADDR(n)) | ||
76 | /* Control bits for status registers. */ | ||
77 | #define V850E_UARTB_RXAP_PEF 0x0200 /* parity error */ | ||
78 | #define V850E_UARTB_RXAP_FEF 0x0100 /* framing error */ | ||
79 | |||
80 | /* UARTB transmit data register. */ | ||
81 | #define V850E_UARTB_TX(n) (*(volatile u8 *)V850E_UARTB_TX_ADDR(n)) | ||
82 | |||
83 | /* UARTB FIFO control register 0. */ | ||
84 | #define V850E_UARTB_FIC0(n) (*(volatile u8 *)V850E_UARTB_FIC0_ADDR(n)) | ||
85 | |||
86 | /* UARTB FIFO control register 1. */ | ||
87 | #define V850E_UARTB_FIC1(n) (*(volatile u8 *)V850E_UARTB_FIC1_ADDR(n)) | ||
88 | |||
89 | /* UARTB FIFO control register 2. */ | ||
90 | #define V850E_UARTB_FIC2(n) (*(volatile u16 *)V850E_UARTB_FIC2_ADDR(n)) | ||
91 | |||
92 | /* UARTB FIFO status register 0. */ | ||
93 | #define V850E_UARTB_FIS0(n) (*(volatile u8 *)V850E_UARTB_FIS0_ADDR(n)) | ||
94 | |||
95 | /* UARTB FIFO status register 1. */ | ||
96 | #define V850E_UARTB_FIS1(n) (*(volatile u8 *)V850E_UARTB_FIS1_ADDR(n)) | ||
97 | |||
98 | |||
99 | /* Slightly abstract interface used by driver. */ | ||
100 | |||
101 | |||
102 | /* Interrupts used by the UART. */ | ||
103 | |||
104 | /* Received when the most recently transmitted character has been sent. */ | ||
105 | #define V850E_UART_TX_IRQ(chan) IRQ_INTUBTIT (chan) | ||
106 | /* Received when a new character has been received. */ | ||
107 | #define V850E_UART_RX_IRQ(chan) IRQ_INTUBTIR (chan) | ||
108 | |||
109 | /* Use by serial driver for information purposes. */ | ||
110 | #define V850E_UART_BASE_ADDR(chan) V850E_UARTB_BASE_ADDR(chan) | ||
111 | |||
112 | |||
113 | /* UART clock generator interface. */ | ||
114 | |||
115 | /* This type encapsulates a particular uart frequency. */ | ||
116 | typedef u16 v850e_uart_speed_t; | ||
117 | |||
118 | /* Calculate a uart speed from BAUD for this uart. */ | ||
119 | static inline v850e_uart_speed_t v850e_uart_calc_speed (unsigned baud) | ||
120 | { | ||
121 | v850e_uart_speed_t speed; | ||
122 | |||
123 | /* | ||
124 | * V850E/ME2 UARTB baud rate is determined by the value of UBCTL2 | ||
125 | * fx = V850E_UARTB_BASE_FREQ = CPU_CLOCK_FREQ/4 | ||
126 | * baud = fx / 2*speed [ speed >= 4 ] | ||
127 | */ | ||
128 | speed = V850E_UARTB_CTL2_MIN; | ||
129 | while (((V850E_UARTB_BASE_FREQ / 2) / speed ) > baud) | ||
130 | speed++; | ||
131 | |||
132 | return speed; | ||
133 | } | ||
134 | |||
135 | /* Return the current speed of uart channel CHAN. */ | ||
136 | #define v850e_uart_speed(chan) V850E_UARTB_CTL2 (chan) | ||
137 | |||
138 | /* Set the current speed of uart channel CHAN. */ | ||
139 | #define v850e_uart_set_speed(chan, speed) (V850E_UARTB_CTL2 (chan) = (speed)) | ||
140 | |||
141 | /* Return true if SPEED1 and SPEED2 are the same. */ | ||
142 | #define v850e_uart_speed_eq(speed1, speed2) ((speed1) == (speed2)) | ||
143 | |||
144 | /* Minimum baud rate possible. */ | ||
145 | #define v850e_uart_min_baud() \ | ||
146 | ((V850E_UARTB_BASE_FREQ / 2) / V850E_UARTB_CTL2_MAX) | ||
147 | |||
148 | /* Maximum baud rate possible. The error is quite high at max, though. */ | ||
149 | #define v850e_uart_max_baud() \ | ||
150 | ((V850E_UARTB_BASE_FREQ / 2) / V850E_UARTB_CTL2_MIN) | ||
151 | |||
152 | /* The `maximum' clock rate the uart can used, which is wanted (though not | ||
153 | really used in any useful way) by the serial framework. */ | ||
154 | #define v850e_uart_max_clock() \ | ||
155 | (V850E_UARTB_BASE_FREQ / 2) | ||
156 | |||
157 | |||
158 | /* UART configuration interface. */ | ||
159 | |||
160 | /* Type of the uart config register; must be a scalar. */ | ||
161 | typedef u16 v850e_uart_config_t; | ||
162 | |||
163 | /* The uart hardware config register for channel CHAN. */ | ||
164 | #define V850E_UART_CONFIG(chan) V850E_UARTB_CTL0 (chan) | ||
165 | |||
166 | /* This config bit set if the uart is enabled. */ | ||
167 | #define V850E_UART_CONFIG_ENABLED V850E_UARTB_CTL0_PWR | ||
168 | /* If the uart _isn't_ enabled, store this value to it to do so. */ | ||
169 | #define V850E_UART_CONFIG_INIT V850E_UARTB_CTL0_PWR | ||
170 | /* Store this config value to disable the uart channel completely. */ | ||
171 | #define V850E_UART_CONFIG_FINI 0 | ||
172 | |||
173 | /* Setting/clearing these bits enable/disable TX/RX, respectively (but | ||
174 | otherwise generally leave things running). */ | ||
175 | #define V850E_UART_CONFIG_RX_ENABLE V850E_UARTB_CTL0_RXE | ||
176 | #define V850E_UART_CONFIG_TX_ENABLE V850E_UARTB_CTL0_TXE | ||
177 | |||
178 | /* These masks define which config bits affect TX/RX modes, respectively. */ | ||
179 | #define V850E_UART_CONFIG_RX_BITS \ | ||
180 | (V850E_UARTB_CTL0_PS_MASK | V850E_UARTB_CTL0_CL_8) | ||
181 | #define V850E_UART_CONFIG_TX_BITS \ | ||
182 | (V850E_UARTB_CTL0_PS_MASK | V850E_UARTB_CTL0_CL_8 | V850E_UARTB_CTL0_SL_2) | ||
183 | |||
184 | static inline v850e_uart_config_t v850e_uart_calc_config (unsigned cflags) | ||
185 | { | ||
186 | v850e_uart_config_t config = 0; | ||
187 | |||
188 | /* Figure out new configuration of control register. */ | ||
189 | if (cflags & CSTOPB) | ||
190 | /* Number of stop bits, 1 or 2. */ | ||
191 | config |= V850E_UARTB_CTL0_SL_2; | ||
192 | if ((cflags & CSIZE) == CS8) | ||
193 | /* Number of data bits, 7 or 8. */ | ||
194 | config |= V850E_UARTB_CTL0_CL_8; | ||
195 | if (! (cflags & PARENB)) | ||
196 | /* No parity check/generation. */ | ||
197 | config |= V850E_UARTB_CTL0_PS_NONE; | ||
198 | else if (cflags & PARODD) | ||
199 | /* Odd parity check/generation. */ | ||
200 | config |= V850E_UARTB_CTL0_PS_ODD; | ||
201 | else | ||
202 | /* Even parity check/generation. */ | ||
203 | config |= V850E_UARTB_CTL0_PS_EVEN; | ||
204 | if (cflags & CREAD) | ||
205 | /* Reading enabled. */ | ||
206 | config |= V850E_UARTB_CTL0_RXE; | ||
207 | |||
208 | config |= V850E_UARTB_CTL0_PWR; | ||
209 | config |= V850E_UARTB_CTL0_TXE; /* Writing is always enabled. */ | ||
210 | config |= V850E_UARTB_CTL0_DIR; /* LSB first. */ | ||
211 | |||
212 | return config; | ||
213 | } | ||
214 | |||
215 | /* This should delay as long as necessary for a recently written config | ||
216 | setting to settle, before we turn the uart back on. */ | ||
217 | static inline void | ||
218 | v850e_uart_config_delay (v850e_uart_config_t config, v850e_uart_speed_t speed) | ||
219 | { | ||
220 | /* The UART may not be reset properly unless we wait at least 2 | ||
221 | `basic-clocks' until turning on the TXE/RXE bits again. | ||
222 | A `basic clock' is the clock used by the baud-rate generator, | ||
223 | i.e., the cpu clock divided by the 2^new_clk_divlog2. | ||
224 | The loop takes 2 insns, so loop CYCLES / 2 times. */ | ||
225 | register unsigned count = 1 << speed; | ||
226 | while (--count != 0) | ||
227 | /* nothing */; | ||
228 | } | ||
229 | |||
230 | |||
231 | /* RX/TX interface. */ | ||
232 | |||
233 | /* Return true if all characters awaiting transmission on uart channel N | ||
234 | have been transmitted. */ | ||
235 | #define v850e_uart_xmit_done(n) \ | ||
236 | (! (V850E_UARTB_STR(n) & V850E_UARTB_STR_TSF)) | ||
237 | /* Wait for this to be true. */ | ||
238 | #define v850e_uart_wait_for_xmit_done(n) \ | ||
239 | do { } while (! v850e_uart_xmit_done (n)) | ||
240 | |||
241 | /* Return true if uart channel N is ready to transmit a character. */ | ||
242 | #define v850e_uart_xmit_ok(n) \ | ||
243 | (v850e_uart_xmit_done(n) && v850e_uart_cts(n)) | ||
244 | /* Wait for this to be true. */ | ||
245 | #define v850e_uart_wait_for_xmit_ok(n) \ | ||
246 | do { } while (! v850e_uart_xmit_ok (n)) | ||
247 | |||
248 | /* Write character CH to uart channel CHAN. */ | ||
249 | #define v850e_uart_putc(chan, ch) (V850E_UARTB_TX(chan) = (ch)) | ||
250 | |||
251 | /* Return latest character read on channel CHAN. */ | ||
252 | #define v850e_uart_getc(chan) V850E_UARTB_RX (chan) | ||
253 | |||
254 | /* Return bit-mask of uart error status. */ | ||
255 | #define v850e_uart_err(chan) V850E_UARTB_STR (chan) | ||
256 | /* Various error bits set in the error result. */ | ||
257 | #define V850E_UART_ERR_OVERRUN V850E_UARTB_STR_OVE | ||
258 | #define V850E_UART_ERR_FRAME V850E_UARTB_STR_FE | ||
259 | #define V850E_UART_ERR_PARITY V850E_UARTB_STR_PE | ||
260 | |||
261 | |||
262 | #endif /* __V850_V850E_UARTB_H__ */ | ||
diff --git a/include/asm-v850/v850e_utils.h b/include/asm-v850/v850e_utils.h deleted file mode 100644 index 52eb72822d3d..000000000000 --- a/include/asm-v850/v850e_utils.h +++ /dev/null | |||
@@ -1,35 +0,0 @@ | |||
1 | /* | ||
2 | * include/asm-v850/v850e_utils.h -- Utility functions associated with | ||
3 | * V850E CPUs | ||
4 | * | ||
5 | * Copyright (C) 2001,03 NEC Electronics Corporation | ||
6 | * Copyright (C) 2001,03 Miles Bader <miles@gnu.org> | ||
7 | * | ||
8 | * This file is subject to the terms and conditions of the GNU General | ||
9 | * Public License. See the file COPYING in the main directory of this | ||
10 | * archive for more details. | ||
11 | * | ||
12 | * Written by Miles Bader <miles@gnu.org> | ||
13 | */ | ||
14 | |||
15 | #ifndef __V850_V850E_UTILS_H__ | ||
16 | #define __V850_V850E_UTILS_H__ | ||
17 | |||
18 | /* Calculate counter clock-divider and count values to attain the | ||
19 | desired frequency RATE from the base frequency BASE_FREQ. The | ||
20 | counter is expected to have a clock-divider, which can divide the | ||
21 | system cpu clock by a power of two value from MIN_DIVLOG2 to | ||
22 | MAX_DIV_LOG2, and a word-size of COUNTER_SIZE bits (the counter | ||
23 | counts up and resets whenever it's equal to the compare register, | ||
24 | generating an interrupt or whatever when it does so). The returned | ||
25 | values are: *DIVLOG2 -- log2 of the desired clock divider and *COUNT | ||
26 | -- the counter compare value to use. Returns true if it was possible | ||
27 | to find a reasonable value, otherwise false (and the other return | ||
28 | values will be set to be as good as possible). */ | ||
29 | extern int calc_counter_params (unsigned long base_freq, | ||
30 | unsigned long rate, | ||
31 | unsigned min_divlog2, unsigned max_divlog2, | ||
32 | unsigned counter_size, | ||
33 | unsigned *divlog2, unsigned *count); | ||
34 | |||
35 | #endif /* __V850_V850E_UTILS_H__ */ | ||
diff --git a/include/linux/audit.h b/include/linux/audit.h index 8b82974bdc12..6272a395d43c 100644 --- a/include/linux/audit.h +++ b/include/linux/audit.h | |||
@@ -286,7 +286,6 @@ | |||
286 | #define AUDIT_ARCH_SHEL64 (EM_SH|__AUDIT_ARCH_64BIT|__AUDIT_ARCH_LE) | 286 | #define AUDIT_ARCH_SHEL64 (EM_SH|__AUDIT_ARCH_64BIT|__AUDIT_ARCH_LE) |
287 | #define AUDIT_ARCH_SPARC (EM_SPARC) | 287 | #define AUDIT_ARCH_SPARC (EM_SPARC) |
288 | #define AUDIT_ARCH_SPARC64 (EM_SPARCV9|__AUDIT_ARCH_64BIT) | 288 | #define AUDIT_ARCH_SPARC64 (EM_SPARCV9|__AUDIT_ARCH_64BIT) |
289 | #define AUDIT_ARCH_V850 (EM_V850|__AUDIT_ARCH_LE) | ||
290 | #define AUDIT_ARCH_X86_64 (EM_X86_64|__AUDIT_ARCH_64BIT|__AUDIT_ARCH_LE) | 289 | #define AUDIT_ARCH_X86_64 (EM_X86_64|__AUDIT_ARCH_64BIT|__AUDIT_ARCH_LE) |
291 | 290 | ||
292 | #define AUDIT_PERM_EXEC 1 | 291 | #define AUDIT_PERM_EXEC 1 |
diff --git a/include/linux/module.h b/include/linux/module.h index fce15ebd0e1c..68e09557c951 100644 --- a/include/linux/module.h +++ b/include/linux/module.h | |||
@@ -23,7 +23,7 @@ | |||
23 | /* Not Yet Implemented */ | 23 | /* Not Yet Implemented */ |
24 | #define MODULE_SUPPORTED_DEVICE(name) | 24 | #define MODULE_SUPPORTED_DEVICE(name) |
25 | 25 | ||
26 | /* v850 toolchain uses a `_' prefix for all user symbols */ | 26 | /* some toolchains uses a `_' prefix for all user symbols */ |
27 | #ifndef MODULE_SYMBOL_PREFIX | 27 | #ifndef MODULE_SYMBOL_PREFIX |
28 | #define MODULE_SYMBOL_PREFIX "" | 28 | #define MODULE_SYMBOL_PREFIX "" |
29 | #endif | 29 | #endif |
diff --git a/include/linux/serial_core.h b/include/linux/serial_core.h index f3a1c0e45021..3b2f6c04855e 100644 --- a/include/linux/serial_core.h +++ b/include/linux/serial_core.h | |||
@@ -59,9 +59,6 @@ | |||
59 | #define PORT_SUNZILOG 38 | 59 | #define PORT_SUNZILOG 38 |
60 | #define PORT_SUNSAB 39 | 60 | #define PORT_SUNSAB 39 |
61 | 61 | ||
62 | /* NEC v850. */ | ||
63 | #define PORT_V850E_UART 40 | ||
64 | |||
65 | /* DEC */ | 62 | /* DEC */ |
66 | #define PORT_DZ 46 | 63 | #define PORT_DZ 46 |
67 | #define PORT_ZS 47 | 64 | #define PORT_ZS 47 |
diff --git a/include/linux/syscalls.h b/include/linux/syscalls.h index 0522f368f9d7..4394dadff813 100644 --- a/include/linux/syscalls.h +++ b/include/linux/syscalls.h | |||
@@ -443,7 +443,7 @@ asmlinkage long sys_newuname(struct new_utsname __user *name); | |||
443 | 443 | ||
444 | asmlinkage long sys_getrlimit(unsigned int resource, | 444 | asmlinkage long sys_getrlimit(unsigned int resource, |
445 | struct rlimit __user *rlim); | 445 | struct rlimit __user *rlim); |
446 | #if defined(COMPAT_RLIM_OLD_INFINITY) || !(defined(CONFIG_IA64) || defined(CONFIG_V850)) | 446 | #if defined(COMPAT_RLIM_OLD_INFINITY) || !(defined(CONFIG_IA64)) |
447 | asmlinkage long sys_old_getrlimit(unsigned int resource, struct rlimit __user *rlim); | 447 | asmlinkage long sys_old_getrlimit(unsigned int resource, struct rlimit __user *rlim); |
448 | #endif | 448 | #endif |
449 | asmlinkage long sys_setrlimit(unsigned int resource, | 449 | asmlinkage long sys_setrlimit(unsigned int resource, |
diff --git a/scripts/genksyms/genksyms.c b/scripts/genksyms/genksyms.c index dca5e0dd09bf..4f8a3007e457 100644 --- a/scripts/genksyms/genksyms.c +++ b/scripts/genksyms/genksyms.c | |||
@@ -520,8 +520,7 @@ int main(int argc, char **argv) | |||
520 | genksyms_usage(); | 520 | genksyms_usage(); |
521 | return 1; | 521 | return 1; |
522 | } | 522 | } |
523 | if ((strcmp(arch, "v850") == 0) || (strcmp(arch, "h8300") == 0) | 523 | if ((strcmp(arch, "h8300") == 0) || (strcmp(arch, "blackfin") == 0)) |
524 | || (strcmp(arch, "blackfin") == 0)) | ||
525 | mod_prefix = "_"; | 524 | mod_prefix = "_"; |
526 | { | 525 | { |
527 | extern int yydebug; | 526 | extern int yydebug; |
diff --git a/scripts/mod/file2alias.c b/scripts/mod/file2alias.c index 1fcaf3284a6a..4fa1f3ad2513 100644 --- a/scripts/mod/file2alias.c +++ b/scripts/mod/file2alias.c | |||
@@ -623,7 +623,7 @@ static int do_i2c_entry(const char *filename, struct i2c_device_id *id, | |||
623 | return 1; | 623 | return 1; |
624 | } | 624 | } |
625 | 625 | ||
626 | /* Ignore any prefix, eg. v850 prepends _ */ | 626 | /* Ignore any prefix, eg. some architectures prepend _ */ |
627 | static inline int sym_is(const char *symbol, const char *name) | 627 | static inline int sym_is(const char *symbol, const char *name) |
628 | { | 628 | { |
629 | const char *match; | 629 | const char *match; |
diff --git a/scripts/mod/mk_elfconfig.c b/scripts/mod/mk_elfconfig.c index db3881f14c2d..6a96d47bd1e6 100644 --- a/scripts/mod/mk_elfconfig.c +++ b/scripts/mod/mk_elfconfig.c | |||
@@ -55,7 +55,7 @@ main(int argc, char **argv) | |||
55 | else | 55 | else |
56 | exit(1); | 56 | exit(1); |
57 | 57 | ||
58 | if ((strcmp(argv[1], "v850") == 0) || (strcmp(argv[1], "h8300") == 0) | 58 | if ((strcmp(argv[1], "h8300") == 0) |
59 | || (strcmp(argv[1], "blackfin") == 0)) | 59 | || (strcmp(argv[1], "blackfin") == 0)) |
60 | printf("#define MODULE_SYMBOL_PREFIX \"_\"\n"); | 60 | printf("#define MODULE_SYMBOL_PREFIX \"_\"\n"); |
61 | else | 61 | else |