diff options
-rw-r--r-- | arch/mips/mm/c-r3k.c | 6 | ||||
-rw-r--r-- | arch/mips/mm/page.c | 61 | ||||
-rw-r--r-- | arch/mips/mm/sc-rm7k.c | 4 |
3 files changed, 37 insertions, 34 deletions
diff --git a/arch/mips/mm/c-r3k.c b/arch/mips/mm/c-r3k.c index 76935e320214..27a5b466c85c 100644 --- a/arch/mips/mm/c-r3k.c +++ b/arch/mips/mm/c-r3k.c | |||
@@ -26,7 +26,7 @@ | |||
26 | static unsigned long icache_size, dcache_size; /* Size in bytes */ | 26 | static unsigned long icache_size, dcache_size; /* Size in bytes */ |
27 | static unsigned long icache_lsize, dcache_lsize; /* Size in bytes */ | 27 | static unsigned long icache_lsize, dcache_lsize; /* Size in bytes */ |
28 | 28 | ||
29 | unsigned long __init r3k_cache_size(unsigned long ca_flags) | 29 | unsigned long __cpuinit r3k_cache_size(unsigned long ca_flags) |
30 | { | 30 | { |
31 | unsigned long flags, status, dummy, size; | 31 | unsigned long flags, status, dummy, size; |
32 | volatile unsigned long *p; | 32 | volatile unsigned long *p; |
@@ -61,7 +61,7 @@ unsigned long __init r3k_cache_size(unsigned long ca_flags) | |||
61 | return size * sizeof(*p); | 61 | return size * sizeof(*p); |
62 | } | 62 | } |
63 | 63 | ||
64 | unsigned long __init r3k_cache_lsize(unsigned long ca_flags) | 64 | unsigned long __cpuinit r3k_cache_lsize(unsigned long ca_flags) |
65 | { | 65 | { |
66 | unsigned long flags, status, lsize, i; | 66 | unsigned long flags, status, lsize, i; |
67 | volatile unsigned long *p; | 67 | volatile unsigned long *p; |
@@ -90,7 +90,7 @@ unsigned long __init r3k_cache_lsize(unsigned long ca_flags) | |||
90 | return lsize * sizeof(*p); | 90 | return lsize * sizeof(*p); |
91 | } | 91 | } |
92 | 92 | ||
93 | static void __init r3k_probe_cache(void) | 93 | static void __cpuinit r3k_probe_cache(void) |
94 | { | 94 | { |
95 | dcache_size = r3k_cache_size(ST0_ISC); | 95 | dcache_size = r3k_cache_size(ST0_ISC); |
96 | if (dcache_size) | 96 | if (dcache_size) |
diff --git a/arch/mips/mm/page.c b/arch/mips/mm/page.c index 1edf0cbbeede..1417c6494858 100644 --- a/arch/mips/mm/page.c +++ b/arch/mips/mm/page.c | |||
@@ -235,13 +235,12 @@ static void __cpuinit set_prefetch_parameters(void) | |||
235 | } | 235 | } |
236 | /* | 236 | /* |
237 | * Too much unrolling will overflow the available space in | 237 | * Too much unrolling will overflow the available space in |
238 | * clear_space_array / copy_page_array. 8 words sounds generous, | 238 | * clear_space_array / copy_page_array. |
239 | * but a R4000 with 128 byte L2 line length can exceed even that. | ||
240 | */ | 239 | */ |
241 | half_clear_loop_size = min(8 * clear_word_size, | 240 | half_clear_loop_size = min(16 * clear_word_size, |
242 | max(cache_line_size >> 1, | 241 | max(cache_line_size >> 1, |
243 | 4 * clear_word_size)); | 242 | 4 * clear_word_size)); |
244 | half_copy_loop_size = min(8 * copy_word_size, | 243 | half_copy_loop_size = min(16 * copy_word_size, |
245 | max(cache_line_size >> 1, | 244 | max(cache_line_size >> 1, |
246 | 4 * copy_word_size)); | 245 | 4 * copy_word_size)); |
247 | } | 246 | } |
@@ -263,21 +262,23 @@ static inline void __cpuinit build_clear_pref(u32 **buf, int off) | |||
263 | if (pref_bias_clear_store) { | 262 | if (pref_bias_clear_store) { |
264 | uasm_i_pref(buf, pref_dst_mode, pref_bias_clear_store + off, | 263 | uasm_i_pref(buf, pref_dst_mode, pref_bias_clear_store + off, |
265 | A0); | 264 | A0); |
266 | } else if (cpu_has_cache_cdex_s) { | 265 | } else if (cache_line_size == (half_clear_loop_size << 1)) { |
267 | uasm_i_cache(buf, Create_Dirty_Excl_SD, off, A0); | 266 | if (cpu_has_cache_cdex_s) { |
268 | } else if (cpu_has_cache_cdex_p) { | 267 | uasm_i_cache(buf, Create_Dirty_Excl_SD, off, A0); |
269 | if (R4600_V1_HIT_CACHEOP_WAR && cpu_is_r4600_v1_x()) { | 268 | } else if (cpu_has_cache_cdex_p) { |
270 | uasm_i_nop(buf); | 269 | if (R4600_V1_HIT_CACHEOP_WAR && cpu_is_r4600_v1_x()) { |
271 | uasm_i_nop(buf); | 270 | uasm_i_nop(buf); |
272 | uasm_i_nop(buf); | 271 | uasm_i_nop(buf); |
273 | uasm_i_nop(buf); | 272 | uasm_i_nop(buf); |
274 | } | 273 | uasm_i_nop(buf); |
274 | } | ||
275 | 275 | ||
276 | if (R4600_V2_HIT_CACHEOP_WAR && cpu_is_r4600_v2_x()) | 276 | if (R4600_V2_HIT_CACHEOP_WAR && cpu_is_r4600_v2_x()) |
277 | uasm_i_lw(buf, ZERO, ZERO, AT); | 277 | uasm_i_lw(buf, ZERO, ZERO, AT); |
278 | 278 | ||
279 | uasm_i_cache(buf, Create_Dirty_Excl_D, off, A0); | 279 | uasm_i_cache(buf, Create_Dirty_Excl_D, off, A0); |
280 | } | 280 | } |
281 | } | ||
281 | } | 282 | } |
282 | 283 | ||
283 | void __cpuinit build_clear_page(void) | 284 | void __cpuinit build_clear_page(void) |
@@ -403,20 +404,22 @@ static inline void build_copy_store_pref(u32 **buf, int off) | |||
403 | if (pref_bias_copy_store) { | 404 | if (pref_bias_copy_store) { |
404 | uasm_i_pref(buf, pref_dst_mode, pref_bias_copy_store + off, | 405 | uasm_i_pref(buf, pref_dst_mode, pref_bias_copy_store + off, |
405 | A0); | 406 | A0); |
406 | } else if (cpu_has_cache_cdex_s) { | 407 | } else if (cache_line_size == (half_copy_loop_size << 1)) { |
407 | uasm_i_cache(buf, Create_Dirty_Excl_SD, off, A0); | 408 | if (cpu_has_cache_cdex_s) { |
408 | } else if (cpu_has_cache_cdex_p) { | 409 | uasm_i_cache(buf, Create_Dirty_Excl_SD, off, A0); |
409 | if (R4600_V1_HIT_CACHEOP_WAR && cpu_is_r4600_v1_x()) { | 410 | } else if (cpu_has_cache_cdex_p) { |
410 | uasm_i_nop(buf); | 411 | if (R4600_V1_HIT_CACHEOP_WAR && cpu_is_r4600_v1_x()) { |
411 | uasm_i_nop(buf); | 412 | uasm_i_nop(buf); |
412 | uasm_i_nop(buf); | 413 | uasm_i_nop(buf); |
413 | uasm_i_nop(buf); | 414 | uasm_i_nop(buf); |
414 | } | 415 | uasm_i_nop(buf); |
416 | } | ||
415 | 417 | ||
416 | if (R4600_V2_HIT_CACHEOP_WAR && cpu_is_r4600_v2_x()) | 418 | if (R4600_V2_HIT_CACHEOP_WAR && cpu_is_r4600_v2_x()) |
417 | uasm_i_lw(buf, ZERO, ZERO, AT); | 419 | uasm_i_lw(buf, ZERO, ZERO, AT); |
418 | 420 | ||
419 | uasm_i_cache(buf, Create_Dirty_Excl_D, off, A0); | 421 | uasm_i_cache(buf, Create_Dirty_Excl_D, off, A0); |
422 | } | ||
420 | } | 423 | } |
421 | } | 424 | } |
422 | 425 | ||
diff --git a/arch/mips/mm/sc-rm7k.c b/arch/mips/mm/sc-rm7k.c index fc227f3b1199..e3abfb2d7e86 100644 --- a/arch/mips/mm/sc-rm7k.c +++ b/arch/mips/mm/sc-rm7k.c | |||
@@ -86,7 +86,7 @@ static void rm7k_sc_inv(unsigned long addr, unsigned long size) | |||
86 | /* | 86 | /* |
87 | * This function is executed in uncached address space. | 87 | * This function is executed in uncached address space. |
88 | */ | 88 | */ |
89 | static __init void __rm7k_sc_enable(void) | 89 | static __cpuinit void __rm7k_sc_enable(void) |
90 | { | 90 | { |
91 | int i; | 91 | int i; |
92 | 92 | ||
@@ -107,7 +107,7 @@ static __init void __rm7k_sc_enable(void) | |||
107 | } | 107 | } |
108 | } | 108 | } |
109 | 109 | ||
110 | static __init void rm7k_sc_enable(void) | 110 | static __cpuinit void rm7k_sc_enable(void) |
111 | { | 111 | { |
112 | if (read_c0_config() & RM7K_CONF_SE) | 112 | if (read_c0_config() & RM7K_CONF_SE) |
113 | return; | 113 | return; |