diff options
29 files changed, 520 insertions, 585 deletions
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index 2ea6fff88811..72baa1a70fcb 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig | |||
@@ -550,66 +550,11 @@ config SNI_RM | |||
550 | Technology and now in turn merged with Fujitsu. Say Y here to | 550 | Technology and now in turn merged with Fujitsu. Say Y here to |
551 | support this machine type. | 551 | support this machine type. |
552 | 552 | ||
553 | config TOSHIBA_JMR3927 | 553 | config MACH_TX39XX |
554 | bool "Toshiba JMR-TX3927 board" | 554 | bool "Toshiba TX39 series based machines" |
555 | select CEVT_TXX9 | ||
556 | select DMA_NONCOHERENT | ||
557 | select HW_HAS_PCI | ||
558 | select MIPS_TX3927 | ||
559 | select IRQ_TXX9 | ||
560 | select SWAP_IO_SPACE | ||
561 | select SYS_HAS_CPU_TX39XX | ||
562 | select SYS_SUPPORTS_32BIT_KERNEL | ||
563 | select SYS_SUPPORTS_LITTLE_ENDIAN | ||
564 | select SYS_SUPPORTS_BIG_ENDIAN | ||
565 | select GENERIC_HARDIRQS_NO__DO_IRQ | ||
566 | select GPIO_TXX9 | ||
567 | 555 | ||
568 | config TOSHIBA_RBTX4927 | 556 | config MACH_TX49XX |
569 | bool "Toshiba RBTX49[23]7 board" | 557 | bool "Toshiba TX49 series based machines" |
570 | select CEVT_R4K | ||
571 | select CSRC_R4K | ||
572 | select CEVT_TXX9 | ||
573 | select DMA_NONCOHERENT | ||
574 | select HAS_TXX9_SERIAL | ||
575 | select HW_HAS_PCI | ||
576 | select IRQ_CPU | ||
577 | select IRQ_TXX9 | ||
578 | select PCI_TX4927 | ||
579 | select SWAP_IO_SPACE | ||
580 | select SYS_HAS_CPU_TX49XX | ||
581 | select SYS_SUPPORTS_32BIT_KERNEL | ||
582 | select SYS_SUPPORTS_64BIT_KERNEL | ||
583 | select SYS_SUPPORTS_LITTLE_ENDIAN | ||
584 | select SYS_SUPPORTS_BIG_ENDIAN | ||
585 | select SYS_SUPPORTS_KGDB | ||
586 | select GENERIC_HARDIRQS_NO__DO_IRQ | ||
587 | help | ||
588 | This Toshiba board is based on the TX4927 processor. Say Y here to | ||
589 | support this machine type | ||
590 | |||
591 | config TOSHIBA_RBTX4938 | ||
592 | bool "Toshiba RBTX4938 board" | ||
593 | select CEVT_R4K | ||
594 | select CSRC_R4K | ||
595 | select CEVT_TXX9 | ||
596 | select DMA_NONCOHERENT | ||
597 | select HAS_TXX9_SERIAL | ||
598 | select HW_HAS_PCI | ||
599 | select IRQ_CPU | ||
600 | select IRQ_TXX9 | ||
601 | select PCI_TX4927 | ||
602 | select SWAP_IO_SPACE | ||
603 | select SYS_HAS_CPU_TX49XX | ||
604 | select SYS_SUPPORTS_32BIT_KERNEL | ||
605 | select SYS_SUPPORTS_LITTLE_ENDIAN | ||
606 | select SYS_SUPPORTS_BIG_ENDIAN | ||
607 | select SYS_SUPPORTS_KGDB | ||
608 | select GENERIC_HARDIRQS_NO__DO_IRQ | ||
609 | select GPIO_TXX9 | ||
610 | help | ||
611 | This Toshiba board is based on the TX4938 processor. Say Y here to | ||
612 | support this machine type | ||
613 | 558 | ||
614 | config WR_PPMC | 559 | config WR_PPMC |
615 | bool "Wind River PPMC board" | 560 | bool "Wind River PPMC board" |
@@ -887,10 +832,6 @@ config PCI_GT64XXX_PCI0 | |||
887 | config NO_EXCEPT_FILL | 832 | config NO_EXCEPT_FILL |
888 | bool | 833 | bool |
889 | 834 | ||
890 | config MIPS_TX3927 | ||
891 | bool | ||
892 | select HAS_TXX9_SERIAL | ||
893 | |||
894 | config MIPS_RM9122 | 835 | config MIPS_RM9122 |
895 | bool | 836 | bool |
896 | select SERIAL_RM9000 | 837 | select SERIAL_RM9000 |
diff --git a/arch/mips/Makefile b/arch/mips/Makefile index 8e1e49c5186b..d319cd624135 100644 --- a/arch/mips/Makefile +++ b/arch/mips/Makefile | |||
@@ -551,29 +551,30 @@ endif | |||
551 | all-$(CONFIG_SNI_RM) := vmlinux.ecoff | 551 | all-$(CONFIG_SNI_RM) := vmlinux.ecoff |
552 | 552 | ||
553 | # | 553 | # |
554 | # Common TXx9 | ||
555 | # | ||
556 | core-$(CONFIG_MACH_TX39XX) += arch/mips/txx9/generic/ | ||
557 | cflags-$(CONFIG_MACH_TX39XX) += -Iinclude/asm-mips/mach-jmr3927 | ||
558 | load-$(CONFIG_MACH_TX39XX) += 0xffffffff80050000 | ||
559 | core-$(CONFIG_MACH_TX49XX) += arch/mips/txx9/generic/ | ||
560 | cflags-$(CONFIG_MACH_TX49XX) += -Iinclude/asm-mips/mach-tx49xx | ||
561 | load-$(CONFIG_MACH_TX49XX) += 0xffffffff80100000 | ||
562 | |||
563 | # | ||
554 | # Toshiba JMR-TX3927 board | 564 | # Toshiba JMR-TX3927 board |
555 | # | 565 | # |
556 | core-$(CONFIG_TOSHIBA_JMR3927) += arch/mips/txx9/jmr3927/ \ | 566 | core-$(CONFIG_TOSHIBA_JMR3927) += arch/mips/txx9/jmr3927/ |
557 | arch/mips/txx9/generic/ | ||
558 | cflags-$(CONFIG_TOSHIBA_JMR3927) += -Iinclude/asm-mips/mach-jmr3927 | ||
559 | load-$(CONFIG_TOSHIBA_JMR3927) += 0xffffffff80050000 | ||
560 | 567 | ||
561 | # | 568 | # |
562 | # Toshiba RBTX4927 board or | 569 | # Toshiba RBTX4927 board or |
563 | # Toshiba RBTX4937 board | 570 | # Toshiba RBTX4937 board |
564 | # | 571 | # |
565 | core-$(CONFIG_TOSHIBA_RBTX4927) += arch/mips/txx9/rbtx4927/ | 572 | core-$(CONFIG_TOSHIBA_RBTX4927) += arch/mips/txx9/rbtx4927/ |
566 | core-$(CONFIG_TOSHIBA_RBTX4927) += arch/mips/txx9/generic/ | ||
567 | cflags-$(CONFIG_TOSHIBA_RBTX4927) += -Iinclude/asm-mips/mach-tx49xx | ||
568 | load-$(CONFIG_TOSHIBA_RBTX4927) += 0xffffffff80020000 | ||
569 | 573 | ||
570 | # | 574 | # |
571 | # Toshiba RBTX4938 board | 575 | # Toshiba RBTX4938 board |
572 | # | 576 | # |
573 | core-$(CONFIG_TOSHIBA_RBTX4938) += arch/mips/txx9/rbtx4938/ | 577 | core-$(CONFIG_TOSHIBA_RBTX4938) += arch/mips/txx9/rbtx4938/ |
574 | core-$(CONFIG_TOSHIBA_RBTX4938) += arch/mips/txx9/generic/ | ||
575 | cflags-$(CONFIG_TOSHIBA_RBTX4938) += -Iinclude/asm-mips/mach-tx49xx | ||
576 | load-$(CONFIG_TOSHIBA_RBTX4938) += 0xffffffff80100000 | ||
577 | 578 | ||
578 | cflags-y += -Iinclude/asm-mips/mach-generic | 579 | cflags-y += -Iinclude/asm-mips/mach-generic |
579 | drivers-$(CONFIG_PCI) += arch/mips/pci/ | 580 | drivers-$(CONFIG_PCI) += arch/mips/pci/ |
diff --git a/arch/mips/pci/Makefile b/arch/mips/pci/Makefile index 908764878ac8..875b643438c0 100644 --- a/arch/mips/pci/Makefile +++ b/arch/mips/pci/Makefile | |||
@@ -11,11 +11,10 @@ obj-$(CONFIG_MIPS_BONITO64) += ops-bonito64.o | |||
11 | obj-$(CONFIG_PCI_GT64XXX_PCI0) += ops-gt64xxx_pci0.o | 11 | obj-$(CONFIG_PCI_GT64XXX_PCI0) += ops-gt64xxx_pci0.o |
12 | obj-$(CONFIG_MIPS_MSC) += ops-msc.o | 12 | obj-$(CONFIG_MIPS_MSC) += ops-msc.o |
13 | obj-$(CONFIG_MIPS_NILE4) += ops-nile4.o | 13 | obj-$(CONFIG_MIPS_NILE4) += ops-nile4.o |
14 | obj-$(CONFIG_MIPS_TX3927) += ops-tx3927.o | 14 | obj-$(CONFIG_SOC_TX3927) += ops-tx3927.o |
15 | obj-$(CONFIG_PCI_VR41XX) += ops-vr41xx.o pci-vr41xx.o | 15 | obj-$(CONFIG_PCI_VR41XX) += ops-vr41xx.o pci-vr41xx.o |
16 | obj-$(CONFIG_NEC_CMBVR4133) += fixup-vr4133.o | 16 | obj-$(CONFIG_NEC_CMBVR4133) += fixup-vr4133.o |
17 | obj-$(CONFIG_MARKEINS) += ops-emma2rh.o pci-emma2rh.o fixup-emma2rh.o | 17 | obj-$(CONFIG_MARKEINS) += ops-emma2rh.o pci-emma2rh.o fixup-emma2rh.o |
18 | obj-$(CONFIG_PCI_TX3927) += ops-tx3927.o | ||
19 | obj-$(CONFIG_PCI_TX4927) += ops-tx4927.o | 18 | obj-$(CONFIG_PCI_TX4927) += ops-tx4927.o |
20 | 19 | ||
21 | # | 20 | # |
@@ -44,8 +43,10 @@ obj-$(CONFIG_TANBAC_TB0219) += fixup-tb0219.o | |||
44 | obj-$(CONFIG_TANBAC_TB0226) += fixup-tb0226.o | 43 | obj-$(CONFIG_TANBAC_TB0226) += fixup-tb0226.o |
45 | obj-$(CONFIG_TANBAC_TB0287) += fixup-tb0287.o | 44 | obj-$(CONFIG_TANBAC_TB0287) += fixup-tb0287.o |
46 | obj-$(CONFIG_TOSHIBA_JMR3927) += fixup-jmr3927.o | 45 | obj-$(CONFIG_TOSHIBA_JMR3927) += fixup-jmr3927.o |
47 | obj-$(CONFIG_TOSHIBA_RBTX4927) += fixup-rbtx4927.o pci-tx4927.o pci-tx4938.o | 46 | obj-$(CONFIG_SOC_TX4927) += pci-tx4927.o |
48 | obj-$(CONFIG_TOSHIBA_RBTX4938) += fixup-rbtx4938.o pci-tx4938.o | 47 | obj-$(CONFIG_SOC_TX4938) += pci-tx4938.o |
48 | obj-$(CONFIG_TOSHIBA_RBTX4927) += fixup-rbtx4927.o | ||
49 | obj-$(CONFIG_TOSHIBA_RBTX4938) += fixup-rbtx4938.o | ||
49 | obj-$(CONFIG_VICTOR_MPC30X) += fixup-mpc30x.o | 50 | obj-$(CONFIG_VICTOR_MPC30X) += fixup-mpc30x.o |
50 | obj-$(CONFIG_ZAO_CAPCELLA) += fixup-capcella.o | 51 | obj-$(CONFIG_ZAO_CAPCELLA) += fixup-capcella.o |
51 | obj-$(CONFIG_WR_PPMC) += fixup-wrppmc.o | 52 | obj-$(CONFIG_WR_PPMC) += fixup-wrppmc.o |
diff --git a/arch/mips/pci/fixup-jmr3927.c b/arch/mips/pci/fixup-jmr3927.c index d5edaf21e088..0f1069527cba 100644 --- a/arch/mips/pci/fixup-jmr3927.c +++ b/arch/mips/pci/fixup-jmr3927.c | |||
@@ -31,7 +31,7 @@ | |||
31 | #include <asm/txx9/pci.h> | 31 | #include <asm/txx9/pci.h> |
32 | #include <asm/txx9/jmr3927.h> | 32 | #include <asm/txx9/jmr3927.h> |
33 | 33 | ||
34 | int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) | 34 | int __init jmr3927_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) |
35 | { | 35 | { |
36 | unsigned char irq = pin; | 36 | unsigned char irq = pin; |
37 | 37 | ||
@@ -77,9 +77,3 @@ int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) | |||
77 | irq = JMR3927_IRQ_ETHER0; | 77 | irq = JMR3927_IRQ_ETHER0; |
78 | return irq; | 78 | return irq; |
79 | } | 79 | } |
80 | |||
81 | /* Do platform specific device initialization at pci_enable_device() time */ | ||
82 | int pcibios_plat_dev_init(struct pci_dev *dev) | ||
83 | { | ||
84 | return 0; | ||
85 | } | ||
diff --git a/arch/mips/pci/fixup-rbtx4927.c b/arch/mips/pci/fixup-rbtx4927.c index abab4852d158..321db265829c 100644 --- a/arch/mips/pci/fixup-rbtx4927.c +++ b/arch/mips/pci/fixup-rbtx4927.c | |||
@@ -36,7 +36,7 @@ | |||
36 | #include <asm/txx9/pci.h> | 36 | #include <asm/txx9/pci.h> |
37 | #include <asm/txx9/rbtx4927.h> | 37 | #include <asm/txx9/rbtx4927.h> |
38 | 38 | ||
39 | int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) | 39 | int __init rbtx4927_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) |
40 | { | 40 | { |
41 | unsigned char irq = pin; | 41 | unsigned char irq = pin; |
42 | 42 | ||
@@ -71,9 +71,3 @@ int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) | |||
71 | } | 71 | } |
72 | return irq; | 72 | return irq; |
73 | } | 73 | } |
74 | |||
75 | /* Do platform specific device initialization at pci_enable_device() time */ | ||
76 | int pcibios_plat_dev_init(struct pci_dev *dev) | ||
77 | { | ||
78 | return 0; | ||
79 | } | ||
diff --git a/arch/mips/pci/fixup-rbtx4938.c b/arch/mips/pci/fixup-rbtx4938.c index 39c995830384..a80579af609b 100644 --- a/arch/mips/pci/fixup-rbtx4938.c +++ b/arch/mips/pci/fixup-rbtx4938.c | |||
@@ -13,7 +13,7 @@ | |||
13 | #include <asm/txx9/pci.h> | 13 | #include <asm/txx9/pci.h> |
14 | #include <asm/txx9/rbtx4938.h> | 14 | #include <asm/txx9/rbtx4938.h> |
15 | 15 | ||
16 | int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) | 16 | int __init rbtx4938_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) |
17 | { | 17 | { |
18 | int irq = tx4938_pcic1_map_irq(dev, slot); | 18 | int irq = tx4938_pcic1_map_irq(dev, slot); |
19 | 19 | ||
@@ -51,12 +51,3 @@ int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) | |||
51 | } | 51 | } |
52 | return irq; | 52 | return irq; |
53 | } | 53 | } |
54 | |||
55 | /* | ||
56 | * Do platform specific device initialization at pci_enable_device() time | ||
57 | */ | ||
58 | int pcibios_plat_dev_init(struct pci_dev *dev) | ||
59 | { | ||
60 | return 0; | ||
61 | } | ||
62 | |||
diff --git a/arch/mips/txx9/Kconfig b/arch/mips/txx9/Kconfig index b8cdb192543a..b92a134ef124 100644 --- a/arch/mips/txx9/Kconfig +++ b/arch/mips/txx9/Kconfig | |||
@@ -1,11 +1,89 @@ | |||
1 | config TOSHIBA_JMR3927 | ||
2 | bool "Toshiba JMR-TX3927 board" | ||
3 | depends on MACH_TX39XX | ||
4 | select SOC_TX3927 | ||
5 | |||
6 | config TOSHIBA_RBTX4927 | ||
7 | bool "Toshiba RBTX49[23]7 board" | ||
8 | depends on MACH_TX49XX | ||
9 | select SOC_TX4927 | ||
10 | help | ||
11 | This Toshiba board is based on the TX4927 processor. Say Y here to | ||
12 | support this machine type | ||
13 | |||
14 | config TOSHIBA_RBTX4938 | ||
15 | bool "Toshiba RBTX4938 board" | ||
16 | depends on MACH_TX49XX | ||
17 | select SOC_TX4938 | ||
18 | help | ||
19 | This Toshiba board is based on the TX4938 processor. Say Y here to | ||
20 | support this machine type | ||
21 | |||
22 | config SOC_TX3927 | ||
23 | bool | ||
24 | select CEVT_TXX9 | ||
25 | select DMA_NONCOHERENT | ||
26 | select HAS_TXX9_SERIAL | ||
27 | select HW_HAS_PCI | ||
28 | select IRQ_TXX9 | ||
29 | select SWAP_IO_SPACE | ||
30 | select SYS_HAS_CPU_TX39XX | ||
31 | select SYS_SUPPORTS_32BIT_KERNEL | ||
32 | select SYS_SUPPORTS_LITTLE_ENDIAN | ||
33 | select SYS_SUPPORTS_BIG_ENDIAN | ||
34 | select GENERIC_HARDIRQS_NO__DO_IRQ | ||
35 | select GPIO_TXX9 | ||
36 | |||
37 | config SOC_TX4927 | ||
38 | bool | ||
39 | select CEVT_R4K | ||
40 | select CSRC_R4K | ||
41 | select CEVT_TXX9 | ||
42 | select DMA_NONCOHERENT | ||
43 | select HAS_TXX9_SERIAL | ||
44 | select HW_HAS_PCI | ||
45 | select IRQ_CPU | ||
46 | select IRQ_TXX9 | ||
47 | select PCI_TX4927 | ||
48 | select SWAP_IO_SPACE | ||
49 | select SYS_HAS_CPU_TX49XX | ||
50 | select SYS_SUPPORTS_32BIT_KERNEL | ||
51 | select SYS_SUPPORTS_64BIT_KERNEL | ||
52 | select SYS_SUPPORTS_LITTLE_ENDIAN | ||
53 | select SYS_SUPPORTS_BIG_ENDIAN | ||
54 | select SYS_SUPPORTS_KGDB | ||
55 | select GENERIC_HARDIRQS_NO__DO_IRQ | ||
56 | select GPIO_TXX9 | ||
57 | |||
58 | config SOC_TX4938 | ||
59 | bool | ||
60 | select CEVT_R4K | ||
61 | select CSRC_R4K | ||
62 | select CEVT_TXX9 | ||
63 | select DMA_NONCOHERENT | ||
64 | select HAS_TXX9_SERIAL | ||
65 | select HW_HAS_PCI | ||
66 | select IRQ_CPU | ||
67 | select IRQ_TXX9 | ||
68 | select PCI_TX4927 | ||
69 | select SWAP_IO_SPACE | ||
70 | select SYS_HAS_CPU_TX49XX | ||
71 | select SYS_SUPPORTS_32BIT_KERNEL | ||
72 | select SYS_SUPPORTS_64BIT_KERNEL | ||
73 | select SYS_SUPPORTS_LITTLE_ENDIAN | ||
74 | select SYS_SUPPORTS_BIG_ENDIAN | ||
75 | select SYS_SUPPORTS_KGDB | ||
76 | select GENERIC_HARDIRQS_NO__DO_IRQ | ||
77 | select GPIO_TXX9 | ||
78 | |||
1 | config TOSHIBA_FPCIB0 | 79 | config TOSHIBA_FPCIB0 |
2 | bool "FPCIB0 Backplane Support" | 80 | bool "FPCIB0 Backplane Support" |
3 | depends on PCI && (SYS_HAS_CPU_TX49XX || SYS_HAS_CPU_TX39XX) | 81 | depends on PCI && (MACH_TX39XX || MACH_TX49XX) |
4 | select I8259 | 82 | select I8259 |
5 | 83 | ||
6 | config PICMG_PCI_BACKPLANE_DEFAULT | 84 | config PICMG_PCI_BACKPLANE_DEFAULT |
7 | bool "Support for PICMG PCI Backplane" | 85 | bool "Support for PICMG PCI Backplane" |
8 | depends on PCI && (SYS_HAS_CPU_TX49XX || SYS_HAS_CPU_TX39XX) | 86 | depends on PCI && (MACH_TX39XX || MACH_TX49XX) |
9 | default y if !TOSHIBA_FPCIB0 | 87 | default y if !TOSHIBA_FPCIB0 |
10 | 88 | ||
11 | if TOSHIBA_RBTX4938 | 89 | if TOSHIBA_RBTX4938 |
diff --git a/arch/mips/txx9/generic/Makefile b/arch/mips/txx9/generic/Makefile index b80b6e072284..668fdaad6448 100644 --- a/arch/mips/txx9/generic/Makefile +++ b/arch/mips/txx9/generic/Makefile | |||
@@ -4,8 +4,8 @@ | |||
4 | 4 | ||
5 | obj-y += setup.o | 5 | obj-y += setup.o |
6 | obj-$(CONFIG_PCI) += pci.o | 6 | obj-$(CONFIG_PCI) += pci.o |
7 | obj-$(CONFIG_TOSHIBA_RBTX4927) += mem_tx4927.o irq_tx4927.o | 7 | obj-$(CONFIG_SOC_TX4927) += mem_tx4927.o irq_tx4927.o |
8 | obj-$(CONFIG_TOSHIBA_RBTX4938) += mem_tx4938.o irq_tx4938.o | 8 | obj-$(CONFIG_SOC_TX4938) += mem_tx4938.o irq_tx4938.o |
9 | obj-$(CONFIG_TOSHIBA_FPCIB0) += smsc_fdc37m81x.o | 9 | obj-$(CONFIG_TOSHIBA_FPCIB0) += smsc_fdc37m81x.o |
10 | obj-$(CONFIG_KGDB) += dbgio.o | 10 | obj-$(CONFIG_KGDB) += dbgio.o |
11 | 11 | ||
diff --git a/arch/mips/txx9/generic/irq_tx4927.c b/arch/mips/txx9/generic/irq_tx4927.c index 685ecc2ed551..6377bd8a9050 100644 --- a/arch/mips/txx9/generic/irq_tx4927.c +++ b/arch/mips/txx9/generic/irq_tx4927.c | |||
@@ -26,39 +26,12 @@ | |||
26 | #include <linux/init.h> | 26 | #include <linux/init.h> |
27 | #include <linux/interrupt.h> | 27 | #include <linux/interrupt.h> |
28 | #include <asm/irq_cpu.h> | 28 | #include <asm/irq_cpu.h> |
29 | #include <asm/mipsregs.h> | 29 | #include <asm/txx9/tx4927.h> |
30 | #ifdef CONFIG_TOSHIBA_RBTX4927 | ||
31 | #include <asm/txx9/rbtx4927.h> | ||
32 | #endif | ||
33 | 30 | ||
34 | void __init tx4927_irq_init(void) | 31 | void __init tx4927_irq_init(void) |
35 | { | 32 | { |
36 | mips_cpu_irq_init(); | 33 | mips_cpu_irq_init(); |
37 | txx9_irq_init(TX4927_IRC_REG); | 34 | txx9_irq_init(TX4927_IRC_REG); |
38 | set_irq_chained_handler(TX4927_IRQ_NEST_PIC_ON_CP0, handle_simple_irq); | 35 | set_irq_chained_handler(MIPS_CPU_IRQ_BASE + TX4927_IRC_INT, |
39 | } | 36 | handle_simple_irq); |
40 | |||
41 | asmlinkage void plat_irq_dispatch(void) | ||
42 | { | ||
43 | unsigned int pending = read_c0_status() & read_c0_cause() & ST0_IM; | ||
44 | |||
45 | if (pending & STATUSF_IP7) /* cpu timer */ | ||
46 | do_IRQ(TX4927_IRQ_CPU_TIMER); | ||
47 | else if (pending & STATUSF_IP2) { /* tx4927 pic */ | ||
48 | int irq = txx9_irq(); | ||
49 | #ifdef CONFIG_TOSHIBA_RBTX4927 | ||
50 | if (irq == TX4927_IRQ_NEST_EXT_ON_PIC) | ||
51 | irq = toshiba_rbtx4927_irq_nested(irq); | ||
52 | #endif | ||
53 | if (unlikely(irq < 0)) { | ||
54 | spurious_interrupt(); | ||
55 | return; | ||
56 | } | ||
57 | do_IRQ(irq); | ||
58 | } else if (pending & STATUSF_IP0) /* user line 0 */ | ||
59 | do_IRQ(TX4927_IRQ_USER0); | ||
60 | else if (pending & STATUSF_IP1) /* user line 1 */ | ||
61 | do_IRQ(TX4927_IRQ_USER1); | ||
62 | else | ||
63 | spurious_interrupt(); | ||
64 | } | 37 | } |
diff --git a/arch/mips/txx9/generic/irq_tx4938.c b/arch/mips/txx9/generic/irq_tx4938.c index 0886d9138818..5fc86c9c9d2f 100644 --- a/arch/mips/txx9/generic/irq_tx4938.c +++ b/arch/mips/txx9/generic/irq_tx4938.c | |||
@@ -14,35 +14,12 @@ | |||
14 | #include <linux/init.h> | 14 | #include <linux/init.h> |
15 | #include <linux/interrupt.h> | 15 | #include <linux/interrupt.h> |
16 | #include <asm/irq_cpu.h> | 16 | #include <asm/irq_cpu.h> |
17 | #include <asm/mipsregs.h> | 17 | #include <asm/txx9/tx4938.h> |
18 | #include <asm/txx9/rbtx4938.h> | ||
19 | 18 | ||
20 | void __init | 19 | void __init tx4938_irq_init(void) |
21 | tx4938_irq_init(void) | ||
22 | { | 20 | { |
23 | mips_cpu_irq_init(); | 21 | mips_cpu_irq_init(); |
24 | txx9_irq_init(TX4938_IRC_REG); | 22 | txx9_irq_init(TX4938_IRC_REG); |
25 | set_irq_chained_handler(TX4938_IRQ_NEST_PIC_ON_CP0, handle_simple_irq); | 23 | set_irq_chained_handler(MIPS_CPU_IRQ_BASE + TX4938_IRC_INT, |
26 | } | 24 | handle_simple_irq); |
27 | |||
28 | int toshiba_rbtx4938_irq_nested(int irq); | ||
29 | |||
30 | asmlinkage void plat_irq_dispatch(void) | ||
31 | { | ||
32 | unsigned int pending = read_c0_cause() & read_c0_status(); | ||
33 | |||
34 | if (pending & STATUSF_IP7) | ||
35 | do_IRQ(TX4938_IRQ_CPU_TIMER); | ||
36 | else if (pending & STATUSF_IP2) { | ||
37 | int irq = txx9_irq(); | ||
38 | if (irq == TX4938_IRQ_PIC_BEG + TX4938_IR_INT(0)) | ||
39 | irq = toshiba_rbtx4938_irq_nested(irq); | ||
40 | if (irq >= 0) | ||
41 | do_IRQ(irq); | ||
42 | else | ||
43 | spurious_interrupt(); | ||
44 | } else if (pending & STATUSF_IP1) | ||
45 | do_IRQ(TX4938_IRQ_USER1); | ||
46 | else if (pending & STATUSF_IP0) | ||
47 | do_IRQ(TX4938_IRQ_USER0); | ||
48 | } | 25 | } |
diff --git a/arch/mips/txx9/generic/pci.c b/arch/mips/txx9/generic/pci.c index 8173faab99bb..0b92d8c13208 100644 --- a/arch/mips/txx9/generic/pci.c +++ b/arch/mips/txx9/generic/pci.c | |||
@@ -16,6 +16,7 @@ | |||
16 | #include <linux/delay.h> | 16 | #include <linux/delay.h> |
17 | #include <linux/jiffies.h> | 17 | #include <linux/jiffies.h> |
18 | #include <linux/io.h> | 18 | #include <linux/io.h> |
19 | #include <asm/txx9/generic.h> | ||
19 | #include <asm/txx9/pci.h> | 20 | #include <asm/txx9/pci.h> |
20 | #ifdef CONFIG_TOSHIBA_FPCIB0 | 21 | #ifdef CONFIG_TOSHIBA_FPCIB0 |
21 | #include <linux/interrupt.h> | 22 | #include <linux/interrupt.h> |
@@ -375,3 +376,13 @@ DECLARE_PCI_FIXUP_RESUME(PCI_VENDOR_ID_EFAR, PCI_DEVICE_ID_EFAR_SLC90E66_1, | |||
375 | #endif | 376 | #endif |
376 | DECLARE_PCI_FIXUP_FINAL(PCI_ANY_ID, PCI_ANY_ID, final_fixup); | 377 | DECLARE_PCI_FIXUP_FINAL(PCI_ANY_ID, PCI_ANY_ID, final_fixup); |
377 | DECLARE_PCI_FIXUP_RESUME(PCI_ANY_ID, PCI_ANY_ID, final_fixup); | 378 | DECLARE_PCI_FIXUP_RESUME(PCI_ANY_ID, PCI_ANY_ID, final_fixup); |
379 | |||
380 | int pcibios_plat_dev_init(struct pci_dev *dev) | ||
381 | { | ||
382 | return 0; | ||
383 | } | ||
384 | |||
385 | int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) | ||
386 | { | ||
387 | return txx9_board_vec->pci_map_irq(dev, slot, pin); | ||
388 | } | ||
diff --git a/arch/mips/txx9/generic/setup.c b/arch/mips/txx9/generic/setup.c index 46a631177757..66ff74f80c6b 100644 --- a/arch/mips/txx9/generic/setup.c +++ b/arch/mips/txx9/generic/setup.c | |||
@@ -14,7 +14,16 @@ | |||
14 | #include <linux/init.h> | 14 | #include <linux/init.h> |
15 | #include <linux/kernel.h> | 15 | #include <linux/kernel.h> |
16 | #include <linux/types.h> | 16 | #include <linux/types.h> |
17 | #include <linux/interrupt.h> | ||
18 | #include <linux/string.h> | ||
19 | #include <linux/module.h> | ||
20 | #include <linux/clk.h> | ||
21 | #include <linux/err.h> | ||
22 | #include <asm/bootinfo.h> | ||
17 | #include <asm/txx9/generic.h> | 23 | #include <asm/txx9/generic.h> |
24 | #ifdef CONFIG_CPU_TX49XX | ||
25 | #include <asm/txx9/tx4938.h> | ||
26 | #endif | ||
18 | 27 | ||
19 | /* EBUSC settings of TX4927, etc. */ | 28 | /* EBUSC settings of TX4927, etc. */ |
20 | struct resource txx9_ce_res[8]; | 29 | struct resource txx9_ce_res[8]; |
@@ -49,3 +58,163 @@ txx9_reg_res_init(unsigned int pcode, unsigned long base, unsigned long size) | |||
49 | unsigned int txx9_master_clock; | 58 | unsigned int txx9_master_clock; |
50 | unsigned int txx9_cpu_clock; | 59 | unsigned int txx9_cpu_clock; |
51 | unsigned int txx9_gbus_clock; | 60 | unsigned int txx9_gbus_clock; |
61 | |||
62 | |||
63 | /* Minimum CLK support */ | ||
64 | |||
65 | struct clk *clk_get(struct device *dev, const char *id) | ||
66 | { | ||
67 | if (!strcmp(id, "spi-baseclk")) | ||
68 | return (struct clk *)(txx9_gbus_clock / 2 / 4); | ||
69 | if (!strcmp(id, "imbus_clk")) | ||
70 | return (struct clk *)(txx9_gbus_clock / 2); | ||
71 | return ERR_PTR(-ENOENT); | ||
72 | } | ||
73 | EXPORT_SYMBOL(clk_get); | ||
74 | |||
75 | int clk_enable(struct clk *clk) | ||
76 | { | ||
77 | return 0; | ||
78 | } | ||
79 | EXPORT_SYMBOL(clk_enable); | ||
80 | |||
81 | void clk_disable(struct clk *clk) | ||
82 | { | ||
83 | } | ||
84 | EXPORT_SYMBOL(clk_disable); | ||
85 | |||
86 | unsigned long clk_get_rate(struct clk *clk) | ||
87 | { | ||
88 | return (unsigned long)clk; | ||
89 | } | ||
90 | EXPORT_SYMBOL(clk_get_rate); | ||
91 | |||
92 | void clk_put(struct clk *clk) | ||
93 | { | ||
94 | } | ||
95 | EXPORT_SYMBOL(clk_put); | ||
96 | |||
97 | extern struct txx9_board_vec jmr3927_vec; | ||
98 | extern struct txx9_board_vec rbtx4927_vec; | ||
99 | extern struct txx9_board_vec rbtx4937_vec; | ||
100 | extern struct txx9_board_vec rbtx4938_vec; | ||
101 | |||
102 | /* board definitions */ | ||
103 | static struct txx9_board_vec *board_vecs[] __initdata = { | ||
104 | #ifdef CONFIG_TOSHIBA_JMR3927 | ||
105 | &jmr3927_vec, | ||
106 | #endif | ||
107 | #ifdef CONFIG_TOSHIBA_RBTX4927 | ||
108 | &rbtx4927_vec, | ||
109 | &rbtx4937_vec, | ||
110 | #endif | ||
111 | #ifdef CONFIG_TOSHIBA_RBTX4938 | ||
112 | &rbtx4938_vec, | ||
113 | #endif | ||
114 | }; | ||
115 | struct txx9_board_vec *txx9_board_vec __initdata; | ||
116 | static char txx9_system_type[32]; | ||
117 | |||
118 | void __init prom_init_cmdline(void) | ||
119 | { | ||
120 | int argc = (int)fw_arg0; | ||
121 | char **argv = (char **)fw_arg1; | ||
122 | int i; /* Always ignore the "-c" at argv[0] */ | ||
123 | |||
124 | /* ignore all built-in args if any f/w args given */ | ||
125 | if (argc > 1) | ||
126 | *arcs_cmdline = '\0'; | ||
127 | |||
128 | for (i = 1; i < argc; i++) { | ||
129 | if (i != 1) | ||
130 | strcat(arcs_cmdline, " "); | ||
131 | strcat(arcs_cmdline, argv[i]); | ||
132 | } | ||
133 | } | ||
134 | |||
135 | void __init prom_init(void) | ||
136 | { | ||
137 | int i; | ||
138 | |||
139 | #ifdef CONFIG_CPU_TX39XX | ||
140 | mips_machtype = MACH_TOSHIBA_JMR3927; | ||
141 | #endif | ||
142 | #ifdef CONFIG_CPU_TX49XX | ||
143 | switch (TX4938_REV_PCODE()) { | ||
144 | case 0x4927: | ||
145 | mips_machtype = MACH_TOSHIBA_RBTX4927; | ||
146 | break; | ||
147 | case 0x4937: | ||
148 | mips_machtype = MACH_TOSHIBA_RBTX4937; | ||
149 | break; | ||
150 | case 0x4938: | ||
151 | mips_machtype = MACH_TOSHIBA_RBTX4938; | ||
152 | break; | ||
153 | } | ||
154 | #endif | ||
155 | for (i = 0; i < ARRAY_SIZE(board_vecs); i++) { | ||
156 | if (board_vecs[i]->type == mips_machtype) { | ||
157 | txx9_board_vec = board_vecs[i]; | ||
158 | strcpy(txx9_system_type, txx9_board_vec->system); | ||
159 | return txx9_board_vec->prom_init(); | ||
160 | } | ||
161 | } | ||
162 | } | ||
163 | |||
164 | void __init prom_free_prom_memory(void) | ||
165 | { | ||
166 | } | ||
167 | |||
168 | const char *get_system_type(void) | ||
169 | { | ||
170 | return txx9_system_type; | ||
171 | } | ||
172 | |||
173 | char * __init prom_getcmdline(void) | ||
174 | { | ||
175 | return &(arcs_cmdline[0]); | ||
176 | } | ||
177 | |||
178 | /* wrappers */ | ||
179 | void __init plat_mem_setup(void) | ||
180 | { | ||
181 | txx9_board_vec->mem_setup(); | ||
182 | } | ||
183 | |||
184 | void __init arch_init_irq(void) | ||
185 | { | ||
186 | txx9_board_vec->irq_setup(); | ||
187 | } | ||
188 | |||
189 | void __init plat_time_init(void) | ||
190 | { | ||
191 | txx9_board_vec->time_init(); | ||
192 | } | ||
193 | |||
194 | static int __init _txx9_arch_init(void) | ||
195 | { | ||
196 | if (txx9_board_vec->arch_init) | ||
197 | txx9_board_vec->arch_init(); | ||
198 | return 0; | ||
199 | } | ||
200 | arch_initcall(_txx9_arch_init); | ||
201 | |||
202 | static int __init _txx9_device_init(void) | ||
203 | { | ||
204 | if (txx9_board_vec->device_init) | ||
205 | txx9_board_vec->device_init(); | ||
206 | return 0; | ||
207 | } | ||
208 | device_initcall(_txx9_device_init); | ||
209 | |||
210 | int (*txx9_irq_dispatch)(int pending); | ||
211 | asmlinkage void plat_irq_dispatch(void) | ||
212 | { | ||
213 | int pending = read_c0_status() & read_c0_cause() & ST0_IM; | ||
214 | int irq = txx9_irq_dispatch(pending); | ||
215 | |||
216 | if (likely(irq >= 0)) | ||
217 | do_IRQ(irq); | ||
218 | else | ||
219 | spurious_interrupt(); | ||
220 | } | ||
diff --git a/arch/mips/txx9/jmr3927/Makefile b/arch/mips/txx9/jmr3927/Makefile index 5f83ea375225..ba292c945669 100644 --- a/arch/mips/txx9/jmr3927/Makefile +++ b/arch/mips/txx9/jmr3927/Makefile | |||
@@ -2,7 +2,7 @@ | |||
2 | # Makefile for TOSHIBA JMR-TX3927 board | 2 | # Makefile for TOSHIBA JMR-TX3927 board |
3 | # | 3 | # |
4 | 4 | ||
5 | obj-y += prom.o init.o irq.o setup.o | 5 | obj-y += prom.o irq.o setup.o |
6 | obj-$(CONFIG_KGDB) += kgdb_io.o | 6 | obj-$(CONFIG_KGDB) += kgdb_io.o |
7 | 7 | ||
8 | EXTRA_CFLAGS += -Werror | 8 | EXTRA_CFLAGS += -Werror |
diff --git a/arch/mips/txx9/jmr3927/init.c b/arch/mips/txx9/jmr3927/init.c deleted file mode 100644 index 1bbb5343baf4..000000000000 --- a/arch/mips/txx9/jmr3927/init.c +++ /dev/null | |||
@@ -1,57 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright 2001 MontaVista Software Inc. | ||
3 | * Author: MontaVista Software, Inc. | ||
4 | * ahennessy@mvista.com | ||
5 | * | ||
6 | * arch/mips/jmr3927/common/init.c | ||
7 | * | ||
8 | * Copyright (C) 2000-2001 Toshiba Corporation | ||
9 | * | ||
10 | * This program is free software; you can redistribute it and/or modify it | ||
11 | * under the terms of the GNU General Public License as published by the | ||
12 | * Free Software Foundation; either version 2 of the License, or (at your | ||
13 | * option) any later version. | ||
14 | * | ||
15 | * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED | ||
16 | * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF | ||
17 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN | ||
18 | * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, | ||
19 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT | ||
20 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF | ||
21 | * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON | ||
22 | * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT | ||
23 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF | ||
24 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | ||
25 | * | ||
26 | * You should have received a copy of the GNU General Public License along | ||
27 | * with this program; if not, write to the Free Software Foundation, Inc., | ||
28 | * 675 Mass Ave, Cambridge, MA 02139, USA. | ||
29 | */ | ||
30 | #include <linux/init.h> | ||
31 | #include <asm/bootinfo.h> | ||
32 | #include <asm/txx9/jmr3927.h> | ||
33 | |||
34 | extern void __init prom_init_cmdline(void); | ||
35 | |||
36 | const char *get_system_type(void) | ||
37 | { | ||
38 | return "Toshiba" | ||
39 | #ifdef CONFIG_TOSHIBA_JMR3927 | ||
40 | " JMR_TX3927" | ||
41 | #endif | ||
42 | ; | ||
43 | } | ||
44 | |||
45 | extern void puts(const char *cp); | ||
46 | |||
47 | void __init prom_init(void) | ||
48 | { | ||
49 | #ifdef CONFIG_TOSHIBA_JMR3927 | ||
50 | /* CCFG */ | ||
51 | if ((tx3927_ccfgptr->ccfg & TX3927_CCFG_TLBOFF) == 0) | ||
52 | puts("Warning: TX3927 TLB off\n"); | ||
53 | #endif | ||
54 | |||
55 | prom_init_cmdline(); | ||
56 | add_memory_region(0, JMR3927_SDRAM_SIZE, BOOT_MEM_RAM); | ||
57 | } | ||
diff --git a/arch/mips/txx9/jmr3927/irq.c b/arch/mips/txx9/jmr3927/irq.c index b97d22e15da6..070c9a115e57 100644 --- a/arch/mips/txx9/jmr3927/irq.c +++ b/arch/mips/txx9/jmr3927/irq.c | |||
@@ -39,6 +39,7 @@ | |||
39 | #include <asm/system.h> | 39 | #include <asm/system.h> |
40 | 40 | ||
41 | #include <asm/processor.h> | 41 | #include <asm/processor.h> |
42 | #include <asm/txx9/generic.h> | ||
42 | #include <asm/txx9/jmr3927.h> | 43 | #include <asm/txx9/jmr3927.h> |
43 | 44 | ||
44 | #if JMR3927_IRQ_END > NR_IRQS | 45 | #if JMR3927_IRQ_END > NR_IRQS |
@@ -77,37 +78,30 @@ static void unmask_irq_ioc(unsigned int irq) | |||
77 | (void)jmr3927_ioc_reg_in(JMR3927_IOC_REV_ADDR); | 78 | (void)jmr3927_ioc_reg_in(JMR3927_IOC_REV_ADDR); |
78 | } | 79 | } |
79 | 80 | ||
80 | asmlinkage void plat_irq_dispatch(void) | 81 | static int jmr3927_ioc_irqroute(void) |
81 | { | ||
82 | unsigned long cp0_cause = read_c0_cause(); | ||
83 | int irq; | ||
84 | |||
85 | if ((cp0_cause & CAUSEF_IP7) == 0) | ||
86 | return; | ||
87 | irq = (cp0_cause >> CAUSEB_IP2) & 0x0f; | ||
88 | |||
89 | do_IRQ(irq + JMR3927_IRQ_IRC); | ||
90 | } | ||
91 | |||
92 | static irqreturn_t jmr3927_ioc_interrupt(int irq, void *dev_id) | ||
93 | { | 82 | { |
94 | unsigned char istat = jmr3927_ioc_reg_in(JMR3927_IOC_INTS2_ADDR); | 83 | unsigned char istat = jmr3927_ioc_reg_in(JMR3927_IOC_INTS2_ADDR); |
95 | int i; | 84 | int i; |
96 | 85 | ||
97 | for (i = 0; i < JMR3927_NR_IRQ_IOC; i++) { | 86 | for (i = 0; i < JMR3927_NR_IRQ_IOC; i++) { |
98 | if (istat & (1 << i)) { | 87 | if (istat & (1 << i)) |
99 | irq = JMR3927_IRQ_IOC + i; | 88 | return JMR3927_IRQ_IOC + i; |
100 | do_IRQ(irq); | ||
101 | } | ||
102 | } | 89 | } |
103 | return IRQ_HANDLED; | 90 | return -1; |
104 | } | 91 | } |
105 | 92 | ||
106 | static struct irqaction ioc_action = { | 93 | static int jmr3927_irq_dispatch(int pending) |
107 | .handler = jmr3927_ioc_interrupt, | 94 | { |
108 | .mask = CPU_MASK_NONE, | 95 | int irq; |
109 | .name = "IOC", | 96 | |
110 | }; | 97 | if ((pending & CAUSEF_IP7) == 0) |
98 | return -1; | ||
99 | irq = (pending >> CAUSEB_IP2) & 0x0f; | ||
100 | irq += JMR3927_IRQ_IRC; | ||
101 | if (irq == JMR3927_IRQ_IOCINT) | ||
102 | irq = jmr3927_ioc_irqroute(); | ||
103 | return irq; | ||
104 | } | ||
111 | 105 | ||
112 | #ifdef CONFIG_PCI | 106 | #ifdef CONFIG_PCI |
113 | static irqreturn_t jmr3927_pcierr_interrupt(int irq, void *dev_id) | 107 | static irqreturn_t jmr3927_pcierr_interrupt(int irq, void *dev_id) |
@@ -127,8 +121,9 @@ static struct irqaction pcierr_action = { | |||
127 | 121 | ||
128 | static void __init jmr3927_irq_init(void); | 122 | static void __init jmr3927_irq_init(void); |
129 | 123 | ||
130 | void __init arch_init_irq(void) | 124 | void __init jmr3927_irq_setup(void) |
131 | { | 125 | { |
126 | txx9_irq_dispatch = jmr3927_irq_dispatch; | ||
132 | /* Now, interrupt control disabled, */ | 127 | /* Now, interrupt control disabled, */ |
133 | /* all IRC interrupts are masked, */ | 128 | /* all IRC interrupts are masked, */ |
134 | /* all IRC interrupt mode are Low Active. */ | 129 | /* all IRC interrupt mode are Low Active. */ |
@@ -146,7 +141,7 @@ void __init arch_init_irq(void) | |||
146 | jmr3927_irq_init(); | 141 | jmr3927_irq_init(); |
147 | 142 | ||
148 | /* setup IOC interrupt 1 (PCI, MODEM) */ | 143 | /* setup IOC interrupt 1 (PCI, MODEM) */ |
149 | setup_irq(JMR3927_IRQ_IOCINT, &ioc_action); | 144 | set_irq_chained_handler(JMR3927_IRQ_IOCINT, handle_simple_irq); |
150 | 145 | ||
151 | #ifdef CONFIG_PCI | 146 | #ifdef CONFIG_PCI |
152 | setup_irq(JMR3927_IRQ_IRC_PCI, &pcierr_action); | 147 | setup_irq(JMR3927_IRQ_IRC_PCI, &pcierr_action); |
diff --git a/arch/mips/txx9/jmr3927/prom.c b/arch/mips/txx9/jmr3927/prom.c index 8bc1049b622e..2cadb423face 100644 --- a/arch/mips/txx9/jmr3927/prom.c +++ b/arch/mips/txx9/jmr3927/prom.c | |||
@@ -35,42 +35,10 @@ | |||
35 | * with this program; if not, write to the Free Software Foundation, Inc., | 35 | * with this program; if not, write to the Free Software Foundation, Inc., |
36 | * 675 Mass Ave, Cambridge, MA 02139, USA. | 36 | * 675 Mass Ave, Cambridge, MA 02139, USA. |
37 | */ | 37 | */ |
38 | #include <linux/kernel.h> | ||
39 | #include <linux/init.h> | 38 | #include <linux/init.h> |
40 | #include <linux/string.h> | ||
41 | |||
42 | #include <asm/bootinfo.h> | 39 | #include <asm/bootinfo.h> |
43 | #include <asm/txx9/tx3927.h> | 40 | #include <asm/txx9/generic.h> |
44 | 41 | #include <asm/txx9/jmr3927.h> | |
45 | char * __init prom_getcmdline(void) | ||
46 | { | ||
47 | return &(arcs_cmdline[0]); | ||
48 | } | ||
49 | |||
50 | void __init prom_init_cmdline(void) | ||
51 | { | ||
52 | char *cp; | ||
53 | int actr; | ||
54 | int prom_argc = fw_arg0; | ||
55 | char **prom_argv = (char **) fw_arg1; | ||
56 | |||
57 | actr = 1; /* Always ignore argv[0] */ | ||
58 | |||
59 | cp = &(arcs_cmdline[0]); | ||
60 | while(actr < prom_argc) { | ||
61 | strcpy(cp, prom_argv[actr]); | ||
62 | cp += strlen(prom_argv[actr]); | ||
63 | *cp++ = ' '; | ||
64 | actr++; | ||
65 | } | ||
66 | if (cp != &(arcs_cmdline[0])) /* get rid of trailing space */ | ||
67 | --cp; | ||
68 | *cp = '\0'; | ||
69 | } | ||
70 | |||
71 | void __init prom_free_prom_memory(void) | ||
72 | { | ||
73 | } | ||
74 | 42 | ||
75 | #define TIMEOUT 0xffffff | 43 | #define TIMEOUT 0xffffff |
76 | 44 | ||
@@ -96,3 +64,13 @@ puts(const char *cp) | |||
96 | prom_putchar('\r'); | 64 | prom_putchar('\r'); |
97 | prom_putchar('\n'); | 65 | prom_putchar('\n'); |
98 | } | 66 | } |
67 | |||
68 | void __init jmr3927_prom_init(void) | ||
69 | { | ||
70 | /* CCFG */ | ||
71 | if ((tx3927_ccfgptr->ccfg & TX3927_CCFG_TLBOFF) == 0) | ||
72 | puts("Warning: TX3927 TLB off\n"); | ||
73 | |||
74 | prom_init_cmdline(); | ||
75 | add_memory_region(0, JMR3927_SDRAM_SIZE, BOOT_MEM_RAM); | ||
76 | } | ||
diff --git a/arch/mips/txx9/jmr3927/setup.c b/arch/mips/txx9/jmr3927/setup.c index baa8c8db9a94..128a4ae3e72e 100644 --- a/arch/mips/txx9/jmr3927/setup.c +++ b/arch/mips/txx9/jmr3927/setup.c | |||
@@ -34,15 +34,16 @@ | |||
34 | #include <linux/delay.h> | 34 | #include <linux/delay.h> |
35 | #include <linux/pm.h> | 35 | #include <linux/pm.h> |
36 | #include <linux/platform_device.h> | 36 | #include <linux/platform_device.h> |
37 | #include <linux/clk.h> | ||
38 | #include <linux/gpio.h> | 37 | #include <linux/gpio.h> |
39 | #ifdef CONFIG_SERIAL_TXX9 | 38 | #ifdef CONFIG_SERIAL_TXX9 |
40 | #include <linux/serial_core.h> | 39 | #include <linux/serial_core.h> |
41 | #endif | 40 | #endif |
42 | 41 | ||
42 | #include <asm/bootinfo.h> | ||
43 | #include <asm/txx9tmr.h> | 43 | #include <asm/txx9tmr.h> |
44 | #include <asm/txx9pio.h> | 44 | #include <asm/txx9pio.h> |
45 | #include <asm/reboot.h> | 45 | #include <asm/reboot.h> |
46 | #include <asm/txx9/generic.h> | ||
46 | #include <asm/txx9/pci.h> | 47 | #include <asm/txx9/pci.h> |
47 | #include <asm/txx9/jmr3927.h> | 48 | #include <asm/txx9/jmr3927.h> |
48 | #include <asm/mipsregs.h> | 49 | #include <asm/mipsregs.h> |
@@ -83,7 +84,7 @@ static void jmr3927_machine_power_off(void) | |||
83 | while (1); | 84 | while (1); |
84 | } | 85 | } |
85 | 86 | ||
86 | void __init plat_time_init(void) | 87 | static void __init jmr3927_time_init(void) |
87 | { | 88 | { |
88 | txx9_clockevent_init(TX3927_TMR_REG(0), | 89 | txx9_clockevent_init(TX3927_TMR_REG(0), |
89 | TXX9_IRQ_BASE + JMR3927_IRQ_IRC_TMR(0), | 90 | TXX9_IRQ_BASE + JMR3927_IRQ_IRC_TMR(0), |
@@ -97,7 +98,7 @@ void __init plat_time_init(void) | |||
97 | extern char * __init prom_getcmdline(void); | 98 | extern char * __init prom_getcmdline(void); |
98 | static void jmr3927_board_init(void); | 99 | static void jmr3927_board_init(void); |
99 | 100 | ||
100 | void __init plat_mem_setup(void) | 101 | static void __init jmr3927_mem_setup(void) |
101 | { | 102 | { |
102 | char *argptr; | 103 | char *argptr; |
103 | 104 | ||
@@ -233,6 +234,8 @@ static void __init tx3927_setup(void) | |||
233 | { | 234 | { |
234 | int i; | 235 | int i; |
235 | 236 | ||
237 | txx9_cpu_clock = JMR3927_CORECLK; | ||
238 | txx9_gbus_clock = JMR3927_GBUSCLK; | ||
236 | /* SDRAMC are configured by PROM */ | 239 | /* SDRAMC are configured by PROM */ |
237 | 240 | ||
238 | /* ROMC */ | 241 | /* ROMC */ |
@@ -336,7 +339,6 @@ static int __init jmr3927_rtc_init(void) | |||
336 | dev = platform_device_register_simple("rtc-ds1742", -1, &res, 1); | 339 | dev = platform_device_register_simple("rtc-ds1742", -1, &res, 1); |
337 | return IS_ERR(dev) ? PTR_ERR(dev) : 0; | 340 | return IS_ERR(dev) ? PTR_ERR(dev) : 0; |
338 | } | 341 | } |
339 | device_initcall(jmr3927_rtc_init); | ||
340 | 342 | ||
341 | /* Watchdog support */ | 343 | /* Watchdog support */ |
342 | 344 | ||
@@ -356,36 +358,22 @@ static int __init jmr3927_wdt_init(void) | |||
356 | { | 358 | { |
357 | return txx9_wdt_init(TX3927_TMR_REG(2)); | 359 | return txx9_wdt_init(TX3927_TMR_REG(2)); |
358 | } | 360 | } |
359 | device_initcall(jmr3927_wdt_init); | ||
360 | 361 | ||
361 | /* Minimum CLK support */ | 362 | static void __init jmr3927_device_init(void) |
362 | |||
363 | struct clk *clk_get(struct device *dev, const char *id) | ||
364 | { | ||
365 | if (!strcmp(id, "imbus_clk")) | ||
366 | return (struct clk *)JMR3927_IMCLK; | ||
367 | return ERR_PTR(-ENOENT); | ||
368 | } | ||
369 | EXPORT_SYMBOL(clk_get); | ||
370 | |||
371 | int clk_enable(struct clk *clk) | ||
372 | { | ||
373 | return 0; | ||
374 | } | ||
375 | EXPORT_SYMBOL(clk_enable); | ||
376 | |||
377 | void clk_disable(struct clk *clk) | ||
378 | { | 363 | { |
364 | jmr3927_rtc_init(); | ||
365 | jmr3927_wdt_init(); | ||
379 | } | 366 | } |
380 | EXPORT_SYMBOL(clk_disable); | ||
381 | 367 | ||
382 | unsigned long clk_get_rate(struct clk *clk) | 368 | struct txx9_board_vec jmr3927_vec __initdata = { |
383 | { | 369 | .type = MACH_TOSHIBA_JMR3927, |
384 | return (unsigned long)clk; | 370 | .system = "Toshiba JMR_TX3927", |
385 | } | 371 | .prom_init = jmr3927_prom_init, |
386 | EXPORT_SYMBOL(clk_get_rate); | 372 | .mem_setup = jmr3927_mem_setup, |
387 | 373 | .irq_setup = jmr3927_irq_setup, | |
388 | void clk_put(struct clk *clk) | 374 | .time_init = jmr3927_time_init, |
389 | { | 375 | .device_init = jmr3927_device_init, |
390 | } | 376 | #ifdef CONFIG_PCI |
391 | EXPORT_SYMBOL(clk_put); | 377 | .pci_map_irq = jmr3927_pci_map_irq, |
378 | #endif | ||
379 | }; | ||
diff --git a/arch/mips/txx9/rbtx4927/irq.c b/arch/mips/txx9/rbtx4927/irq.c index bef1447aeed2..70f13211bc2a 100644 --- a/arch/mips/txx9/rbtx4927/irq.c +++ b/arch/mips/txx9/rbtx4927/irq.c | |||
@@ -111,17 +111,10 @@ JP7 is not bus master -- do NOT use -- only 4 pci bus master's allowed -- SouthB | |||
111 | #include <linux/types.h> | 111 | #include <linux/types.h> |
112 | #include <linux/interrupt.h> | 112 | #include <linux/interrupt.h> |
113 | #include <asm/io.h> | 113 | #include <asm/io.h> |
114 | #include <asm/mipsregs.h> | ||
115 | #include <asm/txx9/generic.h> | ||
114 | #include <asm/txx9/rbtx4927.h> | 116 | #include <asm/txx9/rbtx4927.h> |
115 | 117 | ||
116 | #define TOSHIBA_RBTX4927_IRQ_IOC_RAW_BEG 0 | ||
117 | #define TOSHIBA_RBTX4927_IRQ_IOC_RAW_END 7 | ||
118 | |||
119 | #define TOSHIBA_RBTX4927_IRQ_IOC_BEG ((TX4927_IRQ_PIC_END+1)+TOSHIBA_RBTX4927_IRQ_IOC_RAW_BEG) /* 56 */ | ||
120 | #define TOSHIBA_RBTX4927_IRQ_IOC_END ((TX4927_IRQ_PIC_END+1)+TOSHIBA_RBTX4927_IRQ_IOC_RAW_END) /* 63 */ | ||
121 | |||
122 | #define TOSHIBA_RBTX4927_IRQ_NEST_IOC_ON_PIC TX4927_IRQ_NEST_EXT_ON_PIC | ||
123 | #define TOSHIBA_RBTX4927_IRQ_NEST_ISA_ON_IOC (TOSHIBA_RBTX4927_IRQ_IOC_BEG+2) | ||
124 | |||
125 | static void toshiba_rbtx4927_irq_ioc_enable(unsigned int irq); | 118 | static void toshiba_rbtx4927_irq_ioc_enable(unsigned int irq); |
126 | static void toshiba_rbtx4927_irq_ioc_disable(unsigned int irq); | 119 | static void toshiba_rbtx4927_irq_ioc_disable(unsigned int irq); |
127 | 120 | ||
@@ -136,34 +129,25 @@ static struct irq_chip toshiba_rbtx4927_irq_ioc_type = { | |||
136 | #define TOSHIBA_RBTX4927_IOC_INTR_ENAB (void __iomem *)0xbc002000UL | 129 | #define TOSHIBA_RBTX4927_IOC_INTR_ENAB (void __iomem *)0xbc002000UL |
137 | #define TOSHIBA_RBTX4927_IOC_INTR_STAT (void __iomem *)0xbc002006UL | 130 | #define TOSHIBA_RBTX4927_IOC_INTR_STAT (void __iomem *)0xbc002006UL |
138 | 131 | ||
139 | int toshiba_rbtx4927_irq_nested(int sw_irq) | 132 | static int toshiba_rbtx4927_irq_nested(int sw_irq) |
140 | { | 133 | { |
141 | u8 level3; | 134 | u8 level3; |
142 | 135 | ||
143 | level3 = readb(TOSHIBA_RBTX4927_IOC_INTR_STAT) & 0x1f; | 136 | level3 = readb(TOSHIBA_RBTX4927_IOC_INTR_STAT) & 0x1f; |
144 | if (level3) | 137 | if (level3) |
145 | sw_irq = TOSHIBA_RBTX4927_IRQ_IOC_BEG + fls(level3) - 1; | 138 | sw_irq = RBTX4927_IRQ_IOC + fls(level3) - 1; |
146 | return (sw_irq); | 139 | return (sw_irq); |
147 | } | 140 | } |
148 | 141 | ||
149 | static struct irqaction toshiba_rbtx4927_irq_ioc_action = { | ||
150 | .handler = no_action, | ||
151 | .flags = IRQF_SHARED, | ||
152 | .mask = CPU_MASK_NONE, | ||
153 | .name = TOSHIBA_RBTX4927_IOC_NAME | ||
154 | }; | ||
155 | |||
156 | static void __init toshiba_rbtx4927_irq_ioc_init(void) | 142 | static void __init toshiba_rbtx4927_irq_ioc_init(void) |
157 | { | 143 | { |
158 | int i; | 144 | int i; |
159 | 145 | ||
160 | for (i = TOSHIBA_RBTX4927_IRQ_IOC_BEG; | 146 | for (i = RBTX4927_IRQ_IOC; |
161 | i <= TOSHIBA_RBTX4927_IRQ_IOC_END; i++) | 147 | i < RBTX4927_IRQ_IOC + RBTX4927_NR_IRQ_IOC; i++) |
162 | set_irq_chip_and_handler(i, &toshiba_rbtx4927_irq_ioc_type, | 148 | set_irq_chip_and_handler(i, &toshiba_rbtx4927_irq_ioc_type, |
163 | handle_level_irq); | 149 | handle_level_irq); |
164 | 150 | set_irq_chained_handler(RBTX4927_IRQ_IOCINT, handle_simple_irq); | |
165 | setup_irq(TOSHIBA_RBTX4927_IRQ_NEST_IOC_ON_PIC, | ||
166 | &toshiba_rbtx4927_irq_ioc_action); | ||
167 | } | 151 | } |
168 | 152 | ||
169 | static void toshiba_rbtx4927_irq_ioc_enable(unsigned int irq) | 153 | static void toshiba_rbtx4927_irq_ioc_enable(unsigned int irq) |
@@ -171,7 +155,7 @@ static void toshiba_rbtx4927_irq_ioc_enable(unsigned int irq) | |||
171 | unsigned char v; | 155 | unsigned char v; |
172 | 156 | ||
173 | v = readb(TOSHIBA_RBTX4927_IOC_INTR_ENAB); | 157 | v = readb(TOSHIBA_RBTX4927_IOC_INTR_ENAB); |
174 | v |= (1 << (irq - TOSHIBA_RBTX4927_IRQ_IOC_BEG)); | 158 | v |= (1 << (irq - RBTX4927_IRQ_IOC)); |
175 | writeb(v, TOSHIBA_RBTX4927_IOC_INTR_ENAB); | 159 | writeb(v, TOSHIBA_RBTX4927_IOC_INTR_ENAB); |
176 | } | 160 | } |
177 | 161 | ||
@@ -180,15 +164,34 @@ static void toshiba_rbtx4927_irq_ioc_disable(unsigned int irq) | |||
180 | unsigned char v; | 164 | unsigned char v; |
181 | 165 | ||
182 | v = readb(TOSHIBA_RBTX4927_IOC_INTR_ENAB); | 166 | v = readb(TOSHIBA_RBTX4927_IOC_INTR_ENAB); |
183 | v &= ~(1 << (irq - TOSHIBA_RBTX4927_IRQ_IOC_BEG)); | 167 | v &= ~(1 << (irq - RBTX4927_IRQ_IOC)); |
184 | writeb(v, TOSHIBA_RBTX4927_IOC_INTR_ENAB); | 168 | writeb(v, TOSHIBA_RBTX4927_IOC_INTR_ENAB); |
185 | mmiowb(); | 169 | mmiowb(); |
186 | } | 170 | } |
187 | 171 | ||
188 | void __init arch_init_irq(void) | 172 | |
173 | static int rbtx4927_irq_dispatch(int pending) | ||
189 | { | 174 | { |
190 | extern void tx4927_irq_init(void); | 175 | int irq; |
176 | |||
177 | if (pending & STATUSF_IP7) /* cpu timer */ | ||
178 | irq = MIPS_CPU_IRQ_BASE + 7; | ||
179 | else if (pending & STATUSF_IP2) { /* tx4927 pic */ | ||
180 | irq = txx9_irq(); | ||
181 | if (irq == RBTX4927_IRQ_IOCINT) | ||
182 | irq = toshiba_rbtx4927_irq_nested(irq); | ||
183 | } else if (pending & STATUSF_IP0) /* user line 0 */ | ||
184 | irq = MIPS_CPU_IRQ_BASE + 0; | ||
185 | else if (pending & STATUSF_IP1) /* user line 1 */ | ||
186 | irq = MIPS_CPU_IRQ_BASE + 1; | ||
187 | else | ||
188 | irq = -1; | ||
189 | return irq; | ||
190 | } | ||
191 | 191 | ||
192 | void __init rbtx4927_irq_setup(void) | ||
193 | { | ||
194 | txx9_irq_dispatch = rbtx4927_irq_dispatch; | ||
192 | tx4927_irq_init(); | 195 | tx4927_irq_init(); |
193 | toshiba_rbtx4927_irq_ioc_init(); | 196 | toshiba_rbtx4927_irq_ioc_init(); |
194 | /* Onboard 10M Ether: High Active */ | 197 | /* Onboard 10M Ether: High Active */ |
diff --git a/arch/mips/txx9/rbtx4927/prom.c b/arch/mips/txx9/rbtx4927/prom.c index 0020bbee838b..942e627d2dc1 100644 --- a/arch/mips/txx9/rbtx4927/prom.c +++ b/arch/mips/txx9/rbtx4927/prom.c | |||
@@ -30,62 +30,16 @@ | |||
30 | * 675 Mass Ave, Cambridge, MA 02139, USA. | 30 | * 675 Mass Ave, Cambridge, MA 02139, USA. |
31 | */ | 31 | */ |
32 | #include <linux/init.h> | 32 | #include <linux/init.h> |
33 | #include <linux/string.h> | ||
34 | #include <asm/bootinfo.h> | 33 | #include <asm/bootinfo.h> |
35 | #include <asm/cpu.h> | 34 | #include <asm/txx9/generic.h> |
36 | #include <asm/mipsregs.h> | 35 | #include <asm/txx9/rbtx4927.h> |
37 | #include <asm/txx9/tx4927.h> | ||
38 | 36 | ||
39 | void __init prom_init_cmdline(void) | 37 | void __init rbtx4927_prom_init(void) |
40 | { | ||
41 | int argc = (int) fw_arg0; | ||
42 | char **argv = (char **) fw_arg1; | ||
43 | int i; /* Always ignore the "-c" at argv[0] */ | ||
44 | |||
45 | /* ignore all built-in args if any f/w args given */ | ||
46 | if (argc > 1) { | ||
47 | *arcs_cmdline = '\0'; | ||
48 | } | ||
49 | |||
50 | for (i = 1; i < argc; i++) { | ||
51 | if (i != 1) { | ||
52 | strcat(arcs_cmdline, " "); | ||
53 | } | ||
54 | strcat(arcs_cmdline, argv[i]); | ||
55 | } | ||
56 | } | ||
57 | |||
58 | void __init prom_init(void) | ||
59 | { | 38 | { |
60 | extern int tx4927_get_mem_size(void); | 39 | extern int tx4927_get_mem_size(void); |
61 | extern char* toshiba_name; | ||
62 | int msize; | 40 | int msize; |
63 | 41 | ||
64 | prom_init_cmdline(); | 42 | prom_init_cmdline(); |
65 | |||
66 | if ((read_c0_prid() & 0xff) == PRID_REV_TX4927) { | ||
67 | mips_machtype = MACH_TOSHIBA_RBTX4927; | ||
68 | toshiba_name = "TX4927"; | ||
69 | } else { | ||
70 | mips_machtype = MACH_TOSHIBA_RBTX4937; | ||
71 | toshiba_name = "TX4937"; | ||
72 | } | ||
73 | |||
74 | msize = tx4927_get_mem_size(); | 43 | msize = tx4927_get_mem_size(); |
75 | add_memory_region(0, msize << 20, BOOT_MEM_RAM); | 44 | add_memory_region(0, msize << 20, BOOT_MEM_RAM); |
76 | } | 45 | } |
77 | |||
78 | void __init prom_free_prom_memory(void) | ||
79 | { | ||
80 | } | ||
81 | |||
82 | const char *get_system_type(void) | ||
83 | { | ||
84 | return "Toshiba RBTX4927/RBTX4937"; | ||
85 | } | ||
86 | |||
87 | char * __init prom_getcmdline(void) | ||
88 | { | ||
89 | return &(arcs_cmdline[0]); | ||
90 | } | ||
91 | |||
diff --git a/arch/mips/txx9/rbtx4927/setup.c b/arch/mips/txx9/rbtx4927/setup.c index 86b870abc319..c3566c39c26c 100644 --- a/arch/mips/txx9/rbtx4927/setup.c +++ b/arch/mips/txx9/rbtx4927/setup.c | |||
@@ -49,7 +49,6 @@ | |||
49 | #include <linux/interrupt.h> | 49 | #include <linux/interrupt.h> |
50 | #include <linux/pm.h> | 50 | #include <linux/pm.h> |
51 | #include <linux/platform_device.h> | 51 | #include <linux/platform_device.h> |
52 | #include <linux/clk.h> | ||
53 | #include <linux/delay.h> | 52 | #include <linux/delay.h> |
54 | 53 | ||
55 | #include <asm/bootinfo.h> | 54 | #include <asm/bootinfo.h> |
@@ -76,8 +75,6 @@ char *prom_getcmdline(void); | |||
76 | 75 | ||
77 | static int tx4927_ccfg_toeon = 1; | 76 | static int tx4927_ccfg_toeon = 1; |
78 | 77 | ||
79 | char *toshiba_name = ""; | ||
80 | |||
81 | #ifdef CONFIG_PCI | 78 | #ifdef CONFIG_PCI |
82 | static void __init tx4927_pci_setup(void) | 79 | static void __init tx4927_pci_setup(void) |
83 | { | 80 | { |
@@ -171,15 +168,15 @@ static void __init tx4937_pci_setup(void) | |||
171 | } | 168 | } |
172 | } | 169 | } |
173 | 170 | ||
174 | static int __init rbtx4927_arch_init(void) | 171 | static void __init rbtx4927_arch_init(void) |
175 | { | 172 | { |
176 | if (mips_machtype == MACH_TOSHIBA_RBTX4937) | 173 | if (mips_machtype == MACH_TOSHIBA_RBTX4937) |
177 | tx4937_pci_setup(); | 174 | tx4937_pci_setup(); |
178 | else | 175 | else |
179 | tx4927_pci_setup(); | 176 | tx4927_pci_setup(); |
180 | return 0; | ||
181 | } | 177 | } |
182 | arch_initcall(rbtx4927_arch_init); | 178 | #else |
179 | #define rbtx4927_arch_init NULL | ||
183 | #endif /* CONFIG_PCI */ | 180 | #endif /* CONFIG_PCI */ |
184 | 181 | ||
185 | static void __noreturn wait_forever(void) | 182 | static void __noreturn wait_forever(void) |
@@ -223,14 +220,12 @@ void toshiba_rbtx4927_power_off(void) | |||
223 | /* no return */ | 220 | /* no return */ |
224 | } | 221 | } |
225 | 222 | ||
226 | void __init plat_mem_setup(void) | 223 | static void __init rbtx4927_mem_setup(void) |
227 | { | 224 | { |
228 | int i; | 225 | int i; |
229 | u32 cp0_config; | 226 | u32 cp0_config; |
230 | char *argptr; | 227 | char *argptr; |
231 | 228 | ||
232 | printk("CPU is %s\n", toshiba_name); | ||
233 | |||
234 | /* f/w leaves this on at startup */ | 229 | /* f/w leaves this on at startup */ |
235 | clear_c0_status(ST0_ERL); | 230 | clear_c0_status(ST0_ERL); |
236 | 231 | ||
@@ -323,7 +318,7 @@ void __init plat_mem_setup(void) | |||
323 | req.iotype = UPIO_MEM; | 318 | req.iotype = UPIO_MEM; |
324 | req.membase = (char *)(0xff1ff300 + i * 0x100); | 319 | req.membase = (char *)(0xff1ff300 + i * 0x100); |
325 | req.mapbase = 0xff1ff300 + i * 0x100; | 320 | req.mapbase = 0xff1ff300 + i * 0x100; |
326 | req.irq = TX4927_IRQ_PIC_BEG + 8 + i; | 321 | req.irq = TXX9_IRQ_BASE + TX4927_IR_SIO(i); |
327 | req.flags |= UPF_BUGGY_UART /*HAVE_CTS_LINE*/; | 322 | req.flags |= UPF_BUGGY_UART /*HAVE_CTS_LINE*/; |
328 | req.uartclk = 50000000; | 323 | req.uartclk = 50000000; |
329 | early_serial_txx9_setup(&req); | 324 | early_serial_txx9_setup(&req); |
@@ -352,7 +347,7 @@ void __init plat_mem_setup(void) | |||
352 | #endif | 347 | #endif |
353 | } | 348 | } |
354 | 349 | ||
355 | void __init plat_time_init(void) | 350 | static void __init rbtx4927_time_init(void) |
356 | { | 351 | { |
357 | mips_hpt_frequency = txx9_cpu_clock / 2; | 352 | mips_hpt_frequency = txx9_cpu_clock / 2; |
358 | if (____raw_readq(&tx4927_ccfgptr->ccfg) & TX4927_CCFG_TINTDIS) | 353 | if (____raw_readq(&tx4927_ccfgptr->ccfg) & TX4927_CCFG_TINTDIS) |
@@ -372,7 +367,6 @@ static int __init toshiba_rbtx4927_rtc_init(void) | |||
372 | platform_device_register_simple("rtc-ds1742", -1, &res, 1); | 367 | platform_device_register_simple("rtc-ds1742", -1, &res, 1); |
373 | return IS_ERR(dev) ? PTR_ERR(dev) : 0; | 368 | return IS_ERR(dev) ? PTR_ERR(dev) : 0; |
374 | } | 369 | } |
375 | device_initcall(toshiba_rbtx4927_rtc_init); | ||
376 | 370 | ||
377 | static int __init rbtx4927_ne_init(void) | 371 | static int __init rbtx4927_ne_init(void) |
378 | { | 372 | { |
@@ -391,7 +385,6 @@ static int __init rbtx4927_ne_init(void) | |||
391 | res, ARRAY_SIZE(res)); | 385 | res, ARRAY_SIZE(res)); |
392 | return IS_ERR(dev) ? PTR_ERR(dev) : 0; | 386 | return IS_ERR(dev) ? PTR_ERR(dev) : 0; |
393 | } | 387 | } |
394 | device_initcall(rbtx4927_ne_init); | ||
395 | 388 | ||
396 | /* Watchdog support */ | 389 | /* Watchdog support */ |
397 | 390 | ||
@@ -411,36 +404,37 @@ static int __init rbtx4927_wdt_init(void) | |||
411 | { | 404 | { |
412 | return txx9_wdt_init(TX4927_TMR_REG(2) & 0xfffffffffULL); | 405 | return txx9_wdt_init(TX4927_TMR_REG(2) & 0xfffffffffULL); |
413 | } | 406 | } |
414 | device_initcall(rbtx4927_wdt_init); | ||
415 | |||
416 | /* Minimum CLK support */ | ||
417 | |||
418 | struct clk *clk_get(struct device *dev, const char *id) | ||
419 | { | ||
420 | if (!strcmp(id, "imbus_clk")) | ||
421 | return (struct clk *)50000000; | ||
422 | return ERR_PTR(-ENOENT); | ||
423 | } | ||
424 | EXPORT_SYMBOL(clk_get); | ||
425 | |||
426 | int clk_enable(struct clk *clk) | ||
427 | { | ||
428 | return 0; | ||
429 | } | ||
430 | EXPORT_SYMBOL(clk_enable); | ||
431 | 407 | ||
432 | void clk_disable(struct clk *clk) | 408 | static void __init rbtx4927_device_init(void) |
433 | { | 409 | { |
410 | toshiba_rbtx4927_rtc_init(); | ||
411 | rbtx4927_ne_init(); | ||
412 | rbtx4927_wdt_init(); | ||
434 | } | 413 | } |
435 | EXPORT_SYMBOL(clk_disable); | ||
436 | 414 | ||
437 | unsigned long clk_get_rate(struct clk *clk) | 415 | struct txx9_board_vec rbtx4927_vec __initdata = { |
438 | { | 416 | .type = MACH_TOSHIBA_RBTX4927, |
439 | return (unsigned long)clk; | 417 | .system = "Toshiba RBTX4927", |
440 | } | 418 | .prom_init = rbtx4927_prom_init, |
441 | EXPORT_SYMBOL(clk_get_rate); | 419 | .mem_setup = rbtx4927_mem_setup, |
442 | 420 | .irq_setup = rbtx4927_irq_setup, | |
443 | void clk_put(struct clk *clk) | 421 | .time_init = rbtx4927_time_init, |
444 | { | 422 | .device_init = rbtx4927_device_init, |
445 | } | 423 | .arch_init = rbtx4927_arch_init, |
446 | EXPORT_SYMBOL(clk_put); | 424 | #ifdef CONFIG_PCI |
425 | .pci_map_irq = rbtx4927_pci_map_irq, | ||
426 | #endif | ||
427 | }; | ||
428 | struct txx9_board_vec rbtx4937_vec __initdata = { | ||
429 | .type = MACH_TOSHIBA_RBTX4937, | ||
430 | .system = "Toshiba RBTX4937", | ||
431 | .prom_init = rbtx4927_prom_init, | ||
432 | .mem_setup = rbtx4927_mem_setup, | ||
433 | .irq_setup = rbtx4927_irq_setup, | ||
434 | .time_init = rbtx4927_time_init, | ||
435 | .device_init = rbtx4927_device_init, | ||
436 | .arch_init = rbtx4927_arch_init, | ||
437 | #ifdef CONFIG_PCI | ||
438 | .pci_map_irq = rbtx4927_pci_map_irq, | ||
439 | #endif | ||
440 | }; | ||
diff --git a/arch/mips/txx9/rbtx4938/irq.c b/arch/mips/txx9/rbtx4938/irq.c index f4984820251a..3971a061657a 100644 --- a/arch/mips/txx9/rbtx4938/irq.c +++ b/arch/mips/txx9/rbtx4938/irq.c | |||
@@ -66,6 +66,8 @@ IRQ Device | |||
66 | */ | 66 | */ |
67 | #include <linux/init.h> | 67 | #include <linux/init.h> |
68 | #include <linux/interrupt.h> | 68 | #include <linux/interrupt.h> |
69 | #include <asm/mipsregs.h> | ||
70 | #include <asm/txx9/generic.h> | ||
69 | #include <asm/txx9/rbtx4938.h> | 71 | #include <asm/txx9/rbtx4938.h> |
70 | 72 | ||
71 | static void toshiba_rbtx4938_irq_ioc_enable(unsigned int irq); | 73 | static void toshiba_rbtx4938_irq_ioc_enable(unsigned int irq); |
@@ -80,26 +82,17 @@ static struct irq_chip toshiba_rbtx4938_irq_ioc_type = { | |||
80 | .unmask = toshiba_rbtx4938_irq_ioc_enable, | 82 | .unmask = toshiba_rbtx4938_irq_ioc_enable, |
81 | }; | 83 | }; |
82 | 84 | ||
83 | int | 85 | static int toshiba_rbtx4938_irq_nested(int sw_irq) |
84 | toshiba_rbtx4938_irq_nested(int sw_irq) | ||
85 | { | 86 | { |
86 | u8 level3; | 87 | u8 level3; |
87 | 88 | ||
88 | level3 = readb(rbtx4938_imstat_addr); | 89 | level3 = readb(rbtx4938_imstat_addr); |
89 | if (level3) | 90 | if (level3) |
90 | /* must use fls so onboard ATA has priority */ | 91 | /* must use fls so onboard ATA has priority */ |
91 | sw_irq = TOSHIBA_RBTX4938_IRQ_IOC_BEG + fls(level3) - 1; | 92 | sw_irq = RBTX4938_IRQ_IOC + fls(level3) - 1; |
92 | |||
93 | return sw_irq; | 93 | return sw_irq; |
94 | } | 94 | } |
95 | 95 | ||
96 | static struct irqaction toshiba_rbtx4938_irq_ioc_action = { | ||
97 | .handler = no_action, | ||
98 | .flags = 0, | ||
99 | .mask = CPU_MASK_NONE, | ||
100 | .name = TOSHIBA_RBTX4938_IOC_NAME, | ||
101 | }; | ||
102 | |||
103 | /**********************************************************************************/ | 96 | /**********************************************************************************/ |
104 | /* Functions for ioc */ | 97 | /* Functions for ioc */ |
105 | /**********************************************************************************/ | 98 | /**********************************************************************************/ |
@@ -108,13 +101,12 @@ toshiba_rbtx4938_irq_ioc_init(void) | |||
108 | { | 101 | { |
109 | int i; | 102 | int i; |
110 | 103 | ||
111 | for (i = TOSHIBA_RBTX4938_IRQ_IOC_BEG; | 104 | for (i = RBTX4938_IRQ_IOC; |
112 | i <= TOSHIBA_RBTX4938_IRQ_IOC_END; i++) | 105 | i < RBTX4938_IRQ_IOC + RBTX4938_NR_IRQ_IOC; i++) |
113 | set_irq_chip_and_handler(i, &toshiba_rbtx4938_irq_ioc_type, | 106 | set_irq_chip_and_handler(i, &toshiba_rbtx4938_irq_ioc_type, |
114 | handle_level_irq); | 107 | handle_level_irq); |
115 | 108 | ||
116 | setup_irq(RBTX4938_IRQ_IOCINT, | 109 | set_irq_chained_handler(RBTX4938_IRQ_IOCINT, handle_simple_irq); |
117 | &toshiba_rbtx4938_irq_ioc_action); | ||
118 | } | 110 | } |
119 | 111 | ||
120 | static void | 112 | static void |
@@ -123,7 +115,7 @@ toshiba_rbtx4938_irq_ioc_enable(unsigned int irq) | |||
123 | unsigned char v; | 115 | unsigned char v; |
124 | 116 | ||
125 | v = readb(rbtx4938_imask_addr); | 117 | v = readb(rbtx4938_imask_addr); |
126 | v |= (1 << (irq - TOSHIBA_RBTX4938_IRQ_IOC_BEG)); | 118 | v |= (1 << (irq - RBTX4938_IRQ_IOC)); |
127 | writeb(v, rbtx4938_imask_addr); | 119 | writeb(v, rbtx4938_imask_addr); |
128 | mmiowb(); | 120 | mmiowb(); |
129 | } | 121 | } |
@@ -134,15 +126,33 @@ toshiba_rbtx4938_irq_ioc_disable(unsigned int irq) | |||
134 | unsigned char v; | 126 | unsigned char v; |
135 | 127 | ||
136 | v = readb(rbtx4938_imask_addr); | 128 | v = readb(rbtx4938_imask_addr); |
137 | v &= ~(1 << (irq - TOSHIBA_RBTX4938_IRQ_IOC_BEG)); | 129 | v &= ~(1 << (irq - RBTX4938_IRQ_IOC)); |
138 | writeb(v, rbtx4938_imask_addr); | 130 | writeb(v, rbtx4938_imask_addr); |
139 | mmiowb(); | 131 | mmiowb(); |
140 | } | 132 | } |
141 | 133 | ||
142 | void __init arch_init_irq(void) | 134 | static int rbtx4938_irq_dispatch(int pending) |
143 | { | 135 | { |
144 | extern void tx4938_irq_init(void); | 136 | int irq; |
137 | |||
138 | if (pending & STATUSF_IP7) | ||
139 | irq = MIPS_CPU_IRQ_BASE + 7; | ||
140 | else if (pending & STATUSF_IP2) { | ||
141 | irq = txx9_irq(); | ||
142 | if (irq == RBTX4938_IRQ_IOCINT) | ||
143 | irq = toshiba_rbtx4938_irq_nested(irq); | ||
144 | } else if (pending & STATUSF_IP1) | ||
145 | irq = MIPS_CPU_IRQ_BASE + 0; | ||
146 | else if (pending & STATUSF_IP0) | ||
147 | irq = MIPS_CPU_IRQ_BASE + 1; | ||
148 | else | ||
149 | irq = -1; | ||
150 | return irq; | ||
151 | } | ||
145 | 152 | ||
153 | void __init rbtx4938_irq_setup(void) | ||
154 | { | ||
155 | txx9_irq_dispatch = rbtx4938_irq_dispatch; | ||
146 | /* Now, interrupt control disabled, */ | 156 | /* Now, interrupt control disabled, */ |
147 | /* all IRC interrupts are masked, */ | 157 | /* all IRC interrupts are masked, */ |
148 | /* all IRC interrupt mode are Low Active. */ | 158 | /* all IRC interrupt mode are Low Active. */ |
diff --git a/arch/mips/txx9/rbtx4938/prom.c b/arch/mips/txx9/rbtx4938/prom.c index 134fcc2dc7d2..fbb37458ddb2 100644 --- a/arch/mips/txx9/rbtx4938/prom.c +++ b/arch/mips/txx9/rbtx4938/prom.c | |||
@@ -11,34 +11,12 @@ | |||
11 | */ | 11 | */ |
12 | 12 | ||
13 | #include <linux/init.h> | 13 | #include <linux/init.h> |
14 | #include <linux/mm.h> | ||
15 | #include <linux/sched.h> | ||
16 | #include <linux/bootmem.h> | 14 | #include <linux/bootmem.h> |
17 | |||
18 | #include <asm/addrspace.h> | ||
19 | #include <asm/bootinfo.h> | 15 | #include <asm/bootinfo.h> |
20 | #include <asm/txx9/tx4938.h> | 16 | #include <asm/txx9/generic.h> |
21 | 17 | #include <asm/txx9/rbtx4938.h> | |
22 | void __init prom_init_cmdline(void) | ||
23 | { | ||
24 | int argc = (int) fw_arg0; | ||
25 | char **argv = (char **) fw_arg1; | ||
26 | int i; | ||
27 | |||
28 | /* ignore all built-in args if any f/w args given */ | ||
29 | if (argc > 1) { | ||
30 | *arcs_cmdline = '\0'; | ||
31 | } | ||
32 | |||
33 | for (i = 1; i < argc; i++) { | ||
34 | if (i != 1) { | ||
35 | strcat(arcs_cmdline, " "); | ||
36 | } | ||
37 | strcat(arcs_cmdline, argv[i]); | ||
38 | } | ||
39 | } | ||
40 | 18 | ||
41 | void __init prom_init(void) | 19 | void __init rbtx4938_prom_init(void) |
42 | { | 20 | { |
43 | extern int tx4938_get_mem_size(void); | 21 | extern int tx4938_get_mem_size(void); |
44 | int msize; | 22 | int msize; |
@@ -48,25 +26,4 @@ void __init prom_init(void) | |||
48 | 26 | ||
49 | msize = tx4938_get_mem_size(); | 27 | msize = tx4938_get_mem_size(); |
50 | add_memory_region(0, msize << 20, BOOT_MEM_RAM); | 28 | add_memory_region(0, msize << 20, BOOT_MEM_RAM); |
51 | |||
52 | return; | ||
53 | } | ||
54 | |||
55 | void __init prom_free_prom_memory(void) | ||
56 | { | ||
57 | } | ||
58 | |||
59 | void __init prom_fixup_mem_map(unsigned long start, unsigned long end) | ||
60 | { | ||
61 | return; | ||
62 | } | ||
63 | |||
64 | const char *get_system_type(void) | ||
65 | { | ||
66 | return "Toshiba RBTX4938"; | ||
67 | } | ||
68 | |||
69 | char * __init prom_getcmdline(void) | ||
70 | { | ||
71 | return &(arcs_cmdline[0]); | ||
72 | } | 29 | } |
diff --git a/arch/mips/txx9/rbtx4938/setup.c b/arch/mips/txx9/rbtx4938/setup.c index 144d2cada820..8306ba333dda 100644 --- a/arch/mips/txx9/rbtx4938/setup.c +++ b/arch/mips/txx9/rbtx4938/setup.c | |||
@@ -17,7 +17,6 @@ | |||
17 | #include <linux/console.h> | 17 | #include <linux/console.h> |
18 | #include <linux/pm.h> | 18 | #include <linux/pm.h> |
19 | #include <linux/platform_device.h> | 19 | #include <linux/platform_device.h> |
20 | #include <linux/clk.h> | ||
21 | #include <linux/gpio.h> | 20 | #include <linux/gpio.h> |
22 | 21 | ||
23 | #include <asm/reboot.h> | 22 | #include <asm/reboot.h> |
@@ -147,9 +146,9 @@ static void __init rbtx4938_pci_setup(void) | |||
147 | #define SEEPROM3_CS 1 /* IOC */ | 146 | #define SEEPROM3_CS 1 /* IOC */ |
148 | #define SRTC_CS 2 /* IOC */ | 147 | #define SRTC_CS 2 /* IOC */ |
149 | 148 | ||
150 | #ifdef CONFIG_PCI | ||
151 | static int __init rbtx4938_ethaddr_init(void) | 149 | static int __init rbtx4938_ethaddr_init(void) |
152 | { | 150 | { |
151 | #ifdef CONFIG_PCI | ||
153 | unsigned char dat[17]; | 152 | unsigned char dat[17]; |
154 | unsigned char sum; | 153 | unsigned char sum; |
155 | int i; | 154 | int i; |
@@ -179,10 +178,9 @@ static int __init rbtx4938_ethaddr_init(void) | |||
179 | platform_device_add(pdev)) | 178 | platform_device_add(pdev)) |
180 | platform_device_put(pdev); | 179 | platform_device_put(pdev); |
181 | } | 180 | } |
181 | #endif /* CONFIG_PCI */ | ||
182 | return 0; | 182 | return 0; |
183 | } | 183 | } |
184 | device_initcall(rbtx4938_ethaddr_init); | ||
185 | #endif /* CONFIG_PCI */ | ||
186 | 184 | ||
187 | static void __init rbtx4938_spi_setup(void) | 185 | static void __init rbtx4938_spi_setup(void) |
188 | { | 186 | { |
@@ -366,7 +364,7 @@ void __init tx4938_board_setup(void) | |||
366 | #endif | 364 | #endif |
367 | } | 365 | } |
368 | 366 | ||
369 | void __init plat_time_init(void) | 367 | static void __init rbtx4938_time_init(void) |
370 | { | 368 | { |
371 | mips_hpt_frequency = txx9_cpu_clock / 2; | 369 | mips_hpt_frequency = txx9_cpu_clock / 2; |
372 | if (____raw_readq(&tx4938_ccfgptr->ccfg) & TX4938_CCFG_TINTDIS) | 370 | if (____raw_readq(&tx4938_ccfgptr->ccfg) & TX4938_CCFG_TINTDIS) |
@@ -375,7 +373,7 @@ void __init plat_time_init(void) | |||
375 | txx9_gbus_clock / 2); | 373 | txx9_gbus_clock / 2); |
376 | } | 374 | } |
377 | 375 | ||
378 | void __init plat_mem_setup(void) | 376 | static void __init rbtx4938_mem_setup(void) |
379 | { | 377 | { |
380 | unsigned long long pcfg; | 378 | unsigned long long pcfg; |
381 | char *argptr; | 379 | char *argptr; |
@@ -496,7 +494,6 @@ static int __init rbtx4938_ne_init(void) | |||
496 | res, ARRAY_SIZE(res)); | 494 | res, ARRAY_SIZE(res)); |
497 | return IS_ERR(dev) ? PTR_ERR(dev) : 0; | 495 | return IS_ERR(dev) ? PTR_ERR(dev) : 0; |
498 | } | 496 | } |
499 | device_initcall(rbtx4938_ne_init); | ||
500 | 497 | ||
501 | /* GPIO support */ | 498 | /* GPIO support */ |
502 | 499 | ||
@@ -587,14 +584,13 @@ static int __init rbtx4938_spi_init(void) | |||
587 | return 0; | 584 | return 0; |
588 | } | 585 | } |
589 | 586 | ||
590 | static int __init rbtx4938_arch_init(void) | 587 | static void __init rbtx4938_arch_init(void) |
591 | { | 588 | { |
592 | txx9_gpio_init(TX4938_PIO_REG & 0xfffffffffULL, 0, 16); | 589 | txx9_gpio_init(TX4938_PIO_REG & 0xfffffffffULL, 0, 16); |
593 | gpiochip_add(&rbtx4938_spi_gpio_chip); | 590 | gpiochip_add(&rbtx4938_spi_gpio_chip); |
594 | rbtx4938_pci_setup(); | 591 | rbtx4938_pci_setup(); |
595 | return rbtx4938_spi_init(); | 592 | rbtx4938_spi_init(); |
596 | } | 593 | } |
597 | arch_initcall(rbtx4938_arch_init); | ||
598 | 594 | ||
599 | /* Watchdog support */ | 595 | /* Watchdog support */ |
600 | 596 | ||
@@ -614,38 +610,24 @@ static int __init rbtx4938_wdt_init(void) | |||
614 | { | 610 | { |
615 | return txx9_wdt_init(TX4938_TMR_REG(2) & 0xfffffffffULL); | 611 | return txx9_wdt_init(TX4938_TMR_REG(2) & 0xfffffffffULL); |
616 | } | 612 | } |
617 | device_initcall(rbtx4938_wdt_init); | ||
618 | |||
619 | /* Minimum CLK support */ | ||
620 | |||
621 | struct clk *clk_get(struct device *dev, const char *id) | ||
622 | { | ||
623 | if (!strcmp(id, "spi-baseclk")) | ||
624 | return (struct clk *)(txx9_gbus_clock / 2 / 4); | ||
625 | if (!strcmp(id, "imbus_clk")) | ||
626 | return (struct clk *)(txx9_gbus_clock / 2); | ||
627 | return ERR_PTR(-ENOENT); | ||
628 | } | ||
629 | EXPORT_SYMBOL(clk_get); | ||
630 | |||
631 | int clk_enable(struct clk *clk) | ||
632 | { | ||
633 | return 0; | ||
634 | } | ||
635 | EXPORT_SYMBOL(clk_enable); | ||
636 | |||
637 | void clk_disable(struct clk *clk) | ||
638 | { | ||
639 | } | ||
640 | EXPORT_SYMBOL(clk_disable); | ||
641 | 613 | ||
642 | unsigned long clk_get_rate(struct clk *clk) | 614 | static void __init rbtx4938_device_init(void) |
643 | { | 615 | { |
644 | return (unsigned long)clk; | 616 | rbtx4938_ethaddr_init(); |
617 | rbtx4938_ne_init(); | ||
618 | rbtx4938_wdt_init(); | ||
645 | } | 619 | } |
646 | EXPORT_SYMBOL(clk_get_rate); | ||
647 | 620 | ||
648 | void clk_put(struct clk *clk) | 621 | struct txx9_board_vec rbtx4938_vec __initdata = { |
649 | { | 622 | .type = MACH_TOSHIBA_RBTX4938, |
650 | } | 623 | .system = "Toshiba RBTX4938", |
651 | EXPORT_SYMBOL(clk_put); | 624 | .prom_init = rbtx4938_prom_init, |
625 | .mem_setup = rbtx4938_mem_setup, | ||
626 | .irq_setup = rbtx4938_irq_setup, | ||
627 | .time_init = rbtx4938_time_init, | ||
628 | .device_init = rbtx4938_device_init, | ||
629 | .arch_init = rbtx4938_arch_init, | ||
630 | #ifdef CONFIG_PCI | ||
631 | .pci_map_irq = rbtx4938_pci_map_irq, | ||
632 | #endif | ||
633 | }; | ||
diff --git a/include/asm-mips/txx9/generic.h b/include/asm-mips/txx9/generic.h index 2ff6c2002204..6cd147764f19 100644 --- a/include/asm-mips/txx9/generic.h +++ b/include/asm-mips/txx9/generic.h | |||
@@ -20,4 +20,22 @@ extern unsigned int txx9_master_clock; | |||
20 | extern unsigned int txx9_cpu_clock; | 20 | extern unsigned int txx9_cpu_clock; |
21 | extern unsigned int txx9_gbus_clock; | 21 | extern unsigned int txx9_gbus_clock; |
22 | 22 | ||
23 | struct pci_dev; | ||
24 | struct txx9_board_vec { | ||
25 | unsigned long type; | ||
26 | const char *system; | ||
27 | void (*prom_init)(void); | ||
28 | void (*mem_setup)(void); | ||
29 | void (*irq_setup)(void); | ||
30 | void (*time_init)(void); | ||
31 | void (*arch_init)(void); | ||
32 | void (*device_init)(void); | ||
33 | #ifdef CONFIG_PCI | ||
34 | int (*pci_map_irq)(const struct pci_dev *dev, u8 slot, u8 pin); | ||
35 | #endif | ||
36 | }; | ||
37 | extern struct txx9_board_vec *txx9_board_vec; | ||
38 | extern int (*txx9_irq_dispatch)(int pending); | ||
39 | void prom_init_cmdline(void); | ||
40 | |||
23 | #endif /* __ASM_TXX9_GENERIC_H */ | 41 | #endif /* __ASM_TXX9_GENERIC_H */ |
diff --git a/include/asm-mips/txx9/jmr3927.h b/include/asm-mips/txx9/jmr3927.h index 29e54981a86e..d6eb1b6a54eb 100644 --- a/include/asm-mips/txx9/jmr3927.h +++ b/include/asm-mips/txx9/jmr3927.h | |||
@@ -174,4 +174,9 @@ | |||
174 | * INT[3:0] | 174 | * INT[3:0] |
175 | */ | 175 | */ |
176 | 176 | ||
177 | void jmr3927_prom_init(void); | ||
178 | void jmr3927_irq_setup(void); | ||
179 | struct pci_dev; | ||
180 | int jmr3927_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin); | ||
181 | |||
177 | #endif /* __ASM_TXX9_JMR3927_H */ | 182 | #endif /* __ASM_TXX9_JMR3927_H */ |
diff --git a/include/asm-mips/txx9/rbtx4927.h b/include/asm-mips/txx9/rbtx4927.h index 5b6f488b1b3c..bf194589216f 100644 --- a/include/asm-mips/txx9/rbtx4927.h +++ b/include/asm-mips/txx9/rbtx4927.h | |||
@@ -46,12 +46,16 @@ | |||
46 | #define RBTX4927_INTF_PCIB (1 << RBTX4927_INTB_PCIB) | 46 | #define RBTX4927_INTF_PCIB (1 << RBTX4927_INTB_PCIB) |
47 | #define RBTX4927_INTF_PCIA (1 << RBTX4927_INTB_PCIA) | 47 | #define RBTX4927_INTF_PCIA (1 << RBTX4927_INTB_PCIA) |
48 | 48 | ||
49 | #define RBTX4927_IRQ_IOC (TX4927_IRQ_PIC_BEG + TX4927_NUM_IR) | 49 | #define RBTX4927_NR_IRQ_IOC 8 /* IOC */ |
50 | |||
51 | #define RBTX4927_IRQ_IOC (TXX9_IRQ_BASE + TX4927_NUM_IR) | ||
50 | #define RBTX4927_IRQ_IOC_PCID (RBTX4927_IRQ_IOC + RBTX4927_INTB_PCID) | 52 | #define RBTX4927_IRQ_IOC_PCID (RBTX4927_IRQ_IOC + RBTX4927_INTB_PCID) |
51 | #define RBTX4927_IRQ_IOC_PCIC (RBTX4927_IRQ_IOC + RBTX4927_INTB_PCIC) | 53 | #define RBTX4927_IRQ_IOC_PCIC (RBTX4927_IRQ_IOC + RBTX4927_INTB_PCIC) |
52 | #define RBTX4927_IRQ_IOC_PCIB (RBTX4927_IRQ_IOC + RBTX4927_INTB_PCIB) | 54 | #define RBTX4927_IRQ_IOC_PCIB (RBTX4927_IRQ_IOC + RBTX4927_INTB_PCIB) |
53 | #define RBTX4927_IRQ_IOC_PCIA (RBTX4927_IRQ_IOC + RBTX4927_INTB_PCIA) | 55 | #define RBTX4927_IRQ_IOC_PCIA (RBTX4927_IRQ_IOC + RBTX4927_INTB_PCIA) |
54 | 56 | ||
57 | #define RBTX4927_IRQ_IOCINT (TXX9_IRQ_BASE + TX4927_IR_INT(1)) | ||
58 | |||
55 | #ifdef CONFIG_PCI | 59 | #ifdef CONFIG_PCI |
56 | #define RBTX4927_ISA_IO_OFFSET RBTX4927_PCIIO | 60 | #define RBTX4927_ISA_IO_OFFSET RBTX4927_PCIIO |
57 | #else | 61 | #else |
@@ -65,8 +69,11 @@ | |||
65 | #define RBTX4927_SW_RESET_ENABLE_SET 0x01 | 69 | #define RBTX4927_SW_RESET_ENABLE_SET 0x01 |
66 | 70 | ||
67 | #define RBTX4927_RTL_8019_BASE (0x1c020280 - RBTX4927_ISA_IO_OFFSET) | 71 | #define RBTX4927_RTL_8019_BASE (0x1c020280 - RBTX4927_ISA_IO_OFFSET) |
68 | #define RBTX4927_RTL_8019_IRQ (TX4927_IRQ_PIC_BEG + 5) | 72 | #define RBTX4927_RTL_8019_IRQ (TXX9_IRQ_BASE + TX4927_IR_INT(3)) |
69 | 73 | ||
70 | int toshiba_rbtx4927_irq_nested(int sw_irq); | 74 | void rbtx4927_prom_init(void); |
75 | void rbtx4927_irq_setup(void); | ||
76 | struct pci_dev; | ||
77 | int rbtx4927_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin); | ||
71 | 78 | ||
72 | #endif /* __ASM_TXX9_RBTX4927_H */ | 79 | #endif /* __ASM_TXX9_RBTX4927_H */ |
diff --git a/include/asm-mips/txx9/rbtx4938.h b/include/asm-mips/txx9/rbtx4938.h index 8450f735d056..2f5d5e705a41 100644 --- a/include/asm-mips/txx9/rbtx4938.h +++ b/include/asm-mips/txx9/rbtx4938.h | |||
@@ -101,35 +101,12 @@ | |||
101 | * that particular IRQ on an RBTX4938 machine. Add new 'spaces' as new | 101 | * that particular IRQ on an RBTX4938 machine. Add new 'spaces' as new |
102 | * IRQ hardware is supported. | 102 | * IRQ hardware is supported. |
103 | */ | 103 | */ |
104 | #define RBTX4938_NR_IRQ_LOCAL 8 | ||
105 | #define RBTX4938_NR_IRQ_IRC 32 /* On-Chip IRC */ | ||
106 | #define RBTX4938_NR_IRQ_IOC 8 | 104 | #define RBTX4938_NR_IRQ_IOC 8 |
107 | 105 | ||
108 | #define TX4938_IRQ_CP0_BEG MIPS_CPU_IRQ_BASE | 106 | #define RBTX4938_IRQ_IRC TXX9_IRQ_BASE |
109 | #define TX4938_IRQ_CP0_END (MIPS_CPU_IRQ_BASE + 8 - 1) | 107 | #define RBTX4938_IRQ_IOC (TXX9_IRQ_BASE + TX4938_NUM_IR) |
110 | |||
111 | #define TX4938_IRQ_PIC_BEG TXX9_IRQ_BASE | ||
112 | #define TX4938_IRQ_PIC_END (TXX9_IRQ_BASE + TXx9_MAX_IR - 1) | ||
113 | #define TX4938_IRQ_NEST_EXT_ON_PIC (TX4938_IRQ_PIC_BEG+2) | ||
114 | #define TX4938_IRQ_NEST_PIC_ON_CP0 (TX4938_IRQ_CP0_BEG+2) | ||
115 | #define TX4938_IRQ_USER0 (TX4938_IRQ_CP0_BEG+0) | ||
116 | #define TX4938_IRQ_USER1 (TX4938_IRQ_CP0_BEG+1) | ||
117 | #define TX4938_IRQ_CPU_TIMER (TX4938_IRQ_CP0_BEG+7) | ||
118 | |||
119 | #define TOSHIBA_RBTX4938_IRQ_IOC_RAW_BEG 0 | ||
120 | #define TOSHIBA_RBTX4938_IRQ_IOC_RAW_END 7 | ||
121 | |||
122 | #define TOSHIBA_RBTX4938_IRQ_IOC_BEG ((TX4938_IRQ_PIC_END+1)+TOSHIBA_RBTX4938_IRQ_IOC_RAW_BEG) /* 56 */ | ||
123 | #define TOSHIBA_RBTX4938_IRQ_IOC_END ((TX4938_IRQ_PIC_END+1)+TOSHIBA_RBTX4938_IRQ_IOC_RAW_END) /* 63 */ | ||
124 | #define RBTX4938_IRQ_LOCAL TX4938_IRQ_CP0_BEG | ||
125 | #define RBTX4938_IRQ_IRC (RBTX4938_IRQ_LOCAL + RBTX4938_NR_IRQ_LOCAL) | ||
126 | #define RBTX4938_IRQ_IOC (RBTX4938_IRQ_IRC + RBTX4938_NR_IRQ_IRC) | ||
127 | #define RBTX4938_IRQ_END (RBTX4938_IRQ_IOC + RBTX4938_NR_IRQ_IOC) | 108 | #define RBTX4938_IRQ_END (RBTX4938_IRQ_IOC + RBTX4938_NR_IRQ_IOC) |
128 | 109 | ||
129 | #define RBTX4938_IRQ_LOCAL_SOFT0 (RBTX4938_IRQ_LOCAL + RBTX4938_SOFT_INT0) | ||
130 | #define RBTX4938_IRQ_LOCAL_SOFT1 (RBTX4938_IRQ_LOCAL + RBTX4938_SOFT_INT1) | ||
131 | #define RBTX4938_IRQ_LOCAL_IRC (RBTX4938_IRQ_LOCAL + RBTX4938_IRC_INT) | ||
132 | #define RBTX4938_IRQ_LOCAL_TIMER (RBTX4938_IRQ_LOCAL + RBTX4938_TIMER_INT) | ||
133 | #define RBTX4938_IRQ_IRC_ECCERR (RBTX4938_IRQ_IRC + TX4938_IR_ECCERR) | 110 | #define RBTX4938_IRQ_IRC_ECCERR (RBTX4938_IRQ_IRC + TX4938_IR_ECCERR) |
134 | #define RBTX4938_IRQ_IRC_WTOERR (RBTX4938_IRQ_IRC + TX4938_IR_WTOERR) | 111 | #define RBTX4938_IRQ_IRC_WTOERR (RBTX4938_IRQ_IRC + TX4938_IR_WTOERR) |
135 | #define RBTX4938_IRQ_IRC_INT(n) (RBTX4938_IRQ_IRC + TX4938_IR_INT(n)) | 112 | #define RBTX4938_IRQ_IRC_INT(n) (RBTX4938_IRQ_IRC + TX4938_IR_INT(n)) |
@@ -157,11 +134,16 @@ | |||
157 | 134 | ||
158 | 135 | ||
159 | /* IOC (PCI, etc) */ | 136 | /* IOC (PCI, etc) */ |
160 | #define RBTX4938_IRQ_IOCINT (TX4938_IRQ_NEST_EXT_ON_PIC) | 137 | #define RBTX4938_IRQ_IOCINT (TXX9_IRQ_BASE + TX4938_IR_INT(0)) |
161 | /* Onboard 10M Ether */ | 138 | /* Onboard 10M Ether */ |
162 | #define RBTX4938_IRQ_ETHER (TX4938_IRQ_NEST_EXT_ON_PIC + 1) | 139 | #define RBTX4938_IRQ_ETHER (TXX9_IRQ_BASE + TX4938_IR_INT(1)) |
163 | 140 | ||
164 | #define RBTX4938_RTL_8019_BASE (RBTX4938_ETHER_ADDR - mips_io_port_base) | 141 | #define RBTX4938_RTL_8019_BASE (RBTX4938_ETHER_ADDR - mips_io_port_base) |
165 | #define RBTX4938_RTL_8019_IRQ (RBTX4938_IRQ_ETHER) | 142 | #define RBTX4938_RTL_8019_IRQ (RBTX4938_IRQ_ETHER) |
166 | 143 | ||
144 | void rbtx4938_prom_init(void); | ||
145 | void rbtx4938_irq_setup(void); | ||
146 | struct pci_dev; | ||
147 | int rbtx4938_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin); | ||
148 | |||
167 | #endif /* __ASM_TXX9_RBTX4938_H */ | 149 | #endif /* __ASM_TXX9_RBTX4938_H */ |
diff --git a/include/asm-mips/txx9/tx4927.h b/include/asm-mips/txx9/tx4927.h index c0382fd2ae7f..46d60afc038b 100644 --- a/include/asm-mips/txx9/tx4927.h +++ b/include/asm-mips/txx9/tx4927.h | |||
@@ -32,20 +32,6 @@ | |||
32 | #include <asm/txx9irq.h> | 32 | #include <asm/txx9irq.h> |
33 | #include <asm/txx9/tx4927pcic.h> | 33 | #include <asm/txx9/tx4927pcic.h> |
34 | 34 | ||
35 | #define TX4927_IRQ_CP0_BEG MIPS_CPU_IRQ_BASE | ||
36 | #define TX4927_IRQ_CP0_END (MIPS_CPU_IRQ_BASE + 8 - 1) | ||
37 | |||
38 | #define TX4927_IRQ_PIC_BEG TXX9_IRQ_BASE | ||
39 | #define TX4927_IRQ_PIC_END (TXX9_IRQ_BASE + TXx9_MAX_IR - 1) | ||
40 | |||
41 | |||
42 | #define TX4927_IRQ_USER0 (TX4927_IRQ_CP0_BEG+0) | ||
43 | #define TX4927_IRQ_USER1 (TX4927_IRQ_CP0_BEG+1) | ||
44 | #define TX4927_IRQ_NEST_PIC_ON_CP0 (TX4927_IRQ_CP0_BEG+2) | ||
45 | #define TX4927_IRQ_CPU_TIMER (TX4927_IRQ_CP0_BEG+7) | ||
46 | |||
47 | #define TX4927_IRQ_NEST_EXT_ON_PIC (TX4927_IRQ_PIC_BEG+3) | ||
48 | |||
49 | #define TX4927_SDRAMC_REG 0xff1f8000 | 35 | #define TX4927_SDRAMC_REG 0xff1f8000 |
50 | #define TX4927_EBUSC_REG 0xff1f9000 | 36 | #define TX4927_EBUSC_REG 0xff1f9000 |
51 | #define TX4927_PCIC_REG 0xff1fd000 | 37 | #define TX4927_PCIC_REG 0xff1fd000 |
@@ -54,10 +40,14 @@ | |||
54 | #define TX4927_NR_TMR 3 | 40 | #define TX4927_NR_TMR 3 |
55 | #define TX4927_TMR_REG(ch) (0xff1ff000 + (ch) * 0x100) | 41 | #define TX4927_TMR_REG(ch) (0xff1ff000 + (ch) * 0x100) |
56 | 42 | ||
43 | #define TX4927_IR_INT(n) (2 + (n)) | ||
44 | #define TX4927_IR_SIO(n) (8 + (n)) | ||
57 | #define TX4927_IR_PCIC 16 | 45 | #define TX4927_IR_PCIC 16 |
58 | #define TX4927_IR_PCIERR 22 | 46 | #define TX4927_IR_PCIERR 22 |
59 | #define TX4927_NUM_IR 32 | 47 | #define TX4927_NUM_IR 32 |
60 | 48 | ||
49 | #define TX4927_IRC_INT 2 /* IP[2] in Status register */ | ||
50 | |||
61 | struct tx4927_sdramc_reg { | 51 | struct tx4927_sdramc_reg { |
62 | volatile unsigned long long cr[4]; | 52 | volatile unsigned long long cr[4]; |
63 | volatile unsigned long long unused0[4]; | 53 | volatile unsigned long long unused0[4]; |
@@ -224,5 +214,6 @@ static inline void tx4927_ccfg_change(__u64 change, __u64 new) | |||
224 | 214 | ||
225 | int tx4927_report_pciclk(void); | 215 | int tx4927_report_pciclk(void); |
226 | int tx4927_pciclk66_setup(void); | 216 | int tx4927_pciclk66_setup(void); |
217 | void tx4927_irq_init(void); | ||
227 | 218 | ||
228 | #endif /* __ASM_TXX9_TX4927_H */ | 219 | #endif /* __ASM_TXX9_TX4927_H */ |
diff --git a/include/asm-mips/txx9/tx4938.h b/include/asm-mips/txx9/tx4938.h index 0bb891993b08..12de68a4c10a 100644 --- a/include/asm-mips/txx9/tx4938.h +++ b/include/asm-mips/txx9/tx4938.h | |||
@@ -18,11 +18,6 @@ | |||
18 | #define tx4938_read_nfmc(addr) (*(volatile unsigned int *)(addr)) | 18 | #define tx4938_read_nfmc(addr) (*(volatile unsigned int *)(addr)) |
19 | #define tx4938_write_nfmc(b, addr) (*(volatile unsigned int *)(addr)) = (b) | 19 | #define tx4938_write_nfmc(b, addr) (*(volatile unsigned int *)(addr)) = (b) |
20 | 20 | ||
21 | #define TX4938_NR_IRQ_LOCAL TX4938_IRQ_PIC_BEG | ||
22 | |||
23 | #define TX4938_IRQ_IRC_PCIC (TX4938_NR_IRQ_LOCAL + TX4938_IR_PCIC) | ||
24 | #define TX4938_IRQ_IRC_PCIERR (TX4938_NR_IRQ_LOCAL + TX4938_IR_PCIERR) | ||
25 | |||
26 | #define TX4938_PCIIO_0 0x10000000 | 21 | #define TX4938_PCIIO_0 0x10000000 |
27 | #define TX4938_PCIIO_1 0x01010000 | 22 | #define TX4938_PCIIO_1 0x01010000 |
28 | #define TX4938_PCIMEM_0 0x08000000 | 23 | #define TX4938_PCIMEM_0 0x08000000 |
@@ -271,6 +266,8 @@ struct tx4938_ccfg_reg { | |||
271 | #define TX4938_IR_ETH0 TX4938_IR_INT(4) | 266 | #define TX4938_IR_ETH0 TX4938_IR_INT(4) |
272 | #define TX4938_IR_ETH1 TX4938_IR_INT(3) | 267 | #define TX4938_IR_ETH1 TX4938_IR_INT(3) |
273 | 268 | ||
269 | #define TX4938_IRC_INT 2 /* IP[2] in Status register */ | ||
270 | |||
274 | /* | 271 | /* |
275 | * CCFG | 272 | * CCFG |
276 | */ | 273 | */ |
@@ -463,5 +460,6 @@ void tx4938_report_pci1clk(void); | |||
463 | int tx4938_pciclk66_setup(void); | 460 | int tx4938_pciclk66_setup(void); |
464 | struct pci_dev; | 461 | struct pci_dev; |
465 | int tx4938_pcic1_map_irq(const struct pci_dev *dev, u8 slot); | 462 | int tx4938_pcic1_map_irq(const struct pci_dev *dev, u8 slot); |
463 | void tx4938_irq_init(void); | ||
466 | 464 | ||
467 | #endif | 465 | #endif |