aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
-rw-r--r--arch/i386/mm/pageattr.c30
-rw-r--r--arch/x86_64/mm/pageattr.c7
2 files changed, 22 insertions, 15 deletions
diff --git a/arch/i386/mm/pageattr.c b/arch/i386/mm/pageattr.c
index 47bd477c8ecc..2eb14a73be9c 100644
--- a/arch/i386/mm/pageattr.c
+++ b/arch/i386/mm/pageattr.c
@@ -68,14 +68,23 @@ static struct page *split_large_page(unsigned long address, pgprot_t prot,
68 return base; 68 return base;
69} 69}
70 70
71static void flush_kernel_map(void *arg) 71static void cache_flush_page(struct page *p)
72{ 72{
73 unsigned long adr = (unsigned long)arg; 73 unsigned long adr = (unsigned long)page_address(p);
74 int i;
75 for (i = 0; i < PAGE_SIZE; i += boot_cpu_data.x86_clflush_size)
76 asm volatile("clflush (%0)" :: "r" (adr + i));
77}
78
79static void flush_kernel_map(void *arg)
80{
81 struct list_head *lh = (struct list_head *)arg;
82 struct page *p;
74 83
75 if (adr && cpu_has_clflush) { 84 /* High level code is not ready for clflush yet */
76 int i; 85 if (0 && cpu_has_clflush) {
77 for (i = 0; i < PAGE_SIZE; i += boot_cpu_data.x86_clflush_size) 86 list_for_each_entry (p, lh, lru)
78 asm volatile("clflush (%0)" :: "r" (adr + i)); 87 cache_flush_page(p);
79 } else if (boot_cpu_data.x86_model >= 4) 88 } else if (boot_cpu_data.x86_model >= 4)
80 wbinvd(); 89 wbinvd();
81 90
@@ -181,9 +190,9 @@ __change_page_attr(struct page *page, pgprot_t prot)
181 return 0; 190 return 0;
182} 191}
183 192
184static inline void flush_map(void *adr) 193static inline void flush_map(struct list_head *l)
185{ 194{
186 on_each_cpu(flush_kernel_map, adr, 1, 1); 195 on_each_cpu(flush_kernel_map, l, 1, 1);
187} 196}
188 197
189/* 198/*
@@ -225,11 +234,8 @@ void global_flush_tlb(void)
225 spin_lock_irq(&cpa_lock); 234 spin_lock_irq(&cpa_lock);
226 list_replace_init(&df_list, &l); 235 list_replace_init(&df_list, &l);
227 spin_unlock_irq(&cpa_lock); 236 spin_unlock_irq(&cpa_lock);
228 if (!cpu_has_clflush) 237 flush_map(&l);
229 flush_map(NULL);
230 list_for_each_entry_safe(pg, next, &l, lru) { 238 list_for_each_entry_safe(pg, next, &l, lru) {
231 if (cpu_has_clflush)
232 flush_map(page_address(pg));
233 __free_page(pg); 239 __free_page(pg);
234 } 240 }
235} 241}
diff --git a/arch/x86_64/mm/pageattr.c b/arch/x86_64/mm/pageattr.c
index d653d0bf3df6..9148f4a4cec6 100644
--- a/arch/x86_64/mm/pageattr.c
+++ b/arch/x86_64/mm/pageattr.c
@@ -74,10 +74,11 @@ static void flush_kernel_map(void *arg)
74 struct page *pg; 74 struct page *pg;
75 75
76 /* When clflush is available always use it because it is 76 /* When clflush is available always use it because it is
77 much cheaper than WBINVD */ 77 much cheaper than WBINVD. Disable clflush for now because
78 if (!cpu_has_clflush) 78 the high level code is not ready yet */
79 if (1 || !cpu_has_clflush)
79 asm volatile("wbinvd" ::: "memory"); 80 asm volatile("wbinvd" ::: "memory");
80 list_for_each_entry(pg, l, lru) { 81 else list_for_each_entry(pg, l, lru) {
81 void *adr = page_address(pg); 82 void *adr = page_address(pg);
82 if (cpu_has_clflush) 83 if (cpu_has_clflush)
83 cache_flush_page(adr); 84 cache_flush_page(adr);