diff options
-rw-r--r-- | arch/mips/au1000/common/dbdma.c | 2 | ||||
-rw-r--r-- | arch/mips/au1000/common/irq.c | 16 | ||||
-rw-r--r-- | arch/mips/au1000/pb1200/irqmap.c | 2 | ||||
-rw-r--r-- | arch/mips/oprofile/op_model_mipsxx.c | 44 | ||||
-rw-r--r-- | arch/mips/pci/pci-bcm1480.c | 5 | ||||
-rw-r--r-- | include/asm-mips/mach-au1x00/au1000.h | 21 |
6 files changed, 63 insertions, 27 deletions
diff --git a/arch/mips/au1000/common/dbdma.c b/arch/mips/au1000/common/dbdma.c index 9d6ad43fded6..edf91f41a786 100644 --- a/arch/mips/au1000/common/dbdma.c +++ b/arch/mips/au1000/common/dbdma.c | |||
@@ -859,7 +859,7 @@ dbdma_interrupt(int irq, void *dev_id) | |||
859 | 859 | ||
860 | intstat = dbdma_gptr->ddma_intstat; | 860 | intstat = dbdma_gptr->ddma_intstat; |
861 | au_sync(); | 861 | au_sync(); |
862 | chan_index = ffs(intstat); | 862 | chan_index = __ffs(intstat); |
863 | 863 | ||
864 | ctp = chan_tab_ptr[chan_index]; | 864 | ctp = chan_tab_ptr[chan_index]; |
865 | cp = ctp->chan_ptr; | 865 | cp = ctp->chan_ptr; |
diff --git a/arch/mips/au1000/common/irq.c b/arch/mips/au1000/common/irq.c index ddfb7f0a17a6..3c7714f057ac 100644 --- a/arch/mips/au1000/common/irq.c +++ b/arch/mips/au1000/common/irq.c | |||
@@ -462,9 +462,9 @@ static void intc0_req0_irqdispatch(void) | |||
462 | return; | 462 | return; |
463 | } | 463 | } |
464 | #endif | 464 | #endif |
465 | bit = ffs(intc0_req0); | 465 | bit = __ffs(intc0_req0); |
466 | intc0_req0 &= ~(1 << bit); | 466 | intc0_req0 &= ~(1 << bit); |
467 | do_IRQ(MIPS_CPU_IRQ_BASE + bit); | 467 | do_IRQ(AU1000_INTC0_INT_BASE + bit); |
468 | } | 468 | } |
469 | 469 | ||
470 | 470 | ||
@@ -478,9 +478,9 @@ static void intc0_req1_irqdispatch(void) | |||
478 | if (!intc0_req1) | 478 | if (!intc0_req1) |
479 | return; | 479 | return; |
480 | 480 | ||
481 | bit = ffs(intc0_req1); | 481 | bit = __ffs(intc0_req1); |
482 | intc0_req1 &= ~(1 << bit); | 482 | intc0_req1 &= ~(1 << bit); |
483 | do_IRQ(bit); | 483 | do_IRQ(AU1000_INTC0_INT_BASE + bit); |
484 | } | 484 | } |
485 | 485 | ||
486 | 486 | ||
@@ -498,9 +498,9 @@ static void intc1_req0_irqdispatch(void) | |||
498 | if (!intc1_req0) | 498 | if (!intc1_req0) |
499 | return; | 499 | return; |
500 | 500 | ||
501 | bit = ffs(intc1_req0); | 501 | bit = __ffs(intc1_req0); |
502 | intc1_req0 &= ~(1 << bit); | 502 | intc1_req0 &= ~(1 << bit); |
503 | do_IRQ(MIPS_CPU_IRQ_BASE + 32 + bit); | 503 | do_IRQ(AU1000_INTC1_INT_BASE + bit); |
504 | } | 504 | } |
505 | 505 | ||
506 | 506 | ||
@@ -514,9 +514,9 @@ static void intc1_req1_irqdispatch(void) | |||
514 | if (!intc1_req1) | 514 | if (!intc1_req1) |
515 | return; | 515 | return; |
516 | 516 | ||
517 | bit = ffs(intc1_req1); | 517 | bit = __ffs(intc1_req1); |
518 | intc1_req1 &= ~(1 << bit); | 518 | intc1_req1 &= ~(1 << bit); |
519 | do_IRQ(MIPS_CPU_IRQ_BASE + 32 + bit); | 519 | do_IRQ(AU1000_INTC1_INT_BASE + bit); |
520 | } | 520 | } |
521 | 521 | ||
522 | asmlinkage void plat_irq_dispatch(void) | 522 | asmlinkage void plat_irq_dispatch(void) |
diff --git a/arch/mips/au1000/pb1200/irqmap.c b/arch/mips/au1000/pb1200/irqmap.c index c096be4ed4e7..8fcd0df86f93 100644 --- a/arch/mips/au1000/pb1200/irqmap.c +++ b/arch/mips/au1000/pb1200/irqmap.c | |||
@@ -74,7 +74,7 @@ irqreturn_t pb1200_cascade_handler( int irq, void *dev_id) | |||
74 | bcsr->int_status = bisr; | 74 | bcsr->int_status = bisr; |
75 | for( ; bisr; bisr &= (bisr-1) ) | 75 | for( ; bisr; bisr &= (bisr-1) ) |
76 | { | 76 | { |
77 | extirq_nr = PB1200_INT_BEGIN + ffs(bisr); | 77 | extirq_nr = PB1200_INT_BEGIN + __ffs(bisr); |
78 | /* Ack and dispatch IRQ */ | 78 | /* Ack and dispatch IRQ */ |
79 | do_IRQ(extirq_nr); | 79 | do_IRQ(extirq_nr); |
80 | } | 80 | } |
diff --git a/arch/mips/oprofile/op_model_mipsxx.c b/arch/mips/oprofile/op_model_mipsxx.c index 423bc2c473df..bdfa07aecd97 100644 --- a/arch/mips/oprofile/op_model_mipsxx.c +++ b/arch/mips/oprofile/op_model_mipsxx.c | |||
@@ -6,6 +6,7 @@ | |||
6 | * Copyright (C) 2004, 05, 06 by Ralf Baechle | 6 | * Copyright (C) 2004, 05, 06 by Ralf Baechle |
7 | * Copyright (C) 2005 by MIPS Technologies, Inc. | 7 | * Copyright (C) 2005 by MIPS Technologies, Inc. |
8 | */ | 8 | */ |
9 | #include <linux/cpumask.h> | ||
9 | #include <linux/oprofile.h> | 10 | #include <linux/oprofile.h> |
10 | #include <linux/interrupt.h> | 11 | #include <linux/interrupt.h> |
11 | #include <linux/smp.h> | 12 | #include <linux/smp.h> |
@@ -33,11 +34,45 @@ | |||
33 | #ifdef CONFIG_MIPS_MT_SMP | 34 | #ifdef CONFIG_MIPS_MT_SMP |
34 | #define WHAT (M_TC_EN_VPE | M_PERFCTL_VPEID(smp_processor_id())) | 35 | #define WHAT (M_TC_EN_VPE | M_PERFCTL_VPEID(smp_processor_id())) |
35 | #define vpe_id() smp_processor_id() | 36 | #define vpe_id() smp_processor_id() |
37 | |||
38 | /* | ||
39 | * The number of bits to shift to convert between counters per core and | ||
40 | * counters per VPE. There is no reasonable interface atm to obtain the | ||
41 | * number of VPEs used by Linux and in the 34K this number is fixed to two | ||
42 | * anyways so we hardcore a few things here for the moment. The way it's | ||
43 | * done here will ensure that oprofile VSMP kernel will run right on a lesser | ||
44 | * core like a 24K also or with maxcpus=1. | ||
45 | */ | ||
46 | static inline unsigned int vpe_shift(void) | ||
47 | { | ||
48 | if (num_possible_cpus() > 1) | ||
49 | return 1; | ||
50 | |||
51 | return 0; | ||
52 | } | ||
53 | |||
36 | #else | 54 | #else |
55 | |||
37 | #define WHAT 0 | 56 | #define WHAT 0 |
38 | #define vpe_id() 0 | 57 | #define vpe_id() 0 |
58 | |||
59 | static inline unsigned int vpe_shift(void) | ||
60 | { | ||
61 | return 0; | ||
62 | } | ||
63 | |||
39 | #endif | 64 | #endif |
40 | 65 | ||
66 | static inline unsigned int counters_total_to_per_cpu(unsigned int counters) | ||
67 | { | ||
68 | return counters >> vpe_shift(); | ||
69 | } | ||
70 | |||
71 | static inline unsigned int counters_per_cpu_to_total(unsigned int counters) | ||
72 | { | ||
73 | return counters << vpe_shift(); | ||
74 | } | ||
75 | |||
41 | #define __define_perf_accessors(r, n, np) \ | 76 | #define __define_perf_accessors(r, n, np) \ |
42 | \ | 77 | \ |
43 | static inline unsigned int r_c0_ ## r ## n(void) \ | 78 | static inline unsigned int r_c0_ ## r ## n(void) \ |
@@ -269,9 +304,7 @@ static int __init mipsxx_init(void) | |||
269 | 304 | ||
270 | reset_counters(counters); | 305 | reset_counters(counters); |
271 | 306 | ||
272 | #ifdef CONFIG_MIPS_MT_SMP | 307 | counters = counters_total_to_per_cpu(counters); |
273 | counters >>= 1; | ||
274 | #endif | ||
275 | 308 | ||
276 | op_model_mipsxx_ops.num_counters = counters; | 309 | op_model_mipsxx_ops.num_counters = counters; |
277 | switch (current_cpu_type()) { | 310 | switch (current_cpu_type()) { |
@@ -330,9 +363,8 @@ static int __init mipsxx_init(void) | |||
330 | static void mipsxx_exit(void) | 363 | static void mipsxx_exit(void) |
331 | { | 364 | { |
332 | int counters = op_model_mipsxx_ops.num_counters; | 365 | int counters = op_model_mipsxx_ops.num_counters; |
333 | #ifdef CONFIG_MIPS_MT_SMP | 366 | |
334 | counters <<= 1; | 367 | counters = counters_per_cpu_to_total(counters); |
335 | #endif | ||
336 | reset_counters(counters); | 368 | reset_counters(counters); |
337 | 369 | ||
338 | perf_irq = null_perf_irq; | 370 | perf_irq = null_perf_irq; |
diff --git a/arch/mips/pci/pci-bcm1480.c b/arch/mips/pci/pci-bcm1480.c index bc647cb77298..47f316c86ab1 100644 --- a/arch/mips/pci/pci-bcm1480.c +++ b/arch/mips/pci/pci-bcm1480.c | |||
@@ -76,7 +76,10 @@ static inline void WRITECFG32(u32 addr, u32 data) | |||
76 | 76 | ||
77 | int pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) | 77 | int pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) |
78 | { | 78 | { |
79 | return K_BCM1480_INT_PCI_INTA + pin; | 79 | if (pin == 0) |
80 | return -1; | ||
81 | |||
82 | return K_BCM1480_INT_PCI_INTA - 1 + pin; | ||
80 | } | 83 | } |
81 | 84 | ||
82 | /* Do platform specific device initialization at pci_enable_device() time */ | 85 | /* Do platform specific device initialization at pci_enable_device() time */ |
diff --git a/include/asm-mips/mach-au1x00/au1000.h b/include/asm-mips/mach-au1x00/au1000.h index 3bdce9126f16..bf7701243d71 100644 --- a/include/asm-mips/mach-au1x00/au1000.h +++ b/include/asm-mips/mach-au1x00/au1000.h | |||
@@ -526,7 +526,7 @@ extern struct au1xxx_irqmap au1xxx_irq_map[]; | |||
526 | /* Au1000 */ | 526 | /* Au1000 */ |
527 | #ifdef CONFIG_SOC_AU1000 | 527 | #ifdef CONFIG_SOC_AU1000 |
528 | enum soc_au1000_ints { | 528 | enum soc_au1000_ints { |
529 | AU1000_FIRST_INT = MIPS_CPU_IRQ_BASE, | 529 | AU1000_FIRST_INT = MIPS_CPU_IRQ_BASE + 8, |
530 | AU1000_UART0_INT = AU1000_FIRST_INT, | 530 | AU1000_UART0_INT = AU1000_FIRST_INT, |
531 | AU1000_UART1_INT, /* au1000 */ | 531 | AU1000_UART1_INT, /* au1000 */ |
532 | AU1000_UART2_INT, /* au1000 */ | 532 | AU1000_UART2_INT, /* au1000 */ |
@@ -605,7 +605,7 @@ enum soc_au1000_ints { | |||
605 | /* Au1500 */ | 605 | /* Au1500 */ |
606 | #ifdef CONFIG_SOC_AU1500 | 606 | #ifdef CONFIG_SOC_AU1500 |
607 | enum soc_au1500_ints { | 607 | enum soc_au1500_ints { |
608 | AU1500_FIRST_INT = MIPS_CPU_IRQ_BASE, | 608 | AU1500_FIRST_INT = MIPS_CPU_IRQ_BASE + 8, |
609 | AU1500_UART0_INT = AU1500_FIRST_INT, | 609 | AU1500_UART0_INT = AU1500_FIRST_INT, |
610 | AU1000_PCI_INTA, /* au1500 */ | 610 | AU1000_PCI_INTA, /* au1500 */ |
611 | AU1000_PCI_INTB, /* au1500 */ | 611 | AU1000_PCI_INTB, /* au1500 */ |
@@ -686,7 +686,7 @@ enum soc_au1500_ints { | |||
686 | /* Au1100 */ | 686 | /* Au1100 */ |
687 | #ifdef CONFIG_SOC_AU1100 | 687 | #ifdef CONFIG_SOC_AU1100 |
688 | enum soc_au1100_ints { | 688 | enum soc_au1100_ints { |
689 | AU1100_FIRST_INT = MIPS_CPU_IRQ_BASE, | 689 | AU1100_FIRST_INT = MIPS_CPU_IRQ_BASE + 8, |
690 | AU1100_UART0_INT, | 690 | AU1100_UART0_INT, |
691 | AU1100_UART1_INT, | 691 | AU1100_UART1_INT, |
692 | AU1100_SD_INT, | 692 | AU1100_SD_INT, |
@@ -761,7 +761,7 @@ enum soc_au1100_ints { | |||
761 | 761 | ||
762 | #ifdef CONFIG_SOC_AU1550 | 762 | #ifdef CONFIG_SOC_AU1550 |
763 | enum soc_au1550_ints { | 763 | enum soc_au1550_ints { |
764 | AU1550_FIRST_INT = MIPS_CPU_IRQ_BASE, | 764 | AU1550_FIRST_INT = MIPS_CPU_IRQ_BASE + 8, |
765 | AU1550_UART0_INT = AU1550_FIRST_INT, | 765 | AU1550_UART0_INT = AU1550_FIRST_INT, |
766 | AU1550_PCI_INTA, | 766 | AU1550_PCI_INTA, |
767 | AU1550_PCI_INTB, | 767 | AU1550_PCI_INTB, |
@@ -851,7 +851,7 @@ enum soc_au1550_ints { | |||
851 | 851 | ||
852 | #ifdef CONFIG_SOC_AU1200 | 852 | #ifdef CONFIG_SOC_AU1200 |
853 | enum soc_au1200_ints { | 853 | enum soc_au1200_ints { |
854 | AU1200_FIRST_INT = MIPS_CPU_IRQ_BASE, | 854 | AU1200_FIRST_INT = MIPS_CPU_IRQ_BASE + 8, |
855 | AU1200_UART0_INT = AU1200_FIRST_INT, | 855 | AU1200_UART0_INT = AU1200_FIRST_INT, |
856 | AU1200_SWT_INT, | 856 | AU1200_SWT_INT, |
857 | AU1200_SD_INT, | 857 | AU1200_SD_INT, |
@@ -948,11 +948,12 @@ enum soc_au1200_ints { | |||
948 | 948 | ||
949 | #endif /* CONFIG_SOC_AU1200 */ | 949 | #endif /* CONFIG_SOC_AU1200 */ |
950 | 950 | ||
951 | #define AU1000_INTC0_INT_BASE (MIPS_CPU_IRQ_BASE + 0) | 951 | #define AU1000_INTC0_INT_BASE (MIPS_CPU_IRQ_BASE + 8) |
952 | #define AU1000_INTC0_INT_LAST (MIPS_CPU_IRQ_BASE + 31) | 952 | #define AU1000_INTC0_INT_LAST (AU1000_INTC0_INT_BASE + 31) |
953 | #define AU1000_INTC1_INT_BASE (MIPS_CPU_IRQ_BASE + 32) | 953 | #define AU1000_INTC1_INT_BASE (AU1000_INTC0_INT_BASE + 32) |
954 | #define AU1000_INTC1_INT_LAST (MIPS_CPU_IRQ_BASE + 63) | 954 | #define AU1000_INTC1_INT_LAST (AU1000_INTC1_INT_BASE + 31) |
955 | #define AU1000_MAX_INTR (MIPS_CPU_IRQ_BASE + 63) | 955 | |
956 | #define AU1000_MAX_INTR AU1000_INTC1_INT_LAST | ||
956 | #define INTX 0xFF /* not valid */ | 957 | #define INTX 0xFF /* not valid */ |
957 | 958 | ||
958 | /* Programmable Counters 0 and 1 */ | 959 | /* Programmable Counters 0 and 1 */ |