aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
-rw-r--r--arch/mips/bcm47xx/time.c7
-rw-r--r--arch/mips/emma2rh/markeins/setup.c6
-rw-r--r--arch/mips/lemote/lm2e/setup.c5
-rw-r--r--arch/mips/pmc-sierra/msp71xx/msp_time.c3
-rw-r--r--arch/mips/pmc-sierra/yosemite/setup.c5
-rw-r--r--arch/mips/sni/time.c18
-rw-r--r--arch/mips/tx4927/common/tx4927_setup.c16
-rw-r--r--arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_setup.c10
-rw-r--r--arch/mips/tx4938/common/setup.c5
-rw-r--r--arch/mips/vr41xx/common/init.c5
-rw-r--r--include/asm-mips/sni.h2
11 files changed, 0 insertions, 82 deletions
diff --git a/arch/mips/bcm47xx/time.c b/arch/mips/bcm47xx/time.c
index 0ab4676c8bd3..0c6f47b3fd94 100644
--- a/arch/mips/bcm47xx/time.c
+++ b/arch/mips/bcm47xx/time.c
@@ -46,10 +46,3 @@ void __init plat_time_init(void)
46 /* Set MIPS counter frequency for fixed_rate_gettimeoffset() */ 46 /* Set MIPS counter frequency for fixed_rate_gettimeoffset() */
47 mips_hpt_frequency = hz; 47 mips_hpt_frequency = hz;
48} 48}
49
50void __init
51plat_timer_setup(struct irqaction *irq)
52{
53 /* Enable the timer interrupt */
54 setup_irq(7, irq);
55}
diff --git a/arch/mips/emma2rh/markeins/setup.c b/arch/mips/emma2rh/markeins/setup.c
index 5e1da53b04a7..82f9e9013e70 100644
--- a/arch/mips/emma2rh/markeins/setup.c
+++ b/arch/mips/emma2rh/markeins/setup.c
@@ -104,12 +104,6 @@ void __init plat_time_init(void)
104 mips_hpt_frequency = (bus_frequency * (4 + reg)) / 4 / 2; 104 mips_hpt_frequency = (bus_frequency * (4 + reg)) / 4 / 2;
105} 105}
106 106
107void __init plat_timer_setup(struct irqaction *irq)
108{
109 /* we are using the cpu counter for timer interrupts */
110 setup_irq(CPU_IRQ_BASE + 7, irq);
111}
112
113static void markeins_board_init(void); 107static void markeins_board_init(void);
114extern void markeins_irq_setup(void); 108extern void markeins_irq_setup(void);
115 109
diff --git a/arch/mips/lemote/lm2e/setup.c b/arch/mips/lemote/lm2e/setup.c
index 09314a20f9fb..2cc6745991ab 100644
--- a/arch/mips/lemote/lm2e/setup.c
+++ b/arch/mips/lemote/lm2e/setup.c
@@ -53,11 +53,6 @@ unsigned long bus_clock;
53unsigned int memsize; 53unsigned int memsize;
54unsigned int highmemsize = 0; 54unsigned int highmemsize = 0;
55 55
56void __init plat_timer_setup(struct irqaction *irq)
57{
58 setup_irq(MIPS_CPU_IRQ_BASE + 7, irq);
59}
60
61void __init plat_time_init(void) 56void __init plat_time_init(void)
62{ 57{
63 /* setup mips r4k timer */ 58 /* setup mips r4k timer */
diff --git a/arch/mips/pmc-sierra/msp71xx/msp_time.c b/arch/mips/pmc-sierra/msp71xx/msp_time.c
index f221d4763625..7cfeda5a651b 100644
--- a/arch/mips/pmc-sierra/msp71xx/msp_time.c
+++ b/arch/mips/pmc-sierra/msp71xx/msp_time.c
@@ -86,8 +86,5 @@ void __init plat_timer_setup(struct irqaction *irq)
86#ifdef CONFIG_IRQ_MSP_CIC 86#ifdef CONFIG_IRQ_MSP_CIC
87 /* we are using the vpe0 counter for timer interrupts */ 87 /* we are using the vpe0 counter for timer interrupts */
88 setup_irq(MSP_INT_VPE0_TIMER, irq); 88 setup_irq(MSP_INT_VPE0_TIMER, irq);
89#else
90 /* we are using the mips counter for timer interrupts */
91 setup_irq(MSP_INT_TIMER, irq);
92#endif 89#endif
93} 90}
diff --git a/arch/mips/pmc-sierra/yosemite/setup.c b/arch/mips/pmc-sierra/yosemite/setup.c
index 015fcc363dc0..855977ca51cd 100644
--- a/arch/mips/pmc-sierra/yosemite/setup.c
+++ b/arch/mips/pmc-sierra/yosemite/setup.c
@@ -137,11 +137,6 @@ int rtc_mips_set_time(unsigned long tim)
137 return 0; 137 return 0;
138} 138}
139 139
140void __init plat_timer_setup(struct irqaction *irq)
141{
142 setup_irq(7, irq);
143}
144
145void __init plat_time_init(void) 140void __init plat_time_init(void)
146{ 141{
147 mips_hpt_frequency = cpu_clock_freq / 2; 142 mips_hpt_frequency = cpu_clock_freq / 2;
diff --git a/arch/mips/sni/time.c b/arch/mips/sni/time.c
index b80877349d38..0910b35cb71f 100644
--- a/arch/mips/sni/time.c
+++ b/arch/mips/sni/time.c
@@ -121,15 +121,6 @@ void __init plat_time_init(void)
121 setup_pit_timer(); 121 setup_pit_timer();
122} 122}
123 123
124/*
125 * R4k counter based timer interrupt. Works on RM200-225 and possibly
126 * others but not on RM400
127 */
128static void __init sni_cpu_timer_setup(struct irqaction *irq)
129{
130 setup_irq(SNI_MIPS_IRQ_CPU_TIMER, irq);
131}
132
133void __init plat_timer_setup(struct irqaction *irq) 124void __init plat_timer_setup(struct irqaction *irq)
134{ 125{
135 switch (sni_brd_type) { 126 switch (sni_brd_type) {
@@ -139,15 +130,6 @@ void __init plat_timer_setup(struct irqaction *irq)
139 case SNI_BRD_MINITOWER: 130 case SNI_BRD_MINITOWER:
140 sni_a20r_timer_setup(irq); 131 sni_a20r_timer_setup(irq);
141 break; 132 break;
142
143 case SNI_BRD_PCI_TOWER:
144 case SNI_BRD_RM200:
145 case SNI_BRD_PCI_MTOWER:
146 case SNI_BRD_PCI_DESKTOP:
147 case SNI_BRD_PCI_TOWER_CPLUS:
148 case SNI_BRD_PCI_MTOWER_CPLUS:
149 sni_cpu_timer_setup(irq);
150 break;
151 } 133 }
152} 134}
153 135
diff --git a/arch/mips/tx4927/common/tx4927_setup.c b/arch/mips/tx4927/common/tx4927_setup.c
index 8ce0989671d8..36c5f200eb3d 100644
--- a/arch/mips/tx4927/common/tx4927_setup.c
+++ b/arch/mips/tx4927/common/tx4927_setup.c
@@ -72,22 +72,6 @@ void __init plat_time_init(void)
72#endif 72#endif
73} 73}
74 74
75void __init plat_timer_setup(struct irqaction *irq)
76{
77 setup_irq(TX4927_IRQ_CPU_TIMER, irq);
78
79#ifdef CONFIG_TOSHIBA_RBTX4927
80 {
81 extern void toshiba_rbtx4927_timer_setup(struct irqaction
82 *irq);
83 toshiba_rbtx4927_timer_setup(irq);
84 }
85#endif
86
87 return;
88}
89
90
91#ifdef DEBUG 75#ifdef DEBUG
92void print_cp0(char *key, int num, char *name, u32 val) 76void print_cp0(char *key, int num, char *name, u32 val)
93{ 77{
diff --git a/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_setup.c b/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_setup.c
index b97102a1c635..c7470fba6180 100644
--- a/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_setup.c
+++ b/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_setup.c
@@ -94,7 +94,6 @@
94#define TOSHIBA_RBTX4927_SETUP_EFWFU ( 1 << 3 ) 94#define TOSHIBA_RBTX4927_SETUP_EFWFU ( 1 << 3 )
95#define TOSHIBA_RBTX4927_SETUP_SETUP ( 1 << 4 ) 95#define TOSHIBA_RBTX4927_SETUP_SETUP ( 1 << 4 )
96#define TOSHIBA_RBTX4927_SETUP_TIME_INIT ( 1 << 5 ) 96#define TOSHIBA_RBTX4927_SETUP_TIME_INIT ( 1 << 5 )
97#define TOSHIBA_RBTX4927_SETUP_TIMER_SETUP ( 1 << 6 )
98#define TOSHIBA_RBTX4927_SETUP_PCIBIOS ( 1 << 7 ) 97#define TOSHIBA_RBTX4927_SETUP_PCIBIOS ( 1 << 7 )
99#define TOSHIBA_RBTX4927_SETUP_PCI1 ( 1 << 8 ) 98#define TOSHIBA_RBTX4927_SETUP_PCI1 ( 1 << 8 )
100#define TOSHIBA_RBTX4927_SETUP_PCI2 ( 1 << 9 ) 99#define TOSHIBA_RBTX4927_SETUP_PCI2 ( 1 << 9 )
@@ -108,7 +107,6 @@ static const u32 toshiba_rbtx4927_setup_debug_flag =
108 (TOSHIBA_RBTX4927_SETUP_NONE | TOSHIBA_RBTX4927_SETUP_INFO | 107 (TOSHIBA_RBTX4927_SETUP_NONE | TOSHIBA_RBTX4927_SETUP_INFO |
109 TOSHIBA_RBTX4927_SETUP_WARN | TOSHIBA_RBTX4927_SETUP_EROR | 108 TOSHIBA_RBTX4927_SETUP_WARN | TOSHIBA_RBTX4927_SETUP_EROR |
110 TOSHIBA_RBTX4927_SETUP_EFWFU | TOSHIBA_RBTX4927_SETUP_SETUP | 109 TOSHIBA_RBTX4927_SETUP_EFWFU | TOSHIBA_RBTX4927_SETUP_SETUP |
111 TOSHIBA_RBTX4927_SETUP_TIME_INIT | TOSHIBA_RBTX4927_SETUP_TIMER_SETUP
112 | TOSHIBA_RBTX4927_SETUP_PCIBIOS | TOSHIBA_RBTX4927_SETUP_PCI1 | 110 | TOSHIBA_RBTX4927_SETUP_PCIBIOS | TOSHIBA_RBTX4927_SETUP_PCI1 |
113 TOSHIBA_RBTX4927_SETUP_PCI2 | TOSHIBA_RBTX4927_SETUP_PCI66); 111 TOSHIBA_RBTX4927_SETUP_PCI2 | TOSHIBA_RBTX4927_SETUP_PCI66);
114#endif 112#endif
@@ -947,14 +945,6 @@ toshiba_rbtx4927_time_init(void)
947 945
948} 946}
949 947
950void __init toshiba_rbtx4927_timer_setup(struct irqaction *irq)
951{
952 TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_TIMER_SETUP,
953 "-\n");
954 TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_TIMER_SETUP,
955 "+\n");
956}
957
958static int __init toshiba_rbtx4927_rtc_init(void) 948static int __init toshiba_rbtx4927_rtc_init(void)
959{ 949{
960 static struct resource __initdata res = { 950 static struct resource __initdata res = {
diff --git a/arch/mips/tx4938/common/setup.c b/arch/mips/tx4938/common/setup.c
index ab4082267553..be3b88dd4c1f 100644
--- a/arch/mips/tx4938/common/setup.c
+++ b/arch/mips/tx4938/common/setup.c
@@ -43,8 +43,3 @@ plat_mem_setup(void)
43{ 43{
44 toshiba_rbtx4938_setup(); 44 toshiba_rbtx4938_setup();
45} 45}
46
47void __init plat_timer_setup(struct irqaction *irq)
48{
49 setup_irq(TX4938_IRQ_CPU_TIMER, irq);
50}
diff --git a/arch/mips/vr41xx/common/init.c b/arch/mips/vr41xx/common/init.c
index 407cec203b29..8d760df686c4 100644
--- a/arch/mips/vr41xx/common/init.c
+++ b/arch/mips/vr41xx/common/init.c
@@ -48,11 +48,6 @@ void __init plat_time_init(void)
48 mips_hpt_frequency = tclock / 4; 48 mips_hpt_frequency = tclock / 4;
49} 49}
50 50
51void __init plat_timer_setup(struct irqaction *irq)
52{
53 setup_irq(TIMER_IRQ, irq);
54}
55
56void __init plat_mem_setup(void) 51void __init plat_mem_setup(void)
57{ 52{
58 vr41xx_calculate_clock_frequency(); 53 vr41xx_calculate_clock_frequency();
diff --git a/include/asm-mips/sni.h b/include/asm-mips/sni.h
index 4d43dbb7f8b8..af081457f847 100644
--- a/include/asm-mips/sni.h
+++ b/include/asm-mips/sni.h
@@ -141,8 +141,6 @@ extern unsigned int sni_brd_type;
141#define A20R_PT_TIM0_ACK 0xbc050000 141#define A20R_PT_TIM0_ACK 0xbc050000
142#define A20R_PT_TIM1_ACK 0xbc060000 142#define A20R_PT_TIM1_ACK 0xbc060000
143 143
144#define SNI_MIPS_IRQ_CPU_TIMER (MIPS_CPU_IRQ_BASE+7)
145
146#define SNI_A20R_IRQ_BASE MIPS_CPU_IRQ_BASE 144#define SNI_A20R_IRQ_BASE MIPS_CPU_IRQ_BASE
147#define SNI_A20R_IRQ_TIMER (SNI_A20R_IRQ_BASE+5) 145#define SNI_A20R_IRQ_TIMER (SNI_A20R_IRQ_BASE+5)
148 146