diff options
-rw-r--r-- | arch/arm/boot/compressed/head.S | 2 | ||||
-rw-r--r-- | arch/arm/kernel/entry-armv.S | 5 | ||||
-rw-r--r-- | arch/arm/kernel/signal.c | 29 | ||||
-rw-r--r-- | arch/arm/kernel/signal.h | 2 | ||||
-rw-r--r-- | arch/arm/mach-ixp4xx/common.c | 3 | ||||
-rw-r--r-- | arch/arm/mach-omap1/clock.c | 44 | ||||
-rw-r--r-- | arch/arm/mach-omap1/clock.h | 168 | ||||
-rw-r--r-- | arch/arm/mach-omap1/serial.c | 6 | ||||
-rw-r--r-- | arch/arm/mach-omap2/clock.c | 32 | ||||
-rw-r--r-- | arch/arm/mach-omap2/clock.h | 12 | ||||
-rw-r--r-- | arch/arm/mach-omap2/serial.c | 12 | ||||
-rw-r--r-- | arch/arm/mach-omap2/timer-gp.c | 2 | ||||
-rw-r--r-- | arch/arm/plat-omap/clock.c | 41 | ||||
-rw-r--r-- | arch/arm/plat-omap/gpio.c | 6 | ||||
-rw-r--r-- | arch/arm/plat-omap/mcbsp.c | 12 | ||||
-rw-r--r-- | arch/arm/plat-omap/ocpi.c | 4 | ||||
-rw-r--r-- | drivers/serial/Kconfig | 2 | ||||
-rw-r--r-- | drivers/serial/at91_serial.c | 2 | ||||
-rw-r--r-- | include/asm-arm/arch-omap/clock.h | 2 | ||||
-rw-r--r-- | include/asm-arm/arch-pxa/pxa-regs.h | 14 |
20 files changed, 193 insertions, 207 deletions
diff --git a/arch/arm/boot/compressed/head.S b/arch/arm/boot/compressed/head.S index aaa47400eb9c..db3389d8e027 100644 --- a/arch/arm/boot/compressed/head.S +++ b/arch/arm/boot/compressed/head.S | |||
@@ -334,7 +334,7 @@ __setup_mmu: sub r3, r4, #16384 @ Page directory size | |||
334 | mov r1, #0x12 | 334 | mov r1, #0x12 |
335 | orr r1, r1, #3 << 10 | 335 | orr r1, r1, #3 << 10 |
336 | add r2, r3, #16384 | 336 | add r2, r3, #16384 |
337 | 1: cmp r1, r8 @ if virt > start of RAM | 337 | 1: cmp r1, r9 @ if virt > start of RAM |
338 | orrhs r1, r1, #0x0c @ set cacheable, bufferable | 338 | orrhs r1, r1, #0x0c @ set cacheable, bufferable |
339 | cmp r1, r10 @ if virt > end of RAM | 339 | cmp r1, r10 @ if virt > end of RAM |
340 | bichs r1, r1, #0x0c @ clear cacheable, bufferable | 340 | bichs r1, r1, #0x0c @ clear cacheable, bufferable |
diff --git a/arch/arm/kernel/entry-armv.S b/arch/arm/kernel/entry-armv.S index 874e6bb79405..d401d908c463 100644 --- a/arch/arm/kernel/entry-armv.S +++ b/arch/arm/kernel/entry-armv.S | |||
@@ -735,8 +735,11 @@ __kuser_cmpxchg: @ 0xffff0fc0 | |||
735 | * The kernel itself must perform the operation. | 735 | * The kernel itself must perform the operation. |
736 | * A special ghost syscall is used for that (see traps.c). | 736 | * A special ghost syscall is used for that (see traps.c). |
737 | */ | 737 | */ |
738 | stmfd sp!, {r7, lr} | ||
739 | mov r7, #0xff00 @ 0xfff0 into r7 for EABI | ||
740 | orr r7, r7, #0xf0 | ||
738 | swi #0x9ffff0 | 741 | swi #0x9ffff0 |
739 | mov pc, lr | 742 | ldmfd sp!, {r7, pc} |
740 | 743 | ||
741 | #elif __LINUX_ARM_ARCH__ < 6 | 744 | #elif __LINUX_ARM_ARCH__ < 6 |
742 | 745 | ||
diff --git a/arch/arm/kernel/signal.c b/arch/arm/kernel/signal.c index 765922bcf9e7..a0cd0a90a10d 100644 --- a/arch/arm/kernel/signal.c +++ b/arch/arm/kernel/signal.c | |||
@@ -30,15 +30,21 @@ | |||
30 | #define SWI_SYS_RT_SIGRETURN (0xef000000|(__NR_rt_sigreturn)) | 30 | #define SWI_SYS_RT_SIGRETURN (0xef000000|(__NR_rt_sigreturn)) |
31 | 31 | ||
32 | /* | 32 | /* |
33 | * With EABI, the syscall number has to be loaded into r7. | ||
34 | */ | ||
35 | #define MOV_R7_NR_SIGRETURN (0xe3a07000 | (__NR_sigreturn - __NR_SYSCALL_BASE)) | ||
36 | #define MOV_R7_NR_RT_SIGRETURN (0xe3a07000 | (__NR_rt_sigreturn - __NR_SYSCALL_BASE)) | ||
37 | |||
38 | /* | ||
33 | * For Thumb syscalls, we pass the syscall number via r7. We therefore | 39 | * For Thumb syscalls, we pass the syscall number via r7. We therefore |
34 | * need two 16-bit instructions. | 40 | * need two 16-bit instructions. |
35 | */ | 41 | */ |
36 | #define SWI_THUMB_SIGRETURN (0xdf00 << 16 | 0x2700 | (__NR_sigreturn - __NR_SYSCALL_BASE)) | 42 | #define SWI_THUMB_SIGRETURN (0xdf00 << 16 | 0x2700 | (__NR_sigreturn - __NR_SYSCALL_BASE)) |
37 | #define SWI_THUMB_RT_SIGRETURN (0xdf00 << 16 | 0x2700 | (__NR_rt_sigreturn - __NR_SYSCALL_BASE)) | 43 | #define SWI_THUMB_RT_SIGRETURN (0xdf00 << 16 | 0x2700 | (__NR_rt_sigreturn - __NR_SYSCALL_BASE)) |
38 | 44 | ||
39 | const unsigned long sigreturn_codes[4] = { | 45 | const unsigned long sigreturn_codes[7] = { |
40 | SWI_SYS_SIGRETURN, SWI_THUMB_SIGRETURN, | 46 | MOV_R7_NR_SIGRETURN, SWI_SYS_SIGRETURN, SWI_THUMB_SIGRETURN, |
41 | SWI_SYS_RT_SIGRETURN, SWI_THUMB_RT_SIGRETURN | 47 | MOV_R7_NR_RT_SIGRETURN, SWI_SYS_RT_SIGRETURN, SWI_THUMB_RT_SIGRETURN, |
42 | }; | 48 | }; |
43 | 49 | ||
44 | static int do_signal(sigset_t *oldset, struct pt_regs * regs, int syscall); | 50 | static int do_signal(sigset_t *oldset, struct pt_regs * regs, int syscall); |
@@ -189,7 +195,7 @@ struct aux_sigframe { | |||
189 | struct sigframe { | 195 | struct sigframe { |
190 | struct sigcontext sc; | 196 | struct sigcontext sc; |
191 | unsigned long extramask[_NSIG_WORDS-1]; | 197 | unsigned long extramask[_NSIG_WORDS-1]; |
192 | unsigned long retcode; | 198 | unsigned long retcode[2]; |
193 | struct aux_sigframe aux __attribute__((aligned(8))); | 199 | struct aux_sigframe aux __attribute__((aligned(8))); |
194 | }; | 200 | }; |
195 | 201 | ||
@@ -198,7 +204,7 @@ struct rt_sigframe { | |||
198 | void __user *puc; | 204 | void __user *puc; |
199 | struct siginfo info; | 205 | struct siginfo info; |
200 | struct ucontext uc; | 206 | struct ucontext uc; |
201 | unsigned long retcode; | 207 | unsigned long retcode[2]; |
202 | struct aux_sigframe aux __attribute__((aligned(8))); | 208 | struct aux_sigframe aux __attribute__((aligned(8))); |
203 | }; | 209 | }; |
204 | 210 | ||
@@ -436,12 +442,13 @@ setup_return(struct pt_regs *regs, struct k_sigaction *ka, | |||
436 | if (ka->sa.sa_flags & SA_RESTORER) { | 442 | if (ka->sa.sa_flags & SA_RESTORER) { |
437 | retcode = (unsigned long)ka->sa.sa_restorer; | 443 | retcode = (unsigned long)ka->sa.sa_restorer; |
438 | } else { | 444 | } else { |
439 | unsigned int idx = thumb; | 445 | unsigned int idx = thumb << 1; |
440 | 446 | ||
441 | if (ka->sa.sa_flags & SA_SIGINFO) | 447 | if (ka->sa.sa_flags & SA_SIGINFO) |
442 | idx += 2; | 448 | idx += 3; |
443 | 449 | ||
444 | if (__put_user(sigreturn_codes[idx], rc)) | 450 | if (__put_user(sigreturn_codes[idx], rc) || |
451 | __put_user(sigreturn_codes[idx+1], rc+1)) | ||
445 | return 1; | 452 | return 1; |
446 | 453 | ||
447 | if (cpsr & MODE32_BIT) { | 454 | if (cpsr & MODE32_BIT) { |
@@ -456,7 +463,7 @@ setup_return(struct pt_regs *regs, struct k_sigaction *ka, | |||
456 | * the return code written onto the stack. | 463 | * the return code written onto the stack. |
457 | */ | 464 | */ |
458 | flush_icache_range((unsigned long)rc, | 465 | flush_icache_range((unsigned long)rc, |
459 | (unsigned long)(rc + 1)); | 466 | (unsigned long)(rc + 2)); |
460 | 467 | ||
461 | retcode = ((unsigned long)rc) + thumb; | 468 | retcode = ((unsigned long)rc) + thumb; |
462 | } | 469 | } |
@@ -488,7 +495,7 @@ setup_frame(int usig, struct k_sigaction *ka, sigset_t *set, struct pt_regs *reg | |||
488 | } | 495 | } |
489 | 496 | ||
490 | if (err == 0) | 497 | if (err == 0) |
491 | err = setup_return(regs, ka, &frame->retcode, frame, usig); | 498 | err = setup_return(regs, ka, frame->retcode, frame, usig); |
492 | 499 | ||
493 | return err; | 500 | return err; |
494 | } | 501 | } |
@@ -522,7 +529,7 @@ setup_rt_frame(int usig, struct k_sigaction *ka, siginfo_t *info, | |||
522 | err |= __copy_to_user(&frame->uc.uc_sigmask, set, sizeof(*set)); | 529 | err |= __copy_to_user(&frame->uc.uc_sigmask, set, sizeof(*set)); |
523 | 530 | ||
524 | if (err == 0) | 531 | if (err == 0) |
525 | err = setup_return(regs, ka, &frame->retcode, frame, usig); | 532 | err = setup_return(regs, ka, frame->retcode, frame, usig); |
526 | 533 | ||
527 | if (err == 0) { | 534 | if (err == 0) { |
528 | /* | 535 | /* |
diff --git a/arch/arm/kernel/signal.h b/arch/arm/kernel/signal.h index 91d26faca62b..9991049c522d 100644 --- a/arch/arm/kernel/signal.h +++ b/arch/arm/kernel/signal.h | |||
@@ -9,4 +9,4 @@ | |||
9 | */ | 9 | */ |
10 | #define KERN_SIGRETURN_CODE 0xffff0500 | 10 | #define KERN_SIGRETURN_CODE 0xffff0500 |
11 | 11 | ||
12 | extern const unsigned long sigreturn_codes[4]; | 12 | extern const unsigned long sigreturn_codes[7]; |
diff --git a/arch/arm/mach-ixp4xx/common.c b/arch/arm/mach-ixp4xx/common.c index 6b393691d0e8..4bdc9d4526cd 100644 --- a/arch/arm/mach-ixp4xx/common.c +++ b/arch/arm/mach-ixp4xx/common.c | |||
@@ -333,6 +333,7 @@ static struct platform_device *ixp46x_devices[] __initdata = { | |||
333 | }; | 333 | }; |
334 | 334 | ||
335 | unsigned long ixp4xx_exp_bus_size; | 335 | unsigned long ixp4xx_exp_bus_size; |
336 | EXPORT_SYMBOL(ixp4xx_exp_bus_size); | ||
336 | 337 | ||
337 | void __init ixp4xx_sys_init(void) | 338 | void __init ixp4xx_sys_init(void) |
338 | { | 339 | { |
@@ -352,7 +353,7 @@ void __init ixp4xx_sys_init(void) | |||
352 | } | 353 | } |
353 | } | 354 | } |
354 | 355 | ||
355 | printk("IXP4xx: Using %uMiB expansion bus window size\n", | 356 | printk("IXP4xx: Using %luMiB expansion bus window size\n", |
356 | ixp4xx_exp_bus_size >> 20); | 357 | ixp4xx_exp_bus_size >> 20); |
357 | } | 358 | } |
358 | 359 | ||
diff --git a/arch/arm/mach-omap1/clock.c b/arch/arm/mach-omap1/clock.c index 9d862f86bba6..75110ba10424 100644 --- a/arch/arm/mach-omap1/clock.c +++ b/arch/arm/mach-omap1/clock.c | |||
@@ -50,10 +50,10 @@ static int omap1_clk_enable_dsp_domain(struct clk *clk) | |||
50 | { | 50 | { |
51 | int retval; | 51 | int retval; |
52 | 52 | ||
53 | retval = omap1_clk_use(&api_ck.clk); | 53 | retval = omap1_clk_enable(&api_ck.clk); |
54 | if (!retval) { | 54 | if (!retval) { |
55 | retval = omap1_clk_enable(clk); | 55 | retval = omap1_clk_enable_generic(clk); |
56 | omap1_clk_unuse(&api_ck.clk); | 56 | omap1_clk_disable(&api_ck.clk); |
57 | } | 57 | } |
58 | 58 | ||
59 | return retval; | 59 | return retval; |
@@ -61,9 +61,9 @@ static int omap1_clk_enable_dsp_domain(struct clk *clk) | |||
61 | 61 | ||
62 | static void omap1_clk_disable_dsp_domain(struct clk *clk) | 62 | static void omap1_clk_disable_dsp_domain(struct clk *clk) |
63 | { | 63 | { |
64 | if (omap1_clk_use(&api_ck.clk) == 0) { | 64 | if (omap1_clk_enable(&api_ck.clk) == 0) { |
65 | omap1_clk_disable(clk); | 65 | omap1_clk_disable_generic(clk); |
66 | omap1_clk_unuse(&api_ck.clk); | 66 | omap1_clk_disable(&api_ck.clk); |
67 | } | 67 | } |
68 | } | 68 | } |
69 | 69 | ||
@@ -72,7 +72,7 @@ static int omap1_clk_enable_uart_functional(struct clk *clk) | |||
72 | int ret; | 72 | int ret; |
73 | struct uart_clk *uclk; | 73 | struct uart_clk *uclk; |
74 | 74 | ||
75 | ret = omap1_clk_enable(clk); | 75 | ret = omap1_clk_enable_generic(clk); |
76 | if (ret == 0) { | 76 | if (ret == 0) { |
77 | /* Set smart idle acknowledgement mode */ | 77 | /* Set smart idle acknowledgement mode */ |
78 | uclk = (struct uart_clk *)clk; | 78 | uclk = (struct uart_clk *)clk; |
@@ -91,7 +91,7 @@ static void omap1_clk_disable_uart_functional(struct clk *clk) | |||
91 | uclk = (struct uart_clk *)clk; | 91 | uclk = (struct uart_clk *)clk; |
92 | omap_writeb((omap_readb(uclk->sysc_addr) & ~0x18), uclk->sysc_addr); | 92 | omap_writeb((omap_readb(uclk->sysc_addr) & ~0x18), uclk->sysc_addr); |
93 | 93 | ||
94 | omap1_clk_disable(clk); | 94 | omap1_clk_disable_generic(clk); |
95 | } | 95 | } |
96 | 96 | ||
97 | static void omap1_clk_allow_idle(struct clk *clk) | 97 | static void omap1_clk_allow_idle(struct clk *clk) |
@@ -230,9 +230,9 @@ static void omap1_ckctl_recalc_dsp_domain(struct clk * clk) | |||
230 | * Note that DSP_CKCTL virt addr = phys addr, so | 230 | * Note that DSP_CKCTL virt addr = phys addr, so |
231 | * we must use __raw_readw() instead of omap_readw(). | 231 | * we must use __raw_readw() instead of omap_readw(). |
232 | */ | 232 | */ |
233 | omap1_clk_use(&api_ck.clk); | 233 | omap1_clk_enable(&api_ck.clk); |
234 | dsor = 1 << (3 & (__raw_readw(DSP_CKCTL) >> clk->rate_offset)); | 234 | dsor = 1 << (3 & (__raw_readw(DSP_CKCTL) >> clk->rate_offset)); |
235 | omap1_clk_unuse(&api_ck.clk); | 235 | omap1_clk_disable(&api_ck.clk); |
236 | 236 | ||
237 | if (unlikely(clk->rate == clk->parent->rate / dsor)) | 237 | if (unlikely(clk->rate == clk->parent->rate / dsor)) |
238 | return; /* No change, quick exit */ | 238 | return; /* No change, quick exit */ |
@@ -412,12 +412,12 @@ static void omap1_init_ext_clk(struct clk * clk) | |||
412 | clk-> rate = 96000000 / dsor; | 412 | clk-> rate = 96000000 / dsor; |
413 | } | 413 | } |
414 | 414 | ||
415 | static int omap1_clk_use(struct clk *clk) | 415 | static int omap1_clk_enable(struct clk *clk) |
416 | { | 416 | { |
417 | int ret = 0; | 417 | int ret = 0; |
418 | if (clk->usecount++ == 0) { | 418 | if (clk->usecount++ == 0) { |
419 | if (likely(clk->parent)) { | 419 | if (likely(clk->parent)) { |
420 | ret = omap1_clk_use(clk->parent); | 420 | ret = omap1_clk_enable(clk->parent); |
421 | 421 | ||
422 | if (unlikely(ret != 0)) { | 422 | if (unlikely(ret != 0)) { |
423 | clk->usecount--; | 423 | clk->usecount--; |
@@ -432,7 +432,7 @@ static int omap1_clk_use(struct clk *clk) | |||
432 | ret = clk->enable(clk); | 432 | ret = clk->enable(clk); |
433 | 433 | ||
434 | if (unlikely(ret != 0) && clk->parent) { | 434 | if (unlikely(ret != 0) && clk->parent) { |
435 | omap1_clk_unuse(clk->parent); | 435 | omap1_clk_disable(clk->parent); |
436 | clk->usecount--; | 436 | clk->usecount--; |
437 | } | 437 | } |
438 | } | 438 | } |
@@ -440,12 +440,12 @@ static int omap1_clk_use(struct clk *clk) | |||
440 | return ret; | 440 | return ret; |
441 | } | 441 | } |
442 | 442 | ||
443 | static void omap1_clk_unuse(struct clk *clk) | 443 | static void omap1_clk_disable(struct clk *clk) |
444 | { | 444 | { |
445 | if (clk->usecount > 0 && !(--clk->usecount)) { | 445 | if (clk->usecount > 0 && !(--clk->usecount)) { |
446 | clk->disable(clk); | 446 | clk->disable(clk); |
447 | if (likely(clk->parent)) { | 447 | if (likely(clk->parent)) { |
448 | omap1_clk_unuse(clk->parent); | 448 | omap1_clk_disable(clk->parent); |
449 | if (clk->flags & CLOCK_NO_IDLE_PARENT) | 449 | if (clk->flags & CLOCK_NO_IDLE_PARENT) |
450 | if (!cpu_is_omap24xx()) | 450 | if (!cpu_is_omap24xx()) |
451 | omap1_clk_allow_idle(clk->parent); | 451 | omap1_clk_allow_idle(clk->parent); |
@@ -453,7 +453,7 @@ static void omap1_clk_unuse(struct clk *clk) | |||
453 | } | 453 | } |
454 | } | 454 | } |
455 | 455 | ||
456 | static int omap1_clk_enable(struct clk *clk) | 456 | static int omap1_clk_enable_generic(struct clk *clk) |
457 | { | 457 | { |
458 | __u16 regval16; | 458 | __u16 regval16; |
459 | __u32 regval32; | 459 | __u32 regval32; |
@@ -492,7 +492,7 @@ static int omap1_clk_enable(struct clk *clk) | |||
492 | return 0; | 492 | return 0; |
493 | } | 493 | } |
494 | 494 | ||
495 | static void omap1_clk_disable(struct clk *clk) | 495 | static void omap1_clk_disable_generic(struct clk *clk) |
496 | { | 496 | { |
497 | __u16 regval16; | 497 | __u16 regval16; |
498 | __u32 regval32; | 498 | __u32 regval32; |
@@ -654,8 +654,8 @@ late_initcall(omap1_late_clk_reset); | |||
654 | #endif | 654 | #endif |
655 | 655 | ||
656 | static struct clk_functions omap1_clk_functions = { | 656 | static struct clk_functions omap1_clk_functions = { |
657 | .clk_use = omap1_clk_use, | 657 | .clk_enable = omap1_clk_enable, |
658 | .clk_unuse = omap1_clk_unuse, | 658 | .clk_disable = omap1_clk_disable, |
659 | .clk_round_rate = omap1_clk_round_rate, | 659 | .clk_round_rate = omap1_clk_round_rate, |
660 | .clk_set_rate = omap1_clk_set_rate, | 660 | .clk_set_rate = omap1_clk_set_rate, |
661 | }; | 661 | }; |
@@ -780,9 +780,9 @@ int __init omap1_clk_init(void) | |||
780 | * Only enable those clocks we will need, let the drivers | 780 | * Only enable those clocks we will need, let the drivers |
781 | * enable other clocks as necessary | 781 | * enable other clocks as necessary |
782 | */ | 782 | */ |
783 | clk_use(&armper_ck.clk); | 783 | clk_enable(&armper_ck.clk); |
784 | clk_use(&armxor_ck.clk); | 784 | clk_enable(&armxor_ck.clk); |
785 | clk_use(&armtim_ck.clk); /* This should be done by timer code */ | 785 | clk_enable(&armtim_ck.clk); /* This should be done by timer code */ |
786 | 786 | ||
787 | if (cpu_is_omap1510()) | 787 | if (cpu_is_omap1510()) |
788 | clk_enable(&arm_gpio_ck); | 788 | clk_enable(&arm_gpio_ck); |
diff --git a/arch/arm/mach-omap1/clock.h b/arch/arm/mach-omap1/clock.h index f3bdfb50e01a..4f18d1b94449 100644 --- a/arch/arm/mach-omap1/clock.h +++ b/arch/arm/mach-omap1/clock.h | |||
@@ -13,8 +13,8 @@ | |||
13 | #ifndef __ARCH_ARM_MACH_OMAP1_CLOCK_H | 13 | #ifndef __ARCH_ARM_MACH_OMAP1_CLOCK_H |
14 | #define __ARCH_ARM_MACH_OMAP1_CLOCK_H | 14 | #define __ARCH_ARM_MACH_OMAP1_CLOCK_H |
15 | 15 | ||
16 | static int omap1_clk_enable(struct clk * clk); | 16 | static int omap1_clk_enable_generic(struct clk * clk); |
17 | static void omap1_clk_disable(struct clk * clk); | 17 | static void omap1_clk_disable_generic(struct clk * clk); |
18 | static void omap1_ckctl_recalc(struct clk * clk); | 18 | static void omap1_ckctl_recalc(struct clk * clk); |
19 | static void omap1_watchdog_recalc(struct clk * clk); | 19 | static void omap1_watchdog_recalc(struct clk * clk); |
20 | static void omap1_ckctl_recalc_dsp_domain(struct clk * clk); | 20 | static void omap1_ckctl_recalc_dsp_domain(struct clk * clk); |
@@ -30,8 +30,8 @@ static long omap1_round_ext_clk_rate(struct clk * clk, unsigned long rate); | |||
30 | static void omap1_init_ext_clk(struct clk * clk); | 30 | static void omap1_init_ext_clk(struct clk * clk); |
31 | static int omap1_select_table_rate(struct clk * clk, unsigned long rate); | 31 | static int omap1_select_table_rate(struct clk * clk, unsigned long rate); |
32 | static long omap1_round_to_table_rate(struct clk * clk, unsigned long rate); | 32 | static long omap1_round_to_table_rate(struct clk * clk, unsigned long rate); |
33 | static int omap1_clk_use(struct clk *clk); | 33 | static int omap1_clk_enable(struct clk *clk); |
34 | static void omap1_clk_unuse(struct clk *clk); | 34 | static void omap1_clk_disable(struct clk *clk); |
35 | 35 | ||
36 | struct mpu_rate { | 36 | struct mpu_rate { |
37 | unsigned long rate; | 37 | unsigned long rate; |
@@ -152,8 +152,8 @@ static struct clk ck_ref = { | |||
152 | .rate = 12000000, | 152 | .rate = 12000000, |
153 | .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | | 153 | .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | |
154 | ALWAYS_ENABLED, | 154 | ALWAYS_ENABLED, |
155 | .enable = &omap1_clk_enable, | 155 | .enable = &omap1_clk_enable_generic, |
156 | .disable = &omap1_clk_disable, | 156 | .disable = &omap1_clk_disable_generic, |
157 | }; | 157 | }; |
158 | 158 | ||
159 | static struct clk ck_dpll1 = { | 159 | static struct clk ck_dpll1 = { |
@@ -161,8 +161,8 @@ static struct clk ck_dpll1 = { | |||
161 | .parent = &ck_ref, | 161 | .parent = &ck_ref, |
162 | .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | | 162 | .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | |
163 | RATE_PROPAGATES | ALWAYS_ENABLED, | 163 | RATE_PROPAGATES | ALWAYS_ENABLED, |
164 | .enable = &omap1_clk_enable, | 164 | .enable = &omap1_clk_enable_generic, |
165 | .disable = &omap1_clk_disable, | 165 | .disable = &omap1_clk_disable_generic, |
166 | }; | 166 | }; |
167 | 167 | ||
168 | static struct arm_idlect1_clk ck_dpll1out = { | 168 | static struct arm_idlect1_clk ck_dpll1out = { |
@@ -173,8 +173,8 @@ static struct arm_idlect1_clk ck_dpll1out = { | |||
173 | .enable_reg = (void __iomem *)ARM_IDLECT2, | 173 | .enable_reg = (void __iomem *)ARM_IDLECT2, |
174 | .enable_bit = EN_CKOUT_ARM, | 174 | .enable_bit = EN_CKOUT_ARM, |
175 | .recalc = &followparent_recalc, | 175 | .recalc = &followparent_recalc, |
176 | .enable = &omap1_clk_enable, | 176 | .enable = &omap1_clk_enable_generic, |
177 | .disable = &omap1_clk_disable, | 177 | .disable = &omap1_clk_disable_generic, |
178 | }, | 178 | }, |
179 | .idlect_shift = 12, | 179 | .idlect_shift = 12, |
180 | }; | 180 | }; |
@@ -186,8 +186,8 @@ static struct clk arm_ck = { | |||
186 | RATE_CKCTL | RATE_PROPAGATES | ALWAYS_ENABLED, | 186 | RATE_CKCTL | RATE_PROPAGATES | ALWAYS_ENABLED, |
187 | .rate_offset = CKCTL_ARMDIV_OFFSET, | 187 | .rate_offset = CKCTL_ARMDIV_OFFSET, |
188 | .recalc = &omap1_ckctl_recalc, | 188 | .recalc = &omap1_ckctl_recalc, |
189 | .enable = &omap1_clk_enable, | 189 | .enable = &omap1_clk_enable_generic, |
190 | .disable = &omap1_clk_disable, | 190 | .disable = &omap1_clk_disable_generic, |
191 | }; | 191 | }; |
192 | 192 | ||
193 | static struct arm_idlect1_clk armper_ck = { | 193 | static struct arm_idlect1_clk armper_ck = { |
@@ -200,8 +200,8 @@ static struct arm_idlect1_clk armper_ck = { | |||
200 | .enable_bit = EN_PERCK, | 200 | .enable_bit = EN_PERCK, |
201 | .rate_offset = CKCTL_PERDIV_OFFSET, | 201 | .rate_offset = CKCTL_PERDIV_OFFSET, |
202 | .recalc = &omap1_ckctl_recalc, | 202 | .recalc = &omap1_ckctl_recalc, |
203 | .enable = &omap1_clk_enable, | 203 | .enable = &omap1_clk_enable_generic, |
204 | .disable = &omap1_clk_disable, | 204 | .disable = &omap1_clk_disable_generic, |
205 | }, | 205 | }, |
206 | .idlect_shift = 2, | 206 | .idlect_shift = 2, |
207 | }; | 207 | }; |
@@ -213,8 +213,8 @@ static struct clk arm_gpio_ck = { | |||
213 | .enable_reg = (void __iomem *)ARM_IDLECT2, | 213 | .enable_reg = (void __iomem *)ARM_IDLECT2, |
214 | .enable_bit = EN_GPIOCK, | 214 | .enable_bit = EN_GPIOCK, |
215 | .recalc = &followparent_recalc, | 215 | .recalc = &followparent_recalc, |
216 | .enable = &omap1_clk_enable, | 216 | .enable = &omap1_clk_enable_generic, |
217 | .disable = &omap1_clk_disable, | 217 | .disable = &omap1_clk_disable_generic, |
218 | }; | 218 | }; |
219 | 219 | ||
220 | static struct arm_idlect1_clk armxor_ck = { | 220 | static struct arm_idlect1_clk armxor_ck = { |
@@ -226,8 +226,8 @@ static struct arm_idlect1_clk armxor_ck = { | |||
226 | .enable_reg = (void __iomem *)ARM_IDLECT2, | 226 | .enable_reg = (void __iomem *)ARM_IDLECT2, |
227 | .enable_bit = EN_XORPCK, | 227 | .enable_bit = EN_XORPCK, |
228 | .recalc = &followparent_recalc, | 228 | .recalc = &followparent_recalc, |
229 | .enable = &omap1_clk_enable, | 229 | .enable = &omap1_clk_enable_generic, |
230 | .disable = &omap1_clk_disable, | 230 | .disable = &omap1_clk_disable_generic, |
231 | }, | 231 | }, |
232 | .idlect_shift = 1, | 232 | .idlect_shift = 1, |
233 | }; | 233 | }; |
@@ -241,8 +241,8 @@ static struct arm_idlect1_clk armtim_ck = { | |||
241 | .enable_reg = (void __iomem *)ARM_IDLECT2, | 241 | .enable_reg = (void __iomem *)ARM_IDLECT2, |
242 | .enable_bit = EN_TIMCK, | 242 | .enable_bit = EN_TIMCK, |
243 | .recalc = &followparent_recalc, | 243 | .recalc = &followparent_recalc, |
244 | .enable = &omap1_clk_enable, | 244 | .enable = &omap1_clk_enable_generic, |
245 | .disable = &omap1_clk_disable, | 245 | .disable = &omap1_clk_disable_generic, |
246 | }, | 246 | }, |
247 | .idlect_shift = 9, | 247 | .idlect_shift = 9, |
248 | }; | 248 | }; |
@@ -256,8 +256,8 @@ static struct arm_idlect1_clk armwdt_ck = { | |||
256 | .enable_reg = (void __iomem *)ARM_IDLECT2, | 256 | .enable_reg = (void __iomem *)ARM_IDLECT2, |
257 | .enable_bit = EN_WDTCK, | 257 | .enable_bit = EN_WDTCK, |
258 | .recalc = &omap1_watchdog_recalc, | 258 | .recalc = &omap1_watchdog_recalc, |
259 | .enable = &omap1_clk_enable, | 259 | .enable = &omap1_clk_enable_generic, |
260 | .disable = &omap1_clk_disable, | 260 | .disable = &omap1_clk_disable_generic, |
261 | }, | 261 | }, |
262 | .idlect_shift = 0, | 262 | .idlect_shift = 0, |
263 | }; | 263 | }; |
@@ -272,8 +272,8 @@ static struct clk arminth_ck16xx = { | |||
272 | * | 272 | * |
273 | * 1510 version is in TC clocks. | 273 | * 1510 version is in TC clocks. |
274 | */ | 274 | */ |
275 | .enable = &omap1_clk_enable, | 275 | .enable = &omap1_clk_enable_generic, |
276 | .disable = &omap1_clk_disable, | 276 | .disable = &omap1_clk_disable_generic, |
277 | }; | 277 | }; |
278 | 278 | ||
279 | static struct clk dsp_ck = { | 279 | static struct clk dsp_ck = { |
@@ -285,8 +285,8 @@ static struct clk dsp_ck = { | |||
285 | .enable_bit = EN_DSPCK, | 285 | .enable_bit = EN_DSPCK, |
286 | .rate_offset = CKCTL_DSPDIV_OFFSET, | 286 | .rate_offset = CKCTL_DSPDIV_OFFSET, |
287 | .recalc = &omap1_ckctl_recalc, | 287 | .recalc = &omap1_ckctl_recalc, |
288 | .enable = &omap1_clk_enable, | 288 | .enable = &omap1_clk_enable_generic, |
289 | .disable = &omap1_clk_disable, | 289 | .disable = &omap1_clk_disable_generic, |
290 | }; | 290 | }; |
291 | 291 | ||
292 | static struct clk dspmmu_ck = { | 292 | static struct clk dspmmu_ck = { |
@@ -296,8 +296,8 @@ static struct clk dspmmu_ck = { | |||
296 | RATE_CKCTL | ALWAYS_ENABLED, | 296 | RATE_CKCTL | ALWAYS_ENABLED, |
297 | .rate_offset = CKCTL_DSPMMUDIV_OFFSET, | 297 | .rate_offset = CKCTL_DSPMMUDIV_OFFSET, |
298 | .recalc = &omap1_ckctl_recalc, | 298 | .recalc = &omap1_ckctl_recalc, |
299 | .enable = &omap1_clk_enable, | 299 | .enable = &omap1_clk_enable_generic, |
300 | .disable = &omap1_clk_disable, | 300 | .disable = &omap1_clk_disable_generic, |
301 | }; | 301 | }; |
302 | 302 | ||
303 | static struct clk dspper_ck = { | 303 | static struct clk dspper_ck = { |
@@ -349,8 +349,8 @@ static struct arm_idlect1_clk tc_ck = { | |||
349 | CLOCK_IDLE_CONTROL, | 349 | CLOCK_IDLE_CONTROL, |
350 | .rate_offset = CKCTL_TCDIV_OFFSET, | 350 | .rate_offset = CKCTL_TCDIV_OFFSET, |
351 | .recalc = &omap1_ckctl_recalc, | 351 | .recalc = &omap1_ckctl_recalc, |
352 | .enable = &omap1_clk_enable, | 352 | .enable = &omap1_clk_enable_generic, |
353 | .disable = &omap1_clk_disable, | 353 | .disable = &omap1_clk_disable_generic, |
354 | }, | 354 | }, |
355 | .idlect_shift = 6, | 355 | .idlect_shift = 6, |
356 | }; | 356 | }; |
@@ -364,8 +364,8 @@ static struct clk arminth_ck1510 = { | |||
364 | * | 364 | * |
365 | * 16xx version is in MPU clocks. | 365 | * 16xx version is in MPU clocks. |
366 | */ | 366 | */ |
367 | .enable = &omap1_clk_enable, | 367 | .enable = &omap1_clk_enable_generic, |
368 | .disable = &omap1_clk_disable, | 368 | .disable = &omap1_clk_disable_generic, |
369 | }; | 369 | }; |
370 | 370 | ||
371 | static struct clk tipb_ck = { | 371 | static struct clk tipb_ck = { |
@@ -374,8 +374,8 @@ static struct clk tipb_ck = { | |||
374 | .parent = &tc_ck.clk, | 374 | .parent = &tc_ck.clk, |
375 | .flags = CLOCK_IN_OMAP1510 | ALWAYS_ENABLED, | 375 | .flags = CLOCK_IN_OMAP1510 | ALWAYS_ENABLED, |
376 | .recalc = &followparent_recalc, | 376 | .recalc = &followparent_recalc, |
377 | .enable = &omap1_clk_enable, | 377 | .enable = &omap1_clk_enable_generic, |
378 | .disable = &omap1_clk_disable, | 378 | .disable = &omap1_clk_disable_generic, |
379 | }; | 379 | }; |
380 | 380 | ||
381 | static struct clk l3_ocpi_ck = { | 381 | static struct clk l3_ocpi_ck = { |
@@ -386,8 +386,8 @@ static struct clk l3_ocpi_ck = { | |||
386 | .enable_reg = (void __iomem *)ARM_IDLECT3, | 386 | .enable_reg = (void __iomem *)ARM_IDLECT3, |
387 | .enable_bit = EN_OCPI_CK, | 387 | .enable_bit = EN_OCPI_CK, |
388 | .recalc = &followparent_recalc, | 388 | .recalc = &followparent_recalc, |
389 | .enable = &omap1_clk_enable, | 389 | .enable = &omap1_clk_enable_generic, |
390 | .disable = &omap1_clk_disable, | 390 | .disable = &omap1_clk_disable_generic, |
391 | }; | 391 | }; |
392 | 392 | ||
393 | static struct clk tc1_ck = { | 393 | static struct clk tc1_ck = { |
@@ -397,8 +397,8 @@ static struct clk tc1_ck = { | |||
397 | .enable_reg = (void __iomem *)ARM_IDLECT3, | 397 | .enable_reg = (void __iomem *)ARM_IDLECT3, |
398 | .enable_bit = EN_TC1_CK, | 398 | .enable_bit = EN_TC1_CK, |
399 | .recalc = &followparent_recalc, | 399 | .recalc = &followparent_recalc, |
400 | .enable = &omap1_clk_enable, | 400 | .enable = &omap1_clk_enable_generic, |
401 | .disable = &omap1_clk_disable, | 401 | .disable = &omap1_clk_disable_generic, |
402 | }; | 402 | }; |
403 | 403 | ||
404 | static struct clk tc2_ck = { | 404 | static struct clk tc2_ck = { |
@@ -408,8 +408,8 @@ static struct clk tc2_ck = { | |||
408 | .enable_reg = (void __iomem *)ARM_IDLECT3, | 408 | .enable_reg = (void __iomem *)ARM_IDLECT3, |
409 | .enable_bit = EN_TC2_CK, | 409 | .enable_bit = EN_TC2_CK, |
410 | .recalc = &followparent_recalc, | 410 | .recalc = &followparent_recalc, |
411 | .enable = &omap1_clk_enable, | 411 | .enable = &omap1_clk_enable_generic, |
412 | .disable = &omap1_clk_disable, | 412 | .disable = &omap1_clk_disable_generic, |
413 | }; | 413 | }; |
414 | 414 | ||
415 | static struct clk dma_ck = { | 415 | static struct clk dma_ck = { |
@@ -419,8 +419,8 @@ static struct clk dma_ck = { | |||
419 | .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | | 419 | .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | |
420 | ALWAYS_ENABLED, | 420 | ALWAYS_ENABLED, |
421 | .recalc = &followparent_recalc, | 421 | .recalc = &followparent_recalc, |
422 | .enable = &omap1_clk_enable, | 422 | .enable = &omap1_clk_enable_generic, |
423 | .disable = &omap1_clk_disable, | 423 | .disable = &omap1_clk_disable_generic, |
424 | }; | 424 | }; |
425 | 425 | ||
426 | static struct clk dma_lcdfree_ck = { | 426 | static struct clk dma_lcdfree_ck = { |
@@ -428,8 +428,8 @@ static struct clk dma_lcdfree_ck = { | |||
428 | .parent = &tc_ck.clk, | 428 | .parent = &tc_ck.clk, |
429 | .flags = CLOCK_IN_OMAP16XX | ALWAYS_ENABLED, | 429 | .flags = CLOCK_IN_OMAP16XX | ALWAYS_ENABLED, |
430 | .recalc = &followparent_recalc, | 430 | .recalc = &followparent_recalc, |
431 | .enable = &omap1_clk_enable, | 431 | .enable = &omap1_clk_enable_generic, |
432 | .disable = &omap1_clk_disable, | 432 | .disable = &omap1_clk_disable_generic, |
433 | }; | 433 | }; |
434 | 434 | ||
435 | static struct arm_idlect1_clk api_ck = { | 435 | static struct arm_idlect1_clk api_ck = { |
@@ -441,8 +441,8 @@ static struct arm_idlect1_clk api_ck = { | |||
441 | .enable_reg = (void __iomem *)ARM_IDLECT2, | 441 | .enable_reg = (void __iomem *)ARM_IDLECT2, |
442 | .enable_bit = EN_APICK, | 442 | .enable_bit = EN_APICK, |
443 | .recalc = &followparent_recalc, | 443 | .recalc = &followparent_recalc, |
444 | .enable = &omap1_clk_enable, | 444 | .enable = &omap1_clk_enable_generic, |
445 | .disable = &omap1_clk_disable, | 445 | .disable = &omap1_clk_disable_generic, |
446 | }, | 446 | }, |
447 | .idlect_shift = 8, | 447 | .idlect_shift = 8, |
448 | }; | 448 | }; |
@@ -455,8 +455,8 @@ static struct arm_idlect1_clk lb_ck = { | |||
455 | .enable_reg = (void __iomem *)ARM_IDLECT2, | 455 | .enable_reg = (void __iomem *)ARM_IDLECT2, |
456 | .enable_bit = EN_LBCK, | 456 | .enable_bit = EN_LBCK, |
457 | .recalc = &followparent_recalc, | 457 | .recalc = &followparent_recalc, |
458 | .enable = &omap1_clk_enable, | 458 | .enable = &omap1_clk_enable_generic, |
459 | .disable = &omap1_clk_disable, | 459 | .disable = &omap1_clk_disable_generic, |
460 | }, | 460 | }, |
461 | .idlect_shift = 4, | 461 | .idlect_shift = 4, |
462 | }; | 462 | }; |
@@ -466,8 +466,8 @@ static struct clk rhea1_ck = { | |||
466 | .parent = &tc_ck.clk, | 466 | .parent = &tc_ck.clk, |
467 | .flags = CLOCK_IN_OMAP16XX | ALWAYS_ENABLED, | 467 | .flags = CLOCK_IN_OMAP16XX | ALWAYS_ENABLED, |
468 | .recalc = &followparent_recalc, | 468 | .recalc = &followparent_recalc, |
469 | .enable = &omap1_clk_enable, | 469 | .enable = &omap1_clk_enable_generic, |
470 | .disable = &omap1_clk_disable, | 470 | .disable = &omap1_clk_disable_generic, |
471 | }; | 471 | }; |
472 | 472 | ||
473 | static struct clk rhea2_ck = { | 473 | static struct clk rhea2_ck = { |
@@ -475,8 +475,8 @@ static struct clk rhea2_ck = { | |||
475 | .parent = &tc_ck.clk, | 475 | .parent = &tc_ck.clk, |
476 | .flags = CLOCK_IN_OMAP16XX | ALWAYS_ENABLED, | 476 | .flags = CLOCK_IN_OMAP16XX | ALWAYS_ENABLED, |
477 | .recalc = &followparent_recalc, | 477 | .recalc = &followparent_recalc, |
478 | .enable = &omap1_clk_enable, | 478 | .enable = &omap1_clk_enable_generic, |
479 | .disable = &omap1_clk_disable, | 479 | .disable = &omap1_clk_disable_generic, |
480 | }; | 480 | }; |
481 | 481 | ||
482 | static struct clk lcd_ck_16xx = { | 482 | static struct clk lcd_ck_16xx = { |
@@ -487,8 +487,8 @@ static struct clk lcd_ck_16xx = { | |||
487 | .enable_bit = EN_LCDCK, | 487 | .enable_bit = EN_LCDCK, |
488 | .rate_offset = CKCTL_LCDDIV_OFFSET, | 488 | .rate_offset = CKCTL_LCDDIV_OFFSET, |
489 | .recalc = &omap1_ckctl_recalc, | 489 | .recalc = &omap1_ckctl_recalc, |
490 | .enable = &omap1_clk_enable, | 490 | .enable = &omap1_clk_enable_generic, |
491 | .disable = &omap1_clk_disable, | 491 | .disable = &omap1_clk_disable_generic, |
492 | }; | 492 | }; |
493 | 493 | ||
494 | static struct arm_idlect1_clk lcd_ck_1510 = { | 494 | static struct arm_idlect1_clk lcd_ck_1510 = { |
@@ -501,8 +501,8 @@ static struct arm_idlect1_clk lcd_ck_1510 = { | |||
501 | .enable_bit = EN_LCDCK, | 501 | .enable_bit = EN_LCDCK, |
502 | .rate_offset = CKCTL_LCDDIV_OFFSET, | 502 | .rate_offset = CKCTL_LCDDIV_OFFSET, |
503 | .recalc = &omap1_ckctl_recalc, | 503 | .recalc = &omap1_ckctl_recalc, |
504 | .enable = &omap1_clk_enable, | 504 | .enable = &omap1_clk_enable_generic, |
505 | .disable = &omap1_clk_disable, | 505 | .disable = &omap1_clk_disable_generic, |
506 | }, | 506 | }, |
507 | .idlect_shift = 3, | 507 | .idlect_shift = 3, |
508 | }; | 508 | }; |
@@ -518,8 +518,8 @@ static struct clk uart1_1510 = { | |||
518 | .enable_bit = 29, /* Chooses between 12MHz and 48MHz */ | 518 | .enable_bit = 29, /* Chooses between 12MHz and 48MHz */ |
519 | .set_rate = &omap1_set_uart_rate, | 519 | .set_rate = &omap1_set_uart_rate, |
520 | .recalc = &omap1_uart_recalc, | 520 | .recalc = &omap1_uart_recalc, |
521 | .enable = &omap1_clk_enable, | 521 | .enable = &omap1_clk_enable_generic, |
522 | .disable = &omap1_clk_disable, | 522 | .disable = &omap1_clk_disable_generic, |
523 | }; | 523 | }; |
524 | 524 | ||
525 | static struct uart_clk uart1_16xx = { | 525 | static struct uart_clk uart1_16xx = { |
@@ -550,8 +550,8 @@ static struct clk uart2_ck = { | |||
550 | .enable_bit = 30, /* Chooses between 12MHz and 48MHz */ | 550 | .enable_bit = 30, /* Chooses between 12MHz and 48MHz */ |
551 | .set_rate = &omap1_set_uart_rate, | 551 | .set_rate = &omap1_set_uart_rate, |
552 | .recalc = &omap1_uart_recalc, | 552 | .recalc = &omap1_uart_recalc, |
553 | .enable = &omap1_clk_enable, | 553 | .enable = &omap1_clk_enable_generic, |
554 | .disable = &omap1_clk_disable, | 554 | .disable = &omap1_clk_disable_generic, |
555 | }; | 555 | }; |
556 | 556 | ||
557 | static struct clk uart3_1510 = { | 557 | static struct clk uart3_1510 = { |
@@ -565,8 +565,8 @@ static struct clk uart3_1510 = { | |||
565 | .enable_bit = 31, /* Chooses between 12MHz and 48MHz */ | 565 | .enable_bit = 31, /* Chooses between 12MHz and 48MHz */ |
566 | .set_rate = &omap1_set_uart_rate, | 566 | .set_rate = &omap1_set_uart_rate, |
567 | .recalc = &omap1_uart_recalc, | 567 | .recalc = &omap1_uart_recalc, |
568 | .enable = &omap1_clk_enable, | 568 | .enable = &omap1_clk_enable_generic, |
569 | .disable = &omap1_clk_disable, | 569 | .disable = &omap1_clk_disable_generic, |
570 | }; | 570 | }; |
571 | 571 | ||
572 | static struct uart_clk uart3_16xx = { | 572 | static struct uart_clk uart3_16xx = { |
@@ -593,8 +593,8 @@ static struct clk usb_clko = { /* 6 MHz output on W4_USB_CLKO */ | |||
593 | RATE_FIXED | ENABLE_REG_32BIT, | 593 | RATE_FIXED | ENABLE_REG_32BIT, |
594 | .enable_reg = (void __iomem *)ULPD_CLOCK_CTRL, | 594 | .enable_reg = (void __iomem *)ULPD_CLOCK_CTRL, |
595 | .enable_bit = USB_MCLK_EN_BIT, | 595 | .enable_bit = USB_MCLK_EN_BIT, |
596 | .enable = &omap1_clk_enable, | 596 | .enable = &omap1_clk_enable_generic, |
597 | .disable = &omap1_clk_disable, | 597 | .disable = &omap1_clk_disable_generic, |
598 | }; | 598 | }; |
599 | 599 | ||
600 | static struct clk usb_hhc_ck1510 = { | 600 | static struct clk usb_hhc_ck1510 = { |
@@ -605,8 +605,8 @@ static struct clk usb_hhc_ck1510 = { | |||
605 | RATE_FIXED | ENABLE_REG_32BIT, | 605 | RATE_FIXED | ENABLE_REG_32BIT, |
606 | .enable_reg = (void __iomem *)MOD_CONF_CTRL_0, | 606 | .enable_reg = (void __iomem *)MOD_CONF_CTRL_0, |
607 | .enable_bit = USB_HOST_HHC_UHOST_EN, | 607 | .enable_bit = USB_HOST_HHC_UHOST_EN, |
608 | .enable = &omap1_clk_enable, | 608 | .enable = &omap1_clk_enable_generic, |
609 | .disable = &omap1_clk_disable, | 609 | .disable = &omap1_clk_disable_generic, |
610 | }; | 610 | }; |
611 | 611 | ||
612 | static struct clk usb_hhc_ck16xx = { | 612 | static struct clk usb_hhc_ck16xx = { |
@@ -618,8 +618,8 @@ static struct clk usb_hhc_ck16xx = { | |||
618 | RATE_FIXED | ENABLE_REG_32BIT, | 618 | RATE_FIXED | ENABLE_REG_32BIT, |
619 | .enable_reg = (void __iomem *)OTG_BASE + 0x08 /* OTG_SYSCON_2 */, | 619 | .enable_reg = (void __iomem *)OTG_BASE + 0x08 /* OTG_SYSCON_2 */, |
620 | .enable_bit = 8 /* UHOST_EN */, | 620 | .enable_bit = 8 /* UHOST_EN */, |
621 | .enable = &omap1_clk_enable, | 621 | .enable = &omap1_clk_enable_generic, |
622 | .disable = &omap1_clk_disable, | 622 | .disable = &omap1_clk_disable_generic, |
623 | }; | 623 | }; |
624 | 624 | ||
625 | static struct clk usb_dc_ck = { | 625 | static struct clk usb_dc_ck = { |
@@ -629,8 +629,8 @@ static struct clk usb_dc_ck = { | |||
629 | .flags = CLOCK_IN_OMAP16XX | RATE_FIXED, | 629 | .flags = CLOCK_IN_OMAP16XX | RATE_FIXED, |
630 | .enable_reg = (void __iomem *)SOFT_REQ_REG, | 630 | .enable_reg = (void __iomem *)SOFT_REQ_REG, |
631 | .enable_bit = 4, | 631 | .enable_bit = 4, |
632 | .enable = &omap1_clk_enable, | 632 | .enable = &omap1_clk_enable_generic, |
633 | .disable = &omap1_clk_disable, | 633 | .disable = &omap1_clk_disable_generic, |
634 | }; | 634 | }; |
635 | 635 | ||
636 | static struct clk mclk_1510 = { | 636 | static struct clk mclk_1510 = { |
@@ -638,8 +638,8 @@ static struct clk mclk_1510 = { | |||
638 | /* Direct from ULPD, no parent. May be enabled by ext hardware. */ | 638 | /* Direct from ULPD, no parent. May be enabled by ext hardware. */ |
639 | .rate = 12000000, | 639 | .rate = 12000000, |
640 | .flags = CLOCK_IN_OMAP1510 | RATE_FIXED, | 640 | .flags = CLOCK_IN_OMAP1510 | RATE_FIXED, |
641 | .enable = &omap1_clk_enable, | 641 | .enable = &omap1_clk_enable_generic, |
642 | .disable = &omap1_clk_disable, | 642 | .disable = &omap1_clk_disable_generic, |
643 | }; | 643 | }; |
644 | 644 | ||
645 | static struct clk mclk_16xx = { | 645 | static struct clk mclk_16xx = { |
@@ -651,8 +651,8 @@ static struct clk mclk_16xx = { | |||
651 | .set_rate = &omap1_set_ext_clk_rate, | 651 | .set_rate = &omap1_set_ext_clk_rate, |
652 | .round_rate = &omap1_round_ext_clk_rate, | 652 | .round_rate = &omap1_round_ext_clk_rate, |
653 | .init = &omap1_init_ext_clk, | 653 | .init = &omap1_init_ext_clk, |
654 | .enable = &omap1_clk_enable, | 654 | .enable = &omap1_clk_enable_generic, |
655 | .disable = &omap1_clk_disable, | 655 | .disable = &omap1_clk_disable_generic, |
656 | }; | 656 | }; |
657 | 657 | ||
658 | static struct clk bclk_1510 = { | 658 | static struct clk bclk_1510 = { |
@@ -660,8 +660,8 @@ static struct clk bclk_1510 = { | |||
660 | /* Direct from ULPD, no parent. May be enabled by ext hardware. */ | 660 | /* Direct from ULPD, no parent. May be enabled by ext hardware. */ |
661 | .rate = 12000000, | 661 | .rate = 12000000, |
662 | .flags = CLOCK_IN_OMAP1510 | RATE_FIXED, | 662 | .flags = CLOCK_IN_OMAP1510 | RATE_FIXED, |
663 | .enable = &omap1_clk_enable, | 663 | .enable = &omap1_clk_enable_generic, |
664 | .disable = &omap1_clk_disable, | 664 | .disable = &omap1_clk_disable_generic, |
665 | }; | 665 | }; |
666 | 666 | ||
667 | static struct clk bclk_16xx = { | 667 | static struct clk bclk_16xx = { |
@@ -673,8 +673,8 @@ static struct clk bclk_16xx = { | |||
673 | .set_rate = &omap1_set_ext_clk_rate, | 673 | .set_rate = &omap1_set_ext_clk_rate, |
674 | .round_rate = &omap1_round_ext_clk_rate, | 674 | .round_rate = &omap1_round_ext_clk_rate, |
675 | .init = &omap1_init_ext_clk, | 675 | .init = &omap1_init_ext_clk, |
676 | .enable = &omap1_clk_enable, | 676 | .enable = &omap1_clk_enable_generic, |
677 | .disable = &omap1_clk_disable, | 677 | .disable = &omap1_clk_disable_generic, |
678 | }; | 678 | }; |
679 | 679 | ||
680 | static struct clk mmc1_ck = { | 680 | static struct clk mmc1_ck = { |
@@ -686,8 +686,8 @@ static struct clk mmc1_ck = { | |||
686 | RATE_FIXED | ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT, | 686 | RATE_FIXED | ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT, |
687 | .enable_reg = (void __iomem *)MOD_CONF_CTRL_0, | 687 | .enable_reg = (void __iomem *)MOD_CONF_CTRL_0, |
688 | .enable_bit = 23, | 688 | .enable_bit = 23, |
689 | .enable = &omap1_clk_enable, | 689 | .enable = &omap1_clk_enable_generic, |
690 | .disable = &omap1_clk_disable, | 690 | .disable = &omap1_clk_disable_generic, |
691 | }; | 691 | }; |
692 | 692 | ||
693 | static struct clk mmc2_ck = { | 693 | static struct clk mmc2_ck = { |
@@ -699,8 +699,8 @@ static struct clk mmc2_ck = { | |||
699 | RATE_FIXED | ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT, | 699 | RATE_FIXED | ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT, |
700 | .enable_reg = (void __iomem *)MOD_CONF_CTRL_0, | 700 | .enable_reg = (void __iomem *)MOD_CONF_CTRL_0, |
701 | .enable_bit = 20, | 701 | .enable_bit = 20, |
702 | .enable = &omap1_clk_enable, | 702 | .enable = &omap1_clk_enable_generic, |
703 | .disable = &omap1_clk_disable, | 703 | .disable = &omap1_clk_disable_generic, |
704 | }; | 704 | }; |
705 | 705 | ||
706 | static struct clk virtual_ck_mpu = { | 706 | static struct clk virtual_ck_mpu = { |
@@ -711,8 +711,8 @@ static struct clk virtual_ck_mpu = { | |||
711 | .recalc = &followparent_recalc, | 711 | .recalc = &followparent_recalc, |
712 | .set_rate = &omap1_select_table_rate, | 712 | .set_rate = &omap1_select_table_rate, |
713 | .round_rate = &omap1_round_to_table_rate, | 713 | .round_rate = &omap1_round_to_table_rate, |
714 | .enable = &omap1_clk_enable, | 714 | .enable = &omap1_clk_enable_generic, |
715 | .disable = &omap1_clk_disable, | 715 | .disable = &omap1_clk_disable_generic, |
716 | }; | 716 | }; |
717 | 717 | ||
718 | static struct clk * onchip_clks[] = { | 718 | static struct clk * onchip_clks[] = { |
diff --git a/arch/arm/mach-omap1/serial.c b/arch/arm/mach-omap1/serial.c index 7a68f098a025..e924e0c6a4ce 100644 --- a/arch/arm/mach-omap1/serial.c +++ b/arch/arm/mach-omap1/serial.c | |||
@@ -146,7 +146,7 @@ void __init omap_serial_init(void) | |||
146 | if (IS_ERR(uart1_ck)) | 146 | if (IS_ERR(uart1_ck)) |
147 | printk("Could not get uart1_ck\n"); | 147 | printk("Could not get uart1_ck\n"); |
148 | else { | 148 | else { |
149 | clk_use(uart1_ck); | 149 | clk_enable(uart1_ck); |
150 | if (cpu_is_omap1510()) | 150 | if (cpu_is_omap1510()) |
151 | clk_set_rate(uart1_ck, 12000000); | 151 | clk_set_rate(uart1_ck, 12000000); |
152 | } | 152 | } |
@@ -166,7 +166,7 @@ void __init omap_serial_init(void) | |||
166 | if (IS_ERR(uart2_ck)) | 166 | if (IS_ERR(uart2_ck)) |
167 | printk("Could not get uart2_ck\n"); | 167 | printk("Could not get uart2_ck\n"); |
168 | else { | 168 | else { |
169 | clk_use(uart2_ck); | 169 | clk_enable(uart2_ck); |
170 | if (cpu_is_omap1510()) | 170 | if (cpu_is_omap1510()) |
171 | clk_set_rate(uart2_ck, 12000000); | 171 | clk_set_rate(uart2_ck, 12000000); |
172 | else | 172 | else |
@@ -188,7 +188,7 @@ void __init omap_serial_init(void) | |||
188 | if (IS_ERR(uart3_ck)) | 188 | if (IS_ERR(uart3_ck)) |
189 | printk("Could not get uart3_ck\n"); | 189 | printk("Could not get uart3_ck\n"); |
190 | else { | 190 | else { |
191 | clk_use(uart3_ck); | 191 | clk_enable(uart3_ck); |
192 | if (cpu_is_omap1510()) | 192 | if (cpu_is_omap1510()) |
193 | clk_set_rate(uart3_ck, 12000000); | 193 | clk_set_rate(uart3_ck, 12000000); |
194 | } | 194 | } |
diff --git a/arch/arm/mach-omap2/clock.c b/arch/arm/mach-omap2/clock.c index 5407b9549150..180f675c9064 100644 --- a/arch/arm/mach-omap2/clock.c +++ b/arch/arm/mach-omap2/clock.c | |||
@@ -111,7 +111,7 @@ static void omap2_clk_fixed_enable(struct clk *clk) | |||
111 | /* Enables clock without considering parent dependencies or use count | 111 | /* Enables clock without considering parent dependencies or use count |
112 | * REVISIT: Maybe change this to use clk->enable like on omap1? | 112 | * REVISIT: Maybe change this to use clk->enable like on omap1? |
113 | */ | 113 | */ |
114 | static int omap2_clk_enable(struct clk * clk) | 114 | static int _omap2_clk_enable(struct clk * clk) |
115 | { | 115 | { |
116 | u32 regval32; | 116 | u32 regval32; |
117 | 117 | ||
@@ -150,7 +150,7 @@ static void omap2_clk_fixed_disable(struct clk *clk) | |||
150 | } | 150 | } |
151 | 151 | ||
152 | /* Disables clock without considering parent dependencies or use count */ | 152 | /* Disables clock without considering parent dependencies or use count */ |
153 | static void omap2_clk_disable(struct clk *clk) | 153 | static void _omap2_clk_disable(struct clk *clk) |
154 | { | 154 | { |
155 | u32 regval32; | 155 | u32 regval32; |
156 | 156 | ||
@@ -167,23 +167,23 @@ static void omap2_clk_disable(struct clk *clk) | |||
167 | __raw_writel(regval32, clk->enable_reg); | 167 | __raw_writel(regval32, clk->enable_reg); |
168 | } | 168 | } |
169 | 169 | ||
170 | static int omap2_clk_use(struct clk *clk) | 170 | static int omap2_clk_enable(struct clk *clk) |
171 | { | 171 | { |
172 | int ret = 0; | 172 | int ret = 0; |
173 | 173 | ||
174 | if (clk->usecount++ == 0) { | 174 | if (clk->usecount++ == 0) { |
175 | if (likely((u32)clk->parent)) | 175 | if (likely((u32)clk->parent)) |
176 | ret = omap2_clk_use(clk->parent); | 176 | ret = omap2_clk_enable(clk->parent); |
177 | 177 | ||
178 | if (unlikely(ret != 0)) { | 178 | if (unlikely(ret != 0)) { |
179 | clk->usecount--; | 179 | clk->usecount--; |
180 | return ret; | 180 | return ret; |
181 | } | 181 | } |
182 | 182 | ||
183 | ret = omap2_clk_enable(clk); | 183 | ret = _omap2_clk_enable(clk); |
184 | 184 | ||
185 | if (unlikely(ret != 0) && clk->parent) { | 185 | if (unlikely(ret != 0) && clk->parent) { |
186 | omap2_clk_unuse(clk->parent); | 186 | omap2_clk_disable(clk->parent); |
187 | clk->usecount--; | 187 | clk->usecount--; |
188 | } | 188 | } |
189 | } | 189 | } |
@@ -191,12 +191,12 @@ static int omap2_clk_use(struct clk *clk) | |||
191 | return ret; | 191 | return ret; |
192 | } | 192 | } |
193 | 193 | ||
194 | static void omap2_clk_unuse(struct clk *clk) | 194 | static void omap2_clk_disable(struct clk *clk) |
195 | { | 195 | { |
196 | if (clk->usecount > 0 && !(--clk->usecount)) { | 196 | if (clk->usecount > 0 && !(--clk->usecount)) { |
197 | omap2_clk_disable(clk); | 197 | _omap2_clk_disable(clk); |
198 | if (likely((u32)clk->parent)) | 198 | if (likely((u32)clk->parent)) |
199 | omap2_clk_unuse(clk->parent); | 199 | omap2_clk_disable(clk->parent); |
200 | } | 200 | } |
201 | } | 201 | } |
202 | 202 | ||
@@ -873,7 +873,7 @@ static int omap2_clk_set_parent(struct clk *clk, struct clk *new_parent) | |||
873 | reg = (void __iomem *)src_sel; | 873 | reg = (void __iomem *)src_sel; |
874 | 874 | ||
875 | if (clk->usecount > 0) | 875 | if (clk->usecount > 0) |
876 | omap2_clk_disable(clk); | 876 | _omap2_clk_disable(clk); |
877 | 877 | ||
878 | /* Set new source value (previous dividers if any in effect) */ | 878 | /* Set new source value (previous dividers if any in effect) */ |
879 | reg_val = __raw_readl(reg) & ~(field_mask << src_off); | 879 | reg_val = __raw_readl(reg) & ~(field_mask << src_off); |
@@ -884,7 +884,7 @@ static int omap2_clk_set_parent(struct clk *clk, struct clk *new_parent) | |||
884 | __raw_writel(0x1, (void __iomem *)&PRCM_CLKCFG_CTRL); | 884 | __raw_writel(0x1, (void __iomem *)&PRCM_CLKCFG_CTRL); |
885 | 885 | ||
886 | if (clk->usecount > 0) | 886 | if (clk->usecount > 0) |
887 | omap2_clk_enable(clk); | 887 | _omap2_clk_enable(clk); |
888 | 888 | ||
889 | clk->parent = new_parent; | 889 | clk->parent = new_parent; |
890 | 890 | ||
@@ -999,8 +999,6 @@ static int omap2_select_table_rate(struct clk * clk, unsigned long rate) | |||
999 | static struct clk_functions omap2_clk_functions = { | 999 | static struct clk_functions omap2_clk_functions = { |
1000 | .clk_enable = omap2_clk_enable, | 1000 | .clk_enable = omap2_clk_enable, |
1001 | .clk_disable = omap2_clk_disable, | 1001 | .clk_disable = omap2_clk_disable, |
1002 | .clk_use = omap2_clk_use, | ||
1003 | .clk_unuse = omap2_clk_unuse, | ||
1004 | .clk_round_rate = omap2_clk_round_rate, | 1002 | .clk_round_rate = omap2_clk_round_rate, |
1005 | .clk_set_rate = omap2_clk_set_rate, | 1003 | .clk_set_rate = omap2_clk_set_rate, |
1006 | .clk_set_parent = omap2_clk_set_parent, | 1004 | .clk_set_parent = omap2_clk_set_parent, |
@@ -1045,7 +1043,7 @@ static void __init omap2_disable_unused_clocks(void) | |||
1045 | continue; | 1043 | continue; |
1046 | 1044 | ||
1047 | printk(KERN_INFO "Disabling unused clock \"%s\"\n", ck->name); | 1045 | printk(KERN_INFO "Disabling unused clock \"%s\"\n", ck->name); |
1048 | omap2_clk_disable(ck); | 1046 | _omap2_clk_disable(ck); |
1049 | } | 1047 | } |
1050 | } | 1048 | } |
1051 | late_initcall(omap2_disable_unused_clocks); | 1049 | late_initcall(omap2_disable_unused_clocks); |
@@ -1120,10 +1118,10 @@ int __init omap2_clk_init(void) | |||
1120 | * Only enable those clocks we will need, let the drivers | 1118 | * Only enable those clocks we will need, let the drivers |
1121 | * enable other clocks as necessary | 1119 | * enable other clocks as necessary |
1122 | */ | 1120 | */ |
1123 | clk_use(&sync_32k_ick); | 1121 | clk_enable(&sync_32k_ick); |
1124 | clk_use(&omapctrl_ick); | 1122 | clk_enable(&omapctrl_ick); |
1125 | if (cpu_is_omap2430()) | 1123 | if (cpu_is_omap2430()) |
1126 | clk_use(&sdrc_ick); | 1124 | clk_enable(&sdrc_ick); |
1127 | 1125 | ||
1128 | return 0; | 1126 | return 0; |
1129 | } | 1127 | } |
diff --git a/arch/arm/mach-omap2/clock.h b/arch/arm/mach-omap2/clock.h index 4aeab5591bd3..6cab20b1d3c1 100644 --- a/arch/arm/mach-omap2/clock.h +++ b/arch/arm/mach-omap2/clock.h | |||
@@ -24,7 +24,7 @@ static void omap2_propagate_rate(struct clk * clk); | |||
24 | static void omap2_mpu_recalc(struct clk * clk); | 24 | static void omap2_mpu_recalc(struct clk * clk); |
25 | static int omap2_select_table_rate(struct clk * clk, unsigned long rate); | 25 | static int omap2_select_table_rate(struct clk * clk, unsigned long rate); |
26 | static long omap2_round_to_table_rate(struct clk * clk, unsigned long rate); | 26 | static long omap2_round_to_table_rate(struct clk * clk, unsigned long rate); |
27 | static void omap2_clk_unuse(struct clk *clk); | 27 | static void omap2_clk_disable(struct clk *clk); |
28 | static void omap2_sys_clk_recalc(struct clk * clk); | 28 | static void omap2_sys_clk_recalc(struct clk * clk); |
29 | static u32 omap2_clksel_to_divisor(u32 div_sel, u32 field_val); | 29 | static u32 omap2_clksel_to_divisor(u32 div_sel, u32 field_val); |
30 | static u32 omap2_clksel_get_divisor(struct clk *clk); | 30 | static u32 omap2_clksel_get_divisor(struct clk *clk); |
@@ -859,7 +859,7 @@ static struct clk core_l3_ck = { /* Used for ick and fck, interconnect */ | |||
859 | 859 | ||
860 | static struct clk usb_l4_ick = { /* FS-USB interface clock */ | 860 | static struct clk usb_l4_ick = { /* FS-USB interface clock */ |
861 | .name = "usb_l4_ick", | 861 | .name = "usb_l4_ick", |
862 | .parent = &core_ck, | 862 | .parent = &core_l3_ck, |
863 | .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | | 863 | .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | |
864 | RATE_CKCTL | CM_CORE_SEL1 | DELAYED_APP | | 864 | RATE_CKCTL | CM_CORE_SEL1 | DELAYED_APP | |
865 | CONFIG_PARTICIPANT, | 865 | CONFIG_PARTICIPANT, |
@@ -1045,7 +1045,7 @@ static struct clk gpt1_ick = { | |||
1045 | .name = "gpt1_ick", | 1045 | .name = "gpt1_ick", |
1046 | .parent = &l4_ck, | 1046 | .parent = &l4_ck, |
1047 | .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, | 1047 | .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, |
1048 | .enable_reg = (void __iomem *)&CM_ICLKEN_WKUP, /* Bit4 */ | 1048 | .enable_reg = (void __iomem *)&CM_ICLKEN_WKUP, /* Bit0 */ |
1049 | .enable_bit = 0, | 1049 | .enable_bit = 0, |
1050 | .recalc = &omap2_followparent_recalc, | 1050 | .recalc = &omap2_followparent_recalc, |
1051 | }; | 1051 | }; |
@@ -1055,7 +1055,7 @@ static struct clk gpt1_fck = { | |||
1055 | .parent = &func_32k_ck, | 1055 | .parent = &func_32k_ck, |
1056 | .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | | 1056 | .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | |
1057 | CM_WKUP_SEL1, | 1057 | CM_WKUP_SEL1, |
1058 | .enable_reg = (void __iomem *)&CM_FCLKEN_WKUP, | 1058 | .enable_reg = (void __iomem *)&CM_FCLKEN_WKUP, /* Bit0 */ |
1059 | .enable_bit = 0, | 1059 | .enable_bit = 0, |
1060 | .src_offset = 0, | 1060 | .src_offset = 0, |
1061 | .recalc = &omap2_followparent_recalc, | 1061 | .recalc = &omap2_followparent_recalc, |
@@ -1065,7 +1065,7 @@ static struct clk gpt2_ick = { | |||
1065 | .name = "gpt2_ick", | 1065 | .name = "gpt2_ick", |
1066 | .parent = &l4_ck, | 1066 | .parent = &l4_ck, |
1067 | .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, | 1067 | .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, |
1068 | .enable_reg = (void __iomem *)&CM_ICLKEN1_CORE, /* bit4 */ | 1068 | .enable_reg = (void __iomem *)&CM_ICLKEN1_CORE, /* Bit4 */ |
1069 | .enable_bit = 0, | 1069 | .enable_bit = 0, |
1070 | .recalc = &omap2_followparent_recalc, | 1070 | .recalc = &omap2_followparent_recalc, |
1071 | }; | 1071 | }; |
@@ -1839,7 +1839,7 @@ static struct clk usb_fck = { | |||
1839 | 1839 | ||
1840 | static struct clk usbhs_ick = { | 1840 | static struct clk usbhs_ick = { |
1841 | .name = "usbhs_ick", | 1841 | .name = "usbhs_ick", |
1842 | .parent = &l4_ck, | 1842 | .parent = &core_l3_ck, |
1843 | .flags = CLOCK_IN_OMAP243X, | 1843 | .flags = CLOCK_IN_OMAP243X, |
1844 | .enable_reg = (void __iomem *)&CM_ICLKEN2_CORE, | 1844 | .enable_reg = (void __iomem *)&CM_ICLKEN2_CORE, |
1845 | .enable_bit = 6, | 1845 | .enable_bit = 6, |
diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c index e1bd46a96e11..24dd374224af 100644 --- a/arch/arm/mach-omap2/serial.c +++ b/arch/arm/mach-omap2/serial.c | |||
@@ -119,14 +119,14 @@ void __init omap_serial_init() | |||
119 | if (IS_ERR(uart1_ick)) | 119 | if (IS_ERR(uart1_ick)) |
120 | printk("Could not get uart1_ick\n"); | 120 | printk("Could not get uart1_ick\n"); |
121 | else { | 121 | else { |
122 | clk_use(uart1_ick); | 122 | clk_enable(uart1_ick); |
123 | } | 123 | } |
124 | 124 | ||
125 | uart1_fck = clk_get(NULL, "uart1_fck"); | 125 | uart1_fck = clk_get(NULL, "uart1_fck"); |
126 | if (IS_ERR(uart1_fck)) | 126 | if (IS_ERR(uart1_fck)) |
127 | printk("Could not get uart1_fck\n"); | 127 | printk("Could not get uart1_fck\n"); |
128 | else { | 128 | else { |
129 | clk_use(uart1_fck); | 129 | clk_enable(uart1_fck); |
130 | } | 130 | } |
131 | break; | 131 | break; |
132 | case 1: | 132 | case 1: |
@@ -134,14 +134,14 @@ void __init omap_serial_init() | |||
134 | if (IS_ERR(uart2_ick)) | 134 | if (IS_ERR(uart2_ick)) |
135 | printk("Could not get uart2_ick\n"); | 135 | printk("Could not get uart2_ick\n"); |
136 | else { | 136 | else { |
137 | clk_use(uart2_ick); | 137 | clk_enable(uart2_ick); |
138 | } | 138 | } |
139 | 139 | ||
140 | uart2_fck = clk_get(NULL, "uart2_fck"); | 140 | uart2_fck = clk_get(NULL, "uart2_fck"); |
141 | if (IS_ERR(uart2_fck)) | 141 | if (IS_ERR(uart2_fck)) |
142 | printk("Could not get uart2_fck\n"); | 142 | printk("Could not get uart2_fck\n"); |
143 | else { | 143 | else { |
144 | clk_use(uart2_fck); | 144 | clk_enable(uart2_fck); |
145 | } | 145 | } |
146 | break; | 146 | break; |
147 | case 2: | 147 | case 2: |
@@ -149,14 +149,14 @@ void __init omap_serial_init() | |||
149 | if (IS_ERR(uart3_ick)) | 149 | if (IS_ERR(uart3_ick)) |
150 | printk("Could not get uart3_ick\n"); | 150 | printk("Could not get uart3_ick\n"); |
151 | else { | 151 | else { |
152 | clk_use(uart3_ick); | 152 | clk_enable(uart3_ick); |
153 | } | 153 | } |
154 | 154 | ||
155 | uart3_fck = clk_get(NULL, "uart3_fck"); | 155 | uart3_fck = clk_get(NULL, "uart3_fck"); |
156 | if (IS_ERR(uart3_fck)) | 156 | if (IS_ERR(uart3_fck)) |
157 | printk("Could not get uart3_fck\n"); | 157 | printk("Could not get uart3_fck\n"); |
158 | else { | 158 | else { |
159 | clk_use(uart3_fck); | 159 | clk_enable(uart3_fck); |
160 | } | 160 | } |
161 | break; | 161 | break; |
162 | } | 162 | } |
diff --git a/arch/arm/mach-omap2/timer-gp.c b/arch/arm/mach-omap2/timer-gp.c index 23d36b1c40fe..1d2f5ac2f69b 100644 --- a/arch/arm/mach-omap2/timer-gp.c +++ b/arch/arm/mach-omap2/timer-gp.c | |||
@@ -104,7 +104,7 @@ static void __init omap2_gp_timer_init(void) | |||
104 | if (IS_ERR(sys_ck)) | 104 | if (IS_ERR(sys_ck)) |
105 | printk(KERN_ERR "Could not get sys_ck\n"); | 105 | printk(KERN_ERR "Could not get sys_ck\n"); |
106 | else { | 106 | else { |
107 | clk_use(sys_ck); | 107 | clk_enable(sys_ck); |
108 | tick_period = clk_get_rate(sys_ck) / 100; | 108 | tick_period = clk_get_rate(sys_ck) / 100; |
109 | clk_put(sys_ck); | 109 | clk_put(sys_ck); |
110 | } | 110 | } |
diff --git a/arch/arm/plat-omap/clock.c b/arch/arm/plat-omap/clock.c index 7ebc5a29db8d..3c2bfc0efdaf 100644 --- a/arch/arm/plat-omap/clock.c +++ b/arch/arm/plat-omap/clock.c | |||
@@ -34,7 +34,7 @@ DEFINE_SPINLOCK(clockfw_lock); | |||
34 | static struct clk_functions *arch_clock; | 34 | static struct clk_functions *arch_clock; |
35 | 35 | ||
36 | /*------------------------------------------------------------------------- | 36 | /*------------------------------------------------------------------------- |
37 | * Standard clock functions defined in asm/hardware/clock.h | 37 | * Standard clock functions defined in include/linux/clk.h |
38 | *-------------------------------------------------------------------------*/ | 38 | *-------------------------------------------------------------------------*/ |
39 | 39 | ||
40 | struct clk * clk_get(struct device *dev, const char *id) | 40 | struct clk * clk_get(struct device *dev, const char *id) |
@@ -60,12 +60,8 @@ int clk_enable(struct clk *clk) | |||
60 | int ret = 0; | 60 | int ret = 0; |
61 | 61 | ||
62 | spin_lock_irqsave(&clockfw_lock, flags); | 62 | spin_lock_irqsave(&clockfw_lock, flags); |
63 | if (clk->enable) | 63 | if (arch_clock->clk_enable) |
64 | ret = clk->enable(clk); | ||
65 | else if (arch_clock->clk_enable) | ||
66 | ret = arch_clock->clk_enable(clk); | 64 | ret = arch_clock->clk_enable(clk); |
67 | else | ||
68 | printk(KERN_ERR "Could not enable clock %s\n", clk->name); | ||
69 | spin_unlock_irqrestore(&clockfw_lock, flags); | 65 | spin_unlock_irqrestore(&clockfw_lock, flags); |
70 | 66 | ||
71 | return ret; | 67 | return ret; |
@@ -77,41 +73,12 @@ void clk_disable(struct clk *clk) | |||
77 | unsigned long flags; | 73 | unsigned long flags; |
78 | 74 | ||
79 | spin_lock_irqsave(&clockfw_lock, flags); | 75 | spin_lock_irqsave(&clockfw_lock, flags); |
80 | if (clk->disable) | 76 | if (arch_clock->clk_disable) |
81 | clk->disable(clk); | ||
82 | else if (arch_clock->clk_disable) | ||
83 | arch_clock->clk_disable(clk); | 77 | arch_clock->clk_disable(clk); |
84 | else | ||
85 | printk(KERN_ERR "Could not disable clock %s\n", clk->name); | ||
86 | spin_unlock_irqrestore(&clockfw_lock, flags); | 78 | spin_unlock_irqrestore(&clockfw_lock, flags); |
87 | } | 79 | } |
88 | EXPORT_SYMBOL(clk_disable); | 80 | EXPORT_SYMBOL(clk_disable); |
89 | 81 | ||
90 | int clk_use(struct clk *clk) | ||
91 | { | ||
92 | unsigned long flags; | ||
93 | int ret = 0; | ||
94 | |||
95 | spin_lock_irqsave(&clockfw_lock, flags); | ||
96 | if (arch_clock->clk_use) | ||
97 | ret = arch_clock->clk_use(clk); | ||
98 | spin_unlock_irqrestore(&clockfw_lock, flags); | ||
99 | |||
100 | return ret; | ||
101 | } | ||
102 | EXPORT_SYMBOL(clk_use); | ||
103 | |||
104 | void clk_unuse(struct clk *clk) | ||
105 | { | ||
106 | unsigned long flags; | ||
107 | |||
108 | spin_lock_irqsave(&clockfw_lock, flags); | ||
109 | if (arch_clock->clk_unuse) | ||
110 | arch_clock->clk_unuse(clk); | ||
111 | spin_unlock_irqrestore(&clockfw_lock, flags); | ||
112 | } | ||
113 | EXPORT_SYMBOL(clk_unuse); | ||
114 | |||
115 | int clk_get_usecount(struct clk *clk) | 82 | int clk_get_usecount(struct clk *clk) |
116 | { | 83 | { |
117 | unsigned long flags; | 84 | unsigned long flags; |
@@ -146,7 +113,7 @@ void clk_put(struct clk *clk) | |||
146 | EXPORT_SYMBOL(clk_put); | 113 | EXPORT_SYMBOL(clk_put); |
147 | 114 | ||
148 | /*------------------------------------------------------------------------- | 115 | /*------------------------------------------------------------------------- |
149 | * Optional clock functions defined in asm/hardware/clock.h | 116 | * Optional clock functions defined in include/linux/clk.h |
150 | *-------------------------------------------------------------------------*/ | 117 | *-------------------------------------------------------------------------*/ |
151 | 118 | ||
152 | long clk_round_rate(struct clk *clk, unsigned long rate) | 119 | long clk_round_rate(struct clk *clk, unsigned long rate) |
diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c index ca3681a824ac..b4d5b9e4bfce 100644 --- a/arch/arm/plat-omap/gpio.c +++ b/arch/arm/plat-omap/gpio.c | |||
@@ -853,19 +853,19 @@ static int __init _omap_gpio_init(void) | |||
853 | if (IS_ERR(gpio_ick)) | 853 | if (IS_ERR(gpio_ick)) |
854 | printk("Could not get arm_gpio_ck\n"); | 854 | printk("Could not get arm_gpio_ck\n"); |
855 | else | 855 | else |
856 | clk_use(gpio_ick); | 856 | clk_enable(gpio_ick); |
857 | } | 857 | } |
858 | if (cpu_is_omap24xx()) { | 858 | if (cpu_is_omap24xx()) { |
859 | gpio_ick = clk_get(NULL, "gpios_ick"); | 859 | gpio_ick = clk_get(NULL, "gpios_ick"); |
860 | if (IS_ERR(gpio_ick)) | 860 | if (IS_ERR(gpio_ick)) |
861 | printk("Could not get gpios_ick\n"); | 861 | printk("Could not get gpios_ick\n"); |
862 | else | 862 | else |
863 | clk_use(gpio_ick); | 863 | clk_enable(gpio_ick); |
864 | gpio_fck = clk_get(NULL, "gpios_fck"); | 864 | gpio_fck = clk_get(NULL, "gpios_fck"); |
865 | if (IS_ERR(gpio_ick)) | 865 | if (IS_ERR(gpio_ick)) |
866 | printk("Could not get gpios_fck\n"); | 866 | printk("Could not get gpios_fck\n"); |
867 | else | 867 | else |
868 | clk_use(gpio_fck); | 868 | clk_enable(gpio_fck); |
869 | } | 869 | } |
870 | 870 | ||
871 | #ifdef CONFIG_ARCH_OMAP15XX | 871 | #ifdef CONFIG_ARCH_OMAP15XX |
diff --git a/arch/arm/plat-omap/mcbsp.c b/arch/arm/plat-omap/mcbsp.c index be0e0f32a598..1cd2cace7e1b 100644 --- a/arch/arm/plat-omap/mcbsp.c +++ b/arch/arm/plat-omap/mcbsp.c | |||
@@ -190,11 +190,11 @@ static int omap_mcbsp_check(unsigned int id) | |||
190 | static void omap_mcbsp_dsp_request(void) | 190 | static void omap_mcbsp_dsp_request(void) |
191 | { | 191 | { |
192 | if (cpu_is_omap1510() || cpu_is_omap16xx()) { | 192 | if (cpu_is_omap1510() || cpu_is_omap16xx()) { |
193 | clk_use(mcbsp_dsp_ck); | 193 | clk_enable(mcbsp_dsp_ck); |
194 | clk_use(mcbsp_api_ck); | 194 | clk_enable(mcbsp_api_ck); |
195 | 195 | ||
196 | /* enable 12MHz clock to mcbsp 1 & 3 */ | 196 | /* enable 12MHz clock to mcbsp 1 & 3 */ |
197 | clk_use(mcbsp_dspxor_ck); | 197 | clk_enable(mcbsp_dspxor_ck); |
198 | 198 | ||
199 | /* | 199 | /* |
200 | * DSP external peripheral reset | 200 | * DSP external peripheral reset |
@@ -208,9 +208,9 @@ static void omap_mcbsp_dsp_request(void) | |||
208 | static void omap_mcbsp_dsp_free(void) | 208 | static void omap_mcbsp_dsp_free(void) |
209 | { | 209 | { |
210 | if (cpu_is_omap1510() || cpu_is_omap16xx()) { | 210 | if (cpu_is_omap1510() || cpu_is_omap16xx()) { |
211 | clk_unuse(mcbsp_dspxor_ck); | 211 | clk_disable(mcbsp_dspxor_ck); |
212 | clk_unuse(mcbsp_dsp_ck); | 212 | clk_disable(mcbsp_dsp_ck); |
213 | clk_unuse(mcbsp_api_ck); | 213 | clk_disable(mcbsp_api_ck); |
214 | } | 214 | } |
215 | } | 215 | } |
216 | 216 | ||
diff --git a/arch/arm/plat-omap/ocpi.c b/arch/arm/plat-omap/ocpi.c index e40fcc8b43d4..5cc6775c789c 100644 --- a/arch/arm/plat-omap/ocpi.c +++ b/arch/arm/plat-omap/ocpi.c | |||
@@ -88,7 +88,7 @@ static int __init omap_ocpi_init(void) | |||
88 | if (IS_ERR(ocpi_ck)) | 88 | if (IS_ERR(ocpi_ck)) |
89 | return PTR_ERR(ocpi_ck); | 89 | return PTR_ERR(ocpi_ck); |
90 | 90 | ||
91 | clk_use(ocpi_ck); | 91 | clk_enable(ocpi_ck); |
92 | ocpi_enable(); | 92 | ocpi_enable(); |
93 | printk("OMAP OCPI interconnect driver loaded\n"); | 93 | printk("OMAP OCPI interconnect driver loaded\n"); |
94 | 94 | ||
@@ -102,7 +102,7 @@ static void __exit omap_ocpi_exit(void) | |||
102 | if (!cpu_is_omap16xx()) | 102 | if (!cpu_is_omap16xx()) |
103 | return; | 103 | return; |
104 | 104 | ||
105 | clk_unuse(ocpi_ck); | 105 | clk_disable(ocpi_ck); |
106 | clk_put(ocpi_ck); | 106 | clk_put(ocpi_ck); |
107 | } | 107 | } |
108 | 108 | ||
diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig index 5e7199f7b59c..9fd1925de361 100644 --- a/drivers/serial/Kconfig +++ b/drivers/serial/Kconfig | |||
@@ -301,7 +301,7 @@ config SERIAL_AT91_TTYAT | |||
301 | depends on SERIAL_AT91=y | 301 | depends on SERIAL_AT91=y |
302 | help | 302 | help |
303 | Say Y here if you wish to have the five internal AT91RM9200 UARTs | 303 | Say Y here if you wish to have the five internal AT91RM9200 UARTs |
304 | appear as /dev/ttyAT0-4 (major 240, minor 0-4) instead of the | 304 | appear as /dev/ttyAT0-4 (major 204, minor 154-158) instead of the |
305 | normal /dev/ttyS0-4 (major 4, minor 64-68). This is necessary if | 305 | normal /dev/ttyS0-4 (major 4, minor 64-68). This is necessary if |
306 | you also want other UARTs, such as external 8250/16C550 compatible | 306 | you also want other UARTs, such as external 8250/16C550 compatible |
307 | UARTs. | 307 | UARTs. |
diff --git a/drivers/serial/at91_serial.c b/drivers/serial/at91_serial.c index 0e206063d685..2113feb75c39 100644 --- a/drivers/serial/at91_serial.c +++ b/drivers/serial/at91_serial.c | |||
@@ -222,8 +222,6 @@ static void at91_rx_chars(struct uart_port *port, struct pt_regs *regs) | |||
222 | while (status & (AT91_US_RXRDY)) { | 222 | while (status & (AT91_US_RXRDY)) { |
223 | ch = UART_GET_CHAR(port); | 223 | ch = UART_GET_CHAR(port); |
224 | 224 | ||
225 | if (tty->flip.count >= TTY_FLIPBUF_SIZE) | ||
226 | goto ignore_char; | ||
227 | port->icount.rx++; | 225 | port->icount.rx++; |
228 | 226 | ||
229 | flg = TTY_NORMAL; | 227 | flg = TTY_NORMAL; |
diff --git a/include/asm-arm/arch-omap/clock.h b/include/asm-arm/arch-omap/clock.h index 740c297eb11c..46a0402696de 100644 --- a/include/asm-arm/arch-omap/clock.h +++ b/include/asm-arm/arch-omap/clock.h | |||
@@ -38,8 +38,6 @@ struct clk { | |||
38 | struct clk_functions { | 38 | struct clk_functions { |
39 | int (*clk_enable)(struct clk *clk); | 39 | int (*clk_enable)(struct clk *clk); |
40 | void (*clk_disable)(struct clk *clk); | 40 | void (*clk_disable)(struct clk *clk); |
41 | int (*clk_use)(struct clk *clk); | ||
42 | void (*clk_unuse)(struct clk *clk); | ||
43 | long (*clk_round_rate)(struct clk *clk, unsigned long rate); | 41 | long (*clk_round_rate)(struct clk *clk, unsigned long rate); |
44 | int (*clk_set_rate)(struct clk *clk, unsigned long rate); | 42 | int (*clk_set_rate)(struct clk *clk, unsigned long rate); |
45 | int (*clk_set_parent)(struct clk *clk, struct clk *parent); | 43 | int (*clk_set_parent)(struct clk *clk, struct clk *parent); |
diff --git a/include/asm-arm/arch-pxa/pxa-regs.h b/include/asm-arm/arch-pxa/pxa-regs.h index dae138b9cac5..1409c5bd703f 100644 --- a/include/asm-arm/arch-pxa/pxa-regs.h +++ b/include/asm-arm/arch-pxa/pxa-regs.h | |||
@@ -108,6 +108,7 @@ | |||
108 | #define DCSR_STARTINTR (1 << 1) /* Start Interrupt (read / write) */ | 108 | #define DCSR_STARTINTR (1 << 1) /* Start Interrupt (read / write) */ |
109 | #define DCSR_BUSERR (1 << 0) /* Bus Error Interrupt (read / write) */ | 109 | #define DCSR_BUSERR (1 << 0) /* Bus Error Interrupt (read / write) */ |
110 | 110 | ||
111 | #define DALGN __REG(0x400000a0) /* DMA Alignment Register */ | ||
111 | #define DINT __REG(0x400000f0) /* DMA Interrupt Register */ | 112 | #define DINT __REG(0x400000f0) /* DMA Interrupt Register */ |
112 | 113 | ||
113 | #define DRCMR(n) __REG2(0x40000100, (n)<<2) | 114 | #define DRCMR(n) __REG2(0x40000100, (n)<<2) |
@@ -1614,8 +1615,21 @@ | |||
1614 | #define SSCR0_National (0x2 << 4) /* National Microwire */ | 1615 | #define SSCR0_National (0x2 << 4) /* National Microwire */ |
1615 | #define SSCR0_ECS (1 << 6) /* External clock select */ | 1616 | #define SSCR0_ECS (1 << 6) /* External clock select */ |
1616 | #define SSCR0_SSE (1 << 7) /* Synchronous Serial Port Enable */ | 1617 | #define SSCR0_SSE (1 << 7) /* Synchronous Serial Port Enable */ |
1618 | #if defined(CONFIG_PXA25x) | ||
1617 | #define SSCR0_SCR (0x0000ff00) /* Serial Clock Rate (mask) */ | 1619 | #define SSCR0_SCR (0x0000ff00) /* Serial Clock Rate (mask) */ |
1618 | #define SSCR0_SerClkDiv(x) ((((x) - 2)/2) << 8) /* Divisor [2..512] */ | 1620 | #define SSCR0_SerClkDiv(x) ((((x) - 2)/2) << 8) /* Divisor [2..512] */ |
1621 | #elif defined(CONFIG_PXA27x) | ||
1622 | #define SSCR0_SCR (0x000fff00) /* Serial Clock Rate (mask) */ | ||
1623 | #define SSCR0_SerClkDiv(x) (((x) - 1) << 8) /* Divisor [1..4096] */ | ||
1624 | #define SSCR0_EDSS (1 << 20) /* Extended data size select */ | ||
1625 | #define SSCR0_NCS (1 << 21) /* Network clock select */ | ||
1626 | #define SSCR0_RIM (1 << 22) /* Receive FIFO overrrun interrupt mask */ | ||
1627 | #define SSCR0_TUM (1 << 23) /* Transmit FIFO underrun interrupt mask */ | ||
1628 | #define SSCR0_FRDC (0x07000000) /* Frame rate divider control (mask) */ | ||
1629 | #define SSCR0_SlotsPerFrm(c) ((x) - 1) /* Time slots per frame [1..8] */ | ||
1630 | #define SSCR0_ADC (1 << 30) /* Audio clock select */ | ||
1631 | #define SSCR0_MOD (1 << 31) /* Mode (normal or network) */ | ||
1632 | #endif | ||
1619 | 1633 | ||
1620 | #define SSCR1_RIE (1 << 0) /* Receive FIFO Interrupt Enable */ | 1634 | #define SSCR1_RIE (1 << 0) /* Receive FIFO Interrupt Enable */ |
1621 | #define SSCR1_TIE (1 << 1) /* Transmit FIFO Interrupt Enable */ | 1635 | #define SSCR1_TIE (1 << 1) /* Transmit FIFO Interrupt Enable */ |