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-rw-r--r--arch/xtensa/Kconfig1
-rw-r--r--arch/xtensa/kernel/process.c14
2 files changed, 3 insertions, 12 deletions
diff --git a/arch/xtensa/Kconfig b/arch/xtensa/Kconfig
index b09de49dbec5..e0144ff4624d 100644
--- a/arch/xtensa/Kconfig
+++ b/arch/xtensa/Kconfig
@@ -19,6 +19,7 @@ config XTENSA
19 select CLONE_BACKWARDS 19 select CLONE_BACKWARDS
20 select IRQ_DOMAIN 20 select IRQ_DOMAIN
21 select HAVE_OPROFILE 21 select HAVE_OPROFILE
22 select GENERIC_IDLE_LOOP
22 help 23 help
23 Xtensa processors are 32-bit RISC machines designed by Tensilica 24 Xtensa processors are 32-bit RISC machines designed by Tensilica
24 primarily for embedded systems. These processors are both 25 primarily for embedded systems. These processors are both
diff --git a/arch/xtensa/kernel/process.c b/arch/xtensa/kernel/process.c
index 5cd82e9f601c..1c85323f01d7 100644
--- a/arch/xtensa/kernel/process.c
+++ b/arch/xtensa/kernel/process.c
@@ -105,19 +105,9 @@ void coprocessor_flush_all(struct thread_info *ti)
105/* 105/*
106 * Powermanagement idle function, if any is provided by the platform. 106 * Powermanagement idle function, if any is provided by the platform.
107 */ 107 */
108 108void arch_cpu_idle(void)
109void cpu_idle(void)
110{ 109{
111 local_irq_enable(); 110 platform_idle();
112
113 /* endless idle loop with no priority at all */
114 while (1) {
115 rcu_idle_enter();
116 while (!need_resched())
117 platform_idle();
118 rcu_idle_exit();
119 schedule_preempt_disabled();
120 }
121} 111}
122 112
123/* 113/*