diff options
-rw-r--r-- | arch/m68k/include/asm/m520xsim.h | 6 | ||||
-rw-r--r-- | arch/m68k/include/asm/m523xsim.h | 9 | ||||
-rw-r--r-- | arch/m68k/include/asm/m527xsim.h | 11 | ||||
-rw-r--r-- | arch/m68k/include/asm/m528xsim.h | 8 | ||||
-rw-r--r-- | arch/m68k/include/asm/mcfpit.h | 16 | ||||
-rw-r--r-- | arch/m68knommu/platform/coldfire/pit.c | 2 |
6 files changed, 32 insertions, 20 deletions
diff --git a/arch/m68k/include/asm/m520xsim.h b/arch/m68k/include/asm/m520xsim.h index 88ed8239fe4e..afc21ad78f43 100644 --- a/arch/m68k/include/asm/m520xsim.h +++ b/arch/m68k/include/asm/m520xsim.h | |||
@@ -134,6 +134,12 @@ | |||
134 | #define MCF_GPIO_PAR_FECI2C_PAR_SCL_UTXD2 (0x04) | 134 | #define MCF_GPIO_PAR_FECI2C_PAR_SCL_UTXD2 (0x04) |
135 | 135 | ||
136 | /* | 136 | /* |
137 | * PIT timer module. | ||
138 | */ | ||
139 | #define MCFPIT_BASE1 0xFC080000 /* Base address of TIMER1 */ | ||
140 | #define MCFPIT_BASE2 0xFC084000 /* Base address of TIMER2 */ | ||
141 | |||
142 | /* | ||
137 | * UART module. | 143 | * UART module. |
138 | */ | 144 | */ |
139 | #define MCFUART_BASE1 0x60000 /* Base address of UART1 */ | 145 | #define MCFUART_BASE1 0x60000 /* Base address of UART1 */ |
diff --git a/arch/m68k/include/asm/m523xsim.h b/arch/m68k/include/asm/m523xsim.h index 9701ed34d234..6be94f6831ae 100644 --- a/arch/m68k/include/asm/m523xsim.h +++ b/arch/m68k/include/asm/m523xsim.h | |||
@@ -119,9 +119,16 @@ | |||
119 | #define MCFGPIO_PCLRR_ETPU (MCF_IPSBAR + 0x10003C) | 119 | #define MCFGPIO_PCLRR_ETPU (MCF_IPSBAR + 0x10003C) |
120 | 120 | ||
121 | /* | 121 | /* |
122 | * EPort | 122 | * PIT timer base addresses. |
123 | */ | 123 | */ |
124 | #define MCFPIT_BASE1 (MCF_IPSBAR + 0x150000) | ||
125 | #define MCFPIT_BASE2 (MCF_IPSBAR + 0x160000) | ||
126 | #define MCFPIT_BASE3 (MCF_IPSBAR + 0x170000) | ||
127 | #define MCFPIT_BASE4 (MCF_IPSBAR + 0x180000) | ||
124 | 128 | ||
129 | /* | ||
130 | * EPort | ||
131 | */ | ||
125 | #define MCFEPORT_EPDDR (MCF_IPSBAR + 0x130002) | 132 | #define MCFEPORT_EPDDR (MCF_IPSBAR + 0x130002) |
126 | #define MCFEPORT_EPDR (MCF_IPSBAR + 0x130004) | 133 | #define MCFEPORT_EPDR (MCF_IPSBAR + 0x130004) |
127 | #define MCFEPORT_EPPDR (MCF_IPSBAR + 0x130005) | 134 | #define MCFEPORT_EPPDR (MCF_IPSBAR + 0x130005) |
diff --git a/arch/m68k/include/asm/m527xsim.h b/arch/m68k/include/asm/m527xsim.h index 3712f611bd5e..cb7df04ad0c4 100644 --- a/arch/m68k/include/asm/m527xsim.h +++ b/arch/m68k/include/asm/m527xsim.h | |||
@@ -232,15 +232,20 @@ | |||
232 | #endif | 232 | #endif |
233 | 233 | ||
234 | /* | 234 | /* |
235 | * EPort | 235 | * PIT timer base addresses. |
236 | */ | 236 | */ |
237 | #define MCFPIT_BASE1 (MCF_IPSBAR + 0x150000) | ||
238 | #define MCFPIT_BASE2 (MCF_IPSBAR + 0x160000) | ||
239 | #define MCFPIT_BASE3 (MCF_IPSBAR + 0x170000) | ||
240 | #define MCFPIT_BASE4 (MCF_IPSBAR + 0x180000) | ||
237 | 241 | ||
242 | /* | ||
243 | * EPort | ||
244 | */ | ||
238 | #define MCFEPORT_EPDDR (MCF_IPSBAR + 0x130002) | 245 | #define MCFEPORT_EPDDR (MCF_IPSBAR + 0x130002) |
239 | #define MCFEPORT_EPDR (MCF_IPSBAR + 0x130004) | 246 | #define MCFEPORT_EPDR (MCF_IPSBAR + 0x130004) |
240 | #define MCFEPORT_EPPDR (MCF_IPSBAR + 0x130005) | 247 | #define MCFEPORT_EPPDR (MCF_IPSBAR + 0x130005) |
241 | 248 | ||
242 | |||
243 | |||
244 | /* | 249 | /* |
245 | * GPIO pins setups to enable the UARTs. | 250 | * GPIO pins setups to enable the UARTs. |
246 | */ | 251 | */ |
diff --git a/arch/m68k/include/asm/m528xsim.h b/arch/m68k/include/asm/m528xsim.h index a918545f6a5a..014098a7de89 100644 --- a/arch/m68k/include/asm/m528xsim.h +++ b/arch/m68k/include/asm/m528xsim.h | |||
@@ -164,6 +164,14 @@ | |||
164 | #define MCFGPIO_PUAPAR (MCF_IPSBAR + 0x0010005C) | 164 | #define MCFGPIO_PUAPAR (MCF_IPSBAR + 0x0010005C) |
165 | 165 | ||
166 | /* | 166 | /* |
167 | * PIT timer base addresses. | ||
168 | */ | ||
169 | #define MCFPIT_BASE1 (MCF_IPSBAR + 0x00150000) | ||
170 | #define MCFPIT_BASE2 (MCF_IPSBAR + 0x00160000) | ||
171 | #define MCFPIT_BASE3 (MCF_IPSBAR + 0x00170000) | ||
172 | #define MCFPIT_BASE4 (MCF_IPSBAR + 0x00180000) | ||
173 | |||
174 | /* | ||
167 | * Edge Port registers | 175 | * Edge Port registers |
168 | */ | 176 | */ |
169 | #define MCFEPORT_EPPAR (MCF_IPSBAR + 0x00130000) | 177 | #define MCFEPORT_EPPAR (MCF_IPSBAR + 0x00130000) |
diff --git a/arch/m68k/include/asm/mcfpit.h b/arch/m68k/include/asm/mcfpit.h index f570cf64fd29..9fd321ca0725 100644 --- a/arch/m68k/include/asm/mcfpit.h +++ b/arch/m68k/include/asm/mcfpit.h | |||
@@ -11,22 +11,8 @@ | |||
11 | #define mcfpit_h | 11 | #define mcfpit_h |
12 | /****************************************************************************/ | 12 | /****************************************************************************/ |
13 | 13 | ||
14 | |||
15 | /* | ||
16 | * Get address specific defines for the 5270/5271, 5280/5282, and 5208. | ||
17 | */ | ||
18 | #if defined(CONFIG_M520x) | ||
19 | #define MCFPIT_BASE1 0x00080000 /* Base address of TIMER1 */ | ||
20 | #define MCFPIT_BASE2 0x00084000 /* Base address of TIMER2 */ | ||
21 | #else | ||
22 | #define MCFPIT_BASE1 0x00150000 /* Base address of TIMER1 */ | ||
23 | #define MCFPIT_BASE2 0x00160000 /* Base address of TIMER2 */ | ||
24 | #define MCFPIT_BASE3 0x00170000 /* Base address of TIMER3 */ | ||
25 | #define MCFPIT_BASE4 0x00180000 /* Base address of TIMER4 */ | ||
26 | #endif | ||
27 | |||
28 | /* | 14 | /* |
29 | * Define the PIT timer register set addresses. | 15 | * Define the PIT timer register address offsets. |
30 | */ | 16 | */ |
31 | #define MCFPIT_PCSR 0x0 /* PIT control register */ | 17 | #define MCFPIT_PCSR 0x0 /* PIT control register */ |
32 | #define MCFPIT_PMR 0x2 /* PIT modulus register */ | 18 | #define MCFPIT_PMR 0x2 /* PIT modulus register */ |
diff --git a/arch/m68knommu/platform/coldfire/pit.c b/arch/m68knommu/platform/coldfire/pit.c index aebea19abd78..c2b980926bec 100644 --- a/arch/m68knommu/platform/coldfire/pit.c +++ b/arch/m68knommu/platform/coldfire/pit.c | |||
@@ -31,7 +31,7 @@ | |||
31 | * By default use timer1 as the system clock timer. | 31 | * By default use timer1 as the system clock timer. |
32 | */ | 32 | */ |
33 | #define FREQ ((MCF_CLK / 2) / 64) | 33 | #define FREQ ((MCF_CLK / 2) / 64) |
34 | #define TA(a) (MCF_IPSBAR + MCFPIT_BASE1 + (a)) | 34 | #define TA(a) (MCFPIT_BASE1 + (a)) |
35 | #define PIT_CYCLES_PER_JIFFY (FREQ / HZ) | 35 | #define PIT_CYCLES_PER_JIFFY (FREQ / HZ) |
36 | 36 | ||
37 | static u32 pit_cnt; | 37 | static u32 pit_cnt; |