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-rw-r--r--Documentation/hwmon/coretemp4
-rw-r--r--drivers/hwmon/coretemp.c26
2 files changed, 26 insertions, 4 deletions
diff --git a/Documentation/hwmon/coretemp b/Documentation/hwmon/coretemp
index d3d79e658718..65d1e667c36e 100644
--- a/Documentation/hwmon/coretemp
+++ b/Documentation/hwmon/coretemp
@@ -4,7 +4,9 @@ Kernel driver coretemp
4Supported chips: 4Supported chips:
5 * All Intel Core family 5 * All Intel Core family
6 Prefix: 'coretemp' 6 Prefix: 'coretemp'
7 CPUID: family 0x6, models 0xe, 0xf, 0x16, 0x17, 0x1c (Atom) 7 CPUID: family 0x6, models 0xe (Pentium M DC), 0xf (Core 2 DC 65nm),
8 0x16 (Core 2 SC 65nm), 0x17 (Penryn 45nm),
9 0x1a (Nehalem), 0x1c (Atom).
8 Datasheet: Intel 64 and IA-32 Architectures Software Developer's Manual 10 Datasheet: Intel 64 and IA-32 Architectures Software Developer's Manual
9 Volume 3A: System Programming Guide 11 Volume 3A: System Programming Guide
10 http://softwarecommunity.intel.com/Wiki/Mobility/720.htm 12 http://softwarecommunity.intel.com/Wiki/Mobility/720.htm
diff --git a/drivers/hwmon/coretemp.c b/drivers/hwmon/coretemp.c
index 4c15ed7eb786..c86b1247b94c 100644
--- a/drivers/hwmon/coretemp.c
+++ b/drivers/hwmon/coretemp.c
@@ -157,6 +157,7 @@ static int __devinit adjust_tjmax(struct cpuinfo_x86 *c, u32 id, struct device *
157 /* The 100C is default for both mobile and non mobile CPUs */ 157 /* The 100C is default for both mobile and non mobile CPUs */
158 158
159 int tjmax = 100000; 159 int tjmax = 100000;
160 int tjmax_ee = 85000;
160 int usemsr_ee = 1; 161 int usemsr_ee = 1;
161 int err; 162 int err;
162 u32 eax, edx; 163 u32 eax, edx;
@@ -175,6 +176,7 @@ static int __devinit adjust_tjmax(struct cpuinfo_x86 *c, u32 id, struct device *
175 } 176 }
176 177
177 if ((c->x86_model > 0xe) && (usemsr_ee)) { 178 if ((c->x86_model > 0xe) && (usemsr_ee)) {
179 u8 platform_id;
178 180
179 /* Now we can detect the mobile CPU using Intel provided table 181 /* Now we can detect the mobile CPU using Intel provided table
180 http://softwarecommunity.intel.com/Wiki/Mobility/720.htm 182 http://softwarecommunity.intel.com/Wiki/Mobility/720.htm
@@ -187,8 +189,24 @@ static int __devinit adjust_tjmax(struct cpuinfo_x86 *c, u32 id, struct device *
187 "Unable to access MSR 0x17, assuming desktop" 189 "Unable to access MSR 0x17, assuming desktop"
188 " CPU\n"); 190 " CPU\n");
189 usemsr_ee = 0; 191 usemsr_ee = 0;
190 } else if (!(eax & 0x10000000)) { 192 } else if (c->x86_model < 0x17 && !(eax & 0x10000000)) {
193 /* Trust bit 28 up to Penryn, I could not find any
194 documentation on that; if you happen to know
195 someone at Intel please ask */
191 usemsr_ee = 0; 196 usemsr_ee = 0;
197 } else {
198 /* Platform ID bits 52:50 (EDX starts at bit 32) */
199 platform_id = (edx >> 18) & 0x7;
200
201 /* Mobile Penryn CPU seems to be platform ID 7 or 5
202 (guesswork) */
203 if ((c->x86_model == 0x17) &&
204 ((platform_id == 5) || (platform_id == 7))) {
205 /* If MSR EE bit is set, set it to 90 degrees C,
206 otherwise 105 degrees C */
207 tjmax_ee = 90000;
208 tjmax = 105000;
209 }
192 } 210 }
193 } 211 }
194 212
@@ -200,7 +218,7 @@ static int __devinit adjust_tjmax(struct cpuinfo_x86 *c, u32 id, struct device *
200 "Unable to access MSR 0xEE, for Tjmax, left" 218 "Unable to access MSR 0xEE, for Tjmax, left"
201 " at default"); 219 " at default");
202 } else if (eax & 0x40000000) { 220 } else if (eax & 0x40000000) {
203 tjmax = 85000; 221 tjmax = tjmax_ee;
204 } 222 }
205 /* if we dont use msr EE it means we are desktop CPU (with exeception 223 /* if we dont use msr EE it means we are desktop CPU (with exeception
206 of Atom) */ 224 of Atom) */
@@ -422,7 +440,9 @@ static int __init coretemp_init(void)
422 for_each_online_cpu(i) { 440 for_each_online_cpu(i) {
423 struct cpuinfo_x86 *c = &cpu_data(i); 441 struct cpuinfo_x86 *c = &cpu_data(i);
424 442
425 /* check if family 6, models 0xe, 0xf, 0x16, 0x17, 0x1A, 0x1c */ 443 /* check if family 6, models 0xe (Pentium M DC),
444 0xf (Core 2 DC 65nm), 0x16 (Core 2 SC 65nm),
445 0x17 (Penryn 45nm), 0x1a (Nehalem), 0x1c (Atom) */
426 if ((c->cpuid_level < 0) || (c->x86 != 0x6) || 446 if ((c->cpuid_level < 0) || (c->x86 != 0x6) ||
427 !((c->x86_model == 0xe) || (c->x86_model == 0xf) || 447 !((c->x86_model == 0xe) || (c->x86_model == 0xf) ||
428 (c->x86_model == 0x16) || (c->x86_model == 0x17) || 448 (c->x86_model == 0x16) || (c->x86_model == 0x17) ||