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-rw-r--r--drivers/ata/pata_hpt37x.c23
1 files changed, 9 insertions, 14 deletions
diff --git a/drivers/ata/pata_hpt37x.c b/drivers/ata/pata_hpt37x.c
index fe1b482d5291..41d831296347 100644
--- a/drivers/ata/pata_hpt37x.c
+++ b/drivers/ata/pata_hpt37x.c
@@ -26,7 +26,7 @@
26#include <linux/libata.h> 26#include <linux/libata.h>
27 27
28#define DRV_NAME "pata_hpt37x" 28#define DRV_NAME "pata_hpt37x"
29#define DRV_VERSION "0.6.4" 29#define DRV_VERSION "0.6.5"
30 30
31struct hpt_clock { 31struct hpt_clock {
32 u8 xfer_speed; 32 u8 xfer_speed;
@@ -130,7 +130,7 @@ static const struct hpt_chip hpt370 = {
130 hpt37x_timings_33, 130 hpt37x_timings_33,
131 NULL, 131 NULL,
132 NULL, 132 NULL,
133 hpt37x_timings_66 133 NULL
134 } 134 }
135}; 135};
136 136
@@ -141,7 +141,7 @@ static const struct hpt_chip hpt370a = {
141 hpt37x_timings_33, 141 hpt37x_timings_33,
142 NULL, 142 NULL,
143 hpt37x_timings_50, 143 hpt37x_timings_50,
144 hpt37x_timings_66 144 NULL
145 } 145 }
146}; 146};
147 147
@@ -1018,8 +1018,8 @@ static int hpt37x_init_one(struct pci_dev *dev, const struct pci_device_id *id)
1018 return -ENODEV; 1018 return -ENODEV;
1019 port = &info_hpt372; 1019 port = &info_hpt372;
1020 chip_table = &hpt371; 1020 chip_table = &hpt371;
1021 /* Single channel device, paster is not present 1021 /* Single channel device, master is not present
1022 but the NIOS (or us for non x86) must mark it 1022 but the BIOS (or us for non x86) must mark it
1023 absent */ 1023 absent */
1024 pci_read_config_byte(dev, 0x50, &mcr1); 1024 pci_read_config_byte(dev, 0x50, &mcr1);
1025 mcr1 &= ~0x04; 1025 mcr1 &= ~0x04;
@@ -1131,16 +1131,11 @@ static int hpt37x_init_one(struct pci_dev *dev, const struct pci_device_id *id)
1131 } else { 1131 } else {
1132 port->private_data = (void *)chip_table->clocks[clock_slot]; 1132 port->private_data = (void *)chip_table->clocks[clock_slot];
1133 /* 1133 /*
1134 * Perform a final fixup. The 371 and 372 clock determines 1134 * Perform a final fixup. Note that we will have used the
1135 * if UDMA133 is available. (FIXME: should we use DPLL then ?) 1135 * DPLL on the HPT372 which means we don't have to worry
1136 */ 1136 * about lack of UDMA133 support on lower clocks
1137 */
1137 1138
1138 if (clock_slot == 2 && chip_table == &hpt372) { /* 50Mhz */
1139 printk(KERN_WARNING "pata_hpt37x: No UDMA133 support available with 50MHz bus clock.\n");
1140 if (port == &info_hpt372)
1141 port = &info_hpt372_50;
1142 else BUG();
1143 }
1144 if (clock_slot < 2 && port == &info_hpt370) 1139 if (clock_slot < 2 && port == &info_hpt370)
1145 port = &info_hpt370_33; 1140 port = &info_hpt370_33;
1146 if (clock_slot < 2 && port == &info_hpt370a) 1141 if (clock_slot < 2 && port == &info_hpt370a)