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-rw-r--r--arch/mips/sgi-ip22/ip22-mc.c26
-rw-r--r--include/asm-mips/barrier.h14
2 files changed, 40 insertions, 0 deletions
diff --git a/arch/mips/sgi-ip22/ip22-mc.c b/arch/mips/sgi-ip22/ip22-mc.c
index 3f35d6367bec..5268ac187bbd 100644
--- a/arch/mips/sgi-ip22/ip22-mc.c
+++ b/arch/mips/sgi-ip22/ip22-mc.c
@@ -208,4 +208,30 @@ void __init sgimc_init(void)
208void __init prom_meminit(void) {} 208void __init prom_meminit(void) {}
209void __init prom_free_prom_memory(void) 209void __init prom_free_prom_memory(void)
210{ 210{
211#ifdef CONFIG_SGI_IP28
212 u32 mconfig1;
213 unsigned long flags;
214 spinlock_t lock;
215
216 /*
217 * because ARCS accesses memory uncached we wait until ARCS
218 * isn't needed any longer, before we switch from slow to
219 * normal mode
220 */
221 spin_lock_irqsave(&lock, flags);
222 mconfig1 = sgimc->mconfig1;
223 /* map ECC register */
224 sgimc->mconfig1 = (mconfig1 & 0xffff0000) | 0x2060;
225 iob();
226 /* switch to normal mode */
227 *(unsigned long *)PHYS_TO_XKSEG_UNCACHED(0x60000000) = 0;
228 iob();
229 /* reduce WR_COL */
230 sgimc->cmacc = (sgimc->cmacc & ~0xf) | 4;
231 iob();
232 /* restore old config */
233 sgimc->mconfig1 = mconfig1;
234 iob();
235 spin_unlock_irqrestore(&lock, flags);
236#endif
211} 237}
diff --git a/include/asm-mips/barrier.h b/include/asm-mips/barrier.h
index 9d8cfbb5e796..8e9ac313ca3b 100644
--- a/include/asm-mips/barrier.h
+++ b/include/asm-mips/barrier.h
@@ -92,11 +92,25 @@
92#define fast_wmb() __sync() 92#define fast_wmb() __sync()
93#define fast_rmb() __sync() 93#define fast_rmb() __sync()
94#define fast_mb() __sync() 94#define fast_mb() __sync()
95#ifdef CONFIG_SGI_IP28
96#define fast_iob() \
97 __asm__ __volatile__( \
98 ".set push\n\t" \
99 ".set noreorder\n\t" \
100 "lw $0,%0\n\t" \
101 "sync\n\t" \
102 "lw $0,%0\n\t" \
103 ".set pop" \
104 : /* no output */ \
105 : "m" (*(int *)CKSEG1ADDR(0x1fa00004)) \
106 : "memory")
107#else
95#define fast_iob() \ 108#define fast_iob() \
96 do { \ 109 do { \
97 __sync(); \ 110 __sync(); \
98 __fast_iob(); \ 111 __fast_iob(); \
99 } while (0) 112 } while (0)
113#endif
100 114
101#ifdef CONFIG_CPU_HAS_WB 115#ifdef CONFIG_CPU_HAS_WB
102 116