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-rw-r--r--arch/sparc/kernel/ioport.c17
-rw-r--r--arch/sparc/kernel/of_device.c477
-rw-r--r--arch/sparc/kernel/prom.c30
-rw-r--r--arch/sparc/kernel/time.c109
-rw-r--r--arch/sparc64/kernel/auxio.c78
-rw-r--r--arch/sparc64/kernel/ebus.c150
-rw-r--r--arch/sparc64/kernel/irq.c4
-rw-r--r--arch/sparc64/kernel/isa.c101
-rw-r--r--arch/sparc64/kernel/of_device.c689
-rw-r--r--arch/sparc64/kernel/pci.c8
-rw-r--r--arch/sparc64/kernel/pci_common.c291
-rw-r--r--arch/sparc64/kernel/pci_psycho.c165
-rw-r--r--arch/sparc64/kernel/pci_sabre.c158
-rw-r--r--arch/sparc64/kernel/pci_schizo.c311
-rw-r--r--arch/sparc64/kernel/pci_sun4v.c10
-rw-r--r--arch/sparc64/kernel/power.c59
-rw-r--r--arch/sparc64/kernel/prom.c787
-rw-r--r--arch/sparc64/kernel/sbus.c6
-rw-r--r--arch/sparc64/kernel/starfire.c4
-rw-r--r--arch/sparc64/kernel/time.c258
-rw-r--r--arch/sparc64/kernel/unaligned.c4
-rw-r--r--drivers/input/serio/i8042-sparcio.h108
-rw-r--r--drivers/net/sunhme.c10
-rw-r--r--drivers/serial/sunsab.c299
-rw-r--r--drivers/serial/sunsu.c497
-rw-r--r--drivers/serial/sunzilog.c793
-rw-r--r--drivers/video/bw2.c213
-rw-r--r--drivers/video/cg14.c326
-rw-r--r--drivers/video/cg3.c217
-rw-r--r--drivers/video/cg6.c337
-rw-r--r--drivers/video/ffb.c466
-rw-r--r--drivers/video/leo.c294
-rw-r--r--drivers/video/p9100.c251
-rw-r--r--drivers/video/tcx.c224
-rw-r--r--include/asm-sparc/of_device.h20
-rw-r--r--include/asm-sparc/prom.h12
-rw-r--r--include/asm-sparc64/of_device.h20
-rw-r--r--include/asm-sparc64/pbm.h5
-rw-r--r--include/asm-sparc64/prom.h20
-rw-r--r--include/asm-sparc64/sbus.h1
-rw-r--r--include/asm-sparc64/starfire.h2
41 files changed, 4183 insertions, 3648 deletions
diff --git a/arch/sparc/kernel/ioport.c b/arch/sparc/kernel/ioport.c
index 79d177149fdb..8654b446ac9e 100644
--- a/arch/sparc/kernel/ioport.c
+++ b/arch/sparc/kernel/ioport.c
@@ -26,6 +26,7 @@
26 */ 26 */
27 27
28#include <linux/config.h> 28#include <linux/config.h>
29#include <linux/module.h>
29#include <linux/sched.h> 30#include <linux/sched.h>
30#include <linux/kernel.h> 31#include <linux/kernel.h>
31#include <linux/errno.h> 32#include <linux/errno.h>
@@ -40,6 +41,7 @@
40#include <asm/vaddrs.h> 41#include <asm/vaddrs.h>
41#include <asm/oplib.h> 42#include <asm/oplib.h>
42#include <asm/prom.h> 43#include <asm/prom.h>
44#include <asm/of_device.h>
43#include <asm/sbus.h> 45#include <asm/sbus.h>
44#include <asm/page.h> 46#include <asm/page.h>
45#include <asm/pgalloc.h> 47#include <asm/pgalloc.h>
@@ -143,6 +145,21 @@ void __iomem *sbus_ioremap(struct resource *phyres, unsigned long offset,
143 phyres->start + offset, size, name); 145 phyres->start + offset, size, name);
144} 146}
145 147
148void __iomem *of_ioremap(struct resource *res, unsigned long offset,
149 unsigned long size, char *name)
150{
151 return _sparc_alloc_io(res->flags & 0xF,
152 res->start + offset,
153 size, name);
154}
155EXPORT_SYMBOL(of_ioremap);
156
157void of_iounmap(void __iomem *base, unsigned long size)
158{
159 iounmap(base);
160}
161EXPORT_SYMBOL(of_iounmap);
162
146/* 163/*
147 */ 164 */
148void sbus_iounmap(volatile void __iomem *addr, unsigned long size) 165void sbus_iounmap(volatile void __iomem *addr, unsigned long size)
diff --git a/arch/sparc/kernel/of_device.c b/arch/sparc/kernel/of_device.c
index 80a809478781..bc956c530376 100644
--- a/arch/sparc/kernel/of_device.c
+++ b/arch/sparc/kernel/of_device.c
@@ -129,6 +129,26 @@ static int of_device_resume(struct device * dev)
129 return error; 129 return error;
130} 130}
131 131
132static int node_match(struct device *dev, void *data)
133{
134 struct of_device *op = to_of_device(dev);
135 struct device_node *dp = data;
136
137 return (op->node == dp);
138}
139
140struct of_device *of_find_device_by_node(struct device_node *dp)
141{
142 struct device *dev = bus_find_device(&of_bus_type, NULL,
143 dp, node_match);
144
145 if (dev)
146 return to_of_device(dev);
147
148 return NULL;
149}
150EXPORT_SYMBOL(of_find_device_by_node);
151
132#ifdef CONFIG_PCI 152#ifdef CONFIG_PCI
133struct bus_type ebus_bus_type = { 153struct bus_type ebus_bus_type = {
134 .name = "ebus", 154 .name = "ebus",
@@ -153,10 +173,459 @@ struct bus_type sbus_bus_type = {
153EXPORT_SYMBOL(sbus_bus_type); 173EXPORT_SYMBOL(sbus_bus_type);
154#endif 174#endif
155 175
176struct bus_type of_bus_type = {
177 .name = "of",
178 .match = of_platform_bus_match,
179 .probe = of_device_probe,
180 .remove = of_device_remove,
181 .suspend = of_device_suspend,
182 .resume = of_device_resume,
183};
184EXPORT_SYMBOL(of_bus_type);
185
186static inline u64 of_read_addr(u32 *cell, int size)
187{
188 u64 r = 0;
189 while (size--)
190 r = (r << 32) | *(cell++);
191 return r;
192}
193
194static void __init get_cells(struct device_node *dp,
195 int *addrc, int *sizec)
196{
197 if (addrc)
198 *addrc = of_n_addr_cells(dp);
199 if (sizec)
200 *sizec = of_n_size_cells(dp);
201}
202
203/* Max address size we deal with */
204#define OF_MAX_ADDR_CELLS 4
205
206struct of_bus {
207 const char *name;
208 const char *addr_prop_name;
209 int (*match)(struct device_node *parent);
210 void (*count_cells)(struct device_node *child,
211 int *addrc, int *sizec);
212 u64 (*map)(u32 *addr, u32 *range, int na, int ns, int pna);
213 int (*translate)(u32 *addr, u64 offset, int na);
214 unsigned int (*get_flags)(u32 *addr);
215};
216
217/*
218 * Default translator (generic bus)
219 */
220
221static void of_bus_default_count_cells(struct device_node *dev,
222 int *addrc, int *sizec)
223{
224 get_cells(dev, addrc, sizec);
225}
226
227static u64 of_bus_default_map(u32 *addr, u32 *range, int na, int ns, int pna)
228{
229 u64 cp, s, da;
230
231 cp = of_read_addr(range, na);
232 s = of_read_addr(range + na + pna, ns);
233 da = of_read_addr(addr, na);
234
235 if (da < cp || da >= (cp + s))
236 return OF_BAD_ADDR;
237 return da - cp;
238}
239
240static int of_bus_default_translate(u32 *addr, u64 offset, int na)
241{
242 u64 a = of_read_addr(addr, na);
243 memset(addr, 0, na * 4);
244 a += offset;
245 if (na > 1)
246 addr[na - 2] = a >> 32;
247 addr[na - 1] = a & 0xffffffffu;
248
249 return 0;
250}
251
252static unsigned int of_bus_default_get_flags(u32 *addr)
253{
254 return IORESOURCE_MEM;
255}
256
257
258/*
259 * PCI bus specific translator
260 */
261
262static int of_bus_pci_match(struct device_node *np)
263{
264 return !strcmp(np->type, "pci") || !strcmp(np->type, "pciex");
265}
266
267static void of_bus_pci_count_cells(struct device_node *np,
268 int *addrc, int *sizec)
269{
270 if (addrc)
271 *addrc = 3;
272 if (sizec)
273 *sizec = 2;
274}
275
276static u64 of_bus_pci_map(u32 *addr, u32 *range, int na, int ns, int pna)
277{
278 u64 cp, s, da;
279
280 /* Check address type match */
281 if ((addr[0] ^ range[0]) & 0x03000000)
282 return OF_BAD_ADDR;
283
284 /* Read address values, skipping high cell */
285 cp = of_read_addr(range + 1, na - 1);
286 s = of_read_addr(range + na + pna, ns);
287 da = of_read_addr(addr + 1, na - 1);
288
289 if (da < cp || da >= (cp + s))
290 return OF_BAD_ADDR;
291 return da - cp;
292}
293
294static int of_bus_pci_translate(u32 *addr, u64 offset, int na)
295{
296 return of_bus_default_translate(addr + 1, offset, na - 1);
297}
298
299static unsigned int of_bus_pci_get_flags(u32 *addr)
300{
301 unsigned int flags = 0;
302 u32 w = addr[0];
303
304 switch((w >> 24) & 0x03) {
305 case 0x01:
306 flags |= IORESOURCE_IO;
307 case 0x02: /* 32 bits */
308 case 0x03: /* 64 bits */
309 flags |= IORESOURCE_MEM;
310 }
311 if (w & 0x40000000)
312 flags |= IORESOURCE_PREFETCH;
313 return flags;
314}
315
316/*
317 * SBUS bus specific translator
318 */
319
320static int of_bus_sbus_match(struct device_node *np)
321{
322 return !strcmp(np->name, "sbus") ||
323 !strcmp(np->name, "sbi");
324}
325
326static void of_bus_sbus_count_cells(struct device_node *child,
327 int *addrc, int *sizec)
328{
329 if (addrc)
330 *addrc = 2;
331 if (sizec)
332 *sizec = 1;
333}
334
335static u64 of_bus_sbus_map(u32 *addr, u32 *range, int na, int ns, int pna)
336{
337 return of_bus_default_map(addr, range, na, ns, pna);
338}
339
340static int of_bus_sbus_translate(u32 *addr, u64 offset, int na)
341{
342 return of_bus_default_translate(addr, offset, na);
343}
344
345static unsigned int of_bus_sbus_get_flags(u32 *addr)
346{
347 return IORESOURCE_MEM;
348}
349
350
351/*
352 * Array of bus specific translators
353 */
354
355static struct of_bus of_busses[] = {
356 /* PCI */
357 {
358 .name = "pci",
359 .addr_prop_name = "assigned-addresses",
360 .match = of_bus_pci_match,
361 .count_cells = of_bus_pci_count_cells,
362 .map = of_bus_pci_map,
363 .translate = of_bus_pci_translate,
364 .get_flags = of_bus_pci_get_flags,
365 },
366 /* SBUS */
367 {
368 .name = "sbus",
369 .addr_prop_name = "reg",
370 .match = of_bus_sbus_match,
371 .count_cells = of_bus_sbus_count_cells,
372 .map = of_bus_sbus_map,
373 .translate = of_bus_sbus_translate,
374 .get_flags = of_bus_sbus_get_flags,
375 },
376 /* Default */
377 {
378 .name = "default",
379 .addr_prop_name = "reg",
380 .match = NULL,
381 .count_cells = of_bus_default_count_cells,
382 .map = of_bus_default_map,
383 .translate = of_bus_default_translate,
384 .get_flags = of_bus_default_get_flags,
385 },
386};
387
388static struct of_bus *of_match_bus(struct device_node *np)
389{
390 int i;
391
392 for (i = 0; i < ARRAY_SIZE(of_busses); i ++)
393 if (!of_busses[i].match || of_busses[i].match(np))
394 return &of_busses[i];
395 BUG();
396 return NULL;
397}
398
399static int __init build_one_resource(struct device_node *parent,
400 struct of_bus *bus,
401 struct of_bus *pbus,
402 u32 *addr,
403 int na, int ns, int pna)
404{
405 u32 *ranges;
406 unsigned int rlen;
407 int rone;
408 u64 offset = OF_BAD_ADDR;
409
410 ranges = of_get_property(parent, "ranges", &rlen);
411 if (ranges == NULL || rlen == 0) {
412 offset = of_read_addr(addr, na);
413 memset(addr, 0, pna * 4);
414 goto finish;
415 }
416
417 /* Now walk through the ranges */
418 rlen /= 4;
419 rone = na + pna + ns;
420 for (; rlen >= rone; rlen -= rone, ranges += rone) {
421 offset = bus->map(addr, ranges, na, ns, pna);
422 if (offset != OF_BAD_ADDR)
423 break;
424 }
425 if (offset == OF_BAD_ADDR)
426 return 1;
427
428 memcpy(addr, ranges + na, 4 * pna);
429
430finish:
431 /* Translate it into parent bus space */
432 return pbus->translate(addr, offset, pna);
433}
434
435static void __init build_device_resources(struct of_device *op,
436 struct device *parent)
437{
438 struct of_device *p_op;
439 struct of_bus *bus;
440 int na, ns;
441 int index, num_reg;
442 void *preg;
443
444 if (!parent)
445 return;
446
447 p_op = to_of_device(parent);
448 bus = of_match_bus(p_op->node);
449 bus->count_cells(op->node, &na, &ns);
450
451 preg = of_get_property(op->node, bus->addr_prop_name, &num_reg);
452 if (!preg || num_reg == 0)
453 return;
454
455 /* Convert to num-cells. */
456 num_reg /= 4;
457
458 /* Conver to num-entries. */
459 num_reg /= na + ns;
460
461 for (index = 0; index < num_reg; index++) {
462 struct resource *r = &op->resource[index];
463 u32 addr[OF_MAX_ADDR_CELLS];
464 u32 *reg = (preg + (index * ((na + ns) * 4)));
465 struct device_node *dp = op->node;
466 struct device_node *pp = p_op->node;
467 struct of_bus *pbus;
468 u64 size, result = OF_BAD_ADDR;
469 unsigned long flags;
470 int dna, dns;
471 int pna, pns;
472
473 size = of_read_addr(reg + na, ns);
474 flags = bus->get_flags(reg);
475
476 memcpy(addr, reg, na * 4);
477
478 /* If the immediate parent has no ranges property to apply,
479 * just use a 1<->1 mapping.
480 */
481 if (of_find_property(pp, "ranges", NULL) == NULL) {
482 result = of_read_addr(addr, na);
483 goto build_res;
484 }
485
486 dna = na;
487 dns = ns;
488
489 while (1) {
490 dp = pp;
491 pp = dp->parent;
492 if (!pp) {
493 result = of_read_addr(addr, dna);
494 break;
495 }
496
497 pbus = of_match_bus(pp);
498 pbus->count_cells(dp, &pna, &pns);
499
500 if (build_one_resource(dp, bus, pbus, addr, dna, dns, pna))
501 break;
502
503 dna = pna;
504 dns = pns;
505 bus = pbus;
506 }
507
508 build_res:
509 memset(r, 0, sizeof(*r));
510 if (result != OF_BAD_ADDR) {
511 r->start = result & 0xffffffff;
512 r->end = result + size - 1;
513 r->flags = flags | ((result >> 32ULL) & 0xffUL);
514 } else {
515 r->start = ~0UL;
516 r->end = ~0UL;
517 }
518 r->name = op->node->name;
519 }
520}
521
522static struct of_device * __init scan_one_device(struct device_node *dp,
523 struct device *parent)
524{
525 struct of_device *op = kzalloc(sizeof(*op), GFP_KERNEL);
526 struct linux_prom_irqs *intr;
527 int len, i;
528
529 if (!op)
530 return NULL;
531
532 op->node = dp;
533
534 op->clock_freq = of_getintprop_default(dp, "clock-frequency",
535 (25*1000*1000));
536 op->portid = of_getintprop_default(dp, "upa-portid", -1);
537 if (op->portid == -1)
538 op->portid = of_getintprop_default(dp, "portid", -1);
539
540 intr = of_get_property(dp, "intr", &len);
541 if (intr) {
542 op->num_irqs = len / sizeof(struct linux_prom_irqs);
543 for (i = 0; i < op->num_irqs; i++)
544 op->irqs[i] = intr[i].pri;
545 } else {
546 unsigned int *irq = of_get_property(dp, "interrupts", &len);
547
548 if (irq) {
549 op->num_irqs = len / sizeof(unsigned int);
550 for (i = 0; i < op->num_irqs; i++)
551 op->irqs[i] = irq[i];
552 } else {
553 op->num_irqs = 0;
554 }
555 }
556 if (sparc_cpu_model == sun4d) {
557 static int pil_to_sbus[] = {
558 0, 0, 1, 2, 0, 3, 0, 4, 0, 5, 0, 6, 0, 7, 0, 0,
559 };
560 struct device_node *busp = dp->parent;
561 struct linux_prom_registers *regs;
562 int board = of_getintprop_default(busp, "board#", 0);
563 int slot;
564
565 regs = of_get_property(dp, "reg", NULL);
566 slot = regs->which_io;
567
568 for (i = 0; i < op->num_irqs; i++) {
569 int this_irq = op->irqs[i];
570 int sbusl = pil_to_sbus[this_irq];
571
572 if (sbusl)
573 this_irq = (((board + 1) << 5) +
574 (sbusl << 2) +
575 slot);
576
577 op->irqs[i] = this_irq;
578 }
579 }
580
581 build_device_resources(op, parent);
582
583 op->dev.parent = parent;
584 op->dev.bus = &of_bus_type;
585 if (!parent)
586 strcpy(op->dev.bus_id, "root");
587 else
588 strcpy(op->dev.bus_id, dp->path_component_name);
589
590 if (of_device_register(op)) {
591 printk("%s: Could not register of device.\n",
592 dp->full_name);
593 kfree(op);
594 op = NULL;
595 }
596
597 return op;
598}
599
600static void __init scan_tree(struct device_node *dp, struct device *parent)
601{
602 while (dp) {
603 struct of_device *op = scan_one_device(dp, parent);
604
605 if (op)
606 scan_tree(dp->child, &op->dev);
607
608 dp = dp->sibling;
609 }
610}
611
612static void __init scan_of_devices(void)
613{
614 struct device_node *root = of_find_node_by_path("/");
615 struct of_device *parent;
616
617 parent = scan_one_device(root, NULL);
618 if (!parent)
619 return;
620
621 scan_tree(root->child, &parent->dev);
622}
623
156static int __init of_bus_driver_init(void) 624static int __init of_bus_driver_init(void)
157{ 625{
158 int err = 0; 626 int err;
159 627
628 err = bus_register(&of_bus_type);
160#ifdef CONFIG_PCI 629#ifdef CONFIG_PCI
161 if (!err) 630 if (!err)
162 err = bus_register(&ebus_bus_type); 631 err = bus_register(&ebus_bus_type);
@@ -165,7 +634,11 @@ static int __init of_bus_driver_init(void)
165 if (!err) 634 if (!err)
166 err = bus_register(&sbus_bus_type); 635 err = bus_register(&sbus_bus_type);
167#endif 636#endif
168 return 0; 637
638 if (!err)
639 scan_of_devices();
640
641 return err;
169} 642}
170 643
171postcore_initcall(of_bus_driver_init); 644postcore_initcall(of_bus_driver_init);
diff --git a/arch/sparc/kernel/prom.c b/arch/sparc/kernel/prom.c
index 946ce6d15819..4b06dcb00ebd 100644
--- a/arch/sparc/kernel/prom.c
+++ b/arch/sparc/kernel/prom.c
@@ -190,6 +190,36 @@ int of_getintprop_default(struct device_node *np, const char *name, int def)
190} 190}
191EXPORT_SYMBOL(of_getintprop_default); 191EXPORT_SYMBOL(of_getintprop_default);
192 192
193int of_n_addr_cells(struct device_node *np)
194{
195 int* ip;
196 do {
197 if (np->parent)
198 np = np->parent;
199 ip = of_get_property(np, "#address-cells", NULL);
200 if (ip != NULL)
201 return *ip;
202 } while (np->parent);
203 /* No #address-cells property for the root node, default to 2 */
204 return 2;
205}
206EXPORT_SYMBOL(of_n_addr_cells);
207
208int of_n_size_cells(struct device_node *np)
209{
210 int* ip;
211 do {
212 if (np->parent)
213 np = np->parent;
214 ip = of_get_property(np, "#size-cells", NULL);
215 if (ip != NULL)
216 return *ip;
217 } while (np->parent);
218 /* No #size-cells property for the root node, default to 1 */
219 return 1;
220}
221EXPORT_SYMBOL(of_n_size_cells);
222
193int of_set_property(struct device_node *dp, const char *name, void *val, int len) 223int of_set_property(struct device_node *dp, const char *name, void *val, int len)
194{ 224{
195 struct property **prevp; 225 struct property **prevp;
diff --git a/arch/sparc/kernel/time.c b/arch/sparc/kernel/time.c
index 7dadcdb4ca42..9631e8f4ae60 100644
--- a/arch/sparc/kernel/time.c
+++ b/arch/sparc/kernel/time.c
@@ -42,6 +42,7 @@
42#include <asm/sun4paddr.h> 42#include <asm/sun4paddr.h>
43#include <asm/page.h> 43#include <asm/page.h>
44#include <asm/pcic.h> 44#include <asm/pcic.h>
45#include <asm/of_device.h>
45 46
46extern unsigned long wall_jiffies; 47extern unsigned long wall_jiffies;
47 48
@@ -273,83 +274,31 @@ static __inline__ void sun4_clock_probe(void)
273#endif 274#endif
274} 275}
275 276
276/* Probe for the mostek real time clock chip. */ 277static int __devinit clock_probe(struct of_device *op, const struct of_device_id *match)
277static __inline__ void clock_probe(void)
278{ 278{
279 struct linux_prom_registers clk_reg[2]; 279 struct device_node *dp = op->node;
280 char model[128]; 280 char *model = of_get_property(dp, "model", NULL);
281 register int node, cpuunit, bootbus;
282 struct resource r;
283
284 cpuunit = bootbus = 0;
285 memset(&r, 0, sizeof(r));
286
287 /* Determine the correct starting PROM node for the probe. */
288 node = prom_getchild(prom_root_node);
289 switch (sparc_cpu_model) {
290 case sun4c:
291 break;
292 case sun4m:
293 node = prom_getchild(prom_searchsiblings(node, "obio"));
294 break;
295 case sun4d:
296 node = prom_getchild(bootbus = prom_searchsiblings(prom_getchild(cpuunit = prom_searchsiblings(node, "cpu-unit")), "bootbus"));
297 break;
298 default:
299 prom_printf("CLOCK: Unsupported architecture!\n");
300 prom_halt();
301 }
302 281
303 /* Find the PROM node describing the real time clock. */ 282 if (!model)
304 sp_clock_typ = MSTK_INVALID; 283 return -ENODEV;
305 node = prom_searchsiblings(node,"eeprom");
306 if (!node) {
307 prom_printf("CLOCK: No clock found!\n");
308 prom_halt();
309 }
310 284
311 /* Get the model name and setup everything up. */ 285 if (!strcmp(model, "mk48t02")) {
312 model[0] = '\0';
313 prom_getstring(node, "model", model, sizeof(model));
314 if (strcmp(model, "mk48t02") == 0) {
315 sp_clock_typ = MSTK48T02; 286 sp_clock_typ = MSTK48T02;
316 if (prom_getproperty(node, "reg", (char *) clk_reg, sizeof(clk_reg)) == -1) { 287
317 prom_printf("clock_probe: FAILED!\n");
318 prom_halt();
319 }
320 if (sparc_cpu_model == sun4d)
321 prom_apply_generic_ranges (bootbus, cpuunit, clk_reg, 1);
322 else
323 prom_apply_obio_ranges(clk_reg, 1);
324 /* Map the clock register io area read-only */ 288 /* Map the clock register io area read-only */
325 r.flags = clk_reg[0].which_io; 289 mstk48t02_regs = of_ioremap(&op->resource[0], 0,
326 r.start = clk_reg[0].phys_addr; 290 sizeof(struct mostek48t02),
327 mstk48t02_regs = sbus_ioremap(&r, 0, 291 "mk48t02");
328 sizeof(struct mostek48t02), "mk48t02");
329 mstk48t08_regs = NULL; /* To catch weirdness */ 292 mstk48t08_regs = NULL; /* To catch weirdness */
330 } else if (strcmp(model, "mk48t08") == 0) { 293 } else if (!strcmp(model, "mk48t08")) {
331 sp_clock_typ = MSTK48T08; 294 sp_clock_typ = MSTK48T08;
332 if(prom_getproperty(node, "reg", (char *) clk_reg, 295 mstk48t08_regs = of_ioremap(&op->resource[0], 0,
333 sizeof(clk_reg)) == -1) { 296 sizeof(struct mostek48t08),
334 prom_printf("clock_probe: FAILED!\n"); 297 "mk48t08");
335 prom_halt();
336 }
337 if (sparc_cpu_model == sun4d)
338 prom_apply_generic_ranges (bootbus, cpuunit, clk_reg, 1);
339 else
340 prom_apply_obio_ranges(clk_reg, 1);
341 /* Map the clock register io area read-only */
342 /* XXX r/o attribute is somewhere in r.flags */
343 r.flags = clk_reg[0].which_io;
344 r.start = clk_reg[0].phys_addr;
345 mstk48t08_regs = sbus_ioremap(&r, 0,
346 sizeof(struct mostek48t08), "mk48t08");
347 298
348 mstk48t02_regs = &mstk48t08_regs->regs; 299 mstk48t02_regs = &mstk48t08_regs->regs;
349 } else { 300 } else
350 prom_printf("CLOCK: Unknown model name '%s'\n",model); 301 return -ENODEV;
351 prom_halt();
352 }
353 302
354 /* Report a low battery voltage condition. */ 303 /* Report a low battery voltage condition. */
355 if (has_low_battery()) 304 if (has_low_battery())
@@ -358,6 +307,28 @@ static __inline__ void clock_probe(void)
358 /* Kick start the clock if it is completely stopped. */ 307 /* Kick start the clock if it is completely stopped. */
359 if (mostek_read(mstk48t02_regs + MOSTEK_SEC) & MSTK_STOP) 308 if (mostek_read(mstk48t02_regs + MOSTEK_SEC) & MSTK_STOP)
360 kick_start_clock(); 309 kick_start_clock();
310
311 return 0;
312}
313
314static struct of_device_id clock_match[] = {
315 {
316 .name = "eeprom",
317 },
318 {},
319};
320
321static struct of_platform_driver clock_driver = {
322 .name = "clock",
323 .match_table = clock_match,
324 .probe = clock_probe,
325};
326
327
328/* Probe for the mostek real time clock chip. */
329static void clock_init(void)
330{
331 of_register_driver(&clock_driver, &of_bus_type);
361} 332}
362 333
363void __init sbus_time_init(void) 334void __init sbus_time_init(void)
@@ -376,7 +347,7 @@ void __init sbus_time_init(void)
376 if (ARCH_SUN4) 347 if (ARCH_SUN4)
377 sun4_clock_probe(); 348 sun4_clock_probe();
378 else 349 else
379 clock_probe(); 350 clock_init();
380 351
381 sparc_init_timers(timer_interrupt); 352 sparc_init_timers(timer_interrupt);
382 353
diff --git a/arch/sparc64/kernel/auxio.c b/arch/sparc64/kernel/auxio.c
index c2c69c167d18..718350aba1ec 100644
--- a/arch/sparc64/kernel/auxio.c
+++ b/arch/sparc64/kernel/auxio.c
@@ -11,10 +11,9 @@
11#include <linux/init.h> 11#include <linux/init.h>
12#include <linux/ioport.h> 12#include <linux/ioport.h>
13 13
14#include <asm/oplib.h> 14#include <asm/prom.h>
15#include <asm/of_device.h>
15#include <asm/io.h> 16#include <asm/io.h>
16#include <asm/sbus.h>
17#include <asm/ebus.h>
18#include <asm/auxio.h> 17#include <asm/auxio.h>
19 18
20void __iomem *auxio_register = NULL; 19void __iomem *auxio_register = NULL;
@@ -111,12 +110,6 @@ void auxio_set_lte(int on)
111 } 110 }
112} 111}
113 112
114static void __devinit auxio_report_dev(struct device_node *dp)
115{
116 printk(KERN_INFO "AUXIO: Found device at %s\n",
117 dp->full_name);
118}
119
120static struct of_device_id auxio_match[] = { 113static struct of_device_id auxio_match[] = {
121 { 114 {
122 .name = "auxio", 115 .name = "auxio",
@@ -126,67 +119,48 @@ static struct of_device_id auxio_match[] = {
126 119
127MODULE_DEVICE_TABLE(of, auxio_match); 120MODULE_DEVICE_TABLE(of, auxio_match);
128 121
129#ifdef CONFIG_SBUS 122static int __devinit auxio_probe(struct of_device *dev, const struct of_device_id *match)
130static int __devinit auxio_sbus_probe(struct of_device *dev, const struct of_device_id *match)
131{ 123{
132 struct sbus_dev *sdev = to_sbus_device(&dev->dev); 124 struct device_node *dp = dev->node;
133 125 unsigned long size;
134 auxio_devtype = AUXIO_TYPE_SBUS; 126
135 auxio_register = sbus_ioremap(&sdev->resource[0], 0, 127 if (!strcmp(dp->parent->name, "ebus")) {
136 sdev->reg_addrs[0].reg_size, 128 auxio_devtype = AUXIO_TYPE_EBUS;
137 "auxiliaryIO"); 129 size = sizeof(u32);
138 if (!auxio_register) 130 } else if (!strcmp(dp->parent->name, "sbus")) {
131 auxio_devtype = AUXIO_TYPE_SBUS;
132 size = 1;
133 } else {
134 printk("auxio: Unknown parent bus type [%s]\n",
135 dp->parent->name);
139 return -ENODEV; 136 return -ENODEV;
140 137 }
141 auxio_report_dev(dev->node); 138 auxio_register = of_ioremap(&dev->resource[0], 0, size, "auxio");
142 return 0;
143}
144
145static struct of_platform_driver auxio_sbus_driver = {
146 .name = "auxio",
147 .match_table = auxio_match,
148 .probe = auxio_sbus_probe,
149};
150#endif
151
152#ifdef CONFIG_PCI
153static int __devinit auxio_ebus_probe(struct of_device *dev, const struct of_device_id *match)
154{
155 struct linux_ebus_device *edev = to_ebus_device(&dev->dev);
156
157 auxio_devtype = AUXIO_TYPE_EBUS;
158 auxio_register = ioremap(edev->resource[0].start, sizeof(u32));
159 if (!auxio_register) 139 if (!auxio_register)
160 return -ENODEV; 140 return -ENODEV;
161 141
162 auxio_report_dev(dev->node); 142 printk(KERN_INFO "AUXIO: Found device at %s\n",
143 dp->full_name);
163 144
164 auxio_set_led(AUXIO_LED_ON); 145 if (auxio_devtype == AUXIO_TYPE_EBUS)
146 auxio_set_led(AUXIO_LED_ON);
165 147
166 return 0; 148 return 0;
167} 149}
168 150
169static struct of_platform_driver auxio_ebus_driver = { 151static struct of_platform_driver auxio_driver = {
170 .name = "auxio", 152 .name = "auxio",
171 .match_table = auxio_match, 153 .match_table = auxio_match,
172 .probe = auxio_ebus_probe, 154 .probe = auxio_probe,
173}; 155};
174#endif
175 156
176static int __init auxio_probe(void) 157static int __init auxio_init(void)
177{ 158{
178#ifdef CONFIG_SBUS 159 return of_register_driver(&auxio_driver, &of_bus_type);
179 of_register_driver(&auxio_sbus_driver, &sbus_bus_type);
180#endif
181#ifdef CONFIG_PCI
182 of_register_driver(&auxio_ebus_driver, &ebus_bus_type);
183#endif
184
185 return 0;
186} 160}
187 161
188/* Must be after subsys_initcall() so that busses are probed. Must 162/* Must be after subsys_initcall() so that busses are probed. Must
189 * be before device_initcall() because things like the floppy driver 163 * be before device_initcall() because things like the floppy driver
190 * need to use the AUXIO register. 164 * need to use the AUXIO register.
191 */ 165 */
192fs_initcall(auxio_probe); 166fs_initcall(auxio_init);
diff --git a/arch/sparc64/kernel/ebus.c b/arch/sparc64/kernel/ebus.c
index 98e0a8cbeecd..aac014d15ad3 100644
--- a/arch/sparc64/kernel/ebus.c
+++ b/arch/sparc64/kernel/ebus.c
@@ -20,6 +20,8 @@
20#include <asm/pbm.h> 20#include <asm/pbm.h>
21#include <asm/ebus.h> 21#include <asm/ebus.h>
22#include <asm/oplib.h> 22#include <asm/oplib.h>
23#include <asm/prom.h>
24#include <asm/of_device.h>
23#include <asm/bpp.h> 25#include <asm/bpp.h>
24#include <asm/irq.h> 26#include <asm/irq.h>
25 27
@@ -279,45 +281,12 @@ static inline void *ebus_alloc(size_t size)
279 return mem; 281 return mem;
280} 282}
281 283
282int __init ebus_intmap_match(struct linux_ebus *ebus, 284static void __init fill_ebus_child(struct device_node *dp,
283 struct linux_prom_registers *reg, 285 struct linux_ebus_child *dev,
284 int *interrupt) 286 int non_standard_regs)
285{
286 struct linux_prom_ebus_intmap *imap;
287 struct linux_prom_ebus_intmask *imask;
288 unsigned int hi, lo, irq;
289 int i, len, n_imap;
290
291 imap = of_get_property(ebus->prom_node, "interrupt-map", &len);
292 if (!imap)
293 return 0;
294 n_imap = len / sizeof(imap[0]);
295
296 imask = of_get_property(ebus->prom_node, "interrupt-map-mask", NULL);
297 if (!imask)
298 return 0;
299
300 hi = reg->which_io & imask->phys_hi;
301 lo = reg->phys_addr & imask->phys_lo;
302 irq = *interrupt & imask->interrupt;
303 for (i = 0; i < n_imap; i++) {
304 if ((imap[i].phys_hi == hi) &&
305 (imap[i].phys_lo == lo) &&
306 (imap[i].interrupt == irq)) {
307 *interrupt = imap[i].cinterrupt;
308 return 0;
309 }
310 }
311 return -1;
312}
313
314void __init fill_ebus_child(struct device_node *dp,
315 struct linux_prom_registers *preg,
316 struct linux_ebus_child *dev,
317 int non_standard_regs)
318{ 287{
288 struct of_device *op;
319 int *regs; 289 int *regs;
320 int *irqs;
321 int i, len; 290 int i, len;
322 291
323 dev->prom_node = dp; 292 dev->prom_node = dp;
@@ -354,12 +323,16 @@ void __init fill_ebus_child(struct device_node *dp,
354 } 323 }
355 } 324 }
356 325
357 for (i = 0; i < PROMINTR_MAX; i++) 326 op = of_find_device_by_node(dp);
358 dev->irqs[i] = PCI_IRQ_NONE; 327 if (!op) {
359
360 irqs = of_get_property(dp, "interrupts", &len);
361 if (!irqs) {
362 dev->num_irqs = 0; 328 dev->num_irqs = 0;
329 } else {
330 dev->num_irqs = op->num_irqs;
331 for (i = 0; i < dev->num_irqs; i++)
332 dev->irqs[i] = op->irqs[i];
333 }
334
335 if (!dev->num_irqs) {
363 /* 336 /*
364 * Oh, well, some PROMs don't export interrupts 337 * Oh, well, some PROMs don't export interrupts
365 * property to children of EBus devices... 338 * property to children of EBus devices...
@@ -375,23 +348,6 @@ void __init fill_ebus_child(struct device_node *dp,
375 dev->irqs[0] = dev->parent->irqs[1]; 348 dev->irqs[0] = dev->parent->irqs[1];
376 } 349 }
377 } 350 }
378 } else {
379 dev->num_irqs = len / sizeof(irqs[0]);
380 for (i = 0; i < dev->num_irqs; i++) {
381 struct pci_pbm_info *pbm = dev->bus->parent;
382 struct pci_controller_info *p = pbm->parent;
383
384 if (ebus_intmap_match(dev->bus, preg, &irqs[i]) != -1) {
385 dev->irqs[i] = p->irq_build(pbm,
386 dev->bus->self,
387 irqs[i]);
388 } else {
389 /* If we get a bogus interrupt property, just
390 * record the raw value instead of punting.
391 */
392 dev->irqs[i] = irqs[i];
393 }
394 }
395 } 351 }
396} 352}
397 353
@@ -403,72 +359,32 @@ static int __init child_regs_nonstandard(struct linux_ebus_device *dev)
403 return 0; 359 return 0;
404} 360}
405 361
406void __init fill_ebus_device(struct device_node *dp, struct linux_ebus_device *dev) 362static void __init fill_ebus_device(struct device_node *dp, struct linux_ebus_device *dev)
407{ 363{
408 struct linux_prom_registers *regs;
409 struct linux_ebus_child *child; 364 struct linux_ebus_child *child;
410 int *irqs; 365 struct of_device *op;
411 int i, n, len; 366 int i, len;
412 367
413 dev->prom_node = dp; 368 dev->prom_node = dp;
414 369
415 printk(" [%s", dp->name); 370 printk(" [%s", dp->name);
416 371
417 regs = of_get_property(dp, "reg", &len); 372 op = of_find_device_by_node(dp);
418 if (!regs) { 373 if (!op) {
419 dev->num_addrs = 0; 374 dev->num_addrs = 0;
420 goto probe_interrupts;
421 }
422
423 if (len % sizeof(struct linux_prom_registers)) {
424 prom_printf("UGH: proplen for %s was %d, need multiple of %d\n",
425 dev->prom_node->name, len,
426 (int)sizeof(struct linux_prom_registers));
427 prom_halt();
428 }
429 dev->num_addrs = len / sizeof(struct linux_prom_registers);
430
431 for (i = 0; i < dev->num_addrs; i++) {
432 /* XXX Learn how to interpret ebus ranges... -DaveM */
433 if (regs[i].which_io >= 0x10)
434 n = (regs[i].which_io - 0x10) >> 2;
435 else
436 n = regs[i].which_io;
437
438 dev->resource[i].start = dev->bus->self->resource[n].start;
439 dev->resource[i].start += (unsigned long)regs[i].phys_addr;
440 dev->resource[i].end =
441 (dev->resource[i].start + (unsigned long)regs[i].reg_size - 1UL);
442 dev->resource[i].flags = IORESOURCE_MEM;
443 dev->resource[i].name = dev->prom_node->name;
444 request_resource(&dev->bus->self->resource[n],
445 &dev->resource[i]);
446 }
447
448probe_interrupts:
449 for (i = 0; i < PROMINTR_MAX; i++)
450 dev->irqs[i] = PCI_IRQ_NONE;
451
452 irqs = of_get_property(dp, "interrupts", &len);
453 if (!irqs) {
454 dev->num_irqs = 0; 375 dev->num_irqs = 0;
455 } else { 376 } else {
456 dev->num_irqs = len / sizeof(irqs[0]); 377 (void) of_get_property(dp, "reg", &len);
457 for (i = 0; i < dev->num_irqs; i++) { 378 dev->num_addrs = len / sizeof(struct linux_prom_registers);
458 struct pci_pbm_info *pbm = dev->bus->parent; 379
459 struct pci_controller_info *p = pbm->parent; 380 for (i = 0; i < dev->num_addrs; i++)
460 381 memcpy(&dev->resource[i],
461 if (ebus_intmap_match(dev->bus, &regs[0], &irqs[i]) != -1) { 382 &op->resource[i],
462 dev->irqs[i] = p->irq_build(pbm, 383 sizeof(struct resource));
463 dev->bus->self, 384
464 irqs[i]); 385 dev->num_irqs = op->num_irqs;
465 } else { 386 for (i = 0; i < dev->num_irqs; i++)
466 /* If we get a bogus interrupt property, just 387 dev->irqs[i] = op->irqs[i];
467 * record the raw value instead of punting.
468 */
469 dev->irqs[i] = irqs[i];
470 }
471 }
472 } 388 }
473 389
474 dev->ofdev.node = dp; 390 dev->ofdev.node = dp;
@@ -490,7 +406,7 @@ probe_interrupts:
490 child->next = NULL; 406 child->next = NULL;
491 child->parent = dev; 407 child->parent = dev;
492 child->bus = dev->bus; 408 child->bus = dev->bus;
493 fill_ebus_child(dp, regs, child, 409 fill_ebus_child(dp, child,
494 child_regs_nonstandard(dev)); 410 child_regs_nonstandard(dev));
495 411
496 while ((dp = dp->sibling) != NULL) { 412 while ((dp = dp->sibling) != NULL) {
@@ -500,7 +416,7 @@ probe_interrupts:
500 child->next = NULL; 416 child->next = NULL;
501 child->parent = dev; 417 child->parent = dev;
502 child->bus = dev->bus; 418 child->bus = dev->bus;
503 fill_ebus_child(dp, regs, child, 419 fill_ebus_child(dp, child,
504 child_regs_nonstandard(dev)); 420 child_regs_nonstandard(dev));
505 } 421 }
506 } 422 }
diff --git a/arch/sparc64/kernel/irq.c b/arch/sparc64/kernel/irq.c
index ab9e640df228..eebe02f3f4cb 100644
--- a/arch/sparc64/kernel/irq.c
+++ b/arch/sparc64/kernel/irq.c
@@ -414,6 +414,10 @@ void irq_install_pre_handler(int virt_irq,
414 data->pre_handler_arg1 = arg1; 414 data->pre_handler_arg1 = arg1;
415 data->pre_handler_arg2 = arg2; 415 data->pre_handler_arg2 = arg2;
416 416
417 if (desc->chip == &sun4u_irq_ack ||
418 desc->chip == &sun4v_irq_ack)
419 return;
420
417 desc->chip = (desc->chip == &sun4u_irq ? 421 desc->chip = (desc->chip == &sun4u_irq ?
418 &sun4u_irq_ack : &sun4v_irq_ack); 422 &sun4u_irq_ack : &sun4v_irq_ack);
419} 423}
diff --git a/arch/sparc64/kernel/isa.c b/arch/sparc64/kernel/isa.c
index 6f16dee280a8..0f3aec72ef5f 100644
--- a/arch/sparc64/kernel/isa.c
+++ b/arch/sparc64/kernel/isa.c
@@ -3,6 +3,8 @@
3#include <linux/pci.h> 3#include <linux/pci.h>
4#include <linux/slab.h> 4#include <linux/slab.h>
5#include <asm/oplib.h> 5#include <asm/oplib.h>
6#include <asm/prom.h>
7#include <asm/of_device.h>
6#include <asm/isa.h> 8#include <asm/isa.h>
7 9
8struct sparc_isa_bridge *isa_chain; 10struct sparc_isa_bridge *isa_chain;
@@ -46,107 +48,16 @@ isa_dev_get_resource(struct sparc_isa_device *isa_dev)
46 return pregs; 48 return pregs;
47} 49}
48 50
49/* I can't believe they didn't put a real INO in the isa device
50 * interrupts property. The whole point of the OBP properties
51 * is to shield the kernel from IRQ routing details.
52 *
53 * The P1275 standard for ISA devices seems to also have been
54 * totally ignored.
55 *
56 * On later systems, an interrupt-map and interrupt-map-mask scheme
57 * akin to EBUS is used.
58 */
59static struct {
60 int obp_irq;
61 int pci_ino;
62} grover_irq_table[] = {
63 { 1, 0x00 }, /* dma, unknown ino at this point */
64 { 2, 0x27 }, /* floppy */
65 { 3, 0x22 }, /* parallel */
66 { 4, 0x2b }, /* serial */
67 { 5, 0x25 }, /* acpi power management */
68
69 { 0, 0x00 } /* end of table */
70};
71
72static int __init isa_dev_get_irq_using_imap(struct sparc_isa_device *isa_dev,
73 struct sparc_isa_bridge *isa_br,
74 int *interrupt,
75 struct linux_prom_registers *reg)
76{
77 struct linux_prom_ebus_intmap *imap;
78 struct linux_prom_ebus_intmap *imask;
79 unsigned int hi, lo, irq;
80 int i, len, n_imap;
81
82 imap = of_get_property(isa_br->prom_node, "interrupt-map", &len);
83 if (!imap)
84 return 0;
85 n_imap = len / sizeof(imap[0]);
86
87 imask = of_get_property(isa_br->prom_node, "interrupt-map-mask", NULL);
88 if (!imask)
89 return 0;
90
91 hi = reg->which_io & imask->phys_hi;
92 lo = reg->phys_addr & imask->phys_lo;
93 irq = *interrupt & imask->interrupt;
94 for (i = 0; i < n_imap; i++) {
95 if ((imap[i].phys_hi == hi) &&
96 (imap[i].phys_lo == lo) &&
97 (imap[i].interrupt == irq)) {
98 *interrupt = imap[i].cinterrupt;
99 return 0;
100 }
101 }
102 return -1;
103}
104
105static void __init isa_dev_get_irq(struct sparc_isa_device *isa_dev, 51static void __init isa_dev_get_irq(struct sparc_isa_device *isa_dev,
106 struct linux_prom_registers *pregs) 52 struct linux_prom_registers *pregs)
107{ 53{
108 int irq_prop; 54 struct of_device *op = of_find_device_by_node(isa_dev->prom_node);
109 55
110 irq_prop = of_getintprop_default(isa_dev->prom_node, 56 if (!op || !op->num_irqs) {
111 "interrupts", -1); 57 isa_dev->irq = PCI_IRQ_NONE;
112 if (irq_prop <= 0) {
113 goto no_irq;
114 } else { 58 } else {
115 struct pci_controller_info *pcic; 59 isa_dev->irq = op->irqs[0];
116 struct pci_pbm_info *pbm;
117 int i;
118
119 if (of_find_property(isa_dev->bus->prom_node,
120 "interrupt-map", NULL)) {
121 if (!isa_dev_get_irq_using_imap(isa_dev,
122 isa_dev->bus,
123 &irq_prop,
124 pregs))
125 goto route_irq;
126 }
127
128 for (i = 0; grover_irq_table[i].obp_irq != 0; i++) {
129 if (grover_irq_table[i].obp_irq == irq_prop) {
130 int ino = grover_irq_table[i].pci_ino;
131
132 if (ino == 0)
133 goto no_irq;
134
135 irq_prop = ino;
136 goto route_irq;
137 }
138 }
139 goto no_irq;
140
141route_irq:
142 pbm = isa_dev->bus->parent;
143 pcic = pbm->parent;
144 isa_dev->irq = pcic->irq_build(pbm, NULL, irq_prop);
145 return;
146 } 60 }
147
148no_irq:
149 isa_dev->irq = PCI_IRQ_NONE;
150} 61}
151 62
152static void __init isa_fill_children(struct sparc_isa_device *parent_isa_dev) 63static void __init isa_fill_children(struct sparc_isa_device *parent_isa_dev)
diff --git a/arch/sparc64/kernel/of_device.c b/arch/sparc64/kernel/of_device.c
index 768475bbce82..3670dc8a7d5f 100644
--- a/arch/sparc64/kernel/of_device.c
+++ b/arch/sparc64/kernel/of_device.c
@@ -129,6 +129,43 @@ static int of_device_resume(struct device * dev)
129 return error; 129 return error;
130} 130}
131 131
132void __iomem *of_ioremap(struct resource *res, unsigned long offset, unsigned long size, char *name)
133{
134 unsigned long ret = res->start + offset;
135
136 if (!request_region(ret, size, name))
137 ret = 0;
138
139 return (void __iomem *) ret;
140}
141EXPORT_SYMBOL(of_ioremap);
142
143void of_iounmap(void __iomem *base, unsigned long size)
144{
145 release_region((unsigned long) base, size);
146}
147EXPORT_SYMBOL(of_iounmap);
148
149static int node_match(struct device *dev, void *data)
150{
151 struct of_device *op = to_of_device(dev);
152 struct device_node *dp = data;
153
154 return (op->node == dp);
155}
156
157struct of_device *of_find_device_by_node(struct device_node *dp)
158{
159 struct device *dev = bus_find_device(&of_bus_type, NULL,
160 dp, node_match);
161
162 if (dev)
163 return to_of_device(dev);
164
165 return NULL;
166}
167EXPORT_SYMBOL(of_find_device_by_node);
168
132#ifdef CONFIG_PCI 169#ifdef CONFIG_PCI
133struct bus_type isa_bus_type = { 170struct bus_type isa_bus_type = {
134 .name = "isa", 171 .name = "isa",
@@ -163,10 +200,654 @@ struct bus_type sbus_bus_type = {
163EXPORT_SYMBOL(sbus_bus_type); 200EXPORT_SYMBOL(sbus_bus_type);
164#endif 201#endif
165 202
203struct bus_type of_bus_type = {
204 .name = "of",
205 .match = of_platform_bus_match,
206 .probe = of_device_probe,
207 .remove = of_device_remove,
208 .suspend = of_device_suspend,
209 .resume = of_device_resume,
210};
211EXPORT_SYMBOL(of_bus_type);
212
213static inline u64 of_read_addr(u32 *cell, int size)
214{
215 u64 r = 0;
216 while (size--)
217 r = (r << 32) | *(cell++);
218 return r;
219}
220
221static void __init get_cells(struct device_node *dp,
222 int *addrc, int *sizec)
223{
224 if (addrc)
225 *addrc = of_n_addr_cells(dp);
226 if (sizec)
227 *sizec = of_n_size_cells(dp);
228}
229
230/* Max address size we deal with */
231#define OF_MAX_ADDR_CELLS 4
232
233struct of_bus {
234 const char *name;
235 const char *addr_prop_name;
236 int (*match)(struct device_node *parent);
237 void (*count_cells)(struct device_node *child,
238 int *addrc, int *sizec);
239 u64 (*map)(u32 *addr, u32 *range, int na, int ns, int pna);
240 int (*translate)(u32 *addr, u64 offset, int na);
241 unsigned int (*get_flags)(u32 *addr);
242};
243
244/*
245 * Default translator (generic bus)
246 */
247
248static void of_bus_default_count_cells(struct device_node *dev,
249 int *addrc, int *sizec)
250{
251 get_cells(dev, addrc, sizec);
252}
253
254static u64 of_bus_default_map(u32 *addr, u32 *range, int na, int ns, int pna)
255{
256 u64 cp, s, da;
257
258 cp = of_read_addr(range, na);
259 s = of_read_addr(range + na + pna, ns);
260 da = of_read_addr(addr, na);
261
262 if (da < cp || da >= (cp + s))
263 return OF_BAD_ADDR;
264 return da - cp;
265}
266
267static int of_bus_default_translate(u32 *addr, u64 offset, int na)
268{
269 u64 a = of_read_addr(addr, na);
270 memset(addr, 0, na * 4);
271 a += offset;
272 if (na > 1)
273 addr[na - 2] = a >> 32;
274 addr[na - 1] = a & 0xffffffffu;
275
276 return 0;
277}
278
279static unsigned int of_bus_default_get_flags(u32 *addr)
280{
281 return IORESOURCE_MEM;
282}
283
284/*
285 * PCI bus specific translator
286 */
287
288static int of_bus_pci_match(struct device_node *np)
289{
290 return !strcmp(np->type, "pci") || !strcmp(np->type, "pciex");
291}
292
293static void of_bus_pci_count_cells(struct device_node *np,
294 int *addrc, int *sizec)
295{
296 if (addrc)
297 *addrc = 3;
298 if (sizec)
299 *sizec = 2;
300}
301
302static u64 of_bus_pci_map(u32 *addr, u32 *range, int na, int ns, int pna)
303{
304 u64 cp, s, da;
305
306 /* Check address type match */
307 if ((addr[0] ^ range[0]) & 0x03000000)
308 return OF_BAD_ADDR;
309
310 /* Read address values, skipping high cell */
311 cp = of_read_addr(range + 1, na - 1);
312 s = of_read_addr(range + na + pna, ns);
313 da = of_read_addr(addr + 1, na - 1);
314
315 if (da < cp || da >= (cp + s))
316 return OF_BAD_ADDR;
317 return da - cp;
318}
319
320static int of_bus_pci_translate(u32 *addr, u64 offset, int na)
321{
322 return of_bus_default_translate(addr + 1, offset, na - 1);
323}
324
325static unsigned int of_bus_pci_get_flags(u32 *addr)
326{
327 unsigned int flags = 0;
328 u32 w = addr[0];
329
330 switch((w >> 24) & 0x03) {
331 case 0x01:
332 flags |= IORESOURCE_IO;
333 case 0x02: /* 32 bits */
334 case 0x03: /* 64 bits */
335 flags |= IORESOURCE_MEM;
336 }
337 if (w & 0x40000000)
338 flags |= IORESOURCE_PREFETCH;
339 return flags;
340}
341
342/*
343 * ISA bus specific translator
344 */
345
346static int of_bus_isa_match(struct device_node *np)
347{
348 return !strcmp(np->name, "isa");
349}
350
351static void of_bus_isa_count_cells(struct device_node *child,
352 int *addrc, int *sizec)
353{
354 if (addrc)
355 *addrc = 2;
356 if (sizec)
357 *sizec = 1;
358}
359
360static u64 of_bus_isa_map(u32 *addr, u32 *range, int na, int ns, int pna)
361{
362 u64 cp, s, da;
363
364 /* Check address type match */
365 if ((addr[0] ^ range[0]) & 0x00000001)
366 return OF_BAD_ADDR;
367
368 /* Read address values, skipping high cell */
369 cp = of_read_addr(range + 1, na - 1);
370 s = of_read_addr(range + na + pna, ns);
371 da = of_read_addr(addr + 1, na - 1);
372
373 if (da < cp || da >= (cp + s))
374 return OF_BAD_ADDR;
375 return da - cp;
376}
377
378static int of_bus_isa_translate(u32 *addr, u64 offset, int na)
379{
380 return of_bus_default_translate(addr + 1, offset, na - 1);
381}
382
383static unsigned int of_bus_isa_get_flags(u32 *addr)
384{
385 unsigned int flags = 0;
386 u32 w = addr[0];
387
388 if (w & 1)
389 flags |= IORESOURCE_IO;
390 else
391 flags |= IORESOURCE_MEM;
392 return flags;
393}
394
395/*
396 * SBUS bus specific translator
397 */
398
399static int of_bus_sbus_match(struct device_node *np)
400{
401 return !strcmp(np->name, "sbus") ||
402 !strcmp(np->name, "sbi");
403}
404
405static void of_bus_sbus_count_cells(struct device_node *child,
406 int *addrc, int *sizec)
407{
408 if (addrc)
409 *addrc = 2;
410 if (sizec)
411 *sizec = 1;
412}
413
414static u64 of_bus_sbus_map(u32 *addr, u32 *range, int na, int ns, int pna)
415{
416 return of_bus_default_map(addr, range, na, ns, pna);
417}
418
419static int of_bus_sbus_translate(u32 *addr, u64 offset, int na)
420{
421 return of_bus_default_translate(addr, offset, na);
422}
423
424static unsigned int of_bus_sbus_get_flags(u32 *addr)
425{
426 return IORESOURCE_MEM;
427}
428
429
430/*
431 * Array of bus specific translators
432 */
433
434static struct of_bus of_busses[] = {
435 /* PCI */
436 {
437 .name = "pci",
438 .addr_prop_name = "assigned-addresses",
439 .match = of_bus_pci_match,
440 .count_cells = of_bus_pci_count_cells,
441 .map = of_bus_pci_map,
442 .translate = of_bus_pci_translate,
443 .get_flags = of_bus_pci_get_flags,
444 },
445 /* ISA */
446 {
447 .name = "isa",
448 .addr_prop_name = "reg",
449 .match = of_bus_isa_match,
450 .count_cells = of_bus_isa_count_cells,
451 .map = of_bus_isa_map,
452 .translate = of_bus_isa_translate,
453 .get_flags = of_bus_isa_get_flags,
454 },
455 /* SBUS */
456 {
457 .name = "sbus",
458 .addr_prop_name = "reg",
459 .match = of_bus_sbus_match,
460 .count_cells = of_bus_sbus_count_cells,
461 .map = of_bus_sbus_map,
462 .translate = of_bus_sbus_translate,
463 .get_flags = of_bus_sbus_get_flags,
464 },
465 /* Default */
466 {
467 .name = "default",
468 .addr_prop_name = "reg",
469 .match = NULL,
470 .count_cells = of_bus_default_count_cells,
471 .map = of_bus_default_map,
472 .translate = of_bus_default_translate,
473 .get_flags = of_bus_default_get_flags,
474 },
475};
476
477static struct of_bus *of_match_bus(struct device_node *np)
478{
479 int i;
480
481 for (i = 0; i < ARRAY_SIZE(of_busses); i ++)
482 if (!of_busses[i].match || of_busses[i].match(np))
483 return &of_busses[i];
484 BUG();
485 return NULL;
486}
487
488static int __init build_one_resource(struct device_node *parent,
489 struct of_bus *bus,
490 struct of_bus *pbus,
491 u32 *addr,
492 int na, int ns, int pna)
493{
494 u32 *ranges;
495 unsigned int rlen;
496 int rone;
497 u64 offset = OF_BAD_ADDR;
498
499 ranges = of_get_property(parent, "ranges", &rlen);
500 if (ranges == NULL || rlen == 0) {
501 offset = of_read_addr(addr, na);
502 memset(addr, 0, pna * 4);
503 goto finish;
504 }
505
506 /* Now walk through the ranges */
507 rlen /= 4;
508 rone = na + pna + ns;
509 for (; rlen >= rone; rlen -= rone, ranges += rone) {
510 offset = bus->map(addr, ranges, na, ns, pna);
511 if (offset != OF_BAD_ADDR)
512 break;
513 }
514 if (offset == OF_BAD_ADDR)
515 return 1;
516
517 memcpy(addr, ranges + na, 4 * pna);
518
519finish:
520 /* Translate it into parent bus space */
521 return pbus->translate(addr, offset, pna);
522}
523
524static void __init build_device_resources(struct of_device *op,
525 struct device *parent)
526{
527 struct of_device *p_op;
528 struct of_bus *bus;
529 int na, ns;
530 int index, num_reg;
531 void *preg;
532
533 if (!parent)
534 return;
535
536 p_op = to_of_device(parent);
537 bus = of_match_bus(p_op->node);
538 bus->count_cells(op->node, &na, &ns);
539
540 preg = of_get_property(op->node, bus->addr_prop_name, &num_reg);
541 if (!preg || num_reg == 0)
542 return;
543
544 /* Convert to num-cells. */
545 num_reg /= 4;
546
547 /* Conver to num-entries. */
548 num_reg /= na + ns;
549
550 for (index = 0; index < num_reg; index++) {
551 struct resource *r = &op->resource[index];
552 u32 addr[OF_MAX_ADDR_CELLS];
553 u32 *reg = (preg + (index * ((na + ns) * 4)));
554 struct device_node *dp = op->node;
555 struct device_node *pp = p_op->node;
556 struct of_bus *pbus;
557 u64 size, result = OF_BAD_ADDR;
558 unsigned long flags;
559 int dna, dns;
560 int pna, pns;
561
562 size = of_read_addr(reg + na, ns);
563 flags = bus->get_flags(reg);
564
565 memcpy(addr, reg, na * 4);
566
567 /* If the immediate parent has no ranges property to apply,
568 * just use a 1<->1 mapping. Unless it is the 'dma' child
569 * of an isa bus, which must be passed up towards the root.
570 *
571 * Also, don't try to translate PMU bus device registers.
572 */
573 if ((of_find_property(pp, "ranges", NULL) == NULL &&
574 strcmp(pp->name, "dma") != 0) ||
575 !strcmp(pp->name, "pmu")) {
576 result = of_read_addr(addr, na);
577 goto build_res;
578 }
579
580 dna = na;
581 dns = ns;
582
583 while (1) {
584 dp = pp;
585 pp = dp->parent;
586 if (!pp) {
587 result = of_read_addr(addr, dna);
588 break;
589 }
590
591 pbus = of_match_bus(pp);
592 pbus->count_cells(dp, &pna, &pns);
593
594 if (build_one_resource(dp, bus, pbus, addr, dna, dns, pna))
595 break;
596
597 dna = pna;
598 dns = pns;
599 bus = pbus;
600 }
601
602 build_res:
603 memset(r, 0, sizeof(*r));
604 if (result != OF_BAD_ADDR) {
605 r->start = result;
606 r->end = result + size - 1;
607 r->flags = flags;
608 } else {
609 r->start = ~0UL;
610 r->end = ~0UL;
611 }
612 r->name = op->node->name;
613 }
614}
615
616static struct device_node * __init
617apply_interrupt_map(struct device_node *dp, struct device_node *pp,
618 u32 *imap, int imlen, u32 *imask,
619 unsigned int *irq_p)
620{
621 struct device_node *cp;
622 unsigned int irq = *irq_p;
623 struct of_bus *bus;
624 phandle handle;
625 u32 *reg;
626 int na, num_reg, i;
627
628 bus = of_match_bus(pp);
629 bus->count_cells(dp, &na, NULL);
630
631 reg = of_get_property(dp, "reg", &num_reg);
632 if (!reg || !num_reg)
633 return NULL;
634
635 imlen /= ((na + 3) * 4);
636 handle = 0;
637 for (i = 0; i < imlen; i++) {
638 int j;
639
640 for (j = 0; j < na; j++) {
641 if ((reg[j] & imask[j]) != imap[j])
642 goto next;
643 }
644 if (imap[na] == irq) {
645 handle = imap[na + 1];
646 irq = imap[na + 2];
647 break;
648 }
649
650 next:
651 imap += (na + 3);
652 }
653 if (i == imlen)
654 return NULL;
655
656 *irq_p = irq;
657 cp = of_find_node_by_phandle(handle);
658
659 return cp;
660}
661
662static unsigned int __init pci_irq_swizzle(struct device_node *dp,
663 struct device_node *pp,
664 unsigned int irq)
665{
666 struct linux_prom_pci_registers *regs;
667 unsigned int devfn, slot, ret;
668
669 if (irq < 1 || irq > 4)
670 return irq;
671
672 regs = of_get_property(dp, "reg", NULL);
673 if (!regs)
674 return irq;
675
676 devfn = (regs->phys_hi >> 8) & 0xff;
677 slot = (devfn >> 3) & 0x1f;
678
679 ret = ((irq - 1 + (slot & 3)) & 3) + 1;
680
681 return ret;
682}
683
684static unsigned int __init build_one_device_irq(struct of_device *op,
685 struct device *parent,
686 unsigned int irq)
687{
688 struct device_node *dp = op->node;
689 struct device_node *pp, *ip;
690 unsigned int orig_irq = irq;
691
692 if (irq == 0xffffffff)
693 return irq;
694
695 if (dp->irq_trans) {
696 irq = dp->irq_trans->irq_build(dp, irq,
697 dp->irq_trans->data);
698#if 1
699 printk("%s: direct translate %x --> %x\n",
700 dp->full_name, orig_irq, irq);
701#endif
702 return irq;
703 }
704
705 /* Something more complicated. Walk up to the root, applying
706 * interrupt-map or bus specific translations, until we hit
707 * an IRQ translator.
708 *
709 * If we hit a bus type or situation we cannot handle, we
710 * stop and assume that the original IRQ number was in a
711 * format which has special meaning to it's immediate parent.
712 */
713 pp = dp->parent;
714 ip = NULL;
715 while (pp) {
716 void *imap, *imsk;
717 int imlen;
718
719 imap = of_get_property(pp, "interrupt-map", &imlen);
720 imsk = of_get_property(pp, "interrupt-map-mask", NULL);
721 if (imap && imsk) {
722 struct device_node *iret;
723 int this_orig_irq = irq;
724
725 iret = apply_interrupt_map(dp, pp,
726 imap, imlen, imsk,
727 &irq);
728#if 1
729 printk("%s: Apply [%s:%x] imap --> [%s:%x]\n",
730 op->node->full_name,
731 pp->full_name, this_orig_irq,
732 (iret ? iret->full_name : "NULL"), irq);
733#endif
734 if (!iret)
735 break;
736
737 if (iret->irq_trans) {
738 ip = iret;
739 break;
740 }
741 } else {
742 if (!strcmp(pp->type, "pci") ||
743 !strcmp(pp->type, "pciex")) {
744 unsigned int this_orig_irq = irq;
745
746 irq = pci_irq_swizzle(dp, pp, irq);
747#if 1
748 printk("%s: PCI swizzle [%s] %x --> %x\n",
749 op->node->full_name,
750 pp->full_name, this_orig_irq, irq);
751#endif
752 }
753
754 if (pp->irq_trans) {
755 ip = pp;
756 break;
757 }
758 }
759 dp = pp;
760 pp = pp->parent;
761 }
762 if (!ip)
763 return orig_irq;
764
765 irq = ip->irq_trans->irq_build(op->node, irq,
766 ip->irq_trans->data);
767#if 1
768 printk("%s: Apply IRQ trans [%s] %x --> %x\n",
769 op->node->full_name, ip->full_name, orig_irq, irq);
770#endif
771
772 return irq;
773}
774
775static struct of_device * __init scan_one_device(struct device_node *dp,
776 struct device *parent)
777{
778 struct of_device *op = kzalloc(sizeof(*op), GFP_KERNEL);
779 unsigned int *irq;
780 int len, i;
781
782 if (!op)
783 return NULL;
784
785 op->node = dp;
786
787 op->clock_freq = of_getintprop_default(dp, "clock-frequency",
788 (25*1000*1000));
789 op->portid = of_getintprop_default(dp, "upa-portid", -1);
790 if (op->portid == -1)
791 op->portid = of_getintprop_default(dp, "portid", -1);
792
793 irq = of_get_property(dp, "interrupts", &len);
794 if (irq) {
795 memcpy(op->irqs, irq, len);
796 op->num_irqs = len / 4;
797 } else {
798 op->num_irqs = 0;
799 }
800
801 build_device_resources(op, parent);
802 for (i = 0; i < op->num_irqs; i++)
803 op->irqs[i] = build_one_device_irq(op, parent, op->irqs[i]);
804
805 op->dev.parent = parent;
806 op->dev.bus = &of_bus_type;
807 if (!parent)
808 strcpy(op->dev.bus_id, "root");
809 else
810 strcpy(op->dev.bus_id, dp->path_component_name);
811
812 if (of_device_register(op)) {
813 printk("%s: Could not register of device.\n",
814 dp->full_name);
815 kfree(op);
816 op = NULL;
817 }
818
819 return op;
820}
821
822static void __init scan_tree(struct device_node *dp, struct device *parent)
823{
824 while (dp) {
825 struct of_device *op = scan_one_device(dp, parent);
826
827 if (op)
828 scan_tree(dp->child, &op->dev);
829
830 dp = dp->sibling;
831 }
832}
833
834static void __init scan_of_devices(void)
835{
836 struct device_node *root = of_find_node_by_path("/");
837 struct of_device *parent;
838
839 parent = scan_one_device(root, NULL);
840 if (!parent)
841 return;
842
843 scan_tree(root->child, &parent->dev);
844}
845
166static int __init of_bus_driver_init(void) 846static int __init of_bus_driver_init(void)
167{ 847{
168 int err = 0; 848 int err;
169 849
850 err = bus_register(&of_bus_type);
170#ifdef CONFIG_PCI 851#ifdef CONFIG_PCI
171 if (!err) 852 if (!err)
172 err = bus_register(&isa_bus_type); 853 err = bus_register(&isa_bus_type);
@@ -177,7 +858,11 @@ static int __init of_bus_driver_init(void)
177 if (!err) 858 if (!err)
178 err = bus_register(&sbus_bus_type); 859 err = bus_register(&sbus_bus_type);
179#endif 860#endif
180 return 0; 861
862 if (!err)
863 scan_of_devices();
864
865 return err;
181} 866}
182 867
183postcore_initcall(of_bus_driver_init); 868postcore_initcall(of_bus_driver_init);
diff --git a/arch/sparc64/kernel/pci.c b/arch/sparc64/kernel/pci.c
index 20ca9ec8fd3b..04ea6c2eb7a1 100644
--- a/arch/sparc64/kernel/pci.c
+++ b/arch/sparc64/kernel/pci.c
@@ -307,7 +307,6 @@ static void __init pci_scan_each_controller_bus(void)
307 p->scan_bus(p); 307 p->scan_bus(p);
308} 308}
309 309
310extern void clock_probe(void);
311extern void power_init(void); 310extern void power_init(void);
312 311
313static int __init pcibios_init(void) 312static int __init pcibios_init(void)
@@ -320,7 +319,6 @@ static int __init pcibios_init(void)
320 319
321 isa_init(); 320 isa_init();
322 ebus_init(); 321 ebus_init();
323 clock_probe();
324 power_init(); 322 power_init();
325 323
326 return 0; 324 return 0;
@@ -406,14 +404,8 @@ void pcibios_bus_to_resource(struct pci_dev *pdev, struct resource *res,
406} 404}
407EXPORT_SYMBOL(pcibios_bus_to_resource); 405EXPORT_SYMBOL(pcibios_bus_to_resource);
408 406
409extern int pci_irq_verbose;
410
411char * __init pcibios_setup(char *str) 407char * __init pcibios_setup(char *str)
412{ 408{
413 if (!strcmp(str, "irq_verbose")) {
414 pci_irq_verbose = 1;
415 return NULL;
416 }
417 return str; 409 return str;
418} 410}
419 411
diff --git a/arch/sparc64/kernel/pci_common.c b/arch/sparc64/kernel/pci_common.c
index b06a2955bf5f..7a59cc72c844 100644
--- a/arch/sparc64/kernel/pci_common.c
+++ b/arch/sparc64/kernel/pci_common.c
@@ -10,12 +10,10 @@
10 10
11#include <asm/pbm.h> 11#include <asm/pbm.h>
12#include <asm/prom.h> 12#include <asm/prom.h>
13#include <asm/of_device.h>
13 14
14#include "pci_impl.h" 15#include "pci_impl.h"
15 16
16/* Pass "pci=irq_verbose" on the kernel command line to enable this. */
17int pci_irq_verbose;
18
19/* Fix self device of BUS and hook it into BUS->self. 17/* Fix self device of BUS and hook it into BUS->self.
20 * The pci_scan_bus does not do this for the host bridge. 18 * The pci_scan_bus does not do this for the host bridge.
21 */ 19 */
@@ -169,6 +167,7 @@ static void __init pdev_cookie_fillin(struct pci_pbm_info *pbm,
169 } 167 }
170 pcp->pbm = pbm; 168 pcp->pbm = pbm;
171 pcp->prom_node = dp; 169 pcp->prom_node = dp;
170 pcp->op = of_find_device_by_node(dp);
172 memcpy(pcp->prom_regs, pregs, 171 memcpy(pcp->prom_regs, pregs,
173 nregs * sizeof(struct linux_prom_pci_registers)); 172 nregs * sizeof(struct linux_prom_pci_registers));
174 pcp->num_prom_regs = nregs; 173 pcp->num_prom_regs = nregs;
@@ -549,296 +548,18 @@ void __init pci_assign_unassigned(struct pci_pbm_info *pbm,
549 pci_assign_unassigned(pbm, bus); 548 pci_assign_unassigned(pbm, bus);
550} 549}
551 550
552static inline unsigned int pci_slot_swivel(struct pci_pbm_info *pbm,
553 struct pci_dev *toplevel_pdev,
554 struct pci_dev *pdev,
555 unsigned int interrupt)
556{
557 unsigned int ret;
558
559 if (unlikely(interrupt < 1 || interrupt > 4)) {
560 printk("%s: Device %s interrupt value of %u is strange.\n",
561 pbm->name, pci_name(pdev), interrupt);
562 return interrupt;
563 }
564
565 ret = ((interrupt - 1 + (PCI_SLOT(pdev->devfn) & 3)) & 3) + 1;
566
567 if (pci_irq_verbose)
568 printk("%s: %s IRQ Swivel %s [%x:%x] -> [%x]\n",
569 pbm->name, pci_name(toplevel_pdev), pci_name(pdev),
570 interrupt, PCI_SLOT(pdev->devfn), ret);
571
572 return ret;
573}
574
575static inline unsigned int pci_apply_intmap(struct pci_pbm_info *pbm,
576 struct pci_dev *toplevel_pdev,
577 struct pci_dev *pbus,
578 struct pci_dev *pdev,
579 unsigned int interrupt,
580 struct device_node **cnode)
581{
582 struct linux_prom_pci_intmap *imap;
583 struct linux_prom_pci_intmask *imask;
584 struct pcidev_cookie *pbus_pcp = pbus->sysdata;
585 struct pcidev_cookie *pdev_pcp = pdev->sysdata;
586 struct linux_prom_pci_registers *pregs = pdev_pcp->prom_regs;
587 struct property *prop;
588 int plen, num_imap, i;
589 unsigned int hi, mid, lo, irq, orig_interrupt;
590
591 *cnode = pbus_pcp->prom_node;
592
593 prop = of_find_property(pbus_pcp->prom_node, "interrupt-map", &plen);
594 if (!prop ||
595 (plen % sizeof(struct linux_prom_pci_intmap)) != 0) {
596 printk("%s: Device %s interrupt-map has bad len %d\n",
597 pbm->name, pci_name(pbus), plen);
598 goto no_intmap;
599 }
600 imap = prop->value;
601 num_imap = plen / sizeof(struct linux_prom_pci_intmap);
602
603 prop = of_find_property(pbus_pcp->prom_node, "interrupt-map-mask", &plen);
604 if (!prop ||
605 (plen % sizeof(struct linux_prom_pci_intmask)) != 0) {
606 printk("%s: Device %s interrupt-map-mask has bad len %d\n",
607 pbm->name, pci_name(pbus), plen);
608 goto no_intmap;
609 }
610 imask = prop->value;
611
612 orig_interrupt = interrupt;
613
614 hi = pregs->phys_hi & imask->phys_hi;
615 mid = pregs->phys_mid & imask->phys_mid;
616 lo = pregs->phys_lo & imask->phys_lo;
617 irq = interrupt & imask->interrupt;
618
619 for (i = 0; i < num_imap; i++) {
620 if (imap[i].phys_hi == hi &&
621 imap[i].phys_mid == mid &&
622 imap[i].phys_lo == lo &&
623 imap[i].interrupt == irq) {
624 *cnode = of_find_node_by_phandle(imap[i].cnode);
625 interrupt = imap[i].cinterrupt;
626 }
627 }
628
629 if (pci_irq_verbose)
630 printk("%s: %s MAP BUS %s DEV %s [%x] -> [%x]\n",
631 pbm->name, pci_name(toplevel_pdev),
632 pci_name(pbus), pci_name(pdev),
633 orig_interrupt, interrupt);
634
635no_intmap:
636 return interrupt;
637}
638
639/* For each PCI bus on the way to the root:
640 * 1) If it has an interrupt-map property, apply it.
641 * 2) Else, swivel the interrupt number based upon the PCI device number.
642 *
643 * Return the "IRQ controller" node. If this is the PBM's device node,
644 * all interrupt translations are complete, else we should use that node's
645 * "reg" property to apply the PBM's "interrupt-{map,mask}" to the interrupt.
646 */
647static struct device_node * __init
648pci_intmap_match_to_root(struct pci_pbm_info *pbm,
649 struct pci_dev *pdev,
650 unsigned int *interrupt)
651{
652 struct pci_dev *toplevel_pdev = pdev;
653 struct pcidev_cookie *toplevel_pcp = toplevel_pdev->sysdata;
654 struct device_node *cnode = toplevel_pcp->prom_node;
655
656 while (pdev->bus->number != pbm->pci_first_busno) {
657 struct pci_dev *pbus = pdev->bus->self;
658 struct pcidev_cookie *pcp = pbus->sysdata;
659 struct property *prop;
660
661 prop = of_find_property(pcp->prom_node, "interrupt-map", NULL);
662 if (!prop) {
663 *interrupt = pci_slot_swivel(pbm, toplevel_pdev,
664 pdev, *interrupt);
665 cnode = pcp->prom_node;
666 } else {
667 *interrupt = pci_apply_intmap(pbm, toplevel_pdev,
668 pbus, pdev,
669 *interrupt, &cnode);
670
671 while (pcp->prom_node != cnode &&
672 pbus->bus->number != pbm->pci_first_busno) {
673 pbus = pbus->bus->self;
674 pcp = pbus->sysdata;
675 }
676 }
677 pdev = pbus;
678
679 if (cnode == pbm->prom_node)
680 break;
681 }
682
683 return cnode;
684}
685
686static int __init pci_intmap_match(struct pci_dev *pdev, unsigned int *interrupt)
687{
688 struct pcidev_cookie *dev_pcp = pdev->sysdata;
689 struct pci_pbm_info *pbm = dev_pcp->pbm;
690 struct linux_prom_pci_registers *reg;
691 struct device_node *cnode;
692 struct property *prop;
693 unsigned int hi, mid, lo, irq;
694 int i, plen;
695
696 cnode = pci_intmap_match_to_root(pbm, pdev, interrupt);
697 if (cnode == pbm->prom_node)
698 goto success;
699
700 prop = of_find_property(cnode, "reg", &plen);
701 if (!prop ||
702 (plen % sizeof(struct linux_prom_pci_registers)) != 0) {
703 printk("%s: OBP node %s reg property has bad len %d\n",
704 pbm->name, cnode->full_name, plen);
705 goto fail;
706 }
707 reg = prop->value;
708
709 hi = reg[0].phys_hi & pbm->pbm_intmask->phys_hi;
710 mid = reg[0].phys_mid & pbm->pbm_intmask->phys_mid;
711 lo = reg[0].phys_lo & pbm->pbm_intmask->phys_lo;
712 irq = *interrupt & pbm->pbm_intmask->interrupt;
713
714 for (i = 0; i < pbm->num_pbm_intmap; i++) {
715 struct linux_prom_pci_intmap *intmap;
716
717 intmap = &pbm->pbm_intmap[i];
718
719 if (intmap->phys_hi == hi &&
720 intmap->phys_mid == mid &&
721 intmap->phys_lo == lo &&
722 intmap->interrupt == irq) {
723 *interrupt = intmap->cinterrupt;
724 goto success;
725 }
726 }
727
728fail:
729 return 0;
730
731success:
732 if (pci_irq_verbose)
733 printk("%s: Routing bus[%2x] slot[%2x] to INO[%02x]\n",
734 pbm->name,
735 pdev->bus->number, PCI_SLOT(pdev->devfn),
736 *interrupt);
737 return 1;
738}
739
740static void __init pdev_fixup_irq(struct pci_dev *pdev) 551static void __init pdev_fixup_irq(struct pci_dev *pdev)
741{ 552{
742 struct pcidev_cookie *pcp = pdev->sysdata; 553 struct pcidev_cookie *pcp = pdev->sysdata;
743 struct pci_pbm_info *pbm = pcp->pbm; 554 struct of_device *op = pcp->op;
744 struct pci_controller_info *p = pbm->parent;
745 unsigned int portid = pbm->portid;
746 unsigned int prom_irq;
747 struct device_node *dp = pcp->prom_node;
748 struct property *prop;
749
750 /* If this is an empty EBUS device, sometimes OBP fails to
751 * give it a valid fully specified interrupts property.
752 * The EBUS hooked up to SunHME on PCI I/O boards of
753 * Ex000 systems is one such case.
754 *
755 * The interrupt is not important so just ignore it.
756 */
757 if (pdev->vendor == PCI_VENDOR_ID_SUN &&
758 pdev->device == PCI_DEVICE_ID_SUN_EBUS &&
759 !dp->child) {
760 pdev->irq = 0;
761 return;
762 }
763 555
764 prop = of_find_property(dp, "interrupts", NULL); 556 if (op->irqs[0] == 0xffffffff) {
765 if (!prop) { 557 pdev->irq = PCI_IRQ_NONE;
766 pdev->irq = 0;
767 return; 558 return;
768 } 559 }
769 prom_irq = *(unsigned int *) prop->value;
770
771 if (tlb_type != hypervisor) {
772 /* Fully specified already? */
773 if (((prom_irq & PCI_IRQ_IGN) >> 6) == portid) {
774 pdev->irq = p->irq_build(pbm, pdev, prom_irq);
775 goto have_irq;
776 }
777
778 /* An onboard device? (bit 5 set) */
779 if ((prom_irq & PCI_IRQ_INO) & 0x20) {
780 pdev->irq = p->irq_build(pbm, pdev, (portid << 6 | prom_irq));
781 goto have_irq;
782 }
783 }
784
785 /* Can we find a matching entry in the interrupt-map? */
786 if (pci_intmap_match(pdev, &prom_irq)) {
787 pdev->irq = p->irq_build(pbm, pdev, (portid << 6) | prom_irq);
788 goto have_irq;
789 }
790
791 /* Ok, we have to do it the hard way. */
792 {
793 unsigned int bus, slot, line;
794
795 bus = (pbm == &pbm->parent->pbm_B) ? (1 << 4) : 0;
796
797 /* If we have a legal interrupt property, use it as
798 * the IRQ line.
799 */
800 if (prom_irq > 0 && prom_irq < 5) {
801 line = ((prom_irq - 1) & 3);
802 } else {
803 u8 pci_irq_line;
804 560
805 /* Else just directly consult PCI config space. */ 561 pdev->irq = op->irqs[0];
806 pci_read_config_byte(pdev, PCI_INTERRUPT_PIN, &pci_irq_line);
807 line = ((pci_irq_line - 1) & 3);
808 }
809
810 /* Now figure out the slot.
811 *
812 * Basically, device number zero on the top-level bus is
813 * always the PCI host controller. Slot 0 is then device 1.
814 * PBM A supports two external slots (0 and 1), and PBM B
815 * supports 4 external slots (0, 1, 2, and 3). On-board PCI
816 * devices are wired to device numbers outside of these
817 * ranges. -DaveM
818 */
819 if (pdev->bus->number == pbm->pci_first_busno) {
820 slot = PCI_SLOT(pdev->devfn) - pbm->pci_first_slot;
821 } else {
822 struct pci_dev *bus_dev;
823
824 /* Underneath a bridge, use slot number of parent
825 * bridge which is closest to the PBM.
826 */
827 bus_dev = pdev->bus->self;
828 while (bus_dev->bus &&
829 bus_dev->bus->number != pbm->pci_first_busno)
830 bus_dev = bus_dev->bus->self;
831
832 slot = PCI_SLOT(bus_dev->devfn) - pbm->pci_first_slot;
833 }
834 slot = slot << 2;
835
836 pdev->irq = p->irq_build(pbm, pdev,
837 ((portid << 6) & PCI_IRQ_IGN) |
838 (bus | slot | line));
839 }
840 562
841have_irq:
842 pci_write_config_byte(pdev, PCI_INTERRUPT_LINE, 563 pci_write_config_byte(pdev, PCI_INTERRUPT_LINE,
843 pdev->irq & PCI_IRQ_INO); 564 pdev->irq & PCI_IRQ_INO);
844} 565}
diff --git a/arch/sparc64/kernel/pci_psycho.c b/arch/sparc64/kernel/pci_psycho.c
index 5b2261ebda6f..bf7b32b36705 100644
--- a/arch/sparc64/kernel/pci_psycho.c
+++ b/arch/sparc64/kernel/pci_psycho.c
@@ -18,6 +18,7 @@
18#include <asm/irq.h> 18#include <asm/irq.h>
19#include <asm/starfire.h> 19#include <asm/starfire.h>
20#include <asm/prom.h> 20#include <asm/prom.h>
21#include <asm/of_device.h>
21 22
22#include "pci_impl.h" 23#include "pci_impl.h"
23#include "iommu_common.h" 24#include "iommu_common.h"
@@ -208,110 +209,6 @@ static struct pci_ops psycho_ops = {
208 .write = psycho_write_pci_cfg, 209 .write = psycho_write_pci_cfg,
209}; 210};
210 211
211/* PSYCHO interrupt mapping support. */
212#define PSYCHO_IMAP_A_SLOT0 0x0c00UL
213#define PSYCHO_IMAP_B_SLOT0 0x0c20UL
214static unsigned long psycho_pcislot_imap_offset(unsigned long ino)
215{
216 unsigned int bus = (ino & 0x10) >> 4;
217 unsigned int slot = (ino & 0x0c) >> 2;
218
219 if (bus == 0)
220 return PSYCHO_IMAP_A_SLOT0 + (slot * 8);
221 else
222 return PSYCHO_IMAP_B_SLOT0 + (slot * 8);
223}
224
225#define PSYCHO_IMAP_SCSI 0x1000UL
226#define PSYCHO_IMAP_ETH 0x1008UL
227#define PSYCHO_IMAP_BPP 0x1010UL
228#define PSYCHO_IMAP_AU_REC 0x1018UL
229#define PSYCHO_IMAP_AU_PLAY 0x1020UL
230#define PSYCHO_IMAP_PFAIL 0x1028UL
231#define PSYCHO_IMAP_KMS 0x1030UL
232#define PSYCHO_IMAP_FLPY 0x1038UL
233#define PSYCHO_IMAP_SHW 0x1040UL
234#define PSYCHO_IMAP_KBD 0x1048UL
235#define PSYCHO_IMAP_MS 0x1050UL
236#define PSYCHO_IMAP_SER 0x1058UL
237#define PSYCHO_IMAP_TIM0 0x1060UL
238#define PSYCHO_IMAP_TIM1 0x1068UL
239#define PSYCHO_IMAP_UE 0x1070UL
240#define PSYCHO_IMAP_CE 0x1078UL
241#define PSYCHO_IMAP_A_ERR 0x1080UL
242#define PSYCHO_IMAP_B_ERR 0x1088UL
243#define PSYCHO_IMAP_PMGMT 0x1090UL
244#define PSYCHO_IMAP_GFX 0x1098UL
245#define PSYCHO_IMAP_EUPA 0x10a0UL
246
247static unsigned long __onboard_imap_off[] = {
248/*0x20*/ PSYCHO_IMAP_SCSI,
249/*0x21*/ PSYCHO_IMAP_ETH,
250/*0x22*/ PSYCHO_IMAP_BPP,
251/*0x23*/ PSYCHO_IMAP_AU_REC,
252/*0x24*/ PSYCHO_IMAP_AU_PLAY,
253/*0x25*/ PSYCHO_IMAP_PFAIL,
254/*0x26*/ PSYCHO_IMAP_KMS,
255/*0x27*/ PSYCHO_IMAP_FLPY,
256/*0x28*/ PSYCHO_IMAP_SHW,
257/*0x29*/ PSYCHO_IMAP_KBD,
258/*0x2a*/ PSYCHO_IMAP_MS,
259/*0x2b*/ PSYCHO_IMAP_SER,
260/*0x2c*/ PSYCHO_IMAP_TIM0,
261/*0x2d*/ PSYCHO_IMAP_TIM1,
262/*0x2e*/ PSYCHO_IMAP_UE,
263/*0x2f*/ PSYCHO_IMAP_CE,
264/*0x30*/ PSYCHO_IMAP_A_ERR,
265/*0x31*/ PSYCHO_IMAP_B_ERR,
266/*0x32*/ PSYCHO_IMAP_PMGMT
267};
268#define PSYCHO_ONBOARD_IRQ_BASE 0x20
269#define PSYCHO_ONBOARD_IRQ_LAST 0x32
270#define psycho_onboard_imap_offset(__ino) \
271 __onboard_imap_off[(__ino) - PSYCHO_ONBOARD_IRQ_BASE]
272
273#define PSYCHO_ICLR_A_SLOT0 0x1400UL
274#define PSYCHO_ICLR_SCSI 0x1800UL
275
276#define psycho_iclr_offset(ino) \
277 ((ino & 0x20) ? (PSYCHO_ICLR_SCSI + (((ino) & 0x1f) << 3)) : \
278 (PSYCHO_ICLR_A_SLOT0 + (((ino) & 0x1f)<<3)))
279
280static unsigned int psycho_irq_build(struct pci_pbm_info *pbm,
281 struct pci_dev *pdev,
282 unsigned int ino)
283{
284 unsigned long imap, iclr;
285 unsigned long imap_off, iclr_off;
286 int inofixup = 0;
287
288 ino &= PCI_IRQ_INO;
289 if (ino < PSYCHO_ONBOARD_IRQ_BASE) {
290 /* PCI slot */
291 imap_off = psycho_pcislot_imap_offset(ino);
292 } else {
293 /* Onboard device */
294 if (ino > PSYCHO_ONBOARD_IRQ_LAST) {
295 prom_printf("psycho_irq_build: Wacky INO [%x]\n", ino);
296 prom_halt();
297 }
298 imap_off = psycho_onboard_imap_offset(ino);
299 }
300
301 /* Now build the IRQ bucket. */
302 imap = pbm->controller_regs + imap_off;
303 imap += 4;
304
305 iclr_off = psycho_iclr_offset(ino);
306 iclr = pbm->controller_regs + iclr_off;
307 iclr += 4;
308
309 if ((ino & 0x20) == 0)
310 inofixup = ino & 0x03;
311
312 return build_irq(inofixup, iclr, imap);
313}
314
315/* PSYCHO error handling support. */ 212/* PSYCHO error handling support. */
316enum psycho_error_type { 213enum psycho_error_type {
317 UE_ERR, CE_ERR, PCI_ERR 214 UE_ERR, CE_ERR, PCI_ERR
@@ -944,51 +841,34 @@ static irqreturn_t psycho_pcierr_intr(int irq, void *dev_id, struct pt_regs *reg
944#define PSYCHO_ECCCTRL_EE 0x8000000000000000UL /* Enable ECC Checking */ 841#define PSYCHO_ECCCTRL_EE 0x8000000000000000UL /* Enable ECC Checking */
945#define PSYCHO_ECCCTRL_UE 0x4000000000000000UL /* Enable UE Interrupts */ 842#define PSYCHO_ECCCTRL_UE 0x4000000000000000UL /* Enable UE Interrupts */
946#define PSYCHO_ECCCTRL_CE 0x2000000000000000UL /* Enable CE INterrupts */ 843#define PSYCHO_ECCCTRL_CE 0x2000000000000000UL /* Enable CE INterrupts */
947#define PSYCHO_UE_INO 0x2e
948#define PSYCHO_CE_INO 0x2f
949#define PSYCHO_PCIERR_A_INO 0x30
950#define PSYCHO_PCIERR_B_INO 0x31
951static void psycho_register_error_handlers(struct pci_controller_info *p) 844static void psycho_register_error_handlers(struct pci_controller_info *p)
952{ 845{
953 struct pci_pbm_info *pbm = &p->pbm_A; /* arbitrary */ 846 struct pci_pbm_info *pbm = &p->pbm_A; /* arbitrary */
847 struct of_device *op = of_find_device_by_node(pbm->prom_node);
954 unsigned long base = p->pbm_A.controller_regs; 848 unsigned long base = p->pbm_A.controller_regs;
955 unsigned int irq, portid = pbm->portid;
956 u64 tmp; 849 u64 tmp;
957 850
958 /* Build IRQs and register handlers. */ 851 if (!op)
959 irq = psycho_irq_build(pbm, NULL, (portid << 6) | PSYCHO_UE_INO); 852 return;
960 if (request_irq(irq, psycho_ue_intr,
961 SA_SHIRQ, "PSYCHO UE", p) < 0) {
962 prom_printf("PSYCHO%d: Cannot register UE interrupt.\n",
963 p->index);
964 prom_halt();
965 }
966 853
967 irq = psycho_irq_build(pbm, NULL, (portid << 6) | PSYCHO_CE_INO); 854 /* Psycho interrupt property order is:
968 if (request_irq(irq, psycho_ce_intr, 855 * 0: PCIERR PBM B INO
969 SA_SHIRQ, "PSYCHO CE", p) < 0) { 856 * 1: UE ERR
970 prom_printf("PSYCHO%d: Cannot register CE interrupt.\n", 857 * 2: CE ERR
971 p->index); 858 * 3: POWER FAIL
972 prom_halt(); 859 * 4: SPARE HARDWARE
973 } 860 * 5: PCIERR PBM A INO
861 */
974 862
975 pbm = &p->pbm_A; 863 if (op->num_irqs < 6)
976 irq = psycho_irq_build(pbm, NULL, (portid << 6) | PSYCHO_PCIERR_A_INO); 864 return;
977 if (request_irq(irq, psycho_pcierr_intr,
978 SA_SHIRQ, "PSYCHO PCIERR", &p->pbm_A) < 0) {
979 prom_printf("PSYCHO%d(PBMA): Cannot register PciERR interrupt.\n",
980 p->index);
981 prom_halt();
982 }
983 865
984 pbm = &p->pbm_B; 866 request_irq(op->irqs[1], psycho_ue_intr, SA_SHIRQ, "PSYCHO UE", p);
985 irq = psycho_irq_build(pbm, NULL, (portid << 6) | PSYCHO_PCIERR_B_INO); 867 request_irq(op->irqs[2], psycho_ce_intr, SA_SHIRQ, "PSYCHO CE", p);
986 if (request_irq(irq, psycho_pcierr_intr, 868 request_irq(op->irqs[5], psycho_pcierr_intr, SA_SHIRQ,
987 SA_SHIRQ, "PSYCHO PCIERR", &p->pbm_B) < 0) { 869 "PSYCHO PCIERR-A", &p->pbm_A);
988 prom_printf("PSYCHO%d(PBMB): Cannot register PciERR interrupt.\n", 870 request_irq(op->irqs[0], psycho_pcierr_intr, SA_SHIRQ,
989 p->index); 871 "PSYCHO PCIERR-B", &p->pbm_B);
990 prom_halt();
991 }
992 872
993 /* Enable UE and CE interrupts for controller. */ 873 /* Enable UE and CE interrupts for controller. */
994 psycho_write(base + PSYCHO_ECC_CTRL, 874 psycho_write(base + PSYCHO_ECC_CTRL,
@@ -1171,9 +1051,7 @@ static void psycho_iommu_init(struct pci_controller_info *p)
1171 1051
1172 /* If necessary, hook us up for starfire IRQ translations. */ 1052 /* If necessary, hook us up for starfire IRQ translations. */
1173 if (this_is_starfire) 1053 if (this_is_starfire)
1174 p->starfire_cookie = starfire_hookup(p->pbm_A.portid); 1054 starfire_hookup(p->pbm_A.portid);
1175 else
1176 p->starfire_cookie = NULL;
1177} 1055}
1178 1056
1179#define PSYCHO_IRQ_RETRY 0x1a00UL 1057#define PSYCHO_IRQ_RETRY 0x1a00UL
@@ -1408,7 +1286,6 @@ void psycho_init(struct device_node *dp, char *model_name)
1408 p->index = pci_num_controllers++; 1286 p->index = pci_num_controllers++;
1409 p->pbms_same_domain = 0; 1287 p->pbms_same_domain = 0;
1410 p->scan_bus = psycho_scan_bus; 1288 p->scan_bus = psycho_scan_bus;
1411 p->irq_build = psycho_irq_build;
1412 p->base_address_update = psycho_base_address_update; 1289 p->base_address_update = psycho_base_address_update;
1413 p->resource_adjust = psycho_resource_adjust; 1290 p->resource_adjust = psycho_resource_adjust;
1414 p->pci_ops = &psycho_ops; 1291 p->pci_ops = &psycho_ops;
diff --git a/arch/sparc64/kernel/pci_sabre.c b/arch/sparc64/kernel/pci_sabre.c
index 26f194ce4400..5e087b0fb4c9 100644
--- a/arch/sparc64/kernel/pci_sabre.c
+++ b/arch/sparc64/kernel/pci_sabre.c
@@ -485,114 +485,6 @@ static struct pci_ops sabre_ops = {
485 .write = sabre_write_pci_cfg, 485 .write = sabre_write_pci_cfg,
486}; 486};
487 487
488static unsigned long sabre_pcislot_imap_offset(unsigned long ino)
489{
490 unsigned int bus = (ino & 0x10) >> 4;
491 unsigned int slot = (ino & 0x0c) >> 2;
492
493 if (bus == 0)
494 return SABRE_IMAP_A_SLOT0 + (slot * 8);
495 else
496 return SABRE_IMAP_B_SLOT0 + (slot * 8);
497}
498
499static unsigned long __onboard_imap_off[] = {
500/*0x20*/ SABRE_IMAP_SCSI,
501/*0x21*/ SABRE_IMAP_ETH,
502/*0x22*/ SABRE_IMAP_BPP,
503/*0x23*/ SABRE_IMAP_AU_REC,
504/*0x24*/ SABRE_IMAP_AU_PLAY,
505/*0x25*/ SABRE_IMAP_PFAIL,
506/*0x26*/ SABRE_IMAP_KMS,
507/*0x27*/ SABRE_IMAP_FLPY,
508/*0x28*/ SABRE_IMAP_SHW,
509/*0x29*/ SABRE_IMAP_KBD,
510/*0x2a*/ SABRE_IMAP_MS,
511/*0x2b*/ SABRE_IMAP_SER,
512/*0x2c*/ 0 /* reserved */,
513/*0x2d*/ 0 /* reserved */,
514/*0x2e*/ SABRE_IMAP_UE,
515/*0x2f*/ SABRE_IMAP_CE,
516/*0x30*/ SABRE_IMAP_PCIERR,
517};
518#define SABRE_ONBOARD_IRQ_BASE 0x20
519#define SABRE_ONBOARD_IRQ_LAST 0x30
520#define sabre_onboard_imap_offset(__ino) \
521 __onboard_imap_off[(__ino) - SABRE_ONBOARD_IRQ_BASE]
522
523#define sabre_iclr_offset(ino) \
524 ((ino & 0x20) ? (SABRE_ICLR_SCSI + (((ino) & 0x1f) << 3)) : \
525 (SABRE_ICLR_A_SLOT0 + (((ino) & 0x1f)<<3)))
526
527/* When a device lives behind a bridge deeper in the PCI bus topology
528 * than APB, a special sequence must run to make sure all pending DMA
529 * transfers at the time of IRQ delivery are visible in the coherency
530 * domain by the cpu. This sequence is to perform a read on the far
531 * side of the non-APB bridge, then perform a read of Sabre's DMA
532 * write-sync register.
533 */
534static void sabre_wsync_handler(unsigned int ino, void *_arg1, void *_arg2)
535{
536 struct pci_dev *pdev = _arg1;
537 unsigned long sync_reg = (unsigned long) _arg2;
538 u16 _unused;
539
540 pci_read_config_word(pdev, PCI_VENDOR_ID, &_unused);
541 sabre_read(sync_reg);
542}
543
544static unsigned int sabre_irq_build(struct pci_pbm_info *pbm,
545 struct pci_dev *pdev,
546 unsigned int ino)
547{
548 unsigned long imap, iclr;
549 unsigned long imap_off, iclr_off;
550 int inofixup = 0;
551 int virt_irq;
552
553 ino &= PCI_IRQ_INO;
554 if (ino < SABRE_ONBOARD_IRQ_BASE) {
555 /* PCI slot */
556 imap_off = sabre_pcislot_imap_offset(ino);
557 } else {
558 /* onboard device */
559 if (ino > SABRE_ONBOARD_IRQ_LAST) {
560 prom_printf("sabre_irq_build: Wacky INO [%x]\n", ino);
561 prom_halt();
562 }
563 imap_off = sabre_onboard_imap_offset(ino);
564 }
565
566 /* Now build the IRQ bucket. */
567 imap = pbm->controller_regs + imap_off;
568 imap += 4;
569
570 iclr_off = sabre_iclr_offset(ino);
571 iclr = pbm->controller_regs + iclr_off;
572 iclr += 4;
573
574 if ((ino & 0x20) == 0)
575 inofixup = ino & 0x03;
576
577 virt_irq = build_irq(inofixup, iclr, imap);
578
579 if (pdev) {
580 struct pcidev_cookie *pcp = pdev->sysdata;
581
582 if (pdev->bus->number != pcp->pbm->pci_first_busno) {
583 struct pci_controller_info *p = pcp->pbm->parent;
584
585 irq_install_pre_handler(virt_irq,
586 sabre_wsync_handler,
587 pdev,
588 (void *)
589 p->pbm_A.controller_regs +
590 SABRE_WRSYNC);
591 }
592 }
593 return virt_irq;
594}
595
596/* SABRE error handling support. */ 488/* SABRE error handling support. */
597static void sabre_check_iommu_error(struct pci_controller_info *p, 489static void sabre_check_iommu_error(struct pci_controller_info *p,
598 unsigned long afsr, 490 unsigned long afsr,
@@ -929,17 +821,30 @@ static irqreturn_t sabre_pcierr_intr(int irq, void *dev_id, struct pt_regs *regs
929 return IRQ_HANDLED; 821 return IRQ_HANDLED;
930} 822}
931 823
932/* XXX What about PowerFail/PowerManagement??? -DaveM */
933#define SABRE_UE_INO 0x2e
934#define SABRE_CE_INO 0x2f
935#define SABRE_PCIERR_INO 0x30
936static void sabre_register_error_handlers(struct pci_controller_info *p) 824static void sabre_register_error_handlers(struct pci_controller_info *p)
937{ 825{
938 struct pci_pbm_info *pbm = &p->pbm_A; /* arbitrary */ 826 struct pci_pbm_info *pbm = &p->pbm_A; /* arbitrary */
827 struct device_node *dp = pbm->prom_node;
828 struct of_device *op;
939 unsigned long base = pbm->controller_regs; 829 unsigned long base = pbm->controller_regs;
940 unsigned long irq, portid = pbm->portid;
941 u64 tmp; 830 u64 tmp;
942 831
832 if (pbm->chip_type == PBM_CHIP_TYPE_SABRE)
833 dp = dp->parent;
834
835 op = of_find_device_by_node(dp);
836 if (!op)
837 return;
838
839 /* Sabre/Hummingbird IRQ property layout is:
840 * 0: PCI ERR
841 * 1: UE ERR
842 * 2: CE ERR
843 * 3: POWER FAIL
844 */
845 if (op->num_irqs < 4)
846 return;
847
943 /* We clear the error bits in the appropriate AFSR before 848 /* We clear the error bits in the appropriate AFSR before
944 * registering the handler so that we don't get spurious 849 * registering the handler so that we don't get spurious
945 * interrupts. 850 * interrupts.
@@ -948,32 +853,16 @@ static void sabre_register_error_handlers(struct pci_controller_info *p)
948 (SABRE_UEAFSR_PDRD | SABRE_UEAFSR_PDWR | 853 (SABRE_UEAFSR_PDRD | SABRE_UEAFSR_PDWR |
949 SABRE_UEAFSR_SDRD | SABRE_UEAFSR_SDWR | 854 SABRE_UEAFSR_SDRD | SABRE_UEAFSR_SDWR |
950 SABRE_UEAFSR_SDTE | SABRE_UEAFSR_PDTE)); 855 SABRE_UEAFSR_SDTE | SABRE_UEAFSR_PDTE));
951 irq = sabre_irq_build(pbm, NULL, (portid << 6) | SABRE_UE_INO); 856
952 if (request_irq(irq, sabre_ue_intr, 857 request_irq(op->irqs[1], sabre_ue_intr, SA_SHIRQ, "SABRE UE", p);
953 SA_SHIRQ, "SABRE UE", p) < 0) {
954 prom_printf("SABRE%d: Cannot register UE interrupt.\n",
955 p->index);
956 prom_halt();
957 }
958 858
959 sabre_write(base + SABRE_CE_AFSR, 859 sabre_write(base + SABRE_CE_AFSR,
960 (SABRE_CEAFSR_PDRD | SABRE_CEAFSR_PDWR | 860 (SABRE_CEAFSR_PDRD | SABRE_CEAFSR_PDWR |
961 SABRE_CEAFSR_SDRD | SABRE_CEAFSR_SDWR)); 861 SABRE_CEAFSR_SDRD | SABRE_CEAFSR_SDWR));
962 irq = sabre_irq_build(pbm, NULL, (portid << 6) | SABRE_CE_INO);
963 if (request_irq(irq, sabre_ce_intr,
964 SA_SHIRQ, "SABRE CE", p) < 0) {
965 prom_printf("SABRE%d: Cannot register CE interrupt.\n",
966 p->index);
967 prom_halt();
968 }
969 862
970 irq = sabre_irq_build(pbm, NULL, (portid << 6) | SABRE_PCIERR_INO); 863 request_irq(op->irqs[2], sabre_ce_intr, SA_SHIRQ, "SABRE CE", p);
971 if (request_irq(irq, sabre_pcierr_intr, 864 request_irq(op->irqs[0], sabre_pcierr_intr, SA_SHIRQ,
972 SA_SHIRQ, "SABRE PCIERR", p) < 0) { 865 "SABRE PCIERR", p);
973 prom_printf("SABRE%d: Cannot register PciERR interrupt.\n",
974 p->index);
975 prom_halt();
976 }
977 866
978 tmp = sabre_read(base + SABRE_PCICTRL); 867 tmp = sabre_read(base + SABRE_PCICTRL);
979 tmp |= SABRE_PCICTRL_ERREN; 868 tmp |= SABRE_PCICTRL_ERREN;
@@ -1492,7 +1381,6 @@ void sabre_init(struct device_node *dp, char *model_name)
1492 p->index = pci_num_controllers++; 1381 p->index = pci_num_controllers++;
1493 p->pbms_same_domain = 1; 1382 p->pbms_same_domain = 1;
1494 p->scan_bus = sabre_scan_bus; 1383 p->scan_bus = sabre_scan_bus;
1495 p->irq_build = sabre_irq_build;
1496 p->base_address_update = sabre_base_address_update; 1384 p->base_address_update = sabre_base_address_update;
1497 p->resource_adjust = sabre_resource_adjust; 1385 p->resource_adjust = sabre_resource_adjust;
1498 p->pci_ops = &sabre_ops; 1386 p->pci_ops = &sabre_ops;
diff --git a/arch/sparc64/kernel/pci_schizo.c b/arch/sparc64/kernel/pci_schizo.c
index f16449ccd7bc..5c6e2a9b91f8 100644
--- a/arch/sparc64/kernel/pci_schizo.c
+++ b/arch/sparc64/kernel/pci_schizo.c
@@ -217,116 +217,6 @@ static struct pci_ops schizo_ops = {
217 .write = schizo_write_pci_cfg, 217 .write = schizo_write_pci_cfg,
218}; 218};
219 219
220/* SCHIZO interrupt mapping support. Unlike Psycho, for this controller the
221 * imap/iclr registers are per-PBM.
222 */
223#define SCHIZO_IMAP_BASE 0x1000UL
224#define SCHIZO_ICLR_BASE 0x1400UL
225
226static unsigned long schizo_imap_offset(unsigned long ino)
227{
228 return SCHIZO_IMAP_BASE + (ino * 8UL);
229}
230
231static unsigned long schizo_iclr_offset(unsigned long ino)
232{
233 return SCHIZO_ICLR_BASE + (ino * 8UL);
234}
235
236static void tomatillo_wsync_handler(unsigned int ino, void *_arg1, void *_arg2)
237{
238 unsigned long sync_reg = (unsigned long) _arg2;
239 u64 mask = 1UL << (ino & IMAP_INO);
240 u64 val;
241 int limit;
242
243 schizo_write(sync_reg, mask);
244
245 limit = 100000;
246 val = 0;
247 while (--limit) {
248 val = schizo_read(sync_reg);
249 if (!(val & mask))
250 break;
251 }
252 if (limit <= 0) {
253 printk("tomatillo_wsync_handler: DMA won't sync [%lx:%lx]\n",
254 val, mask);
255 }
256
257 if (_arg1) {
258 static unsigned char cacheline[64]
259 __attribute__ ((aligned (64)));
260
261 __asm__ __volatile__("rd %%fprs, %0\n\t"
262 "or %0, %4, %1\n\t"
263 "wr %1, 0x0, %%fprs\n\t"
264 "stda %%f0, [%5] %6\n\t"
265 "wr %0, 0x0, %%fprs\n\t"
266 "membar #Sync"
267 : "=&r" (mask), "=&r" (val)
268 : "0" (mask), "1" (val),
269 "i" (FPRS_FEF), "r" (&cacheline[0]),
270 "i" (ASI_BLK_COMMIT_P));
271 }
272}
273
274static unsigned long schizo_ino_to_iclr(struct pci_pbm_info *pbm,
275 unsigned int ino)
276{
277 ino &= PCI_IRQ_INO;
278 return pbm->pbm_regs + schizo_iclr_offset(ino) + 4;
279}
280
281static unsigned long schizo_ino_to_imap(struct pci_pbm_info *pbm,
282 unsigned int ino)
283{
284 ino &= PCI_IRQ_INO;
285 return pbm->pbm_regs + schizo_imap_offset(ino) + 4;
286}
287
288static unsigned int schizo_irq_build(struct pci_pbm_info *pbm,
289 struct pci_dev *pdev,
290 unsigned int ino)
291{
292 unsigned long imap, iclr;
293 int ign_fixup;
294 int virt_irq;
295
296 ino &= PCI_IRQ_INO;
297
298 /* Now build the IRQ bucket. */
299 imap = schizo_ino_to_imap(pbm, ino);
300 iclr = schizo_ino_to_iclr(pbm, ino);
301
302 /* On Schizo, no inofixup occurs. This is because each
303 * INO has it's own IMAP register. On Psycho and Sabre
304 * there is only one IMAP register for each PCI slot even
305 * though four different INOs can be generated by each
306 * PCI slot.
307 *
308 * But, for JBUS variants (essentially, Tomatillo), we have
309 * to fixup the lowest bit of the interrupt group number.
310 */
311 ign_fixup = 0;
312 if (pbm->chip_type == PBM_CHIP_TYPE_TOMATILLO) {
313 if (pbm->portid & 1)
314 ign_fixup = (1 << 6);
315 }
316
317 virt_irq = build_irq(ign_fixup, iclr, imap);
318
319 if (pdev && pbm->chip_type == PBM_CHIP_TYPE_TOMATILLO) {
320 irq_install_pre_handler(virt_irq,
321 tomatillo_wsync_handler,
322 ((pbm->chip_version <= 4) ?
323 (void *) 1 : (void *) 0),
324 (void *) pbm->sync_reg);
325 }
326
327 return virt_irq;
328}
329
330/* SCHIZO error handling support. */ 220/* SCHIZO error handling support. */
331enum schizo_error_type { 221enum schizo_error_type {
332 UE_ERR, CE_ERR, PCI_ERR, SAFARI_ERR 222 UE_ERR, CE_ERR, PCI_ERR, SAFARI_ERR
@@ -362,34 +252,6 @@ struct pci_pbm_info *pbm_for_ino(struct pci_controller_info *p, u32 ino)
362 return &p->pbm_A; 252 return &p->pbm_A;
363} 253}
364 254
365static void schizo_clear_other_err_intr(struct pci_controller_info *p, int irq)
366{
367 struct pci_pbm_info *pbm;
368 unsigned long iclr;
369
370 /* Do not clear the interrupt for the other PCI bus.
371 *
372 * This "ACK both PBM IRQs" only needs to be performed
373 * for chip-wide error interrupts.
374 */
375 if ((irq & IMAP_INO) == SCHIZO_PCIERR_A_INO ||
376 (irq & IMAP_INO) == SCHIZO_PCIERR_B_INO)
377 return;
378
379 pbm = pbm_for_ino(p, irq);
380 if (pbm == &p->pbm_A)
381 pbm = &p->pbm_B;
382 else
383 pbm = &p->pbm_A;
384
385 schizo_irq_build(pbm, NULL,
386 (pbm->portid << 6) | (irq & IMAP_INO));
387
388 iclr = schizo_ino_to_iclr(pbm,
389 (pbm->portid << 6) | (irq & IMAP_INO));
390 upa_writel(ICLR_IDLE, iclr);
391}
392
393#define SCHIZO_STC_ERR 0xb800UL /* --> 0xba00 */ 255#define SCHIZO_STC_ERR 0xb800UL /* --> 0xba00 */
394#define SCHIZO_STC_TAG 0xba00UL /* --> 0xba80 */ 256#define SCHIZO_STC_TAG 0xba00UL /* --> 0xba80 */
395#define SCHIZO_STC_LINE 0xbb00UL /* --> 0xbb80 */ 257#define SCHIZO_STC_LINE 0xbb00UL /* --> 0xbb80 */
@@ -720,8 +582,6 @@ static irqreturn_t schizo_ue_intr(int irq, void *dev_id, struct pt_regs *regs)
720 /* Interrogate IOMMU for error status. */ 582 /* Interrogate IOMMU for error status. */
721 schizo_check_iommu_error(p, UE_ERR); 583 schizo_check_iommu_error(p, UE_ERR);
722 584
723 schizo_clear_other_err_intr(p, irq);
724
725 return IRQ_HANDLED; 585 return IRQ_HANDLED;
726} 586}
727 587
@@ -811,8 +671,6 @@ static irqreturn_t schizo_ce_intr(int irq, void *dev_id, struct pt_regs *regs)
811 printk("(none)"); 671 printk("(none)");
812 printk("]\n"); 672 printk("]\n");
813 673
814 schizo_clear_other_err_intr(p, irq);
815
816 return IRQ_HANDLED; 674 return IRQ_HANDLED;
817} 675}
818 676
@@ -1033,8 +891,6 @@ static irqreturn_t schizo_pcierr_intr(int irq, void *dev_id, struct pt_regs *reg
1033 if (error_bits & (SCHIZO_PCIAFSR_PPERR | SCHIZO_PCIAFSR_SPERR)) 891 if (error_bits & (SCHIZO_PCIAFSR_PPERR | SCHIZO_PCIAFSR_SPERR))
1034 pci_scan_for_parity_error(p, pbm, pbm->pci_bus); 892 pci_scan_for_parity_error(p, pbm, pbm->pci_bus);
1035 893
1036 schizo_clear_other_err_intr(p, irq);
1037
1038 return IRQ_HANDLED; 894 return IRQ_HANDLED;
1039} 895}
1040 896
@@ -1090,7 +946,6 @@ static irqreturn_t schizo_safarierr_intr(int irq, void *dev_id, struct pt_regs *
1090 printk("PCI%d: Unexpected Safari/JBUS error interrupt, errlog[%016lx]\n", 946 printk("PCI%d: Unexpected Safari/JBUS error interrupt, errlog[%016lx]\n",
1091 p->index, errlog); 947 p->index, errlog);
1092 948
1093 schizo_clear_other_err_intr(p, irq);
1094 return IRQ_HANDLED; 949 return IRQ_HANDLED;
1095 } 950 }
1096 951
@@ -1098,7 +953,6 @@ static irqreturn_t schizo_safarierr_intr(int irq, void *dev_id, struct pt_regs *
1098 p->index); 953 p->index);
1099 schizo_check_iommu_error(p, SAFARI_ERR); 954 schizo_check_iommu_error(p, SAFARI_ERR);
1100 955
1101 schizo_clear_other_err_intr(p, irq);
1102 return IRQ_HANDLED; 956 return IRQ_HANDLED;
1103} 957}
1104 958
@@ -1130,74 +984,47 @@ static irqreturn_t schizo_safarierr_intr(int irq, void *dev_id, struct pt_regs *
1130static void tomatillo_register_error_handlers(struct pci_controller_info *p) 984static void tomatillo_register_error_handlers(struct pci_controller_info *p)
1131{ 985{
1132 struct pci_pbm_info *pbm; 986 struct pci_pbm_info *pbm;
1133 unsigned int irq; 987 struct of_device *op;
1134 u64 tmp, err_mask, err_no_mask; 988 u64 tmp, err_mask, err_no_mask;
1135 989
1136 /* Build IRQs and register handlers. */ 990 /* Tomatillo IRQ property layout is:
991 * 0: PCIERR
992 * 1: UE ERR
993 * 2: CE ERR
994 * 3: SERR
995 * 4: POWER FAIL?
996 */
997
1137 pbm = pbm_for_ino(p, SCHIZO_UE_INO); 998 pbm = pbm_for_ino(p, SCHIZO_UE_INO);
1138 irq = schizo_irq_build(pbm, NULL, (pbm->portid << 6) | SCHIZO_UE_INO); 999 op = of_find_device_by_node(pbm->prom_node);
1139 if (request_irq(irq, schizo_ue_intr, 1000 if (op)
1140 SA_SHIRQ, "TOMATILLO UE", p) < 0) { 1001 request_irq(op->irqs[1], schizo_ue_intr, SA_SHIRQ,
1141 prom_printf("%s: Cannot register UE interrupt.\n", 1002 "TOMATILLO_UE", p);
1142 pbm->name);
1143 prom_halt();
1144 }
1145 tmp = upa_readl(schizo_ino_to_imap(pbm, (pbm->portid << 6) | SCHIZO_UE_INO));
1146 upa_writel(tmp, (pbm->pbm_regs +
1147 schizo_imap_offset(SCHIZO_UE_INO) + 4));
1148 1003
1149 pbm = pbm_for_ino(p, SCHIZO_CE_INO); 1004 pbm = pbm_for_ino(p, SCHIZO_CE_INO);
1150 irq = schizo_irq_build(pbm, NULL, (pbm->portid << 6) | SCHIZO_CE_INO); 1005 op = of_find_device_by_node(pbm->prom_node);
1151 if (request_irq(irq, schizo_ce_intr, 1006 if (op)
1152 SA_SHIRQ, "TOMATILLO CE", p) < 0) { 1007 request_irq(op->irqs[2], schizo_ce_intr, SA_SHIRQ,
1153 prom_printf("%s: Cannot register CE interrupt.\n", 1008 "TOMATILLO CE", p);
1154 pbm->name);
1155 prom_halt();
1156 }
1157 tmp = upa_readl(schizo_ino_to_imap(pbm, (pbm->portid << 6) | SCHIZO_CE_INO));
1158 upa_writel(tmp, (pbm->pbm_regs +
1159 schizo_imap_offset(SCHIZO_CE_INO) + 4));
1160 1009
1161 pbm = pbm_for_ino(p, SCHIZO_PCIERR_A_INO); 1010 pbm = pbm_for_ino(p, SCHIZO_PCIERR_A_INO);
1162 irq = schizo_irq_build(pbm, NULL, ((pbm->portid << 6) | 1011 op = of_find_device_by_node(pbm->prom_node);
1163 SCHIZO_PCIERR_A_INO)); 1012 if (op)
1164 if (request_irq(irq, schizo_pcierr_intr, 1013 request_irq(op->irqs[0], schizo_pcierr_intr, SA_SHIRQ,
1165 SA_SHIRQ, "TOMATILLO PCIERR", pbm) < 0) { 1014 "TOMATILLO PCIERR-A", pbm);
1166 prom_printf("%s: Cannot register PBM A PciERR interrupt.\n", 1015
1167 pbm->name);
1168 prom_halt();
1169 }
1170 tmp = upa_readl(schizo_ino_to_imap(pbm, ((pbm->portid << 6) |
1171 SCHIZO_PCIERR_A_INO)));
1172 upa_writel(tmp, (pbm->pbm_regs +
1173 schizo_imap_offset(SCHIZO_PCIERR_A_INO) + 4));
1174 1016
1175 pbm = pbm_for_ino(p, SCHIZO_PCIERR_B_INO); 1017 pbm = pbm_for_ino(p, SCHIZO_PCIERR_B_INO);
1176 irq = schizo_irq_build(pbm, NULL, ((pbm->portid << 6) | 1018 op = of_find_device_by_node(pbm->prom_node);
1177 SCHIZO_PCIERR_B_INO)); 1019 if (op)
1178 if (request_irq(irq, schizo_pcierr_intr, 1020 request_irq(op->irqs[0], schizo_pcierr_intr, SA_SHIRQ,
1179 SA_SHIRQ, "TOMATILLO PCIERR", pbm) < 0) { 1021 "TOMATILLO PCIERR-B", pbm);
1180 prom_printf("%s: Cannot register PBM B PciERR interrupt.\n",
1181 pbm->name);
1182 prom_halt();
1183 }
1184 tmp = upa_readl(schizo_ino_to_imap(pbm, ((pbm->portid << 6) |
1185 SCHIZO_PCIERR_B_INO)));
1186 upa_writel(tmp, (pbm->pbm_regs +
1187 schizo_imap_offset(SCHIZO_PCIERR_B_INO) + 4));
1188 1022
1189 pbm = pbm_for_ino(p, SCHIZO_SERR_INO); 1023 pbm = pbm_for_ino(p, SCHIZO_SERR_INO);
1190 irq = schizo_irq_build(pbm, NULL, (pbm->portid << 6) | SCHIZO_SERR_INO); 1024 op = of_find_device_by_node(pbm->prom_node);
1191 if (request_irq(irq, schizo_safarierr_intr, 1025 if (op)
1192 SA_SHIRQ, "TOMATILLO SERR", p) < 0) { 1026 request_irq(op->irqs[3], schizo_safarierr_intr, SA_SHIRQ,
1193 prom_printf("%s: Cannot register SafariERR interrupt.\n", 1027 "TOMATILLO SERR", p);
1194 pbm->name);
1195 prom_halt();
1196 }
1197 tmp = upa_readl(schizo_ino_to_imap(pbm, ((pbm->portid << 6) |
1198 SCHIZO_SERR_INO)));
1199 upa_writel(tmp, (pbm->pbm_regs +
1200 schizo_imap_offset(SCHIZO_SERR_INO) + 4));
1201 1028
1202 /* Enable UE and CE interrupts for controller. */ 1029 /* Enable UE and CE interrupts for controller. */
1203 schizo_write(p->pbm_A.controller_regs + SCHIZO_ECC_CTRL, 1030 schizo_write(p->pbm_A.controller_regs + SCHIZO_ECC_CTRL,
@@ -1265,64 +1092,47 @@ static void tomatillo_register_error_handlers(struct pci_controller_info *p)
1265static void schizo_register_error_handlers(struct pci_controller_info *p) 1092static void schizo_register_error_handlers(struct pci_controller_info *p)
1266{ 1093{
1267 struct pci_pbm_info *pbm; 1094 struct pci_pbm_info *pbm;
1268 unsigned int irq; 1095 struct of_device *op;
1269 u64 tmp, err_mask, err_no_mask; 1096 u64 tmp, err_mask, err_no_mask;
1270 1097
1271 /* Build IRQs and register handlers. */ 1098 /* Schizo IRQ property layout is:
1099 * 0: PCIERR
1100 * 1: UE ERR
1101 * 2: CE ERR
1102 * 3: SERR
1103 * 4: POWER FAIL?
1104 */
1105
1272 pbm = pbm_for_ino(p, SCHIZO_UE_INO); 1106 pbm = pbm_for_ino(p, SCHIZO_UE_INO);
1273 irq = schizo_irq_build(pbm, NULL, (pbm->portid << 6) | SCHIZO_UE_INO); 1107 op = of_find_device_by_node(pbm->prom_node);
1274 if (request_irq(irq, schizo_ue_intr, 1108 if (op)
1275 SA_SHIRQ, "SCHIZO UE", p) < 0) { 1109 request_irq(op->irqs[1], schizo_ue_intr, SA_SHIRQ,
1276 prom_printf("%s: Cannot register UE interrupt.\n", 1110 "SCHIZO_UE", p);
1277 pbm->name);
1278 prom_halt();
1279 }
1280 tmp = upa_readl(schizo_ino_to_imap(pbm, (pbm->portid << 6) | SCHIZO_UE_INO));
1281 upa_writel(tmp, (pbm->pbm_regs + schizo_imap_offset(SCHIZO_UE_INO) + 4));
1282 1111
1283 pbm = pbm_for_ino(p, SCHIZO_CE_INO); 1112 pbm = pbm_for_ino(p, SCHIZO_CE_INO);
1284 irq = schizo_irq_build(pbm, NULL, (pbm->portid << 6) | SCHIZO_CE_INO); 1113 op = of_find_device_by_node(pbm->prom_node);
1285 if (request_irq(irq, schizo_ce_intr, 1114 if (op)
1286 SA_SHIRQ, "SCHIZO CE", p) < 0) { 1115 request_irq(op->irqs[2], schizo_ce_intr, SA_SHIRQ,
1287 prom_printf("%s: Cannot register CE interrupt.\n", 1116 "SCHIZO CE", p);
1288 pbm->name);
1289 prom_halt();
1290 }
1291 tmp = upa_readl(schizo_ino_to_imap(pbm, (pbm->portid << 6) | SCHIZO_CE_INO));
1292 upa_writel(tmp, (pbm->pbm_regs + schizo_imap_offset(SCHIZO_CE_INO) + 4));
1293 1117
1294 pbm = pbm_for_ino(p, SCHIZO_PCIERR_A_INO); 1118 pbm = pbm_for_ino(p, SCHIZO_PCIERR_A_INO);
1295 irq = schizo_irq_build(pbm, NULL, (pbm->portid << 6) | SCHIZO_PCIERR_A_INO); 1119 op = of_find_device_by_node(pbm->prom_node);
1296 if (request_irq(irq, schizo_pcierr_intr, 1120 if (op)
1297 SA_SHIRQ, "SCHIZO PCIERR", pbm) < 0) { 1121 request_irq(op->irqs[0], schizo_pcierr_intr, SA_SHIRQ,
1298 prom_printf("%s: Cannot register PBM A PciERR interrupt.\n", 1122 "SCHIZO PCIERR-A", pbm);
1299 pbm->name); 1123
1300 prom_halt();
1301 }
1302 tmp = upa_readl(schizo_ino_to_imap(pbm, (pbm->portid << 6) | SCHIZO_PCIERR_A_INO));
1303 upa_writel(tmp, (pbm->pbm_regs + schizo_imap_offset(SCHIZO_PCIERR_A_INO) + 4));
1304 1124
1305 pbm = pbm_for_ino(p, SCHIZO_PCIERR_B_INO); 1125 pbm = pbm_for_ino(p, SCHIZO_PCIERR_B_INO);
1306 irq = schizo_irq_build(pbm, NULL, (pbm->portid << 6) | SCHIZO_PCIERR_B_INO); 1126 op = of_find_device_by_node(pbm->prom_node);
1307 if (request_irq(irq, schizo_pcierr_intr, 1127 if (op)
1308 SA_SHIRQ, "SCHIZO PCIERR", &p->pbm_B) < 0) { 1128 request_irq(op->irqs[0], schizo_pcierr_intr, SA_SHIRQ,
1309 prom_printf("%s: Cannot register PBM B PciERR interrupt.\n", 1129 "SCHIZO PCIERR-B", pbm);
1310 pbm->name);
1311 prom_halt();
1312 }
1313 tmp = upa_readl(schizo_ino_to_imap(pbm, (pbm->portid << 6) | SCHIZO_PCIERR_B_INO));
1314 upa_writel(tmp, (pbm->pbm_regs + schizo_imap_offset(SCHIZO_PCIERR_B_INO) + 4));
1315 1130
1316 pbm = pbm_for_ino(p, SCHIZO_SERR_INO); 1131 pbm = pbm_for_ino(p, SCHIZO_SERR_INO);
1317 irq = schizo_irq_build(pbm, NULL, (pbm->portid << 6) | SCHIZO_SERR_INO); 1132 op = of_find_device_by_node(pbm->prom_node);
1318 if (request_irq(irq, schizo_safarierr_intr, 1133 if (op)
1319 SA_SHIRQ, "SCHIZO SERR", p) < 0) { 1134 request_irq(op->irqs[3], schizo_safarierr_intr, SA_SHIRQ,
1320 prom_printf("%s: Cannot register SafariERR interrupt.\n", 1135 "SCHIZO SERR", p);
1321 pbm->name);
1322 prom_halt();
1323 }
1324 tmp = upa_readl(schizo_ino_to_imap(pbm, (pbm->portid << 6) | SCHIZO_SERR_INO));
1325 upa_writel(tmp, (pbm->pbm_regs + schizo_imap_offset(SCHIZO_SERR_INO) + 4));
1326 1136
1327 /* Enable UE and CE interrupts for controller. */ 1137 /* Enable UE and CE interrupts for controller. */
1328 schizo_write(p->pbm_A.controller_regs + SCHIZO_ECC_CTRL, 1138 schizo_write(p->pbm_A.controller_regs + SCHIZO_ECC_CTRL,
@@ -2022,7 +1832,6 @@ static void __schizo_init(struct device_node *dp, char *model_name, int chip_typ
2022 p->scan_bus = (chip_type == PBM_CHIP_TYPE_TOMATILLO ? 1832 p->scan_bus = (chip_type == PBM_CHIP_TYPE_TOMATILLO ?
2023 tomatillo_scan_bus : 1833 tomatillo_scan_bus :
2024 schizo_scan_bus); 1834 schizo_scan_bus);
2025 p->irq_build = schizo_irq_build;
2026 p->base_address_update = schizo_base_address_update; 1835 p->base_address_update = schizo_base_address_update;
2027 p->resource_adjust = schizo_resource_adjust; 1836 p->resource_adjust = schizo_resource_adjust;
2028 p->pci_ops = &schizo_ops; 1837 p->pci_ops = &schizo_ops;
diff --git a/arch/sparc64/kernel/pci_sun4v.c b/arch/sparc64/kernel/pci_sun4v.c
index b69e2270a721..03ad4c06758e 100644
--- a/arch/sparc64/kernel/pci_sun4v.c
+++ b/arch/sparc64/kernel/pci_sun4v.c
@@ -843,15 +843,6 @@ static void pci_sun4v_scan_bus(struct pci_controller_info *p)
843 /* XXX register error interrupt handlers XXX */ 843 /* XXX register error interrupt handlers XXX */
844} 844}
845 845
846static unsigned int pci_sun4v_irq_build(struct pci_pbm_info *pbm,
847 struct pci_dev *pdev,
848 unsigned int devino)
849{
850 u32 devhandle = pbm->devhandle;
851
852 return sun4v_build_irq(devhandle, devino);
853}
854
855static void pci_sun4v_base_address_update(struct pci_dev *pdev, int resource) 846static void pci_sun4v_base_address_update(struct pci_dev *pdev, int resource)
856{ 847{
857 struct pcidev_cookie *pcp = pdev->sysdata; 848 struct pcidev_cookie *pcp = pdev->sysdata;
@@ -1200,7 +1191,6 @@ void sun4v_pci_init(struct device_node *dp, char *model_name)
1200 p->pbms_same_domain = 0; 1191 p->pbms_same_domain = 0;
1201 1192
1202 p->scan_bus = pci_sun4v_scan_bus; 1193 p->scan_bus = pci_sun4v_scan_bus;
1203 p->irq_build = pci_sun4v_irq_build;
1204 p->base_address_update = pci_sun4v_base_address_update; 1194 p->base_address_update = pci_sun4v_base_address_update;
1205 p->resource_adjust = pci_sun4v_resource_adjust; 1195 p->resource_adjust = pci_sun4v_resource_adjust;
1206 p->pci_ops = &pci_sun4v_ops; 1196 p->pci_ops = &pci_sun4v_ops;
diff --git a/arch/sparc64/kernel/power.c b/arch/sparc64/kernel/power.c
index 9496c7734014..4febeda958a3 100644
--- a/arch/sparc64/kernel/power.c
+++ b/arch/sparc64/kernel/power.c
@@ -17,9 +17,10 @@
17#include <linux/pm.h> 17#include <linux/pm.h>
18 18
19#include <asm/system.h> 19#include <asm/system.h>
20#include <asm/ebus.h>
21#include <asm/isa.h>
22#include <asm/auxio.h> 20#include <asm/auxio.h>
21#include <asm/prom.h>
22#include <asm/of_device.h>
23#include <asm/io.h>
23 24
24#include <linux/unistd.h> 25#include <linux/unistd.h>
25 26
@@ -30,6 +31,7 @@
30int scons_pwroff = 1; 31int scons_pwroff = 1;
31 32
32#ifdef CONFIG_PCI 33#ifdef CONFIG_PCI
34#include <linux/pci.h>
33static void __iomem *power_reg; 35static void __iomem *power_reg;
34 36
35static DECLARE_WAIT_QUEUE_HEAD(powerd_wait); 37static DECLARE_WAIT_QUEUE_HEAD(powerd_wait);
@@ -115,27 +117,33 @@ static int __init has_button_interrupt(unsigned int irq, struct device_node *dp)
115 return 1; 117 return 1;
116} 118}
117 119
118static void __devinit power_probe_common(struct of_device *dev, struct resource *res, unsigned int irq) 120static int __devinit power_probe(struct of_device *op, const struct of_device_id *match)
119{ 121{
120 power_reg = ioremap(res->start, 0x4); 122 struct resource *res = &op->resource[0];
123 unsigned int irq= op->irqs[0];
121 124
122 printk("power: Control reg at %p ... ", power_reg); 125 power_reg = of_ioremap(res, 0, 0x4, "power");
126
127 printk("%s: Control reg at %lx ... ",
128 op->node->name, res->start);
123 129
124 poweroff_method = machine_halt; /* able to use the standard halt */ 130 poweroff_method = machine_halt; /* able to use the standard halt */
125 131
126 if (has_button_interrupt(irq, dev->node)) { 132 if (has_button_interrupt(irq, op->node)) {
127 if (kernel_thread(powerd, NULL, CLONE_FS) < 0) { 133 if (kernel_thread(powerd, NULL, CLONE_FS) < 0) {
128 printk("Failed to start power daemon.\n"); 134 printk("Failed to start power daemon.\n");
129 return; 135 return 0;
130 } 136 }
131 printk("powerd running.\n"); 137 printk("powerd running.\n");
132 138
133 if (request_irq(irq, 139 if (request_irq(irq,
134 power_handler, SA_SHIRQ, "power", NULL) < 0) 140 power_handler, 0, "power", NULL) < 0)
135 printk("power: Error, cannot register IRQ handler.\n"); 141 printk("power: Error, cannot register IRQ handler.\n");
136 } else { 142 } else {
137 printk("not using powerd.\n"); 143 printk("not using powerd.\n");
138 } 144 }
145
146 return 0;
139} 147}
140 148
141static struct of_device_id power_match[] = { 149static struct of_device_id power_match[] = {
@@ -145,44 +153,15 @@ static struct of_device_id power_match[] = {
145 {}, 153 {},
146}; 154};
147 155
148static int __devinit ebus_power_probe(struct of_device *dev, const struct of_device_id *match) 156static struct of_platform_driver power_driver = {
149{
150 struct linux_ebus_device *edev = to_ebus_device(&dev->dev);
151 struct resource *res = &edev->resource[0];
152 unsigned int irq = edev->irqs[0];
153
154 power_probe_common(dev, res,irq);
155
156 return 0;
157}
158
159static struct of_platform_driver ebus_power_driver = {
160 .name = "power",
161 .match_table = power_match,
162 .probe = ebus_power_probe,
163};
164
165static int __devinit isa_power_probe(struct of_device *dev, const struct of_device_id *match)
166{
167 struct sparc_isa_device *idev = to_isa_device(&dev->dev);
168 struct resource *res = &idev->resource;
169 unsigned int irq = idev->irq;
170
171 power_probe_common(dev, res,irq);
172
173 return 0;
174}
175
176static struct of_platform_driver isa_power_driver = {
177 .name = "power", 157 .name = "power",
178 .match_table = power_match, 158 .match_table = power_match,
179 .probe = isa_power_probe, 159 .probe = power_probe,
180}; 160};
181 161
182void __init power_init(void) 162void __init power_init(void)
183{ 163{
184 of_register_driver(&ebus_power_driver, &ebus_bus_type); 164 of_register_driver(&power_driver, &of_bus_type);
185 of_register_driver(&isa_power_driver, &isa_bus_type);
186 return; 165 return;
187} 166}
188#endif /* CONFIG_PCI */ 167#endif /* CONFIG_PCI */
diff --git a/arch/sparc64/kernel/prom.c b/arch/sparc64/kernel/prom.c
index 8e87e7ea0325..8a70c52c0447 100644
--- a/arch/sparc64/kernel/prom.c
+++ b/arch/sparc64/kernel/prom.c
@@ -15,6 +15,7 @@
15 * 2 of the License, or (at your option) any later version. 15 * 2 of the License, or (at your option) any later version.
16 */ 16 */
17 17
18#include <linux/config.h>
18#include <linux/kernel.h> 19#include <linux/kernel.h>
19#include <linux/types.h> 20#include <linux/types.h>
20#include <linux/string.h> 21#include <linux/string.h>
@@ -23,7 +24,11 @@
23#include <linux/module.h> 24#include <linux/module.h>
24 25
25#include <asm/prom.h> 26#include <asm/prom.h>
27#include <asm/of_device.h>
26#include <asm/oplib.h> 28#include <asm/oplib.h>
29#include <asm/irq.h>
30#include <asm/asi.h>
31#include <asm/upa.h>
27 32
28static struct device_node *allnodes; 33static struct device_node *allnodes;
29 34
@@ -190,6 +195,36 @@ int of_getintprop_default(struct device_node *np, const char *name, int def)
190} 195}
191EXPORT_SYMBOL(of_getintprop_default); 196EXPORT_SYMBOL(of_getintprop_default);
192 197
198int of_n_addr_cells(struct device_node *np)
199{
200 int* ip;
201 do {
202 if (np->parent)
203 np = np->parent;
204 ip = of_get_property(np, "#address-cells", NULL);
205 if (ip != NULL)
206 return *ip;
207 } while (np->parent);
208 /* No #address-cells property for the root node, default to 2 */
209 return 2;
210}
211EXPORT_SYMBOL(of_n_addr_cells);
212
213int of_n_size_cells(struct device_node *np)
214{
215 int* ip;
216 do {
217 if (np->parent)
218 np = np->parent;
219 ip = of_get_property(np, "#size-cells", NULL);
220 if (ip != NULL)
221 return *ip;
222 } while (np->parent);
223 /* No #size-cells property for the root node, default to 1 */
224 return 1;
225}
226EXPORT_SYMBOL(of_n_size_cells);
227
193int of_set_property(struct device_node *dp, const char *name, void *val, int len) 228int of_set_property(struct device_node *dp, const char *name, void *val, int len)
194{ 229{
195 struct property **prevp; 230 struct property **prevp;
@@ -253,6 +288,754 @@ static void * __init prom_early_alloc(unsigned long size)
253 return ret; 288 return ret;
254} 289}
255 290
291#ifdef CONFIG_PCI
292/* PSYCHO interrupt mapping support. */
293#define PSYCHO_IMAP_A_SLOT0 0x0c00UL
294#define PSYCHO_IMAP_B_SLOT0 0x0c20UL
295static unsigned long psycho_pcislot_imap_offset(unsigned long ino)
296{
297 unsigned int bus = (ino & 0x10) >> 4;
298 unsigned int slot = (ino & 0x0c) >> 2;
299
300 if (bus == 0)
301 return PSYCHO_IMAP_A_SLOT0 + (slot * 8);
302 else
303 return PSYCHO_IMAP_B_SLOT0 + (slot * 8);
304}
305
306#define PSYCHO_IMAP_SCSI 0x1000UL
307#define PSYCHO_IMAP_ETH 0x1008UL
308#define PSYCHO_IMAP_BPP 0x1010UL
309#define PSYCHO_IMAP_AU_REC 0x1018UL
310#define PSYCHO_IMAP_AU_PLAY 0x1020UL
311#define PSYCHO_IMAP_PFAIL 0x1028UL
312#define PSYCHO_IMAP_KMS 0x1030UL
313#define PSYCHO_IMAP_FLPY 0x1038UL
314#define PSYCHO_IMAP_SHW 0x1040UL
315#define PSYCHO_IMAP_KBD 0x1048UL
316#define PSYCHO_IMAP_MS 0x1050UL
317#define PSYCHO_IMAP_SER 0x1058UL
318#define PSYCHO_IMAP_TIM0 0x1060UL
319#define PSYCHO_IMAP_TIM1 0x1068UL
320#define PSYCHO_IMAP_UE 0x1070UL
321#define PSYCHO_IMAP_CE 0x1078UL
322#define PSYCHO_IMAP_A_ERR 0x1080UL
323#define PSYCHO_IMAP_B_ERR 0x1088UL
324#define PSYCHO_IMAP_PMGMT 0x1090UL
325#define PSYCHO_IMAP_GFX 0x1098UL
326#define PSYCHO_IMAP_EUPA 0x10a0UL
327
328static unsigned long __psycho_onboard_imap_off[] = {
329/*0x20*/ PSYCHO_IMAP_SCSI,
330/*0x21*/ PSYCHO_IMAP_ETH,
331/*0x22*/ PSYCHO_IMAP_BPP,
332/*0x23*/ PSYCHO_IMAP_AU_REC,
333/*0x24*/ PSYCHO_IMAP_AU_PLAY,
334/*0x25*/ PSYCHO_IMAP_PFAIL,
335/*0x26*/ PSYCHO_IMAP_KMS,
336/*0x27*/ PSYCHO_IMAP_FLPY,
337/*0x28*/ PSYCHO_IMAP_SHW,
338/*0x29*/ PSYCHO_IMAP_KBD,
339/*0x2a*/ PSYCHO_IMAP_MS,
340/*0x2b*/ PSYCHO_IMAP_SER,
341/*0x2c*/ PSYCHO_IMAP_TIM0,
342/*0x2d*/ PSYCHO_IMAP_TIM1,
343/*0x2e*/ PSYCHO_IMAP_UE,
344/*0x2f*/ PSYCHO_IMAP_CE,
345/*0x30*/ PSYCHO_IMAP_A_ERR,
346/*0x31*/ PSYCHO_IMAP_B_ERR,
347/*0x32*/ PSYCHO_IMAP_PMGMT
348};
349#define PSYCHO_ONBOARD_IRQ_BASE 0x20
350#define PSYCHO_ONBOARD_IRQ_LAST 0x32
351#define psycho_onboard_imap_offset(__ino) \
352 __psycho_onboard_imap_off[(__ino) - PSYCHO_ONBOARD_IRQ_BASE]
353
354#define PSYCHO_ICLR_A_SLOT0 0x1400UL
355#define PSYCHO_ICLR_SCSI 0x1800UL
356
357#define psycho_iclr_offset(ino) \
358 ((ino & 0x20) ? (PSYCHO_ICLR_SCSI + (((ino) & 0x1f) << 3)) : \
359 (PSYCHO_ICLR_A_SLOT0 + (((ino) & 0x1f)<<3)))
360
361static unsigned int psycho_irq_build(struct device_node *dp,
362 unsigned int ino,
363 void *_data)
364{
365 unsigned long controller_regs = (unsigned long) _data;
366 unsigned long imap, iclr;
367 unsigned long imap_off, iclr_off;
368 int inofixup = 0;
369
370 ino &= 0x3f;
371 if (ino < PSYCHO_ONBOARD_IRQ_BASE) {
372 /* PCI slot */
373 imap_off = psycho_pcislot_imap_offset(ino);
374 } else {
375 /* Onboard device */
376 if (ino > PSYCHO_ONBOARD_IRQ_LAST) {
377 prom_printf("psycho_irq_build: Wacky INO [%x]\n", ino);
378 prom_halt();
379 }
380 imap_off = psycho_onboard_imap_offset(ino);
381 }
382
383 /* Now build the IRQ bucket. */
384 imap = controller_regs + imap_off;
385 imap += 4;
386
387 iclr_off = psycho_iclr_offset(ino);
388 iclr = controller_regs + iclr_off;
389 iclr += 4;
390
391 if ((ino & 0x20) == 0)
392 inofixup = ino & 0x03;
393
394 return build_irq(inofixup, iclr, imap);
395}
396
397static void psycho_irq_trans_init(struct device_node *dp)
398{
399 struct linux_prom64_registers *regs;
400
401 dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
402 dp->irq_trans->irq_build = psycho_irq_build;
403
404 regs = of_get_property(dp, "reg", NULL);
405 dp->irq_trans->data = (void *) regs[2].phys_addr;
406}
407
408#define sabre_read(__reg) \
409({ u64 __ret; \
410 __asm__ __volatile__("ldxa [%1] %2, %0" \
411 : "=r" (__ret) \
412 : "r" (__reg), "i" (ASI_PHYS_BYPASS_EC_E) \
413 : "memory"); \
414 __ret; \
415})
416
417struct sabre_irq_data {
418 unsigned long controller_regs;
419 unsigned int pci_first_busno;
420};
421#define SABRE_CONFIGSPACE 0x001000000UL
422#define SABRE_WRSYNC 0x1c20UL
423
424#define SABRE_CONFIG_BASE(CONFIG_SPACE) \
425 (CONFIG_SPACE | (1UL << 24))
426#define SABRE_CONFIG_ENCODE(BUS, DEVFN, REG) \
427 (((unsigned long)(BUS) << 16) | \
428 ((unsigned long)(DEVFN) << 8) | \
429 ((unsigned long)(REG)))
430
431/* When a device lives behind a bridge deeper in the PCI bus topology
432 * than APB, a special sequence must run to make sure all pending DMA
433 * transfers at the time of IRQ delivery are visible in the coherency
434 * domain by the cpu. This sequence is to perform a read on the far
435 * side of the non-APB bridge, then perform a read of Sabre's DMA
436 * write-sync register.
437 */
438static void sabre_wsync_handler(unsigned int ino, void *_arg1, void *_arg2)
439{
440 unsigned int phys_hi = (unsigned int) (unsigned long) _arg1;
441 struct sabre_irq_data *irq_data = _arg2;
442 unsigned long controller_regs = irq_data->controller_regs;
443 unsigned long sync_reg = controller_regs + SABRE_WRSYNC;
444 unsigned long config_space = controller_regs + SABRE_CONFIGSPACE;
445 unsigned int bus, devfn;
446 u16 _unused;
447
448 config_space = SABRE_CONFIG_BASE(config_space);
449
450 bus = (phys_hi >> 16) & 0xff;
451 devfn = (phys_hi >> 8) & 0xff;
452
453 config_space |= SABRE_CONFIG_ENCODE(bus, devfn, 0x00);
454
455 __asm__ __volatile__("membar #Sync\n\t"
456 "lduha [%1] %2, %0\n\t"
457 "membar #Sync"
458 : "=r" (_unused)
459 : "r" ((u16 *) config_space),
460 "i" (ASI_PHYS_BYPASS_EC_E_L)
461 : "memory");
462
463 sabre_read(sync_reg);
464}
465
466#define SABRE_IMAP_A_SLOT0 0x0c00UL
467#define SABRE_IMAP_B_SLOT0 0x0c20UL
468#define SABRE_IMAP_SCSI 0x1000UL
469#define SABRE_IMAP_ETH 0x1008UL
470#define SABRE_IMAP_BPP 0x1010UL
471#define SABRE_IMAP_AU_REC 0x1018UL
472#define SABRE_IMAP_AU_PLAY 0x1020UL
473#define SABRE_IMAP_PFAIL 0x1028UL
474#define SABRE_IMAP_KMS 0x1030UL
475#define SABRE_IMAP_FLPY 0x1038UL
476#define SABRE_IMAP_SHW 0x1040UL
477#define SABRE_IMAP_KBD 0x1048UL
478#define SABRE_IMAP_MS 0x1050UL
479#define SABRE_IMAP_SER 0x1058UL
480#define SABRE_IMAP_UE 0x1070UL
481#define SABRE_IMAP_CE 0x1078UL
482#define SABRE_IMAP_PCIERR 0x1080UL
483#define SABRE_IMAP_GFX 0x1098UL
484#define SABRE_IMAP_EUPA 0x10a0UL
485#define SABRE_ICLR_A_SLOT0 0x1400UL
486#define SABRE_ICLR_B_SLOT0 0x1480UL
487#define SABRE_ICLR_SCSI 0x1800UL
488#define SABRE_ICLR_ETH 0x1808UL
489#define SABRE_ICLR_BPP 0x1810UL
490#define SABRE_ICLR_AU_REC 0x1818UL
491#define SABRE_ICLR_AU_PLAY 0x1820UL
492#define SABRE_ICLR_PFAIL 0x1828UL
493#define SABRE_ICLR_KMS 0x1830UL
494#define SABRE_ICLR_FLPY 0x1838UL
495#define SABRE_ICLR_SHW 0x1840UL
496#define SABRE_ICLR_KBD 0x1848UL
497#define SABRE_ICLR_MS 0x1850UL
498#define SABRE_ICLR_SER 0x1858UL
499#define SABRE_ICLR_UE 0x1870UL
500#define SABRE_ICLR_CE 0x1878UL
501#define SABRE_ICLR_PCIERR 0x1880UL
502
503static unsigned long sabre_pcislot_imap_offset(unsigned long ino)
504{
505 unsigned int bus = (ino & 0x10) >> 4;
506 unsigned int slot = (ino & 0x0c) >> 2;
507
508 if (bus == 0)
509 return SABRE_IMAP_A_SLOT0 + (slot * 8);
510 else
511 return SABRE_IMAP_B_SLOT0 + (slot * 8);
512}
513
514static unsigned long __sabre_onboard_imap_off[] = {
515/*0x20*/ SABRE_IMAP_SCSI,
516/*0x21*/ SABRE_IMAP_ETH,
517/*0x22*/ SABRE_IMAP_BPP,
518/*0x23*/ SABRE_IMAP_AU_REC,
519/*0x24*/ SABRE_IMAP_AU_PLAY,
520/*0x25*/ SABRE_IMAP_PFAIL,
521/*0x26*/ SABRE_IMAP_KMS,
522/*0x27*/ SABRE_IMAP_FLPY,
523/*0x28*/ SABRE_IMAP_SHW,
524/*0x29*/ SABRE_IMAP_KBD,
525/*0x2a*/ SABRE_IMAP_MS,
526/*0x2b*/ SABRE_IMAP_SER,
527/*0x2c*/ 0 /* reserved */,
528/*0x2d*/ 0 /* reserved */,
529/*0x2e*/ SABRE_IMAP_UE,
530/*0x2f*/ SABRE_IMAP_CE,
531/*0x30*/ SABRE_IMAP_PCIERR,
532};
533#define SABRE_ONBOARD_IRQ_BASE 0x20
534#define SABRE_ONBOARD_IRQ_LAST 0x30
535#define sabre_onboard_imap_offset(__ino) \
536 __sabre_onboard_imap_off[(__ino) - SABRE_ONBOARD_IRQ_BASE]
537
538#define sabre_iclr_offset(ino) \
539 ((ino & 0x20) ? (SABRE_ICLR_SCSI + (((ino) & 0x1f) << 3)) : \
540 (SABRE_ICLR_A_SLOT0 + (((ino) & 0x1f)<<3)))
541
542static unsigned int sabre_irq_build(struct device_node *dp,
543 unsigned int ino,
544 void *_data)
545{
546 struct sabre_irq_data *irq_data = _data;
547 unsigned long controller_regs = irq_data->controller_regs;
548 struct linux_prom_pci_registers *regs;
549 unsigned long imap, iclr;
550 unsigned long imap_off, iclr_off;
551 int inofixup = 0;
552 int virt_irq;
553
554 ino &= 0x3f;
555 if (ino < SABRE_ONBOARD_IRQ_BASE) {
556 /* PCI slot */
557 imap_off = sabre_pcislot_imap_offset(ino);
558 } else {
559 /* onboard device */
560 if (ino > SABRE_ONBOARD_IRQ_LAST) {
561 prom_printf("sabre_irq_build: Wacky INO [%x]\n", ino);
562 prom_halt();
563 }
564 imap_off = sabre_onboard_imap_offset(ino);
565 }
566
567 /* Now build the IRQ bucket. */
568 imap = controller_regs + imap_off;
569 imap += 4;
570
571 iclr_off = sabre_iclr_offset(ino);
572 iclr = controller_regs + iclr_off;
573 iclr += 4;
574
575 if ((ino & 0x20) == 0)
576 inofixup = ino & 0x03;
577
578 virt_irq = build_irq(inofixup, iclr, imap);
579
580 regs = of_get_property(dp, "reg", NULL);
581 if (regs &&
582 ((regs->phys_hi >> 16) & 0xff) != irq_data->pci_first_busno) {
583 irq_install_pre_handler(virt_irq,
584 sabre_wsync_handler,
585 (void *) (long) regs->phys_hi,
586 (void *)
587 controller_regs +
588 SABRE_WRSYNC);
589 }
590
591 return virt_irq;
592}
593
594static void sabre_irq_trans_init(struct device_node *dp)
595{
596 struct linux_prom64_registers *regs;
597 struct sabre_irq_data *irq_data;
598 u32 *busrange;
599
600 dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
601 dp->irq_trans->irq_build = sabre_irq_build;
602
603 irq_data = prom_early_alloc(sizeof(struct sabre_irq_data));
604
605 regs = of_get_property(dp, "reg", NULL);
606 irq_data->controller_regs = regs[0].phys_addr;
607
608 busrange = of_get_property(dp, "bus-range", NULL);
609 irq_data->pci_first_busno = busrange[0];
610
611 dp->irq_trans->data = irq_data;
612}
613
614/* SCHIZO interrupt mapping support. Unlike Psycho, for this controller the
615 * imap/iclr registers are per-PBM.
616 */
617#define SCHIZO_IMAP_BASE 0x1000UL
618#define SCHIZO_ICLR_BASE 0x1400UL
619
620static unsigned long schizo_imap_offset(unsigned long ino)
621{
622 return SCHIZO_IMAP_BASE + (ino * 8UL);
623}
624
625static unsigned long schizo_iclr_offset(unsigned long ino)
626{
627 return SCHIZO_ICLR_BASE + (ino * 8UL);
628}
629
630static unsigned long schizo_ino_to_iclr(unsigned long pbm_regs,
631 unsigned int ino)
632{
633 return pbm_regs + schizo_iclr_offset(ino) + 4;
634}
635
636static unsigned long schizo_ino_to_imap(unsigned long pbm_regs,
637 unsigned int ino)
638{
639 return pbm_regs + schizo_imap_offset(ino) + 4;
640}
641
642#define schizo_read(__reg) \
643({ u64 __ret; \
644 __asm__ __volatile__("ldxa [%1] %2, %0" \
645 : "=r" (__ret) \
646 : "r" (__reg), "i" (ASI_PHYS_BYPASS_EC_E) \
647 : "memory"); \
648 __ret; \
649})
650#define schizo_write(__reg, __val) \
651 __asm__ __volatile__("stxa %0, [%1] %2" \
652 : /* no outputs */ \
653 : "r" (__val), "r" (__reg), \
654 "i" (ASI_PHYS_BYPASS_EC_E) \
655 : "memory")
656
657static void tomatillo_wsync_handler(unsigned int ino, void *_arg1, void *_arg2)
658{
659 unsigned long sync_reg = (unsigned long) _arg2;
660 u64 mask = 1UL << (ino & IMAP_INO);
661 u64 val;
662 int limit;
663
664 schizo_write(sync_reg, mask);
665
666 limit = 100000;
667 val = 0;
668 while (--limit) {
669 val = schizo_read(sync_reg);
670 if (!(val & mask))
671 break;
672 }
673 if (limit <= 0) {
674 printk("tomatillo_wsync_handler: DMA won't sync [%lx:%lx]\n",
675 val, mask);
676 }
677
678 if (_arg1) {
679 static unsigned char cacheline[64]
680 __attribute__ ((aligned (64)));
681
682 __asm__ __volatile__("rd %%fprs, %0\n\t"
683 "or %0, %4, %1\n\t"
684 "wr %1, 0x0, %%fprs\n\t"
685 "stda %%f0, [%5] %6\n\t"
686 "wr %0, 0x0, %%fprs\n\t"
687 "membar #Sync"
688 : "=&r" (mask), "=&r" (val)
689 : "0" (mask), "1" (val),
690 "i" (FPRS_FEF), "r" (&cacheline[0]),
691 "i" (ASI_BLK_COMMIT_P));
692 }
693}
694
695struct schizo_irq_data {
696 unsigned long pbm_regs;
697 unsigned long sync_reg;
698 u32 portid;
699 int chip_version;
700};
701
702static unsigned int schizo_irq_build(struct device_node *dp,
703 unsigned int ino,
704 void *_data)
705{
706 struct schizo_irq_data *irq_data = _data;
707 unsigned long pbm_regs = irq_data->pbm_regs;
708 unsigned long imap, iclr;
709 int ign_fixup;
710 int virt_irq;
711 int is_tomatillo;
712
713 ino &= 0x3f;
714
715 /* Now build the IRQ bucket. */
716 imap = schizo_ino_to_imap(pbm_regs, ino);
717 iclr = schizo_ino_to_iclr(pbm_regs, ino);
718
719 /* On Schizo, no inofixup occurs. This is because each
720 * INO has it's own IMAP register. On Psycho and Sabre
721 * there is only one IMAP register for each PCI slot even
722 * though four different INOs can be generated by each
723 * PCI slot.
724 *
725 * But, for JBUS variants (essentially, Tomatillo), we have
726 * to fixup the lowest bit of the interrupt group number.
727 */
728 ign_fixup = 0;
729
730 is_tomatillo = (irq_data->sync_reg != 0UL);
731
732 if (is_tomatillo) {
733 if (irq_data->portid & 1)
734 ign_fixup = (1 << 6);
735 }
736
737 virt_irq = build_irq(ign_fixup, iclr, imap);
738
739 if (is_tomatillo) {
740 irq_install_pre_handler(virt_irq,
741 tomatillo_wsync_handler,
742 ((irq_data->chip_version <= 4) ?
743 (void *) 1 : (void *) 0),
744 (void *) irq_data->sync_reg);
745 }
746
747 return virt_irq;
748}
749
750static void schizo_irq_trans_init(struct device_node *dp)
751{
752 struct linux_prom64_registers *regs;
753 struct schizo_irq_data *irq_data;
754
755 dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
756 dp->irq_trans->irq_build = schizo_irq_build;
757
758 irq_data = prom_early_alloc(sizeof(struct schizo_irq_data));
759
760 regs = of_get_property(dp, "reg", NULL);
761 dp->irq_trans->data = irq_data;
762
763 irq_data->pbm_regs = regs[0].phys_addr;
764 irq_data->sync_reg = regs[3].phys_addr + 0x1a18UL;
765 irq_data->portid = of_getintprop_default(dp, "portid", 0);
766 irq_data->chip_version = of_getintprop_default(dp, "version#", 0);
767}
768
769static unsigned int pci_sun4v_irq_build(struct device_node *dp,
770 unsigned int devino,
771 void *_data)
772{
773 u32 devhandle = (u32) (unsigned long) _data;
774
775 return sun4v_build_irq(devhandle, devino);
776}
777
778static void pci_sun4v_irq_trans_init(struct device_node *dp)
779{
780 struct linux_prom64_registers *regs;
781
782 dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
783 dp->irq_trans->irq_build = pci_sun4v_irq_build;
784
785 regs = of_get_property(dp, "reg", NULL);
786 dp->irq_trans->data = (void *) (unsigned long)
787 ((regs->phys_addr >> 32UL) & 0x0fffffff);
788}
789#endif /* CONFIG_PCI */
790
791#ifdef CONFIG_SBUS
792/* INO number to IMAP register offset for SYSIO external IRQ's.
793 * This should conform to both Sunfire/Wildfire server and Fusion
794 * desktop designs.
795 */
796#define SYSIO_IMAP_SLOT0 0x2c04UL
797#define SYSIO_IMAP_SLOT1 0x2c0cUL
798#define SYSIO_IMAP_SLOT2 0x2c14UL
799#define SYSIO_IMAP_SLOT3 0x2c1cUL
800#define SYSIO_IMAP_SCSI 0x3004UL
801#define SYSIO_IMAP_ETH 0x300cUL
802#define SYSIO_IMAP_BPP 0x3014UL
803#define SYSIO_IMAP_AUDIO 0x301cUL
804#define SYSIO_IMAP_PFAIL 0x3024UL
805#define SYSIO_IMAP_KMS 0x302cUL
806#define SYSIO_IMAP_FLPY 0x3034UL
807#define SYSIO_IMAP_SHW 0x303cUL
808#define SYSIO_IMAP_KBD 0x3044UL
809#define SYSIO_IMAP_MS 0x304cUL
810#define SYSIO_IMAP_SER 0x3054UL
811#define SYSIO_IMAP_TIM0 0x3064UL
812#define SYSIO_IMAP_TIM1 0x306cUL
813#define SYSIO_IMAP_UE 0x3074UL
814#define SYSIO_IMAP_CE 0x307cUL
815#define SYSIO_IMAP_SBERR 0x3084UL
816#define SYSIO_IMAP_PMGMT 0x308cUL
817#define SYSIO_IMAP_GFX 0x3094UL
818#define SYSIO_IMAP_EUPA 0x309cUL
819
820#define bogon ((unsigned long) -1)
821static unsigned long sysio_irq_offsets[] = {
822 /* SBUS Slot 0 --> 3, level 1 --> 7 */
823 SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0,
824 SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0,
825 SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1,
826 SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1,
827 SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2,
828 SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2,
829 SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3,
830 SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3,
831
832 /* Onboard devices (not relevant/used on SunFire). */
833 SYSIO_IMAP_SCSI,
834 SYSIO_IMAP_ETH,
835 SYSIO_IMAP_BPP,
836 bogon,
837 SYSIO_IMAP_AUDIO,
838 SYSIO_IMAP_PFAIL,
839 bogon,
840 bogon,
841 SYSIO_IMAP_KMS,
842 SYSIO_IMAP_FLPY,
843 SYSIO_IMAP_SHW,
844 SYSIO_IMAP_KBD,
845 SYSIO_IMAP_MS,
846 SYSIO_IMAP_SER,
847 bogon,
848 bogon,
849 SYSIO_IMAP_TIM0,
850 SYSIO_IMAP_TIM1,
851 bogon,
852 bogon,
853 SYSIO_IMAP_UE,
854 SYSIO_IMAP_CE,
855 SYSIO_IMAP_SBERR,
856 SYSIO_IMAP_PMGMT,
857};
858
859#undef bogon
860
861#define NUM_SYSIO_OFFSETS ARRAY_SIZE(sysio_irq_offsets)
862
863/* Convert Interrupt Mapping register pointer to associated
864 * Interrupt Clear register pointer, SYSIO specific version.
865 */
866#define SYSIO_ICLR_UNUSED0 0x3400UL
867#define SYSIO_ICLR_SLOT0 0x340cUL
868#define SYSIO_ICLR_SLOT1 0x344cUL
869#define SYSIO_ICLR_SLOT2 0x348cUL
870#define SYSIO_ICLR_SLOT3 0x34ccUL
871static unsigned long sysio_imap_to_iclr(unsigned long imap)
872{
873 unsigned long diff = SYSIO_ICLR_UNUSED0 - SYSIO_IMAP_SLOT0;
874 return imap + diff;
875}
876
877static unsigned int sbus_of_build_irq(struct device_node *dp,
878 unsigned int ino,
879 void *_data)
880{
881 unsigned long reg_base = (unsigned long) _data;
882 struct linux_prom_registers *regs;
883 unsigned long imap, iclr;
884 int sbus_slot = 0;
885 int sbus_level = 0;
886
887 ino &= 0x3f;
888
889 regs = of_get_property(dp, "reg", NULL);
890 if (regs)
891 sbus_slot = regs->which_io;
892
893 if (ino < 0x20)
894 ino += (sbus_slot * 8);
895
896 imap = sysio_irq_offsets[ino];
897 if (imap == ((unsigned long)-1)) {
898 prom_printf("get_irq_translations: Bad SYSIO INO[%x]\n",
899 ino);
900 prom_halt();
901 }
902 imap += reg_base;
903
904 /* SYSIO inconsistency. For external SLOTS, we have to select
905 * the right ICLR register based upon the lower SBUS irq level
906 * bits.
907 */
908 if (ino >= 0x20) {
909 iclr = sysio_imap_to_iclr(imap);
910 } else {
911 sbus_level = ino & 0x7;
912
913 switch(sbus_slot) {
914 case 0:
915 iclr = reg_base + SYSIO_ICLR_SLOT0;
916 break;
917 case 1:
918 iclr = reg_base + SYSIO_ICLR_SLOT1;
919 break;
920 case 2:
921 iclr = reg_base + SYSIO_ICLR_SLOT2;
922 break;
923 default:
924 case 3:
925 iclr = reg_base + SYSIO_ICLR_SLOT3;
926 break;
927 };
928
929 iclr += ((unsigned long)sbus_level - 1UL) * 8UL;
930 }
931 return build_irq(sbus_level, iclr, imap);
932}
933
934static void sbus_irq_trans_init(struct device_node *dp)
935{
936 struct linux_prom64_registers *regs;
937
938 dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
939 dp->irq_trans->irq_build = sbus_of_build_irq;
940
941 regs = of_get_property(dp, "reg", NULL);
942 dp->irq_trans->data = (void *) (unsigned long) regs->phys_addr;
943}
944#endif /* CONFIG_SBUS */
945
946
947static unsigned int central_build_irq(struct device_node *dp,
948 unsigned int ino,
949 void *_data)
950{
951 struct device_node *central_dp = _data;
952 struct of_device *central_op = of_find_device_by_node(central_dp);
953 struct resource *res;
954 unsigned long imap, iclr;
955 u32 tmp;
956
957 if (!strcmp(dp->name, "eeprom")) {
958 res = &central_op->resource[5];
959 } else if (!strcmp(dp->name, "zs")) {
960 res = &central_op->resource[4];
961 } else if (!strcmp(dp->name, "clock-board")) {
962 res = &central_op->resource[3];
963 } else {
964 return ino;
965 }
966
967 imap = res->start + 0x00UL;
968 iclr = res->start + 0x10UL;
969
970 /* Set the INO state to idle, and disable. */
971 upa_writel(0, iclr);
972 upa_readl(iclr);
973
974 tmp = upa_readl(imap);
975 tmp &= ~0x80000000;
976 upa_writel(tmp, imap);
977
978 return build_irq(0, iclr, imap);
979}
980
981static void central_irq_trans_init(struct device_node *dp)
982{
983 dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
984 dp->irq_trans->irq_build = central_build_irq;
985
986 dp->irq_trans->data = dp;
987}
988
989struct irq_trans {
990 const char *name;
991 void (*init)(struct device_node *);
992};
993
994#ifdef CONFIG_PCI
995static struct irq_trans pci_irq_trans_table[] = {
996 { "SUNW,sabre", sabre_irq_trans_init },
997 { "pci108e,a000", sabre_irq_trans_init },
998 { "pci108e,a001", sabre_irq_trans_init },
999 { "SUNW,psycho", psycho_irq_trans_init },
1000 { "pci108e,8000", psycho_irq_trans_init },
1001 { "SUNW,schizo", schizo_irq_trans_init },
1002 { "pci108e,8001", schizo_irq_trans_init },
1003 { "SUNW,schizo+", schizo_irq_trans_init },
1004 { "pci108e,8002", schizo_irq_trans_init },
1005 { "SUNW,tomatillo", schizo_irq_trans_init },
1006 { "pci108e,a801", schizo_irq_trans_init },
1007 { "SUNW,sun4v-pci", pci_sun4v_irq_trans_init },
1008};
1009#endif
1010
1011static void irq_trans_init(struct device_node *dp)
1012{
1013 const char *model;
1014 int i;
1015
1016 model = of_get_property(dp, "model", NULL);
1017 if (!model)
1018 model = of_get_property(dp, "compatible", NULL);
1019 if (!model)
1020 return;
1021
1022#ifdef CONFIG_PCI
1023 for (i = 0; i < ARRAY_SIZE(pci_irq_trans_table); i++) {
1024 struct irq_trans *t = &pci_irq_trans_table[i];
1025
1026 if (!strcmp(model, t->name))
1027 return t->init(dp);
1028 }
1029#endif
1030#ifdef CONFIG_SBUS
1031 if (!strcmp(dp->name, "sbus") ||
1032 !strcmp(dp->name, "sbi"))
1033 return sbus_irq_trans_init(dp);
1034#endif
1035 if (!strcmp(dp->name, "central"))
1036 return central_irq_trans_init(dp->child);
1037}
1038
256static int is_root_node(const struct device_node *dp) 1039static int is_root_node(const struct device_node *dp)
257{ 1040{
258 if (!dp) 1041 if (!dp)
@@ -676,10 +1459,10 @@ static struct device_node * __init create_node(phandle node)
676 dp->type = get_one_property(node, "device_type"); 1459 dp->type = get_one_property(node, "device_type");
677 dp->node = node; 1460 dp->node = node;
678 1461
679 /* Build interrupts later... */
680
681 dp->properties = build_prop_list(node); 1462 dp->properties = build_prop_list(node);
682 1463
1464 irq_trans_init(dp);
1465
683 return dp; 1466 return dp;
684} 1467}
685 1468
diff --git a/arch/sparc64/kernel/sbus.c b/arch/sparc64/kernel/sbus.c
index ac05e0f692ef..ef68aa4fec65 100644
--- a/arch/sparc64/kernel/sbus.c
+++ b/arch/sparc64/kernel/sbus.c
@@ -1221,9 +1221,7 @@ static void __init sbus_iommu_init(int __node, struct sbus_bus *sbus)
1221 1221
1222 /* Now some Xfire specific grot... */ 1222 /* Now some Xfire specific grot... */
1223 if (this_is_starfire) 1223 if (this_is_starfire)
1224 sbus->starfire_cookie = starfire_hookup(sbus->portid); 1224 starfire_hookup(sbus->portid);
1225 else
1226 sbus->starfire_cookie = NULL;
1227 1225
1228 sysio_register_error_handlers(sbus); 1226 sysio_register_error_handlers(sbus);
1229} 1227}
@@ -1269,8 +1267,6 @@ int __init sbus_arch_preinit(void)
1269void __init sbus_arch_postinit(void) 1267void __init sbus_arch_postinit(void)
1270{ 1268{
1271 extern void firetruck_init(void); 1269 extern void firetruck_init(void);
1272 extern void clock_probe(void);
1273 1270
1274 firetruck_init(); 1271 firetruck_init();
1275 clock_probe();
1276} 1272}
diff --git a/arch/sparc64/kernel/starfire.c b/arch/sparc64/kernel/starfire.c
index ae859d40771e..b930fee7708a 100644
--- a/arch/sparc64/kernel/starfire.c
+++ b/arch/sparc64/kernel/starfire.c
@@ -54,7 +54,7 @@ struct starfire_irqinfo {
54static struct starfire_irqinfo *sflist = NULL; 54static struct starfire_irqinfo *sflist = NULL;
55 55
56/* Beam me up Scott(McNeil)y... */ 56/* Beam me up Scott(McNeil)y... */
57void *starfire_hookup(int upaid) 57void starfire_hookup(int upaid)
58{ 58{
59 struct starfire_irqinfo *p; 59 struct starfire_irqinfo *p;
60 unsigned long treg_base, hwmid, i; 60 unsigned long treg_base, hwmid, i;
@@ -81,8 +81,6 @@ void *starfire_hookup(int upaid)
81 p->upaid = upaid; 81 p->upaid = upaid;
82 p->next = sflist; 82 p->next = sflist;
83 sflist = p; 83 sflist = p;
84
85 return (void *) p;
86} 84}
87 85
88unsigned int starfire_translate(unsigned long imap, 86unsigned int starfire_translate(unsigned long imap,
diff --git a/arch/sparc64/kernel/time.c b/arch/sparc64/kernel/time.c
index 348b82035561..5f3dd4d800cd 100644
--- a/arch/sparc64/kernel/time.c
+++ b/arch/sparc64/kernel/time.c
@@ -38,11 +38,8 @@
38#include <asm/timer.h> 38#include <asm/timer.h>
39#include <asm/irq.h> 39#include <asm/irq.h>
40#include <asm/io.h> 40#include <asm/io.h>
41#include <asm/sbus.h> 41#include <asm/prom.h>
42#include <asm/fhc.h> 42#include <asm/of_device.h>
43#include <asm/pbm.h>
44#include <asm/ebus.h>
45#include <asm/isa.h>
46#include <asm/starfire.h> 43#include <asm/starfire.h>
47#include <asm/smp.h> 44#include <asm/smp.h>
48#include <asm/sections.h> 45#include <asm/sections.h>
@@ -770,237 +767,106 @@ static int __init clock_model_matches(char *model)
770 return 1; 767 return 1;
771} 768}
772 769
773static void __init __clock_assign_common(void __iomem *addr, char *model) 770static int __devinit clock_probe(struct of_device *op, const struct of_device_id *match)
774{ 771{
775 if (model[5] == '0' && model[6] == '2') { 772 struct device_node *dp = op->node;
776 mstk48t02_regs = addr; 773 char *model = of_get_property(dp, "model", NULL);
777 } else if(model[5] == '0' && model[6] == '8') { 774 unsigned long size, flags;
778 mstk48t08_regs = addr; 775 void __iomem *regs;
779 mstk48t02_regs = mstk48t08_regs + MOSTEK_48T08_48T02;
780 } else {
781 mstk48t59_regs = addr;
782 mstk48t02_regs = mstk48t59_regs + MOSTEK_48T59_48T02;
783 }
784}
785
786static void __init clock_assign_clk_reg(struct linux_prom_registers *clk_reg,
787 char *model)
788{
789 unsigned long addr;
790
791 addr = ((unsigned long) clk_reg[0].phys_addr |
792 (((unsigned long) clk_reg[0].which_io) << 32UL));
793
794 __clock_assign_common((void __iomem *) addr, model);
795}
796
797static int __init clock_probe_central(void)
798{
799 struct linux_prom_registers clk_reg[2], *pr;
800 struct device_node *dp;
801 char *model;
802 776
803 if (!central_bus) 777 if (!model || !clock_model_matches(model))
804 return 0; 778 return -ENODEV;
805
806 /* Get Central FHC's prom node. */
807 dp = central_bus->child->prom_node;
808
809 /* Then get the first child device below it. */
810 dp = dp->child;
811
812 while (dp) {
813 model = of_get_property(dp, "model", NULL);
814 if (!model || !clock_model_matches(model))
815 goto next_sibling;
816
817 pr = of_get_property(dp, "reg", NULL);
818 memcpy(clk_reg, pr, sizeof(clk_reg));
819
820 apply_fhc_ranges(central_bus->child, clk_reg, 1);
821 apply_central_ranges(central_bus, clk_reg, 1);
822
823 clock_assign_clk_reg(clk_reg, model);
824 return 1;
825 779
826 next_sibling: 780 /* On an Enterprise system there can be multiple mostek clocks.
827 dp = dp->sibling; 781 * We should only match the one that is on the central FHC bus.
828 } 782 */
783 if (!strcmp(dp->parent->name, "fhc") &&
784 strcmp(dp->parent->parent->name, "central") != 0)
785 return -ENODEV;
829 786
830 return 0; 787 size = (op->resource[0].end - op->resource[0].start) + 1;
831} 788 regs = of_ioremap(&op->resource[0], 0, size, "clock");
789 if (!regs)
790 return -ENOMEM;
832 791
833#ifdef CONFIG_PCI
834static void __init clock_isa_ebus_assign_regs(struct resource *res, char *model)
835{
836 if (!strcmp(model, "ds1287") || 792 if (!strcmp(model, "ds1287") ||
837 !strcmp(model, "m5819") || 793 !strcmp(model, "m5819") ||
838 !strcmp(model, "m5819p") || 794 !strcmp(model, "m5819p") ||
839 !strcmp(model, "m5823")) { 795 !strcmp(model, "m5823")) {
840 ds1287_regs = res->start; 796 ds1287_regs = (unsigned long) regs;
797 } else if (model[5] == '0' && model[6] == '2') {
798 mstk48t02_regs = regs;
799 } else if(model[5] == '0' && model[6] == '8') {
800 mstk48t08_regs = regs;
801 mstk48t02_regs = mstk48t08_regs + MOSTEK_48T08_48T02;
841 } else { 802 } else {
842 mstk48t59_regs = (void __iomem *) res->start; 803 mstk48t59_regs = regs;
843 mstk48t02_regs = mstk48t59_regs + MOSTEK_48T59_48T02; 804 mstk48t02_regs = mstk48t59_regs + MOSTEK_48T59_48T02;
844 } 805 }
845}
846
847static int __init clock_probe_one_ebus_dev(struct linux_ebus_device *edev)
848{
849 struct device_node *dp = edev->prom_node;
850 char *model;
851
852 model = of_get_property(dp, "model", NULL);
853 if (!clock_model_matches(model))
854 return 0;
855 806
856 clock_isa_ebus_assign_regs(&edev->resource[0], model); 807 printk(KERN_INFO "%s: Clock regs at %p\n", dp->full_name, regs);
857 808
858 return 1; 809 local_irq_save(flags);
859}
860
861static int __init clock_probe_ebus(void)
862{
863 struct linux_ebus *ebus;
864 810
865 for_each_ebus(ebus) { 811 if (mstk48t02_regs != NULL) {
866 struct linux_ebus_device *edev; 812 /* Report a low battery voltage condition. */
813 if (has_low_battery())
814 prom_printf("NVRAM: Low battery voltage!\n");
867 815
868 for_each_ebusdev(edev, ebus) { 816 /* Kick start the clock if it is completely stopped. */
869 if (clock_probe_one_ebus_dev(edev)) 817 if (mostek_read(mstk48t02_regs + MOSTEK_SEC) & MSTK_STOP)
870 return 1; 818 kick_start_clock();
871 }
872 } 819 }
873 820
874 return 0; 821 set_system_time();
875} 822
876 823 local_irq_restore(flags);
877static int __init clock_probe_one_isa_dev(struct sparc_isa_device *idev)
878{
879 struct device_node *dp = idev->prom_node;
880 char *model;
881
882 model = of_get_property(dp, "model", NULL);
883 if (!clock_model_matches(model))
884 return 0;
885
886 clock_isa_ebus_assign_regs(&idev->resource, model);
887
888 return 1;
889}
890
891static int __init clock_probe_isa(void)
892{
893 struct sparc_isa_bridge *isa_br;
894
895 for_each_isa(isa_br) {
896 struct sparc_isa_device *isa_dev;
897
898 for_each_isadev(isa_dev, isa_br) {
899 if (clock_probe_one_isa_dev(isa_dev))
900 return 1;
901 }
902 }
903 824
904 return 0; 825 return 0;
905} 826}
906#endif /* CONFIG_PCI */
907
908#ifdef CONFIG_SBUS
909static int __init clock_probe_one_sbus_dev(struct sbus_bus *sbus, struct sbus_dev *sdev)
910{
911 struct resource *res;
912 char model[64];
913 void __iomem *addr;
914
915 prom_getstring(sdev->prom_node, "model", model, sizeof(model));
916 if (!clock_model_matches(model))
917 return 0;
918
919 res = &sdev->resource[0];
920 addr = sbus_ioremap(res, 0, 0x800UL, "eeprom");
921 827
922 __clock_assign_common(addr, model); 828static struct of_device_id clock_match[] = {
923 829 {
924 return 1; 830 .name = "eeprom",
925} 831 },
926 832 {
927static int __init clock_probe_sbus(void) 833 .name = "rtc",
928{ 834 },
929 struct sbus_bus *sbus; 835 {},
930 836};
931 for_each_sbus(sbus) {
932 struct sbus_dev *sdev;
933
934 for_each_sbusdev(sdev, sbus) {
935 if (clock_probe_one_sbus_dev(sbus, sdev))
936 return 1;
937 }
938 }
939 837
940 return 0; 838static struct of_platform_driver clock_driver = {
941} 839 .name = "clock",
942#endif 840 .match_table = clock_match,
841 .probe = clock_probe,
842};
943 843
944void __init clock_probe(void) 844static int __init clock_init(void)
945{ 845{
946 static int invoked;
947 unsigned long flags;
948
949 if (invoked)
950 return;
951 invoked = 1;
952
953 if (this_is_starfire) { 846 if (this_is_starfire) {
954 xtime.tv_sec = starfire_get_time(); 847 xtime.tv_sec = starfire_get_time();
955 xtime.tv_nsec = (INITIAL_JIFFIES % HZ) * (NSEC_PER_SEC / HZ); 848 xtime.tv_nsec = (INITIAL_JIFFIES % HZ) * (NSEC_PER_SEC / HZ);
956 set_normalized_timespec(&wall_to_monotonic, 849 set_normalized_timespec(&wall_to_monotonic,
957 -xtime.tv_sec, -xtime.tv_nsec); 850 -xtime.tv_sec, -xtime.tv_nsec);
958 return; 851 return 0;
959 } 852 }
960 if (tlb_type == hypervisor) { 853 if (tlb_type == hypervisor) {
961 xtime.tv_sec = hypervisor_get_time(); 854 xtime.tv_sec = hypervisor_get_time();
962 xtime.tv_nsec = (INITIAL_JIFFIES % HZ) * (NSEC_PER_SEC / HZ); 855 xtime.tv_nsec = (INITIAL_JIFFIES % HZ) * (NSEC_PER_SEC / HZ);
963 set_normalized_timespec(&wall_to_monotonic, 856 set_normalized_timespec(&wall_to_monotonic,
964 -xtime.tv_sec, -xtime.tv_nsec); 857 -xtime.tv_sec, -xtime.tv_nsec);
965 return; 858 return 0;
966 }
967
968 /* Check FHC Central then EBUSs then ISA bridges then SBUSs.
969 * That way we handle the presence of multiple properly.
970 *
971 * As a special case, machines with Central must provide the
972 * timer chip there.
973 */
974 if (!clock_probe_central() &&
975#ifdef CONFIG_PCI
976 !clock_probe_ebus() &&
977 !clock_probe_isa() &&
978#endif
979#ifdef CONFIG_SBUS
980 !clock_probe_sbus()
981#endif
982 ) {
983 printk(KERN_WARNING "No clock chip found.\n");
984 return;
985 }
986
987 local_irq_save(flags);
988
989 if (mstk48t02_regs != NULL) {
990 /* Report a low battery voltage condition. */
991 if (has_low_battery())
992 prom_printf("NVRAM: Low battery voltage!\n");
993
994 /* Kick start the clock if it is completely stopped. */
995 if (mostek_read(mstk48t02_regs + MOSTEK_SEC) & MSTK_STOP)
996 kick_start_clock();
997 } 859 }
998 860
999 set_system_time(); 861 return of_register_driver(&clock_driver, &of_bus_type);
1000
1001 local_irq_restore(flags);
1002} 862}
1003 863
864/* Must be after subsys_initcall() so that busses are probed. Must
865 * be before device_initcall() because things like the RTC driver
866 * need to see the clock registers.
867 */
868fs_initcall(clock_init);
869
1004/* This is gets the master TICK_INT timer going. */ 870/* This is gets the master TICK_INT timer going. */
1005static unsigned long sparc64_init_timers(void) 871static unsigned long sparc64_init_timers(void)
1006{ 872{
diff --git a/arch/sparc64/kernel/unaligned.c b/arch/sparc64/kernel/unaligned.c
index bb2d68577855..a9b765271b85 100644
--- a/arch/sparc64/kernel/unaligned.c
+++ b/arch/sparc64/kernel/unaligned.c
@@ -20,6 +20,7 @@
20#include <linux/smp.h> 20#include <linux/smp.h>
21#include <linux/smp_lock.h> 21#include <linux/smp_lock.h>
22#include <linux/bitops.h> 22#include <linux/bitops.h>
23#include <linux/kallsyms.h>
23#include <asm/fpumacro.h> 24#include <asm/fpumacro.h>
24 25
25/* #define DEBUG_MNA */ 26/* #define DEBUG_MNA */
@@ -291,7 +292,8 @@ asmlinkage void kernel_unaligned_trap(struct pt_regs *regs, unsigned int insn)
291 if (count < 5) { 292 if (count < 5) {
292 last_time = jiffies; 293 last_time = jiffies;
293 count++; 294 count++;
294 printk("Kernel unaligned access at TPC[%lx]\n", regs->tpc); 295 printk("Kernel unaligned access at TPC[%lx] ", regs->tpc);
296 print_symbol("%s\n", regs->tpc);
295 } 297 }
296 298
297 if (!ok_for_kernel(insn) || dir == both) { 299 if (!ok_for_kernel(insn) || dir == both) {
diff --git a/drivers/input/serio/i8042-sparcio.h b/drivers/input/serio/i8042-sparcio.h
index 6d66351805a2..9cad197a4e68 100644
--- a/drivers/input/serio/i8042-sparcio.h
+++ b/drivers/input/serio/i8042-sparcio.h
@@ -3,11 +3,9 @@
3 3
4#include <linux/config.h> 4#include <linux/config.h>
5#include <asm/io.h> 5#include <asm/io.h>
6
7#ifdef CONFIG_PCI
8#include <asm/oplib.h> 6#include <asm/oplib.h>
9#include <asm/ebus.h> 7#include <asm/prom.h>
10#endif 8#include <asm/of_device.h>
11 9
12static int i8042_kbd_irq = -1; 10static int i8042_kbd_irq = -1;
13static int i8042_aux_irq = -1; 11static int i8042_aux_irq = -1;
@@ -48,54 +46,83 @@ static inline void i8042_write_command(int val)
48#define OBP_PS2MS_NAME1 "kdmouse" 46#define OBP_PS2MS_NAME1 "kdmouse"
49#define OBP_PS2MS_NAME2 "mouse" 47#define OBP_PS2MS_NAME2 "mouse"
50 48
49static int __devinit sparc_i8042_probe(struct of_device *op, const struct of_device_id *match)
50{
51 struct device_node *dp = op->node;
52
53 dp = dp->child;
54 while (dp) {
55 if (!strcmp(dp->name, OBP_PS2KBD_NAME1) ||
56 !strcmp(dp->name, OBP_PS2KBD_NAME2)) {
57 struct of_device *kbd = of_find_device_by_node(dp);
58 unsigned int irq = kbd->irqs[0];
59 if (irq == 0xffffffff)
60 irq = op->irqs[0];
61 i8042_kbd_irq = irq;
62 kbd_iobase = of_ioremap(&kbd->resource[0],
63 0, 8, "kbd");
64 } else if (!strcmp(dp->name, OBP_PS2MS_NAME1) ||
65 !strcmp(dp->name, OBP_PS2MS_NAME2)) {
66 struct of_device *ms = of_find_device_by_node(dp);
67 unsigned int irq = ms->irqs[0];
68 if (irq == 0xffffffff)
69 irq = op->irqs[0];
70 i8042_aux_irq = irq;
71 }
72
73 dp = dp->sibling;
74 }
75
76 return 0;
77}
78
79static int __devexit sparc_i8042_remove(struct of_device *op)
80{
81 of_iounmap(kbd_iobase, 8);
82
83 return 0;
84}
85
86static struct of_device_id sparc_i8042_match[] = {
87 {
88 .name = "8042",
89 },
90 {},
91};
92MODULE_DEVICE_TABLE(of, i8042_match);
93
94static struct of_platform_driver sparc_i8042_driver = {
95 .name = "i8042",
96 .match_table = sparc_i8042_match,
97 .probe = sparc_i8042_probe,
98 .remove = __devexit_p(sparc_i8042_remove),
99};
100
51static int __init i8042_platform_init(void) 101static int __init i8042_platform_init(void)
52{ 102{
53#ifndef CONFIG_PCI 103#ifndef CONFIG_PCI
54 return -ENODEV; 104 return -ENODEV;
55#else 105#else
56 char prop[128]; 106 struct device_node *root = of_find_node_by_path("/");
57 int len;
58 107
59 len = prom_getproperty(prom_root_node, "name", prop, sizeof(prop)); 108 if (!strcmp(root->name, "SUNW,JavaStation-1")) {
60 if (len < 0) {
61 printk("i8042: Cannot get name property of root OBP node.\n");
62 return -ENODEV;
63 }
64 if (strncmp(prop, "SUNW,JavaStation-1", len) == 0) {
65 /* Hardcoded values for MrCoffee. */ 109 /* Hardcoded values for MrCoffee. */
66 i8042_kbd_irq = i8042_aux_irq = 13 | 0x20; 110 i8042_kbd_irq = i8042_aux_irq = 13 | 0x20;
67 kbd_iobase = ioremap(0x71300060, 8); 111 kbd_iobase = ioremap(0x71300060, 8);
68 if (!kbd_iobase) 112 if (!kbd_iobase)
69 return -ENODEV; 113 return -ENODEV;
70 } else { 114 } else {
71 struct linux_ebus *ebus; 115 int err = of_register_driver(&sparc_i8042_driver,
72 struct linux_ebus_device *edev; 116 &of_bus_type);
73 struct linux_ebus_child *child; 117 if (err)
74 118 return err;
75 for_each_ebus(ebus) { 119
76 for_each_ebusdev(edev, ebus) {
77 if (!strcmp(edev->prom_node->name, "8042"))
78 goto edev_found;
79 }
80 }
81 return -ENODEV;
82
83 edev_found:
84 for_each_edevchild(edev, child) {
85 if (!strcmp(child->prom_node->name, OBP_PS2KBD_NAME1) ||
86 !strcmp(child->prom_node->name, OBP_PS2KBD_NAME2)) {
87 i8042_kbd_irq = child->irqs[0];
88 kbd_iobase =
89 ioremap(child->resource[0].start, 8);
90 }
91 if (!strcmp(child->prom_node->name, OBP_PS2MS_NAME1) ||
92 !strcmp(child->prom_node->name, OBP_PS2MS_NAME2))
93 i8042_aux_irq = child->irqs[0];
94 }
95 if (i8042_kbd_irq == -1 || 120 if (i8042_kbd_irq == -1 ||
96 i8042_aux_irq == -1) { 121 i8042_aux_irq == -1) {
97 printk("i8042: Error, 8042 device lacks both kbd and " 122 if (kbd_iobase) {
98 "mouse nodes.\n"); 123 of_iounmap(kbd_iobase, 8);
124 kbd_iobase = (void __iomem *) NULL;
125 }
99 return -ENODEV; 126 return -ENODEV;
100 } 127 }
101 } 128 }
@@ -109,7 +136,10 @@ static int __init i8042_platform_init(void)
109static inline void i8042_platform_exit(void) 136static inline void i8042_platform_exit(void)
110{ 137{
111#ifdef CONFIG_PCI 138#ifdef CONFIG_PCI
112 iounmap(kbd_iobase); 139 struct device_node *root = of_find_node_by_path("/");
140
141 if (strcmp(root->name, "SUNW,JavaStation-1"))
142 of_unregister_driver(&sparc_i8042_driver);
113#endif 143#endif
114} 144}
115 145
diff --git a/drivers/net/sunhme.c b/drivers/net/sunhme.c
index c33ead3470db..9b246e44f756 100644
--- a/drivers/net/sunhme.c
+++ b/drivers/net/sunhme.c
@@ -2523,7 +2523,7 @@ static struct ethtool_ops hme_ethtool_ops = {
2523static int hme_version_printed; 2523static int hme_version_printed;
2524 2524
2525#ifdef CONFIG_SBUS 2525#ifdef CONFIG_SBUS
2526void __init quattro_get_ranges(struct quattro *qp) 2526void __devinit quattro_get_ranges(struct quattro *qp)
2527{ 2527{
2528 struct sbus_dev *sdev = qp->quattro_dev; 2528 struct sbus_dev *sdev = qp->quattro_dev;
2529 int err; 2529 int err;
@@ -2539,7 +2539,7 @@ void __init quattro_get_ranges(struct quattro *qp)
2539 qp->nranges = (err / sizeof(struct linux_prom_ranges)); 2539 qp->nranges = (err / sizeof(struct linux_prom_ranges));
2540} 2540}
2541 2541
2542static void __init quattro_apply_ranges(struct quattro *qp, struct happy_meal *hp) 2542static void __devinit quattro_apply_ranges(struct quattro *qp, struct happy_meal *hp)
2543{ 2543{
2544 struct sbus_dev *sdev = hp->happy_dev; 2544 struct sbus_dev *sdev = hp->happy_dev;
2545 int rng; 2545 int rng;
@@ -2566,7 +2566,7 @@ static void __init quattro_apply_ranges(struct quattro *qp, struct happy_meal *h
2566 * 2566 *
2567 * Return NULL on failure. 2567 * Return NULL on failure.
2568 */ 2568 */
2569static struct quattro * __init quattro_sbus_find(struct sbus_dev *goal_sdev) 2569static struct quattro * __devinit quattro_sbus_find(struct sbus_dev *goal_sdev)
2570{ 2570{
2571 struct sbus_dev *sdev; 2571 struct sbus_dev *sdev;
2572 struct quattro *qp; 2572 struct quattro *qp;
@@ -2618,7 +2618,7 @@ static void __init quattro_sbus_register_irqs(void)
2618 } 2618 }
2619} 2619}
2620 2620
2621static void __devexit quattro_sbus_free_irqs(void) 2621static void quattro_sbus_free_irqs(void)
2622{ 2622{
2623 struct quattro *qp; 2623 struct quattro *qp;
2624 2624
@@ -2662,7 +2662,7 @@ static struct quattro * __init quattro_pci_find(struct pci_dev *pdev)
2662#endif /* CONFIG_PCI */ 2662#endif /* CONFIG_PCI */
2663 2663
2664#ifdef CONFIG_SBUS 2664#ifdef CONFIG_SBUS
2665static int __init happy_meal_sbus_probe_one(struct sbus_dev *sdev, int is_qfe) 2665static int __devinit happy_meal_sbus_probe_one(struct sbus_dev *sdev, int is_qfe)
2666{ 2666{
2667 struct device_node *dp = sdev->ofdev.node; 2667 struct device_node *dp = sdev->ofdev.node;
2668 struct quattro *qp = NULL; 2668 struct quattro *qp = NULL;
diff --git a/drivers/serial/sunsab.c b/drivers/serial/sunsab.c
index 7da02d11c364..141fedbefbc4 100644
--- a/drivers/serial/sunsab.c
+++ b/drivers/serial/sunsab.c
@@ -1,7 +1,7 @@
1/* sunsab.c: ASYNC Driver for the SIEMENS SAB82532 DUSCC. 1/* sunsab.c: ASYNC Driver for the SIEMENS SAB82532 DUSCC.
2 * 2 *
3 * Copyright (C) 1997 Eddie C. Dost (ecd@skynet.be) 3 * Copyright (C) 1997 Eddie C. Dost (ecd@skynet.be)
4 * Copyright (C) 2002 David S. Miller (davem@redhat.com) 4 * Copyright (C) 2002, 2006 David S. Miller (davem@davemloft.net)
5 * 5 *
6 * Rewrote buffer handling to use CIRC(Circular Buffer) macros. 6 * Rewrote buffer handling to use CIRC(Circular Buffer) macros.
7 * Maxim Krasnyanskiy <maxk@qualcomm.com> 7 * Maxim Krasnyanskiy <maxk@qualcomm.com>
@@ -12,7 +12,7 @@
12 * Theodore Ts'o <tytso@mit.edu>, 2001-Oct-12 12 * Theodore Ts'o <tytso@mit.edu>, 2001-Oct-12
13 * 13 *
14 * Ported to new 2.5.x UART layer. 14 * Ported to new 2.5.x UART layer.
15 * David S. Miller <davem@redhat.com> 15 * David S. Miller <davem@davemloft.net>
16 */ 16 */
17 17
18#include <linux/config.h> 18#include <linux/config.h>
@@ -37,8 +37,8 @@
37 37
38#include <asm/io.h> 38#include <asm/io.h>
39#include <asm/irq.h> 39#include <asm/irq.h>
40#include <asm/oplib.h> 40#include <asm/prom.h>
41#include <asm/ebus.h> 41#include <asm/of_device.h>
42 42
43#if defined(CONFIG_SERIAL_SUNZILOG_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) 43#if defined(CONFIG_SERIAL_SUNZILOG_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
44#define SUPPORT_SYSRQ 44#define SUPPORT_SYSRQ
@@ -976,199 +976,188 @@ static inline struct console *SUNSAB_CONSOLE(void)
976#define sunsab_console_init() do { } while (0) 976#define sunsab_console_init() do { } while (0)
977#endif 977#endif
978 978
979static void __init for_each_sab_edev(void (*callback)(struct linux_ebus_device *, void *), void *arg) 979static int __devinit sunsab_init_one(struct uart_sunsab_port *up,
980 struct of_device *op,
981 unsigned long offset,
982 int line)
980{ 983{
981 struct linux_ebus *ebus; 984 up->port.line = line;
982 struct linux_ebus_device *edev = NULL; 985 up->port.dev = &op->dev;
983 986
984 for_each_ebus(ebus) { 987 up->port.mapbase = op->resource[0].start + offset;
985 for_each_ebusdev(edev, ebus) { 988 up->port.membase = of_ioremap(&op->resource[0], offset,
986 if (!strcmp(edev->prom_node->name, "se")) { 989 sizeof(union sab82532_async_regs),
987 callback(edev, arg); 990 "sab");
988 continue; 991 if (!up->port.membase)
989 } else if (!strcmp(edev->prom_node->name, "serial")) { 992 return -ENOMEM;
990 char *compat; 993 up->regs = (union sab82532_async_regs __iomem *) up->port.membase;
991 int clen;
992
993 /* On RIO this can be an SE, check it. We could
994 * just check ebus->is_rio, but this is more portable.
995 */
996 compat = of_get_property(edev->prom_node,
997 "compatible", &clen);
998 if (compat && clen > 0) {
999 if (strncmp(compat, "sab82532", 8) == 0) {
1000 callback(edev, arg);
1001 continue;
1002 }
1003 }
1004 }
1005 }
1006 }
1007}
1008 994
1009static void __init sab_count_callback(struct linux_ebus_device *edev, void *arg) 995 up->port.irq = op->irqs[0];
1010{
1011 int *count_p = arg;
1012 996
1013 (*count_p)++; 997 up->port.fifosize = SAB82532_XMIT_FIFO_SIZE;
1014} 998 up->port.iotype = UPIO_MEM;
1015 999
1016static void __init sab_attach_callback(struct linux_ebus_device *edev, void *arg) 1000 writeb(SAB82532_IPC_IC_ACT_LOW, &up->regs->w.ipc);
1017{
1018 int *instance_p = arg;
1019 struct uart_sunsab_port *up;
1020 unsigned long regs, offset;
1021 int i;
1022 1001
1023 /* Note: ports are located in reverse order */ 1002 up->port.ops = &sunsab_pops;
1024 regs = edev->resource[0].start; 1003 up->port.type = PORT_SUNSAB;
1025 offset = sizeof(union sab82532_async_regs); 1004 up->port.uartclk = SAB_BASE_BAUD;
1026 for (i = 0; i < 2; i++) {
1027 up = &sunsab_ports[(*instance_p * 2) + 1 - i];
1028 1005
1029 memset(up, 0, sizeof(*up)); 1006 up->type = readb(&up->regs->r.vstr) & 0x0f;
1030 up->regs = ioremap(regs + offset, sizeof(union sab82532_async_regs)); 1007 writeb(~((1 << 1) | (1 << 2) | (1 << 4)), &up->regs->w.pcr);
1031 up->port.irq = edev->irqs[0]; 1008 writeb(0xff, &up->regs->w.pim);
1032 up->port.fifosize = SAB82532_XMIT_FIFO_SIZE; 1009 if ((up->port.line & 0x1) == 0) {
1033 up->port.mapbase = (unsigned long)up->regs; 1010 up->pvr_dsr_bit = (1 << 0);
1034 up->port.iotype = UPIO_MEM; 1011 up->pvr_dtr_bit = (1 << 1);
1012 } else {
1013 up->pvr_dsr_bit = (1 << 3);
1014 up->pvr_dtr_bit = (1 << 2);
1015 }
1016 up->cached_pvr = (1 << 1) | (1 << 2) | (1 << 4);
1017 writeb(up->cached_pvr, &up->regs->w.pvr);
1018 up->cached_mode = readb(&up->regs->rw.mode);
1019 up->cached_mode |= SAB82532_MODE_FRTS;
1020 writeb(up->cached_mode, &up->regs->rw.mode);
1021 up->cached_mode |= SAB82532_MODE_RTS;
1022 writeb(up->cached_mode, &up->regs->rw.mode);
1035 1023
1036 writeb(SAB82532_IPC_IC_ACT_LOW, &up->regs->w.ipc); 1024 up->tec_timeout = SAB82532_MAX_TEC_TIMEOUT;
1025 up->cec_timeout = SAB82532_MAX_CEC_TIMEOUT;
1037 1026
1038 offset -= sizeof(union sab82532_async_regs); 1027 if (!(up->port.line & 0x01)) {
1028 int err;
1029
1030 err = request_irq(up->port.irq, sunsab_interrupt,
1031 SA_SHIRQ, "sab", up);
1032 if (err) {
1033 of_iounmap(up->port.membase,
1034 sizeof(union sab82532_async_regs));
1035 return err;
1036 }
1039 } 1037 }
1040 1038
1041 (*instance_p)++; 1039 return 0;
1042} 1040}
1043 1041
1044static int __init probe_for_sabs(void) 1042static int __devinit sab_probe(struct of_device *op, const struct of_device_id *match)
1045{ 1043{
1046 int this_sab = 0; 1044 static int inst;
1045 struct uart_sunsab_port *up;
1046 int err;
1047
1048 up = &sunsab_ports[inst * 2];
1049
1050 err = sunsab_init_one(&up[0], op,
1051 sizeof(union sab82532_async_regs),
1052 (inst * 2) + 0);
1053 if (err)
1054 return err;
1055
1056 err = sunsab_init_one(&up[0], op, 0,
1057 (inst * 2) + 1);
1058 if (err) {
1059 of_iounmap(up[0].port.membase,
1060 sizeof(union sab82532_async_regs));
1061 free_irq(up[0].port.irq, &up[0]);
1062 return err;
1063 }
1047 1064
1048 /* Find device instances. */ 1065 uart_add_one_port(&sunsab_reg, &up[0].port);
1049 for_each_sab_edev(&sab_count_callback, &this_sab); 1066 uart_add_one_port(&sunsab_reg, &up[1].port);
1050 if (!this_sab)
1051 return -ENODEV;
1052 1067
1053 /* Allocate tables. */ 1068 dev_set_drvdata(&op->dev, &up[0]);
1054 sunsab_ports = kmalloc(sizeof(struct uart_sunsab_port) * this_sab * 2,
1055 GFP_KERNEL);
1056 if (!sunsab_ports)
1057 return -ENOMEM;
1058 1069
1059 num_channels = this_sab * 2; 1070 inst++;
1060 1071
1061 this_sab = 0;
1062 for_each_sab_edev(&sab_attach_callback, &this_sab);
1063 return 0; 1072 return 0;
1064} 1073}
1065 1074
1066static void __init sunsab_init_hw(void) 1075static void __devexit sab_remove_one(struct uart_sunsab_port *up)
1067{ 1076{
1068 int i; 1077 uart_remove_one_port(&sunsab_reg, &up->port);
1069 1078 if (!(up->port.line & 1))
1070 for (i = 0; i < num_channels; i++) { 1079 free_irq(up->port.irq, up);
1071 struct uart_sunsab_port *up = &sunsab_ports[i]; 1080 of_iounmap(up->port.membase,
1072 1081 sizeof(union sab82532_async_regs));
1073 up->port.line = i;
1074 up->port.ops = &sunsab_pops;
1075 up->port.type = PORT_SUNSAB;
1076 up->port.uartclk = SAB_BASE_BAUD;
1077
1078 up->type = readb(&up->regs->r.vstr) & 0x0f;
1079 writeb(~((1 << 1) | (1 << 2) | (1 << 4)), &up->regs->w.pcr);
1080 writeb(0xff, &up->regs->w.pim);
1081 if (up->port.line == 0) {
1082 up->pvr_dsr_bit = (1 << 0);
1083 up->pvr_dtr_bit = (1 << 1);
1084 } else {
1085 up->pvr_dsr_bit = (1 << 3);
1086 up->pvr_dtr_bit = (1 << 2);
1087 }
1088 up->cached_pvr = (1 << 1) | (1 << 2) | (1 << 4);
1089 writeb(up->cached_pvr, &up->regs->w.pvr);
1090 up->cached_mode = readb(&up->regs->rw.mode);
1091 up->cached_mode |= SAB82532_MODE_FRTS;
1092 writeb(up->cached_mode, &up->regs->rw.mode);
1093 up->cached_mode |= SAB82532_MODE_RTS;
1094 writeb(up->cached_mode, &up->regs->rw.mode);
1095
1096 up->tec_timeout = SAB82532_MAX_TEC_TIMEOUT;
1097 up->cec_timeout = SAB82532_MAX_CEC_TIMEOUT;
1098
1099 if (!(up->port.line & 0x01)) {
1100 if (request_irq(up->port.irq, sunsab_interrupt,
1101 SA_SHIRQ, "serial(sab82532)", up)) {
1102 printk("sunsab%d: can't get IRQ %x\n",
1103 i, up->port.irq);
1104 continue;
1105 }
1106 }
1107 }
1108} 1082}
1109 1083
1110static int __init sunsab_init(void) 1084static int __devexit sab_remove(struct of_device *op)
1111{ 1085{
1112 int ret = probe_for_sabs(); 1086 struct uart_sunsab_port *up = dev_get_drvdata(&op->dev);
1113 int i;
1114
1115 if (ret < 0)
1116 return ret;
1117 1087
1118 sunsab_init_hw(); 1088 sab_remove_one(&up[0]);
1089 sab_remove_one(&up[1]);
1119 1090
1120 sunsab_reg.minor = sunserial_current_minor; 1091 dev_set_drvdata(&op->dev, NULL);
1121 sunsab_reg.nr = num_channels;
1122 1092
1123 ret = uart_register_driver(&sunsab_reg); 1093 return 0;
1124 if (ret < 0) { 1094}
1125 int i;
1126 1095
1127 for (i = 0; i < num_channels; i++) { 1096static struct of_device_id sab_match[] = {
1128 struct uart_sunsab_port *up = &sunsab_ports[i]; 1097 {
1098 .name = "se",
1099 },
1100 {
1101 .name = "serial",
1102 .compatible = "sab82532",
1103 },
1104 {},
1105};
1106MODULE_DEVICE_TABLE(of, sab_match);
1129 1107
1130 if (!(up->port.line & 0x01)) 1108static struct of_platform_driver sab_driver = {
1131 free_irq(up->port.irq, up); 1109 .name = "sab",
1132 iounmap(up->regs); 1110 .match_table = sab_match,
1133 } 1111 .probe = sab_probe,
1134 kfree(sunsab_ports); 1112 .remove = __devexit_p(sab_remove),
1135 sunsab_ports = NULL; 1113};
1136 1114
1137 return ret; 1115static int __init sunsab_init(void)
1116{
1117 struct device_node *dp;
1118 int err;
1119
1120 num_channels = 0;
1121 for_each_node_by_name(dp, "su")
1122 num_channels += 2;
1123 for_each_node_by_name(dp, "serial") {
1124 if (of_device_is_compatible(dp, "sab82532"))
1125 num_channels += 2;
1138 } 1126 }
1139 1127
1140 sunsab_reg.tty_driver->name_base = sunsab_reg.minor - 64; 1128 if (num_channels) {
1129 sunsab_ports = kzalloc(sizeof(struct uart_sunsab_port) *
1130 num_channels, GFP_KERNEL);
1131 if (!sunsab_ports)
1132 return -ENOMEM;
1141 1133
1142 sunsab_reg.cons = SUNSAB_CONSOLE(); 1134 sunsab_reg.minor = sunserial_current_minor;
1135 sunsab_reg.nr = num_channels;
1143 1136
1144 sunserial_current_minor += num_channels; 1137 err = uart_register_driver(&sunsab_reg);
1145 1138 if (err) {
1146 for (i = 0; i < num_channels; i++) { 1139 kfree(sunsab_ports);
1147 struct uart_sunsab_port *up = &sunsab_ports[i]; 1140 sunsab_ports = NULL;
1148 1141
1149 uart_add_one_port(&sunsab_reg, &up->port); 1142 return err;
1143 }
1144
1145 sunsab_reg.tty_driver->name_base = sunsab_reg.minor - 64;
1146 sunsab_reg.cons = SUNSAB_CONSOLE();
1147 sunserial_current_minor += num_channels;
1150 } 1148 }
1151 1149
1152 return 0; 1150 return of_register_driver(&sab_driver, &of_bus_type);
1153} 1151}
1154 1152
1155static void __exit sunsab_exit(void) 1153static void __exit sunsab_exit(void)
1156{ 1154{
1157 int i; 1155 of_unregister_driver(&sab_driver);
1158 1156 if (num_channels) {
1159 for (i = 0; i < num_channels; i++) { 1157 sunserial_current_minor -= num_channels;
1160 struct uart_sunsab_port *up = &sunsab_ports[i]; 1158 uart_unregister_driver(&sunsab_reg);
1161
1162 uart_remove_one_port(&sunsab_reg, &up->port);
1163
1164 if (!(up->port.line & 0x01))
1165 free_irq(up->port.irq, up);
1166 iounmap(up->regs);
1167 } 1159 }
1168 1160
1169 sunserial_current_minor -= num_channels;
1170 uart_unregister_driver(&sunsab_reg);
1171
1172 kfree(sunsab_ports); 1161 kfree(sunsab_ports);
1173 sunsab_ports = NULL; 1162 sunsab_ports = NULL;
1174} 1163}
diff --git a/drivers/serial/sunsu.c b/drivers/serial/sunsu.c
index 6e28c25138cf..73a043b914ef 100644
--- a/drivers/serial/sunsu.c
+++ b/drivers/serial/sunsu.c
@@ -12,7 +12,7 @@
12 * Theodore Ts'o <tytso@mit.edu>, 2001-Oct-12 12 * Theodore Ts'o <tytso@mit.edu>, 2001-Oct-12
13 * 13 *
14 * Converted to new 2.5.x UART layer. 14 * Converted to new 2.5.x UART layer.
15 * David S. Miller (davem@redhat.com), 2002-Jul-29 15 * David S. Miller (davem@davemloft.net), 2002-Jul-29
16 */ 16 */
17 17
18#include <linux/config.h> 18#include <linux/config.h>
@@ -40,11 +40,8 @@
40 40
41#include <asm/io.h> 41#include <asm/io.h>
42#include <asm/irq.h> 42#include <asm/irq.h>
43#include <asm/oplib.h> 43#include <asm/prom.h>
44#include <asm/ebus.h> 44#include <asm/of_device.h>
45#ifdef CONFIG_SPARC64
46#include <asm/isa.h>
47#endif
48 45
49#if defined(CONFIG_SERIAL_SUNSU_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) 46#if defined(CONFIG_SERIAL_SUNSU_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
50#define SUPPORT_SYSRQ 47#define SUPPORT_SYSRQ
@@ -94,10 +91,10 @@ struct uart_sunsu_port {
94 /* Probing information. */ 91 /* Probing information. */
95 enum su_type su_type; 92 enum su_type su_type;
96 unsigned int type_probed; /* XXX Stupid */ 93 unsigned int type_probed; /* XXX Stupid */
97 int port_node; 94 unsigned long reg_size;
98 95
99#ifdef CONFIG_SERIO 96#ifdef CONFIG_SERIO
100 struct serio *serio; 97 struct serio serio;
101 int serio_open; 98 int serio_open;
102#endif 99#endif
103}; 100};
@@ -509,7 +506,7 @@ static void receive_kbd_ms_chars(struct uart_sunsu_port *up, struct pt_regs *reg
509 /* Stop-A is handled by drivers/char/keyboard.c now. */ 506 /* Stop-A is handled by drivers/char/keyboard.c now. */
510 if (up->su_type == SU_PORT_KBD) { 507 if (up->su_type == SU_PORT_KBD) {
511#ifdef CONFIG_SERIO 508#ifdef CONFIG_SERIO
512 serio_interrupt(up->serio, ch, 0, regs); 509 serio_interrupt(&up->serio, ch, 0, regs);
513#endif 510#endif
514 } else if (up->su_type == SU_PORT_MS) { 511 } else if (up->su_type == SU_PORT_MS) {
515 int ret = suncore_mouse_baud_detection(ch, is_break); 512 int ret = suncore_mouse_baud_detection(ch, is_break);
@@ -523,7 +520,7 @@ static void receive_kbd_ms_chars(struct uart_sunsu_port *up, struct pt_regs *reg
523 520
524 case 0: 521 case 0:
525#ifdef CONFIG_SERIO 522#ifdef CONFIG_SERIO
526 serio_interrupt(up->serio, ch, 0, regs); 523 serio_interrupt(&up->serio, ch, 0, regs);
527#endif 524#endif
528 break; 525 break;
529 }; 526 };
@@ -1031,99 +1028,14 @@ static void sunsu_autoconfig(struct uart_sunsu_port *up)
1031{ 1028{
1032 unsigned char status1, status2, scratch, scratch2, scratch3; 1029 unsigned char status1, status2, scratch, scratch2, scratch3;
1033 unsigned char save_lcr, save_mcr; 1030 unsigned char save_lcr, save_mcr;
1034 struct linux_ebus_device *dev = NULL;
1035 struct linux_ebus *ebus;
1036#ifdef CONFIG_SPARC64
1037 struct sparc_isa_bridge *isa_br;
1038 struct sparc_isa_device *isa_dev;
1039#endif
1040#ifndef CONFIG_SPARC64
1041 struct linux_prom_registers reg0;
1042#endif
1043 unsigned long flags; 1031 unsigned long flags;
1044 1032
1045 if (!up->port_node || !up->su_type) 1033 if (up->su_type == SU_PORT_NONE)
1046 return; 1034 return;
1047 1035
1048 up->type_probed = PORT_UNKNOWN; 1036 up->type_probed = PORT_UNKNOWN;
1049 up->port.iotype = UPIO_MEM; 1037 up->port.iotype = UPIO_MEM;
1050 1038
1051 /*
1052 * First we look for Ebus-bases su's
1053 */
1054 for_each_ebus(ebus) {
1055 for_each_ebusdev(dev, ebus) {
1056 if (dev->prom_node->node == up->port_node) {
1057 /*
1058 * The EBus is broken on sparc; it delivers
1059 * virtual addresses in resources. Oh well...
1060 * This is correct on sparc64, though.
1061 */
1062 up->port.membase = (char *) dev->resource[0].start;
1063 /*
1064 * This is correct on both architectures.
1065 */
1066 up->port.mapbase = dev->resource[0].start;
1067 up->port.irq = dev->irqs[0];
1068 goto ebus_done;
1069 }
1070 }
1071 }
1072
1073#ifdef CONFIG_SPARC64
1074 for_each_isa(isa_br) {
1075 for_each_isadev(isa_dev, isa_br) {
1076 if (isa_dev->prom_node->node == up->port_node) {
1077 /* Same on sparc64. Cool architecure... */
1078 up->port.membase = (char *) isa_dev->resource.start;
1079 up->port.mapbase = isa_dev->resource.start;
1080 up->port.irq = isa_dev->irq;
1081 goto ebus_done;
1082 }
1083 }
1084 }
1085#endif
1086
1087#ifdef CONFIG_SPARC64
1088 /*
1089 * Not on Ebus, bailing.
1090 */
1091 return;
1092#else
1093 /*
1094 * Not on Ebus, must be OBIO.
1095 */
1096 if (prom_getproperty(up->port_node, "reg",
1097 (char *)&reg0, sizeof(reg0)) == -1) {
1098 prom_printf("sunsu: no \"reg\" property\n");
1099 return;
1100 }
1101 prom_apply_obio_ranges(&reg0, 1);
1102 if (reg0.which_io != 0) { /* Just in case... */
1103 prom_printf("sunsu: bus number nonzero: 0x%x:%x\n",
1104 reg0.which_io, reg0.phys_addr);
1105 return;
1106 }
1107 up->port.mapbase = reg0.phys_addr;
1108 if ((up->port.membase = ioremap(reg0.phys_addr, reg0.reg_size)) == 0) {
1109 prom_printf("sunsu: Cannot map registers.\n");
1110 return;
1111 }
1112
1113 /*
1114 * 0x20 is sun4m thing, Dave Redman heritage.
1115 * See arch/sparc/kernel/irq.c.
1116 */
1117#define IRQ_4M(n) ((n)|0x20)
1118
1119 /*
1120 * There is no intr property on MrCoffee, so hardwire it.
1121 */
1122 up->port.irq = IRQ_4M(13);
1123#endif
1124
1125ebus_done:
1126
1127 spin_lock_irqsave(&up->port.lock, flags); 1039 spin_lock_irqsave(&up->port.lock, flags);
1128 1040
1129 if (!(up->port.flags & UPF_BUGGY_UART)) { 1041 if (!(up->port.flags & UPF_BUGGY_UART)) {
@@ -1269,18 +1181,13 @@ static struct uart_driver sunsu_reg = {
1269 .major = TTY_MAJOR, 1181 .major = TTY_MAJOR,
1270}; 1182};
1271 1183
1272static int __init sunsu_kbd_ms_init(struct uart_sunsu_port *up, int channel) 1184static int __init sunsu_kbd_ms_init(struct uart_sunsu_port *up)
1273{ 1185{
1274 int quot, baud; 1186 int quot, baud;
1275#ifdef CONFIG_SERIO 1187#ifdef CONFIG_SERIO
1276 struct serio *serio; 1188 struct serio *serio;
1277#endif 1189#endif
1278 1190
1279 spin_lock_init(&up->port.lock);
1280 up->port.line = channel;
1281 up->port.type = PORT_UNKNOWN;
1282 up->port.uartclk = (SU_BASE_BAUD * 16);
1283
1284 if (up->su_type == SU_PORT_KBD) { 1191 if (up->su_type == SU_PORT_KBD) {
1285 up->cflag = B1200 | CS8 | CLOCAL | CREAD; 1192 up->cflag = B1200 | CS8 | CLOCAL | CREAD;
1286 baud = 1200; 1193 baud = 1200;
@@ -1292,41 +1199,31 @@ static int __init sunsu_kbd_ms_init(struct uart_sunsu_port *up, int channel)
1292 1199
1293 sunsu_autoconfig(up); 1200 sunsu_autoconfig(up);
1294 if (up->port.type == PORT_UNKNOWN) 1201 if (up->port.type == PORT_UNKNOWN)
1295 return -1; 1202 return -ENODEV;
1296
1297 printk(KERN_INFO "su%d at 0x%p (irq = %d) is a %s\n",
1298 channel,
1299 up->port.membase, up->port.irq,
1300 sunsu_type(&up->port));
1301 1203
1302#ifdef CONFIG_SERIO 1204#ifdef CONFIG_SERIO
1303 up->serio = serio = kmalloc(sizeof(struct serio), GFP_KERNEL); 1205 serio = &up->serio;
1304 if (serio) { 1206 serio->port_data = up;
1305 memset(serio, 0, sizeof(*serio));
1306
1307 serio->port_data = up;
1308
1309 serio->id.type = SERIO_RS232;
1310 if (up->su_type == SU_PORT_KBD) {
1311 serio->id.proto = SERIO_SUNKBD;
1312 strlcpy(serio->name, "sukbd", sizeof(serio->name));
1313 } else {
1314 serio->id.proto = SERIO_SUN;
1315 serio->id.extra = 1;
1316 strlcpy(serio->name, "sums", sizeof(serio->name));
1317 }
1318 strlcpy(serio->phys, (channel == 0 ? "su/serio0" : "su/serio1"),
1319 sizeof(serio->phys));
1320
1321 serio->write = sunsu_serio_write;
1322 serio->open = sunsu_serio_open;
1323 serio->close = sunsu_serio_close;
1324 1207
1325 serio_register_port(serio); 1208 serio->id.type = SERIO_RS232;
1209 if (up->su_type == SU_PORT_KBD) {
1210 serio->id.proto = SERIO_SUNKBD;
1211 strlcpy(serio->name, "sukbd", sizeof(serio->name));
1326 } else { 1212 } else {
1327 printk(KERN_WARNING "su%d: not enough memory for serio port\n", 1213 serio->id.proto = SERIO_SUN;
1328 channel); 1214 serio->id.extra = 1;
1215 strlcpy(serio->name, "sums", sizeof(serio->name));
1329 } 1216 }
1217 strlcpy(serio->phys,
1218 (!(up->port.line & 1) ? "su/serio0" : "su/serio1"),
1219 sizeof(serio->phys));
1220
1221 serio->write = sunsu_serio_write;
1222 serio->open = sunsu_serio_open;
1223 serio->close = sunsu_serio_close;
1224 serio->dev.parent = up->port.dev;
1225
1226 serio_register_port(serio);
1330#endif 1227#endif
1331 1228
1332 sunsu_change_speed(&up->port, up->cflag, 0, quot); 1229 sunsu_change_speed(&up->port, up->cflag, 0, quot);
@@ -1458,22 +1355,20 @@ static struct console sunsu_cons = {
1458 * Register console. 1355 * Register console.
1459 */ 1356 */
1460 1357
1461static inline struct console *SUNSU_CONSOLE(void) 1358static inline struct console *SUNSU_CONSOLE(int num_uart)
1462{ 1359{
1463 int i; 1360 int i;
1464 1361
1465 if (con_is_present()) 1362 if (con_is_present())
1466 return NULL; 1363 return NULL;
1467 1364
1468 for (i = 0; i < UART_NR; i++) { 1365 for (i = 0; i < num_uart; i++) {
1469 int this_minor = sunsu_reg.minor + i; 1366 int this_minor = sunsu_reg.minor + i;
1470 1367
1471 if ((this_minor - 64) == (serial_console - 1)) 1368 if ((this_minor - 64) == (serial_console - 1))
1472 break; 1369 break;
1473 } 1370 }
1474 if (i == UART_NR) 1371 if (i == num_uart)
1475 return NULL;
1476 if (sunsu_ports[i].port_node == 0)
1477 return NULL; 1372 return NULL;
1478 1373
1479 sunsu_cons.index = i; 1374 sunsu_cons.index = i;
@@ -1481,252 +1376,184 @@ static inline struct console *SUNSU_CONSOLE(void)
1481 return &sunsu_cons; 1376 return &sunsu_cons;
1482} 1377}
1483#else 1378#else
1484#define SUNSU_CONSOLE() (NULL) 1379#define SUNSU_CONSOLE(num_uart) (NULL)
1485#define sunsu_serial_console_init() do { } while (0) 1380#define sunsu_serial_console_init() do { } while (0)
1486#endif 1381#endif
1487 1382
1488static int __init sunsu_serial_init(void) 1383static enum su_type __devinit su_get_type(struct device_node *dp)
1489{ 1384{
1490 int instance, ret, i; 1385 struct device_node *ap = of_find_node_by_path("/aliases");
1491 1386
1492 /* How many instances do we need? */ 1387 if (ap) {
1493 instance = 0; 1388 char *keyb = of_get_property(ap, "keyboard", NULL);
1494 for (i = 0; i < UART_NR; i++) { 1389 char *ms = of_get_property(ap, "mouse", NULL);
1495 struct uart_sunsu_port *up = &sunsu_ports[i];
1496 1390
1497 if (up->su_type == SU_PORT_MS || 1391 if (keyb) {
1498 up->su_type == SU_PORT_KBD) 1392 if (dp == of_find_node_by_path(keyb))
1499 continue; 1393 return SU_PORT_KBD;
1500 1394 }
1501 spin_lock_init(&up->port.lock); 1395 if (ms) {
1502 up->port.flags |= UPF_BOOT_AUTOCONF; 1396 if (dp == of_find_node_by_path(ms))
1503 up->port.type = PORT_UNKNOWN; 1397 return SU_PORT_MS;
1504 up->port.uartclk = (SU_BASE_BAUD * 16); 1398 }
1399 }
1505 1400
1506 sunsu_autoconfig(up); 1401 return SU_PORT_PORT;
1507 if (up->port.type == PORT_UNKNOWN) 1402}
1508 continue;
1509 1403
1510 up->port.line = instance++; 1404static int __devinit su_probe(struct of_device *op, const struct of_device_id *match)
1511 up->port.ops = &sunsu_pops; 1405{
1512 } 1406 static int inst;
1407 struct device_node *dp = op->node;
1408 struct uart_sunsu_port *up;
1409 struct resource *rp;
1410 int err;
1513 1411
1514 sunsu_reg.minor = sunserial_current_minor; 1412 if (inst >= UART_NR)
1413 return -EINVAL;
1515 1414
1516 sunsu_reg.nr = instance; 1415 up = &sunsu_ports[inst];
1416 up->port.line = inst;
1517 1417
1518 ret = uart_register_driver(&sunsu_reg); 1418 spin_lock_init(&up->port.lock);
1519 if (ret < 0)
1520 return ret;
1521 1419
1522 sunsu_reg.tty_driver->name_base = sunsu_reg.minor - 64; 1420 up->su_type = su_get_type(dp);
1523 1421
1524 sunserial_current_minor += instance; 1422 rp = &op->resource[0];
1423 up->port.mapbase = op->resource[0].start;
1525 1424
1526 sunsu_reg.cons = SUNSU_CONSOLE(); 1425 up->reg_size = (rp->end - rp->start) + 1;
1426 up->port.membase = of_ioremap(rp, 0, up->reg_size, "su");
1427 if (!up->port.membase)
1428 return -ENOMEM;
1527 1429
1528 for (i = 0; i < UART_NR; i++) { 1430 up->port.irq = op->irqs[0];
1529 struct uart_sunsu_port *up = &sunsu_ports[i];
1530 1431
1531 /* Do not register Keyboard/Mouse lines with UART 1432 up->port.dev = &op->dev;
1532 * layer.
1533 */
1534 if (up->su_type == SU_PORT_MS ||
1535 up->su_type == SU_PORT_KBD)
1536 continue;
1537 1433
1538 if (up->port.type == PORT_UNKNOWN) 1434 up->port.type = PORT_UNKNOWN;
1539 continue; 1435 up->port.uartclk = (SU_BASE_BAUD * 16);
1540 1436
1541 uart_add_one_port(&sunsu_reg, &up->port); 1437 err = 0;
1438 if (up->su_type == SU_PORT_KBD || up->su_type == SU_PORT_MS) {
1439 err = sunsu_kbd_ms_init(up);
1440 if (err)
1441 goto out_unmap;
1542 } 1442 }
1543 1443
1544 return 0; 1444 up->port.flags |= UPF_BOOT_AUTOCONF;
1545}
1546 1445
1547static int su_node_ok(int node, char *name, int namelen) 1446 sunsu_autoconfig(up);
1548{
1549 if (strncmp(name, "su", namelen) == 0 ||
1550 strncmp(name, "su_pnp", namelen) == 0)
1551 return 1;
1552
1553 if (strncmp(name, "serial", namelen) == 0) {
1554 char compat[32];
1555 int clen;
1556
1557 /* Is it _really_ a 'su' device? */
1558 clen = prom_getproperty(node, "compatible", compat, sizeof(compat));
1559 if (clen > 0) {
1560 if (strncmp(compat, "sab82532", 8) == 0) {
1561 /* Nope, Siemens serial, not for us. */
1562 return 0;
1563 }
1564 }
1565 return 1;
1566 }
1567 1447
1568 return 0; 1448 err = -ENODEV;
1569} 1449 if (up->port.type == PORT_UNKNOWN)
1450 goto out_unmap;
1570 1451
1571#define SU_PROPSIZE 128 1452 up->port.ops = &sunsu_pops;
1572 1453
1573/* 1454 err = uart_add_one_port(&sunsu_reg, &up->port);
1574 * Scan status structure. 1455 if (err)
1575 * "prop" is a local variable but it eats stack to keep it in each 1456 goto out_unmap;
1576 * stack frame of a recursive procedure.
1577 */
1578struct su_probe_scan {
1579 int msnode, kbnode; /* PROM nodes for mouse and keyboard */
1580 int msx, kbx; /* minors for mouse and keyboard */
1581 int devices; /* scan index */
1582 char prop[SU_PROPSIZE];
1583};
1584 1457
1585/* 1458 dev_set_drvdata(&op->dev, up);
1586 * We have several platforms which present 'su' in different parts
1587 * of the device tree. 'su' may be found under obio, ebus, isa and pci.
1588 * We walk over the tree and find them wherever PROM hides them.
1589 */
1590static void __init su_probe_any(struct su_probe_scan *t, int sunode)
1591{
1592 struct uart_sunsu_port *up;
1593 int len;
1594 1459
1595 if (t->devices >= UART_NR) 1460 inst++;
1596 return;
1597 1461
1598 for (; sunode != 0; sunode = prom_getsibling(sunode)) { 1462 return 0;
1599 len = prom_getproperty(sunode, "name", t->prop, SU_PROPSIZE); 1463
1600 if (len <= 1) 1464out_unmap:
1601 continue; /* Broken PROM node */ 1465 of_iounmap(up->port.membase, up->reg_size);
1602 1466 return err;
1603 if (su_node_ok(sunode, t->prop, len)) {
1604 up = &sunsu_ports[t->devices];
1605 if (t->kbnode != 0 && sunode == t->kbnode) {
1606 t->kbx = t->devices;
1607 up->su_type = SU_PORT_KBD;
1608 } else if (t->msnode != 0 && sunode == t->msnode) {
1609 t->msx = t->devices;
1610 up->su_type = SU_PORT_MS;
1611 } else {
1612#ifdef CONFIG_SPARC64
1613 /*
1614 * Do not attempt to use the truncated
1615 * keyboard/mouse ports as serial ports
1616 * on Ultras with PC keyboard attached.
1617 */
1618 if (prom_getbool(sunode, "mouse"))
1619 continue;
1620 if (prom_getbool(sunode, "keyboard"))
1621 continue;
1622#endif
1623 up->su_type = SU_PORT_PORT;
1624 }
1625 up->port_node = sunode;
1626 ++t->devices;
1627 } else {
1628 su_probe_any(t, prom_getchild(sunode));
1629 }
1630 }
1631} 1467}
1632 1468
1633static int __init sunsu_probe(void) 1469static int __devexit su_remove(struct of_device *dev)
1634{ 1470{
1635 int node; 1471 struct uart_sunsu_port *up = dev_get_drvdata(&dev->dev);;
1636 int len;
1637 struct su_probe_scan scan;
1638 1472
1639 /* 1473 if (up->su_type == SU_PORT_MS ||
1640 * First, we scan the tree. 1474 up->su_type == SU_PORT_KBD) {
1641 */ 1475#ifdef CONFIG_SERIO
1642 scan.devices = 0; 1476 serio_unregister_port(&up->serio);
1643 scan.msx = -1; 1477#endif
1644 scan.kbx = -1; 1478 } else if (up->port.type != PORT_UNKNOWN)
1645 scan.kbnode = 0; 1479 uart_remove_one_port(&sunsu_reg, &up->port);
1646 scan.msnode = 0;
1647 1480
1648 /* 1481 return 0;
1649 * Get the nodes for keyboard and mouse from 'aliases'... 1482}
1650 */
1651 node = prom_getchild(prom_root_node);
1652 node = prom_searchsiblings(node, "aliases");
1653 if (node != 0) {
1654 len = prom_getproperty(node, "keyboard", scan.prop, SU_PROPSIZE);
1655 if (len > 0) {
1656 scan.prop[len] = 0;
1657 scan.kbnode = prom_finddevice(scan.prop);
1658 }
1659 1483
1660 len = prom_getproperty(node, "mouse", scan.prop, SU_PROPSIZE); 1484static struct of_device_id su_match[] = {
1661 if (len > 0) { 1485 {
1662 scan.prop[len] = 0; 1486 .name = "su",
1663 scan.msnode = prom_finddevice(scan.prop); 1487 },
1664 } 1488 {
1665 } 1489 .name = "su_pnp",
1490 },
1491 {
1492 .name = "serial",
1493 .compatible = "su",
1494 },
1495 {},
1496};
1497MODULE_DEVICE_TABLE(of, su_match);
1666 1498
1667 su_probe_any(&scan, prom_getchild(prom_root_node)); 1499static struct of_platform_driver su_driver = {
1500 .name = "su",
1501 .match_table = su_match,
1502 .probe = su_probe,
1503 .remove = __devexit_p(su_remove),
1504};
1668 1505
1669 /* 1506static int num_uart;
1670 * Second, we process the special case of keyboard and mouse.
1671 *
1672 * Currently if we got keyboard and mouse hooked to "su" ports
1673 * we do not use any possible remaining "su" as a serial port.
1674 * Thus, we ignore values of .msx and .kbx, then compact ports.
1675 */
1676 if (scan.msx != -1 && scan.kbx != -1) {
1677 sunsu_ports[0].su_type = SU_PORT_MS;
1678 sunsu_ports[0].port_node = scan.msnode;
1679 sunsu_kbd_ms_init(&sunsu_ports[0], 0);
1680 1507
1681 sunsu_ports[1].su_type = SU_PORT_KBD; 1508static int __init sunsu_init(void)
1682 sunsu_ports[1].port_node = scan.kbnode; 1509{
1683 sunsu_kbd_ms_init(&sunsu_ports[1], 1); 1510 struct device_node *dp;
1511 int err;
1684 1512
1685 return 0; 1513 num_uart = 0;
1514 for_each_node_by_name(dp, "su") {
1515 if (su_get_type(dp) == SU_PORT_PORT)
1516 num_uart++;
1686 } 1517 }
1687 1518 for_each_node_by_name(dp, "su_pnp") {
1688 if (scan.msx != -1 || scan.kbx != -1) { 1519 if (su_get_type(dp) == SU_PORT_PORT)
1689 printk("sunsu_probe: cannot match keyboard and mouse, confused\n"); 1520 num_uart++;
1690 return -ENODEV; 1521 }
1522 for_each_node_by_name(dp, "serial") {
1523 if (of_device_is_compatible(dp, "su")) {
1524 if (su_get_type(dp) == SU_PORT_PORT)
1525 num_uart++;
1526 }
1691 } 1527 }
1692 1528
1693 if (scan.devices == 0) 1529 if (num_uart) {
1694 return -ENODEV; 1530 sunsu_reg.minor = sunserial_current_minor;
1531 sunsu_reg.nr = num_uart;
1532 err = uart_register_driver(&sunsu_reg);
1533 if (err)
1534 return err;
1535 sunsu_reg.tty_driver->name_base = sunsu_reg.minor - 64;
1536 sunserial_current_minor += num_uart;
1537 sunsu_reg.cons = SUNSU_CONSOLE(num_uart);
1538 }
1695 1539
1696 /* 1540 err = of_register_driver(&su_driver, &of_bus_type);
1697 * Console must be initiated after the generic initialization. 1541 if (err && num_uart)
1698 */ 1542 uart_unregister_driver(&sunsu_reg);
1699 sunsu_serial_init();
1700 1543
1701 return 0; 1544 return err;
1702} 1545}
1703 1546
1704static void __exit sunsu_exit(void) 1547static void __exit sunsu_exit(void)
1705{ 1548{
1706 int i, saw_uart; 1549 if (num_uart)
1707
1708 saw_uart = 0;
1709 for (i = 0; i < UART_NR; i++) {
1710 struct uart_sunsu_port *up = &sunsu_ports[i];
1711
1712 if (up->su_type == SU_PORT_MS ||
1713 up->su_type == SU_PORT_KBD) {
1714#ifdef CONFIG_SERIO
1715 if (up->serio) {
1716 serio_unregister_port(up->serio);
1717 up->serio = NULL;
1718 }
1719#endif
1720 } else if (up->port.type != PORT_UNKNOWN) {
1721 uart_remove_one_port(&sunsu_reg, &up->port);
1722 saw_uart++;
1723 }
1724 }
1725
1726 if (saw_uart)
1727 uart_unregister_driver(&sunsu_reg); 1550 uart_unregister_driver(&sunsu_reg);
1728} 1551}
1729 1552
1730module_init(sunsu_probe); 1553module_init(sunsu_init);
1731module_exit(sunsu_exit); 1554module_exit(sunsu_exit);
1555
1556MODULE_AUTHOR("Eddie C. Dost, Peter Zaitcev, and David S. Miller");
1557MODULE_DESCRIPTION("Sun SU serial port driver");
1558MODULE_VERSION("2.0");
1732MODULE_LICENSE("GPL"); 1559MODULE_LICENSE("GPL");
diff --git a/drivers/serial/sunzilog.c b/drivers/serial/sunzilog.c
index 9f42677287ad..1caa286a6be6 100644
--- a/drivers/serial/sunzilog.c
+++ b/drivers/serial/sunzilog.c
@@ -1,5 +1,4 @@
1/* 1/* sunzilog.c: Zilog serial driver for Sparc systems.
2 * sunzilog.c
3 * 2 *
4 * Driver for Zilog serial chips found on Sun workstations and 3 * Driver for Zilog serial chips found on Sun workstations and
5 * servers. This driver could actually be made more generic. 4 * servers. This driver could actually be made more generic.
@@ -10,7 +9,7 @@
10 * C. Dost, Pete Zaitcev, Ted Ts'o and Alex Buell for their 9 * C. Dost, Pete Zaitcev, Ted Ts'o and Alex Buell for their
11 * work there. 10 * work there.
12 * 11 *
13 * Copyright (C) 2002 David S. Miller (davem@redhat.com) 12 * Copyright (C) 2002, 2006 David S. Miller (davem@davemloft.net)
14 */ 13 */
15 14
16#include <linux/config.h> 15#include <linux/config.h>
@@ -38,10 +37,8 @@
38 37
39#include <asm/io.h> 38#include <asm/io.h>
40#include <asm/irq.h> 39#include <asm/irq.h>
41#ifdef CONFIG_SPARC64 40#include <asm/prom.h>
42#include <asm/fhc.h> 41#include <asm/of_device.h>
43#endif
44#include <asm/sbus.h>
45 42
46#if defined(CONFIG_SERIAL_SUNZILOG_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) 43#if defined(CONFIG_SERIAL_SUNZILOG_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
47#define SUPPORT_SYSRQ 44#define SUPPORT_SYSRQ
@@ -65,7 +62,7 @@
65#define ZSDELAY() 62#define ZSDELAY()
66#define ZSDELAY_LONG() 63#define ZSDELAY_LONG()
67#define ZS_WSYNC(__channel) \ 64#define ZS_WSYNC(__channel) \
68 sbus_readb(&((__channel)->control)) 65 readb(&((__channel)->control))
69#endif 66#endif
70 67
71static int num_sunzilog; 68static int num_sunzilog;
@@ -107,7 +104,7 @@ struct uart_sunzilog_port {
107 unsigned char prev_status; 104 unsigned char prev_status;
108 105
109#ifdef CONFIG_SERIO 106#ifdef CONFIG_SERIO
110 struct serio *serio; 107 struct serio serio;
111 int serio_open; 108 int serio_open;
112#endif 109#endif
113}; 110};
@@ -138,9 +135,9 @@ static unsigned char read_zsreg(struct zilog_channel __iomem *channel,
138{ 135{
139 unsigned char retval; 136 unsigned char retval;
140 137
141 sbus_writeb(reg, &channel->control); 138 writeb(reg, &channel->control);
142 ZSDELAY(); 139 ZSDELAY();
143 retval = sbus_readb(&channel->control); 140 retval = readb(&channel->control);
144 ZSDELAY(); 141 ZSDELAY();
145 142
146 return retval; 143 return retval;
@@ -149,9 +146,9 @@ static unsigned char read_zsreg(struct zilog_channel __iomem *channel,
149static void write_zsreg(struct zilog_channel __iomem *channel, 146static void write_zsreg(struct zilog_channel __iomem *channel,
150 unsigned char reg, unsigned char value) 147 unsigned char reg, unsigned char value)
151{ 148{
152 sbus_writeb(reg, &channel->control); 149 writeb(reg, &channel->control);
153 ZSDELAY(); 150 ZSDELAY();
154 sbus_writeb(value, &channel->control); 151 writeb(value, &channel->control);
155 ZSDELAY(); 152 ZSDELAY();
156} 153}
157 154
@@ -162,17 +159,17 @@ static void sunzilog_clear_fifo(struct zilog_channel __iomem *channel)
162 for (i = 0; i < 32; i++) { 159 for (i = 0; i < 32; i++) {
163 unsigned char regval; 160 unsigned char regval;
164 161
165 regval = sbus_readb(&channel->control); 162 regval = readb(&channel->control);
166 ZSDELAY(); 163 ZSDELAY();
167 if (regval & Rx_CH_AV) 164 if (regval & Rx_CH_AV)
168 break; 165 break;
169 166
170 regval = read_zsreg(channel, R1); 167 regval = read_zsreg(channel, R1);
171 sbus_readb(&channel->data); 168 readb(&channel->data);
172 ZSDELAY(); 169 ZSDELAY();
173 170
174 if (regval & (PAR_ERR | Rx_OVR | CRC_ERR)) { 171 if (regval & (PAR_ERR | Rx_OVR | CRC_ERR)) {
175 sbus_writeb(ERR_RES, &channel->control); 172 writeb(ERR_RES, &channel->control);
176 ZSDELAY(); 173 ZSDELAY();
177 ZS_WSYNC(channel); 174 ZS_WSYNC(channel);
178 } 175 }
@@ -194,7 +191,7 @@ static void __load_zsregs(struct zilog_channel __iomem *channel, unsigned char *
194 udelay(100); 191 udelay(100);
195 } 192 }
196 193
197 sbus_writeb(ERR_RES, &channel->control); 194 writeb(ERR_RES, &channel->control);
198 ZSDELAY(); 195 ZSDELAY();
199 ZS_WSYNC(channel); 196 ZS_WSYNC(channel);
200 197
@@ -291,7 +288,7 @@ static void sunzilog_kbdms_receive_chars(struct uart_sunzilog_port *up,
291 /* Stop-A is handled by drivers/char/keyboard.c now. */ 288 /* Stop-A is handled by drivers/char/keyboard.c now. */
292#ifdef CONFIG_SERIO 289#ifdef CONFIG_SERIO
293 if (up->serio_open) 290 if (up->serio_open)
294 serio_interrupt(up->serio, ch, 0, regs); 291 serio_interrupt(&up->serio, ch, 0, regs);
295#endif 292#endif
296 } else if (ZS_IS_MOUSE(up)) { 293 } else if (ZS_IS_MOUSE(up)) {
297 int ret = suncore_mouse_baud_detection(ch, is_break); 294 int ret = suncore_mouse_baud_detection(ch, is_break);
@@ -306,7 +303,7 @@ static void sunzilog_kbdms_receive_chars(struct uart_sunzilog_port *up,
306 case 0: 303 case 0:
307#ifdef CONFIG_SERIO 304#ifdef CONFIG_SERIO
308 if (up->serio_open) 305 if (up->serio_open)
309 serio_interrupt(up->serio, ch, 0, regs); 306 serio_interrupt(&up->serio, ch, 0, regs);
310#endif 307#endif
311 break; 308 break;
312 }; 309 };
@@ -330,12 +327,12 @@ sunzilog_receive_chars(struct uart_sunzilog_port *up,
330 327
331 r1 = read_zsreg(channel, R1); 328 r1 = read_zsreg(channel, R1);
332 if (r1 & (PAR_ERR | Rx_OVR | CRC_ERR)) { 329 if (r1 & (PAR_ERR | Rx_OVR | CRC_ERR)) {
333 sbus_writeb(ERR_RES, &channel->control); 330 writeb(ERR_RES, &channel->control);
334 ZSDELAY(); 331 ZSDELAY();
335 ZS_WSYNC(channel); 332 ZS_WSYNC(channel);
336 } 333 }
337 334
338 ch = sbus_readb(&channel->control); 335 ch = readb(&channel->control);
339 ZSDELAY(); 336 ZSDELAY();
340 337
341 /* This funny hack depends upon BRK_ABRT not interfering 338 /* This funny hack depends upon BRK_ABRT not interfering
@@ -347,7 +344,7 @@ sunzilog_receive_chars(struct uart_sunzilog_port *up,
347 if (!(ch & Rx_CH_AV)) 344 if (!(ch & Rx_CH_AV))
348 break; 345 break;
349 346
350 ch = sbus_readb(&channel->data); 347 ch = readb(&channel->data);
351 ZSDELAY(); 348 ZSDELAY();
352 349
353 ch &= up->parity_mask; 350 ch &= up->parity_mask;
@@ -406,10 +403,10 @@ static void sunzilog_status_handle(struct uart_sunzilog_port *up,
406{ 403{
407 unsigned char status; 404 unsigned char status;
408 405
409 status = sbus_readb(&channel->control); 406 status = readb(&channel->control);
410 ZSDELAY(); 407 ZSDELAY();
411 408
412 sbus_writeb(RES_EXT_INT, &channel->control); 409 writeb(RES_EXT_INT, &channel->control);
413 ZSDELAY(); 410 ZSDELAY();
414 ZS_WSYNC(channel); 411 ZS_WSYNC(channel);
415 412
@@ -421,7 +418,7 @@ static void sunzilog_status_handle(struct uart_sunzilog_port *up,
421 * confusing the PROM. 418 * confusing the PROM.
422 */ 419 */
423 while (1) { 420 while (1) {
424 status = sbus_readb(&channel->control); 421 status = readb(&channel->control);
425 ZSDELAY(); 422 ZSDELAY();
426 if (!(status & BRK_ABRT)) 423 if (!(status & BRK_ABRT))
427 break; 424 break;
@@ -458,7 +455,7 @@ static void sunzilog_transmit_chars(struct uart_sunzilog_port *up,
458 struct circ_buf *xmit; 455 struct circ_buf *xmit;
459 456
460 if (ZS_IS_CONS(up)) { 457 if (ZS_IS_CONS(up)) {
461 unsigned char status = sbus_readb(&channel->control); 458 unsigned char status = readb(&channel->control);
462 ZSDELAY(); 459 ZSDELAY();
463 460
464 /* TX still busy? Just wait for the next TX done interrupt. 461 /* TX still busy? Just wait for the next TX done interrupt.
@@ -487,7 +484,7 @@ static void sunzilog_transmit_chars(struct uart_sunzilog_port *up,
487 484
488 if (up->port.x_char) { 485 if (up->port.x_char) {
489 up->flags |= SUNZILOG_FLAG_TX_ACTIVE; 486 up->flags |= SUNZILOG_FLAG_TX_ACTIVE;
490 sbus_writeb(up->port.x_char, &channel->data); 487 writeb(up->port.x_char, &channel->data);
491 ZSDELAY(); 488 ZSDELAY();
492 ZS_WSYNC(channel); 489 ZS_WSYNC(channel);
493 490
@@ -506,7 +503,7 @@ static void sunzilog_transmit_chars(struct uart_sunzilog_port *up,
506 goto ack_tx_int; 503 goto ack_tx_int;
507 504
508 up->flags |= SUNZILOG_FLAG_TX_ACTIVE; 505 up->flags |= SUNZILOG_FLAG_TX_ACTIVE;
509 sbus_writeb(xmit->buf[xmit->tail], &channel->data); 506 writeb(xmit->buf[xmit->tail], &channel->data);
510 ZSDELAY(); 507 ZSDELAY();
511 ZS_WSYNC(channel); 508 ZS_WSYNC(channel);
512 509
@@ -519,7 +516,7 @@ static void sunzilog_transmit_chars(struct uart_sunzilog_port *up,
519 return; 516 return;
520 517
521ack_tx_int: 518ack_tx_int:
522 sbus_writeb(RES_Tx_P, &channel->control); 519 writeb(RES_Tx_P, &channel->control);
523 ZSDELAY(); 520 ZSDELAY();
524 ZS_WSYNC(channel); 521 ZS_WSYNC(channel);
525} 522}
@@ -540,7 +537,7 @@ static irqreturn_t sunzilog_interrupt(int irq, void *dev_id, struct pt_regs *reg
540 /* Channel A */ 537 /* Channel A */
541 tty = NULL; 538 tty = NULL;
542 if (r3 & (CHAEXT | CHATxIP | CHARxIP)) { 539 if (r3 & (CHAEXT | CHATxIP | CHARxIP)) {
543 sbus_writeb(RES_H_IUS, &channel->control); 540 writeb(RES_H_IUS, &channel->control);
544 ZSDELAY(); 541 ZSDELAY();
545 ZS_WSYNC(channel); 542 ZS_WSYNC(channel);
546 543
@@ -563,7 +560,7 @@ static irqreturn_t sunzilog_interrupt(int irq, void *dev_id, struct pt_regs *reg
563 spin_lock(&up->port.lock); 560 spin_lock(&up->port.lock);
564 tty = NULL; 561 tty = NULL;
565 if (r3 & (CHBEXT | CHBTxIP | CHBRxIP)) { 562 if (r3 & (CHBEXT | CHBTxIP | CHBRxIP)) {
566 sbus_writeb(RES_H_IUS, &channel->control); 563 writeb(RES_H_IUS, &channel->control);
567 ZSDELAY(); 564 ZSDELAY();
568 ZS_WSYNC(channel); 565 ZS_WSYNC(channel);
569 566
@@ -594,7 +591,7 @@ static __inline__ unsigned char sunzilog_read_channel_status(struct uart_port *p
594 unsigned char status; 591 unsigned char status;
595 592
596 channel = ZILOG_CHANNEL_FROM_PORT(port); 593 channel = ZILOG_CHANNEL_FROM_PORT(port);
597 status = sbus_readb(&channel->control); 594 status = readb(&channel->control);
598 ZSDELAY(); 595 ZSDELAY();
599 596
600 return status; 597 return status;
@@ -682,7 +679,7 @@ static void sunzilog_start_tx(struct uart_port *port)
682 up->flags |= SUNZILOG_FLAG_TX_ACTIVE; 679 up->flags |= SUNZILOG_FLAG_TX_ACTIVE;
683 up->flags &= ~SUNZILOG_FLAG_TX_STOPPED; 680 up->flags &= ~SUNZILOG_FLAG_TX_STOPPED;
684 681
685 status = sbus_readb(&channel->control); 682 status = readb(&channel->control);
686 ZSDELAY(); 683 ZSDELAY();
687 684
688 /* TX busy? Just wait for the TX done interrupt. */ 685 /* TX busy? Just wait for the TX done interrupt. */
@@ -693,7 +690,7 @@ static void sunzilog_start_tx(struct uart_port *port)
693 * IRQ sending engine. 690 * IRQ sending engine.
694 */ 691 */
695 if (port->x_char) { 692 if (port->x_char) {
696 sbus_writeb(port->x_char, &channel->data); 693 writeb(port->x_char, &channel->data);
697 ZSDELAY(); 694 ZSDELAY();
698 ZS_WSYNC(channel); 695 ZS_WSYNC(channel);
699 696
@@ -702,7 +699,7 @@ static void sunzilog_start_tx(struct uart_port *port)
702 } else { 699 } else {
703 struct circ_buf *xmit = &port->info->xmit; 700 struct circ_buf *xmit = &port->info->xmit;
704 701
705 sbus_writeb(xmit->buf[xmit->tail], &channel->data); 702 writeb(xmit->buf[xmit->tail], &channel->data);
706 ZSDELAY(); 703 ZSDELAY();
707 ZS_WSYNC(channel); 704 ZS_WSYNC(channel);
708 705
@@ -779,7 +776,7 @@ static void __sunzilog_startup(struct uart_sunzilog_port *up)
779 struct zilog_channel __iomem *channel; 776 struct zilog_channel __iomem *channel;
780 777
781 channel = ZILOG_CHANNEL_FROM_PORT(&up->port); 778 channel = ZILOG_CHANNEL_FROM_PORT(&up->port);
782 up->prev_status = sbus_readb(&channel->control); 779 up->prev_status = readb(&channel->control);
783 780
784 /* Enable receiver and transmitter. */ 781 /* Enable receiver and transmitter. */
785 up->curregs[R3] |= RxENAB; 782 up->curregs[R3] |= RxENAB;
@@ -963,7 +960,7 @@ sunzilog_set_termios(struct uart_port *port, struct termios *termios,
963 960
964static const char *sunzilog_type(struct uart_port *port) 961static const char *sunzilog_type(struct uart_port *port)
965{ 962{
966 return "SunZilog"; 963 return "zs";
967} 964}
968 965
969/* We do not request/release mappings of the registers here, this 966/* We do not request/release mappings of the registers here, this
@@ -1012,7 +1009,6 @@ static struct uart_sunzilog_port *sunzilog_port_table;
1012static struct zilog_layout __iomem **sunzilog_chip_regs; 1009static struct zilog_layout __iomem **sunzilog_chip_regs;
1013 1010
1014static struct uart_sunzilog_port *sunzilog_irq_chain; 1011static struct uart_sunzilog_port *sunzilog_irq_chain;
1015static int zilog_irq = -1;
1016 1012
1017static struct uart_driver sunzilog_reg = { 1013static struct uart_driver sunzilog_reg = {
1018 .owner = THIS_MODULE, 1014 .owner = THIS_MODULE,
@@ -1021,232 +1017,47 @@ static struct uart_driver sunzilog_reg = {
1021 .major = TTY_MAJOR, 1017 .major = TTY_MAJOR,
1022}; 1018};
1023 1019
1024static void * __init alloc_one_table(unsigned long size) 1020static int __init sunzilog_alloc_tables(void)
1025{
1026 void *ret;
1027
1028 ret = kmalloc(size, GFP_KERNEL);
1029 if (ret != NULL)
1030 memset(ret, 0, size);
1031
1032 return ret;
1033}
1034
1035static void __init sunzilog_alloc_tables(void)
1036{
1037 sunzilog_port_table =
1038 alloc_one_table(NUM_CHANNELS * sizeof(struct uart_sunzilog_port));
1039 sunzilog_chip_regs =
1040 alloc_one_table(NUM_SUNZILOG * sizeof(struct zilog_layout __iomem *));
1041
1042 if (sunzilog_port_table == NULL || sunzilog_chip_regs == NULL) {
1043 prom_printf("SunZilog: Cannot allocate tables.\n");
1044 prom_halt();
1045 }
1046}
1047
1048#ifdef CONFIG_SPARC64
1049
1050/* We used to attempt to use the address property of the Zilog device node
1051 * but that totally is not necessary on sparc64.
1052 */
1053static struct zilog_layout __iomem * __init get_zs_sun4u(int chip, int zsnode)
1054{ 1021{
1055 void __iomem *mapped_addr; 1022 struct uart_sunzilog_port *up;
1056 unsigned int sun4u_ino; 1023 unsigned long size;
1057 struct sbus_bus *sbus = NULL; 1024 int i;
1058 struct sbus_dev *sdev = NULL;
1059 int err;
1060
1061 if (central_bus == NULL) {
1062 for_each_sbus(sbus) {
1063 for_each_sbusdev(sdev, sbus) {
1064 if (sdev->prom_node == zsnode)
1065 goto found;
1066 }
1067 }
1068 }
1069 found:
1070 if (sdev == NULL && central_bus == NULL) {
1071 prom_printf("SunZilog: sdev&&central == NULL for "
1072 "Zilog %d in get_zs_sun4u.\n", chip);
1073 prom_halt();
1074 }
1075 if (central_bus == NULL) {
1076 mapped_addr =
1077 sbus_ioremap(&sdev->resource[0], 0,
1078 PAGE_SIZE,
1079 "Zilog Registers");
1080 } else {
1081 struct linux_prom_registers zsregs[1];
1082
1083 err = prom_getproperty(zsnode, "reg",
1084 (char *) &zsregs[0],
1085 sizeof(zsregs));
1086 if (err == -1) {
1087 prom_printf("SunZilog: Cannot map "
1088 "Zilog %d regs on "
1089 "central bus.\n", chip);
1090 prom_halt();
1091 }
1092 apply_fhc_ranges(central_bus->child,
1093 &zsregs[0], 1);
1094 apply_central_ranges(central_bus, &zsregs[0], 1);
1095 mapped_addr = (void __iomem *)
1096 ((((u64)zsregs[0].which_io)<<32UL) |
1097 ((u64)zsregs[0].phys_addr));
1098 }
1099
1100 if (zilog_irq == -1) {
1101 if (central_bus) {
1102 unsigned long iclr, imap;
1103
1104 iclr = central_bus->child->fhc_regs.uregs
1105 + FHC_UREGS_ICLR;
1106 imap = central_bus->child->fhc_regs.uregs
1107 + FHC_UREGS_IMAP;
1108 zilog_irq = build_irq(0, iclr, imap);
1109 } else {
1110 err = prom_getproperty(zsnode, "interrupts",
1111 (char *) &sun4u_ino,
1112 sizeof(sun4u_ino));
1113 zilog_irq = sbus_build_irq(sbus_root, sun4u_ino);
1114 }
1115 }
1116
1117 return (struct zilog_layout __iomem *) mapped_addr;
1118}
1119#else /* CONFIG_SPARC64 */
1120
1121/*
1122 * XXX The sun4d case is utterly screwed: it tries to re-walk the tree
1123 * (for the 3rd time) in order to find bootbus and cpu. Streamline it.
1124 */
1125static struct zilog_layout __iomem * __init get_zs_sun4cmd(int chip, int node)
1126{
1127 struct linux_prom_irqs irq_info[2];
1128 void __iomem *mapped_addr = NULL;
1129 int zsnode, cpunode, bbnode;
1130 struct linux_prom_registers zsreg[4];
1131 struct resource res;
1132
1133 if (sparc_cpu_model == sun4d) {
1134 int walk;
1135
1136 zsnode = 0;
1137 bbnode = 0;
1138 cpunode = 0;
1139 for (walk = prom_getchild(prom_root_node);
1140 (walk = prom_searchsiblings(walk, "cpu-unit")) != 0;
1141 walk = prom_getsibling(walk)) {
1142 bbnode = prom_getchild(walk);
1143 if (bbnode &&
1144 (bbnode = prom_searchsiblings(bbnode, "bootbus"))) {
1145 if ((zsnode = prom_getchild(bbnode)) == node) {
1146 cpunode = walk;
1147 break;
1148 }
1149 }
1150 }
1151 if (!walk) {
1152 prom_printf("SunZilog: Cannot find the %d'th bootbus on sun4d.\n",
1153 (chip / 2));
1154 prom_halt();
1155 }
1156 1025
1157 if (prom_getproperty(zsnode, "reg", 1026 size = NUM_CHANNELS * sizeof(struct uart_sunzilog_port);
1158 (char *) zsreg, sizeof(zsreg)) == -1) { 1027 sunzilog_port_table = kzalloc(size, GFP_KERNEL);
1159 prom_printf("SunZilog: Cannot map Zilog %d\n", chip); 1028 if (!sunzilog_port_table)
1160 prom_halt(); 1029 return -ENOMEM;
1161 }
1162 /* XXX Looks like an off by one? */
1163 prom_apply_generic_ranges(bbnode, cpunode, zsreg, 1);
1164 res.start = zsreg[0].phys_addr;
1165 res.end = res.start + (8 - 1);
1166 res.flags = zsreg[0].which_io | IORESOURCE_IO;
1167 mapped_addr = sbus_ioremap(&res, 0, 8, "Zilog Serial");
1168 1030
1169 } else { 1031 for (i = 0; i < NUM_CHANNELS; i++) {
1170 zsnode = node; 1032 up = &sunzilog_port_table[i];
1171 1033
1172#if 0 /* XXX When was this used? */ 1034 spin_lock_init(&up->port.lock);
1173 if (prom_getintdefault(zsnode, "slave", -1) != chipid) {
1174 zsnode = prom_getsibling(zsnode);
1175 continue;
1176 }
1177#endif
1178 1035
1179 /* 1036 if (i == 0)
1180 * "address" is only present on ports that OBP opened 1037 sunzilog_irq_chain = up;
1181 * (from Mitch Bradley's "Hitchhiker's Guide to OBP").
1182 * We do not use it.
1183 */
1184 1038
1185 if (prom_getproperty(zsnode, "reg", 1039 if (i < NUM_CHANNELS - 1)
1186 (char *) zsreg, sizeof(zsreg)) == -1) { 1040 up->next = up + 1;
1187 prom_printf("SunZilog: Cannot map Zilog %d\n", chip); 1041 else
1188 prom_halt(); 1042 up->next = NULL;
1189 }
1190 if (sparc_cpu_model == sun4m) /* Crude. Pass parent. XXX */
1191 prom_apply_obio_ranges(zsreg, 1);
1192 res.start = zsreg[0].phys_addr;
1193 res.end = res.start + (8 - 1);
1194 res.flags = zsreg[0].which_io | IORESOURCE_IO;
1195 mapped_addr = sbus_ioremap(&res, 0, 8, "Zilog Serial");
1196 } 1043 }
1197 1044
1198 if (prom_getproperty(zsnode, "intr", 1045 size = NUM_SUNZILOG * sizeof(struct zilog_layout __iomem *);
1199 (char *) irq_info, sizeof(irq_info)) 1046 sunzilog_chip_regs = kzalloc(size, GFP_KERNEL);
1200 % sizeof(struct linux_prom_irqs)) { 1047 if (!sunzilog_chip_regs) {
1201 prom_printf("SunZilog: Cannot get IRQ property for Zilog %d.\n", 1048 kfree(sunzilog_port_table);
1202 chip); 1049 sunzilog_irq_chain = NULL;
1203 prom_halt(); 1050 return -ENOMEM;
1204 }
1205 if (zilog_irq == -1) {
1206 zilog_irq = irq_info[0].pri;
1207 } else if (zilog_irq != irq_info[0].pri) {
1208 /* XXX. Dumb. Should handle per-chip IRQ, for add-ons. */
1209 prom_printf("SunZilog: Inconsistent IRQ layout for Zilog %d.\n",
1210 chip);
1211 prom_halt();
1212 } 1051 }
1213 1052
1214 return (struct zilog_layout __iomem *) mapped_addr; 1053 return 0;
1215} 1054}
1216#endif /* !(CONFIG_SPARC64) */
1217 1055
1218/* Get the address of the registers for SunZilog instance CHIP. */ 1056static void sunzilog_free_tables(void)
1219static struct zilog_layout __iomem * __init get_zs(int chip, int node)
1220{ 1057{
1221 if (chip < 0 || chip >= NUM_SUNZILOG) { 1058 kfree(sunzilog_port_table);
1222 prom_printf("SunZilog: Illegal chip number %d in get_zs.\n", chip); 1059 sunzilog_irq_chain = NULL;
1223 prom_halt(); 1060 kfree(sunzilog_chip_regs);
1224 }
1225
1226#ifdef CONFIG_SPARC64
1227 return get_zs_sun4u(chip, node);
1228#else
1229
1230 if (sparc_cpu_model == sun4) {
1231 struct resource res;
1232
1233 /* Not probe-able, hard code it. */
1234 switch (chip) {
1235 case 0:
1236 res.start = 0xf1000000;
1237 break;
1238 case 1:
1239 res.start = 0xf0000000;
1240 break;
1241 };
1242 zilog_irq = 12;
1243 res.end = (res.start + (8 - 1));
1244 res.flags = IORESOURCE_IO;
1245 return sbus_ioremap(&res, 0, 8, "SunZilog");
1246 }
1247
1248 return get_zs_sun4cmd(chip, node);
1249#endif
1250} 1061}
1251 1062
1252#define ZS_PUT_CHAR_MAX_DELAY 2000 /* 10 ms */ 1063#define ZS_PUT_CHAR_MAX_DELAY 2000 /* 10 ms */
@@ -1260,7 +1071,7 @@ static void sunzilog_putchar(struct uart_port *port, int ch)
1260 * udelay with ZSDELAY as that is a NOP on some platforms. -DaveM 1071 * udelay with ZSDELAY as that is a NOP on some platforms. -DaveM
1261 */ 1072 */
1262 do { 1073 do {
1263 unsigned char val = sbus_readb(&channel->control); 1074 unsigned char val = readb(&channel->control);
1264 if (val & Tx_BUF_EMP) { 1075 if (val & Tx_BUF_EMP) {
1265 ZSDELAY(); 1076 ZSDELAY();
1266 break; 1077 break;
@@ -1268,7 +1079,7 @@ static void sunzilog_putchar(struct uart_port *port, int ch)
1268 udelay(5); 1079 udelay(5);
1269 } while (--loops); 1080 } while (--loops);
1270 1081
1271 sbus_writeb(ch, &channel->data); 1082 writeb(ch, &channel->data);
1272 ZSDELAY(); 1083 ZSDELAY();
1273 ZS_WSYNC(channel); 1084 ZS_WSYNC(channel);
1274} 1085}
@@ -1385,28 +1196,6 @@ static struct console sunzilog_console = {
1385 .data = &sunzilog_reg, 1196 .data = &sunzilog_reg,
1386}; 1197};
1387 1198
1388static int __init sunzilog_console_init(void)
1389{
1390 int i;
1391
1392 if (con_is_present())
1393 return 0;
1394
1395 for (i = 0; i < NUM_CHANNELS; i++) {
1396 int this_minor = sunzilog_reg.minor + i;
1397
1398 if ((this_minor - 64) == (serial_console - 1))
1399 break;
1400 }
1401 if (i == NUM_CHANNELS)
1402 return 0;
1403
1404 sunzilog_console.index = i;
1405 sunzilog_port_table[i].flags |= SUNZILOG_FLAG_IS_CONS;
1406 register_console(&sunzilog_console);
1407 return 0;
1408}
1409
1410static inline struct console *SUNZILOG_CONSOLE(void) 1199static inline struct console *SUNZILOG_CONSOLE(void)
1411{ 1200{
1412 int i; 1201 int i;
@@ -1431,101 +1220,8 @@ static inline struct console *SUNZILOG_CONSOLE(void)
1431 1220
1432#else 1221#else
1433#define SUNZILOG_CONSOLE() (NULL) 1222#define SUNZILOG_CONSOLE() (NULL)
1434#define sunzilog_console_init() do { } while (0)
1435#endif 1223#endif
1436 1224
1437/*
1438 * We scan the PROM tree recursively. This is the most reliable way
1439 * to find Zilog nodes on various platforms. However, we face an extreme
1440 * shortage of kernel stack, so we must be very careful. To that end,
1441 * we scan only to a certain depth, and we use a common property buffer
1442 * in the scan structure.
1443 */
1444#define ZS_PROPSIZE 128
1445#define ZS_SCAN_DEPTH 5
1446
1447struct zs_probe_scan {
1448 int depth;
1449 void (*scanner)(struct zs_probe_scan *t, int node);
1450
1451 int devices;
1452 char prop[ZS_PROPSIZE];
1453};
1454
1455static int __inline__ sunzilog_node_ok(int node, const char *name, int len)
1456{
1457 if (strncmp(name, "zs", len) == 0)
1458 return 1;
1459 /* Don't fold this procedure just yet. Compare to su_node_ok(). */
1460 return 0;
1461}
1462
1463static void __init sunzilog_scan(struct zs_probe_scan *t, int node)
1464{
1465 int len;
1466
1467 for (; node != 0; node = prom_getsibling(node)) {
1468 len = prom_getproperty(node, "name", t->prop, ZS_PROPSIZE);
1469 if (len <= 1)
1470 continue; /* Broken PROM node */
1471 if (sunzilog_node_ok(node, t->prop, len)) {
1472 (*t->scanner)(t, node);
1473 } else {
1474 if (t->depth < ZS_SCAN_DEPTH) {
1475 t->depth++;
1476 sunzilog_scan(t, prom_getchild(node));
1477 --t->depth;
1478 }
1479 }
1480 }
1481}
1482
1483static void __init sunzilog_prepare(void)
1484{
1485 struct uart_sunzilog_port *up;
1486 struct zilog_layout __iomem *rp;
1487 int channel, chip;
1488
1489 /*
1490 * Temporary fix.
1491 */
1492 for (channel = 0; channel < NUM_CHANNELS; channel++)
1493 spin_lock_init(&sunzilog_port_table[channel].port.lock);
1494
1495 sunzilog_irq_chain = up = &sunzilog_port_table[0];
1496 for (channel = 0; channel < NUM_CHANNELS - 1; channel++)
1497 up[channel].next = &up[channel + 1];
1498 up[channel].next = NULL;
1499
1500 for (chip = 0; chip < NUM_SUNZILOG; chip++) {
1501 rp = sunzilog_chip_regs[chip];
1502 up[(chip * 2) + 0].port.membase = (void __iomem *)&rp->channelA;
1503 up[(chip * 2) + 1].port.membase = (void __iomem *)&rp->channelB;
1504
1505 /* Channel A */
1506 up[(chip * 2) + 0].port.iotype = UPIO_MEM;
1507 up[(chip * 2) + 0].port.irq = zilog_irq;
1508 up[(chip * 2) + 0].port.uartclk = ZS_CLOCK;
1509 up[(chip * 2) + 0].port.fifosize = 1;
1510 up[(chip * 2) + 0].port.ops = &sunzilog_pops;
1511 up[(chip * 2) + 0].port.type = PORT_SUNZILOG;
1512 up[(chip * 2) + 0].port.flags = 0;
1513 up[(chip * 2) + 0].port.line = (chip * 2) + 0;
1514 up[(chip * 2) + 0].flags |= SUNZILOG_FLAG_IS_CHANNEL_A;
1515
1516 /* Channel B */
1517 up[(chip * 2) + 1].port.iotype = UPIO_MEM;
1518 up[(chip * 2) + 1].port.irq = zilog_irq;
1519 up[(chip * 2) + 1].port.uartclk = ZS_CLOCK;
1520 up[(chip * 2) + 1].port.fifosize = 1;
1521 up[(chip * 2) + 1].port.ops = &sunzilog_pops;
1522 up[(chip * 2) + 1].port.type = PORT_SUNZILOG;
1523 up[(chip * 2) + 1].port.flags = 0;
1524 up[(chip * 2) + 1].port.line = (chip * 2) + 1;
1525 up[(chip * 2) + 1].flags |= 0;
1526 }
1527}
1528
1529static void __init sunzilog_init_kbdms(struct uart_sunzilog_port *up, int channel) 1225static void __init sunzilog_init_kbdms(struct uart_sunzilog_port *up, int channel)
1530{ 1226{
1531 int baud, brg; 1227 int baud, brg;
@@ -1539,8 +1235,6 @@ static void __init sunzilog_init_kbdms(struct uart_sunzilog_port *up, int channe
1539 up->cflag = B4800 | CS8 | CLOCAL | CREAD; 1235 up->cflag = B4800 | CS8 | CLOCAL | CREAD;
1540 baud = 4800; 1236 baud = 4800;
1541 } 1237 }
1542 printk(KERN_INFO "zs%d at 0x%p (irq = %d) is a SunZilog\n",
1543 channel, up->port.membase, zilog_irq);
1544 1238
1545 up->curregs[R15] = BRKIE; 1239 up->curregs[R15] = BRKIE;
1546 brg = BPS_TO_BRG(baud, ZS_CLOCK / ZS_CLOCK_DIVISOR); 1240 brg = BPS_TO_BRG(baud, ZS_CLOCK / ZS_CLOCK_DIVISOR);
@@ -1552,216 +1246,268 @@ static void __init sunzilog_init_kbdms(struct uart_sunzilog_port *up, int channe
1552#ifdef CONFIG_SERIO 1246#ifdef CONFIG_SERIO
1553static void __init sunzilog_register_serio(struct uart_sunzilog_port *up, int channel) 1247static void __init sunzilog_register_serio(struct uart_sunzilog_port *up, int channel)
1554{ 1248{
1555 struct serio *serio; 1249 struct serio *serio = &up->serio;
1556
1557 up->serio = serio = kmalloc(sizeof(struct serio), GFP_KERNEL);
1558 if (serio) {
1559 memset(serio, 0, sizeof(*serio));
1560
1561 serio->port_data = up;
1562
1563 serio->id.type = SERIO_RS232;
1564 if (channel == KEYBOARD_LINE) {
1565 serio->id.proto = SERIO_SUNKBD;
1566 strlcpy(serio->name, "zskbd", sizeof(serio->name));
1567 } else {
1568 serio->id.proto = SERIO_SUN;
1569 serio->id.extra = 1;
1570 strlcpy(serio->name, "zsms", sizeof(serio->name));
1571 }
1572 strlcpy(serio->phys,
1573 (channel == KEYBOARD_LINE ? "zs/serio0" : "zs/serio1"),
1574 sizeof(serio->phys));
1575 1250
1576 serio->write = sunzilog_serio_write; 1251 serio->port_data = up;
1577 serio->open = sunzilog_serio_open;
1578 serio->close = sunzilog_serio_close;
1579 1252
1580 serio_register_port(serio); 1253 serio->id.type = SERIO_RS232;
1254 if (channel == KEYBOARD_LINE) {
1255 serio->id.proto = SERIO_SUNKBD;
1256 strlcpy(serio->name, "zskbd", sizeof(serio->name));
1581 } else { 1257 } else {
1582 printk(KERN_WARNING "zs%d: not enough memory for serio port\n", 1258 serio->id.proto = SERIO_SUN;
1583 channel); 1259 serio->id.extra = 1;
1260 strlcpy(serio->name, "zsms", sizeof(serio->name));
1584 } 1261 }
1262 strlcpy(serio->phys,
1263 (channel == KEYBOARD_LINE ? "zs/serio0" : "zs/serio1"),
1264 sizeof(serio->phys));
1265
1266 serio->write = sunzilog_serio_write;
1267 serio->open = sunzilog_serio_open;
1268 serio->close = sunzilog_serio_close;
1269 serio->dev.parent = up->port.dev;
1270
1271 serio_register_port(serio);
1585} 1272}
1586#endif 1273#endif
1587 1274
1588static void __init sunzilog_init_hw(void) 1275static void __init sunzilog_init_hw(struct uart_sunzilog_port *up)
1589{ 1276{
1590 int i; 1277 struct zilog_channel __iomem *channel;
1591 1278 unsigned long flags;
1592 for (i = 0; i < NUM_CHANNELS; i++) { 1279 int baud, brg;
1593 struct uart_sunzilog_port *up = &sunzilog_port_table[i];
1594 struct zilog_channel __iomem *channel = ZILOG_CHANNEL_FROM_PORT(&up->port);
1595 unsigned long flags;
1596 int baud, brg;
1597 1280
1598 spin_lock_irqsave(&up->port.lock, flags); 1281 channel = ZILOG_CHANNEL_FROM_PORT(&up->port);
1599 1282
1600 if (ZS_IS_CHANNEL_A(up)) { 1283 spin_lock_irqsave(&up->port.lock, flags);
1601 write_zsreg(channel, R9, FHWRES); 1284 if (ZS_IS_CHANNEL_A(up)) {
1602 ZSDELAY_LONG(); 1285 write_zsreg(channel, R9, FHWRES);
1603 (void) read_zsreg(channel, R0); 1286 ZSDELAY_LONG();
1604 } 1287 (void) read_zsreg(channel, R0);
1288 }
1605 1289
1606 if (i == KEYBOARD_LINE || i == MOUSE_LINE) { 1290 if (up->port.line == KEYBOARD_LINE ||
1607 sunzilog_init_kbdms(up, i); 1291 up->port.line == MOUSE_LINE) {
1608 up->curregs[R9] |= (NV | MIE); 1292 sunzilog_init_kbdms(up, up->port.line);
1609 write_zsreg(channel, R9, up->curregs[R9]); 1293 up->curregs[R9] |= (NV | MIE);
1610 } else { 1294 write_zsreg(channel, R9, up->curregs[R9]);
1611 /* Normal serial TTY. */ 1295 } else {
1612 up->parity_mask = 0xff; 1296 /* Normal serial TTY. */
1613 up->curregs[R1] = EXT_INT_ENAB | INT_ALL_Rx | TxINT_ENAB; 1297 up->parity_mask = 0xff;
1614 up->curregs[R4] = PAR_EVEN | X16CLK | SB1; 1298 up->curregs[R1] = EXT_INT_ENAB | INT_ALL_Rx | TxINT_ENAB;
1615 up->curregs[R3] = RxENAB | Rx8; 1299 up->curregs[R4] = PAR_EVEN | X16CLK | SB1;
1616 up->curregs[R5] = TxENAB | Tx8; 1300 up->curregs[R3] = RxENAB | Rx8;
1617 up->curregs[R9] = NV | MIE; 1301 up->curregs[R5] = TxENAB | Tx8;
1618 up->curregs[R10] = NRZ; 1302 up->curregs[R9] = NV | MIE;
1619 up->curregs[R11] = TCBR | RCBR; 1303 up->curregs[R10] = NRZ;
1620 baud = 9600; 1304 up->curregs[R11] = TCBR | RCBR;
1621 brg = BPS_TO_BRG(baud, ZS_CLOCK / ZS_CLOCK_DIVISOR); 1305 baud = 9600;
1622 up->curregs[R12] = (brg & 0xff); 1306 brg = BPS_TO_BRG(baud, ZS_CLOCK / ZS_CLOCK_DIVISOR);
1623 up->curregs[R13] = (brg >> 8) & 0xff; 1307 up->curregs[R12] = (brg & 0xff);
1624 up->curregs[R14] = BRSRC | BRENAB; 1308 up->curregs[R13] = (brg >> 8) & 0xff;
1625 __load_zsregs(channel, up->curregs); 1309 up->curregs[R14] = BRSRC | BRENAB;
1626 write_zsreg(channel, R9, up->curregs[R9]); 1310 __load_zsregs(channel, up->curregs);
1627 } 1311 write_zsreg(channel, R9, up->curregs[R9]);
1312 }
1628 1313
1629 spin_unlock_irqrestore(&up->port.lock, flags); 1314 spin_unlock_irqrestore(&up->port.lock, flags);
1630 1315
1631#ifdef CONFIG_SERIO 1316#ifdef CONFIG_SERIO
1632 if (i == KEYBOARD_LINE || i == MOUSE_LINE) 1317 if (up->port.line == KEYBOARD_LINE || up->port.line == MOUSE_LINE)
1633 sunzilog_register_serio(up, i); 1318 sunzilog_register_serio(up, up->port.line);
1634#endif 1319#endif
1635 }
1636}
1637
1638static struct zilog_layout __iomem * __init get_zs(int chip, int node);
1639
1640static void __init sunzilog_scan_probe(struct zs_probe_scan *t, int node)
1641{
1642 sunzilog_chip_regs[t->devices] = get_zs(t->devices, node);
1643 t->devices++;
1644} 1320}
1645 1321
1646static int __init sunzilog_ports_init(void) 1322static int __devinit zs_get_instance(struct device_node *dp)
1647{ 1323{
1648 struct zs_probe_scan scan;
1649 int ret; 1324 int ret;
1650 int uart_count;
1651 int i;
1652
1653 printk(KERN_DEBUG "SunZilog: %d chips.\n", NUM_SUNZILOG);
1654
1655 scan.scanner = sunzilog_scan_probe;
1656 scan.depth = 0;
1657 scan.devices = 0;
1658 sunzilog_scan(&scan, prom_getchild(prom_root_node));
1659
1660 sunzilog_prepare();
1661 1325
1662 if (request_irq(zilog_irq, sunzilog_interrupt, SA_SHIRQ, 1326 ret = of_getintprop_default(dp, "slave", -1);
1663 "SunZilog", sunzilog_irq_chain)) { 1327 if (ret != -1)
1664 prom_printf("SunZilog: Unable to register zs interrupt handler.\n"); 1328 return ret;
1665 prom_halt();
1666 }
1667 1329
1668 sunzilog_init_hw(); 1330 if (of_find_property(dp, "keyboard", NULL))
1331 ret = 1;
1332 else
1333 ret = 0;
1669 1334
1670 /* We can only init this once we have probed the Zilogs 1335 return ret;
1671 * in the system. Do not count channels assigned to keyboards 1336}
1672 * or mice when we are deciding how many ports to register.
1673 */
1674 uart_count = 0;
1675 for (i = 0; i < NUM_CHANNELS; i++) {
1676 struct uart_sunzilog_port *up = &sunzilog_port_table[i];
1677 1337
1678 if (ZS_IS_KEYB(up) || ZS_IS_MOUSE(up)) 1338static int zilog_irq = -1;
1679 continue;
1680 1339
1681 uart_count++; 1340static int __devinit zs_probe(struct of_device *dev, const struct of_device_id *match)
1682 } 1341{
1683 1342 struct of_device *op = to_of_device(&dev->dev);
1684 sunzilog_reg.nr = uart_count; 1343 struct uart_sunzilog_port *up;
1685 sunzilog_reg.minor = sunserial_current_minor; 1344 struct zilog_layout __iomem *rp;
1345 int inst = zs_get_instance(dev->node);
1346 int err;
1686 1347
1687 ret = uart_register_driver(&sunzilog_reg); 1348 sunzilog_chip_regs[inst] = of_ioremap(&op->resource[0], 0,
1688 if (ret == 0) { 1349 sizeof(struct zilog_layout),
1689 sunzilog_reg.tty_driver->name_base = sunzilog_reg.minor - 64; 1350 "zs");
1690 sunzilog_reg.cons = SUNZILOG_CONSOLE(); 1351 if (!sunzilog_chip_regs[inst])
1352 return -ENOMEM;
1691 1353
1692 sunserial_current_minor += uart_count; 1354 rp = sunzilog_chip_regs[inst];
1693 1355
1694 for (i = 0; i < NUM_CHANNELS; i++) { 1356 if (zilog_irq == -1) {
1695 struct uart_sunzilog_port *up = &sunzilog_port_table[i]; 1357 zilog_irq = op->irqs[0];
1358 err = request_irq(zilog_irq, sunzilog_interrupt, SA_SHIRQ,
1359 "zs", sunzilog_irq_chain);
1360 if (err) {
1361 of_iounmap(rp, sizeof(struct zilog_layout));
1696 1362
1697 if (ZS_IS_KEYB(up) || ZS_IS_MOUSE(up)) 1363 return err;
1698 continue; 1364 }
1365 }
1699 1366
1700 if (uart_add_one_port(&sunzilog_reg, &up->port)) { 1367 up = &sunzilog_port_table[inst * 2];
1701 printk(KERN_ERR 1368
1702 "SunZilog: failed to add port zs%d\n", i); 1369 /* Channel A */
1703 } 1370 up[0].port.mapbase = op->resource[0].start + 0x00;
1371 up[0].port.membase = (void __iomem *) &rp->channelA;
1372 up[0].port.iotype = UPIO_MEM;
1373 up[0].port.irq = op->irqs[0];
1374 up[0].port.uartclk = ZS_CLOCK;
1375 up[0].port.fifosize = 1;
1376 up[0].port.ops = &sunzilog_pops;
1377 up[0].port.type = PORT_SUNZILOG;
1378 up[0].port.flags = 0;
1379 up[0].port.line = (inst * 2) + 0;
1380 up[0].port.dev = &op->dev;
1381 up[0].flags |= SUNZILOG_FLAG_IS_CHANNEL_A;
1382 if (inst == 1)
1383 up[0].flags |= SUNZILOG_FLAG_CONS_KEYB;
1384 sunzilog_init_hw(&up[0]);
1385
1386 /* Channel B */
1387 up[1].port.mapbase = op->resource[0].start + 0x04;
1388 up[1].port.membase = (void __iomem *) &rp->channelB;
1389 up[1].port.iotype = UPIO_MEM;
1390 up[1].port.irq = op->irqs[0];
1391 up[1].port.uartclk = ZS_CLOCK;
1392 up[1].port.fifosize = 1;
1393 up[1].port.ops = &sunzilog_pops;
1394 up[1].port.type = PORT_SUNZILOG;
1395 up[1].port.flags = 0;
1396 up[1].port.line = (inst * 2) + 1;
1397 up[1].port.dev = &op->dev;
1398 up[1].flags |= 0;
1399 if (inst == 1)
1400 up[1].flags |= SUNZILOG_FLAG_CONS_MOUSE;
1401 sunzilog_init_hw(&up[1]);
1402
1403 if (inst != 1) {
1404 err = uart_add_one_port(&sunzilog_reg, &up[0].port);
1405 if (err) {
1406 of_iounmap(rp, sizeof(struct zilog_layout));
1407 return err;
1408 }
1409 err = uart_add_one_port(&sunzilog_reg, &up[1].port);
1410 if (err) {
1411 uart_remove_one_port(&sunzilog_reg, &up[0].port);
1412 of_iounmap(rp, sizeof(struct zilog_layout));
1413 return err;
1704 } 1414 }
1705 } 1415 }
1706 1416
1707 return ret; 1417 dev_set_drvdata(&dev->dev, &up[0]);
1418
1419 return 0;
1708} 1420}
1709 1421
1710static void __init sunzilog_scan_count(struct zs_probe_scan *t, int node) 1422static void __devexit zs_remove_one(struct uart_sunzilog_port *up)
1711{ 1423{
1712 t->devices++; 1424 if (ZS_IS_KEYB(up) || ZS_IS_MOUSE(up)) {
1425#ifdef CONFIG_SERIO
1426 serio_unregister_port(&up->serio);
1427#endif
1428 } else
1429 uart_remove_one_port(&sunzilog_reg, &up->port);
1713} 1430}
1714 1431
1715static int __init sunzilog_ports_count(void) 1432static int __devexit zs_remove(struct of_device *dev)
1716{ 1433{
1717 struct zs_probe_scan scan; 1434 struct uart_sunzilog_port *up = dev_get_drvdata(&dev->dev);
1435 struct zilog_layout __iomem *regs;
1718 1436
1719 /* Sun4 Zilog setup is hard coded, no probing to do. */ 1437 zs_remove_one(&up[0]);
1720 if (sparc_cpu_model == sun4) 1438 zs_remove_one(&up[1]);
1721 return 2;
1722 1439
1723 scan.scanner = sunzilog_scan_count; 1440 regs = sunzilog_chip_regs[up[0].port.line / 2];
1724 scan.depth = 0; 1441 of_iounmap(regs, sizeof(struct zilog_layout));
1725 scan.devices = 0;
1726 1442
1727 sunzilog_scan(&scan, prom_getchild(prom_root_node)); 1443 dev_set_drvdata(&dev->dev, NULL);
1728 1444
1729 return scan.devices; 1445 return 0;
1730} 1446}
1731 1447
1448static struct of_device_id zs_match[] = {
1449 {
1450 .name = "zs",
1451 },
1452 {},
1453};
1454MODULE_DEVICE_TABLE(of, zs_match);
1455
1456static struct of_platform_driver zs_driver = {
1457 .name = "zs",
1458 .match_table = zs_match,
1459 .probe = zs_probe,
1460 .remove = __devexit_p(zs_remove),
1461};
1462
1732static int __init sunzilog_init(void) 1463static int __init sunzilog_init(void)
1733{ 1464{
1465 struct device_node *dp;
1466 int err;
1734 1467
1735 NUM_SUNZILOG = sunzilog_ports_count(); 1468 NUM_SUNZILOG = 0;
1736 if (NUM_SUNZILOG == 0) 1469 for_each_node_by_name(dp, "zs")
1737 return -ENODEV; 1470 NUM_SUNZILOG++;
1738 1471
1739 sunzilog_alloc_tables(); 1472 if (NUM_SUNZILOG) {
1473 int uart_count;
1740 1474
1741 sunzilog_ports_init(); 1475 err = sunzilog_alloc_tables();
1476 if (err)
1477 return err;
1742 1478
1743 return 0; 1479 /* Subtract 1 for keyboard, 1 for mouse. */
1480 uart_count = (NUM_SUNZILOG * 2) - 2;
1481
1482 sunzilog_reg.nr = uart_count;
1483 sunzilog_reg.minor = sunserial_current_minor;
1484 err = uart_register_driver(&sunzilog_reg);
1485 if (err) {
1486 sunzilog_free_tables();
1487 return err;
1488 }
1489 sunzilog_reg.tty_driver->name_base = sunzilog_reg.minor - 64;
1490 sunzilog_reg.cons = SUNZILOG_CONSOLE();
1491
1492 sunserial_current_minor += uart_count;
1493 }
1494
1495 return of_register_driver(&zs_driver, &of_bus_type);
1744} 1496}
1745 1497
1746static void __exit sunzilog_exit(void) 1498static void __exit sunzilog_exit(void)
1747{ 1499{
1748 int i; 1500 of_unregister_driver(&zs_driver);
1749 1501
1750 for (i = 0; i < NUM_CHANNELS; i++) { 1502 if (zilog_irq != -1) {
1751 struct uart_sunzilog_port *up = &sunzilog_port_table[i]; 1503 free_irq(zilog_irq, sunzilog_irq_chain);
1752 1504 zilog_irq = -1;
1753 if (ZS_IS_KEYB(up) || ZS_IS_MOUSE(up)) {
1754#ifdef CONFIG_SERIO
1755 if (up->serio) {
1756 serio_unregister_port(up->serio);
1757 up->serio = NULL;
1758 }
1759#endif
1760 } else
1761 uart_remove_one_port(&sunzilog_reg, &up->port);
1762 } 1505 }
1763 1506
1764 uart_unregister_driver(&sunzilog_reg); 1507 if (NUM_SUNZILOG) {
1508 uart_unregister_driver(&sunzilog_reg);
1509 sunzilog_free_tables();
1510 }
1765} 1511}
1766 1512
1767module_init(sunzilog_init); 1513module_init(sunzilog_init);
@@ -1769,4 +1515,5 @@ module_exit(sunzilog_exit);
1769 1515
1770MODULE_AUTHOR("David S. Miller"); 1516MODULE_AUTHOR("David S. Miller");
1771MODULE_DESCRIPTION("Sun Zilog serial port driver"); 1517MODULE_DESCRIPTION("Sun Zilog serial port driver");
1518MODULE_VERSION("2.0");
1772MODULE_LICENSE("GPL"); 1519MODULE_LICENSE("GPL");
diff --git a/drivers/video/bw2.c b/drivers/video/bw2.c
index 6577fdfdfc16..c66e3d52cbf3 100644
--- a/drivers/video/bw2.c
+++ b/drivers/video/bw2.c
@@ -1,6 +1,6 @@
1/* bw2.c: BWTWO frame buffer driver 1/* bw2.c: BWTWO frame buffer driver
2 * 2 *
3 * Copyright (C) 2003 David S. Miller (davem@redhat.com) 3 * Copyright (C) 2003, 2006 David S. Miller (davem@davemloft.net)
4 * Copyright (C) 1996,1998 Jakub Jelinek (jj@ultra.linux.cz) 4 * Copyright (C) 1996,1998 Jakub Jelinek (jj@ultra.linux.cz)
5 * Copyright (C) 1996 Miguel de Icaza (miguel@nuclecu.unam.mx) 5 * Copyright (C) 1996 Miguel de Icaza (miguel@nuclecu.unam.mx)
6 * Copyright (C) 1997 Eddie C. Dost (ecd@skynet.be) 6 * Copyright (C) 1997 Eddie C. Dost (ecd@skynet.be)
@@ -19,14 +19,11 @@
19#include <linux/mm.h> 19#include <linux/mm.h>
20 20
21#include <asm/io.h> 21#include <asm/io.h>
22#include <asm/sbus.h>
23#include <asm/oplib.h> 22#include <asm/oplib.h>
23#include <asm/prom.h>
24#include <asm/of_device.h>
24#include <asm/fbio.h> 25#include <asm/fbio.h>
25 26
26#ifdef CONFIG_SPARC32
27#include <asm/sun4paddr.h>
28#endif
29
30#include "sbuslib.h" 27#include "sbuslib.h"
31 28
32/* 29/*
@@ -59,30 +56,30 @@ static struct fb_ops bw2_ops = {
59#define BWTWO_REGISTER_OFFSET 0x400000 56#define BWTWO_REGISTER_OFFSET 0x400000
60 57
61struct bt_regs { 58struct bt_regs {
62 volatile u32 addr; 59 u32 addr;
63 volatile u32 color_map; 60 u32 color_map;
64 volatile u32 control; 61 u32 control;
65 volatile u32 cursor; 62 u32 cursor;
66}; 63};
67 64
68struct bw2_regs { 65struct bw2_regs {
69 struct bt_regs cmap; 66 struct bt_regs cmap;
70 volatile u8 control; 67 u8 control;
71 volatile u8 status; 68 u8 status;
72 volatile u8 cursor_start; 69 u8 cursor_start;
73 volatile u8 cursor_end; 70 u8 cursor_end;
74 volatile u8 h_blank_start; 71 u8 h_blank_start;
75 volatile u8 h_blank_end; 72 u8 h_blank_end;
76 volatile u8 h_sync_start; 73 u8 h_sync_start;
77 volatile u8 h_sync_end; 74 u8 h_sync_end;
78 volatile u8 comp_sync_end; 75 u8 comp_sync_end;
79 volatile u8 v_blank_start_high; 76 u8 v_blank_start_high;
80 volatile u8 v_blank_start_low; 77 u8 v_blank_start_low;
81 volatile u8 v_blank_end; 78 u8 v_blank_end;
82 volatile u8 v_sync_start; 79 u8 v_sync_start;
83 volatile u8 v_sync_end; 80 u8 v_sync_end;
84 volatile u8 xfer_holdoff_start; 81 u8 xfer_holdoff_start;
85 volatile u8 xfer_holdoff_end; 82 u8 xfer_holdoff_end;
86}; 83};
87 84
88/* Status Register Constants */ 85/* Status Register Constants */
@@ -117,9 +114,8 @@ struct bw2_par {
117#define BW2_FLAG_BLANKED 0x00000001 114#define BW2_FLAG_BLANKED 0x00000001
118 115
119 unsigned long physbase; 116 unsigned long physbase;
117 unsigned long which_io;
120 unsigned long fbsize; 118 unsigned long fbsize;
121
122 struct sbus_dev *sdev;
123}; 119};
124 120
125/** 121/**
@@ -174,9 +170,7 @@ static int bw2_mmap(struct fb_info *info, struct vm_area_struct *vma)
174 170
175 return sbusfb_mmap_helper(bw2_mmap_map, 171 return sbusfb_mmap_helper(bw2_mmap_map,
176 par->physbase, par->fbsize, 172 par->physbase, par->fbsize,
177 (par->sdev ? 173 par->which_io,
178 par->sdev->reg_addrs[0].which_io :
179 0),
180 vma); 174 vma);
181} 175}
182 176
@@ -288,139 +282,124 @@ static void bw2_do_default_mode(struct bw2_par *par, struct fb_info *info,
288struct all_info { 282struct all_info {
289 struct fb_info info; 283 struct fb_info info;
290 struct bw2_par par; 284 struct bw2_par par;
291 struct list_head list;
292}; 285};
293static LIST_HEAD(bw2_list);
294 286
295static void bw2_init_one(struct sbus_dev *sdev) 287static int __devinit bw2_init_one(struct of_device *op)
296{ 288{
289 struct device_node *dp = op->node;
297 struct all_info *all; 290 struct all_info *all;
298 struct resource *resp; 291 int linebytes, err;
299#ifdef CONFIG_SUN4
300 struct resource res;
301#endif
302 int linebytes;
303 292
304 all = kmalloc(sizeof(*all), GFP_KERNEL); 293 all = kzalloc(sizeof(*all), GFP_KERNEL);
305 if (!all) { 294 if (!all)
306 printk(KERN_ERR "bw2: Cannot allocate memory.\n"); 295 return -ENOMEM;
307 return;
308 }
309 memset(all, 0, sizeof(*all));
310
311 INIT_LIST_HEAD(&all->list);
312 296
313 spin_lock_init(&all->par.lock); 297 spin_lock_init(&all->par.lock);
314 all->par.sdev = sdev; 298
315 299 all->par.physbase = op->resource[0].start;
316#ifdef CONFIG_SUN4 300 all->par.which_io = op->resource[0].flags & IORESOURCE_BITS;
317 if (!sdev) { 301
318 all->par.physbase = sun4_bwtwo_physaddr; 302 sbusfb_fill_var(&all->info.var, dp->node, 1);
319 res.start = sun4_bwtwo_physaddr; 303 linebytes = of_getintprop_default(dp, "linebytes",
320 res.end = res.start + BWTWO_REGISTER_OFFSET + sizeof(struct bw2_regs) - 1; 304 all->info.var.xres);
321 res.flags = IORESOURCE_IO; 305
322 resp = &res;
323 all->info.var.xres = all->info.var.xres_virtual = 1152;
324 all->info.var.yres = all->info.var.yres_virtual = 900;
325 all->info.var.bits_per_pixel = 1;
326 linebytes = 1152 / 8;
327 } else
328#else
329 {
330 BUG_ON(!sdev);
331 all->par.physbase = sdev->reg_addrs[0].phys_addr;
332 resp = &sdev->resource[0];
333 sbusfb_fill_var(&all->info.var, (sdev ? sdev->prom_node : 0), 1);
334 linebytes = prom_getintdefault(sdev->prom_node, "linebytes",
335 all->info.var.xres);
336 }
337#endif
338 all->info.var.red.length = all->info.var.green.length = 306 all->info.var.red.length = all->info.var.green.length =
339 all->info.var.blue.length = all->info.var.bits_per_pixel; 307 all->info.var.blue.length = all->info.var.bits_per_pixel;
340 all->info.var.red.offset = all->info.var.green.offset = 308 all->info.var.red.offset = all->info.var.green.offset =
341 all->info.var.blue.offset = 0; 309 all->info.var.blue.offset = 0;
342 310
343 all->par.regs = sbus_ioremap(resp, BWTWO_REGISTER_OFFSET, 311 all->par.regs = of_ioremap(&op->resource[0], BWTWO_REGISTER_OFFSET,
344 sizeof(struct bw2_regs), "bw2 regs"); 312 sizeof(struct bw2_regs), "bw2 regs");
345 313
346 if (sdev && !prom_getbool(sdev->prom_node, "width")) 314 if (!of_find_property(dp, "width", NULL))
347 bw2_do_default_mode(&all->par, &all->info, &linebytes); 315 bw2_do_default_mode(&all->par, &all->info, &linebytes);
348 316
349 all->par.fbsize = PAGE_ALIGN(linebytes * all->info.var.yres); 317 all->par.fbsize = PAGE_ALIGN(linebytes * all->info.var.yres);
350 318
351 all->info.flags = FBINFO_DEFAULT; 319 all->info.flags = FBINFO_DEFAULT;
352 all->info.fbops = &bw2_ops; 320 all->info.fbops = &bw2_ops;
353#if defined(CONFIG_SPARC32) 321
354 if (sdev) 322 all->info.screen_base =
355 all->info.screen_base = (char __iomem *) 323 sbus_ioremap(&op->resource[0], 0, all->par.fbsize, "bw2 ram");
356 prom_getintdefault(sdev->prom_node, "address", 0);
357#endif
358 if (!all->info.screen_base)
359 all->info.screen_base =
360 sbus_ioremap(resp, 0, all->par.fbsize, "bw2 ram");
361 all->info.par = &all->par; 324 all->info.par = &all->par;
362 325
363 bw2_blank(0, &all->info); 326 bw2_blank(0, &all->info);
364 327
365 bw2_init_fix(&all->info, linebytes); 328 bw2_init_fix(&all->info, linebytes);
366 329
367 if (register_framebuffer(&all->info) < 0) { 330 err= register_framebuffer(&all->info);
368 printk(KERN_ERR "bw2: Could not register framebuffer.\n"); 331 if (err < 0) {
332 of_iounmap(all->par.regs, sizeof(struct bw2_regs));
333 of_iounmap(all->info.screen_base, all->par.fbsize);
369 kfree(all); 334 kfree(all);
370 return; 335 return err;
371 } 336 }
372 337
373 list_add(&all->list, &bw2_list); 338 dev_set_drvdata(&op->dev, all);
339
340 printk("%s: bwtwo at %lx:%lx\n",
341 dp->full_name,
342 all->par.which_io, all->par.physbase);
374 343
375 printk("bw2: bwtwo at %lx:%lx\n", 344 return 0;
376 (long) (sdev ? sdev->reg_addrs[0].which_io : 0),
377 (long) all->par.physbase);
378} 345}
379 346
380int __init bw2_init(void) 347static int __devinit bw2_probe(struct of_device *dev, const struct of_device_id *match)
381{ 348{
382 struct sbus_bus *sbus; 349 struct of_device *op = to_of_device(&dev->dev);
383 struct sbus_dev *sdev;
384 350
385 if (fb_get_options("bw2fb", NULL)) 351 return bw2_init_one(op);
386 return -ENODEV; 352}
387 353
388#ifdef CONFIG_SUN4 354static int __devexit bw2_remove(struct of_device *dev)
389 bw2_init_one(NULL); 355{
390#endif 356 struct all_info *all = dev_get_drvdata(&dev->dev);
391 for_all_sbusdev(sdev, sbus) { 357
392 if (!strcmp(sdev->prom_name, "bwtwo")) 358 unregister_framebuffer(&all->info);
393 bw2_init_one(sdev); 359
394 } 360 of_iounmap(all->par.regs, sizeof(struct bw2_regs));
361 of_iounmap(all->info.screen_base, all->par.fbsize);
362
363 kfree(all);
364
365 dev_set_drvdata(&dev->dev, NULL);
395 366
396 return 0; 367 return 0;
397} 368}
398 369
399void __exit bw2_exit(void) 370static struct of_device_id bw2_match[] = {
400{ 371 {
401 struct list_head *pos, *tmp; 372 .name = "bwtwo",
373 },
374 {},
375};
376MODULE_DEVICE_TABLE(of, bw2_match);
402 377
403 list_for_each_safe(pos, tmp, &bw2_list) { 378static struct of_platform_driver bw2_driver = {
404 struct all_info *all = list_entry(pos, typeof(*all), list); 379 .name = "bw2",
380 .match_table = bw2_match,
381 .probe = bw2_probe,
382 .remove = __devexit_p(bw2_remove),
383};
405 384
406 unregister_framebuffer(&all->info); 385static int __init bw2_init(void)
407 kfree(all); 386{
408 } 387 if (fb_get_options("bw2fb", NULL))
388 return -ENODEV;
389
390 return of_register_driver(&bw2_driver, &of_bus_type);
409} 391}
410 392
411int __init 393static void __exit bw2_exit(void)
412bw2_setup(char *arg)
413{ 394{
414 /* No cmdline options yet... */ 395 return of_unregister_driver(&bw2_driver);
415 return 0;
416} 396}
417 397
418module_init(bw2_init);
419 398
420#ifdef MODULE 399module_init(bw2_init);
421module_exit(bw2_exit); 400module_exit(bw2_exit);
422#endif
423 401
424MODULE_DESCRIPTION("framebuffer driver for BWTWO chipsets"); 402MODULE_DESCRIPTION("framebuffer driver for BWTWO chipsets");
425MODULE_AUTHOR("David S. Miller <davem@redhat.com>"); 403MODULE_AUTHOR("David S. Miller <davem@davemloft.net>");
404MODULE_VERSION("2.0");
426MODULE_LICENSE("GPL"); 405MODULE_LICENSE("GPL");
diff --git a/drivers/video/cg14.c b/drivers/video/cg14.c
index 63b6c79c8a0a..7f926c619b61 100644
--- a/drivers/video/cg14.c
+++ b/drivers/video/cg14.c
@@ -1,6 +1,6 @@
1/* cg14.c: CGFOURTEEN frame buffer driver 1/* cg14.c: CGFOURTEEN frame buffer driver
2 * 2 *
3 * Copyright (C) 2003 David S. Miller (davem@redhat.com) 3 * Copyright (C) 2003, 2006 David S. Miller (davem@davemloft.net)
4 * Copyright (C) 1996,1998 Jakub Jelinek (jj@ultra.linux.cz) 4 * Copyright (C) 1996,1998 Jakub Jelinek (jj@ultra.linux.cz)
5 * Copyright (C) 1995 Miguel de Icaza (miguel@nuclecu.unam.mx) 5 * Copyright (C) 1995 Miguel de Icaza (miguel@nuclecu.unam.mx)
6 * 6 *
@@ -18,8 +18,8 @@
18#include <linux/mm.h> 18#include <linux/mm.h>
19 19
20#include <asm/io.h> 20#include <asm/io.h>
21#include <asm/sbus.h> 21#include <asm/prom.h>
22#include <asm/oplib.h> 22#include <asm/of_device.h>
23#include <asm/fbio.h> 23#include <asm/fbio.h>
24 24
25#include "sbuslib.h" 25#include "sbuslib.h"
@@ -99,73 +99,73 @@ static struct fb_ops cg14_ops = {
99#define CG14_MCR_PIXMODE_32 3 99#define CG14_MCR_PIXMODE_32 3
100 100
101struct cg14_regs{ 101struct cg14_regs{
102 volatile u8 mcr; /* Master Control Reg */ 102 u8 mcr; /* Master Control Reg */
103 volatile u8 ppr; /* Packed Pixel Reg */ 103 u8 ppr; /* Packed Pixel Reg */
104 volatile u8 tms[2]; /* Test Mode Status Regs */ 104 u8 tms[2]; /* Test Mode Status Regs */
105 volatile u8 msr; /* Master Status Reg */ 105 u8 msr; /* Master Status Reg */
106 volatile u8 fsr; /* Fault Status Reg */ 106 u8 fsr; /* Fault Status Reg */
107 volatile u8 rev; /* Revision & Impl */ 107 u8 rev; /* Revision & Impl */
108 volatile u8 ccr; /* Clock Control Reg */ 108 u8 ccr; /* Clock Control Reg */
109 volatile u32 tmr; /* Test Mode Read Back */ 109 u32 tmr; /* Test Mode Read Back */
110 volatile u8 mod; /* Monitor Operation Data Reg */ 110 u8 mod; /* Monitor Operation Data Reg */
111 volatile u8 acr; /* Aux Control */ 111 u8 acr; /* Aux Control */
112 u8 xxx0[6]; 112 u8 xxx0[6];
113 volatile u16 hct; /* Hor Counter */ 113 u16 hct; /* Hor Counter */
114 volatile u16 vct; /* Vert Counter */ 114 u16 vct; /* Vert Counter */
115 volatile u16 hbs; /* Hor Blank Start */ 115 u16 hbs; /* Hor Blank Start */
116 volatile u16 hbc; /* Hor Blank Clear */ 116 u16 hbc; /* Hor Blank Clear */
117 volatile u16 hss; /* Hor Sync Start */ 117 u16 hss; /* Hor Sync Start */
118 volatile u16 hsc; /* Hor Sync Clear */ 118 u16 hsc; /* Hor Sync Clear */
119 volatile u16 csc; /* Composite Sync Clear */ 119 u16 csc; /* Composite Sync Clear */
120 volatile u16 vbs; /* Vert Blank Start */ 120 u16 vbs; /* Vert Blank Start */
121 volatile u16 vbc; /* Vert Blank Clear */ 121 u16 vbc; /* Vert Blank Clear */
122 volatile u16 vss; /* Vert Sync Start */ 122 u16 vss; /* Vert Sync Start */
123 volatile u16 vsc; /* Vert Sync Clear */ 123 u16 vsc; /* Vert Sync Clear */
124 volatile u16 xcs; 124 u16 xcs;
125 volatile u16 xcc; 125 u16 xcc;
126 volatile u16 fsa; /* Fault Status Address */ 126 u16 fsa; /* Fault Status Address */
127 volatile u16 adr; /* Address Registers */ 127 u16 adr; /* Address Registers */
128 u8 xxx1[0xce]; 128 u8 xxx1[0xce];
129 volatile u8 pcg[0x100]; /* Pixel Clock Generator */ 129 u8 pcg[0x100]; /* Pixel Clock Generator */
130 volatile u32 vbr; /* Frame Base Row */ 130 u32 vbr; /* Frame Base Row */
131 volatile u32 vmcr; /* VBC Master Control */ 131 u32 vmcr; /* VBC Master Control */
132 volatile u32 vcr; /* VBC refresh */ 132 u32 vcr; /* VBC refresh */
133 volatile u32 vca; /* VBC Config */ 133 u32 vca; /* VBC Config */
134}; 134};
135 135
136#define CG14_CCR_ENABLE 0x04 136#define CG14_CCR_ENABLE 0x04
137#define CG14_CCR_SELECT 0x02 /* HW/Full screen */ 137#define CG14_CCR_SELECT 0x02 /* HW/Full screen */
138 138
139struct cg14_cursor { 139struct cg14_cursor {
140 volatile u32 cpl0[32]; /* Enable plane 0 */ 140 u32 cpl0[32]; /* Enable plane 0 */
141 volatile u32 cpl1[32]; /* Color selection plane */ 141 u32 cpl1[32]; /* Color selection plane */
142 volatile u8 ccr; /* Cursor Control Reg */ 142 u8 ccr; /* Cursor Control Reg */
143 u8 xxx0[3]; 143 u8 xxx0[3];
144 volatile u16 cursx; /* Cursor x,y position */ 144 u16 cursx; /* Cursor x,y position */
145 volatile u16 cursy; /* Cursor x,y position */ 145 u16 cursy; /* Cursor x,y position */
146 volatile u32 color0; 146 u32 color0;
147 volatile u32 color1; 147 u32 color1;
148 u32 xxx1[0x1bc]; 148 u32 xxx1[0x1bc];
149 volatile u32 cpl0i[32]; /* Enable plane 0 autoinc */ 149 u32 cpl0i[32]; /* Enable plane 0 autoinc */
150 volatile u32 cpl1i[32]; /* Color selection autoinc */ 150 u32 cpl1i[32]; /* Color selection autoinc */
151}; 151};
152 152
153struct cg14_dac { 153struct cg14_dac {
154 volatile u8 addr; /* Address Register */ 154 u8 addr; /* Address Register */
155 u8 xxx0[255]; 155 u8 xxx0[255];
156 volatile u8 glut; /* Gamma table */ 156 u8 glut; /* Gamma table */
157 u8 xxx1[255]; 157 u8 xxx1[255];
158 volatile u8 select; /* Register Select */ 158 u8 select; /* Register Select */
159 u8 xxx2[255]; 159 u8 xxx2[255];
160 volatile u8 mode; /* Mode Register */ 160 u8 mode; /* Mode Register */
161}; 161};
162 162
163struct cg14_xlut{ 163struct cg14_xlut{
164 volatile u8 x_xlut [256]; 164 u8 x_xlut [256];
165 volatile u8 x_xlutd [256]; 165 u8 x_xlutd [256];
166 u8 xxx0[0x600]; 166 u8 xxx0[0x600];
167 volatile u8 x_xlut_inc [256]; 167 u8 x_xlut_inc [256];
168 volatile u8 x_xlutd_inc [256]; 168 u8 x_xlutd_inc [256];
169}; 169};
170 170
171/* Color look up table (clut) */ 171/* Color look up table (clut) */
@@ -204,7 +204,6 @@ struct cg14_par {
204 204
205 int mode; 205 int mode;
206 int ramsize; 206 int ramsize;
207 struct sbus_dev *sdev;
208}; 207};
209 208
210static void __cg14_reset(struct cg14_par *par) 209static void __cg14_reset(struct cg14_par *par)
@@ -355,14 +354,9 @@ static int cg14_ioctl(struct fb_info *info, unsigned int cmd, unsigned long arg)
355 * Initialisation 354 * Initialisation
356 */ 355 */
357 356
358static void cg14_init_fix(struct fb_info *info, int linebytes) 357static void cg14_init_fix(struct fb_info *info, int linebytes, struct device_node *dp)
359{ 358{
360 struct cg14_par *par = (struct cg14_par *)info->par; 359 const char *name = dp->name;
361 const char *name;
362
363 name = "cgfourteen";
364 if (par->sdev)
365 name = par->sdev->prom_name;
366 360
367 strlcpy(info->fix.id, name, sizeof(info->fix.id)); 361 strlcpy(info->fix.id, name, sizeof(info->fix.id));
368 362
@@ -456,98 +450,81 @@ static struct sbus_mmap_map __cg14_mmap_map[CG14_MMAP_ENTRIES] __initdata = {
456struct all_info { 450struct all_info {
457 struct fb_info info; 451 struct fb_info info;
458 struct cg14_par par; 452 struct cg14_par par;
459 struct list_head list;
460}; 453};
461static LIST_HEAD(cg14_list);
462 454
463static void cg14_init_one(struct sbus_dev *sdev, int node, int parent_node) 455static void cg14_unmap_regs(struct all_info *all)
464{ 456{
465 struct all_info *all; 457 if (all->par.regs)
466 unsigned long phys, rphys; 458 of_iounmap(all->par.regs, sizeof(struct cg14_regs));
467 u32 bases[6]; 459 if (all->par.clut)
468 int is_8mb, linebytes, i; 460 of_iounmap(all->par.clut, sizeof(struct cg14_clut));
469 461 if (all->par.cursor)
470 if (!sdev) { 462 of_iounmap(all->par.cursor, sizeof(struct cg14_cursor));
471 if (prom_getproperty(node, "address", 463 if (all->info.screen_base)
472 (char *) &bases[0], sizeof(bases)) <= 0 464 of_iounmap(all->info.screen_base, all->par.fbsize);
473 || !bases[0]) { 465}
474 printk(KERN_ERR "cg14: Device is not mapped.\n");
475 return;
476 }
477 if (__get_iospace(bases[0]) != __get_iospace(bases[1])) {
478 printk(KERN_ERR "cg14: I/O spaces don't match.\n");
479 return;
480 }
481 }
482 466
483 all = kmalloc(sizeof(*all), GFP_KERNEL); 467static int __devinit cg14_init_one(struct of_device *op)
484 if (!all) { 468{
485 printk(KERN_ERR "cg14: Cannot allocate memory.\n"); 469 struct device_node *dp = op->node;
486 return; 470 struct all_info *all;
487 } 471 int is_8mb, linebytes, i, err;
488 memset(all, 0, sizeof(*all));
489 472
490 INIT_LIST_HEAD(&all->list); 473 all = kzalloc(sizeof(*all), GFP_KERNEL);
474 if (!all)
475 return -ENOMEM;
491 476
492 spin_lock_init(&all->par.lock); 477 spin_lock_init(&all->par.lock);
493 478
494 sbusfb_fill_var(&all->info.var, node, 8); 479 sbusfb_fill_var(&all->info.var, dp->node, 8);
495 all->info.var.red.length = 8; 480 all->info.var.red.length = 8;
496 all->info.var.green.length = 8; 481 all->info.var.green.length = 8;
497 all->info.var.blue.length = 8; 482 all->info.var.blue.length = 8;
498 483
499 linebytes = prom_getintdefault(node, "linebytes", 484 linebytes = of_getintprop_default(dp, "linebytes",
500 all->info.var.xres); 485 all->info.var.xres);
501 all->par.fbsize = PAGE_ALIGN(linebytes * all->info.var.yres); 486 all->par.fbsize = PAGE_ALIGN(linebytes * all->info.var.yres);
502 487
503 all->par.sdev = sdev; 488 if (!strcmp(dp->parent->name, "sbus") ||
504 if (sdev) { 489 !strcmp(dp->parent->name, "sbi")) {
505 rphys = sdev->reg_addrs[0].phys_addr; 490 all->par.physbase = op->resource[0].start;
506 all->par.physbase = phys = sdev->reg_addrs[1].phys_addr; 491 all->par.iospace = op->resource[0].flags & IORESOURCE_BITS;
507 all->par.iospace = sdev->reg_addrs[0].which_io;
508
509 all->par.regs = sbus_ioremap(&sdev->resource[0], 0,
510 sizeof(struct cg14_regs),
511 "cg14 regs");
512 all->par.clut = sbus_ioremap(&sdev->resource[0], CG14_CLUT1,
513 sizeof(struct cg14_clut),
514 "cg14 clut");
515 all->par.cursor = sbus_ioremap(&sdev->resource[0], CG14_CURSORREGS,
516 sizeof(struct cg14_cursor),
517 "cg14 cursor");
518 all->info.screen_base = sbus_ioremap(&sdev->resource[1], 0,
519 all->par.fbsize, "cg14 ram");
520 } else { 492 } else {
521 rphys = __get_phys(bases[0]); 493 all->par.physbase = op->resource[1].start;
522 all->par.physbase = phys = __get_phys(bases[1]); 494 all->par.iospace = op->resource[0].flags & IORESOURCE_BITS;
523 all->par.iospace = __get_iospace(bases[0]);
524 all->par.regs = (struct cg14_regs __iomem *)(unsigned long)bases[0];
525 all->par.clut = (struct cg14_clut __iomem *)((unsigned long)bases[0] +
526 CG14_CLUT1);
527 all->par.cursor =
528 (struct cg14_cursor __iomem *)((unsigned long)bases[0] +
529 CG14_CURSORREGS);
530
531 all->info.screen_base = (char __iomem *)(unsigned long)bases[1];
532 } 495 }
533 496
534 prom_getproperty(node, "reg", (char *) &bases[0], sizeof(bases)); 497 all->par.regs = of_ioremap(&op->resource[0], 0,
535 is_8mb = (bases[5] == 0x800000); 498 sizeof(struct cg14_regs), "cg14 regs");
499 all->par.clut = of_ioremap(&op->resource[0], CG14_CLUT1,
500 sizeof(struct cg14_clut), "cg14 clut");
501 all->par.cursor = of_ioremap(&op->resource[0], CG14_CURSORREGS,
502 sizeof(struct cg14_cursor), "cg14 cursor");
536 503
537 if (sizeof(all->par.mmap_map) != sizeof(__cg14_mmap_map)) { 504 all->info.screen_base = of_ioremap(&op->resource[1], 0,
538 extern void __cg14_mmap_sized_wrongly(void); 505 all->par.fbsize, "cg14 ram");
539 506
540 __cg14_mmap_sized_wrongly(); 507 if (!all->par.regs || !all->par.clut || !all->par.cursor ||
541 } 508 !all->info.screen_base)
509 cg14_unmap_regs(all);
510
511 is_8mb = (((op->resource[1].end - op->resource[1].start) + 1) ==
512 (8 * 1024 * 1024));
513
514 BUILD_BUG_ON(sizeof(all->par.mmap_map) != sizeof(__cg14_mmap_map));
542 515
543 memcpy(&all->par.mmap_map, &__cg14_mmap_map, sizeof(all->par.mmap_map)); 516 memcpy(&all->par.mmap_map, &__cg14_mmap_map,
517 sizeof(all->par.mmap_map));
518
544 for (i = 0; i < CG14_MMAP_ENTRIES; i++) { 519 for (i = 0; i < CG14_MMAP_ENTRIES; i++) {
545 struct sbus_mmap_map *map = &all->par.mmap_map[i]; 520 struct sbus_mmap_map *map = &all->par.mmap_map[i];
546 521
547 if (!map->size) 522 if (!map->size)
548 break; 523 break;
549 if (map->poff & 0x80000000) 524 if (map->poff & 0x80000000)
550 map->poff = (map->poff & 0x7fffffff) + rphys - phys; 525 map->poff = (map->poff & 0x7fffffff) +
526 (op->resource[0].start -
527 op->resource[1].start);
551 if (is_8mb && 528 if (is_8mb &&
552 map->size >= 0x100000 && 529 map->size >= 0x100000 &&
553 map->size <= 0x400000) 530 map->size <= 0x400000)
@@ -564,84 +541,87 @@ static void cg14_init_one(struct sbus_dev *sdev, int node, int parent_node)
564 __cg14_reset(&all->par); 541 __cg14_reset(&all->par);
565 542
566 if (fb_alloc_cmap(&all->info.cmap, 256, 0)) { 543 if (fb_alloc_cmap(&all->info.cmap, 256, 0)) {
567 printk(KERN_ERR "cg14: Could not allocate color map.\n"); 544 cg14_unmap_regs(all);
568 kfree(all); 545 kfree(all);
569 return; 546 return -ENOMEM;
570 } 547 }
571 fb_set_cmap(&all->info.cmap, &all->info); 548 fb_set_cmap(&all->info.cmap, &all->info);
572 549
573 cg14_init_fix(&all->info, linebytes); 550 cg14_init_fix(&all->info, linebytes, dp);
574 551
575 if (register_framebuffer(&all->info) < 0) { 552 err = register_framebuffer(&all->info);
576 printk(KERN_ERR "cg14: Could not register framebuffer.\n"); 553 if (err < 0) {
577 fb_dealloc_cmap(&all->info.cmap); 554 fb_dealloc_cmap(&all->info.cmap);
555 cg14_unmap_regs(all);
578 kfree(all); 556 kfree(all);
579 return; 557 return err;
580 } 558 }
581 559
582 list_add(&all->list, &cg14_list); 560 dev_set_drvdata(&op->dev, all);
583 561
584 printk("cg14: cgfourteen at %lx:%lx, %dMB\n", 562 printk("%s: cgfourteen at %lx:%lx, %dMB\n",
585 all->par.iospace, all->par.physbase, all->par.ramsize >> 20); 563 dp->full_name,
564 all->par.iospace, all->par.physbase,
565 all->par.ramsize >> 20);
586 566
567 return 0;
587} 568}
588 569
589int __init cg14_init(void) 570static int __devinit cg14_probe(struct of_device *dev, const struct of_device_id *match)
590{ 571{
591 struct sbus_bus *sbus; 572 struct of_device *op = to_of_device(&dev->dev);
592 struct sbus_dev *sdev;
593 573
594 if (fb_get_options("cg14fb", NULL)) 574 return cg14_init_one(op);
595 return -ENODEV; 575}
596 576
597#ifdef CONFIG_SPARC32 577static int __devexit cg14_remove(struct of_device *dev)
598 { 578{
599 int root, node; 579 struct all_info *all = dev_get_drvdata(&dev->dev);
600 580
601 root = prom_getchild(prom_root_node); 581 unregister_framebuffer(&all->info);
602 root = prom_searchsiblings(root, "obio"); 582 fb_dealloc_cmap(&all->info.cmap);
603 if (root) { 583
604 node = prom_searchsiblings(prom_getchild(root), 584 cg14_unmap_regs(all);
605 "cgfourteen"); 585
606 if (node) 586 kfree(all);
607 cg14_init_one(NULL, node, root); 587
608 } 588 dev_set_drvdata(&dev->dev, NULL);
609 }
610#endif
611 for_all_sbusdev(sdev, sbus) {
612 if (!strcmp(sdev->prom_name, "cgfourteen"))
613 cg14_init_one(sdev, sdev->prom_node, sbus->prom_node);
614 }
615 589
616 return 0; 590 return 0;
617} 591}
618 592
619void __exit cg14_exit(void) 593static struct of_device_id cg14_match[] = {
620{ 594 {
621 struct list_head *pos, *tmp; 595 .name = "cgfourteen",
596 },
597 {},
598};
599MODULE_DEVICE_TABLE(of, cg14_match);
622 600
623 list_for_each_safe(pos, tmp, &cg14_list) { 601static struct of_platform_driver cg14_driver = {
624 struct all_info *all = list_entry(pos, typeof(*all), list); 602 .name = "cg14",
603 .match_table = cg14_match,
604 .probe = cg14_probe,
605 .remove = __devexit_p(cg14_remove),
606};
625 607
626 unregister_framebuffer(&all->info); 608int __init cg14_init(void)
627 fb_dealloc_cmap(&all->info.cmap); 609{
628 kfree(all); 610 if (fb_get_options("cg14fb", NULL))
629 } 611 return -ENODEV;
612
613 return of_register_driver(&cg14_driver, &of_bus_type);
630} 614}
631 615
632int __init 616void __exit cg14_exit(void)
633cg14_setup(char *arg)
634{ 617{
635 /* No cmdline options yet... */ 618 of_unregister_driver(&cg14_driver);
636 return 0;
637} 619}
638 620
639module_init(cg14_init); 621module_init(cg14_init);
640
641#ifdef MODULE
642module_exit(cg14_exit); 622module_exit(cg14_exit);
643#endif
644 623
645MODULE_DESCRIPTION("framebuffer driver for CGfourteen chipsets"); 624MODULE_DESCRIPTION("framebuffer driver for CGfourteen chipsets");
646MODULE_AUTHOR("David S. Miller <davem@redhat.com>"); 625MODULE_AUTHOR("David S. Miller <davem@davemloft.net>");
626MODULE_VERSION("2.0");
647MODULE_LICENSE("GPL"); 627MODULE_LICENSE("GPL");
diff --git a/drivers/video/cg3.c b/drivers/video/cg3.c
index 3de6e1b5ab2f..9c8c753ef454 100644
--- a/drivers/video/cg3.c
+++ b/drivers/video/cg3.c
@@ -1,6 +1,6 @@
1/* cg3.c: CGTHREE frame buffer driver 1/* cg3.c: CGTHREE frame buffer driver
2 * 2 *
3 * Copyright (C) 2003 David S. Miller (davem@redhat.com) 3 * Copyright (C) 2003, 2006 David S. Miller (davem@davemloft.net)
4 * Copyright (C) 1996,1998 Jakub Jelinek (jj@ultra.linux.cz) 4 * Copyright (C) 1996,1998 Jakub Jelinek (jj@ultra.linux.cz)
5 * Copyright (C) 1996 Miguel de Icaza (miguel@nuclecu.unam.mx) 5 * Copyright (C) 1996 Miguel de Icaza (miguel@nuclecu.unam.mx)
6 * Copyright (C) 1997 Eddie C. Dost (ecd@skynet.be) 6 * Copyright (C) 1997 Eddie C. Dost (ecd@skynet.be)
@@ -19,8 +19,9 @@
19#include <linux/mm.h> 19#include <linux/mm.h>
20 20
21#include <asm/io.h> 21#include <asm/io.h>
22#include <asm/sbus.h>
23#include <asm/oplib.h> 22#include <asm/oplib.h>
23#include <asm/prom.h>
24#include <asm/of_device.h>
24#include <asm/fbio.h> 25#include <asm/fbio.h>
25 26
26#include "sbuslib.h" 27#include "sbuslib.h"
@@ -80,30 +81,30 @@ enum cg3_type {
80}; 81};
81 82
82struct bt_regs { 83struct bt_regs {
83 volatile u32 addr; 84 u32 addr;
84 volatile u32 color_map; 85 u32 color_map;
85 volatile u32 control; 86 u32 control;
86 volatile u32 cursor; 87 u32 cursor;
87}; 88};
88 89
89struct cg3_regs { 90struct cg3_regs {
90 struct bt_regs cmap; 91 struct bt_regs cmap;
91 volatile u8 control; 92 u8 control;
92 volatile u8 status; 93 u8 status;
93 volatile u8 cursor_start; 94 u8 cursor_start;
94 volatile u8 cursor_end; 95 u8 cursor_end;
95 volatile u8 h_blank_start; 96 u8 h_blank_start;
96 volatile u8 h_blank_end; 97 u8 h_blank_end;
97 volatile u8 h_sync_start; 98 u8 h_sync_start;
98 volatile u8 h_sync_end; 99 u8 h_sync_end;
99 volatile u8 comp_sync_end; 100 u8 comp_sync_end;
100 volatile u8 v_blank_start_high; 101 u8 v_blank_start_high;
101 volatile u8 v_blank_start_low; 102 u8 v_blank_start_low;
102 volatile u8 v_blank_end; 103 u8 v_blank_end;
103 volatile u8 v_sync_start; 104 u8 v_sync_start;
104 volatile u8 v_sync_end; 105 u8 v_sync_end;
105 volatile u8 xfer_holdoff_start; 106 u8 xfer_holdoff_start;
106 volatile u8 xfer_holdoff_end; 107 u8 xfer_holdoff_end;
107}; 108};
108 109
109/* Offset of interesting structures in the OBIO space */ 110/* Offset of interesting structures in the OBIO space */
@@ -120,9 +121,8 @@ struct cg3_par {
120#define CG3_FLAG_RDI 0x00000002 121#define CG3_FLAG_RDI 0x00000002
121 122
122 unsigned long physbase; 123 unsigned long physbase;
124 unsigned long which_io;
123 unsigned long fbsize; 125 unsigned long fbsize;
124
125 struct sbus_dev *sdev;
126}; 126};
127 127
128/** 128/**
@@ -235,7 +235,7 @@ static int cg3_mmap(struct fb_info *info, struct vm_area_struct *vma)
235 235
236 return sbusfb_mmap_helper(cg3_mmap_map, 236 return sbusfb_mmap_helper(cg3_mmap_map,
237 par->physbase, par->fbsize, 237 par->physbase, par->fbsize,
238 par->sdev->reg_addrs[0].which_io, 238 par->which_io,
239 vma); 239 vma);
240} 240}
241 241
@@ -252,11 +252,9 @@ static int cg3_ioctl(struct fb_info *info, unsigned int cmd, unsigned long arg)
252 */ 252 */
253 253
254static void 254static void
255cg3_init_fix(struct fb_info *info, int linebytes) 255cg3_init_fix(struct fb_info *info, int linebytes, struct device_node *dp)
256{ 256{
257 struct cg3_par *par = (struct cg3_par *)info->par; 257 strlcpy(info->fix.id, dp->name, sizeof(info->fix.id));
258
259 strlcpy(info->fix.id, par->sdev->prom_name, sizeof(info->fix.id));
260 258
261 info->fix.type = FB_TYPE_PACKED_PIXELS; 259 info->fix.type = FB_TYPE_PACKED_PIXELS;
262 info->fix.visual = FB_VISUAL_PSEUDOCOLOR; 260 info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
@@ -267,16 +265,15 @@ cg3_init_fix(struct fb_info *info, int linebytes)
267} 265}
268 266
269static void cg3_rdi_maybe_fixup_var(struct fb_var_screeninfo *var, 267static void cg3_rdi_maybe_fixup_var(struct fb_var_screeninfo *var,
270 struct sbus_dev *sdev) 268 struct device_node *dp)
271{ 269{
272 char buffer[40]; 270 char *params;
273 char *p; 271 char *p;
274 int ww, hh; 272 int ww, hh;
275 273
276 *buffer = 0; 274 params = of_get_property(dp, "params", NULL);
277 prom_getstring(sdev->prom_node, "params", buffer, sizeof(buffer)); 275 if (params) {
278 if (*buffer) { 276 ww = simple_strtoul(params, &p, 10);
279 ww = simple_strtoul(buffer, &p, 10);
280 if (ww && *p == 'x') { 277 if (ww && *p == 'x') {
281 hh = simple_strtoul(p + 1, &p, 10); 278 hh = simple_strtoul(p + 1, &p, 10);
282 if (hh && *p == '-') { 279 if (hh && *p == '-') {
@@ -348,11 +345,11 @@ static void cg3_do_default_mode(struct cg3_par *par)
348 sbus_writeb(p[1], regp); 345 sbus_writeb(p[1], regp);
349 } 346 }
350 for (p = cg3_dacvals; *p; p += 2) { 347 for (p = cg3_dacvals; *p; p += 2) {
351 volatile u8 __iomem *regp; 348 u8 __iomem *regp;
352 349
353 regp = (volatile u8 __iomem *)&par->regs->cmap.addr; 350 regp = (u8 __iomem *)&par->regs->cmap.addr;
354 sbus_writeb(p[0], regp); 351 sbus_writeb(p[0], regp);
355 regp = (volatile u8 __iomem *)&par->regs->cmap.control; 352 regp = (u8 __iomem *)&par->regs->cmap.control;
356 sbus_writeb(p[1], regp); 353 sbus_writeb(p[1], regp);
357 } 354 }
358} 355}
@@ -360,129 +357,137 @@ static void cg3_do_default_mode(struct cg3_par *par)
360struct all_info { 357struct all_info {
361 struct fb_info info; 358 struct fb_info info;
362 struct cg3_par par; 359 struct cg3_par par;
363 struct list_head list;
364}; 360};
365static LIST_HEAD(cg3_list);
366 361
367static void cg3_init_one(struct sbus_dev *sdev) 362static int __devinit cg3_init_one(struct of_device *op)
368{ 363{
364 struct device_node *dp = op->node;
369 struct all_info *all; 365 struct all_info *all;
370 int linebytes; 366 int linebytes, err;
371
372 all = kmalloc(sizeof(*all), GFP_KERNEL);
373 if (!all) {
374 printk(KERN_ERR "cg3: Cannot allocate memory.\n");
375 return;
376 }
377 memset(all, 0, sizeof(*all));
378 367
379 INIT_LIST_HEAD(&all->list); 368 all = kzalloc(sizeof(*all), GFP_KERNEL);
369 if (!all)
370 return -ENOMEM;
380 371
381 spin_lock_init(&all->par.lock); 372 spin_lock_init(&all->par.lock);
382 all->par.sdev = sdev;
383 373
384 all->par.physbase = sdev->reg_addrs[0].phys_addr; 374 all->par.physbase = op->resource[0].start;
375 all->par.which_io = op->resource[0].flags & IORESOURCE_BITS;
385 376
386 sbusfb_fill_var(&all->info.var, sdev->prom_node, 8); 377 sbusfb_fill_var(&all->info.var, dp->node, 8);
387 all->info.var.red.length = 8; 378 all->info.var.red.length = 8;
388 all->info.var.green.length = 8; 379 all->info.var.green.length = 8;
389 all->info.var.blue.length = 8; 380 all->info.var.blue.length = 8;
390 if (!strcmp(sdev->prom_name, "cgRDI")) 381 if (!strcmp(dp->name, "cgRDI"))
391 all->par.flags |= CG3_FLAG_RDI; 382 all->par.flags |= CG3_FLAG_RDI;
392 if (all->par.flags & CG3_FLAG_RDI) 383 if (all->par.flags & CG3_FLAG_RDI)
393 cg3_rdi_maybe_fixup_var(&all->info.var, sdev); 384 cg3_rdi_maybe_fixup_var(&all->info.var, dp);
394 385
395 linebytes = prom_getintdefault(sdev->prom_node, "linebytes", 386 linebytes = of_getintprop_default(dp, "linebytes",
396 all->info.var.xres); 387 all->info.var.xres);
397 all->par.fbsize = PAGE_ALIGN(linebytes * all->info.var.yres); 388 all->par.fbsize = PAGE_ALIGN(linebytes * all->info.var.yres);
398 389
399 all->par.regs = sbus_ioremap(&sdev->resource[0], CG3_REGS_OFFSET, 390 all->par.regs = of_ioremap(&op->resource[0], CG3_REGS_OFFSET,
400 sizeof(struct cg3_regs), "cg3 regs"); 391 sizeof(struct cg3_regs), "cg3 regs");
401 392
402 all->info.flags = FBINFO_DEFAULT; 393 all->info.flags = FBINFO_DEFAULT;
403 all->info.fbops = &cg3_ops; 394 all->info.fbops = &cg3_ops;
404#ifdef CONFIG_SPARC32 395 all->info.screen_base =
405 all->info.screen_base = (char __iomem *) 396 of_ioremap(&op->resource[0], CG3_RAM_OFFSET,
406 prom_getintdefault(sdev->prom_node, "address", 0); 397 all->par.fbsize, "cg3 ram");
407#endif
408 if (!all->info.screen_base)
409 all->info.screen_base =
410 sbus_ioremap(&sdev->resource[0], CG3_RAM_OFFSET,
411 all->par.fbsize, "cg3 ram");
412 all->info.par = &all->par; 398 all->info.par = &all->par;
413 399
414 cg3_blank(0, &all->info); 400 cg3_blank(0, &all->info);
415 401
416 if (!prom_getbool(sdev->prom_node, "width")) 402 if (!of_find_property(dp, "width", NULL))
417 cg3_do_default_mode(&all->par); 403 cg3_do_default_mode(&all->par);
418 404
419 if (fb_alloc_cmap(&all->info.cmap, 256, 0)) { 405 if (fb_alloc_cmap(&all->info.cmap, 256, 0)) {
420 printk(KERN_ERR "cg3: Could not allocate color map.\n"); 406 of_iounmap(all->par.regs, sizeof(struct cg3_regs));
407 of_iounmap(all->info.screen_base, all->par.fbsize);
421 kfree(all); 408 kfree(all);
422 return; 409 return -ENOMEM;
423 } 410 }
424 fb_set_cmap(&all->info.cmap, &all->info); 411 fb_set_cmap(&all->info.cmap, &all->info);
425 412
426 cg3_init_fix(&all->info, linebytes); 413 cg3_init_fix(&all->info, linebytes, dp);
427 414
428 if (register_framebuffer(&all->info) < 0) { 415 err = register_framebuffer(&all->info);
429 printk(KERN_ERR "cg3: Could not register framebuffer.\n"); 416 if (err < 0) {
430 fb_dealloc_cmap(&all->info.cmap); 417 fb_dealloc_cmap(&all->info.cmap);
418 of_iounmap(all->par.regs, sizeof(struct cg3_regs));
419 of_iounmap(all->info.screen_base, all->par.fbsize);
431 kfree(all); 420 kfree(all);
432 return; 421 return err;
433 } 422 }
434 423
435 list_add(&all->list, &cg3_list); 424 dev_set_drvdata(&op->dev, all);
425
426 printk("%s: cg3 at %lx:%lx\n",
427 dp->full_name, all->par.which_io, all->par.physbase);
436 428
437 printk("cg3: %s at %lx:%lx\n", 429 return 0;
438 sdev->prom_name,
439 (long) sdev->reg_addrs[0].which_io,
440 (long) sdev->reg_addrs[0].phys_addr);
441} 430}
442 431
443int __init cg3_init(void) 432static int __devinit cg3_probe(struct of_device *dev, const struct of_device_id *match)
444{ 433{
445 struct sbus_bus *sbus; 434 struct of_device *op = to_of_device(&dev->dev);
446 struct sbus_dev *sdev;
447 435
448 if (fb_get_options("cg3fb", NULL)) 436 return cg3_init_one(op);
449 return -ENODEV; 437}
450 438
451 for_all_sbusdev(sdev, sbus) { 439static int __devexit cg3_remove(struct of_device *dev)
452 if (!strcmp(sdev->prom_name, "cgthree") || 440{
453 !strcmp(sdev->prom_name, "cgRDI")) 441 struct all_info *all = dev_get_drvdata(&dev->dev);
454 cg3_init_one(sdev); 442
455 } 443 unregister_framebuffer(&all->info);
444 fb_dealloc_cmap(&all->info.cmap);
445
446 of_iounmap(all->par.regs, sizeof(struct cg3_regs));
447 of_iounmap(all->info.screen_base, all->par.fbsize);
448
449 kfree(all);
450
451 dev_set_drvdata(&dev->dev, NULL);
456 452
457 return 0; 453 return 0;
458} 454}
459 455
460void __exit cg3_exit(void) 456static struct of_device_id cg3_match[] = {
461{ 457 {
462 struct list_head *pos, *tmp; 458 .name = "cgthree",
459 },
460 {
461 .name = "cgRDI",
462 },
463 {},
464};
465MODULE_DEVICE_TABLE(of, cg3_match);
463 466
464 list_for_each_safe(pos, tmp, &cg3_list) { 467static struct of_platform_driver cg3_driver = {
465 struct all_info *all = list_entry(pos, typeof(*all), list); 468 .name = "cg3",
469 .match_table = cg3_match,
470 .probe = cg3_probe,
471 .remove = __devexit_p(cg3_remove),
472};
466 473
467 unregister_framebuffer(&all->info); 474static int __init cg3_init(void)
468 fb_dealloc_cmap(&all->info.cmap); 475{
469 kfree(all); 476 if (fb_get_options("cg3fb", NULL))
470 } 477 return -ENODEV;
478
479 return of_register_driver(&cg3_driver, &of_bus_type);
471} 480}
472 481
473int __init 482static void __exit cg3_exit(void)
474cg3_setup(char *arg)
475{ 483{
476 /* No cmdline options yet... */ 484 of_unregister_driver(&cg3_driver);
477 return 0;
478} 485}
479 486
480module_init(cg3_init); 487module_init(cg3_init);
481
482#ifdef MODULE
483module_exit(cg3_exit); 488module_exit(cg3_exit);
484#endif
485 489
486MODULE_DESCRIPTION("framebuffer driver for CGthree chipsets"); 490MODULE_DESCRIPTION("framebuffer driver for CGthree chipsets");
487MODULE_AUTHOR("David S. Miller <davem@redhat.com>"); 491MODULE_AUTHOR("David S. Miller <davem@davemloft.net>");
492MODULE_VERSION("2.0");
488MODULE_LICENSE("GPL"); 493MODULE_LICENSE("GPL");
diff --git a/drivers/video/cg6.c b/drivers/video/cg6.c
index 7aab91ead681..64146be2eeb0 100644
--- a/drivers/video/cg6.c
+++ b/drivers/video/cg6.c
@@ -1,6 +1,6 @@
1/* cg6.c: CGSIX (GX, GXplus, TGX) frame buffer driver 1/* cg6.c: CGSIX (GX, GXplus, TGX) frame buffer driver
2 * 2 *
3 * Copyright (C) 2003 David S. Miller (davem@redhat.com) 3 * Copyright (C) 2003, 2006 David S. Miller (davem@davemloft.net)
4 * Copyright (C) 1996,1998 Jakub Jelinek (jj@ultra.linux.cz) 4 * Copyright (C) 1996,1998 Jakub Jelinek (jj@ultra.linux.cz)
5 * Copyright (C) 1996 Miguel de Icaza (miguel@nuclecu.unam.mx) 5 * Copyright (C) 1996 Miguel de Icaza (miguel@nuclecu.unam.mx)
6 * Copyright (C) 1996 Eddie C. Dost (ecd@skynet.be) 6 * Copyright (C) 1996 Eddie C. Dost (ecd@skynet.be)
@@ -19,8 +19,8 @@
19#include <linux/mm.h> 19#include <linux/mm.h>
20 20
21#include <asm/io.h> 21#include <asm/io.h>
22#include <asm/sbus.h> 22#include <asm/prom.h>
23#include <asm/oplib.h> 23#include <asm/of_device.h>
24#include <asm/fbio.h> 24#include <asm/fbio.h>
25 25
26#include "sbuslib.h" 26#include "sbuslib.h"
@@ -164,89 +164,89 @@ static struct fb_ops cg6_ops = {
164 164
165/* The contents are unknown */ 165/* The contents are unknown */
166struct cg6_tec { 166struct cg6_tec {
167 volatile int tec_matrix; 167 int tec_matrix;
168 volatile int tec_clip; 168 int tec_clip;
169 volatile int tec_vdc; 169 int tec_vdc;
170}; 170};
171 171
172struct cg6_thc { 172struct cg6_thc {
173 uint thc_pad0[512]; 173 u32 thc_pad0[512];
174 volatile uint thc_hs; /* hsync timing */ 174 u32 thc_hs; /* hsync timing */
175 volatile uint thc_hsdvs; 175 u32 thc_hsdvs;
176 volatile uint thc_hd; 176 u32 thc_hd;
177 volatile uint thc_vs; /* vsync timing */ 177 u32 thc_vs; /* vsync timing */
178 volatile uint thc_vd; 178 u32 thc_vd;
179 volatile uint thc_refresh; 179 u32 thc_refresh;
180 volatile uint thc_misc; 180 u32 thc_misc;
181 uint thc_pad1[56]; 181 u32 thc_pad1[56];
182 volatile uint thc_cursxy; /* cursor x,y position (16 bits each) */ 182 u32 thc_cursxy; /* cursor x,y position (16 bits each) */
183 volatile uint thc_cursmask[32]; /* cursor mask bits */ 183 u32 thc_cursmask[32]; /* cursor mask bits */
184 volatile uint thc_cursbits[32]; /* what to show where mask enabled */ 184 u32 thc_cursbits[32]; /* what to show where mask enabled */
185}; 185};
186 186
187struct cg6_fbc { 187struct cg6_fbc {
188 u32 xxx0[1]; 188 u32 xxx0[1];
189 volatile u32 mode; 189 u32 mode;
190 volatile u32 clip; 190 u32 clip;
191 u32 xxx1[1]; 191 u32 xxx1[1];
192 volatile u32 s; 192 u32 s;
193 volatile u32 draw; 193 u32 draw;
194 volatile u32 blit; 194 u32 blit;
195 volatile u32 font; 195 u32 font;
196 u32 xxx2[24]; 196 u32 xxx2[24];
197 volatile u32 x0, y0, z0, color0; 197 u32 x0, y0, z0, color0;
198 volatile u32 x1, y1, z1, color1; 198 u32 x1, y1, z1, color1;
199 volatile u32 x2, y2, z2, color2; 199 u32 x2, y2, z2, color2;
200 volatile u32 x3, y3, z3, color3; 200 u32 x3, y3, z3, color3;
201 volatile u32 offx, offy; 201 u32 offx, offy;
202 u32 xxx3[2]; 202 u32 xxx3[2];
203 volatile u32 incx, incy; 203 u32 incx, incy;
204 u32 xxx4[2]; 204 u32 xxx4[2];
205 volatile u32 clipminx, clipminy; 205 u32 clipminx, clipminy;
206 u32 xxx5[2]; 206 u32 xxx5[2];
207 volatile u32 clipmaxx, clipmaxy; 207 u32 clipmaxx, clipmaxy;
208 u32 xxx6[2]; 208 u32 xxx6[2];
209 volatile u32 fg; 209 u32 fg;
210 volatile u32 bg; 210 u32 bg;
211 volatile u32 alu; 211 u32 alu;
212 volatile u32 pm; 212 u32 pm;
213 volatile u32 pixelm; 213 u32 pixelm;
214 u32 xxx7[2]; 214 u32 xxx7[2];
215 volatile u32 patalign; 215 u32 patalign;
216 volatile u32 pattern[8]; 216 u32 pattern[8];
217 u32 xxx8[432]; 217 u32 xxx8[432];
218 volatile u32 apointx, apointy, apointz; 218 u32 apointx, apointy, apointz;
219 u32 xxx9[1]; 219 u32 xxx9[1];
220 volatile u32 rpointx, rpointy, rpointz; 220 u32 rpointx, rpointy, rpointz;
221 u32 xxx10[5]; 221 u32 xxx10[5];
222 volatile u32 pointr, pointg, pointb, pointa; 222 u32 pointr, pointg, pointb, pointa;
223 volatile u32 alinex, aliney, alinez; 223 u32 alinex, aliney, alinez;
224 u32 xxx11[1]; 224 u32 xxx11[1];
225 volatile u32 rlinex, rliney, rlinez; 225 u32 rlinex, rliney, rlinez;
226 u32 xxx12[5]; 226 u32 xxx12[5];
227 volatile u32 liner, lineg, lineb, linea; 227 u32 liner, lineg, lineb, linea;
228 volatile u32 atrix, atriy, atriz; 228 u32 atrix, atriy, atriz;
229 u32 xxx13[1]; 229 u32 xxx13[1];
230 volatile u32 rtrix, rtriy, rtriz; 230 u32 rtrix, rtriy, rtriz;
231 u32 xxx14[5]; 231 u32 xxx14[5];
232 volatile u32 trir, trig, trib, tria; 232 u32 trir, trig, trib, tria;
233 volatile u32 aquadx, aquady, aquadz; 233 u32 aquadx, aquady, aquadz;
234 u32 xxx15[1]; 234 u32 xxx15[1];
235 volatile u32 rquadx, rquady, rquadz; 235 u32 rquadx, rquady, rquadz;
236 u32 xxx16[5]; 236 u32 xxx16[5];
237 volatile u32 quadr, quadg, quadb, quada; 237 u32 quadr, quadg, quadb, quada;
238 volatile u32 arectx, arecty, arectz; 238 u32 arectx, arecty, arectz;
239 u32 xxx17[1]; 239 u32 xxx17[1];
240 volatile u32 rrectx, rrecty, rrectz; 240 u32 rrectx, rrecty, rrectz;
241 u32 xxx18[5]; 241 u32 xxx18[5];
242 volatile u32 rectr, rectg, rectb, recta; 242 u32 rectr, rectg, rectb, recta;
243}; 243};
244 244
245struct bt_regs { 245struct bt_regs {
246 volatile u32 addr; 246 u32 addr;
247 volatile u32 color_map; 247 u32 color_map;
248 volatile u32 control; 248 u32 control;
249 volatile u32 cursor; 249 u32 cursor;
250}; 250};
251 251
252struct cg6_par { 252struct cg6_par {
@@ -255,15 +255,14 @@ struct cg6_par {
255 struct cg6_fbc __iomem *fbc; 255 struct cg6_fbc __iomem *fbc;
256 struct cg6_thc __iomem *thc; 256 struct cg6_thc __iomem *thc;
257 struct cg6_tec __iomem *tec; 257 struct cg6_tec __iomem *tec;
258 volatile u32 __iomem *fhc; 258 u32 __iomem *fhc;
259 259
260 u32 flags; 260 u32 flags;
261#define CG6_FLAG_BLANKED 0x00000001 261#define CG6_FLAG_BLANKED 0x00000001
262 262
263 unsigned long physbase; 263 unsigned long physbase;
264 unsigned long which_io;
264 unsigned long fbsize; 265 unsigned long fbsize;
265
266 struct sbus_dev *sdev;
267}; 266};
268 267
269static int cg6_sync(struct fb_info *info) 268static int cg6_sync(struct fb_info *info)
@@ -529,8 +528,7 @@ static int cg6_mmap(struct fb_info *info, struct vm_area_struct *vma)
529 528
530 return sbusfb_mmap_helper(cg6_mmap_map, 529 return sbusfb_mmap_helper(cg6_mmap_map,
531 par->physbase, par->fbsize, 530 par->physbase, par->fbsize,
532 par->sdev->reg_addrs[0].which_io, 531 par->which_io, vma);
533 vma);
534} 532}
535 533
536static int cg6_ioctl(struct fb_info *info, unsigned int cmd, unsigned long arg) 534static int cg6_ioctl(struct fb_info *info, unsigned int cmd, unsigned long arg)
@@ -658,62 +656,75 @@ static void cg6_chip_init(struct fb_info *info)
658struct all_info { 656struct all_info {
659 struct fb_info info; 657 struct fb_info info;
660 struct cg6_par par; 658 struct cg6_par par;
661 struct list_head list;
662}; 659};
663static LIST_HEAD(cg6_list);
664 660
665static void cg6_init_one(struct sbus_dev *sdev) 661static void cg6_unmap_regs(struct all_info *all)
666{ 662{
667 struct all_info *all; 663 if (all->par.fbc)
668 int linebytes; 664 of_iounmap(all->par.fbc, 4096);
665 if (all->par.tec)
666 of_iounmap(all->par.tec, sizeof(struct cg6_tec));
667 if (all->par.thc)
668 of_iounmap(all->par.thc, sizeof(struct cg6_thc));
669 if (all->par.bt)
670 of_iounmap(all->par.bt, sizeof(struct bt_regs));
671 if (all->par.fhc)
672 of_iounmap(all->par.fhc, sizeof(u32));
673
674 if (all->info.screen_base)
675 of_iounmap(all->info.screen_base, all->par.fbsize);
676}
669 677
670 all = kmalloc(sizeof(*all), GFP_KERNEL); 678static int __devinit cg6_init_one(struct of_device *op)
671 if (!all) { 679{
672 printk(KERN_ERR "cg6: Cannot allocate memory.\n"); 680 struct device_node *dp = op->node;
673 return; 681 struct all_info *all;
674 } 682 int linebytes, err;
675 memset(all, 0, sizeof(*all));
676 683
677 INIT_LIST_HEAD(&all->list); 684 all = kzalloc(sizeof(*all), GFP_KERNEL);
685 if (!all)
686 return -ENOMEM;
678 687
679 spin_lock_init(&all->par.lock); 688 spin_lock_init(&all->par.lock);
680 all->par.sdev = sdev;
681 689
682 all->par.physbase = sdev->reg_addrs[0].phys_addr; 690 all->par.physbase = op->resource[0].start;
691 all->par.which_io = op->resource[0].flags & IORESOURCE_BITS;
683 692
684 sbusfb_fill_var(&all->info.var, sdev->prom_node, 8); 693 sbusfb_fill_var(&all->info.var, dp->node, 8);
685 all->info.var.red.length = 8; 694 all->info.var.red.length = 8;
686 all->info.var.green.length = 8; 695 all->info.var.green.length = 8;
687 all->info.var.blue.length = 8; 696 all->info.var.blue.length = 8;
688 697
689 linebytes = prom_getintdefault(sdev->prom_node, "linebytes", 698 linebytes = of_getintprop_default(dp, "linebytes",
690 all->info.var.xres); 699 all->info.var.xres);
691 all->par.fbsize = PAGE_ALIGN(linebytes * all->info.var.yres); 700 all->par.fbsize = PAGE_ALIGN(linebytes * all->info.var.yres);
692 if (prom_getbool(sdev->prom_node, "dblbuf")) 701 if (of_find_property(dp, "dblbuf", NULL))
693 all->par.fbsize *= 4; 702 all->par.fbsize *= 4;
694 703
695 all->par.fbc = sbus_ioremap(&sdev->resource[0], CG6_FBC_OFFSET, 704 all->par.fbc = of_ioremap(&op->resource[0], CG6_FBC_OFFSET,
696 4096, "cgsix fbc"); 705 4096, "cgsix fbc");
697 all->par.tec = sbus_ioremap(&sdev->resource[0], CG6_TEC_OFFSET, 706 all->par.tec = of_ioremap(&op->resource[0], CG6_TEC_OFFSET,
698 sizeof(struct cg6_tec), "cgsix tec"); 707 sizeof(struct cg6_tec), "cgsix tec");
699 all->par.thc = sbus_ioremap(&sdev->resource[0], CG6_THC_OFFSET, 708 all->par.thc = of_ioremap(&op->resource[0], CG6_THC_OFFSET,
700 sizeof(struct cg6_thc), "cgsix thc"); 709 sizeof(struct cg6_thc), "cgsix thc");
701 all->par.bt = sbus_ioremap(&sdev->resource[0], CG6_BROOKTREE_OFFSET, 710 all->par.bt = of_ioremap(&op->resource[0], CG6_BROOKTREE_OFFSET,
702 sizeof(struct bt_regs), "cgsix dac"); 711 sizeof(struct bt_regs), "cgsix dac");
703 all->par.fhc = sbus_ioremap(&sdev->resource[0], CG6_FHC_OFFSET, 712 all->par.fhc = of_ioremap(&op->resource[0], CG6_FHC_OFFSET,
704 sizeof(u32), "cgsix fhc"); 713 sizeof(u32), "cgsix fhc");
705 714
706 all->info.flags = FBINFO_DEFAULT | FBINFO_HWACCEL_IMAGEBLIT | 715 all->info.flags = FBINFO_DEFAULT | FBINFO_HWACCEL_IMAGEBLIT |
707 FBINFO_HWACCEL_COPYAREA | FBINFO_HWACCEL_FILLRECT; 716 FBINFO_HWACCEL_COPYAREA | FBINFO_HWACCEL_FILLRECT;
708 all->info.fbops = &cg6_ops; 717 all->info.fbops = &cg6_ops;
709#ifdef CONFIG_SPARC32 718
710 all->info.screen_base = (char __iomem *) 719 all->info.screen_base = of_ioremap(&op->resource[0], CG6_RAM_OFFSET,
711 prom_getintdefault(sdev->prom_node, "address", 0); 720 all->par.fbsize, "cgsix ram");
712#endif 721 if (!all->par.fbc || !all->par.tec || !all->par.thc ||
713 if (!all->info.screen_base) 722 !all->par.bt || !all->par.fhc || !all->info.screen_base) {
714 all->info.screen_base = 723 cg6_unmap_regs(all);
715 sbus_ioremap(&sdev->resource[0], CG6_RAM_OFFSET, 724 kfree(all);
716 all->par.fbsize, "cgsix ram"); 725 return -ENOMEM;
726 }
727
717 all->info.par = &all->par; 728 all->info.par = &all->par;
718 729
719 all->info.var.accel_flags = FB_ACCELF_TEXT; 730 all->info.var.accel_flags = FB_ACCELF_TEXT;
@@ -723,72 +734,90 @@ static void cg6_init_one(struct sbus_dev *sdev)
723 cg6_blank(0, &all->info); 734 cg6_blank(0, &all->info);
724 735
725 if (fb_alloc_cmap(&all->info.cmap, 256, 0)) { 736 if (fb_alloc_cmap(&all->info.cmap, 256, 0)) {
726 printk(KERN_ERR "cg6: Could not allocate color map.\n"); 737 cg6_unmap_regs(all);
727 kfree(all); 738 kfree(all);
728 return; 739 return -ENOMEM;
729 } 740 }
730 741
731 fb_set_cmap(&all->info.cmap, &all->info); 742 fb_set_cmap(&all->info.cmap, &all->info);
732 cg6_init_fix(&all->info, linebytes); 743 cg6_init_fix(&all->info, linebytes);
733 744
734 if (register_framebuffer(&all->info) < 0) { 745 err = register_framebuffer(&all->info);
735 printk(KERN_ERR "cg6: Could not register framebuffer.\n"); 746 if (err < 0) {
747 cg6_unmap_regs(all);
736 fb_dealloc_cmap(&all->info.cmap); 748 fb_dealloc_cmap(&all->info.cmap);
737 kfree(all); 749 kfree(all);
738 return; 750 return err;
739 } 751 }
740 752
741 list_add(&all->list, &cg6_list); 753 dev_set_drvdata(&op->dev, all);
742 754
743 printk("cg6: CGsix [%s] at %lx:%lx\n", 755 printk("%s: CGsix [%s] at %lx:%lx\n",
756 dp->full_name,
744 all->info.fix.id, 757 all->info.fix.id,
745 (long) sdev->reg_addrs[0].which_io, 758 all->par.which_io, all->par.physbase);
746 (long) sdev->reg_addrs[0].phys_addr); 759
760 return 0;
747} 761}
748 762
749int __init cg6_init(void) 763static int __devinit cg6_probe(struct of_device *dev, const struct of_device_id *match)
750{ 764{
751 struct sbus_bus *sbus; 765 struct of_device *op = to_of_device(&dev->dev);
752 struct sbus_dev *sdev;
753 766
754 if (fb_get_options("cg6fb", NULL)) 767 return cg6_init_one(op);
755 return -ENODEV; 768}
756 769
757 for_all_sbusdev(sdev, sbus) { 770static int __devexit cg6_remove(struct of_device *dev)
758 if (!strcmp(sdev->prom_name, "cgsix") || 771{
759 !strcmp(sdev->prom_name, "cgthree+")) 772 struct all_info *all = dev_get_drvdata(&dev->dev);
760 cg6_init_one(sdev); 773
761 } 774 unregister_framebuffer(&all->info);
775 fb_dealloc_cmap(&all->info.cmap);
776
777 cg6_unmap_regs(all);
778
779 kfree(all);
780
781 dev_set_drvdata(&dev->dev, NULL);
762 782
763 return 0; 783 return 0;
764} 784}
765 785
766void __exit cg6_exit(void) 786static struct of_device_id cg6_match[] = {
767{ 787 {
768 struct list_head *pos, *tmp; 788 .name = "cgsix",
789 },
790 {
791 .name = "cgthree+",
792 },
793 {},
794};
795MODULE_DEVICE_TABLE(of, cg6_match);
769 796
770 list_for_each_safe(pos, tmp, &cg6_list) { 797static struct of_platform_driver cg6_driver = {
771 struct all_info *all = list_entry(pos, typeof(*all), list); 798 .name = "cg6",
799 .match_table = cg6_match,
800 .probe = cg6_probe,
801 .remove = __devexit_p(cg6_remove),
802};
772 803
773 unregister_framebuffer(&all->info); 804static int __init cg6_init(void)
774 fb_dealloc_cmap(&all->info.cmap); 805{
775 kfree(all); 806 if (fb_get_options("cg6fb", NULL))
776 } 807 return -ENODEV;
808
809 return of_register_driver(&cg6_driver, &of_bus_type);
777} 810}
778 811
779int __init 812static void __exit cg6_exit(void)
780cg6_setup(char *arg)
781{ 813{
782 /* No cmdline options yet... */ 814 of_unregister_driver(&cg6_driver);
783 return 0;
784} 815}
785 816
786module_init(cg6_init); 817module_init(cg6_init);
787
788#ifdef MODULE
789module_exit(cg6_exit); 818module_exit(cg6_exit);
790#endif
791 819
792MODULE_DESCRIPTION("framebuffer driver for CGsix chipsets"); 820MODULE_DESCRIPTION("framebuffer driver for CGsix chipsets");
793MODULE_AUTHOR("David S. Miller <davem@redhat.com>"); 821MODULE_AUTHOR("David S. Miller <davem@davemloft.net>");
822MODULE_VERSION("2.0");
794MODULE_LICENSE("GPL"); 823MODULE_LICENSE("GPL");
diff --git a/drivers/video/ffb.c b/drivers/video/ffb.c
index 7633e41adda1..2a0e8210d398 100644
--- a/drivers/video/ffb.c
+++ b/drivers/video/ffb.c
@@ -1,6 +1,6 @@
1/* ffb.c: Creator/Elite3D frame buffer driver 1/* ffb.c: Creator/Elite3D frame buffer driver
2 * 2 *
3 * Copyright (C) 2003 David S. Miller (davem@redhat.com) 3 * Copyright (C) 2003, 2006 David S. Miller (davem@davemloft.net)
4 * Copyright (C) 1997,1998,1999 Jakub Jelinek (jj@ultra.linux.cz) 4 * Copyright (C) 1997,1998,1999 Jakub Jelinek (jj@ultra.linux.cz)
5 * 5 *
6 * Driver layout based loosely on tgafb.c, see that file for credits. 6 * Driver layout based loosely on tgafb.c, see that file for credits.
@@ -19,7 +19,8 @@
19 19
20#include <asm/io.h> 20#include <asm/io.h>
21#include <asm/upa.h> 21#include <asm/upa.h>
22#include <asm/oplib.h> 22#include <asm/prom.h>
23#include <asm/of_device.h>
23#include <asm/fbio.h> 24#include <asm/fbio.h>
24 25
25#include "sbuslib.h" 26#include "sbuslib.h"
@@ -184,161 +185,161 @@ static struct fb_ops ffb_ops = {
184 185
185struct ffb_fbc { 186struct ffb_fbc {
186 /* Next vertex registers */ 187 /* Next vertex registers */
187 u32 xxx1[3]; 188 u32 xxx1[3];
188 volatile u32 alpha; 189 u32 alpha;
189 volatile u32 red; 190 u32 red;
190 volatile u32 green; 191 u32 green;
191 volatile u32 blue; 192 u32 blue;
192 volatile u32 depth; 193 u32 depth;
193 volatile u32 y; 194 u32 y;
194 volatile u32 x; 195 u32 x;
195 u32 xxx2[2]; 196 u32 xxx2[2];
196 volatile u32 ryf; 197 u32 ryf;
197 volatile u32 rxf; 198 u32 rxf;
198 u32 xxx3[2]; 199 u32 xxx3[2];
199 200
200 volatile u32 dmyf; 201 u32 dmyf;
201 volatile u32 dmxf; 202 u32 dmxf;
202 u32 xxx4[2]; 203 u32 xxx4[2];
203 volatile u32 ebyi; 204 u32 ebyi;
204 volatile u32 ebxi; 205 u32 ebxi;
205 u32 xxx5[2]; 206 u32 xxx5[2];
206 volatile u32 by; 207 u32 by;
207 volatile u32 bx; 208 u32 bx;
208 u32 dy; 209 u32 dy;
209 u32 dx; 210 u32 dx;
210 volatile u32 bh; 211 u32 bh;
211 volatile u32 bw; 212 u32 bw;
212 u32 xxx6[2]; 213 u32 xxx6[2];
213 214
214 u32 xxx7[32]; 215 u32 xxx7[32];
215 216
216 /* Setup unit vertex state register */ 217 /* Setup unit vertex state register */
217 volatile u32 suvtx; 218 u32 suvtx;
218 u32 xxx8[63]; 219 u32 xxx8[63];
219 220
220 /* Control registers */ 221 /* Control registers */
221 volatile u32 ppc; 222 u32 ppc;
222 volatile u32 wid; 223 u32 wid;
223 volatile u32 fg; 224 u32 fg;
224 volatile u32 bg; 225 u32 bg;
225 volatile u32 consty; 226 u32 consty;
226 volatile u32 constz; 227 u32 constz;
227 volatile u32 xclip; 228 u32 xclip;
228 volatile u32 dcss; 229 u32 dcss;
229 volatile u32 vclipmin; 230 u32 vclipmin;
230 volatile u32 vclipmax; 231 u32 vclipmax;
231 volatile u32 vclipzmin; 232 u32 vclipzmin;
232 volatile u32 vclipzmax; 233 u32 vclipzmax;
233 volatile u32 dcsf; 234 u32 dcsf;
234 volatile u32 dcsb; 235 u32 dcsb;
235 volatile u32 dczf; 236 u32 dczf;
236 volatile u32 dczb; 237 u32 dczb;
237 238
238 u32 xxx9; 239 u32 xxx9;
239 volatile u32 blendc; 240 u32 blendc;
240 volatile u32 blendc1; 241 u32 blendc1;
241 volatile u32 blendc2; 242 u32 blendc2;
242 volatile u32 fbramitc; 243 u32 fbramitc;
243 volatile u32 fbc; 244 u32 fbc;
244 volatile u32 rop; 245 u32 rop;
245 volatile u32 cmp; 246 u32 cmp;
246 volatile u32 matchab; 247 u32 matchab;
247 volatile u32 matchc; 248 u32 matchc;
248 volatile u32 magnab; 249 u32 magnab;
249 volatile u32 magnc; 250 u32 magnc;
250 volatile u32 fbcfg0; 251 u32 fbcfg0;
251 volatile u32 fbcfg1; 252 u32 fbcfg1;
252 volatile u32 fbcfg2; 253 u32 fbcfg2;
253 volatile u32 fbcfg3; 254 u32 fbcfg3;
254 255
255 u32 ppcfg; 256 u32 ppcfg;
256 volatile u32 pick; 257 u32 pick;
257 volatile u32 fillmode; 258 u32 fillmode;
258 volatile u32 fbramwac; 259 u32 fbramwac;
259 volatile u32 pmask; 260 u32 pmask;
260 volatile u32 xpmask; 261 u32 xpmask;
261 volatile u32 ypmask; 262 u32 ypmask;
262 volatile u32 zpmask; 263 u32 zpmask;
263 volatile u32 clip0min; 264 u32 clip0min;
264 volatile u32 clip0max; 265 u32 clip0max;
265 volatile u32 clip1min; 266 u32 clip1min;
266 volatile u32 clip1max; 267 u32 clip1max;
267 volatile u32 clip2min; 268 u32 clip2min;
268 volatile u32 clip2max; 269 u32 clip2max;
269 volatile u32 clip3min; 270 u32 clip3min;
270 volatile u32 clip3max; 271 u32 clip3max;
271 272
272 /* New 3dRAM III support regs */ 273 /* New 3dRAM III support regs */
273 volatile u32 rawblend2; 274 u32 rawblend2;
274 volatile u32 rawpreblend; 275 u32 rawpreblend;
275 volatile u32 rawstencil; 276 u32 rawstencil;
276 volatile u32 rawstencilctl; 277 u32 rawstencilctl;
277 volatile u32 threedram1; 278 u32 threedram1;
278 volatile u32 threedram2; 279 u32 threedram2;
279 volatile u32 passin; 280 u32 passin;
280 volatile u32 rawclrdepth; 281 u32 rawclrdepth;
281 volatile u32 rawpmask; 282 u32 rawpmask;
282 volatile u32 rawcsrc; 283 u32 rawcsrc;
283 volatile u32 rawmatch; 284 u32 rawmatch;
284 volatile u32 rawmagn; 285 u32 rawmagn;
285 volatile u32 rawropblend; 286 u32 rawropblend;
286 volatile u32 rawcmp; 287 u32 rawcmp;
287 volatile u32 rawwac; 288 u32 rawwac;
288 volatile u32 fbramid; 289 u32 fbramid;
289 290
290 volatile u32 drawop; 291 u32 drawop;
291 u32 xxx10[2]; 292 u32 xxx10[2];
292 volatile u32 fontlpat; 293 u32 fontlpat;
293 u32 xxx11; 294 u32 xxx11;
294 volatile u32 fontxy; 295 u32 fontxy;
295 volatile u32 fontw; 296 u32 fontw;
296 volatile u32 fontinc; 297 u32 fontinc;
297 volatile u32 font; 298 u32 font;
298 u32 xxx12[3]; 299 u32 xxx12[3];
299 volatile u32 blend2; 300 u32 blend2;
300 volatile u32 preblend; 301 u32 preblend;
301 volatile u32 stencil; 302 u32 stencil;
302 volatile u32 stencilctl; 303 u32 stencilctl;
303 304
304 u32 xxx13[4]; 305 u32 xxx13[4];
305 volatile u32 dcss1; 306 u32 dcss1;
306 volatile u32 dcss2; 307 u32 dcss2;
307 volatile u32 dcss3; 308 u32 dcss3;
308 volatile u32 widpmask; 309 u32 widpmask;
309 volatile u32 dcs2; 310 u32 dcs2;
310 volatile u32 dcs3; 311 u32 dcs3;
311 volatile u32 dcs4; 312 u32 dcs4;
312 u32 xxx14; 313 u32 xxx14;
313 volatile u32 dcd2; 314 u32 dcd2;
314 volatile u32 dcd3; 315 u32 dcd3;
315 volatile u32 dcd4; 316 u32 dcd4;
316 u32 xxx15; 317 u32 xxx15;
317 318
318 volatile u32 pattern[32]; 319 u32 pattern[32];
319 320
320 u32 xxx16[256]; 321 u32 xxx16[256];
321 322
322 volatile u32 devid; 323 u32 devid;
323 u32 xxx17[63]; 324 u32 xxx17[63];
324 325
325 volatile u32 ucsr; 326 u32 ucsr;
326 u32 xxx18[31]; 327 u32 xxx18[31];
327 328
328 volatile u32 mer; 329 u32 mer;
329}; 330};
330 331
331struct ffb_dac { 332struct ffb_dac {
332 volatile u32 type; 333 u32 type;
333 volatile u32 value; 334 u32 value;
334 volatile u32 type2; 335 u32 type2;
335 volatile u32 value2; 336 u32 value2;
336}; 337};
337 338
338struct ffb_par { 339struct ffb_par {
339 spinlock_t lock; 340 spinlock_t lock;
340 struct ffb_fbc *fbc; 341 struct ffb_fbc __iomem *fbc;
341 struct ffb_dac *dac; 342 struct ffb_dac __iomem *dac;
342 343
343 u32 flags; 344 u32 flags;
344#define FFB_FLAG_AFB 0x00000001 345#define FFB_FLAG_AFB 0x00000001
@@ -353,16 +354,13 @@ struct ffb_par {
353 unsigned long physbase; 354 unsigned long physbase;
354 unsigned long fbsize; 355 unsigned long fbsize;
355 356
356 char name[64];
357 int prom_node;
358 int prom_parent_node;
359 int dac_rev; 357 int dac_rev;
360 int board_type; 358 int board_type;
361}; 359};
362 360
363static void FFBFifo(struct ffb_par *par, int n) 361static void FFBFifo(struct ffb_par *par, int n)
364{ 362{
365 struct ffb_fbc *fbc; 363 struct ffb_fbc __iomem *fbc;
366 int cache = par->fifo_cache; 364 int cache = par->fifo_cache;
367 365
368 if (cache - n < 0) { 366 if (cache - n < 0) {
@@ -375,7 +373,7 @@ static void FFBFifo(struct ffb_par *par, int n)
375 373
376static void FFBWait(struct ffb_par *par) 374static void FFBWait(struct ffb_par *par)
377{ 375{
378 struct ffb_fbc *fbc; 376 struct ffb_fbc __iomem *fbc;
379 int limit = 10000; 377 int limit = 10000;
380 378
381 fbc = par->fbc; 379 fbc = par->fbc;
@@ -408,8 +406,8 @@ static __inline__ void ffb_rop(struct ffb_par *par, u32 rop)
408 406
409static void ffb_switch_from_graph(struct ffb_par *par) 407static void ffb_switch_from_graph(struct ffb_par *par)
410{ 408{
411 struct ffb_fbc *fbc = par->fbc; 409 struct ffb_fbc __iomem *fbc = par->fbc;
412 struct ffb_dac *dac = par->dac; 410 struct ffb_dac __iomem *dac = par->dac;
413 unsigned long flags; 411 unsigned long flags;
414 412
415 spin_lock_irqsave(&par->lock, flags); 413 spin_lock_irqsave(&par->lock, flags);
@@ -462,7 +460,7 @@ static int ffb_pan_display(struct fb_var_screeninfo *var, struct fb_info *info)
462static void ffb_fillrect(struct fb_info *info, const struct fb_fillrect *rect) 460static void ffb_fillrect(struct fb_info *info, const struct fb_fillrect *rect)
463{ 461{
464 struct ffb_par *par = (struct ffb_par *) info->par; 462 struct ffb_par *par = (struct ffb_par *) info->par;
465 struct ffb_fbc *fbc = par->fbc; 463 struct ffb_fbc __iomem *fbc = par->fbc;
466 unsigned long flags; 464 unsigned long flags;
467 u32 fg; 465 u32 fg;
468 466
@@ -505,7 +503,7 @@ static void
505ffb_copyarea(struct fb_info *info, const struct fb_copyarea *area) 503ffb_copyarea(struct fb_info *info, const struct fb_copyarea *area)
506{ 504{
507 struct ffb_par *par = (struct ffb_par *) info->par; 505 struct ffb_par *par = (struct ffb_par *) info->par;
508 struct ffb_fbc *fbc = par->fbc; 506 struct ffb_fbc __iomem *fbc = par->fbc;
509 unsigned long flags; 507 unsigned long flags;
510 508
511 if (area->dx != area->sx || 509 if (area->dx != area->sx ||
@@ -541,7 +539,7 @@ ffb_copyarea(struct fb_info *info, const struct fb_copyarea *area)
541static void ffb_imageblit(struct fb_info *info, const struct fb_image *image) 539static void ffb_imageblit(struct fb_info *info, const struct fb_image *image)
542{ 540{
543 struct ffb_par *par = (struct ffb_par *) info->par; 541 struct ffb_par *par = (struct ffb_par *) info->par;
544 struct ffb_fbc *fbc = par->fbc; 542 struct ffb_fbc __iomem *fbc = par->fbc;
545 const u8 *data = image->data; 543 const u8 *data = image->data;
546 unsigned long flags; 544 unsigned long flags;
547 u32 fg, bg, xy; 545 u32 fg, bg, xy;
@@ -664,7 +662,7 @@ static int
664ffb_blank(int blank, struct fb_info *info) 662ffb_blank(int blank, struct fb_info *info)
665{ 663{
666 struct ffb_par *par = (struct ffb_par *) info->par; 664 struct ffb_par *par = (struct ffb_par *) info->par;
667 struct ffb_dac *dac = par->dac; 665 struct ffb_dac __iomem *dac = par->dac;
668 unsigned long flags; 666 unsigned long flags;
669 u32 tmp; 667 u32 tmp;
670 668
@@ -883,78 +881,42 @@ ffb_init_fix(struct fb_info *info)
883 info->fix.accel = FB_ACCEL_SUN_CREATOR; 881 info->fix.accel = FB_ACCEL_SUN_CREATOR;
884} 882}
885 883
886static int ffb_apply_upa_parent_ranges(int parent,
887 struct linux_prom64_registers *regs)
888{
889 struct linux_prom64_ranges ranges[PROMREG_MAX];
890 char name[128];
891 int len, i;
892
893 prom_getproperty(parent, "name", name, sizeof(name));
894 if (strcmp(name, "upa") != 0)
895 return 0;
896
897 len = prom_getproperty(parent, "ranges", (void *) ranges, sizeof(ranges));
898 if (len <= 0)
899 return 1;
900
901 len /= sizeof(struct linux_prom64_ranges);
902 for (i = 0; i < len; i++) {
903 struct linux_prom64_ranges *rng = &ranges[i];
904 u64 phys_addr = regs->phys_addr;
905
906 if (phys_addr >= rng->ot_child_base &&
907 phys_addr < (rng->ot_child_base + rng->or_size)) {
908 regs->phys_addr -= rng->ot_child_base;
909 regs->phys_addr += rng->ot_parent_base;
910 return 0;
911 }
912 }
913
914 return 1;
915}
916
917struct all_info { 884struct all_info {
918 struct fb_info info; 885 struct fb_info info;
919 struct ffb_par par; 886 struct ffb_par par;
920 u32 pseudo_palette[256]; 887 u32 pseudo_palette[256];
921 struct list_head list;
922}; 888};
923static LIST_HEAD(ffb_list);
924 889
925static void ffb_init_one(int node, int parent) 890static int ffb_init_one(struct of_device *op)
926{ 891{
927 struct linux_prom64_registers regs[2*PROMREG_MAX]; 892 struct device_node *dp = op->node;
928 struct ffb_fbc *fbc; 893 struct ffb_fbc __iomem *fbc;
929 struct ffb_dac *dac; 894 struct ffb_dac __iomem *dac;
930 struct all_info *all; 895 struct all_info *all;
896 int err;
931 897
932 if (prom_getproperty(node, "reg", (void *) regs, sizeof(regs)) <= 0) { 898 all = kzalloc(sizeof(*all), GFP_KERNEL);
933 printk("ffb: Cannot get reg device node property.\n"); 899 if (!all)
934 return; 900 return -ENOMEM;
935 }
936 901
937 if (ffb_apply_upa_parent_ranges(parent, &regs[0])) { 902 spin_lock_init(&all->par.lock);
938 printk("ffb: Cannot apply parent ranges to regs.\n"); 903 all->par.fbc = of_ioremap(&op->resource[2], 0,
939 return; 904 sizeof(struct ffb_fbc), "ffb fbc");
905 if (!all->par.fbc) {
906 kfree(all);
907 return -ENOMEM;
940 } 908 }
941 909
942 all = kmalloc(sizeof(*all), GFP_KERNEL); 910 all->par.dac = of_ioremap(&op->resource[1], 0,
943 if (!all) { 911 sizeof(struct ffb_dac), "ffb dac");
944 printk(KERN_ERR "ffb: Cannot allocate memory.\n"); 912 if (!all->par.dac) {
945 return; 913 of_iounmap(all->par.fbc, sizeof(struct ffb_fbc));
914 kfree(all);
915 return -ENOMEM;
946 } 916 }
947 memset(all, 0, sizeof(*all));
948
949 INIT_LIST_HEAD(&all->list);
950 917
951 spin_lock_init(&all->par.lock);
952 all->par.fbc = (struct ffb_fbc *)(regs[0].phys_addr + FFB_FBC_REGS_POFF);
953 all->par.dac = (struct ffb_dac *)(regs[0].phys_addr + FFB_DAC_POFF);
954 all->par.rop_cache = FFB_ROP_NEW; 918 all->par.rop_cache = FFB_ROP_NEW;
955 all->par.physbase = regs[0].phys_addr; 919 all->par.physbase = op->resource[0].start;
956 all->par.prom_node = node;
957 all->par.prom_parent_node = parent;
958 920
959 /* Don't mention copyarea, so SCROLL_REDRAW is always 921 /* Don't mention copyarea, so SCROLL_REDRAW is always
960 * used. It is the fastest on this chip. 922 * used. It is the fastest on this chip.
@@ -968,7 +930,7 @@ static void ffb_init_one(int node, int parent)
968 all->info.par = &all->par; 930 all->info.par = &all->par;
969 all->info.pseudo_palette = all->pseudo_palette; 931 all->info.pseudo_palette = all->pseudo_palette;
970 932
971 sbusfb_fill_var(&all->info.var, all->par.prom_node, 32); 933 sbusfb_fill_var(&all->info.var, dp->node, 32);
972 all->par.fbsize = PAGE_ALIGN(all->info.var.xres * 934 all->par.fbsize = PAGE_ALIGN(all->info.var.xres *
973 all->info.var.yres * 935 all->info.var.yres *
974 4); 936 4);
@@ -976,14 +938,13 @@ static void ffb_init_one(int node, int parent)
976 938
977 all->info.var.accel_flags = FB_ACCELF_TEXT; 939 all->info.var.accel_flags = FB_ACCELF_TEXT;
978 940
979 prom_getstring(node, "name", all->par.name, sizeof(all->par.name)); 941 if (!strcmp(dp->name, "SUNW,afb"))
980 if (!strcmp(all->par.name, "SUNW,afb"))
981 all->par.flags |= FFB_FLAG_AFB; 942 all->par.flags |= FFB_FLAG_AFB;
982 943
983 all->par.board_type = prom_getintdefault(node, "board_type", 0); 944 all->par.board_type = of_getintprop_default(dp, "board_type", 0);
984 945
985 fbc = all->par.fbc; 946 fbc = all->par.fbc;
986 if((upa_readl(&fbc->ucsr) & FFB_UCSR_ALL_ERRORS) != 0) 947 if ((upa_readl(&fbc->ucsr) & FFB_UCSR_ALL_ERRORS) != 0)
987 upa_writel(FFB_UCSR_ALL_ERRORS, &fbc->ucsr); 948 upa_writel(FFB_UCSR_ALL_ERRORS, &fbc->ucsr);
988 949
989 ffb_switch_from_graph(&all->par); 950 ffb_switch_from_graph(&all->par);
@@ -1008,81 +969,88 @@ static void ffb_init_one(int node, int parent)
1008 if (fb_alloc_cmap(&all->info.cmap, 256, 0)) { 969 if (fb_alloc_cmap(&all->info.cmap, 256, 0)) {
1009 printk(KERN_ERR "ffb: Could not allocate color map.\n"); 970 printk(KERN_ERR "ffb: Could not allocate color map.\n");
1010 kfree(all); 971 kfree(all);
1011 return; 972 return -ENOMEM;
1012 } 973 }
1013 974
1014 ffb_init_fix(&all->info); 975 ffb_init_fix(&all->info);
1015 976
1016 if (register_framebuffer(&all->info) < 0) { 977 err = register_framebuffer(&all->info);
978 if (err < 0) {
1017 printk(KERN_ERR "ffb: Could not register framebuffer.\n"); 979 printk(KERN_ERR "ffb: Could not register framebuffer.\n");
1018 fb_dealloc_cmap(&all->info.cmap); 980 fb_dealloc_cmap(&all->info.cmap);
1019 kfree(all); 981 kfree(all);
1020 return; 982 return err;
1021 } 983 }
1022 984
1023 list_add(&all->list, &ffb_list); 985 dev_set_drvdata(&op->dev, all);
1024 986
1025 printk("ffb: %s at %016lx type %d DAC %d\n", 987 printk("%s: %s at %016lx, type %d, DAC revision %d\n",
988 dp->full_name,
1026 ((all->par.flags & FFB_FLAG_AFB) ? "AFB" : "FFB"), 989 ((all->par.flags & FFB_FLAG_AFB) ? "AFB" : "FFB"),
1027 regs[0].phys_addr, all->par.board_type, all->par.dac_rev); 990 all->par.physbase, all->par.board_type, all->par.dac_rev);
991
992 return 0;
1028} 993}
1029 994
1030static void ffb_scan_siblings(int root) 995static int __devinit ffb_probe(struct of_device *dev, const struct of_device_id *match)
1031{ 996{
1032 int node, child; 997 struct of_device *op = to_of_device(&dev->dev);
1033 998
1034 child = prom_getchild(root); 999 return ffb_init_one(op);
1035 for (node = prom_searchsiblings(child, "SUNW,ffb"); node;
1036 node = prom_searchsiblings(prom_getsibling(node), "SUNW,ffb"))
1037 ffb_init_one(node, root);
1038 for (node = prom_searchsiblings(child, "SUNW,afb"); node;
1039 node = prom_searchsiblings(prom_getsibling(node), "SUNW,afb"))
1040 ffb_init_one(node, root);
1041} 1000}
1042 1001
1043int __init ffb_init(void) 1002static int __devexit ffb_remove(struct of_device *dev)
1044{ 1003{
1045 int root; 1004 struct all_info *all = dev_get_drvdata(&dev->dev);
1046 1005
1047 if (fb_get_options("ffb", NULL)) 1006 unregister_framebuffer(&all->info);
1048 return -ENODEV; 1007 fb_dealloc_cmap(&all->info.cmap);
1049 1008
1050 ffb_scan_siblings(prom_root_node); 1009 of_iounmap(all->par.fbc, sizeof(struct ffb_fbc));
1010 of_iounmap(all->par.dac, sizeof(struct ffb_dac));
1051 1011
1052 root = prom_getchild(prom_root_node); 1012 kfree(all);
1053 for (root = prom_searchsiblings(root, "upa"); root; 1013
1054 root = prom_searchsiblings(prom_getsibling(root), "upa")) 1014 dev_set_drvdata(&dev->dev, NULL);
1055 ffb_scan_siblings(root);
1056 1015
1057 return 0; 1016 return 0;
1058} 1017}
1059 1018
1060void __exit ffb_exit(void) 1019static struct of_device_id ffb_match[] = {
1061{ 1020 {
1062 struct list_head *pos, *tmp; 1021 .name = "SUNW,ffb",
1022 },
1023 {
1024 .name = "SUNW,afb",
1025 },
1026 {},
1027};
1028MODULE_DEVICE_TABLE(of, ffb_match);
1029
1030static struct of_platform_driver ffb_driver = {
1031 .name = "ffb",
1032 .match_table = ffb_match,
1033 .probe = ffb_probe,
1034 .remove = __devexit_p(ffb_remove),
1035};
1063 1036
1064 list_for_each_safe(pos, tmp, &ffb_list) { 1037int __init ffb_init(void)
1065 struct all_info *all = list_entry(pos, typeof(*all), list); 1038{
1039 if (fb_get_options("ffb", NULL))
1040 return -ENODEV;
1066 1041
1067 unregister_framebuffer(&all->info); 1042 return of_register_driver(&ffb_driver, &of_bus_type);
1068 fb_dealloc_cmap(&all->info.cmap);
1069 kfree(all);
1070 }
1071} 1043}
1072 1044
1073int __init 1045void __exit ffb_exit(void)
1074ffb_setup(char *arg)
1075{ 1046{
1076 /* No cmdline options yet... */ 1047 of_unregister_driver(&ffb_driver);
1077 return 0;
1078} 1048}
1079 1049
1080module_init(ffb_init); 1050module_init(ffb_init);
1081
1082#ifdef MODULE
1083module_exit(ffb_exit); 1051module_exit(ffb_exit);
1084#endif
1085 1052
1086MODULE_DESCRIPTION("framebuffer driver for Creator/Elite3D chipsets"); 1053MODULE_DESCRIPTION("framebuffer driver for Creator/Elite3D chipsets");
1087MODULE_AUTHOR("David S. Miller <davem@redhat.com>"); 1054MODULE_AUTHOR("David S. Miller <davem@davemloft.net>");
1055MODULE_VERSION("2.0");
1088MODULE_LICENSE("GPL"); 1056MODULE_LICENSE("GPL");
diff --git a/drivers/video/leo.c b/drivers/video/leo.c
index a23cfdb9d826..f3a24338d9ac 100644
--- a/drivers/video/leo.c
+++ b/drivers/video/leo.c
@@ -1,6 +1,6 @@
1/* leo.c: LEO frame buffer driver 1/* leo.c: LEO frame buffer driver
2 * 2 *
3 * Copyright (C) 2003 David S. Miller (davem@redhat.com) 3 * Copyright (C) 2003, 2006 David S. Miller (davem@davemloft.net)
4 * Copyright (C) 1996-1999 Jakub Jelinek (jj@ultra.linux.cz) 4 * Copyright (C) 1996-1999 Jakub Jelinek (jj@ultra.linux.cz)
5 * Copyright (C) 1997 Michal Rehacek (Michal.Rehacek@st.mff.cuni.cz) 5 * Copyright (C) 1997 Michal Rehacek (Michal.Rehacek@st.mff.cuni.cz)
6 * 6 *
@@ -18,8 +18,8 @@
18#include <linux/mm.h> 18#include <linux/mm.h>
19 19
20#include <asm/io.h> 20#include <asm/io.h>
21#include <asm/sbus.h> 21#include <asm/prom.h>
22#include <asm/oplib.h> 22#include <asm/of_device.h>
23#include <asm/fbio.h> 23#include <asm/fbio.h>
24 24
25#include "sbuslib.h" 25#include "sbuslib.h"
@@ -80,10 +80,10 @@ static struct fb_ops leo_ops = {
80 80
81struct leo_cursor { 81struct leo_cursor {
82 u8 xxx0[16]; 82 u8 xxx0[16];
83 volatile u32 cur_type; 83 u32 cur_type;
84 volatile u32 cur_misc; 84 u32 cur_misc;
85 volatile u32 cur_cursxy; 85 u32 cur_cursxy;
86 volatile u32 cur_data; 86 u32 cur_data;
87}; 87};
88 88
89#define LEO_KRN_TYPE_CLUT0 0x00001000 89#define LEO_KRN_TYPE_CLUT0 0x00001000
@@ -99,27 +99,27 @@ struct leo_cursor {
99#define LEO_KRN_CSR_UNK2 0x00000001 99#define LEO_KRN_CSR_UNK2 0x00000001
100 100
101struct leo_lx_krn { 101struct leo_lx_krn {
102 volatile u32 krn_type; 102 u32 krn_type;
103 volatile u32 krn_csr; 103 u32 krn_csr;
104 volatile u32 krn_value; 104 u32 krn_value;
105}; 105};
106 106
107struct leo_lc_ss0_krn { 107struct leo_lc_ss0_krn {
108 volatile u32 misc; 108 u32 misc;
109 u8 xxx0[0x800-4]; 109 u8 xxx0[0x800-4];
110 volatile u32 rev; 110 u32 rev;
111}; 111};
112 112
113struct leo_lc_ss0_usr { 113struct leo_lc_ss0_usr {
114 volatile u32 csr; 114 u32 csr;
115 volatile u32 addrspace; 115 u32 addrspace;
116 volatile u32 fontmsk; 116 u32 fontmsk;
117 volatile u32 fontt; 117 u32 fontt;
118 volatile u32 extent; 118 u32 extent;
119 volatile u32 src; 119 u32 src;
120 u32 dst; 120 u32 dst;
121 volatile u32 copy; 121 u32 copy;
122 volatile u32 fill; 122 u32 fill;
123}; 123};
124 124
125struct leo_lc_ss1_krn { 125struct leo_lc_ss1_krn {
@@ -132,47 +132,47 @@ struct leo_lc_ss1_usr {
132 132
133struct leo_ld { 133struct leo_ld {
134 u8 xxx0[0xe00]; 134 u8 xxx0[0xe00];
135 volatile u32 csr; 135 u32 csr;
136 volatile u32 wid; 136 u32 wid;
137 volatile u32 wmask; 137 u32 wmask;
138 volatile u32 widclip; 138 u32 widclip;
139 volatile u32 vclipmin; 139 u32 vclipmin;
140 volatile u32 vclipmax; 140 u32 vclipmax;
141 volatile u32 pickmin; /* SS1 only */ 141 u32 pickmin; /* SS1 only */
142 volatile u32 pickmax; /* SS1 only */ 142 u32 pickmax; /* SS1 only */
143 volatile u32 fg; 143 u32 fg;
144 volatile u32 bg; 144 u32 bg;
145 volatile u32 src; /* Copy/Scroll (SS0 only) */ 145 u32 src; /* Copy/Scroll (SS0 only) */
146 volatile u32 dst; /* Copy/Scroll/Fill (SS0 only) */ 146 u32 dst; /* Copy/Scroll/Fill (SS0 only) */
147 volatile u32 extent; /* Copy/Scroll/Fill size (SS0 only) */ 147 u32 extent; /* Copy/Scroll/Fill size (SS0 only) */
148 u32 xxx1[3]; 148 u32 xxx1[3];
149 volatile u32 setsem; /* SS1 only */ 149 u32 setsem; /* SS1 only */
150 volatile u32 clrsem; /* SS1 only */ 150 u32 clrsem; /* SS1 only */
151 volatile u32 clrpick; /* SS1 only */ 151 u32 clrpick; /* SS1 only */
152 volatile u32 clrdat; /* SS1 only */ 152 u32 clrdat; /* SS1 only */
153 volatile u32 alpha; /* SS1 only */ 153 u32 alpha; /* SS1 only */
154 u8 xxx2[0x2c]; 154 u8 xxx2[0x2c];
155 volatile u32 winbg; 155 u32 winbg;
156 volatile u32 planemask; 156 u32 planemask;
157 volatile u32 rop; 157 u32 rop;
158 volatile u32 z; 158 u32 z;
159 volatile u32 dczf; /* SS1 only */ 159 u32 dczf; /* SS1 only */
160 volatile u32 dczb; /* SS1 only */ 160 u32 dczb; /* SS1 only */
161 volatile u32 dcs; /* SS1 only */ 161 u32 dcs; /* SS1 only */
162 volatile u32 dczs; /* SS1 only */ 162 u32 dczs; /* SS1 only */
163 volatile u32 pickfb; /* SS1 only */ 163 u32 pickfb; /* SS1 only */
164 volatile u32 pickbb; /* SS1 only */ 164 u32 pickbb; /* SS1 only */
165 volatile u32 dcfc; /* SS1 only */ 165 u32 dcfc; /* SS1 only */
166 volatile u32 forcecol; /* SS1 only */ 166 u32 forcecol; /* SS1 only */
167 volatile u32 door[8]; /* SS1 only */ 167 u32 door[8]; /* SS1 only */
168 volatile u32 pick[5]; /* SS1 only */ 168 u32 pick[5]; /* SS1 only */
169}; 169};
170 170
171#define LEO_SS1_MISC_ENABLE 0x00000001 171#define LEO_SS1_MISC_ENABLE 0x00000001
172#define LEO_SS1_MISC_STEREO 0x00000002 172#define LEO_SS1_MISC_STEREO 0x00000002
173struct leo_ld_ss1 { 173struct leo_ld_ss1 {
174 u8 xxx0[0xef4]; 174 u8 xxx0[0xef4];
175 volatile u32 ss1_misc; 175 u32 ss1_misc;
176}; 176};
177 177
178struct leo_ld_gbl { 178struct leo_ld_gbl {
@@ -193,9 +193,8 @@ struct leo_par {
193#define LEO_FLAG_BLANKED 0x00000001 193#define LEO_FLAG_BLANKED 0x00000001
194 194
195 unsigned long physbase; 195 unsigned long physbase;
196 unsigned long which_io;
196 unsigned long fbsize; 197 unsigned long fbsize;
197
198 struct sbus_dev *sdev;
199}; 198};
200 199
201static void leo_wait(struct leo_lx_krn __iomem *lx_krn) 200static void leo_wait(struct leo_lx_krn __iomem *lx_krn)
@@ -368,8 +367,7 @@ static int leo_mmap(struct fb_info *info, struct vm_area_struct *vma)
368 367
369 return sbusfb_mmap_helper(leo_mmap_map, 368 return sbusfb_mmap_helper(leo_mmap_map,
370 par->physbase, par->fbsize, 369 par->physbase, par->fbsize,
371 par->sdev->reg_addrs[0].which_io, 370 par->which_io, vma);
372 vma);
373} 371}
374 372
375static int leo_ioctl(struct fb_info *info, unsigned int cmd, unsigned long arg) 373static int leo_ioctl(struct fb_info *info, unsigned int cmd, unsigned long arg)
@@ -385,11 +383,9 @@ static int leo_ioctl(struct fb_info *info, unsigned int cmd, unsigned long arg)
385 */ 383 */
386 384
387static void 385static void
388leo_init_fix(struct fb_info *info) 386leo_init_fix(struct fb_info *info, struct device_node *dp)
389{ 387{
390 struct leo_par *par = (struct leo_par *)info->par; 388 strlcpy(info->fix.id, dp->name, sizeof(info->fix.id));
391
392 strlcpy(info->fix.id, par->sdev->prom_name, sizeof(info->fix.id));
393 389
394 info->fix.type = FB_TYPE_PACKED_PIXELS; 390 info->fix.type = FB_TYPE_PACKED_PIXELS;
395 info->fix.visual = FB_VISUAL_TRUECOLOR; 391 info->fix.visual = FB_VISUAL_TRUECOLOR;
@@ -532,60 +528,74 @@ static void leo_fixup_var_rgb(struct fb_var_screeninfo *var)
532struct all_info { 528struct all_info {
533 struct fb_info info; 529 struct fb_info info;
534 struct leo_par par; 530 struct leo_par par;
535 struct list_head list;
536}; 531};
537static LIST_HEAD(leo_list);
538 532
539static void leo_init_one(struct sbus_dev *sdev) 533static void leo_unmap_regs(struct all_info *all)
540{ 534{
541 struct all_info *all; 535 if (all->par.lc_ss0_usr)
542 int linebytes; 536 of_iounmap(all->par.lc_ss0_usr, 0x1000);
537 if (all->par.ld_ss0)
538 of_iounmap(all->par.ld_ss0, 0x1000);
539 if (all->par.ld_ss1)
540 of_iounmap(all->par.ld_ss1, 0x1000);
541 if (all->par.lx_krn)
542 of_iounmap(all->par.lx_krn, 0x1000);
543 if (all->par.cursor)
544 of_iounmap(all->par.cursor, sizeof(struct leo_cursor));
545 if (all->info.screen_base)
546 of_iounmap(all->info.screen_base, 0x800000);
547}
543 548
544 all = kmalloc(sizeof(*all), GFP_KERNEL); 549static int __devinit leo_init_one(struct of_device *op)
545 if (!all) { 550{
546 printk(KERN_ERR "leo: Cannot allocate memory.\n"); 551 struct device_node *dp = op->node;
547 return; 552 struct all_info *all;
548 } 553 int linebytes, err;
549 memset(all, 0, sizeof(*all));
550 554
551 INIT_LIST_HEAD(&all->list); 555 all = kzalloc(sizeof(*all), GFP_KERNEL);
556 if (!all)
557 return -ENOMEM;
552 558
553 spin_lock_init(&all->par.lock); 559 spin_lock_init(&all->par.lock);
554 all->par.sdev = sdev;
555 560
556 all->par.physbase = sdev->reg_addrs[0].phys_addr; 561 all->par.physbase = op->resource[0].start;
562 all->par.which_io = op->resource[0].flags & IORESOURCE_BITS;
557 563
558 sbusfb_fill_var(&all->info.var, sdev->prom_node, 32); 564 sbusfb_fill_var(&all->info.var, dp->node, 32);
559 leo_fixup_var_rgb(&all->info.var); 565 leo_fixup_var_rgb(&all->info.var);
560 566
561 linebytes = prom_getintdefault(sdev->prom_node, "linebytes", 567 linebytes = of_getintprop_default(dp, "linebytes",
562 all->info.var.xres); 568 all->info.var.xres);
563 all->par.fbsize = PAGE_ALIGN(linebytes * all->info.var.yres); 569 all->par.fbsize = PAGE_ALIGN(linebytes * all->info.var.yres);
564 570
565#ifdef CONFIG_SPARC32
566 all->info.screen_base = (char __iomem *)
567 prom_getintdefault(sdev->prom_node, "address", 0);
568#endif
569 if (!all->info.screen_base)
570 all->info.screen_base =
571 sbus_ioremap(&sdev->resource[0], LEO_OFF_SS0,
572 0x800000, "leo ram");
573
574 all->par.lc_ss0_usr = 571 all->par.lc_ss0_usr =
575 sbus_ioremap(&sdev->resource[0], LEO_OFF_LC_SS0_USR, 572 of_ioremap(&op->resource[0], LEO_OFF_LC_SS0_USR,
576 0x1000, "leolc ss0usr"); 573 0x1000, "leolc ss0usr");
577 all->par.ld_ss0 = 574 all->par.ld_ss0 =
578 sbus_ioremap(&sdev->resource[0], LEO_OFF_LD_SS0, 575 of_ioremap(&op->resource[0], LEO_OFF_LD_SS0,
579 0x1000, "leold ss0"); 576 0x1000, "leold ss0");
580 all->par.ld_ss1 = 577 all->par.ld_ss1 =
581 sbus_ioremap(&sdev->resource[0], LEO_OFF_LD_SS1, 578 of_ioremap(&op->resource[0], LEO_OFF_LD_SS1,
582 0x1000, "leold ss1"); 579 0x1000, "leold ss1");
583 all->par.lx_krn = 580 all->par.lx_krn =
584 sbus_ioremap(&sdev->resource[0], LEO_OFF_LX_KRN, 581 of_ioremap(&op->resource[0], LEO_OFF_LX_KRN,
585 0x1000, "leolx krn"); 582 0x1000, "leolx krn");
586 all->par.cursor = 583 all->par.cursor =
587 sbus_ioremap(&sdev->resource[0], LEO_OFF_LX_CURSOR, 584 of_ioremap(&op->resource[0], LEO_OFF_LX_CURSOR,
588 sizeof(struct leo_cursor), "leolx cursor"); 585 sizeof(struct leo_cursor), "leolx cursor");
586 all->info.screen_base =
587 of_ioremap(&op->resource[0], LEO_OFF_SS0,
588 0x800000, "leo ram");
589 if (!all->par.lc_ss0_usr ||
590 !all->par.ld_ss0 ||
591 !all->par.ld_ss1 ||
592 !all->par.lx_krn ||
593 !all->par.cursor ||
594 !all->info.screen_base) {
595 leo_unmap_regs(all);
596 kfree(all);
597 return -ENOMEM;
598 }
589 599
590 all->info.flags = FBINFO_DEFAULT | FBINFO_HWACCEL_YPAN; 600 all->info.flags = FBINFO_DEFAULT | FBINFO_HWACCEL_YPAN;
591 all->info.fbops = &leo_ops; 601 all->info.fbops = &leo_ops;
@@ -597,69 +607,85 @@ static void leo_init_one(struct sbus_dev *sdev)
597 leo_blank(0, &all->info); 607 leo_blank(0, &all->info);
598 608
599 if (fb_alloc_cmap(&all->info.cmap, 256, 0)) { 609 if (fb_alloc_cmap(&all->info.cmap, 256, 0)) {
600 printk(KERN_ERR "leo: Could not allocate color map.\n"); 610 leo_unmap_regs(all);
601 kfree(all); 611 kfree(all);
602 return; 612 return -ENOMEM;;
603 } 613 }
604 614
605 leo_init_fix(&all->info); 615 leo_init_fix(&all->info, dp);
606 616
607 if (register_framebuffer(&all->info) < 0) { 617 err = register_framebuffer(&all->info);
608 printk(KERN_ERR "leo: Could not register framebuffer.\n"); 618 if (err < 0) {
609 fb_dealloc_cmap(&all->info.cmap); 619 fb_dealloc_cmap(&all->info.cmap);
620 leo_unmap_regs(all);
610 kfree(all); 621 kfree(all);
611 return; 622 return err;
612 } 623 }
613 624
614 list_add(&all->list, &leo_list); 625 dev_set_drvdata(&op->dev, all);
626
627 printk("%s: leo at %lx:%lx\n",
628 dp->full_name,
629 all->par.which_io, all->par.physbase);
615 630
616 printk("leo: %s at %lx:%lx\n", 631 return 0;
617 sdev->prom_name,
618 (long) sdev->reg_addrs[0].which_io,
619 (long) sdev->reg_addrs[0].phys_addr);
620} 632}
621 633
622int __init leo_init(void) 634static int __devinit leo_probe(struct of_device *dev, const struct of_device_id *match)
623{ 635{
624 struct sbus_bus *sbus; 636 struct of_device *op = to_of_device(&dev->dev);
625 struct sbus_dev *sdev;
626 637
627 if (fb_get_options("leofb", NULL)) 638 return leo_init_one(op);
628 return -ENODEV; 639}
629 640
630 for_all_sbusdev(sdev, sbus) { 641static int __devexit leo_remove(struct of_device *dev)
631 if (!strcmp(sdev->prom_name, "leo")) 642{
632 leo_init_one(sdev); 643 struct all_info *all = dev_get_drvdata(&dev->dev);
633 } 644
645 unregister_framebuffer(&all->info);
646 fb_dealloc_cmap(&all->info.cmap);
647
648 leo_unmap_regs(all);
649
650 kfree(all);
651
652 dev_set_drvdata(&dev->dev, NULL);
634 653
635 return 0; 654 return 0;
636} 655}
637 656
638void __exit leo_exit(void) 657static struct of_device_id leo_match[] = {
639{ 658 {
640 struct list_head *pos, *tmp; 659 .name = "leo",
660 },
661 {},
662};
663MODULE_DEVICE_TABLE(of, leo_match);
664
665static struct of_platform_driver leo_driver = {
666 .name = "leo",
667 .match_table = leo_match,
668 .probe = leo_probe,
669 .remove = __devexit_p(leo_remove),
670};
641 671
642 list_for_each_safe(pos, tmp, &leo_list) { 672static int __init leo_init(void)
643 struct all_info *all = list_entry(pos, typeof(*all), list); 673{
674 if (fb_get_options("leofb", NULL))
675 return -ENODEV;
644 676
645 unregister_framebuffer(&all->info); 677 return of_register_driver(&leo_driver, &of_bus_type);
646 fb_dealloc_cmap(&all->info.cmap);
647 kfree(all);
648 }
649} 678}
650 679
651int __init 680static void __exit leo_exit(void)
652leo_setup(char *arg)
653{ 681{
654 /* No cmdline options yet... */ 682 of_unregister_driver(&leo_driver);
655 return 0;
656} 683}
657 684
658module_init(leo_init); 685module_init(leo_init);
659#ifdef MODULE
660module_exit(leo_exit); 686module_exit(leo_exit);
661#endif
662 687
663MODULE_DESCRIPTION("framebuffer driver for LEO chipsets"); 688MODULE_DESCRIPTION("framebuffer driver for LEO chipsets");
664MODULE_AUTHOR("David S. Miller <davem@redhat.com>"); 689MODULE_AUTHOR("David S. Miller <davem@davemloft.net>");
690MODULE_VERSION("2.0");
665MODULE_LICENSE("GPL"); 691MODULE_LICENSE("GPL");
diff --git a/drivers/video/p9100.c b/drivers/video/p9100.c
index 0d1957505359..56ac51d6a7f3 100644
--- a/drivers/video/p9100.c
+++ b/drivers/video/p9100.c
@@ -1,6 +1,6 @@
1/* p9100.c: P9100 frame buffer driver 1/* p9100.c: P9100 frame buffer driver
2 * 2 *
3 * Copyright (C) 2003 David S. Miller (davem@redhat.com) 3 * Copyright (C) 2003, 2006 David S. Miller (davem@davemloft.net)
4 * Copyright 1999 Derrick J Brashear (shadow@dementia.org) 4 * Copyright 1999 Derrick J Brashear (shadow@dementia.org)
5 * 5 *
6 * Driver layout based loosely on tgafb.c, see that file for credits. 6 * Driver layout based loosely on tgafb.c, see that file for credits.
@@ -17,8 +17,8 @@
17#include <linux/mm.h> 17#include <linux/mm.h>
18 18
19#include <asm/io.h> 19#include <asm/io.h>
20#include <asm/sbus.h> 20#include <asm/prom.h>
21#include <asm/oplib.h> 21#include <asm/of_device.h>
22#include <asm/fbio.h> 22#include <asm/fbio.h>
23 23
24#include "sbuslib.h" 24#include "sbuslib.h"
@@ -72,60 +72,60 @@ static struct fb_ops p9100_ops = {
72 72
73struct p9100_regs { 73struct p9100_regs {
74 /* Registers for the system control */ 74 /* Registers for the system control */
75 volatile u32 sys_base; 75 u32 sys_base;
76 volatile u32 sys_config; 76 u32 sys_config;
77 volatile u32 sys_intr; 77 u32 sys_intr;
78 volatile u32 sys_int_ena; 78 u32 sys_int_ena;
79 volatile u32 sys_alt_rd; 79 u32 sys_alt_rd;
80 volatile u32 sys_alt_wr; 80 u32 sys_alt_wr;
81 volatile u32 sys_xxx[58]; 81 u32 sys_xxx[58];
82 82
83 /* Registers for the video control */ 83 /* Registers for the video control */
84 volatile u32 vid_base; 84 u32 vid_base;
85 volatile u32 vid_hcnt; 85 u32 vid_hcnt;
86 volatile u32 vid_htotal; 86 u32 vid_htotal;
87 volatile u32 vid_hsync_rise; 87 u32 vid_hsync_rise;
88 volatile u32 vid_hblank_rise; 88 u32 vid_hblank_rise;
89 volatile u32 vid_hblank_fall; 89 u32 vid_hblank_fall;
90 volatile u32 vid_hcnt_preload; 90 u32 vid_hcnt_preload;
91 volatile u32 vid_vcnt; 91 u32 vid_vcnt;
92 volatile u32 vid_vlen; 92 u32 vid_vlen;
93 volatile u32 vid_vsync_rise; 93 u32 vid_vsync_rise;
94 volatile u32 vid_vblank_rise; 94 u32 vid_vblank_rise;
95 volatile u32 vid_vblank_fall; 95 u32 vid_vblank_fall;
96 volatile u32 vid_vcnt_preload; 96 u32 vid_vcnt_preload;
97 volatile u32 vid_screenpaint_addr; 97 u32 vid_screenpaint_addr;
98 volatile u32 vid_screenpaint_timectl1; 98 u32 vid_screenpaint_timectl1;
99 volatile u32 vid_screenpaint_qsfcnt; 99 u32 vid_screenpaint_qsfcnt;
100 volatile u32 vid_screenpaint_timectl2; 100 u32 vid_screenpaint_timectl2;
101 volatile u32 vid_xxx[15]; 101 u32 vid_xxx[15];
102 102
103 /* Registers for the video control */ 103 /* Registers for the video control */
104 volatile u32 vram_base; 104 u32 vram_base;
105 volatile u32 vram_memcfg; 105 u32 vram_memcfg;
106 volatile u32 vram_refresh_pd; 106 u32 vram_refresh_pd;
107 volatile u32 vram_refresh_cnt; 107 u32 vram_refresh_cnt;
108 volatile u32 vram_raslo_max; 108 u32 vram_raslo_max;
109 volatile u32 vram_raslo_cur; 109 u32 vram_raslo_cur;
110 volatile u32 pwrup_cfg; 110 u32 pwrup_cfg;
111 volatile u32 vram_xxx[25]; 111 u32 vram_xxx[25];
112 112
113 /* Registers for IBM RGB528 Palette */ 113 /* Registers for IBM RGB528 Palette */
114 volatile u32 ramdac_cmap_wridx; 114 u32 ramdac_cmap_wridx;
115 volatile u32 ramdac_palette_data; 115 u32 ramdac_palette_data;
116 volatile u32 ramdac_pixel_mask; 116 u32 ramdac_pixel_mask;
117 volatile u32 ramdac_palette_rdaddr; 117 u32 ramdac_palette_rdaddr;
118 volatile u32 ramdac_idx_lo; 118 u32 ramdac_idx_lo;
119 volatile u32 ramdac_idx_hi; 119 u32 ramdac_idx_hi;
120 volatile u32 ramdac_idx_data; 120 u32 ramdac_idx_data;
121 volatile u32 ramdac_idx_ctl; 121 u32 ramdac_idx_ctl;
122 volatile u32 ramdac_xxx[1784]; 122 u32 ramdac_xxx[1784];
123}; 123};
124 124
125struct p9100_cmd_parameng { 125struct p9100_cmd_parameng {
126 volatile u32 parameng_status; 126 u32 parameng_status;
127 volatile u32 parameng_bltcmd; 127 u32 parameng_bltcmd;
128 volatile u32 parameng_quadcmd; 128 u32 parameng_quadcmd;
129}; 129};
130 130
131struct p9100_par { 131struct p9100_par {
@@ -136,9 +136,8 @@ struct p9100_par {
136#define P9100_FLAG_BLANKED 0x00000001 136#define P9100_FLAG_BLANKED 0x00000001
137 137
138 unsigned long physbase; 138 unsigned long physbase;
139 unsigned long which_io;
139 unsigned long fbsize; 140 unsigned long fbsize;
140
141 struct sbus_dev *sdev;
142}; 141};
143 142
144/** 143/**
@@ -227,8 +226,7 @@ static int p9100_mmap(struct fb_info *info, struct vm_area_struct *vma)
227 226
228 return sbusfb_mmap_helper(p9100_mmap_map, 227 return sbusfb_mmap_helper(p9100_mmap_map,
229 par->physbase, par->fbsize, 228 par->physbase, par->fbsize,
230 par->sdev->reg_addrs[0].which_io, 229 par->which_io, vma);
231 vma);
232} 230}
233 231
234static int p9100_ioctl(struct fb_info *info, unsigned int cmd, 232static int p9100_ioctl(struct fb_info *info, unsigned int cmd,
@@ -245,12 +243,9 @@ static int p9100_ioctl(struct fb_info *info, unsigned int cmd,
245 * Initialisation 243 * Initialisation
246 */ 244 */
247 245
248static void 246static void p9100_init_fix(struct fb_info *info, int linebytes, struct device_node *dp)
249p9100_init_fix(struct fb_info *info, int linebytes)
250{ 247{
251 struct p9100_par *par = (struct p9100_par *)info->par; 248 strlcpy(info->fix.id, dp->name, sizeof(info->fix.id));
252
253 strlcpy(info->fix.id, par->sdev->prom_name, sizeof(info->fix.id));
254 249
255 info->fix.type = FB_TYPE_PACKED_PIXELS; 250 info->fix.type = FB_TYPE_PACKED_PIXELS;
256 info->fix.visual = FB_VISUAL_PSEUDOCOLOR; 251 info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
@@ -263,121 +258,137 @@ p9100_init_fix(struct fb_info *info, int linebytes)
263struct all_info { 258struct all_info {
264 struct fb_info info; 259 struct fb_info info;
265 struct p9100_par par; 260 struct p9100_par par;
266 struct list_head list;
267}; 261};
268static LIST_HEAD(p9100_list);
269 262
270static void p9100_init_one(struct sbus_dev *sdev) 263static int __devinit p9100_init_one(struct of_device *op)
271{ 264{
265 struct device_node *dp = op->node;
272 struct all_info *all; 266 struct all_info *all;
273 int linebytes; 267 int linebytes, err;
274
275 all = kmalloc(sizeof(*all), GFP_KERNEL);
276 if (!all) {
277 printk(KERN_ERR "p9100: Cannot allocate memory.\n");
278 return;
279 }
280 memset(all, 0, sizeof(*all));
281 268
282 INIT_LIST_HEAD(&all->list); 269 all = kzalloc(sizeof(*all), GFP_KERNEL);
270 if (!all)
271 return -ENOMEM;
283 272
284 spin_lock_init(&all->par.lock); 273 spin_lock_init(&all->par.lock);
285 all->par.sdev = sdev;
286 274
287 /* This is the framebuffer and the only resource apps can mmap. */ 275 /* This is the framebuffer and the only resource apps can mmap. */
288 all->par.physbase = sdev->reg_addrs[2].phys_addr; 276 all->par.physbase = op->resource[2].start;
277 all->par.which_io = op->resource[2].flags & IORESOURCE_BITS;
289 278
290 sbusfb_fill_var(&all->info.var, sdev->prom_node, 8); 279 sbusfb_fill_var(&all->info.var, dp->node, 8);
291 all->info.var.red.length = 8; 280 all->info.var.red.length = 8;
292 all->info.var.green.length = 8; 281 all->info.var.green.length = 8;
293 all->info.var.blue.length = 8; 282 all->info.var.blue.length = 8;
294 283
295 linebytes = prom_getintdefault(sdev->prom_node, "linebytes", 284 linebytes = of_getintprop_default(dp, "linebytes",
296 all->info.var.xres); 285 all->info.var.xres);
297 all->par.fbsize = PAGE_ALIGN(linebytes * all->info.var.yres); 286 all->par.fbsize = PAGE_ALIGN(linebytes * all->info.var.yres);
298 287
299 all->par.regs = sbus_ioremap(&sdev->resource[0], 0, 288 all->par.regs = of_ioremap(&op->resource[0], 0,
300 sizeof(struct p9100_regs), "p9100 regs"); 289 sizeof(struct p9100_regs), "p9100 regs");
290 if (!all->par.regs) {
291 kfree(all);
292 return -ENOMEM;
293 }
301 294
302 all->info.flags = FBINFO_DEFAULT; 295 all->info.flags = FBINFO_DEFAULT;
303 all->info.fbops = &p9100_ops; 296 all->info.fbops = &p9100_ops;
304#ifdef CONFIG_SPARC32 297 all->info.screen_base = of_ioremap(&op->resource[2], 0,
305 all->info.screen_base = (char __iomem *) 298 all->par.fbsize, "p9100 ram");
306 prom_getintdefault(sdev->prom_node, "address", 0); 299 if (!all->info.screen_base) {
307#endif 300 of_iounmap(all->par.regs, sizeof(struct p9100_regs));
308 if (!all->info.screen_base) 301 kfree(all);
309 all->info.screen_base = sbus_ioremap(&sdev->resource[2], 0, 302 return -ENOMEM;
310 all->par.fbsize, "p9100 ram"); 303 }
311 all->info.par = &all->par; 304 all->info.par = &all->par;
312 305
313 p9100_blank(0, &all->info); 306 p9100_blank(0, &all->info);
314 307
315 if (fb_alloc_cmap(&all->info.cmap, 256, 0)) { 308 if (fb_alloc_cmap(&all->info.cmap, 256, 0)) {
316 printk(KERN_ERR "p9100: Could not allocate color map.\n"); 309 of_iounmap(all->par.regs, sizeof(struct p9100_regs));
310 of_iounmap(all->info.screen_base, all->par.fbsize);
317 kfree(all); 311 kfree(all);
318 return; 312 return -ENOMEM;
319 } 313 }
320 314
321 p9100_init_fix(&all->info, linebytes); 315 p9100_init_fix(&all->info, linebytes, dp);
322 316
323 if (register_framebuffer(&all->info) < 0) { 317 err = register_framebuffer(&all->info);
324 printk(KERN_ERR "p9100: Could not register framebuffer.\n"); 318 if (err < 0) {
325 fb_dealloc_cmap(&all->info.cmap); 319 fb_dealloc_cmap(&all->info.cmap);
320 of_iounmap(all->par.regs, sizeof(struct p9100_regs));
321 of_iounmap(all->info.screen_base, all->par.fbsize);
326 kfree(all); 322 kfree(all);
327 return; 323 return err;
328 } 324 }
329 fb_set_cmap(&all->info.cmap, &all->info); 325 fb_set_cmap(&all->info.cmap, &all->info);
330 326
331 list_add(&all->list, &p9100_list); 327 dev_set_drvdata(&op->dev, all);
328
329 printk("%s: p9100 at %lx:%lx\n",
330 dp->full_name,
331 all->par.which_io, all->par.physbase);
332 332
333 printk("p9100: %s at %lx:%lx\n", 333 return 0;
334 sdev->prom_name,
335 (long) sdev->reg_addrs[0].which_io,
336 (long) sdev->reg_addrs[0].phys_addr);
337} 334}
338 335
339int __init p9100_init(void) 336static int __devinit p9100_probe(struct of_device *dev, const struct of_device_id *match)
340{ 337{
341 struct sbus_bus *sbus; 338 struct of_device *op = to_of_device(&dev->dev);
342 struct sbus_dev *sdev;
343 339
344 if (fb_get_options("p9100fb", NULL)) 340 return p9100_init_one(op);
345 return -ENODEV; 341}
346 342
347 for_all_sbusdev(sdev, sbus) { 343static int __devexit p9100_remove(struct of_device *dev)
348 if (!strcmp(sdev->prom_name, "p9100")) 344{
349 p9100_init_one(sdev); 345 struct all_info *all = dev_get_drvdata(&dev->dev);
350 } 346
347 unregister_framebuffer(&all->info);
348 fb_dealloc_cmap(&all->info.cmap);
349
350 of_iounmap(all->par.regs, sizeof(struct p9100_regs));
351 of_iounmap(all->info.screen_base, all->par.fbsize);
352
353 kfree(all);
354
355 dev_set_drvdata(&dev->dev, NULL);
351 356
352 return 0; 357 return 0;
353} 358}
354 359
355void __exit p9100_exit(void) 360static struct of_device_id p9100_match[] = {
356{ 361 {
357 struct list_head *pos, *tmp; 362 .name = "p9100",
363 },
364 {},
365};
366MODULE_DEVICE_TABLE(of, p9100_match);
358 367
359 list_for_each_safe(pos, tmp, &p9100_list) { 368static struct of_platform_driver p9100_driver = {
360 struct all_info *all = list_entry(pos, typeof(*all), list); 369 .name = "p9100",
370 .match_table = p9100_match,
371 .probe = p9100_probe,
372 .remove = __devexit_p(p9100_remove),
373};
361 374
362 unregister_framebuffer(&all->info); 375static int __init p9100_init(void)
363 fb_dealloc_cmap(&all->info.cmap); 376{
364 kfree(all); 377 if (fb_get_options("p9100fb", NULL))
365 } 378 return -ENODEV;
379
380 return of_register_driver(&p9100_driver, &of_bus_type);
366} 381}
367 382
368int __init 383static void __exit p9100_exit(void)
369p9100_setup(char *arg)
370{ 384{
371 /* No cmdline options yet... */ 385 of_unregister_driver(&p9100_driver);
372 return 0;
373} 386}
374 387
375module_init(p9100_init); 388module_init(p9100_init);
376
377#ifdef MODULE
378module_exit(p9100_exit); 389module_exit(p9100_exit);
379#endif
380 390
381MODULE_DESCRIPTION("framebuffer driver for P9100 chipsets"); 391MODULE_DESCRIPTION("framebuffer driver for P9100 chipsets");
382MODULE_AUTHOR("David S. Miller <davem@redhat.com>"); 392MODULE_AUTHOR("David S. Miller <davem@davemloft.net>");
393MODULE_VERSION("2.0");
383MODULE_LICENSE("GPL"); 394MODULE_LICENSE("GPL");
diff --git a/drivers/video/tcx.c b/drivers/video/tcx.c
index 95b918229d9b..6990ab11cd06 100644
--- a/drivers/video/tcx.c
+++ b/drivers/video/tcx.c
@@ -1,6 +1,6 @@
1/* tcx.c: TCX frame buffer driver 1/* tcx.c: TCX frame buffer driver
2 * 2 *
3 * Copyright (C) 2003 David S. Miller (davem@redhat.com) 3 * Copyright (C) 2003, 2006 David S. Miller (davem@davemloft.net)
4 * Copyright (C) 1996,1998 Jakub Jelinek (jj@ultra.linux.cz) 4 * Copyright (C) 1996,1998 Jakub Jelinek (jj@ultra.linux.cz)
5 * Copyright (C) 1996 Miguel de Icaza (miguel@nuclecu.unam.mx) 5 * Copyright (C) 1996 Miguel de Icaza (miguel@nuclecu.unam.mx)
6 * Copyright (C) 1996 Eddie C. Dost (ecd@skynet.be) 6 * Copyright (C) 1996 Eddie C. Dost (ecd@skynet.be)
@@ -19,8 +19,8 @@
19#include <linux/mm.h> 19#include <linux/mm.h>
20 20
21#include <asm/io.h> 21#include <asm/io.h>
22#include <asm/sbus.h> 22#include <asm/prom.h>
23#include <asm/oplib.h> 23#include <asm/of_device.h>
24#include <asm/fbio.h> 24#include <asm/fbio.h>
25 25
26#include "sbuslib.h" 26#include "sbuslib.h"
@@ -77,32 +77,32 @@ static struct fb_ops tcx_ops = {
77 77
78/* The contents are unknown */ 78/* The contents are unknown */
79struct tcx_tec { 79struct tcx_tec {
80 volatile u32 tec_matrix; 80 u32 tec_matrix;
81 volatile u32 tec_clip; 81 u32 tec_clip;
82 volatile u32 tec_vdc; 82 u32 tec_vdc;
83}; 83};
84 84
85struct tcx_thc { 85struct tcx_thc {
86 volatile u32 thc_rev; 86 u32 thc_rev;
87 u32 thc_pad0[511]; 87 u32 thc_pad0[511];
88 volatile u32 thc_hs; /* hsync timing */ 88 u32 thc_hs; /* hsync timing */
89 volatile u32 thc_hsdvs; 89 u32 thc_hsdvs;
90 volatile u32 thc_hd; 90 u32 thc_hd;
91 volatile u32 thc_vs; /* vsync timing */ 91 u32 thc_vs; /* vsync timing */
92 volatile u32 thc_vd; 92 u32 thc_vd;
93 volatile u32 thc_refresh; 93 u32 thc_refresh;
94 volatile u32 thc_misc; 94 u32 thc_misc;
95 u32 thc_pad1[56]; 95 u32 thc_pad1[56];
96 volatile u32 thc_cursxy; /* cursor x,y position (16 bits each) */ 96 u32 thc_cursxy; /* cursor x,y position (16 bits each) */
97 volatile u32 thc_cursmask[32]; /* cursor mask bits */ 97 u32 thc_cursmask[32]; /* cursor mask bits */
98 volatile u32 thc_cursbits[32]; /* what to show where mask enabled */ 98 u32 thc_cursbits[32]; /* what to show where mask enabled */
99}; 99};
100 100
101struct bt_regs { 101struct bt_regs {
102 volatile u32 addr; 102 u32 addr;
103 volatile u32 color_map; 103 u32 color_map;
104 volatile u32 control; 104 u32 control;
105 volatile u32 cursor; 105 u32 cursor;
106}; 106};
107 107
108#define TCX_MMAP_ENTRIES 14 108#define TCX_MMAP_ENTRIES 14
@@ -112,24 +112,23 @@ struct tcx_par {
112 struct bt_regs __iomem *bt; 112 struct bt_regs __iomem *bt;
113 struct tcx_thc __iomem *thc; 113 struct tcx_thc __iomem *thc;
114 struct tcx_tec __iomem *tec; 114 struct tcx_tec __iomem *tec;
115 volatile u32 __iomem *cplane; 115 u32 __iomem *cplane;
116 116
117 u32 flags; 117 u32 flags;
118#define TCX_FLAG_BLANKED 0x00000001 118#define TCX_FLAG_BLANKED 0x00000001
119 119
120 unsigned long physbase; 120 unsigned long physbase;
121 unsigned long which_io;
121 unsigned long fbsize; 122 unsigned long fbsize;
122 123
123 struct sbus_mmap_map mmap_map[TCX_MMAP_ENTRIES]; 124 struct sbus_mmap_map mmap_map[TCX_MMAP_ENTRIES];
124 int lowdepth; 125 int lowdepth;
125
126 struct sbus_dev *sdev;
127}; 126};
128 127
129/* Reset control plane so that WID is 8-bit plane. */ 128/* Reset control plane so that WID is 8-bit plane. */
130static void __tcx_set_control_plane (struct tcx_par *par) 129static void __tcx_set_control_plane (struct tcx_par *par)
131{ 130{
132 volatile u32 __iomem *p, *pend; 131 u32 __iomem *p, *pend;
133 132
134 if (par->lowdepth) 133 if (par->lowdepth)
135 return; 134 return;
@@ -307,8 +306,7 @@ static int tcx_mmap(struct fb_info *info, struct vm_area_struct *vma)
307 306
308 return sbusfb_mmap_helper(par->mmap_map, 307 return sbusfb_mmap_helper(par->mmap_map,
309 par->physbase, par->fbsize, 308 par->physbase, par->fbsize,
310 par->sdev->reg_addrs[0].which_io, 309 par->which_io, vma);
311 vma);
312} 310}
313 311
314static int tcx_ioctl(struct fb_info *info, unsigned int cmd, 312static int tcx_ioctl(struct fb_info *info, unsigned int cmd,
@@ -350,48 +348,71 @@ tcx_init_fix(struct fb_info *info, int linebytes)
350struct all_info { 348struct all_info {
351 struct fb_info info; 349 struct fb_info info;
352 struct tcx_par par; 350 struct tcx_par par;
353 struct list_head list;
354}; 351};
355static LIST_HEAD(tcx_list);
356 352
357static void tcx_init_one(struct sbus_dev *sdev) 353static void tcx_unmap_regs(struct all_info *all)
358{ 354{
359 struct all_info *all; 355 if (all->par.tec)
360 int linebytes, i; 356 of_iounmap(all->par.tec, sizeof(struct tcx_tec));
357 if (all->par.thc)
358 of_iounmap(all->par.thc, sizeof(struct tcx_thc));
359 if (all->par.bt)
360 of_iounmap(all->par.bt, sizeof(struct bt_regs));
361 if (all->par.cplane)
362 of_iounmap(all->par.cplane, all->par.fbsize * sizeof(u32));
363 if (all->info.screen_base)
364 of_iounmap(all->info.screen_base, all->par.fbsize);
365}
361 366
362 all = kmalloc(sizeof(*all), GFP_KERNEL); 367static int __devinit tcx_init_one(struct of_device *op)
363 if (!all) { 368{
364 printk(KERN_ERR "tcx: Cannot allocate memory.\n"); 369 struct device_node *dp = op->node;
365 return; 370 struct all_info *all;
366 } 371 int linebytes, i, err;
367 memset(all, 0, sizeof(*all));
368 372
369 INIT_LIST_HEAD(&all->list); 373 all = kzalloc(sizeof(*all), GFP_KERNEL);
374 if (!all)
375 return -ENOMEM;
370 376
371 spin_lock_init(&all->par.lock); 377 spin_lock_init(&all->par.lock);
372 all->par.sdev = sdev;
373 378
374 all->par.lowdepth = prom_getbool(sdev->prom_node, "tcx-8-bit"); 379 all->par.lowdepth =
380 (of_find_property(dp, "tcx-8-bit", NULL) != NULL);
375 381
376 sbusfb_fill_var(&all->info.var, sdev->prom_node, 8); 382 sbusfb_fill_var(&all->info.var, dp->node, 8);
377 all->info.var.red.length = 8; 383 all->info.var.red.length = 8;
378 all->info.var.green.length = 8; 384 all->info.var.green.length = 8;
379 all->info.var.blue.length = 8; 385 all->info.var.blue.length = 8;
380 386
381 linebytes = prom_getintdefault(sdev->prom_node, "linebytes", 387 linebytes = of_getintprop_default(dp, "linebytes",
382 all->info.var.xres); 388 all->info.var.xres);
383 all->par.fbsize = PAGE_ALIGN(linebytes * all->info.var.yres); 389 all->par.fbsize = PAGE_ALIGN(linebytes * all->info.var.yres);
384 390
385 all->par.tec = sbus_ioremap(&sdev->resource[7], 0, 391 all->par.tec = of_ioremap(&op->resource[7], 0,
386 sizeof(struct tcx_tec), "tcx tec"); 392 sizeof(struct tcx_tec), "tcx tec");
387 all->par.thc = sbus_ioremap(&sdev->resource[9], 0, 393 all->par.thc = of_ioremap(&op->resource[9], 0,
388 sizeof(struct tcx_thc), "tcx thc"); 394 sizeof(struct tcx_thc), "tcx thc");
389 all->par.bt = sbus_ioremap(&sdev->resource[8], 0, 395 all->par.bt = of_ioremap(&op->resource[8], 0,
390 sizeof(struct bt_regs), "tcx dac"); 396 sizeof(struct bt_regs), "tcx dac");
397 all->info.screen_base = of_ioremap(&op->resource[0], 0,
398 all->par.fbsize, "tcx ram");
399 if (!all->par.tec || !all->par.thc ||
400 !all->par.bt || !all->info.screen_base) {
401 tcx_unmap_regs(all);
402 kfree(all);
403 return -ENOMEM;
404 }
405
391 memcpy(&all->par.mmap_map, &__tcx_mmap_map, sizeof(all->par.mmap_map)); 406 memcpy(&all->par.mmap_map, &__tcx_mmap_map, sizeof(all->par.mmap_map));
392 if (!all->par.lowdepth) { 407 if (!all->par.lowdepth) {
393 all->par.cplane = sbus_ioremap(&sdev->resource[4], 0, 408 all->par.cplane = of_ioremap(&op->resource[4], 0,
394 all->par.fbsize * sizeof(u32), "tcx cplane"); 409 all->par.fbsize * sizeof(u32),
410 "tcx cplane");
411 if (!all->par.cplane) {
412 tcx_unmap_regs(all);
413 kfree(all);
414 return -ENOMEM;
415 }
395 } else { 416 } else {
396 all->par.mmap_map[1].size = SBUS_MMAP_EMPTY; 417 all->par.mmap_map[1].size = SBUS_MMAP_EMPTY;
397 all->par.mmap_map[4].size = SBUS_MMAP_EMPTY; 418 all->par.mmap_map[4].size = SBUS_MMAP_EMPTY;
@@ -400,6 +421,8 @@ static void tcx_init_one(struct sbus_dev *sdev)
400 } 421 }
401 422
402 all->par.physbase = 0; 423 all->par.physbase = 0;
424 all->par.which_io = op->resource[0].flags & IORESOURCE_BITS;
425
403 for (i = 0; i < TCX_MMAP_ENTRIES; i++) { 426 for (i = 0; i < TCX_MMAP_ENTRIES; i++) {
404 int j; 427 int j;
405 428
@@ -416,18 +439,11 @@ static void tcx_init_one(struct sbus_dev *sdev)
416 j = i; 439 j = i;
417 break; 440 break;
418 }; 441 };
419 all->par.mmap_map[i].poff = sdev->reg_addrs[j].phys_addr; 442 all->par.mmap_map[i].poff = op->resource[j].start;
420 } 443 }
421 444
422 all->info.flags = FBINFO_DEFAULT; 445 all->info.flags = FBINFO_DEFAULT;
423 all->info.fbops = &tcx_ops; 446 all->info.fbops = &tcx_ops;
424#ifdef CONFIG_SPARC32
425 all->info.screen_base = (char __iomem *)
426 prom_getintdefault(sdev->prom_node, "address", 0);
427#endif
428 if (!all->info.screen_base)
429 all->info.screen_base = sbus_ioremap(&sdev->resource[0], 0,
430 all->par.fbsize, "tcx ram");
431 all->info.par = &all->par; 447 all->info.par = &all->par;
432 448
433 /* Initialize brooktree DAC. */ 449 /* Initialize brooktree DAC. */
@@ -445,72 +461,88 @@ static void tcx_init_one(struct sbus_dev *sdev)
445 tcx_blank(FB_BLANK_UNBLANK, &all->info); 461 tcx_blank(FB_BLANK_UNBLANK, &all->info);
446 462
447 if (fb_alloc_cmap(&all->info.cmap, 256, 0)) { 463 if (fb_alloc_cmap(&all->info.cmap, 256, 0)) {
448 printk(KERN_ERR "tcx: Could not allocate color map.\n"); 464 tcx_unmap_regs(all);
449 kfree(all); 465 kfree(all);
450 return; 466 return -ENOMEM;
451 } 467 }
452 468
453 fb_set_cmap(&all->info.cmap, &all->info); 469 fb_set_cmap(&all->info.cmap, &all->info);
454 tcx_init_fix(&all->info, linebytes); 470 tcx_init_fix(&all->info, linebytes);
455 471
456 if (register_framebuffer(&all->info) < 0) { 472 err = register_framebuffer(&all->info);
457 printk(KERN_ERR "tcx: Could not register framebuffer.\n"); 473 if (err < 0) {
458 fb_dealloc_cmap(&all->info.cmap); 474 fb_dealloc_cmap(&all->info.cmap);
475 tcx_unmap_regs(all);
459 kfree(all); 476 kfree(all);
460 return; 477 return err;
461 } 478 }
462 479
463 list_add(&all->list, &tcx_list); 480 dev_set_drvdata(&op->dev, all);
464 481
465 printk("tcx: %s at %lx:%lx, %s\n", 482 printk("%s: TCX at %lx:%lx, %s\n",
466 sdev->prom_name, 483 dp->full_name,
467 (long) sdev->reg_addrs[0].which_io, 484 all->par.which_io,
468 (long) sdev->reg_addrs[0].phys_addr, 485 op->resource[0].start,
469 all->par.lowdepth ? "8-bit only" : "24-bit depth"); 486 all->par.lowdepth ? "8-bit only" : "24-bit depth");
487
488 return 0;
470} 489}
471 490
472int __init tcx_init(void) 491static int __devinit tcx_probe(struct of_device *dev, const struct of_device_id *match)
473{ 492{
474 struct sbus_bus *sbus; 493 struct of_device *op = to_of_device(&dev->dev);
475 struct sbus_dev *sdev;
476 494
477 if (fb_get_options("tcxfb", NULL)) 495 return tcx_init_one(op);
478 return -ENODEV; 496}
479 497
480 for_all_sbusdev(sdev, sbus) { 498static int __devexit tcx_remove(struct of_device *dev)
481 if (!strcmp(sdev->prom_name, "SUNW,tcx")) 499{
482 tcx_init_one(sdev); 500 struct all_info *all = dev_get_drvdata(&dev->dev);
483 } 501
502 unregister_framebuffer(&all->info);
503 fb_dealloc_cmap(&all->info.cmap);
504
505 tcx_unmap_regs(all);
506
507 kfree(all);
508
509 dev_set_drvdata(&dev->dev, NULL);
484 510
485 return 0; 511 return 0;
486} 512}
487 513
488void __exit tcx_exit(void) 514static struct of_device_id tcx_match[] = {
489{ 515 {
490 struct list_head *pos, *tmp; 516 .name = "SUNW,tcx",
517 },
518 {},
519};
520MODULE_DEVICE_TABLE(of, tcx_match);
491 521
492 list_for_each_safe(pos, tmp, &tcx_list) { 522static struct of_platform_driver tcx_driver = {
493 struct all_info *all = list_entry(pos, typeof(*all), list); 523 .name = "tcx",
524 .match_table = tcx_match,
525 .probe = tcx_probe,
526 .remove = __devexit_p(tcx_remove),
527};
494 528
495 unregister_framebuffer(&all->info); 529int __init tcx_init(void)
496 fb_dealloc_cmap(&all->info.cmap); 530{
497 kfree(all); 531 if (fb_get_options("tcxfb", NULL))
498 } 532 return -ENODEV;
533
534 return of_register_driver(&tcx_driver, &of_bus_type);
499} 535}
500 536
501int __init 537void __exit tcx_exit(void)
502tcx_setup(char *arg)
503{ 538{
504 /* No cmdline options yet... */ 539 of_unregister_driver(&tcx_driver);
505 return 0;
506} 540}
507 541
508module_init(tcx_init); 542module_init(tcx_init);
509
510#ifdef MODULE
511module_exit(tcx_exit); 543module_exit(tcx_exit);
512#endif
513 544
514MODULE_DESCRIPTION("framebuffer driver for TCX chipsets"); 545MODULE_DESCRIPTION("framebuffer driver for TCX chipsets");
515MODULE_AUTHOR("David S. Miller <davem@redhat.com>"); 546MODULE_AUTHOR("David S. Miller <davem@davemloft.net>");
547MODULE_VERSION("2.0");
516MODULE_LICENSE("GPL"); 548MODULE_LICENSE("GPL");
diff --git a/include/asm-sparc/of_device.h b/include/asm-sparc/of_device.h
index 4816d102f918..80ea31f6e17f 100644
--- a/include/asm-sparc/of_device.h
+++ b/include/asm-sparc/of_device.h
@@ -4,10 +4,12 @@
4 4
5#include <linux/device.h> 5#include <linux/device.h>
6#include <linux/mod_devicetable.h> 6#include <linux/mod_devicetable.h>
7#include <asm/openprom.h>
7#include <asm/prom.h> 8#include <asm/prom.h>
8 9
9extern struct bus_type ebus_bus_type; 10extern struct bus_type ebus_bus_type;
10extern struct bus_type sbus_bus_type; 11extern struct bus_type sbus_bus_type;
12extern struct bus_type of_bus_type;
11 13
12/* 14/*
13 * The of_device is a kind of "base class" that is a superset of 15 * The of_device is a kind of "base class" that is a superset of
@@ -16,11 +18,25 @@ extern struct bus_type sbus_bus_type;
16 */ 18 */
17struct of_device 19struct of_device
18{ 20{
19 struct device_node *node; /* OF device node */ 21 struct device_node *node;
20 struct device dev; /* Generic device interface */ 22 struct device dev;
23 struct resource resource[PROMREG_MAX];
24 unsigned int irqs[PROMINTR_MAX];
25 int num_irqs;
26
27 void *sysdata;
28
29 int slot;
30 int portid;
31 int clock_freq;
21}; 32};
22#define to_of_device(d) container_of(d, struct of_device, dev) 33#define to_of_device(d) container_of(d, struct of_device, dev)
23 34
35extern void __iomem *of_ioremap(struct resource *res, unsigned long offset, unsigned long size, char *name);
36extern void of_iounmap(void __iomem *base, unsigned long size);
37
38extern struct of_device *of_find_device_by_node(struct device_node *);
39
24extern const struct of_device_id *of_match_device( 40extern const struct of_device_id *of_match_device(
25 const struct of_device_id *matches, const struct of_device *dev); 41 const struct of_device_id *matches, const struct of_device *dev);
26 42
diff --git a/include/asm-sparc/prom.h b/include/asm-sparc/prom.h
index f9cf44c07164..86c13dccea3d 100644
--- a/include/asm-sparc/prom.h
+++ b/include/asm-sparc/prom.h
@@ -25,11 +25,6 @@
25typedef u32 phandle; 25typedef u32 phandle;
26typedef u32 ihandle; 26typedef u32 ihandle;
27 27
28struct interrupt_info {
29 int line;
30 int sense; /* +ve/-ve logic, edge or level, etc. */
31};
32
33struct property { 28struct property {
34 char *name; 29 char *name;
35 int length; 30 int length;
@@ -43,9 +38,6 @@ struct device_node {
43 char *name; 38 char *name;
44 char *type; 39 char *type;
45 phandle node; 40 phandle node;
46 phandle linux_phandle;
47 int n_intrs;
48 struct interrupt_info *intrs;
49 char *path_component_name; 41 char *path_component_name;
50 char *full_name; 42 char *full_name;
51 43
@@ -69,6 +61,8 @@ struct device_node {
69#define OF_IS_DYNAMIC(x) test_bit(OF_DYNAMIC, &x->_flags) 61#define OF_IS_DYNAMIC(x) test_bit(OF_DYNAMIC, &x->_flags)
70#define OF_MARK_DYNAMIC(x) set_bit(OF_DYNAMIC, &x->_flags) 62#define OF_MARK_DYNAMIC(x) set_bit(OF_DYNAMIC, &x->_flags)
71 63
64#define OF_BAD_ADDR ((u64)-1)
65
72static inline void set_node_proc_entry(struct device_node *dn, struct proc_dir_entry *de) 66static inline void set_node_proc_entry(struct device_node *dn, struct proc_dir_entry *de)
73{ 67{
74 dn->pde = de; 68 dn->pde = de;
@@ -101,6 +95,8 @@ extern int of_set_property(struct device_node *node, const char *name, void *val
101extern int of_getintprop_default(struct device_node *np, 95extern int of_getintprop_default(struct device_node *np,
102 const char *name, 96 const char *name,
103 int def); 97 int def);
98extern int of_n_addr_cells(struct device_node *np);
99extern int of_n_size_cells(struct device_node *np);
104 100
105extern void prom_build_devicetree(void); 101extern void prom_build_devicetree(void);
106 102
diff --git a/include/asm-sparc64/of_device.h b/include/asm-sparc64/of_device.h
index 024088ef9d27..a62c7b997d66 100644
--- a/include/asm-sparc64/of_device.h
+++ b/include/asm-sparc64/of_device.h
@@ -4,11 +4,13 @@
4 4
5#include <linux/device.h> 5#include <linux/device.h>
6#include <linux/mod_devicetable.h> 6#include <linux/mod_devicetable.h>
7#include <asm/openprom.h>
7#include <asm/prom.h> 8#include <asm/prom.h>
8 9
9extern struct bus_type isa_bus_type; 10extern struct bus_type isa_bus_type;
10extern struct bus_type ebus_bus_type; 11extern struct bus_type ebus_bus_type;
11extern struct bus_type sbus_bus_type; 12extern struct bus_type sbus_bus_type;
13extern struct bus_type of_bus_type;
12 14
13/* 15/*
14 * The of_device is a kind of "base class" that is a superset of 16 * The of_device is a kind of "base class" that is a superset of
@@ -17,11 +19,25 @@ extern struct bus_type sbus_bus_type;
17 */ 19 */
18struct of_device 20struct of_device
19{ 21{
20 struct device_node *node; /* OF device node */ 22 struct device_node *node;
21 struct device dev; /* Generic device interface */ 23 struct device dev;
24 struct resource resource[PROMREG_MAX];
25 unsigned int irqs[PROMINTR_MAX];
26 int num_irqs;
27
28 void *sysdata;
29
30 int slot;
31 int portid;
32 int clock_freq;
22}; 33};
23#define to_of_device(d) container_of(d, struct of_device, dev) 34#define to_of_device(d) container_of(d, struct of_device, dev)
24 35
36extern void __iomem *of_ioremap(struct resource *res, unsigned long offset, unsigned long size, char *name);
37extern void of_iounmap(void __iomem *base, unsigned long size);
38
39extern struct of_device *of_find_device_by_node(struct device_node *);
40
25extern const struct of_device_id *of_match_device( 41extern const struct of_device_id *of_match_device(
26 const struct of_device_id *matches, const struct of_device *dev); 42 const struct of_device_id *matches, const struct of_device *dev);
27 43
diff --git a/include/asm-sparc64/pbm.h b/include/asm-sparc64/pbm.h
index cebe80b1da6c..dcfa7629358c 100644
--- a/include/asm-sparc64/pbm.h
+++ b/include/asm-sparc64/pbm.h
@@ -16,6 +16,7 @@
16#include <asm/page.h> 16#include <asm/page.h>
17#include <asm/oplib.h> 17#include <asm/oplib.h>
18#include <asm/prom.h> 18#include <asm/prom.h>
19#include <asm/of_device.h>
19#include <asm/iommu.h> 20#include <asm/iommu.h>
20 21
21/* The abstraction used here is that there are PCI controllers, 22/* The abstraction used here is that there are PCI controllers,
@@ -209,7 +210,6 @@ struct pci_controller_info {
209 210
210 /* Operations which are controller specific. */ 211 /* Operations which are controller specific. */
211 void (*scan_bus)(struct pci_controller_info *); 212 void (*scan_bus)(struct pci_controller_info *);
212 unsigned int (*irq_build)(struct pci_pbm_info *, struct pci_dev *, unsigned int);
213 void (*base_address_update)(struct pci_dev *, int); 213 void (*base_address_update)(struct pci_dev *, int);
214 void (*resource_adjust)(struct pci_dev *, struct resource *, struct resource *); 214 void (*resource_adjust)(struct pci_dev *, struct resource *, struct resource *);
215 215
@@ -217,8 +217,6 @@ struct pci_controller_info {
217 struct pci_ops *pci_ops; 217 struct pci_ops *pci_ops;
218 unsigned int pci_first_busno; 218 unsigned int pci_first_busno;
219 unsigned int pci_last_busno; 219 unsigned int pci_last_busno;
220
221 void *starfire_cookie;
222}; 220};
223 221
224/* PCI devices which are not bridges have this placed in their pci_dev 222/* PCI devices which are not bridges have this placed in their pci_dev
@@ -228,6 +226,7 @@ struct pci_controller_info {
228struct pcidev_cookie { 226struct pcidev_cookie {
229 struct pci_pbm_info *pbm; 227 struct pci_pbm_info *pbm;
230 struct device_node *prom_node; 228 struct device_node *prom_node;
229 struct of_device *op;
231 struct linux_prom_pci_registers prom_regs[PROMREG_MAX]; 230 struct linux_prom_pci_registers prom_regs[PROMREG_MAX];
232 int num_prom_regs; 231 int num_prom_regs;
233 struct linux_prom_pci_registers prom_assignments[PROMREG_MAX]; 232 struct linux_prom_pci_registers prom_assignments[PROMREG_MAX];
diff --git a/include/asm-sparc64/prom.h b/include/asm-sparc64/prom.h
index 265614d497c4..99671ed6625d 100644
--- a/include/asm-sparc64/prom.h
+++ b/include/asm-sparc64/prom.h
@@ -25,11 +25,6 @@
25typedef u32 phandle; 25typedef u32 phandle;
26typedef u32 ihandle; 26typedef u32 ihandle;
27 27
28struct interrupt_info {
29 int line;
30 int sense; /* +ve/-ve logic, edge or level, etc. */
31};
32
33struct property { 28struct property {
34 char *name; 29 char *name;
35 int length; 30 int length;
@@ -39,13 +34,11 @@ struct property {
39 unsigned int unique_id; 34 unsigned int unique_id;
40}; 35};
41 36
37struct of_irq_controller;
42struct device_node { 38struct device_node {
43 char *name; 39 char *name;
44 char *type; 40 char *type;
45 phandle node; 41 phandle node;
46 phandle linux_phandle;
47 int n_intrs;
48 struct interrupt_info *intrs;
49 char *path_component_name; 42 char *path_component_name;
50 char *full_name; 43 char *full_name;
51 44
@@ -61,6 +54,13 @@ struct device_node {
61 unsigned long _flags; 54 unsigned long _flags;
62 void *data; 55 void *data;
63 unsigned int unique_id; 56 unsigned int unique_id;
57
58 struct of_irq_controller *irq_trans;
59};
60
61struct of_irq_controller {
62 unsigned int (*irq_build)(struct device_node *, unsigned int, void *);
63 void *data;
64}; 64};
65 65
66/* flag descriptions */ 66/* flag descriptions */
@@ -69,6 +69,8 @@ struct device_node {
69#define OF_IS_DYNAMIC(x) test_bit(OF_DYNAMIC, &x->_flags) 69#define OF_IS_DYNAMIC(x) test_bit(OF_DYNAMIC, &x->_flags)
70#define OF_MARK_DYNAMIC(x) set_bit(OF_DYNAMIC, &x->_flags) 70#define OF_MARK_DYNAMIC(x) set_bit(OF_DYNAMIC, &x->_flags)
71 71
72#define OF_BAD_ADDR ((u64)-1)
73
72static inline void set_node_proc_entry(struct device_node *dn, struct proc_dir_entry *de) 74static inline void set_node_proc_entry(struct device_node *dn, struct proc_dir_entry *de)
73{ 75{
74 dn->pde = de; 76 dn->pde = de;
@@ -101,6 +103,8 @@ extern int of_set_property(struct device_node *node, const char *name, void *val
101extern int of_getintprop_default(struct device_node *np, 103extern int of_getintprop_default(struct device_node *np,
102 const char *name, 104 const char *name,
103 int def); 105 int def);
106extern int of_n_addr_cells(struct device_node *np);
107extern int of_n_size_cells(struct device_node *np);
104 108
105extern void prom_build_devicetree(void); 109extern void prom_build_devicetree(void);
106 110
diff --git a/include/asm-sparc64/sbus.h b/include/asm-sparc64/sbus.h
index 56ee985e4605..7efd49d31bb8 100644
--- a/include/asm-sparc64/sbus.h
+++ b/include/asm-sparc64/sbus.h
@@ -80,7 +80,6 @@ struct sbus_bus {
80 int num_sbus_ranges; 80 int num_sbus_ranges;
81 81
82 int portid; 82 int portid;
83 void *starfire_cookie;
84}; 83};
85#define to_sbus(d) container_of(d, struct sbus_bus, ofdev.dev) 84#define to_sbus(d) container_of(d, struct sbus_bus, ofdev.dev)
86 85
diff --git a/include/asm-sparc64/starfire.h b/include/asm-sparc64/starfire.h
index b606cb2b32a8..48b50b5e35b0 100644
--- a/include/asm-sparc64/starfire.h
+++ b/include/asm-sparc64/starfire.h
@@ -14,7 +14,7 @@ extern int this_is_starfire;
14extern void check_if_starfire(void); 14extern void check_if_starfire(void);
15extern void starfire_cpu_setup(void); 15extern void starfire_cpu_setup(void);
16extern int starfire_hard_smp_processor_id(void); 16extern int starfire_hard_smp_processor_id(void);
17extern void *starfire_hookup(int); 17extern void starfire_hookup(int);
18extern unsigned int starfire_translate(unsigned long imap, unsigned int upaid); 18extern unsigned int starfire_translate(unsigned long imap, unsigned int upaid);
19 19
20#endif 20#endif
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-19 20:46:58 -0500