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-rw-r--r--drivers/ide/pci/cy82c693.c51
1 files changed, 0 insertions, 51 deletions
diff --git a/drivers/ide/pci/cy82c693.c b/drivers/ide/pci/cy82c693.c
index 1e3d60a87008..5241ef74f8d9 100644
--- a/drivers/ide/pci/cy82c693.c
+++ b/drivers/ide/pci/cy82c693.c
@@ -53,7 +53,6 @@
53/* 53/*
54 * The following are used to debug the driver. 54 * The following are used to debug the driver.
55 */ 55 */
56#define CY82C693_DEBUG_LOGS 0
57#define CY82C693_DEBUG_INFO 0 56#define CY82C693_DEBUG_INFO 0
58 57
59/* 58/*
@@ -172,17 +171,6 @@ static void cy82c693_set_dma_mode(ide_drive_t *drive, const u8 mode)
172 171
173 index = hwif->channel ? CY82_INDEX_CHANNEL1 : CY82_INDEX_CHANNEL0; 172 index = hwif->channel ? CY82_INDEX_CHANNEL1 : CY82_INDEX_CHANNEL0;
174 173
175#if CY82C693_DEBUG_LOGS
176 /* for debug let's show the previous values */
177
178 outb(index, CY82_INDEX_PORT);
179 data = inb(CY82_DATA_PORT);
180
181 printk(KERN_INFO "%s (ch=%d, dev=%d): DMA mode is %d (single=%d)\n",
182 drive->name, HWIF(drive)->channel, drive->select.b.unit,
183 (data&0x3), ((data>>2)&1));
184#endif /* CY82C693_DEBUG_LOGS */
185
186 data = (mode & 3) | (single << 2); 174 data = (mode & 3) | (single << 2);
187 175
188 outb(index, CY82_INDEX_PORT); 176 outb(index, CY82_INDEX_PORT);
@@ -232,45 +220,6 @@ static void cy82c693_set_pio_mode(ide_drive_t *drive, const u8 pio)
232 } 220 }
233 } 221 }
234 222
235#if CY82C693_DEBUG_LOGS
236 /* for debug let's show the register values */
237
238 if (drive->select.b.unit == 0) {
239 /*
240 * get master drive registers
241 * address setup control register
242 * is 32 bit !!!
243 */
244 pci_read_config_dword(dev, CY82_IDE_ADDRSETUP, &addrCtrl);
245 addrCtrl &= 0x0F;
246
247 /* now let's get the remaining registers */
248 pci_read_config_byte(dev, CY82_IDE_MASTER_IOR, &pclk.time_16r);
249 pci_read_config_byte(dev, CY82_IDE_MASTER_IOW, &pclk.time_16w);
250 pci_read_config_byte(dev, CY82_IDE_MASTER_8BIT, &pclk.time_8);
251 } else {
252 /*
253 * set slave drive registers
254 * address setup control register
255 * is 32 bit !!!
256 */
257 pci_read_config_dword(dev, CY82_IDE_ADDRSETUP, &addrCtrl);
258
259 addrCtrl &= 0xF0;
260 addrCtrl >>= 4;
261
262 /* now let's get the remaining registers */
263 pci_read_config_byte(dev, CY82_IDE_SLAVE_IOR, &pclk.time_16r);
264 pci_read_config_byte(dev, CY82_IDE_SLAVE_IOW, &pclk.time_16w);
265 pci_read_config_byte(dev, CY82_IDE_SLAVE_8BIT, &pclk.time_8);
266 }
267
268 printk(KERN_INFO "%s (ch=%d, dev=%d): PIO timing is "
269 "(addr=0x%X, ior=0x%X, iow=0x%X, 8bit=0x%X)\n",
270 drive->name, hwif->channel, drive->select.b.unit,
271 addrCtrl, pclk.time_16r, pclk.time_16w, pclk.time_8);
272#endif /* CY82C693_DEBUG_LOGS */
273
274 /* let's calc the values for this PIO mode */ 223 /* let's calc the values for this PIO mode */
275 compute_clocks(pio, &pclk); 224 compute_clocks(pio, &pclk);
276 225