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-rw-r--r--drivers/atm/solos-pci.c71
1 files changed, 62 insertions, 9 deletions
diff --git a/drivers/atm/solos-pci.c b/drivers/atm/solos-pci.c
index bc3079d17876..bfef8d255811 100644
--- a/drivers/atm/solos-pci.c
+++ b/drivers/atm/solos-pci.c
@@ -59,21 +59,29 @@
59#define RX_DMA_ADDR(port) (0x30 + (4 * (port))) 59#define RX_DMA_ADDR(port) (0x30 + (4 * (port)))
60 60
61#define DATA_RAM_SIZE 32768 61#define DATA_RAM_SIZE 32768
62#define BUF_SIZE 4096 62#define BUF_SIZE 2048
63#define OLD_BUF_SIZE 4096 /* For FPGA versions <= 2*/
63#define FPGA_PAGE 528 /* FPGA flash page size*/ 64#define FPGA_PAGE 528 /* FPGA flash page size*/
64#define SOLOS_PAGE 512 /* Solos flash page size*/ 65#define SOLOS_PAGE 512 /* Solos flash page size*/
65#define FPGA_BLOCK (FPGA_PAGE * 8) /* FPGA flash block size*/ 66#define FPGA_BLOCK (FPGA_PAGE * 8) /* FPGA flash block size*/
66#define SOLOS_BLOCK (SOLOS_PAGE * 8) /* Solos flash block size*/ 67#define SOLOS_BLOCK (SOLOS_PAGE * 8) /* Solos flash block size*/
67 68
68#define RX_BUF(card, nr) ((card->buffers) + (nr)*BUF_SIZE*2) 69#define RX_BUF(card, nr) ((card->buffers) + (nr)*(card->buffer_size)*2)
69#define TX_BUF(card, nr) ((card->buffers) + (nr)*BUF_SIZE*2 + BUF_SIZE) 70#define TX_BUF(card, nr) ((card->buffers) + (nr)*(card->buffer_size)*2 + (card->buffer_size))
71#define FLASH_BUF ((card->buffers) + 4*(card->buffer_size)*2)
70 72
71#define RX_DMA_SIZE 2048 73#define RX_DMA_SIZE 2048
72 74
75#define FPGA_VERSION(a,b) (((a) << 8) + (b))
76#define LEGACY_BUFFERS 2
77#define DMA_SUPPORTED 4
78
73static int reset = 0; 79static int reset = 0;
74static int atmdebug = 0; 80static int atmdebug = 0;
75static int firmware_upgrade = 0; 81static int firmware_upgrade = 0;
76static int fpga_upgrade = 0; 82static int fpga_upgrade = 0;
83static int db_firmware_upgrade = 0;
84static int db_fpga_upgrade = 0;
77 85
78struct pkt_hdr { 86struct pkt_hdr {
79 __le16 size; 87 __le16 size;
@@ -116,6 +124,8 @@ struct solos_card {
116 wait_queue_head_t param_wq; 124 wait_queue_head_t param_wq;
117 wait_queue_head_t fw_wq; 125 wait_queue_head_t fw_wq;
118 int using_dma; 126 int using_dma;
127 int fpga_version;
128 int buffer_size;
119}; 129};
120 130
121 131
@@ -136,10 +146,14 @@ MODULE_PARM_DESC(reset, "Reset Solos chips on startup");
136MODULE_PARM_DESC(atmdebug, "Print ATM data"); 146MODULE_PARM_DESC(atmdebug, "Print ATM data");
137MODULE_PARM_DESC(firmware_upgrade, "Initiate Solos firmware upgrade"); 147MODULE_PARM_DESC(firmware_upgrade, "Initiate Solos firmware upgrade");
138MODULE_PARM_DESC(fpga_upgrade, "Initiate FPGA upgrade"); 148MODULE_PARM_DESC(fpga_upgrade, "Initiate FPGA upgrade");
149MODULE_PARM_DESC(db_firmware_upgrade, "Initiate daughter board Solos firmware upgrade");
150MODULE_PARM_DESC(db_fpga_upgrade, "Initiate daughter board FPGA upgrade");
139module_param(reset, int, 0444); 151module_param(reset, int, 0444);
140module_param(atmdebug, int, 0644); 152module_param(atmdebug, int, 0644);
141module_param(firmware_upgrade, int, 0444); 153module_param(firmware_upgrade, int, 0444);
142module_param(fpga_upgrade, int, 0444); 154module_param(fpga_upgrade, int, 0444);
155module_param(db_firmware_upgrade, int, 0444);
156module_param(db_fpga_upgrade, int, 0444);
143 157
144static void fpga_queue(struct solos_card *card, int port, struct sk_buff *skb, 158static void fpga_queue(struct solos_card *card, int port, struct sk_buff *skb,
145 struct atm_vcc *vcc); 159 struct atm_vcc *vcc);
@@ -517,10 +531,32 @@ static int flash_upgrade(struct solos_card *card, int chip)
517 if (chip == 0) { 531 if (chip == 0) {
518 fw_name = "solos-FPGA.bin"; 532 fw_name = "solos-FPGA.bin";
519 blocksize = FPGA_BLOCK; 533 blocksize = FPGA_BLOCK;
520 } else { 534 }
535
536 if (chip == 1) {
521 fw_name = "solos-Firmware.bin"; 537 fw_name = "solos-Firmware.bin";
522 blocksize = SOLOS_BLOCK; 538 blocksize = SOLOS_BLOCK;
523 } 539 }
540
541 if (chip == 2){
542 if (card->fpga_version > LEGACY_BUFFERS){
543 fw_name = "solos-db-FPGA.bin";
544 blocksize = FPGA_BLOCK;
545 } else {
546 dev_info(&card->dev->dev, "FPGA version doesn't support daughter board upgrades\n");
547 return -EPERM;
548 }
549 }
550
551 if (chip == 3){
552 if (card->fpga_version > LEGACY_BUFFERS){
553 fw_name = "solos-Firmware.bin";
554 blocksize = SOLOS_BLOCK;
555 } else {
556 dev_info(&card->dev->dev, "FPGA version doesn't support daughter board upgrades\n");
557 return -EPERM;
558 }
559 }
524 560
525 if (request_firmware(&fw, fw_name, &card->dev->dev)) 561 if (request_firmware(&fw, fw_name, &card->dev->dev))
526 return -ENOENT; 562 return -ENOENT;
@@ -536,8 +572,10 @@ static int flash_upgrade(struct solos_card *card, int chip)
536 data32 = ioread32(card->config_regs + FPGA_MODE); 572 data32 = ioread32(card->config_regs + FPGA_MODE);
537 573
538 /* Set mode to Chip Erase */ 574 /* Set mode to Chip Erase */
539 dev_info(&card->dev->dev, "Set FPGA Flash mode to %s Chip Erase\n", 575 if(chip == 0 || chip == 2)
540 chip?"Solos":"FPGA"); 576 dev_info(&card->dev->dev, "Set FPGA Flash mode to FPGA Chip Erase\n");
577 if(chip == 1 || chip == 3)
578 dev_info(&card->dev->dev, "Set FPGA Flash mode to Solos Chip Erase\n");
541 iowrite32((chip * 2), card->config_regs + FLASH_MODE); 579 iowrite32((chip * 2), card->config_regs + FLASH_MODE);
542 580
543 581
@@ -557,7 +595,10 @@ static int flash_upgrade(struct solos_card *card, int chip)
557 /* Copy block to buffer, swapping each 16 bits */ 595 /* Copy block to buffer, swapping each 16 bits */
558 for(i = 0; i < blocksize; i += 4) { 596 for(i = 0; i < blocksize; i += 4) {
559 uint32_t word = swahb32p((uint32_t *)(fw->data + offset + i)); 597 uint32_t word = swahb32p((uint32_t *)(fw->data + offset + i));
560 iowrite32(word, RX_BUF(card, 3) + i); 598 if(card->fpga_version > LEGACY_BUFFERS)
599 iowrite32(word, FLASH_BUF + i);
600 else
601 iowrite32(word, RX_BUF(card, 3) + i);
561 } 602 }
562 603
563 /* Specify block number and then trigger flash write */ 604 /* Specify block number and then trigger flash write */
@@ -1094,12 +1135,18 @@ static int fpga_probe(struct pci_dev *dev, const struct pci_device_id *id)
1094 fpga_ver = (data32 & 0x0000FFFF); 1135 fpga_ver = (data32 & 0x0000FFFF);
1095 major_ver = ((data32 & 0xFF000000) >> 24); 1136 major_ver = ((data32 & 0xFF000000) >> 24);
1096 minor_ver = ((data32 & 0x00FF0000) >> 16); 1137 minor_ver = ((data32 & 0x00FF0000) >> 16);
1138 card->fpga_version = FPGA_VERSION(major_ver,minor_ver);
1139 if (card->fpga_version > LEGACY_BUFFERS)
1140 card->buffer_size = BUF_SIZE;
1141 else
1142 card->buffer_size = OLD_BUF_SIZE;
1097 dev_info(&dev->dev, "Solos FPGA Version %d.%02d svn-%d\n", 1143 dev_info(&dev->dev, "Solos FPGA Version %d.%02d svn-%d\n",
1098 major_ver, minor_ver, fpga_ver); 1144 major_ver, minor_ver, fpga_ver);
1099 1145
1100 if (0 && fpga_ver > 27) 1146 if (card->fpga_version >= DMA_SUPPORTED){
1101 card->using_dma = 1; 1147 card->using_dma = 1;
1102 else { 1148 } else {
1149 card->using_dma = 0;
1103 /* Set RX empty flag for all ports */ 1150 /* Set RX empty flag for all ports */
1104 iowrite32(0xF0, card->config_regs + FLAGS_ADDR); 1151 iowrite32(0xF0, card->config_regs + FLAGS_ADDR);
1105 } 1152 }
@@ -1131,6 +1178,12 @@ static int fpga_probe(struct pci_dev *dev, const struct pci_device_id *id)
1131 if (firmware_upgrade) 1178 if (firmware_upgrade)
1132 flash_upgrade(card, 1); 1179 flash_upgrade(card, 1);
1133 1180
1181 if (db_fpga_upgrade)
1182 flash_upgrade(card, 2);
1183
1184 if (db_firmware_upgrade)
1185 flash_upgrade(card, 3);
1186
1134 err = atm_init(card); 1187 err = atm_init(card);
1135 if (err) 1188 if (err)
1136 goto out_free_irq; 1189 goto out_free_irq;