diff options
| -rw-r--r-- | Documentation/mips/AU1xxx_IDE.README | 46 | ||||
| -rw-r--r-- | drivers/ide/mips/au1xxx-ide.c | 49 | ||||
| -rw-r--r-- | include/asm-mips/mach-au1x00/au1xxx_ide.h | 42 |
3 files changed, 2 insertions, 135 deletions
diff --git a/Documentation/mips/AU1xxx_IDE.README b/Documentation/mips/AU1xxx_IDE.README index 5c8334123f4f..25a6ed1aaa5b 100644 --- a/Documentation/mips/AU1xxx_IDE.README +++ b/Documentation/mips/AU1xxx_IDE.README | |||
| @@ -46,8 +46,6 @@ Two files are introduced: | |||
| 46 | 46 | ||
| 47 | a) 'include/asm-mips/mach-au1x00/au1xxx_ide.h' | 47 | a) 'include/asm-mips/mach-au1x00/au1xxx_ide.h' |
| 48 | containes : struct _auide_hwif | 48 | containes : struct _auide_hwif |
| 49 | struct drive_list_entry dma_white_list | ||
| 50 | struct drive_list_entry dma_black_list | ||
| 51 | timing parameters for PIO mode 0/1/2/3/4 | 49 | timing parameters for PIO mode 0/1/2/3/4 |
| 52 | timing parameters for MWDMA 0/1/2 | 50 | timing parameters for MWDMA 0/1/2 |
| 53 | 51 | ||
| @@ -63,12 +61,6 @@ Four configs variables are introduced: | |||
| 63 | CONFIG_BLK_DEV_IDE_AU1XXX_SEQTS_PER_RQ - maximum transfer size | 61 | CONFIG_BLK_DEV_IDE_AU1XXX_SEQTS_PER_RQ - maximum transfer size |
| 64 | per descriptor | 62 | per descriptor |
| 65 | 63 | ||
| 66 | If MWDMA is enabled and the connected hard disc is not on the white list, the | ||
| 67 | kernel switches to a "safe mwdma mode" at boot time. In this mode the IDE | ||
| 68 | performance is substantial slower then in full speed mwdma. In this case | ||
| 69 | please add your hard disc to the white list (follow instruction from 'ADD NEW | ||
| 70 | HARD DISC TO WHITE OR BLACK LIST' section). | ||
| 71 | |||
| 72 | 64 | ||
| 73 | SUPPORTED IDE MODES | 65 | SUPPORTED IDE MODES |
| 74 | ------------------- | 66 | ------------------- |
| @@ -120,44 +112,6 @@ CONFIG_IDEDMA_AUTO=y | |||
| 120 | Also undefine 'IDE_AU1XXX_BURSTMODE' in 'drivers/ide/mips/au1xxx-ide.c' to | 112 | Also undefine 'IDE_AU1XXX_BURSTMODE' in 'drivers/ide/mips/au1xxx-ide.c' to |
| 121 | disable the burst support on DBDMA controller. | 113 | disable the burst support on DBDMA controller. |
| 122 | 114 | ||
| 123 | ADD NEW HARD DISC TO WHITE OR BLACK LIST | ||
| 124 | ---------------------------------------- | ||
| 125 | |||
| 126 | Step 1 : detect the model name of your hard disc | ||
| 127 | |||
| 128 | a) connect your hard disc to the AU1XXX | ||
| 129 | |||
| 130 | b) boot your kernel and get the hard disc model. | ||
| 131 | |||
| 132 | Example boot log: | ||
| 133 | |||
| 134 | --snipped-- | ||
| 135 | Uniform Multi-Platform E-IDE driver Revision: 7.00alpha2 | ||
| 136 | ide: Assuming 50MHz system bus speed for PIO modes; override with idebus=xx | ||
| 137 | Au1xxx IDE(builtin) configured for MWDMA2 | ||
| 138 | Probing IDE interface ide0... | ||
| 139 | hda: Maxtor 6E040L0, ATA DISK drive | ||
| 140 | ide0 at 0xac800000-0xac800007,0xac8001c0 on irq 64 | ||
| 141 | hda: max request size: 64KiB | ||
| 142 | hda: 80293248 sectors (41110 MB) w/2048KiB Cache, CHS=65535/16/63, (U)DMA | ||
| 143 | --snipped-- | ||
| 144 | |||
| 145 | In this example 'Maxtor 6E040L0'. | ||
| 146 | |||
| 147 | Step 2 : edit 'include/asm-mips/mach-au1x00/au1xxx_ide.h' | ||
| 148 | |||
| 149 | Add your hard disc to the dma_white_list or dma_black_list structur. | ||
| 150 | |||
| 151 | Step 3 : Recompile the kernel | ||
| 152 | |||
| 153 | Enable MWDMA support in the kernel configuration. Recompile the kernel and | ||
| 154 | reboot. | ||
| 155 | |||
| 156 | Step 4 : Tests | ||
| 157 | |||
| 158 | If you have add a hard disc to the white list, please run some stress tests | ||
| 159 | for verification. | ||
| 160 | |||
| 161 | 115 | ||
| 162 | ACKNOWLEDGMENTS | 116 | ACKNOWLEDGMENTS |
| 163 | --------------- | 117 | --------------- |
diff --git a/drivers/ide/mips/au1xxx-ide.c b/drivers/ide/mips/au1xxx-ide.c index 7179d4953211..d2e926efd3cc 100644 --- a/drivers/ide/mips/au1xxx-ide.c +++ b/drivers/ide/mips/au1xxx-ide.c | |||
| @@ -47,7 +47,6 @@ | |||
| 47 | #define IDE_AU1XXX_BURSTMODE 1 | 47 | #define IDE_AU1XXX_BURSTMODE 1 |
| 48 | 48 | ||
| 49 | static _auide_hwif auide_hwif; | 49 | static _auide_hwif auide_hwif; |
| 50 | static int dbdma_init_done; | ||
| 51 | 50 | ||
| 52 | static int auide_ddma_init(_auide_hwif *auide); | 51 | static int auide_ddma_init(_auide_hwif *auide); |
| 53 | 52 | ||
| @@ -315,35 +314,6 @@ static int auide_dma_setup(ide_drive_t *drive) | |||
| 315 | return 0; | 314 | return 0; |
| 316 | } | 315 | } |
| 317 | 316 | ||
| 318 | static u8 auide_mdma_filter(ide_drive_t *drive) | ||
| 319 | { | ||
| 320 | /* | ||
| 321 | * FIXME: ->white_list and ->black_list are based on completely bogus | ||
| 322 | * ->ide_dma_check implementation which didn't set neither the host | ||
| 323 | * controller timings nor the device for the desired transfer mode. | ||
| 324 | * | ||
| 325 | * They should be either removed or 0x00 MWDMA mask should be | ||
| 326 | * returned for devices on the ->black_list. | ||
| 327 | */ | ||
| 328 | |||
| 329 | if (dbdma_init_done == 0) { | ||
| 330 | auide_hwif.white_list = ide_in_drive_list(drive->id, | ||
| 331 | dma_white_list); | ||
| 332 | auide_hwif.black_list = ide_in_drive_list(drive->id, | ||
| 333 | dma_black_list); | ||
| 334 | auide_hwif.drive = drive; | ||
| 335 | auide_ddma_init(&auide_hwif); | ||
| 336 | dbdma_init_done = 1; | ||
| 337 | } | ||
| 338 | |||
| 339 | /* Is the drive in our DMA black list? */ | ||
| 340 | if (auide_hwif.black_list) | ||
| 341 | printk(KERN_WARNING "%s: Disabling DMA for %s (blacklisted)\n", | ||
| 342 | drive->name, drive->id->model); | ||
| 343 | |||
| 344 | return drive->hwif->mwdma_mask; | ||
| 345 | } | ||
| 346 | |||
| 347 | static int auide_dma_test_irq(ide_drive_t *drive) | 317 | static int auide_dma_test_irq(ide_drive_t *drive) |
| 348 | { | 318 | { |
| 349 | if (drive->waiting_for_dma == 0) | 319 | if (drive->waiting_for_dma == 0) |
| @@ -420,17 +390,8 @@ static int auide_ddma_init(_auide_hwif *auide) { | |||
| 420 | 390 | ||
| 421 | dev_id = AU1XXX_ATA_DDMA_REQ; | 391 | dev_id = AU1XXX_ATA_DDMA_REQ; |
| 422 | 392 | ||
| 423 | if (auide->white_list || auide->black_list) { | 393 | tsize = 8; /* 1 */ |
| 424 | tsize = 8; | 394 | devwidth = 32; /* 16 */ |
| 425 | devwidth = 32; | ||
| 426 | } | ||
| 427 | else { | ||
| 428 | tsize = 1; | ||
| 429 | devwidth = 16; | ||
| 430 | |||
| 431 | printk(KERN_ERR "au1xxx-ide: %s is not on ide driver whitelist.\n",auide_hwif.drive->id->model); | ||
| 432 | printk(KERN_ERR " please read 'Documentation/mips/AU1xxx_IDE.README'"); | ||
| 433 | } | ||
| 434 | 395 | ||
| 435 | #ifdef IDE_AU1XXX_BURSTMODE | 396 | #ifdef IDE_AU1XXX_BURSTMODE |
| 436 | flags = DEV_FLAGS_SYNC | DEV_FLAGS_BURSTABLE; | 397 | flags = DEV_FLAGS_SYNC | DEV_FLAGS_BURSTABLE; |
| @@ -546,9 +507,6 @@ static void auide_setup_ports(hw_regs_t *hw, _auide_hwif *ahwif) | |||
| 546 | static const struct ide_port_ops au1xxx_port_ops = { | 507 | static const struct ide_port_ops au1xxx_port_ops = { |
| 547 | .set_pio_mode = au1xxx_set_pio_mode, | 508 | .set_pio_mode = au1xxx_set_pio_mode, |
| 548 | .set_dma_mode = auide_set_dma_mode, | 509 | .set_dma_mode = auide_set_dma_mode, |
| 549 | #ifdef CONFIG_BLK_DEV_IDE_AU1XXX_MDMA2_DBDMA | ||
| 550 | .mdma_filter = auide_mdma_filter, | ||
| 551 | #endif | ||
| 552 | }; | 510 | }; |
| 553 | 511 | ||
| 554 | static const struct ide_port_info au1xxx_port_info = { | 512 | static const struct ide_port_info au1xxx_port_info = { |
| @@ -648,10 +606,7 @@ static int au_ide_probe(struct device *dev) | |||
| 648 | auide_hwif.hwif = hwif; | 606 | auide_hwif.hwif = hwif; |
| 649 | hwif->hwif_data = &auide_hwif; | 607 | hwif->hwif_data = &auide_hwif; |
| 650 | 608 | ||
| 651 | #ifdef CONFIG_BLK_DEV_IDE_AU1XXX_PIO_DBDMA | ||
| 652 | auide_ddma_init(&auide_hwif); | 609 | auide_ddma_init(&auide_hwif); |
| 653 | dbdma_init_done = 1; | ||
| 654 | #endif | ||
| 655 | 610 | ||
| 656 | idx[0] = hwif->index; | 611 | idx[0] = hwif->index; |
| 657 | 612 | ||
diff --git a/include/asm-mips/mach-au1x00/au1xxx_ide.h b/include/asm-mips/mach-au1x00/au1xxx_ide.h index 89655c0cdcd6..b493a5e46c63 100644 --- a/include/asm-mips/mach-au1x00/au1xxx_ide.h +++ b/include/asm-mips/mach-au1x00/au1xxx_ide.h | |||
| @@ -70,7 +70,6 @@ typedef struct | |||
| 70 | ide_hwif_t *hwif; | 70 | ide_hwif_t *hwif; |
| 71 | #ifdef CONFIG_BLK_DEV_IDE_AU1XXX_MDMA2_DBDMA | 71 | #ifdef CONFIG_BLK_DEV_IDE_AU1XXX_MDMA2_DBDMA |
| 72 | ide_drive_t *drive; | 72 | ide_drive_t *drive; |
| 73 | u8 white_list, black_list; | ||
| 74 | struct dbdma_cmd *dma_table_cpu; | 73 | struct dbdma_cmd *dma_table_cpu; |
| 75 | dma_addr_t dma_table_dma; | 74 | dma_addr_t dma_table_dma; |
| 76 | #endif | 75 | #endif |
| @@ -81,47 +80,6 @@ typedef struct | |||
| 81 | #endif | 80 | #endif |
| 82 | } _auide_hwif; | 81 | } _auide_hwif; |
| 83 | 82 | ||
| 84 | #ifdef CONFIG_BLK_DEV_IDE_AU1XXX_MDMA2_DBDMA | ||
| 85 | /* HD white list */ | ||
| 86 | static const struct drive_list_entry dma_white_list [] = { | ||
| 87 | /* | ||
| 88 | * Hitachi | ||
| 89 | */ | ||
| 90 | { "HITACHI_DK14FA-20" , NULL }, | ||
| 91 | { "HTS726060M9AT00" , NULL }, | ||
| 92 | /* | ||
| 93 | * Maxtor | ||
| 94 | */ | ||
| 95 | { "Maxtor 6E040L0" , NULL }, | ||
| 96 | { "Maxtor 6Y080P0" , NULL }, | ||
| 97 | { "Maxtor 6Y160P0" , NULL }, | ||
| 98 | /* | ||
| 99 | * Seagate | ||
| 100 | */ | ||
| 101 | { "ST3120026A" , NULL }, | ||
| 102 | { "ST320014A" , NULL }, | ||
| 103 | { "ST94011A" , NULL }, | ||
| 104 | { "ST340016A" , NULL }, | ||
| 105 | /* | ||
| 106 | * Western Digital | ||
| 107 | */ | ||
| 108 | { "WDC WD400UE-00HCT0" , NULL }, | ||
| 109 | { "WDC WD400JB-00JJC0" , NULL }, | ||
| 110 | { NULL , NULL } | ||
| 111 | }; | ||
| 112 | |||
| 113 | /* HD black list */ | ||
| 114 | static const struct drive_list_entry dma_black_list [] = { | ||
| 115 | /* | ||
| 116 | * Western Digital | ||
| 117 | */ | ||
| 118 | { "WDC WD100EB-00CGH0" , NULL }, | ||
| 119 | { "WDC WD200BB-00AUA1" , NULL }, | ||
| 120 | { "WDC AC24300L" , NULL }, | ||
| 121 | { NULL , NULL } | ||
| 122 | }; | ||
| 123 | #endif | ||
| 124 | |||
| 125 | /******************************************************************************* | 83 | /******************************************************************************* |
| 126 | * PIO Mode timing calculation : * | 84 | * PIO Mode timing calculation : * |
| 127 | * * | 85 | * * |
