3 files changed, 23 insertions, 9 deletions

diff --git a/drivers/gpu/drm/radeon/radeon_cp.c b/drivers/gpu/drm/radeon/radeon_cp.c
index 6157cd4bb436..e6e0c2933efd 100644
--- a/drivers/gpu/drm/radeon/radeon_cp.c
+++ b/drivers/gpu/drm/radeon/radeon_cp.c
@@ -71,7 +71,8 @@ static u32 RS690_READ_MCIND(drm_radeon_private_t *dev_priv, int addr)
 
 static u32 IGP_READ_MCIND(drm_radeon_private_t *dev_priv, int addr)
 {
-        if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690)
+        if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690) ||
+            ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS740))
                 return RS690_READ_MCIND(dev_priv, addr);
         else
                 return RS480_READ_MCIND(dev_priv, addr);
@@ -82,7 +83,8 @@ u32 radeon_read_fb_location(drm_radeon_private_t *dev_priv)
 
         if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV515)
                 return R500_READ_MCIND(dev_priv, RV515_MC_FB_LOCATION);
-        else if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690)
+        else if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690) ||
+                 ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS740))
                 return RS690_READ_MCIND(dev_priv, RS690_MC_FB_LOCATION);
         else if ((dev_priv->flags & RADEON_FAMILY_MASK) > CHIP_RV515)
                 return R500_READ_MCIND(dev_priv, R520_MC_FB_LOCATION);
@@ -94,7 +96,8 @@ static void radeon_write_fb_location(drm_radeon_private_t *dev_priv, u32 fb_loc)
 {
         if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV515)
                 R500_WRITE_MCIND(RV515_MC_FB_LOCATION, fb_loc);
-        else if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690)
+        else if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690) ||
+                 ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS740))
                 RS690_WRITE_MCIND(RS690_MC_FB_LOCATION, fb_loc);
         else if ((dev_priv->flags & RADEON_FAMILY_MASK) > CHIP_RV515)
                 R500_WRITE_MCIND(R520_MC_FB_LOCATION, fb_loc);
@@ -106,7 +109,8 @@ static void radeon_write_agp_location(drm_radeon_private_t *dev_priv, u32 agp_lo
 {
         if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV515)
                 R500_WRITE_MCIND(RV515_MC_AGP_LOCATION, agp_loc);
-        else if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690)
+        else if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690) ||
+                 ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS740))
                 RS690_WRITE_MCIND(RS690_MC_AGP_LOCATION, agp_loc);
         else if ((dev_priv->flags & RADEON_FAMILY_MASK) > CHIP_RV515)
                 R500_WRITE_MCIND(R520_MC_AGP_LOCATION, agp_loc);
@@ -122,7 +126,8 @@ static void radeon_write_agp_base(drm_radeon_private_t *dev_priv, u64 agp_base)
         if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV515) {
                 R500_WRITE_MCIND(RV515_MC_AGP_BASE, agp_base_lo);
                 R500_WRITE_MCIND(RV515_MC_AGP_BASE_2, agp_base_hi);
-        } else if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690) {
+        } else if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690) ||
+                 ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS740)) {
                 RS690_WRITE_MCIND(RS690_MC_AGP_BASE, agp_base_lo);
                 RS690_WRITE_MCIND(RS690_MC_AGP_BASE_2, agp_base_hi);
         } else if ((dev_priv->flags & RADEON_FAMILY_MASK) > CHIP_RV515) {
@@ -364,8 +369,9 @@ static void radeon_cp_load_microcode(drm_radeon_private_t * dev_priv)
                         RADEON_WRITE(RADEON_CP_ME_RAM_DATAL,
                                      R420_cp_microcode[i][0]);
                 }
-        } else if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690) {
-                DRM_INFO("Loading RS690 Microcode\n");
+        } else if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690) ||
+                   ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS740)) {
+                DRM_INFO("Loading RS690/RS740 Microcode\n");
                 for (i = 0; i < 256; i++) {
                         RADEON_WRITE(RADEON_CP_ME_RAM_DATAH,
                                      RS690_cp_microcode[i][1]);
@@ -720,7 +726,8 @@ static void radeon_set_igpgart(drm_radeon_private_t * dev_priv, int on)
                           dev_priv->gart_size);
 
                 temp = IGP_READ_MCIND(dev_priv, RS480_MC_MISC_CNTL);
-                if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690)
+                if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690) ||
+                    ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS740))
                         IGP_WRITE_MCIND(RS480_MC_MISC_CNTL, (RS480_GART_INDEX_REG_EN |
                                                              RS690_BLOCK_GFX_D3_EN));
                 else
@@ -813,6 +820,7 @@ static void radeon_set_pcigart(drm_radeon_private_t * dev_priv, int on)
         u32 tmp;
 
         if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690) ||
+            ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS740) ||
             (dev_priv->flags & RADEON_IS_IGPGART)) {
                 radeon_set_igpgart(dev_priv, on);
                 return;
diff --git a/drivers/gpu/drm/radeon/radeon_drv.h b/drivers/gpu/drm/radeon/radeon_drv.h
index d7e9c6cc6a1a..9d752bc0602b 100644
--- a/drivers/gpu/drm/radeon/radeon_drv.h
+++ b/drivers/gpu/drm/radeon/radeon_drv.h
@@ -125,6 +125,7 @@ enum radeon_family {
         CHIP_RV410,
         CHIP_RS480,
         CHIP_RS690,
+        CHIP_RS740,
         CHIP_RV515,
         CHIP_R520,
         CHIP_RV530,
@@ -1207,7 +1208,8 @@ do {								\
 
 #define IGP_WRITE_MCIND(addr, val)                              \
 do {                                                                    \
-        if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690)       \
+        if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690) ||   \
+            ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS740))      \
                 RS690_WRITE_MCIND(addr, val);                           \
         else                                                            \
                 RS480_WRITE_MCIND(addr, val);                           \
diff --git a/include/drm/drm_pciids.h b/include/drm/drm_pciids.h
index 135bd19499fc..e3a7b93fdefc 100644
--- a/include/drm/drm_pciids.h
+++ b/include/drm/drm_pciids.h
@@ -237,6 +237,10 @@
         {0x1002, 0x7835, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS300|RADEON_IS_IGP|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \
         {0x1002, 0x791e, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS690|RADEON_IS_IGP|RADEON_NEW_MEMMAP|RADEON_IS_IGPGART}, \
         {0x1002, 0x791f, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS690|RADEON_IS_IGP|RADEON_NEW_MEMMAP|RADEON_IS_IGPGART}, \
+        {0x1002, 0x796c, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS740|RADEON_IS_IGP|RADEON_NEW_MEMMAP|RADEON_IS_IGPGART}, \
+        {0x1002, 0x796d, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS740|RADEON_IS_IGP|RADEON_NEW_MEMMAP|RADEON_IS_IGPGART}, \
+        {0x1002, 0x796e, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS740|RADEON_IS_IGP|RADEON_NEW_MEMMAP|RADEON_IS_IGPGART}, \
+        {0x1002, 0x796f, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS740|RADEON_IS_IGP|RADEON_NEW_MEMMAP|RADEON_IS_IGPGART}, \
         {0, 0, 0}
 
 #define r128_PCI_IDS \