185 files changed, 8534 insertions, 1650 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 620f2ca94ed2..8752751f9985 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -223,7 +223,9 @@ source "arch/arm/mach-pxa/Kconfig"
 source "arch/arm/mach-sa1100/Kconfig"
-source "arch/arm/mach-omap/Kconfig"
+source "arch/arm/plat-omap/Kconfig"
+source "arch/arm/mach-omap1/Kconfig"
 source "arch/arm/mach-s3c2410/Kconfig"
@@ -514,7 +516,7 @@ config XIP_PHYS_ADDR
 endmenu
-if (ARCH_SA1100 || ARCH_INTEGRATOR)
+if (ARCH_SA1100 || ARCH_INTEGRATOR || ARCH_OMAP1)
 menu "CPU Frequency scaling"
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index eb933dcafba0..67f1453ade05 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -91,7 +91,8 @@ textaddr-$(CONFIG_ARCH_FORTUNET)   := 0xc0008000
 machine-$(CONFIG_ARCH_IOP3XX)     := iop3xx
 machine-$(CONFIG_ARCH_IXP4XX)     := ixp4xx
 machine-$(CONFIG_ARCH_IXP2000)    := ixp2000
- machine-$(CONFIG_ARCH_OMAP)       := omap
+ machine-$(CONFIG_ARCH_OMAP1)      := omap1
+  incdir-$(CONFIG_ARCH_OMAP)       := omap
 machine-$(CONFIG_ARCH_S3C2410)    := s3c2410
 machine-$(CONFIG_ARCH_LH7A40X)    := lh7a40x
 machine-$(CONFIG_ARCH_VERSATILE)  := versatile
@@ -142,6 +143,9 @@ core-$(CONFIG_FPE_NWFPE)	+= arch/arm/nwfpe/
 core-$(CONFIG_FPE_FASTFPE)      += $(FASTFPE_OBJ)
 core-$(CONFIG_VFP)              += arch/arm/vfp/
+# If we have a common platform directory, then include it in the build.
+core-$(CONFIG_ARCH_OMAP)        += arch/arm/plat-omap/
 drivers-$(CONFIG_OPROFILE)      += arch/arm/oprofile/
 drivers-$(CONFIG_ARCH_CLPS7500) += drivers/acorn/char/
 drivers-$(CONFIG_ARCH_L7200)    += drivers/acorn/char/
diff --git a/arch/arm/configs/enp2611_defconfig b/arch/arm/configs/enp2611_defconfig
index b8c51ee7f1bb..f67ca01b4982 100644
--- a/arch/arm/configs/enp2611_defconfig
+++ b/arch/arm/configs/enp2611_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.12-git6
+# Linux kernel version: 2.6.13-rc2
-# Sat Jun 25 00:57:29 2005
+# Thu Jul  7 16:41:21 2005
 #
 CONFIG_ARM=y
 CONFIG_MMU=y
@@ -137,6 +137,7 @@ CONFIG_PCI_NAMES=y
 #
 # CONFIG_SMP is not set
 # CONFIG_PREEMPT is not set
+# CONFIG_NO_IDLE_HZ is not set
 # CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
 CONFIG_SELECT_MEMORY_MODEL=y
 CONFIG_FLATMEM_MANUAL=y
@@ -345,10 +346,9 @@ CONFIG_PACKET_MMAP=y
 CONFIG_UNIX=y
 # CONFIG_NET_KEY is not set
 CONFIG_INET=y
-CONFIG_IP_FIB_HASH=y
-# CONFIG_IP_FIB_TRIE is not set
 # CONFIG_IP_MULTICAST is not set
 # CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_FIB_HASH=y
 CONFIG_IP_PNP=y
 CONFIG_IP_PNP_DHCP=y
 CONFIG_IP_PNP_BOOTP=y
@@ -363,17 +363,8 @@ CONFIG_SYN_COOKIES=y
 # CONFIG_INET_TUNNEL is not set
 # CONFIG_IP_TCPDIAG is not set
 # CONFIG_IP_TCPDIAG_IPV6 is not set
+# CONFIG_TCP_CONG_ADVANCED is not set
-#
-# TCP congestion control
-#
 CONFIG_TCP_CONG_BIC=y
-CONFIG_TCP_CONG_WESTWOOD=m
-CONFIG_TCP_CONG_HTCP=m
-# CONFIG_TCP_CONG_HSTCP is not set
-# CONFIG_TCP_CONG_HYBLA is not set
-# CONFIG_TCP_CONG_VEGAS is not set
-# CONFIG_TCP_CONG_SCALABLE is not set
 # CONFIG_IPV6 is not set
 # CONFIG_NETFILTER is not set
@@ -931,4 +922,3 @@ CONFIG_CRC32=y
 # CONFIG_LIBCRC32C is not set
 CONFIG_ZLIB_INFLATE=y
 CONFIG_ZLIB_DEFLATE=y
-# CONFIG_TEXTSEARCH is not set
diff --git a/arch/arm/configs/ixdp2400_defconfig b/arch/arm/configs/ixdp2400_defconfig
index 3cfbe2ec29ca..5c6c928215d0 100644
--- a/arch/arm/configs/ixdp2400_defconfig
+++ b/arch/arm/configs/ixdp2400_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.12-git6
+# Linux kernel version: 2.6.13-rc2
-# Sat Jun 25 00:58:38 2005
+# Thu Jul  7 16:49:01 2005
 #
 CONFIG_ARM=y
 CONFIG_MMU=y
@@ -138,6 +138,7 @@ CONFIG_PCI_NAMES=y
 #
 # CONFIG_SMP is not set
 # CONFIG_PREEMPT is not set
+# CONFIG_NO_IDLE_HZ is not set
 # CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
 CONFIG_SELECT_MEMORY_MODEL=y
 CONFIG_FLATMEM_MANUAL=y
@@ -346,10 +347,9 @@ CONFIG_PACKET_MMAP=y
 CONFIG_UNIX=y
 # CONFIG_NET_KEY is not set
 CONFIG_INET=y
-CONFIG_IP_FIB_HASH=y
-# CONFIG_IP_FIB_TRIE is not set
 # CONFIG_IP_MULTICAST is not set
 # CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_FIB_HASH=y
 CONFIG_IP_PNP=y
 CONFIG_IP_PNP_DHCP=y
 CONFIG_IP_PNP_BOOTP=y
@@ -364,17 +364,8 @@ CONFIG_SYN_COOKIES=y
 # CONFIG_INET_TUNNEL is not set
 # CONFIG_IP_TCPDIAG is not set
 # CONFIG_IP_TCPDIAG_IPV6 is not set
+# CONFIG_TCP_CONG_ADVANCED is not set
-#
-# TCP congestion control
-#
 CONFIG_TCP_CONG_BIC=y
-CONFIG_TCP_CONG_WESTWOOD=m
-CONFIG_TCP_CONG_HTCP=m
-# CONFIG_TCP_CONG_HSTCP is not set
-# CONFIG_TCP_CONG_HYBLA is not set
-# CONFIG_TCP_CONG_VEGAS is not set
-# CONFIG_TCP_CONG_SCALABLE is not set
 # CONFIG_IPV6 is not set
 # CONFIG_NETFILTER is not set
@@ -932,4 +923,3 @@ CONFIG_CRC32=y
 # CONFIG_LIBCRC32C is not set
 CONFIG_ZLIB_INFLATE=y
 CONFIG_ZLIB_DEFLATE=y
-# CONFIG_TEXTSEARCH is not set
diff --git a/arch/arm/configs/ixdp2401_defconfig b/arch/arm/configs/ixdp2401_defconfig
index 5c87e8e6969b..6dc40f6be0ef 100644
--- a/arch/arm/configs/ixdp2401_defconfig
+++ b/arch/arm/configs/ixdp2401_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.12-git6
+# Linux kernel version: 2.6.13-rc2
-# Sat Jun 25 00:59:35 2005
+# Thu Jul  7 16:49:08 2005
 #
 CONFIG_ARM=y
 CONFIG_MMU=y
@@ -138,6 +138,7 @@ CONFIG_PCI_NAMES=y
 #
 # CONFIG_SMP is not set
 # CONFIG_PREEMPT is not set
+# CONFIG_NO_IDLE_HZ is not set
 # CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
 CONFIG_SELECT_MEMORY_MODEL=y
 CONFIG_FLATMEM_MANUAL=y
@@ -346,10 +347,9 @@ CONFIG_PACKET_MMAP=y
 CONFIG_UNIX=y
 # CONFIG_NET_KEY is not set
 CONFIG_INET=y
-CONFIG_IP_FIB_HASH=y
-# CONFIG_IP_FIB_TRIE is not set
 # CONFIG_IP_MULTICAST is not set
 # CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_FIB_HASH=y
 CONFIG_IP_PNP=y
 CONFIG_IP_PNP_DHCP=y
 CONFIG_IP_PNP_BOOTP=y
@@ -364,17 +364,8 @@ CONFIG_SYN_COOKIES=y
 # CONFIG_INET_TUNNEL is not set
 CONFIG_IP_TCPDIAG=y
 # CONFIG_IP_TCPDIAG_IPV6 is not set
+# CONFIG_TCP_CONG_ADVANCED is not set
-#
-# TCP congestion control
-#
 CONFIG_TCP_CONG_BIC=y
-CONFIG_TCP_CONG_WESTWOOD=m
-CONFIG_TCP_CONG_HTCP=m
-# CONFIG_TCP_CONG_HSTCP is not set
-# CONFIG_TCP_CONG_HYBLA is not set
-# CONFIG_TCP_CONG_VEGAS is not set
-# CONFIG_TCP_CONG_SCALABLE is not set
 # CONFIG_IPV6 is not set
 # CONFIG_NETFILTER is not set
@@ -933,4 +924,3 @@ CONFIG_CRC32=y
 # CONFIG_LIBCRC32C is not set
 CONFIG_ZLIB_INFLATE=y
 CONFIG_ZLIB_DEFLATE=y
-# CONFIG_TEXTSEARCH is not set
diff --git a/arch/arm/configs/ixdp2800_defconfig b/arch/arm/configs/ixdp2800_defconfig
index 3cb561a551cb..d2bb0b7153fe 100644
--- a/arch/arm/configs/ixdp2800_defconfig
+++ b/arch/arm/configs/ixdp2800_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.12-git6
+# Linux kernel version: 2.6.13-rc2
-# Sat Jun 25 01:00:27 2005
+# Thu Jul  7 16:49:20 2005
 #
 CONFIG_ARM=y
 CONFIG_MMU=y
@@ -138,6 +138,7 @@ CONFIG_PCI_NAMES=y
 #
 # CONFIG_SMP is not set
 # CONFIG_PREEMPT is not set
+# CONFIG_NO_IDLE_HZ is not set
 # CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
 CONFIG_SELECT_MEMORY_MODEL=y
 CONFIG_FLATMEM_MANUAL=y
@@ -346,10 +347,9 @@ CONFIG_PACKET_MMAP=y
 CONFIG_UNIX=y
 # CONFIG_NET_KEY is not set
 CONFIG_INET=y
-CONFIG_IP_FIB_HASH=y
-# CONFIG_IP_FIB_TRIE is not set
 # CONFIG_IP_MULTICAST is not set
 # CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_FIB_HASH=y
 CONFIG_IP_PNP=y
 CONFIG_IP_PNP_DHCP=y
 CONFIG_IP_PNP_BOOTP=y
@@ -364,17 +364,8 @@ CONFIG_SYN_COOKIES=y
 # CONFIG_INET_TUNNEL is not set
 # CONFIG_IP_TCPDIAG is not set
 # CONFIG_IP_TCPDIAG_IPV6 is not set
+# CONFIG_TCP_CONG_ADVANCED is not set
-#
-# TCP congestion control
-#
 CONFIG_TCP_CONG_BIC=y
-CONFIG_TCP_CONG_WESTWOOD=m
-CONFIG_TCP_CONG_HTCP=m
-# CONFIG_TCP_CONG_HSTCP is not set
-# CONFIG_TCP_CONG_HYBLA is not set
-# CONFIG_TCP_CONG_VEGAS is not set
-# CONFIG_TCP_CONG_SCALABLE is not set
 # CONFIG_IPV6 is not set
 # CONFIG_NETFILTER is not set
@@ -932,4 +923,3 @@ CONFIG_CRC32=y
 # CONFIG_LIBCRC32C is not set
 CONFIG_ZLIB_INFLATE=y
 CONFIG_ZLIB_DEFLATE=y
-# CONFIG_TEXTSEARCH is not set
diff --git a/arch/arm/configs/ixdp2801_defconfig b/arch/arm/configs/ixdp2801_defconfig
index b1e162f29cb9..2d6f960e3395 100644
--- a/arch/arm/configs/ixdp2801_defconfig
+++ b/arch/arm/configs/ixdp2801_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.12-git6
+# Linux kernel version: 2.6.13-rc2
-# Sat Jun 25 01:01:18 2005
+# Thu Jul  7 16:49:13 2005
 #
 CONFIG_ARM=y
 CONFIG_MMU=y
@@ -138,6 +138,7 @@ CONFIG_PCI_NAMES=y
 #
 # CONFIG_SMP is not set
 # CONFIG_PREEMPT is not set
+# CONFIG_NO_IDLE_HZ is not set
 # CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
 CONFIG_SELECT_MEMORY_MODEL=y
 CONFIG_FLATMEM_MANUAL=y
@@ -346,10 +347,9 @@ CONFIG_PACKET_MMAP=y
 CONFIG_UNIX=y
 # CONFIG_NET_KEY is not set
 CONFIG_INET=y
-CONFIG_IP_FIB_HASH=y
-# CONFIG_IP_FIB_TRIE is not set
 # CONFIG_IP_MULTICAST is not set
 # CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_FIB_HASH=y
 CONFIG_IP_PNP=y
 CONFIG_IP_PNP_DHCP=y
 CONFIG_IP_PNP_BOOTP=y
@@ -364,17 +364,8 @@ CONFIG_SYN_COOKIES=y
 # CONFIG_INET_TUNNEL is not set
 # CONFIG_IP_TCPDIAG is not set
 # CONFIG_IP_TCPDIAG_IPV6 is not set
+# CONFIG_TCP_CONG_ADVANCED is not set
-#
-# TCP congestion control
-#
 CONFIG_TCP_CONG_BIC=y
-CONFIG_TCP_CONG_WESTWOOD=m
-CONFIG_TCP_CONG_HTCP=m
-# CONFIG_TCP_CONG_HSTCP is not set
-# CONFIG_TCP_CONG_HYBLA is not set
-# CONFIG_TCP_CONG_VEGAS is not set
-# CONFIG_TCP_CONG_SCALABLE is not set
 # CONFIG_IPV6 is not set
 # CONFIG_NETFILTER is not set
@@ -933,4 +924,3 @@ CONFIG_CRC32=y
 # CONFIG_LIBCRC32C is not set
 CONFIG_ZLIB_INFLATE=y
 CONFIG_ZLIB_DEFLATE=y
-# CONFIG_TEXTSEARCH is not set
diff --git a/arch/arm/configs/omap_h2_1610_defconfig b/arch/arm/configs/omap_h2_1610_defconfig
index 4e58d9341bce..24955263b096 100644
--- a/arch/arm/configs/omap_h2_1610_defconfig
+++ b/arch/arm/configs/omap_h2_1610_defconfig
@@ -1,14 +1,13 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.12-rc1-bk2
+# Linux kernel version: 2.6.13-rc2
-# Sun Mar 27 17:52:41 2005
+# Fri Jul  8 04:49:34 2005
 #
 CONFIG_ARM=y
 CONFIG_MMU=y
 CONFIG_UID16=y
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
 CONFIG_GENERIC_CALIBRATE_DELAY=y
-CONFIG_GENERIC_IOMAP=y
 #
 # Code maturity level options
@@ -17,6 +16,7 @@ CONFIG_EXPERIMENTAL=y
 CONFIG_CLEAN_COMPILE=y
 CONFIG_BROKEN_ON_SMP=y
 CONFIG_LOCK_KERNEL=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
 #
 # General setup
@@ -33,8 +33,9 @@ CONFIG_KOBJECT_UEVENT=y
 # CONFIG_IKCONFIG is not set
 # CONFIG_EMBEDDED is not set
 CONFIG_KALLSYMS=y
-# CONFIG_KALLSYMS_ALL is not set
 # CONFIG_KALLSYMS_EXTRA_PASS is not set
+CONFIG_PRINTK=y
+CONFIG_BUG=y
 CONFIG_BASE_FULL=y
 CONFIG_FUTEX=y
 CONFIG_EPOLL=y
@@ -82,10 +83,28 @@ CONFIG_ARCH_OMAP=y
 # CONFIG_ARCH_VERSATILE is not set
 # CONFIG_ARCH_IMX is not set
 # CONFIG_ARCH_H720X is not set
+# CONFIG_ARCH_AAEC2000 is not set
 #
 # TI OMAP Implementations
 #
+CONFIG_ARCH_OMAP_OTG=y
+CONFIG_ARCH_OMAP1=y
+# CONFIG_ARCH_OMAP2 is not set
+#
+# OMAP Feature Selections
+#
+# CONFIG_OMAP_RESET_CLOCKS is not set
+CONFIG_OMAP_MUX=y
+# CONFIG_OMAP_MUX_DEBUG is not set
+CONFIG_OMAP_MUX_WARNINGS=y
+# CONFIG_OMAP_MPU_TIMER is not set
+CONFIG_OMAP_32K_TIMER=y
+CONFIG_OMAP_32K_TIMER_HZ=128
+CONFIG_OMAP_LL_DEBUG_UART1=y
+# CONFIG_OMAP_LL_DEBUG_UART2 is not set
+# CONFIG_OMAP_LL_DEBUG_UART3 is not set
 #
 # OMAP Core Type
@@ -93,7 +112,6 @@ CONFIG_ARCH_OMAP=y
 # CONFIG_ARCH_OMAP730 is not set
 # CONFIG_ARCH_OMAP1510 is not set
 CONFIG_ARCH_OMAP16XX=y
-CONFIG_ARCH_OMAP_OTG=y
 #
 # OMAP Board Type
@@ -101,21 +119,14 @@ CONFIG_ARCH_OMAP_OTG=y
 # CONFIG_MACH_OMAP_INNOVATOR is not set
 CONFIG_MACH_OMAP_H2=y
 # CONFIG_MACH_OMAP_H3 is not set
-# CONFIG_MACH_OMAP_H4 is not set
 # CONFIG_MACH_OMAP_OSK is not set
 # CONFIG_MACH_OMAP_GENERIC is not set
 #
-# OMAP Feature Selections
+# OMAP CPU Speed
 #
-CONFIG_OMAP_MUX=y
+# CONFIG_OMAP_CLOCKS_SET_BY_BOOTLOADER is not set
-# CONFIG_OMAP_MUX_DEBUG is not set
+# CONFIG_OMAP_ARM_216MHZ is not set
-CONFIG_OMAP_MUX_WARNINGS=y
-CONFIG_OMAP_MPU_TIMER=y
-# CONFIG_OMAP_32K_TIMER is not set
-CONFIG_OMAP_LL_DEBUG_UART1=y
-# CONFIG_OMAP_LL_DEBUG_UART2 is not set
-# CONFIG_OMAP_LL_DEBUG_UART3 is not set
 CONFIG_OMAP_ARM_192MHZ=y
 # CONFIG_OMAP_ARM_168MHZ is not set
 # CONFIG_OMAP_ARM_120MHZ is not set
@@ -145,6 +156,7 @@ CONFIG_ARM_THUMB=y
 #
 # Bus support
 #
+CONFIG_ISA_DMA_API=y
 #
 # PCCARD (PCMCIA/CardBus) support
@@ -154,7 +166,16 @@ CONFIG_ARM_THUMB=y
 #
 # Kernel Features
 #
+# CONFIG_SMP is not set
 CONFIG_PREEMPT=y
+CONFIG_NO_IDLE_HZ=y
+# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+# CONFIG_SPARSEMEM_MANUAL is not set
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
 # CONFIG_LEDS is not set
 CONFIG_ALIGNMENT_TRAP=y
@@ -167,6 +188,22 @@ CONFIG_CMDLINE="mem=32M console=ttyS0,115200n8 root=0801 ro init=/bin/sh"
 # CONFIG_XIP_KERNEL is not set
 #
+# CPU Frequency scaling
+#
+CONFIG_CPU_FREQ=y
+CONFIG_CPU_FREQ_TABLE=y
+# CONFIG_CPU_FREQ_DEBUG is not set
+CONFIG_CPU_FREQ_STAT=y
+# CONFIG_CPU_FREQ_STAT_DETAILS is not set
+# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set
+CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE=y
+# CONFIG_CPU_FREQ_GOV_PERFORMANCE is not set
+# CONFIG_CPU_FREQ_GOV_POWERSAVE is not set
+CONFIG_CPU_FREQ_GOV_USERSPACE=y
+# CONFIG_CPU_FREQ_GOV_ONDEMAND is not set
+# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set
+#
 # Floating point emulation
 #
@@ -202,7 +239,6 @@ CONFIG_PM=y
 CONFIG_STANDALONE=y
 CONFIG_PREVENT_FIRMWARE_BUILD=y
 # CONFIG_FW_LOADER is not set
-CONFIG_DEBUG_DRIVER=y
 #
 # Memory Technology Devices (MTD)
@@ -292,7 +328,6 @@ CONFIG_MTD_CFI_UTIL=y
 #
 # Block devices
 #
-# CONFIG_BLK_DEV_FD is not set
 # CONFIG_BLK_DEV_COW_COMMON is not set
 CONFIG_BLK_DEV_LOOP=y
 # CONFIG_BLK_DEV_CRYPTOLOOP is not set
@@ -327,6 +362,7 @@ CONFIG_SCSI_PROC_FS=y
 # CONFIG_CHR_DEV_OSST is not set
 # CONFIG_BLK_DEV_SR is not set
 # CONFIG_CHR_DEV_SG is not set
+# CONFIG_CHR_DEV_SCH is not set
 #
 # Some SCSI devices (e.g. CD jukebox) support multiple LUNs
@@ -356,6 +392,7 @@ CONFIG_SCSI_PROC_FS=y
 #
 # Fusion MPT device support
 #
+# CONFIG_FUSION is not set
 #
 # IEEE 1394 (FireWire) support
@@ -375,12 +412,12 @@ CONFIG_NET=y
 #
 CONFIG_PACKET=y
 # CONFIG_PACKET_MMAP is not set
-# CONFIG_NETLINK_DEV is not set
 CONFIG_UNIX=y
 # CONFIG_NET_KEY is not set
 CONFIG_INET=y
 # CONFIG_IP_MULTICAST is not set
 # CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_FIB_HASH=y
 CONFIG_IP_PNP=y
 CONFIG_IP_PNP_DHCP=y
 CONFIG_IP_PNP_BOOTP=y
@@ -395,6 +432,8 @@ CONFIG_IP_PNP_BOOTP=y
 # CONFIG_INET_TUNNEL is not set
 CONFIG_IP_TCPDIAG=y
 # CONFIG_IP_TCPDIAG_IPV6 is not set
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_BIC=y
 # CONFIG_IPV6 is not set
 # CONFIG_NETFILTER is not set
@@ -442,6 +481,7 @@ CONFIG_NETDEVICES=y
 CONFIG_NET_ETHERNET=y
 CONFIG_MII=y
 CONFIG_SMC91X=y
+# CONFIG_DM9000 is not set
 #
 # Ethernet (1000 Mbit)
@@ -518,7 +558,6 @@ CONFIG_SERIO=y
 CONFIG_SERIO_SERPORT=y
 # CONFIG_SERIO_RAW is not set
 # CONFIG_GAMEPORT is not set
-CONFIG_SOUND_GAMEPORT=y
 #
 # Character devices
@@ -567,13 +606,11 @@ CONFIG_WATCHDOG_NOWAYOUT=y
 #
 # Ftape, the floppy tape device driver
 #
-# CONFIG_DRM is not set
 # CONFIG_RAW_DRIVER is not set
 #
 # TPM devices
 #
-# CONFIG_TCG_TPM is not set
 #
 # I2C support
@@ -604,7 +641,9 @@ CONFIG_I2C_CHARDEV=y
 # CONFIG_SENSORS_ADM1025 is not set
 # CONFIG_SENSORS_ADM1026 is not set
 # CONFIG_SENSORS_ADM1031 is not set
+# CONFIG_SENSORS_ADM9240 is not set
 # CONFIG_SENSORS_ASB100 is not set
+# CONFIG_SENSORS_ATXP1 is not set
 # CONFIG_SENSORS_DS1621 is not set
 # CONFIG_SENSORS_FSCHER is not set
 # CONFIG_SENSORS_FSCPOS is not set
@@ -620,6 +659,7 @@ CONFIG_I2C_CHARDEV=y
 # CONFIG_SENSORS_LM85 is not set
 # CONFIG_SENSORS_LM87 is not set
 # CONFIG_SENSORS_LM90 is not set
+# CONFIG_SENSORS_LM92 is not set
 # CONFIG_SENSORS_MAX1619 is not set
 # CONFIG_SENSORS_PC87360 is not set
 # CONFIG_SENSORS_SMSC47B397 is not set
@@ -627,15 +667,21 @@ CONFIG_I2C_CHARDEV=y
 # CONFIG_SENSORS_W83781D is not set
 # CONFIG_SENSORS_W83L785TS is not set
 # CONFIG_SENSORS_W83627HF is not set
+# CONFIG_SENSORS_W83627EHF is not set
 #
 # Other I2C Chip support
 #
+# CONFIG_SENSORS_DS1337 is not set
+# CONFIG_SENSORS_DS1374 is not set
 # CONFIG_SENSORS_EEPROM is not set
 # CONFIG_SENSORS_PCF8574 is not set
+# CONFIG_SENSORS_PCA9539 is not set
 # CONFIG_SENSORS_PCF8591 is not set
 # CONFIG_SENSORS_RTC8564 is not set
 CONFIG_ISP1301_OMAP=y
+CONFIG_TPS65010=y
+# CONFIG_SENSORS_MAX6875 is not set
 # CONFIG_I2C_DEBUG_CORE is not set
 # CONFIG_I2C_DEBUG_ALGO is not set
 # CONFIG_I2C_DEBUG_BUS is not set
@@ -663,8 +709,10 @@ CONFIG_FB=y
 # CONFIG_FB_CFB_COPYAREA is not set
 # CONFIG_FB_CFB_IMAGEBLIT is not set
 # CONFIG_FB_SOFT_CURSOR is not set
+# CONFIG_FB_MACMODES is not set
 CONFIG_FB_MODE_HELPERS=y
 # CONFIG_FB_TILEBLITTING is not set
+# CONFIG_FB_S1D13XXX is not set
 # CONFIG_FB_VIRTUAL is not set
 #
@@ -677,11 +725,13 @@ CONFIG_FONTS=y
 CONFIG_FONT_8x8=y
 CONFIG_FONT_8x16=y
 # CONFIG_FONT_6x11 is not set
+# CONFIG_FONT_7x14 is not set
 # CONFIG_FONT_PEARL_8x8 is not set
 # CONFIG_FONT_ACORN_8x8 is not set
 # CONFIG_FONT_MINI_4x6 is not set
 # CONFIG_FONT_SUN8x16 is not set
 # CONFIG_FONT_SUN12x22 is not set
+# CONFIG_FONT_10x18 is not set
 #
 # Logo configuration
@@ -729,14 +779,14 @@ CONFIG_USB_ARCH_HAS_OHCI=y
 #
 CONFIG_USB_GADGET=y
 # CONFIG_USB_GADGET_DEBUG_FILES is not set
+CONFIG_USB_GADGET_SELECTED=y
 # CONFIG_USB_GADGET_NET2280 is not set
 # CONFIG_USB_GADGET_PXA2XX is not set
 # CONFIG_USB_GADGET_GOKU is not set
-# CONFIG_USB_GADGET_SA1100 is not set
 # CONFIG_USB_GADGET_LH7A40X is not set
-# CONFIG_USB_GADGET_DUMMY_HCD is not set
 CONFIG_USB_GADGET_OMAP=y
 CONFIG_USB_OMAP=y
+# CONFIG_USB_GADGET_DUMMY_HCD is not set
 # CONFIG_USB_GADGET_DUALSPEED is not set
 # CONFIG_USB_ZERO is not set
 CONFIG_USB_ETH=y
@@ -755,6 +805,7 @@ CONFIG_USB_ETH_RNDIS=y
 #
 CONFIG_EXT2_FS=y
 # CONFIG_EXT2_FS_XATTR is not set
+# CONFIG_EXT2_FS_XIP is not set
 # CONFIG_EXT3_FS is not set
 # CONFIG_JBD is not set
 # CONFIG_REISERFS_FS is not set
@@ -791,7 +842,6 @@ CONFIG_FAT_DEFAULT_CODEPAGE=437
 #
 CONFIG_PROC_FS=y
 CONFIG_SYSFS=y
-# CONFIG_DEVFS_FS is not set
 # CONFIG_DEVPTS_FS_XATTR is not set
 # CONFIG_TMPFS is not set
 # CONFIG_HUGETLB_PAGE is not set
@@ -828,12 +878,14 @@ CONFIG_CRAMFS=y
 #
 CONFIG_NFS_FS=y
 CONFIG_NFS_V3=y
+# CONFIG_NFS_V3_ACL is not set
 CONFIG_NFS_V4=y
 # CONFIG_NFS_DIRECTIO is not set
 # CONFIG_NFSD is not set
 CONFIG_ROOT_NFS=y
 CONFIG_LOCKD=y
 CONFIG_LOCKD_V4=y
+CONFIG_NFS_COMMON=y
 CONFIG_SUNRPC=y
 CONFIG_SUNRPC_GSS=y
 CONFIG_RPCSEC_GSS_KRB5=y
@@ -903,24 +955,11 @@ CONFIG_NLS_DEFAULT="iso8859-1"
 # Kernel hacking
 #
 # CONFIG_PRINTK_TIME is not set
-CONFIG_DEBUG_KERNEL=y
+# CONFIG_DEBUG_KERNEL is not set
-# CONFIG_MAGIC_SYSRQ is not set
 CONFIG_LOG_BUF_SHIFT=14
-# CONFIG_SCHEDSTATS is not set
-# CONFIG_DEBUG_SLAB is not set
-CONFIG_DEBUG_PREEMPT=y
-# CONFIG_DEBUG_SPINLOCK is not set
-# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
-# CONFIG_DEBUG_KOBJECT is not set
 CONFIG_DEBUG_BUGVERBOSE=y
-CONFIG_DEBUG_INFO=y
-# CONFIG_DEBUG_FS is not set
 CONFIG_FRAME_POINTER=y
-CONFIG_DEBUG_USER=y
+# CONFIG_DEBUG_USER is not set
-# CONFIG_DEBUG_WAITQ is not set
-CONFIG_DEBUG_ERRORS=y
-CONFIG_DEBUG_LL=y
-# CONFIG_DEBUG_ICEDCC is not set
 #
 # Security options
diff --git a/arch/arm/mach-ixp2000/core.c b/arch/arm/mach-ixp2000/core.c
index 4b9d841e04c1..45b18658499f 100644
--- a/arch/arm/mach-ixp2000/core.c
+++ b/arch/arm/mach-ixp2000/core.c
@@ -23,7 +23,7 @@
 #include <linux/serial.h>
 #include <linux/tty.h>
 #include <linux/bitops.h>
-#include <linux/serial_core.h>
+#include <linux/serial_8250.h>
 #include <linux/mm.h>
 #include <asm/types.h>
@@ -125,19 +125,6 @@ static struct map_desc ixp2000_io_desc[] __initdata = {
        }
 };
-static struct uart_port ixp2000_serial_port = {
-        .membase        = (char *)(IXP2000_UART_VIRT_BASE + 3),
-        .mapbase        = IXP2000_UART_PHYS_BASE + 3,
-        .irq            = IRQ_IXP2000_UART,
-        .flags          = UPF_SKIP_TEST,
-        .iotype         = UPIO_MEM,
-        .regshift       = 2,
-        .uartclk        = 50000000,
-        .line           = 0,
-        .type           = PORT_XSCALE,
-        .fifosize       = 16
-};
 void __init ixp2000_map_io(void)
 {
        extern unsigned int processor_id;
@@ -157,12 +144,50 @@ void __init ixp2000_map_io(void)
        }
        iotable_init(ixp2000_io_desc, ARRAY_SIZE(ixp2000_io_desc));
-        early_serial_setup(&ixp2000_serial_port);
        /* Set slowport to 8-bit mode.  */
        ixp2000_reg_write(IXP2000_SLOWPORT_FRM, 1);
 }
+/*************************************************************************
+ * Serial port support for IXP2000
+ *************************************************************************/
+static struct plat_serial8250_port ixp2000_serial_port[] = {
+        {
+                .mapbase        = IXP2000_UART_PHYS_BASE,
+                .membase        = (char *)(IXP2000_UART_VIRT_BASE + 3),
+                .irq            = IRQ_IXP2000_UART,
+                .flags          = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
+                .iotype         = UPIO_MEM,
+                .regshift       = 2,
+                .uartclk        = 50000000,
+        },
+        { },
+};
+static struct resource ixp2000_uart_resource = {
+        .start          = IXP2000_UART_PHYS_BASE,
+        .end            = IXP2000_UART_PHYS_BASE + 0xffff,
+        .flags          = IORESOURCE_MEM,
+};
+static struct platform_device ixp2000_serial_device = {
+        .name           = "serial8250",
+        .id             = 0,
+        .dev            = {
+                .platform_data          = ixp2000_serial_port,
+        },
+        .num_resources  = 1,
+        .resource       = &ixp2000_uart_resource,
+};
+void __init ixp2000_uart_init(void)
+{
+        platform_device_register(&ixp2000_serial_device);
+}
 /*************************************************************************
 * Timer-tick functions for IXP2000
 *************************************************************************/
diff --git a/arch/arm/mach-ixp2000/enp2611.c b/arch/arm/mach-ixp2000/enp2611.c
index b7ebf3898fc5..9aa54de44740 100644
--- a/arch/arm/mach-ixp2000/enp2611.c
+++ b/arch/arm/mach-ixp2000/enp2611.c
@@ -219,6 +219,7 @@ static struct platform_device *enp2611_devices[] __initdata = {
 static void __init enp2611_init_machine(void)
 {
        platform_add_devices(enp2611_devices, ARRAY_SIZE(enp2611_devices));
+        ixp2000_uart_init();
 }
diff --git a/arch/arm/mach-ixp2000/ixdp2x00.c b/arch/arm/mach-ixp2000/ixdp2x00.c
index 5e4380747b53..a43369ad876c 100644
--- a/arch/arm/mach-ixp2000/ixdp2x00.c
+++ b/arch/arm/mach-ixp2000/ixdp2x00.c
@@ -303,5 +303,6 @@ void __init ixdp2x00_init_machine(void)
        gpio_line_config(IXDP2X00_GPIO_I2C_ENABLE, GPIO_OUT);
        platform_add_devices(ixdp2x00_devices, ARRAY_SIZE(ixdp2x00_devices));
+        ixp2000_uart_init();
 }
diff --git a/arch/arm/mach-ixp2000/ixdp2x01.c b/arch/arm/mach-ixp2000/ixdp2x01.c
index c73588743ee1..43447dad1657 100644
--- a/arch/arm/mach-ixp2000/ixdp2x01.c
+++ b/arch/arm/mach-ixp2000/ixdp2x01.c
@@ -370,6 +370,7 @@ static void __init ixdp2x01_init_machine(void)
                ((*IXDP2X01_CPLD_FLASH_REG & IXDP2X01_CPLD_FLASH_BANK_MASK) + 1);
        platform_add_devices(ixdp2x01_devices, ARRAY_SIZE(ixdp2x01_devices));
+        ixp2000_uart_init();
 }
diff --git a/arch/arm/mach-omap/Kconfig b/arch/arm/mach-omap/Kconfig
deleted file mode 100644
index 9e42efa66b2b..000000000000
--- a/arch/arm/mach-omap/Kconfig
+++ /dev/null
@@ -1,221 +0,0 @@
-if ARCH_OMAP
-menu "TI OMAP Implementations"
-comment "OMAP Core Type"
-config ARCH_OMAP730
-        depends on ARCH_OMAP
-        bool "OMAP730 Based System"
-        select ARCH_OMAP_OTG
-config ARCH_OMAP1510
-        depends on ARCH_OMAP
-        default y
-        bool "OMAP1510 Based System"
-config ARCH_OMAP16XX
-        depends on ARCH_OMAP
-        bool "OMAP16XX Based System"
-        select ARCH_OMAP_OTG
-config ARCH_OMAP_OTG
-        bool
-comment "OMAP Board Type"
-config MACH_OMAP_INNOVATOR
-        bool "TI Innovator"
-        depends on ARCH_OMAP1510 || ARCH_OMAP16XX
-        help
-          TI OMAP 1510 or 1610 Innovator board support. Say Y here if you
-          have such a board.
-config MACH_OMAP_H2
-        bool "TI H2 Support"
-        depends on ARCH_OMAP16XX
-        help
-          TI OMAP 1610/1611B H2 board support. Say Y here if you have such
-          a board.
-config MACH_OMAP_H3
-        bool "TI H3 Support"
-        depends on ARCH_OMAP16XX
-        help
-          TI OMAP 1710 H3 board support. Say Y here if you have such
-          a board.
-config MACH_OMAP_H4
-        bool "TI H4 Support"
-        depends on ARCH_OMAP16XX
-        help
-          TI OMAP 1610 H4 board support. Say Y here if you have such
-          a board.
-config MACH_OMAP_OSK
-        bool "TI OSK Support"
-        depends on ARCH_OMAP16XX
-        help
-          TI OMAP 5912 OSK (OMAP Starter Kit) board support. Say Y here
-          if you have such a board.
-config MACH_OMAP_PERSEUS2
-        bool "TI Perseus2"
-        depends on ARCH_OMAP730
-        help
-          Support for TI OMAP 730 Perseus2 board. Say Y here if you have such
-          a board.
-config MACH_VOICEBLUE
-        bool "Voiceblue"
-        depends on ARCH_OMAP1510
-        help
-          Support for Voiceblue GSM/VoIP gateway. Say Y here if you have such
-          board.
-config MACH_NETSTAR
-        bool "NetStar"
-        depends on ARCH_OMAP1510
-        help
-          Support for NetStar PBX. Say Y here if you have such a board.
-config MACH_OMAP_GENERIC
-        bool "Generic OMAP board"
-        depends on ARCH_OMAP1510 || ARCH_OMAP16XX
-        help
-          Support for generic OMAP-1510, 1610 or 1710 board with
-          no FPGA. Can be used as template for porting Linux to
-          custom OMAP boards. Say Y here if you have a custom
-          board.
-comment "OMAP Feature Selections"
-#config OMAP_BOOT_TAG
-#       bool "OMAP bootloader information passing"
-#        depends on ARCH_OMAP
-#        default n
-#        help
-#          Say Y, if you have a bootloader which passes information
-#          about your board and its peripheral configuration.
-config OMAP_MUX
-        bool "OMAP multiplexing support"
-        depends on ARCH_OMAP
-        default y
-        help
-          Pin multiplexing support for OMAP boards. If your bootloader
-          sets the multiplexing correctly, say N. Otherwise, or if unsure,
-          say Y.
-config OMAP_MUX_DEBUG
-        bool "Multiplexing debug output"
-        depends on OMAP_MUX
-        default n
-        help
-          Makes the multiplexing functions print out a lot of debug info.
-          This is useful if you want to find out the correct values of the
-          multiplexing registers.
-config OMAP_MUX_WARNINGS
-        bool "Warn about pins the bootloader didn't set up"
-        depends on OMAP_MUX
-        default y
-        help
-          Choose Y here to warn whenever driver initialization logic needs
-          to change the pin multiplexing setup.  When there are no warnings
-          printed, it's safe to deselect OMAP_MUX for your product.
-choice
-        prompt "System timer"
-        default OMAP_MPU_TIMER
-config OMAP_MPU_TIMER
-        bool "Use mpu timer"
-        help
-          Select this option if you want to use the OMAP mpu timer. This
-          timer provides more intra-tick resolution than the 32KHz timer,
-          but consumes more power.
-config OMAP_32K_TIMER
-        bool "Use 32KHz timer"
-        depends on ARCH_OMAP16XX
-        help
-          Select this option if you want to enable the OMAP 32KHz timer.
-          This timer saves power compared to the OMAP_MPU_TIMER, and has
-          support for no tick during idle. The 32KHz timer provides less
-          intra-tick resolution than OMAP_MPU_TIMER. The 32KHz timer is
-          currently only available for OMAP-16xx.
-endchoice
-config OMAP_32K_TIMER_HZ
-       int "Kernel internal timer frequency for 32KHz timer"
-       range 32 1024
-       depends on OMAP_32K_TIMER
-       default "128"
-       help
-          Kernel internal timer frequency should be a divisor of 32768,
-          such as 64 or 128.
-choice
-        prompt "Low-level debug console UART"
-        depends on ARCH_OMAP
-        default OMAP_LL_DEBUG_UART1
-config OMAP_LL_DEBUG_UART1
-        bool "UART1"
-config OMAP_LL_DEBUG_UART2
-        bool "UART2"
-config OMAP_LL_DEBUG_UART3
-        bool "UART3"
-endchoice
-config OMAP_ARM_195MHZ
-        bool "OMAP ARM 195 MHz CPU"
-        depends on ARCH_OMAP730
-        help
-          Enable 195MHz clock for OMAP CPU. If unsure, say N.
-config OMAP_ARM_192MHZ
-        bool "OMAP ARM 192 MHz CPU"
-        depends on ARCH_OMAP16XX
-        help
-          Enable 192MHz clock for OMAP CPU. If unsure, say N.
-config OMAP_ARM_182MHZ
-        bool "OMAP ARM 182 MHz CPU"
-        depends on ARCH_OMAP730
-        help
-          Enable 182MHz clock for OMAP CPU. If unsure, say N.
-config OMAP_ARM_168MHZ
-        bool "OMAP ARM 168 MHz CPU"
-        depends on ARCH_OMAP1510 || ARCH_OMAP16XX || ARCH_OMAP730
-        help
-          Enable 168MHz clock for OMAP CPU. If unsure, say N.
-config OMAP_ARM_120MHZ
-        bool "OMAP ARM 120 MHz CPU"
-        depends on ARCH_OMAP1510 || ARCH_OMAP16XX || ARCH_OMAP730
-        help
-          Enable 120MHz clock for OMAP CPU. If unsure, say N.
-config OMAP_ARM_60MHZ
-        bool "OMAP ARM 60 MHz CPU"
-        depends on ARCH_OMAP1510 || ARCH_OMAP16XX || ARCH_OMAP730
-        default y
-        help
-          Enable 60MHz clock for OMAP CPU. If unsure, say Y.
-config OMAP_ARM_30MHZ
-        bool "OMAP ARM 30 MHz CPU"
-        depends on ARCH_OMAP1510 || ARCH_OMAP16XX || ARCH_OMAP730
-        help
-          Enable 30MHz clock for OMAP CPU. If unsure, say N.
-endmenu
-endif
diff --git a/arch/arm/mach-omap/Makefile b/arch/arm/mach-omap/Makefile
deleted file mode 100644
index 4cafb11d2c02..000000000000
--- a/arch/arm/mach-omap/Makefile
+++ /dev/null
@@ -1,40 +0,0 @@
-#
-# Makefile for the linux kernel.
-#
-# Common support
-obj-y := common.o time.o irq.o dma.o clock.o mux.o gpio.o mcbsp.o usb.o
-obj-m :=
-obj-n :=
-obj-  :=
-led-y := leds.o
-# Specific board support
-obj-$(CONFIG_MACH_OMAP_H2) += board-h2.o
-obj-$(CONFIG_MACH_OMAP_INNOVATOR) += board-innovator.o
-obj-$(CONFIG_MACH_OMAP_GENERIC) += board-generic.o
-obj-$(CONFIG_MACH_OMAP_PERSEUS2) += board-perseus2.o
-obj-$(CONFIG_MACH_OMAP_OSK) += board-osk.o
-obj-$(CONFIG_MACH_OMAP_H3) += board-h3.o
-obj-$(CONFIG_MACH_VOICEBLUE) += board-voiceblue.o
-obj-$(CONFIG_MACH_NETSTAR) += board-netstar.o
-# OCPI interconnect support for 1710, 1610 and 5912
-obj-$(CONFIG_ARCH_OMAP16XX) += ocpi.o
-# LEDs support
-led-$(CONFIG_MACH_OMAP_H2) += leds-h2p2-debug.o
-led-$(CONFIG_MACH_OMAP_INNOVATOR) += leds-innovator.o
-led-$(CONFIG_MACH_OMAP_PERSEUS2) += leds-h2p2-debug.o
-obj-$(CONFIG_LEDS) += $(led-y)
-# Power Management
-obj-$(CONFIG_PM) += pm.o sleep.o
-ifeq ($(CONFIG_ARCH_OMAP1510),y)
-# Innovator-1510 FPGA
-obj-$(CONFIG_MACH_OMAP_INNOVATOR) += fpga.o
-endif
-# kgdb support
-obj-$(CONFIG_KGDB_SERIAL)       += kgdb-serial.o
diff --git a/arch/arm/mach-omap/common.c b/arch/arm/mach-omap/common.c
deleted file mode 100644
index 265cde48586f..000000000000
--- a/arch/arm/mach-omap/common.c
+++ /dev/null
@@ -1,549 +0,0 @@
-/*
- * linux/arch/arm/mach-omap/common.c
- *
- * Code common to all OMAP machines.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-#include <linux/config.h>
-#include <linux/module.h>
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/delay.h>
-#include <linux/pm.h>
-#include <linux/console.h>
-#include <linux/serial.h>
-#include <linux/tty.h>
-#include <linux/serial_8250.h>
-#include <linux/serial_reg.h>
-#include <asm/hardware.h>
-#include <asm/system.h>
-#include <asm/pgtable.h>
-#include <asm/mach/map.h>
-#include <asm/hardware/clock.h>
-#include <asm/io.h>
-#include <asm/mach-types.h>
-#include <asm/arch/board.h>
-#include <asm/arch/mux.h>
-#include <asm/arch/fpga.h>
-#include "clock.h"
-#define DEBUG 1
-struct omap_id {
-        u16     jtag_id;        /* Used to determine OMAP type */
-        u8      die_rev;        /* Processor revision */
-        u32     omap_id;        /* OMAP revision */
-        u32     type;           /* Cpu id bits [31:08], cpu class bits [07:00] */
-};
-/* Register values to detect the OMAP version */
-static struct omap_id omap_ids[] __initdata = {
-        { .jtag_id = 0x355f, .die_rev = 0x0, .omap_id = 0x03320000, .type = 0x07300100},
-        { .jtag_id = 0xb55f, .die_rev = 0x0, .omap_id = 0x03320000, .type = 0x07300300},
-        { .jtag_id = 0xb470, .die_rev = 0x0, .omap_id = 0x03310100, .type = 0x15100000},
-        { .jtag_id = 0xb576, .die_rev = 0x0, .omap_id = 0x03320000, .type = 0x16100000},
-        { .jtag_id = 0xb576, .die_rev = 0x2, .omap_id = 0x03320100, .type = 0x16110000},
-        { .jtag_id = 0xb576, .die_rev = 0x3, .omap_id = 0x03320100, .type = 0x16100c00},
-        { .jtag_id = 0xb576, .die_rev = 0x0, .omap_id = 0x03320200, .type = 0x16100d00},
-        { .jtag_id = 0xb613, .die_rev = 0x0, .omap_id = 0x03320300, .type = 0x1610ef00},
-        { .jtag_id = 0xb613, .die_rev = 0x0, .omap_id = 0x03320300, .type = 0x1610ef00},
-        { .jtag_id = 0xb576, .die_rev = 0x1, .omap_id = 0x03320100, .type = 0x16110000},
-        { .jtag_id = 0xb58c, .die_rev = 0x2, .omap_id = 0x03320200, .type = 0x16110b00},
-        { .jtag_id = 0xb58c, .die_rev = 0x3, .omap_id = 0x03320200, .type = 0x16110c00},
-        { .jtag_id = 0xb65f, .die_rev = 0x0, .omap_id = 0x03320400, .type = 0x16212300},
-        { .jtag_id = 0xb65f, .die_rev = 0x1, .omap_id = 0x03320400, .type = 0x16212300},
-        { .jtag_id = 0xb65f, .die_rev = 0x1, .omap_id = 0x03320500, .type = 0x16212300},
-        { .jtag_id = 0xb5f7, .die_rev = 0x0, .omap_id = 0x03330000, .type = 0x17100000},
-        { .jtag_id = 0xb5f7, .die_rev = 0x1, .omap_id = 0x03330100, .type = 0x17100000},
-        { .jtag_id = 0xb5f7, .die_rev = 0x2, .omap_id = 0x03330100, .type = 0x17100000},
-};
-/*
- * Get OMAP type from PROD_ID.
- * 1710 has the PROD_ID in bits 15:00, not in 16:01 as documented in TRM.
- * 1510 PROD_ID is empty, and 1610 PROD_ID does not make sense.
- * Undocumented register in TEST BLOCK is used as fallback; This seems to
- * work on 1510, 1610 & 1710. The official way hopefully will work in future
- * processors.
- */
-static u16 __init omap_get_jtag_id(void)
-{
-        u32 prod_id, omap_id;
-        prod_id = omap_readl(OMAP_PRODUCTION_ID_1);
-        omap_id = omap_readl(OMAP32_ID_1);
-        /* Check for unusable OMAP_PRODUCTION_ID_1 on 1611B/5912 and 730 */
-        if (((prod_id >> 20) == 0) || (prod_id == omap_id))
-                prod_id = 0;
-        else
-                prod_id &= 0xffff;
-        if (prod_id)
-                return prod_id;
-        /* Use OMAP32_ID_1 as fallback */
-        prod_id = ((omap_id >> 12) & 0xffff);
-        return prod_id;
-}
-/*
- * Get OMAP revision from DIE_REV.
- * Early 1710 processors may have broken OMAP_DIE_ID, it contains PROD_ID.
- * Undocumented register in the TEST BLOCK is used as fallback.
- * REVISIT: This does not seem to work on 1510
- */
-static u8 __init omap_get_die_rev(void)
-{
-        u32 die_rev;
-        die_rev = omap_readl(OMAP_DIE_ID_1);
-        /* Check for broken OMAP_DIE_ID on early 1710 */
-        if (((die_rev >> 12) & 0xffff) == omap_get_jtag_id())
-                die_rev = 0;
-        die_rev = (die_rev >> 17) & 0xf;
-        if (die_rev)
-                return die_rev;
-        die_rev = (omap_readl(OMAP32_ID_1) >> 28) & 0xf;
-        return die_rev;
-}
-static void __init omap_check_revision(void)
-{
-        int i;
-        u16 jtag_id;
-        u8 die_rev;
-        u32 omap_id;
-        u8 cpu_type;
-        jtag_id = omap_get_jtag_id();
-        die_rev = omap_get_die_rev();
-        omap_id = omap_readl(OMAP32_ID_0);
-#ifdef DEBUG
-        printk("OMAP_DIE_ID_0: 0x%08x\n", omap_readl(OMAP_DIE_ID_0));
-        printk("OMAP_DIE_ID_1: 0x%08x DIE_REV: %i\n",
-                omap_readl(OMAP_DIE_ID_1),
-               (omap_readl(OMAP_DIE_ID_1) >> 17) & 0xf);
-        printk("OMAP_PRODUCTION_ID_0: 0x%08x\n", omap_readl(OMAP_PRODUCTION_ID_0));
-        printk("OMAP_PRODUCTION_ID_1: 0x%08x JTAG_ID: 0x%04x\n",
-                omap_readl(OMAP_PRODUCTION_ID_1),
-                omap_readl(OMAP_PRODUCTION_ID_1) & 0xffff);
-        printk("OMAP32_ID_0: 0x%08x\n", omap_readl(OMAP32_ID_0));
-        printk("OMAP32_ID_1: 0x%08x\n", omap_readl(OMAP32_ID_1));
-        printk("JTAG_ID: 0x%04x DIE_REV: %i\n", jtag_id, die_rev);
-#endif
-        system_serial_high = omap_readl(OMAP_DIE_ID_0);
-        system_serial_low = omap_readl(OMAP_DIE_ID_1);
-        /* First check only the major version in a safe way */
-        for (i = 0; i < ARRAY_SIZE(omap_ids); i++) {
-                if (jtag_id == (omap_ids[i].jtag_id)) {
-                        system_rev = omap_ids[i].type;
-                        break;
-                }
-        }
-        /* Check if we can find the die revision */
-        for (i = 0; i < ARRAY_SIZE(omap_ids); i++) {
-                if (jtag_id == omap_ids[i].jtag_id && die_rev == omap_ids[i].die_rev) {
-                        system_rev = omap_ids[i].type;
-                        break;
-                }
-        }
-        /* Finally check also the omap_id */
-        for (i = 0; i < ARRAY_SIZE(omap_ids); i++) {
-                if (jtag_id == omap_ids[i].jtag_id
-                    && die_rev == omap_ids[i].die_rev
-                    && omap_id == omap_ids[i].omap_id) {
-                        system_rev = omap_ids[i].type;
-                        break;
-                }
-        }
-        /* Add the cpu class info (7xx, 15xx, 16xx, 24xx) */
-        cpu_type = system_rev >> 24;
-        switch (cpu_type) {
-        case 0x07:
-                system_rev |= 0x07;
-                break;
-        case 0x15:
-                system_rev |= 0x15;
-                break;
-        case 0x16:
-        case 0x17:
-                system_rev |= 0x16;
-                break;
-        case 0x24:
-                system_rev |= 0x24;
-                break;
-        default:
-                printk("Unknown OMAP cpu type: 0x%02x\n", cpu_type);
-        }
-        printk("OMAP%04x", system_rev >> 16);
-        if ((system_rev >> 8) & 0xff)
-                printk("%x", (system_rev >> 8) & 0xff);
-        printk(" revision %i handled as %02xxx id: %08x%08x\n",
-               die_rev, system_rev & 0xff, system_serial_low,
-               system_serial_high);
-}
-/*
- * ----------------------------------------------------------------------------
- * OMAP I/O mapping
- *
- * The machine specific code may provide the extra mapping besides the
- * default mapping provided here.
- * ----------------------------------------------------------------------------
- */
-static struct map_desc omap_io_desc[] __initdata = {
- { IO_VIRT,             IO_PHYS,             IO_SIZE,              MT_DEVICE },
-};
-#ifdef CONFIG_ARCH_OMAP730
-static struct map_desc omap730_io_desc[] __initdata = {
- { OMAP730_DSP_BASE,    OMAP730_DSP_START,    OMAP730_DSP_SIZE,    MT_DEVICE },
- { OMAP730_DSPREG_BASE, OMAP730_DSPREG_START, OMAP730_DSPREG_SIZE, MT_DEVICE },
- { OMAP730_SRAM_BASE,   OMAP730_SRAM_START,   OMAP730_SRAM_SIZE,   MT_DEVICE }
-};
-#endif
-#ifdef CONFIG_ARCH_OMAP1510
-static struct map_desc omap1510_io_desc[] __initdata = {
- { OMAP1510_DSP_BASE,    OMAP1510_DSP_START,    OMAP1510_DSP_SIZE,    MT_DEVICE },
- { OMAP1510_DSPREG_BASE, OMAP1510_DSPREG_START, OMAP1510_DSPREG_SIZE, MT_DEVICE },
- { OMAP1510_SRAM_BASE,   OMAP1510_SRAM_START,   OMAP1510_SRAM_SIZE,   MT_DEVICE }
-};
-#endif
-#if defined(CONFIG_ARCH_OMAP16XX)
-static struct map_desc omap1610_io_desc[] __initdata = {
- { OMAP16XX_DSP_BASE,    OMAP16XX_DSP_START,    OMAP16XX_DSP_SIZE,    MT_DEVICE },
- { OMAP16XX_DSPREG_BASE, OMAP16XX_DSPREG_START, OMAP16XX_DSPREG_SIZE, MT_DEVICE },
- { OMAP16XX_SRAM_BASE,   OMAP16XX_SRAM_START,   OMAP1610_SRAM_SIZE,   MT_DEVICE }
-};
-static struct map_desc omap5912_io_desc[] __initdata = {
- { OMAP16XX_DSP_BASE,    OMAP16XX_DSP_START,    OMAP16XX_DSP_SIZE,    MT_DEVICE },
- { OMAP16XX_DSPREG_BASE, OMAP16XX_DSPREG_START, OMAP16XX_DSPREG_SIZE, MT_DEVICE },
-/*
- * The OMAP5912 has 250kByte internal SRAM. Because the mapping is baseed on page
- * size (4kByte), it seems that the last 2kByte (=0x800) of the 250kByte are not mapped.
- * Add additional 2kByte (0x800) so that the last page is mapped and the last 2kByte
- * can be used.
- */
- { OMAP16XX_SRAM_BASE,   OMAP16XX_SRAM_START,   OMAP5912_SRAM_SIZE + 0x800,   MT_DEVICE }
-};
-#endif
-static int initialized = 0;
-static void __init _omap_map_io(void)
-{
-        initialized = 1;
-        /* We have to initialize the IO space mapping before we can run
-         * cpu_is_omapxxx() macros. */
-        iotable_init(omap_io_desc, ARRAY_SIZE(omap_io_desc));
-        omap_check_revision();
-#ifdef CONFIG_ARCH_OMAP730
-        if (cpu_is_omap730()) {
-                iotable_init(omap730_io_desc, ARRAY_SIZE(omap730_io_desc));
-        }
-#endif
-#ifdef CONFIG_ARCH_OMAP1510
-        if (cpu_is_omap1510()) {
-                iotable_init(omap1510_io_desc, ARRAY_SIZE(omap1510_io_desc));
-        }
-#endif
-#if defined(CONFIG_ARCH_OMAP16XX)
-        if (cpu_is_omap1610() || cpu_is_omap1710()) {
-                iotable_init(omap1610_io_desc, ARRAY_SIZE(omap1610_io_desc));
-        }
-        if (cpu_is_omap5912()) {
-                iotable_init(omap5912_io_desc, ARRAY_SIZE(omap5912_io_desc));
-        }
-#endif
-        /* REVISIT: Refer to OMAP5910 Errata, Advisory SYS_1: "Timeout Abort
-         * on a Posted Write in the TIPB Bridge".
-         */
-        omap_writew(0x0, MPU_PUBLIC_TIPB_CNTL);
-        omap_writew(0x0, MPU_PRIVATE_TIPB_CNTL);
-        /* Must init clocks early to assure that timer interrupt works
-         */
-        clk_init();
-}
-/*
- * This should only get called from board specific init
- */
-void omap_map_io(void)
-{
-        if (!initialized)
-                _omap_map_io();
-}
-static inline unsigned int omap_serial_in(struct plat_serial8250_port *up,
-                                          int offset)
-{
-        offset <<= up->regshift;
-        return (unsigned int)__raw_readb(up->membase + offset);
-}
-static inline void omap_serial_outp(struct plat_serial8250_port *p, int offset,
-                                    int value)
-{
-        offset <<= p->regshift;
-        __raw_writeb(value, p->membase + offset);
-}
-/*
- * Internal UARTs need to be initialized for the 8250 autoconfig to work
- * properly. Note that the TX watermark initialization may not be needed
- * once the 8250.c watermark handling code is merged.
- */
-static void __init omap_serial_reset(struct plat_serial8250_port *p)
-{
-        omap_serial_outp(p, UART_OMAP_MDR1, 0x07);      /* disable UART */
-        omap_serial_outp(p, UART_OMAP_SCR, 0x08);       /* TX watermark */
-        omap_serial_outp(p, UART_OMAP_MDR1, 0x00);      /* enable UART */
-        if (!cpu_is_omap1510()) {
-                omap_serial_outp(p, UART_OMAP_SYSC, 0x01);
-                while (!(omap_serial_in(p, UART_OMAP_SYSC) & 0x01));
-        }
-}
-static struct plat_serial8250_port serial_platform_data[] = {
-        {
-                .membase        = (char*)IO_ADDRESS(OMAP_UART1_BASE),
-                .mapbase        = (unsigned long)OMAP_UART1_BASE,
-                .irq            = INT_UART1,
-                .flags          = UPF_BOOT_AUTOCONF,
-                .iotype         = UPIO_MEM,
-                .regshift       = 2,
-                .uartclk        = OMAP16XX_BASE_BAUD * 16,
-        },
-        {
-                .membase        = (char*)IO_ADDRESS(OMAP_UART2_BASE),
-                .mapbase        = (unsigned long)OMAP_UART2_BASE,
-                .irq            = INT_UART2,
-                .flags          = UPF_BOOT_AUTOCONF,
-                .iotype         = UPIO_MEM,
-                .regshift       = 2,
-                .uartclk        = OMAP16XX_BASE_BAUD * 16,
-        },
-        {
-                .membase        = (char*)IO_ADDRESS(OMAP_UART3_BASE),
-                .mapbase        = (unsigned long)OMAP_UART3_BASE,
-                .irq            = INT_UART3,
-                .flags          = UPF_BOOT_AUTOCONF,
-                .iotype         = UPIO_MEM,
-                .regshift       = 2,
-                .uartclk        = OMAP16XX_BASE_BAUD * 16,
-        },
-        { },
-};
-static struct platform_device serial_device = {
-        .name                   = "serial8250",
-        .id                     = 0,
-        .dev                    = {
-                .platform_data  = serial_platform_data,
-        },
-};
-/*
- * Note that on Innovator-1510 UART2 pins conflict with USB2.
- * By default UART2 does not work on Innovator-1510 if you have
- * USB OHCI enabled. To use UART2, you must disable USB2 first.
- */
-void __init omap_serial_init(int ports[OMAP_MAX_NR_PORTS])
-{
-        int i;
-        if (cpu_is_omap730()) {
-                serial_platform_data[0].regshift = 0;
-                serial_platform_data[1].regshift = 0;
-                serial_platform_data[0].irq = INT_730_UART_MODEM_1;
-                serial_platform_data[1].irq = INT_730_UART_MODEM_IRDA_2;
-        }
-        if (cpu_is_omap1510()) {
-                serial_platform_data[0].uartclk = OMAP1510_BASE_BAUD * 16;
-                serial_platform_data[1].uartclk = OMAP1510_BASE_BAUD * 16;
-                serial_platform_data[2].uartclk = OMAP1510_BASE_BAUD * 16;
-        }
-        for (i = 0; i < OMAP_MAX_NR_PORTS; i++) {
-                unsigned char reg;
-                if (ports[i] == 0) {
-                        serial_platform_data[i].membase = 0;
-                        serial_platform_data[i].mapbase = 0;
-                        continue;
-                }
-                switch (i) {
-                case 0:
-                        if (cpu_is_omap1510()) {
-                                omap_cfg_reg(UART1_TX);
-                                omap_cfg_reg(UART1_RTS);
-                                if (machine_is_omap_innovator()) {
-                                        reg = fpga_read(OMAP1510_FPGA_POWER);
-                                        reg |= OMAP1510_FPGA_PCR_COM1_EN;
-                                        fpga_write(reg, OMAP1510_FPGA_POWER);
-                                        udelay(10);
-                                }
-                        }
-                        break;
-                case 1:
-                        if (cpu_is_omap1510()) {
-                                omap_cfg_reg(UART2_TX);
-                                omap_cfg_reg(UART2_RTS);
-                                if (machine_is_omap_innovator()) {
-                                        reg = fpga_read(OMAP1510_FPGA_POWER);
-                                        reg |= OMAP1510_FPGA_PCR_COM2_EN;
-                                        fpga_write(reg, OMAP1510_FPGA_POWER);
-                                        udelay(10);
-                                }
-                        }
-                        break;
-                case 2:
-                        if (cpu_is_omap1510()) {
-                                omap_cfg_reg(UART3_TX);
-                                omap_cfg_reg(UART3_RX);
-                        }
-                        if (cpu_is_omap1710()) {
-                                clk_enable(clk_get(0, "uart3_ck"));
-                        }
-                        break;
-                }
-                omap_serial_reset(&serial_platform_data[i]);
-        }
-}
-static int __init omap_init(void)
-{
-        return platform_device_register(&serial_device);
-}
-arch_initcall(omap_init);
-#define NO_LENGTH_CHECK 0xffffffff
-extern int omap_bootloader_tag_len;
-extern u8 omap_bootloader_tag[];
-struct omap_board_config_kernel *omap_board_config;
-int omap_board_config_size = 0;
-static const void *get_config(u16 tag, size_t len, int skip, size_t *len_out)
-{
-        struct omap_board_config_kernel *kinfo = NULL;
-        int i;
-#ifdef CONFIG_OMAP_BOOT_TAG
-        struct omap_board_config_entry *info = NULL;
-        if (omap_bootloader_tag_len > 4)
-                info = (struct omap_board_config_entry *) omap_bootloader_tag;
-        while (info != NULL) {
-                u8 *next;
-                if (info->tag == tag) {
-                        if (skip == 0)
-                                break;
-                        skip--;
-                }
-                if ((info->len & 0x03) != 0) {
-                        /* We bail out to avoid an alignment fault */
-                        printk(KERN_ERR "OMAP peripheral config: Length (%d) not word-aligned (tag %04x)\n",
-                               info->len, info->tag);
-                        return NULL;
-                }
-                next = (u8 *) info + sizeof(*info) + info->len;
-                if (next >= omap_bootloader_tag + omap_bootloader_tag_len)
-                        info = NULL;
-                else
-                        info = (struct omap_board_config_entry *) next;
-        }
-        if (info != NULL) {
-                /* Check the length as a lame attempt to check for
-                 * binary inconsistancy. */
-                if (len != NO_LENGTH_CHECK) {
-                        /* Word-align len */
-                        if (len & 0x03)
-                                len = (len + 3) & ~0x03;
-                        if (info->len != len) {
-                                printk(KERN_ERR "OMAP peripheral config: Length mismatch with tag %x (want %d, got %d)\n",
-                                       tag, len, info->len);
-                                return NULL;
-                        }
-                }
-                if (len_out != NULL)
-                        *len_out = info->len;
-                return info->data;
-        }
-#endif
-        /* Try to find the config from the board-specific structures
-         * in the kernel. */
-        for (i = 0; i < omap_board_config_size; i++) {
-                if (omap_board_config[i].tag == tag) {
-                        kinfo = &omap_board_config[i];
-                        break;
-                }
-        }
-        if (kinfo == NULL)
-                return NULL;
-        return kinfo->data;
-}
-const void *__omap_get_config(u16 tag, size_t len, int nr)
-{
-        return get_config(tag, len, nr, NULL);
-}
-EXPORT_SYMBOL(__omap_get_config);
-const void *omap_get_var_config(u16 tag, size_t *len)
-{
-        return get_config(tag, NO_LENGTH_CHECK, 0, len);
-}
-EXPORT_SYMBOL(omap_get_var_config);
-static int __init omap_add_serial_console(void)
-{
-        const struct omap_uart_config *info;
-        info = omap_get_config(OMAP_TAG_UART, struct omap_uart_config);
-        if (info != NULL && info->console_uart) {
-                static char speed[11], *opt = NULL;
-                if (info->console_speed) {
-                        snprintf(speed, sizeof(speed), "%u", info->console_speed);
-                        opt = speed;
-                }
-                return add_preferred_console("ttyS", info->console_uart - 1, opt);
-        }
-        return 0;
-}
-console_initcall(omap_add_serial_console);
diff --git a/arch/arm/mach-omap1/Kconfig b/arch/arm/mach-omap1/Kconfig
new file mode 100644
index 000000000000..7408ac94f771
--- /dev/null
+++ b/arch/arm/mach-omap1/Kconfig
@@ -0,0 +1,144 @@
+comment "OMAP Core Type"
+        depends on ARCH_OMAP1
+config ARCH_OMAP730
+        depends on ARCH_OMAP1
+        bool "OMAP730 Based System"
+        select ARCH_OMAP_OTG
+config ARCH_OMAP1510
+        depends on ARCH_OMAP1
+        default y
+        bool "OMAP1510 Based System"
+config ARCH_OMAP16XX
+        depends on ARCH_OMAP1
+        bool "OMAP16xx Based System"
+        select ARCH_OMAP_OTG
+comment "OMAP Board Type"
+        depends on ARCH_OMAP1
+config MACH_OMAP_INNOVATOR
+        bool "TI Innovator"
+        depends on ARCH_OMAP1 && (ARCH_OMAP1510 || ARCH_OMAP16XX)
+        help
+          TI OMAP 1510 or 1610 Innovator board support. Say Y here if you
+          have such a board.
+config MACH_OMAP_H2
+        bool "TI H2 Support"
+        depends on ARCH_OMAP1 && ARCH_OMAP16XX
+        help
+          TI OMAP 1610/1611B H2 board support. Say Y here if you have such
+          a board.
+config MACH_OMAP_H3
+        bool "TI H3 Support"
+        depends on ARCH_OMAP1 && ARCH_OMAP16XX
+        help
+          TI OMAP 1710 H3 board support. Say Y here if you have such
+          a board.
+config MACH_OMAP_OSK
+        bool "TI OSK Support"
+        depends on ARCH_OMAP1 && ARCH_OMAP16XX
+        help
+          TI OMAP 5912 OSK (OMAP Starter Kit) board support. Say Y here
+          if you have such a board.
+config MACH_OMAP_PERSEUS2
+        bool "TI Perseus2"
+        depends on ARCH_OMAP1 && ARCH_OMAP730
+        help
+          Support for TI OMAP 730 Perseus2 board. Say Y here if you have such
+          a board.
+config MACH_VOICEBLUE
+        bool "Voiceblue"
+        depends on ARCH_OMAP1 && ARCH_OMAP1510
+        help
+          Support for Voiceblue GSM/VoIP gateway. Say Y here if you have
+          such a board.
+config MACH_NETSTAR
+        bool "NetStar"
+        depends on ARCH_OMAP1 && ARCH_OMAP1510
+        help
+          Support for NetStar PBX. Say Y here if you have such a board.
+config MACH_OMAP_GENERIC
+        bool "Generic OMAP board"
+        depends on ARCH_OMAP1 && (ARCH_OMAP1510 || ARCH_OMAP16XX)
+        help
+          Support for generic OMAP-1510, 1610 or 1710 board with
+          no FPGA. Can be used as template for porting Linux to
+          custom OMAP boards. Say Y here if you have a custom
+          board.
+comment "OMAP CPU Speed"
+        depends on ARCH_OMAP1
+config OMAP_CLOCKS_SET_BY_BOOTLOADER
+        bool "OMAP clocks set by bootloader"
+        depends on ARCH_OMAP1
+        help
+          Enable this option to prevent the kernel from overriding the clock
+          frequencies programmed by bootloader for MPU, DSP, MMUs, TC,
+          internal LCD controller and MPU peripherals.
+config OMAP_ARM_216MHZ
+        bool "OMAP ARM 216 MHz CPU (1710 only)"
+        depends on ARCH_OMAP1 && ARCH_OMAP16XX
+        help
+          Enable 216 MHz clock for OMAP1710 CPU. If unsure, say N.
+config OMAP_ARM_195MHZ
+        bool "OMAP ARM 195 MHz CPU"
+        depends on ARCH_OMAP1 && ARCH_OMAP730
+        help
+          Enable 195MHz clock for OMAP CPU. If unsure, say N.
+config OMAP_ARM_192MHZ
+        bool "OMAP ARM 192 MHz CPU"
+        depends on ARCH_OMAP1 && ARCH_OMAP16XX
+        help
+          Enable 192MHz clock for OMAP CPU. If unsure, say N.
+config OMAP_ARM_182MHZ
+        bool "OMAP ARM 182 MHz CPU"
+        depends on ARCH_OMAP1 && ARCH_OMAP730
+        help
+          Enable 182MHz clock for OMAP CPU. If unsure, say N.
+config OMAP_ARM_168MHZ
+        bool "OMAP ARM 168 MHz CPU"
+        depends on ARCH_OMAP1 && (ARCH_OMAP1510 || ARCH_OMAP16XX || ARCH_OMAP730)
+        help
+          Enable 168MHz clock for OMAP CPU. If unsure, say N.
+config OMAP_ARM_150MHZ
+        bool "OMAP ARM 150 MHz CPU"
+        depends on ARCH_OMAP1 && ARCH_OMAP1510
+        help
+          Enable 150MHz clock for OMAP CPU. If unsure, say N.
+config OMAP_ARM_120MHZ
+        bool "OMAP ARM 120 MHz CPU"
+        depends on ARCH_OMAP1 && (ARCH_OMAP1510 || ARCH_OMAP16XX || ARCH_OMAP730)
+        help
+          Enable 120MHz clock for OMAP CPU. If unsure, say N.
+config OMAP_ARM_60MHZ
+        bool "OMAP ARM 60 MHz CPU"
+        depends on ARCH_OMAP1 && (ARCH_OMAP1510 || ARCH_OMAP16XX || ARCH_OMAP730)
+        default y
+        help
+          Enable 60MHz clock for OMAP CPU. If unsure, say Y.
+config OMAP_ARM_30MHZ
+        bool "OMAP ARM 30 MHz CPU"
+        depends on ARCH_OMAP1 && (ARCH_OMAP1510 || ARCH_OMAP16XX || ARCH_OMAP730)
+        help
+          Enable 30MHz clock for OMAP CPU. If unsure, say N.
diff --git a/arch/arm/mach-omap1/Makefile b/arch/arm/mach-omap1/Makefile
new file mode 100644
index 000000000000..d386fd913f0c
--- /dev/null
+++ b/arch/arm/mach-omap1/Makefile
@@ -0,0 +1,30 @@
+#
+# Makefile for the linux kernel.
+#
+# Common support
+obj-y := io.o id.o irq.o time.o serial.o
+led-y := leds.o
+# Specific board support
+obj-$(CONFIG_MACH_OMAP_H2)              += board-h2.o
+obj-$(CONFIG_MACH_OMAP_INNOVATOR)       += board-innovator.o
+obj-$(CONFIG_MACH_OMAP_GENERIC)         += board-generic.o
+obj-$(CONFIG_MACH_OMAP_PERSEUS2)        += board-perseus2.o
+obj-$(CONFIG_MACH_OMAP_OSK)             += board-osk.o
+obj-$(CONFIG_MACH_OMAP_H3)              += board-h3.o
+obj-$(CONFIG_MACH_VOICEBLUE)            += board-voiceblue.o
+obj-$(CONFIG_MACH_NETSTAR)              += board-netstar.o
+ifeq ($(CONFIG_ARCH_OMAP1510),y)
+# Innovator-1510 FPGA
+obj-$(CONFIG_MACH_OMAP_INNOVATOR)       += fpga.o
+endif
+# LEDs support
+led-$(CONFIG_MACH_OMAP_H2)              += leds-h2p2-debug.o
+led-$(CONFIG_MACH_OMAP_INNOVATOR)       += leds-innovator.o
+led-$(CONFIG_MACH_OMAP_PERSEUS2)        += leds-h2p2-debug.o
+led-$(CONFIG_MACH_OMAP_OSK)             += leds-osk.o
+obj-$(CONFIG_LEDS)                      += $(led-y)
diff --git a/arch/arm/mach-omap/Makefile.boot b/arch/arm/mach-omap1/Makefile.boot
index fee1a6a15b54..292d56c5a888 100644
--- a/arch/arm/mach-omap/Makefile.boot
+++ b/arch/arm/mach-omap1/Makefile.boot
@@ -1,4 +1,3 @@
   zreladdr-y           := 0x10008000
 params_phys-y           := 0x10000100
 initrd_phys-y           := 0x10800000
diff --git a/arch/arm/mach-omap/board-generic.c b/arch/arm/mach-omap1/board-generic.c
index 384bc7cec1db..122796ebe8f5 100644
--- a/arch/arm/mach-omap/board-generic.c
+++ b/arch/arm/mach-omap1/board-generic.c
@@ -1,5 +1,5 @@
 /*
- * linux/arch/arm/mach-omap/board-generic.c
+ * linux/arch/arm/mach-omap1/board-generic.c
 *
 * Modified from board-innovator1510.c
 *
@@ -26,8 +26,7 @@
 #include <asm/arch/mux.h>
 #include <asm/arch/usb.h>
 #include <asm/arch/board.h>
+#include <asm/arch/common.h>
-#include "common.h"
 static int __initdata generic_serial_ports[OMAP_MAX_NR_PORTS] = {1, 1, 1};
@@ -84,7 +83,7 @@ static void __init omap_generic_init(void)
 static void __init omap_generic_map_io(void)
 {
-        omap_map_io();
+        omap_map_common_io()
 }
 MACHINE_START(OMAP_GENERIC, "Generic OMAP1510/1610/1710")
diff --git a/arch/arm/mach-omap/board-h2.c b/arch/arm/mach-omap1/board-h2.c
index f37c76a9b163..f4983ee95ab4 100644
--- a/arch/arm/mach-omap/board-h2.c
+++ b/arch/arm/mach-omap1/board-h2.c
@@ -1,5 +1,5 @@
 /*
- * linux/arch/arm/mach-omap/board-h2.c
+ * linux/arch/arm/mach-omap1/board-h2.c
 *
 * Board specific inits for OMAP-1610 H2
 *
@@ -35,8 +35,7 @@
 #include <asm/arch/gpio.h>
 #include <asm/arch/tc.h>
 #include <asm/arch/usb.h>
+#include <asm/arch/common.h>
-#include "common.h"
 extern int omap_gpio_init(void);
@@ -172,7 +171,7 @@ static void __init h2_init(void)
 static void __init h2_map_io(void)
 {
-        omap_map_io();
+        omap_map_common_io();
        omap_serial_init(h2_serial_ports);
 }
diff --git a/arch/arm/mach-omap/board-h3.c b/arch/arm/mach-omap1/board-h3.c
index 705e48594e9a..7cd419d61b40 100644
--- a/arch/arm/mach-omap/board-h3.c
+++ b/arch/arm/mach-omap1/board-h3.c
@@ -1,5 +1,5 @@
 /*
- * linux/arch/arm/mach-omap/board-h3.c
+ * linux/arch/arm/mach-omap1/board-h3.c
 *
 * This file contains OMAP1710 H3 specific code.
 *
@@ -37,8 +37,7 @@
 #include <asm/arch/mux.h>
 #include <asm/arch/tc.h>
 #include <asm/arch/usb.h>
+#include <asm/arch/common.h>
-#include "common.h"
 extern int omap_gpio_init(void);
@@ -190,7 +189,7 @@ void h3_init_irq(void)
 static void __init h3_map_io(void)
 {
-        omap_map_io();
+        omap_map_common_io();
        omap_serial_init(h3_serial_ports);
 }
diff --git a/arch/arm/mach-omap/board-innovator.c b/arch/arm/mach-omap1/board-innovator.c
index 523363f18cc0..91de60a91ef8 100644
--- a/arch/arm/mach-omap/board-innovator.c
+++ b/arch/arm/mach-omap1/board-innovator.c
@@ -1,5 +1,5 @@
 /*
- * linux/arch/arm/mach-omap/board-innovator.c
+ * linux/arch/arm/mach-omap1/board-innovator.c
 *
 * Board specific inits for OMAP-1510 and OMAP-1610 Innovator
 *
@@ -33,8 +33,7 @@
 #include <asm/arch/gpio.h>
 #include <asm/arch/tc.h>
 #include <asm/arch/usb.h>
+#include <asm/arch/common.h>
-#include "common.h"
 static int __initdata innovator_serial_ports[OMAP_MAX_NR_PORTS] = {1, 1, 1};
@@ -252,7 +251,7 @@ static void __init innovator_init(void)
 static void __init innovator_map_io(void)
 {
-        omap_map_io();
+        omap_map_common_io();
 #ifdef CONFIG_ARCH_OMAP1510
        if (cpu_is_omap1510()) {
diff --git a/arch/arm/mach-omap/board-netstar.c b/arch/arm/mach-omap1/board-netstar.c
index 8c653734d5a3..6750b2014092 100644
--- a/arch/arm/mach-omap/board-netstar.c
+++ b/arch/arm/mach-omap1/board-netstar.c
@@ -26,8 +26,7 @@
 #include <asm/arch/gpio.h>
 #include <asm/arch/mux.h>
 #include <asm/arch/usb.h>
+#include <asm/arch/common.h>
-#include "common.h"
 extern void __init omap_init_time(void);
 extern int omap_gpio_init(void);
@@ -100,7 +99,7 @@ static int __initdata omap_serial_ports[OMAP_MAX_NR_PORTS] = {1, 1, 1};
 static void __init netstar_map_io(void)
 {
-        omap_map_io();
+        omap_map_common_io();
        omap_serial_init(omap_serial_ports);
 }
diff --git a/arch/arm/mach-omap/board-osk.c b/arch/arm/mach-omap1/board-osk.c
index cb433436aa08..6844e536c698 100644
--- a/arch/arm/mach-omap/board-osk.c
+++ b/arch/arm/mach-omap1/board-osk.c
@@ -1,5 +1,5 @@
 /*
- * linux/arch/arm/mach-omap/board-osk.c
+ * linux/arch/arm/mach-omap1/board-osk.c
 *
 * Board specific init for OMAP5912 OSK
 *
@@ -39,8 +39,7 @@
 #include <asm/arch/usb.h>
 #include <asm/arch/mux.h>
 #include <asm/arch/tc.h>
+#include <asm/arch/common.h>
-#include "common.h"
 static struct map_desc osk5912_io_desc[] __initdata = {
 { OMAP_OSK_NOR_FLASH_BASE, OMAP_OSK_NOR_FLASH_START, OMAP_OSK_NOR_FLASH_SIZE,
@@ -153,7 +152,7 @@ static void __init osk_init(void)
 static void __init osk_map_io(void)
 {
-        omap_map_io();
+        omap_map_common_io();
        iotable_init(osk5912_io_desc, ARRAY_SIZE(osk5912_io_desc));
        omap_serial_init(osk_serial_ports);
 }
diff --git a/arch/arm/mach-omap/board-perseus2.c b/arch/arm/mach-omap1/board-perseus2.c
index d5342043d48f..213317392d9b 100644
--- a/arch/arm/mach-omap/board-perseus2.c
+++ b/arch/arm/mach-omap1/board-perseus2.c
@@ -1,5 +1,5 @@
 /*
- * linux/arch/arm/mach-omap/board-perseus2.c
+ * linux/arch/arm/mach-omap1/board-perseus2.c
 *
 * Modified from board-generic.c
 *
@@ -27,8 +27,7 @@
 #include <asm/arch/gpio.h>
 #include <asm/arch/mux.h>
 #include <asm/arch/fpga.h>
+#include <asm/arch/common.h>
-#include "common.h"
 static struct resource smc91x_resources[] = {
        [0] = {
@@ -140,7 +139,7 @@ static struct map_desc omap_perseus2_io_desc[] __initdata = {
 static void __init omap_perseus2_map_io(void)
 {
-        omap_map_io();
+        omap_map_common_io();
        iotable_init(omap_perseus2_io_desc,
                     ARRAY_SIZE(omap_perseus2_io_desc));
diff --git a/arch/arm/mach-omap/board-voiceblue.c b/arch/arm/mach-omap1/board-voiceblue.c
index 6b0c5003d719..e42281988990 100644
--- a/arch/arm/mach-omap/board-voiceblue.c
+++ b/arch/arm/mach-omap1/board-voiceblue.c
@@ -1,5 +1,5 @@
 /*
- * linux/arch/arm/mach-omap/board-voiceblue.c
+ * linux/arch/arm/mach-omap1/board-voiceblue.c
 *
 * Modified from board-generic.c
 *
@@ -31,8 +31,7 @@
 #include <asm/arch/tc.h>
 #include <asm/arch/mux.h>
 #include <asm/arch/usb.h>
+#include <asm/arch/common.h>
-#include "common.h"
 extern void omap_init_time(void);
 extern int omap_gpio_init(void);
@@ -170,7 +169,7 @@ static int __initdata omap_serial_ports[OMAP_MAX_NR_PORTS] = {1, 1, 1};
 static void __init voiceblue_map_io(void)
 {
-        omap_map_io();
+        omap_map_common_io();
        omap_serial_init(omap_serial_ports);
 }
diff --git a/arch/arm/mach-omap/fpga.c b/arch/arm/mach-omap1/fpga.c
index 7c08f6c2e1d0..7c08f6c2e1d0 100644
--- a/arch/arm/mach-omap/fpga.c
+++ b/arch/arm/mach-omap1/fpga.c
diff --git a/arch/arm/mach-omap1/id.c b/arch/arm/mach-omap1/id.c
new file mode 100644
index 000000000000..986c3b7e09bb
--- /dev/null
+++ b/arch/arm/mach-omap1/id.c
@@ -0,0 +1,188 @@
+/*
+ * linux/arch/arm/mach-omap1/id.c
+ *
+ * OMAP1 CPU identification code
+ *
+ * Copyright (C) 2004 Nokia Corporation
+ * Written by Tony Lindgren <tony@atomide.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#include <linux/config.h>
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <asm/io.h>
+struct omap_id {
+        u16     jtag_id;        /* Used to determine OMAP type */
+        u8      die_rev;        /* Processor revision */
+        u32     omap_id;        /* OMAP revision */
+        u32     type;           /* Cpu id bits [31:08], cpu class bits [07:00] */
+};
+/* Register values to detect the OMAP version */
+static struct omap_id omap_ids[] __initdata = {
+        { .jtag_id = 0x355f, .die_rev = 0x0, .omap_id = 0x03320000, .type = 0x07300100},
+        { .jtag_id = 0xb55f, .die_rev = 0x0, .omap_id = 0x03320000, .type = 0x07300300},
+        { .jtag_id = 0xb470, .die_rev = 0x0, .omap_id = 0x03310100, .type = 0x15100000},
+        { .jtag_id = 0xb576, .die_rev = 0x0, .omap_id = 0x03320000, .type = 0x16100000},
+        { .jtag_id = 0xb576, .die_rev = 0x2, .omap_id = 0x03320100, .type = 0x16110000},
+        { .jtag_id = 0xb576, .die_rev = 0x3, .omap_id = 0x03320100, .type = 0x16100c00},
+        { .jtag_id = 0xb576, .die_rev = 0x0, .omap_id = 0x03320200, .type = 0x16100d00},
+        { .jtag_id = 0xb613, .die_rev = 0x0, .omap_id = 0x03320300, .type = 0x1610ef00},
+        { .jtag_id = 0xb613, .die_rev = 0x0, .omap_id = 0x03320300, .type = 0x1610ef00},
+        { .jtag_id = 0xb576, .die_rev = 0x1, .omap_id = 0x03320100, .type = 0x16110000},
+        { .jtag_id = 0xb58c, .die_rev = 0x2, .omap_id = 0x03320200, .type = 0x16110b00},
+        { .jtag_id = 0xb58c, .die_rev = 0x3, .omap_id = 0x03320200, .type = 0x16110c00},
+        { .jtag_id = 0xb65f, .die_rev = 0x0, .omap_id = 0x03320400, .type = 0x16212300},
+        { .jtag_id = 0xb65f, .die_rev = 0x1, .omap_id = 0x03320400, .type = 0x16212300},
+        { .jtag_id = 0xb65f, .die_rev = 0x1, .omap_id = 0x03320500, .type = 0x16212300},
+        { .jtag_id = 0xb5f7, .die_rev = 0x0, .omap_id = 0x03330000, .type = 0x17100000},
+        { .jtag_id = 0xb5f7, .die_rev = 0x1, .omap_id = 0x03330100, .type = 0x17100000},
+        { .jtag_id = 0xb5f7, .die_rev = 0x2, .omap_id = 0x03330100, .type = 0x17100000},
+};
+/*
+ * Get OMAP type from PROD_ID.
+ * 1710 has the PROD_ID in bits 15:00, not in 16:01 as documented in TRM.
+ * 1510 PROD_ID is empty, and 1610 PROD_ID does not make sense.
+ * Undocumented register in TEST BLOCK is used as fallback; This seems to
+ * work on 1510, 1610 & 1710. The official way hopefully will work in future
+ * processors.
+ */
+static u16 __init omap_get_jtag_id(void)
+{
+        u32 prod_id, omap_id;
+        prod_id = omap_readl(OMAP_PRODUCTION_ID_1);
+        omap_id = omap_readl(OMAP32_ID_1);
+        /* Check for unusable OMAP_PRODUCTION_ID_1 on 1611B/5912 and 730 */
+        if (((prod_id >> 20) == 0) || (prod_id == omap_id))
+                prod_id = 0;
+        else
+                prod_id &= 0xffff;
+        if (prod_id)
+                return prod_id;
+        /* Use OMAP32_ID_1 as fallback */
+        prod_id = ((omap_id >> 12) & 0xffff);
+        return prod_id;
+}
+/*
+ * Get OMAP revision from DIE_REV.
+ * Early 1710 processors may have broken OMAP_DIE_ID, it contains PROD_ID.
+ * Undocumented register in the TEST BLOCK is used as fallback.
+ * REVISIT: This does not seem to work on 1510
+ */
+static u8 __init omap_get_die_rev(void)
+{
+        u32 die_rev;
+        die_rev = omap_readl(OMAP_DIE_ID_1);
+        /* Check for broken OMAP_DIE_ID on early 1710 */
+        if (((die_rev >> 12) & 0xffff) == omap_get_jtag_id())
+                die_rev = 0;
+        die_rev = (die_rev >> 17) & 0xf;
+        if (die_rev)
+                return die_rev;
+        die_rev = (omap_readl(OMAP32_ID_1) >> 28) & 0xf;
+        return die_rev;
+}
+void __init omap_check_revision(void)
+{
+        int i;
+        u16 jtag_id;
+        u8 die_rev;
+        u32 omap_id;
+        u8 cpu_type;
+        jtag_id = omap_get_jtag_id();
+        die_rev = omap_get_die_rev();
+        omap_id = omap_readl(OMAP32_ID_0);
+#ifdef DEBUG
+        printk("OMAP_DIE_ID_0: 0x%08x\n", omap_readl(OMAP_DIE_ID_0));
+        printk("OMAP_DIE_ID_1: 0x%08x DIE_REV: %i\n",
+                omap_readl(OMAP_DIE_ID_1),
+               (omap_readl(OMAP_DIE_ID_1) >> 17) & 0xf);
+        printk("OMAP_PRODUCTION_ID_0: 0x%08x\n", omap_readl(OMAP_PRODUCTION_ID_0));
+        printk("OMAP_PRODUCTION_ID_1: 0x%08x JTAG_ID: 0x%04x\n",
+                omap_readl(OMAP_PRODUCTION_ID_1),
+                omap_readl(OMAP_PRODUCTION_ID_1) & 0xffff);
+        printk("OMAP32_ID_0: 0x%08x\n", omap_readl(OMAP32_ID_0));
+        printk("OMAP32_ID_1: 0x%08x\n", omap_readl(OMAP32_ID_1));
+        printk("JTAG_ID: 0x%04x DIE_REV: %i\n", jtag_id, die_rev);
+#endif
+        system_serial_high = omap_readl(OMAP_DIE_ID_0);
+        system_serial_low = omap_readl(OMAP_DIE_ID_1);
+        /* First check only the major version in a safe way */
+        for (i = 0; i < ARRAY_SIZE(omap_ids); i++) {
+                if (jtag_id == (omap_ids[i].jtag_id)) {
+                        system_rev = omap_ids[i].type;
+                        break;
+                }
+        }
+        /* Check if we can find the die revision */
+        for (i = 0; i < ARRAY_SIZE(omap_ids); i++) {
+                if (jtag_id == omap_ids[i].jtag_id && die_rev == omap_ids[i].die_rev) {
+                        system_rev = omap_ids[i].type;
+                        break;
+                }
+        }
+        /* Finally check also the omap_id */
+        for (i = 0; i < ARRAY_SIZE(omap_ids); i++) {
+                if (jtag_id == omap_ids[i].jtag_id
+                    && die_rev == omap_ids[i].die_rev
+                    && omap_id == omap_ids[i].omap_id) {
+                        system_rev = omap_ids[i].type;
+                        break;
+                }
+        }
+        /* Add the cpu class info (7xx, 15xx, 16xx, 24xx) */
+        cpu_type = system_rev >> 24;
+        switch (cpu_type) {
+        case 0x07:
+                system_rev |= 0x07;
+                break;
+        case 0x15:
+                system_rev |= 0x15;
+                break;
+        case 0x16:
+        case 0x17:
+                system_rev |= 0x16;
+                break;
+        case 0x24:
+                system_rev |= 0x24;
+                break;
+        default:
+                printk("Unknown OMAP cpu type: 0x%02x\n", cpu_type);
+        }
+        printk("OMAP%04x", system_rev >> 16);
+        if ((system_rev >> 8) & 0xff)
+                printk("%x", (system_rev >> 8) & 0xff);
+        printk(" revision %i handled as %02xxx id: %08x%08x\n",
+               die_rev, system_rev & 0xff, system_serial_low,
+               system_serial_high);
+}
diff --git a/arch/arm/mach-omap1/io.c b/arch/arm/mach-omap1/io.c
new file mode 100644
index 000000000000..207df0fe934d
--- /dev/null
+++ b/arch/arm/mach-omap1/io.c
@@ -0,0 +1,115 @@
+/*
+ * linux/arch/arm/mach-omap1/io.c
+ *
+ * OMAP1 I/O mapping code
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#include <linux/config.h>
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <asm/mach/map.h>
+#include <asm/io.h>
+#include <asm/arch/tc.h>
+extern int clk_init(void);
+extern void omap_check_revision(void);
+/*
+ * The machine specific code may provide the extra mapping besides the
+ * default mapping provided here.
+ */
+static struct map_desc omap_io_desc[] __initdata = {
+ { IO_VIRT,             IO_PHYS,             IO_SIZE,              MT_DEVICE },
+};
+#ifdef CONFIG_ARCH_OMAP730
+static struct map_desc omap730_io_desc[] __initdata = {
+ { OMAP730_DSP_BASE,    OMAP730_DSP_START,    OMAP730_DSP_SIZE,    MT_DEVICE },
+ { OMAP730_DSPREG_BASE, OMAP730_DSPREG_START, OMAP730_DSPREG_SIZE, MT_DEVICE },
+ { OMAP730_SRAM_BASE,   OMAP730_SRAM_START,   OMAP730_SRAM_SIZE,   MT_DEVICE }
+};
+#endif
+#ifdef CONFIG_ARCH_OMAP1510
+static struct map_desc omap1510_io_desc[] __initdata = {
+ { OMAP1510_DSP_BASE,    OMAP1510_DSP_START,    OMAP1510_DSP_SIZE,    MT_DEVICE },
+ { OMAP1510_DSPREG_BASE, OMAP1510_DSPREG_START, OMAP1510_DSPREG_SIZE, MT_DEVICE },
+ { OMAP1510_SRAM_BASE,   OMAP1510_SRAM_START,   OMAP1510_SRAM_SIZE,   MT_DEVICE }
+};
+#endif
+#if defined(CONFIG_ARCH_OMAP16XX)
+static struct map_desc omap1610_io_desc[] __initdata = {
+ { OMAP16XX_DSP_BASE,    OMAP16XX_DSP_START,    OMAP16XX_DSP_SIZE,    MT_DEVICE },
+ { OMAP16XX_DSPREG_BASE, OMAP16XX_DSPREG_START, OMAP16XX_DSPREG_SIZE, MT_DEVICE },
+ { OMAP16XX_SRAM_BASE,   OMAP16XX_SRAM_START,   OMAP1610_SRAM_SIZE,   MT_DEVICE }
+};
+static struct map_desc omap5912_io_desc[] __initdata = {
+ { OMAP16XX_DSP_BASE,    OMAP16XX_DSP_START,    OMAP16XX_DSP_SIZE,    MT_DEVICE },
+ { OMAP16XX_DSPREG_BASE, OMAP16XX_DSPREG_START, OMAP16XX_DSPREG_SIZE, MT_DEVICE },
+/*
+ * The OMAP5912 has 250kByte internal SRAM. Because the mapping is baseed on page
+ * size (4kByte), it seems that the last 2kByte (=0x800) of the 250kByte are not mapped.
+ * Add additional 2kByte (0x800) so that the last page is mapped and the last 2kByte
+ * can be used.
+ */
+ { OMAP16XX_SRAM_BASE,   OMAP16XX_SRAM_START,   OMAP5912_SRAM_SIZE + 0x800,   MT_DEVICE }
+};
+#endif
+static int initialized = 0;
+static void __init _omap_map_io(void)
+{
+        initialized = 1;
+        /* We have to initialize the IO space mapping before we can run
+         * cpu_is_omapxxx() macros. */
+        iotable_init(omap_io_desc, ARRAY_SIZE(omap_io_desc));
+        omap_check_revision();
+#ifdef CONFIG_ARCH_OMAP730
+        if (cpu_is_omap730()) {
+                iotable_init(omap730_io_desc, ARRAY_SIZE(omap730_io_desc));
+        }
+#endif
+#ifdef CONFIG_ARCH_OMAP1510
+        if (cpu_is_omap1510()) {
+                iotable_init(omap1510_io_desc, ARRAY_SIZE(omap1510_io_desc));
+        }
+#endif
+#if defined(CONFIG_ARCH_OMAP16XX)
+        if (cpu_is_omap1610() || cpu_is_omap1710()) {
+                iotable_init(omap1610_io_desc, ARRAY_SIZE(omap1610_io_desc));
+        }
+        if (cpu_is_omap5912()) {
+                iotable_init(omap5912_io_desc, ARRAY_SIZE(omap5912_io_desc));
+        }
+#endif
+        /* REVISIT: Refer to OMAP5910 Errata, Advisory SYS_1: "Timeout Abort
+         * on a Posted Write in the TIPB Bridge".
+         */
+        omap_writew(0x0, MPU_PUBLIC_TIPB_CNTL);
+        omap_writew(0x0, MPU_PRIVATE_TIPB_CNTL);
+        /* Must init clocks early to assure that timer interrupt works
+         */
+        clk_init();
+}
+/*
+ * This should only get called from board specific init
+ */
+void omap_map_common_io(void)
+{
+        if (!initialized)
+                _omap_map_io();
+}
diff --git a/arch/arm/mach-omap/irq.c b/arch/arm/mach-omap1/irq.c
index f01c99266a86..a11b6d807352 100644
--- a/arch/arm/mach-omap/irq.c
+++ b/arch/arm/mach-omap1/irq.c
@@ -56,6 +56,7 @@
 struct omap_irq_bank {
        unsigned long base_reg;
        unsigned long trigger_map;
+        unsigned long wake_enable;
 };
 static unsigned int irq_bank_count = 0;
@@ -105,6 +106,19 @@ static void omap_mask_ack_irq(unsigned int irq)
        omap_ack_irq(irq);
 }
+static int omap_wake_irq(unsigned int irq, unsigned int enable)
+{
+        int bank = IRQ_BANK(irq);
+        if (enable)
+                irq_banks[bank].wake_enable |= IRQ_BIT(irq);
+        else
+                irq_banks[bank].wake_enable &= ~IRQ_BIT(irq);
+        return 0;
+}
 /*
 * Allows tuning the IRQ type and priority
 *
@@ -145,7 +159,7 @@ static struct omap_irq_bank omap1510_irq_banks[] = {
 static struct omap_irq_bank omap1610_irq_banks[] = {
        { .base_reg = OMAP_IH1_BASE,            .trigger_map = 0xb3fefe8f },
        { .base_reg = OMAP_IH2_BASE,            .trigger_map = 0xfdb7c1fd },
-        { .base_reg = OMAP_IH2_BASE + 0x100,    .trigger_map = 0xfffff7ff },
+        { .base_reg = OMAP_IH2_BASE + 0x100,    .trigger_map = 0xffffb7ff },
        { .base_reg = OMAP_IH2_BASE + 0x200,    .trigger_map = 0xffffffff },
 };
 #endif
@@ -154,6 +168,7 @@ static struct irqchip omap_irq_chip = {
        .ack    = omap_mask_ack_irq,
        .mask   = omap_mask_irq,
        .unmask = omap_unmask_irq,
+        .wake   = omap_wake_irq,
 };
 void __init omap_init_irq(void)
diff --git a/arch/arm/mach-omap/leds-h2p2-debug.c b/arch/arm/mach-omap1/leds-h2p2-debug.c
index 6e98290cca5c..6e98290cca5c 100644
--- a/arch/arm/mach-omap/leds-h2p2-debug.c
+++ b/arch/arm/mach-omap1/leds-h2p2-debug.c
diff --git a/arch/arm/mach-omap/leds-innovator.c b/arch/arm/mach-omap1/leds-innovator.c
index 8043b7d0f66e..8043b7d0f66e 100644
--- a/arch/arm/mach-omap/leds-innovator.c
+++ b/arch/arm/mach-omap1/leds-innovator.c
diff --git a/arch/arm/mach-omap/leds-osk.c b/arch/arm/mach-omap1/leds-osk.c
index f5177f430793..4a0e8b9d4fc3 100644
--- a/arch/arm/mach-omap/leds-osk.c
+++ b/arch/arm/mach-omap1/leds-osk.c
@@ -129,14 +129,11 @@ void osk_leds_event(led_event_t evt)
 #ifdef  CONFIG_FB_OMAP
-#ifdef CONFIG_LEDS_TIMER
        case led_timer:
                hw_led_state ^= TIMER_LED;
                mistral_setled();
                break;
-#endif
-#ifdef CONFIG_LEDS_CPU
        case led_idle_start:
                hw_led_state |= IDLE_LED;
                mistral_setled();
@@ -146,7 +143,6 @@ void osk_leds_event(led_event_t evt)
                hw_led_state &= ~IDLE_LED;
                mistral_setled();
                break;
-#endif
 #endif  /* CONFIG_FB_OMAP */
diff --git a/arch/arm/mach-omap/leds.c b/arch/arm/mach-omap1/leds.c
index 8ab21fe98e1b..8ab21fe98e1b 100644
--- a/arch/arm/mach-omap/leds.c
+++ b/arch/arm/mach-omap1/leds.c
diff --git a/arch/arm/mach-omap/leds.h b/arch/arm/mach-omap1/leds.h
index a1e9fedc376c..a1e9fedc376c 100644
--- a/arch/arm/mach-omap/leds.h
+++ b/arch/arm/mach-omap1/leds.h
diff --git a/arch/arm/mach-omap1/serial.c b/arch/arm/mach-omap1/serial.c
new file mode 100644
index 000000000000..214e5d17c8b5
--- /dev/null
+++ b/arch/arm/mach-omap1/serial.c
@@ -0,0 +1,200 @@
+/*
+ * linux/arch/arm/mach-omap1/id.c
+ *
+ * OMAP1 CPU identification code
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#include <linux/config.h>
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/delay.h>
+#include <linux/serial.h>
+#include <linux/tty.h>
+#include <linux/serial_8250.h>
+#include <linux/serial_reg.h>
+#include <asm/io.h>
+#include <asm/mach-types.h>
+#include <asm/hardware/clock.h>
+#include <asm/arch/board.h>
+#include <asm/arch/mux.h>
+#include <asm/arch/fpga.h>
+static struct clk * uart1_ck = NULL;
+static struct clk * uart2_ck = NULL;
+static struct clk * uart3_ck = NULL;
+static inline unsigned int omap_serial_in(struct plat_serial8250_port *up,
+                                          int offset)
+{
+        offset <<= up->regshift;
+        return (unsigned int)__raw_readb(up->membase + offset);
+}
+static inline void omap_serial_outp(struct plat_serial8250_port *p, int offset,
+                                    int value)
+{
+        offset <<= p->regshift;
+        __raw_writeb(value, p->membase + offset);
+}
+/*
+ * Internal UARTs need to be initialized for the 8250 autoconfig to work
+ * properly. Note that the TX watermark initialization may not be needed
+ * once the 8250.c watermark handling code is merged.
+ */
+static void __init omap_serial_reset(struct plat_serial8250_port *p)
+{
+        omap_serial_outp(p, UART_OMAP_MDR1, 0x07);      /* disable UART */
+        omap_serial_outp(p, UART_OMAP_SCR, 0x08);       /* TX watermark */
+        omap_serial_outp(p, UART_OMAP_MDR1, 0x00);      /* enable UART */
+        if (!cpu_is_omap1510()) {
+                omap_serial_outp(p, UART_OMAP_SYSC, 0x01);
+                while (!(omap_serial_in(p, UART_OMAP_SYSC) & 0x01));
+        }
+}
+static struct plat_serial8250_port serial_platform_data[] = {
+        {
+                .membase        = (char*)IO_ADDRESS(OMAP_UART1_BASE),
+                .mapbase        = (unsigned long)OMAP_UART1_BASE,
+                .irq            = INT_UART1,
+                .flags          = UPF_BOOT_AUTOCONF,
+                .iotype         = UPIO_MEM,
+                .regshift       = 2,
+                .uartclk        = OMAP16XX_BASE_BAUD * 16,
+        },
+        {
+                .membase        = (char*)IO_ADDRESS(OMAP_UART2_BASE),
+                .mapbase        = (unsigned long)OMAP_UART2_BASE,
+                .irq            = INT_UART2,
+                .flags          = UPF_BOOT_AUTOCONF,
+                .iotype         = UPIO_MEM,
+                .regshift       = 2,
+                .uartclk        = OMAP16XX_BASE_BAUD * 16,
+        },
+        {
+                .membase        = (char*)IO_ADDRESS(OMAP_UART3_BASE),
+                .mapbase        = (unsigned long)OMAP_UART3_BASE,
+                .irq            = INT_UART3,
+                .flags          = UPF_BOOT_AUTOCONF,
+                .iotype         = UPIO_MEM,
+                .regshift       = 2,
+                .uartclk        = OMAP16XX_BASE_BAUD * 16,
+        },
+        { },
+};
+static struct platform_device serial_device = {
+        .name                   = "serial8250",
+        .id                     = 0,
+        .dev                    = {
+                .platform_data  = serial_platform_data,
+        },
+};
+/*
+ * Note that on Innovator-1510 UART2 pins conflict with USB2.
+ * By default UART2 does not work on Innovator-1510 if you have
+ * USB OHCI enabled. To use UART2, you must disable USB2 first.
+ */
+void __init omap_serial_init(int ports[OMAP_MAX_NR_PORTS])
+{
+        int i;
+        if (cpu_is_omap730()) {
+                serial_platform_data[0].regshift = 0;
+                serial_platform_data[1].regshift = 0;
+                serial_platform_data[0].irq = INT_730_UART_MODEM_1;
+                serial_platform_data[1].irq = INT_730_UART_MODEM_IRDA_2;
+        }
+        if (cpu_is_omap1510()) {
+                serial_platform_data[0].uartclk = OMAP1510_BASE_BAUD * 16;
+                serial_platform_data[1].uartclk = OMAP1510_BASE_BAUD * 16;
+                serial_platform_data[2].uartclk = OMAP1510_BASE_BAUD * 16;
+        }
+        for (i = 0; i < OMAP_MAX_NR_PORTS; i++) {
+                unsigned char reg;
+                if (ports[i] == 0) {
+                        serial_platform_data[i].membase = NULL;
+                        serial_platform_data[i].mapbase = 0;
+                        continue;
+                }
+                switch (i) {
+                case 0:
+                        uart1_ck = clk_get(NULL, "uart1_ck");
+                        if (IS_ERR(uart1_ck))
+                                printk("Could not get uart1_ck\n");
+                        else {
+                                clk_use(uart1_ck);
+                                if (cpu_is_omap1510())
+                                        clk_set_rate(uart1_ck, 12000000);
+                        }
+                        if (cpu_is_omap1510()) {
+                                omap_cfg_reg(UART1_TX);
+                                omap_cfg_reg(UART1_RTS);
+                                if (machine_is_omap_innovator()) {
+                                        reg = fpga_read(OMAP1510_FPGA_POWER);
+                                        reg |= OMAP1510_FPGA_PCR_COM1_EN;
+                                        fpga_write(reg, OMAP1510_FPGA_POWER);
+                                        udelay(10);
+                                }
+                        }
+                        break;
+                case 1:
+                        uart2_ck = clk_get(NULL, "uart2_ck");
+                        if (IS_ERR(uart2_ck))
+                                printk("Could not get uart2_ck\n");
+                        else {
+                                clk_use(uart2_ck);
+                                if (cpu_is_omap1510())
+                                        clk_set_rate(uart2_ck, 12000000);
+                                else
+                                        clk_set_rate(uart2_ck, 48000000);
+                        }
+                        if (cpu_is_omap1510()) {
+                                omap_cfg_reg(UART2_TX);
+                                omap_cfg_reg(UART2_RTS);
+                                if (machine_is_omap_innovator()) {
+                                        reg = fpga_read(OMAP1510_FPGA_POWER);
+                                        reg |= OMAP1510_FPGA_PCR_COM2_EN;
+                                        fpga_write(reg, OMAP1510_FPGA_POWER);
+                                        udelay(10);
+                                }
+                        }
+                        break;
+                case 2:
+                        uart3_ck = clk_get(NULL, "uart3_ck");
+                        if (IS_ERR(uart3_ck))
+                                printk("Could not get uart3_ck\n");
+                        else {
+                                clk_use(uart3_ck);
+                                if (cpu_is_omap1510())
+                                        clk_set_rate(uart3_ck, 12000000);
+                        }
+                        if (cpu_is_omap1510()) {
+                                omap_cfg_reg(UART3_TX);
+                                omap_cfg_reg(UART3_RX);
+                        }
+                        break;
+                }
+                omap_serial_reset(&serial_platform_data[i]);
+        }
+}
+static int __init omap_init(void)
+{
+        return platform_device_register(&serial_device);
+}
+arch_initcall(omap_init);
diff --git a/arch/arm/mach-omap/time.c b/arch/arm/mach-omap1/time.c
index dd34e9f4c413..d540539c9bbb 100644
--- a/arch/arm/mach-omap/time.c
+++ b/arch/arm/mach-omap1/time.c
@@ -1,5 +1,5 @@
 /*
- * linux/arch/arm/mach-omap/time.c
+ * linux/arch/arm/mach-omap1/time.c
 *
 * OMAP Timers
 *
@@ -58,17 +58,9 @@ struct sys_timer omap_timer;
 * MPU timer
 * ---------------------------------------------------------------------------
 */
-#define OMAP_MPU_TIMER1_BASE            (0xfffec500)
-#define OMAP_MPU_TIMER2_BASE            (0xfffec600)
-#define OMAP_MPU_TIMER3_BASE            (0xfffec700)
 #define OMAP_MPU_TIMER_BASE             OMAP_MPU_TIMER1_BASE
 #define OMAP_MPU_TIMER_OFFSET           0x100
-#define MPU_TIMER_FREE                  (1 << 6)
-#define MPU_TIMER_CLOCK_ENABLE          (1 << 5)
-#define MPU_TIMER_AR                    (1 << 1)
-#define MPU_TIMER_ST                    (1 << 0)
 /* cycles to nsec conversions taken from arch/i386/kernel/timers/timer_tsc.c,
 * converted to use kHz by Kevin Hilman */
 /* convert from cycles(64bits) => nanoseconds (64bits)
@@ -255,6 +247,13 @@ unsigned long long sched_clock(void)
 #define OMAP_32K_TIMER_TCR              0x04
 #define OMAP_32K_TICKS_PER_HZ           (32768 / HZ)
+#if (32768 % HZ) != 0
+/* We cannot ignore modulo.
+ * Potential error can be as high as several percent.
+ */
+#define OMAP_32K_TICK_MODULO            (32768 % HZ)
+static unsigned modulo_count = 0; /* Counts 1/HZ units */
+#endif
 /*
 * TRM says 1 / HZ = ( TVR + 1) / 32768, so TRV = (32768 / HZ) - 1
@@ -331,6 +330,19 @@ static irqreturn_t omap_32k_timer_interrupt(int irq, void *dev_id,
        now = omap_32k_sync_timer_read();
        while (now - omap_32k_last_tick >= OMAP_32K_TICKS_PER_HZ) {
+#ifdef OMAP_32K_TICK_MODULO
+                /* Modulo addition may put omap_32k_last_tick ahead of now
+                 * and cause unwanted repetition of the while loop.
+                 */
+                if (unlikely(now - omap_32k_last_tick == ~0))
+                        break;
+                modulo_count += OMAP_32K_TICK_MODULO;
+                if (modulo_count > HZ) {
+                        ++omap_32k_last_tick;
+                        modulo_count -= HZ;
+                }
+#endif
                omap_32k_last_tick += OMAP_32K_TICKS_PER_HZ;
                timer_tick(regs);
        }
@@ -407,7 +419,7 @@ static __init void omap_init_32k_timer(void)
 * Timer initialization
 * ---------------------------------------------------------------------------
 */
-void __init omap_timer_init(void)
+static void __init omap_timer_init(void)
 {
 #if defined(CONFIG_OMAP_MPU_TIMER)
        omap_init_mpu_timer();
diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig
index 95606b4a3ba6..afbbeb6f4658 100644
--- a/arch/arm/mm/Kconfig
+++ b/arch/arm/mm/Kconfig
@@ -101,7 +101,7 @@ config CPU_ARM922T
 # ARM925T
 config CPU_ARM925T
-        bool "Support ARM925T processor" if ARCH_OMAP
+        bool "Support ARM925T processor" if ARCH_OMAP1
        depends on ARCH_OMAP1510
        default y if ARCH_OMAP1510
        select CPU_32v4
diff --git a/arch/arm/mm/mm-armv.c b/arch/arm/mm/mm-armv.c
index c3bd503b43a2..b19f00e99a21 100644
--- a/arch/arm/mm/mm-armv.c
+++ b/arch/arm/mm/mm-armv.c
@@ -399,7 +399,7 @@ static void __init build_mem_type_table(void)
                ecc_mask = 0;
        }
-        if (cpu_arch <= CPU_ARCH_ARMv5) {
+        if (cpu_arch <= CPU_ARCH_ARMv5TEJ) {
                for (i = 0; i < ARRAY_SIZE(mem_types); i++) {
                        if (mem_types[i].prot_l1)
                                mem_types[i].prot_l1 |= PMD_BIT4;
@@ -584,7 +584,7 @@ void setup_mm_for_reboot(char mode)
                pmdval = (i << PGDIR_SHIFT) |
                         PMD_SECT_AP_WRITE | PMD_SECT_AP_READ |
                         PMD_TYPE_SECT;
-                if (cpu_arch <= CPU_ARCH_ARMv5)
+                if (cpu_arch <= CPU_ARCH_ARMv5TEJ)
                        pmdval |= PMD_BIT4;
                pmd = pmd_off(pgd, i << PGDIR_SHIFT);
                pmd[0] = __pmd(pmdval);
diff --git a/arch/arm/plat-omap/Kconfig b/arch/arm/plat-omap/Kconfig
new file mode 100644
index 000000000000..345365852f8c
--- /dev/null
+++ b/arch/arm/plat-omap/Kconfig
@@ -0,0 +1,112 @@
+if ARCH_OMAP
+menu "TI OMAP Implementations"
+config ARCH_OMAP_OTG
+        bool
+choice
+        prompt "OMAP System Type"
+        default ARCH_OMAP1
+config ARCH_OMAP1
+        bool "TI OMAP1"
+config ARCH_OMAP2
+        bool "TI OMAP2"
+endchoice
+comment "OMAP Feature Selections"
+config OMAP_RESET_CLOCKS
+        bool "Reset unused clocks during boot"
+        depends on ARCH_OMAP
+        default n
+        help
+          Say Y if you want to reset unused clocks during boot.
+          This option saves power, but assumes all drivers are
+          using the clock framework. Broken drivers that do not
+          yet use clock framework may not work with this option.
+          If you are booting from another operating system, you
+          probably do not want this option enabled until your
+          device drivers work properly.
+config OMAP_MUX
+        bool "OMAP multiplexing support"
+        depends on ARCH_OMAP
+        default y
+        help
+          Pin multiplexing support for OMAP boards. If your bootloader
+          sets the multiplexing correctly, say N. Otherwise, or if unsure,
+          say Y.
+config OMAP_MUX_DEBUG
+        bool "Multiplexing debug output"
+        depends on OMAP_MUX
+        default n
+        help
+          Makes the multiplexing functions print out a lot of debug info.
+          This is useful if you want to find out the correct values of the
+          multiplexing registers.
+config OMAP_MUX_WARNINGS
+        bool "Warn about pins the bootloader didn't set up"
+        depends on OMAP_MUX
+        default y
+        help
+          Choose Y here to warn whenever driver initialization logic needs
+          to change the pin multiplexing setup.  When there are no warnings
+          printed, it's safe to deselect OMAP_MUX for your product.
+choice
+        prompt "System timer"
+        default OMAP_MPU_TIMER
+config OMAP_MPU_TIMER
+        bool "Use mpu timer"
+        help
+          Select this option if you want to use the OMAP mpu timer. This
+          timer provides more intra-tick resolution than the 32KHz timer,
+          but consumes more power.
+config OMAP_32K_TIMER
+        bool "Use 32KHz timer"
+        depends on ARCH_OMAP16XX
+        help
+          Select this option if you want to enable the OMAP 32KHz timer.
+          This timer saves power compared to the OMAP_MPU_TIMER, and has
+          support for no tick during idle. The 32KHz timer provides less
+          intra-tick resolution than OMAP_MPU_TIMER. The 32KHz timer is
+          currently only available for OMAP-16xx.
+endchoice
+config OMAP_32K_TIMER_HZ
+       int "Kernel internal timer frequency for 32KHz timer"
+       range 32 1024
+       depends on OMAP_32K_TIMER
+       default "128"
+       help
+          Kernel internal timer frequency should be a divisor of 32768,
+          such as 64 or 128.
+choice
+        prompt "Low-level debug console UART"
+        depends on ARCH_OMAP
+        default OMAP_LL_DEBUG_UART1
+config OMAP_LL_DEBUG_UART1
+        bool "UART1"
+config OMAP_LL_DEBUG_UART2
+        bool "UART2"
+config OMAP_LL_DEBUG_UART3
+        bool "UART3"
+endchoice
+endmenu
+endif
diff --git a/arch/arm/plat-omap/Makefile b/arch/arm/plat-omap/Makefile
new file mode 100644
index 000000000000..531e11af54d4
--- /dev/null
+++ b/arch/arm/plat-omap/Makefile
@@ -0,0 +1,17 @@
+#
+# Makefile for the linux kernel.
+#
+# Common support
+obj-y := common.o dma.o clock.o mux.o gpio.o mcbsp.o usb.o
+obj-m :=
+obj-n :=
+obj-  :=
+# OCPI interconnect support for 1710, 1610 and 5912
+obj-$(CONFIG_ARCH_OMAP16XX) += ocpi.o
+# Power Management
+obj-$(CONFIG_PM) += pm.o sleep.o
+obj-$(CONFIG_CPU_FREQ) += cpu-omap.o
diff --git a/arch/arm/mach-omap/clock.c b/arch/arm/plat-omap/clock.c
index e91186b5341a..59d91b3262ba 100644
--- a/arch/arm/mach-omap/clock.c
+++ b/arch/arm/plat-omap/clock.c
@@ -1,5 +1,5 @@
 /*
- *  linux/arch/arm/mach-omap/clock.c
+ *  linux/arch/arm/plat-omap/clock.c
 *
 *  Copyright (C) 2004 Nokia corporation
 *  Written by Tuukka Tikkanen <tuukka.tikkanen@elektrobit.com>
@@ -14,6 +14,7 @@
 #include <linux/errno.h>
 #include <linux/err.h>
+#include <asm/io.h>
 #include <asm/semaphore.h>
 #include <asm/hardware/clock.h>
 #include <asm/arch/board.h>
@@ -25,6 +26,8 @@ static LIST_HEAD(clocks);
 static DECLARE_MUTEX(clocks_sem);
 static DEFINE_SPINLOCK(clockfw_lock);
 static void propagate_rate(struct clk *  clk);
+/* UART clock function */
+static int set_uart_rate(struct clk * clk, unsigned long rate);
 /* External clock (MCLK & BCLK) functions */
 static int set_ext_clk_rate(struct clk *  clk, unsigned long rate);
 static long round_ext_clk_rate(struct clk *  clk, unsigned long rate);
@@ -34,7 +37,7 @@ static int select_table_rate(struct clk *  clk, unsigned long rate);
 static long round_to_table_rate(struct clk *  clk, unsigned long rate);
 void clk_setdpll(__u16, __u16);
-struct mpu_rate rate_table[] = {
+static struct mpu_rate rate_table[] = {
        /* MPU MHz, xtal MHz, dpll1 MHz, CKCTL, DPLL_CTL
         * armdiv, dspdiv, dspmmu, tcdiv, perdiv, lcddiv
         */
@@ -48,7 +51,7 @@ struct mpu_rate rate_table[] = {
        { 192000000, 19200000, 192000000, 0x050f, 0x2510 }, /* 1/1/2/2/8/8 */
        { 192000000, 12000000, 192000000, 0x050f, 0x2810 }, /* 1/1/2/2/8/8 */
        {  96000000, 12000000, 192000000, 0x055f, 0x2810 }, /* 2/2/2/2/8/8 */
-        {  48000000, 12000000, 192000000, 0x0ccf, 0x2810 }, /* 4/4/4/4/8/8 */
+        {  48000000, 12000000, 192000000, 0x0baf, 0x2810 }, /* 4/8/4/4/8/8 */
        {  24000000, 12000000, 192000000, 0x0fff, 0x2810 }, /* 8/8/8/8/8/8 */
 #endif
 #if defined(CONFIG_OMAP_ARM_182MHZ)
@@ -58,7 +61,7 @@ struct mpu_rate rate_table[] = {
        { 168000000, 12000000, 168000000, 0x010f, 0x2710 }, /* 1/1/1/2/8/8 */
 #endif
 #if defined(CONFIG_OMAP_ARM_150MHZ)
-        { 150000000, 12000000, 150000000, 0x150a, 0x2cb0 }, /* 0/0/1/1/2/2 */
+        { 150000000, 12000000, 150000000, 0x010a, 0x2cb0 }, /* 1/1/1/2/4/4 */
 #endif
 #if defined(CONFIG_OMAP_ARM_120MHZ)
        { 120000000, 12000000, 120000000, 0x010a, 0x2510 }, /* 1/1/1/2/4/4 */
@@ -76,19 +79,11 @@ struct mpu_rate rate_table[] = {
 };
-static void ckctl_recalc(struct clk *  clk)
+static void ckctl_recalc(struct clk *  clk);
-{
+int __clk_enable(struct clk *clk);
-        int dsor;
+void __clk_disable(struct clk *clk);
+void __clk_unuse(struct clk *clk);
-        /* Calculate divisor encoded as 2-bit exponent */
+int __clk_use(struct clk *clk);
-        dsor = 1 << (3 & (omap_readw(ARM_CKCTL) >> clk->rate_offset));
-        if (unlikely(clk->rate == clk->parent->rate / dsor))
-                return; /* No change, quick exit */
-        clk->rate = clk->parent->rate / dsor;
-        if (unlikely(clk->flags & RATE_PROPAGATES))
-                propagate_rate(clk);
-}
 static void followparent_recalc(struct clk *  clk)
@@ -102,6 +97,14 @@ static void watchdog_recalc(struct clk *  clk)
        clk->rate = clk->parent->rate / 14;
 }
+static void uart_recalc(struct clk * clk)
+{
+        unsigned int val = omap_readl(clk->enable_reg);
+        if (val & clk->enable_bit)
+                clk->rate = 48000000;
+        else
+                clk->rate = 12000000;
+}
 static struct clk ck_ref = {
        .name           = "ck_ref",
@@ -138,7 +141,7 @@ static struct clk arm_ck = {
 static struct clk armper_ck = {
        .name           = "armper_ck",
        .parent         = &ck_dpll1,
-        .flags          = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
+        .flags          = CLOCK_IN_OMAP730 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
                          RATE_CKCTL,
        .enable_reg     = ARM_IDLECT2,
        .enable_bit     = EN_PERCK,
@@ -185,7 +188,7 @@ static struct clk armwdt_ck = {
 static struct clk arminth_ck16xx = {
        .name           = "arminth_ck",
        .parent         = &arm_ck,
-        .flags          = CLOCK_IN_OMAP16XX,
+        .flags          = CLOCK_IN_OMAP16XX | ALWAYS_ENABLED,
        .recalc         = &followparent_recalc,
        /* Note: On 16xx the frequency can be divided by 2 by programming
         * ARM_CKCTL:ARM_INTHCK_SEL(14) to 1
@@ -214,6 +217,38 @@ static struct clk dspmmu_ck = {
        .recalc         = &ckctl_recalc,
 };
+static struct clk dspper_ck = {
+        .name           = "dspper_ck",
+        .parent         = &ck_dpll1,
+        .flags          = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
+                          RATE_CKCTL | DSP_DOMAIN_CLOCK | VIRTUAL_IO_ADDRESS,
+        .enable_reg     = DSP_IDLECT2,
+        .enable_bit     = EN_PERCK,
+        .rate_offset    = CKCTL_PERDIV_OFFSET,
+        .recalc         = &followparent_recalc,
+        //.recalc               = &ckctl_recalc,
+};
+static struct clk dspxor_ck = {
+        .name           = "dspxor_ck",
+        .parent         = &ck_ref,
+        .flags          = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
+                          DSP_DOMAIN_CLOCK | VIRTUAL_IO_ADDRESS,
+        .enable_reg     = DSP_IDLECT2,
+        .enable_bit     = EN_XORPCK,
+        .recalc         = &followparent_recalc,
+};
+static struct clk dsptim_ck = {
+        .name           = "dsptim_ck",
+        .parent         = &ck_ref,
+        .flags          = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
+                          DSP_DOMAIN_CLOCK | VIRTUAL_IO_ADDRESS,
+        .enable_reg     = DSP_IDLECT2,
+        .enable_bit     = EN_DSPTIMCK,
+        .recalc         = &followparent_recalc,
+};
 static struct clk tc_ck = {
        .name           = "tc_ck",
        .parent         = &ck_dpll1,
@@ -226,7 +261,7 @@ static struct clk tc_ck = {
 static struct clk arminth_ck1510 = {
        .name           = "arminth_ck",
        .parent         = &tc_ck,
-        .flags          = CLOCK_IN_OMAP1510,
+        .flags          = CLOCK_IN_OMAP1510 | ALWAYS_ENABLED,
        .recalc         = &followparent_recalc,
        /* Note: On 1510 the frequency follows TC_CK
         *
@@ -237,7 +272,7 @@ static struct clk arminth_ck1510 = {
 static struct clk tipb_ck = {
        .name           = "tibp_ck",
        .parent         = &tc_ck,
-        .flags          = CLOCK_IN_OMAP1510,
+        .flags          = CLOCK_IN_OMAP1510 | ALWAYS_ENABLED,
        .recalc         = &followparent_recalc,
 };
@@ -271,14 +306,15 @@ static struct clk tc2_ck = {
 static struct clk dma_ck = {
        .name           = "dma_ck",
        .parent         = &tc_ck,
-        .flags          = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX,
+        .flags          = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
+                          ALWAYS_ENABLED,
        .recalc         = &followparent_recalc,
 };
 static struct clk dma_lcdfree_ck = {
        .name           = "dma_lcdfree_ck",
        .parent         = &tc_ck,
-        .flags          = CLOCK_IN_OMAP16XX,
+        .flags          = CLOCK_IN_OMAP16XX | ALWAYS_ENABLED,
        .recalc         = &followparent_recalc,
 };
@@ -303,14 +339,14 @@ static struct clk lb_ck = {
 static struct clk rhea1_ck = {
        .name           = "rhea1_ck",
        .parent         = &tc_ck,
-        .flags          = CLOCK_IN_OMAP16XX,
+        .flags          = CLOCK_IN_OMAP16XX | ALWAYS_ENABLED,
        .recalc         = &followparent_recalc,
 };
 static struct clk rhea2_ck = {
        .name           = "rhea2_ck",
        .parent         = &tc_ck,
-        .flags          = CLOCK_IN_OMAP16XX,
+        .flags          = CLOCK_IN_OMAP16XX | ALWAYS_ENABLED,
        .recalc         = &followparent_recalc,
 };
@@ -325,43 +361,55 @@ static struct clk lcd_ck = {
        .recalc         = &ckctl_recalc,
 };
-static struct clk uart1_ck = {
+static struct clk uart1_1510 = {
+        .name           = "uart1_ck",
+        /* Direct from ULPD, no parent */
+        .rate           = 12000000,
+        .flags          = CLOCK_IN_OMAP1510 | ENABLE_REG_32BIT | ALWAYS_ENABLED,
+        .enable_reg     = MOD_CONF_CTRL_0,
+        .enable_bit     = 29,   /* Chooses between 12MHz and 48MHz */
+        .set_rate       = &set_uart_rate,
+        .recalc         = &uart_recalc,
+};
+static struct clk uart1_16xx = {
        .name           = "uart1_ck",
        /* Direct from ULPD, no parent */
        .rate           = 48000000,
-        .flags          = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
+        .flags          = CLOCK_IN_OMAP16XX | RATE_FIXED | ENABLE_REG_32BIT,
-                          RATE_FIXED | ENABLE_REG_32BIT,
        .enable_reg     = MOD_CONF_CTRL_0,
        .enable_bit     = 29,
-        /* (Only on 1510)
-         * The "enable bit" actually chooses between 48MHz and 12MHz.
-         */
 };
 static struct clk uart2_ck = {
        .name           = "uart2_ck",
        /* Direct from ULPD, no parent */
-        .rate           = 48000000,
+        .rate           = 12000000,
-        .flags          = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
+        .flags          = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | ENABLE_REG_32BIT,
-                          RATE_FIXED | ENABLE_REG_32BIT,
        .enable_reg     = MOD_CONF_CTRL_0,
-        .enable_bit     = 30,
+        .enable_bit     = 30,   /* Chooses between 12MHz and 48MHz */
-        /* (for both 1510 and 16xx)
+        .set_rate       = &set_uart_rate,
-         * The "enable bit" actually chooses between 48MHz and 12MHz/32kHz.
+        .recalc         = &uart_recalc,
-         */
 };
-static struct clk uart3_ck = {
+static struct clk uart3_1510 = {
+        .name           = "uart3_ck",
+        /* Direct from ULPD, no parent */
+        .rate           = 12000000,
+        .flags          = CLOCK_IN_OMAP1510 | ENABLE_REG_32BIT | ALWAYS_ENABLED,
+        .enable_reg     = MOD_CONF_CTRL_0,
+        .enable_bit     = 31,   /* Chooses between 12MHz and 48MHz */
+        .set_rate       = &set_uart_rate,
+        .recalc         = &uart_recalc,
+};
+static struct clk uart3_16xx = {
        .name           = "uart3_ck",
        /* Direct from ULPD, no parent */
        .rate           = 48000000,
-        .flags          = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
+        .flags          = CLOCK_IN_OMAP16XX | RATE_FIXED | ENABLE_REG_32BIT,
-                          RATE_FIXED | ENABLE_REG_32BIT,
        .enable_reg     = MOD_CONF_CTRL_0,
        .enable_bit     = 31,
-        /* (Only on 1510)
-         * The "enable bit" actually chooses between 48MHz and 12MHz.
-         */
 };
 static struct clk usb_clko = {  /* 6 MHz output on W4_USB_CLKO */
@@ -480,6 +528,9 @@ static struct clk *  onchip_clks[] = {
        /* CK_GEN2 clocks */
        &dsp_ck,
        &dspmmu_ck,
+        &dspper_ck,
+        &dspxor_ck,
+        &dsptim_ck,
        /* CK_GEN3 clocks */
        &tc_ck,
        &tipb_ck,
@@ -494,9 +545,11 @@ static struct clk *  onchip_clks[] = {
        &rhea2_ck,
        &lcd_ck,
        /* ULPD clocks */
-        &uart1_ck,
+        &uart1_1510,
+        &uart1_16xx,
        &uart2_ck,
-        &uart3_ck,
+        &uart3_1510,
+        &uart3_16xx,
        &usb_clko,
        &usb_hhc_ck1510, &usb_hhc_ck16xx,
        &mclk_1510,  &mclk_16xx,
@@ -547,14 +600,34 @@ int __clk_enable(struct clk *clk)
                return 0;
        }
+        if (clk->flags & DSP_DOMAIN_CLOCK) {
+                __clk_use(&api_ck);
+        }
        if (clk->flags & ENABLE_REG_32BIT) {
-                regval32 = omap_readl(clk->enable_reg);
+                if (clk->flags & VIRTUAL_IO_ADDRESS) {
-                regval32 |= (1 << clk->enable_bit);
+                        regval32 = __raw_readl(clk->enable_reg);
-                omap_writel(regval32, clk->enable_reg);
+                        regval32 |= (1 << clk->enable_bit);
+                        __raw_writel(regval32, clk->enable_reg);
+                } else {
+                        regval32 = omap_readl(clk->enable_reg);
+                        regval32 |= (1 << clk->enable_bit);
+                        omap_writel(regval32, clk->enable_reg);
+                }
        } else {
-                regval16 = omap_readw(clk->enable_reg);
+                if (clk->flags & VIRTUAL_IO_ADDRESS) {
-                regval16 |= (1 << clk->enable_bit);
+                        regval16 = __raw_readw(clk->enable_reg);
-                omap_writew(regval16, clk->enable_reg);
+                        regval16 |= (1 << clk->enable_bit);
+                        __raw_writew(regval16, clk->enable_reg);
+                } else {
+                        regval16 = omap_readw(clk->enable_reg);
+                        regval16 |= (1 << clk->enable_bit);
+                        omap_writew(regval16, clk->enable_reg);
+                }
+        }
+        if (clk->flags & DSP_DOMAIN_CLOCK) {
+                __clk_unuse(&api_ck);
        }
        return 0;
@@ -569,14 +642,34 @@ void __clk_disable(struct clk *clk)
        if (clk->enable_reg == 0)
                return;
+        if (clk->flags & DSP_DOMAIN_CLOCK) {
+                __clk_use(&api_ck);
+        }
        if (clk->flags & ENABLE_REG_32BIT) {
-                regval32 = omap_readl(clk->enable_reg);
+                if (clk->flags & VIRTUAL_IO_ADDRESS) {
-                regval32 &= ~(1 << clk->enable_bit);
+                        regval32 = __raw_readl(clk->enable_reg);
-                omap_writel(regval32, clk->enable_reg);
+                        regval32 &= ~(1 << clk->enable_bit);
+                        __raw_writel(regval32, clk->enable_reg);
+                } else {
+                        regval32 = omap_readl(clk->enable_reg);
+                        regval32 &= ~(1 << clk->enable_bit);
+                        omap_writel(regval32, clk->enable_reg);
+                }
        } else {
-                regval16 = omap_readw(clk->enable_reg);
+                if (clk->flags & VIRTUAL_IO_ADDRESS) {
-                regval16 &= ~(1 << clk->enable_bit);
+                        regval16 = __raw_readw(clk->enable_reg);
-                omap_writew(regval16, clk->enable_reg);
+                        regval16 &= ~(1 << clk->enable_bit);
+                        __raw_writew(regval16, clk->enable_reg);
+                } else {
+                        regval16 = omap_readw(clk->enable_reg);
+                        regval16 &= ~(1 << clk->enable_bit);
+                        omap_writew(regval16, clk->enable_reg);
+                }
+        }
+        if (clk->flags & DSP_DOMAIN_CLOCK) {
+                __clk_unuse(&api_ck);
        }
 }
@@ -766,6 +859,33 @@ static int calc_dsor_exp(struct clk *clk, unsigned long rate)
        return dsor_exp;
 }
+static void ckctl_recalc(struct clk *  clk)
+{
+        int dsor;
+        /* Calculate divisor encoded as 2-bit exponent */
+        if (clk->flags & DSP_DOMAIN_CLOCK) {
+                /* The clock control bits are in DSP domain,
+                 * so api_ck is needed for access.
+                 * Note that DSP_CKCTL virt addr = phys addr, so
+                 * we must use __raw_readw() instead of omap_readw().
+                 */
+                __clk_use(&api_ck);
+                dsor = 1 << (3 & (__raw_readw(DSP_CKCTL) >> clk->rate_offset));
+                __clk_unuse(&api_ck);
+        } else {
+                dsor = 1 << (3 & (omap_readw(ARM_CKCTL) >> clk->rate_offset));
+        }
+        if (unlikely(clk->rate == clk->parent->rate / dsor))
+                return; /* No change, quick exit */
+        clk->rate = clk->parent->rate / dsor;
+        if (unlikely(clk->flags & RATE_PROPAGATES))
+                propagate_rate(clk);
+}
 long clk_round_rate(struct clk *clk, unsigned long rate)
 {
        int dsor_exp;
@@ -826,6 +946,9 @@ static int select_table_rate(struct clk *  clk, unsigned long rate)
        if (!ptr->rate)
                return -EINVAL;
+        if (!ptr->rate)
+                return -EINVAL;
        if (unlikely(ck_dpll1.rate == 0)) {
                omap_writew(ptr->dpllctl_val, DPLL_CTL);
                ck_dpll1.rate = ptr->pll_rate;
@@ -921,6 +1044,23 @@ static unsigned calc_ext_dsor(unsigned long rate)
        return dsor;
 }
+/* Only needed on 1510 */
+static int set_uart_rate(struct clk * clk, unsigned long rate)
+{
+        unsigned int val;
+        val = omap_readl(clk->enable_reg);
+        if (rate == 12000000)
+                val &= ~(1 << clk->enable_bit);
+        else if (rate == 48000000)
+                val |= (1 << clk->enable_bit);
+        else
+                return -EINVAL;
+        omap_writel(val, clk->enable_reg);
+        clk->rate = rate;
+        return 0;
+}
 static int set_ext_clk_rate(struct clk *  clk, unsigned long rate)
 {
@@ -985,7 +1125,18 @@ void clk_unregister(struct clk *clk)
 }
 EXPORT_SYMBOL(clk_unregister);
+#ifdef CONFIG_OMAP_RESET_CLOCKS
+/*
+ * Resets some clocks that may be left on from bootloader,
+ * but leaves serial clocks on. See also omap_late_clk_reset().
+ */
+static inline void omap_early_clk_reset(void)
+{
+        //omap_writel(0x3 << 29, MOD_CONF_CTRL_0);
+}
+#else
+#define omap_early_clk_reset()  {}
+#endif
 int __init clk_init(void)
 {
@@ -993,6 +1144,8 @@ int __init clk_init(void)
        const struct omap_clock_config *info;
        int crystal_type = 0; /* Default 12 MHz */
+        omap_early_clk_reset();
        for (clkp = onchip_clks; clkp < onchip_clks+ARRAY_SIZE(onchip_clks); clkp++) {
                if (((*clkp)->flags &CLOCK_IN_OMAP1510) && cpu_is_omap1510()) {
                        clk_register(*clkp);
@@ -1023,9 +1176,42 @@ int __init clk_init(void)
                ck_ref.rate = 19200000;
 #endif
+        printk("Clocks: ARM_SYSST: 0x%04x DPLL_CTL: 0x%04x ARM_CKCTL: 0x%04x\n",
+               omap_readw(ARM_SYSST), omap_readw(DPLL_CTL),
+               omap_readw(ARM_CKCTL));
        /* We want to be in syncronous scalable mode */
        omap_writew(0x1000, ARM_SYSST);
+#ifdef CONFIG_OMAP_CLOCKS_SET_BY_BOOTLOADER
+        /* Use values set by bootloader. Determine PLL rate and recalculate
+         * dependent clocks as if kernel had changed PLL or divisors.
+         */
+        {
+                unsigned pll_ctl_val = omap_readw(DPLL_CTL);
+                ck_dpll1.rate = ck_ref.rate; /* Base xtal rate */
+                if (pll_ctl_val & 0x10) {
+                        /* PLL enabled, apply multiplier and divisor */
+                        if (pll_ctl_val & 0xf80)
+                                ck_dpll1.rate *= (pll_ctl_val & 0xf80) >> 7;
+                        ck_dpll1.rate /= ((pll_ctl_val & 0x60) >> 5) + 1;
+                } else {
+                        /* PLL disabled, apply bypass divisor */
+                        switch (pll_ctl_val & 0xc) {
+                        case 0:
+                                break;
+                        case 0x4:
+                                ck_dpll1.rate /= 2;
+                                break;
+                        default:
+                                ck_dpll1.rate /= 4;
+                                break;
+                        }
+                }
+        }
+        propagate_rate(&ck_dpll1);
+#else
        /* Find the highest supported frequency and enable it */
        if (select_table_rate(&virtual_ck_mpu, ~0)) {
                printk(KERN_ERR "System frequencies not set. Check your config.\n");
@@ -1034,12 +1220,13 @@ int __init clk_init(void)
                omap_writew(0x1005, ARM_CKCTL);
                ck_dpll1.rate = 60000000;
                propagate_rate(&ck_dpll1);
-                printk(KERN_INFO "Clocking rate (xtal/DPLL1/MPU): %ld/%ld/%ld\n",
-                       ck_ref.rate, ck_dpll1.rate, arm_ck.rate);
        }
+#endif
        /* Cache rates for clocks connected to ck_ref (not dpll1) */
        propagate_rate(&ck_ref);
+        printk(KERN_INFO "Clocking rate (xtal/DPLL1/MPU): %ld.%01ld/%ld/%ld MHz\n",
+               ck_ref.rate / 1000000, (ck_ref.rate / 100000) % 10,
+               ck_dpll1.rate, arm_ck.rate);
 #ifdef CONFIG_MACH_OMAP_PERSEUS2
        /* Select slicer output as OMAP input clock */
@@ -1074,3 +1261,63 @@ int __init clk_init(void)
        return 0;
 }
+#ifdef CONFIG_OMAP_RESET_CLOCKS
+static int __init omap_late_clk_reset(void)
+{
+        /* Turn off all unused clocks */
+        struct clk *p;
+        __u32 regval32;
+        omap_writew(0, SOFT_REQ_REG);
+        omap_writew(0, SOFT_REQ_REG2);
+        list_for_each_entry(p, &clocks, node) {
+                if (p->usecount > 0 || (p->flags & ALWAYS_ENABLED) ||
+                        p->enable_reg == 0)
+                        continue;
+                /* Assume no DSP clocks have been activated by bootloader */
+                if (p->flags & DSP_DOMAIN_CLOCK)
+                        continue;
+                /* Is the clock already disabled? */
+                if (p->flags & ENABLE_REG_32BIT) {
+                        if (p->flags & VIRTUAL_IO_ADDRESS)
+                                regval32 = __raw_readl(p->enable_reg);
+                        else
+                                regval32 = omap_readl(p->enable_reg);
+                } else {
+                        if (p->flags & VIRTUAL_IO_ADDRESS)
+                                regval32 = __raw_readw(p->enable_reg);
+                        else
+                                regval32 = omap_readw(p->enable_reg);
+                }
+                if ((regval32 & (1 << p->enable_bit)) == 0)
+                        continue;
+                /* FIXME: This clock seems to be necessary but no-one
+                 * has asked for its activation. */
+                if (p == &tc2_ck         // FIX: pm.c (SRAM), CCP, Camera
+                    || p == &ck_dpll1out // FIX: SoSSI, SSR
+                    || p == &arm_gpio_ck // FIX: GPIO code for 1510
+                    ) {
+                        printk(KERN_INFO "FIXME: Clock \"%s\" seems unused\n",
+                               p->name);
+                        continue;
+                }
+                printk(KERN_INFO "Disabling unused clock \"%s\"... ", p->name);
+                __clk_disable(p);
+                printk(" done\n");
+        }
+        return 0;
+}
+late_initcall(omap_late_clk_reset);
+#endif
diff --git a/arch/arm/mach-omap/clock.h b/arch/arm/plat-omap/clock.h
index 08c0ddde1835..a89e1e8c2519 100644
--- a/arch/arm/mach-omap/clock.h
+++ b/arch/arm/plat-omap/clock.h
@@ -1,5 +1,5 @@
 /*
- *  linux/arch/arm/mach-omap/clock.h
+ *  linux/arch/arm/plat-omap/clock.h
 *
 *  Copyright (C) 2004 Nokia corporation
 *  Written by Tuukka Tikkanen <tuukka.tikkanen@elektrobit.com>
@@ -52,6 +52,8 @@ struct mpu_rate {
 #define CLOCK_IN_OMAP16XX       64
 #define CLOCK_IN_OMAP1510       128
 #define CLOCK_IN_OMAP730        256
+#define DSP_DOMAIN_CLOCK        512
+#define VIRTUAL_IO_ADDRESS      1024
 /* ARM_CKCTL bit shifts */
 #define CKCTL_PERDIV_OFFSET     0
@@ -63,6 +65,8 @@ struct mpu_rate {
 /*#define ARM_TIMXO             12*/
 #define EN_DSPCK                13
 /*#define ARM_INTHCK_SEL        14*/ /* Divide-by-2 for mpu inth_ck */
+/* DSP_CKCTL bit shifts */
+#define CKCTL_DSPPERDIV_OFFSET  0
 /* ARM_IDLECT1 bit shifts */
 /*#define IDLWDT_ARM    0*/
@@ -96,6 +100,9 @@ struct mpu_rate {
 #define EN_TC1_CK       2
 #define EN_TC2_CK       4
+/* DSP_IDLECT2 bit shifts (0,1,2 are same as for ARM_IDLECT2) */
+#define EN_DSPTIMCK     5
 /* Various register defines for clock controls scattered around OMAP chip */
 #define USB_MCLK_EN_BIT         4       /* In ULPD_CLKC_CTRL */
 #define USB_HOST_HHC_UHOST_EN   9       /* In MOD_CONF_CTRL_0 */
@@ -103,7 +110,8 @@ struct mpu_rate {
 #define COM_ULPD_PLL_CLK_REQ    1       /* In COM_CLK_DIV_CTRL_SEL */
 #define SWD_CLK_DIV_CTRL_SEL    0xfffe0874
 #define COM_CLK_DIV_CTRL_SEL    0xfffe0878
+#define SOFT_REQ_REG            0xfffe0834
+#define SOFT_REQ_REG2           0xfffe0880
 int clk_register(struct clk *clk);
 void clk_unregister(struct clk *clk);
diff --git a/arch/arm/plat-omap/common.c b/arch/arm/plat-omap/common.c
new file mode 100644
index 000000000000..ea967a8f6ce5
--- /dev/null
+++ b/arch/arm/plat-omap/common.c
@@ -0,0 +1,135 @@
+/*
+ * linux/arch/arm/plat-omap/common.c
+ *
+ * Code common to all OMAP machines.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#include <linux/config.h>
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/delay.h>
+#include <linux/pm.h>
+#include <linux/console.h>
+#include <linux/serial.h>
+#include <linux/tty.h>
+#include <linux/serial_8250.h>
+#include <linux/serial_reg.h>
+#include <asm/hardware.h>
+#include <asm/system.h>
+#include <asm/pgtable.h>
+#include <asm/mach/map.h>
+#include <asm/hardware/clock.h>
+#include <asm/io.h>
+#include <asm/mach-types.h>
+#include <asm/arch/board.h>
+#include <asm/arch/mux.h>
+#include <asm/arch/fpga.h>
+#include "clock.h"
+#define NO_LENGTH_CHECK 0xffffffff
+extern int omap_bootloader_tag_len;
+extern u8 omap_bootloader_tag[];
+struct omap_board_config_kernel *omap_board_config;
+int omap_board_config_size = 0;
+static const void *get_config(u16 tag, size_t len, int skip, size_t *len_out)
+{
+        struct omap_board_config_kernel *kinfo = NULL;
+        int i;
+#ifdef CONFIG_OMAP_BOOT_TAG
+        struct omap_board_config_entry *info = NULL;
+        if (omap_bootloader_tag_len > 4)
+                info = (struct omap_board_config_entry *) omap_bootloader_tag;
+        while (info != NULL) {
+                u8 *next;
+                if (info->tag == tag) {
+                        if (skip == 0)
+                                break;
+                        skip--;
+                }
+                if ((info->len & 0x03) != 0) {
+                        /* We bail out to avoid an alignment fault */
+                        printk(KERN_ERR "OMAP peripheral config: Length (%d) not word-aligned (tag %04x)\n",
+                               info->len, info->tag);
+                        return NULL;
+                }
+                next = (u8 *) info + sizeof(*info) + info->len;
+                if (next >= omap_bootloader_tag + omap_bootloader_tag_len)
+                        info = NULL;
+                else
+                        info = (struct omap_board_config_entry *) next;
+        }
+        if (info != NULL) {
+                /* Check the length as a lame attempt to check for
+                 * binary inconsistancy. */
+                if (len != NO_LENGTH_CHECK) {
+                        /* Word-align len */
+                        if (len & 0x03)
+                                len = (len + 3) & ~0x03;
+                        if (info->len != len) {
+                                printk(KERN_ERR "OMAP peripheral config: Length mismatch with tag %x (want %d, got %d)\n",
+                                       tag, len, info->len);
+                                return NULL;
+                        }
+                }
+                if (len_out != NULL)
+                        *len_out = info->len;
+                return info->data;
+        }
+#endif
+        /* Try to find the config from the board-specific structures
+         * in the kernel. */
+        for (i = 0; i < omap_board_config_size; i++) {
+                if (omap_board_config[i].tag == tag) {
+                        kinfo = &omap_board_config[i];
+                        break;
+                }
+        }
+        if (kinfo == NULL)
+                return NULL;
+        return kinfo->data;
+}
+const void *__omap_get_config(u16 tag, size_t len, int nr)
+{
+        return get_config(tag, len, nr, NULL);
+}
+EXPORT_SYMBOL(__omap_get_config);
+const void *omap_get_var_config(u16 tag, size_t *len)
+{
+        return get_config(tag, NO_LENGTH_CHECK, 0, len);
+}
+EXPORT_SYMBOL(omap_get_var_config);
+static int __init omap_add_serial_console(void)
+{
+        const struct omap_serial_console_config *info;
+        info = omap_get_config(OMAP_TAG_SERIAL_CONSOLE,
+                               struct omap_serial_console_config);
+        if (info != NULL && info->console_uart) {
+                static char speed[11], *opt = NULL;
+                if (info->console_speed) {
+                        snprintf(speed, sizeof(speed), "%u", info->console_speed);
+                        opt = speed;
+                }
+                return add_preferred_console("ttyS", info->console_uart - 1, opt);
+        }
+        return 0;
+}
+console_initcall(omap_add_serial_console);
diff --git a/arch/arm/plat-omap/cpu-omap.c b/arch/arm/plat-omap/cpu-omap.c
new file mode 100644
index 000000000000..409aac2c4b9d
--- /dev/null
+++ b/arch/arm/plat-omap/cpu-omap.c
@@ -0,0 +1,128 @@
+/*
+ *  linux/arch/arm/plat-omap/cpu-omap.c
+ *
+ *  CPU frequency scaling for OMAP
+ *
+ *  Copyright (C) 2005 Nokia Corporation
+ *  Written by Tony Lindgren <tony@atomide.com>
+ *
+ *  Based on cpu-sa1110.c, Copyright (C) 2001 Russell King
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#include <linux/types.h>
+#include <linux/kernel.h>
+#include <linux/sched.h>
+#include <linux/cpufreq.h>
+#include <linux/delay.h>
+#include <linux/init.h>
+#include <linux/err.h>
+#include <asm/hardware.h>
+#include <asm/mach-types.h>
+#include <asm/io.h>
+#include <asm/system.h>
+#include <asm/hardware/clock.h>
+/* TODO: Add support for SDRAM timing changes */
+int omap_verify_speed(struct cpufreq_policy *policy)
+{
+        struct clk * mpu_clk;
+        if (policy->cpu)
+                return -EINVAL;
+        cpufreq_verify_within_limits(policy, policy->cpuinfo.min_freq,
+                                     policy->cpuinfo.max_freq);
+        mpu_clk = clk_get(NULL, "mpu");
+        if (IS_ERR(mpu_clk))
+                return PTR_ERR(mpu_clk);
+        policy->min = clk_round_rate(mpu_clk, policy->min * 1000) / 1000;
+        policy->max = clk_round_rate(mpu_clk, policy->max * 1000) / 1000;
+        cpufreq_verify_within_limits(policy, policy->cpuinfo.min_freq,
+                                     policy->cpuinfo.max_freq);
+        clk_put(mpu_clk);
+        return 0;
+}
+unsigned int omap_getspeed(unsigned int cpu)
+{
+        struct clk * mpu_clk;
+        unsigned long rate;
+        if (cpu)
+                return 0;
+        mpu_clk = clk_get(NULL, "mpu");
+        if (IS_ERR(mpu_clk))
+                return 0;
+        rate = clk_get_rate(mpu_clk) / 1000;
+        clk_put(mpu_clk);
+        return rate;
+}
+static int omap_target(struct cpufreq_policy *policy,
+                       unsigned int target_freq,
+                       unsigned int relation)
+{
+        struct clk * mpu_clk;
+        struct cpufreq_freqs freqs;
+        int ret = 0;
+        mpu_clk = clk_get(NULL, "mpu");
+        if (IS_ERR(mpu_clk))
+                return PTR_ERR(mpu_clk);
+        freqs.old = omap_getspeed(0);
+        freqs.new = clk_round_rate(mpu_clk, target_freq * 1000) / 1000;
+        freqs.cpu = 0;
+        cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
+        ret = clk_set_rate(mpu_clk, target_freq * 1000);
+        cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
+        clk_put(mpu_clk);
+        return ret;
+}
+static int __init omap_cpu_init(struct cpufreq_policy *policy)
+{
+        struct clk * mpu_clk;
+        mpu_clk = clk_get(NULL, "mpu");
+        if (IS_ERR(mpu_clk))
+                return PTR_ERR(mpu_clk);
+        if (policy->cpu != 0)
+                return -EINVAL;
+        policy->cur = policy->min = policy->max = omap_getspeed(0);
+        policy->governor = CPUFREQ_DEFAULT_GOVERNOR;
+        policy->cpuinfo.min_freq = clk_round_rate(mpu_clk, 0) / 1000;
+        policy->cpuinfo.max_freq = clk_round_rate(mpu_clk, 216000000) / 1000;
+        policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL;
+        clk_put(mpu_clk);
+        return 0;
+}
+static struct cpufreq_driver omap_driver = {
+        .flags          = CPUFREQ_STICKY,
+        .verify         = omap_verify_speed,
+        .target         = omap_target,
+        .get            = omap_getspeed,
+        .init           = omap_cpu_init,
+        .name           = "omap",
+};
+static int __init omap_cpufreq_init(void)
+{
+        return cpufreq_register_driver(&omap_driver);
+}
+arch_initcall(omap_cpufreq_init);
diff --git a/arch/arm/mach-omap/dma.c b/arch/arm/plat-omap/dma.c
index 7a9ebe80d6f8..c0a5c2fa42bd 100644
--- a/arch/arm/mach-omap/dma.c
+++ b/arch/arm/plat-omap/dma.c
@@ -1,5 +1,5 @@
 /*
- * linux/arch/arm/omap/dma.c
+ * linux/arch/arm/plat-omap/dma.c
 *
 * Copyright (C) 2003 Nokia Corporation
 * Author: Juha Yrj�l� <juha.yrjola@nokia.com>
@@ -794,10 +794,6 @@ static void set_b1_regs(void)
        w = omap_readw(OMAP1610_DMA_LCD_CTRL);
        /* Always set the source port as SDRAM for now*/
        w &= ~(0x03 << 6);
-        if (lcd_dma.ext_ctrl)
-                w |= 1 << 8;
-        else
-                w &= ~(1 << 8);
        if (lcd_dma.callback != NULL)
                w |= 1 << 1;            /* Block interrupt enable */
        else
@@ -889,9 +885,15 @@ void omap_enable_lcd_dma(void)
         */
        if (enable_1510_mode || !lcd_dma.ext_ctrl)
                return;
+        w = omap_readw(OMAP1610_DMA_LCD_CTRL);
+        w |= 1 << 8;
+        omap_writew(w, OMAP1610_DMA_LCD_CTRL);
        w = omap_readw(OMAP1610_DMA_LCD_CCR);
        w |= 1 << 7;
        omap_writew(w, OMAP1610_DMA_LCD_CCR);
        lcd_dma.active = 1;
 }
@@ -922,10 +924,19 @@ void omap_setup_lcd_dma(void)
 void omap_stop_lcd_dma(void)
 {
+        u16 w;
        lcd_dma.active = 0;
-        if (!enable_1510_mode && lcd_dma.ext_ctrl)
+        if (enable_1510_mode || !lcd_dma.ext_ctrl)
-                omap_writew(omap_readw(OMAP1610_DMA_LCD_CCR) & ~(1 << 7),
+                return;
-                            OMAP1610_DMA_LCD_CCR);
+        w = omap_readw(OMAP1610_DMA_LCD_CCR);
+        w &= ~(1 << 7);
+        omap_writew(w, OMAP1610_DMA_LCD_CCR);
+        w = omap_readw(OMAP1610_DMA_LCD_CTRL);
+        w &= ~(1 << 8);
+        omap_writew(w, OMAP1610_DMA_LCD_CTRL);
 }
 /*
@@ -972,6 +983,25 @@ dma_addr_t omap_get_dma_dst_pos(int lch)
                             (OMAP_DMA_CDSA_U(lch) << 16));
 }
+int omap_dma_running(void)
+{
+        int lch;
+        /* Check if LCD DMA is running */
+        if (cpu_is_omap16xx())
+                if (omap_readw(OMAP1610_DMA_LCD_CCR) & OMAP_DMA_CCR_EN)
+                        return 1;
+        for (lch = 0; lch < dma_chan_count; lch++) {
+                u16 w;
+                w = omap_readw(OMAP_DMA_CCR(lch));
+                if (w & OMAP_DMA_CCR_EN)
+                        return 1;
+        }
+        return 0;
+}
 static int __init omap_init_dma(void)
 {
        int ch, r;
diff --git a/arch/arm/mach-omap/gpio.c b/arch/arm/plat-omap/gpio.c
index 9045dfd469ad..1c85b4e536c2 100644
--- a/arch/arm/mach-omap/gpio.c
+++ b/arch/arm/plat-omap/gpio.c
@@ -1,5 +1,5 @@
 /*
- *  linux/arch/arm/mach-omap/gpio.c
+ *  linux/arch/arm/plat-omap/gpio.c
 *
 * Support functions for OMAP GPIO
 *
diff --git a/arch/arm/mach-omap/mcbsp.c b/arch/arm/plat-omap/mcbsp.c
index 7c4ad7713091..43567d5edddb 100644
--- a/arch/arm/mach-omap/mcbsp.c
+++ b/arch/arm/plat-omap/mcbsp.c
@@ -1,5 +1,5 @@
 /*
- * linux/arch/arm/omap/mcbsp.c
+ * linux/arch/arm/plat-omap/mcbsp.c
 *
 * Copyright (C) 2004 Nokia Corporation
 * Author: Samuel Ortiz <samuel.ortiz@nokia.com>
@@ -66,6 +66,7 @@ struct omap_mcbsp {
 static struct omap_mcbsp mcbsp[OMAP_MAX_MCBSP_COUNT];
 static struct clk *mcbsp_dsp_ck = 0;
 static struct clk *mcbsp_api_ck = 0;
+static struct clk *mcbsp_dspxor_ck = 0;
 static void omap_mcbsp_dump_reg(u8 id)
@@ -175,7 +176,7 @@ static int omap_mcbsp_check(unsigned int id)
                return 0;
        }
-        if (cpu_is_omap1510() || cpu_is_omap1610() || cpu_is_omap1710()) {
+        if (cpu_is_omap1510() || cpu_is_omap16xx()) {
                if (id > OMAP_MAX_MCBSP_COUNT) {
                        printk(KERN_ERR "OMAP-McBSP: McBSP%d doesn't exist\n", id + 1);
                        return -1;
@@ -191,15 +192,12 @@ static int omap_mcbsp_check(unsigned int id)
 static void omap_mcbsp_dsp_request(void)
 {
-        if (cpu_is_omap1510() || cpu_is_omap1610() || cpu_is_omap1710()) {
+        if (cpu_is_omap1510() || cpu_is_omap16xx()) {
-                omap_writew((omap_readw(ARM_RSTCT1) | (1 << 1) | (1 << 2)),
+                clk_use(mcbsp_dsp_ck);
-                            ARM_RSTCT1);
+                clk_use(mcbsp_api_ck);
-                clk_enable(mcbsp_dsp_ck);
-                clk_enable(mcbsp_api_ck);
                /* enable 12MHz clock to mcbsp 1 & 3 */
-                __raw_writew(__raw_readw(DSP_IDLECT2) | (1 << EN_XORPCK),
+                clk_use(mcbsp_dspxor_ck);
-                             DSP_IDLECT2);
                __raw_writew(__raw_readw(DSP_RSTCT2) | 1 | 1 << 1,
                             DSP_RSTCT2);
        }
@@ -207,10 +205,13 @@ static void omap_mcbsp_dsp_request(void)
 static void omap_mcbsp_dsp_free(void)
 {
-        /* Useless for now */
+        if (cpu_is_omap1510() || cpu_is_omap16xx()) {
+                clk_unuse(mcbsp_dspxor_ck);
+                clk_unuse(mcbsp_dsp_ck);
+                clk_unuse(mcbsp_api_ck);
+        }
 }
 int omap_mcbsp_request(unsigned int id)
 {
        int err;
@@ -350,6 +351,73 @@ void omap_mcbsp_stop(unsigned int id)
 }
+/* polled mcbsp i/o operations */
+int omap_mcbsp_pollwrite(unsigned int id, u16 buf)
+{
+        u32 base = mcbsp[id].io_base;
+        writew(buf, base + OMAP_MCBSP_REG_DXR1);
+        /* if frame sync error - clear the error */
+        if (readw(base + OMAP_MCBSP_REG_SPCR2) & XSYNC_ERR) {
+                /* clear error */
+                writew(readw(base + OMAP_MCBSP_REG_SPCR2) & (~XSYNC_ERR),
+                       base + OMAP_MCBSP_REG_SPCR2);
+                /* resend */
+                return -1;
+        } else {
+                /* wait for transmit confirmation */
+                int attemps = 0;
+                while (!(readw(base + OMAP_MCBSP_REG_SPCR2) & XRDY)) {
+                        if (attemps++ > 1000) {
+                                writew(readw(base + OMAP_MCBSP_REG_SPCR2) &
+                                       (~XRST),
+                                       base + OMAP_MCBSP_REG_SPCR2);
+                                udelay(10);
+                                writew(readw(base + OMAP_MCBSP_REG_SPCR2) |
+                                       (XRST),
+                                       base + OMAP_MCBSP_REG_SPCR2);
+                                udelay(10);
+                                printk(KERN_ERR
+                                       " Could not write to McBSP Register\n");
+                                return -2;
+                        }
+                }
+        }
+        return 0;
+}
+int omap_mcbsp_pollread(unsigned int id, u16 * buf)
+{
+        u32 base = mcbsp[id].io_base;
+        /* if frame sync error - clear the error */
+        if (readw(base + OMAP_MCBSP_REG_SPCR1) & RSYNC_ERR) {
+                /* clear error */
+                writew(readw(base + OMAP_MCBSP_REG_SPCR1) & (~RSYNC_ERR),
+                       base + OMAP_MCBSP_REG_SPCR1);
+                /* resend */
+                return -1;
+        } else {
+                /* wait for recieve confirmation */
+                int attemps = 0;
+                while (!(readw(base + OMAP_MCBSP_REG_SPCR1) & RRDY)) {
+                        if (attemps++ > 1000) {
+                                writew(readw(base + OMAP_MCBSP_REG_SPCR1) &
+                                       (~RRST),
+                                       base + OMAP_MCBSP_REG_SPCR1);
+                                udelay(10);
+                                writew(readw(base + OMAP_MCBSP_REG_SPCR1) |
+                                       (RRST),
+                                       base + OMAP_MCBSP_REG_SPCR1);
+                                udelay(10);
+                                printk(KERN_ERR
+                                       " Could not read from McBSP Register\n");
+                                return -2;
+                        }
+                }
+        }
+        *buf = readw(base + OMAP_MCBSP_REG_DRR1);
+        return 0;
+}
 /*
 * IRQ based word transmission.
 */
@@ -625,10 +693,15 @@ static int __init omap_mcbsp_init(void)
                return PTR_ERR(mcbsp_dsp_ck);
        }
        mcbsp_api_ck = clk_get(0, "api_ck");
-        if (IS_ERR(mcbsp_dsp_ck)) {
+        if (IS_ERR(mcbsp_api_ck)) {
                printk(KERN_ERR "mcbsp: could not acquire api_ck handle.\n");
                return PTR_ERR(mcbsp_api_ck);
        }
+        mcbsp_dspxor_ck = clk_get(0, "dspxor_ck");
+        if (IS_ERR(mcbsp_dspxor_ck)) {
+                printk(KERN_ERR "mcbsp: could not acquire dspxor_ck handle.\n");
+                return PTR_ERR(mcbsp_dspxor_ck);
+        }
 #ifdef CONFIG_ARCH_OMAP730
        if (cpu_is_omap730()) {
@@ -643,7 +716,7 @@ static int __init omap_mcbsp_init(void)
        }
 #endif
 #if defined(CONFIG_ARCH_OMAP16XX)
-        if (cpu_is_omap1610() || cpu_is_omap1710()) {
+        if (cpu_is_omap16xx()) {
                mcbsp_info = mcbsp_1610;
                mcbsp_count = ARRAY_SIZE(mcbsp_1610);
        }
diff --git a/arch/arm/mach-omap/mux.c b/arch/arm/plat-omap/mux.c
index bcf3c6e5ecd0..ea7b955b9c81 100644
--- a/arch/arm/mach-omap/mux.c
+++ b/arch/arm/plat-omap/mux.c
@@ -1,5 +1,5 @@
 /*
- * linux/arch/arm/mach-omap/mux.c
+ * linux/arch/arm/plat-omap/mux.c
 *
 * Utility to set the Omap MUX and PULL_DWN registers from a table in mux.h
 *
@@ -53,19 +53,13 @@ omap_cfg_reg(const reg_cfg_t reg_cfg)
                return -EINVAL;
        }
-        cfg = &reg_cfg_table[reg_cfg];
+        cfg = (reg_cfg_set *)&reg_cfg_table[reg_cfg];
-        /*
-         * We do a pretty long section here with lock on, but pin muxing
-         * should only happen on driver init for each driver, so it's not time
-         * critical.
-         */
-        spin_lock_irqsave(&mux_spin_lock, flags);
        /* Check the mux register in question */
        if (cfg->mux_reg) {
                unsigned        tmp1, tmp2;
+                spin_lock_irqsave(&mux_spin_lock, flags);
                reg_orig = omap_readl(cfg->mux_reg);
                /* The mux registers always seem to be 3 bits long */
@@ -80,11 +74,13 @@ omap_cfg_reg(const reg_cfg_t reg_cfg)
                        warn = 1;
                omap_writel(reg, cfg->mux_reg);
+                spin_unlock_irqrestore(&mux_spin_lock, flags);
        }
        /* Check for pull up or pull down selection on 1610 */
        if (!cpu_is_omap1510()) {
                if (cfg->pu_pd_reg && cfg->pull_val) {
+                        spin_lock_irqsave(&mux_spin_lock, flags);
                        pu_pd_orig = omap_readl(cfg->pu_pd_reg);
                        mask = 1 << cfg->pull_bit;
@@ -100,11 +96,13 @@ omap_cfg_reg(const reg_cfg_t reg_cfg)
                                pu_pd = pu_pd_orig & ~mask;
                        }
                        omap_writel(pu_pd, cfg->pu_pd_reg);
+                        spin_unlock_irqrestore(&mux_spin_lock, flags);
                }
        }
        /* Check for an associated pull down register */
        if (cfg->pull_reg) {
+                spin_lock_irqsave(&mux_spin_lock, flags);
                pull_orig = omap_readl(cfg->pull_reg);
                mask = 1 << cfg->pull_bit;
@@ -121,6 +119,7 @@ omap_cfg_reg(const reg_cfg_t reg_cfg)
                }
                omap_writel(pull, cfg->pull_reg);
+                spin_unlock_irqrestore(&mux_spin_lock, flags);
        }
        if (warn) {
@@ -149,8 +148,6 @@ omap_cfg_reg(const reg_cfg_t reg_cfg)
        }
 #endif
-        spin_unlock_irqrestore(&mux_spin_lock, flags);
 #ifdef CONFIG_OMAP_MUX_ERRORS
        return warn ? -ETXTBSY : 0;
 #else
diff --git a/arch/arm/mach-omap/ocpi.c b/arch/arm/plat-omap/ocpi.c
index c9ced134a75d..1fb16f9edfd5 100644
--- a/arch/arm/mach-omap/ocpi.c
+++ b/arch/arm/plat-omap/ocpi.c
@@ -1,5 +1,5 @@
 /*
- * linux/arch/arm/mach-omap/ocpi.c
+ * linux/arch/arm/plat-omap/ocpi.c
 *
 * Minimal OCP bus support for omap16xx
 *
diff --git a/arch/arm/mach-omap/pm.c b/arch/arm/plat-omap/pm.c
index 6b03ccdc1e92..e6536b16c385 100644
--- a/arch/arm/mach-omap/pm.c
+++ b/arch/arm/plat-omap/pm.c
@@ -1,5 +1,5 @@
 /*
- * linux/arch/arm/mach-omap/pm.c
+ * linux/arch/arm/plat-omap/pm.c
 *
 * OMAP Power Management Routines
 *
diff --git a/arch/arm/mach-omap/sleep.S b/arch/arm/plat-omap/sleep.S
index 4d426d105828..279490ce772b 100644
--- a/arch/arm/mach-omap/sleep.S
+++ b/arch/arm/plat-omap/sleep.S
@@ -1,5 +1,5 @@
 /*
- * linux/arch/arm/mach-omap/sleep.S
+ * linux/arch/arm/plat-omap/sleep.S
 *
 * Low-level OMAP1510/1610 sleep/wakeUp support
 *
diff --git a/arch/arm/mach-omap/usb.c b/arch/arm/plat-omap/usb.c
index fd483ff9f8fe..25bc4a8dd763 100644
--- a/arch/arm/mach-omap/usb.c
+++ b/arch/arm/plat-omap/usb.c
@@ -1,5 +1,5 @@
 /*
- * arch/arm/mach-omap/usb.c -- platform level USB initialization
+ * arch/arm/plat-omap/usb.c -- platform level USB initialization
 *
 * Copyright (C) 2004 Texas Instruments, Inc.
 *
@@ -326,7 +326,7 @@ static u64 ohci_dmamask = ~(u32)0;
 static struct resource ohci_resources[] = {
        {
                .start  = OMAP_OHCI_BASE,
-                .end    = OMAP_OHCI_BASE + 4096,
+                .end    = OMAP_OHCI_BASE + 4096 - 1,
                .flags  = IORESOURCE_MEM,
        },
        {
diff --git a/arch/sparc64/Kconfig b/arch/sparc64/Kconfig
index d78bc13ebbb9..4b1329286242 100644
--- a/arch/sparc64/Kconfig
+++ b/arch/sparc64/Kconfig
@@ -43,6 +43,8 @@ config SPARC64_PAGE_SIZE_4MB
 endchoice
+source kernel/Kconfig.hz
 source "init/Kconfig"
 config SYSVIPC_COMPAT
diff --git a/arch/sparc64/kernel/dtlb_backend.S b/arch/sparc64/kernel/dtlb_backend.S
index b73a3c858770..538522848ad4 100644
--- a/arch/sparc64/kernel/dtlb_backend.S
+++ b/arch/sparc64/kernel/dtlb_backend.S
@@ -16,7 +16,7 @@
 #elif PAGE_SHIFT == 19
 #define SZ_BITS         _PAGE_SZ512K
 #elif PAGE_SHIFT == 22
-#define SZ_BITS         _PAGE_SZ4M
+#define SZ_BITS         _PAGE_SZ4MB
 #endif
 #define VALID_SZ_BITS   (_PAGE_VALID | SZ_BITS)
diff --git a/arch/xtensa/kernel/syscalls.c b/arch/xtensa/kernel/syscalls.c
index 3540d8b119f3..7270509c44de 100644
--- a/arch/xtensa/kernel/syscalls.c
+++ b/arch/xtensa/kernel/syscalls.c
@@ -42,7 +42,6 @@
 #include <asm/mman.h>
 #include <asm/shmparam.h>
 #include <asm/page.h>
-#include <asm/ipc.h>
 extern void do_syscall_trace(void);
 typedef int (*syscall_t)(void *a0,...);
diff --git a/drivers/bluetooth/hci_vhci.c b/drivers/bluetooth/hci_vhci.c
index 3256192dcde8..f9b956fb2b8b 100644
--- a/drivers/bluetooth/hci_vhci.c
+++ b/drivers/bluetooth/hci_vhci.c
@@ -120,7 +120,7 @@ static unsigned int hci_vhci_chr_poll(struct file *file, poll_table * wait)
        poll_wait(file, &hci_vhci->read_wait, wait);
 
-        if (skb_queue_len(&hci_vhci->readq))
+        if (!skb_queue_empty(&hci_vhci->readq))
                return POLLIN | POLLRDNORM;
        return POLLOUT | POLLWRNORM;
diff --git a/drivers/char/drm/Kconfig b/drivers/char/drm/Kconfig
index c2b12eab67c9..123417e43040 100644
--- a/drivers/char/drm/Kconfig
+++ b/drivers/char/drm/Kconfig
@@ -96,3 +96,10 @@ config DRM_SIS
          chipset. If M is selected the module will be called sis. AGP
          support is required for this driver to work.
+config DRM_VIA
+        tristate "Via unichrome video cards"
+        depends on DRM
+        help
+          Choose this option if you have a Via unichrome or compatible video
+          chipset. If M is selected the module will be called via.
diff --git a/drivers/char/drm/Makefile b/drivers/char/drm/Makefile
index 7444dec40b94..ddd941045b1f 100644
--- a/drivers/char/drm/Makefile
+++ b/drivers/char/drm/Makefile
@@ -18,10 +18,14 @@ i915-objs   := i915_drv.o i915_dma.o i915_irq.o i915_mem.o
 radeon-objs := radeon_drv.o radeon_cp.o radeon_state.o radeon_mem.o radeon_irq.o
 ffb-objs    := ffb_drv.o ffb_context.o
 sis-objs    := sis_drv.o sis_ds.o sis_mm.o
+via-objs    := via_irq.o via_drv.o via_ds.o via_map.o via_mm.o via_dma.o via_verifier.o via_video.o
 ifeq ($(CONFIG_COMPAT),y)
 drm-objs    += drm_ioc32.o
 radeon-objs += radeon_ioc32.o
+mga-objs    += mga_ioc32.o
+r128-objs   += r128_ioc32.o
+i915-objs   += i915_ioc32.o
 endif
 obj-$(CONFIG_DRM)       += drm.o
@@ -35,4 +39,5 @@ obj-$(CONFIG_DRM_I830)	+= i830.o
 obj-$(CONFIG_DRM_I915)  += i915.o
 obj-$(CONFIG_DRM_FFB)   += ffb.o
 obj-$(CONFIG_DRM_SIS)   += sis.o
+obj-$(CONFIG_DRM_VIA)   +=via.o
diff --git a/drivers/char/drm/ati_pcigart.c b/drivers/char/drm/ati_pcigart.c
index fdca1876ecd5..0aec5ef481b8 100644
--- a/drivers/char/drm/ati_pcigart.c
+++ b/drivers/char/drm/ati_pcigart.c
@@ -52,7 +52,7 @@
 # define ATI_MAX_PCIGART_PAGES          8192    /**< 32 MB aperture, 4K pages */
 # define ATI_PCIGART_PAGE_SIZE          4096    /**< PCI GART page size */
-unsigned long drm_ati_alloc_pcigart_table( void )
+static unsigned long drm_ati_alloc_pcigart_table( void )
 {
        unsigned long address;
        struct page *page;
diff --git a/drivers/char/drm/drm.h b/drivers/char/drm/drm.h
index 587305282ea8..e8371dd87fbc 100644
--- a/drivers/char/drm/drm.h
+++ b/drivers/char/drm/drm.h
@@ -38,7 +38,9 @@
 #define _DRM_H_
 #if defined(__linux__)
+#if defined(__KERNEL__)
 #include <linux/config.h>
+#endif
 #include <asm/ioctl.h>          /* For _IO* macros */
 #define DRM_IOCTL_NR(n)         _IOC_NR(n)
 #define DRM_IOC_VOID            _IOC_NONE
diff --git a/drivers/char/drm/drmP.h b/drivers/char/drm/drmP.h
index b04ddf12a0ff..5df09cc8c6db 100644
--- a/drivers/char/drm/drmP.h
+++ b/drivers/char/drm/drmP.h
@@ -774,8 +774,6 @@ extern int           drm_cpu_valid( void );
                                /* Driver support (drm_drv.h) */
 extern int           drm_init(struct drm_driver *driver);
 extern void          drm_exit(struct drm_driver *driver);
-extern int           drm_version(struct inode *inode, struct file *filp,
-                                  unsigned int cmd, unsigned long arg);
 extern int           drm_ioctl(struct inode *inode, struct file *filp,
                                unsigned int cmd, unsigned long arg);
 extern long          drm_compat_ioctl(struct file *filp,
@@ -785,28 +783,19 @@ extern int           drm_takedown(drm_device_t * dev);
                                /* Device support (drm_fops.h) */
 extern int           drm_open(struct inode *inode, struct file *filp);
 extern int           drm_stub_open(struct inode *inode, struct file *filp);
-extern int           drm_open_helper(struct inode *inode, struct file *filp,
-                                      drm_device_t *dev);
 extern int           drm_flush(struct file *filp);
 extern int           drm_fasync(int fd, struct file *filp, int on);
 extern int           drm_release(struct inode *inode, struct file *filp);
                                /* Mapping support (drm_vm.h) */
-extern void          drm_vm_open(struct vm_area_struct *vma);
-extern void          drm_vm_close(struct vm_area_struct *vma);
-extern void          drm_vm_shm_close(struct vm_area_struct *vma);
-extern int           drm_mmap_dma(struct file *filp,
-                                   struct vm_area_struct *vma);
 extern int           drm_mmap(struct file *filp, struct vm_area_struct *vma);
 extern unsigned int  drm_poll(struct file *filp, struct poll_table_struct *wait);
-extern ssize_t       drm_read(struct file *filp, char __user *buf, size_t count, loff_t *off);
                                /* Memory management support (drm_memory.h) */
 #include "drm_memory.h"
 extern void          drm_mem_init(void);
 extern int           drm_mem_info(char *buf, char **start, off_t offset,
                                   int request, int *eof, void *data);
-extern void          *drm_calloc(size_t nmemb, size_t size, int area);
 extern void          *drm_realloc(void *oldpt, size_t oldsize, size_t size,
                                   int area);
 extern unsigned long drm_alloc_pages(int order, int area);
@@ -854,9 +843,6 @@ extern int	     drm_newctx( struct inode *inode, struct file *filp,
 extern int           drm_rmctx( struct inode *inode, struct file *filp,
                                 unsigned int cmd, unsigned long arg );
-extern int           drm_context_switch(drm_device_t *dev, int old, int new);
-extern int           drm_context_switch_complete(drm_device_t *dev, int new);
 extern int           drm_ctxbitmap_init( drm_device_t *dev );
 extern void          drm_ctxbitmap_cleanup( drm_device_t *dev );
 extern void          drm_ctxbitmap_free( drm_device_t *dev, int ctx_handle );
@@ -874,9 +860,6 @@ extern int	     drm_rmdraw(struct inode *inode, struct file *filp,
                                /* Authentication IOCTL support (drm_auth.h) */
-extern int           drm_add_magic(drm_device_t *dev, drm_file_t *priv,
-                                    drm_magic_t magic);
-extern int           drm_remove_magic(drm_device_t *dev, drm_magic_t magic);
 extern int           drm_getmagic(struct inode *inode, struct file *filp,
                                   unsigned int cmd, unsigned long arg);
 extern int           drm_authmagic(struct inode *inode, struct file *filp,
@@ -893,13 +876,9 @@ extern int           drm_unlock(struct inode *inode, struct file *filp,
                                 unsigned int cmd, unsigned long arg);
 extern int           drm_lock_take(__volatile__ unsigned int *lock,
                                    unsigned int context);
-extern int           drm_lock_transfer(drm_device_t *dev,
-                                        __volatile__ unsigned int *lock,
-                                        unsigned int context);
 extern int           drm_lock_free(drm_device_t *dev,
                                    __volatile__ unsigned int *lock,
                                    unsigned int context);
-extern int           drm_notifier(void *priv);
                                /* Buffer management support (drm_bufs.h) */
 extern int           drm_order( unsigned long size );
@@ -927,7 +906,6 @@ extern void	     drm_core_reclaim_buffers(drm_device_t *dev, struct file *filp);
                                /* IRQ support (drm_irq.h) */
 extern int           drm_control( struct inode *inode, struct file *filp,
                                   unsigned int cmd, unsigned long arg );
-extern int           drm_irq_install( drm_device_t *dev );
 extern int           drm_irq_uninstall( drm_device_t *dev );
 extern irqreturn_t   drm_irq_handler( DRM_IRQ_ARGS );
 extern void          drm_driver_irq_preinstall( drm_device_t *dev );
@@ -967,7 +945,6 @@ extern int            drm_agp_unbind_memory(DRM_AGP_MEM *handle);
 extern int drm_get_dev(struct pci_dev *pdev, const struct pci_device_id *ent,
                     struct drm_driver *driver);
 extern int drm_put_dev(drm_device_t * dev);
-extern int drm_get_head(drm_device_t * dev, drm_head_t *head);
 extern int drm_put_head(drm_head_t * head);
 extern unsigned int   drm_debug;
 extern unsigned int   drm_cards_limit;
@@ -1064,9 +1041,16 @@ static __inline__ void drm_free(void *pt, size_t size, int area)
 {
        kfree(pt);
 }
+/** Wrapper around kcalloc() */
+static __inline__ void *drm_calloc(size_t nmemb, size_t size, int area)
+{
+        return kcalloc(nmemb, size, GFP_KERNEL);
+}
 #else
 extern void *drm_alloc(size_t size, int area);
 extern void drm_free(void *pt, size_t size, int area);
+extern void *drm_calloc(size_t nmemb, size_t size, int area);
 #endif
 /*@}*/
diff --git a/drivers/char/drm/drm_auth.c b/drivers/char/drm/drm_auth.c
index b428761c4e91..dd140bca8f71 100644
--- a/drivers/char/drm/drm_auth.c
+++ b/drivers/char/drm/drm_auth.c
@@ -87,7 +87,7 @@ static drm_file_t *drm_find_file(drm_device_t *dev, drm_magic_t magic)
 * associated the magic number hash key in drm_device::magiclist, while holding
 * the drm_device::struct_sem lock.
 */
-int drm_add_magic(drm_device_t *dev, drm_file_t *priv, drm_magic_t magic)
+static int drm_add_magic(drm_device_t *dev, drm_file_t *priv, drm_magic_t magic)
 {
        int               hash;
        drm_magic_entry_t *entry;
@@ -124,7 +124,7 @@ int drm_add_magic(drm_device_t *dev, drm_file_t *priv, drm_magic_t magic)
 * Searches and unlinks the entry in drm_device::magiclist with the magic
 * number hash key, while holding the drm_device::struct_sem lock.
 */
-int drm_remove_magic(drm_device_t *dev, drm_magic_t magic)
+static int drm_remove_magic(drm_device_t *dev, drm_magic_t magic)
 {
        drm_magic_entry_t *prev = NULL;
        drm_magic_entry_t *pt;
diff --git a/drivers/char/drm/drm_bufs.c b/drivers/char/drm/drm_bufs.c
index 3407380b865a..4c6191d231b8 100644
--- a/drivers/char/drm/drm_bufs.c
+++ b/drivers/char/drm/drm_bufs.c
@@ -356,8 +356,8 @@ static void drm_cleanup_buf_error(drm_device_t *dev, drm_buf_entry_t *entry)
 * reallocates the buffer list of the same size order to accommodate the new
 * buffers.
 */
-int drm_addbufs_agp( struct inode *inode, struct file *filp,
+static int drm_addbufs_agp( struct inode *inode, struct file *filp,
-                      unsigned int cmd, unsigned long arg )
+                            unsigned int cmd, unsigned long arg )
 {
        drm_file_t *priv = filp->private_data;
        drm_device_t *dev = priv->head->dev;
@@ -521,8 +521,8 @@ int drm_addbufs_agp( struct inode *inode, struct file *filp,
 }
 #endif /* __OS_HAS_AGP */
-int drm_addbufs_pci( struct inode *inode, struct file *filp,
+static int drm_addbufs_pci( struct inode *inode, struct file *filp,
-                      unsigned int cmd, unsigned long arg )
+                            unsigned int cmd, unsigned long arg )
 {
        drm_file_t *priv = filp->private_data;
        drm_device_t *dev = priv->head->dev;
@@ -751,8 +751,8 @@ int drm_addbufs_pci( struct inode *inode, struct file *filp,
 }
-int drm_addbufs_sg( struct inode *inode, struct file *filp,
+static int drm_addbufs_sg( struct inode *inode, struct file *filp,
-                     unsigned int cmd, unsigned long arg )
+                           unsigned int cmd, unsigned long arg )
 {
        drm_file_t *priv = filp->private_data;
        drm_device_t *dev = priv->head->dev;
diff --git a/drivers/char/drm/drm_context.c b/drivers/char/drm/drm_context.c
index fdf661f234ed..a7cfabd1ca2e 100644
--- a/drivers/char/drm/drm_context.c
+++ b/drivers/char/drm/drm_context.c
@@ -84,7 +84,7 @@ failed:
 * drm_device::context_sareas to accommodate the new entry while holding the
 * drm_device::struct_sem lock.
 */
-int drm_ctxbitmap_next( drm_device_t *dev )
+static int drm_ctxbitmap_next( drm_device_t *dev )
 {
        int bit;
@@ -326,7 +326,7 @@ int drm_context_switch( drm_device_t *dev, int old, int new )
 * hardware lock is held, clears the drm_device::context_flag and wakes up
 * drm_device::context_wait.
 */
-int drm_context_switch_complete( drm_device_t *dev, int new )
+static int drm_context_switch_complete( drm_device_t *dev, int new )
 {
        dev->last_context = new;  /* PRE/POST: This is the _only_ writer. */
        dev->last_switch  = jiffies;
diff --git a/drivers/char/drm/drm_drv.c b/drivers/char/drm/drm_drv.c
index 1e37ed0c6b8d..3333c250c4d9 100644
--- a/drivers/char/drm/drm_drv.c
+++ b/drivers/char/drm/drm_drv.c
@@ -51,8 +51,11 @@
 #include "drmP.h"
 #include "drm_core.h"
+static int drm_version(struct inode *inode, struct file *filp,
+                       unsigned int cmd, unsigned long arg);
 /** Ioctl table */
-drm_ioctl_desc_t                  drm_ioctls[] = {
+static drm_ioctl_desc_t           drm_ioctls[] = {
        [DRM_IOCTL_NR(DRM_IOCTL_VERSION)]       = { drm_version,     0, 0 },
        [DRM_IOCTL_NR(DRM_IOCTL_GET_UNIQUE)]    = { drm_getunique,   0, 0 },
        [DRM_IOCTL_NR(DRM_IOCTL_GET_MAGIC)]     = { drm_getmagic,    0, 0 },
@@ -447,8 +450,8 @@ module_exit( drm_core_exit );
 *
 * Fills in the version information in \p arg.
 */
-int drm_version( struct inode *inode, struct file *filp,
+static int drm_version( struct inode *inode, struct file *filp,
-                  unsigned int cmd, unsigned long arg )
+                        unsigned int cmd, unsigned long arg )
 {
        drm_file_t *priv = filp->private_data;
        drm_device_t *dev = priv->head->dev;
diff --git a/drivers/char/drm/drm_fops.c b/drivers/char/drm/drm_fops.c
index 906794247aeb..10e64fde8d78 100644
--- a/drivers/char/drm/drm_fops.c
+++ b/drivers/char/drm/drm_fops.c
@@ -37,6 +37,8 @@
 #include "drmP.h"
 #include <linux/poll.h>
+static int drm_open_helper(struct inode *inode, struct file *filp, drm_device_t *dev);
 static int drm_setup( drm_device_t *dev )
 {
        int i;
@@ -251,7 +253,7 @@ int drm_release( struct inode *inode, struct file *filp )
                }
        }
        
-        if (drm_core_check_feature(dev, DRIVER_HAVE_DMA))
+        if (drm_core_check_feature(dev, DRIVER_HAVE_DMA) && !dev->driver->release)
        {
                dev->driver->reclaim_buffers(dev, filp);
        }
@@ -259,7 +261,7 @@ int drm_release( struct inode *inode, struct file *filp )
        drm_fasync( -1, filp, 0 );
        down( &dev->ctxlist_sem );
-        if ( !list_empty( &dev->ctxlist->head ) ) {
+        if ( dev->ctxlist && (!list_empty(&dev->ctxlist->head))) {
                drm_ctx_list_t *pos, *n;
                list_for_each_entry_safe( pos, n, &dev->ctxlist->head, head ) {
@@ -341,7 +343,7 @@ EXPORT_SYMBOL(drm_release);
 * Creates and initializes a drm_file structure for the file private data in \p
 * filp and add it into the double linked list in \p dev.
 */
-int drm_open_helper(struct inode *inode, struct file *filp, drm_device_t *dev)
+static int drm_open_helper(struct inode *inode, struct file *filp, drm_device_t *dev)
 {
        int          minor = iminor(inode);
        drm_file_t   *priv;
@@ -443,9 +445,3 @@ unsigned int drm_poll(struct file *filp, struct poll_table_struct *wait)
 }
 EXPORT_SYMBOL(drm_poll);
-/** No-op. */
-ssize_t drm_read(struct file *filp, char __user *buf, size_t count, loff_t *off)
-{
-        return 0;
-}
diff --git a/drivers/char/drm/drm_irq.c b/drivers/char/drm/drm_irq.c
index 2e236ebcf27b..cdd4aecd25e2 100644
--- a/drivers/char/drm/drm_irq.c
+++ b/drivers/char/drm/drm_irq.c
@@ -89,7 +89,7 @@ int drm_irq_by_busid(struct inode *inode, struct file *filp,
 * \c drm_driver_irq_preinstall() and \c drm_driver_irq_postinstall() functions
 * before and after the installation.
 */
-int drm_irq_install( drm_device_t *dev )
+static int drm_irq_install( drm_device_t *dev )
 {
        int ret;
        unsigned long sh_flags=0;
diff --git a/drivers/char/drm/drm_lock.c b/drivers/char/drm/drm_lock.c
index d0d6fc661625..4702d863bcc6 100644
--- a/drivers/char/drm/drm_lock.c
+++ b/drivers/char/drm/drm_lock.c
@@ -35,6 +35,11 @@
 #include "drmP.h"
+static int drm_lock_transfer(drm_device_t *dev,
+                             __volatile__ unsigned int *lock,
+                             unsigned int context);
+static int drm_notifier(void *priv);
 /** 
 * Lock ioctl.
 *
@@ -225,8 +230,9 @@ int drm_lock_take(__volatile__ unsigned int *lock, unsigned int context)
 * Resets the lock file pointer.
 * Marks the lock as held by the given context, via the \p cmpxchg instruction.
 */
-int drm_lock_transfer(drm_device_t *dev,
+static int drm_lock_transfer(drm_device_t *dev,
-                       __volatile__ unsigned int *lock, unsigned int context)
+                             __volatile__ unsigned int *lock,
+                             unsigned int context)
 {
        unsigned int old, new, prev;
@@ -282,7 +288,7 @@ int drm_lock_free(drm_device_t *dev,
 * \return one if the signal should be delivered normally, or zero if the
 * signal should be blocked.
 */
-int drm_notifier(void *priv)
+static int drm_notifier(void *priv)
 {
        drm_sigdata_t *s = (drm_sigdata_t *)priv;
        unsigned int  old, new, prev;
diff --git a/drivers/char/drm/drm_memory.c b/drivers/char/drm/drm_memory.c
index 7f53f756c052..ace3d42f4407 100644
--- a/drivers/char/drm/drm_memory.c
+++ b/drivers/char/drm/drm_memory.c
@@ -65,19 +65,6 @@ int drm_mem_info(char *buf, char **start, off_t offset,
        return 0;
 }
-/** Wrapper around kmalloc() */
-void *drm_calloc(size_t nmemb, size_t size, int area)
-{
-        void *addr;
-        addr = kmalloc(size * nmemb, GFP_KERNEL);
-        if (addr != NULL)
-                memset((void *)addr, 0, size * nmemb);
-        return addr;
-}
-EXPORT_SYMBOL(drm_calloc);
 /** Wrapper around kmalloc() and kfree() */
 void *drm_realloc(void *oldpt, size_t oldsize, size_t size, int area)
 {
diff --git a/drivers/char/drm/drm_pciids.h b/drivers/char/drm/drm_pciids.h
index 11c6950158b3..70ca4fa55c9d 100644
--- a/drivers/char/drm/drm_pciids.h
+++ b/drivers/char/drm/drm_pciids.h
@@ -223,3 +223,10 @@
        {0x8086, 0x2772, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \
        {0, 0, 0}
+#define viadrv_PCI_IDS \
+        {0x1106, 0x3022, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \
+        {0x1106, 0x3122, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \
+        {0x1106, 0x7205, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \
+        {0x1106, 0x7204, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \
+        {0, 0, 0}
diff --git a/drivers/char/drm/drm_proc.c b/drivers/char/drm/drm_proc.c
index 6e06e8c6a516..4774087d2e9e 100644
--- a/drivers/char/drm/drm_proc.c
+++ b/drivers/char/drm/drm_proc.c
@@ -57,7 +57,7 @@ static int	   drm_vma_info(char *buf, char **start, off_t offset,
 /**
 * Proc file list.
 */
-struct drm_proc_list {
+static struct drm_proc_list {
        const char *name;       /**< file name */
        int        (*f)(char *, char **, off_t, int, int *, void *);    /**< proc callback*/
 } drm_proc_list[] = {
diff --git a/drivers/char/drm/drm_stub.c b/drivers/char/drm/drm_stub.c
index 8ccbdef7bb3e..48829a1a086a 100644
--- a/drivers/char/drm/drm_stub.c
+++ b/drivers/char/drm/drm_stub.c
@@ -157,52 +157,6 @@ int drm_stub_open(struct inode *inode, struct file *filp)
        return err;
 }
-/**
- * Register.
- *
- * \param pdev - PCI device structure
- * \param ent entry from the PCI ID table with device type flags
- * \return zero on success or a negative number on failure.
- *
- * Attempt to gets inter module "drm" information. If we are first
- * then register the character device and inter module information.
- * Try and register, if we fail to register, backout previous work.
- */
-int drm_get_dev(struct pci_dev *pdev, const struct pci_device_id *ent,
-              struct drm_driver *driver)
-{
-        drm_device_t *dev;
-        int ret;
-        DRM_DEBUG("\n");
-        dev = drm_calloc(1, sizeof(*dev), DRM_MEM_STUB);
-        if (!dev)
-                return -ENOMEM;
-        pci_enable_device(pdev);
-        if ((ret = drm_fill_in_dev(dev, pdev, ent, driver))) {
-                printk(KERN_ERR "DRM: Fill_in_dev failed.\n");
-                goto err_g1;
-        }
-        if ((ret = drm_get_head(dev, &dev->primary)))
-                goto err_g1;
-        /* postinit is a required function to display the signon banner */
-        /* drivers add secondary heads here if needed */
-        if ((ret = dev->driver->postinit(dev, ent->driver_data)))
-                goto err_g1;
-        return 0;
-err_g1:
-        drm_free(dev, sizeof(*dev), DRM_MEM_STUB);
-        return ret;
-}
-EXPORT_SYMBOL(drm_get_dev);
 /**
 * Get a secondary minor number.
 *
@@ -214,7 +168,7 @@ EXPORT_SYMBOL(drm_get_dev);
 * create the proc init entry via proc_init(). This routines assigns
 * minor numbers to secondary heads of multi-headed cards
 */
-int drm_get_head(drm_device_t *dev, drm_head_t *head)
+static int drm_get_head(drm_device_t *dev, drm_head_t *head)
 {
        drm_head_t **heads = drm_heads;
        int ret;
@@ -262,6 +216,50 @@ err_g1:
        return ret;
 }
                
+/**
+ * Register.
+ *
+ * \param pdev - PCI device structure
+ * \param ent entry from the PCI ID table with device type flags
+ * \return zero on success or a negative number on failure.
+ *
+ * Attempt to gets inter module "drm" information. If we are first
+ * then register the character device and inter module information.
+ * Try and register, if we fail to register, backout previous work.
+ */
+int drm_get_dev(struct pci_dev *pdev, const struct pci_device_id *ent,
+              struct drm_driver *driver)
+{
+        drm_device_t *dev;
+        int ret;
+        DRM_DEBUG("\n");
+        dev = drm_calloc(1, sizeof(*dev), DRM_MEM_STUB);
+        if (!dev)
+                return -ENOMEM;
+        pci_enable_device(pdev);
+        if ((ret = drm_fill_in_dev(dev, pdev, ent, driver))) {
+                printk(KERN_ERR "DRM: Fill_in_dev failed.\n");
+                goto err_g1;
+        }
+        if ((ret = drm_get_head(dev, &dev->primary)))
+                goto err_g1;
+        /* postinit is a required function to display the signon banner */
+        /* drivers add secondary heads here if needed */
+        if ((ret = dev->driver->postinit(dev, ent->driver_data)))
+                goto err_g1;
+        return 0;
+err_g1:
+        drm_free(dev, sizeof(*dev), DRM_MEM_STUB);
+        return ret;
+}
+EXPORT_SYMBOL(drm_get_dev);
 /**
 * Put a device minor number.
diff --git a/drivers/char/drm/drm_vm.c b/drivers/char/drm/drm_vm.c
index fc72f30f312b..621220f3f372 100644
--- a/drivers/char/drm/drm_vm.c
+++ b/drivers/char/drm/drm_vm.c
@@ -38,6 +38,8 @@
 #include <linux/efi.h>
 #endif
+static void drm_vm_open(struct vm_area_struct *vma);
+static void drm_vm_close(struct vm_area_struct *vma);
 /**
 * \c nopage method for AGP virtual memory.
@@ -163,7 +165,7 @@ static __inline__ struct page *drm_do_vm_shm_nopage(struct vm_area_struct *vma,
 * Deletes map information if we are the last
 * person to close a mapping and it's not in the global maplist.
 */
-void drm_vm_shm_close(struct vm_area_struct *vma)
+static void drm_vm_shm_close(struct vm_area_struct *vma)
 {
        drm_file_t      *priv   = vma->vm_file->private_data;
        drm_device_t    *dev    = priv->head->dev;
@@ -399,7 +401,7 @@ static struct vm_operations_struct   drm_vm_sg_ops = {
 * Create a new drm_vma_entry structure as the \p vma private data entry and
 * add it to drm_device::vmalist.
 */
-void drm_vm_open(struct vm_area_struct *vma)
+static void drm_vm_open(struct vm_area_struct *vma)
 {
        drm_file_t      *priv   = vma->vm_file->private_data;
        drm_device_t    *dev    = priv->head->dev;
@@ -428,7 +430,7 @@ void drm_vm_open(struct vm_area_struct *vma)
 * Search the \p vma private data entry in drm_device::vmalist, unlink it, and
 * free it.
 */
-void drm_vm_close(struct vm_area_struct *vma)
+static void drm_vm_close(struct vm_area_struct *vma)
 {
        drm_file_t      *priv   = vma->vm_file->private_data;
        drm_device_t    *dev    = priv->head->dev;
@@ -463,7 +465,7 @@ void drm_vm_close(struct vm_area_struct *vma)
 * Sets the virtual memory area operations structure to vm_dma_ops, the file
 * pointer, and calls vm_open().
 */
-int drm_mmap_dma(struct file *filp, struct vm_area_struct *vma)
+static int drm_mmap_dma(struct file *filp, struct vm_area_struct *vma)
 {
        drm_file_t       *priv   = filp->private_data;
        drm_device_t     *dev;
diff --git a/drivers/char/drm/i810_dma.c b/drivers/char/drm/i810_dma.c
index 24857cc6c23b..18e0b7622893 100644
--- a/drivers/char/drm/i810_dma.c
+++ b/drivers/char/drm/i810_dma.c
@@ -90,16 +90,7 @@ static int i810_freelist_put(drm_device_t *dev, drm_buf_t *buf)
        return 0;
 }
-static struct file_operations i810_buffer_fops = {
+static int i810_mmap_buffers(struct file *filp, struct vm_area_struct *vma)
-        .open    = drm_open,
-        .flush   = drm_flush,
-        .release = drm_release,
-        .ioctl   = drm_ioctl,
-        .mmap    = i810_mmap_buffers,
-        .fasync  = drm_fasync,
-};
-int i810_mmap_buffers(struct file *filp, struct vm_area_struct *vma)
 {
        drm_file_t          *priv         = filp->private_data;
        drm_device_t        *dev;
@@ -126,6 +117,15 @@ int i810_mmap_buffers(struct file *filp, struct vm_area_struct *vma)
        return 0;
 }
+static struct file_operations i810_buffer_fops = {
+        .open    = drm_open,
+        .flush   = drm_flush,
+        .release = drm_release,
+        .ioctl   = drm_ioctl,
+        .mmap    = i810_mmap_buffers,
+        .fasync  = drm_fasync,
+};
 static int i810_map_buffer(drm_buf_t *buf, struct file *filp)
 {
        drm_file_t        *priv   = filp->private_data;
@@ -1003,8 +1003,8 @@ void i810_reclaim_buffers(drm_device_t *dev, struct file *filp)
        }
 }
-int i810_flush_ioctl(struct inode *inode, struct file *filp,
+static int i810_flush_ioctl(struct inode *inode, struct file *filp,
-                     unsigned int cmd, unsigned long arg)
+                            unsigned int cmd, unsigned long arg)
 {
        drm_file_t        *priv   = filp->private_data;
        drm_device_t      *dev    = priv->head->dev;
diff --git a/drivers/char/drm/i810_drv.h b/drivers/char/drm/i810_drv.h
index fa23ca454e57..1b40538d1725 100644
--- a/drivers/char/drm/i810_drv.h
+++ b/drivers/char/drm/i810_drv.h
@@ -115,7 +115,6 @@ typedef struct drm_i810_private {
                                /* i810_dma.c */
 extern void i810_reclaim_buffers(drm_device_t *dev, struct file *filp);
-extern int i810_mmap_buffers(struct file *filp, struct vm_area_struct *vma);
 extern int i810_driver_dma_quiescent(drm_device_t *dev);
 extern void i810_driver_release(drm_device_t *dev, struct file *filp);
diff --git a/drivers/char/drm/i830_dma.c b/drivers/char/drm/i830_dma.c
index 98adccf8e434..dc7733035864 100644
--- a/drivers/char/drm/i830_dma.c
+++ b/drivers/char/drm/i830_dma.c
@@ -92,16 +92,7 @@ static int i830_freelist_put(drm_device_t *dev, drm_buf_t *buf)
        return 0;
 }
-static struct file_operations i830_buffer_fops = {
+static int i830_mmap_buffers(struct file *filp, struct vm_area_struct *vma)
-        .open    = drm_open,
-        .flush   = drm_flush,
-        .release = drm_release,
-        .ioctl   = drm_ioctl,
-        .mmap    = i830_mmap_buffers,
-        .fasync  = drm_fasync,
-};
-int i830_mmap_buffers(struct file *filp, struct vm_area_struct *vma)
 {
        drm_file_t          *priv         = filp->private_data;
        drm_device_t        *dev;
@@ -128,6 +119,15 @@ int i830_mmap_buffers(struct file *filp, struct vm_area_struct *vma)
        return 0;
 }
+static struct file_operations i830_buffer_fops = {
+        .open    = drm_open,
+        .flush   = drm_flush,
+        .release = drm_release,
+        .ioctl   = drm_ioctl,
+        .mmap    = i830_mmap_buffers,
+        .fasync  = drm_fasync,
+};
 static int i830_map_buffer(drm_buf_t *buf, struct file *filp)
 {
        drm_file_t        *priv   = filp->private_data;
diff --git a/drivers/char/drm/i830_drv.c b/drivers/char/drm/i830_drv.c
index aa80ad6a5ee0..bc36be76b8b2 100644
--- a/drivers/char/drm/i830_drv.c
+++ b/drivers/char/drm/i830_drv.c
@@ -40,7 +40,7 @@
 #include "drm_pciids.h"
-int postinit( struct drm_device *dev, unsigned long flags )
+static int postinit( struct drm_device *dev, unsigned long flags )
 {
        dev->counters += 4;
        dev->types[6] = _DRM_STAT_IRQ;
diff --git a/drivers/char/drm/i830_drv.h b/drivers/char/drm/i830_drv.h
index d4b2d093d6ab..df7746131dea 100644
--- a/drivers/char/drm/i830_drv.h
+++ b/drivers/char/drm/i830_drv.h
@@ -123,8 +123,6 @@ typedef struct drm_i830_private {
 /* i830_dma.c */
 extern void i830_reclaim_buffers(drm_device_t *dev, struct file *filp);
-extern int i830_mmap_buffers(struct file *filp, struct vm_area_struct *vma);
 /* i830_irq.c */
 extern int i830_irq_emit( struct inode *inode, struct file *filp, 
                          unsigned int cmd, unsigned long arg );
diff --git a/drivers/char/drm/i830_irq.c b/drivers/char/drm/i830_irq.c
index 6d7729ffe2dc..a5923e5d0a77 100644
--- a/drivers/char/drm/i830_irq.c
+++ b/drivers/char/drm/i830_irq.c
@@ -54,8 +54,7 @@ irqreturn_t i830_driver_irq_handler( DRM_IRQ_ARGS )
        return IRQ_HANDLED;
 }
+static int i830_emit_irq(drm_device_t *dev)
-int i830_emit_irq(drm_device_t *dev)
 {
        drm_i830_private_t *dev_priv = dev->dev_private;
        RING_LOCALS;
@@ -73,7 +72,7 @@ int i830_emit_irq(drm_device_t *dev)
 }
-int i830_wait_irq(drm_device_t *dev, int irq_nr)
+static int i830_wait_irq(drm_device_t *dev, int irq_nr)
 {
        drm_i830_private_t *dev_priv = 
           (drm_i830_private_t *)dev->dev_private;
diff --git a/drivers/char/drm/i915_dma.c b/drivers/char/drm/i915_dma.c
index b5903f9f1423..acf9e52a9507 100644
--- a/drivers/char/drm/i915_dma.c
+++ b/drivers/char/drm/i915_dma.c
@@ -32,23 +32,6 @@
 #include "i915_drm.h"
 #include "i915_drv.h"
-drm_ioctl_desc_t i915_ioctls[] = {
-        [DRM_IOCTL_NR(DRM_I915_INIT)] = {i915_dma_init, 1, 1},
-        [DRM_IOCTL_NR(DRM_I915_FLUSH)] = {i915_flush_ioctl, 1, 0},
-        [DRM_IOCTL_NR(DRM_I915_FLIP)] = {i915_flip_bufs, 1, 0},
-        [DRM_IOCTL_NR(DRM_I915_BATCHBUFFER)] = {i915_batchbuffer, 1, 0},
-        [DRM_IOCTL_NR(DRM_I915_IRQ_EMIT)] = {i915_irq_emit, 1, 0},
-        [DRM_IOCTL_NR(DRM_I915_IRQ_WAIT)] = {i915_irq_wait, 1, 0},
-        [DRM_IOCTL_NR(DRM_I915_GETPARAM)] = {i915_getparam, 1, 0},
-        [DRM_IOCTL_NR(DRM_I915_SETPARAM)] = {i915_setparam, 1, 1},
-        [DRM_IOCTL_NR(DRM_I915_ALLOC)] = {i915_mem_alloc, 1, 0},
-        [DRM_IOCTL_NR(DRM_I915_FREE)] = {i915_mem_free, 1, 0},
-        [DRM_IOCTL_NR(DRM_I915_INIT_HEAP)] = {i915_mem_init_heap, 1, 1},
-        [DRM_IOCTL_NR(DRM_I915_CMDBUFFER)] = {i915_cmdbuffer, 1, 0}
-};
-int i915_max_ioctl = DRM_ARRAY_SIZE(i915_ioctls);
 /* Really want an OS-independent resettable timer.  Would like to have
 * this loop run for (eg) 3 sec, but have the timer reset every time
 * the head pointer changes, so that EBUSY only happens if the ring
@@ -95,7 +78,7 @@ void i915_kernel_lost_context(drm_device_t * dev)
                dev_priv->sarea_priv->perf_boxes |= I915_BOX_RING_EMPTY;
 }
-int i915_dma_cleanup(drm_device_t * dev)
+static int i915_dma_cleanup(drm_device_t * dev)
 {
        /* Make sure interrupts are disabled here because the uninstall ioctl
         * may not have been called from userspace and after dev_private
@@ -247,7 +230,7 @@ static int i915_resume(drm_device_t * dev)
        return 0;
 }
-int i915_dma_init(DRM_IOCTL_ARGS)
+static int i915_dma_init(DRM_IOCTL_ARGS)
 {
        DRM_DEVICE;
        drm_i915_private_t *dev_priv;
@@ -558,7 +541,7 @@ static int i915_quiescent(drm_device_t * dev)
        return i915_wait_ring(dev, dev_priv->ring.Size - 8, __FUNCTION__);
 }
-int i915_flush_ioctl(DRM_IOCTL_ARGS)
+static int i915_flush_ioctl(DRM_IOCTL_ARGS)
 {
        DRM_DEVICE;
@@ -567,7 +550,7 @@ int i915_flush_ioctl(DRM_IOCTL_ARGS)
        return i915_quiescent(dev);
 }
-int i915_batchbuffer(DRM_IOCTL_ARGS)
+static int i915_batchbuffer(DRM_IOCTL_ARGS)
 {
        DRM_DEVICE;
        drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
@@ -601,7 +584,7 @@ int i915_batchbuffer(DRM_IOCTL_ARGS)
        return ret;
 }
-int i915_cmdbuffer(DRM_IOCTL_ARGS)
+static int i915_cmdbuffer(DRM_IOCTL_ARGS)
 {
        DRM_DEVICE;
        drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
@@ -637,18 +620,7 @@ int i915_cmdbuffer(DRM_IOCTL_ARGS)
        return 0;
 }
-int i915_do_cleanup_pageflip(drm_device_t * dev)
+static int i915_flip_bufs(DRM_IOCTL_ARGS)
-{
-        drm_i915_private_t *dev_priv = dev->dev_private;
-        DRM_DEBUG("%s\n", __FUNCTION__);
-        if (dev_priv->current_page != 0)
-                i915_dispatch_flip(dev);
-        return 0;
-}
-int i915_flip_bufs(DRM_IOCTL_ARGS)
 {
        DRM_DEVICE;
@@ -659,7 +631,7 @@ int i915_flip_bufs(DRM_IOCTL_ARGS)
        return i915_dispatch_flip(dev);
 }
-int i915_getparam(DRM_IOCTL_ARGS)
+static int i915_getparam(DRM_IOCTL_ARGS)
 {
        DRM_DEVICE;
        drm_i915_private_t *dev_priv = dev->dev_private;
@@ -694,7 +666,7 @@ int i915_getparam(DRM_IOCTL_ARGS)
        return 0;
 }
-int i915_setparam(DRM_IOCTL_ARGS)
+static int i915_setparam(DRM_IOCTL_ARGS)
 {
        DRM_DEVICE;
        drm_i915_private_t *dev_priv = dev->dev_private;
@@ -743,3 +715,19 @@ void i915_driver_prerelease(drm_device_t *dev, DRMFILE filp)
        }
 }
+drm_ioctl_desc_t i915_ioctls[] = {
+        [DRM_IOCTL_NR(DRM_I915_INIT)] = {i915_dma_init, 1, 1},
+        [DRM_IOCTL_NR(DRM_I915_FLUSH)] = {i915_flush_ioctl, 1, 0},
+        [DRM_IOCTL_NR(DRM_I915_FLIP)] = {i915_flip_bufs, 1, 0},
+        [DRM_IOCTL_NR(DRM_I915_BATCHBUFFER)] = {i915_batchbuffer, 1, 0},
+        [DRM_IOCTL_NR(DRM_I915_IRQ_EMIT)] = {i915_irq_emit, 1, 0},
+        [DRM_IOCTL_NR(DRM_I915_IRQ_WAIT)] = {i915_irq_wait, 1, 0},
+        [DRM_IOCTL_NR(DRM_I915_GETPARAM)] = {i915_getparam, 1, 0},
+        [DRM_IOCTL_NR(DRM_I915_SETPARAM)] = {i915_setparam, 1, 1},
+        [DRM_IOCTL_NR(DRM_I915_ALLOC)] = {i915_mem_alloc, 1, 0},
+        [DRM_IOCTL_NR(DRM_I915_FREE)] = {i915_mem_free, 1, 0},
+        [DRM_IOCTL_NR(DRM_I915_INIT_HEAP)] = {i915_mem_init_heap, 1, 1},
+        [DRM_IOCTL_NR(DRM_I915_CMDBUFFER)] = {i915_cmdbuffer, 1, 0}
+};
+int i915_max_ioctl = DRM_ARRAY_SIZE(i915_ioctls);
diff --git a/drivers/char/drm/i915_drv.c b/drivers/char/drm/i915_drv.c
index e6a9e1d1d283..1f59d3fc79bc 100644
--- a/drivers/char/drm/i915_drv.c
+++ b/drivers/char/drm/i915_drv.c
@@ -34,7 +34,7 @@
 #include "drm_pciids.h"
-int postinit( struct drm_device *dev, unsigned long flags )
+static int postinit( struct drm_device *dev, unsigned long flags )
 {
        dev->counters += 4;
        dev->types[6] = _DRM_STAT_IRQ;
@@ -97,6 +97,9 @@ static struct drm_driver driver = {
                .mmap = drm_mmap,
                .poll = drm_poll,
                .fasync = drm_fasync,
+#ifdef CONFIG_COMPAT
+                .compat_ioctl = i915_compat_ioctl,
+#endif
        },
        .pci_driver = {
                .name          = DRIVER_NAME,
diff --git a/drivers/char/drm/i915_drv.h b/drivers/char/drm/i915_drv.h
index fa940d64b85d..9c37d2367dd5 100644
--- a/drivers/char/drm/i915_drv.h
+++ b/drivers/char/drm/i915_drv.h
@@ -99,14 +99,6 @@ typedef struct drm_i915_private {
 } drm_i915_private_t;
                                /* i915_dma.c */
-extern int i915_dma_init(DRM_IOCTL_ARGS);
-extern int i915_dma_cleanup(drm_device_t * dev);
-extern int i915_flush_ioctl(DRM_IOCTL_ARGS);
-extern int i915_batchbuffer(DRM_IOCTL_ARGS);
-extern int i915_flip_bufs(DRM_IOCTL_ARGS);
-extern int i915_getparam(DRM_IOCTL_ARGS);
-extern int i915_setparam(DRM_IOCTL_ARGS);
-extern int i915_cmdbuffer(DRM_IOCTL_ARGS);
 extern void i915_kernel_lost_context(drm_device_t * dev);
 extern void i915_driver_pretakedown(drm_device_t *dev);
 extern void i915_driver_prerelease(drm_device_t *dev, DRMFILE filp);
@@ -114,8 +106,6 @@ extern void i915_driver_prerelease(drm_device_t *dev, DRMFILE filp);
 /* i915_irq.c */
 extern int i915_irq_emit(DRM_IOCTL_ARGS);
 extern int i915_irq_wait(DRM_IOCTL_ARGS);
-extern int i915_wait_irq(drm_device_t * dev, int irq_nr);
-extern int i915_emit_irq(drm_device_t * dev);
 extern irqreturn_t i915_driver_irq_handler(DRM_IRQ_ARGS);
 extern void i915_driver_irq_preinstall(drm_device_t *dev);
@@ -130,6 +120,10 @@ extern void i915_mem_takedown(struct mem_block **heap);
 extern void i915_mem_release(drm_device_t * dev,
                             DRMFILE filp, struct mem_block *heap);
+extern long i915_compat_ioctl(struct file *filp, unsigned int cmd,
+                              unsigned long arg);
 #define I915_READ(reg)          DRM_READ32(dev_priv->mmio_map, reg)
 #define I915_WRITE(reg,val)     DRM_WRITE32(dev_priv->mmio_map, reg, val)
 #define I915_READ16(reg)        DRM_READ16(dev_priv->mmio_map, reg)
diff --git a/drivers/char/drm/i915_ioc32.c b/drivers/char/drm/i915_ioc32.c
new file mode 100644
index 000000000000..fe009e1b3a3f
--- /dev/null
+++ b/drivers/char/drm/i915_ioc32.c
@@ -0,0 +1,221 @@
+/**
+ * \file i915_ioc32.c
+ *
+ * 32-bit ioctl compatibility routines for the i915 DRM.
+ *
+ * \author Alan Hourihane <alanh@fairlite.demon.co.uk> 
+ *
+ *
+ * Copyright (C) Paul Mackerras 2005
+ * Copyright (C) Alan Hourihane 2005
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHOR BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ */
+#include <linux/compat.h>
+#include <linux/ioctl32.h>
+#include "drmP.h"
+#include "drm.h"
+#include "i915_drm.h"
+typedef struct _drm_i915_batchbuffer32 {
+        int start;              /* agp offset */
+        int used;               /* nr bytes in use */
+        int DR1;                /* hw flags for GFX_OP_DRAWRECT_INFO */
+        int DR4;                /* window origin for GFX_OP_DRAWRECT_INFO */
+        int num_cliprects;      /* mulitpass with multiple cliprects? */
+        u32 cliprects;  /* pointer to userspace cliprects */
+} drm_i915_batchbuffer32_t;
+static int compat_i915_batchbuffer(struct file *file, unsigned int cmd,
+                           unsigned long arg)
+{
+        drm_i915_batchbuffer32_t batchbuffer32;
+        drm_i915_batchbuffer_t __user *batchbuffer;
+        
+        if (copy_from_user(&batchbuffer32, (void __user *)arg, sizeof(batchbuffer32)))
+                return -EFAULT;
+        
+        batchbuffer = compat_alloc_user_space(sizeof(*batchbuffer));
+        if (!access_ok(VERIFY_WRITE, batchbuffer, sizeof(*batchbuffer))
+            || __put_user(batchbuffer32.start, &batchbuffer->start)
+            || __put_user(batchbuffer32.used, &batchbuffer->used)
+            || __put_user(batchbuffer32.DR1, &batchbuffer->DR1)
+            || __put_user(batchbuffer32.DR4, &batchbuffer->DR4)
+            || __put_user(batchbuffer32.num_cliprects, &batchbuffer->num_cliprects)
+            || __put_user((int __user *)(unsigned long)batchbuffer32.cliprects,
+                          &batchbuffer->cliprects))
+                return -EFAULT;
+        
+        return drm_ioctl(file->f_dentry->d_inode, file,
+                         DRM_IOCTL_I915_BATCHBUFFER, (unsigned long) batchbuffer);
+}
+typedef struct _drm_i915_cmdbuffer32 {
+        u32 buf;        /* pointer to userspace command buffer */
+        int sz;                 /* nr bytes in buf */
+        int DR1;                /* hw flags for GFX_OP_DRAWRECT_INFO */
+        int DR4;                /* window origin for GFX_OP_DRAWRECT_INFO */
+        int num_cliprects;      /* mulitpass with multiple cliprects? */
+        u32 cliprects;  /* pointer to userspace cliprects */
+} drm_i915_cmdbuffer32_t;
+static int compat_i915_cmdbuffer(struct file *file, unsigned int cmd,
+                           unsigned long arg)
+{
+        drm_i915_cmdbuffer32_t cmdbuffer32;
+        drm_i915_cmdbuffer_t __user *cmdbuffer;
+        
+        if (copy_from_user(&cmdbuffer32, (void __user *)arg, sizeof(cmdbuffer32)))
+                return -EFAULT;
+        
+        cmdbuffer = compat_alloc_user_space(sizeof(*cmdbuffer));
+        if (!access_ok(VERIFY_WRITE, cmdbuffer, sizeof(*cmdbuffer))
+            || __put_user((int __user *)(unsigned long)cmdbuffer32.buf,
+                          &cmdbuffer->buf)
+            || __put_user(cmdbuffer32.sz, &cmdbuffer->sz)
+            || __put_user(cmdbuffer32.DR1, &cmdbuffer->DR1)
+            || __put_user(cmdbuffer32.DR4, &cmdbuffer->DR4)
+            || __put_user(cmdbuffer32.num_cliprects, &cmdbuffer->num_cliprects)
+            || __put_user((int __user *)(unsigned long)cmdbuffer32.cliprects,
+                          &cmdbuffer->cliprects))
+                return -EFAULT;
+        
+        return drm_ioctl(file->f_dentry->d_inode, file,
+                         DRM_IOCTL_I915_CMDBUFFER, (unsigned long) cmdbuffer);
+}
+typedef struct drm_i915_irq_emit32 {
+        u32 irq_seq;
+} drm_i915_irq_emit32_t;
+static int compat_i915_irq_emit(struct file *file, unsigned int cmd,
+                                  unsigned long arg)
+{
+        drm_i915_irq_emit32_t req32;
+        drm_i915_irq_emit_t __user *request;
+        if (copy_from_user(&req32, (void __user *) arg, sizeof(req32)))
+                return -EFAULT;
+        request = compat_alloc_user_space(sizeof(*request));
+        if (!access_ok(VERIFY_WRITE, request, sizeof(*request))
+            || __put_user((int __user *)(unsigned long)req32.irq_seq,
+                          &request->irq_seq))
+                return -EFAULT;
+        return drm_ioctl(file->f_dentry->d_inode, file,
+                         DRM_IOCTL_I915_IRQ_EMIT, (unsigned long) request);
+}
+typedef struct drm_i915_getparam32 {
+        int param;
+        u32 value;
+} drm_i915_getparam32_t;
+static int compat_i915_getparam(struct file *file, unsigned int cmd,
+                                     unsigned long arg)
+{
+        drm_i915_getparam32_t req32;
+        drm_i915_getparam_t __user *request;
+        if (copy_from_user(&req32, (void __user *) arg, sizeof(req32)))
+                return -EFAULT;
+        request = compat_alloc_user_space(sizeof(*request));
+        if (!access_ok(VERIFY_WRITE, request, sizeof(*request))
+            || __put_user(req32.param, &request->param)
+            || __put_user((void __user *)(unsigned long)req32.value,
+                          &request->value))
+                return -EFAULT;
+        return drm_ioctl(file->f_dentry->d_inode, file,
+                         DRM_IOCTL_I915_GETPARAM, (unsigned long) request);
+}
+typedef struct drm_i915_mem_alloc32 {
+        int region;
+        int alignment;
+        int size;
+        u32 region_offset;      /* offset from start of fb or agp */
+} drm_i915_mem_alloc32_t;
+static int compat_i915_alloc(struct file *file, unsigned int cmd,
+                                     unsigned long arg)
+{
+        drm_i915_mem_alloc32_t req32;
+        drm_i915_mem_alloc_t __user *request;
+        if (copy_from_user(&req32, (void __user *) arg, sizeof(req32)))
+                return -EFAULT;
+        request = compat_alloc_user_space(sizeof(*request));
+        if (!access_ok(VERIFY_WRITE, request, sizeof(*request))
+            || __put_user(req32.region, &request->region)
+            || __put_user(req32.alignment, &request->alignment)
+            || __put_user(req32.size, &request->size)
+            || __put_user((void __user *)(unsigned long)req32.region_offset,
+                          &request->region_offset))
+                return -EFAULT;
+        return drm_ioctl(file->f_dentry->d_inode, file,
+                         DRM_IOCTL_I915_ALLOC, (unsigned long) request);
+}
+drm_ioctl_compat_t *i915_compat_ioctls[] = {
+        [DRM_I915_BATCHBUFFER] = compat_i915_batchbuffer,
+        [DRM_I915_CMDBUFFER] = compat_i915_cmdbuffer,
+        [DRM_I915_GETPARAM] = compat_i915_getparam,
+        [DRM_I915_IRQ_EMIT] = compat_i915_irq_emit,
+        [DRM_I915_ALLOC] = compat_i915_alloc
+};
+/**
+ * Called whenever a 32-bit process running under a 64-bit kernel
+ * performs an ioctl on /dev/dri/card<n>.
+ *
+ * \param filp file pointer.
+ * \param cmd command.
+ * \param arg user argument.
+ * \return zero on success or negative number on failure.
+ */
+long i915_compat_ioctl(struct file *filp, unsigned int cmd,
+                         unsigned long arg)
+{
+        unsigned int nr = DRM_IOCTL_NR(cmd);
+        drm_ioctl_compat_t *fn = NULL;
+        int ret;
+        if (nr < DRM_COMMAND_BASE)
+                return drm_compat_ioctl(filp, cmd, arg);
+        
+        if (nr < DRM_COMMAND_BASE + DRM_ARRAY_SIZE(i915_compat_ioctls))
+                fn = i915_compat_ioctls[nr - DRM_COMMAND_BASE];
+        lock_kernel();          /* XXX for now */
+        if (fn != NULL)
+                ret = (*fn)(filp, cmd, arg);
+        else
+                ret = drm_ioctl(filp->f_dentry->d_inode, filp, cmd, arg);
+        unlock_kernel();
+        return ret;
+}
diff --git a/drivers/char/drm/i915_irq.c b/drivers/char/drm/i915_irq.c
index a101cc9cfd7e..4fa448ee846b 100644
--- a/drivers/char/drm/i915_irq.c
+++ b/drivers/char/drm/i915_irq.c
@@ -56,7 +56,7 @@ irqreturn_t i915_driver_irq_handler(DRM_IRQ_ARGS)
        return IRQ_HANDLED;
 }
-int i915_emit_irq(drm_device_t * dev)
+static int i915_emit_irq(drm_device_t * dev)
 {
        drm_i915_private_t *dev_priv = dev->dev_private;
        u32 ret;
@@ -76,7 +76,7 @@ int i915_emit_irq(drm_device_t * dev)
        return ret;
 }
-int i915_wait_irq(drm_device_t * dev, int irq_nr)
+static int i915_wait_irq(drm_device_t * dev, int irq_nr)
 {
        drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
        int ret = 0;
diff --git a/drivers/char/drm/mga_drv.c b/drivers/char/drm/mga_drv.c
index 22dab3e9d92a..844cca9cb29d 100644
--- a/drivers/char/drm/mga_drv.c
+++ b/drivers/char/drm/mga_drv.c
@@ -101,6 +101,9 @@ static struct drm_driver driver = {
                .mmap = drm_mmap,
                .poll = drm_poll,
                .fasync = drm_fasync,
+#ifdef CONFIG_COMPAT
+                .compat_ioctl = mga_compat_ioctl,
+#endif
        },
        .pci_driver = {
                .name = DRIVER_NAME,
diff --git a/drivers/char/drm/mga_drv.h b/drivers/char/drm/mga_drv.h
index 1d84a1eb34db..9412e2816eb7 100644
--- a/drivers/char/drm/mga_drv.h
+++ b/drivers/char/drm/mga_drv.h
@@ -137,6 +137,8 @@ extern irqreturn_t mga_driver_irq_handler( DRM_IRQ_ARGS );
 extern void mga_driver_irq_preinstall( drm_device_t *dev );
 extern void mga_driver_irq_postinstall( drm_device_t *dev );
 extern void mga_driver_irq_uninstall( drm_device_t *dev );
+extern long mga_compat_ioctl(struct file *filp, unsigned int cmd,
+                             unsigned long arg);
 #define mga_flush_write_combine()       DRM_WRITEMEMORYBARRIER()
diff --git a/drivers/char/drm/mga_ioc32.c b/drivers/char/drm/mga_ioc32.c
new file mode 100644
index 000000000000..bc745cfa2095
--- /dev/null
+++ b/drivers/char/drm/mga_ioc32.c
@@ -0,0 +1,167 @@
+/**
+ * \file mga_ioc32.c
+ *
+ * 32-bit ioctl compatibility routines for the MGA DRM.
+ *
+ * \author Dave Airlie <airlied@linux.ie> with code from patches by Egbert Eich
+ *
+ *
+ * Copyright (C) Paul Mackerras 2005
+ * Copyright (C) Egbert Eich 2003,2004
+ * Copyright (C) Dave Airlie 2005
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHOR BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ */
+#include <linux/compat.h>
+#include <linux/ioctl32.h>
+#include "drmP.h"
+#include "drm.h"
+#include "mga_drm.h"
+typedef struct drm32_mga_init {
+        int func;
+        u32 sarea_priv_offset;
+        int chipset;
+        int sgram;
+        unsigned int maccess;
+        unsigned int fb_cpp;
+        unsigned int front_offset, front_pitch;
+        unsigned int back_offset, back_pitch;
+        unsigned int depth_cpp;
+        unsigned int depth_offset, depth_pitch;
+        unsigned int texture_offset[MGA_NR_TEX_HEAPS];
+        unsigned int texture_size[MGA_NR_TEX_HEAPS];
+        u32 fb_offset;
+        u32 mmio_offset;
+        u32 status_offset;
+        u32 warp_offset;
+        u32 primary_offset;
+        u32 buffers_offset;
+} drm_mga_init32_t;
+static int compat_mga_init(struct file *file, unsigned int cmd,
+                           unsigned long arg)
+{
+        drm_mga_init32_t init32;
+        drm_mga_init_t __user *init;
+        int err = 0, i;
+        
+        if (copy_from_user(&init32, (void __user *)arg, sizeof(init32)))
+                return -EFAULT;
+        
+        init = compat_alloc_user_space(sizeof(*init));
+        if (!access_ok(VERIFY_WRITE, init, sizeof(*init))
+            || __put_user(init32.func, &init->func)
+            || __put_user(init32.sarea_priv_offset, &init->sarea_priv_offset)
+            || __put_user(init32.chipset, &init->chipset)
+            || __put_user(init32.sgram, &init->sgram)
+            || __put_user(init32.maccess, &init->maccess)
+            || __put_user(init32.fb_cpp, &init->fb_cpp)
+            || __put_user(init32.front_offset, &init->front_offset)
+            || __put_user(init32.front_pitch, &init->front_pitch)
+            || __put_user(init32.back_offset, &init->back_offset)
+            || __put_user(init32.back_pitch, &init->back_pitch)
+            || __put_user(init32.depth_cpp, &init->depth_cpp)
+            || __put_user(init32.depth_offset, &init->depth_offset)
+            || __put_user(init32.depth_pitch, &init->depth_pitch)
+            || __put_user(init32.fb_offset, &init->fb_offset)
+            || __put_user(init32.mmio_offset, &init->mmio_offset)
+            || __put_user(init32.status_offset, &init->status_offset)
+            || __put_user(init32.warp_offset, &init->warp_offset)
+            || __put_user(init32.primary_offset, &init->primary_offset)
+            || __put_user(init32.buffers_offset, &init->buffers_offset))
+                return -EFAULT;
+        
+        for (i=0; i<MGA_NR_TEX_HEAPS; i++)
+        {
+                err |= __put_user(init32.texture_offset[i], &init->texture_offset[i]);
+                err |= __put_user(init32.texture_size[i], &init->texture_size[i]);
+        }
+        if (err)
+                return -EFAULT;
+        
+        return drm_ioctl(file->f_dentry->d_inode, file,
+                         DRM_IOCTL_MGA_INIT, (unsigned long) init);
+}
+typedef struct drm_mga_getparam32 {
+        int param;
+        u32 value;
+} drm_mga_getparam32_t;
+static int compat_mga_getparam(struct file *file, unsigned int cmd,
+                               unsigned long arg)
+{
+        drm_mga_getparam32_t getparam32;
+        drm_mga_getparam_t __user *getparam;
+        
+        if (copy_from_user(&getparam32, (void __user *)arg, sizeof(getparam32)))
+                return -EFAULT;
+        getparam = compat_alloc_user_space(sizeof(*getparam));
+        if (!access_ok(VERIFY_WRITE, getparam, sizeof(*getparam))
+            || __put_user(getparam32.param, &getparam->param)
+            || __put_user((void __user *)(unsigned long)getparam32.value, &getparam->value))
+                return -EFAULT;
+        return drm_ioctl(file->f_dentry->d_inode, file, 
+                         DRM_IOCTL_MGA_GETPARAM, (unsigned long)getparam);
+}
+drm_ioctl_compat_t *mga_compat_ioctls[] = {
+        [DRM_MGA_INIT] = compat_mga_init,
+        [DRM_MGA_GETPARAM] = compat_mga_getparam,
+};
+/**
+ * Called whenever a 32-bit process running under a 64-bit kernel
+ * performs an ioctl on /dev/dri/card<n>.
+ *
+ * \param filp file pointer.
+ * \param cmd command.
+ * \param arg user argument.
+ * \return zero on success or negative number on failure.
+ */
+long mga_compat_ioctl(struct file *filp, unsigned int cmd,
+                         unsigned long arg)
+{
+        unsigned int nr = DRM_IOCTL_NR(cmd);
+        drm_ioctl_compat_t *fn = NULL;
+        int ret;
+        if (nr < DRM_COMMAND_BASE)
+                return drm_compat_ioctl(filp, cmd, arg);
+        
+        if (nr < DRM_COMMAND_BASE + DRM_ARRAY_SIZE(mga_compat_ioctls))
+                fn = mga_compat_ioctls[nr - DRM_COMMAND_BASE];
+        lock_kernel();          /* XXX for now */
+        if (fn != NULL)
+                ret = (*fn)(filp, cmd, arg);
+        else
+                ret = drm_ioctl(filp->f_dentry->d_inode, filp, cmd, arg);
+        unlock_kernel();
+        return ret;
+}
diff --git a/drivers/char/drm/r128_drv.c b/drivers/char/drm/r128_drv.c
index ced63810237b..bc446da1b210 100644
--- a/drivers/char/drm/r128_drv.c
+++ b/drivers/char/drm/r128_drv.c
@@ -96,6 +96,9 @@ static struct drm_driver driver = {
                .mmap = drm_mmap,
                .poll = drm_poll,
                .fasync = drm_fasync,
+#ifdef CONFIG_COMPAT
+                .compat_ioctl = r128_compat_ioctl,
+#endif
        },
        .pci_driver = {
                .name          = DRIVER_NAME,
diff --git a/drivers/char/drm/r128_drv.h b/drivers/char/drm/r128_drv.h
index cf1aa5df459e..0fb687c9505e 100644
--- a/drivers/char/drm/r128_drv.h
+++ b/drivers/char/drm/r128_drv.h
@@ -156,6 +156,9 @@ extern void r128_driver_irq_uninstall( drm_device_t *dev );
 extern void r128_driver_pretakedown(drm_device_t *dev);
 extern void r128_driver_prerelease(drm_device_t *dev, DRMFILE filp);
+extern long r128_compat_ioctl(struct file *filp, unsigned int cmd,
+                              unsigned long arg);
 /* Register definitions, register access macros and drmAddMap constants
 * for Rage 128 kernel driver.
 */
diff --git a/drivers/char/drm/r128_ioc32.c b/drivers/char/drm/r128_ioc32.c
new file mode 100644
index 000000000000..60598ef9475a
--- /dev/null
+++ b/drivers/char/drm/r128_ioc32.c
@@ -0,0 +1,219 @@
+/**
+ * \file r128_ioc32.c
+ *
+ * 32-bit ioctl compatibility routines for the R128 DRM.
+ *
+ * \author Dave Airlie <airlied@linux.ie> with code from patches by Egbert Eich
+ *
+ * Copyright (C) Paul Mackerras 2005
+ * Copyright (C) Egbert Eich 2003,2004
+ * Copyright (C) Dave Airlie 2005
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHOR BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ */
+#include <linux/compat.h>
+#include <linux/ioctl32.h>
+#include "drmP.h"
+#include "drm.h"
+#include "r128_drm.h"
+typedef struct drm_r128_init32 {
+        int func;
+        unsigned int sarea_priv_offset;
+        int is_pci;
+        int cce_mode;
+        int cce_secure;
+        int ring_size;
+        int usec_timeout;
+        unsigned int fb_bpp;
+        unsigned int front_offset, front_pitch;
+        unsigned int back_offset, back_pitch;
+        unsigned int depth_bpp;
+        unsigned int depth_offset, depth_pitch;
+        unsigned int span_offset;
+        unsigned int fb_offset;
+        unsigned int mmio_offset;
+        unsigned int ring_offset;
+        unsigned int ring_rptr_offset;
+        unsigned int buffers_offset;
+        unsigned int agp_textures_offset;
+} drm_r128_init32_t;
+static int compat_r128_init(struct file *file, unsigned int cmd,
+                            unsigned long arg)
+{
+        drm_r128_init32_t init32;
+        drm_r128_init_t __user *init;
+        
+        if (copy_from_user(&init32, (void __user *)arg, sizeof(init32)))
+                return -EFAULT;
+        
+        init = compat_alloc_user_space(sizeof(*init));
+        if (!access_ok(VERIFY_WRITE, init, sizeof(*init))
+            || __put_user(init32.func, &init->func)
+            || __put_user(init32.sarea_priv_offset, &init->sarea_priv_offset)
+            || __put_user(init32.is_pci, &init->is_pci)
+            || __put_user(init32.cce_mode, &init->cce_mode)
+            || __put_user(init32.cce_secure, &init->cce_secure)
+            || __put_user(init32.ring_size, &init->ring_size)
+            || __put_user(init32.usec_timeout, &init->usec_timeout)
+            || __put_user(init32.fb_bpp, &init->fb_bpp)
+            || __put_user(init32.front_offset, &init->front_offset)
+            || __put_user(init32.front_pitch, &init->front_pitch)
+            || __put_user(init32.back_offset, &init->back_offset)
+            || __put_user(init32.back_pitch, &init->back_pitch)
+            || __put_user(init32.depth_bpp, &init->depth_bpp)
+            || __put_user(init32.depth_offset, &init->depth_offset)
+            || __put_user(init32.depth_pitch, &init->depth_pitch)
+            || __put_user(init32.span_offset, &init->span_offset)
+            || __put_user(init32.fb_offset, &init->fb_offset)
+            || __put_user(init32.mmio_offset, &init->mmio_offset)
+            || __put_user(init32.ring_offset, &init->ring_offset)
+            || __put_user(init32.ring_rptr_offset, &init->ring_rptr_offset)
+            || __put_user(init32.buffers_offset, &init->buffers_offset)
+            || __put_user(init32.agp_textures_offset, &init->agp_textures_offset))
+                return -EFAULT;
+        
+        return drm_ioctl(file->f_dentry->d_inode, file,
+                         DRM_IOCTL_R128_INIT, (unsigned long)init);
+}
+typedef struct drm_r128_depth32 {
+        int func;
+        int n;
+        u32 x;
+        u32 y;
+        u32 buffer;
+        u32 mask;
+} drm_r128_depth32_t;
+static int compat_r128_depth(struct file *file, unsigned int cmd,
+                             unsigned long arg)
+{
+        drm_r128_depth32_t depth32;
+        drm_r128_depth_t __user *depth;
+        if (copy_from_user(&depth32, (void __user *)arg, sizeof(depth32)))
+                return -EFAULT;
+        depth = compat_alloc_user_space(sizeof(*depth));
+        if (!access_ok(VERIFY_WRITE, depth, sizeof(*depth))
+            || __put_user(depth32.func, &depth->func)
+            || __put_user(depth32.n, &depth->n)
+            || __put_user((int __user *)(unsigned long)depth32.x, &depth->x)
+            || __put_user((int __user *)(unsigned long)depth32.y, &depth->y)
+            || __put_user((unsigned int __user *)(unsigned long)depth32.buffer, &depth->buffer)
+            || __put_user((unsigned char __user *)(unsigned long)depth32.mask, &depth->mask))
+                return -EFAULT;
+        
+        return drm_ioctl(file->f_dentry->d_inode, file,
+                         DRM_IOCTL_R128_DEPTH, (unsigned long)depth);   
+        
+}
+typedef struct drm_r128_stipple32 {
+        u32 mask;
+} drm_r128_stipple32_t;
+static int compat_r128_stipple(struct file *file, unsigned int cmd,
+                               unsigned long arg)
+{
+        drm_r128_stipple32_t stipple32;
+        drm_r128_stipple_t __user *stipple;
+        if (copy_from_user(&stipple32, (void __user *)arg, sizeof(stipple32)))
+                return -EFAULT;
+        stipple = compat_alloc_user_space(sizeof(*stipple));
+        if (!access_ok(VERIFY_WRITE, stipple, sizeof(*stipple))
+            || __put_user((unsigned int __user *)(unsigned long)stipple32.mask, &stipple->mask))
+                return -EFAULT;
+        return drm_ioctl(file->f_dentry->d_inode, file,
+                         DRM_IOCTL_R128_STIPPLE, (unsigned long)stipple);
+}
+typedef struct drm_r128_getparam32 {
+        int param;
+        u32 value;
+} drm_r128_getparam32_t;
+static int compat_r128_getparam(struct file *file, unsigned int cmd,
+                                unsigned long arg)
+{
+        drm_r128_getparam32_t getparam32;
+        drm_r128_getparam_t __user *getparam;
+        if (copy_from_user(&getparam32, (void __user *)arg, sizeof(getparam32)))
+                return -EFAULT;
+        getparam = compat_alloc_user_space(sizeof(*getparam));
+        if (!access_ok(VERIFY_WRITE, getparam, sizeof(*getparam))
+            || __put_user(getparam32.param, &getparam->param)
+            || __put_user((void __user *)(unsigned long)getparam32.value, &getparam->value))
+                return -EFAULT;
+        
+        return drm_ioctl(file->f_dentry->d_inode, file,
+                         DRM_IOCTL_R128_GETPARAM, (unsigned long)getparam);
+}
+drm_ioctl_compat_t *r128_compat_ioctls[] = {
+        [DRM_R128_INIT] = compat_r128_init,
+        [DRM_R128_DEPTH] = compat_r128_depth,
+        [DRM_R128_STIPPLE] = compat_r128_stipple,
+        [DRM_R128_GETPARAM] = compat_r128_getparam,
+};
+/**
+ * Called whenever a 32-bit process running under a 64-bit kernel
+ * performs an ioctl on /dev/dri/card<n>.
+ *
+ * \param filp file pointer.
+ * \param cmd command.
+ * \param arg user argument.
+ * \return zero on success or negative number on failure.
+ */
+long r128_compat_ioctl(struct file *filp, unsigned int cmd,
+                         unsigned long arg)
+{
+        unsigned int nr = DRM_IOCTL_NR(cmd);
+        drm_ioctl_compat_t *fn = NULL;
+        int ret;
+        if (nr < DRM_COMMAND_BASE)
+                return drm_compat_ioctl(filp, cmd, arg);
+        if (nr < DRM_COMMAND_BASE + DRM_ARRAY_SIZE(r128_compat_ioctls))
+                fn = r128_compat_ioctls[nr - DRM_COMMAND_BASE];
+        lock_kernel();          /* XXX for now */
+        if (fn != NULL)
+                ret = (*fn)(filp, cmd, arg);
+        else
+                ret = drm_ioctl(filp->f_dentry->d_inode, filp, cmd, arg);
+        unlock_kernel();
+        return ret;
+}
diff --git a/drivers/char/drm/r128_state.c b/drivers/char/drm/r128_state.c
index 53af69162829..426a71c049d9 100644
--- a/drivers/char/drm/r128_state.c
+++ b/drivers/char/drm/r128_state.c
@@ -1307,7 +1307,7 @@ static int r128_do_init_pageflip( drm_device_t *dev )
        return 0;
 }
-int r128_do_cleanup_pageflip( drm_device_t *dev )
+static int r128_do_cleanup_pageflip( drm_device_t *dev )
 {
        drm_r128_private_t *dev_priv = dev->dev_private;
        DRM_DEBUG( "\n" );
diff --git a/drivers/char/drm/via_3d_reg.h b/drivers/char/drm/via_3d_reg.h
new file mode 100644
index 000000000000..cf61bb514db1
--- /dev/null
+++ b/drivers/char/drm/via_3d_reg.h
@@ -0,0 +1,1651 @@
+/*
+ * Copyright 1998-2003 VIA Technologies, Inc. All Rights Reserved.
+ * Copyright 2001-2003 S3 Graphics, Inc. All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sub license,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial portions
+ * of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
+ * VIA, S3 GRAPHICS, AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ */
+#ifndef VIA_3D_REG_H
+#define VIA_3D_REG_H
+#define HC_REG_BASE             0x0400
+#define HC_REG_TRANS_SPACE      0x0040
+#define HC_ParaN_MASK           0xffffffff
+#define HC_Para_MASK            0x00ffffff
+#define HC_SubA_MASK            0xff000000
+#define HC_SubA_SHIFT           24
+/* Transmission Setting
+ */
+#define HC_REG_TRANS_SET        0x003c
+#define HC_ParaSubType_MASK     0xff000000
+#define HC_ParaType_MASK        0x00ff0000
+#define HC_ParaOS_MASK          0x0000ff00
+#define HC_ParaAdr_MASK         0x000000ff
+#define HC_ParaSubType_SHIFT    24
+#define HC_ParaType_SHIFT       16
+#define HC_ParaOS_SHIFT         8
+#define HC_ParaAdr_SHIFT        0
+#define HC_ParaType_CmdVdata    0x0000
+#define HC_ParaType_NotTex      0x0001
+#define HC_ParaType_Tex         0x0002
+#define HC_ParaType_Palette     0x0003
+#define HC_ParaType_PreCR       0x0010
+#define HC_ParaType_Auto        0x00fe
+/* Transmission Space
+ */
+#define HC_REG_Hpara0           0x0040
+#define HC_REG_HpataAF          0x02fc
+/* Read
+ */
+#define HC_REG_HREngSt          0x0000
+#define HC_REG_HRFIFOempty      0x0004
+#define HC_REG_HRFIFOfull       0x0008
+#define HC_REG_HRErr            0x000c
+#define HC_REG_FIFOstatus       0x0010
+/* HC_REG_HREngSt          0x0000
+ */
+#define HC_HDASZC_MASK          0x00010000
+#define HC_HSGEMI_MASK          0x0000f000
+#define HC_HLGEMISt_MASK        0x00000f00
+#define HC_HCRSt_MASK           0x00000080
+#define HC_HSE0St_MASK          0x00000040
+#define HC_HSE1St_MASK          0x00000020
+#define HC_HPESt_MASK           0x00000010
+#define HC_HXESt_MASK           0x00000008
+#define HC_HBESt_MASK           0x00000004
+#define HC_HE2St_MASK           0x00000002
+#define HC_HE3St_MASK           0x00000001
+/* HC_REG_HRFIFOempty      0x0004
+ */
+#define HC_HRZDempty_MASK       0x00000010
+#define HC_HRTXAempty_MASK      0x00000008
+#define HC_HRTXDempty_MASK      0x00000004
+#define HC_HWZDempty_MASK       0x00000002
+#define HC_HWCDempty_MASK       0x00000001
+/* HC_REG_HRFIFOfull       0x0008
+ */
+#define HC_HRZDfull_MASK        0x00000010
+#define HC_HRTXAfull_MASK       0x00000008
+#define HC_HRTXDfull_MASK       0x00000004
+#define HC_HWZDfull_MASK        0x00000002
+#define HC_HWCDfull_MASK        0x00000001
+/* HC_REG_HRErr            0x000c
+ */
+#define HC_HAGPCMErr_MASK       0x80000000
+#define HC_HAGPCMErrC_MASK      0x70000000
+/* HC_REG_FIFOstatus       0x0010
+ */
+#define HC_HRFIFOATall_MASK     0x80000000
+#define HC_HRFIFOATbusy_MASK    0x40000000
+#define HC_HRATFGMDo_MASK       0x00000100
+#define HC_HRATFGMDi_MASK       0x00000080
+#define HC_HRATFRZD_MASK        0x00000040
+#define HC_HRATFRTXA_MASK       0x00000020
+#define HC_HRATFRTXD_MASK       0x00000010
+#define HC_HRATFWZD_MASK        0x00000008
+#define HC_HRATFWCD_MASK        0x00000004
+#define HC_HRATTXTAG_MASK       0x00000002
+#define HC_HRATTXCH_MASK        0x00000001
+/* AGP Command Setting
+ */
+#define HC_SubA_HAGPBstL        0x0060
+#define HC_SubA_HAGPBendL       0x0061
+#define HC_SubA_HAGPCMNT        0x0062
+#define HC_SubA_HAGPBpL         0x0063
+#define HC_SubA_HAGPBpH         0x0064
+/* HC_SubA_HAGPCMNT        0x0062
+ */
+#define HC_HAGPCMNT_MASK        0x00800000
+#define HC_HCmdErrClr_MASK      0x00400000
+#define HC_HAGPBendH_MASK       0x0000ff00
+#define HC_HAGPBstH_MASK        0x000000ff
+#define HC_HAGPBendH_SHIFT      8
+#define HC_HAGPBstH_SHIFT       0
+/* HC_SubA_HAGPBpL         0x0063
+ */
+#define HC_HAGPBpL_MASK         0x00fffffc
+#define HC_HAGPBpID_MASK        0x00000003
+#define HC_HAGPBpID_PAUSE       0x00000000
+#define HC_HAGPBpID_JUMP        0x00000001
+#define HC_HAGPBpID_STOP        0x00000002
+/* HC_SubA_HAGPBpH         0x0064
+ */
+#define HC_HAGPBpH_MASK         0x00ffffff
+/* Miscellaneous Settings
+ */
+#define HC_SubA_HClipTB         0x0070
+#define HC_SubA_HClipLR         0x0071
+#define HC_SubA_HFPClipTL       0x0072
+#define HC_SubA_HFPClipBL       0x0073
+#define HC_SubA_HFPClipLL       0x0074
+#define HC_SubA_HFPClipRL       0x0075
+#define HC_SubA_HFPClipTBH      0x0076
+#define HC_SubA_HFPClipLRH      0x0077
+#define HC_SubA_HLP             0x0078
+#define HC_SubA_HLPRF           0x0079
+#define HC_SubA_HSolidCL        0x007a
+#define HC_SubA_HPixGC          0x007b
+#define HC_SubA_HSPXYOS         0x007c
+#define HC_SubA_HVertexCNT      0x007d
+#define HC_HClipT_MASK          0x00fff000
+#define HC_HClipT_SHIFT         12
+#define HC_HClipB_MASK          0x00000fff
+#define HC_HClipB_SHIFT         0
+#define HC_HClipL_MASK          0x00fff000
+#define HC_HClipL_SHIFT         12
+#define HC_HClipR_MASK          0x00000fff
+#define HC_HClipR_SHIFT         0
+#define HC_HFPClipBH_MASK       0x0000ff00
+#define HC_HFPClipBH_SHIFT      8
+#define HC_HFPClipTH_MASK       0x000000ff
+#define HC_HFPClipTH_SHIFT      0
+#define HC_HFPClipRH_MASK       0x0000ff00
+#define HC_HFPClipRH_SHIFT      8
+#define HC_HFPClipLH_MASK       0x000000ff
+#define HC_HFPClipLH_SHIFT      0
+#define HC_HSolidCH_MASK        0x000000ff
+#define HC_HPixGC_MASK          0x00800000
+#define HC_HSPXOS_MASK          0x00fff000
+#define HC_HSPXOS_SHIFT         12
+#define HC_HSPYOS_MASK          0x00000fff
+/* Command
+ * Command A
+ */
+#define HC_HCmdHeader_MASK      0xfe000000      /*0xffe00000 */
+#define HC_HE3Fire_MASK         0x00100000
+#define HC_HPMType_MASK         0x000f0000
+#define HC_HEFlag_MASK          0x0000e000
+#define HC_HShading_MASK        0x00001c00
+#define HC_HPMValidN_MASK       0x00000200
+#define HC_HPLEND_MASK          0x00000100
+#define HC_HVCycle_MASK         0x000000ff
+#define HC_HVCycle_Style_MASK   0x000000c0
+#define HC_HVCycle_ChgA_MASK    0x00000030
+#define HC_HVCycle_ChgB_MASK    0x0000000c
+#define HC_HVCycle_ChgC_MASK    0x00000003
+#define HC_HPMType_Point        0x00000000
+#define HC_HPMType_Line         0x00010000
+#define HC_HPMType_Tri          0x00020000
+#define HC_HPMType_TriWF        0x00040000
+#define HC_HEFlag_NoAA          0x00000000
+#define HC_HEFlag_ab            0x00008000
+#define HC_HEFlag_bc            0x00004000
+#define HC_HEFlag_ca            0x00002000
+#define HC_HShading_Solid       0x00000000
+#define HC_HShading_FlatA       0x00000400
+#define HC_HShading_FlatB       0x00000800
+#define HC_HShading_FlatC       0x00000c00
+#define HC_HShading_Gouraud     0x00001000
+#define HC_HVCycle_Full         0x00000000
+#define HC_HVCycle_AFP          0x00000040
+#define HC_HVCycle_One          0x000000c0
+#define HC_HVCycle_NewA         0x00000000
+#define HC_HVCycle_AA           0x00000010
+#define HC_HVCycle_AB           0x00000020
+#define HC_HVCycle_AC           0x00000030
+#define HC_HVCycle_NewB         0x00000000
+#define HC_HVCycle_BA           0x00000004
+#define HC_HVCycle_BB           0x00000008
+#define HC_HVCycle_BC           0x0000000c
+#define HC_HVCycle_NewC         0x00000000
+#define HC_HVCycle_CA           0x00000001
+#define HC_HVCycle_CB           0x00000002
+#define HC_HVCycle_CC           0x00000003
+/* Command B
+ */
+#define HC_HLPrst_MASK          0x00010000
+#define HC_HLLastP_MASK         0x00008000
+#define HC_HVPMSK_MASK          0x00007f80
+#define HC_HBFace_MASK          0x00000040
+#define HC_H2nd1VT_MASK         0x0000003f
+#define HC_HVPMSK_X             0x00004000
+#define HC_HVPMSK_Y             0x00002000
+#define HC_HVPMSK_Z             0x00001000
+#define HC_HVPMSK_W             0x00000800
+#define HC_HVPMSK_Cd            0x00000400
+#define HC_HVPMSK_Cs            0x00000200
+#define HC_HVPMSK_S             0x00000100
+#define HC_HVPMSK_T             0x00000080
+/* Enable Setting
+ */
+#define HC_SubA_HEnable         0x0000
+#define HC_HenTXEnvMap_MASK     0x00200000
+#define HC_HenVertexCNT_MASK    0x00100000
+#define HC_HenCPUDAZ_MASK       0x00080000
+#define HC_HenDASZWC_MASK       0x00040000
+#define HC_HenFBCull_MASK       0x00020000
+#define HC_HenCW_MASK           0x00010000
+#define HC_HenAA_MASK           0x00008000
+#define HC_HenST_MASK           0x00004000
+#define HC_HenZT_MASK           0x00002000
+#define HC_HenZW_MASK           0x00001000
+#define HC_HenAT_MASK           0x00000800
+#define HC_HenAW_MASK           0x00000400
+#define HC_HenSP_MASK           0x00000200
+#define HC_HenLP_MASK           0x00000100
+#define HC_HenTXCH_MASK         0x00000080
+#define HC_HenTXMP_MASK         0x00000040
+#define HC_HenTXPP_MASK         0x00000020
+#define HC_HenTXTR_MASK         0x00000010
+#define HC_HenCS_MASK           0x00000008
+#define HC_HenFOG_MASK          0x00000004
+#define HC_HenABL_MASK          0x00000002
+#define HC_HenDT_MASK           0x00000001
+/* Z Setting
+ */
+#define HC_SubA_HZWBBasL        0x0010
+#define HC_SubA_HZWBBasH        0x0011
+#define HC_SubA_HZWBType        0x0012
+#define HC_SubA_HZBiasL         0x0013
+#define HC_SubA_HZWBend         0x0014
+#define HC_SubA_HZWTMD          0x0015
+#define HC_SubA_HZWCDL          0x0016
+#define HC_SubA_HZWCTAGnum      0x0017
+#define HC_SubA_HZCYNum         0x0018
+#define HC_SubA_HZWCFire        0x0019
+/* HC_SubA_HZWBType
+ */
+#define HC_HZWBType_MASK        0x00800000
+#define HC_HZBiasedWB_MASK      0x00400000
+#define HC_HZONEasFF_MASK       0x00200000
+#define HC_HZOONEasFF_MASK      0x00100000
+#define HC_HZWBFM_MASK          0x00030000
+#define HC_HZWBLoc_MASK         0x0000c000
+#define HC_HZWBPit_MASK         0x00003fff
+#define HC_HZWBFM_16            0x00000000
+#define HC_HZWBFM_32            0x00020000
+#define HC_HZWBFM_24            0x00030000
+#define HC_HZWBLoc_Local        0x00000000
+#define HC_HZWBLoc_SyS          0x00004000
+/* HC_SubA_HZWBend
+ */
+#define HC_HZWBend_MASK         0x00ffe000
+#define HC_HZBiasH_MASK         0x000000ff
+#define HC_HZWBend_SHIFT        10
+/* HC_SubA_HZWTMD
+ */
+#define HC_HZWTMD_MASK          0x00070000
+#define HC_HEBEBias_MASK        0x00007f00
+#define HC_HZNF_MASK            0x000000ff
+#define HC_HZWTMD_NeverPass     0x00000000
+#define HC_HZWTMD_LT            0x00010000
+#define HC_HZWTMD_EQ            0x00020000
+#define HC_HZWTMD_LE            0x00030000
+#define HC_HZWTMD_GT            0x00040000
+#define HC_HZWTMD_NE            0x00050000
+#define HC_HZWTMD_GE            0x00060000
+#define HC_HZWTMD_AllPass       0x00070000
+#define HC_HEBEBias_SHIFT       8
+/* HC_SubA_HZWCDL          0x0016
+ */
+#define HC_HZWCDL_MASK          0x00ffffff
+/* HC_SubA_HZWCTAGnum      0x0017
+ */
+#define HC_HZWCTAGnum_MASK      0x00ff0000
+#define HC_HZWCTAGnum_SHIFT     16
+#define HC_HZWCDH_MASK          0x000000ff
+#define HC_HZWCDH_SHIFT         0
+/* HC_SubA_HZCYNum         0x0018
+ */
+#define HC_HZCYNum_MASK         0x00030000
+#define HC_HZCYNum_SHIFT        16
+#define HC_HZWCQWnum_MASK       0x00003fff
+#define HC_HZWCQWnum_SHIFT      0
+/* HC_SubA_HZWCFire        0x0019
+ */
+#define HC_ZWCFire_MASK         0x00010000
+#define HC_HZWCQWnumLast_MASK   0x00003fff
+#define HC_HZWCQWnumLast_SHIFT  0
+/* Stencil Setting
+ */
+#define HC_SubA_HSTREF          0x0023
+#define HC_SubA_HSTMD           0x0024
+/* HC_SubA_HSBFM
+ */
+#define HC_HSBFM_MASK           0x00030000
+#define HC_HSBLoc_MASK          0x0000c000
+#define HC_HSBPit_MASK          0x00003fff
+/* HC_SubA_HSTREF
+ */
+#define HC_HSTREF_MASK          0x00ff0000
+#define HC_HSTOPMSK_MASK        0x0000ff00
+#define HC_HSTBMSK_MASK         0x000000ff
+#define HC_HSTREF_SHIFT         16
+#define HC_HSTOPMSK_SHIFT       8
+/* HC_SubA_HSTMD
+ */
+#define HC_HSTMD_MASK           0x00070000
+#define HC_HSTOPSF_MASK         0x000001c0
+#define HC_HSTOPSPZF_MASK       0x00000038
+#define HC_HSTOPSPZP_MASK       0x00000007
+#define HC_HSTMD_NeverPass      0x00000000
+#define HC_HSTMD_LT             0x00010000
+#define HC_HSTMD_EQ             0x00020000
+#define HC_HSTMD_LE             0x00030000
+#define HC_HSTMD_GT             0x00040000
+#define HC_HSTMD_NE             0x00050000
+#define HC_HSTMD_GE             0x00060000
+#define HC_HSTMD_AllPass        0x00070000
+#define HC_HSTOPSF_KEEP         0x00000000
+#define HC_HSTOPSF_ZERO         0x00000040
+#define HC_HSTOPSF_REPLACE      0x00000080
+#define HC_HSTOPSF_INCRSAT      0x000000c0
+#define HC_HSTOPSF_DECRSAT      0x00000100
+#define HC_HSTOPSF_INVERT       0x00000140
+#define HC_HSTOPSF_INCR         0x00000180
+#define HC_HSTOPSF_DECR         0x000001c0
+#define HC_HSTOPSPZF_KEEP       0x00000000
+#define HC_HSTOPSPZF_ZERO       0x00000008
+#define HC_HSTOPSPZF_REPLACE    0x00000010
+#define HC_HSTOPSPZF_INCRSAT    0x00000018
+#define HC_HSTOPSPZF_DECRSAT    0x00000020
+#define HC_HSTOPSPZF_INVERT     0x00000028
+#define HC_HSTOPSPZF_INCR       0x00000030
+#define HC_HSTOPSPZF_DECR       0x00000038
+#define HC_HSTOPSPZP_KEEP       0x00000000
+#define HC_HSTOPSPZP_ZERO       0x00000001
+#define HC_HSTOPSPZP_REPLACE    0x00000002
+#define HC_HSTOPSPZP_INCRSAT    0x00000003
+#define HC_HSTOPSPZP_DECRSAT    0x00000004
+#define HC_HSTOPSPZP_INVERT     0x00000005
+#define HC_HSTOPSPZP_INCR       0x00000006
+#define HC_HSTOPSPZP_DECR       0x00000007
+/* Alpha Setting
+ */
+#define HC_SubA_HABBasL         0x0030
+#define HC_SubA_HABBasH         0x0031
+#define HC_SubA_HABFM           0x0032
+#define HC_SubA_HATMD           0x0033
+#define HC_SubA_HABLCsat        0x0034
+#define HC_SubA_HABLCop         0x0035
+#define HC_SubA_HABLAsat        0x0036
+#define HC_SubA_HABLAop         0x0037
+#define HC_SubA_HABLRCa         0x0038
+#define HC_SubA_HABLRFCa        0x0039
+#define HC_SubA_HABLRCbias      0x003a
+#define HC_SubA_HABLRCb         0x003b
+#define HC_SubA_HABLRFCb        0x003c
+#define HC_SubA_HABLRAa         0x003d
+#define HC_SubA_HABLRAb         0x003e
+/* HC_SubA_HABFM
+ */
+#define HC_HABFM_MASK           0x00030000
+#define HC_HABLoc_MASK          0x0000c000
+#define HC_HABPit_MASK          0x000007ff
+/* HC_SubA_HATMD
+ */
+#define HC_HATMD_MASK           0x00000700
+#define HC_HATREF_MASK          0x000000ff
+#define HC_HATMD_NeverPass      0x00000000
+#define HC_HATMD_LT             0x00000100
+#define HC_HATMD_EQ             0x00000200
+#define HC_HATMD_LE             0x00000300
+#define HC_HATMD_GT             0x00000400
+#define HC_HATMD_NE             0x00000500
+#define HC_HATMD_GE             0x00000600
+#define HC_HATMD_AllPass        0x00000700
+/* HC_SubA_HABLCsat
+ */
+#define HC_HABLCsat_MASK        0x00010000
+#define HC_HABLCa_MASK          0x0000fc00
+#define HC_HABLCa_C_MASK        0x0000c000
+#define HC_HABLCa_OPC_MASK      0x00003c00
+#define HC_HABLFCa_MASK         0x000003f0
+#define HC_HABLFCa_C_MASK       0x00000300
+#define HC_HABLFCa_OPC_MASK     0x000000f0
+#define HC_HABLCbias_MASK       0x0000000f
+#define HC_HABLCbias_C_MASK     0x00000008
+#define HC_HABLCbias_OPC_MASK   0x00000007
+/*-- Define the input color.
+ */
+#define HC_XC_Csrc              0x00000000
+#define HC_XC_Cdst              0x00000001
+#define HC_XC_Asrc              0x00000002
+#define HC_XC_Adst              0x00000003
+#define HC_XC_Fog               0x00000004
+#define HC_XC_HABLRC            0x00000005
+#define HC_XC_minSrcDst         0x00000006
+#define HC_XC_maxSrcDst         0x00000007
+#define HC_XC_mimAsrcInvAdst    0x00000008
+#define HC_XC_OPC               0x00000000
+#define HC_XC_InvOPC            0x00000010
+#define HC_XC_OPCp5             0x00000020
+/*-- Define the input Alpha
+ */
+#define HC_XA_OPA               0x00000000
+#define HC_XA_InvOPA            0x00000010
+#define HC_XA_OPAp5             0x00000020
+#define HC_XA_0                 0x00000000
+#define HC_XA_Asrc              0x00000001
+#define HC_XA_Adst              0x00000002
+#define HC_XA_Fog               0x00000003
+#define HC_XA_minAsrcFog        0x00000004
+#define HC_XA_minAsrcAdst       0x00000005
+#define HC_XA_maxAsrcFog        0x00000006
+#define HC_XA_maxAsrcAdst       0x00000007
+#define HC_XA_HABLRA            0x00000008
+#define HC_XA_minAsrcInvAdst    0x00000008
+#define HC_XA_HABLFRA           0x00000009
+/*--
+ */
+#define HC_HABLCa_OPC           (HC_XC_OPC << 10)
+#define HC_HABLCa_InvOPC        (HC_XC_InvOPC << 10)
+#define HC_HABLCa_OPCp5         (HC_XC_OPCp5 << 10)
+#define HC_HABLCa_Csrc          (HC_XC_Csrc << 10)
+#define HC_HABLCa_Cdst          (HC_XC_Cdst << 10)
+#define HC_HABLCa_Asrc          (HC_XC_Asrc << 10)
+#define HC_HABLCa_Adst          (HC_XC_Adst << 10)
+#define HC_HABLCa_Fog           (HC_XC_Fog << 10)
+#define HC_HABLCa_HABLRCa       (HC_XC_HABLRC << 10)
+#define HC_HABLCa_minSrcDst     (HC_XC_minSrcDst << 10)
+#define HC_HABLCa_maxSrcDst     (HC_XC_maxSrcDst << 10)
+#define HC_HABLFCa_OPC              (HC_XC_OPC << 4)
+#define HC_HABLFCa_InvOPC           (HC_XC_InvOPC << 4)
+#define HC_HABLFCa_OPCp5            (HC_XC_OPCp5 << 4)
+#define HC_HABLFCa_Csrc             (HC_XC_Csrc << 4)
+#define HC_HABLFCa_Cdst             (HC_XC_Cdst << 4)
+#define HC_HABLFCa_Asrc             (HC_XC_Asrc << 4)
+#define HC_HABLFCa_Adst             (HC_XC_Adst << 4)
+#define HC_HABLFCa_Fog              (HC_XC_Fog << 4)
+#define HC_HABLFCa_HABLRCa          (HC_XC_HABLRC << 4)
+#define HC_HABLFCa_minSrcDst        (HC_XC_minSrcDst << 4)
+#define HC_HABLFCa_maxSrcDst        (HC_XC_maxSrcDst << 4)
+#define HC_HABLFCa_mimAsrcInvAdst   (HC_XC_mimAsrcInvAdst << 4)
+#define HC_HABLCbias_HABLRCbias 0x00000000
+#define HC_HABLCbias_Asrc       0x00000001
+#define HC_HABLCbias_Adst       0x00000002
+#define HC_HABLCbias_Fog        0x00000003
+#define HC_HABLCbias_Cin        0x00000004
+/* HC_SubA_HABLCop         0x0035
+ */
+#define HC_HABLdot_MASK         0x00010000
+#define HC_HABLCop_MASK         0x00004000
+#define HC_HABLCb_MASK          0x00003f00
+#define HC_HABLCb_C_MASK        0x00003000
+#define HC_HABLCb_OPC_MASK      0x00000f00
+#define HC_HABLFCb_MASK         0x000000fc
+#define HC_HABLFCb_C_MASK       0x000000c0
+#define HC_HABLFCb_OPC_MASK     0x0000003c
+#define HC_HABLCshift_MASK      0x00000003
+#define HC_HABLCb_OPC           (HC_XC_OPC << 8)
+#define HC_HABLCb_InvOPC        (HC_XC_InvOPC << 8)
+#define HC_HABLCb_OPCp5         (HC_XC_OPCp5 << 8)
+#define HC_HABLCb_Csrc          (HC_XC_Csrc << 8)
+#define HC_HABLCb_Cdst          (HC_XC_Cdst << 8)
+#define HC_HABLCb_Asrc          (HC_XC_Asrc << 8)
+#define HC_HABLCb_Adst          (HC_XC_Adst << 8)
+#define HC_HABLCb_Fog           (HC_XC_Fog << 8)
+#define HC_HABLCb_HABLRCa       (HC_XC_HABLRC << 8)
+#define HC_HABLCb_minSrcDst     (HC_XC_minSrcDst << 8)
+#define HC_HABLCb_maxSrcDst     (HC_XC_maxSrcDst << 8)
+#define HC_HABLFCb_OPC              (HC_XC_OPC << 2)
+#define HC_HABLFCb_InvOPC           (HC_XC_InvOPC << 2)
+#define HC_HABLFCb_OPCp5            (HC_XC_OPCp5 << 2)
+#define HC_HABLFCb_Csrc             (HC_XC_Csrc << 2)
+#define HC_HABLFCb_Cdst             (HC_XC_Cdst << 2)
+#define HC_HABLFCb_Asrc             (HC_XC_Asrc << 2)
+#define HC_HABLFCb_Adst             (HC_XC_Adst << 2)
+#define HC_HABLFCb_Fog              (HC_XC_Fog << 2)
+#define HC_HABLFCb_HABLRCb          (HC_XC_HABLRC << 2)
+#define HC_HABLFCb_minSrcDst        (HC_XC_minSrcDst << 2)
+#define HC_HABLFCb_maxSrcDst        (HC_XC_maxSrcDst << 2)
+#define HC_HABLFCb_mimAsrcInvAdst   (HC_XC_mimAsrcInvAdst << 2)
+/* HC_SubA_HABLAsat        0x0036
+ */
+#define HC_HABLAsat_MASK        0x00010000
+#define HC_HABLAa_MASK          0x0000fc00
+#define HC_HABLAa_A_MASK        0x0000c000
+#define HC_HABLAa_OPA_MASK      0x00003c00
+#define HC_HABLFAa_MASK         0x000003f0
+#define HC_HABLFAa_A_MASK       0x00000300
+#define HC_HABLFAa_OPA_MASK     0x000000f0
+#define HC_HABLAbias_MASK       0x0000000f
+#define HC_HABLAbias_A_MASK     0x00000008
+#define HC_HABLAbias_OPA_MASK   0x00000007
+#define HC_HABLAa_OPA           (HC_XA_OPA << 10)
+#define HC_HABLAa_InvOPA        (HC_XA_InvOPA << 10)
+#define HC_HABLAa_OPAp5         (HC_XA_OPAp5 << 10)
+#define HC_HABLAa_0             (HC_XA_0 << 10)
+#define HC_HABLAa_Asrc          (HC_XA_Asrc << 10)
+#define HC_HABLAa_Adst          (HC_XA_Adst << 10)
+#define HC_HABLAa_Fog           (HC_XA_Fog << 10)
+#define HC_HABLAa_minAsrcFog    (HC_XA_minAsrcFog << 10)
+#define HC_HABLAa_minAsrcAdst   (HC_XA_minAsrcAdst << 10)
+#define HC_HABLAa_maxAsrcFog    (HC_XA_maxAsrcFog << 10)
+#define HC_HABLAa_maxAsrcAdst   (HC_XA_maxAsrcAdst << 10)
+#define HC_HABLAa_HABLRA        (HC_XA_HABLRA << 10)
+#define HC_HABLFAa_OPA          (HC_XA_OPA << 4)
+#define HC_HABLFAa_InvOPA       (HC_XA_InvOPA << 4)
+#define HC_HABLFAa_OPAp5        (HC_XA_OPAp5 << 4)
+#define HC_HABLFAa_0            (HC_XA_0 << 4)
+#define HC_HABLFAa_Asrc         (HC_XA_Asrc << 4)
+#define HC_HABLFAa_Adst         (HC_XA_Adst << 4)
+#define HC_HABLFAa_Fog          (HC_XA_Fog << 4)
+#define HC_HABLFAa_minAsrcFog   (HC_XA_minAsrcFog << 4)
+#define HC_HABLFAa_minAsrcAdst  (HC_XA_minAsrcAdst << 4)
+#define HC_HABLFAa_maxAsrcFog   (HC_XA_maxAsrcFog << 4)
+#define HC_HABLFAa_maxAsrcAdst  (HC_XA_maxAsrcAdst << 4)
+#define HC_HABLFAa_minAsrcInvAdst   (HC_XA_minAsrcInvAdst << 4)
+#define HC_HABLFAa_HABLFRA          (HC_XA_HABLFRA << 4)
+#define HC_HABLAbias_HABLRAbias 0x00000000
+#define HC_HABLAbias_Asrc       0x00000001
+#define HC_HABLAbias_Adst       0x00000002
+#define HC_HABLAbias_Fog        0x00000003
+#define HC_HABLAbias_Aaa        0x00000004
+/* HC_SubA_HABLAop         0x0037
+ */
+#define HC_HABLAop_MASK         0x00004000
+#define HC_HABLAb_MASK          0x00003f00
+#define HC_HABLAb_OPA_MASK      0x00000f00
+#define HC_HABLFAb_MASK         0x000000fc
+#define HC_HABLFAb_OPA_MASK     0x0000003c
+#define HC_HABLAshift_MASK      0x00000003
+#define HC_HABLAb_OPA           (HC_XA_OPA << 8)
+#define HC_HABLAb_InvOPA        (HC_XA_InvOPA << 8)
+#define HC_HABLAb_OPAp5         (HC_XA_OPAp5 << 8)
+#define HC_HABLAb_0             (HC_XA_0 << 8)
+#define HC_HABLAb_Asrc          (HC_XA_Asrc << 8)
+#define HC_HABLAb_Adst          (HC_XA_Adst << 8)
+#define HC_HABLAb_Fog           (HC_XA_Fog << 8)
+#define HC_HABLAb_minAsrcFog    (HC_XA_minAsrcFog << 8)
+#define HC_HABLAb_minAsrcAdst   (HC_XA_minAsrcAdst << 8)
+#define HC_HABLAb_maxAsrcFog    (HC_XA_maxAsrcFog << 8)
+#define HC_HABLAb_maxAsrcAdst   (HC_XA_maxAsrcAdst << 8)
+#define HC_HABLAb_HABLRA        (HC_XA_HABLRA << 8)
+#define HC_HABLFAb_OPA          (HC_XA_OPA << 2)
+#define HC_HABLFAb_InvOPA       (HC_XA_InvOPA << 2)
+#define HC_HABLFAb_OPAp5        (HC_XA_OPAp5 << 2)
+#define HC_HABLFAb_0            (HC_XA_0 << 2)
+#define HC_HABLFAb_Asrc         (HC_XA_Asrc << 2)
+#define HC_HABLFAb_Adst         (HC_XA_Adst << 2)
+#define HC_HABLFAb_Fog          (HC_XA_Fog << 2)
+#define HC_HABLFAb_minAsrcFog   (HC_XA_minAsrcFog << 2)
+#define HC_HABLFAb_minAsrcAdst  (HC_XA_minAsrcAdst << 2)
+#define HC_HABLFAb_maxAsrcFog   (HC_XA_maxAsrcFog << 2)
+#define HC_HABLFAb_maxAsrcAdst  (HC_XA_maxAsrcAdst << 2)
+#define HC_HABLFAb_minAsrcInvAdst   (HC_XA_minAsrcInvAdst << 2)
+#define HC_HABLFAb_HABLFRA          (HC_XA_HABLFRA << 2)
+/* HC_SubA_HABLRAa         0x003d
+ */
+#define HC_HABLRAa_MASK         0x00ff0000
+#define HC_HABLRFAa_MASK        0x0000ff00
+#define HC_HABLRAbias_MASK      0x000000ff
+#define HC_HABLRAa_SHIFT        16
+#define HC_HABLRFAa_SHIFT       8
+/* HC_SubA_HABLRAb         0x003e
+ */
+#define HC_HABLRAb_MASK         0x0000ff00
+#define HC_HABLRFAb_MASK        0x000000ff
+#define HC_HABLRAb_SHIFT        8
+/* Destination Setting
+ */
+#define HC_SubA_HDBBasL         0x0040
+#define HC_SubA_HDBBasH         0x0041
+#define HC_SubA_HDBFM           0x0042
+#define HC_SubA_HFBBMSKL        0x0043
+#define HC_SubA_HROP            0x0044
+/* HC_SubA_HDBFM           0x0042
+ */
+#define HC_HDBFM_MASK           0x001f0000
+#define HC_HDBLoc_MASK          0x0000c000
+#define HC_HDBPit_MASK          0x00003fff
+#define HC_HDBFM_RGB555         0x00000000
+#define HC_HDBFM_RGB565         0x00010000
+#define HC_HDBFM_ARGB4444       0x00020000
+#define HC_HDBFM_ARGB1555       0x00030000
+#define HC_HDBFM_BGR555         0x00040000
+#define HC_HDBFM_BGR565         0x00050000
+#define HC_HDBFM_ABGR4444       0x00060000
+#define HC_HDBFM_ABGR1555       0x00070000
+#define HC_HDBFM_ARGB0888       0x00080000
+#define HC_HDBFM_ARGB8888       0x00090000
+#define HC_HDBFM_ABGR0888       0x000a0000
+#define HC_HDBFM_ABGR8888       0x000b0000
+#define HC_HDBLoc_Local         0x00000000
+#define HC_HDBLoc_Sys           0x00004000
+/* HC_SubA_HROP            0x0044
+ */
+#define HC_HROP_MASK            0x00000f00
+#define HC_HFBBMSKH_MASK        0x000000ff
+#define HC_HROP_BLACK           0x00000000
+#define HC_HROP_DPon            0x00000100
+#define HC_HROP_DPna            0x00000200
+#define HC_HROP_Pn              0x00000300
+#define HC_HROP_PDna            0x00000400
+#define HC_HROP_Dn              0x00000500
+#define HC_HROP_DPx             0x00000600
+#define HC_HROP_DPan            0x00000700
+#define HC_HROP_DPa             0x00000800
+#define HC_HROP_DPxn            0x00000900
+#define HC_HROP_D               0x00000a00
+#define HC_HROP_DPno            0x00000b00
+#define HC_HROP_P               0x00000c00
+#define HC_HROP_PDno            0x00000d00
+#define HC_HROP_DPo             0x00000e00
+#define HC_HROP_WHITE           0x00000f00
+/* Fog Setting
+ */
+#define HC_SubA_HFogLF          0x0050
+#define HC_SubA_HFogCL          0x0051
+#define HC_SubA_HFogCH          0x0052
+#define HC_SubA_HFogStL         0x0053
+#define HC_SubA_HFogStH         0x0054
+#define HC_SubA_HFogOOdMF       0x0055
+#define HC_SubA_HFogOOdEF       0x0056
+#define HC_SubA_HFogEndL        0x0057
+#define HC_SubA_HFogDenst       0x0058
+/* HC_SubA_FogLF           0x0050
+ */
+#define HC_FogLF_MASK           0x00000010
+#define HC_FogEq_MASK           0x00000008
+#define HC_FogMD_MASK           0x00000007
+#define HC_FogMD_LocalFog        0x00000000
+#define HC_FogMD_LinearFog       0x00000002
+#define HC_FogMD_ExponentialFog  0x00000004
+#define HC_FogMD_Exponential2Fog 0x00000005
+/* #define HC_FogMD_FogTable       0x00000003 */
+/* HC_SubA_HFogDenst        0x0058
+ */
+#define HC_FogDenst_MASK        0x001fff00
+#define HC_FogEndL_MASK         0x000000ff
+/* Texture subtype definitions
+ */
+#define HC_SubType_Tex0         0x00000000
+#define HC_SubType_Tex1         0x00000001
+#define HC_SubType_TexGeneral   0x000000fe
+/* Attribute of texture n
+ */
+#define HC_SubA_HTXnL0BasL      0x0000
+#define HC_SubA_HTXnL1BasL      0x0001
+#define HC_SubA_HTXnL2BasL      0x0002
+#define HC_SubA_HTXnL3BasL      0x0003
+#define HC_SubA_HTXnL4BasL      0x0004
+#define HC_SubA_HTXnL5BasL      0x0005
+#define HC_SubA_HTXnL6BasL      0x0006
+#define HC_SubA_HTXnL7BasL      0x0007
+#define HC_SubA_HTXnL8BasL      0x0008
+#define HC_SubA_HTXnL9BasL      0x0009
+#define HC_SubA_HTXnLaBasL      0x000a
+#define HC_SubA_HTXnLbBasL      0x000b
+#define HC_SubA_HTXnLcBasL      0x000c
+#define HC_SubA_HTXnLdBasL      0x000d
+#define HC_SubA_HTXnLeBasL      0x000e
+#define HC_SubA_HTXnLfBasL      0x000f
+#define HC_SubA_HTXnL10BasL     0x0010
+#define HC_SubA_HTXnL11BasL     0x0011
+#define HC_SubA_HTXnL012BasH    0x0020
+#define HC_SubA_HTXnL345BasH    0x0021
+#define HC_SubA_HTXnL678BasH    0x0022
+#define HC_SubA_HTXnL9abBasH    0x0023
+#define HC_SubA_HTXnLcdeBasH    0x0024
+#define HC_SubA_HTXnLf1011BasH  0x0025
+#define HC_SubA_HTXnL0Pit       0x002b
+#define HC_SubA_HTXnL1Pit       0x002c
+#define HC_SubA_HTXnL2Pit       0x002d
+#define HC_SubA_HTXnL3Pit       0x002e
+#define HC_SubA_HTXnL4Pit       0x002f
+#define HC_SubA_HTXnL5Pit       0x0030
+#define HC_SubA_HTXnL6Pit       0x0031
+#define HC_SubA_HTXnL7Pit       0x0032
+#define HC_SubA_HTXnL8Pit       0x0033
+#define HC_SubA_HTXnL9Pit       0x0034
+#define HC_SubA_HTXnLaPit       0x0035
+#define HC_SubA_HTXnLbPit       0x0036
+#define HC_SubA_HTXnLcPit       0x0037
+#define HC_SubA_HTXnLdPit       0x0038
+#define HC_SubA_HTXnLePit       0x0039
+#define HC_SubA_HTXnLfPit       0x003a
+#define HC_SubA_HTXnL10Pit      0x003b
+#define HC_SubA_HTXnL11Pit      0x003c
+#define HC_SubA_HTXnL0_5WE      0x004b
+#define HC_SubA_HTXnL6_bWE      0x004c
+#define HC_SubA_HTXnLc_11WE     0x004d
+#define HC_SubA_HTXnL0_5HE      0x0051
+#define HC_SubA_HTXnL6_bHE      0x0052
+#define HC_SubA_HTXnLc_11HE     0x0053
+#define HC_SubA_HTXnL0OS        0x0077
+#define HC_SubA_HTXnTB          0x0078
+#define HC_SubA_HTXnMPMD        0x0079
+#define HC_SubA_HTXnCLODu       0x007a
+#define HC_SubA_HTXnFM          0x007b
+#define HC_SubA_HTXnTRCH        0x007c
+#define HC_SubA_HTXnTRCL        0x007d
+#define HC_SubA_HTXnTBC         0x007e
+#define HC_SubA_HTXnTRAH        0x007f
+#define HC_SubA_HTXnTBLCsat     0x0080
+#define HC_SubA_HTXnTBLCop      0x0081
+#define HC_SubA_HTXnTBLMPfog    0x0082
+#define HC_SubA_HTXnTBLAsat     0x0083
+#define HC_SubA_HTXnTBLRCa      0x0085
+#define HC_SubA_HTXnTBLRCb      0x0086
+#define HC_SubA_HTXnTBLRCc      0x0087
+#define HC_SubA_HTXnTBLRCbias   0x0088
+#define HC_SubA_HTXnTBLRAa      0x0089
+#define HC_SubA_HTXnTBLRFog     0x008a
+#define HC_SubA_HTXnBumpM00     0x0090
+#define HC_SubA_HTXnBumpM01     0x0091
+#define HC_SubA_HTXnBumpM10     0x0092
+#define HC_SubA_HTXnBumpM11     0x0093
+#define HC_SubA_HTXnLScale      0x0094
+#define HC_SubA_HTXSMD          0x0000
+/* HC_SubA_HTXnL012BasH    0x0020
+ */
+#define HC_HTXnL0BasH_MASK      0x000000ff
+#define HC_HTXnL1BasH_MASK      0x0000ff00
+#define HC_HTXnL2BasH_MASK      0x00ff0000
+#define HC_HTXnL1BasH_SHIFT     8
+#define HC_HTXnL2BasH_SHIFT     16
+/* HC_SubA_HTXnL345BasH    0x0021
+ */
+#define HC_HTXnL3BasH_MASK      0x000000ff
+#define HC_HTXnL4BasH_MASK      0x0000ff00
+#define HC_HTXnL5BasH_MASK      0x00ff0000
+#define HC_HTXnL4BasH_SHIFT     8
+#define HC_HTXnL5BasH_SHIFT     16
+/* HC_SubA_HTXnL678BasH    0x0022
+ */
+#define HC_HTXnL6BasH_MASK      0x000000ff
+#define HC_HTXnL7BasH_MASK      0x0000ff00
+#define HC_HTXnL8BasH_MASK      0x00ff0000
+#define HC_HTXnL7BasH_SHIFT     8
+#define HC_HTXnL8BasH_SHIFT     16
+/* HC_SubA_HTXnL9abBasH    0x0023
+ */
+#define HC_HTXnL9BasH_MASK      0x000000ff
+#define HC_HTXnLaBasH_MASK      0x0000ff00
+#define HC_HTXnLbBasH_MASK      0x00ff0000
+#define HC_HTXnLaBasH_SHIFT     8
+#define HC_HTXnLbBasH_SHIFT     16
+/* HC_SubA_HTXnLcdeBasH    0x0024
+ */
+#define HC_HTXnLcBasH_MASK      0x000000ff
+#define HC_HTXnLdBasH_MASK      0x0000ff00
+#define HC_HTXnLeBasH_MASK      0x00ff0000
+#define HC_HTXnLdBasH_SHIFT     8
+#define HC_HTXnLeBasH_SHIFT     16
+/* HC_SubA_HTXnLcdeBasH    0x0025
+ */
+#define HC_HTXnLfBasH_MASK      0x000000ff
+#define HC_HTXnL10BasH_MASK      0x0000ff00
+#define HC_HTXnL11BasH_MASK      0x00ff0000
+#define HC_HTXnL10BasH_SHIFT     8
+#define HC_HTXnL11BasH_SHIFT     16
+/* HC_SubA_HTXnL0Pit       0x002b
+ */
+#define HC_HTXnLnPit_MASK       0x00003fff
+#define HC_HTXnEnPit_MASK       0x00080000
+#define HC_HTXnLnPitE_MASK      0x00f00000
+#define HC_HTXnLnPitE_SHIFT     20
+/* HC_SubA_HTXnL0_5WE      0x004b
+ */
+#define HC_HTXnL0WE_MASK        0x0000000f
+#define HC_HTXnL1WE_MASK        0x000000f0
+#define HC_HTXnL2WE_MASK        0x00000f00
+#define HC_HTXnL3WE_MASK        0x0000f000
+#define HC_HTXnL4WE_MASK        0x000f0000
+#define HC_HTXnL5WE_MASK        0x00f00000
+#define HC_HTXnL1WE_SHIFT       4
+#define HC_HTXnL2WE_SHIFT       8
+#define HC_HTXnL3WE_SHIFT       12
+#define HC_HTXnL4WE_SHIFT       16
+#define HC_HTXnL5WE_SHIFT       20
+/* HC_SubA_HTXnL6_bWE      0x004c
+ */
+#define HC_HTXnL6WE_MASK        0x0000000f
+#define HC_HTXnL7WE_MASK        0x000000f0
+#define HC_HTXnL8WE_MASK        0x00000f00
+#define HC_HTXnL9WE_MASK        0x0000f000
+#define HC_HTXnLaWE_MASK        0x000f0000
+#define HC_HTXnLbWE_MASK        0x00f00000
+#define HC_HTXnL7WE_SHIFT       4
+#define HC_HTXnL8WE_SHIFT       8
+#define HC_HTXnL9WE_SHIFT       12
+#define HC_HTXnLaWE_SHIFT       16
+#define HC_HTXnLbWE_SHIFT       20
+/* HC_SubA_HTXnLc_11WE      0x004d
+ */
+#define HC_HTXnLcWE_MASK        0x0000000f
+#define HC_HTXnLdWE_MASK        0x000000f0
+#define HC_HTXnLeWE_MASK        0x00000f00
+#define HC_HTXnLfWE_MASK        0x0000f000
+#define HC_HTXnL10WE_MASK       0x000f0000
+#define HC_HTXnL11WE_MASK       0x00f00000
+#define HC_HTXnLdWE_SHIFT       4
+#define HC_HTXnLeWE_SHIFT       8
+#define HC_HTXnLfWE_SHIFT       12
+#define HC_HTXnL10WE_SHIFT      16
+#define HC_HTXnL11WE_SHIFT      20
+/* HC_SubA_HTXnL0_5HE      0x0051
+ */
+#define HC_HTXnL0HE_MASK        0x0000000f
+#define HC_HTXnL1HE_MASK        0x000000f0
+#define HC_HTXnL2HE_MASK        0x00000f00
+#define HC_HTXnL3HE_MASK        0x0000f000
+#define HC_HTXnL4HE_MASK        0x000f0000
+#define HC_HTXnL5HE_MASK        0x00f00000
+#define HC_HTXnL1HE_SHIFT       4
+#define HC_HTXnL2HE_SHIFT       8
+#define HC_HTXnL3HE_SHIFT       12
+#define HC_HTXnL4HE_SHIFT       16
+#define HC_HTXnL5HE_SHIFT       20
+/* HC_SubA_HTXnL6_bHE      0x0052
+ */
+#define HC_HTXnL6HE_MASK        0x0000000f
+#define HC_HTXnL7HE_MASK        0x000000f0
+#define HC_HTXnL8HE_MASK        0x00000f00
+#define HC_HTXnL9HE_MASK        0x0000f000
+#define HC_HTXnLaHE_MASK        0x000f0000
+#define HC_HTXnLbHE_MASK        0x00f00000
+#define HC_HTXnL7HE_SHIFT       4
+#define HC_HTXnL8HE_SHIFT       8
+#define HC_HTXnL9HE_SHIFT       12
+#define HC_HTXnLaHE_SHIFT       16
+#define HC_HTXnLbHE_SHIFT       20
+/* HC_SubA_HTXnLc_11HE      0x0053
+ */
+#define HC_HTXnLcHE_MASK        0x0000000f
+#define HC_HTXnLdHE_MASK        0x000000f0
+#define HC_HTXnLeHE_MASK        0x00000f00
+#define HC_HTXnLfHE_MASK        0x0000f000
+#define HC_HTXnL10HE_MASK       0x000f0000
+#define HC_HTXnL11HE_MASK       0x00f00000
+#define HC_HTXnLdHE_SHIFT       4
+#define HC_HTXnLeHE_SHIFT       8
+#define HC_HTXnLfHE_SHIFT       12
+#define HC_HTXnL10HE_SHIFT      16
+#define HC_HTXnL11HE_SHIFT      20
+/* HC_SubA_HTXnL0OS        0x0077
+ */
+#define HC_HTXnL0OS_MASK        0x003ff000
+#define HC_HTXnLVmax_MASK       0x00000fc0
+#define HC_HTXnLVmin_MASK       0x0000003f
+#define HC_HTXnL0OS_SHIFT       12
+#define HC_HTXnLVmax_SHIFT      6
+/* HC_SubA_HTXnTB          0x0078
+ */
+#define HC_HTXnTB_MASK          0x00f00000
+#define HC_HTXnFLSe_MASK        0x0000e000
+#define HC_HTXnFLSs_MASK        0x00001c00
+#define HC_HTXnFLTe_MASK        0x00000380
+#define HC_HTXnFLTs_MASK        0x00000070
+#define HC_HTXnFLDs_MASK        0x0000000f
+#define HC_HTXnTB_NoTB          0x00000000
+#define HC_HTXnTB_TBC_S         0x00100000
+#define HC_HTXnTB_TBC_T         0x00200000
+#define HC_HTXnTB_TB_S          0x00400000
+#define HC_HTXnTB_TB_T          0x00800000
+#define HC_HTXnFLSe_Nearest     0x00000000
+#define HC_HTXnFLSe_Linear      0x00002000
+#define HC_HTXnFLSe_NonLinear   0x00004000
+#define HC_HTXnFLSe_Sharp       0x00008000
+#define HC_HTXnFLSe_Flat_Gaussian_Cubic 0x0000c000
+#define HC_HTXnFLSs_Nearest     0x00000000
+#define HC_HTXnFLSs_Linear      0x00000400
+#define HC_HTXnFLSs_NonLinear   0x00000800
+#define HC_HTXnFLSs_Flat_Gaussian_Cubic 0x00001800
+#define HC_HTXnFLTe_Nearest     0x00000000
+#define HC_HTXnFLTe_Linear      0x00000080
+#define HC_HTXnFLTe_NonLinear   0x00000100
+#define HC_HTXnFLTe_Sharp       0x00000180
+#define HC_HTXnFLTe_Flat_Gaussian_Cubic 0x00000300
+#define HC_HTXnFLTs_Nearest     0x00000000
+#define HC_HTXnFLTs_Linear      0x00000010
+#define HC_HTXnFLTs_NonLinear   0x00000020
+#define HC_HTXnFLTs_Flat_Gaussian_Cubic 0x00000060
+#define HC_HTXnFLDs_Tex0        0x00000000
+#define HC_HTXnFLDs_Nearest     0x00000001
+#define HC_HTXnFLDs_Linear      0x00000002
+#define HC_HTXnFLDs_NonLinear   0x00000003
+#define HC_HTXnFLDs_Dither      0x00000004
+#define HC_HTXnFLDs_ConstLOD    0x00000005
+#define HC_HTXnFLDs_Ani         0x00000006
+#define HC_HTXnFLDs_AniDither   0x00000007
+/* HC_SubA_HTXnMPMD        0x0079
+ */
+#define HC_HTXnMPMD_SMASK       0x00070000
+#define HC_HTXnMPMD_TMASK       0x00380000
+#define HC_HTXnLODDTf_MASK      0x00000007
+#define HC_HTXnXY2ST_MASK       0x00000008
+#define HC_HTXnMPMD_Tsingle     0x00000000
+#define HC_HTXnMPMD_Tclamp      0x00080000
+#define HC_HTXnMPMD_Trepeat     0x00100000
+#define HC_HTXnMPMD_Tmirror     0x00180000
+#define HC_HTXnMPMD_Twrap       0x00200000
+#define HC_HTXnMPMD_Ssingle     0x00000000
+#define HC_HTXnMPMD_Sclamp      0x00010000
+#define HC_HTXnMPMD_Srepeat     0x00020000
+#define HC_HTXnMPMD_Smirror     0x00030000
+#define HC_HTXnMPMD_Swrap       0x00040000
+/* HC_SubA_HTXnCLODu       0x007a
+ */
+#define HC_HTXnCLODu_MASK       0x000ffc00
+#define HC_HTXnCLODd_MASK       0x000003ff
+#define HC_HTXnCLODu_SHIFT      10
+/* HC_SubA_HTXnFM          0x007b
+ */
+#define HC_HTXnFM_MASK          0x00ff0000
+#define HC_HTXnLoc_MASK         0x00000003
+#define HC_HTXnFM_INDEX         0x00000000
+#define HC_HTXnFM_Intensity     0x00080000
+#define HC_HTXnFM_Lum           0x00100000
+#define HC_HTXnFM_Alpha         0x00180000
+#define HC_HTXnFM_DX            0x00280000
+#define HC_HTXnFM_ARGB16        0x00880000
+#define HC_HTXnFM_ARGB32        0x00980000
+#define HC_HTXnFM_ABGR16        0x00a80000
+#define HC_HTXnFM_ABGR32        0x00b80000
+#define HC_HTXnFM_RGBA16        0x00c80000
+#define HC_HTXnFM_RGBA32        0x00d80000
+#define HC_HTXnFM_BGRA16        0x00e80000
+#define HC_HTXnFM_BGRA32        0x00f80000
+#define HC_HTXnFM_BUMPMAP       0x00380000
+#define HC_HTXnFM_Index1        (HC_HTXnFM_INDEX     | 0x00000000)
+#define HC_HTXnFM_Index2        (HC_HTXnFM_INDEX     | 0x00010000)
+#define HC_HTXnFM_Index4        (HC_HTXnFM_INDEX     | 0x00020000)
+#define HC_HTXnFM_Index8        (HC_HTXnFM_INDEX     | 0x00030000)
+#define HC_HTXnFM_T1            (HC_HTXnFM_Intensity | 0x00000000)
+#define HC_HTXnFM_T2            (HC_HTXnFM_Intensity | 0x00010000)
+#define HC_HTXnFM_T4            (HC_HTXnFM_Intensity | 0x00020000)
+#define HC_HTXnFM_T8            (HC_HTXnFM_Intensity | 0x00030000)
+#define HC_HTXnFM_L1            (HC_HTXnFM_Lum       | 0x00000000)
+#define HC_HTXnFM_L2            (HC_HTXnFM_Lum       | 0x00010000)
+#define HC_HTXnFM_L4            (HC_HTXnFM_Lum       | 0x00020000)
+#define HC_HTXnFM_L8            (HC_HTXnFM_Lum       | 0x00030000)
+#define HC_HTXnFM_AL44          (HC_HTXnFM_Lum       | 0x00040000)
+#define HC_HTXnFM_AL88          (HC_HTXnFM_Lum       | 0x00050000)
+#define HC_HTXnFM_A1            (HC_HTXnFM_Alpha     | 0x00000000)
+#define HC_HTXnFM_A2            (HC_HTXnFM_Alpha     | 0x00010000)
+#define HC_HTXnFM_A4            (HC_HTXnFM_Alpha     | 0x00020000)
+#define HC_HTXnFM_A8            (HC_HTXnFM_Alpha     | 0x00030000)
+#define HC_HTXnFM_DX1           (HC_HTXnFM_DX        | 0x00010000)
+#define HC_HTXnFM_DX23          (HC_HTXnFM_DX        | 0x00020000)
+#define HC_HTXnFM_DX45          (HC_HTXnFM_DX        | 0x00030000)
+#define HC_HTXnFM_RGB555        (HC_HTXnFM_ARGB16    | 0x00000000)
+#define HC_HTXnFM_RGB565        (HC_HTXnFM_ARGB16    | 0x00010000)
+#define HC_HTXnFM_ARGB1555      (HC_HTXnFM_ARGB16    | 0x00020000)
+#define HC_HTXnFM_ARGB4444      (HC_HTXnFM_ARGB16    | 0x00030000)
+#define HC_HTXnFM_ARGB0888      (HC_HTXnFM_ARGB32    | 0x00000000)
+#define HC_HTXnFM_ARGB8888      (HC_HTXnFM_ARGB32    | 0x00010000)
+#define HC_HTXnFM_BGR555        (HC_HTXnFM_ABGR16    | 0x00000000)
+#define HC_HTXnFM_BGR565        (HC_HTXnFM_ABGR16    | 0x00010000)
+#define HC_HTXnFM_ABGR1555      (HC_HTXnFM_ABGR16    | 0x00020000)
+#define HC_HTXnFM_ABGR4444      (HC_HTXnFM_ABGR16    | 0x00030000)
+#define HC_HTXnFM_ABGR0888      (HC_HTXnFM_ABGR32    | 0x00000000)
+#define HC_HTXnFM_ABGR8888      (HC_HTXnFM_ABGR32    | 0x00010000)
+#define HC_HTXnFM_RGBA5550      (HC_HTXnFM_RGBA16    | 0x00000000)
+#define HC_HTXnFM_RGBA5551      (HC_HTXnFM_RGBA16    | 0x00020000)
+#define HC_HTXnFM_RGBA4444      (HC_HTXnFM_RGBA16    | 0x00030000)
+#define HC_HTXnFM_RGBA8880      (HC_HTXnFM_RGBA32    | 0x00000000)
+#define HC_HTXnFM_RGBA8888      (HC_HTXnFM_RGBA32    | 0x00010000)
+#define HC_HTXnFM_BGRA5550      (HC_HTXnFM_BGRA16    | 0x00000000)
+#define HC_HTXnFM_BGRA5551      (HC_HTXnFM_BGRA16    | 0x00020000)
+#define HC_HTXnFM_BGRA4444      (HC_HTXnFM_BGRA16    | 0x00030000)
+#define HC_HTXnFM_BGRA8880      (HC_HTXnFM_BGRA32    | 0x00000000)
+#define HC_HTXnFM_BGRA8888      (HC_HTXnFM_BGRA32    | 0x00010000)
+#define HC_HTXnFM_VU88          (HC_HTXnFM_BUMPMAP   | 0x00000000)
+#define HC_HTXnFM_LVU655        (HC_HTXnFM_BUMPMAP   | 0x00010000)
+#define HC_HTXnFM_LVU888        (HC_HTXnFM_BUMPMAP   | 0x00020000)
+#define HC_HTXnLoc_Local        0x00000000
+#define HC_HTXnLoc_Sys          0x00000002
+#define HC_HTXnLoc_AGP          0x00000003
+/* HC_SubA_HTXnTRAH        0x007f
+ */
+#define HC_HTXnTRAH_MASK        0x00ff0000
+#define HC_HTXnTRAL_MASK        0x0000ff00
+#define HC_HTXnTBA_MASK         0x000000ff
+#define HC_HTXnTRAH_SHIFT       16
+#define HC_HTXnTRAL_SHIFT       8
+/* HC_SubA_HTXnTBLCsat     0x0080
+ *-- Define the input texture.
+ */
+#define HC_XTC_TOPC             0x00000000
+#define HC_XTC_InvTOPC          0x00000010
+#define HC_XTC_TOPCp5           0x00000020
+#define HC_XTC_Cbias            0x00000000
+#define HC_XTC_InvCbias         0x00000010
+#define HC_XTC_0                0x00000000
+#define HC_XTC_Dif              0x00000001
+#define HC_XTC_Spec             0x00000002
+#define HC_XTC_Tex              0x00000003
+#define HC_XTC_Cur              0x00000004
+#define HC_XTC_Adif             0x00000005
+#define HC_XTC_Fog              0x00000006
+#define HC_XTC_Atex             0x00000007
+#define HC_XTC_Acur             0x00000008
+#define HC_XTC_HTXnTBLRC        0x00000009
+#define HC_XTC_Ctexnext         0x0000000a
+/*--
+ */
+#define HC_HTXnTBLCsat_MASK     0x00800000
+#define HC_HTXnTBLCa_MASK       0x000fc000
+#define HC_HTXnTBLCb_MASK       0x00001f80
+#define HC_HTXnTBLCc_MASK       0x0000003f
+#define HC_HTXnTBLCa_TOPC       (HC_XTC_TOPC << 14)
+#define HC_HTXnTBLCa_InvTOPC    (HC_XTC_InvTOPC << 14)
+#define HC_HTXnTBLCa_TOPCp5     (HC_XTC_TOPCp5 << 14)
+#define HC_HTXnTBLCa_0          (HC_XTC_0 << 14)
+#define HC_HTXnTBLCa_Dif        (HC_XTC_Dif << 14)
+#define HC_HTXnTBLCa_Spec       (HC_XTC_Spec << 14)
+#define HC_HTXnTBLCa_Tex        (HC_XTC_Tex << 14)
+#define HC_HTXnTBLCa_Cur        (HC_XTC_Cur << 14)
+#define HC_HTXnTBLCa_Adif       (HC_XTC_Adif << 14)
+#define HC_HTXnTBLCa_Fog        (HC_XTC_Fog << 14)
+#define HC_HTXnTBLCa_Atex       (HC_XTC_Atex << 14)
+#define HC_HTXnTBLCa_Acur       (HC_XTC_Acur << 14)
+#define HC_HTXnTBLCa_HTXnTBLRC  (HC_XTC_HTXnTBLRC << 14)
+#define HC_HTXnTBLCa_Ctexnext   (HC_XTC_Ctexnext << 14)
+#define HC_HTXnTBLCb_TOPC       (HC_XTC_TOPC << 7)
+#define HC_HTXnTBLCb_InvTOPC    (HC_XTC_InvTOPC << 7)
+#define HC_HTXnTBLCb_TOPCp5     (HC_XTC_TOPCp5 << 7)
+#define HC_HTXnTBLCb_0          (HC_XTC_0 << 7)
+#define HC_HTXnTBLCb_Dif        (HC_XTC_Dif << 7)
+#define HC_HTXnTBLCb_Spec       (HC_XTC_Spec << 7)
+#define HC_HTXnTBLCb_Tex        (HC_XTC_Tex << 7)
+#define HC_HTXnTBLCb_Cur        (HC_XTC_Cur << 7)
+#define HC_HTXnTBLCb_Adif       (HC_XTC_Adif << 7)
+#define HC_HTXnTBLCb_Fog        (HC_XTC_Fog << 7)
+#define HC_HTXnTBLCb_Atex       (HC_XTC_Atex << 7)
+#define HC_HTXnTBLCb_Acur       (HC_XTC_Acur << 7)
+#define HC_HTXnTBLCb_HTXnTBLRC  (HC_XTC_HTXnTBLRC << 7)
+#define HC_HTXnTBLCb_Ctexnext   (HC_XTC_Ctexnext << 7)
+#define HC_HTXnTBLCc_TOPC       (HC_XTC_TOPC << 0)
+#define HC_HTXnTBLCc_InvTOPC    (HC_XTC_InvTOPC << 0)
+#define HC_HTXnTBLCc_TOPCp5     (HC_XTC_TOPCp5 << 0)
+#define HC_HTXnTBLCc_0          (HC_XTC_0 << 0)
+#define HC_HTXnTBLCc_Dif        (HC_XTC_Dif << 0)
+#define HC_HTXnTBLCc_Spec       (HC_XTC_Spec << 0)
+#define HC_HTXnTBLCc_Tex        (HC_XTC_Tex << 0)
+#define HC_HTXnTBLCc_Cur        (HC_XTC_Cur << 0)
+#define HC_HTXnTBLCc_Adif       (HC_XTC_Adif << 0)
+#define HC_HTXnTBLCc_Fog        (HC_XTC_Fog << 0)
+#define HC_HTXnTBLCc_Atex       (HC_XTC_Atex << 0)
+#define HC_HTXnTBLCc_Acur       (HC_XTC_Acur << 0)
+#define HC_HTXnTBLCc_HTXnTBLRC  (HC_XTC_HTXnTBLRC << 0)
+#define HC_HTXnTBLCc_Ctexnext   (HC_XTC_Ctexnext << 0)
+/* HC_SubA_HTXnTBLCop      0x0081
+ */
+#define HC_HTXnTBLdot_MASK      0x00c00000
+#define HC_HTXnTBLCop_MASK      0x00380000
+#define HC_HTXnTBLCbias_MASK    0x0007c000
+#define HC_HTXnTBLCshift_MASK   0x00001800
+#define HC_HTXnTBLAop_MASK      0x00000380
+#define HC_HTXnTBLAbias_MASK    0x00000078
+#define HC_HTXnTBLAshift_MASK   0x00000003
+#define HC_HTXnTBLCop_Add       0x00000000
+#define HC_HTXnTBLCop_Sub       0x00080000
+#define HC_HTXnTBLCop_Min       0x00100000
+#define HC_HTXnTBLCop_Max       0x00180000
+#define HC_HTXnTBLCop_Mask      0x00200000
+#define HC_HTXnTBLCbias_Cbias           (HC_XTC_Cbias << 14)
+#define HC_HTXnTBLCbias_InvCbias        (HC_XTC_InvCbias << 14)
+#define HC_HTXnTBLCbias_0               (HC_XTC_0 << 14)
+#define HC_HTXnTBLCbias_Dif             (HC_XTC_Dif << 14)
+#define HC_HTXnTBLCbias_Spec            (HC_XTC_Spec << 14)
+#define HC_HTXnTBLCbias_Tex             (HC_XTC_Tex << 14)
+#define HC_HTXnTBLCbias_Cur             (HC_XTC_Cur << 14)
+#define HC_HTXnTBLCbias_Adif            (HC_XTC_Adif << 14)
+#define HC_HTXnTBLCbias_Fog             (HC_XTC_Fog << 14)
+#define HC_HTXnTBLCbias_Atex            (HC_XTC_Atex << 14)
+#define HC_HTXnTBLCbias_Acur            (HC_XTC_Acur << 14)
+#define HC_HTXnTBLCbias_HTXnTBLRC       (HC_XTC_HTXnTBLRC << 14)
+#define HC_HTXnTBLCshift_1      0x00000000
+#define HC_HTXnTBLCshift_2      0x00000800
+#define HC_HTXnTBLCshift_No     0x00001000
+#define HC_HTXnTBLCshift_DotP   0x00001800
+/*=* John Sheng [2003.7.18] texture combine *=*/
+#define HC_HTXnTBLDOT3   0x00080000
+#define HC_HTXnTBLDOT4   0x000C0000
+#define HC_HTXnTBLAop_Add       0x00000000
+#define HC_HTXnTBLAop_Sub       0x00000080
+#define HC_HTXnTBLAop_Min       0x00000100
+#define HC_HTXnTBLAop_Max       0x00000180
+#define HC_HTXnTBLAop_Mask      0x00000200
+#define HC_HTXnTBLAbias_Inv             0x00000040
+#define HC_HTXnTBLAbias_Adif            0x00000000
+#define HC_HTXnTBLAbias_Fog             0x00000008
+#define HC_HTXnTBLAbias_Acur            0x00000010
+#define HC_HTXnTBLAbias_HTXnTBLRAbias   0x00000018
+#define HC_HTXnTBLAbias_Atex            0x00000020
+#define HC_HTXnTBLAshift_1      0x00000000
+#define HC_HTXnTBLAshift_2      0x00000001
+#define HC_HTXnTBLAshift_No     0x00000002
+/* #define HC_HTXnTBLAshift_DotP   0x00000003 */
+/* HC_SubA_HTXnTBLMPFog    0x0082
+ */
+#define HC_HTXnTBLMPfog_MASK    0x00e00000
+#define HC_HTXnTBLMPfog_0       0x00000000
+#define HC_HTXnTBLMPfog_Adif    0x00200000
+#define HC_HTXnTBLMPfog_Fog     0x00400000
+#define HC_HTXnTBLMPfog_Atex    0x00600000
+#define HC_HTXnTBLMPfog_Acur    0x00800000
+#define HC_HTXnTBLMPfog_GHTXnTBLRFog    0x00a00000
+/* HC_SubA_HTXnTBLAsat     0x0083
+ *-- Define the texture alpha input.
+ */
+#define HC_XTA_TOPA             0x00000000
+#define HC_XTA_InvTOPA          0x00000008
+#define HC_XTA_TOPAp5           0x00000010
+#define HC_XTA_Adif             0x00000000
+#define HC_XTA_Fog              0x00000001
+#define HC_XTA_Acur             0x00000002
+#define HC_XTA_HTXnTBLRA        0x00000003
+#define HC_XTA_Atex             0x00000004
+#define HC_XTA_Atexnext         0x00000005
+/*--
+ */
+#define HC_HTXnTBLAsat_MASK     0x00800000
+#define HC_HTXnTBLAMB_MASK      0x00700000
+#define HC_HTXnTBLAa_MASK       0x0007c000
+#define HC_HTXnTBLAb_MASK       0x00000f80
+#define HC_HTXnTBLAc_MASK       0x0000001f
+#define HC_HTXnTBLAMB_SHIFT     20
+#define HC_HTXnTBLAa_TOPA       (HC_XTA_TOPA << 14)
+#define HC_HTXnTBLAa_InvTOPA    (HC_XTA_InvTOPA << 14)
+#define HC_HTXnTBLAa_TOPAp5     (HC_XTA_TOPAp5 << 14)
+#define HC_HTXnTBLAa_Adif       (HC_XTA_Adif << 14)
+#define HC_HTXnTBLAa_Fog        (HC_XTA_Fog << 14)
+#define HC_HTXnTBLAa_Acur       (HC_XTA_Acur << 14)
+#define HC_HTXnTBLAa_HTXnTBLRA  (HC_XTA_HTXnTBLRA << 14)
+#define HC_HTXnTBLAa_Atex       (HC_XTA_Atex << 14)
+#define HC_HTXnTBLAa_Atexnext   (HC_XTA_Atexnext << 14)
+#define HC_HTXnTBLAb_TOPA       (HC_XTA_TOPA << 7)
+#define HC_HTXnTBLAb_InvTOPA    (HC_XTA_InvTOPA << 7)
+#define HC_HTXnTBLAb_TOPAp5     (HC_XTA_TOPAp5 << 7)
+#define HC_HTXnTBLAb_Adif       (HC_XTA_Adif << 7)
+#define HC_HTXnTBLAb_Fog        (HC_XTA_Fog << 7)
+#define HC_HTXnTBLAb_Acur       (HC_XTA_Acur << 7)
+#define HC_HTXnTBLAb_HTXnTBLRA  (HC_XTA_HTXnTBLRA << 7)
+#define HC_HTXnTBLAb_Atex       (HC_XTA_Atex << 7)
+#define HC_HTXnTBLAb_Atexnext   (HC_XTA_Atexnext << 7)
+#define HC_HTXnTBLAc_TOPA       (HC_XTA_TOPA << 0)
+#define HC_HTXnTBLAc_InvTOPA    (HC_XTA_InvTOPA << 0)
+#define HC_HTXnTBLAc_TOPAp5     (HC_XTA_TOPAp5 << 0)
+#define HC_HTXnTBLAc_Adif       (HC_XTA_Adif << 0)
+#define HC_HTXnTBLAc_Fog        (HC_XTA_Fog << 0)
+#define HC_HTXnTBLAc_Acur       (HC_XTA_Acur << 0)
+#define HC_HTXnTBLAc_HTXnTBLRA  (HC_XTA_HTXnTBLRA << 0)
+#define HC_HTXnTBLAc_Atex       (HC_XTA_Atex << 0)
+#define HC_HTXnTBLAc_Atexnext   (HC_XTA_Atexnext << 0)
+/* HC_SubA_HTXnTBLRAa      0x0089
+ */
+#define HC_HTXnTBLRAa_MASK      0x00ff0000
+#define HC_HTXnTBLRAb_MASK      0x0000ff00
+#define HC_HTXnTBLRAc_MASK      0x000000ff
+#define HC_HTXnTBLRAa_SHIFT     16
+#define HC_HTXnTBLRAb_SHIFT     8
+#define HC_HTXnTBLRAc_SHIFT     0
+/* HC_SubA_HTXnTBLRFog     0x008a
+ */
+#define HC_HTXnTBLRFog_MASK     0x0000ff00
+#define HC_HTXnTBLRAbias_MASK   0x000000ff
+#define HC_HTXnTBLRFog_SHIFT    8
+#define HC_HTXnTBLRAbias_SHIFT  0
+/* HC_SubA_HTXnLScale      0x0094
+ */
+#define HC_HTXnLScale_MASK      0x0007fc00
+#define HC_HTXnLOff_MASK        0x000001ff
+#define HC_HTXnLScale_SHIFT     10
+/* HC_SubA_HTXSMD          0x0000
+ */
+#define HC_HTXSMD_MASK          0x00000080
+#define HC_HTXTMD_MASK          0x00000040
+#define HC_HTXNum_MASK          0x00000038
+#define HC_HTXTRMD_MASK         0x00000006
+#define HC_HTXCHCLR_MASK        0x00000001
+#define HC_HTXNum_SHIFT         3
+/* Texture Palette n
+ */
+#define HC_SubType_TexPalette0  0x00000000
+#define HC_SubType_TexPalette1  0x00000001
+#define HC_SubType_FogTable     0x00000010
+#define HC_SubType_Stipple      0x00000014
+/* HC_SubA_TexPalette0     0x0000
+ */
+#define HC_HTPnA_MASK           0xff000000
+#define HC_HTPnR_MASK           0x00ff0000
+#define HC_HTPnG_MASK           0x0000ff00
+#define HC_HTPnB_MASK           0x000000ff
+/* HC_SubA_FogTable        0x0010
+ */
+#define HC_HFPn3_MASK           0xff000000
+#define HC_HFPn2_MASK           0x00ff0000
+#define HC_HFPn1_MASK           0x0000ff00
+#define HC_HFPn_MASK            0x000000ff
+#define HC_HFPn3_SHIFT          24
+#define HC_HFPn2_SHIFT          16
+#define HC_HFPn1_SHIFT          8
+/* Auto Testing & Security
+ */
+#define HC_SubA_HenFIFOAT       0x0000
+#define HC_SubA_HFBDrawFirst    0x0004
+#define HC_SubA_HFBBasL         0x0005
+#define HC_SubA_HFBDst          0x0006
+/* HC_SubA_HenFIFOAT       0x0000
+ */
+#define HC_HenFIFOAT_MASK       0x00000020
+#define HC_HenGEMILock_MASK     0x00000010
+#define HC_HenFBASwap_MASK      0x00000008
+#define HC_HenOT_MASK           0x00000004
+#define HC_HenCMDQ_MASK         0x00000002
+#define HC_HenTXCTSU_MASK       0x00000001
+/* HC_SubA_HFBDrawFirst    0x0004
+ */
+#define HC_HFBDrawFirst_MASK    0x00000800
+#define HC_HFBQueue_MASK        0x00000400
+#define HC_HFBLock_MASK         0x00000200
+#define HC_HEOF_MASK            0x00000100
+#define HC_HFBBasH_MASK         0x000000ff
+/* GEMI Setting
+ */
+#define HC_SubA_HTArbRCM        0x0008
+#define HC_SubA_HTArbRZ         0x000a
+#define HC_SubA_HTArbWZ         0x000b
+#define HC_SubA_HTArbRTX        0x000c
+#define HC_SubA_HTArbRCW        0x000d
+#define HC_SubA_HTArbE2         0x000e
+#define HC_SubA_HArbRQCM        0x0010
+#define HC_SubA_HArbWQCM        0x0011
+#define HC_SubA_HGEMITout       0x0020
+#define HC_SubA_HFthRTXD        0x0040
+#define HC_SubA_HFthRTXA        0x0044
+#define HC_SubA_HCMDQstL        0x0050
+#define HC_SubA_HCMDQendL       0x0051
+#define HC_SubA_HCMDQLen        0x0052
+/* HC_SubA_HTArbRCM        0x0008
+ */
+#define HC_HTArbRCM_MASK        0x0000ffff
+/* HC_SubA_HTArbRZ         0x000a
+ */
+#define HC_HTArbRZ_MASK         0x0000ffff
+/* HC_SubA_HTArbWZ         0x000b
+ */
+#define HC_HTArbWZ_MASK         0x0000ffff
+/* HC_SubA_HTArbRTX        0x000c
+ */
+#define HC_HTArbRTX_MASK        0x0000ffff
+/* HC_SubA_HTArbRCW        0x000d
+ */
+#define HC_HTArbRCW_MASK        0x0000ffff
+/* HC_SubA_HTArbE2         0x000e
+ */
+#define HC_HTArbE2_MASK         0x0000ffff
+/* HC_SubA_HArbRQCM        0x0010
+ */
+#define HC_HTArbRQCM_MASK       0x0000ffff
+/* HC_SubA_HArbWQCM        0x0011
+ */
+#define HC_HArbWQCM_MASK        0x0000ffff
+/* HC_SubA_HGEMITout       0x0020
+ */
+#define HC_HGEMITout_MASK       0x000f0000
+#define HC_HNPArbZC_MASK        0x0000ffff
+#define HC_HGEMITout_SHIFT      16
+/* HC_SubA_HFthRTXD        0x0040
+ */
+#define HC_HFthRTXD_MASK        0x00ff0000
+#define HC_HFthRZD_MASK         0x0000ff00
+#define HC_HFthWZD_MASK         0x000000ff
+#define HC_HFthRTXD_SHIFT       16
+#define HC_HFthRZD_SHIFT        8
+/* HC_SubA_HFthRTXA        0x0044
+ */
+#define HC_HFthRTXA_MASK        0x000000ff
+/******************************************************************************
+** Define the Halcyon Internal register access constants. For simulator only.
+******************************************************************************/
+#define HC_SIMA_HAGPBstL        0x0000
+#define HC_SIMA_HAGPBendL       0x0001
+#define HC_SIMA_HAGPCMNT        0x0002
+#define HC_SIMA_HAGPBpL         0x0003
+#define HC_SIMA_HAGPBpH         0x0004
+#define HC_SIMA_HClipTB         0x0005
+#define HC_SIMA_HClipLR         0x0006
+#define HC_SIMA_HFPClipTL       0x0007
+#define HC_SIMA_HFPClipBL       0x0008
+#define HC_SIMA_HFPClipLL       0x0009
+#define HC_SIMA_HFPClipRL       0x000a
+#define HC_SIMA_HFPClipTBH      0x000b
+#define HC_SIMA_HFPClipLRH      0x000c
+#define HC_SIMA_HLP             0x000d
+#define HC_SIMA_HLPRF           0x000e
+#define HC_SIMA_HSolidCL        0x000f
+#define HC_SIMA_HPixGC          0x0010
+#define HC_SIMA_HSPXYOS         0x0011
+#define HC_SIMA_HCmdA           0x0012
+#define HC_SIMA_HCmdB           0x0013
+#define HC_SIMA_HEnable         0x0014
+#define HC_SIMA_HZWBBasL        0x0015
+#define HC_SIMA_HZWBBasH        0x0016
+#define HC_SIMA_HZWBType        0x0017
+#define HC_SIMA_HZBiasL         0x0018
+#define HC_SIMA_HZWBend         0x0019
+#define HC_SIMA_HZWTMD          0x001a
+#define HC_SIMA_HZWCDL          0x001b
+#define HC_SIMA_HZWCTAGnum      0x001c
+#define HC_SIMA_HZCYNum         0x001d
+#define HC_SIMA_HZWCFire        0x001e
+/* #define HC_SIMA_HSBBasL         0x001d */
+/* #define HC_SIMA_HSBBasH         0x001e */
+/* #define HC_SIMA_HSBFM           0x001f */
+#define HC_SIMA_HSTREF          0x0020
+#define HC_SIMA_HSTMD           0x0021
+#define HC_SIMA_HABBasL         0x0022
+#define HC_SIMA_HABBasH         0x0023
+#define HC_SIMA_HABFM           0x0024
+#define HC_SIMA_HATMD           0x0025
+#define HC_SIMA_HABLCsat        0x0026
+#define HC_SIMA_HABLCop         0x0027
+#define HC_SIMA_HABLAsat        0x0028
+#define HC_SIMA_HABLAop         0x0029
+#define HC_SIMA_HABLRCa         0x002a
+#define HC_SIMA_HABLRFCa        0x002b
+#define HC_SIMA_HABLRCbias      0x002c
+#define HC_SIMA_HABLRCb         0x002d
+#define HC_SIMA_HABLRFCb        0x002e
+#define HC_SIMA_HABLRAa         0x002f
+#define HC_SIMA_HABLRAb         0x0030
+#define HC_SIMA_HDBBasL         0x0031
+#define HC_SIMA_HDBBasH         0x0032
+#define HC_SIMA_HDBFM           0x0033
+#define HC_SIMA_HFBBMSKL        0x0034
+#define HC_SIMA_HROP            0x0035
+#define HC_SIMA_HFogLF          0x0036
+#define HC_SIMA_HFogCL          0x0037
+#define HC_SIMA_HFogCH          0x0038
+#define HC_SIMA_HFogStL         0x0039
+#define HC_SIMA_HFogStH         0x003a
+#define HC_SIMA_HFogOOdMF       0x003b
+#define HC_SIMA_HFogOOdEF       0x003c
+#define HC_SIMA_HFogEndL        0x003d
+#define HC_SIMA_HFogDenst       0x003e
+/*---- start of texture 0 setting ----
+ */
+#define HC_SIMA_HTX0L0BasL      0x0040
+#define HC_SIMA_HTX0L1BasL      0x0041
+#define HC_SIMA_HTX0L2BasL      0x0042
+#define HC_SIMA_HTX0L3BasL      0x0043
+#define HC_SIMA_HTX0L4BasL      0x0044
+#define HC_SIMA_HTX0L5BasL      0x0045
+#define HC_SIMA_HTX0L6BasL      0x0046
+#define HC_SIMA_HTX0L7BasL      0x0047
+#define HC_SIMA_HTX0L8BasL      0x0048
+#define HC_SIMA_HTX0L9BasL      0x0049
+#define HC_SIMA_HTX0LaBasL      0x004a
+#define HC_SIMA_HTX0LbBasL      0x004b
+#define HC_SIMA_HTX0LcBasL      0x004c
+#define HC_SIMA_HTX0LdBasL      0x004d
+#define HC_SIMA_HTX0LeBasL      0x004e
+#define HC_SIMA_HTX0LfBasL      0x004f
+#define HC_SIMA_HTX0L10BasL     0x0050
+#define HC_SIMA_HTX0L11BasL     0x0051
+#define HC_SIMA_HTX0L012BasH    0x0052
+#define HC_SIMA_HTX0L345BasH    0x0053
+#define HC_SIMA_HTX0L678BasH    0x0054
+#define HC_SIMA_HTX0L9abBasH    0x0055
+#define HC_SIMA_HTX0LcdeBasH    0x0056
+#define HC_SIMA_HTX0Lf1011BasH  0x0057
+#define HC_SIMA_HTX0L0Pit       0x0058
+#define HC_SIMA_HTX0L1Pit       0x0059
+#define HC_SIMA_HTX0L2Pit       0x005a
+#define HC_SIMA_HTX0L3Pit       0x005b
+#define HC_SIMA_HTX0L4Pit       0x005c
+#define HC_SIMA_HTX0L5Pit       0x005d
+#define HC_SIMA_HTX0L6Pit       0x005e
+#define HC_SIMA_HTX0L7Pit       0x005f
+#define HC_SIMA_HTX0L8Pit       0x0060
+#define HC_SIMA_HTX0L9Pit       0x0061
+#define HC_SIMA_HTX0LaPit       0x0062
+#define HC_SIMA_HTX0LbPit       0x0063
+#define HC_SIMA_HTX0LcPit       0x0064
+#define HC_SIMA_HTX0LdPit       0x0065
+#define HC_SIMA_HTX0LePit       0x0066
+#define HC_SIMA_HTX0LfPit       0x0067
+#define HC_SIMA_HTX0L10Pit      0x0068
+#define HC_SIMA_HTX0L11Pit      0x0069
+#define HC_SIMA_HTX0L0_5WE      0x006a
+#define HC_SIMA_HTX0L6_bWE      0x006b
+#define HC_SIMA_HTX0Lc_11WE     0x006c
+#define HC_SIMA_HTX0L0_5HE      0x006d
+#define HC_SIMA_HTX0L6_bHE      0x006e
+#define HC_SIMA_HTX0Lc_11HE     0x006f
+#define HC_SIMA_HTX0L0OS        0x0070
+#define HC_SIMA_HTX0TB          0x0071
+#define HC_SIMA_HTX0MPMD        0x0072
+#define HC_SIMA_HTX0CLODu       0x0073
+#define HC_SIMA_HTX0FM          0x0074
+#define HC_SIMA_HTX0TRCH        0x0075
+#define HC_SIMA_HTX0TRCL        0x0076
+#define HC_SIMA_HTX0TBC         0x0077
+#define HC_SIMA_HTX0TRAH        0x0078
+#define HC_SIMA_HTX0TBLCsat     0x0079
+#define HC_SIMA_HTX0TBLCop      0x007a
+#define HC_SIMA_HTX0TBLMPfog    0x007b
+#define HC_SIMA_HTX0TBLAsat     0x007c
+#define HC_SIMA_HTX0TBLRCa      0x007d
+#define HC_SIMA_HTX0TBLRCb      0x007e
+#define HC_SIMA_HTX0TBLRCc      0x007f
+#define HC_SIMA_HTX0TBLRCbias   0x0080
+#define HC_SIMA_HTX0TBLRAa      0x0081
+#define HC_SIMA_HTX0TBLRFog     0x0082
+#define HC_SIMA_HTX0BumpM00     0x0083
+#define HC_SIMA_HTX0BumpM01     0x0084
+#define HC_SIMA_HTX0BumpM10     0x0085
+#define HC_SIMA_HTX0BumpM11     0x0086
+#define HC_SIMA_HTX0LScale      0x0087
+/*---- end of texture 0 setting ----      0x008f
+ */
+#define HC_SIMA_TX0TX1_OFF      0x0050
+/*---- start of texture 1 setting ----
+ */
+#define HC_SIMA_HTX1L0BasL      (HC_SIMA_HTX0L0BasL + HC_SIMA_TX0TX1_OFF)
+#define HC_SIMA_HTX1L1BasL      (HC_SIMA_HTX0L1BasL + HC_SIMA_TX0TX1_OFF)
+#define HC_SIMA_HTX1L2BasL      (HC_SIMA_HTX0L2BasL + HC_SIMA_TX0TX1_OFF)
+#define HC_SIMA_HTX1L3BasL      (HC_SIMA_HTX0L3BasL + HC_SIMA_TX0TX1_OFF)
+#define HC_SIMA_HTX1L4BasL      (HC_SIMA_HTX0L4BasL + HC_SIMA_TX0TX1_OFF)
+#define HC_SIMA_HTX1L5BasL      (HC_SIMA_HTX0L5BasL + HC_SIMA_TX0TX1_OFF)
+#define HC_SIMA_HTX1L6BasL      (HC_SIMA_HTX0L6BasL + HC_SIMA_TX0TX1_OFF)
+#define HC_SIMA_HTX1L7BasL      (HC_SIMA_HTX0L7BasL + HC_SIMA_TX0TX1_OFF)
+#define HC_SIMA_HTX1L8BasL      (HC_SIMA_HTX0L8BasL + HC_SIMA_TX0TX1_OFF)
+#define HC_SIMA_HTX1L9BasL      (HC_SIMA_HTX0L9BasL + HC_SIMA_TX0TX1_OFF)
+#define HC_SIMA_HTX1LaBasL      (HC_SIMA_HTX0LaBasL + HC_SIMA_TX0TX1_OFF)
+#define HC_SIMA_HTX1LbBasL      (HC_SIMA_HTX0LbBasL + HC_SIMA_TX0TX1_OFF)
+#define HC_SIMA_HTX1LcBasL      (HC_SIMA_HTX0LcBasL + HC_SIMA_TX0TX1_OFF)
+#define HC_SIMA_HTX1LdBasL      (HC_SIMA_HTX0LdBasL + HC_SIMA_TX0TX1_OFF)
+#define HC_SIMA_HTX1LeBasL      (HC_SIMA_HTX0LeBasL + HC_SIMA_TX0TX1_OFF)
+#define HC_SIMA_HTX1LfBasL      (HC_SIMA_HTX0LfBasL + HC_SIMA_TX0TX1_OFF)
+#define HC_SIMA_HTX1L10BasL     (HC_SIMA_HTX0L10BasL + HC_SIMA_TX0TX1_OFF)
+#define HC_SIMA_HTX1L11BasL     (HC_SIMA_HTX0L11BasL + HC_SIMA_TX0TX1_OFF)
+#define HC_SIMA_HTX1L012BasH    (HC_SIMA_HTX0L012BasH + HC_SIMA_TX0TX1_OFF)
+#define HC_SIMA_HTX1L345BasH    (HC_SIMA_HTX0L345BasH + HC_SIMA_TX0TX1_OFF)
+#define HC_SIMA_HTX1L678BasH    (HC_SIMA_HTX0L678BasH + HC_SIMA_TX0TX1_OFF)
+#define HC_SIMA_HTX1L9abBasH    (HC_SIMA_HTX0L9abBasH + HC_SIMA_TX0TX1_OFF)
+#define HC_SIMA_HTX1LcdeBasH    (HC_SIMA_HTX0LcdeBasH + HC_SIMA_TX0TX1_OFF)
+#define HC_SIMA_HTX1Lf1011BasH  (HC_SIMA_HTX0Lf1011BasH + HC_SIMA_TX0TX1_OFF)
+#define HC_SIMA_HTX1L0Pit       (HC_SIMA_HTX0L0Pit + HC_SIMA_TX0TX1_OFF)
+#define HC_SIMA_HTX1L1Pit       (HC_SIMA_HTX0L1Pit + HC_SIMA_TX0TX1_OFF)
+#define HC_SIMA_HTX1L2Pit       (HC_SIMA_HTX0L2Pit + HC_SIMA_TX0TX1_OFF)
+#define HC_SIMA_HTX1L3Pit       (HC_SIMA_HTX0L3Pit + HC_SIMA_TX0TX1_OFF)
+#define HC_SIMA_HTX1L4Pit       (HC_SIMA_HTX0L4Pit + HC_SIMA_TX0TX1_OFF)
+#define HC_SIMA_HTX1L5Pit       (HC_SIMA_HTX0L5Pit + HC_SIMA_TX0TX1_OFF)
+#define HC_SIMA_HTX1L6Pit       (HC_SIMA_HTX0L6Pit + HC_SIMA_TX0TX1_OFF)
+#define HC_SIMA_HTX1L7Pit       (HC_SIMA_HTX0L7Pit + HC_SIMA_TX0TX1_OFF)
+#define HC_SIMA_HTX1L8Pit       (HC_SIMA_HTX0L8Pit + HC_SIMA_TX0TX1_OFF)
+#define HC_SIMA_HTX1L9Pit       (HC_SIMA_HTX0L9Pit + HC_SIMA_TX0TX1_OFF)
+#define HC_SIMA_HTX1LaPit       (HC_SIMA_HTX0LaPit + HC_SIMA_TX0TX1_OFF)
+#define HC_SIMA_HTX1LbPit       (HC_SIMA_HTX0LbPit + HC_SIMA_TX0TX1_OFF)
+#define HC_SIMA_HTX1LcPit       (HC_SIMA_HTX0LcPit + HC_SIMA_TX0TX1_OFF)
+#define HC_SIMA_HTX1LdPit       (HC_SIMA_HTX0LdPit + HC_SIMA_TX0TX1_OFF)
+#define HC_SIMA_HTX1LePit       (HC_SIMA_HTX0LePit + HC_SIMA_TX0TX1_OFF)
+#define HC_SIMA_HTX1LfPit       (HC_SIMA_HTX0LfPit + HC_SIMA_TX0TX1_OFF)
+#define HC_SIMA_HTX1L10Pit      (HC_SIMA_HTX0L10Pit + HC_SIMA_TX0TX1_OFF)
+#define HC_SIMA_HTX1L11Pit      (HC_SIMA_HTX0L11Pit + HC_SIMA_TX0TX1_OFF)
+#define HC_SIMA_HTX1L0_5WE      (HC_SIMA_HTX0L0_5WE + HC_SIMA_TX0TX1_OFF)
+#define HC_SIMA_HTX1L6_bWE      (HC_SIMA_HTX0L6_bWE + HC_SIMA_TX0TX1_OFF)
+#define HC_SIMA_HTX1Lc_11WE     (HC_SIMA_HTX0Lc_11WE + HC_SIMA_TX0TX1_OFF)
+#define HC_SIMA_HTX1L0_5HE      (HC_SIMA_HTX0L0_5HE + HC_SIMA_TX0TX1_OFF)
+#define HC_SIMA_HTX1L6_bHE      (HC_SIMA_HTX0L6_bHE + HC_SIMA_TX0TX1_OFF)
+#define HC_SIMA_HTX1Lc_11HE      (HC_SIMA_HTX0Lc_11HE + HC_SIMA_TX0TX1_OFF)
+#define HC_SIMA_HTX1L0OS        (HC_SIMA_HTX0L0OS + HC_SIMA_TX0TX1_OFF)
+#define HC_SIMA_HTX1TB          (HC_SIMA_HTX0TB + HC_SIMA_TX0TX1_OFF)
+#define HC_SIMA_HTX1MPMD        (HC_SIMA_HTX0MPMD + HC_SIMA_TX0TX1_OFF)
+#define HC_SIMA_HTX1CLODu       (HC_SIMA_HTX0CLODu + HC_SIMA_TX0TX1_OFF)
+#define HC_SIMA_HTX1FM          (HC_SIMA_HTX0FM + HC_SIMA_TX0TX1_OFF)
+#define HC_SIMA_HTX1TRCH        (HC_SIMA_HTX0TRCH + HC_SIMA_TX0TX1_OFF)
+#define HC_SIMA_HTX1TRCL        (HC_SIMA_HTX0TRCL + HC_SIMA_TX0TX1_OFF)
+#define HC_SIMA_HTX1TBC         (HC_SIMA_HTX0TBC + HC_SIMA_TX0TX1_OFF)
+#define HC_SIMA_HTX1TRAH        (HC_SIMA_HTX0TRAH + HC_SIMA_TX0TX1_OFF)
+#define HC_SIMA_HTX1LTC         (HC_SIMA_HTX0LTC + HC_SIMA_TX0TX1_OFF)
+#define HC_SIMA_HTX1LTA         (HC_SIMA_HTX0LTA + HC_SIMA_TX0TX1_OFF)
+#define HC_SIMA_HTX1TBLCsat     (HC_SIMA_HTX0TBLCsat + HC_SIMA_TX0TX1_OFF)
+#define HC_SIMA_HTX1TBLCop      (HC_SIMA_HTX0TBLCop + HC_SIMA_TX0TX1_OFF)
+#define HC_SIMA_HTX1TBLMPfog    (HC_SIMA_HTX0TBLMPfog + HC_SIMA_TX0TX1_OFF)
+#define HC_SIMA_HTX1TBLAsat     (HC_SIMA_HTX0TBLAsat + HC_SIMA_TX0TX1_OFF)
+#define HC_SIMA_HTX1TBLRCa      (HC_SIMA_HTX0TBLRCa + HC_SIMA_TX0TX1_OFF)
+#define HC_SIMA_HTX1TBLRCb      (HC_SIMA_HTX0TBLRCb + HC_SIMA_TX0TX1_OFF)
+#define HC_SIMA_HTX1TBLRCc      (HC_SIMA_HTX0TBLRCc + HC_SIMA_TX0TX1_OFF)
+#define HC_SIMA_HTX1TBLRCbias   (HC_SIMA_HTX0TBLRCbias + HC_SIMA_TX0TX1_OFF)
+#define HC_SIMA_HTX1TBLRAa      (HC_SIMA_HTX0TBLRAa + HC_SIMA_TX0TX1_OFF)
+#define HC_SIMA_HTX1TBLRFog     (HC_SIMA_HTX0TBLRFog + HC_SIMA_TX0TX1_OFF)
+#define HC_SIMA_HTX1BumpM00     (HC_SIMA_HTX0BumpM00 + HC_SIMA_TX0TX1_OFF)
+#define HC_SIMA_HTX1BumpM01     (HC_SIMA_HTX0BumpM01 + HC_SIMA_TX0TX1_OFF)
+#define HC_SIMA_HTX1BumpM10     (HC_SIMA_HTX0BumpM10 + HC_SIMA_TX0TX1_OFF)
+#define HC_SIMA_HTX1BumpM11     (HC_SIMA_HTX0BumpM11 + HC_SIMA_TX0TX1_OFF)
+#define HC_SIMA_HTX1LScale      (HC_SIMA_HTX0LScale + HC_SIMA_TX0TX1_OFF)
+/*---- end of texture 1 setting ---- 0xaf
+ */
+#define HC_SIMA_HTXSMD          0x00b0
+#define HC_SIMA_HenFIFOAT       0x00b1
+#define HC_SIMA_HFBDrawFirst    0x00b2
+#define HC_SIMA_HFBBasL         0x00b3
+#define HC_SIMA_HTArbRCM        0x00b4
+#define HC_SIMA_HTArbRZ         0x00b5
+#define HC_SIMA_HTArbWZ         0x00b6
+#define HC_SIMA_HTArbRTX        0x00b7
+#define HC_SIMA_HTArbRCW        0x00b8
+#define HC_SIMA_HTArbE2         0x00b9
+#define HC_SIMA_HGEMITout       0x00ba
+#define HC_SIMA_HFthRTXD        0x00bb
+#define HC_SIMA_HFthRTXA        0x00bc
+/* Define the texture palette 0
+ */
+#define HC_SIMA_HTP0            0x0100
+#define HC_SIMA_HTP1            0x0200
+#define HC_SIMA_FOGTABLE        0x0300
+#define HC_SIMA_STIPPLE         0x0400
+#define HC_SIMA_HE3Fire         0x0440
+#define HC_SIMA_TRANS_SET       0x0441
+#define HC_SIMA_HREngSt         0x0442
+#define HC_SIMA_HRFIFOempty     0x0443
+#define HC_SIMA_HRFIFOfull      0x0444
+#define HC_SIMA_HRErr           0x0445
+#define HC_SIMA_FIFOstatus      0x0446
+/******************************************************************************
+** Define the AGP command header.
+******************************************************************************/
+#define HC_ACMD_MASK            0xfe000000
+#define HC_ACMD_SUB_MASK        0x0c000000
+#define HC_ACMD_HCmdA           0xee000000
+#define HC_ACMD_HCmdB           0xec000000
+#define HC_ACMD_HCmdC           0xea000000
+#define HC_ACMD_H1              0xf0000000
+#define HC_ACMD_H2              0xf2000000
+#define HC_ACMD_H3              0xf4000000
+#define HC_ACMD_H4              0xf6000000
+#define HC_ACMD_H1IO_MASK       0x000001ff
+#define HC_ACMD_H2IO1_MASK      0x001ff000
+#define HC_ACMD_H2IO2_MASK      0x000001ff
+#define HC_ACMD_H2IO1_SHIFT     12
+#define HC_ACMD_H2IO2_SHIFT     0
+#define HC_ACMD_H3IO_MASK       0x000001ff
+#define HC_ACMD_H3COUNT_MASK    0x01fff000
+#define HC_ACMD_H3COUNT_SHIFT   12
+#define HC_ACMD_H4ID_MASK       0x000001ff
+#define HC_ACMD_H4COUNT_MASK    0x01fffe00
+#define HC_ACMD_H4COUNT_SHIFT   9
+/********************************************************************************
+** Define Header
+********************************************************************************/
+#define HC_HEADER2              0xF210F110
+/********************************************************************************
+** Define Dummy Value
+********************************************************************************/
+#define HC_DUMMY                0xCCCCCCCC
+/********************************************************************************
+** Define for DMA use
+********************************************************************************/
+#define HALCYON_HEADER2     0XF210F110
+#define HALCYON_FIRECMD     0XEE100000
+#define HALCYON_FIREMASK    0XFFF00000
+#define HALCYON_CMDB        0XEC000000
+#define HALCYON_CMDBMASK    0XFFFE0000
+#define HALCYON_SUB_ADDR0   0X00000000
+#define HALCYON_HEADER1MASK 0XFFFFFC00
+#define HALCYON_HEADER1     0XF0000000
+#define HC_SubA_HAGPBstL        0x0060
+#define HC_SubA_HAGPBendL       0x0061
+#define HC_SubA_HAGPCMNT        0x0062
+#define HC_SubA_HAGPBpL         0x0063
+#define HC_SubA_HAGPBpH         0x0064
+#define HC_HAGPCMNT_MASK        0x00800000
+#define HC_HCmdErrClr_MASK      0x00400000
+#define HC_HAGPBendH_MASK       0x0000ff00
+#define HC_HAGPBstH_MASK        0x000000ff
+#define HC_HAGPBendH_SHIFT      8
+#define HC_HAGPBstH_SHIFT       0
+#define HC_HAGPBpL_MASK         0x00fffffc
+#define HC_HAGPBpID_MASK        0x00000003
+#define HC_HAGPBpID_PAUSE       0x00000000
+#define HC_HAGPBpID_JUMP        0x00000001
+#define HC_HAGPBpID_STOP        0x00000002
+#define HC_HAGPBpH_MASK         0x00ffffff
+#define VIA_VIDEO_HEADER5       0xFE040000
+#define VIA_VIDEO_HEADER6       0xFE050000
+#define VIA_VIDEO_HEADER7       0xFE060000
+#define VIA_VIDEOMASK           0xFFFF0000
+#endif
diff --git a/drivers/char/drm/via_dma.c b/drivers/char/drm/via_dma.c
new file mode 100644
index 000000000000..82f839451622
--- /dev/null
+++ b/drivers/char/drm/via_dma.c
@@ -0,0 +1,741 @@
+/* via_dma.c -- DMA support for the VIA Unichrome/Pro
+ * 
+ * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
+ * All Rights Reserved.
+ *
+ * Copyright 2004 Digeo, Inc., Palo Alto, CA, U.S.A.
+ * All Rights Reserved.
+ * 
+ * Copyright 2004 The Unichrome project.
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sub license,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial portions
+ * of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, 
+ * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 
+ * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 
+ * USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors: 
+ *    Tungsten Graphics, 
+ *    Erdi Chen, 
+ *    Thomas Hellstrom.
+ */
+#include "drmP.h"
+#include "drm.h"
+#include "via_drm.h"
+#include "via_drv.h"
+#include "via_3d_reg.h"
+#define CMDBUF_ALIGNMENT_SIZE   (0x100)
+#define CMDBUF_ALIGNMENT_MASK   (0x0ff)
+/* defines for VIA 3D registers */
+#define VIA_REG_STATUS          0x400
+#define VIA_REG_TRANSET         0x43C
+#define VIA_REG_TRANSPACE       0x440
+/* VIA_REG_STATUS(0x400): Engine Status */
+#define VIA_CMD_RGTR_BUSY       0x00000080      /* Command Regulator is busy */
+#define VIA_2D_ENG_BUSY         0x00000001      /* 2D Engine is busy */
+#define VIA_3D_ENG_BUSY         0x00000002      /* 3D Engine is busy */
+#define VIA_VR_QUEUE_BUSY       0x00020000      /* Virtual Queue is busy */
+#define SetReg2DAGP(nReg, nData) {                              \
+        *((uint32_t *)(vb)) = ((nReg) >> 2) | HALCYON_HEADER1;  \
+        *((uint32_t *)(vb) + 1) = (nData);                      \
+        vb = ((uint32_t *)vb) + 2;                              \
+        dev_priv->dma_low +=8;                                  \
+}
+#define via_flush_write_combine() DRM_MEMORYBARRIER() 
+#define VIA_OUT_RING_QW(w1,w2)                  \
+        *vb++ = (w1);                           \
+        *vb++ = (w2);                           \
+        dev_priv->dma_low += 8; 
+static void via_cmdbuf_start(drm_via_private_t * dev_priv);
+static void via_cmdbuf_pause(drm_via_private_t * dev_priv);
+static void via_cmdbuf_reset(drm_via_private_t * dev_priv);
+static void via_cmdbuf_rewind(drm_via_private_t * dev_priv);
+static int via_wait_idle(drm_via_private_t * dev_priv);
+static void via_pad_cache(drm_via_private_t *dev_priv, int qwords);
+/*
+ * Free space in command buffer.
+ */
+static uint32_t
+via_cmdbuf_space(drm_via_private_t *dev_priv)
+{
+        uint32_t agp_base = dev_priv->dma_offset + 
+                (uint32_t) dev_priv->agpAddr;
+        uint32_t hw_addr = *(dev_priv->hw_addr_ptr) - agp_base;
+        
+        return ((hw_addr <= dev_priv->dma_low) ? 
+                (dev_priv->dma_high + hw_addr - dev_priv->dma_low) : 
+                (hw_addr - dev_priv->dma_low));
+}
+/*
+ * How much does the command regulator lag behind?
+ */
+static uint32_t
+via_cmdbuf_lag(drm_via_private_t *dev_priv)
+{
+        uint32_t agp_base = dev_priv->dma_offset + 
+                (uint32_t) dev_priv->agpAddr;
+        uint32_t hw_addr = *(dev_priv->hw_addr_ptr) - agp_base;
+        
+        return ((hw_addr <= dev_priv->dma_low) ? 
+                (dev_priv->dma_low - hw_addr) : 
+                (dev_priv->dma_wrap + dev_priv->dma_low - hw_addr));
+}
+/*
+ * Check that the given size fits in the buffer, otherwise wait.
+ */
+static inline int
+via_cmdbuf_wait(drm_via_private_t * dev_priv, unsigned int size)
+{
+        uint32_t agp_base = dev_priv->dma_offset + (uint32_t) dev_priv->agpAddr;
+        uint32_t cur_addr, hw_addr, next_addr;
+        volatile uint32_t *hw_addr_ptr;
+        uint32_t count;
+        hw_addr_ptr = dev_priv->hw_addr_ptr;
+        cur_addr = dev_priv->dma_low;
+        next_addr = cur_addr + size + 512*1024;
+        count = 1000000;
+        do {
+                hw_addr = *hw_addr_ptr - agp_base;
+                if (count-- == 0) {
+                        DRM_ERROR("via_cmdbuf_wait timed out hw %x cur_addr %x next_addr %x\n",
+                                  hw_addr, cur_addr, next_addr);
+                        return -1;
+                }
+        } while ((cur_addr < hw_addr) && (next_addr >= hw_addr));
+        return 0;
+}
+/*
+ * Checks whether buffer head has reach the end. Rewind the ring buffer
+ * when necessary.
+ *
+ * Returns virtual pointer to ring buffer.
+ */
+static inline uint32_t *via_check_dma(drm_via_private_t * dev_priv,
+                                      unsigned int size)
+{
+        if ((dev_priv->dma_low + size + 4*CMDBUF_ALIGNMENT_SIZE) > dev_priv->dma_high) {
+                via_cmdbuf_rewind(dev_priv);
+        }
+        if (via_cmdbuf_wait(dev_priv, size) != 0) {
+                return NULL;
+        }
+        return (uint32_t *) (dev_priv->dma_ptr + dev_priv->dma_low);
+}
+int via_dma_cleanup(drm_device_t * dev)
+{
+        if (dev->dev_private) {
+                drm_via_private_t *dev_priv =
+                        (drm_via_private_t *) dev->dev_private;
+                if (dev_priv->ring.virtual_start) {
+                        via_cmdbuf_reset(dev_priv);
+                        drm_core_ioremapfree(&dev_priv->ring.map, dev);
+                        dev_priv->ring.virtual_start = NULL;
+                }
+        }
+        return 0;
+}
+static int via_initialize(drm_device_t * dev,
+                          drm_via_private_t * dev_priv,
+                          drm_via_dma_init_t * init)
+{
+        if (!dev_priv || !dev_priv->mmio) {
+                DRM_ERROR("via_dma_init called before via_map_init\n");
+                return DRM_ERR(EFAULT);
+        }
+        if (dev_priv->ring.virtual_start != NULL) {
+                DRM_ERROR("%s called again without calling cleanup\n",
+                          __FUNCTION__);
+                return DRM_ERR(EFAULT);
+        }
+        if (!dev->agp || !dev->agp->base) {
+                DRM_ERROR("%s called with no agp memory available\n", 
+                          __FUNCTION__);
+                return DRM_ERR(EFAULT);
+        }
+        dev_priv->ring.map.offset = dev->agp->base + init->offset;
+        dev_priv->ring.map.size = init->size;
+        dev_priv->ring.map.type = 0;
+        dev_priv->ring.map.flags = 0;
+        dev_priv->ring.map.mtrr = 0;
+        drm_core_ioremap(&dev_priv->ring.map, dev);
+        if (dev_priv->ring.map.handle == NULL) {
+                via_dma_cleanup(dev);
+                DRM_ERROR("can not ioremap virtual address for"
+                          " ring buffer\n");
+                return DRM_ERR(ENOMEM);
+        }
+        dev_priv->ring.virtual_start = dev_priv->ring.map.handle;
+        dev_priv->dma_ptr = dev_priv->ring.virtual_start;
+        dev_priv->dma_low = 0;
+        dev_priv->dma_high = init->size;
+        dev_priv->dma_wrap = init->size;
+        dev_priv->dma_offset = init->offset;
+        dev_priv->last_pause_ptr = NULL;
+        dev_priv->hw_addr_ptr = dev_priv->mmio->handle + init->reg_pause_addr;
+        via_cmdbuf_start(dev_priv);
+        return 0;
+}
+int via_dma_init(DRM_IOCTL_ARGS)
+{
+        DRM_DEVICE;
+        drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private;
+        drm_via_dma_init_t init;
+        int retcode = 0;
+        DRM_COPY_FROM_USER_IOCTL(init, (drm_via_dma_init_t *) data,
+                                 sizeof(init));
+        switch (init.func) {
+        case VIA_INIT_DMA:
+                if (!capable(CAP_SYS_ADMIN))
+                        retcode = DRM_ERR(EPERM);
+                else
+                        retcode = via_initialize(dev, dev_priv, &init);
+                break;
+        case VIA_CLEANUP_DMA:
+                if (!capable(CAP_SYS_ADMIN))
+                        retcode = DRM_ERR(EPERM);
+                else
+                        retcode = via_dma_cleanup(dev);
+                break;
+        case VIA_DMA_INITIALIZED:
+                retcode = (dev_priv->ring.virtual_start != NULL) ? 
+                        0: DRM_ERR( EFAULT );
+                break;
+        default:
+                retcode = DRM_ERR(EINVAL);
+                break;
+        }
+        return retcode;
+}
+static int via_dispatch_cmdbuffer(drm_device_t * dev, drm_via_cmdbuffer_t * cmd)
+{
+        drm_via_private_t *dev_priv;
+        uint32_t *vb;
+        int ret;
+        dev_priv = (drm_via_private_t *) dev->dev_private;
+        if (dev_priv->ring.virtual_start == NULL) {
+                DRM_ERROR("%s called without initializing AGP ring buffer.\n",
+                          __FUNCTION__);
+                return DRM_ERR(EFAULT);
+        }
+        if (cmd->size > VIA_PCI_BUF_SIZE) {
+                return DRM_ERR(ENOMEM);
+        } 
+        if (DRM_COPY_FROM_USER(dev_priv->pci_buf, cmd->buf, cmd->size))
+                return DRM_ERR(EFAULT);
+        /*
+         * Running this function on AGP memory is dead slow. Therefore
+         * we run it on a temporary cacheable system memory buffer and
+         * copy it to AGP memory when ready.
+         */
+                
+        if ((ret = via_verify_command_stream((uint32_t *)dev_priv->pci_buf, cmd->size, dev, 1))) {
+                return ret;
+        }
+        
+        
+        vb = via_check_dma(dev_priv, (cmd->size < 0x100) ? 0x102 : cmd->size);
+        if (vb == NULL) {
+                return DRM_ERR(EAGAIN);
+        }
+        memcpy(vb, dev_priv->pci_buf, cmd->size);
+        
+        dev_priv->dma_low += cmd->size;
+        /*
+         * Small submissions somehow stalls the CPU. (AGP cache effects?)
+         * pad to greater size.
+         */
+        if (cmd->size < 0x100)
+          via_pad_cache(dev_priv,(0x100 - cmd->size) >> 3);
+        via_cmdbuf_pause(dev_priv);
+        return 0;
+}
+int via_driver_dma_quiescent(drm_device_t * dev)
+{
+        drm_via_private_t *dev_priv = dev->dev_private;
+        if (!via_wait_idle(dev_priv)) {
+                return DRM_ERR(EBUSY);
+        }
+        return 0;
+}
+int via_flush_ioctl(DRM_IOCTL_ARGS)
+{
+        DRM_DEVICE;
+        LOCK_TEST_WITH_RETURN( dev, filp );
+        return via_driver_dma_quiescent(dev);
+}
+int via_cmdbuffer(DRM_IOCTL_ARGS)
+{
+        DRM_DEVICE;
+        drm_via_cmdbuffer_t cmdbuf;
+        int ret;
+        LOCK_TEST_WITH_RETURN( dev, filp );
+        DRM_COPY_FROM_USER_IOCTL(cmdbuf, (drm_via_cmdbuffer_t *) data,
+                                 sizeof(cmdbuf));
+        DRM_DEBUG("via cmdbuffer, buf %p size %lu\n", cmdbuf.buf, cmdbuf.size);
+        ret = via_dispatch_cmdbuffer(dev, &cmdbuf);
+        if (ret) {
+                return ret;
+        }
+        return 0;
+}
+extern int 
+via_parse_command_stream(drm_device_t *dev, const uint32_t * buf, unsigned int size);
+static int via_dispatch_pci_cmdbuffer(drm_device_t * dev,
+                                      drm_via_cmdbuffer_t * cmd)
+{
+        drm_via_private_t *dev_priv = dev->dev_private;
+        int ret;
+        if (cmd->size > VIA_PCI_BUF_SIZE) {
+                return DRM_ERR(ENOMEM);
+        } 
+        if (DRM_COPY_FROM_USER(dev_priv->pci_buf, cmd->buf, cmd->size))
+                return DRM_ERR(EFAULT);
+        
+        if ((ret = via_verify_command_stream((uint32_t *)dev_priv->pci_buf, cmd->size, dev, 0))) {
+                return ret;
+        }
+        
+        ret = via_parse_command_stream(dev, (const uint32_t *)dev_priv->pci_buf, cmd->size);
+        return ret;
+}
+int via_pci_cmdbuffer(DRM_IOCTL_ARGS)
+{
+        DRM_DEVICE;
+        drm_via_cmdbuffer_t cmdbuf;
+        int ret;
+        LOCK_TEST_WITH_RETURN( dev, filp );
+        DRM_COPY_FROM_USER_IOCTL(cmdbuf, (drm_via_cmdbuffer_t *) data,
+                                 sizeof(cmdbuf));
+        DRM_DEBUG("via_pci_cmdbuffer, buf %p size %lu\n", cmdbuf.buf,
+                  cmdbuf.size);
+        ret = via_dispatch_pci_cmdbuffer(dev, &cmdbuf);
+        if (ret) {
+                return ret;
+        }
+        return 0;
+}
+static inline uint32_t *via_align_buffer(drm_via_private_t * dev_priv,
+                                         uint32_t * vb, int qw_count)
+{
+        for (; qw_count > 0; --qw_count) {
+                VIA_OUT_RING_QW(HC_DUMMY, HC_DUMMY);
+        }
+        return vb;
+}
+/*
+ * This function is used internally by ring buffer mangement code.
+ *
+ * Returns virtual pointer to ring buffer.
+ */
+static inline uint32_t *via_get_dma(drm_via_private_t * dev_priv)
+{
+        return (uint32_t *) (dev_priv->dma_ptr + dev_priv->dma_low);
+}
+/*
+ * Hooks a segment of data into the tail of the ring-buffer by
+ * modifying the pause address stored in the buffer itself. If
+ * the regulator has already paused, restart it.
+ */
+static int via_hook_segment(drm_via_private_t *dev_priv,
+                            uint32_t pause_addr_hi, uint32_t pause_addr_lo,
+                            int no_pci_fire)
+{
+        int paused, count;
+        volatile uint32_t *paused_at = dev_priv->last_pause_ptr;
+        via_flush_write_combine();
+        while(! *(via_get_dma(dev_priv)-1));
+        *dev_priv->last_pause_ptr = pause_addr_lo;
+        via_flush_write_combine();
+        /*
+         * The below statement is inserted to really force the flush.
+         * Not sure it is needed.
+         */
+        while(! *dev_priv->last_pause_ptr);
+        dev_priv->last_pause_ptr = via_get_dma(dev_priv) - 1;
+        while(! *dev_priv->last_pause_ptr);
+        paused = 0;
+        count = 20; 
+        while (!(paused = (VIA_READ(0x41c) & 0x80000000)) && count--);
+        if ((count <= 8) && (count >= 0)) {
+                uint32_t rgtr, ptr;
+                rgtr = *(dev_priv->hw_addr_ptr);
+                ptr = ((char *)dev_priv->last_pause_ptr - dev_priv->dma_ptr) + 
+                        dev_priv->dma_offset + (uint32_t) dev_priv->agpAddr + 4 - 
+                        CMDBUF_ALIGNMENT_SIZE;
+                if (rgtr <= ptr) {
+                        DRM_ERROR("Command regulator\npaused at count %d, address %x, "
+                                  "while current pause address is %x.\n"
+                                  "Please mail this message to "
+                                  "<unichrome-devel@lists.sourceforge.net>\n",
+                                  count, rgtr, ptr);
+                }
+        }
+                
+        if (paused && !no_pci_fire) {
+                uint32_t rgtr,ptr;
+                uint32_t ptr_low;
+                count = 1000000;
+                while ((VIA_READ(VIA_REG_STATUS) & VIA_CMD_RGTR_BUSY) && count--);
+                
+                rgtr = *(dev_priv->hw_addr_ptr);
+                ptr = ((char *)paused_at - dev_priv->dma_ptr) + 
+                        dev_priv->dma_offset + (uint32_t) dev_priv->agpAddr + 4;
+                
+                ptr_low = (ptr > 3*CMDBUF_ALIGNMENT_SIZE) ? 
+                        ptr - 3*CMDBUF_ALIGNMENT_SIZE : 0;
+                if (rgtr <= ptr && rgtr >= ptr_low) {
+                        VIA_WRITE(VIA_REG_TRANSET, (HC_ParaType_PreCR << 16));
+                        VIA_WRITE(VIA_REG_TRANSPACE, pause_addr_hi);
+                        VIA_WRITE(VIA_REG_TRANSPACE, pause_addr_lo);
+                } 
+        }
+        return paused;
+}
+static int via_wait_idle(drm_via_private_t * dev_priv)
+{
+        int count = 10000000;
+        while (count-- && (VIA_READ(VIA_REG_STATUS) &
+                           (VIA_CMD_RGTR_BUSY | VIA_2D_ENG_BUSY |
+                            VIA_3D_ENG_BUSY))) ;
+        return count;
+}
+static uint32_t *via_align_cmd(drm_via_private_t * dev_priv, uint32_t cmd_type,
+                               uint32_t addr, uint32_t *cmd_addr_hi, 
+                               uint32_t *cmd_addr_lo,
+                               int skip_wait)
+{
+        uint32_t agp_base;
+        uint32_t cmd_addr, addr_lo, addr_hi;
+        uint32_t *vb;
+        uint32_t qw_pad_count;
+        if (!skip_wait)
+                via_cmdbuf_wait(dev_priv, 2*CMDBUF_ALIGNMENT_SIZE);
+        vb = via_get_dma(dev_priv);
+        VIA_OUT_RING_QW( HC_HEADER2 | ((VIA_REG_TRANSET >> 2) << 12) |
+                         (VIA_REG_TRANSPACE >> 2), HC_ParaType_PreCR << 16); 
+        agp_base = dev_priv->dma_offset + (uint32_t) dev_priv->agpAddr;
+        qw_pad_count = (CMDBUF_ALIGNMENT_SIZE >> 3) -
+                ((dev_priv->dma_low & CMDBUF_ALIGNMENT_MASK) >> 3);
+        
+        cmd_addr = (addr) ? addr : 
+                agp_base + dev_priv->dma_low - 8 + (qw_pad_count << 3);
+        addr_lo = ((HC_SubA_HAGPBpL << 24) | (cmd_type & HC_HAGPBpID_MASK) |
+                   (cmd_addr & HC_HAGPBpL_MASK));
+        addr_hi = ((HC_SubA_HAGPBpH << 24) | (cmd_addr >> 24));
+        vb = via_align_buffer(dev_priv, vb, qw_pad_count - 1);
+        VIA_OUT_RING_QW(*cmd_addr_hi = addr_hi, 
+                        *cmd_addr_lo = addr_lo);
+        return vb;
+}
+static void via_cmdbuf_start(drm_via_private_t * dev_priv)
+{
+        uint32_t pause_addr_lo, pause_addr_hi;
+        uint32_t start_addr, start_addr_lo;
+        uint32_t end_addr, end_addr_lo;
+        uint32_t command;
+        uint32_t agp_base;
+        dev_priv->dma_low = 0;
+        agp_base = dev_priv->dma_offset + (uint32_t) dev_priv->agpAddr;
+        start_addr = agp_base;
+        end_addr = agp_base + dev_priv->dma_high;
+        start_addr_lo = ((HC_SubA_HAGPBstL << 24) | (start_addr & 0xFFFFFF));
+        end_addr_lo = ((HC_SubA_HAGPBendL << 24) | (end_addr & 0xFFFFFF));
+        command = ((HC_SubA_HAGPCMNT << 24) | (start_addr >> 24) |
+                   ((end_addr & 0xff000000) >> 16));
+        dev_priv->last_pause_ptr = 
+                via_align_cmd(dev_priv, HC_HAGPBpID_PAUSE, 0, 
+                              &pause_addr_hi, & pause_addr_lo, 1) - 1;
+        via_flush_write_combine();
+        while(! *dev_priv->last_pause_ptr);
+        VIA_WRITE(VIA_REG_TRANSET, (HC_ParaType_PreCR << 16));
+        VIA_WRITE(VIA_REG_TRANSPACE, command);
+        VIA_WRITE(VIA_REG_TRANSPACE, start_addr_lo);
+        VIA_WRITE(VIA_REG_TRANSPACE, end_addr_lo);
+        VIA_WRITE(VIA_REG_TRANSPACE, pause_addr_hi);
+        VIA_WRITE(VIA_REG_TRANSPACE, pause_addr_lo);
+        VIA_WRITE(VIA_REG_TRANSPACE, command | HC_HAGPCMNT_MASK);
+}
+static void via_pad_cache(drm_via_private_t *dev_priv, int qwords)
+{
+        uint32_t *vb;
+        via_cmdbuf_wait(dev_priv, qwords + 2);
+        vb = via_get_dma(dev_priv);
+        VIA_OUT_RING_QW( HC_HEADER2, HC_ParaType_NotTex << 16);
+        via_align_buffer(dev_priv,vb,qwords);
+}
+static inline void via_dummy_bitblt(drm_via_private_t * dev_priv)
+{
+        uint32_t *vb = via_get_dma(dev_priv);
+        SetReg2DAGP(0x0C, (0 | (0 << 16)));
+        SetReg2DAGP(0x10, 0 | (0 << 16));
+        SetReg2DAGP(0x0, 0x1 | 0x2000 | 0xAA000000); 
+}
+static void via_cmdbuf_jump(drm_via_private_t * dev_priv)
+{
+        uint32_t agp_base;
+        uint32_t pause_addr_lo, pause_addr_hi;
+        uint32_t jump_addr_lo, jump_addr_hi;
+        volatile uint32_t *last_pause_ptr;
+        uint32_t dma_low_save1, dma_low_save2;
+        agp_base = dev_priv->dma_offset + (uint32_t) dev_priv->agpAddr;
+        via_align_cmd(dev_priv,  HC_HAGPBpID_JUMP, 0, &jump_addr_hi, 
+                      &jump_addr_lo, 0);
+        
+        dev_priv->dma_wrap = dev_priv->dma_low;
+        /*
+         * Wrap command buffer to the beginning.
+         */
+        dev_priv->dma_low = 0;
+        if (via_cmdbuf_wait(dev_priv, CMDBUF_ALIGNMENT_SIZE) != 0) {
+                DRM_ERROR("via_cmdbuf_jump failed\n");
+        }
+        via_dummy_bitblt(dev_priv);
+        via_dummy_bitblt(dev_priv); 
+        last_pause_ptr = via_align_cmd(dev_priv,  HC_HAGPBpID_PAUSE, 0, &pause_addr_hi, 
+                                       &pause_addr_lo, 0) -1;
+        via_align_cmd(dev_priv,  HC_HAGPBpID_PAUSE, 0, &pause_addr_hi, 
+                      &pause_addr_lo, 0);
+        *last_pause_ptr = pause_addr_lo;
+        dma_low_save1 = dev_priv->dma_low;
+        /*
+         * Now, set a trap that will pause the regulator if it tries to rerun the old
+         * command buffer. (Which may happen if via_hook_segment detecs a command regulator pause
+         * and reissues the jump command over PCI, while the regulator has already taken the jump
+         * and actually paused at the current buffer end).
+         * There appears to be no other way to detect this condition, since the hw_addr_pointer
+         * does not seem to get updated immediately when a jump occurs.
+         */
+        last_pause_ptr = via_align_cmd(dev_priv,  HC_HAGPBpID_PAUSE, 0, &pause_addr_hi, 
+                                       &pause_addr_lo, 0) -1;
+        via_align_cmd(dev_priv,  HC_HAGPBpID_PAUSE, 0, &pause_addr_hi, 
+                      &pause_addr_lo, 0);
+        *last_pause_ptr = pause_addr_lo;
+        dma_low_save2 = dev_priv->dma_low;
+        dev_priv->dma_low = dma_low_save1;      
+        via_hook_segment( dev_priv, jump_addr_hi, jump_addr_lo, 0);
+        dev_priv->dma_low = dma_low_save2;
+        via_hook_segment( dev_priv, pause_addr_hi, pause_addr_lo, 0);
+}
+static void via_cmdbuf_rewind(drm_via_private_t * dev_priv)
+{
+        via_cmdbuf_jump(dev_priv); 
+}
+static void via_cmdbuf_flush(drm_via_private_t * dev_priv, uint32_t cmd_type)
+{
+        uint32_t pause_addr_lo, pause_addr_hi;
+        via_align_cmd(dev_priv, cmd_type, 0, &pause_addr_hi, &pause_addr_lo, 0);
+        via_hook_segment( dev_priv, pause_addr_hi, pause_addr_lo, 0);
+}
+static void via_cmdbuf_pause(drm_via_private_t * dev_priv)
+{
+        via_cmdbuf_flush(dev_priv, HC_HAGPBpID_PAUSE);
+}
+static void via_cmdbuf_reset(drm_via_private_t * dev_priv)
+{
+        via_cmdbuf_flush(dev_priv, HC_HAGPBpID_STOP);
+        via_wait_idle(dev_priv);
+}
+/*
+ * User interface to the space and lag functions.
+ */
+int 
+via_cmdbuf_size(DRM_IOCTL_ARGS)
+{
+        DRM_DEVICE;
+        drm_via_cmdbuf_size_t d_siz;
+        int ret = 0;
+        uint32_t tmp_size, count;
+        drm_via_private_t *dev_priv;
+        DRM_DEBUG("via cmdbuf_size\n");
+        LOCK_TEST_WITH_RETURN( dev, filp );
+        dev_priv = (drm_via_private_t *) dev->dev_private;
+        if (dev_priv->ring.virtual_start == NULL) {
+                DRM_ERROR("%s called without initializing AGP ring buffer.\n",
+                          __FUNCTION__);
+                return DRM_ERR(EFAULT);
+        }
+        DRM_COPY_FROM_USER_IOCTL(d_siz, (drm_via_cmdbuf_size_t *) data,
+                                 sizeof(d_siz));
+        count = 1000000;
+        tmp_size = d_siz.size;
+        switch(d_siz.func) {
+        case VIA_CMDBUF_SPACE:
+                while (((tmp_size = via_cmdbuf_space(dev_priv)) < d_siz.size) && count--) {
+                        if (!d_siz.wait) {
+                                break;
+                        }
+                }
+                if (!count) {
+                        DRM_ERROR("VIA_CMDBUF_SPACE timed out.\n");
+                        ret = DRM_ERR(EAGAIN);
+                }
+                break;
+        case VIA_CMDBUF_LAG:
+                while (((tmp_size = via_cmdbuf_lag(dev_priv)) > d_siz.size) && count--) {
+                        if (!d_siz.wait) {
+                                break;
+                        }
+                }
+                if (!count) {
+                        DRM_ERROR("VIA_CMDBUF_LAG timed out.\n");
+                        ret = DRM_ERR(EAGAIN);
+                }
+                break;
+        default:
+                ret = DRM_ERR(EFAULT);
+        }
+        d_siz.size = tmp_size;
+        DRM_COPY_TO_USER_IOCTL((drm_via_cmdbuf_size_t *) data, d_siz,
+                               sizeof(d_siz));
+        return ret;
+}
diff --git a/drivers/char/drm/via_drm.h b/drivers/char/drm/via_drm.h
new file mode 100644
index 000000000000..4588c9bd1816
--- /dev/null
+++ b/drivers/char/drm/via_drm.h
@@ -0,0 +1,243 @@
+/*
+ * Copyright 1998-2003 VIA Technologies, Inc. All Rights Reserved.
+ * Copyright 2001-2003 S3 Graphics, Inc. All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sub license,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial portions
+ * of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
+ * VIA, S3 GRAPHICS, AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ */
+#ifndef _VIA_DRM_H_
+#define _VIA_DRM_H_
+/* WARNING: These defines must be the same as what the Xserver uses.
+ * if you change them, you must change the defines in the Xserver.
+ */
+#ifndef _VIA_DEFINES_
+#define _VIA_DEFINES_
+#ifndef __KERNEL__
+#include "via_drmclient.h"
+#endif
+#define VIA_NR_SAREA_CLIPRECTS          8
+#define VIA_NR_XVMC_PORTS               10
+#define VIA_NR_XVMC_LOCKS               5
+#define VIA_MAX_CACHELINE_SIZE          64
+#define XVMCLOCKPTR(saPriv,lockNo)                                      \
+        ((volatile drm_hw_lock_t *)(((((unsigned long) (saPriv)->XvMCLockArea) + \
+                                      (VIA_MAX_CACHELINE_SIZE - 1)) &   \
+                                     ~(VIA_MAX_CACHELINE_SIZE - 1)) +   \
+                                    VIA_MAX_CACHELINE_SIZE*(lockNo)))
+/* Each region is a minimum of 64k, and there are at most 64 of them.
+ */
+#define VIA_NR_TEX_REGIONS 64
+#define VIA_LOG_MIN_TEX_REGION_SIZE 16
+#endif
+#define VIA_UPLOAD_TEX0IMAGE  0x1       /* handled clientside */
+#define VIA_UPLOAD_TEX1IMAGE  0x2       /* handled clientside */
+#define VIA_UPLOAD_CTX        0x4
+#define VIA_UPLOAD_BUFFERS    0x8
+#define VIA_UPLOAD_TEX0       0x10
+#define VIA_UPLOAD_TEX1       0x20
+#define VIA_UPLOAD_CLIPRECTS  0x40
+#define VIA_UPLOAD_ALL        0xff
+/* VIA specific ioctls */
+#define DRM_VIA_ALLOCMEM        0x00
+#define DRM_VIA_FREEMEM         0x01
+#define DRM_VIA_AGP_INIT        0x02
+#define DRM_VIA_FB_INIT         0x03
+#define DRM_VIA_MAP_INIT        0x04
+#define DRM_VIA_DEC_FUTEX       0x05
+#define NOT_USED
+#define DRM_VIA_DMA_INIT        0x07
+#define DRM_VIA_CMDBUFFER       0x08
+#define DRM_VIA_FLUSH           0x09
+#define DRM_VIA_PCICMD          0x0a
+#define DRM_VIA_CMDBUF_SIZE     0x0b
+#define NOT_USED
+#define DRM_VIA_WAIT_IRQ        0x0d
+#define DRM_IOCTL_VIA_ALLOCMEM    DRM_IOWR(DRM_COMMAND_BASE + DRM_VIA_ALLOCMEM, drm_via_mem_t)
+#define DRM_IOCTL_VIA_FREEMEM     DRM_IOW( DRM_COMMAND_BASE + DRM_VIA_FREEMEM, drm_via_mem_t)
+#define DRM_IOCTL_VIA_AGP_INIT    DRM_IOWR(DRM_COMMAND_BASE + DRM_VIA_AGP_INIT, drm_via_agp_t)
+#define DRM_IOCTL_VIA_FB_INIT     DRM_IOWR(DRM_COMMAND_BASE + DRM_VIA_FB_INIT, drm_via_fb_t)
+#define DRM_IOCTL_VIA_MAP_INIT    DRM_IOWR(DRM_COMMAND_BASE + DRM_VIA_MAP_INIT, drm_via_init_t)
+#define DRM_IOCTL_VIA_DEC_FUTEX   DRM_IOW( DRM_COMMAND_BASE + DRM_VIA_DEC_FUTEX, drm_via_futex_t)
+#define DRM_IOCTL_VIA_DMA_INIT    DRM_IOWR(DRM_COMMAND_BASE + DRM_VIA_DMA_INIT, drm_via_dma_init_t)
+#define DRM_IOCTL_VIA_CMDBUFFER   DRM_IOW( DRM_COMMAND_BASE + DRM_VIA_CMDBUFFER, drm_via_cmdbuffer_t)
+#define DRM_IOCTL_VIA_FLUSH       DRM_IO(  DRM_COMMAND_BASE + DRM_VIA_FLUSH)
+#define DRM_IOCTL_VIA_PCICMD      DRM_IOW( DRM_COMMAND_BASE + DRM_VIA_PCICMD, drm_via_cmdbuffer_t)
+#define DRM_IOCTL_VIA_CMDBUF_SIZE DRM_IOWR( DRM_COMMAND_BASE + DRM_VIA_CMDBUF_SIZE, \
+                                            drm_via_cmdbuf_size_t)
+#define DRM_IOCTL_VIA_WAIT_IRQ    DRM_IOWR( DRM_COMMAND_BASE + DRM_VIA_WAIT_IRQ, drm_via_irqwait_t)
+/* Indices into buf.Setup where various bits of state are mirrored per
+ * context and per buffer.  These can be fired at the card as a unit,
+ * or in a piecewise fashion as required.
+ */
+#define VIA_TEX_SETUP_SIZE 8
+/* Flags for clear ioctl
+ */
+#define VIA_FRONT   0x1
+#define VIA_BACK    0x2
+#define VIA_DEPTH   0x4
+#define VIA_STENCIL 0x8
+#define VIDEO 0
+#define AGP 1
+typedef struct {
+        uint32_t offset;
+        uint32_t size;
+} drm_via_agp_t;
+typedef struct {
+        uint32_t offset;
+        uint32_t size;
+} drm_via_fb_t;
+typedef struct {
+        uint32_t context;
+        uint32_t type;
+        uint32_t size;
+        unsigned long index;
+        unsigned long offset;
+} drm_via_mem_t;
+typedef struct _drm_via_init {
+        enum {
+                VIA_INIT_MAP = 0x01,
+                VIA_CLEANUP_MAP = 0x02
+        } func;
+        unsigned long sarea_priv_offset;
+        unsigned long fb_offset;
+        unsigned long mmio_offset;
+        unsigned long agpAddr;
+} drm_via_init_t;
+typedef struct _drm_via_futex {
+        enum {
+                VIA_FUTEX_WAIT = 0x00,
+                VIA_FUTEX_WAKE = 0X01
+        } func;
+        uint32_t ms;
+        uint32_t lock;
+        uint32_t val;
+} drm_via_futex_t;
+typedef struct _drm_via_dma_init {
+        enum {
+                VIA_INIT_DMA = 0x01,
+                VIA_CLEANUP_DMA = 0x02,
+                VIA_DMA_INITIALIZED = 0x03
+        } func;
+        unsigned long offset;
+        unsigned long size;
+        unsigned long reg_pause_addr;
+} drm_via_dma_init_t;
+typedef struct _drm_via_cmdbuffer {
+        char *buf;
+        unsigned long size;
+} drm_via_cmdbuffer_t;
+/* Warning: If you change the SAREA structure you must change the Xserver
+ * structure as well */
+typedef struct _drm_via_tex_region {
+        unsigned char next, prev;       /* indices to form a circular LRU  */
+        unsigned char inUse;    /* owned by a client, or free? */
+        int age;                /* tracked by clients to update local LRU's */
+} drm_via_tex_region_t;
+typedef struct _drm_via_sarea {
+        unsigned int dirty;
+        unsigned int nbox;
+        drm_clip_rect_t boxes[VIA_NR_SAREA_CLIPRECTS];
+        drm_via_tex_region_t texList[VIA_NR_TEX_REGIONS + 1];
+        int texAge;             /* last time texture was uploaded */
+        int ctxOwner;           /* last context to upload state */
+        int vertexPrim;
+        /*
+         * Below is for XvMC.
+         * We want the lock integers alone on, and aligned to, a cache line.
+         * Therefore this somewhat strange construct.
+         */
+        char XvMCLockArea[VIA_MAX_CACHELINE_SIZE * (VIA_NR_XVMC_LOCKS + 1)];
+        unsigned int XvMCDisplaying[VIA_NR_XVMC_PORTS];
+        unsigned int XvMCSubPicOn[VIA_NR_XVMC_PORTS];
+        unsigned int XvMCCtxNoGrabbed;  /* Last context to hold decoder */
+} drm_via_sarea_t;
+typedef struct _drm_via_cmdbuf_size {
+        enum {
+                VIA_CMDBUF_SPACE = 0x01,
+                VIA_CMDBUF_LAG = 0x02
+        } func;
+        int wait;
+        uint32_t size;
+} drm_via_cmdbuf_size_t;
+typedef enum {
+        VIA_IRQ_ABSOLUTE = 0x0,
+        VIA_IRQ_RELATIVE = 0x1,
+        VIA_IRQ_SIGNAL = 0x10000000,
+        VIA_IRQ_FORCE_SEQUENCE = 0x20000000
+} via_irq_seq_type_t;
+#define VIA_IRQ_FLAGS_MASK 0xF0000000
+struct drm_via_wait_irq_request{
+        unsigned irq;
+        via_irq_seq_type_t type;
+        uint32_t sequence;
+        uint32_t signal;
+};
+typedef union drm_via_irqwait {
+        struct drm_via_wait_irq_request request;
+        struct drm_wait_vblank_reply reply;
+} drm_via_irqwait_t;
+#ifdef __KERNEL__
+int via_fb_init(DRM_IOCTL_ARGS);
+int via_mem_alloc(DRM_IOCTL_ARGS);
+int via_mem_free(DRM_IOCTL_ARGS);
+int via_agp_init(DRM_IOCTL_ARGS);
+int via_map_init(DRM_IOCTL_ARGS);
+int via_decoder_futex(DRM_IOCTL_ARGS);
+int via_dma_init(DRM_IOCTL_ARGS);
+int via_cmdbuffer(DRM_IOCTL_ARGS);
+int via_flush_ioctl(DRM_IOCTL_ARGS);
+int via_pci_cmdbuffer(DRM_IOCTL_ARGS);
+int via_cmdbuf_size(DRM_IOCTL_ARGS);
+int via_wait_irq(DRM_IOCTL_ARGS);
+#endif
+#endif                          /* _VIA_DRM_H_ */
diff --git a/drivers/char/drm/via_drv.c b/drivers/char/drm/via_drv.c
new file mode 100644
index 000000000000..275eefc79221
--- /dev/null
+++ b/drivers/char/drm/via_drv.c
@@ -0,0 +1,126 @@
+/*
+ * Copyright 1998-2003 VIA Technologies, Inc. All Rights Reserved.
+ * Copyright 2001-2003 S3 Graphics, Inc. All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sub license,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial portions
+ * of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
+ * VIA, S3 GRAPHICS, AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ */
+#include <linux/config.h>
+#include "drmP.h"
+#include "via_drm.h"
+#include "via_drv.h"
+#include "drm_pciids.h"
+static int postinit(struct drm_device *dev, unsigned long flags)
+{
+        DRM_INFO("Initialized %s %d.%d.%d %s on minor %d: %s\n",
+                 DRIVER_NAME,
+                 DRIVER_MAJOR,
+                 DRIVER_MINOR,
+                 DRIVER_PATCHLEVEL,
+                 DRIVER_DATE, dev->primary.minor, pci_pretty_name(dev->pdev)
+            );
+        return 0;
+}
+static int version(drm_version_t * version)
+{
+        int len;
+        version->version_major = DRIVER_MAJOR;
+        version->version_minor = DRIVER_MINOR;
+        version->version_patchlevel = DRIVER_PATCHLEVEL;
+        DRM_COPY(version->name, DRIVER_NAME);
+        DRM_COPY(version->date, DRIVER_DATE);
+        DRM_COPY(version->desc, DRIVER_DESC);
+        return 0;
+}
+static struct pci_device_id pciidlist[] = {
+        viadrv_PCI_IDS
+};
+static drm_ioctl_desc_t ioctls[] = {
+        [DRM_IOCTL_NR(DRM_VIA_ALLOCMEM)] = {via_mem_alloc, 1, 0},
+        [DRM_IOCTL_NR(DRM_VIA_FREEMEM)] = {via_mem_free, 1, 0},
+        [DRM_IOCTL_NR(DRM_VIA_AGP_INIT)] = {via_agp_init, 1, 0},
+        [DRM_IOCTL_NR(DRM_VIA_FB_INIT)] = {via_fb_init, 1, 0},
+        [DRM_IOCTL_NR(DRM_VIA_MAP_INIT)] = {via_map_init, 1, 0},
+        [DRM_IOCTL_NR(DRM_VIA_DEC_FUTEX)] = {via_decoder_futex, 1, 0},
+        [DRM_IOCTL_NR(DRM_VIA_DMA_INIT)] = {via_dma_init, 1, 0},
+        [DRM_IOCTL_NR(DRM_VIA_CMDBUFFER)] = {via_cmdbuffer, 1, 0},
+        [DRM_IOCTL_NR(DRM_VIA_FLUSH)] = {via_flush_ioctl, 1, 0},
+        [DRM_IOCTL_NR(DRM_VIA_PCICMD)] = {via_pci_cmdbuffer, 1, 0},
+        [DRM_IOCTL_NR(DRM_VIA_CMDBUF_SIZE)] = {via_cmdbuf_size, 1, 0},
+        [DRM_IOCTL_NR(DRM_VIA_WAIT_IRQ)] = {via_wait_irq, 1, 0}
+};
+static struct drm_driver driver = {
+        .driver_features =
+            DRIVER_USE_AGP | DRIVER_USE_MTRR | DRIVER_HAVE_IRQ |
+            DRIVER_IRQ_SHARED | DRIVER_IRQ_VBL,
+        .context_ctor = via_init_context,
+        .context_dtor = via_final_context,
+        .vblank_wait = via_driver_vblank_wait,
+        .irq_preinstall = via_driver_irq_preinstall,
+        .irq_postinstall = via_driver_irq_postinstall,
+        .irq_uninstall = via_driver_irq_uninstall,
+        .irq_handler = via_driver_irq_handler,
+        .dma_quiescent = via_driver_dma_quiescent,
+        .reclaim_buffers = drm_core_reclaim_buffers,
+        .get_map_ofs = drm_core_get_map_ofs,
+        .get_reg_ofs = drm_core_get_reg_ofs,
+        .postinit = postinit,
+        .version = version,
+        .ioctls = ioctls,
+        .num_ioctls = DRM_ARRAY_SIZE(ioctls),
+        .fops = {
+                .owner = THIS_MODULE,
+                .open = drm_open,
+                .release = drm_release,
+                .ioctl = drm_ioctl,
+                .mmap = drm_mmap,
+                .poll = drm_poll,
+                .fasync = drm_fasync,
+                },
+        .pci_driver = {
+                .name = DRIVER_NAME,
+                .id_table = pciidlist,
+        }
+};
+static int __init via_init(void)
+{
+        via_init_command_verifier();
+        return drm_init(&driver);
+}
+static void __exit via_exit(void)
+{
+        drm_exit(&driver);
+}
+module_init(via_init);
+module_exit(via_exit);
+MODULE_AUTHOR(DRIVER_AUTHOR);
+MODULE_DESCRIPTION(DRIVER_DESC);
+MODULE_LICENSE("GPL and additional rights");
diff --git a/drivers/char/drm/via_drv.h b/drivers/char/drm/via_drv.h
new file mode 100644
index 000000000000..4eaa8b7c4c96
--- /dev/null
+++ b/drivers/char/drm/via_drv.h
@@ -0,0 +1,118 @@
+/*
+ * Copyright 1998-2003 VIA Technologies, Inc. All Rights Reserved.
+ * Copyright 2001-2003 S3 Graphics, Inc. All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sub license,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial portions
+ * of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
+ * VIA, S3 GRAPHICS, AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ */
+#ifndef _VIA_DRV_H_
+#define _VIA_DRV_H_
+#define DRIVER_AUTHOR   "VIA"
+#define DRIVER_NAME             "via"
+#define DRIVER_DESC             "VIA Unichrome / Pro"
+#define DRIVER_DATE             "20050523"
+#define DRIVER_MAJOR            2
+#define DRIVER_MINOR            6
+#define DRIVER_PATCHLEVEL       3
+#include "via_verifier.h"
+#define VIA_PCI_BUF_SIZE 60000
+#define VIA_FIRE_BUF_SIZE  1024
+#define VIA_NUM_IRQS 2
+typedef struct drm_via_ring_buffer {
+        drm_map_t map;
+        char *virtual_start;
+} drm_via_ring_buffer_t;
+typedef uint32_t maskarray_t[5];
+typedef struct drm_via_irq {
+        atomic_t irq_received;
+        uint32_t pending_mask;
+        uint32_t enable_mask;
+        wait_queue_head_t irq_queue;
+} drm_via_irq_t;
+        
+typedef struct drm_via_private {
+        drm_via_sarea_t *sarea_priv;
+        drm_map_t *sarea;
+        drm_map_t *fb;
+        drm_map_t *mmio;
+        unsigned long agpAddr;
+        wait_queue_head_t decoder_queue[VIA_NR_XVMC_LOCKS];
+        char *dma_ptr;
+        unsigned int dma_low;
+        unsigned int dma_high;
+        unsigned int dma_offset;
+        uint32_t dma_wrap;
+        volatile uint32_t *last_pause_ptr;
+        volatile uint32_t *hw_addr_ptr;
+        drm_via_ring_buffer_t ring;
+        struct timeval last_vblank;
+        int last_vblank_valid;
+        unsigned usec_per_vblank;
+        drm_via_state_t hc_state;
+        char pci_buf[VIA_PCI_BUF_SIZE];
+        const uint32_t *fire_offsets[VIA_FIRE_BUF_SIZE];
+        uint32_t num_fire_offsets;
+        int pro_group_a;
+        drm_via_irq_t via_irqs[VIA_NUM_IRQS];
+        unsigned num_irqs;
+        maskarray_t *irq_masks;
+        uint32_t irq_enable_mask; 
+        uint32_t irq_pending_mask;      
+} drm_via_private_t;
+/* VIA MMIO register access */
+#define VIA_BASE ((dev_priv->mmio))
+#define VIA_READ(reg)           DRM_READ32(VIA_BASE, reg)
+#define VIA_WRITE(reg,val)      DRM_WRITE32(VIA_BASE, reg, val)
+#define VIA_READ8(reg)          DRM_READ8(VIA_BASE, reg)
+#define VIA_WRITE8(reg,val)     DRM_WRITE8(VIA_BASE, reg, val)
+extern int via_init_context(drm_device_t * dev, int context);
+extern int via_final_context(drm_device_t * dev, int context);
+extern int via_do_cleanup_map(drm_device_t * dev);
+extern int via_map_init(struct inode *inode, struct file *filp,
+                        unsigned int cmd, unsigned long arg);
+extern int via_driver_vblank_wait(drm_device_t * dev, unsigned int *sequence);
+extern irqreturn_t via_driver_irq_handler(DRM_IRQ_ARGS);
+extern void via_driver_irq_preinstall(drm_device_t * dev);
+extern void via_driver_irq_postinstall(drm_device_t * dev);
+extern void via_driver_irq_uninstall(drm_device_t * dev);
+extern int via_dma_cleanup(drm_device_t * dev);
+extern void via_init_command_verifier(void);
+extern int via_driver_dma_quiescent(drm_device_t * dev);
+extern void via_init_futex(drm_via_private_t *dev_priv);
+extern void via_cleanup_futex(drm_via_private_t *dev_priv);
+extern void via_release_futex(drm_via_private_t *dev_priv, int context);
+#endif
diff --git a/drivers/char/drm/via_ds.c b/drivers/char/drm/via_ds.c
new file mode 100644
index 000000000000..daf3df75a20e
--- /dev/null
+++ b/drivers/char/drm/via_ds.c
@@ -0,0 +1,280 @@
+/*
+ * Copyright 1998-2003 VIA Technologies, Inc. All Rights Reserved.
+ * Copyright 2001-2003 S3 Graphics, Inc. All Rights Reserved.
+ * Copyright 2000 Silicon Integrated Systems Corp, Inc., HsinChu, Taiwan.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sub license,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial portions
+ * of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
+ * VIA, S3 GRAPHICS, AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ */
+#include <linux/module.h>
+#include <linux/delay.h>
+#include <linux/errno.h>
+#include <linux/kernel.h>
+#include <linux/slab.h>
+#include <linux/poll.h>
+#include <linux/pci.h>
+#include <asm/io.h>
+#include "via_ds.h"
+extern unsigned int VIA_DEBUG;
+set_t *via_setInit(void)
+{
+        int i;
+        set_t *set;
+        set = (set_t *) drm_alloc(sizeof(set_t), DRM_MEM_DRIVER);
+        for (i = 0; i < SET_SIZE; i++) {
+                set->list[i].free_next = i + 1;
+                set->list[i].alloc_next = -1;
+        }
+        set->list[SET_SIZE - 1].free_next = -1;
+        set->free = 0;
+        set->alloc = -1;
+        set->trace = -1;
+        return set;
+}
+int via_setAdd(set_t * set, ITEM_TYPE item)
+{
+        int free = set->free;
+        if (free != -1) {
+                set->list[free].val = item;
+                set->free = set->list[free].free_next;
+        } else {
+                return 0;
+        }
+        set->list[free].alloc_next = set->alloc;
+        set->alloc = free;
+        set->list[free].free_next = -1;
+        return 1;
+}
+int via_setDel(set_t * set, ITEM_TYPE item)
+{
+        int alloc = set->alloc;
+        int prev = -1;
+        while (alloc != -1) {
+                if (set->list[alloc].val == item) {
+                        if (prev != -1)
+                                set->list[prev].alloc_next =
+                                    set->list[alloc].alloc_next;
+                        else
+                                set->alloc = set->list[alloc].alloc_next;
+                        break;
+                }
+                prev = alloc;
+                alloc = set->list[alloc].alloc_next;
+        }
+        if (alloc == -1)
+                return 0;
+        set->list[alloc].free_next = set->free;
+        set->free = alloc;
+        set->list[alloc].alloc_next = -1;
+        return 1;
+}
+/* setFirst -> setAdd -> setNext is wrong */
+int via_setFirst(set_t * set, ITEM_TYPE * item)
+{
+        if (set->alloc == -1)
+                return 0;
+        *item = set->list[set->alloc].val;
+        set->trace = set->list[set->alloc].alloc_next;
+        return 1;
+}
+int via_setNext(set_t * set, ITEM_TYPE * item)
+{
+        if (set->trace == -1)
+                return 0;
+        *item = set->list[set->trace].val;
+        set->trace = set->list[set->trace].alloc_next;
+        return 1;
+}
+int via_setDestroy(set_t * set)
+{
+        drm_free(set, sizeof(set_t), DRM_MEM_DRIVER);
+        return 1;
+}
+#define ISFREE(bptr) ((bptr)->free)
+#define fprintf(fmt, arg...) do{}while(0)
+memHeap_t *via_mmInit(int ofs, int size)
+{
+        PMemBlock blocks;
+        if (size <= 0)
+                return 0;
+        blocks = (TMemBlock *) drm_calloc(1, sizeof(TMemBlock), DRM_MEM_DRIVER);
+        if (blocks) {
+                blocks->ofs = ofs;
+                blocks->size = size;
+                blocks->free = 1;
+                return (memHeap_t *) blocks;
+        } else
+                return 0;
+}
+static TMemBlock *SliceBlock(TMemBlock * p,
+                             int startofs, int size,
+                             int reserved, int alignment)
+{
+        TMemBlock *newblock;
+        /* break left */
+        if (startofs > p->ofs) {
+                newblock =
+                    (TMemBlock *) drm_calloc(1, sizeof(TMemBlock),
+                                             DRM_MEM_DRIVER);
+                newblock->ofs = startofs;
+                newblock->size = p->size - (startofs - p->ofs);
+                newblock->free = 1;
+                newblock->next = p->next;
+                p->size -= newblock->size;
+                p->next = newblock;
+                p = newblock;
+        }
+        /* break right */
+        if (size < p->size) {
+                newblock =
+                    (TMemBlock *) drm_calloc(1, sizeof(TMemBlock),
+                                             DRM_MEM_DRIVER);
+                newblock->ofs = startofs + size;
+                newblock->size = p->size - size;
+                newblock->free = 1;
+                newblock->next = p->next;
+                p->size = size;
+                p->next = newblock;
+        }
+        /* p = middle block */
+        p->align = alignment;
+        p->free = 0;
+        p->reserved = reserved;
+        return p;
+}
+PMemBlock via_mmAllocMem(memHeap_t * heap, int size, int align2,
+                         int startSearch)
+{
+        int mask, startofs, endofs;
+        TMemBlock *p;
+        if (!heap || align2 < 0 || size <= 0)
+                return NULL;
+        mask = (1 << align2) - 1;
+        startofs = 0;
+        p = (TMemBlock *) heap;
+        while (p) {
+                if (ISFREE(p)) {
+                        startofs = (p->ofs + mask) & ~mask;
+                        if (startofs < startSearch)
+                                startofs = startSearch;
+                        endofs = startofs + size;
+                        if (endofs <= (p->ofs + p->size))
+                                break;
+                }
+                p = p->next;
+        }
+        if (!p)
+                return NULL;
+        p = SliceBlock(p, startofs, size, 0, mask + 1);
+        p->heap = heap;
+        return p;
+}
+static __inline__ int Join2Blocks(TMemBlock * p)
+{
+        if (p->free && p->next && p->next->free) {
+                TMemBlock *q = p->next;
+                p->size += q->size;
+                p->next = q->next;
+                drm_free(q, sizeof(TMemBlock), DRM_MEM_DRIVER);
+                return 1;
+        }
+        return 0;
+}
+int via_mmFreeMem(PMemBlock b)
+{
+        TMemBlock *p, *prev;
+        if (!b)
+                return 0;
+        if (!b->heap) {
+                fprintf(stderr, "no heap\n");
+                return -1;
+        }
+        p = b->heap;
+        prev = NULL;
+        while (p && p != b) {
+                prev = p;
+                p = p->next;
+        }
+        if (!p || p->free || p->reserved) {
+                if (!p)
+                        fprintf(stderr, "block not found in heap\n");
+                else if (p->free)
+                        fprintf(stderr, "block already free\n");
+                else
+                        fprintf(stderr, "block is reserved\n");
+                return -1;
+        }
+        p->free = 1;
+        Join2Blocks(p);
+        if (prev)
+                Join2Blocks(prev);
+        return 0;
+}
diff --git a/drivers/char/drm/via_ds.h b/drivers/char/drm/via_ds.h
new file mode 100644
index 000000000000..be9c7f9f1aee
--- /dev/null
+++ b/drivers/char/drm/via_ds.h
@@ -0,0 +1,104 @@
+/*
+ * Copyright 1998-2003 VIA Technologies, Inc. All Rights Reserved.
+ * Copyright 2001-2003 S3 Graphics, Inc. All Rights Reserved.
+ * Copyright 2000 Silicon Integrated Systems Corp, Inc., HsinChu, Taiwan.
+ * All rights reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sub license,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial portions
+ * of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
+ * VIA, S3 GRAPHICS, AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ */
+#ifndef _via_ds_h_
+#define _via_ds_h_
+#include "drmP.h"
+/* Set Data Structure */
+#define SET_SIZE 5000
+typedef unsigned long ITEM_TYPE;
+typedef struct {
+        ITEM_TYPE val;
+        int alloc_next, free_next;
+} list_item_t;
+typedef struct {
+        int alloc;
+        int free;
+        int trace;
+        list_item_t list[SET_SIZE];
+} set_t;
+set_t *via_setInit(void);
+int via_setAdd(set_t * set, ITEM_TYPE item);
+int via_setDel(set_t * set, ITEM_TYPE item);
+int via_setFirst(set_t * set, ITEM_TYPE * item);
+int via_setNext(set_t * set, ITEM_TYPE * item);
+int via_setDestroy(set_t * set);
+#endif
+#ifndef MM_INC
+#define MM_INC
+struct mem_block_t {
+        struct mem_block_t *next;
+        struct mem_block_t *heap;
+        int ofs, size;
+        int align;
+        int free:1;
+        int reserved:1;
+};
+typedef struct mem_block_t TMemBlock;
+typedef struct mem_block_t *PMemBlock;
+/* a heap is just the first block in a chain */
+typedef struct mem_block_t memHeap_t;
+static __inline__ int mmBlockSize(PMemBlock b)
+{
+        return b->size;
+}
+static __inline__ int mmOffset(PMemBlock b)
+{
+        return b->ofs;
+}
+static __inline__ void mmMarkReserved(PMemBlock b)
+{
+        b->reserved = 1;
+}
+/*
+ * input: total size in bytes
+ * return: a heap pointer if OK, NULL if error
+ */
+memHeap_t *via_mmInit(int ofs, int size);
+PMemBlock via_mmAllocMem(memHeap_t * heap, int size, int align2,
+                         int startSearch);
+/*
+ * Free block starts at offset
+ * input: pointer to a block
+ * return: 0 if OK, -1 if error
+ */
+int via_mmFreeMem(PMemBlock b);
+#endif
diff --git a/drivers/char/drm/via_irq.c b/drivers/char/drm/via_irq.c
new file mode 100644
index 000000000000..e8027f3a93b0
--- /dev/null
+++ b/drivers/char/drm/via_irq.c
@@ -0,0 +1,339 @@
+/* via_irq.c
+ *
+ * Copyright 2004 BEAM Ltd.
+ * Copyright 2002 Tungsten Graphics, Inc.
+ * Copyright 2005 Thomas Hellstrom.
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * BEAM LTD, TUNGSTEN GRAPHICS  AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
+ * DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ *
+ * Authors:
+ *    Terry Barnaby <terry1@beam.ltd.uk>
+ *    Keith Whitwell <keith@tungstengraphics.com>
+ *    Thomas Hellstrom <unichrome@shipmail.org>
+ *
+ * This code provides standard DRM access to the Via Unichrome / Pro Vertical blank
+ * interrupt, as well as an infrastructure to handle other interrupts of the chip.
+ * The refresh rate is also calculated for video playback sync purposes.
+ */
+#include "drmP.h"
+#include "drm.h"
+#include "via_drm.h"
+#include "via_drv.h"
+#define VIA_REG_INTERRUPT       0x200
+/* VIA_REG_INTERRUPT */
+#define VIA_IRQ_GLOBAL          (1 << 31)
+#define VIA_IRQ_VBLANK_ENABLE   (1 << 19)
+#define VIA_IRQ_VBLANK_PENDING  (1 << 3)
+#define VIA_IRQ_HQV0_ENABLE     (1 << 11)
+#define VIA_IRQ_HQV1_ENABLE     (1 << 25)
+#define VIA_IRQ_HQV0_PENDING    (1 << 9)
+#define VIA_IRQ_HQV1_PENDING    (1 << 10)
+/*
+ * Device-specific IRQs go here. This type might need to be extended with
+ * the register if there are multiple IRQ control registers.
+ * Currently we activate the HQV interrupts of  Unichrome Pro group A. 
+ */
+static maskarray_t via_pro_group_a_irqs[] = {
+        {VIA_IRQ_HQV0_ENABLE, VIA_IRQ_HQV0_PENDING, 0x000003D0, 0x00008010, 0x00000000 },
+        {VIA_IRQ_HQV1_ENABLE, VIA_IRQ_HQV1_PENDING, 0x000013D0, 0x00008010, 0x00000000 }};
+static int via_num_pro_group_a = sizeof(via_pro_group_a_irqs)/sizeof(maskarray_t);
+static maskarray_t via_unichrome_irqs[] = {};
+static int via_num_unichrome = sizeof(via_unichrome_irqs)/sizeof(maskarray_t);
+static unsigned time_diff(struct timeval *now,struct timeval *then) 
+{
+    return (now->tv_usec >= then->tv_usec) ?
+        now->tv_usec - then->tv_usec :
+        1000000 - (then->tv_usec - now->tv_usec);
+}
+irqreturn_t via_driver_irq_handler(DRM_IRQ_ARGS)
+{
+        drm_device_t *dev = (drm_device_t *) arg;
+        drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private;
+        u32 status;
+        int handled = 0;
+        struct timeval cur_vblank;
+        drm_via_irq_t *cur_irq = dev_priv->via_irqs;
+        int i;
+        status = VIA_READ(VIA_REG_INTERRUPT);
+        if (status & VIA_IRQ_VBLANK_PENDING) {
+                atomic_inc(&dev->vbl_received);
+                if (!(atomic_read(&dev->vbl_received) & 0x0F)) {
+                        do_gettimeofday(&cur_vblank);
+                        if (dev_priv->last_vblank_valid) {
+                                dev_priv->usec_per_vblank = 
+                                        time_diff( &cur_vblank,&dev_priv->last_vblank) >> 4;
+                        }
+                        dev_priv->last_vblank = cur_vblank;
+                        dev_priv->last_vblank_valid = 1;
+                }
+                if (!(atomic_read(&dev->vbl_received) & 0xFF)) {
+                        DRM_DEBUG("US per vblank is: %u\n",
+                                dev_priv->usec_per_vblank);
+                }
+                DRM_WAKEUP(&dev->vbl_queue);
+                drm_vbl_send_signals(dev);
+                handled = 1;
+        }
+        
+        for (i=0; i<dev_priv->num_irqs; ++i) {
+                if (status & cur_irq->pending_mask) {
+                        atomic_inc( &cur_irq->irq_received );
+                        DRM_WAKEUP( &cur_irq->irq_queue );
+                        handled = 1;
+                }
+                cur_irq++;
+        }
+        
+        /* Acknowlege interrupts */
+        VIA_WRITE(VIA_REG_INTERRUPT, status);
+        if (handled)
+                return IRQ_HANDLED;
+        else
+                return IRQ_NONE;
+}
+static __inline__ void viadrv_acknowledge_irqs(drm_via_private_t * dev_priv)
+{
+        u32 status;
+        if (dev_priv) {
+                /* Acknowlege interrupts */
+                status = VIA_READ(VIA_REG_INTERRUPT);
+                VIA_WRITE(VIA_REG_INTERRUPT, status | 
+                          dev_priv->irq_pending_mask);
+        }
+}
+int via_driver_vblank_wait(drm_device_t * dev, unsigned int *sequence)
+{
+        drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private;
+        unsigned int cur_vblank;
+        int ret = 0;
+        DRM_DEBUG("viadrv_vblank_wait\n");
+        if (!dev_priv) {
+                DRM_ERROR("%s called with no initialization\n", __FUNCTION__);
+                return -EINVAL;
+        }
+        viadrv_acknowledge_irqs(dev_priv);
+        /* Assume that the user has missed the current sequence number
+         * by about a day rather than she wants to wait for years
+         * using vertical blanks...
+         */
+        DRM_WAIT_ON(ret, dev->vbl_queue, 3 * DRM_HZ,
+                    (((cur_vblank = atomic_read(&dev->vbl_received)) -
+                      *sequence) <= (1 << 23)));
+        
+        *sequence = cur_vblank;
+        return ret;
+}
+static int 
+via_driver_irq_wait(drm_device_t * dev, unsigned int irq, int force_sequence,
+                    unsigned int *sequence)
+{
+        drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private;
+        unsigned int cur_irq_sequence;
+        drm_via_irq_t *cur_irq = dev_priv->via_irqs;
+        int ret = 0;
+        maskarray_t *masks = dev_priv->irq_masks;
+        DRM_DEBUG("%s\n", __FUNCTION__);
+        if (!dev_priv) {
+                DRM_ERROR("%s called with no initialization\n", __FUNCTION__);
+                return DRM_ERR(EINVAL);
+        }
+        if (irq >= dev_priv->num_irqs ) {
+                DRM_ERROR("%s Trying to wait on unknown irq %d\n", __FUNCTION__, irq);
+                return DRM_ERR(EINVAL);
+        }
+                
+        cur_irq += irq;
+        if (masks[irq][2] && !force_sequence) {
+                DRM_WAIT_ON(ret, cur_irq->irq_queue, 3 * DRM_HZ,
+                            ((VIA_READ(masks[irq][2]) & masks[irq][3]) == masks[irq][4]));
+                cur_irq_sequence = atomic_read(&cur_irq->irq_received);
+        } else {
+                DRM_WAIT_ON(ret, cur_irq->irq_queue, 3 * DRM_HZ,
+                            (((cur_irq_sequence = atomic_read(&cur_irq->irq_received)) -
+                              *sequence) <= (1 << 23)));                
+        }
+        *sequence = cur_irq_sequence;
+        return ret;
+}
+/*
+ * drm_dma.h hooks
+ */
+void via_driver_irq_preinstall(drm_device_t * dev)
+{
+        drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private;
+        u32 status;
+        drm_via_irq_t *cur_irq = dev_priv->via_irqs;
+        int i;
+        DRM_DEBUG("driver_irq_preinstall: dev_priv: %p\n", dev_priv);
+        if (dev_priv) {
+                dev_priv->irq_enable_mask = VIA_IRQ_VBLANK_ENABLE;
+                dev_priv->irq_pending_mask = VIA_IRQ_VBLANK_PENDING;
+                dev_priv->irq_masks = (dev_priv->pro_group_a) ?
+                        via_pro_group_a_irqs : via_unichrome_irqs;
+                dev_priv->num_irqs = (dev_priv->pro_group_a) ?
+                        via_num_pro_group_a : via_num_unichrome;
+                
+                for(i=0; i < dev_priv->num_irqs; ++i) {
+                        atomic_set(&cur_irq->irq_received, 0);
+                        cur_irq->enable_mask = dev_priv->irq_masks[i][0]; 
+                        cur_irq->pending_mask = dev_priv->irq_masks[i][1];
+                        DRM_INIT_WAITQUEUE( &cur_irq->irq_queue );
+                        dev_priv->irq_enable_mask |= cur_irq->enable_mask;
+                        dev_priv->irq_pending_mask |= cur_irq->pending_mask;
+                        cur_irq++;
+                        
+                        DRM_DEBUG("Initializing IRQ %d\n", i);
+                }
+                        
+                dev_priv->last_vblank_valid = 0;
+                // Clear VSync interrupt regs
+                status = VIA_READ(VIA_REG_INTERRUPT);
+                VIA_WRITE(VIA_REG_INTERRUPT, status & 
+                          ~(dev_priv->irq_enable_mask));
+                
+                /* Clear bits if they're already high */
+                viadrv_acknowledge_irqs(dev_priv);
+        }
+}
+void via_driver_irq_postinstall(drm_device_t * dev)
+{
+        drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private;
+        u32 status;
+        DRM_DEBUG("via_driver_irq_postinstall\n");
+        if (dev_priv) {
+                status = VIA_READ(VIA_REG_INTERRUPT);
+                VIA_WRITE(VIA_REG_INTERRUPT, status | VIA_IRQ_GLOBAL
+                          | dev_priv->irq_enable_mask);
+                /* Some magic, oh for some data sheets ! */
+                VIA_WRITE8(0x83d4, 0x11);
+                VIA_WRITE8(0x83d5, VIA_READ8(0x83d5) | 0x30);
+                
+        }
+}
+void via_driver_irq_uninstall(drm_device_t * dev)
+{
+        drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private;
+        u32 status;
+        DRM_DEBUG("driver_irq_uninstall)\n");
+        if (dev_priv) {
+                /* Some more magic, oh for some data sheets ! */
+                VIA_WRITE8(0x83d4, 0x11);
+                VIA_WRITE8(0x83d5, VIA_READ8(0x83d5) & ~0x30);
+                status = VIA_READ(VIA_REG_INTERRUPT);
+                VIA_WRITE(VIA_REG_INTERRUPT, status & 
+                          ~(VIA_IRQ_VBLANK_ENABLE | dev_priv->irq_enable_mask));
+        }
+}
+int via_wait_irq(DRM_IOCTL_ARGS)
+{
+        drm_file_t *priv = filp->private_data;
+        drm_device_t *dev = priv->head->dev;
+        drm_via_irqwait_t __user *argp = (void __user *)data;
+        drm_via_irqwait_t irqwait;
+        struct timeval now;
+        int ret = 0;
+        drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private;
+        drm_via_irq_t *cur_irq = dev_priv->via_irqs;
+        int force_sequence;
+        if (!dev->irq)
+                return DRM_ERR(EINVAL);
+        DRM_COPY_FROM_USER_IOCTL(irqwait, argp, sizeof(irqwait));
+        if (irqwait.request.irq >= dev_priv->num_irqs) {
+                DRM_ERROR("%s Trying to wait on unknown irq %d\n", __FUNCTION__, 
+                          irqwait.request.irq);
+                return DRM_ERR(EINVAL);
+        }
+        cur_irq += irqwait.request.irq;
+        switch (irqwait.request.type & ~VIA_IRQ_FLAGS_MASK) {
+        case VIA_IRQ_RELATIVE:
+                irqwait.request.sequence += atomic_read(&cur_irq->irq_received);
+                irqwait.request.type &= ~_DRM_VBLANK_RELATIVE;
+        case VIA_IRQ_ABSOLUTE:
+                break;
+        default:
+                return DRM_ERR(EINVAL);
+        }
+        if (irqwait.request.type & VIA_IRQ_SIGNAL) {
+                DRM_ERROR("%s Signals on Via IRQs not implemented yet.\n", 
+                          __FUNCTION__);
+                return DRM_ERR(EINVAL);
+        }
+        force_sequence = (irqwait.request.type & VIA_IRQ_FORCE_SEQUENCE);
+        ret = via_driver_irq_wait(dev, irqwait.request.irq, force_sequence,
+                                  &irqwait.request.sequence);
+        do_gettimeofday(&now);
+        irqwait.reply.tval_sec = now.tv_sec;
+        irqwait.reply.tval_usec = now.tv_usec;
+        DRM_COPY_TO_USER_IOCTL(argp, irqwait, sizeof(irqwait));
+        return ret;
+}
diff --git a/drivers/char/drm/via_map.c b/drivers/char/drm/via_map.c
new file mode 100644
index 000000000000..0be829b6ec65
--- /dev/null
+++ b/drivers/char/drm/via_map.c
@@ -0,0 +1,110 @@
+/*
+ * Copyright 1998-2003 VIA Technologies, Inc. All Rights Reserved.
+ * Copyright 2001-2003 S3 Graphics, Inc. All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sub license,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial portions
+ * of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
+ * VIA, S3 GRAPHICS, AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ */
+#include "drmP.h"
+#include "via_drm.h"
+#include "via_drv.h"
+static int via_do_init_map(drm_device_t * dev, drm_via_init_t * init)
+{
+        drm_via_private_t *dev_priv;
+        DRM_DEBUG("%s\n", __FUNCTION__);
+        dev_priv = drm_alloc(sizeof(drm_via_private_t), DRM_MEM_DRIVER);
+        if (dev_priv == NULL)
+                return -ENOMEM;
+        memset(dev_priv, 0, sizeof(drm_via_private_t));
+        DRM_GETSAREA();
+        if (!dev_priv->sarea) {
+                DRM_ERROR("could not find sarea!\n");
+                dev->dev_private = (void *)dev_priv;
+                via_do_cleanup_map(dev);
+                return -EINVAL;
+        }
+        dev_priv->fb = drm_core_findmap(dev, init->fb_offset);
+        if (!dev_priv->fb) {
+                DRM_ERROR("could not find framebuffer!\n");
+                dev->dev_private = (void *)dev_priv;
+                via_do_cleanup_map(dev);
+                return -EINVAL;
+        }
+        dev_priv->mmio = drm_core_findmap(dev, init->mmio_offset);
+        if (!dev_priv->mmio) {
+                DRM_ERROR("could not find mmio region!\n");
+                dev->dev_private = (void *)dev_priv;
+                via_do_cleanup_map(dev);
+                return -EINVAL;
+        }
+        dev_priv->sarea_priv =
+            (drm_via_sarea_t *) ((u8 *) dev_priv->sarea->handle +
+                                 init->sarea_priv_offset);
+        dev_priv->agpAddr = init->agpAddr;
+        via_init_futex( dev_priv );
+        dev_priv->pro_group_a = (dev->pdev->device == 0x3118);
+        dev->dev_private = (void *)dev_priv;
+        return 0;
+}
+int via_do_cleanup_map(drm_device_t * dev)
+{
+        if (dev->dev_private) {
+                drm_via_private_t *dev_priv = dev->dev_private;
+                via_dma_cleanup(dev);
+                drm_free(dev_priv, sizeof(drm_via_private_t), DRM_MEM_DRIVER);
+                dev->dev_private = NULL;
+        }
+        return 0;
+}
+int via_map_init(DRM_IOCTL_ARGS)
+{
+        DRM_DEVICE;
+        drm_via_init_t init;
+        DRM_DEBUG("%s\n", __FUNCTION__);
+        DRM_COPY_FROM_USER_IOCTL(init, (drm_via_init_t *) data, sizeof(init));
+        switch (init.func) {
+        case VIA_INIT_MAP:
+                return via_do_init_map(dev, &init);
+        case VIA_CLEANUP_MAP:
+                return via_do_cleanup_map(dev);
+        }
+        return -EINVAL;
+}
diff --git a/drivers/char/drm/via_mm.c b/drivers/char/drm/via_mm.c
new file mode 100644
index 000000000000..c22712f44d42
--- /dev/null
+++ b/drivers/char/drm/via_mm.c
@@ -0,0 +1,358 @@
+/*
+ * Copyright 1998-2003 VIA Technologies, Inc. All Rights Reserved.
+ * Copyright 2001-2003 S3 Graphics, Inc. All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sub license,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial portions
+ * of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
+ * VIA, S3 GRAPHICS, AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ */
+#include "drmP.h"
+#include "via_drm.h"
+#include "via_drv.h"
+#include "via_ds.h"
+#include "via_mm.h"
+#define MAX_CONTEXT 100
+typedef struct {
+        int used;
+        int context;
+        set_t *sets[2];         /* 0 for frame buffer, 1 for AGP , 2 for System */
+} via_context_t;
+static via_context_t global_ppriv[MAX_CONTEXT];
+static int via_agp_alloc(drm_via_mem_t * mem);
+static int via_agp_free(drm_via_mem_t * mem);
+static int via_fb_alloc(drm_via_mem_t * mem);
+static int via_fb_free(drm_via_mem_t * mem);
+static int add_alloc_set(int context, int type, unsigned int val)
+{
+        int i, retval = 0;
+        for (i = 0; i < MAX_CONTEXT; i++) {
+                if (global_ppriv[i].used && global_ppriv[i].context == context) {
+                        retval = via_setAdd(global_ppriv[i].sets[type], val);
+                        break;
+                }
+        }
+        return retval;
+}
+static int del_alloc_set(int context, int type, unsigned int val)
+{
+        int i, retval = 0;
+        for (i = 0; i < MAX_CONTEXT; i++)
+                if (global_ppriv[i].used && global_ppriv[i].context == context) {
+                        retval = via_setDel(global_ppriv[i].sets[type], val);
+                        break;
+                }
+        return retval;
+}
+/* agp memory management */
+static memHeap_t *AgpHeap = NULL;
+int via_agp_init(DRM_IOCTL_ARGS)
+{
+        drm_via_agp_t agp;
+        DRM_COPY_FROM_USER_IOCTL(agp, (drm_via_agp_t *) data, sizeof(agp));
+        AgpHeap = via_mmInit(agp.offset, agp.size);
+        DRM_DEBUG("offset = %lu, size = %lu", (unsigned long)agp.offset, (unsigned long)agp.size);
+        return 0;
+}
+/* fb memory management */
+static memHeap_t *FBHeap = NULL;
+int via_fb_init(DRM_IOCTL_ARGS)
+{
+        drm_via_fb_t fb;
+        DRM_COPY_FROM_USER_IOCTL(fb, (drm_via_fb_t *) data, sizeof(fb));
+        FBHeap = via_mmInit(fb.offset, fb.size);
+        DRM_DEBUG("offset = %lu, size = %lu", (unsigned long)fb.offset, (unsigned long)fb.size);
+        return 0;
+}
+int via_init_context(struct drm_device *dev, int context)
+{
+        int i;
+        for (i = 0; i < MAX_CONTEXT; i++)
+                if (global_ppriv[i].used &&
+                    (global_ppriv[i].context == context))
+                        break;
+        if (i >= MAX_CONTEXT) {
+                for (i = 0; i < MAX_CONTEXT; i++) {
+                        if (!global_ppriv[i].used) {
+                                global_ppriv[i].context = context;
+                                global_ppriv[i].used = 1;
+                                global_ppriv[i].sets[0] = via_setInit();
+                                global_ppriv[i].sets[1] = via_setInit();
+                                DRM_DEBUG("init allocation set, socket=%d,"
+                                          " context = %d\n", i, context);
+                                break;
+                        }
+                }
+                if ((i >= MAX_CONTEXT) || (global_ppriv[i].sets[0] == NULL) ||
+                    (global_ppriv[i].sets[1] == NULL)) {
+                        return 0;
+                }
+        }
+        return 1;
+}
+int via_final_context(struct drm_device *dev, int context)
+{       
+        int i;
+        drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private;
+        for (i = 0; i < MAX_CONTEXT; i++)
+                if (global_ppriv[i].used &&
+                    (global_ppriv[i].context == context))
+                        break;
+        if (i < MAX_CONTEXT) {
+                set_t *set;
+                ITEM_TYPE item;
+                int retval;
+                DRM_DEBUG("find socket %d, context = %d\n", i, context);
+                /* Video Memory */
+                set = global_ppriv[i].sets[0];
+                retval = via_setFirst(set, &item);
+                while (retval) {
+                        DRM_DEBUG("free video memory 0x%lx\n", item);
+                        via_mmFreeMem((PMemBlock) item);
+                        retval = via_setNext(set, &item);
+                }
+                via_setDestroy(set);
+                /* AGP Memory */
+                set = global_ppriv[i].sets[1];
+                retval = via_setFirst(set, &item);
+                while (retval) {
+                        DRM_DEBUG("free agp memory 0x%lx\n", item);
+                        via_mmFreeMem((PMemBlock) item);
+                        retval = via_setNext(set, &item);
+                }
+                via_setDestroy(set);
+                global_ppriv[i].used = 0;
+        }
+        via_release_futex(dev_priv, context); 
+        
+                        
+#if defined(__linux__)
+        /* Linux specific until context tracking code gets ported to BSD */
+        /* Last context, perform cleanup */
+        if (dev->ctx_count == 1 && dev->dev_private) {
+                DRM_DEBUG("Last Context\n");
+                if (dev->irq)
+                        drm_irq_uninstall(dev);
+                via_cleanup_futex(dev_priv);
+                via_do_cleanup_map(dev);
+        }
+#endif
+        return 1;
+}
+int via_mem_alloc(DRM_IOCTL_ARGS)
+{
+        drm_via_mem_t mem;
+        DRM_COPY_FROM_USER_IOCTL(mem, (drm_via_mem_t *) data, sizeof(mem));
+        switch (mem.type) {
+        case VIDEO:
+                if (via_fb_alloc(&mem) < 0)
+                        return -EFAULT;
+                DRM_COPY_TO_USER_IOCTL((drm_via_mem_t *) data, mem,
+                                       sizeof(mem));
+                return 0;
+        case AGP:
+                if (via_agp_alloc(&mem) < 0)
+                        return -EFAULT;
+                DRM_COPY_TO_USER_IOCTL((drm_via_mem_t *) data, mem,
+                                       sizeof(mem));
+                return 0;
+        }
+        return -EFAULT;
+}
+static int via_fb_alloc(drm_via_mem_t * mem)
+{
+        drm_via_mm_t fb;
+        PMemBlock block;
+        int retval = 0;
+        if (!FBHeap)
+                return -1;
+        fb.size = mem->size;
+        fb.context = mem->context;
+        block = via_mmAllocMem(FBHeap, fb.size, 5, 0);
+        if (block) {
+                fb.offset = block->ofs;
+                fb.free = (unsigned long)block;
+                if (!add_alloc_set(fb.context, VIDEO, fb.free)) {
+                        DRM_DEBUG("adding to allocation set fails\n");
+                        via_mmFreeMem((PMemBlock) fb.free);
+                        retval = -1;
+                }
+        } else {
+                fb.offset = 0;
+                fb.size = 0;
+                fb.free = 0;
+                retval = -1;
+        }
+        mem->offset = fb.offset;
+        mem->index = fb.free;
+        DRM_DEBUG("alloc fb, size = %d, offset = %d\n", fb.size,
+                  (int)fb.offset);
+        return retval;
+}
+static int via_agp_alloc(drm_via_mem_t * mem)
+{
+        drm_via_mm_t agp;
+        PMemBlock block;
+        int retval = 0;
+        if (!AgpHeap)
+                return -1;
+        agp.size = mem->size;
+        agp.context = mem->context;
+        block = via_mmAllocMem(AgpHeap, agp.size, 5, 0);
+        if (block) {
+                agp.offset = block->ofs;
+                agp.free = (unsigned long)block;
+                if (!add_alloc_set(agp.context, AGP, agp.free)) {
+                        DRM_DEBUG("adding to allocation set fails\n");
+                        via_mmFreeMem((PMemBlock) agp.free);
+                        retval = -1;
+                }
+        } else {
+                agp.offset = 0;
+                agp.size = 0;
+                agp.free = 0;
+        }
+        mem->offset = agp.offset;
+        mem->index = agp.free;
+        DRM_DEBUG("alloc agp, size = %d, offset = %d\n", agp.size,
+                  (unsigned int)agp.offset);
+        return retval;
+}
+int via_mem_free(DRM_IOCTL_ARGS)
+{
+        drm_via_mem_t mem;
+        DRM_COPY_FROM_USER_IOCTL(mem, (drm_via_mem_t *) data, sizeof(mem));
+        switch (mem.type) {
+        case VIDEO:
+                if (via_fb_free(&mem) == 0)
+                        return 0;
+                break;
+        case AGP:
+                if (via_agp_free(&mem) == 0)
+                        return 0;
+                break;
+        }
+        return -EFAULT;
+}
+static int via_fb_free(drm_via_mem_t * mem)
+{
+        drm_via_mm_t fb;
+        int retval = 0;
+        if (!FBHeap) {
+                return -1;
+        }
+        fb.free = mem->index;
+        fb.context = mem->context;
+        if (!fb.free) {
+                return -1;
+        }
+        via_mmFreeMem((PMemBlock) fb.free);
+        if (!del_alloc_set(fb.context, VIDEO, fb.free)) {
+                retval = -1;
+        }
+        DRM_DEBUG("free fb, free = %ld\n", fb.free);
+        return retval;
+}
+static int via_agp_free(drm_via_mem_t * mem)
+{
+        drm_via_mm_t agp;
+        int retval = 0;
+        agp.free = mem->index;
+        agp.context = mem->context;
+        if (!agp.free)
+                return -1;
+        via_mmFreeMem((PMemBlock) agp.free);
+        if (!del_alloc_set(agp.context, AGP, agp.free)) {
+                retval = -1;
+        }
+        DRM_DEBUG("free agp, free = %ld\n", agp.free);
+        return retval;
+}
diff --git a/drivers/char/drm/via_mm.h b/drivers/char/drm/via_mm.h
new file mode 100644
index 000000000000..d57efda57c76
--- /dev/null
+++ b/drivers/char/drm/via_mm.h
@@ -0,0 +1,40 @@
+/*
+ * Copyright 1998-2003 VIA Technologies, Inc. All Rights Reserved.
+ * Copyright 2001-2003 S3 Graphics, Inc. All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sub license,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial portions
+ * of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
+ * VIA, S3 GRAPHICS, AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ */
+#ifndef _via_drm_mm_h_
+#define _via_drm_mm_h_
+typedef struct {
+        unsigned int context;
+        unsigned int size;
+        unsigned long offset;
+        unsigned long free;
+} drm_via_mm_t;
+typedef struct {
+        unsigned int size;
+        unsigned long handle;
+        void *virtual;
+} drm_via_dma_t;
+#endif
diff --git a/drivers/char/drm/via_verifier.c b/drivers/char/drm/via_verifier.c
new file mode 100644
index 000000000000..07923b0c7a97
--- /dev/null
+++ b/drivers/char/drm/via_verifier.c
@@ -0,0 +1,1061 @@
+/*
+ * Copyright 2004 The Unichrome Project. All Rights Reserved.
+ * Copyright 2005 Thomas Hellstrom. All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sub license,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial portions
+ * of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHOR(S), AND/OR THE COPYRIGHT HOLDER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ *
+ * Author: Thomas Hellstrom 2004, 2005.
+ * This code was written using docs obtained under NDA from VIA Inc.
+ *
+ * Don't run this code directly on an AGP buffer. Due to cache problems it will
+ * be very slow.
+ */
+#include "via_3d_reg.h"
+#include "drmP.h"
+#include "drm.h"
+#include "via_drm.h"
+#include "via_verifier.h"
+#include "via_drv.h"
+typedef enum{
+        state_command,
+        state_header2,
+        state_header1,
+        state_vheader5,
+        state_vheader6,
+        state_error
+} verifier_state_t;
+typedef enum{
+        no_check = 0,
+        check_for_header2,
+        check_for_header1,
+        check_for_header2_err,
+        check_for_header1_err,
+        check_for_fire,
+        check_z_buffer_addr0,
+        check_z_buffer_addr1,
+        check_z_buffer_addr_mode,
+        check_destination_addr0,
+        check_destination_addr1,
+        check_destination_addr_mode,
+        check_for_dummy,
+        check_for_dd,
+        check_texture_addr0,
+        check_texture_addr1,
+        check_texture_addr2,
+        check_texture_addr3,
+        check_texture_addr4,
+        check_texture_addr5,
+        check_texture_addr6,
+        check_texture_addr7,
+        check_texture_addr8,
+        check_texture_addr_mode,
+        check_for_vertex_count,
+        check_number_texunits,
+        forbidden_command
+}hazard_t;
+/*
+ * Associates each hazard above with a possible multi-command
+ * sequence. For example an address that is split over multiple
+ * commands and that needs to be checked at the first command 
+ * that does not include any part of the address.
+ */
+static drm_via_sequence_t seqs[] = { 
+        no_sequence,
+        no_sequence,
+        no_sequence,
+        no_sequence,
+        no_sequence,
+        no_sequence,
+        z_address,
+        z_address,
+        z_address,
+        dest_address,
+        dest_address,
+        dest_address,
+        no_sequence,
+        no_sequence,
+        tex_address,
+        tex_address,
+        tex_address,
+        tex_address,
+        tex_address,
+        tex_address,
+        tex_address,
+        tex_address,
+        tex_address,
+        tex_address,
+        no_sequence
+};
+    
+typedef struct{
+        unsigned int code;
+        hazard_t hz;
+} hz_init_t;
+static hz_init_t init_table1[] = {
+        {0xf2, check_for_header2_err},
+        {0xf0, check_for_header1_err},
+        {0xee, check_for_fire},
+        {0xcc, check_for_dummy},
+        {0xdd, check_for_dd},
+        {0x00, no_check},
+        {0x10, check_z_buffer_addr0},
+        {0x11, check_z_buffer_addr1},
+        {0x12, check_z_buffer_addr_mode},
+        {0x13, no_check},
+        {0x14, no_check},
+        {0x15, no_check},
+        {0x23, no_check},
+        {0x24, no_check},
+        {0x33, no_check},
+        {0x34, no_check},
+        {0x35, no_check},
+        {0x36, no_check},
+        {0x37, no_check},
+        {0x38, no_check},
+        {0x39, no_check},
+        {0x3A, no_check},
+        {0x3B, no_check},
+        {0x3C, no_check},
+        {0x3D, no_check},
+        {0x3E, no_check},
+        {0x40, check_destination_addr0},
+        {0x41, check_destination_addr1},
+        {0x42, check_destination_addr_mode},
+        {0x43, no_check},
+        {0x44, no_check},
+        {0x50, no_check},
+        {0x51, no_check},
+        {0x52, no_check},
+        {0x53, no_check},
+        {0x54, no_check},
+        {0x55, no_check},
+        {0x56, no_check},
+        {0x57, no_check},
+        {0x58, no_check},
+        {0x70, no_check},
+        {0x71, no_check},
+        {0x78, no_check},
+        {0x79, no_check},
+        {0x7A, no_check},
+        {0x7B, no_check},
+        {0x7C, no_check},
+        {0x7D, check_for_vertex_count}
+};
+   
+                       
+static hz_init_t init_table2[] = {
+        {0xf2, check_for_header2_err},
+        {0xf0, check_for_header1_err},
+        {0xee, check_for_fire},
+        {0xcc, check_for_dummy},
+        {0x00, check_texture_addr0},
+        {0x01, check_texture_addr0},
+        {0x02, check_texture_addr0},
+        {0x03, check_texture_addr0},
+        {0x04, check_texture_addr0},
+        {0x05, check_texture_addr0},
+        {0x06, check_texture_addr0},
+        {0x07, check_texture_addr0},
+        {0x08, check_texture_addr0},
+        {0x09, check_texture_addr0},
+        {0x20, check_texture_addr1},
+        {0x21, check_texture_addr1},
+        {0x22, check_texture_addr1},
+        {0x23, check_texture_addr4},
+        {0x2B, check_texture_addr3},
+        {0x2C, check_texture_addr3},
+        {0x2D, check_texture_addr3},
+        {0x2E, check_texture_addr3},
+        {0x2F, check_texture_addr3},
+        {0x30, check_texture_addr3},
+        {0x31, check_texture_addr3},
+        {0x32, check_texture_addr3},
+        {0x33, check_texture_addr3},
+        {0x34, check_texture_addr3},
+        {0x4B, check_texture_addr5},
+        {0x4C, check_texture_addr6},
+        {0x51, check_texture_addr7},
+        {0x52, check_texture_addr8},
+        {0x77, check_texture_addr2},
+        {0x78, no_check},
+        {0x79, no_check},
+        {0x7A, no_check},
+        {0x7B, check_texture_addr_mode},
+        {0x7C, no_check},
+        {0x7D, no_check},
+        {0x7E, no_check},
+        {0x7F, no_check},
+        {0x80, no_check},
+        {0x81, no_check},
+        {0x82, no_check},
+        {0x83, no_check},
+        {0x85, no_check},
+        {0x86, no_check},
+        {0x87, no_check},
+        {0x88, no_check},
+        {0x89, no_check},
+        {0x8A, no_check},
+        {0x90, no_check},
+        {0x91, no_check},
+        {0x92, no_check},
+        {0x93, no_check}
+};
+static hz_init_t init_table3[] = {
+        {0xf2, check_for_header2_err},
+        {0xf0, check_for_header1_err},
+        {0xcc, check_for_dummy},
+        {0x00, check_number_texunits}
+};
+   
+                       
+static hazard_t table1[256]; 
+static hazard_t table2[256]; 
+static hazard_t table3[256]; 
+static __inline__ int
+eat_words(const uint32_t **buf, const uint32_t *buf_end, unsigned num_words)
+{
+        if ((*buf - buf_end) >= num_words) {
+                *buf += num_words;
+                return 0;
+        } 
+        DRM_ERROR("Illegal termination of DMA command buffer\n");
+        return 1;
+}
+/*
+ * Partially stolen from drm_memory.h
+ */
+static __inline__ drm_map_t *
+via_drm_lookup_agp_map (drm_via_state_t *seq, unsigned long offset, unsigned long size, 
+                        drm_device_t *dev)
+{
+        struct list_head *list;
+        drm_map_list_t *r_list;
+        drm_map_t *map = seq->map_cache;
+        if (map && map->offset <= offset && (offset + size) <= (map->offset + map->size)) {
+                return map;
+        }
+                
+        list_for_each(list, &dev->maplist->head) {
+                r_list = (drm_map_list_t *) list;
+                map = r_list->map;
+                if (!map)
+                        continue;
+                if (map->offset <= offset && (offset + size) <= (map->offset + map->size) && 
+                    !(map->flags & _DRM_RESTRICTED) && (map->type == _DRM_AGP)) {
+                        seq->map_cache = map;
+                        return map;
+                }
+        }
+        return NULL;
+}
+/*
+ * Require that all AGP texture levels reside in the same AGP map which should 
+ * be mappable by the client. This is not a big restriction.
+ * FIXME: To actually enforce this security policy strictly, drm_rmmap 
+ * would have to wait for dma quiescent before removing an AGP map. 
+ * The via_drm_lookup_agp_map call in reality seems to take
+ * very little CPU time.
+ */
+static __inline__ int
+finish_current_sequence(drm_via_state_t *cur_seq) 
+{
+        switch(cur_seq->unfinished) {
+        case z_address:
+                DRM_DEBUG("Z Buffer start address is 0x%x\n", cur_seq->z_addr);
+                break;
+        case dest_address:
+                DRM_DEBUG("Destination start address is 0x%x\n", cur_seq->d_addr);
+                break;
+        case tex_address:
+                if (cur_seq->agp_texture) {                      
+                        unsigned start = cur_seq->tex_level_lo[cur_seq->texture];
+                        unsigned end = cur_seq->tex_level_hi[cur_seq->texture];
+                        unsigned long lo=~0, hi=0, tmp;
+                        uint32_t *addr, *pitch, *height, tex;
+                        unsigned i;
+                        if (end > 9) end = 9;
+                        if (start > 9) start = 9;
+                        addr =&(cur_seq->t_addr[tex = cur_seq->texture][start]);
+                        pitch = &(cur_seq->pitch[tex][start]);
+                        height = &(cur_seq->height[tex][start]);
+                        for (i=start; i<= end; ++i) {
+                                tmp = *addr++;
+                                if (tmp < lo) lo = tmp;
+                                tmp += (*height++ << *pitch++);
+                                if (tmp > hi) hi = tmp;
+                        }
+                        if (! via_drm_lookup_agp_map (cur_seq, lo, hi - lo, cur_seq->dev)) {
+                                DRM_ERROR("AGP texture is not in allowed map\n");
+                                return 2;
+                        }
+                }       
+                break;
+        default:
+                break;
+        }
+        cur_seq->unfinished = no_sequence;
+        return 0;
+}
+static __inline__ int 
+investigate_hazard( uint32_t cmd, hazard_t hz, drm_via_state_t *cur_seq)
+{
+        register uint32_t tmp, *tmp_addr;
+        if (cur_seq->unfinished && (cur_seq->unfinished != seqs[hz])) {
+                int ret;
+                if ((ret = finish_current_sequence(cur_seq))) return ret;
+        }
+        switch(hz) {
+        case check_for_header2:
+                if (cmd == HALCYON_HEADER2) return 1;
+                return 0;
+        case check_for_header1:
+                if ((cmd & HALCYON_HEADER1MASK) == HALCYON_HEADER1) return 1;
+                return 0;
+        case check_for_header2_err:
+                if (cmd == HALCYON_HEADER2) return 1;
+                DRM_ERROR("Illegal DMA HALCYON_HEADER2 command\n");
+                break;
+        case check_for_header1_err:
+                if ((cmd & HALCYON_HEADER1MASK) == HALCYON_HEADER1) return 1;
+                DRM_ERROR("Illegal DMA HALCYON_HEADER1 command\n");
+                break;
+        case check_for_fire:
+                if ((cmd & HALCYON_FIREMASK) == HALCYON_FIRECMD) return 1; 
+                DRM_ERROR("Illegal DMA HALCYON_FIRECMD command\n");
+                break;
+        case check_for_dummy:
+                if (HC_DUMMY == cmd) return 0;
+                DRM_ERROR("Illegal DMA HC_DUMMY command\n");
+                break;
+        case check_for_dd:
+                if (0xdddddddd == cmd) return 0;
+                DRM_ERROR("Illegal DMA 0xdddddddd command\n");
+                break;
+        case check_z_buffer_addr0:
+                cur_seq->unfinished = z_address;
+                cur_seq->z_addr = (cur_seq->z_addr & 0xFF000000) |
+                        (cmd & 0x00FFFFFF);
+                return 0;
+        case check_z_buffer_addr1:
+                cur_seq->unfinished = z_address;
+                cur_seq->z_addr = (cur_seq->z_addr & 0x00FFFFFF) |
+                        ((cmd & 0xFF) << 24);
+                return 0;
+        case check_z_buffer_addr_mode:
+                cur_seq->unfinished = z_address;
+                if ((cmd & 0x0000C000) == 0) return 0;
+                DRM_ERROR("Attempt to place Z buffer in system memory\n");
+                return 2;
+        case check_destination_addr0:
+                cur_seq->unfinished = dest_address;
+                cur_seq->d_addr = (cur_seq->d_addr & 0xFF000000) |
+                        (cmd & 0x00FFFFFF);
+                return 0;
+        case check_destination_addr1:
+                cur_seq->unfinished = dest_address;
+                cur_seq->d_addr = (cur_seq->d_addr & 0x00FFFFFF) |
+                        ((cmd & 0xFF) << 24);
+                return 0;
+        case check_destination_addr_mode:
+                cur_seq->unfinished = dest_address;
+                if ((cmd & 0x0000C000) == 0) return 0;
+                DRM_ERROR("Attempt to place 3D drawing buffer in system memory\n");
+                return 2;           
+        case check_texture_addr0:
+                cur_seq->unfinished = tex_address;
+                tmp = (cmd >> 24);
+                tmp_addr = &cur_seq->t_addr[cur_seq->texture][tmp];
+                *tmp_addr = (*tmp_addr & 0xFF000000) | (cmd & 0x00FFFFFF);
+                return 0;
+        case check_texture_addr1:
+                cur_seq->unfinished = tex_address;
+                tmp = ((cmd >> 24) - 0x20);
+                tmp += tmp << 1;
+                tmp_addr = &cur_seq->t_addr[cur_seq->texture][tmp];
+                *tmp_addr = (*tmp_addr & 0x00FFFFFF) | ((cmd & 0xFF) << 24);
+                tmp_addr++;
+                *tmp_addr = (*tmp_addr & 0x00FFFFFF) | ((cmd & 0xFF00) << 16);
+                tmp_addr++;
+                *tmp_addr = (*tmp_addr & 0x00FFFFFF) | ((cmd & 0xFF0000) << 8);
+                return 0;
+        case check_texture_addr2:
+                cur_seq->unfinished = tex_address;
+                cur_seq->tex_level_lo[tmp = cur_seq->texture] = cmd & 0x3F;
+                cur_seq->tex_level_hi[tmp] = (cmd & 0xFC0) >> 6;
+                return 0;
+        case check_texture_addr3:
+                cur_seq->unfinished = tex_address;
+                tmp = ((cmd >> 24) - 0x2B);
+                cur_seq->pitch[cur_seq->texture][tmp] = (cmd & 0x00F00000) >> 20;
+                if (!tmp && (cmd & 0x000FFFFF)) {
+                        DRM_ERROR("Unimplemented texture level 0 pitch mode.\n");
+                        return 2;
+                }
+                return 0;
+        case check_texture_addr4:
+                cur_seq->unfinished = tex_address;
+                tmp_addr = &cur_seq->t_addr[cur_seq->texture][9];
+                *tmp_addr = (*tmp_addr & 0x00FFFFFF) | ((cmd & 0xFF) << 24);
+                return 0;
+        case check_texture_addr5:
+        case check_texture_addr6:
+                cur_seq->unfinished = tex_address;
+                /*
+                 * Texture width. We don't care since we have the pitch.
+                 */  
+                return 0;
+        case check_texture_addr7:
+                cur_seq->unfinished = tex_address;
+                tmp_addr = &(cur_seq->height[cur_seq->texture][0]);
+                tmp_addr[5] = 1 << ((cmd & 0x00F00000) >> 20);
+                tmp_addr[4] = 1 << ((cmd & 0x000F0000) >> 16);
+                tmp_addr[3] = 1 << ((cmd & 0x0000F000) >> 12);
+                tmp_addr[2] = 1 << ((cmd & 0x00000F00) >> 8);
+                tmp_addr[1] = 1 << ((cmd & 0x000000F0) >> 4);
+                tmp_addr[0] = 1 << (cmd & 0x0000000F);
+                return 0;
+        case check_texture_addr8:
+                cur_seq->unfinished = tex_address;
+                tmp_addr = &(cur_seq->height[cur_seq->texture][0]);
+                tmp_addr[9] = 1 << ((cmd & 0x0000F000) >> 12);
+                tmp_addr[8] = 1 << ((cmd & 0x00000F00) >> 8);
+                tmp_addr[7] = 1 << ((cmd & 0x000000F0) >> 4);
+                tmp_addr[6] = 1 << (cmd & 0x0000000F);
+                return 0;
+        case check_texture_addr_mode:
+                cur_seq->unfinished = tex_address;
+                if ( 2 == (tmp = cmd & 0x00000003)) {
+                        DRM_ERROR("Attempt to fetch texture from system memory.\n"); 
+                        return 2;
+                }
+                cur_seq->agp_texture = (tmp == 3);
+                cur_seq->tex_palette_size[cur_seq->texture] = 
+                        (cmd >> 16) & 0x000000007;
+                return 0;
+        case check_for_vertex_count:
+                cur_seq->vertex_count = cmd & 0x0000FFFF;
+                return 0;
+        case check_number_texunits:
+                cur_seq->multitex = (cmd >> 3) & 1;
+                return 0;
+        default:
+                DRM_ERROR("Illegal DMA data: 0x%x\n", cmd);
+                return 2;
+        }
+        return 2;
+}
+static __inline__ int
+via_check_prim_list(uint32_t const **buffer, const uint32_t *buf_end,
+                    drm_via_state_t *cur_seq)
+{
+        drm_via_private_t *dev_priv = (drm_via_private_t *) cur_seq->dev->dev_private;
+        uint32_t a_fire, bcmd , dw_count;
+        int ret = 0;
+        int have_fire;
+        const uint32_t *buf = *buffer;
+        while(buf < buf_end) {
+                have_fire = 0;
+                if ((buf_end - buf) < 2) {
+                        DRM_ERROR("Unexpected termination of primitive list.\n");
+                        ret = 1;
+                        break;
+                }
+                if ((*buf & HC_ACMD_MASK) != HC_ACMD_HCmdB) break;
+                bcmd = *buf++;
+                if ((*buf & HC_ACMD_MASK) != HC_ACMD_HCmdA) {
+                        DRM_ERROR("Expected Vertex List A command, got 0x%x\n",
+                                  *buf);
+                        ret = 1;
+                        break;
+                }
+                a_fire = *buf++ | HC_HPLEND_MASK | HC_HPMValidN_MASK | HC_HE3Fire_MASK; 
+        
+                /*
+                 * How many dwords per vertex ?
+                 */ 
+                
+                if (cur_seq->agp && ((bcmd & (0xF << 11)) == 0)) {
+                        DRM_ERROR("Illegal B command vertex data for AGP.\n");
+                        ret = 1;
+                        break;
+                } 
+                dw_count = 0;
+                if (bcmd & (1 << 7)) dw_count += (cur_seq->multitex) ? 2:1;
+                if (bcmd & (1 << 8)) dw_count += (cur_seq->multitex) ? 2:1;
+                if (bcmd & (1 << 9)) dw_count++;
+                if (bcmd & (1 << 10)) dw_count++;
+                if (bcmd & (1 << 11)) dw_count++;
+                if (bcmd & (1 << 12)) dw_count++;
+                if (bcmd & (1 << 13)) dw_count++;
+                if (bcmd & (1 << 14)) dw_count++;
+                while(buf < buf_end) {
+                        if (*buf == a_fire) {
+                                if (dev_priv->num_fire_offsets >= VIA_FIRE_BUF_SIZE) {
+                                        DRM_ERROR("Fire offset buffer full.\n");
+                                        ret = 1;
+                                        break;
+                                }
+                                dev_priv->fire_offsets[dev_priv->num_fire_offsets++] = buf;
+                                have_fire = 1;
+                                buf++;
+                                if (buf < buf_end && *buf == a_fire) 
+                                        buf++;
+                                break;
+                        }
+                        if ((*buf == HALCYON_HEADER2) || 
+                            ((*buf & HALCYON_FIREMASK) == HALCYON_FIRECMD)) {
+                                DRM_ERROR("Missing Vertex Fire command, "
+                                          "Stray Vertex Fire command  or verifier "
+                                          "lost sync.\n");
+                                ret = 1;
+                                break;
+                        }
+                        if ((ret = eat_words(&buf, buf_end, dw_count)))
+                                break;
+                }
+                if (buf >= buf_end && !have_fire) {
+                        DRM_ERROR("Missing Vertex Fire command or verifier "
+                                  "lost sync.\n");
+                        ret = 1;
+                        break;
+                }
+                if (cur_seq->agp && ((buf - cur_seq->buf_start) & 0x01)) {
+                        DRM_ERROR("AGP Primitive list end misaligned.\n");
+                        ret = 1;
+                        break;
+                }
+        } 
+        *buffer = buf;
+        return ret;
+}
+                       
+static __inline__ verifier_state_t
+via_check_header2( uint32_t const **buffer, const uint32_t *buf_end, 
+                   drm_via_state_t *hc_state)
+{
+        uint32_t cmd;
+        int hz_mode;
+        hazard_t hz;
+        const uint32_t *buf = *buffer;
+        const hazard_t *hz_table;
+        if ((buf_end - buf) < 2) {
+                DRM_ERROR("Illegal termination of DMA HALCYON_HEADER2 sequence.\n");
+                return state_error;
+        }
+        buf++;
+        cmd = (*buf++ & 0xFFFF0000) >> 16;
+        switch(cmd) {
+        case HC_ParaType_CmdVdata:
+                if (via_check_prim_list(&buf, buf_end, hc_state )) 
+                        return state_error;
+                *buffer = buf;
+                return state_command;
+        case HC_ParaType_NotTex:
+                hz_table = table1;
+                break;
+        case HC_ParaType_Tex:
+                hc_state->texture = 0;
+                hz_table = table2;
+                break;
+        case (HC_ParaType_Tex | (HC_SubType_Tex1 << 8)):
+                hc_state->texture = 1;
+                hz_table = table2;
+                break;
+        case (HC_ParaType_Tex | (HC_SubType_TexGeneral << 8)):
+                hz_table = table3;
+                break;
+        case HC_ParaType_Auto:
+                if (eat_words(&buf, buf_end, 2))
+                        return state_error;
+                *buffer = buf;
+                return state_command;
+        case (HC_ParaType_Palette | (HC_SubType_Stipple << 8)):
+                if (eat_words(&buf, buf_end, 32))
+                        return state_error;
+                *buffer = buf;
+                return state_command;
+        case (HC_ParaType_Palette | (HC_SubType_TexPalette0 << 8)):
+        case (HC_ParaType_Palette | (HC_SubType_TexPalette1 << 8)):
+                DRM_ERROR("Texture palettes are rejected because of "
+                          "lack of info how to determine their size.\n");
+                return state_error;
+        case (HC_ParaType_Palette | (HC_SubType_FogTable << 8)):
+                DRM_ERROR("Fog factor palettes are rejected because of "
+                          "lack of info how to determine their size.\n");
+                return state_error;
+        default:
+                /*
+                 * There are some unimplemented HC_ParaTypes here, that
+                 * need to be implemented if the Mesa driver is extended.
+                 */
+                DRM_ERROR("Invalid or unimplemented HALCYON_HEADER2 "
+                          "DMA subcommand: 0x%x. Previous dword: 0x%x\n", 
+                          cmd, *(buf -2));
+                *buffer = buf;
+                return state_error;
+        }
+        while(buf < buf_end) {
+                cmd = *buf++;
+                if ((hz = hz_table[cmd >> 24])) {
+                        if ((hz_mode = investigate_hazard(cmd, hz, hc_state))) {
+                                if (hz_mode == 1) {
+                                        buf--;
+                                        break;
+                                }
+                                return state_error;
+                        }
+                } else if (hc_state->unfinished && 
+                           finish_current_sequence(hc_state)) {
+                        return state_error;
+                }
+        }
+        if (hc_state->unfinished && finish_current_sequence(hc_state)) {
+                return state_error;
+        }
+        *buffer = buf;
+        return state_command;
+}
+static __inline__ verifier_state_t
+via_parse_header2( drm_via_private_t *dev_priv, uint32_t const **buffer, const uint32_t *buf_end,
+                   int *fire_count)
+{
+        uint32_t cmd;
+        const uint32_t *buf = *buffer;
+        const uint32_t *next_fire; 
+        int burst = 0;
+        next_fire = dev_priv->fire_offsets[*fire_count];
+        buf++;
+        cmd = (*buf & 0xFFFF0000) >> 16;
+        VIA_WRITE(HC_REG_TRANS_SET + HC_REG_BASE, *buf++);
+        switch(cmd) {
+        case HC_ParaType_CmdVdata:
+                while ((buf < buf_end) &&
+                       (*fire_count < dev_priv->num_fire_offsets) && 
+                       (*buf & HC_ACMD_MASK) == HC_ACMD_HCmdB ) {
+                        while(buf <= next_fire) {
+                                VIA_WRITE(HC_REG_TRANS_SPACE + HC_REG_BASE + (burst & 63), *buf++);
+                                burst += 4;
+                        }
+                        if ( ( buf < buf_end ) && ((*buf & HALCYON_FIREMASK) == HALCYON_FIRECMD))
+                                buf++;
+                        if (++(*fire_count) < dev_priv->num_fire_offsets) 
+                                next_fire = dev_priv->fire_offsets[*fire_count];
+                }
+                break;
+        default:
+                while(buf < buf_end) {
+                        
+                        if ( *buf == HC_HEADER2 ||
+                             (*buf & HALCYON_HEADER1MASK) == HALCYON_HEADER1  ||
+                             (*buf & VIA_VIDEOMASK) == VIA_VIDEO_HEADER5 ||
+                             (*buf & VIA_VIDEOMASK) == VIA_VIDEO_HEADER6 ) break;
+                        
+                        VIA_WRITE(HC_REG_TRANS_SPACE + HC_REG_BASE + (burst & 63), *buf++);
+                        burst +=4;
+                }
+        }
+        *buffer = buf;
+        return state_command;
+}
+static __inline__ int
+verify_mmio_address( uint32_t address)
+{
+        if ((address > 0x3FF) && (address < 0xC00 )) {
+                DRM_ERROR("Invalid VIDEO DMA command. "
+                          "Attempt to access 3D- or command burst area.\n");
+                return 1;
+        } else if ((address > 0xCFF) && (address < 0x1300)) {
+                DRM_ERROR("Invalid VIDEO DMA command. "
+                          "Attempt to access PCI DMA area.\n");
+                return 1;               
+        } else if (address > 0x13FF ) {
+                DRM_ERROR("Invalid VIDEO DMA command. "
+                          "Attempt to access VGA registers.\n");
+                return 1;
+        }
+        return 0;
+}
+static __inline__ int
+verify_video_tail( uint32_t const **buffer, const uint32_t *buf_end, uint32_t dwords) 
+{
+        const uint32_t *buf = *buffer;
+        if (buf_end - buf < dwords) {
+                DRM_ERROR("Illegal termination of video command.\n");
+                return 1;
+        }
+        while (dwords--) {
+                if (*buf++) {
+                        DRM_ERROR("Illegal video command tail.\n");
+                        return 1;
+                }
+        }
+        *buffer = buf;
+        return 0;
+}
+                
+static __inline__ verifier_state_t
+via_check_header1( uint32_t const **buffer, const uint32_t *buf_end )
+{
+        uint32_t cmd;
+        const uint32_t *buf = *buffer;
+        verifier_state_t ret = state_command;
+        while (buf < buf_end) {
+                cmd = *buf;
+                if ((cmd > ((0x3FF >> 2) | HALCYON_HEADER1)) &&
+                    (cmd < ((0xC00 >> 2) | HALCYON_HEADER1))) {                 
+                        if ((cmd & HALCYON_HEADER1MASK) != HALCYON_HEADER1) 
+                                break;
+                        DRM_ERROR("Invalid HALCYON_HEADER1 command. "
+                                  "Attempt to access 3D- or command burst area.\n");
+                        ret = state_error;
+                        break;
+                } else if (cmd > ((0xCFF >> 2) | HALCYON_HEADER1)) {
+                        if ((cmd & HALCYON_HEADER1MASK) != HALCYON_HEADER1) 
+                                break;
+                        DRM_ERROR("Invalid HALCYON_HEADER1 command. "
+                                  "Attempt to access VGA registers.\n");
+                        ret = state_error;
+                        break;                  
+                } else {                        
+                        buf += 2;
+                }
+        }
+        *buffer = buf;
+        return ret;
+}
+static __inline__ verifier_state_t
+via_parse_header1( drm_via_private_t *dev_priv, uint32_t const **buffer, const uint32_t *buf_end )
+{
+        register uint32_t cmd;
+        const uint32_t *buf = *buffer;
+        while (buf < buf_end) {
+                cmd = *buf;
+                if ((cmd & HALCYON_HEADER1MASK) != HALCYON_HEADER1) break;
+                VIA_WRITE( (cmd & ~HALCYON_HEADER1MASK) << 2, *++buf); 
+                buf++;
+        }
+        *buffer = buf;
+        return state_command;
+}
+static __inline__ verifier_state_t
+via_check_vheader5( uint32_t const **buffer, const uint32_t *buf_end )
+{
+        uint32_t data;
+        const uint32_t *buf = *buffer;
+        if (buf_end - buf < 4) {
+                DRM_ERROR("Illegal termination of video header5 command\n");
+                return state_error;
+        }
+        data = *buf++ & ~VIA_VIDEOMASK;
+        if (verify_mmio_address(data))
+                return state_error;
+        data = *buf++;
+        if (*buf++ != 0x00F50000) {
+                DRM_ERROR("Illegal header5 header data\n");
+                return state_error;
+        }
+        if (*buf++ != 0x00000000) {
+                DRM_ERROR("Illegal header5 header data\n");
+                return state_error;
+        }
+        if (eat_words(&buf, buf_end, data)) 
+                return state_error;
+        if ((data & 3) && verify_video_tail(&buf, buf_end, 4 - (data & 3))) 
+                return state_error;
+        *buffer = buf;
+        return state_command;
+               
+} 
+static __inline__ verifier_state_t
+via_parse_vheader5( drm_via_private_t *dev_priv, uint32_t const **buffer, const uint32_t *buf_end )
+{
+  uint32_t addr, count, i;
+        const uint32_t *buf = *buffer;
+        
+        addr = *buf++ & ~VIA_VIDEOMASK;
+        i = count = *buf;
+        buf += 3;
+        while(i--) {
+                VIA_WRITE(addr, *buf++);
+        }
+        if (count & 3) buf += 4 - (count & 3);
+        *buffer = buf;
+        return state_command;          
+} 
+static __inline__ verifier_state_t
+via_check_vheader6( uint32_t const **buffer, const uint32_t *buf_end )
+{
+        uint32_t data;
+        const uint32_t *buf = *buffer;
+        uint32_t i;
+        if (buf_end - buf < 4) {
+                DRM_ERROR("Illegal termination of video header6 command\n");
+                return state_error;
+        }
+        buf++;
+        data = *buf++;
+        if (*buf++ != 0x00F60000) {
+                DRM_ERROR("Illegal header6 header data\n");
+                return state_error;
+        }
+        if (*buf++ != 0x00000000) {
+                DRM_ERROR("Illegal header6 header data\n");
+                return state_error;
+        }
+        if ((buf_end - buf) < (data << 1)) {
+                DRM_ERROR("Illegal termination of video header6 command\n");
+                return state_error;
+        }
+        for (i=0; i<data; ++i) {
+                if (verify_mmio_address(*buf++))
+                        return state_error;
+                buf++;
+        }
+        data <<= 1;
+        if ((data & 3) && verify_video_tail(&buf, buf_end, 4 - (data & 3)))
+                return state_error;
+        *buffer = buf;
+        return state_command;
+} 
+static __inline__ verifier_state_t
+via_parse_vheader6( drm_via_private_t *dev_priv, uint32_t const **buffer, const uint32_t *buf_end )
+{
+  uint32_t addr, count, i;
+        const uint32_t *buf = *buffer;
+        i = count = *++buf;
+        buf += 3;
+        while(i--) {
+                addr = *buf++;
+                VIA_WRITE(addr, *buf++);
+        }
+        count <<= 1;
+        if (count & 3) buf += 4 - (count & 3);
+        *buffer = buf;
+        return state_command;
+} 
+int 
+via_verify_command_stream(const uint32_t * buf, unsigned int size, drm_device_t *dev,
+                          int agp)
+{
+        drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private;
+        drm_via_state_t *hc_state = &dev_priv->hc_state;
+        drm_via_state_t saved_state = *hc_state;
+        uint32_t cmd;
+        const uint32_t *buf_end = buf + ( size >> 2 );
+        verifier_state_t state = state_command;
+        int pro_group_a = dev_priv->pro_group_a;
+        
+        hc_state->dev = dev;
+        hc_state->unfinished = no_sequence;
+        hc_state->map_cache = NULL;
+        hc_state->agp = agp;
+        hc_state->buf_start = buf;
+        dev_priv->num_fire_offsets = 0;
+        while (buf < buf_end) {
+                switch (state) {
+                case state_header2:
+                  state = via_check_header2( &buf, buf_end, hc_state );
+                        break;
+                case state_header1:
+                        state = via_check_header1( &buf, buf_end );
+                        break;
+                case state_vheader5:
+                        state = via_check_vheader5( &buf, buf_end );
+                        break;
+                case state_vheader6:
+                        state = via_check_vheader6( &buf, buf_end );
+                        break;
+                case state_command:
+                        if (HALCYON_HEADER2 == (cmd = *buf)) 
+                                state = state_header2;
+                        else if ((cmd & HALCYON_HEADER1MASK) == HALCYON_HEADER1) 
+                                state = state_header1;
+                        else if (pro_group_a && (cmd & VIA_VIDEOMASK) == VIA_VIDEO_HEADER5)
+                                state = state_vheader5;
+                        else if (pro_group_a && (cmd & VIA_VIDEOMASK) == VIA_VIDEO_HEADER6)
+                                state = state_vheader6;
+                        else {
+                                DRM_ERROR("Invalid / Unimplemented DMA HEADER command. 0x%x\n",
+                                          cmd);
+                                state = state_error;
+                        }
+                        break;
+                case state_error:
+                default:
+                        *hc_state = saved_state;
+                        return DRM_ERR(EINVAL);                 
+                }
+        }       
+        if (state == state_error) {
+                *hc_state = saved_state;
+                return DRM_ERR(EINVAL);
+        }
+        return 0;
+}
+int 
+via_parse_command_stream(drm_device_t *dev, const uint32_t * buf, unsigned int size)
+{
+        drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private;
+        uint32_t cmd;
+        const uint32_t *buf_end = buf + ( size >> 2 );
+        verifier_state_t state = state_command;
+        int fire_count = 0;
+        
+        while (buf < buf_end) {
+                switch (state) {
+                case state_header2:
+                  state = via_parse_header2( dev_priv, &buf, buf_end, &fire_count );
+                        break;
+                case state_header1:
+                        state = via_parse_header1( dev_priv, &buf, buf_end );
+                        break;
+                case state_vheader5:
+                        state = via_parse_vheader5( dev_priv, &buf, buf_end );
+                        break;
+                case state_vheader6:
+                        state = via_parse_vheader6( dev_priv, &buf, buf_end );
+                        break;
+                case state_command:
+                        if (HALCYON_HEADER2 == (cmd = *buf)) 
+                                state = state_header2;
+                        else if ((cmd & HALCYON_HEADER1MASK) == HALCYON_HEADER1) 
+                                state = state_header1;
+                        else if ((cmd & VIA_VIDEOMASK) == VIA_VIDEO_HEADER5)
+                                state = state_vheader5;
+                        else if ((cmd & VIA_VIDEOMASK) == VIA_VIDEO_HEADER6)
+                                state = state_vheader6;
+                        else {
+                                DRM_ERROR("Invalid / Unimplemented DMA HEADER command. 0x%x\n",
+                                          cmd);
+                                state = state_error;
+                        }
+                        break;
+                case state_error:
+                default:
+                        return DRM_ERR(EINVAL);                 
+                }
+        }       
+        if (state == state_error) {
+                return DRM_ERR(EINVAL);
+        }
+        return 0;
+}
+static void 
+setup_hazard_table(hz_init_t init_table[], hazard_t table[], int size)
+{
+        int i;
+        for(i=0; i<256; ++i) {
+                table[i] = forbidden_command;
+        }
+        for(i=0; i<size; ++i) {
+                table[init_table[i].code] = init_table[i].hz;
+        }
+}
+void 
+via_init_command_verifier( void )
+{
+        setup_hazard_table(init_table1, table1, sizeof(init_table1) / sizeof(hz_init_t));
+        setup_hazard_table(init_table2, table2, sizeof(init_table2) / sizeof(hz_init_t));
+        setup_hazard_table(init_table3, table3, sizeof(init_table3) / sizeof(hz_init_t));
+}
diff --git a/drivers/char/drm/via_verifier.h b/drivers/char/drm/via_verifier.h
new file mode 100644
index 000000000000..a8e13592620f
--- /dev/null
+++ b/drivers/char/drm/via_verifier.h
@@ -0,0 +1,61 @@
+/*
+ * Copyright 2004 The Unichrome Project. All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sub license,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial portions
+ * of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
+ * THE UNICHROME PROJECT, AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ *
+ * Author: Thomas Hellstr�m 2004.
+ */
+#ifndef _VIA_VERIFIER_H_
+#define _VIA_VERIFIER_H_
+typedef enum{
+        no_sequence = 0, 
+        z_address,
+        dest_address,
+        tex_address
+}drm_via_sequence_t;
+typedef struct{
+        unsigned texture;
+        uint32_t z_addr; 
+        uint32_t d_addr; 
+        uint32_t t_addr[2][10];
+        uint32_t pitch[2][10];
+        uint32_t height[2][10];
+        uint32_t tex_level_lo[2]; 
+        uint32_t tex_level_hi[2];
+        uint32_t tex_palette_size[2];
+        drm_via_sequence_t unfinished;
+        int agp_texture;
+        int multitex;
+        drm_device_t *dev;
+        drm_map_t *map_cache;
+        uint32_t vertex_count;
+        int agp;
+        const uint32_t *buf_start;
+} drm_via_state_t;
+extern int via_verify_command_stream(const uint32_t * buf, unsigned int size, 
+                                     drm_device_t *dev, int agp);
+#endif
diff --git a/drivers/char/drm/via_video.c b/drivers/char/drm/via_video.c
new file mode 100644
index 000000000000..37a61c67b292
--- /dev/null
+++ b/drivers/char/drm/via_video.c
@@ -0,0 +1,97 @@
+/*
+ * Copyright 2005 Thomas Hellstrom. All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sub license,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial portions
+ * of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHOR(S), AND/OR THE COPYRIGHT HOLDER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ *
+ * Author: Thomas Hellstrom 2005.
+ *
+ * Video and XvMC related functions.
+ */
+#include "drmP.h"
+#include "via_drm.h"
+#include "via_drv.h"
+void
+via_init_futex(drm_via_private_t *dev_priv)
+{
+        unsigned int i;
+        DRM_DEBUG("%s\n", __FUNCTION__);
+        for (i = 0; i < VIA_NR_XVMC_LOCKS; ++i) {
+                DRM_INIT_WAITQUEUE(&(dev_priv->decoder_queue[i]));
+                XVMCLOCKPTR(dev_priv->sarea_priv, i)->lock = 0;
+        }
+}
+void
+via_cleanup_futex(drm_via_private_t *dev_priv)
+{
+}       
+void
+via_release_futex(drm_via_private_t *dev_priv, int context)
+{
+        unsigned int i;
+        volatile int *lock;
+        for (i=0; i < VIA_NR_XVMC_LOCKS; ++i) {
+                lock = (int *) XVMCLOCKPTR(dev_priv->sarea_priv, i);
+                if ( (_DRM_LOCKING_CONTEXT( *lock ) == context)) {
+                        if (_DRM_LOCK_IS_HELD( *lock ) && (*lock & _DRM_LOCK_CONT)) {
+                                DRM_WAKEUP( &(dev_priv->decoder_queue[i]));
+                        }
+                        *lock = 0;
+                }
+        }       
+}       
+int 
+via_decoder_futex(DRM_IOCTL_ARGS)
+{
+        DRM_DEVICE;
+        drm_via_futex_t fx;
+        volatile int *lock;
+        drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private;
+        drm_via_sarea_t *sAPriv = dev_priv->sarea_priv;
+        int ret = 0;
+        DRM_DEBUG("%s\n", __FUNCTION__);
+        DRM_COPY_FROM_USER_IOCTL(fx, (drm_via_futex_t *) data, sizeof(fx));
+        if (fx.lock > VIA_NR_XVMC_LOCKS)
+                return -EFAULT;
+        lock = (int *)XVMCLOCKPTR(sAPriv, fx.lock);
+        switch (fx.func) {
+        case VIA_FUTEX_WAIT:
+                DRM_WAIT_ON(ret, dev_priv->decoder_queue[fx.lock],
+                            (fx.ms / 10) * (DRM_HZ / 100), *lock != fx.val);
+                return ret;
+        case VIA_FUTEX_WAKE:
+                DRM_WAKEUP(&(dev_priv->decoder_queue[fx.lock]));
+                return 0;
+        }
+        return 0;
+}
diff --git a/drivers/ieee1394/Kconfig b/drivers/ieee1394/Kconfig
index 7d58af1ae306..25103a0ef9b3 100644
--- a/drivers/ieee1394/Kconfig
+++ b/drivers/ieee1394/Kconfig
@@ -66,6 +66,18 @@ config IEEE1394_CONFIG_ROM_IP1394
          with MacOSX and WinXP IP-over-1394), enable this option and the
          eth1394 option below.
+config IEEE1394_EXPORT_FULL_API
+        bool "Export all symbols of ieee1394's API"
+        depends on IEEE1394
+        default n
+        help
+          Export all symbols of ieee1394's driver programming interface, even
+          those that are not currently used by the standard IEEE 1394 drivers.
+          This option does not affect the interface to userspace applications.
+          Say Y here if you want to compile externally developed drivers that
+          make extended use of ieee1394's API. It is otherwise safe to say N.
 comment "Device Drivers"
        depends on IEEE1394
diff --git a/drivers/ieee1394/csr.c b/drivers/ieee1394/csr.c
index 1b98684aebcd..149573db91c5 100644
--- a/drivers/ieee1394/csr.c
+++ b/drivers/ieee1394/csr.c
@@ -28,6 +28,7 @@
 #include "hosts.h"
 #include "ieee1394.h"
 #include "highlevel.h"
+#include "ieee1394_core.h"
 /* Module Parameters */
 /* this module parameter can be used to disable mapping of the FCP registers */
@@ -232,7 +233,7 @@ static void add_host(struct hpsb_host *host)
        host->csr.generation = 2;
        bus_info[1] = __constant_cpu_to_be32(0x31333934);
-        bus_info[2] = cpu_to_be32((1 << CSR_IRMC_SHIFT) |
+        bus_info[2] = cpu_to_be32((hpsb_disable_irm ? 0 : 1 << CSR_IRMC_SHIFT) |
                                  (1 << CSR_CMC_SHIFT) |
                                  (1 << CSR_ISC_SHIFT) |
                                  (0 << CSR_BMC_SHIFT) |
diff --git a/drivers/ieee1394/csr1212.c b/drivers/ieee1394/csr1212.c
index 7c4330e2e875..61ddd5d37eff 100644
--- a/drivers/ieee1394/csr1212.c
+++ b/drivers/ieee1394/csr1212.c
@@ -209,7 +209,15 @@ void csr1212_init_local_csr(struct csr1212_csr *csr,
 {
        static const int mr_map[] = { 4, 64, 1024, 0 };
+#ifdef __KERNEL__
+        BUG_ON(max_rom & ~0x3);
        csr->max_rom = mr_map[max_rom];
+#else
+        if (max_rom & ~0x3) /* caller supplied invalid argument */
+                csr->max_rom = 0;
+        else
+                csr->max_rom = mr_map[max_rom];
+#endif
        memcpy(csr->bus_info_data, bus_info_data, csr->bus_info_len);
 }
@@ -533,12 +541,15 @@ struct csr1212_keyval *csr1212_new_icon_descriptor_leaf(u_int32_t version,
        static const int pd[4] = { 0, 4, 16, 256 };
        static const int cs[16] = { 4, 2 };
        struct csr1212_keyval *kv;
-        int palette_size = pd[palette_depth] * cs[color_space];
+        int palette_size;
        int pixel_size = (hscan * vscan + 3) & ~0x3;
-        if ((palette_depth && !palette) || !pixels)
+        if (!pixels || (!palette && palette_depth) ||
+            (palette_depth & ~0x3) || (color_space & ~0xf))
                return NULL;
+        palette_size = pd[palette_depth] * cs[color_space];
        kv = csr1212_new_descriptor_leaf(1, 0, NULL,
                                         palette_size + pixel_size +
                                         CSR1212_ICON_DESCRIPTOR_LEAF_OVERHEAD);
@@ -760,9 +771,9 @@ static int csr1212_append_new_cache(struct csr1212_csr *csr, size_t romsize)
        struct csr1212_csr_rom_cache *cache;
        u_int64_t csr_addr;
-        if (!csr || !csr->ops->allocate_addr_range ||
+        if (!csr || !csr->ops || !csr->ops->allocate_addr_range ||
-            !csr->ops->release_addr)
+            !csr->ops->release_addr || csr->max_rom < 1)
-                return CSR1212_ENOMEM;
+                return CSR1212_EINVAL;
        /* ROM size must be a multiple of csr->max_rom */
        romsize = (romsize + (csr->max_rom - 1)) & ~(csr->max_rom - 1);
@@ -1145,6 +1156,8 @@ int csr1212_generate_csr_image(struct csr1212_csr *csr)
                        /* Make sure the Extended ROM leaf is a multiple of
                         * max_rom in size. */
+                        if (csr->max_rom < 1)
+                                return CSR1212_EINVAL;
                        leaf_size = (cache->len + (csr->max_rom - 1)) &
                                ~(csr->max_rom - 1);
@@ -1409,7 +1422,7 @@ int _csr1212_read_keyval(struct csr1212_csr *csr, struct csr1212_keyval *kv)
        u_int32_t *cache_ptr;
        u_int16_t kv_len = 0;
-        if (!csr || !kv)
+        if (!csr || !kv || csr->max_rom < 1)
                return CSR1212_EINVAL;
        /* First find which cache the data should be in (or go in if not read
@@ -1572,7 +1585,7 @@ int csr1212_parse_csr(struct csr1212_csr *csr)
        struct csr1212_dentry *dentry;
        int ret;
-        if (!csr || !csr->ops->bus_read)
+        if (!csr || !csr->ops || !csr->ops->bus_read)
                return CSR1212_EINVAL;
        ret = csr1212_parse_bus_info_block(csr);
@@ -1581,9 +1594,13 @@ int csr1212_parse_csr(struct csr1212_csr *csr)
        if (!csr->ops->get_max_rom)
                csr->max_rom = mr_map[0];       /* default value */
-        else
+        else {
-                csr->max_rom = mr_map[csr->ops->get_max_rom(csr->bus_info_data,
+                int i = csr->ops->get_max_rom(csr->bus_info_data,
-                                                            csr->private)];
+                                              csr->private);
+                if (i & ~0x3)
+                        return CSR1212_EINVAL;
+                csr->max_rom = mr_map[i];
+        }
        csr->cache_head->layout_head = csr->root_kv;
        csr->cache_head->layout_tail = csr->root_kv;
diff --git a/drivers/ieee1394/dma.c b/drivers/ieee1394/dma.c
index 758819d1999d..b79ddb43e746 100644
--- a/drivers/ieee1394/dma.c
+++ b/drivers/ieee1394/dma.c
@@ -158,7 +158,7 @@ static inline int dma_region_find(struct dma_region *dma, unsigned long offset,
 dma_addr_t dma_region_offset_to_bus(struct dma_region *dma, unsigned long offset)
 {
-        unsigned long rem;
+        unsigned long rem = 0;
        struct scatterlist *sg = &dma->sglist[dma_region_find(dma, offset, &rem)];
        return sg_dma_address(sg) + rem;
diff --git a/drivers/ieee1394/eth1394.c b/drivers/ieee1394/eth1394.c
index 654da76bf811..cd53c174ced1 100644
--- a/drivers/ieee1394/eth1394.c
+++ b/drivers/ieee1394/eth1394.c
@@ -89,7 +89,7 @@
 #define TRACE() printk(KERN_ERR "%s:%s[%d] ---- TRACE\n", driver_name, __FUNCTION__, __LINE__)
 static char version[] __devinitdata =
-        "$Rev: 1247 $ Ben Collins <bcollins@debian.org>";
+        "$Rev: 1264 $ Ben Collins <bcollins@debian.org>";
 struct fragment_info {
        struct list_head list;
@@ -706,7 +706,7 @@ static void ether1394_host_reset (struct hpsb_host *host)
                return;
        dev = hi->dev;
-        priv = netdev_priv(dev);
+        priv = (struct eth1394_priv *)netdev_priv(dev);
        /* Reset our private host data, but not our mtu */
        netif_stop_queue (dev);
@@ -1770,7 +1770,7 @@ fail:
 static void ether1394_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
 {
        strcpy (info->driver, driver_name);
-        strcpy (info->version, "$Rev: 1247 $");
+        strcpy (info->version, "$Rev: 1264 $");
        /* FIXME XXX provide sane businfo */
        strcpy (info->bus_info, "ieee1394");
 }
diff --git a/drivers/ieee1394/ieee1394_core.c b/drivers/ieee1394/ieee1394_core.c
index 629070b83a33..b248d89de8b4 100644
--- a/drivers/ieee1394/ieee1394_core.c
+++ b/drivers/ieee1394/ieee1394_core.c
@@ -52,7 +52,7 @@
 /*
 * Disable the nodemgr detection and config rom reading functionality.
 */
-static int disable_nodemgr = 0;
+static int disable_nodemgr;
 module_param(disable_nodemgr, int, 0444);
 MODULE_PARM_DESC(disable_nodemgr, "Disable nodemgr functionality.");
@@ -520,6 +520,9 @@ int hpsb_send_packet(struct hpsb_packet *packet)
        if (!packet->no_waiter || packet->expect_response) {
                atomic_inc(&packet->refcnt);
+                /* Set the initial "sendtime" to 10 seconds from now, to
+                   prevent premature expiry.  If a packet takes more than
+                   10 seconds to hit the wire, we have bigger problems :) */
                packet->sendtime = jiffies + 10 * HZ;
                skb_queue_tail(&host->pending_packet_queue, packet->skb);
        }
@@ -1223,9 +1226,7 @@ EXPORT_SYMBOL(hpsb_protocol_class);
 EXPORT_SYMBOL(hpsb_set_packet_complete_task);
 EXPORT_SYMBOL(hpsb_alloc_packet);
 EXPORT_SYMBOL(hpsb_free_packet);
-EXPORT_SYMBOL(hpsb_send_phy_config);
 EXPORT_SYMBOL(hpsb_send_packet);
-EXPORT_SYMBOL(hpsb_send_packet_and_wait);
 EXPORT_SYMBOL(hpsb_reset_bus);
 EXPORT_SYMBOL(hpsb_bus_reset);
 EXPORT_SYMBOL(hpsb_selfid_received);
@@ -1233,6 +1234,10 @@ EXPORT_SYMBOL(hpsb_selfid_complete);
 EXPORT_SYMBOL(hpsb_packet_sent);
 EXPORT_SYMBOL(hpsb_packet_received);
 EXPORT_SYMBOL_GPL(hpsb_disable_irm);
+#ifdef CONFIG_IEEE1394_EXPORT_FULL_API
+EXPORT_SYMBOL(hpsb_send_phy_config);
+EXPORT_SYMBOL(hpsb_send_packet_and_wait);
+#endif
 /** ieee1394_transactions.c **/
 EXPORT_SYMBOL(hpsb_get_tlabel);
@@ -1262,9 +1267,11 @@ EXPORT_SYMBOL(hpsb_destroy_hostinfo);
 EXPORT_SYMBOL(hpsb_set_hostinfo_key);
 EXPORT_SYMBOL(hpsb_get_hostinfo_bykey);
 EXPORT_SYMBOL(hpsb_set_hostinfo);
+EXPORT_SYMBOL(highlevel_host_reset);
+#ifdef CONFIG_IEEE1394_EXPORT_FULL_API
 EXPORT_SYMBOL(highlevel_add_host);
 EXPORT_SYMBOL(highlevel_remove_host);
-EXPORT_SYMBOL(highlevel_host_reset);
+#endif
 /** nodemgr.c **/
 EXPORT_SYMBOL(hpsb_node_fill_packet);
@@ -1272,7 +1279,9 @@ EXPORT_SYMBOL(hpsb_node_write);
 EXPORT_SYMBOL(hpsb_register_protocol);
 EXPORT_SYMBOL(hpsb_unregister_protocol);
 EXPORT_SYMBOL(ieee1394_bus_type);
+#ifdef CONFIG_IEEE1394_EXPORT_FULL_API
 EXPORT_SYMBOL(nodemgr_for_each_host);
+#endif
 /** csr.c **/
 EXPORT_SYMBOL(hpsb_update_config_rom);
@@ -1309,19 +1318,21 @@ EXPORT_SYMBOL(hpsb_iso_wake);
 EXPORT_SYMBOL(hpsb_iso_recv_flush);
 /** csr1212.c **/
-EXPORT_SYMBOL(csr1212_create_csr);
-EXPORT_SYMBOL(csr1212_init_local_csr);
-EXPORT_SYMBOL(csr1212_new_immediate);
 EXPORT_SYMBOL(csr1212_new_directory);
-EXPORT_SYMBOL(csr1212_associate_keyval);
 EXPORT_SYMBOL(csr1212_attach_keyval_to_directory);
-EXPORT_SYMBOL(csr1212_new_string_descriptor_leaf);
 EXPORT_SYMBOL(csr1212_detach_keyval_from_directory);
 EXPORT_SYMBOL(csr1212_release_keyval);
-EXPORT_SYMBOL(csr1212_destroy_csr);
 EXPORT_SYMBOL(csr1212_read);
-EXPORT_SYMBOL(csr1212_generate_csr_image);
 EXPORT_SYMBOL(csr1212_parse_keyval);
-EXPORT_SYMBOL(csr1212_parse_csr);
 EXPORT_SYMBOL(_csr1212_read_keyval);
 EXPORT_SYMBOL(_csr1212_destroy_keyval);
+#ifdef CONFIG_IEEE1394_EXPORT_FULL_API
+EXPORT_SYMBOL(csr1212_create_csr);
+EXPORT_SYMBOL(csr1212_init_local_csr);
+EXPORT_SYMBOL(csr1212_new_immediate);
+EXPORT_SYMBOL(csr1212_associate_keyval);
+EXPORT_SYMBOL(csr1212_new_string_descriptor_leaf);
+EXPORT_SYMBOL(csr1212_destroy_csr);
+EXPORT_SYMBOL(csr1212_generate_csr_image);
+EXPORT_SYMBOL(csr1212_parse_csr);
+#endif
diff --git a/drivers/ieee1394/iso.c b/drivers/ieee1394/iso.c
index f05759107f7e..615541b8b90f 100644
--- a/drivers/ieee1394/iso.c
+++ b/drivers/ieee1394/iso.c
@@ -62,10 +62,10 @@ static struct hpsb_iso* hpsb_iso_common_init(struct hpsb_host *host, enum hpsb_i
        if ((dma_mode < HPSB_ISO_DMA_DEFAULT) || (dma_mode > HPSB_ISO_DMA_PACKET_PER_BUFFER))
                dma_mode=HPSB_ISO_DMA_DEFAULT;
+        if ((irq_interval < 0) || (irq_interval > buf_packets / 4))
+                irq_interval = buf_packets / 4;
        if (irq_interval == 0)     /* really interrupt for each packet*/
                irq_interval = 1;
-        else if ((irq_interval < 0) || (irq_interval > buf_packets / 4))
-                irq_interval = buf_packets / 4;
        if (channel < -1 || channel >= 64)
                return NULL;
@@ -106,6 +106,7 @@ static struct hpsb_iso* hpsb_iso_common_init(struct hpsb_host *host, enum hpsb_i
        }
        atomic_set(&iso->overflows, 0);
+        iso->bytes_discarded = 0;
        iso->flags = 0;
        iso->prebuffer = 0;
@@ -241,12 +242,12 @@ int hpsb_iso_xmit_start(struct hpsb_iso *iso, int cycle, int prebuffer)
        iso->xmit_cycle = cycle;
        if (prebuffer < 0)
-                prebuffer = iso->buf_packets;
+                prebuffer = iso->buf_packets - 1;
        else if (prebuffer == 0)
                prebuffer = 1;
-        if (prebuffer > iso->buf_packets)
+        if (prebuffer >= iso->buf_packets)
-                prebuffer = iso->buf_packets;
+                prebuffer = iso->buf_packets - 1;
        iso->prebuffer = prebuffer;
@@ -395,7 +396,7 @@ void hpsb_iso_packet_sent(struct hpsb_iso *iso, int cycle, int error)
 }
 void hpsb_iso_packet_received(struct hpsb_iso *iso, u32 offset, u16 len,
-                              u16 cycle, u8 channel, u8 tag, u8 sy)
+                              u16 total_len, u16 cycle, u8 channel, u8 tag, u8 sy)
 {
        unsigned long flags;
        spin_lock_irqsave(&iso->lock, flags);
@@ -403,10 +404,13 @@ void hpsb_iso_packet_received(struct hpsb_iso *iso, u32 offset, u16 len,
        if (iso->n_ready_packets == iso->buf_packets) {
                /* overflow! */
                atomic_inc(&iso->overflows);
+                /* Record size of this discarded packet */
+                iso->bytes_discarded += total_len;
        } else {
                struct hpsb_iso_packet_info *info = &iso->infos[iso->pkt_dma];
                info->offset = offset;
                info->len = len;
+                info->total_len = total_len;
                info->cycle = cycle;
                info->channel = channel;
                info->tag = tag;
@@ -437,6 +441,17 @@ int hpsb_iso_recv_release_packets(struct hpsb_iso *iso, unsigned int n_packets)
                iso->first_packet = (iso->first_packet+1) % iso->buf_packets;
                iso->n_ready_packets--;
+                /* release memory from packets discarded when queue was full  */
+                if (iso->n_ready_packets == 0) { /* Release only after all prior packets handled */
+                        if (iso->bytes_discarded != 0) {
+                                struct hpsb_iso_packet_info inf;
+                                inf.total_len = iso->bytes_discarded;
+                                iso->host->driver->isoctl(iso, RECV_RELEASE,
+                                                        (unsigned long) &inf);
+                                iso->bytes_discarded = 0;
+                        }
+                }
        }
        spin_unlock_irqrestore(&iso->lock, flags);
        return rv;
diff --git a/drivers/ieee1394/iso.h b/drivers/ieee1394/iso.h
index fb654d9639a7..3efc60b33a88 100644
--- a/drivers/ieee1394/iso.h
+++ b/drivers/ieee1394/iso.h
@@ -47,6 +47,14 @@ struct hpsb_iso_packet_info {
        /* 2-bit 'tag' and 4-bit 'sy' fields of the isochronous header */
        __u8 tag;
        __u8 sy;
+        /*
+         * length in bytes of the packet including header/trailer.
+         * MUST be at structure end, since the first part of this structure is also 
+         * defined in raw1394.h (i.e. struct raw1394_iso_packet_info), is copied to 
+         * userspace and is accessed there through libraw1394. 
+         */
+        __u16 total_len;
 };
 enum hpsb_iso_type { HPSB_ISO_RECV = 0, HPSB_ISO_XMIT = 1 };
@@ -111,6 +119,9 @@ struct hpsb_iso {
        /* how many times the buffer has overflowed or underflowed */
        atomic_t overflows;
+        /* Current number of bytes lost in discarded packets */
+        int bytes_discarded;
        /* private flags to track initialization progress */
 #define HPSB_ISO_DRIVER_INIT     (1<<0)
 #define HPSB_ISO_DRIVER_STARTED  (1<<1)
@@ -193,7 +204,7 @@ void hpsb_iso_packet_sent(struct hpsb_iso *iso, int cycle, int error);
 /* call after a packet has been received (interrupt context OK) */
 void hpsb_iso_packet_received(struct hpsb_iso *iso, u32 offset, u16 len,
-                              u16 cycle, u8 channel, u8 tag, u8 sy);
+                              u16 total_len, u16 cycle, u8 channel, u8 tag, u8 sy);
 /* call to wake waiting processes after buffer space has opened up. */
 void hpsb_iso_wake(struct hpsb_iso *iso);
diff --git a/drivers/ieee1394/nodemgr.c b/drivers/ieee1394/nodemgr.c
index 9a46c3b44bf8..bebcc47ab06c 100644
--- a/drivers/ieee1394/nodemgr.c
+++ b/drivers/ieee1394/nodemgr.c
@@ -30,7 +30,7 @@
 #include "csr.h"
 #include "nodemgr.h"
-static int ignore_drivers = 0;
+static int ignore_drivers;
 module_param(ignore_drivers, int, 0444);
 MODULE_PARM_DESC(ignore_drivers, "Disable automatic probing for drivers.");
diff --git a/drivers/ieee1394/ohci1394.c b/drivers/ieee1394/ohci1394.c
index b3d3d22fde64..a485f47bb21e 100644
--- a/drivers/ieee1394/ohci1394.c
+++ b/drivers/ieee1394/ohci1394.c
@@ -162,7 +162,7 @@ printk(level "%s: " fmt "\n" , OHCI1394_DRIVER_NAME , ## args)
 printk(level "%s: fw-host%d: " fmt "\n" , OHCI1394_DRIVER_NAME, ohci->host->id , ## args)
 static char version[] __devinitdata =
-        "$Rev: 1250 $ Ben Collins <bcollins@debian.org>";
+        "$Rev: 1299 $ Ben Collins <bcollins@debian.org>";
 /* Module Parameters */
 static int phys_dma = 1;
@@ -483,7 +483,9 @@ static void ohci_initialize(struct ti_ohci *ohci)
        /* Put some defaults to these undefined bus options */
        buf = reg_read(ohci, OHCI1394_BusOptions);
        buf |=  0x60000000; /* Enable CMC and ISC */
-        if (!hpsb_disable_irm)
+        if (hpsb_disable_irm)
+                buf &= ~0x80000000;
+        else
                buf |=  0x80000000; /* Enable IRMC */
        buf &= ~0x00ff0000; /* XXX: Set cyc_clk_acc to zero for now */
        buf &= ~0x18000000; /* Disable PMC and BMC */
@@ -503,8 +505,12 @@ static void ohci_initialize(struct ti_ohci *ohci)
        reg_write(ohci, OHCI1394_LinkControlSet,
                  OHCI1394_LinkControl_CycleTimerEnable |
                  OHCI1394_LinkControl_CycleMaster);
-        set_phy_reg_mask(ohci, 4, PHY_04_LCTRL |
+        i = get_phy_reg(ohci, 4) | PHY_04_LCTRL;
-                         (hpsb_disable_irm ? 0 : PHY_04_CONTENDER));
+        if (hpsb_disable_irm)
+                i &= ~PHY_04_CONTENDER;
+        else
+                i |= PHY_04_CONTENDER;
+        set_phy_reg(ohci, 4, i);
        /* Set up self-id dma buffer */
        reg_write(ohci, OHCI1394_SelfIDBuffer, ohci->selfid_buf_bus);
@@ -1566,6 +1572,10 @@ static void ohci_iso_recv_release_block(struct ohci_iso_recv *recv, int block)
        struct dma_cmd *next = &recv->block[next_i];
        struct dma_cmd *prev = &recv->block[prev_i];
+        
+        /* ignore out-of-range requests */
+        if ((block < 0) || (block > recv->nblocks))
+                return;
        /* 'next' becomes the new end of the DMA chain,
           so disable branch and enable interrupt */
@@ -1593,19 +1603,8 @@ static void ohci_iso_recv_release_block(struct ohci_iso_recv *recv, int block)
 static void ohci_iso_recv_bufferfill_release(struct ohci_iso_recv *recv,
                                             struct hpsb_iso_packet_info *info)
 {
-        int len;
        /* release the memory where the packet was */
-        len = info->len;
+        recv->released_bytes += info->total_len;
-        /* add the wasted space for padding to 4 bytes */
-        if (len % 4)
-                len += 4 - (len % 4);
-        /* add 8 bytes for the OHCI DMA data format overhead */
-        len += 8;
-        recv->released_bytes += len;
        /* have we released enough memory for one block? */
        while (recv->released_bytes > recv->buf_stride) {
@@ -1637,7 +1636,7 @@ static void ohci_iso_recv_bufferfill_parse(struct hpsb_iso *iso, struct ohci_iso
                /* note: packet layout is as shown in section 10.6.1.1 of the OHCI spec */
                unsigned int offset;
-                unsigned short len, cycle;
+                unsigned short len, cycle, total_len;
                unsigned char channel, tag, sy;
                unsigned char *p = iso->data_buf.kvirt;
@@ -1688,9 +1687,11 @@ static void ohci_iso_recv_bufferfill_parse(struct hpsb_iso *iso, struct ohci_iso
                /* advance to xferStatus/timeStamp */
                recv->dma_offset += len;
+                total_len = len + 8; /* 8 bytes header+trailer in OHCI packet */
                /* payload is padded to 4 bytes */
                if (len % 4) {
                        recv->dma_offset += 4 - (len%4);
+                        total_len += 4 - (len%4);
                }
                /* check for wrap-around */
@@ -1724,7 +1725,7 @@ static void ohci_iso_recv_bufferfill_parse(struct hpsb_iso *iso, struct ohci_iso
                        recv->dma_offset -= recv->buf_stride*recv->nblocks;
                }
-                hpsb_iso_packet_received(iso, offset, len, cycle, channel, tag, sy);
+                hpsb_iso_packet_received(iso, offset, len, total_len, cycle, channel, tag, sy);
        }
        if (wake)
@@ -1850,7 +1851,8 @@ static void ohci_iso_recv_packetperbuf_task(struct hpsb_iso *iso, struct ohci_is
                        tag = hdr[5] >> 6;
                        sy = hdr[4] & 0xF;
-                        hpsb_iso_packet_received(iso, offset, packet_len, cycle, channel, tag, sy);
+                        hpsb_iso_packet_received(iso, offset, packet_len,
+                                        recv->buf_stride, cycle, channel, tag, sy);
                }
                /* reset the DMA descriptor */
diff --git a/drivers/ieee1394/pcilynx.c b/drivers/ieee1394/pcilynx.c
index bdb3a85cafa6..36074e6eeebb 100644
--- a/drivers/ieee1394/pcilynx.c
+++ b/drivers/ieee1394/pcilynx.c
@@ -76,7 +76,7 @@
 /* Module Parameters */
-static int skip_eeprom = 0;
+static int skip_eeprom;
 module_param(skip_eeprom, int, 0444);
 MODULE_PARM_DESC(skip_eeprom, "Use generic bus info block instead of serial eeprom (default = 0).");
@@ -1422,7 +1422,7 @@ static int __devinit add_card(struct pci_dev *dev,
                i = get_phy_reg(lynx, 4);
                i |= PHY_04_LCTRL;
                if (hpsb_disable_irm)
-                        i &= !PHY_04_CONTENDER;
+                        i &= ~PHY_04_CONTENDER;
                else
                        i |= PHY_04_CONTENDER;
                if (i != -1) set_phy_reg(lynx, 4, i);
diff --git a/drivers/ieee1394/raw1394.c b/drivers/ieee1394/raw1394.c
index 7419af450bd1..b4fa14793fe5 100644
--- a/drivers/ieee1394/raw1394.c
+++ b/drivers/ieee1394/raw1394.c
@@ -98,7 +98,7 @@ static struct hpsb_address_ops arm_ops = {
 static void queue_complete_cb(struct pending_request *req);
-static struct pending_request *__alloc_pending_request(int flags)
+static struct pending_request *__alloc_pending_request(unsigned int __nocast flags)
 {
        struct pending_request *req;
@@ -2506,9 +2506,12 @@ static int raw1394_iso_send_packets(struct file_info *fi, void __user * uaddr)
        if (copy_from_user(&upackets, uaddr, sizeof(upackets)))
                return -EFAULT;
-        if (upackets.n_packets > hpsb_iso_n_ready(fi->iso_handle))
+        if (upackets.n_packets >= fi->iso_handle->buf_packets)
                return -EINVAL;
+        if (upackets.n_packets >= hpsb_iso_n_ready(fi->iso_handle))
+                return -EAGAIN;
        /* ensure user-supplied buffer is accessible and big enough */
        if (!access_ok(VERIFY_READ, upackets.infos,
                        upackets.n_packets *
diff --git a/drivers/ieee1394/sbp2.c b/drivers/ieee1394/sbp2.c
index 32368f3428ec..fe3e1703fa61 100644
--- a/drivers/ieee1394/sbp2.c
+++ b/drivers/ieee1394/sbp2.c
@@ -81,7 +81,7 @@
 #include "sbp2.h"
 static char version[] __devinitdata =
-        "$Rev: 1219 $ Ben Collins <bcollins@debian.org>";
+        "$Rev: 1306 $ Ben Collins <bcollins@debian.org>";
 /*
 * Module load parameter definitions
@@ -104,7 +104,7 @@ MODULE_PARM_DESC(max_speed, "Force max speed (3 = 800mb, 2 = 400mb default, 1 =
 * down to us at a time (debugging). This might be necessary for very
 * badly behaved sbp2 devices.
 */
-static int serialize_io = 0;
+static int serialize_io;
 module_param(serialize_io, int, 0444);
 MODULE_PARM_DESC(serialize_io, "Serialize all I/O coming down from the scsi drivers (default = 0)");
@@ -145,7 +145,7 @@ MODULE_PARM_DESC(exclusive_login, "Exclusive login to sbp2 device (default = 1)"
 * please submit the logged sbp2_firmware_revision value of this device to
 * the linux1394-devel mailing list.
 */
-static int force_inquiry_hack = 0;
+static int force_inquiry_hack;
 module_param(force_inquiry_hack, int, 0444);
 MODULE_PARM_DESC(force_inquiry_hack, "Force SCSI inquiry hack (default = 0)");
@@ -2112,6 +2112,102 @@ static int sbp2_send_command(struct scsi_id_instance_data *scsi_id,
 */
 static void sbp2_check_sbp2_command(struct scsi_id_instance_data *scsi_id, unchar *cmd)
 {
+        unchar new_cmd[16];
+        u8 device_type = SBP2_DEVICE_TYPE (scsi_id->sbp2_device_type_and_lun);
+        SBP2_DEBUG("sbp2_check_sbp2_command");
+        switch (*cmd) {
+                case READ_6:
+                        if (sbp2_command_conversion_device_type(device_type)) {
+                                SBP2_DEBUG("Convert READ_6 to READ_10");
+                                /*
+                                 * Need to turn read_6 into read_10
+                                 */
+                                new_cmd[0] = 0x28;
+                                new_cmd[1] = (cmd[1] & 0xe0);
+                                new_cmd[2] = 0x0;
+                                new_cmd[3] = (cmd[1] & 0x1f);
+                                new_cmd[4] = cmd[2];
+                                new_cmd[5] = cmd[3];
+                                new_cmd[6] = 0x0;
+                                new_cmd[7] = 0x0;
+                                new_cmd[8] = cmd[4];
+                                new_cmd[9] = cmd[5];
+                                memcpy(cmd, new_cmd, 10);
+                        }
+                        break;
+                case WRITE_6:
+                        if (sbp2_command_conversion_device_type(device_type)) {
+                                SBP2_DEBUG("Convert WRITE_6 to WRITE_10");
+                                /*
+                                 * Need to turn write_6 into write_10
+                                 */
+                                new_cmd[0] = 0x2a;
+                                new_cmd[1] = (cmd[1] & 0xe0);
+                                new_cmd[2] = 0x0;
+                                new_cmd[3] = (cmd[1] & 0x1f);
+                                new_cmd[4] = cmd[2];
+                                new_cmd[5] = cmd[3];
+                                new_cmd[6] = 0x0;
+                                new_cmd[7] = 0x0;
+                                new_cmd[8] = cmd[4];
+                                new_cmd[9] = cmd[5];
+                                memcpy(cmd, new_cmd, 10);
+                        }
+                        break;
+                case MODE_SENSE:
+                        if (sbp2_command_conversion_device_type(device_type)) {
+                                SBP2_DEBUG("Convert MODE_SENSE_6 to MODE_SENSE_10");
+                                /*
+                                 * Need to turn mode_sense_6 into mode_sense_10
+                                 */
+                                new_cmd[0] = 0x5a;
+                                new_cmd[1] = cmd[1];
+                                new_cmd[2] = cmd[2];
+                                new_cmd[3] = 0x0;
+                                new_cmd[4] = 0x0;
+                                new_cmd[5] = 0x0;
+                                new_cmd[6] = 0x0;
+                                new_cmd[7] = 0x0;
+                                new_cmd[8] = cmd[4];
+                                new_cmd[9] = cmd[5];
+                                memcpy(cmd, new_cmd, 10);
+                        }
+                        break;
+                case MODE_SELECT:
+                        /*
+                         * TODO. Probably need to change mode select to 10 byte version
+                         */
+                default:
+                        break;
+        }
+        return;
 }
 /*
@@ -2152,6 +2248,7 @@ static void sbp2_check_sbp2_response(struct scsi_id_instance_data *scsi_id,
                                     struct scsi_cmnd *SCpnt)
 {
        u8 *scsi_buf = SCpnt->request_buffer;
+        u8 device_type = SBP2_DEVICE_TYPE (scsi_id->sbp2_device_type_and_lun);
        SBP2_DEBUG("sbp2_check_sbp2_response");
@@ -2176,6 +2273,14 @@ static void sbp2_check_sbp2_response(struct scsi_id_instance_data *scsi_id,
                        }
                        /*
+                         * Check for Simple Direct Access Device and change it to TYPE_DISK
+                         */
+                        if ((scsi_buf[0] & 0x1f) == TYPE_RBC) {
+                                SBP2_DEBUG("Changing TYPE_RBC to TYPE_DISK");
+                                scsi_buf[0] &= 0xe0;
+                        }
+                        /*
                         * Fix ansi revision and response data format
                         */
                        scsi_buf[2] |= 2;
@@ -2183,6 +2288,27 @@ static void sbp2_check_sbp2_response(struct scsi_id_instance_data *scsi_id,
                        break;
+                case MODE_SENSE:
+                        if (sbp2_command_conversion_device_type(device_type)) {
+                                SBP2_DEBUG("Modify mode sense response (10 byte version)");
+                                scsi_buf[0] = scsi_buf[1];      /* Mode data length */
+                                scsi_buf[1] = scsi_buf[2];      /* Medium type */
+                                scsi_buf[2] = scsi_buf[3];      /* Device specific parameter */
+                                scsi_buf[3] = scsi_buf[7];      /* Block descriptor length */
+                                memcpy(scsi_buf + 4, scsi_buf + 8, scsi_buf[0]);
+                        }
+                        break;
+                case MODE_SELECT:
+                        /*
+                         * TODO. Probably need to change mode select to 10 byte version
+                         */
                default:
                        break;
        }
@@ -2559,8 +2685,7 @@ static void sbp2scsi_complete_command(struct scsi_id_instance_data *scsi_id,
 static int sbp2scsi_slave_configure (struct scsi_device *sdev)
 {
        blk_queue_dma_alignment(sdev->request_queue, (512 - 1));
-        sdev->use_10_for_rw = 1;
-        sdev->use_10_for_ms = 1;
        return 0;
 }
diff --git a/drivers/isdn/hisax/isdnl1.c b/drivers/isdn/hisax/isdnl1.c
index ac899503a74f..bab356886483 100644
--- a/drivers/isdn/hisax/isdnl1.c
+++ b/drivers/isdn/hisax/isdnl1.c
@@ -279,7 +279,8 @@ BChannel_proc_xmt(struct BCState *bcs)
        if (test_and_clear_bit(FLG_L1_PULL_REQ, &st->l1.Flags))
                st->l1.l1l2(st, PH_PULL | CONFIRM, NULL);
        if (!test_bit(BC_FLG_ACTIV, &bcs->Flag)) {
-                if (!test_bit(BC_FLG_BUSY, &bcs->Flag) && (!skb_queue_len(&bcs->squeue))) {
+                if (!test_bit(BC_FLG_BUSY, &bcs->Flag) &&
+                    skb_queue_empty(&bcs->squeue)) {
                        st->l2.l2l1(st, PH_DEACTIVATE | CONFIRM, NULL);
                }
        }
diff --git a/drivers/isdn/hisax/isdnl2.c b/drivers/isdn/hisax/isdnl2.c
index 9022583fd6a0..1615c1a76ab8 100644
--- a/drivers/isdn/hisax/isdnl2.c
+++ b/drivers/isdn/hisax/isdnl2.c
@@ -108,7 +108,8 @@ static int l2addrsize(struct Layer2 *l2);
 static void
 set_peer_busy(struct Layer2 *l2) {
        test_and_set_bit(FLG_PEER_BUSY, &l2->flag);
-        if (skb_queue_len(&l2->i_queue) || skb_queue_len(&l2->ui_queue))
+        if (!skb_queue_empty(&l2->i_queue) ||
+            !skb_queue_empty(&l2->ui_queue))
                test_and_set_bit(FLG_L2BLOCK, &l2->flag);
 }
@@ -754,7 +755,7 @@ l2_restart_multi(struct FsmInst *fi, int event, void *arg)
                st->l2.l2l3(st, DL_ESTABLISH | INDICATION, NULL);
        if ((ST_L2_7==state) || (ST_L2_8 == state))
-                if (skb_queue_len(&st->l2.i_queue) && cansend(st))
+                if (!skb_queue_empty(&st->l2.i_queue) && cansend(st))
                        st->l2.l2l1(st, PH_PULL | REQUEST, NULL);
 }
@@ -810,7 +811,7 @@ l2_connected(struct FsmInst *fi, int event, void *arg)
        if (pr != -1)
                st->l2.l2l3(st, pr, NULL);
-        if (skb_queue_len(&st->l2.i_queue) && cansend(st))
+        if (!skb_queue_empty(&st->l2.i_queue) && cansend(st))
                st->l2.l2l1(st, PH_PULL | REQUEST, NULL);
 }
@@ -1014,7 +1015,7 @@ l2_st7_got_super(struct FsmInst *fi, int event, void *arg)
                        if(typ != RR) FsmDelTimer(&st->l2.t203, 9);
                        restart_t200(st, 12);
                }
-                if (skb_queue_len(&st->l2.i_queue) && (typ == RR))
+                if (!skb_queue_empty(&st->l2.i_queue) && (typ == RR))
                        st->l2.l2l1(st, PH_PULL | REQUEST, NULL);
        } else
                nrerrorrecovery(fi);
@@ -1120,7 +1121,7 @@ l2_got_iframe(struct FsmInst *fi, int event, void *arg)
                return;
        }
-        if (skb_queue_len(&st->l2.i_queue) && (fi->state == ST_L2_7))
+        if (!skb_queue_empty(&st->l2.i_queue) && (fi->state == ST_L2_7))
                st->l2.l2l1(st, PH_PULL | REQUEST, NULL);
        if (test_and_clear_bit(FLG_ACK_PEND, &st->l2.flag))
                enquiry_cr(st, RR, RSP, 0);
@@ -1138,7 +1139,7 @@ l2_got_tei(struct FsmInst *fi, int event, void *arg)
                test_and_set_bit(FLG_L3_INIT, &st->l2.flag);
        } else
                FsmChangeState(fi, ST_L2_4);
-        if (skb_queue_len(&st->l2.ui_queue))
+        if (!skb_queue_empty(&st->l2.ui_queue))
                tx_ui(st);
 }
@@ -1301,7 +1302,7 @@ l2_pull_iqueue(struct FsmInst *fi, int event, void *arg)
                FsmDelTimer(&st->l2.t203, 13);
                FsmAddTimer(&st->l2.t200, st->l2.T200, EV_L2_T200, NULL, 11);
        }
-        if (skb_queue_len(&l2->i_queue) && cansend(st))
+        if (!skb_queue_empty(&l2->i_queue) && cansend(st))
                st->l2.l2l1(st, PH_PULL | REQUEST, NULL);
 }
@@ -1347,7 +1348,7 @@ l2_st8_got_super(struct FsmInst *fi, int event, void *arg)
                        }
                        invoke_retransmission(st, nr);
                        FsmChangeState(fi, ST_L2_7);
-                        if (skb_queue_len(&l2->i_queue) && cansend(st))
+                        if (!skb_queue_empty(&l2->i_queue) && cansend(st))
                                st->l2.l2l1(st, PH_PULL | REQUEST, NULL);
                } else
                        nrerrorrecovery(fi);
diff --git a/drivers/isdn/hisax/isdnl3.c b/drivers/isdn/hisax/isdnl3.c
index abcc9530eb34..c9917cd2132b 100644
--- a/drivers/isdn/hisax/isdnl3.c
+++ b/drivers/isdn/hisax/isdnl3.c
@@ -302,7 +302,7 @@ release_l3_process(struct l3_process *p)
                                !test_bit(FLG_PTP, &p->st->l2.flag)) {
                                if (p->debug)
                                        l3_debug(p->st, "release_l3_process: last process");
-                                if (!skb_queue_len(&p->st->l3.squeue)) {
+                                if (skb_queue_empty(&p->st->l3.squeue)) {
                                        if (p->debug)
                                                l3_debug(p->st, "release_l3_process: release link");
                                        if (p->st->protocol != ISDN_PTYPE_NI1)
diff --git a/drivers/isdn/i4l/isdn_tty.c b/drivers/isdn/i4l/isdn_tty.c
index ad5aa38fb5a6..b37ef1f06b3d 100644
--- a/drivers/isdn/i4l/isdn_tty.c
+++ b/drivers/isdn/i4l/isdn_tty.c
@@ -1223,7 +1223,7 @@ isdn_tty_write(struct tty_struct *tty, const u_char * buf, int count)
                total += c;
        }
        atomic_dec(&info->xmit_lock);
-        if ((info->xmit_count) || (skb_queue_len(&info->xmit_queue))) {
+        if ((info->xmit_count) || !skb_queue_empty(&info->xmit_queue)) {
                if (m->mdmreg[REG_DXMT] & BIT_DXMT) {
                        isdn_tty_senddown(info);
                        isdn_tty_tint(info);
@@ -1284,7 +1284,7 @@ isdn_tty_flush_chars(struct tty_struct *tty)
        if (isdn_tty_paranoia_check(info, tty->name, "isdn_tty_flush_chars"))
                return;
-        if ((info->xmit_count) || (skb_queue_len(&info->xmit_queue)))
+        if ((info->xmit_count) || !skb_queue_empty(&info->xmit_queue))
                isdn_timer_ctrl(ISDN_TIMER_MODEMXMIT, 1);
 }
diff --git a/drivers/isdn/icn/icn.c b/drivers/isdn/icn/icn.c
index 9fc0c1e03732..e0d1b01cc74c 100644
--- a/drivers/isdn/icn/icn.c
+++ b/drivers/isdn/icn/icn.c
@@ -304,12 +304,12 @@ icn_pollbchan_send(int channel, icn_card * card)
        isdn_ctrl cmd;
        if (!(card->sndcount[channel] || card->xskb[channel] ||
-              skb_queue_len(&card->spqueue[channel])))
+              !skb_queue_empty(&card->spqueue[channel])))
                return;
        if (icn_trymaplock_channel(card, mch)) {
                while (sbfree && 
                       (card->sndcount[channel] ||
-                        skb_queue_len(&card->spqueue[channel]) ||
+                        !skb_queue_empty(&card->spqueue[channel]) ||
                        card->xskb[channel])) {
                        spin_lock_irqsave(&card->lock, flags);
                        if (card->xmit_lock[channel]) {
diff --git a/drivers/net/hamradio/scc.c b/drivers/net/hamradio/scc.c
index ece1b1a13186..c27e417f32bf 100644
--- a/drivers/net/hamradio/scc.c
+++ b/drivers/net/hamradio/scc.c
@@ -304,7 +304,7 @@ static inline void scc_discard_buffers(struct scc_channel *scc)
                scc->tx_buff = NULL;
        }
        
-        while (skb_queue_len(&scc->tx_queue))
+        while (!skb_queue_empty(&scc->tx_queue))
                dev_kfree_skb(skb_dequeue(&scc->tx_queue));
        spin_unlock_irqrestore(&scc->lock, flags);
@@ -1126,8 +1126,7 @@ static void t_dwait(unsigned long channel)
        
        if (scc->stat.tx_state == TXS_WAIT)     /* maxkeyup or idle timeout */
        {
-                if (skb_queue_len(&scc->tx_queue) == 0) /* nothing to send */
+                if (skb_queue_empty(&scc->tx_queue)) {  /* nothing to send */
-                {
                        scc->stat.tx_state = TXS_IDLE;
                        netif_wake_queue(scc->dev);     /* t_maxkeyup locked it. */
                        return;
diff --git a/drivers/net/ppp_async.c b/drivers/net/ppp_async.c
index 5e48b9ab3045..59e8183c639e 100644
--- a/drivers/net/ppp_async.c
+++ b/drivers/net/ppp_async.c
@@ -364,7 +364,7 @@ ppp_asynctty_receive(struct tty_struct *tty, const unsigned char *buf,
        spin_lock_irqsave(&ap->recv_lock, flags);
        ppp_async_input(ap, buf, cflags, count);
        spin_unlock_irqrestore(&ap->recv_lock, flags);
-        if (skb_queue_len(&ap->rqueue))
+        if (!skb_queue_empty(&ap->rqueue))
                tasklet_schedule(&ap->tsk);
        ap_put(ap);
        if (test_and_clear_bit(TTY_THROTTLED, &tty->flags)
diff --git a/drivers/net/ppp_generic.c b/drivers/net/ppp_generic.c
index ab726ab43798..a32668e88e09 100644
--- a/drivers/net/ppp_generic.c
+++ b/drivers/net/ppp_generic.c
@@ -1237,8 +1237,8 @@ static int ppp_mp_explode(struct ppp *ppp, struct sk_buff *skb)
                pch = list_entry(list, struct channel, clist);
                navail += pch->avail = (pch->chan != NULL);
                if (pch->avail) {
-                        if (skb_queue_len(&pch->file.xq) == 0
+                        if (skb_queue_empty(&pch->file.xq) ||
-                            || !pch->had_frag) {
+                            !pch->had_frag) {
                                pch->avail = 2;
                                ++nfree;
                        }
@@ -1374,8 +1374,8 @@ static int ppp_mp_explode(struct ppp *ppp, struct sk_buff *skb)
                /* try to send it down the channel */
                chan = pch->chan;
-                if (skb_queue_len(&pch->file.xq)
+                if (!skb_queue_empty(&pch->file.xq) ||
-                    || !chan->ops->start_xmit(chan, frag))
+                    !chan->ops->start_xmit(chan, frag))
                        skb_queue_tail(&pch->file.xq, frag);
                pch->had_frag = 1;
                p += flen;
@@ -1412,7 +1412,7 @@ ppp_channel_push(struct channel *pch)
        spin_lock_bh(&pch->downl);
        if (pch->chan != 0) {
-                while (skb_queue_len(&pch->file.xq) > 0) {
+                while (!skb_queue_empty(&pch->file.xq)) {
                        skb = skb_dequeue(&pch->file.xq);
                        if (!pch->chan->ops->start_xmit(pch->chan, skb)) {
                                /* put the packet back and try again later */
@@ -1426,7 +1426,7 @@ ppp_channel_push(struct channel *pch)
        }
        spin_unlock_bh(&pch->downl);
        /* see if there is anything from the attached unit to be sent */
-        if (skb_queue_len(&pch->file.xq) == 0) {
+        if (skb_queue_empty(&pch->file.xq)) {
                read_lock_bh(&pch->upl);
                ppp = pch->ppp;
                if (ppp != 0)
diff --git a/drivers/net/ppp_synctty.c b/drivers/net/ppp_synctty.c
index fd9f50180355..4d51c0c8023d 100644
--- a/drivers/net/ppp_synctty.c
+++ b/drivers/net/ppp_synctty.c
@@ -406,7 +406,7 @@ ppp_sync_receive(struct tty_struct *tty, const unsigned char *buf,
        spin_lock_irqsave(&ap->recv_lock, flags);
        ppp_sync_input(ap, buf, cflags, count);
        spin_unlock_irqrestore(&ap->recv_lock, flags);
-        if (skb_queue_len(&ap->rqueue))
+        if (!skb_queue_empty(&ap->rqueue))
                tasklet_schedule(&ap->tsk);
        sp_put(ap);
        if (test_and_clear_bit(TTY_THROTTLED, &tty->flags)
diff --git a/drivers/net/tun.c b/drivers/net/tun.c
index 7bfee366297b..effab0b9adca 100644
--- a/drivers/net/tun.c
+++ b/drivers/net/tun.c
@@ -215,7 +215,7 @@ static unsigned int tun_chr_poll(struct file *file, poll_table * wait)
        poll_wait(file, &tun->read_wait, wait);
 
-        if (skb_queue_len(&tun->readq))
+        if (!skb_queue_empty(&tun->readq))
                mask |= POLLIN | POLLRDNORM;
        return mask;
diff --git a/drivers/net/wireless/airo.c b/drivers/net/wireless/airo.c
index c12648d8192b..47f3c5d0203d 100644
--- a/drivers/net/wireless/airo.c
+++ b/drivers/net/wireless/airo.c
@@ -2374,7 +2374,7 @@ void stop_airo_card( struct net_device *dev, int freeres )
        /*
         * Clean out tx queue
         */
-        if (test_bit(FLAG_MPI, &ai->flags) && skb_queue_len (&ai->txq) > 0) {
+        if (test_bit(FLAG_MPI, &ai->flags) && !skb_queue_empty(&ai->txq)) {
                struct sk_buff *skb = NULL;
                for (;(skb = skb_dequeue(&ai->txq));)
                        dev_kfree_skb(skb);
@@ -3287,7 +3287,7 @@ exitrx:
                                if (status & EV_TXEXC)
                                        get_tx_error(apriv, -1);
                                spin_lock_irqsave(&apriv->aux_lock, flags);
-                                if (skb_queue_len (&apriv->txq)) {
+                                if (!skb_queue_empty(&apriv->txq)) {
                                        spin_unlock_irqrestore(&apriv->aux_lock,flags);
                                        mpi_send_packet (dev);
                                } else {
diff --git a/drivers/s390/net/claw.c b/drivers/s390/net/claw.c
index 60440dbe3a27..24c0af49c25c 100644
--- a/drivers/s390/net/claw.c
+++ b/drivers/s390/net/claw.c
@@ -428,7 +428,7 @@ claw_pack_skb(struct claw_privbk *privptr)
        new_skb = NULL;         /* assume no dice */
        pkt_cnt = 0;
        CLAW_DBF_TEXT(4,trace,"PackSKBe");
-        if (skb_queue_len(&p_ch->collect_queue) > 0) {
+        if (!skb_queue_empty(&p_ch->collect_queue)) {
        /* some data */
                held_skb = skb_dequeue(&p_ch->collect_queue);
                if (p_env->packing != DO_PACKED)
@@ -1254,7 +1254,7 @@ claw_write_next ( struct chbk * p_ch )
        privptr = (struct claw_privbk *) dev->priv;
        claw_free_wrt_buf( dev );
        if ((privptr->write_free_count > 0) &&
-            (skb_queue_len(&p_ch->collect_queue) > 0)) {
+            !skb_queue_empty(&p_ch->collect_queue)) {
                pk_skb = claw_pack_skb(privptr);
                while (pk_skb != NULL) {
                        rc = claw_hw_tx( pk_skb, dev,1);
diff --git a/drivers/s390/net/ctctty.c b/drivers/s390/net/ctctty.c
index 3080393e823d..968f2c113efe 100644
--- a/drivers/s390/net/ctctty.c
+++ b/drivers/s390/net/ctctty.c
@@ -156,7 +156,7 @@ ctc_tty_readmodem(ctc_tty_info *info)
                                        skb_queue_head(&info->rx_queue, skb);
                                else {
                                        kfree_skb(skb);
-                                        ret = skb_queue_len(&info->rx_queue);
+                                        ret = !skb_queue_empty(&info->rx_queue);
                                }
                        }
                }
@@ -530,7 +530,7 @@ ctc_tty_write(struct tty_struct *tty, const u_char * buf, int count)
                total += c;
                count -= c;
        }
-        if (skb_queue_len(&info->tx_queue)) {
+        if (!skb_queue_empty(&info->tx_queue)) {
                info->lsr &= ~UART_LSR_TEMT;
                tasklet_schedule(&info->tasklet);
        }
@@ -594,7 +594,7 @@ ctc_tty_flush_chars(struct tty_struct *tty)
                return;
        if (ctc_tty_paranoia_check(info, tty->name, "ctc_tty_flush_chars"))
                return;
-        if (tty->stopped || tty->hw_stopped || (!skb_queue_len(&info->tx_queue)))
+        if (tty->stopped || tty->hw_stopped || skb_queue_empty(&info->tx_queue))
                return;
        tasklet_schedule(&info->tasklet);
 }
diff --git a/drivers/usb/net/usbnet.c b/drivers/usb/net/usbnet.c
index 8a945f4f3693..576f3b852fce 100644
--- a/drivers/usb/net/usbnet.c
+++ b/drivers/usb/net/usbnet.c
@@ -3227,9 +3227,9 @@ static int usbnet_stop (struct net_device *net)
        temp = unlink_urbs (dev, &dev->txq) + unlink_urbs (dev, &dev->rxq);
        // maybe wait for deletions to finish.
-        while (skb_queue_len (&dev->rxq)
+        while (!skb_queue_empty(&dev->rxq) &&
-                        && skb_queue_len (&dev->txq)
+               !skb_queue_empty(&dev->txq) &&
-                        && skb_queue_len (&dev->done)) {
+               !skb_queue_empty(&dev->done)) {
                msleep(UNLINK_TIMEOUT_MS);
                if (netif_msg_ifdown (dev))
                        devdbg (dev, "waited for %d urb completions", temp);
diff --git a/include/asm-arm/arch-ixp2000/platform.h b/include/asm-arm/arch-ixp2000/platform.h
index 52ded516ea5c..c0caf3e3e6fd 100644
--- a/include/asm-arm/arch-ixp2000/platform.h
+++ b/include/asm-arm/arch-ixp2000/platform.h
@@ -115,6 +115,7 @@ static inline unsigned int ixp2000_is_pcimaster(void)
 }
 void ixp2000_map_io(void);
+void ixp2000_uart_init(void);
 void ixp2000_init_irq(void);
 void ixp2000_init_time(unsigned long);
 unsigned long ixp2000_gettimeoffset(void);
diff --git a/include/asm-arm/arch-omap/board-h2.h b/include/asm-arm/arch-omap/board-h2.h
index 60f002b72983..39ca5a31aeea 100644
--- a/include/asm-arm/arch-omap/board-h2.h
+++ b/include/asm-arm/arch-omap/board-h2.h
@@ -34,11 +34,6 @@
 /* At OMAP1610 Innovator the Ethernet is directly connected to CS1 */
 #define OMAP1610_ETHR_START             0x04000300
-/* Intel STRATA NOR flash at CS3 or CS2B(NAND Boot) */
-#define OMAP_NOR_FLASH_SIZE             SZ_32M
-#define OMAP_NOR_FLASH_START1           0x0C000000 /* CS3 */
-#define OMAP_NOR_FLASH_START2           0x0A000000 /* CS2B */
 /* Samsung NAND flash at CS2B or CS3(NAND Boot) */
 #define OMAP_NAND_FLASH_START1           0x0A000000 /* CS2B */
 #define OMAP_NAND_FLASH_START2           0x0C000000 /* CS3 */
diff --git a/include/asm-arm/arch-omap/board-h3.h b/include/asm-arm/arch-omap/board-h3.h
index e4d1cd231731..1b12c1dcc2fa 100644
--- a/include/asm-arm/arch-omap/board-h3.h
+++ b/include/asm-arm/arch-omap/board-h3.h
@@ -30,11 +30,6 @@
 /* In OMAP1710 H3 the Ethernet is directly connected to CS1 */
 #define OMAP1710_ETHR_START             0x04000300
-/* Intel STRATA NOR flash at CS3 or CS2B(NAND Boot) */
-#define OMAP_NOR_FLASH_SIZE             SZ_32M
-#define OMAP_NOR_FLASH_START1           0x0C000000 /* CS3 */
-#define OMAP_NOR_FLASH_START2           0x0A000000 /* CS2B */
 /* Samsung NAND flash at CS2B or CS3(NAND Boot) */
 #define OMAP_NAND_FLASH_START1           0x0A000000 /* CS2B */
 #define OMAP_NAND_FLASH_START2           0x0C000000 /* CS3 */
diff --git a/include/asm-arm/arch-omap/board-osk.h b/include/asm-arm/arch-omap/board-osk.h
index aaa49a0fbd21..2b1a8a4fe44e 100644
--- a/include/asm-arm/arch-omap/board-osk.h
+++ b/include/asm-arm/arch-omap/board-osk.h
@@ -32,10 +32,5 @@
 /* At OMAP5912 OSK the Ethernet is directly connected to CS1 */
 #define OMAP_OSK_ETHR_START             0x04800300
-/* Micron NOR flash at CS3 mapped to address 0x0 if BM bit is 1 */
-#define OMAP_OSK_NOR_FLASH_BASE         0xD8000000
-#define OMAP_OSK_NOR_FLASH_SIZE         SZ_32M
-#define OMAP_OSK_NOR_FLASH_START        0x00000000
 #endif /*  __ASM_ARCH_OMAP_OSK_H */
diff --git a/include/asm-arm/arch-omap/board.h b/include/asm-arm/arch-omap/board.h
index 1cefd60b6f2a..95bd625480c1 100644
--- a/include/asm-arm/arch-omap/board.h
+++ b/include/asm-arm/arch-omap/board.h
@@ -16,10 +16,11 @@
 /* Different peripheral ids */
 #define OMAP_TAG_CLOCK          0x4f01
 #define OMAP_TAG_MMC            0x4f02
-#define OMAP_TAG_UART           0x4f03
+#define OMAP_TAG_SERIAL_CONSOLE 0x4f03
 #define OMAP_TAG_USB            0x4f04
 #define OMAP_TAG_LCD            0x4f05
 #define OMAP_TAG_GPIO_SWITCH    0x4f06
+#define OMAP_TAG_UART           0x4f07
 #define OMAP_TAG_BOOT_REASON    0x4f80
 #define OMAP_TAG_FLASH_PART     0x4f81
@@ -35,7 +36,7 @@ struct omap_mmc_config {
        s16 mmc1_switch_pin, mmc2_switch_pin;
 };
-struct omap_uart_config {
+struct omap_serial_console_config {
        u8 console_uart;
        u32 console_speed;
 };
@@ -82,7 +83,8 @@ struct omap_lcd_config {
 */
 #define OMAP_GPIO_SWITCH_TYPE_COVER             0x0000
 #define OMAP_GPIO_SWITCH_TYPE_CONNECTION        0x0001
-#define OMAP_GPIO_SWITCH_FLAG_INVERTED          0x0001
+#define OMAP_GPIO_SWITCH_FLAG_INVERTED          0x0001
+#define OMAP_GPIO_SWITCH_FLAG_OUTPUT            0x0002
 struct omap_gpio_switch_config {
        char name[12];
        u16 gpio;
@@ -99,6 +101,10 @@ struct omap_boot_reason_config {
        char reason_str[12];
 };
+struct omap_uart_config {
+        /* Bit field of UARTs present; bit 0 --> UART1 */
+        unsigned int enabled_uarts;
+};
 struct omap_board_config_entry {
        u16 tag;
diff --git a/arch/arm/mach-omap/common.h b/include/asm-arm/arch-omap/common.h
index 9f62858c0df4..2a676b4f13b5 100644
--- a/arch/arm/mach-omap/common.h
+++ b/include/asm-arm/arch-omap/common.h
@@ -1,5 +1,5 @@
 /*
- * linux/arch/arm/mach-omap/common.h
+ * linux/include/asm-arm/arch-omap/common.h
 *
 * Header for code common to all OMAP machines.
 *
@@ -29,7 +29,7 @@
 struct sys_timer;
-extern void omap_map_io(void);
+extern void omap_map_common_io(void);
 extern struct sys_timer omap_timer;
 extern void omap_serial_init(int ports[]);
diff --git a/include/asm-arm/arch-omap/dma.h b/include/asm-arm/arch-omap/dma.h
index d785248377db..ce114ce5af5d 100644
--- a/include/asm-arm/arch-omap/dma.h
+++ b/include/asm-arm/arch-omap/dma.h
@@ -241,6 +241,7 @@ extern void omap_dma_unlink_lch (int lch_head, int lch_queue);
 extern dma_addr_t omap_get_dma_src_pos(int lch);
 extern dma_addr_t omap_get_dma_dst_pos(int lch);
 extern void omap_clear_dma(int lch);
+extern int omap_dma_running(void);
 /* Returns 1 if the DMA module is in OMAP1510-compatible mode, 0 otherwise */
 extern int omap_dma_in_1510_mode(void);
diff --git a/include/asm-arm/arch-omap/hardware.h b/include/asm-arm/arch-omap/hardware.h
index 37e06c782bdf..48258c7f6541 100644
--- a/include/asm-arm/arch-omap/hardware.h
+++ b/include/asm-arm/arch-omap/hardware.h
@@ -54,6 +54,19 @@
 /*
 * ----------------------------------------------------------------------------
+ * Timers
+ * ----------------------------------------------------------------------------
+ */
+#define OMAP_MPU_TIMER1_BASE    (0xfffec500)
+#define OMAP_MPU_TIMER2_BASE    (0xfffec600)
+#define OMAP_MPU_TIMER3_BASE    (0xfffec700)
+#define MPU_TIMER_FREE          (1 << 6)
+#define MPU_TIMER_CLOCK_ENABLE  (1 << 5)
+#define MPU_TIMER_AR            (1 << 1)
+#define MPU_TIMER_ST            (1 << 0)
+/*
+ * ----------------------------------------------------------------------------
 * Clocks
 * ----------------------------------------------------------------------------
 */
@@ -78,6 +91,7 @@
 /* DSP clock control */
 #define DSP_CONFIG_REG_BASE     (0xe1008000)
+#define DSP_CKCTL               (DSP_CONFIG_REG_BASE + 0x0)
 #define DSP_IDLECT1             (DSP_CONFIG_REG_BASE + 0x4)
 #define DSP_IDLECT2             (DSP_CONFIG_REG_BASE + 0x8)
@@ -88,6 +102,7 @@
 */
 #define ULPD_REG_BASE           (0xfffe0800)
 #define ULPD_IT_STATUS          (ULPD_REG_BASE + 0x14)
+#define ULPD_SETUP_ANALOG_CELL_3        (ULPD_REG_BASE + 0x24)
 #define ULPD_CLOCK_CTRL         (ULPD_REG_BASE + 0x30)
 #       define DIS_USB_PVCI_CLK         (1 << 5)        /* no USB/FAC synch */
 #       define USB_MCLK_EN              (1 << 4)        /* enable W4_USB_CLKO */
@@ -268,17 +283,10 @@
 * Processor specific defines
 * ---------------------------------------------------------------------------
 */
-#ifdef CONFIG_ARCH_OMAP730
-#include "omap730.h"
-#endif
-#ifdef CONFIG_ARCH_OMAP1510
+#include "omap730.h"
 #include "omap1510.h"
-#endif
-#ifdef CONFIG_ARCH_OMAP16XX
 #include "omap16xx.h"
-#endif
 /*
 * ---------------------------------------------------------------------------
diff --git a/include/asm-arm/arch-omap/irqs.h b/include/asm-arm/arch-omap/irqs.h
index 6701fd9e5f9b..0d05a7c957d1 100644
--- a/include/asm-arm/arch-omap/irqs.h
+++ b/include/asm-arm/arch-omap/irqs.h
@@ -159,6 +159,7 @@
 #define INT_1610_GPIO_BANK3     (41 + IH2_BASE)
 #define INT_1610_MMC2           (42 + IH2_BASE)
 #define INT_1610_CF             (43 + IH2_BASE)
+#define INT_1610_WAKE_UP_REQ    (46 + IH2_BASE)
 #define INT_1610_GPIO_BANK4     (48 + IH2_BASE)
 #define INT_1610_SPI            (49 + IH2_BASE)
 #define INT_1610_DMA_CH6        (53 + IH2_BASE)
@@ -238,6 +239,8 @@
 #define IH_MPUIO_BASE           (OMAP_MAX_GPIO_LINES + IH_GPIO_BASE)
 #define IH_BOARD_BASE           (16 + IH_MPUIO_BASE)
+#define OMAP_IRQ_BIT(irq)       (1 << ((irq) % 32))
 #ifndef __ASSEMBLY__
 extern void omap_init_irq(void);
 #endif
diff --git a/include/asm-arm/arch-omap/mux.h b/include/asm-arm/arch-omap/mux.h
index 39f99decbb7b..5bd3f0097fc6 100644
--- a/include/asm-arm/arch-omap/mux.h
+++ b/include/asm-arm/arch-omap/mux.h
@@ -231,7 +231,7 @@ typedef enum {
        J19_1610_ETM_D6,
        J18_1610_ETM_D7,
-        /* OMAP-1610 GPIO */
+        /* OMAP16XX GPIO */
        P20_1610_GPIO4,
        V9_1610_GPIO7,
        W8_1610_GPIO9,
@@ -241,6 +241,9 @@ typedef enum {
        AA20_1610_GPIO_41,
        W19_1610_GPIO48,
        M7_1610_GPIO62,
+        V14_16XX_GPIO37,
+        R9_16XX_GPIO18,
+        L14_16XX_GPIO49,
        /* OMAP-1610 uWire */
        V19_1610_UWIRE_SCLK,
@@ -285,12 +288,13 @@ typedef enum {
        V6_USB2_TXD,
        W5_USB2_SE0,
-        /* UART1 1610 */
+        /* 16XX UART */
        R13_1610_UART1_TX,
-        V14_1610_UART1_RX,
+        V14_16XX_UART1_RX,
        R14_1610_UART1_CTS,
        AA15_1610_UART1_RTS,
+        R9_16XX_UART2_RX,
+        L14_16XX_UART3_RX,
        /* I2C OMAP-1610 */
        I2C_SCL,
@@ -332,7 +336,7 @@ typedef enum {
 * Table of various FUNC_MUX and PULL_DWN combinations for each device.
 * See also reg_cfg_t above for the lookup table.
 */
-static reg_cfg_set __initdata_or_module
+static const reg_cfg_set __initdata_or_module
 reg_cfg_table[] = {
 /*
 *       description            mux  mode   mux  pull pull  pull  pu_pd  pu  dbg
@@ -455,7 +459,7 @@ MUX_CFG("L19_1610_ETM_D0",	 5,   18,    1,	  0,  26,   0,	  0,	 0,  1)
 MUX_CFG("J19_1610_ETM_D6",       5,    0,    1,   0,  20,   0,    0,     0,  1)
 MUX_CFG("J18_1610_ETM_D7",       5,   27,    1,   0,  19,   0,    0,     0,  1)
-/* OMAP-1610 GPIO */
+/* OMAP16XX GPIO */
 MUX_CFG("P20_1610_GPIO4",        6,   27,    0,   1,   7,   0,    1,     1,  1)
 MUX_CFG("V9_1610_GPIO7",         B,   12,    1,   2,  20,   0,    2,     1,  1)
 MUX_CFG("W8_1610_GPIO9",         B,   21,    0,   2,  23,   0,    2,     1,  1)
@@ -465,6 +469,9 @@ MUX_CFG("V5_1610_GPIO24",	 B,   15,    7,	  2,  21,   0,	  2,	 1,  1)
 MUX_CFG("AA20_1610_GPIO_41",     9,    9,    7,   1,  31,   0,    1,     1,  1)
 MUX_CFG("W19_1610_GPIO48",       8,   15,    7,   1,  23,   1,    1,     0,  1)
 MUX_CFG("M7_1610_GPIO62",       10,    0,    0,   4,  24,   0,    4,     0,  1)
+MUX_CFG("V14_16XX_GPIO37",       9,   18,    7,   2,   2,   0,    2,     2,  0)
+MUX_CFG("R9_16XX_GPIO18",        C,   18,    7,   3,   0,   0,    3,     0,  0)
+MUX_CFG("L14_16XX_GPIO49",       6,    3,    7,   0,  31,   0,    0,    31,  0)
 /* OMAP-1610 uWire */
 MUX_CFG("V19_1610_UWIRE_SCLK",   8,    6,    0,   1,  20,   0,    1,     1,  1)
@@ -503,16 +510,17 @@ MUX_CFG("Y10_USB0_SUSP",	 B,   3,     5,	  2,  17,   0,	  2,	 0,  1)
 MUX_CFG("W9_USB2_TXEN",          B,   9,     1,  NA,   0,   0,   NA,     0,  1)
 MUX_CFG("AA9_USB2_VP",           B,   6,     1,  NA,   0,   0,   NA,     0,  1)
 MUX_CFG("Y5_USB2_RCV",           C,  21,     1,  NA,   0,   0,   NA,     0,  1)
-MUX_CFG("R8_USB2_VM",            C,  18,     1,  NA,   0,   0,   NA,     0,  1)
+MUX_CFG("R9_USB2_VM",            C,  18,     1,  NA,   0,   0,   NA,     0,  1)
 MUX_CFG("V6_USB2_TXD",           C,  27,     2,  NA,   0,   0,   NA,     0,  1)
 MUX_CFG("W5_USB2_SE0",           C,  24,     2,  NA,   0,   0,   NA,     0,  1)
+/* 16XX UART */
-/* UART1 */
 MUX_CFG("R13_1610_UART1_TX",     A,  12,     6,   2,  10,   0,    2,    10,  1)
-MUX_CFG("V14_1610_UART1_RX",     9,  18,     0,   2,   2,   0,    2,     2,  1)
+MUX_CFG("V14_16XX_UART1_RX",     9,  18,     0,   2,   2,   0,    2,     2,  1)
 MUX_CFG("R14_1610_UART1_CTS",    9,  15,     0,   2,   1,   0,    2,     1,  1)
 MUX_CFG("AA15_1610_UART1_RTS",   9,  12,     1,   2,   0,   0,    2,     0,  1)
+MUX_CFG("R9_16XX_UART2_RX",      C,  18,     0,   3,   0,   0,    3,     0,  1)
+MUX_CFG("L14_16XX_UART3_RX",     6,   3,     0,   0,  31,   0,    0,    31,  1)
 /* I2C interface */
 MUX_CFG("I2C_SCL",               7,  24,     0,  NA,   0,   0,   NA,     0,  0)
diff --git a/include/asm-arm/arch-omap/omap16xx.h b/include/asm-arm/arch-omap/omap16xx.h
index 88b1fe43ae9e..38a9b95e6a33 100644
--- a/include/asm-arm/arch-omap/omap16xx.h
+++ b/include/asm-arm/arch-omap/omap16xx.h
@@ -183,5 +183,37 @@
 #define OMAP16XX_PWL_ENABLE     (OMAP16XX_PWL_BASE + 0x00)
 #define OMAP16XX_PWL_CLK_ENABLE (OMAP16XX_PWL_BASE + 0x04)
+/*
+ * ---------------------------------------------------------------------------
+ * Watchdog timer
+ * ---------------------------------------------------------------------------
+ */
+/* 32-bit Watchdog timer in OMAP 16XX */
+#define OMAP_16XX_WATCHDOG_BASE        (0xfffeb000)
+#define OMAP_16XX_WIDR         (OMAP_16XX_WATCHDOG_BASE + 0x00)
+#define OMAP_16XX_WD_SYSCONFIG (OMAP_16XX_WATCHDOG_BASE + 0x10)
+#define OMAP_16XX_WD_SYSSTATUS (OMAP_16XX_WATCHDOG_BASE + 0x14)
+#define OMAP_16XX_WCLR         (OMAP_16XX_WATCHDOG_BASE + 0x24)
+#define OMAP_16XX_WCRR         (OMAP_16XX_WATCHDOG_BASE + 0x28)
+#define OMAP_16XX_WLDR         (OMAP_16XX_WATCHDOG_BASE + 0x2c)
+#define OMAP_16XX_WTGR         (OMAP_16XX_WATCHDOG_BASE + 0x30)
+#define OMAP_16XX_WWPS         (OMAP_16XX_WATCHDOG_BASE + 0x34)
+#define OMAP_16XX_WSPR         (OMAP_16XX_WATCHDOG_BASE + 0x48)
+#define WCLR_PRE_SHIFT         5
+#define WCLR_PTV_SHIFT         2
+#define WWPS_W_PEND_WSPR       (1 << 4)
+#define WWPS_W_PEND_WTGR       (1 << 3)
+#define WWPS_W_PEND_WLDR       (1 << 2)
+#define WWPS_W_PEND_WCRR       (1 << 1)
+#define WWPS_W_PEND_WCLR       (1 << 0)
+#define WSPR_ENABLE_0          (0x0000bbbb)
+#define WSPR_ENABLE_1          (0x00004444)
+#define WSPR_DISABLE_0         (0x0000aaaa)
+#define WSPR_DISABLE_1         (0x00005555)
 #endif /*  __ASM_ARCH_OMAP16XX_H */
diff --git a/include/asm-arm/arch-omap/system.h b/include/asm-arm/arch-omap/system.h
index 17a2c4825f07..ff37bc27e603 100644
--- a/include/asm-arm/arch-omap/system.h
+++ b/include/asm-arm/arch-omap/system.h
@@ -5,7 +5,9 @@
 #ifndef __ASM_ARCH_SYSTEM_H
 #define __ASM_ARCH_SYSTEM_H
 #include <linux/config.h>
+#include <asm/mach-types.h>
 #include <asm/arch/hardware.h>
+#include <asm/mach-types.h>
 static inline void arch_idle(void)
 {
@@ -14,7 +16,24 @@ static inline void arch_idle(void)
 static inline void arch_reset(char mode)
 {
-        omap_writew(1, ARM_RSTCT1);
+#ifdef CONFIG_ARCH_OMAP16XX
+        /*
+         * Workaround for 5912/1611b bug mentioned in sprz209d.pdf p. 28
+         * "Global Software Reset Affects Traffic Controller Frequency".
+         */
+        if (cpu_is_omap5912()) {
+                omap_writew(omap_readw(DPLL_CTL) & ~(1 << 4),
+                                 DPLL_CTL);
+                omap_writew(0x8, ARM_RSTCT1);
+        }
+#endif
+#ifdef CONFIG_MACH_VOICEBLUE
+        if (machine_is_voiceblue())
+                voiceblue_reset();
+        else
+#endif
+                omap_writew(1, ARM_RSTCT1);
 }
 #endif
diff --git a/include/asm-sparc64/param.h b/include/asm-sparc64/param.h
index 6a12f3ac0359..a1cd4974630b 100644
--- a/include/asm-sparc64/param.h
+++ b/include/asm-sparc64/param.h
@@ -1,9 +1,10 @@
-/* $Id: param.h,v 1.2 2000/10/30 21:01:41 davem Exp $ */
 #ifndef _ASMSPARC64_PARAM_H
 #define _ASMSPARC64_PARAM_H
+#include <linux/config.h>
 #ifdef __KERNEL__
-# define HZ             1000    /* Internal kernel timer frequency */
+# define HZ             CONFIG_HZ       /* Internal kernel timer frequency */
 # define USER_HZ        100     /* .. some user interfaces are in "ticks" */
 # define CLOCKS_PER_SEC (USER_HZ)
 #endif
diff --git a/include/asm-xtensa/ipc.h b/include/asm-xtensa/ipc.h
deleted file mode 100644
index a9eed4e21cb9..000000000000
--- a/include/asm-xtensa/ipc.h
+++ /dev/null
@@ -1,16 +0,0 @@
-/*
- * include/asm-xtensa/ipc.h
- *
- * This file is subject to the terms and conditions of the GNU General
- * Public License.  See the file "COPYING" in the main directory of
- * this archive for more details.
- *
- * Copyright (C) 2001 - 2005 Tensilica Inc.
- */
-#ifndef _XTENSA_IPC_H
-#define _XTENSA_IPC_H
-#include <asm-generic/ipc.h>
-#endif  /* _XTENSA_IPC_H */
diff --git a/include/linux/igmp.h b/include/linux/igmp.h
index 390e760a96d3..0c31ef0b5bad 100644
--- a/include/linux/igmp.h
+++ b/include/linux/igmp.h
@@ -148,7 +148,6 @@ struct ip_sf_socklist
 struct ip_mc_socklist
 {
        struct ip_mc_socklist   *next;
-        int                     count;
        struct ip_mreqn         multi;
        unsigned int            sfmode;         /* MCAST_{INCLUDE,EXCLUDE} */
        struct ip_sf_socklist   *sflist;
diff --git a/include/linux/skbuff.h b/include/linux/skbuff.h
index 14b950413495..5d4a990d5577 100644
--- a/include/linux/skbuff.h
+++ b/include/linux/skbuff.h
@@ -300,20 +300,26 @@ struct sk_buff {
 #include <asm/system.h>
 extern void            __kfree_skb(struct sk_buff *skb);
-extern struct sk_buff *alloc_skb(unsigned int size, int priority);
+extern struct sk_buff *alloc_skb(unsigned int size,
+                                 unsigned int __nocast priority);
 extern struct sk_buff *alloc_skb_from_cache(kmem_cache_t *cp,
-                                            unsigned int size, int priority);
+                                            unsigned int size,
+                                            unsigned int __nocast priority);
 extern void            kfree_skbmem(struct sk_buff *skb);
-extern struct sk_buff *skb_clone(struct sk_buff *skb, int priority);
+extern struct sk_buff *skb_clone(struct sk_buff *skb,
-extern struct sk_buff *skb_copy(const struct sk_buff *skb, int priority);
+                                 unsigned int __nocast priority);
-extern struct sk_buff *pskb_copy(struct sk_buff *skb, int gfp_mask);
+extern struct sk_buff *skb_copy(const struct sk_buff *skb,
+                                unsigned int __nocast priority);
+extern struct sk_buff *pskb_copy(struct sk_buff *skb,
+                                 unsigned int __nocast gfp_mask);
 extern int             pskb_expand_head(struct sk_buff *skb,
-                                        int nhead, int ntail, int gfp_mask);
+                                        int nhead, int ntail,
+                                        unsigned int __nocast gfp_mask);
 extern struct sk_buff *skb_realloc_headroom(struct sk_buff *skb,
                                            unsigned int headroom);
 extern struct sk_buff *skb_copy_expand(const struct sk_buff *skb,
                                       int newheadroom, int newtailroom,
-                                       int priority);
+                                       unsigned int __nocast priority);
 extern struct sk_buff *         skb_pad(struct sk_buff *skb, int pad);
 #define dev_kfree_skb(a)        kfree_skb(a)
 extern void           skb_over_panic(struct sk_buff *skb, int len,
@@ -464,7 +470,8 @@ static inline int skb_shared(const struct sk_buff *skb)
 *
 *      NULL is returned on a memory allocation failure.
 */
-static inline struct sk_buff *skb_share_check(struct sk_buff *skb, int pri)
+static inline struct sk_buff *skb_share_check(struct sk_buff *skb,
+                                              unsigned int __nocast pri)
 {
        might_sleep_if(pri & __GFP_WAIT);
        if (skb_shared(skb)) {
@@ -1001,7 +1008,7 @@ static inline void __skb_queue_purge(struct sk_buff_head *list)
 *      %NULL is returned in there is no free memory.
 */
 static inline struct sk_buff *__dev_alloc_skb(unsigned int length,
-                                              int gfp_mask)
+                                              unsigned int __nocast gfp_mask)
 {
        struct sk_buff *skb = alloc_skb(length + 16, gfp_mask);
        if (likely(skb))
@@ -1114,8 +1121,8 @@ static inline int skb_can_coalesce(struct sk_buff *skb, int i,
 *      If there is no free memory -ENOMEM is returned, otherwise zero
 *      is returned and the old skb data released.
 */
-extern int __skb_linearize(struct sk_buff *skb, int gfp);
+extern int __skb_linearize(struct sk_buff *skb, unsigned int __nocast gfp);
-static inline int skb_linearize(struct sk_buff *skb, int gfp)
+static inline int skb_linearize(struct sk_buff *skb, unsigned int __nocast gfp)
 {
        return __skb_linearize(skb, gfp);
 }
diff --git a/include/net/irda/irda_device.h b/include/net/irda/irda_device.h
index 71d6af83b631..92c828029cd8 100644
--- a/include/net/irda/irda_device.h
+++ b/include/net/irda/irda_device.h
@@ -224,7 +224,7 @@ int  irda_device_is_receiving(struct net_device *dev);
 /* Interface for internal use */
 static inline int irda_device_txqueue_empty(const struct net_device *dev)
 {
-        return (skb_queue_len(&dev->qdisc->q) == 0);
+        return skb_queue_empty(&dev->qdisc->q);
 }
 int  irda_device_set_raw_mode(struct net_device* self, int status);
 struct net_device *alloc_irdadev(int sizeof_priv);
diff --git a/include/net/sctp/structs.h b/include/net/sctp/structs.h
index 47727c7cc628..7435528a1747 100644
--- a/include/net/sctp/structs.h
+++ b/include/net/sctp/structs.h
@@ -582,7 +582,6 @@ void sctp_datamsg_track(struct sctp_chunk *);
 void sctp_chunk_fail(struct sctp_chunk *, int error);
 int sctp_chunk_abandoned(struct sctp_chunk *);
 /* RFC2960 1.4 Key Terms
 *
 * o Chunk: A unit of information within an SCTP packet, consisting of
@@ -592,13 +591,8 @@ int sctp_chunk_abandoned(struct sctp_chunk *);
 * each chunk as well as a few other header pointers...
 */
 struct sctp_chunk {
-        /* These first three elements MUST PRECISELY match the first
+        struct list_head list;
-         * three elements of struct sk_buff.  This allows us to reuse
-         * all the skb_* queue management functions.
-         */
-        struct sctp_chunk *next;
-        struct sctp_chunk *prev;
-        struct sk_buff_head *list;
        atomic_t refcnt;
        /* This is our link to the per-transport transmitted list.  */
@@ -717,7 +711,7 @@ struct sctp_packet {
        __u32 vtag;
        /* This contains the payload chunks.  */
-        struct sk_buff_head chunks;
+        struct list_head chunk_list;
        /* This is the overhead of the sctp and ip headers. */
        size_t overhead;
@@ -974,7 +968,7 @@ struct sctp_inq {
        /* This is actually a queue of sctp_chunk each
         * containing a partially decoded packet.
         */
-        struct sk_buff_head in;
+        struct list_head in_chunk_list;
        /* This is the packet which is currently off the in queue and is
         * being worked on through the inbound chunk processing.
         */
@@ -1017,7 +1011,7 @@ struct sctp_outq {
        struct sctp_association *asoc;
        /* Data pending that has never been transmitted.  */
-        struct sk_buff_head out;
+        struct list_head out_chunk_list;
        unsigned out_qlen;      /* Total length of queued data chunks. */
@@ -1025,7 +1019,7 @@ struct sctp_outq {
        unsigned error;
        /* These are control chunks we want to send.  */
-        struct sk_buff_head control;
+        struct list_head control_chunk_list;
        /* These are chunks that have been sacked but are above the
         * CTSN, or cumulative tsn ack point.
@@ -1672,7 +1666,7 @@ struct sctp_association {
         *  which already resides in sctp_outq.  Please move this
         *  queue and its supporting logic down there.  --piggy]
         */
-        struct sk_buff_head addip_chunks;
+        struct list_head addip_chunk_list;
        /* ADDIP Section 4.1 ASCONF Chunk Procedures
         *
diff --git a/include/net/sock.h b/include/net/sock.h
index 7b76f891ae2d..a1042d08becd 100644
--- a/include/net/sock.h
+++ b/include/net/sock.h
@@ -684,16 +684,17 @@ extern void FASTCALL(release_sock(struct sock *sk));
 #define bh_lock_sock(__sk)      spin_lock(&((__sk)->sk_lock.slock))
 #define bh_unlock_sock(__sk)    spin_unlock(&((__sk)->sk_lock.slock))
-extern struct sock              *sk_alloc(int family, int priority,
+extern struct sock              *sk_alloc(int family,
+                                          unsigned int __nocast priority,
                                          struct proto *prot, int zero_it);
 extern void                     sk_free(struct sock *sk);
 extern struct sk_buff           *sock_wmalloc(struct sock *sk,
                                              unsigned long size, int force,
-                                              int priority);
+                                              unsigned int __nocast priority);
 extern struct sk_buff           *sock_rmalloc(struct sock *sk,
                                              unsigned long size, int force,
-                                              int priority);
+                                              unsigned int __nocast priority);
 extern void                     sock_wfree(struct sk_buff *skb);
 extern void                     sock_rfree(struct sk_buff *skb);
@@ -708,7 +709,8 @@ extern struct sk_buff 		*sock_alloc_send_skb(struct sock *sk,
                                                     unsigned long size,
                                                     int noblock,
                                                     int *errcode);
-extern void *sock_kmalloc(struct sock *sk, int size, int priority);
+extern void *sock_kmalloc(struct sock *sk, int size,
+                          unsigned int __nocast priority);
 extern void sock_kfree_s(struct sock *sk, void *mem, int size);
 extern void sk_send_sigurg(struct sock *sk);
@@ -1132,7 +1134,8 @@ static inline void sk_stream_moderate_sndbuf(struct sock *sk)
 }
 static inline struct sk_buff *sk_stream_alloc_pskb(struct sock *sk,
-                                                   int size, int mem, int gfp)
+                                                   int size, int mem,
+                                                   unsigned int __nocast gfp)
 {
        struct sk_buff *skb;
        int hdr_len;
@@ -1155,7 +1158,8 @@ static inline struct sk_buff *sk_stream_alloc_pskb(struct sock *sk,
 }
 static inline struct sk_buff *sk_stream_alloc_skb(struct sock *sk,
-                                                  int size, int gfp)
+                                                  int size,
+                                                  unsigned int __nocast gfp)
 {
        return sk_stream_alloc_pskb(sk, size, 0, gfp);
 }
@@ -1188,7 +1192,7 @@ static inline int sock_writeable(const struct sock *sk)
        return atomic_read(&sk->sk_wmem_alloc) < (sk->sk_sndbuf / 2);
 }
-static inline int gfp_any(void)
+static inline unsigned int __nocast gfp_any(void)
 {
        return in_softirq() ? GFP_ATOMIC : GFP_KERNEL;
 }
diff --git a/include/net/tcp.h b/include/net/tcp.h
index a166918ca56d..f4f9aba07ac2 100644
--- a/include/net/tcp.h
+++ b/include/net/tcp.h
@@ -860,7 +860,8 @@ extern void tcp_send_probe0(struct sock *);
 extern void tcp_send_partial(struct sock *);
 extern int  tcp_write_wakeup(struct sock *);
 extern void tcp_send_fin(struct sock *sk);
-extern void tcp_send_active_reset(struct sock *sk, int priority);
+extern void tcp_send_active_reset(struct sock *sk,
+                                  unsigned int __nocast priority);
 extern int  tcp_send_synack(struct sock *);
 extern void tcp_push_one(struct sock *, unsigned int mss_now);
 extern void tcp_send_ack(struct sock *sk);
@@ -991,7 +992,7 @@ static __inline__ void tcp_fast_path_on(struct tcp_sock *tp)
 static inline void tcp_fast_path_check(struct sock *sk, struct tcp_sock *tp)
 {
-        if (skb_queue_len(&tp->out_of_order_queue) == 0 &&
+        if (skb_queue_empty(&tp->out_of_order_queue) &&
            tp->rcv_wnd &&
            atomic_read(&sk->sk_rmem_alloc) < sk->sk_rcvbuf &&
            !tp->urg_data)
diff --git a/net/bluetooth/cmtp/core.c b/net/bluetooth/cmtp/core.c
index 2e341de3e763..901eff7ebe74 100644
--- a/net/bluetooth/cmtp/core.c
+++ b/net/bluetooth/cmtp/core.c
@@ -213,7 +213,7 @@ static int cmtp_send_frame(struct cmtp_session *session, unsigned char *data, in
        return kernel_sendmsg(sock, &msg, &iv, 1, len);
 }
-static int cmtp_process_transmit(struct cmtp_session *session)
+static void cmtp_process_transmit(struct cmtp_session *session)
 {
        struct sk_buff *skb, *nskb;
        unsigned char *hdr;
@@ -223,7 +223,7 @@ static int cmtp_process_transmit(struct cmtp_session *session)
        if (!(nskb = alloc_skb(session->mtu, GFP_ATOMIC))) {
                BT_ERR("Can't allocate memory for new frame");
-                return -ENOMEM;
+                return;
        }
        while ((skb = skb_dequeue(&session->transmit))) {
@@ -275,8 +275,6 @@ static int cmtp_process_transmit(struct cmtp_session *session)
        cmtp_send_frame(session, nskb->data, nskb->len);
        kfree_skb(nskb);
-        return skb_queue_len(&session->transmit);
 }
 static int cmtp_session(void *arg)
diff --git a/net/bluetooth/hidp/core.c b/net/bluetooth/hidp/core.c
index affbc55462e8..de8af5f42394 100644
--- a/net/bluetooth/hidp/core.c
+++ b/net/bluetooth/hidp/core.c
@@ -428,7 +428,7 @@ static int hidp_send_frame(struct socket *sock, unsigned char *data, int len)
        return kernel_sendmsg(sock, &msg, &iv, 1, len);
 }
-static int hidp_process_transmit(struct hidp_session *session)
+static void hidp_process_transmit(struct hidp_session *session)
 {
        struct sk_buff *skb;
@@ -453,9 +453,6 @@ static int hidp_process_transmit(struct hidp_session *session)
                hidp_set_timer(session);
                kfree_skb(skb);
        }
-        return skb_queue_len(&session->ctrl_transmit) +
-                                skb_queue_len(&session->intr_transmit);
 }
 static int hidp_session(void *arg)
diff --git a/net/bluetooth/rfcomm/sock.c b/net/bluetooth/rfcomm/sock.c
index f3f6355a2786..63a123c5c41b 100644
--- a/net/bluetooth/rfcomm/sock.c
+++ b/net/bluetooth/rfcomm/sock.c
@@ -590,8 +590,11 @@ static long rfcomm_sock_data_wait(struct sock *sk, long timeo)
        for (;;) {
                set_current_state(TASK_INTERRUPTIBLE);
-                if (skb_queue_len(&sk->sk_receive_queue) || sk->sk_err || (sk->sk_shutdown & RCV_SHUTDOWN) ||
+                if (!skb_queue_empty(&sk->sk_receive_queue) ||
-                                signal_pending(current) || !timeo)
+                    sk->sk_err ||
+                    (sk->sk_shutdown & RCV_SHUTDOWN) ||
+                    signal_pending(current) ||
+                    !timeo)
                        break;
                set_bit(SOCK_ASYNC_WAITDATA, &sk->sk_socket->flags);
diff --git a/net/bluetooth/rfcomm/tty.c b/net/bluetooth/rfcomm/tty.c
index 6d689200bcf3..6304590fd36a 100644
--- a/net/bluetooth/rfcomm/tty.c
+++ b/net/bluetooth/rfcomm/tty.c
@@ -781,7 +781,7 @@ static int rfcomm_tty_chars_in_buffer(struct tty_struct *tty)
        BT_DBG("tty %p dev %p", tty, dev);
-        if (skb_queue_len(&dlc->tx_queue))
+        if (!skb_queue_empty(&dlc->tx_queue))
                return dlc->mtu;
        return 0;
diff --git a/net/core/dev.c b/net/core/dev.c
index 7f5f62c65115..ff9dc029233a 100644
--- a/net/core/dev.c
+++ b/net/core/dev.c
@@ -1127,7 +1127,7 @@ static inline int illegal_highdma(struct net_device *dev, struct sk_buff *skb)
 extern void skb_release_data(struct sk_buff *);
 /* Keep head the same: replace data */
-int __skb_linearize(struct sk_buff *skb, int gfp_mask)
+int __skb_linearize(struct sk_buff *skb, unsigned int __nocast gfp_mask)
 {
        unsigned int size;
        u8 *data;
diff --git a/net/core/skbuff.c b/net/core/skbuff.c
index 733deee24b9f..d9f7b06fe886 100644
--- a/net/core/skbuff.c
+++ b/net/core/skbuff.c
@@ -129,7 +129,7 @@ void skb_under_panic(struct sk_buff *skb, int sz, void *here)
 *      Buffers may only be allocated from interrupts using a @gfp_mask of
 *      %GFP_ATOMIC.
 */
-struct sk_buff *alloc_skb(unsigned int size, int gfp_mask)
+struct sk_buff *alloc_skb(unsigned int size, unsigned int __nocast gfp_mask)
 {
        struct sk_buff *skb;
        u8 *data;
@@ -182,7 +182,8 @@ nodata:
 *      %GFP_ATOMIC.
 */
 struct sk_buff *alloc_skb_from_cache(kmem_cache_t *cp,
-                                     unsigned int size, int gfp_mask)
+                                     unsigned int size,
+                                     unsigned int __nocast gfp_mask)
 {
        struct sk_buff *skb;
        u8 *data;
@@ -322,7 +323,7 @@ void __kfree_skb(struct sk_buff *skb)
 *      %GFP_ATOMIC.
 */
-struct sk_buff *skb_clone(struct sk_buff *skb, int gfp_mask)
+struct sk_buff *skb_clone(struct sk_buff *skb, unsigned int __nocast gfp_mask)
 {
        struct sk_buff *n = kmem_cache_alloc(skbuff_head_cache, gfp_mask);
@@ -460,7 +461,7 @@ static void copy_skb_header(struct sk_buff *new, const struct sk_buff *old)
 *      header is going to be modified. Use pskb_copy() instead.
 */
-struct sk_buff *skb_copy(const struct sk_buff *skb, int gfp_mask)
+struct sk_buff *skb_copy(const struct sk_buff *skb, unsigned int __nocast gfp_mask)
 {
        int headerlen = skb->data - skb->head;
        /*
@@ -499,7 +500,7 @@ struct sk_buff *skb_copy(const struct sk_buff *skb, int gfp_mask)
 *      The returned buffer has a reference count of 1.
 */
-struct sk_buff *pskb_copy(struct sk_buff *skb, int gfp_mask)
+struct sk_buff *pskb_copy(struct sk_buff *skb, unsigned int __nocast gfp_mask)
 {
        /*
         *      Allocate the copy buffer
@@ -557,7 +558,8 @@ out:
 *      reloaded after call to this function.
 */
-int pskb_expand_head(struct sk_buff *skb, int nhead, int ntail, int gfp_mask)
+int pskb_expand_head(struct sk_buff *skb, int nhead, int ntail,
+                     unsigned int __nocast gfp_mask)
 {
        int i;
        u8 *data;
@@ -647,7 +649,8 @@ struct sk_buff *skb_realloc_headroom(struct sk_buff *skb, unsigned int headroom)
 *      only by netfilter in the cases when checksum is recalculated? --ANK
 */
 struct sk_buff *skb_copy_expand(const struct sk_buff *skb,
-                                int newheadroom, int newtailroom, int gfp_mask)
+                                int newheadroom, int newtailroom,
+                                unsigned int __nocast gfp_mask)
 {
        /*
         *      Allocate the copy buffer
diff --git a/net/core/sock.c b/net/core/sock.c
index a6ec3ada7f9e..8b35ccdc2b3b 100644
--- a/net/core/sock.c
+++ b/net/core/sock.c
@@ -622,7 +622,8 @@ lenout:
 *      @prot: struct proto associated with this new sock instance
 *      @zero_it: if we should zero the newly allocated sock
 */
-struct sock *sk_alloc(int family, int priority, struct proto *prot, int zero_it)
+struct sock *sk_alloc(int family, unsigned int __nocast priority,
+                      struct proto *prot, int zero_it)
 {
        struct sock *sk = NULL;
        kmem_cache_t *slab = prot->slab;
@@ -750,7 +751,8 @@ unsigned long sock_i_ino(struct sock *sk)
 /*
 * Allocate a skb from the socket's send buffer.
 */
-struct sk_buff *sock_wmalloc(struct sock *sk, unsigned long size, int force, int priority)
+struct sk_buff *sock_wmalloc(struct sock *sk, unsigned long size, int force,
+                             unsigned int __nocast priority)
 {
        if (force || atomic_read(&sk->sk_wmem_alloc) < sk->sk_sndbuf) {
                struct sk_buff * skb = alloc_skb(size, priority);
@@ -765,7 +767,8 @@ struct sk_buff *sock_wmalloc(struct sock *sk, unsigned long size, int force, int
 /*
 * Allocate a skb from the socket's receive buffer.
 */ 
-struct sk_buff *sock_rmalloc(struct sock *sk, unsigned long size, int force, int priority)
+struct sk_buff *sock_rmalloc(struct sock *sk, unsigned long size, int force,
+                             unsigned int __nocast priority)
 {
        if (force || atomic_read(&sk->sk_rmem_alloc) < sk->sk_rcvbuf) {
                struct sk_buff *skb = alloc_skb(size, priority);
@@ -780,7 +783,7 @@ struct sk_buff *sock_rmalloc(struct sock *sk, unsigned long size, int force, int
 /* 
 * Allocate a memory block from the socket's option memory buffer.
 */ 
-void *sock_kmalloc(struct sock *sk, int size, int priority)
+void *sock_kmalloc(struct sock *sk, int size, unsigned int __nocast priority)
 {
        if ((unsigned)size <= sysctl_optmem_max &&
            atomic_read(&sk->sk_omem_alloc) + size < sysctl_optmem_max) {
diff --git a/net/decnet/af_decnet.c b/net/decnet/af_decnet.c
index 29bb3cd21965..96a02800cd28 100644
--- a/net/decnet/af_decnet.c
+++ b/net/decnet/af_decnet.c
@@ -536,7 +536,7 @@ static void dn_keepalive(struct sock *sk)
         * we are double checking that we are not sending too
         * many of these keepalive frames.
         */
-        if (skb_queue_len(&scp->other_xmit_queue) == 0)
+        if (skb_queue_empty(&scp->other_xmit_queue))
                dn_nsp_send_link(sk, DN_NOCHANGE, 0);
 }
@@ -1191,7 +1191,7 @@ static unsigned int dn_poll(struct file *file, struct socket *sock, poll_table
        struct dn_scp *scp = DN_SK(sk);
        int mask = datagram_poll(file, sock, wait);
-        if (skb_queue_len(&scp->other_receive_queue))
+        if (!skb_queue_empty(&scp->other_receive_queue))
                mask |= POLLRDBAND;
        return mask;
@@ -1214,7 +1214,7 @@ static int dn_ioctl(struct socket *sock, unsigned int cmd, unsigned long arg)
        case SIOCATMARK:
                lock_sock(sk);
-                val = (skb_queue_len(&scp->other_receive_queue) != 0);
+                val = !skb_queue_empty(&scp->other_receive_queue);
                if (scp->state != DN_RUN)
                        val = -ENOTCONN;
                release_sock(sk);
@@ -1630,7 +1630,7 @@ static int dn_data_ready(struct sock *sk, struct sk_buff_head *q, int flags, int
        int len = 0;
        if (flags & MSG_OOB)
-                return skb_queue_len(q) ? 1 : 0;
+                return !skb_queue_empty(q) ? 1 : 0;
        while(skb != (struct sk_buff *)q) {
                struct dn_skb_cb *cb = DN_SKB_CB(skb);
@@ -1707,7 +1707,7 @@ static int dn_recvmsg(struct kiocb *iocb, struct socket *sock,
                if (sk->sk_err)
                        goto out;
-                if (skb_queue_len(&scp->other_receive_queue)) {
+                if (!skb_queue_empty(&scp->other_receive_queue)) {
                        if (!(flags & MSG_OOB)) {
                                msg->msg_flags |= MSG_OOB;
                                if (!scp->other_report) {
diff --git a/net/decnet/dn_nsp_out.c b/net/decnet/dn_nsp_out.c
index 42abbf3f524f..8cce1fdbda90 100644
--- a/net/decnet/dn_nsp_out.c
+++ b/net/decnet/dn_nsp_out.c
@@ -342,7 +342,8 @@ int dn_nsp_xmit_timeout(struct sock *sk)
        dn_nsp_output(sk);
-        if (skb_queue_len(&scp->data_xmit_queue) || skb_queue_len(&scp->other_xmit_queue))
+        if (!skb_queue_empty(&scp->data_xmit_queue) ||
+            !skb_queue_empty(&scp->other_xmit_queue))
                scp->persist = dn_nsp_persist(sk);
        return 0;
diff --git a/net/ipv4/icmp.c b/net/ipv4/icmp.c
index cb759484979d..279f57abfecb 100644
--- a/net/ipv4/icmp.c
+++ b/net/ipv4/icmp.c
@@ -970,7 +970,8 @@ int icmp_rcv(struct sk_buff *skb)
                 *      RFC 1122: 3.2.2.8 An ICMP_TIMESTAMP MAY be silently
                 *        discarded if to broadcast/multicast.
                 */
-                if (icmph->type == ICMP_ECHO &&
+                if ((icmph->type == ICMP_ECHO ||
+                     icmph->type == ICMP_TIMESTAMP) &&
                    sysctl_icmp_echo_ignore_broadcasts) {
                        goto error;
                }
diff --git a/net/ipv4/igmp.c b/net/ipv4/igmp.c
index 1f3183168a90..5088f90835ae 100644
--- a/net/ipv4/igmp.c
+++ b/net/ipv4/igmp.c
@@ -1615,9 +1615,10 @@ int ip_mc_join_group(struct sock *sk , struct ip_mreqn *imr)
 {
        int err;
        u32 addr = imr->imr_multiaddr.s_addr;
-        struct ip_mc_socklist *iml, *i;
+        struct ip_mc_socklist *iml=NULL, *i;
        struct in_device *in_dev;
        struct inet_sock *inet = inet_sk(sk);
+        int ifindex;
        int count = 0;
        if (!MULTICAST(addr))
@@ -1633,37 +1634,30 @@ int ip_mc_join_group(struct sock *sk , struct ip_mreqn *imr)
                goto done;
        }
-        iml = (struct ip_mc_socklist *)sock_kmalloc(sk, sizeof(*iml), GFP_KERNEL);
        err = -EADDRINUSE;
+        ifindex = imr->imr_ifindex;
        for (i = inet->mc_list; i; i = i->next) {
-                if (memcmp(&i->multi, imr, sizeof(*imr)) == 0) {
+                if (i->multi.imr_multiaddr.s_addr == addr &&
-                        /* New style additions are reference counted */
+                    i->multi.imr_ifindex == ifindex)
-                        if (imr->imr_address.s_addr == 0) {
-                                i->count++;
-                                err = 0;
-                        }
                        goto done;
-                }
                count++;
        }
        err = -ENOBUFS;
-        if (iml == NULL || count >= sysctl_igmp_max_memberships)
+        if (count >= sysctl_igmp_max_memberships)
+                goto done;
+        iml = (struct ip_mc_socklist *)sock_kmalloc(sk,sizeof(*iml),GFP_KERNEL);
+        if (iml == NULL)
                goto done;
        memcpy(&iml->multi, imr, sizeof(*imr));
        iml->next = inet->mc_list;
-        iml->count = 1;
        iml->sflist = NULL;
        iml->sfmode = MCAST_EXCLUDE;
        inet->mc_list = iml;
        ip_mc_inc_group(in_dev, addr);
-        iml = NULL;
        err = 0;
 done:
        rtnl_shunlock();
-        if (iml)
-                sock_kfree_s(sk, iml, sizeof(*iml));
        return err;
 }
@@ -1693,30 +1687,25 @@ int ip_mc_leave_group(struct sock *sk, struct ip_mreqn *imr)
 {
        struct inet_sock *inet = inet_sk(sk);
        struct ip_mc_socklist *iml, **imlp;
+        struct in_device *in_dev;
+        u32 group = imr->imr_multiaddr.s_addr;
+        u32 ifindex;
        rtnl_lock();
+        in_dev = ip_mc_find_dev(imr);
+        if (!in_dev) {
+                rtnl_unlock();
+                return -ENODEV;
+        }
+        ifindex = imr->imr_ifindex;
        for (imlp = &inet->mc_list; (iml = *imlp) != NULL; imlp = &iml->next) {
-                if (iml->multi.imr_multiaddr.s_addr==imr->imr_multiaddr.s_addr &&
+                if (iml->multi.imr_multiaddr.s_addr == group &&
-                    iml->multi.imr_address.s_addr==imr->imr_address.s_addr &&
+                    iml->multi.imr_ifindex == ifindex) {
-                    (!imr->imr_ifindex || iml->multi.imr_ifindex==imr->imr_ifindex)) {
+                        (void) ip_mc_leave_src(sk, iml, in_dev);
-                        struct in_device *in_dev;
-                        in_dev = inetdev_by_index(iml->multi.imr_ifindex);
-                        if (in_dev)
-                                (void) ip_mc_leave_src(sk, iml, in_dev);
-                        if (--iml->count) {
-                                rtnl_unlock();
-                                if (in_dev)
-                                        in_dev_put(in_dev);
-                                return 0;
-                        }
                        *imlp = iml->next;
-                        if (in_dev) {
+                        ip_mc_dec_group(in_dev, group);
-                                ip_mc_dec_group(in_dev, imr->imr_multiaddr.s_addr);
-                                in_dev_put(in_dev);
-                        }
                        rtnl_unlock();
                        sock_kfree_s(sk, iml, sizeof(*iml));
                        return 0;
@@ -1736,6 +1725,7 @@ int ip_mc_source(int add, int omode, struct sock *sk, struct
        struct in_device *in_dev = NULL;
        struct inet_sock *inet = inet_sk(sk);
        struct ip_sf_socklist *psl;
+        int leavegroup = 0;
        int i, j, rv;
        if (!MULTICAST(addr))
@@ -1755,15 +1745,20 @@ int ip_mc_source(int add, int omode, struct sock *sk, struct
        err = -EADDRNOTAVAIL;
        for (pmc=inet->mc_list; pmc; pmc=pmc->next) {
-                if (memcmp(&pmc->multi, mreqs, 2*sizeof(__u32)) == 0)
+                if (pmc->multi.imr_multiaddr.s_addr == imr.imr_multiaddr.s_addr
+                    && pmc->multi.imr_ifindex == imr.imr_ifindex)
                        break;
        }
-        if (!pmc)               /* must have a prior join */
+        if (!pmc) {             /* must have a prior join */
+                err = -EINVAL;
                goto done;
+        }
        /* if a source filter was set, must be the same mode as before */
        if (pmc->sflist) {
-                if (pmc->sfmode != omode)
+                if (pmc->sfmode != omode) {
+                        err = -EINVAL;
                        goto done;
+                }
        } else if (pmc->sfmode != omode) {
                /* allow mode switches for empty-set filters */
                ip_mc_add_src(in_dev, &mreqs->imr_multiaddr, omode, 0, NULL, 0);
@@ -1775,7 +1770,7 @@ int ip_mc_source(int add, int omode, struct sock *sk, struct
        psl = pmc->sflist;
        if (!add) {
                if (!psl)
-                        goto done;
+                        goto done;      /* err = -EADDRNOTAVAIL */
                rv = !0;
                for (i=0; i<psl->sl_count; i++) {
                        rv = memcmp(&psl->sl_addr[i], &mreqs->imr_sourceaddr,
@@ -1784,7 +1779,13 @@ int ip_mc_source(int add, int omode, struct sock *sk, struct
                                break;
                }
                if (rv)         /* source not found */
+                        goto done;      /* err = -EADDRNOTAVAIL */
+                /* special case - (INCLUDE, empty) == LEAVE_GROUP */
+                if (psl->sl_count == 1 && omode == MCAST_INCLUDE) {
+                        leavegroup = 1;
                        goto done;
+                }
                /* update the interface filter */
                ip_mc_del_src(in_dev, &mreqs->imr_multiaddr, omode, 1, 
@@ -1842,18 +1843,21 @@ int ip_mc_source(int add, int omode, struct sock *sk, struct
                &mreqs->imr_sourceaddr, 1);
 done:
        rtnl_shunlock();
+        if (leavegroup)
+                return ip_mc_leave_group(sk, &imr);
        return err;
 }
 int ip_mc_msfilter(struct sock *sk, struct ip_msfilter *msf, int ifindex)
 {
-        int err;
+        int err = 0;
        struct ip_mreqn imr;
        u32 addr = msf->imsf_multiaddr;
        struct ip_mc_socklist *pmc;
        struct in_device *in_dev;
        struct inet_sock *inet = inet_sk(sk);
        struct ip_sf_socklist *newpsl, *psl;
+        int leavegroup = 0;
        if (!MULTICAST(addr))
                return -EINVAL;
@@ -1872,15 +1876,22 @@ int ip_mc_msfilter(struct sock *sk, struct ip_msfilter *msf, int ifindex)
                err = -ENODEV;
                goto done;
        }
-        err = -EADDRNOTAVAIL;
+        /* special case - (INCLUDE, empty) == LEAVE_GROUP */
+        if (msf->imsf_fmode == MCAST_INCLUDE && msf->imsf_numsrc == 0) {
+                leavegroup = 1;
+                goto done;
+        }
        for (pmc=inet->mc_list; pmc; pmc=pmc->next) {
                if (pmc->multi.imr_multiaddr.s_addr == msf->imsf_multiaddr &&
                    pmc->multi.imr_ifindex == imr.imr_ifindex)
                        break;
        }
-        if (!pmc)               /* must have a prior join */
+        if (!pmc) {             /* must have a prior join */
+                err = -EINVAL;
                goto done;
+        }
        if (msf->imsf_numsrc) {
                newpsl = (struct ip_sf_socklist *)sock_kmalloc(sk,
                                IP_SFLSIZE(msf->imsf_numsrc), GFP_KERNEL);
@@ -1909,8 +1920,11 @@ int ip_mc_msfilter(struct sock *sk, struct ip_msfilter *msf, int ifindex)
                        0, NULL, 0);
        pmc->sflist = newpsl;
        pmc->sfmode = msf->imsf_fmode;
+        err = 0;
 done:
        rtnl_shunlock();
+        if (leavegroup)
+                err = ip_mc_leave_group(sk, &imr);
        return err;
 }
diff --git a/net/ipv4/ip_sockglue.c b/net/ipv4/ip_sockglue.c
index f8b172f89811..fc7c481d0d79 100644
--- a/net/ipv4/ip_sockglue.c
+++ b/net/ipv4/ip_sockglue.c
@@ -677,11 +677,11 @@ int ip_setsockopt(struct sock *sk, int level, int optname, char __user *optval,
                                mreq.imr_address.s_addr = mreqs.imr_interface;
                                mreq.imr_ifindex = 0;
                                err = ip_mc_join_group(sk, &mreq);
-                                if (err)
+                                if (err && err != -EADDRINUSE)
                                        break;
                                omode = MCAST_INCLUDE;
                                add = 1;
-                        } else /*IP_DROP_SOURCE_MEMBERSHIP */ {
+                        } else /* IP_DROP_SOURCE_MEMBERSHIP */ {
                                omode = MCAST_INCLUDE;
                                add = 0;
                        }
@@ -754,7 +754,7 @@ int ip_setsockopt(struct sock *sk, int level, int optname, char __user *optval,
                                mreq.imr_address.s_addr = 0;
                                mreq.imr_ifindex = greqs.gsr_interface;
                                err = ip_mc_join_group(sk, &mreq);
-                                if (err)
+                                if (err && err != -EADDRINUSE)
                                        break;
                                greqs.gsr_interface = mreq.imr_ifindex;
                                omode = MCAST_INCLUDE;
diff --git a/net/ipv4/tcp.c b/net/ipv4/tcp.c
index 29894c749163..ddb6ce4ecff2 100644
--- a/net/ipv4/tcp.c
+++ b/net/ipv4/tcp.c
@@ -1105,7 +1105,7 @@ static void tcp_prequeue_process(struct sock *sk)
        struct sk_buff *skb;
        struct tcp_sock *tp = tcp_sk(sk);
-        NET_ADD_STATS_USER(LINUX_MIB_TCPPREQUEUED, skb_queue_len(&tp->ucopy.prequeue));
+        NET_INC_STATS_USER(LINUX_MIB_TCPPREQUEUED);
        /* RX process wants to run with disabled BHs, though it is not
         * necessary */
@@ -1369,7 +1369,7 @@ int tcp_recvmsg(struct kiocb *iocb, struct sock *sk, struct msghdr *msg,
                         * is not empty. It is more elegant, but eats cycles,
                         * unfortunately.
                         */
-                        if (skb_queue_len(&tp->ucopy.prequeue))
+                        if (!skb_queue_empty(&tp->ucopy.prequeue))
                                goto do_prequeue;
                        /* __ Set realtime policy in scheduler __ */
@@ -1394,7 +1394,7 @@ int tcp_recvmsg(struct kiocb *iocb, struct sock *sk, struct msghdr *msg,
                        }
                        if (tp->rcv_nxt == tp->copied_seq &&
-                            skb_queue_len(&tp->ucopy.prequeue)) {
+                            !skb_queue_empty(&tp->ucopy.prequeue)) {
 do_prequeue:
                                tcp_prequeue_process(sk);
@@ -1476,7 +1476,7 @@ skip_copy:
        } while (len > 0);
        if (user_recv) {
-                if (skb_queue_len(&tp->ucopy.prequeue)) {
+                if (!skb_queue_empty(&tp->ucopy.prequeue)) {
                        int chunk;
                        tp->ucopy.len = copied > 0 ? len : 0;
diff --git a/net/ipv4/tcp_input.c b/net/ipv4/tcp_input.c
index 8de2f1071c2b..53a8a5399f1e 100644
--- a/net/ipv4/tcp_input.c
+++ b/net/ipv4/tcp_input.c
@@ -2802,7 +2802,7 @@ static void tcp_sack_remove(struct tcp_sock *tp)
        int this_sack;
        /* Empty ofo queue, hence, all the SACKs are eaten. Clear. */
-        if (skb_queue_len(&tp->out_of_order_queue) == 0) {
+        if (skb_queue_empty(&tp->out_of_order_queue)) {
                tp->rx_opt.num_sacks = 0;
                tp->rx_opt.eff_sacks = tp->rx_opt.dsack;
                return;
@@ -2935,13 +2935,13 @@ queue_and_out:
                if(th->fin)
                        tcp_fin(skb, sk, th);
-                if (skb_queue_len(&tp->out_of_order_queue)) {
+                if (!skb_queue_empty(&tp->out_of_order_queue)) {
                        tcp_ofo_queue(sk);
                        /* RFC2581. 4.2. SHOULD send immediate ACK, when
                         * gap in queue is filled.
                         */
-                        if (!skb_queue_len(&tp->out_of_order_queue))
+                        if (skb_queue_empty(&tp->out_of_order_queue))
                                tp->ack.pingpong = 0;
                }
@@ -3249,9 +3249,8 @@ static int tcp_prune_queue(struct sock *sk)
         * This must not ever occur. */
        /* First, purge the out_of_order queue. */
-        if (skb_queue_len(&tp->out_of_order_queue)) {
+        if (!skb_queue_empty(&tp->out_of_order_queue)) {
-                NET_ADD_STATS_BH(LINUX_MIB_OFOPRUNED, 
+                NET_INC_STATS_BH(LINUX_MIB_OFOPRUNED);
-                                 skb_queue_len(&tp->out_of_order_queue));
                __skb_queue_purge(&tp->out_of_order_queue);
                /* Reset SACK state.  A conforming SACK implementation will
diff --git a/net/ipv4/tcp_output.c b/net/ipv4/tcp_output.c
index e041d057ec86..e3f8ea1bfa9c 100644
--- a/net/ipv4/tcp_output.c
+++ b/net/ipv4/tcp_output.c
@@ -1613,7 +1613,7 @@ void tcp_send_fin(struct sock *sk)
 * was unread data in the receive queue.  This behavior is recommended
 * by draft-ietf-tcpimpl-prob-03.txt section 3.10.  -DaveM
 */
-void tcp_send_active_reset(struct sock *sk, int priority)
+void tcp_send_active_reset(struct sock *sk, unsigned int __nocast priority)
 {
        struct tcp_sock *tp = tcp_sk(sk);
        struct sk_buff *skb;
diff --git a/net/ipv4/tcp_timer.c b/net/ipv4/tcp_timer.c
index b127b4498565..0084227438c2 100644
--- a/net/ipv4/tcp_timer.c
+++ b/net/ipv4/tcp_timer.c
@@ -231,11 +231,10 @@ static void tcp_delack_timer(unsigned long data)
        }
        tp->ack.pending &= ~TCP_ACK_TIMER;
-        if (skb_queue_len(&tp->ucopy.prequeue)) {
+        if (!skb_queue_empty(&tp->ucopy.prequeue)) {
                struct sk_buff *skb;
-                NET_ADD_STATS_BH(LINUX_MIB_TCPSCHEDULERFAILED, 
+                NET_INC_STATS_BH(LINUX_MIB_TCPSCHEDULERFAILED);
-                                 skb_queue_len(&tp->ucopy.prequeue));
                while ((skb = __skb_dequeue(&tp->ucopy.prequeue)) != NULL)
                        sk->sk_backlog_rcv(sk, skb);
diff --git a/net/ipv6/mcast.c b/net/ipv6/mcast.c
index 562fcd14fdea..29fed6e58d0a 100644
--- a/net/ipv6/mcast.c
+++ b/net/ipv6/mcast.c
@@ -281,7 +281,7 @@ int ipv6_sock_mc_drop(struct sock *sk, int ifindex, struct in6_addr *addr)
        }
        write_unlock_bh(&ipv6_sk_mc_lock);
-        return -ENOENT;
+        return -EADDRNOTAVAIL;
 }
 static struct inet6_dev *ip6_mc_find_dev(struct in6_addr *group, int ifindex)
@@ -386,12 +386,16 @@ int ip6_mc_source(int add, int omode, struct sock *sk,
                if (ipv6_addr_equal(&pmc->addr, group))
                        break;
        }
-        if (!pmc)               /* must have a prior join */
+        if (!pmc) {             /* must have a prior join */
+                err = -EINVAL;
                goto done;
+        }
        /* if a source filter was set, must be the same mode as before */
        if (pmc->sflist) {
-                if (pmc->sfmode != omode)
+                if (pmc->sfmode != omode) {
+                        err = -EINVAL;
                        goto done;
+                }
        } else if (pmc->sfmode != omode) {
                /* allow mode switches for empty-set filters */
                ip6_mc_add_src(idev, group, omode, 0, NULL, 0);
@@ -402,7 +406,7 @@ int ip6_mc_source(int add, int omode, struct sock *sk,
        psl = pmc->sflist;
        if (!add) {
                if (!psl)
-                        goto done;
+                        goto done;      /* err = -EADDRNOTAVAIL */
                rv = !0;
                for (i=0; i<psl->sl_count; i++) {
                        rv = memcmp(&psl->sl_addr[i], source,
@@ -411,7 +415,7 @@ int ip6_mc_source(int add, int omode, struct sock *sk,
                                break;
                }
                if (rv)         /* source not found */
-                        goto done;
+                        goto done;      /* err = -EADDRNOTAVAIL */
                /* special case - (INCLUDE, empty) == LEAVE_GROUP */
                if (psl->sl_count == 1 && omode == MCAST_INCLUDE) {
@@ -488,6 +492,7 @@ int ip6_mc_msfilter(struct sock *sk, struct group_filter *gsf)
        struct inet6_dev *idev;
        struct ipv6_pinfo *inet6 = inet6_sk(sk);
        struct ip6_sf_socklist *newpsl, *psl;
+        int leavegroup = 0;
        int i, err;
        group = &((struct sockaddr_in6 *)&gsf->gf_group)->sin6_addr;
@@ -503,7 +508,12 @@ int ip6_mc_msfilter(struct sock *sk, struct group_filter *gsf)
        if (!idev)
                return -ENODEV;
        dev = idev->dev;
-        err = -EADDRNOTAVAIL;
+        err = 0;
+        if (gsf->gf_fmode == MCAST_INCLUDE && gsf->gf_numsrc == 0) {
+                leavegroup = 1;
+                goto done;
+        }
        for (pmc=inet6->ipv6_mc_list; pmc; pmc=pmc->next) {
                if (pmc->ifindex != gsf->gf_interface)
@@ -511,8 +521,10 @@ int ip6_mc_msfilter(struct sock *sk, struct group_filter *gsf)
                if (ipv6_addr_equal(&pmc->addr, group))
                        break;
        }
-        if (!pmc)               /* must have a prior join */
+        if (!pmc) {             /* must have a prior join */
+                err = -EINVAL;
                goto done;
+        }
        if (gsf->gf_numsrc) {
                newpsl = (struct ip6_sf_socklist *)sock_kmalloc(sk,
                                IP6_SFLSIZE(gsf->gf_numsrc), GFP_ATOMIC);
@@ -544,10 +556,13 @@ int ip6_mc_msfilter(struct sock *sk, struct group_filter *gsf)
                (void) ip6_mc_del_src(idev, group, pmc->sfmode, 0, NULL, 0);
        pmc->sflist = newpsl;
        pmc->sfmode = gsf->gf_fmode;
+        err = 0;
 done:
        read_unlock_bh(&idev->lock);
        in6_dev_put(idev);
        dev_put(dev);
+        if (leavegroup)
+                err = ipv6_sock_mc_drop(sk, gsf->gf_interface, group);
        return err;
 }
diff --git a/net/irda/irlap.c b/net/irda/irlap.c
index 046ad0750e48..7029618f5719 100644
--- a/net/irda/irlap.c
+++ b/net/irda/irlap.c
@@ -445,9 +445,8 @@ void irlap_disconnect_request(struct irlap_cb *self)
        IRDA_ASSERT(self->magic == LAP_MAGIC, return;);
        /* Don't disconnect until all data frames are successfully sent */
-        if (skb_queue_len(&self->txq) > 0) {
+        if (!skb_queue_empty(&self->txq)) {
                self->disconnect_pending = TRUE;
                return;
        }
diff --git a/net/irda/irlap_event.c b/net/irda/irlap_event.c
index 1cd89f5f3b75..a505b5457608 100644
--- a/net/irda/irlap_event.c
+++ b/net/irda/irlap_event.c
@@ -191,7 +191,7 @@ static void irlap_start_poll_timer(struct irlap_cb *self, int timeout)
         * Send out the RR frames faster if our own transmit queue is empty, or
         * if the peer is busy. The effect is a much faster conversation
         */
-        if ((skb_queue_len(&self->txq) == 0) || (self->remote_busy)) {
+        if (skb_queue_empty(&self->txq) || self->remote_busy) {
                if (self->fast_RR == TRUE) {
                        /*
                         *  Assert that the fast poll timer has not reached the
@@ -263,7 +263,7 @@ void irlap_do_event(struct irlap_cb *self, IRLAP_EVENT event,
                IRDA_DEBUG(2, "%s() : queue len = %d\n", __FUNCTION__,
                           skb_queue_len(&self->txq));
-                if (skb_queue_len(&self->txq)) {
+                if (!skb_queue_empty(&self->txq)) {
                        /* Prevent race conditions with irlap_data_request() */
                        self->local_busy = TRUE;
@@ -1074,7 +1074,7 @@ static int irlap_state_xmit_p(struct irlap_cb *self, IRLAP_EVENT event,
 #else   /* CONFIG_IRDA_DYNAMIC_WINDOW */
                        /* Window has been adjusted for the max packet
                         * size, so much simpler... - Jean II */
-                        nextfit = (skb_queue_len(&self->txq) > 0);
+                        nextfit = !skb_queue_empty(&self->txq);
 #endif  /* CONFIG_IRDA_DYNAMIC_WINDOW */
                        /*
                         *  Send data with poll bit cleared only if window > 1
@@ -1814,7 +1814,7 @@ static int irlap_state_xmit_s(struct irlap_cb *self, IRLAP_EVENT event,
 #else   /* CONFIG_IRDA_DYNAMIC_WINDOW */
                        /* Window has been adjusted for the max packet
                         * size, so much simpler... - Jean II */
-                        nextfit = (skb_queue_len(&self->txq) > 0);
+                        nextfit = !skb_queue_empty(&self->txq);
 #endif /* CONFIG_IRDA_DYNAMIC_WINDOW */
                        /*
                         *  Send data with final bit cleared only if window > 1
@@ -1937,7 +1937,7 @@ static int irlap_state_nrm_s(struct irlap_cb *self, IRLAP_EVENT event,
                                irlap_data_indication(self, skb, FALSE);
                                /* Any pending data requests?  */
-                                if ((skb_queue_len(&self->txq) > 0) &&
+                                if (!skb_queue_empty(&self->txq) &&
                                    (self->window > 0))
                                {
                                        self->ack_required = TRUE;
@@ -2038,7 +2038,7 @@ static int irlap_state_nrm_s(struct irlap_cb *self, IRLAP_EVENT event,
                        /*
                         *  Any pending data requests?
                         */
-                        if ((skb_queue_len(&self->txq) > 0) &&
+                        if (!skb_queue_empty(&self->txq) &&
                            (self->window > 0) && !self->remote_busy)
                        {
                                irlap_data_indication(self, skb, TRUE);
@@ -2069,7 +2069,7 @@ static int irlap_state_nrm_s(struct irlap_cb *self, IRLAP_EVENT event,
                 */
                nr_status = irlap_validate_nr_received(self, info->nr);
                if (nr_status == NR_EXPECTED) {
-                        if ((skb_queue_len( &self->txq) > 0) &&
+                        if (!skb_queue_empty(&self->txq) &&
                            (self->window > 0)) {
                                self->remote_busy = FALSE;
diff --git a/net/irda/irlap_frame.c b/net/irda/irlap_frame.c
index 040abe714aa3..6dafbb43b529 100644
--- a/net/irda/irlap_frame.c
+++ b/net/irda/irlap_frame.c
@@ -1018,11 +1018,10 @@ void irlap_resend_rejected_frames(struct irlap_cb *self, int command)
        /*
         *  We can now fill the window with additional data frames
         */
-        while (skb_queue_len( &self->txq) > 0) {
+        while (!skb_queue_empty(&self->txq)) {
                IRDA_DEBUG(0, "%s(), sending additional frames!\n", __FUNCTION__);
-                if ((skb_queue_len( &self->txq) > 0) &&
+                if (self->window > 0) {
-                    (self->window > 0)) {
                        skb = skb_dequeue( &self->txq);
                        IRDA_ASSERT(skb != NULL, return;);
@@ -1031,8 +1030,7 @@ void irlap_resend_rejected_frames(struct irlap_cb *self, int command)
                         *  bit cleared
                         */
                        if ((self->window > 1) &&
-                            skb_queue_len(&self->txq) > 0)
+                            !skb_queue_empty(&self->txq)) {
-                        {
                                irlap_send_data_primary(self, skb);
                        } else {
                                irlap_send_data_primary_poll(self, skb);
diff --git a/net/irda/irttp.c b/net/irda/irttp.c
index d091ccf773b3..6602d901f8b1 100644
--- a/net/irda/irttp.c
+++ b/net/irda/irttp.c
@@ -1513,7 +1513,7 @@ int irttp_disconnect_request(struct tsap_cb *self, struct sk_buff *userdata,
        /*
         *  Check if there is still data segments in the transmit queue
         */
-        if (skb_queue_len(&self->tx_queue) > 0) {
+        if (!skb_queue_empty(&self->tx_queue)) {
                if (priority == P_HIGH) {
                        /*
                         *  No need to send the queued data, if we are
diff --git a/net/llc/llc_c_ev.c b/net/llc/llc_c_ev.c
index cd130c3b72bc..d5bdb53a348f 100644
--- a/net/llc/llc_c_ev.c
+++ b/net/llc/llc_c_ev.c
@@ -84,7 +84,7 @@ static u16 llc_util_nr_inside_tx_window(struct sock *sk, u8 nr)
        if (llc->dev->flags & IFF_LOOPBACK)
                goto out;
        rc = 1;
-        if (!skb_queue_len(&llc->pdu_unack_q))
+        if (skb_queue_empty(&llc->pdu_unack_q))
                goto out;
        skb = skb_peek(&llc->pdu_unack_q);
        pdu = llc_pdu_sn_hdr(skb);
diff --git a/net/netlink/af_netlink.c b/net/netlink/af_netlink.c
index fc456a7aaec3..3405fdf41b93 100644
--- a/net/netlink/af_netlink.c
+++ b/net/netlink/af_netlink.c
@@ -858,7 +858,7 @@ static inline void netlink_rcv_wake(struct sock *sk)
 {
        struct netlink_sock *nlk = nlk_sk(sk);
-        if (!skb_queue_len(&sk->sk_receive_queue))
+        if (skb_queue_empty(&sk->sk_receive_queue))
                clear_bit(0, &nlk->state);
        if (!test_bit(0, &nlk->state))
                wake_up_interruptible(&nlk->wait);
diff --git a/net/sched/sch_red.c b/net/sched/sch_red.c
index 664d0e47374f..7845d045eec4 100644
--- a/net/sched/sch_red.c
+++ b/net/sched/sch_red.c
@@ -385,7 +385,7 @@ static int red_change(struct Qdisc *sch, struct rtattr *opt)
        memcpy(q->Stab, RTA_DATA(tb[TCA_RED_STAB-1]), 256);
        q->qcount = -1;
-        if (skb_queue_len(&sch->q) == 0)
+        if (skb_queue_empty(&sch->q))
                PSCHED_SET_PASTPERFECT(q->qidlestart);
        sch_tree_unlock(sch);
        return 0;
diff --git a/net/sctp/associola.c b/net/sctp/associola.c
index 7ae6aa772dab..4b47dd6f2485 100644
--- a/net/sctp/associola.c
+++ b/net/sctp/associola.c
@@ -203,7 +203,7 @@ static struct sctp_association *sctp_association_init(struct sctp_association *a
         */
        asoc->addip_serial = asoc->c.initial_tsn;
-        skb_queue_head_init(&asoc->addip_chunks);
+        INIT_LIST_HEAD(&asoc->addip_chunk_list);
        /* Make an empty list of remote transport addresses.  */
        INIT_LIST_HEAD(&asoc->peer.transport_addr_list);
diff --git a/net/sctp/input.c b/net/sctp/input.c
index 339f7acfdb64..5e085e041a6e 100644
--- a/net/sctp/input.c
+++ b/net/sctp/input.c
@@ -115,6 +115,17 @@ static void sctp_rcv_set_owner_r(struct sk_buff *skb, struct sock *sk)
        atomic_add(sizeof(struct sctp_chunk),&sk->sk_rmem_alloc);
 }
+struct sctp_input_cb {
+        union {
+                struct inet_skb_parm    h4;
+#if defined(CONFIG_IPV6) || defined (CONFIG_IPV6_MODULE)
+                struct inet6_skb_parm   h6;
+#endif
+        } header;
+        struct sctp_chunk *chunk;
+};
+#define SCTP_INPUT_CB(__skb)    ((struct sctp_input_cb *)&((__skb)->cb[0]))
 /*
 * This is the routine which IP calls when receiving an SCTP packet.
 */
@@ -243,6 +254,7 @@ int sctp_rcv(struct sk_buff *skb)
                ret = -ENOMEM;
                goto discard_release;
        }
+        SCTP_INPUT_CB(skb)->chunk = chunk;
        sctp_rcv_set_owner_r(skb,sk);
@@ -265,9 +277,9 @@ int sctp_rcv(struct sk_buff *skb)
        sctp_bh_lock_sock(sk);
        if (sock_owned_by_user(sk))
-                sk_add_backlog(sk, (struct sk_buff *) chunk);
+                sk_add_backlog(sk, skb);
        else
-                sctp_backlog_rcv(sk, (struct sk_buff *) chunk);
+                sctp_backlog_rcv(sk, skb);
        /* Release the sock and any reference counts we took in the
         * lookup calls.
@@ -302,14 +314,8 @@ discard_release:
 */
 int sctp_backlog_rcv(struct sock *sk, struct sk_buff *skb)
 {
-        struct sctp_chunk *chunk;
+        struct sctp_chunk *chunk = SCTP_INPUT_CB(skb)->chunk;
-        struct sctp_inq *inqueue;
+        struct sctp_inq *inqueue = &chunk->rcvr->inqueue;
-        /* One day chunk will live inside the skb, but for
-         * now this works.
-         */
-        chunk = (struct sctp_chunk *) skb;
-        inqueue = &chunk->rcvr->inqueue;
        sctp_inq_push(inqueue, chunk);
        return 0;
diff --git a/net/sctp/inqueue.c b/net/sctp/inqueue.c
index cedf4351556c..2d33922c044b 100644
--- a/net/sctp/inqueue.c
+++ b/net/sctp/inqueue.c
@@ -50,7 +50,7 @@
 /* Initialize an SCTP inqueue.  */
 void sctp_inq_init(struct sctp_inq *queue)
 {
-        skb_queue_head_init(&queue->in);
+        INIT_LIST_HEAD(&queue->in_chunk_list);
        queue->in_progress = NULL;
        /* Create a task for delivering data.  */
@@ -62,11 +62,13 @@ void sctp_inq_init(struct sctp_inq *queue)
 /* Release the memory associated with an SCTP inqueue.  */
 void sctp_inq_free(struct sctp_inq *queue)
 {
-        struct sctp_chunk *chunk;
+        struct sctp_chunk *chunk, *tmp;
        /* Empty the queue.  */
-        while ((chunk = (struct sctp_chunk *) skb_dequeue(&queue->in)) != NULL)
+        list_for_each_entry_safe(chunk, tmp, &queue->in_chunk_list, list) {
+                list_del_init(&chunk->list);
                sctp_chunk_free(chunk);
+        }
        /* If there is a packet which is currently being worked on,
         * free it as well.
@@ -92,7 +94,7 @@ void sctp_inq_push(struct sctp_inq *q, struct sctp_chunk *packet)
         * Eventually, we should clean up inqueue to not rely
         * on the BH related data structures.
         */
-        skb_queue_tail(&(q->in), (struct sk_buff *) packet);
+        list_add_tail(&packet->list, &q->in_chunk_list);
        q->immediate.func(q->immediate.data);
 }
@@ -131,12 +133,16 @@ struct sctp_chunk *sctp_inq_pop(struct sctp_inq *queue)
        /* Do we need to take the next packet out of the queue to process? */
        if (!chunk) {
+                struct list_head *entry;
                /* Is the queue empty?  */
-                if (skb_queue_empty(&queue->in))
+                if (list_empty(&queue->in_chunk_list))
                        return NULL;
+                entry = queue->in_chunk_list.next;
                chunk = queue->in_progress =
-                        (struct sctp_chunk *) skb_dequeue(&queue->in);
+                        list_entry(entry, struct sctp_chunk, list);
+                list_del_init(entry);
                /* This is the first chunk in the packet.  */
                chunk->singleton = 1;
diff --git a/net/sctp/output.c b/net/sctp/output.c
index 84b5b370b09d..931371633464 100644
--- a/net/sctp/output.c
+++ b/net/sctp/output.c
@@ -108,7 +108,7 @@ struct sctp_packet *sctp_packet_init(struct sctp_packet *packet,
        packet->transport = transport;
        packet->source_port = sport;
        packet->destination_port = dport;
-        skb_queue_head_init(&packet->chunks);
+        INIT_LIST_HEAD(&packet->chunk_list);
        if (asoc) {
                struct sctp_sock *sp = sctp_sk(asoc->base.sk);  
                overhead = sp->pf->af->net_header_len; 
@@ -129,12 +129,14 @@ struct sctp_packet *sctp_packet_init(struct sctp_packet *packet,
 /* Free a packet.  */
 void sctp_packet_free(struct sctp_packet *packet)
 {
-        struct sctp_chunk *chunk;
+        struct sctp_chunk *chunk, *tmp;
        SCTP_DEBUG_PRINTK("%s: packet:%p\n", __FUNCTION__, packet);
-        while ((chunk = (struct sctp_chunk *)__skb_dequeue(&packet->chunks)) != NULL)
+        list_for_each_entry_safe(chunk, tmp, &packet->chunk_list, list) {
+                list_del_init(&chunk->list);
                sctp_chunk_free(chunk);
+        }
        if (packet->malloced)
                kfree(packet);
@@ -276,7 +278,7 @@ append:
                packet->has_sack = 1;
        /* It is OK to send this chunk.  */
-        __skb_queue_tail(&packet->chunks, (struct sk_buff *)chunk);
+        list_add_tail(&chunk->list, &packet->chunk_list);
        packet->size += chunk_len;
        chunk->transport = packet->transport;
 finish:
@@ -295,7 +297,7 @@ int sctp_packet_transmit(struct sctp_packet *packet)
        struct sctphdr *sh;
        __u32 crc32;
        struct sk_buff *nskb;
-        struct sctp_chunk *chunk;
+        struct sctp_chunk *chunk, *tmp;
        struct sock *sk;
        int err = 0;
        int padding;            /* How much padding do we need?  */
@@ -305,11 +307,11 @@ int sctp_packet_transmit(struct sctp_packet *packet)
        SCTP_DEBUG_PRINTK("%s: packet:%p\n", __FUNCTION__, packet);
        /* Do NOT generate a chunkless packet. */
-        chunk = (struct sctp_chunk *)skb_peek(&packet->chunks);
+        if (list_empty(&packet->chunk_list))
-        if (unlikely(!chunk))
                return err;
        /* Set up convenience variables... */
+        chunk = list_entry(packet->chunk_list.next, struct sctp_chunk, list);
        sk = chunk->skb->sk;
        /* Allocate the new skb.  */
@@ -370,7 +372,8 @@ int sctp_packet_transmit(struct sctp_packet *packet)
         * [This whole comment explains WORD_ROUND() below.]
         */
        SCTP_DEBUG_PRINTK("***sctp_transmit_packet***\n");
-        while ((chunk = (struct sctp_chunk *)__skb_dequeue(&packet->chunks)) != NULL) {
+        list_for_each_entry_safe(chunk, tmp, &packet->chunk_list, list) {
+                list_del_init(&chunk->list);
                if (sctp_chunk_is_data(chunk)) {
                        if (!chunk->has_tsn) {
@@ -511,7 +514,8 @@ err:
         * will get resent or dropped later.
         */
-        while ((chunk = (struct sctp_chunk *)__skb_dequeue(&packet->chunks)) != NULL) {
+        list_for_each_entry_safe(chunk, tmp, &packet->chunk_list, list) {
+                list_del_init(&chunk->list);
                if (!sctp_chunk_is_data(chunk))
                        sctp_chunk_free(chunk);
        }
diff --git a/net/sctp/outqueue.c b/net/sctp/outqueue.c
index 4eb81a1407b7..efb72faba20c 100644
--- a/net/sctp/outqueue.c
+++ b/net/sctp/outqueue.c
@@ -75,7 +75,7 @@ static void sctp_generate_fwdtsn(struct sctp_outq *q, __u32 sack_ctsn);
 static inline void sctp_outq_head_data(struct sctp_outq *q,
                                        struct sctp_chunk *ch)
 {
-        __skb_queue_head(&q->out, (struct sk_buff *)ch);
+        list_add(&ch->list, &q->out_chunk_list);
        q->out_qlen += ch->skb->len;
        return;
 }
@@ -83,17 +83,22 @@ static inline void sctp_outq_head_data(struct sctp_outq *q,
 /* Take data from the front of the queue. */
 static inline struct sctp_chunk *sctp_outq_dequeue_data(struct sctp_outq *q)
 {
-        struct sctp_chunk *ch;
+        struct sctp_chunk *ch = NULL;
-        ch = (struct sctp_chunk *)__skb_dequeue(&q->out);
-        if (ch)
+        if (!list_empty(&q->out_chunk_list)) {
+                struct list_head *entry = q->out_chunk_list.next;
+                ch = list_entry(entry, struct sctp_chunk, list);
+                list_del_init(entry);
                q->out_qlen -= ch->skb->len;
+        }
        return ch;
 }
 /* Add data chunk to the end of the queue. */
 static inline void sctp_outq_tail_data(struct sctp_outq *q,
                                       struct sctp_chunk *ch)
 {
-        __skb_queue_tail(&q->out, (struct sk_buff *)ch);
+        list_add_tail(&ch->list, &q->out_chunk_list);
        q->out_qlen += ch->skb->len;
        return;
 }
@@ -197,8 +202,8 @@ static inline int sctp_cacc_skip(struct sctp_transport *primary,
 void sctp_outq_init(struct sctp_association *asoc, struct sctp_outq *q)
 {
        q->asoc = asoc;
-        skb_queue_head_init(&q->out);
+        INIT_LIST_HEAD(&q->out_chunk_list);
-        skb_queue_head_init(&q->control);
+        INIT_LIST_HEAD(&q->control_chunk_list);
        INIT_LIST_HEAD(&q->retransmit);
        INIT_LIST_HEAD(&q->sacked);
        INIT_LIST_HEAD(&q->abandoned);
@@ -217,7 +222,7 @@ void sctp_outq_teardown(struct sctp_outq *q)
 {
        struct sctp_transport *transport;
        struct list_head *lchunk, *pos, *temp;
-        struct sctp_chunk *chunk;
+        struct sctp_chunk *chunk, *tmp;
        /* Throw away unacknowledged chunks. */
        list_for_each(pos, &q->asoc->peer.transport_addr_list) {
@@ -269,8 +274,10 @@ void sctp_outq_teardown(struct sctp_outq *q)
        q->error = 0;
        /* Throw away any leftover control chunks. */
-        while ((chunk = (struct sctp_chunk *) skb_dequeue(&q->control)) != NULL)
+        list_for_each_entry_safe(chunk, tmp, &q->control_chunk_list, list) {
+                list_del_init(&chunk->list);
                sctp_chunk_free(chunk);
+        }
 }
 /* Free the outqueue structure and any related pending chunks.  */
@@ -333,7 +340,7 @@ int sctp_outq_tail(struct sctp_outq *q, struct sctp_chunk *chunk)
                        break;
                };
        } else {
-                __skb_queue_tail(&q->control, (struct sk_buff *) chunk);
+                list_add_tail(&chunk->list, &q->control_chunk_list);
                SCTP_INC_STATS(SCTP_MIB_OUTCTRLCHUNKS);
        }
@@ -650,10 +657,9 @@ int sctp_outq_flush(struct sctp_outq *q, int rtx_timeout)
        __u16 sport = asoc->base.bind_addr.port;
        __u16 dport = asoc->peer.port;
        __u32 vtag = asoc->peer.i.init_tag;
-        struct sk_buff_head *queue;
        struct sctp_transport *transport = NULL;
        struct sctp_transport *new_transport;
-        struct sctp_chunk *chunk;
+        struct sctp_chunk *chunk, *tmp;
        sctp_xmit_t status;
        int error = 0;
        int start_timer = 0;
@@ -675,8 +681,9 @@ int sctp_outq_flush(struct sctp_outq *q, int rtx_timeout)
         *   ...
         */
-        queue = &q->control;
+        list_for_each_entry_safe(chunk, tmp, &q->control_chunk_list, list) {
-        while ((chunk = (struct sctp_chunk *)skb_dequeue(queue)) != NULL) {
+                list_del_init(&chunk->list);
                /* Pick the right transport to use. */
                new_transport = chunk->transport;
@@ -814,8 +821,6 @@ int sctp_outq_flush(struct sctp_outq *q, int rtx_timeout)
                /* Finally, transmit new packets.  */
                start_timer = 0;
-                queue = &q->out;
                while ((chunk = sctp_outq_dequeue_data(q)) != NULL) {
                        /* RFC 2960 6.5 Every DATA chunk MUST carry a valid
                         * stream identifier.
@@ -1149,8 +1154,9 @@ int sctp_outq_sack(struct sctp_outq *q, struct sctp_sackhdr *sack)
        /* See if all chunks are acked.
         * Make sure the empty queue handler will get run later.
         */
-        q->empty = skb_queue_empty(&q->out) && skb_queue_empty(&q->control) &&
+        q->empty = (list_empty(&q->out_chunk_list) &&
-                        list_empty(&q->retransmit);
+                    list_empty(&q->control_chunk_list) &&
+                    list_empty(&q->retransmit));
        if (!q->empty)
                goto finish;
@@ -1679,9 +1685,9 @@ static void sctp_generate_fwdtsn(struct sctp_outq *q, __u32 ctsn)
                if (TSN_lte(tsn, ctsn)) {
                        list_del_init(lchunk);
                        if (!chunk->tsn_gap_acked) {
-                        chunk->transport->flight_size -=
+                                chunk->transport->flight_size -=
-                                                 sctp_data_size(chunk);
+                                        sctp_data_size(chunk);
-                        q->outstanding_bytes -= sctp_data_size(chunk);
+                                q->outstanding_bytes -= sctp_data_size(chunk);
                        }
                        sctp_chunk_free(chunk);
                } else {
@@ -1729,7 +1735,7 @@ static void sctp_generate_fwdtsn(struct sctp_outq *q, __u32 ctsn)
                                              nskips, &ftsn_skip_arr[0]); 
        if (ftsn_chunk) {
-                __skb_queue_tail(&q->control, (struct sk_buff *)ftsn_chunk);
+                list_add_tail(&ftsn_chunk->list, &q->control_chunk_list);
                SCTP_INC_STATS(SCTP_MIB_OUTCTRLCHUNKS);
        }
 }
diff --git a/net/sctp/sm_make_chunk.c b/net/sctp/sm_make_chunk.c
index 5baed9bb7de5..773cd93fa3d0 100644
--- a/net/sctp/sm_make_chunk.c
+++ b/net/sctp/sm_make_chunk.c
@@ -1003,6 +1003,7 @@ struct sctp_chunk *sctp_chunkify(struct sk_buff *skb,
                SCTP_DEBUG_PRINTK("chunkifying skb %p w/o an sk\n", skb);
        }
+        INIT_LIST_HEAD(&retval->list);
        retval->skb             = skb;
        retval->asoc            = (struct sctp_association *)asoc;
        retval->resent          = 0;
@@ -1116,8 +1117,7 @@ static void sctp_chunk_destroy(struct sctp_chunk *chunk)
 /* Possibly, free the chunk.  */
 void sctp_chunk_free(struct sctp_chunk *chunk)
 {
-        /* Make sure that we are not on any list.  */
+        BUG_ON(!list_empty(&chunk->list));
-        skb_unlink((struct sk_buff *) chunk);
        list_del_init(&chunk->transmitted_list);
        /* Release our reference on the message tracker. */
@@ -2739,8 +2739,12 @@ int sctp_process_asconf_ack(struct sctp_association *asoc,
        asoc->addip_last_asconf = NULL;
        /* Send the next asconf chunk from the addip chunk queue. */
-        asconf = (struct sctp_chunk *)__skb_dequeue(&asoc->addip_chunks);
+        if (!list_empty(&asoc->addip_chunk_list)) {
-        if (asconf) {
+                struct list_head *entry = asoc->addip_chunk_list.next;
+                asconf = list_entry(entry, struct sctp_chunk, list);
+                list_del_init(entry);
                /* Hold the chunk until an ASCONF_ACK is received. */
                sctp_chunk_hold(asconf);
                if (sctp_primitive_ASCONF(asoc, asconf))
diff --git a/net/sctp/socket.c b/net/sctp/socket.c
index aad55dc3792b..091a66f06a35 100644
--- a/net/sctp/socket.c
+++ b/net/sctp/socket.c
@@ -406,7 +406,7 @@ static int sctp_send_asconf(struct sctp_association *asoc,
         * transmission.
         */     
        if (asoc->addip_last_asconf) {
-                __skb_queue_tail(&asoc->addip_chunks, (struct sk_buff *)chunk);
+                list_add_tail(&chunk->list, &asoc->addip_chunk_list);
                goto out;       
        }
diff --git a/net/unix/af_unix.c b/net/unix/af_unix.c
index c420eba4876b..d403e34088ad 100644
--- a/net/unix/af_unix.c
+++ b/net/unix/af_unix.c
@@ -302,7 +302,7 @@ static void unix_write_space(struct sock *sk)
 * may receive messages only from that peer. */
 static void unix_dgram_disconnected(struct sock *sk, struct sock *other)
 {
-        if (skb_queue_len(&sk->sk_receive_queue)) {
+        if (!skb_queue_empty(&sk->sk_receive_queue)) {
                skb_queue_purge(&sk->sk_receive_queue);
                wake_up_interruptible_all(&unix_sk(sk)->peer_wait);
@@ -1619,7 +1619,7 @@ static long unix_stream_data_wait(struct sock * sk, long timeo)
        for (;;) {
                prepare_to_wait(sk->sk_sleep, &wait, TASK_INTERRUPTIBLE);
-                if (skb_queue_len(&sk->sk_receive_queue) ||
+                if (!skb_queue_empty(&sk->sk_receive_queue) ||
                    sk->sk_err ||
                    (sk->sk_shutdown & RCV_SHUTDOWN) ||
                    signal_pending(current) ||