diff options
| -rw-r--r-- | drivers/gpu/drm/i915/i915_gem.c | 37 | ||||
| -rw-r--r-- | drivers/gpu/drm/i915/i915_suspend.c | 36 |
2 files changed, 51 insertions, 22 deletions
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index 16fca1d1799a..cf4ffbee1c00 100644 --- a/drivers/gpu/drm/i915/i915_gem.c +++ b/drivers/gpu/drm/i915/i915_gem.c | |||
| @@ -2351,14 +2351,21 @@ i915_gem_object_get_fence_reg(struct drm_gem_object *obj) | |||
| 2351 | 2351 | ||
| 2352 | reg->obj = obj; | 2352 | reg->obj = obj; |
| 2353 | 2353 | ||
| 2354 | if (IS_GEN6(dev)) | 2354 | switch (INTEL_INFO(dev)->gen) { |
| 2355 | case 6: | ||
| 2355 | sandybridge_write_fence_reg(reg); | 2356 | sandybridge_write_fence_reg(reg); |
| 2356 | else if (IS_I965G(dev)) | 2357 | break; |
| 2358 | case 5: | ||
| 2359 | case 4: | ||
| 2357 | i965_write_fence_reg(reg); | 2360 | i965_write_fence_reg(reg); |
| 2358 | else if (IS_I9XX(dev)) | 2361 | break; |
| 2362 | case 3: | ||
| 2359 | i915_write_fence_reg(reg); | 2363 | i915_write_fence_reg(reg); |
| 2360 | else | 2364 | break; |
| 2365 | case 2: | ||
| 2361 | i830_write_fence_reg(reg); | 2366 | i830_write_fence_reg(reg); |
| 2367 | break; | ||
| 2368 | } | ||
| 2362 | 2369 | ||
| 2363 | trace_i915_gem_object_get_fence(obj, obj_priv->fence_reg, | 2370 | trace_i915_gem_object_get_fence(obj, obj_priv->fence_reg, |
| 2364 | obj_priv->tiling_mode); | 2371 | obj_priv->tiling_mode); |
| @@ -2381,22 +2388,26 @@ i915_gem_clear_fence_reg(struct drm_gem_object *obj) | |||
| 2381 | struct drm_i915_gem_object *obj_priv = to_intel_bo(obj); | 2388 | struct drm_i915_gem_object *obj_priv = to_intel_bo(obj); |
| 2382 | struct drm_i915_fence_reg *reg = | 2389 | struct drm_i915_fence_reg *reg = |
| 2383 | &dev_priv->fence_regs[obj_priv->fence_reg]; | 2390 | &dev_priv->fence_regs[obj_priv->fence_reg]; |
| 2391 | uint32_t fence_reg; | ||
| 2384 | 2392 | ||
| 2385 | if (IS_GEN6(dev)) { | 2393 | switch (INTEL_INFO(dev)->gen) { |
| 2394 | case 6: | ||
| 2386 | I915_WRITE64(FENCE_REG_SANDYBRIDGE_0 + | 2395 | I915_WRITE64(FENCE_REG_SANDYBRIDGE_0 + |
| 2387 | (obj_priv->fence_reg * 8), 0); | 2396 | (obj_priv->fence_reg * 8), 0); |
| 2388 | } else if (IS_I965G(dev)) { | 2397 | break; |
| 2398 | case 5: | ||
| 2399 | case 4: | ||
| 2389 | I915_WRITE64(FENCE_REG_965_0 + (obj_priv->fence_reg * 8), 0); | 2400 | I915_WRITE64(FENCE_REG_965_0 + (obj_priv->fence_reg * 8), 0); |
| 2390 | } else { | 2401 | break; |
| 2391 | uint32_t fence_reg; | 2402 | case 3: |
| 2392 | 2403 | if (obj_priv->fence_reg > 8) | |
| 2393 | if (obj_priv->fence_reg < 8) | 2404 | fence_reg = FENCE_REG_945_8 + (obj_priv->fence_reg - 8) * 4; |
| 2394 | fence_reg = FENCE_REG_830_0 + obj_priv->fence_reg * 4; | ||
| 2395 | else | 2405 | else |
| 2396 | fence_reg = FENCE_REG_945_8 + (obj_priv->fence_reg - | 2406 | case 2: |
| 2397 | 8) * 4; | 2407 | fence_reg = FENCE_REG_830_0 + obj_priv->fence_reg * 4; |
| 2398 | 2408 | ||
| 2399 | I915_WRITE(fence_reg, 0); | 2409 | I915_WRITE(fence_reg, 0); |
| 2410 | break; | ||
| 2400 | } | 2411 | } |
| 2401 | 2412 | ||
| 2402 | reg->obj = NULL; | 2413 | reg->obj = NULL; |
diff --git a/drivers/gpu/drm/i915/i915_suspend.c b/drivers/gpu/drm/i915/i915_suspend.c index 2c6b98f2440e..31f08581e93a 100644 --- a/drivers/gpu/drm/i915/i915_suspend.c +++ b/drivers/gpu/drm/i915/i915_suspend.c | |||
| @@ -789,16 +789,25 @@ int i915_save_state(struct drm_device *dev) | |||
| 789 | dev_priv->saveSWF2[i] = I915_READ(SWF30 + (i << 2)); | 789 | dev_priv->saveSWF2[i] = I915_READ(SWF30 + (i << 2)); |
| 790 | 790 | ||
| 791 | /* Fences */ | 791 | /* Fences */ |
| 792 | if (IS_I965G(dev)) { | 792 | switch (INTEL_INFO(dev)->gen) { |
| 793 | case 6: | ||
| 794 | for (i = 0; i < 16; i++) | ||
| 795 | dev_priv->saveFENCE[i] = I915_READ64(FENCE_REG_SANDYBRIDGE_0 + (i * 8)); | ||
| 796 | break; | ||
| 797 | case 5: | ||
| 798 | case 4: | ||
| 793 | for (i = 0; i < 16; i++) | 799 | for (i = 0; i < 16; i++) |
| 794 | dev_priv->saveFENCE[i] = I915_READ64(FENCE_REG_965_0 + (i * 8)); | 800 | dev_priv->saveFENCE[i] = I915_READ64(FENCE_REG_965_0 + (i * 8)); |
| 795 | } else { | 801 | break; |
| 796 | for (i = 0; i < 8; i++) | 802 | case 3: |
| 797 | dev_priv->saveFENCE[i] = I915_READ(FENCE_REG_830_0 + (i * 4)); | ||
| 798 | |||
| 799 | if (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev)) | 803 | if (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev)) |
| 800 | for (i = 0; i < 8; i++) | 804 | for (i = 0; i < 8; i++) |
| 801 | dev_priv->saveFENCE[i+8] = I915_READ(FENCE_REG_945_8 + (i * 4)); | 805 | dev_priv->saveFENCE[i+8] = I915_READ(FENCE_REG_945_8 + (i * 4)); |
| 806 | case 2: | ||
| 807 | for (i = 0; i < 8; i++) | ||
| 808 | dev_priv->saveFENCE[i] = I915_READ(FENCE_REG_830_0 + (i * 4)); | ||
| 809 | break; | ||
| 810 | |||
| 802 | } | 811 | } |
| 803 | 812 | ||
| 804 | return 0; | 813 | return 0; |
| @@ -815,15 +824,24 @@ int i915_restore_state(struct drm_device *dev) | |||
| 815 | I915_WRITE(HWS_PGA, dev_priv->saveHWS); | 824 | I915_WRITE(HWS_PGA, dev_priv->saveHWS); |
| 816 | 825 | ||
| 817 | /* Fences */ | 826 | /* Fences */ |
| 818 | if (IS_I965G(dev)) { | 827 | switch (INTEL_INFO(dev)->gen) { |
| 828 | case 6: | ||
| 829 | for (i = 0; i < 16; i++) | ||
| 830 | I915_WRITE64(FENCE_REG_SANDYBRIDGE_0 + (i * 8), dev_priv->saveFENCE[i]); | ||
| 831 | break; | ||
| 832 | case 5: | ||
| 833 | case 4: | ||
| 819 | for (i = 0; i < 16; i++) | 834 | for (i = 0; i < 16; i++) |
| 820 | I915_WRITE64(FENCE_REG_965_0 + (i * 8), dev_priv->saveFENCE[i]); | 835 | I915_WRITE64(FENCE_REG_965_0 + (i * 8), dev_priv->saveFENCE[i]); |
| 821 | } else { | 836 | break; |
| 822 | for (i = 0; i < 8; i++) | 837 | case 3: |
| 823 | I915_WRITE(FENCE_REG_830_0 + (i * 4), dev_priv->saveFENCE[i]); | 838 | case 2: |
| 824 | if (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev)) | 839 | if (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev)) |
| 825 | for (i = 0; i < 8; i++) | 840 | for (i = 0; i < 8; i++) |
| 826 | I915_WRITE(FENCE_REG_945_8 + (i * 4), dev_priv->saveFENCE[i+8]); | 841 | I915_WRITE(FENCE_REG_945_8 + (i * 4), dev_priv->saveFENCE[i+8]); |
| 842 | for (i = 0; i < 8; i++) | ||
| 843 | I915_WRITE(FENCE_REG_830_0 + (i * 4), dev_priv->saveFENCE[i]); | ||
| 844 | break; | ||
| 827 | } | 845 | } |
| 828 | 846 | ||
| 829 | i915_restore_display(dev); | 847 | i915_restore_display(dev); |
