diff options
| -rw-r--r-- | drivers/hwmon/dme1737.c | 226 |
1 files changed, 111 insertions, 115 deletions
diff --git a/drivers/hwmon/dme1737.c b/drivers/hwmon/dme1737.c index cdb8311e4ef7..2bf97e1470c0 100644 --- a/drivers/hwmon/dme1737.c +++ b/drivers/hwmon/dme1737.c | |||
| @@ -175,11 +175,12 @@ static const u8 DME1737_BIT_ALARM_FAN[] = {10, 11, 12, 13, 22, 23}; | |||
| 175 | * Data structures and manipulation thereof | 175 | * Data structures and manipulation thereof |
| 176 | * --------------------------------------------------------------------- */ | 176 | * --------------------------------------------------------------------- */ |
| 177 | 177 | ||
| 178 | /* For ISA chips, we abuse the i2c_client addr and name fields. We also use | ||
| 179 | the driver field to differentiate between I2C and ISA chips. */ | ||
| 180 | struct dme1737_data { | 178 | struct dme1737_data { |
| 181 | struct i2c_client client; | 179 | struct i2c_client _client; /* will go away soon */ |
| 180 | struct i2c_client *client; /* for I2C devices only */ | ||
| 182 | struct device *hwmon_dev; | 181 | struct device *hwmon_dev; |
| 182 | const char *name; | ||
| 183 | unsigned int addr; /* for ISA devices only */ | ||
| 183 | 184 | ||
| 184 | struct mutex update_lock; | 185 | struct mutex update_lock; |
| 185 | int valid; /* !=0 if following fields are valid */ | 186 | int valid; /* !=0 if following fields are valid */ |
| @@ -512,11 +513,12 @@ static inline int PWM_OFF_TO_REG(int val, int ix, int reg) | |||
| 512 | * before calling dme1737_read or dme1737_write. | 513 | * before calling dme1737_read or dme1737_write. |
| 513 | * --------------------------------------------------------------------- */ | 514 | * --------------------------------------------------------------------- */ |
| 514 | 515 | ||
| 515 | static u8 dme1737_read(struct i2c_client *client, u8 reg) | 516 | static u8 dme1737_read(const struct dme1737_data *data, u8 reg) |
| 516 | { | 517 | { |
| 518 | struct i2c_client *client = data->client; | ||
| 517 | s32 val; | 519 | s32 val; |
| 518 | 520 | ||
| 519 | if (client->driver) { /* I2C device */ | 521 | if (client) { /* I2C device */ |
| 520 | val = i2c_smbus_read_byte_data(client, reg); | 522 | val = i2c_smbus_read_byte_data(client, reg); |
| 521 | 523 | ||
| 522 | if (val < 0) { | 524 | if (val < 0) { |
| @@ -525,18 +527,19 @@ static u8 dme1737_read(struct i2c_client *client, u8 reg) | |||
| 525 | "maintainer.\n", reg); | 527 | "maintainer.\n", reg); |
| 526 | } | 528 | } |
| 527 | } else { /* ISA device */ | 529 | } else { /* ISA device */ |
| 528 | outb(reg, client->addr); | 530 | outb(reg, data->addr); |
| 529 | val = inb(client->addr + 1); | 531 | val = inb(data->addr + 1); |
| 530 | } | 532 | } |
| 531 | 533 | ||
| 532 | return val; | 534 | return val; |
| 533 | } | 535 | } |
| 534 | 536 | ||
| 535 | static s32 dme1737_write(struct i2c_client *client, u8 reg, u8 val) | 537 | static s32 dme1737_write(const struct dme1737_data *data, u8 reg, u8 val) |
| 536 | { | 538 | { |
| 539 | struct i2c_client *client = data->client; | ||
| 537 | s32 res = 0; | 540 | s32 res = 0; |
| 538 | 541 | ||
| 539 | if (client->driver) { /* I2C device */ | 542 | if (client) { /* I2C device */ |
| 540 | res = i2c_smbus_write_byte_data(client, reg, val); | 543 | res = i2c_smbus_write_byte_data(client, reg, val); |
| 541 | 544 | ||
| 542 | if (res < 0) { | 545 | if (res < 0) { |
| @@ -545,8 +548,8 @@ static s32 dme1737_write(struct i2c_client *client, u8 reg, u8 val) | |||
| 545 | "maintainer.\n", reg); | 548 | "maintainer.\n", reg); |
| 546 | } | 549 | } |
| 547 | } else { /* ISA device */ | 550 | } else { /* ISA device */ |
| 548 | outb(reg, client->addr); | 551 | outb(reg, data->addr); |
| 549 | outb(val, client->addr + 1); | 552 | outb(val, data->addr + 1); |
| 550 | } | 553 | } |
| 551 | 554 | ||
| 552 | return res; | 555 | return res; |
| @@ -555,7 +558,6 @@ static s32 dme1737_write(struct i2c_client *client, u8 reg, u8 val) | |||
| 555 | static struct dme1737_data *dme1737_update_device(struct device *dev) | 558 | static struct dme1737_data *dme1737_update_device(struct device *dev) |
| 556 | { | 559 | { |
| 557 | struct dme1737_data *data = dev_get_drvdata(dev); | 560 | struct dme1737_data *data = dev_get_drvdata(dev); |
| 558 | struct i2c_client *client = &data->client; | ||
| 559 | int ix; | 561 | int ix; |
| 560 | u8 lsb[5]; | 562 | u8 lsb[5]; |
| 561 | 563 | ||
| @@ -563,7 +565,7 @@ static struct dme1737_data *dme1737_update_device(struct device *dev) | |||
| 563 | 565 | ||
| 564 | /* Enable a Vbat monitoring cycle every 10 mins */ | 566 | /* Enable a Vbat monitoring cycle every 10 mins */ |
| 565 | if (time_after(jiffies, data->last_vbat + 600 * HZ) || !data->valid) { | 567 | if (time_after(jiffies, data->last_vbat + 600 * HZ) || !data->valid) { |
| 566 | dme1737_write(client, DME1737_REG_CONFIG, dme1737_read(client, | 568 | dme1737_write(data, DME1737_REG_CONFIG, dme1737_read(data, |
| 567 | DME1737_REG_CONFIG) | 0x10); | 569 | DME1737_REG_CONFIG) | 0x10); |
| 568 | data->last_vbat = jiffies; | 570 | data->last_vbat = jiffies; |
| 569 | } | 571 | } |
| @@ -571,7 +573,7 @@ static struct dme1737_data *dme1737_update_device(struct device *dev) | |||
| 571 | /* Sample register contents every 1 sec */ | 573 | /* Sample register contents every 1 sec */ |
| 572 | if (time_after(jiffies, data->last_update + HZ) || !data->valid) { | 574 | if (time_after(jiffies, data->last_update + HZ) || !data->valid) { |
| 573 | if (data->type != sch5027) { | 575 | if (data->type != sch5027) { |
| 574 | data->vid = dme1737_read(client, DME1737_REG_VID) & | 576 | data->vid = dme1737_read(data, DME1737_REG_VID) & |
| 575 | 0x3f; | 577 | 0x3f; |
| 576 | } | 578 | } |
| 577 | 579 | ||
| @@ -580,11 +582,11 @@ static struct dme1737_data *dme1737_update_device(struct device *dev) | |||
| 580 | /* Voltage inputs are stored as 16 bit values even | 582 | /* Voltage inputs are stored as 16 bit values even |
| 581 | * though they have only 12 bits resolution. This is | 583 | * though they have only 12 bits resolution. This is |
| 582 | * to make it consistent with the temp inputs. */ | 584 | * to make it consistent with the temp inputs. */ |
| 583 | data->in[ix] = dme1737_read(client, | 585 | data->in[ix] = dme1737_read(data, |
| 584 | DME1737_REG_IN(ix)) << 8; | 586 | DME1737_REG_IN(ix)) << 8; |
| 585 | data->in_min[ix] = dme1737_read(client, | 587 | data->in_min[ix] = dme1737_read(data, |
| 586 | DME1737_REG_IN_MIN(ix)); | 588 | DME1737_REG_IN_MIN(ix)); |
| 587 | data->in_max[ix] = dme1737_read(client, | 589 | data->in_max[ix] = dme1737_read(data, |
| 588 | DME1737_REG_IN_MAX(ix)); | 590 | DME1737_REG_IN_MAX(ix)); |
| 589 | } | 591 | } |
| 590 | 592 | ||
| @@ -595,14 +597,14 @@ static struct dme1737_data *dme1737_update_device(struct device *dev) | |||
| 595 | * to take advantage of implicit conversions between | 597 | * to take advantage of implicit conversions between |
| 596 | * register values (2's complement) and temp values | 598 | * register values (2's complement) and temp values |
| 597 | * (signed decimal). */ | 599 | * (signed decimal). */ |
| 598 | data->temp[ix] = dme1737_read(client, | 600 | data->temp[ix] = dme1737_read(data, |
| 599 | DME1737_REG_TEMP(ix)) << 8; | 601 | DME1737_REG_TEMP(ix)) << 8; |
| 600 | data->temp_min[ix] = dme1737_read(client, | 602 | data->temp_min[ix] = dme1737_read(data, |
| 601 | DME1737_REG_TEMP_MIN(ix)); | 603 | DME1737_REG_TEMP_MIN(ix)); |
| 602 | data->temp_max[ix] = dme1737_read(client, | 604 | data->temp_max[ix] = dme1737_read(data, |
| 603 | DME1737_REG_TEMP_MAX(ix)); | 605 | DME1737_REG_TEMP_MAX(ix)); |
| 604 | if (data->type != sch5027) { | 606 | if (data->type != sch5027) { |
| 605 | data->temp_offset[ix] = dme1737_read(client, | 607 | data->temp_offset[ix] = dme1737_read(data, |
| 606 | DME1737_REG_TEMP_OFFSET(ix)); | 608 | DME1737_REG_TEMP_OFFSET(ix)); |
| 607 | } | 609 | } |
| 608 | } | 610 | } |
| @@ -612,7 +614,7 @@ static struct dme1737_data *dme1737_update_device(struct device *dev) | |||
| 612 | * which the registers are read (MSB first, then LSB) is | 614 | * which the registers are read (MSB first, then LSB) is |
| 613 | * important! */ | 615 | * important! */ |
| 614 | for (ix = 0; ix < ARRAY_SIZE(lsb); ix++) { | 616 | for (ix = 0; ix < ARRAY_SIZE(lsb); ix++) { |
| 615 | lsb[ix] = dme1737_read(client, | 617 | lsb[ix] = dme1737_read(data, |
| 616 | DME1737_REG_IN_TEMP_LSB(ix)); | 618 | DME1737_REG_IN_TEMP_LSB(ix)); |
| 617 | } | 619 | } |
| 618 | for (ix = 0; ix < ARRAY_SIZE(data->in); ix++) { | 620 | for (ix = 0; ix < ARRAY_SIZE(data->in); ix++) { |
| @@ -631,19 +633,19 @@ static struct dme1737_data *dme1737_update_device(struct device *dev) | |||
| 631 | if (!(data->has_fan & (1 << ix))) { | 633 | if (!(data->has_fan & (1 << ix))) { |
| 632 | continue; | 634 | continue; |
| 633 | } | 635 | } |
| 634 | data->fan[ix] = dme1737_read(client, | 636 | data->fan[ix] = dme1737_read(data, |
| 635 | DME1737_REG_FAN(ix)); | 637 | DME1737_REG_FAN(ix)); |
| 636 | data->fan[ix] |= dme1737_read(client, | 638 | data->fan[ix] |= dme1737_read(data, |
| 637 | DME1737_REG_FAN(ix) + 1) << 8; | 639 | DME1737_REG_FAN(ix) + 1) << 8; |
| 638 | data->fan_min[ix] = dme1737_read(client, | 640 | data->fan_min[ix] = dme1737_read(data, |
| 639 | DME1737_REG_FAN_MIN(ix)); | 641 | DME1737_REG_FAN_MIN(ix)); |
| 640 | data->fan_min[ix] |= dme1737_read(client, | 642 | data->fan_min[ix] |= dme1737_read(data, |
| 641 | DME1737_REG_FAN_MIN(ix) + 1) << 8; | 643 | DME1737_REG_FAN_MIN(ix) + 1) << 8; |
| 642 | data->fan_opt[ix] = dme1737_read(client, | 644 | data->fan_opt[ix] = dme1737_read(data, |
| 643 | DME1737_REG_FAN_OPT(ix)); | 645 | DME1737_REG_FAN_OPT(ix)); |
| 644 | /* fan_max exists only for fan[5-6] */ | 646 | /* fan_max exists only for fan[5-6] */ |
| 645 | if (ix > 3) { | 647 | if (ix > 3) { |
| 646 | data->fan_max[ix - 4] = dme1737_read(client, | 648 | data->fan_max[ix - 4] = dme1737_read(data, |
| 647 | DME1737_REG_FAN_MAX(ix)); | 649 | DME1737_REG_FAN_MAX(ix)); |
| 648 | } | 650 | } |
| 649 | } | 651 | } |
| @@ -655,63 +657,63 @@ static struct dme1737_data *dme1737_update_device(struct device *dev) | |||
| 655 | if (!(data->has_pwm & (1 << ix))) { | 657 | if (!(data->has_pwm & (1 << ix))) { |
| 656 | continue; | 658 | continue; |
| 657 | } | 659 | } |
| 658 | data->pwm[ix] = dme1737_read(client, | 660 | data->pwm[ix] = dme1737_read(data, |
| 659 | DME1737_REG_PWM(ix)); | 661 | DME1737_REG_PWM(ix)); |
| 660 | data->pwm_freq[ix] = dme1737_read(client, | 662 | data->pwm_freq[ix] = dme1737_read(data, |
| 661 | DME1737_REG_PWM_FREQ(ix)); | 663 | DME1737_REG_PWM_FREQ(ix)); |
| 662 | /* pwm_config and pwm_min exist only for pwm[1-3] */ | 664 | /* pwm_config and pwm_min exist only for pwm[1-3] */ |
| 663 | if (ix < 3) { | 665 | if (ix < 3) { |
| 664 | data->pwm_config[ix] = dme1737_read(client, | 666 | data->pwm_config[ix] = dme1737_read(data, |
| 665 | DME1737_REG_PWM_CONFIG(ix)); | 667 | DME1737_REG_PWM_CONFIG(ix)); |
| 666 | data->pwm_min[ix] = dme1737_read(client, | 668 | data->pwm_min[ix] = dme1737_read(data, |
| 667 | DME1737_REG_PWM_MIN(ix)); | 669 | DME1737_REG_PWM_MIN(ix)); |
| 668 | } | 670 | } |
| 669 | } | 671 | } |
| 670 | for (ix = 0; ix < ARRAY_SIZE(data->pwm_rr); ix++) { | 672 | for (ix = 0; ix < ARRAY_SIZE(data->pwm_rr); ix++) { |
| 671 | data->pwm_rr[ix] = dme1737_read(client, | 673 | data->pwm_rr[ix] = dme1737_read(data, |
| 672 | DME1737_REG_PWM_RR(ix)); | 674 | DME1737_REG_PWM_RR(ix)); |
| 673 | } | 675 | } |
| 674 | 676 | ||
| 675 | /* Thermal zone registers */ | 677 | /* Thermal zone registers */ |
| 676 | for (ix = 0; ix < ARRAY_SIZE(data->zone_low); ix++) { | 678 | for (ix = 0; ix < ARRAY_SIZE(data->zone_low); ix++) { |
| 677 | data->zone_low[ix] = dme1737_read(client, | 679 | data->zone_low[ix] = dme1737_read(data, |
| 678 | DME1737_REG_ZONE_LOW(ix)); | 680 | DME1737_REG_ZONE_LOW(ix)); |
| 679 | data->zone_abs[ix] = dme1737_read(client, | 681 | data->zone_abs[ix] = dme1737_read(data, |
| 680 | DME1737_REG_ZONE_ABS(ix)); | 682 | DME1737_REG_ZONE_ABS(ix)); |
| 681 | } | 683 | } |
| 682 | if (data->type != sch5027) { | 684 | if (data->type != sch5027) { |
| 683 | for (ix = 0; ix < ARRAY_SIZE(data->zone_hyst); ix++) { | 685 | for (ix = 0; ix < ARRAY_SIZE(data->zone_hyst); ix++) { |
| 684 | data->zone_hyst[ix] = dme1737_read(client, | 686 | data->zone_hyst[ix] = dme1737_read(data, |
| 685 | DME1737_REG_ZONE_HYST(ix)); | 687 | DME1737_REG_ZONE_HYST(ix)); |
| 686 | } | 688 | } |
| 687 | } | 689 | } |
| 688 | 690 | ||
| 689 | /* Alarm registers */ | 691 | /* Alarm registers */ |
| 690 | data->alarms = dme1737_read(client, | 692 | data->alarms = dme1737_read(data, |
| 691 | DME1737_REG_ALARM1); | 693 | DME1737_REG_ALARM1); |
| 692 | /* Bit 7 tells us if the other alarm registers are non-zero and | 694 | /* Bit 7 tells us if the other alarm registers are non-zero and |
| 693 | * therefore also need to be read */ | 695 | * therefore also need to be read */ |
| 694 | if (data->alarms & 0x80) { | 696 | if (data->alarms & 0x80) { |
| 695 | data->alarms |= dme1737_read(client, | 697 | data->alarms |= dme1737_read(data, |
| 696 | DME1737_REG_ALARM2) << 8; | 698 | DME1737_REG_ALARM2) << 8; |
| 697 | data->alarms |= dme1737_read(client, | 699 | data->alarms |= dme1737_read(data, |
| 698 | DME1737_REG_ALARM3) << 16; | 700 | DME1737_REG_ALARM3) << 16; |
| 699 | } | 701 | } |
| 700 | 702 | ||
| 701 | /* The ISA chips require explicit clearing of alarm bits. | 703 | /* The ISA chips require explicit clearing of alarm bits. |
| 702 | * Don't worry, an alarm will come back if the condition | 704 | * Don't worry, an alarm will come back if the condition |
| 703 | * that causes it still exists */ | 705 | * that causes it still exists */ |
| 704 | if (!client->driver) { | 706 | if (!data->client) { |
| 705 | if (data->alarms & 0xff0000) { | 707 | if (data->alarms & 0xff0000) { |
| 706 | dme1737_write(client, DME1737_REG_ALARM3, | 708 | dme1737_write(data, DME1737_REG_ALARM3, |
| 707 | 0xff); | 709 | 0xff); |
| 708 | } | 710 | } |
| 709 | if (data->alarms & 0xff00) { | 711 | if (data->alarms & 0xff00) { |
| 710 | dme1737_write(client, DME1737_REG_ALARM2, | 712 | dme1737_write(data, DME1737_REG_ALARM2, |
| 711 | 0xff); | 713 | 0xff); |
| 712 | } | 714 | } |
| 713 | if (data->alarms & 0xff) { | 715 | if (data->alarms & 0xff) { |
| 714 | dme1737_write(client, DME1737_REG_ALARM1, | 716 | dme1737_write(data, DME1737_REG_ALARM1, |
| 715 | 0xff); | 717 | 0xff); |
| 716 | } | 718 | } |
| 717 | } | 719 | } |
| @@ -770,7 +772,6 @@ static ssize_t set_in(struct device *dev, struct device_attribute *attr, | |||
| 770 | const char *buf, size_t count) | 772 | const char *buf, size_t count) |
| 771 | { | 773 | { |
| 772 | struct dme1737_data *data = dev_get_drvdata(dev); | 774 | struct dme1737_data *data = dev_get_drvdata(dev); |
| 773 | struct i2c_client *client = &data->client; | ||
| 774 | struct sensor_device_attribute_2 | 775 | struct sensor_device_attribute_2 |
| 775 | *sensor_attr_2 = to_sensor_dev_attr_2(attr); | 776 | *sensor_attr_2 = to_sensor_dev_attr_2(attr); |
| 776 | int ix = sensor_attr_2->index; | 777 | int ix = sensor_attr_2->index; |
| @@ -781,12 +782,12 @@ static ssize_t set_in(struct device *dev, struct device_attribute *attr, | |||
| 781 | switch (fn) { | 782 | switch (fn) { |
| 782 | case SYS_IN_MIN: | 783 | case SYS_IN_MIN: |
| 783 | data->in_min[ix] = IN_TO_REG(val, data->in_nominal[ix]); | 784 | data->in_min[ix] = IN_TO_REG(val, data->in_nominal[ix]); |
| 784 | dme1737_write(client, DME1737_REG_IN_MIN(ix), | 785 | dme1737_write(data, DME1737_REG_IN_MIN(ix), |
| 785 | data->in_min[ix]); | 786 | data->in_min[ix]); |
| 786 | break; | 787 | break; |
| 787 | case SYS_IN_MAX: | 788 | case SYS_IN_MAX: |
| 788 | data->in_max[ix] = IN_TO_REG(val, data->in_nominal[ix]); | 789 | data->in_max[ix] = IN_TO_REG(val, data->in_nominal[ix]); |
| 789 | dme1737_write(client, DME1737_REG_IN_MAX(ix), | 790 | dme1737_write(data, DME1737_REG_IN_MAX(ix), |
| 790 | data->in_max[ix]); | 791 | data->in_max[ix]); |
| 791 | break; | 792 | break; |
| 792 | default: | 793 | default: |
| @@ -850,7 +851,6 @@ static ssize_t set_temp(struct device *dev, struct device_attribute *attr, | |||
| 850 | const char *buf, size_t count) | 851 | const char *buf, size_t count) |
| 851 | { | 852 | { |
| 852 | struct dme1737_data *data = dev_get_drvdata(dev); | 853 | struct dme1737_data *data = dev_get_drvdata(dev); |
| 853 | struct i2c_client *client = &data->client; | ||
| 854 | struct sensor_device_attribute_2 | 854 | struct sensor_device_attribute_2 |
| 855 | *sensor_attr_2 = to_sensor_dev_attr_2(attr); | 855 | *sensor_attr_2 = to_sensor_dev_attr_2(attr); |
| 856 | int ix = sensor_attr_2->index; | 856 | int ix = sensor_attr_2->index; |
| @@ -861,17 +861,17 @@ static ssize_t set_temp(struct device *dev, struct device_attribute *attr, | |||
| 861 | switch (fn) { | 861 | switch (fn) { |
| 862 | case SYS_TEMP_MIN: | 862 | case SYS_TEMP_MIN: |
| 863 | data->temp_min[ix] = TEMP_TO_REG(val); | 863 | data->temp_min[ix] = TEMP_TO_REG(val); |
| 864 | dme1737_write(client, DME1737_REG_TEMP_MIN(ix), | 864 | dme1737_write(data, DME1737_REG_TEMP_MIN(ix), |
| 865 | data->temp_min[ix]); | 865 | data->temp_min[ix]); |
| 866 | break; | 866 | break; |
| 867 | case SYS_TEMP_MAX: | 867 | case SYS_TEMP_MAX: |
| 868 | data->temp_max[ix] = TEMP_TO_REG(val); | 868 | data->temp_max[ix] = TEMP_TO_REG(val); |
| 869 | dme1737_write(client, DME1737_REG_TEMP_MAX(ix), | 869 | dme1737_write(data, DME1737_REG_TEMP_MAX(ix), |
| 870 | data->temp_max[ix]); | 870 | data->temp_max[ix]); |
| 871 | break; | 871 | break; |
| 872 | case SYS_TEMP_OFFSET: | 872 | case SYS_TEMP_OFFSET: |
| 873 | data->temp_offset[ix] = TEMP_TO_REG(val); | 873 | data->temp_offset[ix] = TEMP_TO_REG(val); |
| 874 | dme1737_write(client, DME1737_REG_TEMP_OFFSET(ix), | 874 | dme1737_write(data, DME1737_REG_TEMP_OFFSET(ix), |
| 875 | data->temp_offset[ix]); | 875 | data->temp_offset[ix]); |
| 876 | break; | 876 | break; |
| 877 | default: | 877 | default: |
| @@ -939,7 +939,6 @@ static ssize_t set_zone(struct device *dev, struct device_attribute *attr, | |||
| 939 | const char *buf, size_t count) | 939 | const char *buf, size_t count) |
| 940 | { | 940 | { |
| 941 | struct dme1737_data *data = dev_get_drvdata(dev); | 941 | struct dme1737_data *data = dev_get_drvdata(dev); |
| 942 | struct i2c_client *client = &data->client; | ||
| 943 | struct sensor_device_attribute_2 | 942 | struct sensor_device_attribute_2 |
| 944 | *sensor_attr_2 = to_sensor_dev_attr_2(attr); | 943 | *sensor_attr_2 = to_sensor_dev_attr_2(attr); |
| 945 | int ix = sensor_attr_2->index; | 944 | int ix = sensor_attr_2->index; |
| @@ -950,37 +949,37 @@ static ssize_t set_zone(struct device *dev, struct device_attribute *attr, | |||
| 950 | switch (fn) { | 949 | switch (fn) { |
| 951 | case SYS_ZONE_AUTO_POINT1_TEMP_HYST: | 950 | case SYS_ZONE_AUTO_POINT1_TEMP_HYST: |
| 952 | /* Refresh the cache */ | 951 | /* Refresh the cache */ |
| 953 | data->zone_low[ix] = dme1737_read(client, | 952 | data->zone_low[ix] = dme1737_read(data, |
| 954 | DME1737_REG_ZONE_LOW(ix)); | 953 | DME1737_REG_ZONE_LOW(ix)); |
| 955 | /* Modify the temp hyst value */ | 954 | /* Modify the temp hyst value */ |
| 956 | data->zone_hyst[ix == 2] = TEMP_HYST_TO_REG( | 955 | data->zone_hyst[ix == 2] = TEMP_HYST_TO_REG( |
| 957 | TEMP_FROM_REG(data->zone_low[ix], 8) - | 956 | TEMP_FROM_REG(data->zone_low[ix], 8) - |
| 958 | val, ix, dme1737_read(client, | 957 | val, ix, dme1737_read(data, |
| 959 | DME1737_REG_ZONE_HYST(ix == 2))); | 958 | DME1737_REG_ZONE_HYST(ix == 2))); |
| 960 | dme1737_write(client, DME1737_REG_ZONE_HYST(ix == 2), | 959 | dme1737_write(data, DME1737_REG_ZONE_HYST(ix == 2), |
| 961 | data->zone_hyst[ix == 2]); | 960 | data->zone_hyst[ix == 2]); |
| 962 | break; | 961 | break; |
| 963 | case SYS_ZONE_AUTO_POINT1_TEMP: | 962 | case SYS_ZONE_AUTO_POINT1_TEMP: |
| 964 | data->zone_low[ix] = TEMP_TO_REG(val); | 963 | data->zone_low[ix] = TEMP_TO_REG(val); |
| 965 | dme1737_write(client, DME1737_REG_ZONE_LOW(ix), | 964 | dme1737_write(data, DME1737_REG_ZONE_LOW(ix), |
| 966 | data->zone_low[ix]); | 965 | data->zone_low[ix]); |
| 967 | break; | 966 | break; |
| 968 | case SYS_ZONE_AUTO_POINT2_TEMP: | 967 | case SYS_ZONE_AUTO_POINT2_TEMP: |
| 969 | /* Refresh the cache */ | 968 | /* Refresh the cache */ |
| 970 | data->zone_low[ix] = dme1737_read(client, | 969 | data->zone_low[ix] = dme1737_read(data, |
| 971 | DME1737_REG_ZONE_LOW(ix)); | 970 | DME1737_REG_ZONE_LOW(ix)); |
| 972 | /* Modify the temp range value (which is stored in the upper | 971 | /* Modify the temp range value (which is stored in the upper |
| 973 | * nibble of the pwm_freq register) */ | 972 | * nibble of the pwm_freq register) */ |
| 974 | data->pwm_freq[ix] = TEMP_RANGE_TO_REG(val - | 973 | data->pwm_freq[ix] = TEMP_RANGE_TO_REG(val - |
| 975 | TEMP_FROM_REG(data->zone_low[ix], 8), | 974 | TEMP_FROM_REG(data->zone_low[ix], 8), |
| 976 | dme1737_read(client, | 975 | dme1737_read(data, |
| 977 | DME1737_REG_PWM_FREQ(ix))); | 976 | DME1737_REG_PWM_FREQ(ix))); |
| 978 | dme1737_write(client, DME1737_REG_PWM_FREQ(ix), | 977 | dme1737_write(data, DME1737_REG_PWM_FREQ(ix), |
| 979 | data->pwm_freq[ix]); | 978 | data->pwm_freq[ix]); |
| 980 | break; | 979 | break; |
| 981 | case SYS_ZONE_AUTO_POINT3_TEMP: | 980 | case SYS_ZONE_AUTO_POINT3_TEMP: |
| 982 | data->zone_abs[ix] = TEMP_TO_REG(val); | 981 | data->zone_abs[ix] = TEMP_TO_REG(val); |
| 983 | dme1737_write(client, DME1737_REG_ZONE_ABS(ix), | 982 | dme1737_write(data, DME1737_REG_ZONE_ABS(ix), |
| 984 | data->zone_abs[ix]); | 983 | data->zone_abs[ix]); |
| 985 | break; | 984 | break; |
| 986 | default: | 985 | default: |
| @@ -1046,7 +1045,6 @@ static ssize_t set_fan(struct device *dev, struct device_attribute *attr, | |||
| 1046 | const char *buf, size_t count) | 1045 | const char *buf, size_t count) |
| 1047 | { | 1046 | { |
| 1048 | struct dme1737_data *data = dev_get_drvdata(dev); | 1047 | struct dme1737_data *data = dev_get_drvdata(dev); |
| 1049 | struct i2c_client *client = &data->client; | ||
| 1050 | struct sensor_device_attribute_2 | 1048 | struct sensor_device_attribute_2 |
| 1051 | *sensor_attr_2 = to_sensor_dev_attr_2(attr); | 1049 | *sensor_attr_2 = to_sensor_dev_attr_2(attr); |
| 1052 | int ix = sensor_attr_2->index; | 1050 | int ix = sensor_attr_2->index; |
| @@ -1060,21 +1058,21 @@ static ssize_t set_fan(struct device *dev, struct device_attribute *attr, | |||
| 1060 | data->fan_min[ix] = FAN_TO_REG(val, 0); | 1058 | data->fan_min[ix] = FAN_TO_REG(val, 0); |
| 1061 | } else { | 1059 | } else { |
| 1062 | /* Refresh the cache */ | 1060 | /* Refresh the cache */ |
| 1063 | data->fan_opt[ix] = dme1737_read(client, | 1061 | data->fan_opt[ix] = dme1737_read(data, |
| 1064 | DME1737_REG_FAN_OPT(ix)); | 1062 | DME1737_REG_FAN_OPT(ix)); |
| 1065 | /* Modify the fan min value */ | 1063 | /* Modify the fan min value */ |
| 1066 | data->fan_min[ix] = FAN_TO_REG(val, | 1064 | data->fan_min[ix] = FAN_TO_REG(val, |
| 1067 | FAN_TPC_FROM_REG(data->fan_opt[ix])); | 1065 | FAN_TPC_FROM_REG(data->fan_opt[ix])); |
| 1068 | } | 1066 | } |
| 1069 | dme1737_write(client, DME1737_REG_FAN_MIN(ix), | 1067 | dme1737_write(data, DME1737_REG_FAN_MIN(ix), |
| 1070 | data->fan_min[ix] & 0xff); | 1068 | data->fan_min[ix] & 0xff); |
| 1071 | dme1737_write(client, DME1737_REG_FAN_MIN(ix) + 1, | 1069 | dme1737_write(data, DME1737_REG_FAN_MIN(ix) + 1, |
| 1072 | data->fan_min[ix] >> 8); | 1070 | data->fan_min[ix] >> 8); |
| 1073 | break; | 1071 | break; |
| 1074 | case SYS_FAN_MAX: | 1072 | case SYS_FAN_MAX: |
| 1075 | /* Only valid for fan[5-6] */ | 1073 | /* Only valid for fan[5-6] */ |
| 1076 | data->fan_max[ix - 4] = FAN_MAX_TO_REG(val); | 1074 | data->fan_max[ix - 4] = FAN_MAX_TO_REG(val); |
| 1077 | dme1737_write(client, DME1737_REG_FAN_MAX(ix), | 1075 | dme1737_write(data, DME1737_REG_FAN_MAX(ix), |
| 1078 | data->fan_max[ix - 4]); | 1076 | data->fan_max[ix - 4]); |
| 1079 | break; | 1077 | break; |
| 1080 | case SYS_FAN_TYPE: | 1078 | case SYS_FAN_TYPE: |
| @@ -1086,9 +1084,9 @@ static ssize_t set_fan(struct device *dev, struct device_attribute *attr, | |||
| 1086 | val); | 1084 | val); |
| 1087 | goto exit; | 1085 | goto exit; |
| 1088 | } | 1086 | } |
| 1089 | data->fan_opt[ix] = FAN_TYPE_TO_REG(val, dme1737_read(client, | 1087 | data->fan_opt[ix] = FAN_TYPE_TO_REG(val, dme1737_read(data, |
| 1090 | DME1737_REG_FAN_OPT(ix))); | 1088 | DME1737_REG_FAN_OPT(ix))); |
| 1091 | dme1737_write(client, DME1737_REG_FAN_OPT(ix), | 1089 | dme1737_write(data, DME1737_REG_FAN_OPT(ix), |
| 1092 | data->fan_opt[ix]); | 1090 | data->fan_opt[ix]); |
| 1093 | break; | 1091 | break; |
| 1094 | default: | 1092 | default: |
| @@ -1185,7 +1183,6 @@ static ssize_t set_pwm(struct device *dev, struct device_attribute *attr, | |||
| 1185 | const char *buf, size_t count) | 1183 | const char *buf, size_t count) |
| 1186 | { | 1184 | { |
| 1187 | struct dme1737_data *data = dev_get_drvdata(dev); | 1185 | struct dme1737_data *data = dev_get_drvdata(dev); |
| 1188 | struct i2c_client *client = &data->client; | ||
| 1189 | struct sensor_device_attribute_2 | 1186 | struct sensor_device_attribute_2 |
| 1190 | *sensor_attr_2 = to_sensor_dev_attr_2(attr); | 1187 | *sensor_attr_2 = to_sensor_dev_attr_2(attr); |
| 1191 | int ix = sensor_attr_2->index; | 1188 | int ix = sensor_attr_2->index; |
| @@ -1196,12 +1193,12 @@ static ssize_t set_pwm(struct device *dev, struct device_attribute *attr, | |||
| 1196 | switch (fn) { | 1193 | switch (fn) { |
| 1197 | case SYS_PWM: | 1194 | case SYS_PWM: |
| 1198 | data->pwm[ix] = SENSORS_LIMIT(val, 0, 255); | 1195 | data->pwm[ix] = SENSORS_LIMIT(val, 0, 255); |
| 1199 | dme1737_write(client, DME1737_REG_PWM(ix), data->pwm[ix]); | 1196 | dme1737_write(data, DME1737_REG_PWM(ix), data->pwm[ix]); |
| 1200 | break; | 1197 | break; |
| 1201 | case SYS_PWM_FREQ: | 1198 | case SYS_PWM_FREQ: |
| 1202 | data->pwm_freq[ix] = PWM_FREQ_TO_REG(val, dme1737_read(client, | 1199 | data->pwm_freq[ix] = PWM_FREQ_TO_REG(val, dme1737_read(data, |
| 1203 | DME1737_REG_PWM_FREQ(ix))); | 1200 | DME1737_REG_PWM_FREQ(ix))); |
| 1204 | dme1737_write(client, DME1737_REG_PWM_FREQ(ix), | 1201 | dme1737_write(data, DME1737_REG_PWM_FREQ(ix), |
| 1205 | data->pwm_freq[ix]); | 1202 | data->pwm_freq[ix]); |
| 1206 | break; | 1203 | break; |
| 1207 | case SYS_PWM_ENABLE: | 1204 | case SYS_PWM_ENABLE: |
| @@ -1214,7 +1211,7 @@ static ssize_t set_pwm(struct device *dev, struct device_attribute *attr, | |||
| 1214 | goto exit; | 1211 | goto exit; |
| 1215 | } | 1212 | } |
| 1216 | /* Refresh the cache */ | 1213 | /* Refresh the cache */ |
| 1217 | data->pwm_config[ix] = dme1737_read(client, | 1214 | data->pwm_config[ix] = dme1737_read(data, |
| 1218 | DME1737_REG_PWM_CONFIG(ix)); | 1215 | DME1737_REG_PWM_CONFIG(ix)); |
| 1219 | if (val == PWM_EN_FROM_REG(data->pwm_config[ix])) { | 1216 | if (val == PWM_EN_FROM_REG(data->pwm_config[ix])) { |
| 1220 | /* Bail out if no change */ | 1217 | /* Bail out if no change */ |
| @@ -1226,14 +1223,14 @@ static ssize_t set_pwm(struct device *dev, struct device_attribute *attr, | |||
| 1226 | data->pwm_acz[ix] = PWM_ACZ_FROM_REG( | 1223 | data->pwm_acz[ix] = PWM_ACZ_FROM_REG( |
| 1227 | data->pwm_config[ix]); | 1224 | data->pwm_config[ix]); |
| 1228 | /* Save the current ramp rate state and disable it */ | 1225 | /* Save the current ramp rate state and disable it */ |
| 1229 | data->pwm_rr[ix > 0] = dme1737_read(client, | 1226 | data->pwm_rr[ix > 0] = dme1737_read(data, |
| 1230 | DME1737_REG_PWM_RR(ix > 0)); | 1227 | DME1737_REG_PWM_RR(ix > 0)); |
| 1231 | data->pwm_rr_en &= ~(1 << ix); | 1228 | data->pwm_rr_en &= ~(1 << ix); |
| 1232 | if (PWM_RR_EN_FROM_REG(data->pwm_rr[ix > 0], ix)) { | 1229 | if (PWM_RR_EN_FROM_REG(data->pwm_rr[ix > 0], ix)) { |
| 1233 | data->pwm_rr_en |= (1 << ix); | 1230 | data->pwm_rr_en |= (1 << ix); |
| 1234 | data->pwm_rr[ix > 0] = PWM_RR_EN_TO_REG(0, ix, | 1231 | data->pwm_rr[ix > 0] = PWM_RR_EN_TO_REG(0, ix, |
| 1235 | data->pwm_rr[ix > 0]); | 1232 | data->pwm_rr[ix > 0]); |
| 1236 | dme1737_write(client, | 1233 | dme1737_write(data, |
| 1237 | DME1737_REG_PWM_RR(ix > 0), | 1234 | DME1737_REG_PWM_RR(ix > 0), |
| 1238 | data->pwm_rr[ix > 0]); | 1235 | data->pwm_rr[ix > 0]); |
| 1239 | } | 1236 | } |
| @@ -1247,14 +1244,14 @@ static ssize_t set_pwm(struct device *dev, struct device_attribute *attr, | |||
| 1247 | /* Turn fan fully on */ | 1244 | /* Turn fan fully on */ |
| 1248 | data->pwm_config[ix] = PWM_EN_TO_REG(0, | 1245 | data->pwm_config[ix] = PWM_EN_TO_REG(0, |
| 1249 | data->pwm_config[ix]); | 1246 | data->pwm_config[ix]); |
| 1250 | dme1737_write(client, DME1737_REG_PWM_CONFIG(ix), | 1247 | dme1737_write(data, DME1737_REG_PWM_CONFIG(ix), |
| 1251 | data->pwm_config[ix]); | 1248 | data->pwm_config[ix]); |
| 1252 | break; | 1249 | break; |
| 1253 | case 1: | 1250 | case 1: |
| 1254 | /* Turn on manual mode */ | 1251 | /* Turn on manual mode */ |
| 1255 | data->pwm_config[ix] = PWM_EN_TO_REG(1, | 1252 | data->pwm_config[ix] = PWM_EN_TO_REG(1, |
| 1256 | data->pwm_config[ix]); | 1253 | data->pwm_config[ix]); |
| 1257 | dme1737_write(client, DME1737_REG_PWM_CONFIG(ix), | 1254 | dme1737_write(data, DME1737_REG_PWM_CONFIG(ix), |
| 1258 | data->pwm_config[ix]); | 1255 | data->pwm_config[ix]); |
| 1259 | /* Change permissions of pwm[ix] to read-writeable */ | 1256 | /* Change permissions of pwm[ix] to read-writeable */ |
| 1260 | dme1737_chmod_file(dev, dme1737_pwm_chmod_attr[ix], | 1257 | dme1737_chmod_file(dev, dme1737_pwm_chmod_attr[ix], |
| @@ -1269,14 +1266,14 @@ static ssize_t set_pwm(struct device *dev, struct device_attribute *attr, | |||
| 1269 | data->pwm_config[ix] = PWM_ACZ_TO_REG( | 1266 | data->pwm_config[ix] = PWM_ACZ_TO_REG( |
| 1270 | data->pwm_acz[ix], | 1267 | data->pwm_acz[ix], |
| 1271 | data->pwm_config[ix]); | 1268 | data->pwm_config[ix]); |
| 1272 | dme1737_write(client, DME1737_REG_PWM_CONFIG(ix), | 1269 | dme1737_write(data, DME1737_REG_PWM_CONFIG(ix), |
| 1273 | data->pwm_config[ix]); | 1270 | data->pwm_config[ix]); |
| 1274 | /* Enable PWM ramp rate if previously enabled */ | 1271 | /* Enable PWM ramp rate if previously enabled */ |
| 1275 | if (data->pwm_rr_en & (1 << ix)) { | 1272 | if (data->pwm_rr_en & (1 << ix)) { |
| 1276 | data->pwm_rr[ix > 0] = PWM_RR_EN_TO_REG(1, ix, | 1273 | data->pwm_rr[ix > 0] = PWM_RR_EN_TO_REG(1, ix, |
| 1277 | dme1737_read(client, | 1274 | dme1737_read(data, |
| 1278 | DME1737_REG_PWM_RR(ix > 0))); | 1275 | DME1737_REG_PWM_RR(ix > 0))); |
| 1279 | dme1737_write(client, | 1276 | dme1737_write(data, |
| 1280 | DME1737_REG_PWM_RR(ix > 0), | 1277 | DME1737_REG_PWM_RR(ix > 0), |
| 1281 | data->pwm_rr[ix > 0]); | 1278 | data->pwm_rr[ix > 0]); |
| 1282 | } | 1279 | } |
| @@ -1286,9 +1283,9 @@ static ssize_t set_pwm(struct device *dev, struct device_attribute *attr, | |||
| 1286 | case SYS_PWM_RAMP_RATE: | 1283 | case SYS_PWM_RAMP_RATE: |
| 1287 | /* Only valid for pwm[1-3] */ | 1284 | /* Only valid for pwm[1-3] */ |
| 1288 | /* Refresh the cache */ | 1285 | /* Refresh the cache */ |
| 1289 | data->pwm_config[ix] = dme1737_read(client, | 1286 | data->pwm_config[ix] = dme1737_read(data, |
| 1290 | DME1737_REG_PWM_CONFIG(ix)); | 1287 | DME1737_REG_PWM_CONFIG(ix)); |
| 1291 | data->pwm_rr[ix > 0] = dme1737_read(client, | 1288 | data->pwm_rr[ix > 0] = dme1737_read(data, |
| 1292 | DME1737_REG_PWM_RR(ix > 0)); | 1289 | DME1737_REG_PWM_RR(ix > 0)); |
| 1293 | /* Set the ramp rate value */ | 1290 | /* Set the ramp rate value */ |
| 1294 | if (val > 0) { | 1291 | if (val > 0) { |
| @@ -1301,7 +1298,7 @@ static ssize_t set_pwm(struct device *dev, struct device_attribute *attr, | |||
| 1301 | data->pwm_rr[ix > 0] = PWM_RR_EN_TO_REG(val > 0, ix, | 1298 | data->pwm_rr[ix > 0] = PWM_RR_EN_TO_REG(val > 0, ix, |
| 1302 | data->pwm_rr[ix > 0]); | 1299 | data->pwm_rr[ix > 0]); |
| 1303 | } | 1300 | } |
| 1304 | dme1737_write(client, DME1737_REG_PWM_RR(ix > 0), | 1301 | dme1737_write(data, DME1737_REG_PWM_RR(ix > 0), |
| 1305 | data->pwm_rr[ix > 0]); | 1302 | data->pwm_rr[ix > 0]); |
| 1306 | break; | 1303 | break; |
| 1307 | case SYS_PWM_AUTO_CHANNELS_ZONE: | 1304 | case SYS_PWM_AUTO_CHANNELS_ZONE: |
| @@ -1315,14 +1312,14 @@ static ssize_t set_pwm(struct device *dev, struct device_attribute *attr, | |||
| 1315 | goto exit; | 1312 | goto exit; |
| 1316 | } | 1313 | } |
| 1317 | /* Refresh the cache */ | 1314 | /* Refresh the cache */ |
| 1318 | data->pwm_config[ix] = dme1737_read(client, | 1315 | data->pwm_config[ix] = dme1737_read(data, |
| 1319 | DME1737_REG_PWM_CONFIG(ix)); | 1316 | DME1737_REG_PWM_CONFIG(ix)); |
| 1320 | if (PWM_EN_FROM_REG(data->pwm_config[ix]) == 2) { | 1317 | if (PWM_EN_FROM_REG(data->pwm_config[ix]) == 2) { |
| 1321 | /* PWM is already in auto mode so update the temp | 1318 | /* PWM is already in auto mode so update the temp |
| 1322 | * channel assignment */ | 1319 | * channel assignment */ |
| 1323 | data->pwm_config[ix] = PWM_ACZ_TO_REG(val, | 1320 | data->pwm_config[ix] = PWM_ACZ_TO_REG(val, |
| 1324 | data->pwm_config[ix]); | 1321 | data->pwm_config[ix]); |
| 1325 | dme1737_write(client, DME1737_REG_PWM_CONFIG(ix), | 1322 | dme1737_write(data, DME1737_REG_PWM_CONFIG(ix), |
| 1326 | data->pwm_config[ix]); | 1323 | data->pwm_config[ix]); |
| 1327 | } else { | 1324 | } else { |
| 1328 | /* PWM is not in auto mode so we save the temp | 1325 | /* PWM is not in auto mode so we save the temp |
| @@ -1333,7 +1330,7 @@ static ssize_t set_pwm(struct device *dev, struct device_attribute *attr, | |||
| 1333 | case SYS_PWM_AUTO_PWM_MIN: | 1330 | case SYS_PWM_AUTO_PWM_MIN: |
| 1334 | /* Only valid for pwm[1-3] */ | 1331 | /* Only valid for pwm[1-3] */ |
| 1335 | /* Refresh the cache */ | 1332 | /* Refresh the cache */ |
| 1336 | data->pwm_min[ix] = dme1737_read(client, | 1333 | data->pwm_min[ix] = dme1737_read(data, |
| 1337 | DME1737_REG_PWM_MIN(ix)); | 1334 | DME1737_REG_PWM_MIN(ix)); |
| 1338 | /* There are only 2 values supported for the auto_pwm_min | 1335 | /* There are only 2 values supported for the auto_pwm_min |
| 1339 | * value: 0 or auto_point1_pwm. So if the temperature drops | 1336 | * value: 0 or auto_point1_pwm. So if the temperature drops |
| @@ -1341,20 +1338,20 @@ static ssize_t set_pwm(struct device *dev, struct device_attribute *attr, | |||
| 1341 | * off or runs at auto_point1_pwm duty-cycle. */ | 1338 | * off or runs at auto_point1_pwm duty-cycle. */ |
| 1342 | if (val > ((data->pwm_min[ix] + 1) / 2)) { | 1339 | if (val > ((data->pwm_min[ix] + 1) / 2)) { |
| 1343 | data->pwm_rr[0] = PWM_OFF_TO_REG(1, ix, | 1340 | data->pwm_rr[0] = PWM_OFF_TO_REG(1, ix, |
| 1344 | dme1737_read(client, | 1341 | dme1737_read(data, |
| 1345 | DME1737_REG_PWM_RR(0))); | 1342 | DME1737_REG_PWM_RR(0))); |
| 1346 | } else { | 1343 | } else { |
| 1347 | data->pwm_rr[0] = PWM_OFF_TO_REG(0, ix, | 1344 | data->pwm_rr[0] = PWM_OFF_TO_REG(0, ix, |
| 1348 | dme1737_read(client, | 1345 | dme1737_read(data, |
| 1349 | DME1737_REG_PWM_RR(0))); | 1346 | DME1737_REG_PWM_RR(0))); |
| 1350 | } | 1347 | } |
| 1351 | dme1737_write(client, DME1737_REG_PWM_RR(0), | 1348 | dme1737_write(data, DME1737_REG_PWM_RR(0), |
| 1352 | data->pwm_rr[0]); | 1349 | data->pwm_rr[0]); |
| 1353 | break; | 1350 | break; |
| 1354 | case SYS_PWM_AUTO_POINT1_PWM: | 1351 | case SYS_PWM_AUTO_POINT1_PWM: |
| 1355 | /* Only valid for pwm[1-3] */ | 1352 | /* Only valid for pwm[1-3] */ |
| 1356 | data->pwm_min[ix] = SENSORS_LIMIT(val, 0, 255); | 1353 | data->pwm_min[ix] = SENSORS_LIMIT(val, 0, 255); |
| 1357 | dme1737_write(client, DME1737_REG_PWM_MIN(ix), | 1354 | dme1737_write(data, DME1737_REG_PWM_MIN(ix), |
| 1358 | data->pwm_min[ix]); | 1355 | data->pwm_min[ix]); |
| 1359 | break; | 1356 | break; |
| 1360 | default: | 1357 | default: |
| @@ -1402,7 +1399,7 @@ static ssize_t show_name(struct device *dev, struct device_attribute *attr, | |||
| 1402 | { | 1399 | { |
| 1403 | struct dme1737_data *data = dev_get_drvdata(dev); | 1400 | struct dme1737_data *data = dev_get_drvdata(dev); |
| 1404 | 1401 | ||
| 1405 | return sprintf(buf, "%s\n", data->client.name); | 1402 | return sprintf(buf, "%s\n", data->name); |
| 1406 | } | 1403 | } |
| 1407 | 1404 | ||
| 1408 | /* --------------------------------------------------------------------- | 1405 | /* --------------------------------------------------------------------- |
| @@ -1908,7 +1905,7 @@ static void dme1737_remove_files(struct device *dev) | |||
| 1908 | 1905 | ||
| 1909 | sysfs_remove_group(&dev->kobj, &dme1737_group); | 1906 | sysfs_remove_group(&dev->kobj, &dme1737_group); |
| 1910 | 1907 | ||
| 1911 | if (!data->client.driver) { | 1908 | if (!data->client) { |
| 1912 | sysfs_remove_file(&dev->kobj, &dev_attr_name.attr); | 1909 | sysfs_remove_file(&dev->kobj, &dev_attr_name.attr); |
| 1913 | } | 1910 | } |
| 1914 | } | 1911 | } |
| @@ -1919,7 +1916,7 @@ static int dme1737_create_files(struct device *dev) | |||
| 1919 | int err, ix; | 1916 | int err, ix; |
| 1920 | 1917 | ||
| 1921 | /* Create a name attribute for ISA devices */ | 1918 | /* Create a name attribute for ISA devices */ |
| 1922 | if (!data->client.driver && | 1919 | if (!data->client && |
| 1923 | (err = sysfs_create_file(&dev->kobj, &dev_attr_name.attr))) { | 1920 | (err = sysfs_create_file(&dev->kobj, &dev_attr_name.attr))) { |
| 1924 | goto exit; | 1921 | goto exit; |
| 1925 | } | 1922 | } |
| @@ -2013,14 +2010,14 @@ exit: | |||
| 2013 | static int dme1737_init_device(struct device *dev) | 2010 | static int dme1737_init_device(struct device *dev) |
| 2014 | { | 2011 | { |
| 2015 | struct dme1737_data *data = dev_get_drvdata(dev); | 2012 | struct dme1737_data *data = dev_get_drvdata(dev); |
| 2016 | struct i2c_client *client = &data->client; | 2013 | struct i2c_client *client = data->client; |
| 2017 | int ix; | 2014 | int ix; |
| 2018 | u8 reg; | 2015 | u8 reg; |
| 2019 | 2016 | ||
| 2020 | /* Point to the right nominal voltages array */ | 2017 | /* Point to the right nominal voltages array */ |
| 2021 | data->in_nominal = IN_NOMINAL(data->type); | 2018 | data->in_nominal = IN_NOMINAL(data->type); |
| 2022 | 2019 | ||
| 2023 | data->config = dme1737_read(client, DME1737_REG_CONFIG); | 2020 | data->config = dme1737_read(data, DME1737_REG_CONFIG); |
| 2024 | /* Inform if part is not monitoring/started */ | 2021 | /* Inform if part is not monitoring/started */ |
| 2025 | if (!(data->config & 0x01)) { | 2022 | if (!(data->config & 0x01)) { |
| 2026 | if (!force_start) { | 2023 | if (!force_start) { |
| @@ -2032,7 +2029,7 @@ static int dme1737_init_device(struct device *dev) | |||
| 2032 | 2029 | ||
| 2033 | /* Force monitoring */ | 2030 | /* Force monitoring */ |
| 2034 | data->config |= 0x01; | 2031 | data->config |= 0x01; |
| 2035 | dme1737_write(client, DME1737_REG_CONFIG, data->config); | 2032 | dme1737_write(data, DME1737_REG_CONFIG, data->config); |
| 2036 | } | 2033 | } |
| 2037 | /* Inform if part is not ready */ | 2034 | /* Inform if part is not ready */ |
| 2038 | if (!(data->config & 0x04)) { | 2035 | if (!(data->config & 0x04)) { |
| @@ -2041,8 +2038,8 @@ static int dme1737_init_device(struct device *dev) | |||
| 2041 | } | 2038 | } |
| 2042 | 2039 | ||
| 2043 | /* Determine which optional fan and pwm features are enabled/present */ | 2040 | /* Determine which optional fan and pwm features are enabled/present */ |
| 2044 | if (client->driver) { /* I2C chip */ | 2041 | if (client) { /* I2C chip */ |
| 2045 | data->config2 = dme1737_read(client, DME1737_REG_CONFIG2); | 2042 | data->config2 = dme1737_read(data, DME1737_REG_CONFIG2); |
| 2046 | /* Check if optional fan3 input is enabled */ | 2043 | /* Check if optional fan3 input is enabled */ |
| 2047 | if (data->config2 & 0x04) { | 2044 | if (data->config2 & 0x04) { |
| 2048 | data->has_fan |= (1 << 2); | 2045 | data->has_fan |= (1 << 2); |
| @@ -2051,7 +2048,7 @@ static int dme1737_init_device(struct device *dev) | |||
| 2051 | /* Fan4 and pwm3 are only available if the client's I2C address | 2048 | /* Fan4 and pwm3 are only available if the client's I2C address |
| 2052 | * is the default 0x2e. Otherwise the I/Os associated with | 2049 | * is the default 0x2e. Otherwise the I/Os associated with |
| 2053 | * these functions are used for addr enable/select. */ | 2050 | * these functions are used for addr enable/select. */ |
| 2054 | if (data->client.addr == 0x2e) { | 2051 | if (client->addr == 0x2e) { |
| 2055 | data->has_fan |= (1 << 3); | 2052 | data->has_fan |= (1 << 3); |
| 2056 | data->has_pwm |= (1 << 2); | 2053 | data->has_pwm |= (1 << 2); |
| 2057 | } | 2054 | } |
| @@ -2086,16 +2083,16 @@ static int dme1737_init_device(struct device *dev) | |||
| 2086 | (data->has_fan & (1 << 4)) ? "yes" : "no", | 2083 | (data->has_fan & (1 << 4)) ? "yes" : "no", |
| 2087 | (data->has_fan & (1 << 5)) ? "yes" : "no"); | 2084 | (data->has_fan & (1 << 5)) ? "yes" : "no"); |
| 2088 | 2085 | ||
| 2089 | reg = dme1737_read(client, DME1737_REG_TACH_PWM); | 2086 | reg = dme1737_read(data, DME1737_REG_TACH_PWM); |
| 2090 | /* Inform if fan-to-pwm mapping differs from the default */ | 2087 | /* Inform if fan-to-pwm mapping differs from the default */ |
| 2091 | if (client->driver && reg != 0xa4) { /* I2C chip */ | 2088 | if (client && reg != 0xa4) { /* I2C chip */ |
| 2092 | dev_warn(dev, "Non-standard fan to pwm mapping: " | 2089 | dev_warn(dev, "Non-standard fan to pwm mapping: " |
| 2093 | "fan1->pwm%d, fan2->pwm%d, fan3->pwm%d, " | 2090 | "fan1->pwm%d, fan2->pwm%d, fan3->pwm%d, " |
| 2094 | "fan4->pwm%d. Please report to the driver " | 2091 | "fan4->pwm%d. Please report to the driver " |
| 2095 | "maintainer.\n", | 2092 | "maintainer.\n", |
| 2096 | (reg & 0x03) + 1, ((reg >> 2) & 0x03) + 1, | 2093 | (reg & 0x03) + 1, ((reg >> 2) & 0x03) + 1, |
| 2097 | ((reg >> 4) & 0x03) + 1, ((reg >> 6) & 0x03) + 1); | 2094 | ((reg >> 4) & 0x03) + 1, ((reg >> 6) & 0x03) + 1); |
| 2098 | } else if (!client->driver && reg != 0x24) { /* ISA chip */ | 2095 | } else if (!client && reg != 0x24) { /* ISA chip */ |
| 2099 | dev_warn(dev, "Non-standard fan to pwm mapping: " | 2096 | dev_warn(dev, "Non-standard fan to pwm mapping: " |
| 2100 | "fan1->pwm%d, fan2->pwm%d, fan3->pwm%d. " | 2097 | "fan1->pwm%d, fan2->pwm%d, fan3->pwm%d. " |
| 2101 | "Please report to the driver maintainer.\n", | 2098 | "Please report to the driver maintainer.\n", |
| @@ -2108,7 +2105,7 @@ static int dme1737_init_device(struct device *dev) | |||
| 2108 | * disabled). */ | 2105 | * disabled). */ |
| 2109 | if (!(data->config & 0x02)) { | 2106 | if (!(data->config & 0x02)) { |
| 2110 | for (ix = 0; ix < 3; ix++) { | 2107 | for (ix = 0; ix < 3; ix++) { |
| 2111 | data->pwm_config[ix] = dme1737_read(client, | 2108 | data->pwm_config[ix] = dme1737_read(data, |
| 2112 | DME1737_REG_PWM_CONFIG(ix)); | 2109 | DME1737_REG_PWM_CONFIG(ix)); |
| 2113 | if ((data->has_pwm & (1 << ix)) && | 2110 | if ((data->has_pwm & (1 << ix)) && |
| 2114 | (PWM_EN_FROM_REG(data->pwm_config[ix]) == -1)) { | 2111 | (PWM_EN_FROM_REG(data->pwm_config[ix]) == -1)) { |
| @@ -2116,8 +2113,8 @@ static int dme1737_init_device(struct device *dev) | |||
| 2116 | "manual mode.\n", ix + 1); | 2113 | "manual mode.\n", ix + 1); |
| 2117 | data->pwm_config[ix] = PWM_EN_TO_REG(1, | 2114 | data->pwm_config[ix] = PWM_EN_TO_REG(1, |
| 2118 | data->pwm_config[ix]); | 2115 | data->pwm_config[ix]); |
| 2119 | dme1737_write(client, DME1737_REG_PWM(ix), 0); | 2116 | dme1737_write(data, DME1737_REG_PWM(ix), 0); |
| 2120 | dme1737_write(client, | 2117 | dme1737_write(data, |
| 2121 | DME1737_REG_PWM_CONFIG(ix), | 2118 | DME1737_REG_PWM_CONFIG(ix), |
| 2122 | data->pwm_config[ix]); | 2119 | data->pwm_config[ix]); |
| 2123 | } | 2120 | } |
| @@ -2210,7 +2207,8 @@ static int dme1737_i2c_detect(struct i2c_adapter *adapter, int address, | |||
| 2210 | goto exit; | 2207 | goto exit; |
| 2211 | } | 2208 | } |
| 2212 | 2209 | ||
| 2213 | client = &data->client; | 2210 | client = &data->_client; |
| 2211 | data->client = client; | ||
| 2214 | i2c_set_clientdata(client, data); | 2212 | i2c_set_clientdata(client, data); |
| 2215 | client->addr = address; | 2213 | client->addr = address; |
| 2216 | client->adapter = adapter; | 2214 | client->adapter = adapter; |
| @@ -2220,8 +2218,8 @@ static int dme1737_i2c_detect(struct i2c_adapter *adapter, int address, | |||
| 2220 | /* A negative kind means that the driver was loaded with no force | 2218 | /* A negative kind means that the driver was loaded with no force |
| 2221 | * parameter (default), so we must identify the chip. */ | 2219 | * parameter (default), so we must identify the chip. */ |
| 2222 | if (kind < 0) { | 2220 | if (kind < 0) { |
| 2223 | company = dme1737_read(client, DME1737_REG_COMPANY); | 2221 | company = dme1737_read(data, DME1737_REG_COMPANY); |
| 2224 | verstep = dme1737_read(client, DME1737_REG_VERSTEP); | 2222 | verstep = dme1737_read(data, DME1737_REG_VERSTEP); |
| 2225 | 2223 | ||
| 2226 | if (company == DME1737_COMPANY_SMSC && | 2224 | if (company == DME1737_COMPANY_SMSC && |
| 2227 | (verstep & DME1737_VERSTEP_MASK) == DME1737_VERSTEP) { | 2225 | (verstep & DME1737_VERSTEP_MASK) == DME1737_VERSTEP) { |
| @@ -2246,6 +2244,7 @@ static int dme1737_i2c_detect(struct i2c_adapter *adapter, int address, | |||
| 2246 | /* Fill in the remaining client fields and put it into the global | 2244 | /* Fill in the remaining client fields and put it into the global |
| 2247 | * list */ | 2245 | * list */ |
| 2248 | strlcpy(client->name, name, I2C_NAME_SIZE); | 2246 | strlcpy(client->name, name, I2C_NAME_SIZE); |
| 2247 | data->name = client->name; | ||
| 2249 | mutex_init(&data->update_lock); | 2248 | mutex_init(&data->update_lock); |
| 2250 | 2249 | ||
| 2251 | /* Tell the I2C layer a new client has arrived */ | 2250 | /* Tell the I2C layer a new client has arrived */ |
| @@ -2403,7 +2402,6 @@ static int __devinit dme1737_isa_probe(struct platform_device *pdev) | |||
| 2403 | { | 2402 | { |
| 2404 | u8 company, device; | 2403 | u8 company, device; |
| 2405 | struct resource *res; | 2404 | struct resource *res; |
| 2406 | struct i2c_client *client; | ||
| 2407 | struct dme1737_data *data; | 2405 | struct dme1737_data *data; |
| 2408 | struct device *dev = &pdev->dev; | 2406 | struct device *dev = &pdev->dev; |
| 2409 | int err; | 2407 | int err; |
| @@ -2422,15 +2420,13 @@ static int __devinit dme1737_isa_probe(struct platform_device *pdev) | |||
| 2422 | goto exit_release_region; | 2420 | goto exit_release_region; |
| 2423 | } | 2421 | } |
| 2424 | 2422 | ||
| 2425 | client = &data->client; | 2423 | data->addr = res->start; |
| 2426 | i2c_set_clientdata(client, data); | ||
| 2427 | client->addr = res->start; | ||
| 2428 | platform_set_drvdata(pdev, data); | 2424 | platform_set_drvdata(pdev, data); |
| 2429 | 2425 | ||
| 2430 | /* Skip chip detection if module is loaded with force_id parameter */ | 2426 | /* Skip chip detection if module is loaded with force_id parameter */ |
| 2431 | if (!force_id) { | 2427 | if (!force_id) { |
| 2432 | company = dme1737_read(client, DME1737_REG_COMPANY); | 2428 | company = dme1737_read(data, DME1737_REG_COMPANY); |
| 2433 | device = dme1737_read(client, DME1737_REG_DEVICE); | 2429 | device = dme1737_read(data, DME1737_REG_DEVICE); |
| 2434 | 2430 | ||
| 2435 | if (!((company == DME1737_COMPANY_SMSC) && | 2431 | if (!((company == DME1737_COMPANY_SMSC) && |
| 2436 | (device == SCH311X_DEVICE))) { | 2432 | (device == SCH311X_DEVICE))) { |
| @@ -2441,10 +2437,10 @@ static int __devinit dme1737_isa_probe(struct platform_device *pdev) | |||
| 2441 | data->type = sch311x; | 2437 | data->type = sch311x; |
| 2442 | 2438 | ||
| 2443 | /* Fill in the remaining client fields and initialize the mutex */ | 2439 | /* Fill in the remaining client fields and initialize the mutex */ |
| 2444 | strlcpy(client->name, "sch311x", I2C_NAME_SIZE); | 2440 | data->name = "sch311x"; |
| 2445 | mutex_init(&data->update_lock); | 2441 | mutex_init(&data->update_lock); |
| 2446 | 2442 | ||
| 2447 | dev_info(dev, "Found a SCH311x chip at 0x%04x\n", client->addr); | 2443 | dev_info(dev, "Found a SCH311x chip at 0x%04x\n", data->addr); |
| 2448 | 2444 | ||
| 2449 | /* Initialize the chip */ | 2445 | /* Initialize the chip */ |
| 2450 | if ((err = dme1737_init_device(dev))) { | 2446 | if ((err = dme1737_init_device(dev))) { |
| @@ -2485,7 +2481,7 @@ static int __devexit dme1737_isa_remove(struct platform_device *pdev) | |||
| 2485 | 2481 | ||
| 2486 | hwmon_device_unregister(data->hwmon_dev); | 2482 | hwmon_device_unregister(data->hwmon_dev); |
| 2487 | dme1737_remove_files(&pdev->dev); | 2483 | dme1737_remove_files(&pdev->dev); |
| 2488 | release_region(data->client.addr, DME1737_EXTENT); | 2484 | release_region(data->addr, DME1737_EXTENT); |
| 2489 | platform_set_drvdata(pdev, NULL); | 2485 | platform_set_drvdata(pdev, NULL); |
| 2490 | kfree(data); | 2486 | kfree(data); |
| 2491 | 2487 | ||
