diff options
| -rw-r--r-- | drivers/gpu/drm/radeon/r100.c | 52 | ||||
| -rw-r--r-- | drivers/gpu/drm/radeon/r100_track.h | 5 | ||||
| -rw-r--r-- | drivers/gpu/drm/radeon/r200.c | 10 | ||||
| -rw-r--r-- | drivers/gpu/drm/radeon/r300.c | 12 |
4 files changed, 70 insertions, 9 deletions
diff --git a/drivers/gpu/drm/radeon/r100.c b/drivers/gpu/drm/radeon/r100.c index 44d599aded9a..84e5df766d3f 100644 --- a/drivers/gpu/drm/radeon/r100.c +++ b/drivers/gpu/drm/radeon/r100.c | |||
| @@ -1374,7 +1374,6 @@ static int r100_packet0_check(struct radeon_cs_parser *p, | |||
| 1374 | case RADEON_TXFORMAT_ARGB4444: | 1374 | case RADEON_TXFORMAT_ARGB4444: |
| 1375 | case RADEON_TXFORMAT_VYUY422: | 1375 | case RADEON_TXFORMAT_VYUY422: |
| 1376 | case RADEON_TXFORMAT_YVYU422: | 1376 | case RADEON_TXFORMAT_YVYU422: |
| 1377 | case RADEON_TXFORMAT_DXT1: | ||
| 1378 | case RADEON_TXFORMAT_SHADOW16: | 1377 | case RADEON_TXFORMAT_SHADOW16: |
| 1379 | case RADEON_TXFORMAT_LDUDV655: | 1378 | case RADEON_TXFORMAT_LDUDV655: |
| 1380 | case RADEON_TXFORMAT_DUDV88: | 1379 | case RADEON_TXFORMAT_DUDV88: |
| @@ -1382,12 +1381,19 @@ static int r100_packet0_check(struct radeon_cs_parser *p, | |||
| 1382 | break; | 1381 | break; |
| 1383 | case RADEON_TXFORMAT_ARGB8888: | 1382 | case RADEON_TXFORMAT_ARGB8888: |
| 1384 | case RADEON_TXFORMAT_RGBA8888: | 1383 | case RADEON_TXFORMAT_RGBA8888: |
| 1385 | case RADEON_TXFORMAT_DXT23: | ||
| 1386 | case RADEON_TXFORMAT_DXT45: | ||
| 1387 | case RADEON_TXFORMAT_SHADOW32: | 1384 | case RADEON_TXFORMAT_SHADOW32: |
| 1388 | case RADEON_TXFORMAT_LDUDUV8888: | 1385 | case RADEON_TXFORMAT_LDUDUV8888: |
| 1389 | track->textures[i].cpp = 4; | 1386 | track->textures[i].cpp = 4; |
| 1390 | break; | 1387 | break; |
| 1388 | case RADEON_TXFORMAT_DXT1: | ||
| 1389 | track->textures[i].cpp = 1; | ||
| 1390 | track->textures[i].compress_format = R100_TRACK_COMP_DXT1; | ||
| 1391 | break; | ||
| 1392 | case RADEON_TXFORMAT_DXT23: | ||
| 1393 | case RADEON_TXFORMAT_DXT45: | ||
| 1394 | track->textures[i].cpp = 1; | ||
| 1395 | track->textures[i].compress_format = R100_TRACK_COMP_DXT35; | ||
| 1396 | break; | ||
| 1391 | } | 1397 | } |
| 1392 | track->textures[i].cube_info[4].width = 1 << ((idx_value >> 16) & 0xf); | 1398 | track->textures[i].cube_info[4].width = 1 << ((idx_value >> 16) & 0xf); |
| 1393 | track->textures[i].cube_info[4].height = 1 << ((idx_value >> 20) & 0xf); | 1399 | track->textures[i].cube_info[4].height = 1 << ((idx_value >> 20) & 0xf); |
| @@ -2731,6 +2737,7 @@ static inline void r100_cs_track_texture_print(struct r100_cs_track_texture *t) | |||
| 2731 | DRM_ERROR("coordinate type %d\n", t->tex_coord_type); | 2737 | DRM_ERROR("coordinate type %d\n", t->tex_coord_type); |
| 2732 | DRM_ERROR("width round to power of 2 %d\n", t->roundup_w); | 2738 | DRM_ERROR("width round to power of 2 %d\n", t->roundup_w); |
| 2733 | DRM_ERROR("height round to power of 2 %d\n", t->roundup_h); | 2739 | DRM_ERROR("height round to power of 2 %d\n", t->roundup_h); |
| 2740 | DRM_ERROR("compress format %d\n", t->compress_format); | ||
| 2734 | } | 2741 | } |
| 2735 | 2742 | ||
| 2736 | static int r100_cs_track_cube(struct radeon_device *rdev, | 2743 | static int r100_cs_track_cube(struct radeon_device *rdev, |
| @@ -2760,6 +2767,36 @@ static int r100_cs_track_cube(struct radeon_device *rdev, | |||
| 2760 | return 0; | 2767 | return 0; |
| 2761 | } | 2768 | } |
| 2762 | 2769 | ||
| 2770 | static int r100_track_compress_size(int compress_format, int w, int h) | ||
| 2771 | { | ||
| 2772 | int block_width, block_height, block_bytes; | ||
| 2773 | int wblocks, hblocks; | ||
| 2774 | int min_wblocks; | ||
| 2775 | int sz; | ||
| 2776 | |||
| 2777 | block_width = 4; | ||
| 2778 | block_height = 4; | ||
| 2779 | |||
| 2780 | switch (compress_format) { | ||
| 2781 | case R100_TRACK_COMP_DXT1: | ||
| 2782 | block_bytes = 8; | ||
| 2783 | min_wblocks = 4; | ||
| 2784 | break; | ||
| 2785 | default: | ||
| 2786 | case R100_TRACK_COMP_DXT35: | ||
| 2787 | block_bytes = 16; | ||
| 2788 | min_wblocks = 2; | ||
| 2789 | break; | ||
| 2790 | } | ||
| 2791 | |||
| 2792 | hblocks = (h + block_height - 1) / block_height; | ||
| 2793 | wblocks = (w + block_width - 1) / block_width; | ||
| 2794 | if (wblocks < min_wblocks) | ||
| 2795 | wblocks = min_wblocks; | ||
| 2796 | sz = wblocks * hblocks * block_bytes; | ||
| 2797 | return sz; | ||
| 2798 | } | ||
| 2799 | |||
| 2763 | static int r100_cs_track_texture_check(struct radeon_device *rdev, | 2800 | static int r100_cs_track_texture_check(struct radeon_device *rdev, |
| 2764 | struct r100_cs_track *track) | 2801 | struct r100_cs_track *track) |
| 2765 | { | 2802 | { |
| @@ -2797,9 +2834,15 @@ static int r100_cs_track_texture_check(struct radeon_device *rdev, | |||
| 2797 | h = h / (1 << i); | 2834 | h = h / (1 << i); |
| 2798 | if (track->textures[u].roundup_h) | 2835 | if (track->textures[u].roundup_h) |
| 2799 | h = roundup_pow_of_two(h); | 2836 | h = roundup_pow_of_two(h); |
| 2800 | size += w * h; | 2837 | if (track->textures[u].compress_format) { |
| 2838 | |||
| 2839 | size += r100_track_compress_size(track->textures[u].compress_format, w, h); | ||
| 2840 | /* compressed textures are block based */ | ||
| 2841 | } else | ||
| 2842 | size += w * h; | ||
| 2801 | } | 2843 | } |
| 2802 | size *= track->textures[u].cpp; | 2844 | size *= track->textures[u].cpp; |
| 2845 | |||
| 2803 | switch (track->textures[u].tex_coord_type) { | 2846 | switch (track->textures[u].tex_coord_type) { |
| 2804 | case 0: | 2847 | case 0: |
| 2805 | break; | 2848 | break; |
| @@ -2967,6 +3010,7 @@ void r100_cs_track_clear(struct radeon_device *rdev, struct r100_cs_track *track | |||
| 2967 | track->arrays[i].esize = 0x7F; | 3010 | track->arrays[i].esize = 0x7F; |
| 2968 | } | 3011 | } |
| 2969 | for (i = 0; i < track->num_texture; i++) { | 3012 | for (i = 0; i < track->num_texture; i++) { |
| 3013 | track->textures[i].compress_format = R100_TRACK_COMP_NONE; | ||
| 2970 | track->textures[i].pitch = 16536; | 3014 | track->textures[i].pitch = 16536; |
| 2971 | track->textures[i].width = 16536; | 3015 | track->textures[i].width = 16536; |
| 2972 | track->textures[i].height = 16536; | 3016 | track->textures[i].height = 16536; |
diff --git a/drivers/gpu/drm/radeon/r100_track.h b/drivers/gpu/drm/radeon/r100_track.h index ca50903dd2bb..7188c3778ee2 100644 --- a/drivers/gpu/drm/radeon/r100_track.h +++ b/drivers/gpu/drm/radeon/r100_track.h | |||
| @@ -28,6 +28,10 @@ struct r100_cs_cube_info { | |||
| 28 | unsigned height; | 28 | unsigned height; |
| 29 | }; | 29 | }; |
| 30 | 30 | ||
| 31 | #define R100_TRACK_COMP_NONE 0 | ||
| 32 | #define R100_TRACK_COMP_DXT1 1 | ||
| 33 | #define R100_TRACK_COMP_DXT35 2 | ||
| 34 | |||
| 31 | struct r100_cs_track_texture { | 35 | struct r100_cs_track_texture { |
| 32 | struct radeon_bo *robj; | 36 | struct radeon_bo *robj; |
| 33 | struct r100_cs_cube_info cube_info[5]; /* info for 5 non-primary faces */ | 37 | struct r100_cs_cube_info cube_info[5]; /* info for 5 non-primary faces */ |
| @@ -44,6 +48,7 @@ struct r100_cs_track_texture { | |||
| 44 | bool enabled; | 48 | bool enabled; |
| 45 | bool roundup_w; | 49 | bool roundup_w; |
| 46 | bool roundup_h; | 50 | bool roundup_h; |
| 51 | unsigned compress_format; | ||
| 47 | }; | 52 | }; |
| 48 | 53 | ||
| 49 | struct r100_cs_track_limits { | 54 | struct r100_cs_track_limits { |
diff --git a/drivers/gpu/drm/radeon/r200.c b/drivers/gpu/drm/radeon/r200.c index eb740fc3549f..20942127c46b 100644 --- a/drivers/gpu/drm/radeon/r200.c +++ b/drivers/gpu/drm/radeon/r200.c | |||
| @@ -401,7 +401,6 @@ int r200_packet0_check(struct radeon_cs_parser *p, | |||
| 401 | case R200_TXFORMAT_Y8: | 401 | case R200_TXFORMAT_Y8: |
| 402 | track->textures[i].cpp = 1; | 402 | track->textures[i].cpp = 1; |
| 403 | break; | 403 | break; |
| 404 | case R200_TXFORMAT_DXT1: | ||
| 405 | case R200_TXFORMAT_AI88: | 404 | case R200_TXFORMAT_AI88: |
| 406 | case R200_TXFORMAT_ARGB1555: | 405 | case R200_TXFORMAT_ARGB1555: |
| 407 | case R200_TXFORMAT_RGB565: | 406 | case R200_TXFORMAT_RGB565: |
| @@ -418,9 +417,16 @@ int r200_packet0_check(struct radeon_cs_parser *p, | |||
| 418 | case R200_TXFORMAT_ABGR8888: | 417 | case R200_TXFORMAT_ABGR8888: |
| 419 | case R200_TXFORMAT_BGR111110: | 418 | case R200_TXFORMAT_BGR111110: |
| 420 | case R200_TXFORMAT_LDVDU8888: | 419 | case R200_TXFORMAT_LDVDU8888: |
| 420 | track->textures[i].cpp = 4; | ||
| 421 | break; | ||
| 422 | case R200_TXFORMAT_DXT1: | ||
| 423 | track->textures[i].cpp = 1; | ||
| 424 | track->textures[i].compress_format = R100_TRACK_COMP_DXT1; | ||
| 425 | break; | ||
| 421 | case R200_TXFORMAT_DXT23: | 426 | case R200_TXFORMAT_DXT23: |
| 422 | case R200_TXFORMAT_DXT45: | 427 | case R200_TXFORMAT_DXT45: |
| 423 | track->textures[i].cpp = 4; | 428 | track->textures[i].cpp = 1; |
| 429 | track->textures[i].compress_format = R100_TRACK_COMP_DXT1; | ||
| 424 | break; | 430 | break; |
| 425 | } | 431 | } |
| 426 | track->textures[i].cube_info[4].width = 1 << ((idx_value >> 16) & 0xf); | 432 | track->textures[i].cube_info[4].width = 1 << ((idx_value >> 16) & 0xf); |
diff --git a/drivers/gpu/drm/radeon/r300.c b/drivers/gpu/drm/radeon/r300.c index dbb149060b1d..83490c2b5061 100644 --- a/drivers/gpu/drm/radeon/r300.c +++ b/drivers/gpu/drm/radeon/r300.c | |||
| @@ -860,7 +860,6 @@ static int r300_packet0_check(struct radeon_cs_parser *p, | |||
| 860 | case R300_TX_FORMAT_Z6Y5X5: | 860 | case R300_TX_FORMAT_Z6Y5X5: |
| 861 | case R300_TX_FORMAT_W4Z4Y4X4: | 861 | case R300_TX_FORMAT_W4Z4Y4X4: |
| 862 | case R300_TX_FORMAT_W1Z5Y5X5: | 862 | case R300_TX_FORMAT_W1Z5Y5X5: |
| 863 | case R300_TX_FORMAT_DXT1: | ||
| 864 | case R300_TX_FORMAT_D3DMFT_CxV8U8: | 863 | case R300_TX_FORMAT_D3DMFT_CxV8U8: |
| 865 | case R300_TX_FORMAT_B8G8_B8G8: | 864 | case R300_TX_FORMAT_B8G8_B8G8: |
| 866 | case R300_TX_FORMAT_G8R8_G8B8: | 865 | case R300_TX_FORMAT_G8R8_G8B8: |
| @@ -874,8 +873,6 @@ static int r300_packet0_check(struct radeon_cs_parser *p, | |||
| 874 | case 0x17: | 873 | case 0x17: |
| 875 | case R300_TX_FORMAT_FL_I32: | 874 | case R300_TX_FORMAT_FL_I32: |
| 876 | case 0x1e: | 875 | case 0x1e: |
| 877 | case R300_TX_FORMAT_DXT3: | ||
| 878 | case R300_TX_FORMAT_DXT5: | ||
| 879 | track->textures[i].cpp = 4; | 876 | track->textures[i].cpp = 4; |
| 880 | break; | 877 | break; |
| 881 | case R300_TX_FORMAT_W16Z16Y16X16: | 878 | case R300_TX_FORMAT_W16Z16Y16X16: |
| @@ -886,6 +883,15 @@ static int r300_packet0_check(struct radeon_cs_parser *p, | |||
| 886 | case R300_TX_FORMAT_FL_R32G32B32A32: | 883 | case R300_TX_FORMAT_FL_R32G32B32A32: |
| 887 | track->textures[i].cpp = 16; | 884 | track->textures[i].cpp = 16; |
| 888 | break; | 885 | break; |
| 886 | case R300_TX_FORMAT_DXT1: | ||
| 887 | track->textures[i].cpp = 1; | ||
| 888 | track->textures[i].compress_format = R100_TRACK_COMP_DXT1; | ||
| 889 | break; | ||
| 890 | case R300_TX_FORMAT_DXT3: | ||
| 891 | case R300_TX_FORMAT_DXT5: | ||
| 892 | track->textures[i].cpp = 1; | ||
| 893 | track->textures[i].compress_format = R100_TRACK_COMP_DXT35; | ||
| 894 | break; | ||
| 889 | default: | 895 | default: |
| 890 | DRM_ERROR("Invalid texture format %u\n", | 896 | DRM_ERROR("Invalid texture format %u\n", |
| 891 | (idx_value & 0x1F)); | 897 | (idx_value & 0x1F)); |
