diff options
| -rw-r--r-- | arch/blackfin/include/asm/bfrom.h | 85 | ||||
| -rw-r--r-- | arch/blackfin/kernel/reboot.c | 10 |
2 files changed, 94 insertions, 1 deletions
diff --git a/arch/blackfin/include/asm/bfrom.h b/arch/blackfin/include/asm/bfrom.h new file mode 100644 index 000000000000..cfe8024c3b2f --- /dev/null +++ b/arch/blackfin/include/asm/bfrom.h | |||
| @@ -0,0 +1,85 @@ | |||
| 1 | /* Blackfin on-chip ROM API | ||
| 2 | * | ||
| 3 | * Copyright 2008 Analog Devices Inc. | ||
| 4 | * | ||
| 5 | * Licensed under the GPL-2 or later. | ||
| 6 | */ | ||
| 7 | |||
| 8 | #ifndef __BFROM_H__ | ||
| 9 | #define __BFROM_H__ | ||
| 10 | |||
| 11 | #include <linux/types.h> | ||
| 12 | |||
| 13 | /* Possible syscontrol action flags */ | ||
| 14 | #define SYSCTRL_READ 0x00000000 /* read registers */ | ||
| 15 | #define SYSCTRL_WRITE 0x00000001 /* write registers */ | ||
| 16 | #define SYSCTRL_SYSRESET 0x00000002 /* perform system reset */ | ||
| 17 | #define SYSCTRL_CORERESET 0x00000004 /* perform core reset */ | ||
| 18 | #define SYSCTRL_SOFTRESET 0x00000006 /* perform core and system reset */ | ||
| 19 | #define SYSCTRL_VRCTL 0x00000010 /* read/write VR_CTL register */ | ||
| 20 | #define SYSCTRL_EXTVOLTAGE 0x00000020 /* VDDINT supplied externally */ | ||
| 21 | #define SYSCTRL_INTVOLTAGE 0x00000000 /* VDDINT generated by on-chip regulator */ | ||
| 22 | #define SYSCTRL_OTPVOLTAGE 0x00000040 /* For Factory Purposes Only */ | ||
| 23 | #define SYSCTRL_PLLCTL 0x00000100 /* read/write PLL_CTL register */ | ||
| 24 | #define SYSCTRL_PLLDIV 0x00000200 /* read/write PLL_DIV register */ | ||
| 25 | #define SYSCTRL_LOCKCNT 0x00000400 /* read/write PLL_LOCKCNT register */ | ||
| 26 | #define SYSCTRL_PLLSTAT 0x00000800 /* read/write PLL_STAT register */ | ||
| 27 | |||
| 28 | typedef struct ADI_SYSCTRL_VALUES { | ||
| 29 | uint16_t uwVrCtl; | ||
| 30 | uint16_t uwPllCtl; | ||
| 31 | uint16_t uwPllDiv; | ||
| 32 | uint16_t uwPllLockCnt; | ||
| 33 | uint16_t uwPllStat; | ||
| 34 | } ADI_SYSCTRL_VALUES; | ||
| 35 | |||
| 36 | static uint32_t (* const bfrom_SysControl)(uint32_t action_flags, ADI_SYSCTRL_VALUES *power_settings, void *reserved) = (void *)0xEF000038; | ||
| 37 | |||
| 38 | /* We need a dedicated function since we need to screw with the stack pointer | ||
| 39 | * when resetting. The on-chip ROM will save/restore registers on the stack | ||
| 40 | * when doing a system reset, so the stack cannot be outside of the chip. | ||
| 41 | */ | ||
| 42 | __attribute__((__noreturn__)) | ||
| 43 | static inline void bfrom_SoftReset(void *new_stack) | ||
| 44 | { | ||
| 45 | while (1) | ||
| 46 | __asm__ __volatile__( | ||
| 47 | "sp = %[stack];" | ||
| 48 | "jump (%[bfrom_syscontrol]);" | ||
| 49 | : : [bfrom_syscontrol] "p"(bfrom_SysControl), | ||
| 50 | "q0"(SYSCTRL_SOFTRESET), | ||
| 51 | "q1"(0), | ||
| 52 | "q2"(NULL), | ||
| 53 | [stack] "p"(new_stack) | ||
| 54 | ); | ||
| 55 | } | ||
| 56 | |||
| 57 | /* OTP Functions */ | ||
| 58 | static uint32_t (* const bfrom_OtpCommand)(uint32_t command, uint32_t value) = (void *)0xEF000018; | ||
| 59 | static uint32_t (* const bfrom_OtpRead)(uint32_t page, uint32_t flags, uint64_t *page_content) = (void *)0xEF00001A; | ||
| 60 | static uint32_t (* const bfrom_OtpWrite)(uint32_t page, uint32_t flags, uint64_t *page_content) = (void *)0xEF00001C; | ||
| 61 | |||
| 62 | /* otp command: defines for "command" */ | ||
| 63 | #define OTP_INIT 0x00000001 | ||
| 64 | #define OTP_CLOSE 0x00000002 | ||
| 65 | |||
| 66 | /* otp read/write: defines for "flags" */ | ||
| 67 | #define OTP_LOWER_HALF 0x00000000 /* select upper/lower 64-bit half (bit 0) */ | ||
| 68 | #define OTP_UPPER_HALF 0x00000001 | ||
| 69 | #define OTP_NO_ECC 0x00000010 /* do not use ECC */ | ||
| 70 | #define OTP_LOCK 0x00000020 /* sets page protection bit for page */ | ||
| 71 | #define OTP_CHECK_FOR_PREV_WRITE 0x00000080 | ||
| 72 | |||
| 73 | /* Return values for all functions */ | ||
| 74 | #define OTP_SUCCESS 0x00000000 | ||
| 75 | #define OTP_MASTER_ERROR 0x001 | ||
| 76 | #define OTP_WRITE_ERROR 0x003 | ||
| 77 | #define OTP_READ_ERROR 0x005 | ||
| 78 | #define OTP_ACC_VIO_ERROR 0x009 | ||
| 79 | #define OTP_DATA_MULT_ERROR 0x011 | ||
| 80 | #define OTP_ECC_MULT_ERROR 0x021 | ||
| 81 | #define OTP_PREV_WR_ERROR 0x041 | ||
| 82 | #define OTP_DATA_SB_WARN 0x100 | ||
| 83 | #define OTP_ECC_SB_WARN 0x200 | ||
| 84 | |||
| 85 | #endif | ||
diff --git a/arch/blackfin/kernel/reboot.c b/arch/blackfin/kernel/reboot.c index d0ead640d992..ae97ca407b0d 100644 --- a/arch/blackfin/kernel/reboot.c +++ b/arch/blackfin/kernel/reboot.c | |||
| @@ -10,6 +10,7 @@ | |||
| 10 | #include <asm/bfin-global.h> | 10 | #include <asm/bfin-global.h> |
| 11 | #include <asm/reboot.h> | 11 | #include <asm/reboot.h> |
| 12 | #include <asm/system.h> | 12 | #include <asm/system.h> |
| 13 | #include <asm/bfrom.h> | ||
| 13 | 14 | ||
| 14 | /* A system soft reset makes external memory unusable so force | 15 | /* A system soft reset makes external memory unusable so force |
| 15 | * this function into L1. We use the compiler ssync here rather | 16 | * this function into L1. We use the compiler ssync here rather |
| @@ -74,7 +75,14 @@ void machine_restart(char *cmd) | |||
| 74 | { | 75 | { |
| 75 | native_machine_restart(cmd); | 76 | native_machine_restart(cmd); |
| 76 | local_irq_disable(); | 77 | local_irq_disable(); |
| 77 | bfin_reset(); | 78 | if (ANOMALY_05000353 || ANOMALY_05000386) |
| 79 | bfin_reset(); | ||
| 80 | else | ||
| 81 | /* the bootrom checks to see how it was reset and will | ||
| 82 | * automatically perform a software reset for us when | ||
| 83 | * it starts executing boot | ||
| 84 | */ | ||
| 85 | asm("raise 1;"); | ||
| 78 | } | 86 | } |
| 79 | 87 | ||
| 80 | __attribute__((weak)) | 88 | __attribute__((weak)) |
