diff options
| -rw-r--r-- | arch/arm/mach-at91rm9200/gpio.c | 14 |
1 files changed, 12 insertions, 2 deletions
diff --git a/arch/arm/mach-at91rm9200/gpio.c b/arch/arm/mach-at91rm9200/gpio.c index a9f718bf8ba8..0e396feec468 100644 --- a/arch/arm/mach-at91rm9200/gpio.c +++ b/arch/arm/mach-at91rm9200/gpio.c | |||
| @@ -274,8 +274,18 @@ static void gpio_irq_handler(unsigned irq, struct irqdesc *desc, struct pt_regs | |||
| 274 | gpio = &irq_desc[pin]; | 274 | gpio = &irq_desc[pin]; |
| 275 | 275 | ||
| 276 | while (isr) { | 276 | while (isr) { |
| 277 | if (isr & 1) | 277 | if (isr & 1) { |
| 278 | gpio->handle(pin, gpio, regs); | 278 | if (unlikely(gpio->disable_depth)) { |
| 279 | /* | ||
| 280 | * The core ARM interrupt handler lazily disables IRQs so | ||
| 281 | * another IRQ must be generated before it actually gets | ||
| 282 | * here to be disabled on the GPIO controller. | ||
| 283 | */ | ||
| 284 | gpio_irq_mask(pin); | ||
| 285 | } | ||
| 286 | else | ||
| 287 | gpio->handle(pin, gpio, regs); | ||
| 288 | } | ||
| 279 | pin++; | 289 | pin++; |
| 280 | gpio++; | 290 | gpio++; |
| 281 | isr >>= 1; | 291 | isr >>= 1; |
