399 files changed, 43280 insertions, 45998 deletions
diff --git a/Documentation/trace/power.txt b/Documentation/trace/power.txt
deleted file mode 100644
index cd805e16dc27..000000000000
--- a/Documentation/trace/power.txt
+++ /dev/null
@@ -1,17 +0,0 @@
-The power tracer collects detailed information about C-state and P-state
-transitions, instead of just looking at the high-level "average"
-information.
-There is a helper script found in scrips/tracing/power.pl in the kernel
-sources which can be used to parse this information and create a
-Scalable Vector Graphics (SVG) picture from the trace data.
-To use this tracer:
-        echo 0 > /sys/kernel/debug/tracing/tracing_enabled
-        echo power > /sys/kernel/debug/tracing/current_tracer
-        echo 1 > /sys/kernel/debug/tracing/tracing_enabled
-        sleep 1
-        echo 0 > /sys/kernel/debug/tracing/tracing_enabled
-        cat /sys/kernel/debug/tracing/trace | \
-                perl scripts/tracing/power.pl > out.sv
diff --git a/arch/mips/loongson/common/time.c b/arch/mips/loongson/common/time.c
index 0edbef32b862..6e08c8270abe 100644
--- a/arch/mips/loongson/common/time.c
+++ b/arch/mips/loongson/common/time.c
@@ -23,6 +23,6 @@ void __init plat_time_init(void)
 void read_persistent_clock(struct timespec *ts)
 {
-        ts->tv_sec = return mc146818_get_cmos_time();
+        ts->tv_sec = mc146818_get_cmos_time();
        ts->tv_nsec = 0;
 }
diff --git a/arch/mn10300/kernel/asm-offsets.c b/arch/mn10300/kernel/asm-offsets.c
index 2646fcbd7d89..82b40079ad76 100644
--- a/arch/mn10300/kernel/asm-offsets.c
+++ b/arch/mn10300/kernel/asm-offsets.c
@@ -95,7 +95,7 @@ void foo(void)
        OFFSET(__iobase,                mn10300_serial_port, _iobase);
        DEFINE(__UART_XMIT_SIZE,        UART_XMIT_SIZE);
-        OFFSET(__xmit_buffer,           uart_info, xmit.buf);
+        OFFSET(__xmit_buffer,           uart_state, xmit.buf);
-        OFFSET(__xmit_head,             uart_info, xmit.head);
+        OFFSET(__xmit_head,             uart_state, xmit.head);
-        OFFSET(__xmit_tail,             uart_info, xmit.tail);
+        OFFSET(__xmit_tail,             uart_state, xmit.tail);
 }
diff --git a/arch/s390/kernel/sys_s390.c b/arch/s390/kernel/sys_s390.c
index c7ae4b17e0e3..e9d94f61d500 100644
--- a/arch/s390/kernel/sys_s390.c
+++ b/arch/s390/kernel/sys_s390.c
@@ -29,7 +29,6 @@
 #include <linux/personality.h>
 #include <linux/unistd.h>
 #include <linux/ipc.h>
-#include <linux/syscalls.h>
 #include <asm/uaccess.h>
 #include "entry.h"
diff --git a/arch/um/os-Linux/helper.c b/arch/um/os-Linux/helper.c
index 30860b89ec58..b6b1096152aa 100644
--- a/arch/um/os-Linux/helper.c
+++ b/arch/um/os-Linux/helper.c
@@ -15,7 +15,6 @@
 #include "os.h"
 #include "um_malloc.h"
 #include "user.h"
-#include <linux/limits.h>
 struct helper_data {
        void (*pre_exec)(void*);
diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index 2055fc2b2e6b..2fea97eccf77 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -34,7 +34,6 @@
 #include <asm/mce.h>
 #include <asm/msr.h>
 #include <asm/pat.h>
-#include <linux/smp.h>
 #ifdef CONFIG_X86_LOCAL_APIC
 #include <asm/uv/uv.h>
diff --git a/arch/x86/kernel/cpu/cpufreq/acpi-cpufreq.c b/arch/x86/kernel/cpu/cpufreq/acpi-cpufreq.c
index 7bb676c533aa..7d5c3b0ea8da 100644
--- a/arch/x86/kernel/cpu/cpufreq/acpi-cpufreq.c
+++ b/arch/x86/kernel/cpu/cpufreq/acpi-cpufreq.c
@@ -33,7 +33,7 @@
 #include <linux/cpufreq.h>
 #include <linux/compiler.h>
 #include <linux/dmi.h>
-#include <trace/power.h>
+#include <trace/events/power.h>
 #include <linux/acpi.h>
 #include <linux/io.h>
@@ -72,8 +72,6 @@ static DEFINE_PER_CPU(struct acpi_cpufreq_data *, drv_data);
 static DEFINE_PER_CPU(struct aperfmperf, old_perf);
-DEFINE_TRACE(power_mark);
 /* acpi_perf_data is a pointer to percpu data. */
 static struct acpi_processor_performance *acpi_perf_data;
@@ -332,7 +330,6 @@ static int acpi_cpufreq_target(struct cpufreq_policy *policy,
        unsigned int next_perf_state = 0; /* Index into perf table */
        unsigned int i;
        int result = 0;
-        struct power_trace it;
        dprintk("acpi_cpufreq_target %d (%d)\n", target_freq, policy->cpu);
@@ -364,7 +361,7 @@ static int acpi_cpufreq_target(struct cpufreq_policy *policy,
                }
        }
-        trace_power_mark(&it, POWER_PSTATE, next_perf_state);
+        trace_power_frequency(POWER_PSTATE, data->freq_table[next_state].frequency);
        switch (data->cpu_feature) {
        case SYSTEM_INTEL_MSR_CAPABLE:
diff --git a/arch/x86/kernel/cpu/perf_counter.c b/arch/x86/kernel/cpu/perf_counter.c
index 2732e2c1e4d3..dbdf712fae9e 100644
--- a/arch/x86/kernel/cpu/perf_counter.c
+++ b/arch/x86/kernel/cpu/perf_counter.c
@@ -36,10 +36,10 @@ static u64 perf_counter_mask __read_mostly;
 #define BTS_RECORD_SIZE         24
 /* The size of a per-cpu BTS buffer in bytes: */
-#define BTS_BUFFER_SIZE         (BTS_RECORD_SIZE * 1024)
+#define BTS_BUFFER_SIZE         (BTS_RECORD_SIZE * 2048)
 /* The BTS overflow threshold in bytes from the end of the buffer: */
-#define BTS_OVFL_TH             (BTS_RECORD_SIZE * 64)
+#define BTS_OVFL_TH             (BTS_RECORD_SIZE * 128)
 /*
@@ -1488,8 +1488,7 @@ void perf_counter_print_debug(void)
        local_irq_restore(flags);
 }
-static void intel_pmu_drain_bts_buffer(struct cpu_hw_counters *cpuc,
+static void intel_pmu_drain_bts_buffer(struct cpu_hw_counters *cpuc)
-                                       struct perf_sample_data *data)
 {
        struct debug_store *ds = cpuc->ds;
        struct bts_record {
@@ -1498,8 +1497,11 @@ static void intel_pmu_drain_bts_buffer(struct cpu_hw_counters *cpuc,
                u64     flags;
        };
        struct perf_counter *counter = cpuc->counters[X86_PMC_IDX_FIXED_BTS];
-        unsigned long orig_ip = data->regs->ip;
        struct bts_record *at, *top;
+        struct perf_output_handle handle;
+        struct perf_event_header header;
+        struct perf_sample_data data;
+        struct pt_regs regs;
        if (!counter)
                return;
@@ -1510,19 +1512,38 @@ static void intel_pmu_drain_bts_buffer(struct cpu_hw_counters *cpuc,
        at  = (struct bts_record *)(unsigned long)ds->bts_buffer_base;
        top = (struct bts_record *)(unsigned long)ds->bts_index;
+        if (top <= at)
+                return;
        ds->bts_index = ds->bts_buffer_base;
+        data.period     = counter->hw.last_period;
+        data.addr       = 0;
+        regs.ip         = 0;
+        /*
+         * Prepare a generic sample, i.e. fill in the invariant fields.
+         * We will overwrite the from and to address before we output
+         * the sample.
+         */
+        perf_prepare_sample(&header, &data, counter, &regs);
+        if (perf_output_begin(&handle, counter,
+                              header.size * (top - at), 1, 1))
+                return;
        for (; at < top; at++) {
-                data->regs->ip  = at->from;
+                data.ip         = at->from;
-                data->addr      = at->to;
+                data.addr       = at->to;
-                perf_counter_output(counter, 1, data);
+                perf_output_sample(&handle, &header, &data, counter);
        }
-        data->regs->ip  = orig_ip;
+        perf_output_end(&handle);
-        data->addr      = 0;
        /* There's new data available. */
+        counter->hw.interrupts++;
        counter->pending_kill = POLL_IN;
 }
@@ -1552,13 +1573,9 @@ static void x86_pmu_disable(struct perf_counter *counter)
        x86_perf_counter_update(counter, hwc, idx);
        /* Drain the remaining BTS records. */
-        if (unlikely(idx == X86_PMC_IDX_FIXED_BTS)) {
+        if (unlikely(idx == X86_PMC_IDX_FIXED_BTS))
-                struct perf_sample_data data;
+                intel_pmu_drain_bts_buffer(cpuc);
-                struct pt_regs regs;
-                data.regs = &regs;
-                intel_pmu_drain_bts_buffer(cpuc, &data);
-        }
        cpuc->counters[idx] = NULL;
        clear_bit(idx, cpuc->used_mask);
@@ -1619,7 +1636,6 @@ static int p6_pmu_handle_irq(struct pt_regs *regs)
        int idx, handled = 0;
        u64 val;
-        data.regs = regs;
        data.addr = 0;
        cpuc = &__get_cpu_var(cpu_hw_counters);
@@ -1644,7 +1660,7 @@ static int p6_pmu_handle_irq(struct pt_regs *regs)
                if (!x86_perf_counter_set_period(counter, hwc, idx))
                        continue;
-                if (perf_counter_overflow(counter, 1, &data))
+                if (perf_counter_overflow(counter, 1, &data, regs))
                        p6_pmu_disable_counter(hwc, idx);
        }
@@ -1665,13 +1681,12 @@ static int intel_pmu_handle_irq(struct pt_regs *regs)
        int bit, loops;
        u64 ack, status;
-        data.regs = regs;
        data.addr = 0;
        cpuc = &__get_cpu_var(cpu_hw_counters);
        perf_disable();
-        intel_pmu_drain_bts_buffer(cpuc, &data);
+        intel_pmu_drain_bts_buffer(cpuc);
        status = intel_pmu_get_status();
        if (!status) {
                perf_enable();
@@ -1702,7 +1717,7 @@ again:
                data.period = counter->hw.last_period;
-                if (perf_counter_overflow(counter, 1, &data))
+                if (perf_counter_overflow(counter, 1, &data, regs))
                        intel_pmu_disable_counter(&counter->hw, bit);
        }
@@ -1729,7 +1744,6 @@ static int amd_pmu_handle_irq(struct pt_regs *regs)
        int idx, handled = 0;
        u64 val;
-        data.regs = regs;
        data.addr = 0;
        cpuc = &__get_cpu_var(cpu_hw_counters);
@@ -1754,7 +1768,7 @@ static int amd_pmu_handle_irq(struct pt_regs *regs)
                if (!x86_perf_counter_set_period(counter, hwc, idx))
                        continue;
-                if (perf_counter_overflow(counter, 1, &data))
+                if (perf_counter_overflow(counter, 1, &data, regs))
                        amd_pmu_disable_counter(hwc, idx);
        }
diff --git a/arch/x86/kernel/cpuid.c b/arch/x86/kernel/cpuid.c
index b07af8861244..6a52d4b36a30 100644
--- a/arch/x86/kernel/cpuid.c
+++ b/arch/x86/kernel/cpuid.c
@@ -182,7 +182,7 @@ static struct notifier_block __refdata cpuid_class_cpu_notifier =
        .notifier_call = cpuid_class_cpu_callback,
 };
-static char *cpuid_nodename(struct device *dev)
+static char *cpuid_devnode(struct device *dev, mode_t *mode)
 {
        return kasprintf(GFP_KERNEL, "cpu/%u/cpuid", MINOR(dev->devt));
 }
@@ -203,7 +203,7 @@ static int __init cpuid_init(void)
                err = PTR_ERR(cpuid_class);
                goto out_chrdev;
        }
-        cpuid_class->nodename = cpuid_nodename;
+        cpuid_class->devnode = cpuid_devnode;
        for_each_online_cpu(i) {
                err = cpuid_device_create(i);
                if (err != 0)
diff --git a/arch/x86/kernel/microcode_core.c b/arch/x86/kernel/microcode_core.c
index 9371448290ac..0db7969b0dde 100644
--- a/arch/x86/kernel/microcode_core.c
+++ b/arch/x86/kernel/microcode_core.c
@@ -236,7 +236,7 @@ static const struct file_operations microcode_fops = {
 static struct miscdevice microcode_dev = {
        .minor                  = MICROCODE_MINOR,
        .name                   = "microcode",
-        .devnode                = "cpu/microcode",
+        .nodename               = "cpu/microcode",
        .fops                   = &microcode_fops,
 };
diff --git a/arch/x86/kernel/msr.c b/arch/x86/kernel/msr.c
index 7dd950094178..6a3cefc7dda1 100644
--- a/arch/x86/kernel/msr.c
+++ b/arch/x86/kernel/msr.c
@@ -241,7 +241,7 @@ static struct notifier_block __refdata msr_class_cpu_notifier = {
        .notifier_call = msr_class_cpu_callback,
 };
-static char *msr_nodename(struct device *dev)
+static char *msr_devnode(struct device *dev, mode_t *mode)
 {
        return kasprintf(GFP_KERNEL, "cpu/%u/msr", MINOR(dev->devt));
 }
@@ -262,7 +262,7 @@ static int __init msr_init(void)
                err = PTR_ERR(msr_class);
                goto out_chrdev;
        }
-        msr_class->nodename = msr_nodename;
+        msr_class->devnode = msr_devnode;
        for_each_online_cpu(i) {
                err = msr_device_create(i);
                if (err != 0)
diff --git a/arch/x86/kernel/process.c b/arch/x86/kernel/process.c
index 071166a4ba83..847ab4160315 100644
--- a/arch/x86/kernel/process.c
+++ b/arch/x86/kernel/process.c
@@ -9,7 +9,7 @@
 #include <linux/pm.h>
 #include <linux/clockchips.h>
 #include <linux/random.h>
-#include <trace/power.h>
+#include <trace/events/power.h>
 #include <asm/system.h>
 #include <asm/apic.h>
 #include <asm/syscalls.h>
@@ -25,9 +25,6 @@ EXPORT_SYMBOL(idle_nomwait);
 struct kmem_cache *task_xstate_cachep;
-DEFINE_TRACE(power_start);
-DEFINE_TRACE(power_end);
 int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src)
 {
        *dst = *src;
@@ -299,9 +296,7 @@ static inline int hlt_use_halt(void)
 void default_idle(void)
 {
        if (hlt_use_halt()) {
-                struct power_trace it;
+                trace_power_start(POWER_CSTATE, 1);
-                trace_power_start(&it, POWER_CSTATE, 1);
                current_thread_info()->status &= ~TS_POLLING;
                /*
                 * TS_POLLING-cleared state must be visible before we
@@ -314,7 +309,6 @@ void default_idle(void)
                else
                        local_irq_enable();
                current_thread_info()->status |= TS_POLLING;
-                trace_power_end(&it);
        } else {
                local_irq_enable();
                /* loop is done by the caller */
@@ -372,9 +366,7 @@ EXPORT_SYMBOL_GPL(cpu_idle_wait);
 */
 void mwait_idle_with_hints(unsigned long ax, unsigned long cx)
 {
-        struct power_trace it;
+        trace_power_start(POWER_CSTATE, (ax>>4)+1);
-        trace_power_start(&it, POWER_CSTATE, (ax>>4)+1);
        if (!need_resched()) {
                if (cpu_has(&current_cpu_data, X86_FEATURE_CLFLUSH_MONITOR))
                        clflush((void *)&current_thread_info()->flags);
@@ -384,15 +376,13 @@ void mwait_idle_with_hints(unsigned long ax, unsigned long cx)
                if (!need_resched())
                        __mwait(ax, cx);
        }
-        trace_power_end(&it);
 }
 /* Default MONITOR/MWAIT with no hints, used for default C1 state */
 static void mwait_idle(void)
 {
-        struct power_trace it;
        if (!need_resched()) {
-                trace_power_start(&it, POWER_CSTATE, 1);
+                trace_power_start(POWER_CSTATE, 1);
                if (cpu_has(&current_cpu_data, X86_FEATURE_CLFLUSH_MONITOR))
                        clflush((void *)&current_thread_info()->flags);
@@ -402,7 +392,6 @@ static void mwait_idle(void)
                        __sti_mwait(0, 0);
                else
                        local_irq_enable();
-                trace_power_end(&it);
        } else
                local_irq_enable();
 }
@@ -414,13 +403,11 @@ static void mwait_idle(void)
 */
 static void poll_idle(void)
 {
-        struct power_trace it;
+        trace_power_start(POWER_CSTATE, 0);
-        trace_power_start(&it, POWER_CSTATE, 0);
        local_irq_enable();
        while (!need_resched())
                cpu_relax();
-        trace_power_end(&it);
+        trace_power_end(0);
 }
 /*
diff --git a/arch/x86/kernel/traps.c b/arch/x86/kernel/traps.c
index 7dc0de9d1ed9..9346e102338d 100644
--- a/arch/x86/kernel/traps.c
+++ b/arch/x86/kernel/traps.c
@@ -65,7 +65,6 @@
 #else
 #include <asm/processor-flags.h>
 #include <asm/setup.h>
-#include <asm/traps.h>
 asmlinkage int system_call(void);
diff --git a/arch/x86/mm/kmemcheck/shadow.c b/arch/x86/mm/kmemcheck/shadow.c
index e773b6bd0079..3f66b82076a3 100644
--- a/arch/x86/mm/kmemcheck/shadow.c
+++ b/arch/x86/mm/kmemcheck/shadow.c
@@ -1,7 +1,6 @@
 #include <linux/kmemcheck.h>
 #include <linux/module.h>
 #include <linux/mm.h>
-#include <linux/module.h>
 #include <asm/page.h>
 #include <asm/pgtable.h>
diff --git a/block/bsg.c b/block/bsg.c
index 5f184bb3ff9e..0676301f16d0 100644
--- a/block/bsg.c
+++ b/block/bsg.c
@@ -1062,7 +1062,7 @@ EXPORT_SYMBOL_GPL(bsg_register_queue);
 static struct cdev bsg_cdev;
-static char *bsg_nodename(struct device *dev)
+static char *bsg_devnode(struct device *dev, mode_t *mode)
 {
        return kasprintf(GFP_KERNEL, "bsg/%s", dev_name(dev));
 }
@@ -1087,7 +1087,7 @@ static int __init bsg_init(void)
                ret = PTR_ERR(bsg_class);
                goto destroy_kmemcache;
        }
-        bsg_class->nodename = bsg_nodename;
+        bsg_class->devnode = bsg_devnode;
        ret = alloc_chrdev_region(&devid, 0, BSG_MAX_DEVS, "bsg");
        if (ret)
diff --git a/block/genhd.c b/block/genhd.c
index 2ad91ddad8e2..517e4332cb37 100644
--- a/block/genhd.c
+++ b/block/genhd.c
@@ -998,12 +998,12 @@ struct class block_class = {
        .name           = "block",
 };
-static char *block_nodename(struct device *dev)
+static char *block_devnode(struct device *dev, mode_t *mode)
 {
        struct gendisk *disk = dev_to_disk(dev);
-        if (disk->nodename)
+        if (disk->devnode)
-                return disk->nodename(disk);
+                return disk->devnode(disk, mode);
        return NULL;
 }
@@ -1011,7 +1011,7 @@ static struct device_type disk_type = {
        .name           = "disk",
        .groups         = disk_attr_groups,
        .release        = disk_release,
-        .nodename       = block_nodename,
+        .devnode        = block_devnode,
 };
 #ifdef CONFIG_PROC_FS
diff --git a/drivers/base/core.c b/drivers/base/core.c
index 390e664ec1c7..6bee6af8d8e1 100644
--- a/drivers/base/core.c
+++ b/drivers/base/core.c
@@ -166,13 +166,16 @@ static int dev_uevent(struct kset *kset, struct kobject *kobj,
        if (MAJOR(dev->devt)) {
                const char *tmp;
                const char *name;
+                mode_t mode = 0;
                add_uevent_var(env, "MAJOR=%u", MAJOR(dev->devt));
                add_uevent_var(env, "MINOR=%u", MINOR(dev->devt));
-                name = device_get_nodename(dev, &tmp);
+                name = device_get_devnode(dev, &mode, &tmp);
                if (name) {
                        add_uevent_var(env, "DEVNAME=%s", name);
                        kfree(tmp);
+                        if (mode)
+                                add_uevent_var(env, "DEVMODE=%#o", mode & 0777);
                }
        }
@@ -1148,8 +1151,9 @@ static struct device *next_device(struct klist_iter *i)
 }
 /**
- * device_get_nodename - path of device node file
+ * device_get_devnode - path of device node file
 * @dev: device
+ * @mode: returned file access mode
 * @tmp: possibly allocated string
 *
 * Return the relative path of a possible device node.
@@ -1157,21 +1161,22 @@ static struct device *next_device(struct klist_iter *i)
 * a name. This memory is returned in tmp and needs to be
 * freed by the caller.
 */
-const char *device_get_nodename(struct device *dev, const char **tmp)
+const char *device_get_devnode(struct device *dev,
+                               mode_t *mode, const char **tmp)
 {
        char *s;
        *tmp = NULL;
        /* the device type may provide a specific name */
-        if (dev->type && dev->type->nodename)
+        if (dev->type && dev->type->devnode)
-                *tmp = dev->type->nodename(dev);
+                *tmp = dev->type->devnode(dev, mode);
        if (*tmp)
                return *tmp;
        /* the class may provide a specific name */
-        if (dev->class && dev->class->nodename)
+        if (dev->class && dev->class->devnode)
-                *tmp = dev->class->nodename(dev);
+                *tmp = dev->class->devnode(dev, mode);
        if (*tmp)
                return *tmp;
diff --git a/drivers/base/devtmpfs.c b/drivers/base/devtmpfs.c
index fd488ad4263a..a1cb5afe6801 100644
--- a/drivers/base/devtmpfs.c
+++ b/drivers/base/devtmpfs.c
@@ -6,9 +6,10 @@
 * During bootup, before any driver core device is registered,
 * devtmpfs, a tmpfs-based filesystem is created. Every driver-core
 * device which requests a device node, will add a node in this
- * filesystem. The node is named after the the name of the device,
+ * filesystem.
- * or the susbsytem can provide a custom name. All devices are
+ * By default, all devices are named after the the name of the
- * owned by root and have a mode of 0600.
+ * device, owned by root and have a default mode of 0600. Subsystems
+ * can overwrite the default setting if needed.
 */
 #include <linux/kernel.h>
@@ -20,6 +21,7 @@
 #include <linux/fs.h>
 #include <linux/shmem_fs.h>
 #include <linux/cred.h>
+#include <linux/sched.h>
 #include <linux/init_task.h>
 static struct vfsmount *dev_mnt;
@@ -134,7 +136,7 @@ int devtmpfs_create_node(struct device *dev)
        const char *tmp = NULL;
        const char *nodename;
        const struct cred *curr_cred;
-        mode_t mode;
+        mode_t mode = 0;
        struct nameidata nd;
        struct dentry *dentry;
        int err;
@@ -142,14 +144,16 @@ int devtmpfs_create_node(struct device *dev)
        if (!dev_mnt)
                return 0;
-        nodename = device_get_nodename(dev, &tmp);
+        nodename = device_get_devnode(dev, &mode, &tmp);
        if (!nodename)
                return -ENOMEM;
+        if (mode == 0)
+                mode = 0600;
        if (is_blockdev(dev))
-                mode = S_IFBLK|0600;
+                mode |= S_IFBLK;
        else
-                mode = S_IFCHR|0600;
+                mode |= S_IFCHR;
        curr_cred = override_creds(&init_cred);
        err = vfs_path_lookup(dev_mnt->mnt_root, dev_mnt,
@@ -165,8 +169,12 @@ int devtmpfs_create_node(struct device *dev)
        dentry = lookup_create(&nd, 0);
        if (!IS_ERR(dentry)) {
+                int umask;
+                umask = sys_umask(0000);
                err = vfs_mknod(nd.path.dentry->d_inode,
                                dentry, mode, dev->devt);
+                sys_umask(umask);
                /* mark as kernel created inode */
                if (!err)
                        dentry->d_inode->i_private = &dev_mnt;
@@ -271,7 +279,7 @@ int devtmpfs_delete_node(struct device *dev)
        if (!dev_mnt)
                return 0;
-        nodename = device_get_nodename(dev, &tmp);
+        nodename = device_get_devnode(dev, NULL, &tmp);
        if (!nodename)
                return -ENOMEM;
diff --git a/drivers/block/aoe/aoechr.c b/drivers/block/aoe/aoechr.c
index 19888354188f..62141ec09a22 100644
--- a/drivers/block/aoe/aoechr.c
+++ b/drivers/block/aoe/aoechr.c
@@ -266,7 +266,7 @@ static const struct file_operations aoe_fops = {
        .owner = THIS_MODULE,
 };
-static char *aoe_nodename(struct device *dev)
+static char *aoe_devnode(struct device *dev, mode_t *mode)
 {
        return kasprintf(GFP_KERNEL, "etherd/%s", dev_name(dev));
 }
@@ -288,7 +288,7 @@ aoechr_init(void)
                unregister_chrdev(AOE_MAJOR, "aoechr");
                return PTR_ERR(aoe_class);
        }
-        aoe_class->nodename = aoe_nodename;
+        aoe_class->devnode = aoe_devnode;
        for (i = 0; i < ARRAY_SIZE(chardevs); ++i)
                device_create(aoe_class, NULL,
diff --git a/drivers/block/pktcdvd.c b/drivers/block/pktcdvd.c
index 95f11cdef203..fd5bb8ad59a9 100644
--- a/drivers/block/pktcdvd.c
+++ b/drivers/block/pktcdvd.c
@@ -2857,7 +2857,7 @@ static struct block_device_operations pktcdvd_ops = {
        .media_changed =        pkt_media_changed,
 };
-static char *pktcdvd_nodename(struct gendisk *gd)
+static char *pktcdvd_devnode(struct gendisk *gd, mode_t *mode)
 {
        return kasprintf(GFP_KERNEL, "pktcdvd/%s", gd->disk_name);
 }
@@ -2914,7 +2914,7 @@ static int pkt_setup_dev(dev_t dev, dev_t* pkt_dev)
        disk->fops = &pktcdvd_ops;
        disk->flags = GENHD_FL_REMOVABLE;
        strcpy(disk->disk_name, pd->name);
-        disk->nodename = pktcdvd_nodename;
+        disk->devnode = pktcdvd_devnode;
        disk->private_data = pd;
        disk->queue = blk_alloc_queue(GFP_KERNEL);
        if (!disk->queue)
@@ -3070,7 +3070,7 @@ static const struct file_operations pkt_ctl_fops = {
 static struct miscdevice pkt_misc = {
        .minor          = MISC_DYNAMIC_MINOR,
        .name           = DRIVER_NAME,
-        .name           = "pktcdvd/control",
+        .nodename       = "pktcdvd/control",
        .fops           = &pkt_ctl_fops
 };
diff --git a/drivers/char/cyclades.c b/drivers/char/cyclades.c
index 2dafc2da0648..df5038bbcbc2 100644
--- a/drivers/char/cyclades.c
+++ b/drivers/char/cyclades.c
@@ -11,7 +11,7 @@
 * Initially written by Randolph Bentson <bentson@grieg.seaslug.org>.
 * Modified and maintained by Marcio Saito <marcio@cyclades.com>.
 *
- * Copyright (C) 2007 Jiri Slaby <jirislaby@gmail.com>
+ * Copyright (C) 2007-2009 Jiri Slaby <jirislaby@gmail.com>
 *
 * Much of the design and some of the code came from serial.c
 * which was copyright (C) 1991, 1992  Linus Torvalds.  It was
@@ -19,577 +19,9 @@
 * and then fixed as suggested by Michael K. Johnson 12/12/92.
 * Converted to pci probing and cleaned up by Jiri Slaby.
 *
- * This version supports shared IRQ's (only for PCI boards).
- *
- * Prevent users from opening non-existing Z ports.
- *
- * Revision 2.3.2.8   2000/07/06 18:14:16 ivan
- * Fixed the PCI detection function to work properly on Alpha systems.
- * Implemented support for TIOCSERGETLSR ioctl.
- * Implemented full support for non-standard baud rates.
- *
- * Revision 2.3.2.7   2000/06/01 18:26:34 ivan
- * Request PLX I/O region, although driver doesn't use it, to avoid
- * problems with other drivers accessing it.
- * Removed count for on-board buffer characters in cy_chars_in_buffer
- * (Cyclades-Z only).
- *
- * Revision 2.3.2.6   2000/05/05 13:56:05 ivan
- * Driver now reports physical instead of virtual memory addresses.
- * Masks were added to some Cyclades-Z read accesses.
- * Implemented workaround for PLX9050 bug that would cause a system lockup
- * in certain systems, depending on the MMIO addresses allocated to the
- * board.
- * Changed the Tx interrupt programming in the CD1400 chips to boost up
- * performance (Cyclom-Y only).
- * Code is now compliant with the new module interface (module_[init|exit]).
- * Make use of the PCI helper functions to access PCI resources.
- * Did some code "housekeeping".
- *
- * Revision 2.3.2.5   2000/01/19 14:35:33 ivan
- * Fixed bug in cy_set_termios on CRTSCTS flag turnoff.
- *
- * Revision 2.3.2.4   2000/01/17 09:19:40 ivan
- * Fixed SMP locking in Cyclom-Y interrupt handler.
- *
- * Revision 2.3.2.3   1999/12/28 12:11:39 ivan
- * Added a new cyclades_card field called nports to allow the driver to
- * know the exact number of ports found by the Z firmware after its load;
- * RX buffer contention prevention logic on interrupt op mode revisited
- * (Cyclades-Z only);
- * Revisited printk's for Z debug;
- * Driver now makes sure that the constant SERIAL_XMIT_SIZE is defined;
- *
- * Revision 2.3.2.2   1999/10/01 11:27:43 ivan
- * Fixed bug in cyz_poll that would make all ports but port 0
- * unable to transmit/receive data (Cyclades-Z only);
- * Implemented logic to prevent the RX buffer from being stuck with data
- * due to a driver / firmware race condition in interrupt op mode
- * (Cyclades-Z only);
- * Fixed bug in block_til_ready logic that would lead to a system crash;
- * Revisited cy_close spinlock usage;
- *
- * Revision 2.3.2.1   1999/09/28 11:01:22 ivan
- * Revisited CONFIG_PCI conditional compilation for PCI board support;
- * Implemented TIOCGICOUNT and TIOCMIWAIT ioctl support;
- * _Major_ cleanup on the Cyclades-Z interrupt support code / logic;
- * Removed CTS handling from the driver -- this is now completely handled
- * by the firmware (Cyclades-Z only);
- * Flush RX on-board buffers on a port open (Cyclades-Z only);
- * Fixed handling of ASYNC_SPD_* TTY flags;
- * Module unload now unmaps all memory area allocated by ioremap;
- *
- * Revision 2.3.1.1   1999/07/15 16:45:53 ivan
- * Removed CY_PROC conditional compilation;
- * Implemented SMP-awareness for the driver;
- * Implemented a new ISA IRQ autoprobe that uses the irq_probe_[on|off]
- * functions;
- * The driver now accepts memory addresses (maddr=0xMMMMM) and IRQs
- * (irq=NN) as parameters (only for ISA boards);
- * Fixed bug in set_line_char that would prevent the Cyclades-Z
- * ports from being configured at speeds above 115.2Kbps;
- * Fixed bug in cy_set_termios that would prevent XON/XOFF flow control
- * switching from working properly;
- * The driver now only prints IRQ info for the Cyclades-Z if it's
- * configured to work in interrupt mode;
- *
- * Revision 2.2.2.3   1999/06/28 11:13:29 ivan
- * Added support for interrupt mode operation for the Z cards;
- * Removed the driver inactivity control for the Z;
- * Added a missing MOD_DEC_USE_COUNT in the cy_open function for when
- * the Z firmware is not loaded yet;
- * Replaced the "manual" Z Tx flush buffer by a call to a FW command of
- * same functionality;
- * Implemented workaround for IRQ setting loss on the PCI configuration
- * registers after a PCI bridge EEPROM reload (affects PLX9060 only);
- *
- * Revision 2.2.2.2  1999/05/14 17:18:15 ivan
- * /proc entry location changed to /proc/tty/driver/cyclades;
- * Added support to shared IRQ's (only for PCI boards);
- * Added support for Cobalt Qube2 systems;
- * IRQ [de]allocation scheme revisited;
- * BREAK implementation changed in order to make use of the 'break_ctl'
- * TTY facility;
- * Fixed typo in TTY structure field 'driver_name';
- * Included a PCI bridge reset and EEPROM reload in the board
- * initialization code (for both Y and Z series).
- *
- * Revision 2.2.2.1  1999/04/08 16:17:43 ivan
- * Fixed a bug in cy_wait_until_sent that was preventing the port to be
- * closed properly after a SIGINT;
- * Module usage counter scheme revisited;
- * Added support to the upcoming Y PCI boards (i.e., support to additional
- * PCI Device ID's).
- *
- * Revision 2.2.1.10 1999/01/20 16:14:29 ivan
- * Removed all unnecessary page-alignement operations in ioremap calls
- * (ioremap is currently safe for these operations).
- *
- * Revision 2.2.1.9  1998/12/30 18:18:30 ivan
- * Changed access to PLX PCI bridge registers from I/O to MMIO, in
- * order to make PLX9050-based boards work with certain motherboards.
- *
- * Revision 2.2.1.8  1998/11/13 12:46:20 ivan
- * cy_close function now resets (correctly) the tty->closing flag;
- * JIFFIES_DIFF macro fixed.
- *
- * Revision 2.2.1.7  1998/09/03 12:07:28 ivan
- * Fixed bug in cy_close function, which was not informing HW of
- * which port should have the reception disabled before doing so;
- * fixed Cyclom-8YoP hardware detection bug.
- *
- * Revision 2.2.1.6  1998/08/20 17:15:39 ivan
- * Fixed bug in cy_close function, which causes malfunction
- * of one of the first 4 ports when a higher port is closed
- * (Cyclom-Y only).
- *
- * Revision 2.2.1.5  1998/08/10 18:10:28 ivan
- * Fixed Cyclom-4Yo hardware detection bug.
- *
- * Revision 2.2.1.4  1998/08/04 11:02:50 ivan
- * /proc/cyclades implementation with great collaboration of
- * Marc Lewis <marc@blarg.net>;
- * cyy_interrupt was changed to avoid occurrence of kernel oopses
- * during PPP operation.
- *
- * Revision 2.2.1.3  1998/06/01 12:09:10 ivan
- * General code review in order to comply with 2.1 kernel standards;
- * data loss prevention for slow devices revisited (cy_wait_until_sent
- * was created);
- * removed conditional compilation for new/old PCI structure support
- * (now the driver only supports the new PCI structure).
- *
- * Revision 2.2.1.1  1998/03/19 16:43:12 ivan
- * added conditional compilation for new/old PCI structure support;
- * removed kernel series (2.0.x / 2.1.x) conditional compilation.
- *
- * Revision 2.1.1.3  1998/03/16 18:01:12 ivan
- * cleaned up the data loss fix;
- * fixed XON/XOFF handling once more (Cyclades-Z);
- * general review of the driver routines;
- * introduction of a mechanism to prevent data loss with slow
- * printers, by forcing a delay before closing the port.
- *
- * Revision 2.1.1.2  1998/02/17 16:50:00 ivan
- * fixed detection/handling of new CD1400 in Ye boards;
- * fixed XON/XOFF handling (Cyclades-Z);
- * fixed data loss caused by a premature port close;
- * introduction of a flag that holds the CD1400 version ID per port
- * (used by the CYGETCD1400VER new ioctl).
- *
- * Revision 2.1.1.1  1997/12/03 17:31:19 ivan
- * Code review for the module cleanup routine;
- * fixed RTS and DTR status report for new CD1400's in get_modem_info;
- * includes anonymous changes regarding signal_pending.
- *
- * Revision 2.1  1997/11/01 17:42:41 ivan
- * Changes in the driver to support Alpha systems (except 8Zo V_1);
- * BREAK fix for the Cyclades-Z boards;
- * driver inactivity control by FW implemented;
- * introduction of flag that allows driver to take advantage of
- * a special CD1400 feature related to HW flow control;
- * added support for the CD1400  rev. J (Cyclom-Y boards);
- * introduction of ioctls to:
- *  - control the rtsdtr_inv flag (Cyclom-Y);
- *  - control the rflow flag (Cyclom-Y);
- *  - adjust the polling interval (Cyclades-Z);
- *
- * Revision 1.36.4.33  1997/06/27 19:00:00  ivan
- * Fixes related to kernel version conditional
- * compilation.
- *
- * Revision 1.36.4.32  1997/06/14 19:30:00  ivan
- * Compatibility issues between kernels 2.0.x and
- * 2.1.x (mainly related to clear_bit function).
- *
- * Revision 1.36.4.31  1997/06/03 15:30:00  ivan
- * Changes to define the memory window according to the
- * board type.
- *
- * Revision 1.36.4.30  1997/05/16 15:30:00  daniel
- * Changes to support new cycladesZ boards.
- *
- * Revision 1.36.4.29  1997/05/12 11:30:00  daniel
- * Merge of Bentson's and Daniel's version 1.36.4.28.
- * Corrects bug in cy_detect_pci: check if there are more
- * ports than the number of static structs allocated.
- * Warning message during initialization if this driver is
- * used with the new generation of cycladesZ boards.  Those
- * will be supported only in next release of the driver.
- * Corrects bug in cy_detect_pci and cy_detect_isa that
- * returned wrong number of VALID boards, when a cyclomY
- * was found with no serial modules connected.
- * Changes to use current (2.1.x) kernel subroutine names
- * and created macros for compilation with 2.0.x kernel,
- * instead of the other way around.
- *
- * Revision 1.36.4.28  1997/05/?? ??:00:00  bentson
- * Change queue_task_irq_off to queue_task_irq.
- * The inline function queue_task_irq_off (tqueue.h)
- * was removed from latest releases of 2.1.x kernel.
- * Use of macro __init to mark the initialization
- * routines, so memory can be reused.
- * Also incorporate implementation of critical region
- * in function cleanup_module() created by anonymous
- * linuxer.
- *
- * Revision 1.36.4.28  1997/04/25 16:00:00  daniel
- * Change to support new firmware that solves DCD problem:
- * application could fail to receive SIGHUP signal when DCD
- * varying too fast.
- *
- * Revision 1.36.4.27  1997/03/26 10:30:00  daniel
- * Changed for support linux versions 2.1.X.
- * Backward compatible with linux versions 2.0.X.
- * Corrected illegal use of filler field in
- * CH_CTRL struct.
- * Deleted some debug messages.
- *
- * Revision 1.36.4.26  1997/02/27 12:00:00  daniel
- * Included check for NULL tty pointer in cyz_poll.
- *
- * Revision 1.36.4.25  1997/02/26 16:28:30  bentson
- * Bill Foster at Blarg! Online services noticed that
- * some of the switch elements of -Z modem control
- * lacked a closing "break;"
- *
- * Revision 1.36.4.24  1997/02/24 11:00:00  daniel
- * Changed low water threshold for buffer xmit_buf
- *
- * Revision 1.36.4.23  1996/12/02 21:50:16  bentson
- * Marcio provided fix to modem status fetch for -Z
- *
- * Revision 1.36.4.22  1996/10/28 22:41:17  bentson
- * improve mapping of -Z control page (thanks to Steve
- * Price <stevep@fa.tdktca.com> for help on this)
- *
- * Revision 1.36.4.21  1996/09/10 17:00:10  bentson
- * shift from CPU-bound to memcopy in cyz_polling operation
- *
- * Revision 1.36.4.20  1996/09/09 18:30:32  Bentson
- * Added support to set and report higher speeds.
- *
- * Revision 1.36.4.19c  1996/08/09 10:00:00  Marcio Saito
- * Some fixes in the HW flow control for the BETA release.
- * Don't try to register the IRQ.
- *
- * Revision 1.36.4.19  1996/08/08 16:23:18  Bentson
- * make sure "cyc" appears in all kernel messages; all soft interrupts
- * handled by same routine; recognize out-of-band reception; comment
- * out some diagnostic messages; leave RTS/CTS flow control to hardware;
- * fix race condition in -Z buffer management; only -Y needs to explicitly
- * flush chars; tidy up some startup messages;
- *
- * Revision 1.36.4.18  1996/07/25 18:57:31  bentson
- * shift MOD_INC_USE_COUNT location to match
- * serial.c; purge some diagnostic messages;
- *
- * Revision 1.36.4.17  1996/07/25 18:01:08  bentson
- * enable modem status messages and fetch & process them; note
- * time of last activity type for each port; set_line_char now
- * supports more than line 0 and treats 0 baud correctly;
- * get_modem_info senses rs_status;
- *
- * Revision 1.36.4.16  1996/07/20 08:43:15  bentson
- * barely works--now's time to turn on
- * more features 'til it breaks
- *
- * Revision 1.36.4.15  1996/07/19 22:30:06  bentson
- * check more -Z board status; shorten boot message
- *
- * Revision 1.36.4.14  1996/07/19 22:20:37  bentson
- * fix reference to ch_ctrl in startup; verify return
- * values from cyz_issue_cmd and cyz_update_channel;
- * more stuff to get modem control correct;
- *
- * Revision 1.36.4.13  1996/07/11 19:53:33  bentson
- * more -Z stuff folded in; re-order changes to put -Z stuff
- * after -Y stuff (to make changes clearer)
- *
- * Revision 1.36.4.12  1996/07/11 15:40:55  bentson
- * Add code to poll Cyclades-Z.  Add code to get & set RS-232 control.
- * Add code to send break.  Clear firmware ID word at startup (so
- * that other code won't talk to inactive board).
- *
- * Revision 1.36.4.11  1996/07/09 05:28:29  bentson
- * add code for -Z in set_line_char
- *
- * Revision 1.36.4.10  1996/07/08 19:28:37  bentson
- * fold more -Z stuff (or in some cases, error messages)
- * into driver; add text to "don't know what to do" messages.
- *
- * Revision 1.36.4.9  1996/07/08 18:38:38  bentson
- * moved compile-time flags near top of file; cosmetic changes
- * to narrow text (to allow 2-up printing); changed many declarations
- * to "static" to limit external symbols; shuffled code order to
- * coalesce -Y and -Z specific code, also to put internal functions
- * in order of tty_driver structure; added code to recognize -Z
- * ports (and for moment, do nothing or report error); add cy_startup
- * to parse boot command line for extra base addresses for ISA probes;
- *
- * Revision 1.36.4.8  1996/06/25 17:40:19  bentson
- * reorder some code, fix types of some vars (int vs. long),
- * add cy_setup to support user declared ISA addresses
- *
- * Revision 1.36.4.7  1996/06/21 23:06:18  bentson
- * dump ioctl based firmware load (it's now a user level
- * program); ensure uninitialzed ports cannot be used
- *
- * Revision 1.36.4.6  1996/06/20 23:17:19  bentson
- * rename vars and restructure some code
- *
- * Revision 1.36.4.5  1996/06/14 15:09:44  bentson
- * get right status back after boot load
- *
- * Revision 1.36.4.4  1996/06/13 19:51:44  bentson
- * successfully loads firmware
- *
- * Revision 1.36.4.3  1996/06/13 06:08:33  bentson
- * add more of the code for the boot/load ioctls
- *
- * Revision 1.36.4.2  1996/06/11 21:00:51  bentson
- * start to add Z functionality--starting with ioctl
- * for loading firmware
- *
- * Revision 1.36.4.1  1996/06/10 18:03:02  bentson
- * added code to recognize Z/PCI card at initialization; report
- * presence, but card is not initialized (because firmware needs
- * to be loaded)
- *
- * Revision 1.36.3.8  1996/06/07 16:29:00  bentson
- * starting minor number at zero; added missing verify_area
- * as noted by Heiko Eißfeldt <heiko@colossus.escape.de>
- *
- * Revision 1.36.3.7  1996/04/19 21:06:18  bentson
- * remove unneeded boot message & fix CLOCAL hardware flow
- * control (Miquel van Smoorenburg <miquels@Q.cistron.nl>);
- * remove unused diagnostic statements; minor 0 is first;
- *
- * Revision 1.36.3.6  1996/03/13 13:21:17  marcio
- * The kernel function vremap (available only in later 1.3.xx kernels)
- * allows the access to memory addresses above the RAM. This revision
- * of the driver supports PCI boards below 1Mb (device id 0x100) and
- * above 1Mb (device id 0x101).
- *
- * Revision 1.36.3.5  1996/03/07 15:20:17  bentson
- * Some global changes to interrupt handling spilled into
- * this driver--mostly unused arguments in system function
- * calls.  Also added change by Marcio Saito which should
- * reduce lost interrupts at startup by fast processors.
- *
- * Revision 1.36.3.4  1995/11/13  20:45:10  bentson
- * Changes by Corey Minyard <minyard@wf-rch.cirr.com> distributed
- * in 1.3.41 kernel to remove a possible race condition, extend
- * some error messages, and let the driver run as a loadable module
- * Change by Alan Wendt <alan@ez0.ezlink.com> to remove a
- * possible race condition.
- * Change by Marcio Saito <marcio@cyclades.com> to fix PCI addressing.
- *
- * Revision 1.36.3.3  1995/11/13  19:44:48  bentson
- * Changes by Linus Torvalds in 1.3.33 kernel distribution
- * required due to reordering of driver initialization.
- * Drivers are now initialized *after* memory management.
- *
- * Revision 1.36.3.2  1995/09/08  22:07:14  bentson
- * remove printk from ISR; fix typo
- *
- * Revision 1.36.3.1  1995/09/01  12:00:42  marcio
- * Minor fixes in the PCI board support. PCI function calls in
- * conditional compilation (CONFIG_PCI). Thanks to Jim Duncan
- * <duncan@okay.com>. "bad serial count" message removed.
- *
- * Revision 1.36.3  1995/08/22  09:19:42  marcio
- * Cyclom-Y/PCI support added. Changes in the cy_init routine and
- * board initialization. Changes in the boot messages. The driver
- * supports up to 4 boards and 64 ports by default.
- *
- * Revision 1.36.1.4  1995/03/29  06:14:14  bentson
- * disambiguate between Cyclom-16Y and Cyclom-32Ye;
- *
- * Revision 1.36.1.3  1995/03/23  22:15:35  bentson
- * add missing break in modem control block in ioctl switch statement
- * (discovered by Michael Edward Chastain <mec@jobe.shell.portal.com>);
- *
- * Revision 1.36.1.2  1995/03/22  19:16:22  bentson
- * make sure CTS flow control is set as soon as possible (thanks
- * to note from David Lambert <lambert@chesapeake.rps.slb.com>);
- *
- * Revision 1.36.1.1  1995/03/13  15:44:43  bentson
- * initialize defaults for receive threshold and stale data timeout;
- * cosmetic changes;
- *
- * Revision 1.36  1995/03/10  23:33:53  bentson
- * added support of chips 4-7 in 32 port Cyclom-Ye;
- * fix cy_interrupt pointer dereference problem
- * (Joe Portman <baron@aa.net>);
- * give better error response if open is attempted on non-existent port
- * (Zachariah Vaum <jchryslr@netcom.com>);
- * correct command timeout (Kenneth Lerman <lerman@@seltd.newnet.com>);
- * conditional compilation for -16Y on systems with fast, noisy bus;
- * comment out diagnostic print function;
- * cleaned up table of base addresses;
- * set receiver time-out period register to correct value,
- * set receive threshold to better default values,
- * set chip timer to more accurate 200 Hz ticking,
- * add code to monitor and modify receive parameters
- * (Rik Faith <faith@cs.unc.edu> Nick Simicich
- * <njs@scifi.emi.net>);
- *
- * Revision 1.35  1994/12/16  13:54:18  steffen
- * additional patch by Marcio Saito for board detection
- * Accidently left out in 1.34
- *
- * Revision 1.34  1994/12/10  12:37:12  steffen
- * This is the corrected version as suggested by Marcio Saito
- *
- * Revision 1.33  1994/12/01  22:41:18  bentson
- * add hooks to support more high speeds directly; add tytso
- * patch regarding CLOCAL wakeups
- *
- * Revision 1.32  1994/11/23  19:50:04  bentson
- * allow direct kernel control of higher signalling rates;
- * look for cards at additional locations
- *
- * Revision 1.31  1994/11/16  04:33:28  bentson
- * ANOTHER fix from Corey Minyard, minyard@wf-rch.cirr.com--
- * a problem in chars_in_buffer has been resolved by some
- * small changes;  this should yield smoother output
- *
- * Revision 1.30  1994/11/16  04:28:05  bentson
- * Fix from Corey Minyard, Internet: minyard@metronet.com,
- * UUCP: minyard@wf-rch.cirr.com, WORK: minyardbnr.ca, to
- * cy_hangup that appears to clear up much (all?) of the
- * DTR glitches; also he's added/cleaned-up diagnostic messages
- *
- * Revision 1.29  1994/11/16  04:16:07  bentson
- * add change proposed by Ralph Sims, ralphs@halcyon.com, to
- * operate higher speeds in same way as other serial ports;
- * add more serial ports (for up to two 16-port muxes).
- *
- * Revision 1.28  1994/11/04  00:13:16  root
- * turn off diagnostic messages
- *
- * Revision 1.27  1994/11/03  23:46:37  root
- * bunch of changes to bring driver into greater conformance
- * with the serial.c driver (looking for missed fixes)
- *
- * Revision 1.26  1994/11/03  22:40:36  root
- * automatic interrupt probing fixed.
- *
- * Revision 1.25  1994/11/03  20:17:02  root
- * start to implement auto-irq
- *
- * Revision 1.24  1994/11/03  18:01:55  root
- * still working on modem signals--trying not to drop DTR
- * during the getty/login processes
- *
- * Revision 1.23  1994/11/03  17:51:36  root
- * extend baud rate support; set receive threshold as function
- * of baud rate; fix some problems with RTS/CTS;
- *
- * Revision 1.22  1994/11/02  18:05:35  root
- * changed arguments to udelay to type long to get
- * delays to be of correct duration
- *
- * Revision 1.21  1994/11/02  17:37:30  root
- * employ udelay (after calibrating loops_per_second earlier
- * in init/main.c) instead of using home-grown delay routines
- *
- * Revision 1.20  1994/11/02  03:11:38  root
- * cy_chars_in_buffer forces a return value of 0 to let
- * login work (don't know why it does); some functions
- * that were returning EFAULT, now executes the code;
- * more work on deciding when to disable xmit interrupts;
- *
- * Revision 1.19  1994/11/01  20:10:14  root
- * define routine to start transmission interrupts (by enabling
- * transmit interrupts); directly enable/disable modem interrupts;
- *
- * Revision 1.18  1994/11/01  18:40:45  bentson
- * Don't always enable transmit interrupts in startup; interrupt on
- * TxMpty instead of TxRdy to help characters get out before shutdown;
- * restructure xmit interrupt to check for chars first and quit if
- * none are ready to go; modem status (MXVRx) is upright, _not_ inverted
- * (to my view);
- *
- * Revision 1.17  1994/10/30  04:39:45  bentson
- * rename serial_driver and callout_driver to cy_serial_driver and
- * cy_callout_driver to avoid linkage interference; initialize
- * info->type to PORT_CIRRUS; ruggedize paranoia test; elide ->port
- * from cyclades_port structure; add paranoia check to cy_close;
- *
- * Revision 1.16  1994/10/30  01:14:33  bentson
- * change major numbers; add some _early_ return statements;
- *
- * Revision 1.15  1994/10/29  06:43:15  bentson
- * final tidying up for clean compile;  enable some error reporting
- *
- * Revision 1.14  1994/10/28  20:30:22  Bentson
- * lots of changes to drag the driver towards the new tty_io
- * structures and operation.  not expected to work, but may
- * compile cleanly.
- *
- * Revision 1.13  1994/07/21  23:08:57  Bentson
- * add some diagnostic cruft; support 24 lines (for testing
- * both -8Y and -16Y cards; be more thorough in servicing all
- * chips during interrupt; add "volatile" a few places to
- * circumvent compiler optimizations; fix base & offset
- * computations in block_til_ready (was causing chip 0 to
- * stop operation)
- *
- * Revision 1.12  1994/07/19  16:42:11  Bentson
- * add some hackery for kernel version 1.1.8; expand
- * error messages; refine timing for delay loops and
- * declare loop params volatile
- *
- * Revision 1.11  1994/06/11  21:53:10  bentson
- * get use of save_car right in transmit interrupt service
- *
- * Revision 1.10.1.1  1994/06/11  21:31:18  bentson
- * add some diagnostic printing; try to fix save_car stuff
- *
- * Revision 1.10  1994/06/11  20:36:08  bentson
- * clean up compiler warnings
- *
- * Revision 1.9  1994/06/11  19:42:46  bentson
- * added a bunch of code to support modem signalling
- *
- * Revision 1.8  1994/06/11  17:57:07  bentson
- * recognize break & parity error
- *
- * Revision 1.7  1994/06/05  05:51:34  bentson
- * Reorder baud table to be monotonic; add cli to CP; discard
- * incoming characters and status if the line isn't open; start to
- * fold code into cy_throttle; start to port get_serial_info,
- * set_serial_info, get_modem_info, set_modem_info, and send_break
- * from serial.c; expand cy_ioctl; relocate and expand config_setup;
- * get flow control characters from tty struct; invalidate ports w/o
- * hardware;
- *
- * Revision 1.6  1994/05/31  18:42:21  bentson
- * add a loop-breaker in the interrupt service routine;
- * note when port is initialized so that it can be shut
- * down under the right conditions; receive works without
- * any obvious errors
- *
- * Revision 1.5  1994/05/30  00:55:02  bentson
- * transmit works without obvious errors
- *
- * Revision 1.4  1994/05/27  18:46:27  bentson
- * incorporated more code from lib_y.c; can now print short
- * strings under interrupt control to port zero; seems to
- * select ports/channels/lines correctly
- *
- * Revision 1.3  1994/05/25  22:12:44  bentson
- * shifting from multi-port on a card to proper multiplexor
- * data structures;  added skeletons of most routines
- *
- * Revision 1.2  1994/05/19  13:21:43  bentson
- * start to crib from other sources
- *
 */
-#define CY_VERSION      "2.5"
+#define CY_VERSION      "2.6"
 /* If you need to install more boards than NR_CARDS, change the constant
   in the definition below. No other change is necessary to support up to
@@ -648,9 +80,7 @@
 #include <linux/firmware.h>
 #include <linux/device.h>
-#include <asm/system.h>
 #include <linux/io.h>
-#include <asm/irq.h>
 #include <linux/uaccess.h>
 #include <linux/kernel.h>
@@ -660,13 +90,11 @@
 #include <linux/proc_fs.h>
 #include <linux/seq_file.h>
-static void cy_throttle(struct tty_struct *tty);
 static void cy_send_xchar(struct tty_struct *tty, char ch);
 #ifndef SERIAL_XMIT_SIZE
 #define SERIAL_XMIT_SIZE        (min(PAGE_SIZE, 4096))
 #endif
-#define WAKEUP_CHARS            256
 #define STD_COM_FLAGS (0)
@@ -756,25 +184,25 @@ static int cy_next_channel;	/* next minor available */
 *                                               HI            VHI
 *     20
 */
-static int baud_table[] = {
+static const int baud_table[] = {
        0, 50, 75, 110, 134, 150, 200, 300, 600, 1200,
        1800, 2400, 4800, 9600, 19200, 38400, 57600, 76800, 115200, 150000,
        230400, 0
 };
-static char baud_co_25[] = {    /* 25 MHz clock option table */
+static const char baud_co_25[] = {      /* 25 MHz clock option table */
        /* value =>    00    01   02    03    04 */
        /* divide by    8    32   128   512  2048 */
        0x00, 0x04, 0x04, 0x04, 0x04, 0x04, 0x03, 0x03, 0x03, 0x02,
        0x02, 0x02, 0x01, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
 };
-static char baud_bpr_25[] = {   /* 25 MHz baud rate period table */
+static const char baud_bpr_25[] = {     /* 25 MHz baud rate period table */
        0x00, 0xf5, 0xa3, 0x6f, 0x5c, 0x51, 0xf5, 0xa3, 0x51, 0xa3,
        0x6d, 0x51, 0xa3, 0x51, 0xa3, 0x51, 0x36, 0x29, 0x1b, 0x15
 };
-static char baud_co_60[] = {    /* 60 MHz clock option table (CD1400 J) */
+static const char baud_co_60[] = {      /* 60 MHz clock option table (CD1400 J) */
        /* value =>    00    01   02    03    04 */
        /* divide by    8    32   128   512  2048 */
        0x00, 0x00, 0x00, 0x04, 0x04, 0x04, 0x04, 0x04, 0x03, 0x03,
@@ -782,13 +210,13 @@ static char baud_co_60[] = {	/* 60 MHz clock option table (CD1400 J) */
        0x00
 };
-static char baud_bpr_60[] = {   /* 60 MHz baud rate period table (CD1400 J) */
+static const char baud_bpr_60[] = {     /* 60 MHz baud rate period table (CD1400 J) */
        0x00, 0x82, 0x21, 0xff, 0xdb, 0xc3, 0x92, 0x62, 0xc3, 0x62,
        0x41, 0xc3, 0x62, 0xc3, 0x62, 0xc3, 0x82, 0x62, 0x41, 0x32,
        0x21
 };
-static char baud_cor3[] = {     /* receive threshold */
+static const char baud_cor3[] = {       /* receive threshold */
        0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a,
        0x0a, 0x0a, 0x0a, 0x09, 0x09, 0x08, 0x08, 0x08, 0x08, 0x07,
        0x07
@@ -805,7 +233,7 @@ static char baud_cor3[] = {	/* receive threshold */
 * cables.
 */
-static char rflow_thr[] = {     /* rflow threshold */
+static const char rflow_thr[] = {       /* rflow threshold */
        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
        0x00, 0x00, 0x00, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a,
        0x0a
@@ -814,7 +242,7 @@ static char rflow_thr[] = {	/* rflow threshold */
 /*  The Cyclom-Ye has placed the sequential chips in non-sequential
 *  address order.  This look-up table overcomes that problem.
 */
-static int cy_chip_offset[] = { 0x0000,
+static const unsigned int cy_chip_offset[] = { 0x0000,
        0x0400,
        0x0800,
        0x0C00,
@@ -827,7 +255,7 @@ static int cy_chip_offset[] = { 0x0000,
 /* PCI related definitions */
 #ifdef CONFIG_PCI
-static struct pci_device_id cy_pci_dev_id[] __devinitdata = {
+static const struct pci_device_id cy_pci_dev_id[] = {
        /* PCI < 1Mb */
        { PCI_DEVICE(PCI_VENDOR_ID_CYCLADES, PCI_DEVICE_ID_CYCLOM_Y_Lo) },
        /* PCI > 1Mb */
@@ -850,7 +278,7 @@ MODULE_DEVICE_TABLE(pci, cy_pci_dev_id);
 #endif
 static void cy_start(struct tty_struct *);
-static void set_line_char(struct cyclades_port *);
+static void cy_set_line_char(struct cyclades_port *, struct tty_struct *);
 static int cyz_issue_cmd(struct cyclades_card *, __u32, __u8, __u32);
 #ifdef CONFIG_ISA
 static unsigned detect_isa_irq(void __iomem *);
@@ -869,6 +297,20 @@ static void cyz_rx_restart(unsigned long);
 static struct timer_list cyz_rx_full_timer[NR_PORTS];
 #endif                          /* CONFIG_CYZ_INTR */
+static inline void cyy_writeb(struct cyclades_port *port, u32 reg, u8 val)
+{
+        struct cyclades_card *card = port->card;
+        cy_writeb(port->u.cyy.base_addr + (reg << card->bus_index), val);
+}
+static inline u8 cyy_readb(struct cyclades_port *port, u32 reg)
+{
+        struct cyclades_card *card = port->card;
+        return readb(port->u.cyy.base_addr + (reg << card->bus_index));
+}
 static inline bool cy_is_Z(struct cyclades_card *card)
 {
        return card->num_chips == (unsigned int)-1;
@@ -893,7 +335,7 @@ static inline bool cyz_is_loaded(struct cyclades_card *card)
 }
 static inline int serial_paranoia_check(struct cyclades_port *info,
-                char *name, const char *routine)
+                const char *name, const char *routine)
 {
 #ifdef SERIAL_PARANOIA_CHECK
        if (!info) {
@@ -909,7 +351,7 @@ static inline int serial_paranoia_check(struct cyclades_port *info,
        }
 #endif
        return 0;
-}                               /* serial_paranoia_check */
+}
 /***********************************************************/
 /********* Start of block of Cyclom-Y specific code ********/
@@ -921,13 +363,14 @@ static inline int serial_paranoia_check(struct cyclades_port *info,
   This function is only called from inside spinlock-protected code.
 */
-static int cyy_issue_cmd(void __iomem *base_addr, u_char cmd, int index)
+static int __cyy_issue_cmd(void __iomem *base_addr, u8 cmd, int index)
 {
+        void __iomem *ccr = base_addr + (CyCCR << index);
        unsigned int i;
        /* Check to see that the previous command has completed */
        for (i = 0; i < 100; i++) {
-                if (readb(base_addr + (CyCCR << index)) == 0)
+                if (readb(ccr) == 0)
                        break;
                udelay(10L);
        }
@@ -937,10 +380,16 @@ static int cyy_issue_cmd(void __iomem *base_addr, u_char cmd, int index)
                return -1;
        /* Issue the new command */
-        cy_writeb(base_addr + (CyCCR << index), cmd);
+        cy_writeb(ccr, cmd);
        return 0;
-}                               /* cyy_issue_cmd */
+}
+static inline int cyy_issue_cmd(struct cyclades_port *port, u8 cmd)
+{
+        return __cyy_issue_cmd(port->u.cyy.base_addr, cmd,
+                        port->card->bus_index);
+}
 #ifdef CONFIG_ISA
 /* ISA interrupt detection code */
@@ -960,12 +409,12 @@ static unsigned detect_isa_irq(void __iomem *address)
        irqs = probe_irq_on();
        /* Wait ... */
-        udelay(5000L);
+        msleep(5);
        /* Enable the Tx interrupts on the CD1400 */
        local_irq_save(flags);
        cy_writeb(address + (CyCAR << index), 0);
-        cyy_issue_cmd(address, CyCHAN_CTL | CyENB_XMTR, index);
+        __cyy_issue_cmd(address, CyCHAN_CTL | CyENB_XMTR, index);
        cy_writeb(address + (CyCAR << index), 0);
        cy_writeb(address + (CySRER << index),
@@ -973,7 +422,7 @@ static unsigned detect_isa_irq(void __iomem *address)
        local_irq_restore(flags);
        /* Wait ... */
-        udelay(5000L);
+        msleep(5);
        /* Check which interrupt is in use */
        irq = probe_irq_off(irqs);
@@ -999,7 +448,7 @@ static void cyy_chip_rx(struct cyclades_card *cinfo, int chip,
        struct cyclades_port *info;
        struct tty_struct *tty;
        int len, index = cinfo->bus_index;
-        u8 save_xir, channel, save_car, data, char_count;
+        u8 ivr, save_xir, channel, save_car, data, char_count;
 #ifdef CY_DEBUG_INTERRUPTS
        printk(KERN_DEBUG "cyy_interrupt: rcvd intr, chip %d\n", chip);
@@ -1008,26 +457,25 @@ static void cyy_chip_rx(struct cyclades_card *cinfo, int chip,
        save_xir = readb(base_addr + (CyRIR << index));
        channel = save_xir & CyIRChannel;
        info = &cinfo->ports[channel + chip * 4];
-        save_car = readb(base_addr + (CyCAR << index));
+        save_car = cyy_readb(info, CyCAR);
-        cy_writeb(base_addr + (CyCAR << index), save_xir);
+        cyy_writeb(info, CyCAR, save_xir);
+        ivr = cyy_readb(info, CyRIVR) & CyIVRMask;
+        tty = tty_port_tty_get(&info->port);
        /* if there is nowhere to put the data, discard it */
-        if (info->port.tty == NULL) {
+        if (tty == NULL) {
-                if ((readb(base_addr + (CyRIVR << index)) & CyIVRMask) ==
+                if (ivr == CyIVRRxEx) { /* exception */
-                                CyIVRRxEx) {    /* exception */
+                        data = cyy_readb(info, CyRDSR);
-                        data = readb(base_addr + (CyRDSR << index));
                } else {        /* normal character reception */
-                        char_count = readb(base_addr + (CyRDCR << index));
+                        char_count = cyy_readb(info, CyRDCR);
                        while (char_count--)
-                                data = readb(base_addr + (CyRDSR << index));
+                                data = cyy_readb(info, CyRDSR);
                }
                goto end;
        }
        /* there is an open port for this data */
-        tty = info->port.tty;
+        if (ivr == CyIVRRxEx) { /* exception */
-        if ((readb(base_addr + (CyRIVR << index)) & CyIVRMask) ==
+                data = cyy_readb(info, CyRDSR);
-                        CyIVRRxEx) {    /* exception */
-                data = readb(base_addr + (CyRDSR << index));
                /* For statistics only */
                if (data & CyBREAK)
@@ -1041,28 +489,29 @@ static void cyy_chip_rx(struct cyclades_card *cinfo, int chip,
                if (data & info->ignore_status_mask) {
                        info->icount.rx++;
+                        tty_kref_put(tty);
                        return;
                }
                if (tty_buffer_request_room(tty, 1)) {
                        if (data & info->read_status_mask) {
                                if (data & CyBREAK) {
                                        tty_insert_flip_char(tty,
-                                                readb(base_addr + (CyRDSR <<
+                                                cyy_readb(info, CyRDSR),
-                                                        index)), TTY_BREAK);
+                                                TTY_BREAK);
                                        info->icount.rx++;
                                        if (info->port.flags & ASYNC_SAK)
                                                do_SAK(tty);
                                } else if (data & CyFRAME) {
                                        tty_insert_flip_char(tty,
-                                                readb(base_addr + (CyRDSR <<
+                                                cyy_readb(info, CyRDSR),
-                                                        index)), TTY_FRAME);
+                                                TTY_FRAME);
                                        info->icount.rx++;
                                        info->idle_stats.frame_errs++;
                                } else if (data & CyPARITY) {
                                        /* Pieces of seven... */
                                        tty_insert_flip_char(tty,
-                                                readb(base_addr + (CyRDSR <<
+                                                cyy_readb(info, CyRDSR),
-                                                        index)), TTY_PARITY);
+                                                TTY_PARITY);
                                        info->icount.rx++;
                                        info->idle_stats.parity_errs++;
                                } else if (data & CyOVERRUN) {
@@ -1074,8 +523,8 @@ static void cyy_chip_rx(struct cyclades_card *cinfo, int chip,
                                           the next incoming character.
                                         */
                                        tty_insert_flip_char(tty,
-                                                readb(base_addr + (CyRDSR <<
+                                                cyy_readb(info, CyRDSR),
-                                                        index)), TTY_FRAME);
+                                                TTY_FRAME);
                                        info->icount.rx++;
                                        info->idle_stats.overruns++;
                                /* These two conditions may imply */
@@ -1099,7 +548,7 @@ static void cyy_chip_rx(struct cyclades_card *cinfo, int chip,
                }
        } else {        /* normal character reception */
                /* load # chars available from the chip */
-                char_count = readb(base_addr + (CyRDCR << index));
+                char_count = cyy_readb(info, CyRDCR);
 #ifdef CY_ENABLE_MONITORING
                ++info->mon.int_count;
@@ -1110,7 +559,7 @@ static void cyy_chip_rx(struct cyclades_card *cinfo, int chip,
 #endif
                len = tty_buffer_request_room(tty, char_count);
                while (len--) {
-                        data = readb(base_addr + (CyRDSR << index));
+                        data = cyy_readb(info, CyRDSR);
                        tty_insert_flip_char(tty, data, TTY_NORMAL);
                        info->idle_stats.recv_bytes++;
                        info->icount.rx++;
@@ -1121,16 +570,18 @@ static void cyy_chip_rx(struct cyclades_card *cinfo, int chip,
                info->idle_stats.recv_idle = jiffies;
        }
        tty_schedule_flip(tty);
+        tty_kref_put(tty);
 end:
        /* end of service */
-        cy_writeb(base_addr + (CyRIR << index), save_xir & 0x3f);
+        cyy_writeb(info, CyRIR, save_xir & 0x3f);
-        cy_writeb(base_addr + (CyCAR << index), save_car);
+        cyy_writeb(info, CyCAR, save_car);
 }
 static void cyy_chip_tx(struct cyclades_card *cinfo, unsigned int chip,
                void __iomem *base_addr)
 {
        struct cyclades_port *info;
+        struct tty_struct *tty;
        int char_count, index = cinfo->bus_index;
        u8 save_xir, channel, save_car, outch;
@@ -1154,9 +605,9 @@ static void cyy_chip_tx(struct cyclades_card *cinfo, unsigned int chip,
                goto end;
        }
        info = &cinfo->ports[channel + chip * 4];
-        if (info->port.tty == NULL) {
+        tty = tty_port_tty_get(&info->port);
-                cy_writeb(base_addr + (CySRER << index),
+        if (tty == NULL) {
-                          readb(base_addr + (CySRER << index)) & ~CyTxRdy);
+                cyy_writeb(info, CySRER, cyy_readb(info, CySRER) & ~CyTxRdy);
                goto end;
        }
@@ -1165,7 +616,7 @@ static void cyy_chip_tx(struct cyclades_card *cinfo, unsigned int chip,
        if (info->x_char) {     /* send special char */
                outch = info->x_char;
-                cy_writeb(base_addr + (CyTDR << index), outch);
+                cyy_writeb(info, CyTDR, outch);
                char_count--;
                info->icount.tx++;
                info->x_char = 0;
@@ -1173,14 +624,14 @@ static void cyy_chip_tx(struct cyclades_card *cinfo, unsigned int chip,
        if (info->breakon || info->breakoff) {
                if (info->breakon) {
-                        cy_writeb(base_addr + (CyTDR << index), 0);
+                        cyy_writeb(info, CyTDR, 0);
-                        cy_writeb(base_addr + (CyTDR << index), 0x81);
+                        cyy_writeb(info, CyTDR, 0x81);
                        info->breakon = 0;
                        char_count -= 2;
                }
                if (info->breakoff) {
-                        cy_writeb(base_addr + (CyTDR << index), 0);
+                        cyy_writeb(info, CyTDR, 0);
-                        cy_writeb(base_addr + (CyTDR << index), 0x83);
+                        cyy_writeb(info, CyTDR, 0x83);
                        info->breakoff = 0;
                        char_count -= 2;
                }
@@ -1188,27 +639,23 @@ static void cyy_chip_tx(struct cyclades_card *cinfo, unsigned int chip,
        while (char_count-- > 0) {
                if (!info->xmit_cnt) {
-                        if (readb(base_addr + (CySRER << index)) & CyTxMpty) {
+                        if (cyy_readb(info, CySRER) & CyTxMpty) {
-                                cy_writeb(base_addr + (CySRER << index),
+                                cyy_writeb(info, CySRER,
-                                        readb(base_addr + (CySRER << index)) &
+                                        cyy_readb(info, CySRER) & ~CyTxMpty);
-                                                ~CyTxMpty);
                        } else {
-                                cy_writeb(base_addr + (CySRER << index),
+                                cyy_writeb(info, CySRER, CyTxMpty |
-                                        (readb(base_addr + (CySRER << index)) &
+                                        (cyy_readb(info, CySRER) & ~CyTxRdy));
-                                                ~CyTxRdy) | CyTxMpty);
                        }
                        goto done;
                }
                if (info->port.xmit_buf == NULL) {
-                        cy_writeb(base_addr + (CySRER << index),
+                        cyy_writeb(info, CySRER,
-                                readb(base_addr + (CySRER << index)) &
+                                cyy_readb(info, CySRER) & ~CyTxRdy);
-                                        ~CyTxRdy);
                        goto done;
                }
-                if (info->port.tty->stopped || info->port.tty->hw_stopped) {
+                if (tty->stopped || tty->hw_stopped) {
-                        cy_writeb(base_addr + (CySRER << index),
+                        cyy_writeb(info, CySRER,
-                                readb(base_addr + (CySRER << index)) &
+                                cyy_readb(info, CySRER) & ~CyTxRdy);
-                                        ~CyTxRdy);
                        goto done;
                }
                /* Because the Embedded Transmit Commands have been enabled,
@@ -1225,15 +672,15 @@ static void cyy_chip_tx(struct cyclades_card *cinfo, unsigned int chip,
                        info->xmit_cnt--;
                        info->xmit_tail = (info->xmit_tail + 1) &
                                        (SERIAL_XMIT_SIZE - 1);
-                        cy_writeb(base_addr + (CyTDR << index), outch);
+                        cyy_writeb(info, CyTDR, outch);
                        info->icount.tx++;
                } else {
                        if (char_count > 1) {
                                info->xmit_cnt--;
                                info->xmit_tail = (info->xmit_tail + 1) &
                                        (SERIAL_XMIT_SIZE - 1);
-                                cy_writeb(base_addr + (CyTDR << index), outch);
+                                cyy_writeb(info, CyTDR, outch);
-                                cy_writeb(base_addr + (CyTDR << index), 0);
+                                cyy_writeb(info, CyTDR, 0);
                                info->icount.tx++;
                                char_count--;
                        }
@@ -1241,17 +688,19 @@ static void cyy_chip_tx(struct cyclades_card *cinfo, unsigned int chip,
        }
 done:
-        tty_wakeup(info->port.tty);
+        tty_wakeup(tty);
+        tty_kref_put(tty);
 end:
        /* end of service */
-        cy_writeb(base_addr + (CyTIR << index), save_xir & 0x3f);
+        cyy_writeb(info, CyTIR, save_xir & 0x3f);
-        cy_writeb(base_addr + (CyCAR << index), save_car);
+        cyy_writeb(info, CyCAR, save_car);
 }
 static void cyy_chip_modem(struct cyclades_card *cinfo, int chip,
                void __iomem *base_addr)
 {
        struct cyclades_port *info;
+        struct tty_struct *tty;
        int index = cinfo->bus_index;
        u8 save_xir, channel, save_car, mdm_change, mdm_status;
@@ -1259,13 +708,14 @@ static void cyy_chip_modem(struct cyclades_card *cinfo, int chip,
        save_xir = readb(base_addr + (CyMIR << index));
        channel = save_xir & CyIRChannel;
        info = &cinfo->ports[channel + chip * 4];
-        save_car = readb(base_addr + (CyCAR << index));
+        save_car = cyy_readb(info, CyCAR);
-        cy_writeb(base_addr + (CyCAR << index), save_xir);
+        cyy_writeb(info, CyCAR, save_xir);
-        mdm_change = readb(base_addr + (CyMISR << index));
+        mdm_change = cyy_readb(info, CyMISR);
-        mdm_status = readb(base_addr + (CyMSVR1 << index));
+        mdm_status = cyy_readb(info, CyMSVR1);
-        if (!info->port.tty)
+        tty = tty_port_tty_get(&info->port);
+        if (!tty)
                goto end;
        if (mdm_change & CyANY_DELTA) {
@@ -1279,35 +729,32 @@ static void cyy_chip_modem(struct cyclades_card *cinfo, int chip,
                if (mdm_change & CyRI)
                        info->icount.rng++;
-                wake_up_interruptible(&info->delta_msr_wait);
+                wake_up_interruptible(&info->port.delta_msr_wait);
        }
        if ((mdm_change & CyDCD) && (info->port.flags & ASYNC_CHECK_CD)) {
-                if (!(mdm_status & CyDCD)) {
+                if (mdm_status & CyDCD)
-                        tty_hangup(info->port.tty);
+                        wake_up_interruptible(&info->port.open_wait);
-                        info->port.flags &= ~ASYNC_NORMAL_ACTIVE;
+                else
-                }
+                        tty_hangup(tty);
-                wake_up_interruptible(&info->port.open_wait);
        }
        if ((mdm_change & CyCTS) && (info->port.flags & ASYNC_CTS_FLOW)) {
-                if (info->port.tty->hw_stopped) {
+                if (tty->hw_stopped) {
                        if (mdm_status & CyCTS) {
                                /* cy_start isn't used
                                   because... !!! */
-                                info->port.tty->hw_stopped = 0;
+                                tty->hw_stopped = 0;
-                                cy_writeb(base_addr + (CySRER << index),
+                                cyy_writeb(info, CySRER,
-                                        readb(base_addr + (CySRER << index)) |
+                                        cyy_readb(info, CySRER) | CyTxRdy);
-                                                CyTxRdy);
+                                tty_wakeup(tty);
-                                tty_wakeup(info->port.tty);
                        }
                } else {
                        if (!(mdm_status & CyCTS)) {
                                /* cy_stop isn't used
                                   because ... !!! */
-                                info->port.tty->hw_stopped = 1;
+                                tty->hw_stopped = 1;
-                                cy_writeb(base_addr + (CySRER << index),
+                                cyy_writeb(info, CySRER,
-                                        readb(base_addr + (CySRER << index)) &
+                                        cyy_readb(info, CySRER) & ~CyTxRdy);
-                                                ~CyTxRdy);
                        }
                }
        }
@@ -1315,10 +762,11 @@ static void cyy_chip_modem(struct cyclades_card *cinfo, int chip,
        }
        if (mdm_change & CyRI) {
        }*/
+        tty_kref_put(tty);
 end:
        /* end of service */
-        cy_writeb(base_addr + (CyMIR << index), save_xir & 0x3f);
+        cyy_writeb(info, CyMIR, save_xir & 0x3f);
-        cy_writeb(base_addr + (CyCAR << index), save_car);
+        cyy_writeb(info, CyCAR, save_car);
 }
 /* The real interrupt service routine is called
@@ -1389,6 +837,56 @@ static irqreturn_t cyy_interrupt(int irq, void *dev_id)
        return IRQ_HANDLED;
 }                               /* cyy_interrupt */
+static void cyy_change_rts_dtr(struct cyclades_port *info, unsigned int set,
+                unsigned int clear)
+{
+        struct cyclades_card *card = info->card;
+        int channel = info->line - card->first_line;
+        u32 rts, dtr, msvrr, msvrd;
+        channel &= 0x03;
+        if (info->rtsdtr_inv) {
+                msvrr = CyMSVR2;
+                msvrd = CyMSVR1;
+                rts = CyDTR;
+                dtr = CyRTS;
+        } else {
+                msvrr = CyMSVR1;
+                msvrd = CyMSVR2;
+                rts = CyRTS;
+                dtr = CyDTR;
+        }
+        if (set & TIOCM_RTS) {
+                cyy_writeb(info, CyCAR, channel);
+                cyy_writeb(info, msvrr, rts);
+        }
+        if (clear & TIOCM_RTS) {
+                cyy_writeb(info, CyCAR, channel);
+                cyy_writeb(info, msvrr, ~rts);
+        }
+        if (set & TIOCM_DTR) {
+                cyy_writeb(info, CyCAR, channel);
+                cyy_writeb(info, msvrd, dtr);
+#ifdef CY_DEBUG_DTR
+                printk(KERN_DEBUG "cyc:set_modem_info raising DTR\n");
+                printk(KERN_DEBUG "     status: 0x%x, 0x%x\n",
+                        cyy_readb(info, CyMSVR1),
+                        cyy_readb(info, CyMSVR2));
+#endif
+        }
+        if (clear & TIOCM_DTR) {
+                cyy_writeb(info, CyCAR, channel);
+                cyy_writeb(info, msvrd, ~dtr);
+#ifdef CY_DEBUG_DTR
+                printk(KERN_DEBUG "cyc:set_modem_info dropping DTR\n");
+                printk(KERN_DEBUG "     status: 0x%x, 0x%x\n",
+                        cyy_readb(info, CyMSVR1),
+                        cyy_readb(info, CyMSVR2));
+#endif
+        }
+}
 /***********************************************************/
 /********* End of block of Cyclom-Y specific code **********/
 /******** Start of block of Cyclades-Z specific code *******/
@@ -1398,15 +896,9 @@ static int
 cyz_fetch_msg(struct cyclades_card *cinfo,
                __u32 *channel, __u8 *cmd, __u32 *param)
 {
-        struct FIRM_ID __iomem *firm_id;
+        struct BOARD_CTRL __iomem *board_ctrl = cinfo->board_ctrl;
-        struct ZFW_CTRL __iomem *zfw_ctrl;
-        struct BOARD_CTRL __iomem *board_ctrl;
        unsigned long loc_doorbell;
-        firm_id = cinfo->base_addr + ID_ADDRESS;
-        zfw_ctrl = cinfo->base_addr + (readl(&firm_id->zfwctrl_addr) & 0xfffff);
-        board_ctrl = &zfw_ctrl->board_ctrl;
        loc_doorbell = readl(&cinfo->ctl_addr.p9060->loc_doorbell);
        if (loc_doorbell) {
                *cmd = (char)(0xff & loc_doorbell);
@@ -1422,19 +914,13 @@ static int
 cyz_issue_cmd(struct cyclades_card *cinfo,
                __u32 channel, __u8 cmd, __u32 param)
 {
-        struct FIRM_ID __iomem *firm_id;
+        struct BOARD_CTRL __iomem *board_ctrl = cinfo->board_ctrl;
-        struct ZFW_CTRL __iomem *zfw_ctrl;
-        struct BOARD_CTRL __iomem *board_ctrl;
        __u32 __iomem *pci_doorbell;
        unsigned int index;
-        firm_id = cinfo->base_addr + ID_ADDRESS;
        if (!cyz_is_loaded(cinfo))
                return -1;
-        zfw_ctrl = cinfo->base_addr + (readl(&firm_id->zfwctrl_addr) & 0xfffff);
-        board_ctrl = &zfw_ctrl->board_ctrl;
        index = 0;
        pci_doorbell = &cinfo->ctl_addr.p9060->pci_doorbell;
        while ((readl(pci_doorbell) & 0xff) != 0) {
@@ -1449,11 +935,10 @@ cyz_issue_cmd(struct cyclades_card *cinfo,
        return 0;
 }                               /* cyz_issue_cmd */
-static void cyz_handle_rx(struct cyclades_port *info,
+static void cyz_handle_rx(struct cyclades_port *info, struct tty_struct *tty)
-                struct BUF_CTRL __iomem *buf_ctrl)
 {
+        struct BUF_CTRL __iomem *buf_ctrl = info->u.cyz.buf_ctrl;
        struct cyclades_card *cinfo = info->card;
-        struct tty_struct *tty = info->port.tty;
        unsigned int char_count;
        int len;
 #ifdef BLOCKMOVE
@@ -1542,11 +1027,10 @@ static void cyz_handle_rx(struct cyclades_port *info,
        }
 }
-static void cyz_handle_tx(struct cyclades_port *info,
+static void cyz_handle_tx(struct cyclades_port *info, struct tty_struct *tty)
-                struct BUF_CTRL __iomem *buf_ctrl)
 {
+        struct BUF_CTRL __iomem *buf_ctrl = info->u.cyz.buf_ctrl;
        struct cyclades_card *cinfo = info->card;
-        struct tty_struct *tty = info->port.tty;
        u8 data;
        unsigned int char_count;
 #ifdef BLOCKMOVE
@@ -1621,34 +1105,24 @@ ztxdone:
 static void cyz_handle_cmd(struct cyclades_card *cinfo)
 {
+        struct BOARD_CTRL __iomem *board_ctrl = cinfo->board_ctrl;
        struct tty_struct *tty;
        struct cyclades_port *info;
-        static struct FIRM_ID __iomem *firm_id;
-        static struct ZFW_CTRL __iomem *zfw_ctrl;
-        static struct BOARD_CTRL __iomem *board_ctrl;
-        static struct CH_CTRL __iomem *ch_ctrl;
-        static struct BUF_CTRL __iomem *buf_ctrl;
        __u32 channel, param, fw_ver;
        __u8 cmd;
        int special_count;
        int delta_count;
-        firm_id = cinfo->base_addr + ID_ADDRESS;
-        zfw_ctrl = cinfo->base_addr + (readl(&firm_id->zfwctrl_addr) & 0xfffff);
-        board_ctrl = &zfw_ctrl->board_ctrl;
        fw_ver = readl(&board_ctrl->fw_version);
        while (cyz_fetch_msg(cinfo, &channel, &cmd, &param) == 1) {
                special_count = 0;
                delta_count = 0;
                info = &cinfo->ports[channel];
-                tty = info->port.tty;
+                tty = tty_port_tty_get(&info->port);
                if (tty == NULL)
                        continue;
-                ch_ctrl = &(zfw_ctrl->ch_ctrl[channel]);
-                buf_ctrl = &(zfw_ctrl->buf_ctrl[channel]);
                switch (cmd) {
                case C_CM_PR_ERROR:
                        tty_insert_flip_char(tty, 0, TTY_PARITY);
@@ -1669,15 +1143,12 @@ static void cyz_handle_cmd(struct cyclades_card *cinfo)
                        info->icount.dcd++;
                        delta_count++;
                        if (info->port.flags & ASYNC_CHECK_CD) {
-                                if ((fw_ver > 241 ? ((u_long) param) :
+                                u32 dcd = fw_ver > 241 ? param :
-                                                readl(&ch_ctrl->rs_status)) &
+                                        readl(&info->u.cyz.ch_ctrl->rs_status);
-                                                C_RS_DCD) {
+                                if (dcd & C_RS_DCD)
                                        wake_up_interruptible(&info->port.open_wait);
-                                } else {
+                                else
-                                        tty_hangup(info->port.tty);
+                                        tty_hangup(tty);
-                                        wake_up_interruptible(&info->port.open_wait);
-                                        info->port.flags &= ~ASYNC_NORMAL_ACTIVE;
-                                }
                        }
                        break;
                case C_CM_MCTS:
@@ -1706,7 +1177,7 @@ static void cyz_handle_cmd(struct cyclades_card *cinfo)
                        printk(KERN_DEBUG "cyz_interrupt: rcvd intr, card %d, "
                                        "port %ld\n", info->card, channel);
 #endif
-                        cyz_handle_rx(info, buf_ctrl);
+                        cyz_handle_rx(info, tty);
                        break;
                case C_CM_TXBEMPTY:
                case C_CM_TXLOWWM:
@@ -1716,7 +1187,7 @@ static void cyz_handle_cmd(struct cyclades_card *cinfo)
                        printk(KERN_DEBUG "cyz_interrupt: xmit intr, card %d, "
                                        "port %ld\n", info->card, channel);
 #endif
-                        cyz_handle_tx(info, buf_ctrl);
+                        cyz_handle_tx(info, tty);
                        break;
 #endif                          /* CONFIG_CYZ_INTR */
                case C_CM_FATAL:
@@ -1726,9 +1197,10 @@ static void cyz_handle_cmd(struct cyclades_card *cinfo)
                        break;
                }
                if (delta_count)
-                        wake_up_interruptible(&info->delta_msr_wait);
+                        wake_up_interruptible(&info->port.delta_msr_wait);
                if (special_count)
                        tty_schedule_flip(tty);
+                tty_kref_put(tty);
        }
 }
@@ -1774,10 +1246,6 @@ static void cyz_poll(unsigned long arg)
 {
        struct cyclades_card *cinfo;
        struct cyclades_port *info;
-        struct tty_struct *tty;
-        struct FIRM_ID __iomem *firm_id;
-        struct ZFW_CTRL __iomem *zfw_ctrl;
-        struct BUF_CTRL __iomem *buf_ctrl;
        unsigned long expires = jiffies + HZ;
        unsigned int port, card;
@@ -1789,10 +1257,6 @@ static void cyz_poll(unsigned long arg)
                if (!cyz_is_loaded(cinfo))
                        continue;
-                firm_id = cinfo->base_addr + ID_ADDRESS;
-                zfw_ctrl = cinfo->base_addr +
-                                (readl(&firm_id->zfwctrl_addr) & 0xfffff);
        /* Skip first polling cycle to avoid racing conditions with the FW */
                if (!cinfo->intr_enabled) {
                        cinfo->intr_enabled = 1;
@@ -1802,13 +1266,17 @@ static void cyz_poll(unsigned long arg)
                cyz_handle_cmd(cinfo);
                for (port = 0; port < cinfo->nports; port++) {
+                        struct tty_struct *tty;
                        info = &cinfo->ports[port];
-                        tty = info->port.tty;
+                        tty = tty_port_tty_get(&info->port);
-                        buf_ctrl = &(zfw_ctrl->buf_ctrl[port]);
+                        /* OK to pass NULL to the handle functions below.
+                           They need to drop the data in that case. */
                        if (!info->throttle)
-                                cyz_handle_rx(info, buf_ctrl);
+                                cyz_handle_rx(info, tty);
-                        cyz_handle_tx(info, buf_ctrl);
+                        cyz_handle_tx(info, tty);
+                        tty_kref_put(tty);
                }
                /* poll every 'cyz_polling_cycle' period */
                expires = jiffies + cyz_polling_cycle;
@@ -1824,13 +1292,12 @@ static void cyz_poll(unsigned long arg)
 /* This is called whenever a port becomes active;
   interrupts are enabled and DTR & RTS are turned on.
 */
-static int startup(struct cyclades_port *info)
+static int cy_startup(struct cyclades_port *info, struct tty_struct *tty)
 {
        struct cyclades_card *card;
        unsigned long flags;
        int retval = 0;
-        void __iomem *base_addr;
+        int channel;
-        int chip, channel, index;
        unsigned long page;
        card = info->card;
@@ -1842,15 +1309,11 @@ static int startup(struct cyclades_port *info)
        spin_lock_irqsave(&card->card_lock, flags);
-        if (info->port.flags & ASYNC_INITIALIZED) {
+        if (info->port.flags & ASYNC_INITIALIZED)
-                free_page(page);
                goto errout;
-        }
        if (!info->type) {
-                if (info->port.tty)
+                set_bit(TTY_IO_ERROR, &tty->flags);
-                        set_bit(TTY_IO_ERROR, &info->port.tty->flags);
-                free_page(page);
                goto errout;
        }
@@ -1861,96 +1324,53 @@ static int startup(struct cyclades_port *info)
        spin_unlock_irqrestore(&card->card_lock, flags);
-        set_line_char(info);
+        cy_set_line_char(info, tty);
        if (!cy_is_Z(card)) {
-                chip = channel >> 2;
                channel &= 0x03;
-                index = card->bus_index;
-                base_addr = card->base_addr + (cy_chip_offset[chip] << index);
-#ifdef CY_DEBUG_OPEN
-                printk(KERN_DEBUG "cyc startup card %d, chip %d, channel %d, "
-                                "base_addr %p\n",
-                                card, chip, channel, base_addr);
-#endif
                spin_lock_irqsave(&card->card_lock, flags);
-                cy_writeb(base_addr + (CyCAR << index), (u_char) channel);
+                cyy_writeb(info, CyCAR, channel);
-                cy_writeb(base_addr + (CyRTPR << index),
+                cyy_writeb(info, CyRTPR,
                        (info->default_timeout ? info->default_timeout : 0x02));
                /* 10ms rx timeout */
-                cyy_issue_cmd(base_addr, CyCHAN_CTL | CyENB_RCVR | CyENB_XMTR,
+                cyy_issue_cmd(info, CyCHAN_CTL | CyENB_RCVR | CyENB_XMTR);
-                                index);
-                cy_writeb(base_addr + (CyCAR << index), (u_char) channel);
-                cy_writeb(base_addr + (CyMSVR1 << index), CyRTS);
-                cy_writeb(base_addr + (CyMSVR2 << index), CyDTR);
-#ifdef CY_DEBUG_DTR
-                printk(KERN_DEBUG "cyc:startup raising DTR\n");
-                printk(KERN_DEBUG "     status: 0x%x, 0x%x\n",
-                        readb(base_addr + (CyMSVR1 << index)),
-                        readb(base_addr + (CyMSVR2 << index)));
-#endif
-                cy_writeb(base_addr + (CySRER << index),
-                        readb(base_addr + (CySRER << index)) | CyRxData);
-                info->port.flags |= ASYNC_INITIALIZED;
-                if (info->port.tty)
-                        clear_bit(TTY_IO_ERROR, &info->port.tty->flags);
-                info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
-                info->breakon = info->breakoff = 0;
-                memset((char *)&info->idle_stats, 0, sizeof(info->idle_stats));
-                info->idle_stats.in_use =
-                info->idle_stats.recv_idle =
-                info->idle_stats.xmit_idle = jiffies;
-                spin_unlock_irqrestore(&card->card_lock, flags);
+                cyy_change_rts_dtr(info, TIOCM_RTS | TIOCM_DTR, 0);
+                cyy_writeb(info, CySRER, cyy_readb(info, CySRER) | CyRxData);
        } else {
-                struct FIRM_ID __iomem *firm_id;
+                struct CH_CTRL __iomem *ch_ctrl = info->u.cyz.ch_ctrl;
-                struct ZFW_CTRL __iomem *zfw_ctrl;
-                struct BOARD_CTRL __iomem *board_ctrl;
-                struct CH_CTRL __iomem *ch_ctrl;
-                base_addr = card->base_addr;
-                firm_id = base_addr + ID_ADDRESS;
                if (!cyz_is_loaded(card))
                        return -ENODEV;
-                zfw_ctrl = card->base_addr +
-                                (readl(&firm_id->zfwctrl_addr) & 0xfffff);
-                board_ctrl = &zfw_ctrl->board_ctrl;
-                ch_ctrl = zfw_ctrl->ch_ctrl;
 #ifdef CY_DEBUG_OPEN
                printk(KERN_DEBUG "cyc startup Z card %d, channel %d, "
-                        "base_addr %p\n", card, channel, base_addr);
+                        "base_addr %p\n", card, channel, card->base_addr);
 #endif
                spin_lock_irqsave(&card->card_lock, flags);
-                cy_writel(&ch_ctrl[channel].op_mode, C_CH_ENABLE);
+                cy_writel(&ch_ctrl->op_mode, C_CH_ENABLE);
 #ifdef Z_WAKE
 #ifdef CONFIG_CYZ_INTR
-                cy_writel(&ch_ctrl[channel].intr_enable,
+                cy_writel(&ch_ctrl->intr_enable,
                          C_IN_TXBEMPTY | C_IN_TXLOWWM | C_IN_RXHIWM |
                          C_IN_RXNNDT | C_IN_IOCTLW | C_IN_MDCD);
 #else
-                cy_writel(&ch_ctrl[channel].intr_enable,
+                cy_writel(&ch_ctrl->intr_enable,
                          C_IN_IOCTLW | C_IN_MDCD);
 #endif                          /* CONFIG_CYZ_INTR */
 #else
 #ifdef CONFIG_CYZ_INTR
-                cy_writel(&ch_ctrl[channel].intr_enable,
+                cy_writel(&ch_ctrl->intr_enable,
                          C_IN_TXBEMPTY | C_IN_TXLOWWM | C_IN_RXHIWM |
                          C_IN_RXNNDT | C_IN_MDCD);
 #else
-                cy_writel(&ch_ctrl[channel].intr_enable, C_IN_MDCD);
+                cy_writel(&ch_ctrl->intr_enable, C_IN_MDCD);
 #endif                          /* CONFIG_CYZ_INTR */
 #endif                          /* Z_WAKE */
@@ -1969,32 +1389,22 @@ static int startup(struct cyclades_port *info)
                /* set timeout !!! */
                /* set RTS and DTR !!! */
-                cy_writel(&ch_ctrl[channel].rs_control,
+                tty_port_raise_dtr_rts(&info->port);
-                        readl(&ch_ctrl[channel].rs_control) | C_RS_RTS |
-                        C_RS_DTR);
-                retval = cyz_issue_cmd(card, channel, C_CM_IOCTLM, 0L);
-                if (retval != 0) {
-                        printk(KERN_ERR "cyc:startup(3) retval on ttyC%d was "
-                                "%x\n", info->line, retval);
-                }
-#ifdef CY_DEBUG_DTR
-                printk(KERN_DEBUG "cyc:startup raising Z DTR\n");
-#endif
                /* enable send, recv, modem !!! */
+        }
-                info->port.flags |= ASYNC_INITIALIZED;
+        info->port.flags |= ASYNC_INITIALIZED;
-                if (info->port.tty)
-                        clear_bit(TTY_IO_ERROR, &info->port.tty->flags);
-                info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
-                info->breakon = info->breakoff = 0;
-                memset((char *)&info->idle_stats, 0, sizeof(info->idle_stats));
-                info->idle_stats.in_use =
-                info->idle_stats.recv_idle =
-                info->idle_stats.xmit_idle = jiffies;
-                spin_unlock_irqrestore(&card->card_lock, flags);
+        clear_bit(TTY_IO_ERROR, &tty->flags);
-        }
+        info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
+        info->breakon = info->breakoff = 0;
+        memset((char *)&info->idle_stats, 0, sizeof(info->idle_stats));
+        info->idle_stats.in_use =
+        info->idle_stats.recv_idle =
+        info->idle_stats.xmit_idle = jiffies;
+        spin_unlock_irqrestore(&card->card_lock, flags);
 #ifdef CY_DEBUG_OPEN
        printk(KERN_DEBUG "cyc startup done\n");
@@ -2003,28 +1413,20 @@ static int startup(struct cyclades_port *info)
 errout:
        spin_unlock_irqrestore(&card->card_lock, flags);
+        free_page(page);
        return retval;
 }                               /* startup */
 static void start_xmit(struct cyclades_port *info)
 {
-        struct cyclades_card *card;
+        struct cyclades_card *card = info->card;
        unsigned long flags;
-        void __iomem *base_addr;
+        int channel = info->line - card->first_line;
-        int chip, channel, index;
-        card = info->card;
-        channel = info->line - card->first_line;
        if (!cy_is_Z(card)) {
-                chip = channel >> 2;
-                channel &= 0x03;
-                index = card->bus_index;
-                base_addr = card->base_addr + (cy_chip_offset[chip] << index);
                spin_lock_irqsave(&card->card_lock, flags);
-                cy_writeb(base_addr + (CyCAR << index), channel);
+                cyy_writeb(info, CyCAR, channel & 0x03);
-                cy_writeb(base_addr + (CySRER << index),
+                cyy_writeb(info, CySRER, cyy_readb(info, CySRER) | CyTxRdy);
-                        readb(base_addr + (CySRER << index)) | CyTxRdy);
                spin_unlock_irqrestore(&card->card_lock, flags);
        } else {
 #ifdef CONFIG_CYZ_INTR
@@ -2047,12 +1449,11 @@ static void start_xmit(struct cyclades_port *info)
 * This routine shuts down a serial port; interrupts are disabled,
 * and DTR is dropped if the hangup on close termio flag is on.
 */
-static void shutdown(struct cyclades_port *info)
+static void cy_shutdown(struct cyclades_port *info, struct tty_struct *tty)
 {
        struct cyclades_card *card;
        unsigned long flags;
-        void __iomem *base_addr;
+        int channel;
-        int chip, channel, index;
        if (!(info->port.flags & ASYNC_INITIALIZED))
                return;
@@ -2060,21 +1461,10 @@ static void shutdown(struct cyclades_port *info)
        card = info->card;
        channel = info->line - card->first_line;
        if (!cy_is_Z(card)) {
-                chip = channel >> 2;
-                channel &= 0x03;
-                index = card->bus_index;
-                base_addr = card->base_addr + (cy_chip_offset[chip] << index);
-#ifdef CY_DEBUG_OPEN
-                printk(KERN_DEBUG "cyc shutdown Y card %d, chip %d, "
-                                "channel %d, base_addr %p\n",
-                                card, chip, channel, base_addr);
-#endif
                spin_lock_irqsave(&card->card_lock, flags);
                /* Clear delta_msr_wait queue to avoid mem leaks. */
-                wake_up_interruptible(&info->delta_msr_wait);
+                wake_up_interruptible(&info->port.delta_msr_wait);
                if (info->port.xmit_buf) {
                        unsigned char *temp;
@@ -2082,47 +1472,25 @@ static void shutdown(struct cyclades_port *info)
                        info->port.xmit_buf = NULL;
                        free_page((unsigned long)temp);
                }
-                cy_writeb(base_addr + (CyCAR << index), (u_char) channel);
+                if (tty->termios->c_cflag & HUPCL)
-                if (!info->port.tty || (info->port.tty->termios->c_cflag & HUPCL)) {
+                        cyy_change_rts_dtr(info, 0, TIOCM_RTS | TIOCM_DTR);
-                        cy_writeb(base_addr + (CyMSVR1 << index), ~CyRTS);
-                        cy_writeb(base_addr + (CyMSVR2 << index), ~CyDTR);
+                cyy_issue_cmd(info, CyCHAN_CTL | CyDIS_RCVR);
-#ifdef CY_DEBUG_DTR
-                        printk(KERN_DEBUG "cyc shutdown dropping DTR\n");
-                        printk(KERN_DEBUG "     status: 0x%x, 0x%x\n",
-                                readb(base_addr + (CyMSVR1 << index)),
-                                readb(base_addr + (CyMSVR2 << index)));
-#endif
-                }
-                cyy_issue_cmd(base_addr, CyCHAN_CTL | CyDIS_RCVR, index);
                /* it may be appropriate to clear _XMIT at
                   some later date (after testing)!!! */
-                if (info->port.tty)
+                set_bit(TTY_IO_ERROR, &tty->flags);
-                        set_bit(TTY_IO_ERROR, &info->port.tty->flags);
                info->port.flags &= ~ASYNC_INITIALIZED;
                spin_unlock_irqrestore(&card->card_lock, flags);
        } else {
-                struct FIRM_ID __iomem *firm_id;
-                struct ZFW_CTRL __iomem *zfw_ctrl;
-                struct BOARD_CTRL __iomem *board_ctrl;
-                struct CH_CTRL __iomem *ch_ctrl;
-                int retval;
-                base_addr = card->base_addr;
 #ifdef CY_DEBUG_OPEN
                printk(KERN_DEBUG "cyc shutdown Z card %d, channel %d, "
-                        "base_addr %p\n", card, channel, base_addr);
+                        "base_addr %p\n", card, channel, card->base_addr);
 #endif
-                firm_id = base_addr + ID_ADDRESS;
                if (!cyz_is_loaded(card))
                        return;
-                zfw_ctrl = card->base_addr +
-                                (readl(&firm_id->zfwctrl_addr) & 0xfffff);
-                board_ctrl = &zfw_ctrl->board_ctrl;
-                ch_ctrl = zfw_ctrl->ch_ctrl;
                spin_lock_irqsave(&card->card_lock, flags);
                if (info->port.xmit_buf) {
@@ -2132,23 +1500,10 @@ static void shutdown(struct cyclades_port *info)
                        free_page((unsigned long)temp);
                }
-                if (!info->port.tty || (info->port.tty->termios->c_cflag & HUPCL)) {
+                if (tty->termios->c_cflag & HUPCL)
-                        cy_writel(&ch_ctrl[channel].rs_control,
+                        tty_port_lower_dtr_rts(&info->port);
-                                (__u32)(readl(&ch_ctrl[channel].rs_control) &
-                                        ~(C_RS_RTS | C_RS_DTR)));
-                        retval = cyz_issue_cmd(info->card, channel,
-                                        C_CM_IOCTLM, 0L);
-                        if (retval != 0) {
-                                printk(KERN_ERR"cyc:shutdown retval on ttyC%d "
-                                        "was %x\n", info->line, retval);
-                        }
-#ifdef CY_DEBUG_DTR
-                        printk(KERN_DEBUG "cyc:shutdown dropping Z DTR\n");
-#endif
-                }
-                if (info->port.tty)
+                set_bit(TTY_IO_ERROR, &tty->flags);
-                        set_bit(TTY_IO_ERROR, &info->port.tty->flags);
                info->port.flags &= ~ASYNC_INITIALIZED;
                spin_unlock_irqrestore(&card->card_lock, flags);
@@ -2165,199 +1520,6 @@ static void shutdown(struct cyclades_port *info)
 * ------------------------------------------------------------
 */
-static int
-block_til_ready(struct tty_struct *tty, struct file *filp,
-                struct cyclades_port *info)
-{
-        DECLARE_WAITQUEUE(wait, current);
-        struct cyclades_card *cinfo;
-        unsigned long flags;
-        int chip, channel, index;
-        int retval;
-        void __iomem *base_addr;
-        cinfo = info->card;
-        channel = info->line - cinfo->first_line;
-        /*
-         * If the device is in the middle of being closed, then block
-         * until it's done, and then try again.
-         */
-        if (tty_hung_up_p(filp) || (info->port.flags & ASYNC_CLOSING)) {
-                wait_event_interruptible(info->port.close_wait,
-                                !(info->port.flags & ASYNC_CLOSING));
-                return (info->port.flags & ASYNC_HUP_NOTIFY) ? -EAGAIN: -ERESTARTSYS;
-        }
-        /*
-         * If non-blocking mode is set, then make the check up front
-         * and then exit.
-         */
-        if ((filp->f_flags & O_NONBLOCK) ||
-                                        (tty->flags & (1 << TTY_IO_ERROR))) {
-                info->port.flags |= ASYNC_NORMAL_ACTIVE;
-                return 0;
-        }
-        /*
-         * Block waiting for the carrier detect and the line to become
-         * free (i.e., not in use by the callout).  While we are in
-         * this loop, info->port.count is dropped by one, so that
-         * cy_close() knows when to free things.  We restore it upon
-         * exit, either normal or abnormal.
-         */
-        retval = 0;
-        add_wait_queue(&info->port.open_wait, &wait);
-#ifdef CY_DEBUG_OPEN
-        printk(KERN_DEBUG "cyc block_til_ready before block: ttyC%d, "
-                "count = %d\n", info->line, info->port.count);
-#endif
-        spin_lock_irqsave(&cinfo->card_lock, flags);
-        if (!tty_hung_up_p(filp))
-                info->port.count--;
-        spin_unlock_irqrestore(&cinfo->card_lock, flags);
-#ifdef CY_DEBUG_COUNT
-        printk(KERN_DEBUG "cyc block_til_ready: (%d): decrementing count to "
-                "%d\n", current->pid, info->port.count);
-#endif
-        info->port.blocked_open++;
-        if (!cy_is_Z(cinfo)) {
-                chip = channel >> 2;
-                channel &= 0x03;
-                index = cinfo->bus_index;
-                base_addr = cinfo->base_addr + (cy_chip_offset[chip] << index);
-                while (1) {
-                        spin_lock_irqsave(&cinfo->card_lock, flags);
-                        if ((tty->termios->c_cflag & CBAUD)) {
-                                cy_writeb(base_addr + (CyCAR << index),
-                                          (u_char) channel);
-                                cy_writeb(base_addr + (CyMSVR1 << index),
-                                          CyRTS);
-                                cy_writeb(base_addr + (CyMSVR2 << index),
-                                          CyDTR);
-#ifdef CY_DEBUG_DTR
-                                printk(KERN_DEBUG "cyc:block_til_ready raising "
-                                        "DTR\n");
-                                printk(KERN_DEBUG "     status: 0x%x, 0x%x\n",
-                                        readb(base_addr + (CyMSVR1 << index)),
-                                        readb(base_addr + (CyMSVR2 << index)));
-#endif
-                        }
-                        spin_unlock_irqrestore(&cinfo->card_lock, flags);
-                        set_current_state(TASK_INTERRUPTIBLE);
-                        if (tty_hung_up_p(filp) ||
-                                        !(info->port.flags & ASYNC_INITIALIZED)) {
-                                retval = ((info->port.flags & ASYNC_HUP_NOTIFY) ?
-                                          -EAGAIN : -ERESTARTSYS);
-                                break;
-                        }
-                        spin_lock_irqsave(&cinfo->card_lock, flags);
-                        cy_writeb(base_addr + (CyCAR << index),
-                                  (u_char) channel);
-                        if (!(info->port.flags & ASYNC_CLOSING) && (C_CLOCAL(tty) ||
-                                        (readb(base_addr +
-                                                (CyMSVR1 << index)) & CyDCD))) {
-                                spin_unlock_irqrestore(&cinfo->card_lock, flags);
-                                break;
-                        }
-                        spin_unlock_irqrestore(&cinfo->card_lock, flags);
-                        if (signal_pending(current)) {
-                                retval = -ERESTARTSYS;
-                                break;
-                        }
-#ifdef CY_DEBUG_OPEN
-                        printk(KERN_DEBUG "cyc block_til_ready blocking: "
-                                "ttyC%d, count = %d\n",
-                                info->line, info->port.count);
-#endif
-                        schedule();
-                }
-        } else {
-                struct FIRM_ID __iomem *firm_id;
-                struct ZFW_CTRL __iomem *zfw_ctrl;
-                struct BOARD_CTRL __iomem *board_ctrl;
-                struct CH_CTRL __iomem *ch_ctrl;
-                base_addr = cinfo->base_addr;
-                firm_id = base_addr + ID_ADDRESS;
-                if (!cyz_is_loaded(cinfo)) {
-                        __set_current_state(TASK_RUNNING);
-                        remove_wait_queue(&info->port.open_wait, &wait);
-                        return -EINVAL;
-                }
-                zfw_ctrl = base_addr + (readl(&firm_id->zfwctrl_addr)
-                                                                & 0xfffff);
-                board_ctrl = &zfw_ctrl->board_ctrl;
-                ch_ctrl = zfw_ctrl->ch_ctrl;
-                while (1) {
-                        if ((tty->termios->c_cflag & CBAUD)) {
-                                cy_writel(&ch_ctrl[channel].rs_control,
-                                        readl(&ch_ctrl[channel].rs_control) |
-                                        C_RS_RTS | C_RS_DTR);
-                                retval = cyz_issue_cmd(cinfo,
-                                        channel, C_CM_IOCTLM, 0L);
-                                if (retval != 0) {
-                                        printk(KERN_ERR "cyc:block_til_ready "
-                                                "retval on ttyC%d was %x\n",
-                                                info->line, retval);
-                                }
-#ifdef CY_DEBUG_DTR
-                                printk(KERN_DEBUG "cyc:block_til_ready raising "
-                                        "Z DTR\n");
-#endif
-                        }
-                        set_current_state(TASK_INTERRUPTIBLE);
-                        if (tty_hung_up_p(filp) ||
-                                        !(info->port.flags & ASYNC_INITIALIZED)) {
-                                retval = ((info->port.flags & ASYNC_HUP_NOTIFY) ?
-                                          -EAGAIN : -ERESTARTSYS);
-                                break;
-                        }
-                        if (!(info->port.flags & ASYNC_CLOSING) && (C_CLOCAL(tty) ||
-                                        (readl(&ch_ctrl[channel].rs_status) &
-                                                C_RS_DCD))) {
-                                break;
-                        }
-                        if (signal_pending(current)) {
-                                retval = -ERESTARTSYS;
-                                break;
-                        }
-#ifdef CY_DEBUG_OPEN
-                        printk(KERN_DEBUG "cyc block_til_ready blocking: "
-                                "ttyC%d, count = %d\n",
-                                info->line, info->port.count);
-#endif
-                        schedule();
-                }
-        }
-        __set_current_state(TASK_RUNNING);
-        remove_wait_queue(&info->port.open_wait, &wait);
-        if (!tty_hung_up_p(filp)) {
-                info->port.count++;
-#ifdef CY_DEBUG_COUNT
-                printk(KERN_DEBUG "cyc:block_til_ready (%d): incrementing "
-                        "count to %d\n", current->pid, info->port.count);
-#endif
-        }
-        info->port.blocked_open--;
-#ifdef CY_DEBUG_OPEN
-        printk(KERN_DEBUG "cyc:block_til_ready after blocking: ttyC%d, "
-                "count = %d\n", info->line, info->port.count);
-#endif
-        if (retval)
-                return retval;
-        info->port.flags |= ASYNC_NORMAL_ACTIVE;
-        return 0;
-}                               /* block_til_ready */
 /*
 * This routine is called whenever a serial port is opened.  It
 * performs the serial-specific initialization for the tty structure.
@@ -2436,7 +1598,6 @@ static int cy_open(struct tty_struct *tty, struct file *filp)
        printk(KERN_DEBUG "cyc:cy_open ttyC%d\n", info->line);
 #endif
        tty->driver_data = info;
-        info->port.tty = tty;
        if (serial_paranoia_check(info, tty->name, "cy_open"))
                return -ENODEV;
@@ -2462,11 +1623,11 @@ static int cy_open(struct tty_struct *tty, struct file *filp)
        /*
         * Start up serial port
         */
-        retval = startup(info);
+        retval = cy_startup(info, tty);
        if (retval)
                return retval;
-        retval = block_til_ready(tty, filp, info);
+        retval = tty_port_block_til_ready(&info->port, tty, filp);
        if (retval) {
 #ifdef CY_DEBUG_OPEN
                printk(KERN_DEBUG "cyc:cy_open returning after block_til_ready "
@@ -2476,6 +1637,7 @@ static int cy_open(struct tty_struct *tty, struct file *filp)
        }
        info->throttle = 0;
+        tty_port_tty_set(&info->port, tty);
 #ifdef CY_DEBUG_OPEN
        printk(KERN_DEBUG "cyc:cy_open done\n");
@@ -2490,8 +1652,6 @@ static void cy_wait_until_sent(struct tty_struct *tty, int timeout)
 {
        struct cyclades_card *card;
        struct cyclades_port *info = tty->driver_data;
-        void __iomem *base_addr;
-        int chip, channel, index;
        unsigned long orig_jiffies;
        int char_time;
@@ -2535,13 +1695,8 @@ static void cy_wait_until_sent(struct tty_struct *tty, int timeout)
                timeout, char_time, jiffies);
 #endif
        card = info->card;
-        channel = (info->line) - (card->first_line);
        if (!cy_is_Z(card)) {
-                chip = channel >> 2;
+                while (cyy_readb(info, CySRER) & CyTxRdy) {
-                channel &= 0x03;
-                index = card->bus_index;
-                base_addr = card->base_addr + (cy_chip_offset[chip] << index);
-                while (readb(base_addr + (CySRER << index)) & CyTxRdy) {
 #ifdef CY_DEBUG_WAIT_UNTIL_SENT
                        printk(KERN_DEBUG "Not clean (jiff=%lu)...", jiffies);
 #endif
@@ -2595,103 +1750,37 @@ static void cy_flush_buffer(struct tty_struct *tty)
 }                               /* cy_flush_buffer */
-/*
+static void cy_do_close(struct tty_port *port)
- * This routine is called when a particular tty device is closed.
- */
-static void cy_close(struct tty_struct *tty, struct file *filp)
 {
-        struct cyclades_port *info = tty->driver_data;
+        struct cyclades_port *info = container_of(port, struct cyclades_port,
+                                                                port);
        struct cyclades_card *card;
        unsigned long flags;
+        int channel;
-#ifdef CY_DEBUG_OTHER
-        printk(KERN_DEBUG "cyc:cy_close ttyC%d\n", info->line);
-#endif
-        if (!info || serial_paranoia_check(info, tty->name, "cy_close"))
-                return;
        card = info->card;
+        channel = info->line - card->first_line;
-        spin_lock_irqsave(&card->card_lock, flags);
-        /* If the TTY is being hung up, nothing to do */
-        if (tty_hung_up_p(filp)) {
-                spin_unlock_irqrestore(&card->card_lock, flags);
-                return;
-        }
-#ifdef CY_DEBUG_OPEN
-        printk(KERN_DEBUG "cyc:cy_close ttyC%d, count = %d\n", info->line,
-                info->port.count);
-#endif
-        if ((tty->count == 1) && (info->port.count != 1)) {
-                /*
-                 * Uh, oh.  tty->count is 1, which means that the tty
-                 * structure will be freed.  Info->count should always
-                 * be one in these conditions.  If it's greater than
-                 * one, we've got real problems, since it means the
-                 * serial port won't be shutdown.
-                 */
-                printk(KERN_ERR "cyc:cy_close: bad serial port count; "
-                        "tty->count is 1, info->port.count is %d\n", info->port.count);
-                info->port.count = 1;
-        }
-#ifdef CY_DEBUG_COUNT
-        printk(KERN_DEBUG  "cyc:cy_close at (%d): decrementing count to %d\n",
-                current->pid, info->port.count - 1);
-#endif
-        if (--info->port.count < 0) {
-#ifdef CY_DEBUG_COUNT
-                printk(KERN_DEBUG "cyc:cyc_close setting count to 0\n");
-#endif
-                info->port.count = 0;
-        }
-        if (info->port.count) {
-                spin_unlock_irqrestore(&card->card_lock, flags);
-                return;
-        }
-        info->port.flags |= ASYNC_CLOSING;
-        /*
-         * Now we wait for the transmit buffer to clear; and we notify
-         * the line discipline to only process XON/XOFF characters.
-         */
-        tty->closing = 1;
-        spin_unlock_irqrestore(&card->card_lock, flags);
-        if (info->port.closing_wait != CY_CLOSING_WAIT_NONE)
-                tty_wait_until_sent(tty, info->port.closing_wait);
        spin_lock_irqsave(&card->card_lock, flags);
        if (!cy_is_Z(card)) {
-                int channel = info->line - card->first_line;
-                int index = card->bus_index;
-                void __iomem *base_addr = card->base_addr +
-                        (cy_chip_offset[channel >> 2] << index);
                /* Stop accepting input */
-                channel &= 0x03;
+                cyy_writeb(info, CyCAR, channel & 0x03);
-                cy_writeb(base_addr + (CyCAR << index), (u_char) channel);
+                cyy_writeb(info, CySRER, cyy_readb(info, CySRER) & ~CyRxData);
-                cy_writeb(base_addr + (CySRER << index),
-                          readb(base_addr + (CySRER << index)) & ~CyRxData);
                if (info->port.flags & ASYNC_INITIALIZED) {
                        /* Waiting for on-board buffers to be empty before
                           closing the port */
                        spin_unlock_irqrestore(&card->card_lock, flags);
-                        cy_wait_until_sent(tty, info->timeout);
+                        cy_wait_until_sent(port->tty, info->timeout);
                        spin_lock_irqsave(&card->card_lock, flags);
                }
        } else {
 #ifdef Z_WAKE
                /* Waiting for on-board buffers to be empty before closing
                   the port */
-                void __iomem *base_addr = card->base_addr;
+                struct CH_CTRL __iomem *ch_ctrl = info->u.cyz.ch_ctrl;
-                struct FIRM_ID __iomem *firm_id = base_addr + ID_ADDRESS;
-                struct ZFW_CTRL __iomem *zfw_ctrl =
-                    base_addr + (readl(&firm_id->zfwctrl_addr) & 0xfffff);
-                struct CH_CTRL __iomem *ch_ctrl = zfw_ctrl->ch_ctrl;
-                int channel = info->line - card->first_line;
                int retval;
-                if (readl(&ch_ctrl[channel].flow_status) != C_FS_TXIDLE) {
+                if (readl(&ch_ctrl->flow_status) != C_FS_TXIDLE) {
                        retval = cyz_issue_cmd(card, channel, C_CM_IOCTLW, 0L);
                        if (retval != 0) {
                                printk(KERN_DEBUG "cyc:cy_close retval on "
@@ -2703,32 +1792,19 @@ static void cy_close(struct tty_struct *tty, struct file *filp)
                }
 #endif
        }
        spin_unlock_irqrestore(&card->card_lock, flags);
-        shutdown(info);
+        cy_shutdown(info, port->tty);
-        cy_flush_buffer(tty);
+}
-        tty_ldisc_flush(tty);
-        spin_lock_irqsave(&card->card_lock, flags);
-        tty->closing = 0;
-        info->port.tty = NULL;
-        if (info->port.blocked_open) {
-                spin_unlock_irqrestore(&card->card_lock, flags);
-                if (info->port.close_delay) {
-                        msleep_interruptible(jiffies_to_msecs
-                                                (info->port.close_delay));
-                }
-                wake_up_interruptible(&info->port.open_wait);
-                spin_lock_irqsave(&card->card_lock, flags);
-        }
-        info->port.flags &= ~(ASYNC_NORMAL_ACTIVE | ASYNC_CLOSING);
-        wake_up_interruptible(&info->port.close_wait);
-#ifdef CY_DEBUG_OTHER
-        printk(KERN_DEBUG "cyc:cy_close done\n");
-#endif
-        spin_unlock_irqrestore(&card->card_lock, flags);
+/*
+ * This routine is called when a particular tty device is closed.
+ */
+static void cy_close(struct tty_struct *tty, struct file *filp)
+{
+        struct cyclades_port *info = tty->driver_data;
+        if (!info || serial_paranoia_check(info, tty->name, "cy_close"))
+                return;
+        tty_port_close(&info->port, tty, filp);
 }                               /* cy_close */
 /* This routine gets called when tty_write has put something into
@@ -2871,18 +1947,13 @@ static int cy_write_room(struct tty_struct *tty)
 static int cy_chars_in_buffer(struct tty_struct *tty)
 {
-        struct cyclades_card *card;
        struct cyclades_port *info = tty->driver_data;
-        int channel;
        if (serial_paranoia_check(info, tty->name, "cy_chars_in_buffer"))
                return 0;
-        card = info->card;
-        channel = (info->line) - (card->first_line);
 #ifdef Z_EXT_CHARS_IN_BUFFER
-        if (!cy_is_Z(card)) {
+        if (!cy_is_Z(info->card)) {
 #endif                          /* Z_EXT_CHARS_IN_BUFFER */
 #ifdef CY_DEBUG_IO
                printk(KERN_DEBUG "cyc:cy_chars_in_buffer ttyC%d %d\n",
@@ -2891,20 +1962,11 @@ static int cy_chars_in_buffer(struct tty_struct *tty)
                return info->xmit_cnt;
 #ifdef Z_EXT_CHARS_IN_BUFFER
        } else {
-                static struct FIRM_ID *firm_id;
+                struct BUF_CTRL __iomem *buf_ctrl = info->u.cyz.buf_ctrl;
-                static struct ZFW_CTRL *zfw_ctrl;
-                static struct CH_CTRL *ch_ctrl;
-                static struct BUF_CTRL *buf_ctrl;
                int char_count;
                __u32 tx_put, tx_get, tx_bufsize;
                lock_kernel();
-                firm_id = card->base_addr + ID_ADDRESS;
-                zfw_ctrl = card->base_addr +
-                        (readl(&firm_id->zfwctrl_addr) & 0xfffff);
-                ch_ctrl = &(zfw_ctrl->ch_ctrl[channel]);
-                buf_ctrl = &(zfw_ctrl->buf_ctrl[channel]);
                tx_get = readl(&buf_ctrl->tx_get);
                tx_put = readl(&buf_ctrl->tx_put);
                tx_bufsize = readl(&buf_ctrl->tx_bufsize);
@@ -2957,48 +2019,44 @@ static void cyy_baud_calc(struct cyclades_port *info, __u32 baud)
 * This routine finds or computes the various line characteristics.
 * It used to be called config_setup
 */
-static void set_line_char(struct cyclades_port *info)
+static void cy_set_line_char(struct cyclades_port *info, struct tty_struct *tty)
 {
        struct cyclades_card *card;
        unsigned long flags;
-        void __iomem *base_addr;
+        int channel;
-        int chip, channel, index;
        unsigned cflag, iflag;
        int baud, baud_rate = 0;
        int i;
-        if (!info->port.tty || !info->port.tty->termios)
+        if (!tty->termios) /* XXX can this happen at all? */
                return;
        if (info->line == -1)
                return;
-        cflag = info->port.tty->termios->c_cflag;
+        cflag = tty->termios->c_cflag;
-        iflag = info->port.tty->termios->c_iflag;
+        iflag = tty->termios->c_iflag;
        /*
         * Set up the tty->alt_speed kludge
         */
-        if (info->port.tty) {
+        if ((info->port.flags & ASYNC_SPD_MASK) == ASYNC_SPD_HI)
-                if ((info->port.flags & ASYNC_SPD_MASK) == ASYNC_SPD_HI)
+                tty->alt_speed = 57600;
-                        info->port.tty->alt_speed = 57600;
+        if ((info->port.flags & ASYNC_SPD_MASK) == ASYNC_SPD_VHI)
-                if ((info->port.flags & ASYNC_SPD_MASK) == ASYNC_SPD_VHI)
+                tty->alt_speed = 115200;
-                        info->port.tty->alt_speed = 115200;
+        if ((info->port.flags & ASYNC_SPD_MASK) == ASYNC_SPD_SHI)
-                if ((info->port.flags & ASYNC_SPD_MASK) == ASYNC_SPD_SHI)
+                tty->alt_speed = 230400;
-                        info->port.tty->alt_speed = 230400;
+        if ((info->port.flags & ASYNC_SPD_MASK) == ASYNC_SPD_WARP)
-                if ((info->port.flags & ASYNC_SPD_MASK) == ASYNC_SPD_WARP)
+                tty->alt_speed = 460800;
-                        info->port.tty->alt_speed = 460800;
-        }
        card = info->card;
        channel = info->line - card->first_line;
        if (!cy_is_Z(card)) {
+                u32 cflags;
-                index = card->bus_index;
                /* baud rate */
-                baud = tty_get_baud_rate(info->port.tty);
+                baud = tty_get_baud_rate(tty);
                if (baud == 38400 && (info->port.flags & ASYNC_SPD_MASK) ==
                                ASYNC_SPD_CUST) {
                        if (info->custom_divisor)
@@ -3107,124 +2165,68 @@ static void set_line_char(struct cyclades_port *info)
            cable.  Contact Marcio Saito for details.
         ***********************************************/
-                chip = channel >> 2;
                channel &= 0x03;
-                base_addr = card->base_addr + (cy_chip_offset[chip] << index);
                spin_lock_irqsave(&card->card_lock, flags);
-                cy_writeb(base_addr + (CyCAR << index), (u_char) channel);
+                cyy_writeb(info, CyCAR, channel);
                /* tx and rx baud rate */
-                cy_writeb(base_addr + (CyTCOR << index), info->tco);
+                cyy_writeb(info, CyTCOR, info->tco);
-                cy_writeb(base_addr + (CyTBPR << index), info->tbpr);
+                cyy_writeb(info, CyTBPR, info->tbpr);
-                cy_writeb(base_addr + (CyRCOR << index), info->rco);
+                cyy_writeb(info, CyRCOR, info->rco);
-                cy_writeb(base_addr + (CyRBPR << index), info->rbpr);
+                cyy_writeb(info, CyRBPR, info->rbpr);
                /* set line characteristics  according configuration */
-                cy_writeb(base_addr + (CySCHR1 << index),
+                cyy_writeb(info, CySCHR1, START_CHAR(tty));
-                          START_CHAR(info->port.tty));
+                cyy_writeb(info, CySCHR2, STOP_CHAR(tty));
-                cy_writeb(base_addr + (CySCHR2 << index), STOP_CHAR(info->port.tty));
+                cyy_writeb(info, CyCOR1, info->cor1);
-                cy_writeb(base_addr + (CyCOR1 << index), info->cor1);
+                cyy_writeb(info, CyCOR2, info->cor2);
-                cy_writeb(base_addr + (CyCOR2 << index), info->cor2);
+                cyy_writeb(info, CyCOR3, info->cor3);
-                cy_writeb(base_addr + (CyCOR3 << index), info->cor3);
+                cyy_writeb(info, CyCOR4, info->cor4);
-                cy_writeb(base_addr + (CyCOR4 << index), info->cor4);
+                cyy_writeb(info, CyCOR5, info->cor5);
-                cy_writeb(base_addr + (CyCOR5 << index), info->cor5);
-                cyy_issue_cmd(base_addr, CyCOR_CHANGE | CyCOR1ch | CyCOR2ch |
+                cyy_issue_cmd(info, CyCOR_CHANGE | CyCOR1ch | CyCOR2ch |
-                                CyCOR3ch, index);
+                                CyCOR3ch);
                /* !!! Is this needed? */
-                cy_writeb(base_addr + (CyCAR << index), (u_char) channel);
+                cyy_writeb(info, CyCAR, channel);
-                cy_writeb(base_addr + (CyRTPR << index),
+                cyy_writeb(info, CyRTPR,
                        (info->default_timeout ? info->default_timeout : 0x02));
                /* 10ms rx timeout */
-                if (C_CLOCAL(info->port.tty)) {
+                cflags = CyCTS;
-                        /* without modem intr */
+                if (!C_CLOCAL(tty))
-                        cy_writeb(base_addr + (CySRER << index),
+                        cflags |= CyDSR | CyRI | CyDCD;
-                                readb(base_addr + (CySRER << index)) | CyMdmCh);
+                /* without modem intr */
-                        /* act on 1->0 modem transitions */
+                cyy_writeb(info, CySRER, cyy_readb(info, CySRER) | CyMdmCh);
-                        if ((cflag & CRTSCTS) && info->rflow) {
+                /* act on 1->0 modem transitions */
-                                cy_writeb(base_addr + (CyMCOR1 << index),
+                if ((cflag & CRTSCTS) && info->rflow)
-                                          (CyCTS | rflow_thr[i]));
+                        cyy_writeb(info, CyMCOR1, cflags | rflow_thr[i]);
-                        } else {
+                else
-                                cy_writeb(base_addr + (CyMCOR1 << index),
+                        cyy_writeb(info, CyMCOR1, cflags);
-                                          CyCTS);
+                /* act on 0->1 modem transitions */
-                        }
+                cyy_writeb(info, CyMCOR2, cflags);
-                        /* act on 0->1 modem transitions */
-                        cy_writeb(base_addr + (CyMCOR2 << index), CyCTS);
-                } else {
-                        /* without modem intr */
-                        cy_writeb(base_addr + (CySRER << index),
-                                  readb(base_addr +
-                                           (CySRER << index)) | CyMdmCh);
-                        /* act on 1->0 modem transitions */
-                        if ((cflag & CRTSCTS) && info->rflow) {
-                                cy_writeb(base_addr + (CyMCOR1 << index),
-                                          (CyDSR | CyCTS | CyRI | CyDCD |
-                                           rflow_thr[i]));
-                        } else {
-                                cy_writeb(base_addr + (CyMCOR1 << index),
-                                          CyDSR | CyCTS | CyRI | CyDCD);
-                        }
-                        /* act on 0->1 modem transitions */
-                        cy_writeb(base_addr + (CyMCOR2 << index),
-                                  CyDSR | CyCTS | CyRI | CyDCD);
-                }
-                if (i == 0) {   /* baud rate is zero, turn off line */
+                if (i == 0)     /* baud rate is zero, turn off line */
-                        if (info->rtsdtr_inv) {
+                        cyy_change_rts_dtr(info, 0, TIOCM_DTR);
-                                cy_writeb(base_addr + (CyMSVR1 << index),
+                else
-                                          ~CyRTS);
+                        cyy_change_rts_dtr(info, TIOCM_DTR, 0);
-                        } else {
-                                cy_writeb(base_addr + (CyMSVR2 << index),
-                                          ~CyDTR);
-                        }
-#ifdef CY_DEBUG_DTR
-                        printk(KERN_DEBUG "cyc:set_line_char dropping DTR\n");
-                        printk(KERN_DEBUG "     status: 0x%x, 0x%x\n",
-                                readb(base_addr + (CyMSVR1 << index)),
-                                readb(base_addr + (CyMSVR2 << index)));
-#endif
-                } else {
-                        if (info->rtsdtr_inv) {
-                                cy_writeb(base_addr + (CyMSVR1 << index),
-                                          CyRTS);
-                        } else {
-                                cy_writeb(base_addr + (CyMSVR2 << index),
-                                          CyDTR);
-                        }
-#ifdef CY_DEBUG_DTR
-                        printk(KERN_DEBUG "cyc:set_line_char raising DTR\n");
-                        printk(KERN_DEBUG "     status: 0x%x, 0x%x\n",
-                                readb(base_addr + (CyMSVR1 << index)),
-                                readb(base_addr + (CyMSVR2 << index)));
-#endif
-                }
-                if (info->port.tty)
+                clear_bit(TTY_IO_ERROR, &tty->flags);
-                        clear_bit(TTY_IO_ERROR, &info->port.tty->flags);
                spin_unlock_irqrestore(&card->card_lock, flags);
        } else {
-                struct FIRM_ID __iomem *firm_id;
+                struct CH_CTRL __iomem *ch_ctrl = info->u.cyz.ch_ctrl;
-                struct ZFW_CTRL __iomem *zfw_ctrl;
-                struct CH_CTRL __iomem *ch_ctrl;
                __u32 sw_flow;
                int retval;
-                firm_id = card->base_addr + ID_ADDRESS;
                if (!cyz_is_loaded(card))
                        return;
-                zfw_ctrl = card->base_addr +
-                        (readl(&firm_id->zfwctrl_addr) & 0xfffff);
-                ch_ctrl = &(zfw_ctrl->ch_ctrl[channel]);
                /* baud rate */
-                baud = tty_get_baud_rate(info->port.tty);
+                baud = tty_get_baud_rate(tty);
                if (baud == 38400 && (info->port.flags & ASYNC_SPD_MASK) ==
                                ASYNC_SPD_CUST) {
                        if (info->custom_divisor)
@@ -3335,45 +2337,38 @@ static void set_line_char(struct cyclades_port *info)
                                "was %x\n", info->line, retval);
                }
-                if (info->port.tty)
+                clear_bit(TTY_IO_ERROR, &tty->flags);
-                        clear_bit(TTY_IO_ERROR, &info->port.tty->flags);
        }
 }                               /* set_line_char */
-static int
+static int cy_get_serial_info(struct cyclades_port *info,
-get_serial_info(struct cyclades_port *info,
                struct serial_struct __user *retinfo)
 {
-        struct serial_struct tmp;
        struct cyclades_card *cinfo = info->card;
+        struct serial_struct tmp = {
-        if (!retinfo)
+                .type = info->type,
-                return -EFAULT;
+                .line = info->line,
-        memset(&tmp, 0, sizeof(tmp));
+                .port = (info->card - cy_card) * 0x100 + info->line -
-        tmp.type = info->type;
+                        cinfo->first_line,
-        tmp.line = info->line;
+                .irq = cinfo->irq,
-        tmp.port = (info->card - cy_card) * 0x100 + info->line -
+                .flags = info->port.flags,
-                cinfo->first_line;
+                .close_delay = info->port.close_delay,
-        tmp.irq = cinfo->irq;
+                .closing_wait = info->port.closing_wait,
-        tmp.flags = info->port.flags;
+                .baud_base = info->baud,
-        tmp.close_delay = info->port.close_delay;
+                .custom_divisor = info->custom_divisor,
-        tmp.closing_wait = info->port.closing_wait;
+                .hub6 = 0,              /*!!! */
-        tmp.baud_base = info->baud;
+        };
-        tmp.custom_divisor = info->custom_divisor;
-        tmp.hub6 = 0;           /*!!! */
        return copy_to_user(retinfo, &tmp, sizeof(*retinfo)) ? -EFAULT : 0;
-}                               /* get_serial_info */
+}
 static int
-set_serial_info(struct cyclades_port *info,
+cy_set_serial_info(struct cyclades_port *info, struct tty_struct *tty,
                struct serial_struct __user *new_info)
 {
        struct serial_struct new_serial;
-        struct cyclades_port old_info;
        if (copy_from_user(&new_serial, new_info, sizeof(new_serial)))
                return -EFAULT;
-        old_info = *info;
        if (!capable(CAP_SYS_ADMIN)) {
                if (new_serial.close_delay != info->port.close_delay ||
@@ -3403,10 +2398,10 @@ set_serial_info(struct cyclades_port *info,
 check_and_exit:
        if (info->port.flags & ASYNC_INITIALIZED) {
-                set_line_char(info);
+                cy_set_line_char(info, tty);
                return 0;
        } else {
-                return startup(info);
+                return cy_startup(info, tty);
        }
 }                               /* set_serial_info */
@@ -3422,24 +2417,14 @@ check_and_exit:
 */
 static int get_lsr_info(struct cyclades_port *info, unsigned int __user *value)
 {
-        struct cyclades_card *card;
+        struct cyclades_card *card = info->card;
-        int chip, channel, index;
-        unsigned char status;
        unsigned int result;
        unsigned long flags;
-        void __iomem *base_addr;
+        u8 status;
-        card = info->card;
-        channel = (info->line) - (card->first_line);
        if (!cy_is_Z(card)) {
-                chip = channel >> 2;
-                channel &= 0x03;
-                index = card->bus_index;
-                base_addr = card->base_addr + (cy_chip_offset[chip] << index);
                spin_lock_irqsave(&card->card_lock, flags);
-                status = readb(base_addr + (CySRER << index)) &
+                status = cyy_readb(info, CySRER) & (CyTxRdy | CyTxMpty);
-                                (CyTxRdy | CyTxMpty);
                spin_unlock_irqrestore(&card->card_lock, flags);
                result = (status ? 0 : TIOCSER_TEMT);
        } else {
@@ -3453,34 +2438,23 @@ static int cy_tiocmget(struct tty_struct *tty, struct file *file)
 {
        struct cyclades_port *info = tty->driver_data;
        struct cyclades_card *card;
-        int chip, channel, index;
+        int result;
-        void __iomem *base_addr;
-        unsigned long flags;
-        unsigned char status;
-        unsigned long lstatus;
-        unsigned int result;
-        struct FIRM_ID __iomem *firm_id;
-        struct ZFW_CTRL __iomem *zfw_ctrl;
-        struct BOARD_CTRL __iomem *board_ctrl;
-        struct CH_CTRL __iomem *ch_ctrl;
        if (serial_paranoia_check(info, tty->name, __func__))
                return -ENODEV;
-        lock_kernel();
        card = info->card;
-        channel = info->line - card->first_line;
+        lock_kernel();
        if (!cy_is_Z(card)) {
-                chip = channel >> 2;
+                unsigned long flags;
-                channel &= 0x03;
+                int channel = info->line - card->first_line;
-                index = card->bus_index;
+                u8 status;
-                base_addr = card->base_addr + (cy_chip_offset[chip] << index);
                spin_lock_irqsave(&card->card_lock, flags);
-                cy_writeb(base_addr + (CyCAR << index), (u_char) channel);
+                cyy_writeb(info, CyCAR, channel & 0x03);
-                status = readb(base_addr + (CyMSVR1 << index));
+                status = cyy_readb(info, CyMSVR1);
-                status |= readb(base_addr + (CyMSVR2 << index));
+                status |= cyy_readb(info, CyMSVR2);
                spin_unlock_irqrestore(&card->card_lock, flags);
                if (info->rtsdtr_inv) {
@@ -3495,27 +2469,22 @@ static int cy_tiocmget(struct tty_struct *tty, struct file *file)
                        ((status & CyDSR) ? TIOCM_DSR : 0) |
                        ((status & CyCTS) ? TIOCM_CTS : 0);
        } else {
-                base_addr = card->base_addr;
+                u32 lstatus;
-                firm_id = card->base_addr + ID_ADDRESS;
-                if (cyz_is_loaded(card)) {
+                if (!cyz_is_loaded(card)) {
-                        zfw_ctrl = card->base_addr +
+                        result = -ENODEV;
-                                (readl(&firm_id->zfwctrl_addr) & 0xfffff);
+                        goto end;
-                        board_ctrl = &zfw_ctrl->board_ctrl;
-                        ch_ctrl = zfw_ctrl->ch_ctrl;
-                        lstatus = readl(&ch_ctrl[channel].rs_status);
-                        result = ((lstatus & C_RS_RTS) ? TIOCM_RTS : 0) |
-                                ((lstatus & C_RS_DTR) ? TIOCM_DTR : 0) |
-                                ((lstatus & C_RS_DCD) ? TIOCM_CAR : 0) |
-                                ((lstatus & C_RS_RI) ? TIOCM_RNG : 0) |
-                                ((lstatus & C_RS_DSR) ? TIOCM_DSR : 0) |
-                                ((lstatus & C_RS_CTS) ? TIOCM_CTS : 0);
-                } else {
-                        result = 0;
-                        unlock_kernel();
-                        return -ENODEV;
                }
+                lstatus = readl(&info->u.cyz.ch_ctrl->rs_status);
+                result = ((lstatus & C_RS_RTS) ? TIOCM_RTS : 0) |
+                        ((lstatus & C_RS_DTR) ? TIOCM_DTR : 0) |
+                        ((lstatus & C_RS_DCD) ? TIOCM_CAR : 0) |
+                        ((lstatus & C_RS_RI) ? TIOCM_RNG : 0) |
+                        ((lstatus & C_RS_DSR) ? TIOCM_DSR : 0) |
+                        ((lstatus & C_RS_CTS) ? TIOCM_CTS : 0);
        }
+end:
        unlock_kernel();
        return result;
 }                               /* cy_tiomget */
@@ -3526,150 +2495,53 @@ cy_tiocmset(struct tty_struct *tty, struct file *file,
 {
        struct cyclades_port *info = tty->driver_data;
        struct cyclades_card *card;
-        int chip, channel, index;
-        void __iomem *base_addr;
        unsigned long flags;
-        struct FIRM_ID __iomem *firm_id;
-        struct ZFW_CTRL __iomem *zfw_ctrl;
-        struct BOARD_CTRL __iomem *board_ctrl;
-        struct CH_CTRL __iomem *ch_ctrl;
-        int retval;
        if (serial_paranoia_check(info, tty->name, __func__))
                return -ENODEV;
        card = info->card;
-        channel = (info->line) - (card->first_line);
        if (!cy_is_Z(card)) {
-                chip = channel >> 2;
+                spin_lock_irqsave(&card->card_lock, flags);
-                channel &= 0x03;
+                cyy_change_rts_dtr(info, set, clear);
-                index = card->bus_index;
+                spin_unlock_irqrestore(&card->card_lock, flags);
-                base_addr = card->base_addr + (cy_chip_offset[chip] << index);
+        } else {
+                struct CH_CTRL __iomem *ch_ctrl = info->u.cyz.ch_ctrl;
+                int retval, channel = info->line - card->first_line;
+                u32 rs;
-                if (set & TIOCM_RTS) {
+                if (!cyz_is_loaded(card))
-                        spin_lock_irqsave(&card->card_lock, flags);
+                        return -ENODEV;
-                        cy_writeb(base_addr + (CyCAR << index),
-                                  (u_char) channel);
+                spin_lock_irqsave(&card->card_lock, flags);
-                        if (info->rtsdtr_inv) {
+                rs = readl(&ch_ctrl->rs_control);
-                                cy_writeb(base_addr + (CyMSVR2 << index),
+                if (set & TIOCM_RTS)
-                                          CyDTR);
+                        rs |= C_RS_RTS;
-                        } else {
+                if (clear & TIOCM_RTS)
-                                cy_writeb(base_addr + (CyMSVR1 << index),
+                        rs &= ~C_RS_RTS;
-                                          CyRTS);
-                        }
-                        spin_unlock_irqrestore(&card->card_lock, flags);
-                }
-                if (clear & TIOCM_RTS) {
-                        spin_lock_irqsave(&card->card_lock, flags);
-                        cy_writeb(base_addr + (CyCAR << index),
-                                  (u_char) channel);
-                        if (info->rtsdtr_inv) {
-                                cy_writeb(base_addr + (CyMSVR2 << index),
-                                          ~CyDTR);
-                        } else {
-                                cy_writeb(base_addr + (CyMSVR1 << index),
-                                          ~CyRTS);
-                        }
-                        spin_unlock_irqrestore(&card->card_lock, flags);
-                }
                if (set & TIOCM_DTR) {
-                        spin_lock_irqsave(&card->card_lock, flags);
+                        rs |= C_RS_DTR;
-                        cy_writeb(base_addr + (CyCAR << index),
-                                  (u_char) channel);
-                        if (info->rtsdtr_inv) {
-                                cy_writeb(base_addr + (CyMSVR1 << index),
-                                          CyRTS);
-                        } else {
-                                cy_writeb(base_addr + (CyMSVR2 << index),
-                                          CyDTR);
-                        }
 #ifdef CY_DEBUG_DTR
-                        printk(KERN_DEBUG "cyc:set_modem_info raising DTR\n");
+                        printk(KERN_DEBUG "cyc:set_modem_info raising Z DTR\n");
-                        printk(KERN_DEBUG "     status: 0x%x, 0x%x\n",
-                                readb(base_addr + (CyMSVR1 << index)),
-                                readb(base_addr + (CyMSVR2 << index)));
 #endif
-                        spin_unlock_irqrestore(&card->card_lock, flags);
                }
                if (clear & TIOCM_DTR) {
-                        spin_lock_irqsave(&card->card_lock, flags);
+                        rs &= ~C_RS_DTR;
-                        cy_writeb(base_addr + (CyCAR << index),
-                                  (u_char) channel);
-                        if (info->rtsdtr_inv) {
-                                cy_writeb(base_addr + (CyMSVR1 << index),
-                                          ~CyRTS);
-                        } else {
-                                cy_writeb(base_addr + (CyMSVR2 << index),
-                                          ~CyDTR);
-                        }
 #ifdef CY_DEBUG_DTR
-                        printk(KERN_DEBUG "cyc:set_modem_info dropping DTR\n");
+                        printk(KERN_DEBUG "cyc:set_modem_info clearing "
-                        printk(KERN_DEBUG "     status: 0x%x, 0x%x\n",
+                                "Z DTR\n");
-                                readb(base_addr + (CyMSVR1 << index)),
-                                readb(base_addr + (CyMSVR2 << index)));
 #endif
-                        spin_unlock_irqrestore(&card->card_lock, flags);
                }
-        } else {
+                cy_writel(&ch_ctrl->rs_control, rs);
-                base_addr = card->base_addr;
-                firm_id = card->base_addr + ID_ADDRESS;
-                if (cyz_is_loaded(card)) {
-                        zfw_ctrl = card->base_addr +
-                                (readl(&firm_id->zfwctrl_addr) & 0xfffff);
-                        board_ctrl = &zfw_ctrl->board_ctrl;
-                        ch_ctrl = zfw_ctrl->ch_ctrl;
-                        if (set & TIOCM_RTS) {
-                                spin_lock_irqsave(&card->card_lock, flags);
-                                cy_writel(&ch_ctrl[channel].rs_control,
-                                        readl(&ch_ctrl[channel].rs_control) |
-                                        C_RS_RTS);
-                                spin_unlock_irqrestore(&card->card_lock, flags);
-                        }
-                        if (clear & TIOCM_RTS) {
-                                spin_lock_irqsave(&card->card_lock, flags);
-                                cy_writel(&ch_ctrl[channel].rs_control,
-                                        readl(&ch_ctrl[channel].rs_control) &
-                                        ~C_RS_RTS);
-                                spin_unlock_irqrestore(&card->card_lock, flags);
-                        }
-                        if (set & TIOCM_DTR) {
-                                spin_lock_irqsave(&card->card_lock, flags);
-                                cy_writel(&ch_ctrl[channel].rs_control,
-                                        readl(&ch_ctrl[channel].rs_control) |
-                                        C_RS_DTR);
-#ifdef CY_DEBUG_DTR
-                                printk(KERN_DEBUG "cyc:set_modem_info raising "
-                                        "Z DTR\n");
-#endif
-                                spin_unlock_irqrestore(&card->card_lock, flags);
-                        }
-                        if (clear & TIOCM_DTR) {
-                                spin_lock_irqsave(&card->card_lock, flags);
-                                cy_writel(&ch_ctrl[channel].rs_control,
-                                        readl(&ch_ctrl[channel].rs_control) &
-                                        ~C_RS_DTR);
-#ifdef CY_DEBUG_DTR
-                                printk(KERN_DEBUG "cyc:set_modem_info clearing "
-                                        "Z DTR\n");
-#endif
-                                spin_unlock_irqrestore(&card->card_lock, flags);
-                        }
-                } else {
-                        return -ENODEV;
-                }
-                spin_lock_irqsave(&card->card_lock, flags);
                retval = cyz_issue_cmd(card, channel, C_CM_IOCTLM, 0L);
+                spin_unlock_irqrestore(&card->card_lock, flags);
                if (retval != 0) {
                        printk(KERN_ERR "cyc:set_modem_info retval on ttyC%d "
                                "was %x\n", info->line, retval);
                }
-                spin_unlock_irqrestore(&card->card_lock, flags);
        }
        return 0;
-}                               /* cy_tiocmset */
+}
 /*
 * cy_break() --- routine which turns the break handling on or off
@@ -3734,41 +2606,18 @@ static int cy_break(struct tty_struct *tty, int break_state)
        return retval;
 }                               /* cy_break */
-static int get_mon_info(struct cyclades_port *info,
-                                struct cyclades_monitor __user *mon)
-{
-        if (copy_to_user(mon, &info->mon, sizeof(struct cyclades_monitor)))
-                return -EFAULT;
-        info->mon.int_count = 0;
-        info->mon.char_count = 0;
-        info->mon.char_max = 0;
-        info->mon.char_last = 0;
-        return 0;
-}                               /* get_mon_info */
 static int set_threshold(struct cyclades_port *info, unsigned long value)
 {
-        struct cyclades_card *card;
+        struct cyclades_card *card = info->card;
-        void __iomem *base_addr;
-        int channel, chip, index;
        unsigned long flags;
-        card = info->card;
-        channel = info->line - card->first_line;
        if (!cy_is_Z(card)) {
-                chip = channel >> 2;
-                channel &= 0x03;
-                index = card->bus_index;
-                base_addr =
-                    card->base_addr + (cy_chip_offset[chip] << index);
                info->cor3 &= ~CyREC_FIFO;
                info->cor3 |= value & CyREC_FIFO;
                spin_lock_irqsave(&card->card_lock, flags);
-                cy_writeb(base_addr + (CyCOR3 << index), info->cor3);
+                cyy_writeb(info, CyCOR3, info->cor3);
-                cyy_issue_cmd(base_addr, CyCOR_CHANGE | CyCOR3ch, index);
+                cyy_issue_cmd(info, CyCOR_CHANGE | CyCOR3ch);
                spin_unlock_irqrestore(&card->card_lock, flags);
        }
        return 0;
@@ -3777,55 +2626,23 @@ static int set_threshold(struct cyclades_port *info, unsigned long value)
 static int get_threshold(struct cyclades_port *info,
                                                unsigned long __user *value)
 {
-        struct cyclades_card *card;
+        struct cyclades_card *card = info->card;
-        void __iomem *base_addr;
-        int channel, chip, index;
-        unsigned long tmp;
-        card = info->card;
-        channel = info->line - card->first_line;
        if (!cy_is_Z(card)) {
-                chip = channel >> 2;
+                u8 tmp = cyy_readb(info, CyCOR3) & CyREC_FIFO;
-                channel &= 0x03;
-                index = card->bus_index;
-                base_addr = card->base_addr + (cy_chip_offset[chip] << index);
-                tmp = readb(base_addr + (CyCOR3 << index)) & CyREC_FIFO;
                return put_user(tmp, value);
        }
        return 0;
 }                               /* get_threshold */
-static int set_default_threshold(struct cyclades_port *info,
-                                                        unsigned long value)
-{
-        info->default_threshold = value & 0x0f;
-        return 0;
-}                               /* set_default_threshold */
-static int get_default_threshold(struct cyclades_port *info,
-                                                unsigned long __user *value)
-{
-        return put_user(info->default_threshold, value);
-}                               /* get_default_threshold */
 static int set_timeout(struct cyclades_port *info, unsigned long value)
 {
-        struct cyclades_card *card;
+        struct cyclades_card *card = info->card;
-        void __iomem *base_addr;
-        int channel, chip, index;
        unsigned long flags;
-        card = info->card;
-        channel = info->line - card->first_line;
        if (!cy_is_Z(card)) {
-                chip = channel >> 2;
-                channel &= 0x03;
-                index = card->bus_index;
-                base_addr = card->base_addr + (cy_chip_offset[chip] << index);
                spin_lock_irqsave(&card->card_lock, flags);
-                cy_writeb(base_addr + (CyRTPR << index), value & 0xff);
+                cyy_writeb(info, CyRTPR, value & 0xff);
                spin_unlock_irqrestore(&card->card_lock, flags);
        }
        return 0;
@@ -3834,36 +2651,35 @@ static int set_timeout(struct cyclades_port *info, unsigned long value)
 static int get_timeout(struct cyclades_port *info,
                                                unsigned long __user *value)
 {
-        struct cyclades_card *card;
+        struct cyclades_card *card = info->card;
-        void __iomem *base_addr;
-        int channel, chip, index;
-        unsigned long tmp;
-        card = info->card;
-        channel = info->line - card->first_line;
        if (!cy_is_Z(card)) {
-                chip = channel >> 2;
+                u8 tmp = cyy_readb(info, CyRTPR);
-                channel &= 0x03;
-                index = card->bus_index;
-                base_addr = card->base_addr + (cy_chip_offset[chip] << index);
-                tmp = readb(base_addr + (CyRTPR << index));
                return put_user(tmp, value);
        }
        return 0;
 }                               /* get_timeout */
-static int set_default_timeout(struct cyclades_port *info, unsigned long value)
+static int cy_cflags_changed(struct cyclades_port *info, unsigned long arg,
+                struct cyclades_icount *cprev)
 {
-        info->default_timeout = value & 0xff;
+        struct cyclades_icount cnow;
-        return 0;
+        unsigned long flags;
-}                               /* set_default_timeout */
+        int ret;
-static int get_default_timeout(struct cyclades_port *info,
+        spin_lock_irqsave(&info->card->card_lock, flags);
-                                        unsigned long __user *value)
+        cnow = info->icount;    /* atomic copy */
-{
+        spin_unlock_irqrestore(&info->card->card_lock, flags);
-        return put_user(info->default_timeout, value);
-}                               /* get_default_timeout */
+        ret =   ((arg & TIOCM_RNG) && (cnow.rng != cprev->rng)) ||
+                ((arg & TIOCM_DSR) && (cnow.dsr != cprev->dsr)) ||
+                ((arg & TIOCM_CD)  && (cnow.dcd != cprev->dcd)) ||
+                ((arg & TIOCM_CTS) && (cnow.cts != cprev->cts));
+        *cprev = cnow;
+        return ret;
+}
 /*
 * This routine allows the tty driver to implement device-
@@ -3875,8 +2691,7 @@ cy_ioctl(struct tty_struct *tty, struct file *file,
         unsigned int cmd, unsigned long arg)
 {
        struct cyclades_port *info = tty->driver_data;
-        struct cyclades_icount cprev, cnow;     /* kernel counter temps */
+        struct cyclades_icount cnow;    /* kernel counter temps */
-        struct serial_icounter_struct __user *p_cuser;  /* user space */
        int ret_val = 0;
        unsigned long flags;
        void __user *argp = (void __user *)arg;
@@ -3892,7 +2707,11 @@ cy_ioctl(struct tty_struct *tty, struct file *file,
        switch (cmd) {
        case CYGETMON:
-                ret_val = get_mon_info(info, argp);
+                if (copy_to_user(argp, &info->mon, sizeof(info->mon))) {
+                        ret_val = -EFAULT;
+                        break;
+                }
+                memset(&info->mon, 0, sizeof(info->mon));
                break;
        case CYGETTHRESH:
                ret_val = get_threshold(info, argp);
@@ -3901,10 +2720,11 @@ cy_ioctl(struct tty_struct *tty, struct file *file,
                ret_val = set_threshold(info, arg);
                break;
        case CYGETDEFTHRESH:
-                ret_val = get_default_threshold(info, argp);
+                ret_val = put_user(info->default_threshold,
+                                (unsigned long __user *)argp);
                break;
        case CYSETDEFTHRESH:
-                ret_val = set_default_threshold(info, arg);
+                info->default_threshold = arg & 0x0f;
                break;
        case CYGETTIMEOUT:
                ret_val = get_timeout(info, argp);
@@ -3913,21 +2733,20 @@ cy_ioctl(struct tty_struct *tty, struct file *file,
                ret_val = set_timeout(info, arg);
                break;
        case CYGETDEFTIMEOUT:
-                ret_val = get_default_timeout(info, argp);
+                ret_val = put_user(info->default_timeout,
+                                (unsigned long __user *)argp);
                break;
        case CYSETDEFTIMEOUT:
-                ret_val = set_default_timeout(info, arg);
+                info->default_timeout = arg & 0xff;
                break;
        case CYSETRFLOW:
                info->rflow = (int)arg;
-                ret_val = 0;
                break;
        case CYGETRFLOW:
                ret_val = info->rflow;
                break;
        case CYSETRTSDTR_INV:
                info->rtsdtr_inv = (int)arg;
-                ret_val = 0;
                break;
        case CYGETRTSDTR_INV:
                ret_val = info->rtsdtr_inv;
@@ -3938,7 +2757,6 @@ cy_ioctl(struct tty_struct *tty, struct file *file,
 #ifndef CONFIG_CYZ_INTR
        case CYZSETPOLLCYCLE:
                cyz_polling_cycle = (arg * HZ) / 1000;
-                ret_val = 0;
                break;
        case CYZGETPOLLCYCLE:
                ret_val = (cyz_polling_cycle * 1000) / HZ;
@@ -3946,16 +2764,15 @@ cy_ioctl(struct tty_struct *tty, struct file *file,
 #endif                          /* CONFIG_CYZ_INTR */
        case CYSETWAIT:
                info->port.closing_wait = (unsigned short)arg * HZ / 100;
-                ret_val = 0;
                break;
        case CYGETWAIT:
                ret_val = info->port.closing_wait / (HZ / 100);
                break;
        case TIOCGSERIAL:
-                ret_val = get_serial_info(info, argp);
+                ret_val = cy_get_serial_info(info, argp);
                break;
        case TIOCSSERIAL:
-                ret_val = set_serial_info(info, argp);
+                ret_val = cy_set_serial_info(info, tty, argp);
                break;
        case TIOCSERGETLSR:     /* Get line status register */
                ret_val = get_lsr_info(info, argp);
@@ -3971,17 +2788,8 @@ cy_ioctl(struct tty_struct *tty, struct file *file,
                /* note the counters on entry */
                cnow = info->icount;
                spin_unlock_irqrestore(&info->card->card_lock, flags);
-                ret_val = wait_event_interruptible(info->delta_msr_wait, ({
+                ret_val = wait_event_interruptible(info->port.delta_msr_wait,
-                        cprev = cnow;
+                                cy_cflags_changed(info, arg, &cnow));
-                        spin_lock_irqsave(&info->card->card_lock, flags);
-                        cnow = info->icount;    /* atomic copy */
-                        spin_unlock_irqrestore(&info->card->card_lock, flags);
-                        ((arg & TIOCM_RNG) && (cnow.rng != cprev.rng)) ||
-                        ((arg & TIOCM_DSR) && (cnow.dsr != cprev.dsr)) ||
-                        ((arg & TIOCM_CD)  && (cnow.dcd != cprev.dcd)) ||
-                        ((arg & TIOCM_CTS) && (cnow.cts != cprev.cts));
-                }));
                break;
                /*
@@ -3990,46 +2798,29 @@ cy_ioctl(struct tty_struct *tty, struct file *file,
                 * NB: both 1->0 and 0->1 transitions are counted except for
                 *     RI where only 0->1 is counted.
                 */
-        case TIOCGICOUNT:
+        case TIOCGICOUNT: {
+                struct serial_icounter_struct sic = { };
                spin_lock_irqsave(&info->card->card_lock, flags);
                cnow = info->icount;
                spin_unlock_irqrestore(&info->card->card_lock, flags);
-                p_cuser = argp;
-                ret_val = put_user(cnow.cts, &p_cuser->cts);
+                sic.cts = cnow.cts;
-                if (ret_val)
+                sic.dsr = cnow.dsr;
-                        break;
+                sic.rng = cnow.rng;
-                ret_val = put_user(cnow.dsr, &p_cuser->dsr);
+                sic.dcd = cnow.dcd;
-                if (ret_val)
+                sic.rx = cnow.rx;
-                        break;
+                sic.tx = cnow.tx;
-                ret_val = put_user(cnow.rng, &p_cuser->rng);
+                sic.frame = cnow.frame;
-                if (ret_val)
+                sic.overrun = cnow.overrun;
-                        break;
+                sic.parity = cnow.parity;
-                ret_val = put_user(cnow.dcd, &p_cuser->dcd);
+                sic.brk = cnow.brk;
-                if (ret_val)
+                sic.buf_overrun = cnow.buf_overrun;
-                        break;
-                ret_val = put_user(cnow.rx, &p_cuser->rx);
+                if (copy_to_user(argp, &sic, sizeof(sic)))
-                if (ret_val)
+                        ret_val = -EFAULT;
-                        break;
-                ret_val = put_user(cnow.tx, &p_cuser->tx);
-                if (ret_val)
-                        break;
-                ret_val = put_user(cnow.frame, &p_cuser->frame);
-                if (ret_val)
-                        break;
-                ret_val = put_user(cnow.overrun, &p_cuser->overrun);
-                if (ret_val)
-                        break;
-                ret_val = put_user(cnow.parity, &p_cuser->parity);
-                if (ret_val)
-                        break;
-                ret_val = put_user(cnow.brk, &p_cuser->brk);
-                if (ret_val)
-                        break;
-                ret_val = put_user(cnow.buf_overrun, &p_cuser->buf_overrun);
-                if (ret_val)
-                        break;
-                ret_val = 0;
                break;
+        }
        default:
                ret_val = -ENOIOCTLCMD;
        }
@@ -4055,7 +2846,7 @@ static void cy_set_termios(struct tty_struct *tty, struct ktermios *old_termios)
        printk(KERN_DEBUG "cyc:cy_set_termios ttyC%d\n", info->line);
 #endif
-        set_line_char(info);
+        cy_set_line_char(info, tty);
        if ((old_termios->c_cflag & CRTSCTS) &&
                        !(tty->termios->c_cflag & CRTSCTS)) {
@@ -4112,8 +2903,6 @@ static void cy_throttle(struct tty_struct *tty)
        struct cyclades_port *info = tty->driver_data;
        struct cyclades_card *card;
        unsigned long flags;
-        void __iomem *base_addr;
-        int chip, channel, index;
 #ifdef CY_DEBUG_THROTTLE
        char buf[64];
@@ -4135,24 +2924,9 @@ static void cy_throttle(struct tty_struct *tty)
        }
        if (tty->termios->c_cflag & CRTSCTS) {
-                channel = info->line - card->first_line;
                if (!cy_is_Z(card)) {
-                        chip = channel >> 2;
-                        channel &= 0x03;
-                        index = card->bus_index;
-                        base_addr = card->base_addr +
-                                (cy_chip_offset[chip] << index);
                        spin_lock_irqsave(&card->card_lock, flags);
-                        cy_writeb(base_addr + (CyCAR << index),
+                        cyy_change_rts_dtr(info, 0, TIOCM_RTS);
-                                  (u_char) channel);
-                        if (info->rtsdtr_inv) {
-                                cy_writeb(base_addr + (CyMSVR2 << index),
-                                          ~CyDTR);
-                        } else {
-                                cy_writeb(base_addr + (CyMSVR1 << index),
-                                          ~CyRTS);
-                        }
                        spin_unlock_irqrestore(&card->card_lock, flags);
                } else {
                        info->throttle = 1;
@@ -4170,8 +2944,6 @@ static void cy_unthrottle(struct tty_struct *tty)
        struct cyclades_port *info = tty->driver_data;
        struct cyclades_card *card;
        unsigned long flags;
-        void __iomem *base_addr;
-        int chip, channel, index;
 #ifdef CY_DEBUG_THROTTLE
        char buf[64];
@@ -4192,24 +2964,9 @@ static void cy_unthrottle(struct tty_struct *tty)
        if (tty->termios->c_cflag & CRTSCTS) {
                card = info->card;
-                channel = info->line - card->first_line;
                if (!cy_is_Z(card)) {
-                        chip = channel >> 2;
-                        channel &= 0x03;
-                        index = card->bus_index;
-                        base_addr = card->base_addr +
-                                (cy_chip_offset[chip] << index);
                        spin_lock_irqsave(&card->card_lock, flags);
-                        cy_writeb(base_addr + (CyCAR << index),
+                        cyy_change_rts_dtr(info, TIOCM_RTS, 0);
-                                  (u_char) channel);
-                        if (info->rtsdtr_inv) {
-                                cy_writeb(base_addr + (CyMSVR2 << index),
-                                          CyDTR);
-                        } else {
-                                cy_writeb(base_addr + (CyMSVR1 << index),
-                                          CyRTS);
-                        }
                        spin_unlock_irqrestore(&card->card_lock, flags);
                } else {
                        info->throttle = 0;
@@ -4224,8 +2981,7 @@ static void cy_stop(struct tty_struct *tty)
 {
        struct cyclades_card *cinfo;
        struct cyclades_port *info = tty->driver_data;
-        void __iomem *base_addr;
+        int channel;
-        int chip, channel, index;
        unsigned long flags;
 #ifdef CY_DEBUG_OTHER
@@ -4238,16 +2994,9 @@ static void cy_stop(struct tty_struct *tty)
        cinfo = info->card;
        channel = info->line - cinfo->first_line;
        if (!cy_is_Z(cinfo)) {
-                index = cinfo->bus_index;
-                chip = channel >> 2;
-                channel &= 0x03;
-                base_addr = cinfo->base_addr + (cy_chip_offset[chip] << index);
                spin_lock_irqsave(&cinfo->card_lock, flags);
-                cy_writeb(base_addr + (CyCAR << index),
+                cyy_writeb(info, CyCAR, channel & 0x03);
-                        (u_char)(channel & 0x0003)); /* index channel */
+                cyy_writeb(info, CySRER, cyy_readb(info, CySRER) & ~CyTxRdy);
-                cy_writeb(base_addr + (CySRER << index),
-                          readb(base_addr + (CySRER << index)) & ~CyTxRdy);
                spin_unlock_irqrestore(&cinfo->card_lock, flags);
        }
 }                               /* cy_stop */
@@ -4256,8 +3005,7 @@ static void cy_start(struct tty_struct *tty)
 {
        struct cyclades_card *cinfo;
        struct cyclades_port *info = tty->driver_data;
-        void __iomem *base_addr;
+        int channel;
-        int chip, channel, index;
        unsigned long flags;
 #ifdef CY_DEBUG_OTHER
@@ -4269,17 +3017,10 @@ static void cy_start(struct tty_struct *tty)
        cinfo = info->card;
        channel = info->line - cinfo->first_line;
-        index = cinfo->bus_index;
        if (!cy_is_Z(cinfo)) {
-                chip = channel >> 2;
-                channel &= 0x03;
-                base_addr = cinfo->base_addr + (cy_chip_offset[chip] << index);
                spin_lock_irqsave(&cinfo->card_lock, flags);
-                cy_writeb(base_addr + (CyCAR << index),
+                cyy_writeb(info, CyCAR, channel & 0x03);
-                        (u_char) (channel & 0x0003));   /* index channel */
+                cyy_writeb(info, CySRER, cyy_readb(info, CySRER) | CyTxRdy);
-                cy_writeb(base_addr + (CySRER << index),
-                          readb(base_addr + (CySRER << index)) | CyTxRdy);
                spin_unlock_irqrestore(&cinfo->card_lock, flags);
        }
 }                               /* cy_start */
@@ -4299,17 +3040,84 @@ static void cy_hangup(struct tty_struct *tty)
                return;
        cy_flush_buffer(tty);
-        shutdown(info);
+        cy_shutdown(info, tty);
-        info->port.count = 0;
+        tty_port_hangup(&info->port);
-#ifdef CY_DEBUG_COUNT
-        printk(KERN_DEBUG "cyc:cy_hangup (%d): setting count to 0\n",
-                current->pid);
-#endif
-        info->port.tty = NULL;
-        info->port.flags &= ~ASYNC_NORMAL_ACTIVE;
-        wake_up_interruptible(&info->port.open_wait);
 }                               /* cy_hangup */
+static int cyy_carrier_raised(struct tty_port *port)
+{
+        struct cyclades_port *info = container_of(port, struct cyclades_port,
+                        port);
+        struct cyclades_card *cinfo = info->card;
+        unsigned long flags;
+        int channel = info->line - cinfo->first_line;
+        u32 cd;
+        spin_lock_irqsave(&cinfo->card_lock, flags);
+        cyy_writeb(info, CyCAR, channel & 0x03);
+        cd = cyy_readb(info, CyMSVR1) & CyDCD;
+        spin_unlock_irqrestore(&cinfo->card_lock, flags);
+        return cd;
+}
+static void cyy_dtr_rts(struct tty_port *port, int raise)
+{
+        struct cyclades_port *info = container_of(port, struct cyclades_port,
+                        port);
+        struct cyclades_card *cinfo = info->card;
+        unsigned long flags;
+        spin_lock_irqsave(&cinfo->card_lock, flags);
+        cyy_change_rts_dtr(info, raise ? TIOCM_RTS | TIOCM_DTR : 0,
+                        raise ? 0 : TIOCM_RTS | TIOCM_DTR);
+        spin_unlock_irqrestore(&cinfo->card_lock, flags);
+}
+static int cyz_carrier_raised(struct tty_port *port)
+{
+        struct cyclades_port *info = container_of(port, struct cyclades_port,
+                        port);
+        return readl(&info->u.cyz.ch_ctrl->rs_status) & C_RS_DCD;
+}
+static void cyz_dtr_rts(struct tty_port *port, int raise)
+{
+        struct cyclades_port *info = container_of(port, struct cyclades_port,
+                        port);
+        struct cyclades_card *cinfo = info->card;
+        struct CH_CTRL __iomem *ch_ctrl = info->u.cyz.ch_ctrl;
+        int ret, channel = info->line - cinfo->first_line;
+        u32 rs;
+        rs = readl(&ch_ctrl->rs_control);
+        if (raise)
+                rs |= C_RS_RTS | C_RS_DTR;
+        else
+                rs &= ~(C_RS_RTS | C_RS_DTR);
+        cy_writel(&ch_ctrl->rs_control, rs);
+        ret = cyz_issue_cmd(cinfo, channel, C_CM_IOCTLM, 0L);
+        if (ret != 0)
+                printk(KERN_ERR "%s: retval on ttyC%d was %x\n",
+                                __func__, info->line, ret);
+#ifdef CY_DEBUG_DTR
+        printk(KERN_DEBUG "%s: raising Z DTR\n", __func__);
+#endif
+}
+static const struct tty_port_operations cyy_port_ops = {
+        .carrier_raised = cyy_carrier_raised,
+        .dtr_rts = cyy_dtr_rts,
+        .shutdown = cy_do_close,
+};
+static const struct tty_port_operations cyz_port_ops = {
+        .carrier_raised = cyz_carrier_raised,
+        .dtr_rts = cyz_dtr_rts,
+        .shutdown = cy_do_close,
+};
 /*
 * ---------------------------------------------------------------------
 * cy_init() and friends
@@ -4321,8 +3129,7 @@ static void cy_hangup(struct tty_struct *tty)
 static int __devinit cy_init_card(struct cyclades_card *cinfo)
 {
        struct cyclades_port *info;
-        unsigned int port;
+        unsigned int channel, port;
-        unsigned short chip_number;
        spin_lock_init(&cinfo->card_lock);
        cinfo->intr_enabled = 0;
@@ -4334,9 +3141,9 @@ static int __devinit cy_init_card(struct cyclades_card *cinfo)
                return -ENOMEM;
        }
-        for (port = cinfo->first_line; port < cinfo->first_line + cinfo->nports;
+        for (channel = 0, port = cinfo->first_line; channel < cinfo->nports;
-                        port++) {
+                        channel++, port++) {
-                info = &cinfo->ports[port - cinfo->first_line];
+                info = &cinfo->ports[channel];
                tty_port_init(&info->port);
                info->magic = CYCLADES_MAGIC;
                info->card = cinfo;
@@ -4346,10 +3153,19 @@ static int __devinit cy_init_card(struct cyclades_card *cinfo)
                info->port.close_delay = 5 * HZ / 10;
                info->port.flags = STD_COM_FLAGS;
                init_completion(&info->shutdown_wait);
-                init_waitqueue_head(&info->delta_msr_wait);
                if (cy_is_Z(cinfo)) {
+                        struct FIRM_ID *firm_id = cinfo->base_addr + ID_ADDRESS;
+                        struct ZFW_CTRL *zfw_ctrl;
+                        info->port.ops = &cyz_port_ops;
                        info->type = PORT_STARTECH;
+                        zfw_ctrl = cinfo->base_addr +
+                                (readl(&firm_id->zfwctrl_addr) & 0xfffff);
+                        info->u.cyz.ch_ctrl = &zfw_ctrl->ch_ctrl[channel];
+                        info->u.cyz.buf_ctrl = &zfw_ctrl->buf_ctrl[channel];
                        if (cinfo->hw_ver == ZO_V1)
                                info->xmit_fifo_size = CYZ_FIFO_SIZE;
                        else
@@ -4359,17 +3175,20 @@ static int __devinit cy_init_card(struct cyclades_card *cinfo)
                                cyz_rx_restart, (unsigned long)info);
 #endif
                } else {
+                        unsigned short chip_number;
                        int index = cinfo->bus_index;
+                        info->port.ops = &cyy_port_ops;
                        info->type = PORT_CIRRUS;
                        info->xmit_fifo_size = CyMAX_CHAR_FIFO;
                        info->cor1 = CyPARITY_NONE | Cy_1_STOP | Cy_8_BITS;
                        info->cor2 = CyETC;
                        info->cor3 = 0x08;      /* _very_ small rcv threshold */
-                        chip_number = (port - cinfo->first_line) / 4;
+                        chip_number = channel / CyPORTS_PER_CHIP;
-                        info->chip_rev = readb(cinfo->base_addr +
+                        info->u.cyy.base_addr = cinfo->base_addr +
-                                      (cy_chip_offset[chip_number] << index) +
+                                (cy_chip_offset[chip_number] << index);
-                                      (CyGFRCR << index));
+                        info->chip_rev = cyy_readb(info, CyGFRCR);
                        if (info->chip_rev >= CD1400_REV_J) {
                                /* It is a CD1400 rev. J or later */
@@ -5060,8 +3879,14 @@ static int __devinit cy_pci_probe(struct pci_dev *pdev,
                }
                cy_card[card_no].num_chips = nchan / CyPORTS_PER_CHIP;
        } else {
+                struct FIRM_ID __iomem *firm_id = addr2 + ID_ADDRESS;
+                struct ZFW_CTRL __iomem *zfw_ctrl;
+                zfw_ctrl = addr2 + (readl(&firm_id->zfwctrl_addr) & 0xfffff);
                cy_card[card_no].hw_ver = mailbox;
                cy_card[card_no].num_chips = (unsigned int)-1;
+                cy_card[card_no].board_ctrl = &zfw_ctrl->board_ctrl;
 #ifdef CONFIG_CYZ_INTR
                /* allocate IRQ only if board has an IRQ */
                if (irq != 0 && irq != 255) {
@@ -5191,18 +4016,30 @@ static int cyclades_proc_show(struct seq_file *m, void *v)
                for (j = 0; j < cy_card[i].nports; j++) {
                        info = &cy_card[i].ports[j];
-                        if (info->port.count)
+                        if (info->port.count) {
+                                /* XXX is the ldisc num worth this? */
+                                struct tty_struct *tty;
+                                struct tty_ldisc *ld;
+                                int num = 0;
+                                tty = tty_port_tty_get(&info->port);
+                                if (tty) {
+                                        ld = tty_ldisc_ref(tty);
+                                        if (ld) {
+                                                num = ld->ops->num;
+                                                tty_ldisc_deref(ld);
+                                        }
+                                        tty_kref_put(tty);
+                                }
                                seq_printf(m, "%3d %8lu %10lu %8lu "
-                                        "%10lu %8lu %9lu %6ld\n", info->line,
+                                        "%10lu %8lu %9lu %6d\n", info->line,
                                        (cur_jifs - info->idle_stats.in_use) /
                                        HZ, info->idle_stats.xmit_bytes,
                                        (cur_jifs - info->idle_stats.xmit_idle)/
                                        HZ, info->idle_stats.recv_bytes,
                                        (cur_jifs - info->idle_stats.recv_idle)/
                                        HZ, info->idle_stats.overruns,
-                                        /* FIXME: double check locking */
+                                        num);
-                                        (long)info->port.tty->ldisc->ops->num);
+                        } else
-                        else
                                seq_printf(m, "%3d %8lu %10lu %8lu "
                                        "%10lu %8lu %9lu %6ld\n",
                                        info->line, 0L, 0L, 0L, 0L, 0L, 0L, 0L);
diff --git a/drivers/char/esp.c b/drivers/char/esp.c
index a5c59fc2b0ff..b19d43cd9542 100644
--- a/drivers/char/esp.c
+++ b/drivers/char/esp.c
@@ -572,7 +572,7 @@ static void check_modem_status(struct esp_struct *info)
                        info->icount.dcd++;
                if (status & UART_MSR_DCTS)
                        info->icount.cts++;
-                wake_up_interruptible(&info->delta_msr_wait);
+                wake_up_interruptible(&info->port.delta_msr_wait);
        }
        if ((info->port.flags & ASYNC_CHECK_CD) && (status & UART_MSR_DDCD)) {
@@ -927,7 +927,7 @@ static void shutdown(struct esp_struct *info)
         * clear delta_msr_wait queue to avoid mem leaks: we may free the irq
         * here so the queue might never be waken up
         */
-        wake_up_interruptible(&info->delta_msr_wait);
+        wake_up_interruptible(&info->port.delta_msr_wait);
        wake_up_interruptible(&info->break_wait);
        /* stop a DMA transfer on the port being closed */
@@ -1800,7 +1800,7 @@ static int rs_ioctl(struct tty_struct *tty, struct file *file,
                spin_unlock_irqrestore(&info->lock, flags);
                while (1) {
                        /* FIXME: convert to new style wakeup */
-                        interruptible_sleep_on(&info->delta_msr_wait);
+                        interruptible_sleep_on(&info->port.delta_msr_wait);
                        /* see if a signal did it */
                        if (signal_pending(current))
                                return -ERESTARTSYS;
@@ -2452,7 +2452,6 @@ static int __init espserial_init(void)
                info->config.flow_off = flow_off;
                info->config.pio_threshold = pio_threshold;
                info->next_port = ports;
-                init_waitqueue_head(&info->delta_msr_wait);
                init_waitqueue_head(&info->break_wait);
                ports = info;
                printk(KERN_INFO "ttyP%d at 0x%04x (irq = %d) is an ESP ",
diff --git a/drivers/char/hw_random/core.c b/drivers/char/hw_random/core.c
index fc93e2fc7c71..1573aebd54b5 100644
--- a/drivers/char/hw_random/core.c
+++ b/drivers/char/hw_random/core.c
@@ -153,7 +153,7 @@ static const struct file_operations rng_chrdev_ops = {
 static struct miscdevice rng_miscdev = {
        .minor          = RNG_MISCDEV_MINOR,
        .name           = RNG_MODULE_NAME,
-        .devnode        = "hwrng",
+        .nodename       = "hwrng",
        .fops           = &rng_chrdev_ops,
 };
diff --git a/drivers/char/isicom.c b/drivers/char/isicom.c
index 4f1f4cd670da..426bfdd7f3e0 100644
--- a/drivers/char/isicom.c
+++ b/drivers/char/isicom.c
@@ -846,37 +846,53 @@ static int isicom_carrier_raised(struct tty_port *port)
        return (ip->status & ISI_DCD)?1 : 0;
 }
-static int isicom_open(struct tty_struct *tty, struct file *filp)
+static struct tty_port *isicom_find_port(struct tty_struct *tty)
 {
        struct isi_port *port;
        struct isi_board *card;
        unsigned int board;
-        int error, line;
+        int line = tty->index;
-        line = tty->index;
        if (line < 0 || line > PORT_COUNT-1)
-                return -ENODEV;
+                return NULL;
        board = BOARD(line);
        card = &isi_card[board];
        if (!(card->status & FIRMWARE_LOADED))
-                return -ENODEV;
+                return NULL;
        /*  open on a port greater than the port count for the card !!! */
        if (line > ((board * 16) + card->port_count - 1))
-                return -ENODEV;
+                return NULL;
        port = &isi_ports[line];
        if (isicom_paranoia_check(port, tty->name, "isicom_open"))
-                return -ENODEV;
+                return NULL;
+        return &port->port;
+}
+        
+static int isicom_open(struct tty_struct *tty, struct file *filp)
+{
+        struct isi_port *port;
+        struct isi_board *card;
+        struct tty_port *tport;
+        int error = 0;
+        tport = isicom_find_port(tty);
+        if (tport == NULL)
+                return -ENODEV;
+        port = container_of(tport, struct isi_port, port);
+        card = &isi_card[BOARD(tty->index)];
        isicom_setup_board(card);
        /* FIXME: locking on port.count etc */
        port->port.count++;
        tty->driver_data = port;
        tty_port_tty_set(&port->port, tty);
-        error = isicom_setup_port(tty);
+        /* FIXME: Locking on Initialized flag */
+        if (!test_bit(ASYNCB_INITIALIZED, &tport->flags))
+                error = isicom_setup_port(tty);
        if (error == 0)
                error = tty_port_block_til_ready(&port->port, tty, filp);
        return error;
@@ -952,19 +968,12 @@ static void isicom_flush_buffer(struct tty_struct *tty)
        tty_wakeup(tty);
 }
-static void isicom_close(struct tty_struct *tty, struct file *filp)
+static void isicom_close_port(struct tty_port *port)
 {
-        struct isi_port *ip = tty->driver_data;
+        struct isi_port *ip = container_of(port, struct isi_port, port);
-        struct tty_port *port = &ip->port;
+        struct isi_board *card = ip->card;
-        struct isi_board *card;
        unsigned long flags;
-        BUG_ON(!ip);
-        card = ip->card;
-        if (isicom_paranoia_check(ip, tty->name, "isicom_close"))
-                return;
        /* indicate to the card that no more data can be received
           on this port */
        spin_lock_irqsave(&card->card_lock, flags);
@@ -974,9 +983,19 @@ static void isicom_close(struct tty_struct *tty, struct file *filp)
        }
        isicom_shutdown_port(ip);
        spin_unlock_irqrestore(&card->card_lock, flags);
+}
+static void isicom_close(struct tty_struct *tty, struct file *filp)
+{
+        struct isi_port *ip = tty->driver_data;
+        struct tty_port *port = &ip->port;
+        if (isicom_paranoia_check(ip, tty->name, "isicom_close"))
+                return;
+        if (tty_port_close_start(port, tty, filp) == 0)
+                return;
+        isicom_close_port(port);
        isicom_flush_buffer(tty);
-        
        tty_port_close_end(port, tty);
 }
diff --git a/drivers/char/mem.c b/drivers/char/mem.c
index 0491cdf63f2a..0aede1d6a9ea 100644
--- a/drivers/char/mem.c
+++ b/drivers/char/mem.c
@@ -866,24 +866,25 @@ static const struct file_operations kmsg_fops = {
 static const struct memdev {
        const char *name;
+        mode_t mode;
        const struct file_operations *fops;
        struct backing_dev_info *dev_info;
 } devlist[] = {
-        [ 1] = { "mem", &mem_fops, &directly_mappable_cdev_bdi },
+         [1] = { "mem", 0, &mem_fops, &directly_mappable_cdev_bdi },
 #ifdef CONFIG_DEVKMEM
-        [ 2] = { "kmem", &kmem_fops, &directly_mappable_cdev_bdi },
+         [2] = { "kmem", 0, &kmem_fops, &directly_mappable_cdev_bdi },
 #endif
-        [ 3] = {"null", &null_fops, NULL },
+         [3] = { "null", 0666, &null_fops, NULL },
 #ifdef CONFIG_DEVPORT
-        [ 4] = { "port", &port_fops, NULL },
+         [4] = { "port", 0, &port_fops, NULL },
 #endif
-        [ 5] = { "zero", &zero_fops, &zero_bdi },
+         [5] = { "zero", 0666, &zero_fops, &zero_bdi },
-        [ 7] = { "full", &full_fops, NULL },
+         [7] = { "full", 0666, &full_fops, NULL },
-        [ 8] = { "random", &random_fops, NULL },
+         [8] = { "random", 0666, &random_fops, NULL },
-        [ 9] = { "urandom", &urandom_fops, NULL },
+         [9] = { "urandom", 0666, &urandom_fops, NULL },
-        [11] = { "kmsg", &kmsg_fops, NULL },
+        [11] = { "kmsg", 0, &kmsg_fops, NULL },
 #ifdef CONFIG_CRASH_DUMP
-        [12] = { "oldmem", &oldmem_fops, NULL },
+        [12] = { "oldmem", 0, &oldmem_fops, NULL },
 #endif
 };
@@ -920,6 +921,13 @@ static const struct file_operations memory_fops = {
        .open           = memory_open,
 };
+static char *mem_devnode(struct device *dev, mode_t *mode)
+{
+        if (mode && devlist[MINOR(dev->devt)].mode)
+                *mode = devlist[MINOR(dev->devt)].mode;
+        return NULL;
+}
 static struct class *mem_class;
 static int __init chr_dev_init(void)
@@ -935,6 +943,7 @@ static int __init chr_dev_init(void)
                printk("unable to get major %d for memory devs\n", MEM_MAJOR);
        mem_class = class_create(THIS_MODULE, "mem");
+        mem_class->devnode = mem_devnode;
        for (minor = 1; minor < ARRAY_SIZE(devlist); minor++) {
                if (!devlist[minor].name)
                        continue;
diff --git a/drivers/char/misc.c b/drivers/char/misc.c
index 62c99fa59e2b..1ee27cc23426 100644
--- a/drivers/char/misc.c
+++ b/drivers/char/misc.c
@@ -263,12 +263,14 @@ int misc_deregister(struct miscdevice *misc)
 EXPORT_SYMBOL(misc_register);
 EXPORT_SYMBOL(misc_deregister);
-static char *misc_nodename(struct device *dev)
+static char *misc_devnode(struct device *dev, mode_t *mode)
 {
        struct miscdevice *c = dev_get_drvdata(dev);
-        if (c->devnode)
+        if (mode && c->mode)
-                return kstrdup(c->devnode, GFP_KERNEL);
+                *mode = c->mode;
+        if (c->nodename)
+                return kstrdup(c->nodename, GFP_KERNEL);
        return NULL;
 }
@@ -287,7 +289,7 @@ static int __init misc_init(void)
        err = -EIO;
        if (register_chrdev(MISC_MAJOR,"misc",&misc_fops))
                goto fail_printk;
-        misc_class->nodename = misc_nodename;
+        misc_class->devnode = misc_devnode;
        return 0;
 fail_printk:
diff --git a/drivers/char/mxser.c b/drivers/char/mxser.c
index dbf8d52f31d0..5e28d39b9e81 100644
--- a/drivers/char/mxser.c
+++ b/drivers/char/mxser.c
@@ -48,7 +48,7 @@
 #include "mxser.h"
-#define MXSER_VERSION   "2.0.4"         /* 1.12 */
+#define MXSER_VERSION   "2.0.5"         /* 1.14 */
 #define MXSERMAJOR       174
 #define MXSER_BOARDS            4       /* Max. boards */
@@ -69,6 +69,7 @@
 #define PCI_DEVICE_ID_POS104UL  0x1044
 #define PCI_DEVICE_ID_CB108     0x1080
 #define PCI_DEVICE_ID_CP102UF   0x1023
+#define PCI_DEVICE_ID_CP112UL   0x1120
 #define PCI_DEVICE_ID_CB114     0x1142
 #define PCI_DEVICE_ID_CP114UL   0x1143
 #define PCI_DEVICE_ID_CB134I    0x1341
@@ -139,7 +140,8 @@ static const struct mxser_cardinfo mxser_cards[] = {
        { "CP-138U series",     8, },
        { "POS-104UL series",   4, },
        { "CP-114UL series",    4, },
-/*30*/  { "CP-102UF series",    2, }
+/*30*/  { "CP-102UF series",    2, },
+        { "CP-112UL series",    2, },
 };
 /* driver_data correspond to the lines in the structure above
@@ -170,6 +172,7 @@ static struct pci_device_id mxser_pcibrds[] = {
        { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_POS104UL),    .driver_data = 28 },
        { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP114UL),     .driver_data = 29 },
        { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP102UF),     .driver_data = 30 },
+        { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP112UL),     .driver_data = 31 },
        { }
 };
 MODULE_DEVICE_TABLE(pci, mxser_pcibrds);
@@ -258,7 +261,6 @@ struct mxser_port {
        struct mxser_mon mon_data;
        spinlock_t slock;
-        wait_queue_head_t delta_msr_wait;
 };
 struct mxser_board {
@@ -818,7 +820,7 @@ static void mxser_check_modem_status(struct tty_struct *tty,
        if (status & UART_MSR_DCTS)
                port->icount.cts++;
        port->mon_data.modem_status = status;
-        wake_up_interruptible(&port->delta_msr_wait);
+        wake_up_interruptible(&port->port.delta_msr_wait);
        if ((port->port.flags & ASYNC_CHECK_CD) && (status & UART_MSR_DDCD)) {
                if (status & UART_MSR_DCD)
@@ -973,7 +975,7 @@ static void mxser_shutdown(struct tty_struct *tty)
         * clear delta_msr_wait queue to avoid mem leaks: we may free the irq
         * here so the queue might never be waken up
         */
-        wake_up_interruptible(&info->delta_msr_wait);
+        wake_up_interruptible(&info->port.delta_msr_wait);
        /*
         * Free the IRQ, if necessary
@@ -1073,34 +1075,17 @@ static void mxser_flush_buffer(struct tty_struct *tty)
 }
-/*
+static void mxser_close_port(struct tty_struct *tty, struct tty_port *port)
- * This routine is called when the serial port gets closed.  First, we
- * wait for the last remaining data to be sent.  Then, we unlink its
- * async structure from the interrupt chain if necessary, and we free
- * that IRQ if nothing is left in the chain.
- */
-static void mxser_close(struct tty_struct *tty, struct file *filp)
 {
-        struct mxser_port *info = tty->driver_data;
+        struct mxser_port *info = container_of(port, struct mxser_port, port);
-        struct tty_port *port = &info->port;
        unsigned long timeout;
-        if (tty->index == MXSER_PORTS)
-                return;
-        if (!info)
-                return;
-        if (tty_port_close_start(port, tty, filp) == 0)
-                return;
        /*
         * Save the termios structure, since this port may have
         * separate termios for callout and dialin.
         *
         * FIXME: Can this go ?
         */
-        if (info->port.flags & ASYNC_NORMAL_ACTIVE)
+        if (port->flags & ASYNC_NORMAL_ACTIVE)
                info->normal_termios = *tty->termios;
        /*
         * At this point we stop accepting input.  To do this, we
@@ -1112,7 +1097,7 @@ static void mxser_close(struct tty_struct *tty, struct file *filp)
        if (info->board->chip_flag)
                info->IER &= ~MOXA_MUST_RECV_ISR;
-        if (info->port.flags & ASYNC_INITIALIZED) {
+        if (port->flags & ASYNC_INITIALIZED) {
                outb(info->IER, info->ioaddr + UART_IER);
                /*
                 * Before we drop DTR, make sure the UART transmitter
@@ -1127,8 +1112,26 @@ static void mxser_close(struct tty_struct *tty, struct file *filp)
                }
        }
        mxser_shutdown(tty);
-        mxser_flush_buffer(tty);
+}
+/*
+ * This routine is called when the serial port gets closed.  First, we
+ * wait for the last remaining data to be sent.  Then, we unlink its
+ * async structure from the interrupt chain if necessary, and we free
+ * that IRQ if nothing is left in the chain.
+ */
+static void mxser_close(struct tty_struct *tty, struct file *filp)
+{
+        struct mxser_port *info = tty->driver_data;
+        struct tty_port *port = &info->port;
+        if (tty->index == MXSER_PORTS)
+                return;
+        if (tty_port_close_start(port, tty, filp) == 0)
+                return;
+        mxser_close_port(tty, port);
+        mxser_flush_buffer(tty);
        /* Right now the tty_port set is done outside of the close_end helper
           as we don't yet have everyone using refcounts */     
        tty_port_close_end(port, tty);
@@ -1761,7 +1764,7 @@ static int mxser_ioctl(struct tty_struct *tty, struct file *file,
                cnow = info->icount;    /* note the counters on entry */
                spin_unlock_irqrestore(&info->slock, flags);
-                return wait_event_interruptible(info->delta_msr_wait,
+                return wait_event_interruptible(info->port.delta_msr_wait,
                                mxser_cflags_changed(info, arg, &cnow));
        /*
         * Get counter of input serial line interrupts (DCD,RI,DSR,CTS)
@@ -1803,7 +1806,7 @@ static int mxser_ioctl(struct tty_struct *tty, struct file *file,
                lock_kernel();
                len = mxser_chars_in_buffer(tty);
-                lsr = inb(info->ioaddr + UART_LSR) & UART_LSR_TEMT;
+                lsr = inb(info->ioaddr + UART_LSR) & UART_LSR_THRE;
                len += (lsr ? 0 : 1);
                unlock_kernel();
@@ -2413,7 +2416,6 @@ static int __devinit mxser_initbrd(struct mxser_board *brd,
                info->port.close_delay = 5 * HZ / 10;
                info->port.closing_wait = 30 * HZ;
                info->normal_termios = mxvar_sdriver->init_termios;
-                init_waitqueue_head(&info->delta_msr_wait);
                memset(&info->mon_data, 0, sizeof(struct mxser_mon));
                info->err_shadow = 0;
                spin_lock_init(&info->slock);
diff --git a/drivers/char/n_tty.c b/drivers/char/n_tty.c
index 4e28b35024ec..2e50f4dfc79c 100644
--- a/drivers/char/n_tty.c
+++ b/drivers/char/n_tty.c
@@ -272,7 +272,8 @@ static inline int is_continuation(unsigned char c, struct tty_struct *tty)
 *
 *      This is a helper function that handles one output character
 *      (including special characters like TAB, CR, LF, etc.),
- *      putting the results in the tty driver's write buffer.
+ *      doing OPOST processing and putting the results in the
+ *      tty driver's write buffer.
 *
 *      Note that Linux currently ignores TABDLY, CRDLY, VTDLY, FFDLY
 *      and NLDLY.  They simply aren't relevant in the world today.
@@ -350,8 +351,9 @@ static int do_output_char(unsigned char c, struct tty_struct *tty, int space)
 *      @c: character (or partial unicode symbol)
 *      @tty: terminal device
 *
- *      Perform OPOST processing.  Returns -1 when the output device is
+ *      Output one character with OPOST processing.
- *      full and the character must be retried.
+ *      Returns -1 when the output device is full and the character
+ *      must be retried.
 *
 *      Locking: output_lock to protect column state and space left
 *               (also, this is called from n_tty_write under the
@@ -377,8 +379,11 @@ static int process_output(unsigned char c, struct tty_struct *tty)
 /**
 *      process_output_block            -       block post processor
 *      @tty: terminal device
- *      @inbuf: user buffer
+ *      @buf: character buffer
- *      @nr: number of bytes
+ *      @nr: number of bytes to output
+ *
+ *      Output a block of characters with OPOST processing.
+ *      Returns the number of characters output.
 *
 *      This path is used to speed up block console writes, among other
 *      things when processing blocks of output data. It handles only
@@ -571,33 +576,23 @@ static void process_echoes(struct tty_struct *tty)
                                break;
                        default:
-                                if (iscntrl(op)) {
-                                        if (L_ECHOCTL(tty)) {
-                                                /*
-                                                 * Ensure there is enough space
-                                                 * for the whole ctrl pair.
-                                                 */
-                                                if (space < 2) {
-                                                        no_space_left = 1;
-                                                        break;
-                                                }
-                                                tty_put_char(tty, '^');
-                                                tty_put_char(tty, op ^ 0100);
-                                                tty->column += 2;
-                                                space -= 2;
-                                        } else {
-                                                if (!space) {
-                                                        no_space_left = 1;
-                                                        break;
-                                                }
-                                                tty_put_char(tty, op);
-                                                space--;
-                                        }
-                                }
                                /*
-                                 * If above falls through, this was an
+                                 * If the op is not a special byte code,
-                                 * undefined op.
+                                 * it is a ctrl char tagged to be echoed
+                                 * as "^X" (where X is the letter
+                                 * representing the control char).
+                                 * Note that we must ensure there is
+                                 * enough space for the whole ctrl pair.
+                                 *
                                 */
+                                if (space < 2) {
+                                        no_space_left = 1;
+                                        break;
+                                }
+                                tty_put_char(tty, '^');
+                                tty_put_char(tty, op ^ 0100);
+                                tty->column += 2;
+                                space -= 2;
                                cp += 2;
                                nr -= 2;
                        }
@@ -605,12 +600,18 @@ static void process_echoes(struct tty_struct *tty)
                        if (no_space_left)
                                break;
                } else {
-                        int retval;
+                        if (O_OPOST(tty) &&
+                            !(test_bit(TTY_HW_COOK_OUT, &tty->flags))) {
-                        retval = do_output_char(c, tty, space);
+                                int retval = do_output_char(c, tty, space);
-                        if (retval < 0)
+                                if (retval < 0)
-                                break;
+                                        break;
-                        space -= retval;
+                                space -= retval;
+                        } else {
+                                if (!space)
+                                        break;
+                                tty_put_char(tty, c);
+                                space -= 1;
+                        }
                        cp += 1;
                        nr -= 1;
                }
@@ -798,8 +799,8 @@ static void echo_char_raw(unsigned char c, struct tty_struct *tty)
 *      Echo user input back onto the screen. This must be called only when
 *      L_ECHO(tty) is true. Called from the driver receive_buf path.
 *
- *      This variant tags control characters to be possibly echoed as
+ *      This variant tags control characters to be echoed as "^X"
- *      as "^X" (where X is the letter representing the control char).
+ *      (where X is the letter representing the control char).
 *
 *      Locking: echo_lock to protect the echo buffer
 */
@@ -812,7 +813,7 @@ static void echo_char(unsigned char c, struct tty_struct *tty)
                add_echo_byte(ECHO_OP_START, tty);
                add_echo_byte(ECHO_OP_START, tty);
        } else {
-                if (iscntrl(c) && c != '\t')
+                if (L_ECHOCTL(tty) && iscntrl(c) && c != '\t')
                        add_echo_byte(ECHO_OP_START, tty);
                add_echo_byte(c, tty);
        }
diff --git a/drivers/char/raw.c b/drivers/char/raw.c
index 40268db02e22..64acd05f71c8 100644
--- a/drivers/char/raw.c
+++ b/drivers/char/raw.c
@@ -261,7 +261,7 @@ static const struct file_operations raw_ctl_fops = {
 static struct cdev raw_cdev;
-static char *raw_nodename(struct device *dev)
+static char *raw_devnode(struct device *dev, mode_t *mode)
 {
        return kasprintf(GFP_KERNEL, "raw/%s", dev_name(dev));
 }
@@ -289,7 +289,7 @@ static int __init raw_init(void)
                ret = PTR_ERR(raw_class);
                goto error_region;
        }
-        raw_class->nodename = raw_nodename;
+        raw_class->devnode = raw_devnode;
        device_create(raw_class, NULL, MKDEV(RAW_MAJOR, 0), NULL, "rawctl");
        return 0;
diff --git a/drivers/char/riscom8.c b/drivers/char/riscom8.c
index 171711acf5cd..3cfa22d469e0 100644
--- a/drivers/char/riscom8.c
+++ b/drivers/char/riscom8.c
@@ -343,7 +343,7 @@ static void rc_receive_exc(struct riscom_board const *bp)
        if (port == NULL)
                return;
-        tty = port->port.tty;
+        tty = tty_port_tty_get(&port->port);
 #ifdef RC_REPORT_OVERRUN
        status = rc_in(bp, CD180_RCSR);
@@ -355,18 +355,18 @@ static void rc_receive_exc(struct riscom_board const *bp)
 #endif
        ch = rc_in(bp, CD180_RDR);
        if (!status)
-                return;
+                goto out;
        if (status & RCSR_TOUT)  {
                printk(KERN_WARNING "rc%d: port %d: Receiver timeout. "
                                    "Hardware problems ?\n",
                       board_No(bp), port_No(port));
-                return;
+                goto out;
        } else if (status & RCSR_BREAK)  {
                printk(KERN_INFO "rc%d: port %d: Handling break...\n",
                       board_No(bp), port_No(port));
                flag = TTY_BREAK;
-                if (port->port.flags & ASYNC_SAK)
+                if (tty && (port->port.flags & ASYNC_SAK))
                        do_SAK(tty);
        } else if (status & RCSR_PE)
@@ -380,8 +380,12 @@ static void rc_receive_exc(struct riscom_board const *bp)
        else
                flag = TTY_NORMAL;
-        tty_insert_flip_char(tty, ch, flag);
+        if (tty) {
-        tty_flip_buffer_push(tty);
+                tty_insert_flip_char(tty, ch, flag);
+                tty_flip_buffer_push(tty);
+        }
+out:
+        tty_kref_put(tty);
 }
 static void rc_receive(struct riscom_board const *bp)
@@ -394,7 +398,7 @@ static void rc_receive(struct riscom_board const *bp)
        if (port == NULL)
                return;
-        tty = port->port.tty;
+        tty = tty_port_tty_get(&port->port);
        count = rc_in(bp, CD180_RDCR);
@@ -403,15 +407,14 @@ static void rc_receive(struct riscom_board const *bp)
 #endif
        while (count--)  {
-                if (tty_buffer_request_room(tty, 1) == 0)  {
+                u8 ch = rc_in(bp, CD180_RDR);
-                        printk(KERN_WARNING "rc%d: port %d: Working around "
+                if (tty)
-                                            "flip buffer overflow.\n",
+                        tty_insert_flip_char(tty, ch, TTY_NORMAL);
-                               board_No(bp), port_No(port));
+        }
-                        break;
+        if (tty) {
-                }
+                tty_flip_buffer_push(tty);
-                tty_insert_flip_char(tty, rc_in(bp, CD180_RDR), TTY_NORMAL);
+                tty_kref_put(tty);
        }
-        tty_flip_buffer_push(tty);
 }
 static void rc_transmit(struct riscom_board const *bp)
@@ -424,22 +427,22 @@ static void rc_transmit(struct riscom_board const *bp)
        if (port == NULL)
                return;
-        tty = port->port.tty;
+        tty = tty_port_tty_get(&port->port);
        if (port->IER & IER_TXEMPTY) {
                /* FIFO drained */
                rc_out(bp, CD180_CAR, port_No(port));
                port->IER &= ~IER_TXEMPTY;
                rc_out(bp, CD180_IER, port->IER);
-                return;
+                goto out;
        }
        if ((port->xmit_cnt <= 0 && !port->break_length)
-            || tty->stopped || tty->hw_stopped)  {
+            || (tty && (tty->stopped || tty->hw_stopped)))  {
                rc_out(bp, CD180_CAR, port_No(port));
                port->IER &= ~IER_TXRDY;
                rc_out(bp, CD180_IER, port->IER);
-                return;
+                goto out;
        }
        if (port->break_length)  {
@@ -464,7 +467,7 @@ static void rc_transmit(struct riscom_board const *bp)
                        rc_out(bp, CD180_CCR, CCR_CORCHG2);
                        port->break_length = 0;
                }
-                return;
+                goto out;
        }
        count = CD180_NFIFO;
@@ -480,8 +483,10 @@ static void rc_transmit(struct riscom_board const *bp)
                port->IER &= ~IER_TXRDY;
                rc_out(bp, CD180_IER, port->IER);
        }
-        if (port->xmit_cnt <= port->wakeup_chars)
+        if (tty && port->xmit_cnt <= port->wakeup_chars)
                tty_wakeup(tty);
+out:
+        tty_kref_put(tty);
 }
 static void rc_check_modem(struct riscom_board const *bp)
@@ -494,37 +499,43 @@ static void rc_check_modem(struct riscom_board const *bp)
        if (port == NULL)
                return;
-        tty = port->port.tty;
+        tty = tty_port_tty_get(&port->port);
        mcr = rc_in(bp, CD180_MCR);
        if (mcr & MCR_CDCHG) {
                if (rc_in(bp, CD180_MSVR) & MSVR_CD)
                        wake_up_interruptible(&port->port.open_wait);
-                else
+                else if (tty)
                        tty_hangup(tty);
        }
 #ifdef RISCOM_BRAIN_DAMAGED_CTS
        if (mcr & MCR_CTSCHG)  {
                if (rc_in(bp, CD180_MSVR) & MSVR_CTS)  {
-                        tty->hw_stopped = 0;
                        port->IER |= IER_TXRDY;
-                        if (port->xmit_cnt <= port->wakeup_chars)
+                        if (tty) {
-                                tty_wakeup(tty);
+                                tty->hw_stopped = 0;
+                                if (port->xmit_cnt <= port->wakeup_chars)
+                                        tty_wakeup(tty);
+                        }
                } else  {
-                        tty->hw_stopped = 1;
+                        if (tty)
+                                tty->hw_stopped = 1;
                        port->IER &= ~IER_TXRDY;
                }
                rc_out(bp, CD180_IER, port->IER);
        }
        if (mcr & MCR_DSRCHG)  {
                if (rc_in(bp, CD180_MSVR) & MSVR_DSR)  {
-                        tty->hw_stopped = 0;
                        port->IER |= IER_TXRDY;
-                        if (port->xmit_cnt <= port->wakeup_chars)
+                        if (tty) {
-                                tty_wakeup(tty);
+                                tty->hw_stopped = 0;
+                                if (port->xmit_cnt <= port->wakeup_chars)
+                                        tty_wakeup(tty);
+                        }
                } else  {
-                        tty->hw_stopped = 1;
+                        if (tty)
+                                tty->hw_stopped = 1;
                        port->IER &= ~IER_TXRDY;
                }
                rc_out(bp, CD180_IER, port->IER);
@@ -533,6 +544,7 @@ static void rc_check_modem(struct riscom_board const *bp)
        /* Clear change bits */
        rc_out(bp, CD180_MCR, 0);
+        tty_kref_put(tty);
 }
 /* The main interrupt processing routine */
@@ -632,9 +644,9 @@ static void rc_shutdown_board(struct riscom_board *bp)
 * Setting up port characteristics.
 * Must be called with disabled interrupts
 */
-static void rc_change_speed(struct riscom_board *bp, struct riscom_port *port)
+static void rc_change_speed(struct tty_struct *tty, struct riscom_board *bp,
+                                                struct riscom_port *port)
 {
-        struct tty_struct *tty = port->port.tty;
        unsigned long baud;
        long tmp;
        unsigned char cor1 = 0, cor3 = 0;
@@ -781,7 +793,8 @@ static void rc_change_speed(struct riscom_board *bp, struct riscom_port *port)
 }
 /* Must be called with interrupts enabled */
-static int rc_setup_port(struct riscom_board *bp, struct riscom_port *port)
+static int rc_setup_port(struct tty_struct *tty, struct riscom_board *bp,
+                                                struct riscom_port *port)
 {
        unsigned long flags;
@@ -793,11 +806,11 @@ static int rc_setup_port(struct riscom_board *bp, struct riscom_port *port)
        spin_lock_irqsave(&riscom_lock, flags);
-        clear_bit(TTY_IO_ERROR, &port->port.tty->flags);
+        clear_bit(TTY_IO_ERROR, &tty->flags);
        if (port->port.count == 1)
                bp->count++;
        port->xmit_cnt = port->xmit_head = port->xmit_tail = 0;
-        rc_change_speed(bp, port);
+        rc_change_speed(tty, bp, port);
        port->port.flags |= ASYNC_INITIALIZED;
        spin_unlock_irqrestore(&riscom_lock, flags);
@@ -898,9 +911,9 @@ static int rc_open(struct tty_struct *tty, struct file *filp)
        port->port.count++;
        tty->driver_data = port;
-        port->port.tty = tty;
+        tty_port_tty_set(&port->port, tty);
-        error = rc_setup_port(bp, port);
+        error = rc_setup_port(tty, bp, port);
        if (error == 0)
                error = tty_port_block_til_ready(&port->port, tty, filp);
        return error;
@@ -921,20 +934,12 @@ static void rc_flush_buffer(struct tty_struct *tty)
        tty_wakeup(tty);
 }
-static void rc_close(struct tty_struct *tty, struct file *filp)
+static void rc_close_port(struct tty_port *port)
 {
-        struct riscom_port *port = tty->driver_data;
-        struct riscom_board *bp;
        unsigned long flags;
+        struct riscom_port *rp = container_of(port, struct riscom_port, port);
+        struct riscom_board *bp = port_Board(rp);
        unsigned long timeout;
-        if (!port || rc_paranoia_check(port, tty->name, "close"))
-                return;
-        bp = port_Board(port);
-        
-        if (tty_port_close_start(&port->port, tty, filp) == 0)
-                return;
        
        /*
         * At this point we stop accepting input.  To do this, we
@@ -944,31 +949,37 @@ static void rc_close(struct tty_struct *tty, struct file *filp)
         */
        spin_lock_irqsave(&riscom_lock, flags);
-        port->IER &= ~IER_RXD;
+        rp->IER &= ~IER_RXD;
-        if (port->port.flags & ASYNC_INITIALIZED) {
+        if (port->flags & ASYNC_INITIALIZED) {
-                port->IER &= ~IER_TXRDY;
+                rp->IER &= ~IER_TXRDY;
-                port->IER |= IER_TXEMPTY;
+                rp->IER |= IER_TXEMPTY;
-                rc_out(bp, CD180_CAR, port_No(port));
+                rc_out(bp, CD180_CAR, port_No(rp));
-                rc_out(bp, CD180_IER, port->IER);
+                rc_out(bp, CD180_IER, rp->IER);
                /*
                 * Before we drop DTR, make sure the UART transmitter
                 * has completely drained; this is especially
                 * important if there is a transmit FIFO!
                 */
                timeout = jiffies + HZ;
-                while (port->IER & IER_TXEMPTY) {
+                while (rp->IER & IER_TXEMPTY) {
                        spin_unlock_irqrestore(&riscom_lock, flags);
-                        msleep_interruptible(jiffies_to_msecs(port->timeout));
+                        msleep_interruptible(jiffies_to_msecs(rp->timeout));
                        spin_lock_irqsave(&riscom_lock, flags);
                        if (time_after(jiffies, timeout))
                                break;
                }
        }
-        rc_shutdown_port(tty, bp, port);
+        rc_shutdown_port(port->tty, bp, rp);
-        rc_flush_buffer(tty);
        spin_unlock_irqrestore(&riscom_lock, flags);
+}
+static void rc_close(struct tty_struct *tty, struct file *filp)
+{
+        struct riscom_port *port = tty->driver_data;
-        tty_port_close_end(&port->port, tty);
+        if (!port || rc_paranoia_check(port, tty->name, "close"))
+                return;
+        tty_port_close(&port->port, tty, filp);
 }
 static int rc_write(struct tty_struct *tty,
@@ -1170,7 +1181,7 @@ static int rc_send_break(struct tty_struct *tty, int length)
        return 0;
 }
-static int rc_set_serial_info(struct riscom_port *port,
+static int rc_set_serial_info(struct tty_struct *tty, struct riscom_port *port,
                                     struct serial_struct __user *newinfo)
 {
        struct serial_struct tmp;
@@ -1180,17 +1191,6 @@ static int rc_set_serial_info(struct riscom_port *port,
        if (copy_from_user(&tmp, newinfo, sizeof(tmp)))
                return -EFAULT;
-#if 0
-        if ((tmp.irq != bp->irq) ||
-            (tmp.port != bp->base) ||
-            (tmp.type != PORT_CIRRUS) ||
-            (tmp.baud_base != (RC_OSCFREQ + CD180_TPC/2) / CD180_TPC) ||
-            (tmp.custom_divisor != 0) ||
-            (tmp.xmit_fifo_size != CD180_NFIFO) ||
-            (tmp.flags & ~RISCOM_LEGAL_FLAGS))
-                return -EINVAL;
-#endif
        change_speed = ((port->port.flags & ASYNC_SPD_MASK) !=
                        (tmp.flags & ASYNC_SPD_MASK));
@@ -1212,7 +1212,7 @@ static int rc_set_serial_info(struct riscom_port *port,
                unsigned long flags;
                spin_lock_irqsave(&riscom_lock, flags);
-                rc_change_speed(bp, port);
+                rc_change_speed(tty, bp, port);
                spin_unlock_irqrestore(&riscom_lock, flags);
        }
        return 0;
@@ -1255,7 +1255,7 @@ static int rc_ioctl(struct tty_struct *tty, struct file *filp,
                break;
        case TIOCSSERIAL:
                lock_kernel();
-                retval = rc_set_serial_info(port, argp);
+                retval = rc_set_serial_info(tty, port, argp);
                unlock_kernel();
                break;
        default:
@@ -1350,21 +1350,12 @@ static void rc_start(struct tty_struct *tty)
 static void rc_hangup(struct tty_struct *tty)
 {
        struct riscom_port *port = tty->driver_data;
-        struct riscom_board *bp;
-        unsigned long flags;
        if (rc_paranoia_check(port, tty->name, "rc_hangup"))
                return;
-        bp = port_Board(port);
+        rc_shutdown_port(tty, port_Board(port), port);
+        tty_port_hangup(&port->port);
-        rc_shutdown_port(tty, bp, port);
-        spin_lock_irqsave(&port->port.lock, flags);
-        port->port.count = 0;
-        port->port.flags &= ~ASYNC_NORMAL_ACTIVE;
-        port->port.tty = NULL;
-        wake_up_interruptible(&port->port.open_wait);
-        spin_unlock_irqrestore(&port->port.lock, flags);
 }
 static void rc_set_termios(struct tty_struct *tty,
@@ -1377,7 +1368,7 @@ static void rc_set_termios(struct tty_struct *tty,
                return;
        spin_lock_irqsave(&riscom_lock, flags);
-        rc_change_speed(port_Board(port), port);
+        rc_change_speed(tty, port_Board(port), port);
        spin_unlock_irqrestore(&riscom_lock, flags);
        if ((old_termios->c_cflag & CRTSCTS) &&
@@ -1410,6 +1401,7 @@ static const struct tty_operations riscom_ops = {
 static const struct tty_port_operations riscom_port_ops = {
        .carrier_raised = carrier_raised,
+        .shutdown = rc_close_port,
 };
diff --git a/drivers/char/tty_io.c b/drivers/char/tty_io.c
index a3afa0c387cd..ea18a129b0b5 100644
--- a/drivers/char/tty_io.c
+++ b/drivers/char/tty_io.c
@@ -1184,6 +1184,7 @@ int tty_init_termios(struct tty_struct *tty)
        tty->termios->c_ospeed = tty_termios_baud_rate(tty->termios);
        return 0;
 }
+EXPORT_SYMBOL_GPL(tty_init_termios);
 /**
 *      tty_driver_install_tty() - install a tty entry in the driver
@@ -1386,10 +1387,14 @@ EXPORT_SYMBOL(tty_shutdown);
 *              tty_mutex - sometimes only
 *              takes the file list lock internally when working on the list
 *      of ttys that the driver keeps.
+ *
+ *      This method gets called from a work queue so that the driver private
+ *      shutdown ops can sleep (needed for USB at least)
 */
-static void release_one_tty(struct kref *kref)
+static void release_one_tty(struct work_struct *work)
 {
-        struct tty_struct *tty = container_of(kref, struct tty_struct, kref);
+        struct tty_struct *tty =
+                container_of(work, struct tty_struct, hangup_work);
        struct tty_driver *driver = tty->driver;
        if (tty->ops->shutdown)
@@ -1407,6 +1412,15 @@ static void release_one_tty(struct kref *kref)
        free_tty_struct(tty);
 }
+static void queue_release_one_tty(struct kref *kref)
+{
+        struct tty_struct *tty = container_of(kref, struct tty_struct, kref);
+        /* The hangup queue is now free so we can reuse it rather than
+           waste a chunk of memory for each port */
+        INIT_WORK(&tty->hangup_work, release_one_tty);
+        schedule_work(&tty->hangup_work);
+}
 /**
 *      tty_kref_put            -       release a tty kref
 *      @tty: tty device
@@ -1418,7 +1432,7 @@ static void release_one_tty(struct kref *kref)
 void tty_kref_put(struct tty_struct *tty)
 {
        if (tty)
-                kref_put(&tty->kref, release_one_tty);
+                kref_put(&tty->kref, queue_release_one_tty);
 }
 EXPORT_SYMBOL(tty_kref_put);
@@ -2085,7 +2099,7 @@ static int tioccons(struct file *file)
 *      the generic functionality existed. This piece of history is preserved
 *      in the expected tty API of posix OS's.
 *
- *      Locking: none, the open fle handle ensures it won't go away.
+ *      Locking: none, the open file handle ensures it won't go away.
 */
 static int fionbio(struct file *file, int __user *p)
@@ -3056,11 +3070,22 @@ void __init console_init(void)
        }
 }
+static char *tty_devnode(struct device *dev, mode_t *mode)
+{
+        if (!mode)
+                return NULL;
+        if (dev->devt == MKDEV(TTYAUX_MAJOR, 0) ||
+            dev->devt == MKDEV(TTYAUX_MAJOR, 2))
+                *mode = 0666;
+        return NULL;
+}
 static int __init tty_class_init(void)
 {
        tty_class = class_create(THIS_MODULE, "tty");
        if (IS_ERR(tty_class))
                return PTR_ERR(tty_class);
+        tty_class->devnode = tty_devnode;
        return 0;
 }
diff --git a/drivers/char/tty_ioctl.c b/drivers/char/tty_ioctl.c
index ad6ba4ed2808..8e67d5c642a4 100644
--- a/drivers/char/tty_ioctl.c
+++ b/drivers/char/tty_ioctl.c
@@ -393,9 +393,7 @@ void tty_termios_encode_baud_rate(struct ktermios *termios,
                termios->c_cflag |= (BOTHER << IBSHIFT);
 #else
        if (ifound == -1 || ofound == -1) {
-                static int warned;
+                printk_once(KERN_WARNING "tty: Unable to return correct "
-                if (!warned++)
-                        printk(KERN_WARNING "tty: Unable to return correct "
                          "speed data as your architecture needs updating.\n");
        }
 #endif
diff --git a/drivers/char/tty_ldisc.c b/drivers/char/tty_ldisc.c
index e48af9f79219..aafdbaebc16a 100644
--- a/drivers/char/tty_ldisc.c
+++ b/drivers/char/tty_ldisc.c
@@ -145,48 +145,33 @@ int tty_unregister_ldisc(int disc)
 }
 EXPORT_SYMBOL(tty_unregister_ldisc);
+static struct tty_ldisc_ops *get_ldops(int disc)
-/**
- *      tty_ldisc_try_get       -       try and reference an ldisc
- *      @disc: ldisc number
- *
- *      Attempt to open and lock a line discipline into place. Return
- *      the line discipline refcounted or an error.
- */
-static struct tty_ldisc *tty_ldisc_try_get(int disc)
 {
        unsigned long flags;
-        struct tty_ldisc *ld;
+        struct tty_ldisc_ops *ldops, *ret;
-        struct tty_ldisc_ops *ldops;
-        int err = -EINVAL;
-        ld = kmalloc(sizeof(struct tty_ldisc), GFP_KERNEL);
-        if (ld == NULL)
-                return ERR_PTR(-ENOMEM);
        spin_lock_irqsave(&tty_ldisc_lock, flags);
-        ld->ops = NULL;
+        ret = ERR_PTR(-EINVAL);
        ldops = tty_ldiscs[disc];
-        /* Check the entry is defined */
        if (ldops) {
-                /* If the module is being unloaded we can't use it */
+                ret = ERR_PTR(-EAGAIN);
-                if (!try_module_get(ldops->owner))
+                if (try_module_get(ldops->owner)) {
-                        err = -EAGAIN;
-                else {
-                        /* lock it */
                        ldops->refcount++;
-                        ld->ops = ldops;
+                        ret = ldops;
-                        atomic_set(&ld->users, 1);
-                        err = 0;
                }
        }
        spin_unlock_irqrestore(&tty_ldisc_lock, flags);
-        if (err) {
+        return ret;
-                kfree(ld);
+}
-                return ERR_PTR(err);
-        }
+static void put_ldops(struct tty_ldisc_ops *ldops)
-        return ld;
+{
+        unsigned long flags;
+        spin_lock_irqsave(&tty_ldisc_lock, flags);
+        ldops->refcount--;
+        module_put(ldops->owner);
+        spin_unlock_irqrestore(&tty_ldisc_lock, flags);
 }
 /**
@@ -205,14 +190,31 @@ static struct tty_ldisc *tty_ldisc_try_get(int disc)
 static struct tty_ldisc *tty_ldisc_get(int disc)
 {
        struct tty_ldisc *ld;
+        struct tty_ldisc_ops *ldops;
        if (disc < N_TTY || disc >= NR_LDISCS)
                return ERR_PTR(-EINVAL);
-        ld = tty_ldisc_try_get(disc);
-        if (IS_ERR(ld)) {
+        /*
+         * Get the ldisc ops - we may need to request them to be loaded
+         * dynamically and try again.
+         */
+        ldops = get_ldops(disc);
+        if (IS_ERR(ldops)) {
                request_module("tty-ldisc-%d", disc);
-                ld = tty_ldisc_try_get(disc);
+                ldops = get_ldops(disc);
+                if (IS_ERR(ldops))
+                        return ERR_CAST(ldops);
        }
+        ld = kmalloc(sizeof(struct tty_ldisc), GFP_KERNEL);
+        if (ld == NULL) {
+                put_ldops(ldops);
+                return ERR_PTR(-ENOMEM);
+        }
+        ld->ops = ldops;
+        atomic_set(&ld->users, 1);
        return ld;
 }
@@ -234,13 +236,13 @@ static void tty_ldiscs_seq_stop(struct seq_file *m, void *v)
 static int tty_ldiscs_seq_show(struct seq_file *m, void *v)
 {
        int i = *(loff_t *)v;
-        struct tty_ldisc *ld;
+        struct tty_ldisc_ops *ldops;
-        ld = tty_ldisc_try_get(i);
+        ldops = get_ldops(i);
-        if (IS_ERR(ld))
+        if (IS_ERR(ldops))
                return 0;
-        seq_printf(m, "%-10s %2d\n", ld->ops->name ? ld->ops->name : "???", i);
+        seq_printf(m, "%-10s %2d\n", ldops->name ? ldops->name : "???", i);
-        put_ldisc(ld);
+        put_ldops(ldops);
        return 0;
 }
diff --git a/drivers/char/tty_port.c b/drivers/char/tty_port.c
index 9769b1149f76..a4bbb28f10be 100644
--- a/drivers/char/tty_port.c
+++ b/drivers/char/tty_port.c
@@ -23,6 +23,7 @@ void tty_port_init(struct tty_port *port)
        memset(port, 0, sizeof(*port));
        init_waitqueue_head(&port->open_wait);
        init_waitqueue_head(&port->close_wait);
+        init_waitqueue_head(&port->delta_msr_wait);
        mutex_init(&port->mutex);
        spin_lock_init(&port->lock);
        port->close_delay = (50 * HZ) / 100;
@@ -96,6 +97,14 @@ void tty_port_tty_set(struct tty_port *port, struct tty_struct *tty)
 }
 EXPORT_SYMBOL(tty_port_tty_set);
+static void tty_port_shutdown(struct tty_port *port)
+{
+        if (port->ops->shutdown &&
+                test_and_clear_bit(ASYNCB_INITIALIZED, &port->flags))
+                        port->ops->shutdown(port);
+}
 /**
 *      tty_port_hangup         -       hangup helper
 *      @port: tty port
@@ -116,6 +125,8 @@ void tty_port_hangup(struct tty_port *port)
        port->tty = NULL;
        spin_unlock_irqrestore(&port->lock, flags);
        wake_up_interruptible(&port->open_wait);
+        wake_up_interruptible(&port->delta_msr_wait);
+        tty_port_shutdown(port);
 }
 EXPORT_SYMBOL(tty_port_hangup);
@@ -296,15 +307,17 @@ int tty_port_close_start(struct tty_port *port, struct tty_struct *tty, struct f
        if (port->count) {
                spin_unlock_irqrestore(&port->lock, flags);
+                if (port->ops->drop)
+                        port->ops->drop(port);
                return 0;
        }
-        port->flags |= ASYNC_CLOSING;
+        set_bit(ASYNCB_CLOSING, &port->flags);
        tty->closing = 1;
        spin_unlock_irqrestore(&port->lock, flags);
        /* Don't block on a stalled port, just pull the chain */
        if (tty->flow_stopped)
                tty_driver_flush_buffer(tty);
-        if (port->flags & ASYNC_INITIALIZED &&
+        if (test_bit(ASYNCB_INITIALIZED, &port->flags) &&
                        port->closing_wait != ASYNC_CLOSING_WAIT_NONE)
                tty_wait_until_sent(tty, port->closing_wait);
        if (port->drain_delay) {
@@ -318,6 +331,9 @@ int tty_port_close_start(struct tty_port *port, struct tty_struct *tty, struct f
                        timeout = 2 * HZ;
                schedule_timeout_interruptible(timeout);
        }
+        /* Don't call port->drop for the last reference. Callers will want
+           to drop the last active reference in ->shutdown() or the tty
+           shutdown path */
        return 1;
 }
 EXPORT_SYMBOL(tty_port_close_start);
@@ -348,3 +364,14 @@ void tty_port_close_end(struct tty_port *port, struct tty_struct *tty)
        spin_unlock_irqrestore(&port->lock, flags);
 }
 EXPORT_SYMBOL(tty_port_close_end);
+void tty_port_close(struct tty_port *port, struct tty_struct *tty,
+                                                        struct file *filp)
+{
+        if (tty_port_close_start(port, tty, filp) == 0)
+                return;
+        tty_port_shutdown(port);
+        tty_port_close_end(port, tty);
+        tty_port_tty_set(port, NULL);
+}
+EXPORT_SYMBOL(tty_port_close);
diff --git a/drivers/char/vt.c b/drivers/char/vt.c
index 6aa88f50b039..0c80c68cd047 100644
--- a/drivers/char/vt.c
+++ b/drivers/char/vt.c
@@ -252,7 +252,6 @@ static void notify_update(struct vc_data *vc)
        struct vt_notifier_param param = { .vc = vc };
        atomic_notifier_call_chain(&vt_notifier_list, VT_UPDATE, &param);
 }
 /*
 *      Low-Level Functions
 */
@@ -935,6 +934,7 @@ static int vc_do_resize(struct tty_struct *tty, struct vc_data *vc,
        if (CON_IS_VISIBLE(vc))
                update_screen(vc);
+        vt_event_post(VT_EVENT_RESIZE, vc->vc_num, vc->vc_num);
        return err;
 }
@@ -2129,11 +2129,7 @@ static int do_con_write(struct tty_struct *tty, const unsigned char *buf, int co
        currcons = vc->vc_num;
        if (!vc_cons_allocated(currcons)) {
            /* could this happen? */
-            static int error = 0;
+                printk_once("con_write: tty %d not allocated\n", currcons+1);
-            if (!error) {
-                error = 1;
-                printk("con_write: tty %d not allocated\n", currcons+1);
-            }
            release_console_sem();
            return 0;
        }
@@ -2910,6 +2906,9 @@ static const struct tty_operations con_ops = {
        .flush_chars = con_flush_chars,
        .chars_in_buffer = con_chars_in_buffer,
        .ioctl = vt_ioctl,
+#ifdef CONFIG_COMPAT
+        .compat_ioctl = vt_compat_ioctl,
+#endif
        .stop = con_stop,
        .start = con_start,
        .throttle = con_throttle,
@@ -2955,7 +2954,6 @@ int __init vty_init(const struct file_operations *console_fops)
 }
 #ifndef VT_SINGLE_DRIVER
-#include <linux/device.h>
 static struct class *vtconsole_class;
@@ -3638,6 +3636,7 @@ void do_blank_screen(int entering_gfx)
                blank_state = blank_vesa_wait;
                mod_timer(&console_timer, jiffies + vesa_off_interval);
        }
+        vt_event_post(VT_EVENT_BLANK, vc->vc_num, vc->vc_num);
 }
 EXPORT_SYMBOL(do_blank_screen);
@@ -3682,6 +3681,7 @@ void do_unblank_screen(int leaving_gfx)
                console_blank_hook(0);
        set_palette(vc);
        set_cursor(vc);
+        vt_event_post(VT_EVENT_UNBLANK, vc->vc_num, vc->vc_num);
 }
 EXPORT_SYMBOL(do_unblank_screen);
diff --git a/drivers/char/vt_ioctl.c b/drivers/char/vt_ioctl.c
index 95189f288f8c..29c651ab0d78 100644
--- a/drivers/char/vt_ioctl.c
+++ b/drivers/char/vt_ioctl.c
@@ -16,6 +16,8 @@
 #include <linux/tty.h>
 #include <linux/timer.h>
 #include <linux/kernel.h>
+#include <linux/compat.h>
+#include <linux/module.h>
 #include <linux/kd.h>
 #include <linux/vt.h>
 #include <linux/string.h>
@@ -62,6 +64,133 @@ extern struct tty_driver *console_driver;
 static void complete_change_console(struct vc_data *vc);
 /*
+ *      User space VT_EVENT handlers
+ */
+struct vt_event_wait {
+        struct list_head list;
+        struct vt_event event;
+        int done;
+};
+static LIST_HEAD(vt_events);
+static DEFINE_SPINLOCK(vt_event_lock);
+static DECLARE_WAIT_QUEUE_HEAD(vt_event_waitqueue);
+/**
+ *      vt_event_post
+ *      @event: the event that occurred
+ *      @old: old console
+ *      @new: new console
+ *
+ *      Post an VT event to interested VT handlers
+ */
+void vt_event_post(unsigned int event, unsigned int old, unsigned int new)
+{
+        struct list_head *pos, *head;
+        unsigned long flags;
+        int wake = 0;
+        spin_lock_irqsave(&vt_event_lock, flags);
+        head = &vt_events;
+        list_for_each(pos, head) {
+                struct vt_event_wait *ve = list_entry(pos,
+                                                struct vt_event_wait, list);
+                if (!(ve->event.event & event))
+                        continue;
+                ve->event.event = event;
+                /* kernel view is consoles 0..n-1, user space view is
+                   console 1..n with 0 meaning current, so we must bias */
+                ve->event.old = old + 1;
+                ve->event.new = new + 1;
+                wake = 1;
+                ve->done = 1;
+        }
+        spin_unlock_irqrestore(&vt_event_lock, flags);
+        if (wake)
+                wake_up_interruptible(&vt_event_waitqueue);
+}
+/**
+ *      vt_event_wait           -       wait for an event
+ *      @vw: our event
+ *
+ *      Waits for an event to occur which completes our vt_event_wait
+ *      structure. On return the structure has wv->done set to 1 for success
+ *      or 0 if some event such as a signal ended the wait.
+ */
+static void vt_event_wait(struct vt_event_wait *vw)
+{
+        unsigned long flags;
+        /* Prepare the event */
+        INIT_LIST_HEAD(&vw->list);
+        vw->done = 0;
+        /* Queue our event */
+        spin_lock_irqsave(&vt_event_lock, flags);
+        list_add(&vw->list, &vt_events);
+        spin_unlock_irqrestore(&vt_event_lock, flags);
+        /* Wait for it to pass */
+        wait_event_interruptible(vt_event_waitqueue, vw->done);
+        /* Dequeue it */
+        spin_lock_irqsave(&vt_event_lock, flags);
+        list_del(&vw->list);
+        spin_unlock_irqrestore(&vt_event_lock, flags);
+}
+/**
+ *      vt_event_wait_ioctl     -       event ioctl handler
+ *      @arg: argument to ioctl
+ *
+ *      Implement the VT_WAITEVENT ioctl using the VT event interface
+ */
+static int vt_event_wait_ioctl(struct vt_event __user *event)
+{
+        struct vt_event_wait vw;
+        if (copy_from_user(&vw.event, event, sizeof(struct vt_event)))
+                return -EFAULT;
+        /* Highest supported event for now */
+        if (vw.event.event & ~VT_MAX_EVENT)
+                return -EINVAL;
+        vt_event_wait(&vw);
+        /* If it occurred report it */
+        if (vw.done) {
+                if (copy_to_user(event, &vw.event, sizeof(struct vt_event)))
+                        return -EFAULT;
+                return 0;
+        }
+        return -EINTR;
+}
+/**
+ *      vt_waitactive   -       active console wait
+ *      @event: event code
+ *      @n: new console
+ *
+ *      Helper for event waits. Used to implement the legacy
+ *      event waiting ioctls in terms of events
+ */
+int vt_waitactive(int n)
+{
+        struct vt_event_wait vw;
+        do {
+                if (n == fg_console + 1)
+                        break;
+                vw.event.event = VT_EVENT_SWITCH;
+                vt_event_wait(&vw);
+                if (vw.done == 0)
+                        return -EINTR;
+        } while (vw.event.new != n);
+        return 0;
+}
+/*
 * these are the valid i/o ports we're allowed to change. they map all the
 * video ports
 */
@@ -360,6 +489,8 @@ do_unimap_ioctl(int cmd, struct unimapdesc __user *user_ud, int perm, struct vc_
        return 0;
 }
 /*
 * We handle the console-specific ioctl's here.  We allow the
 * capability to modify any console, not just the fg_console. 
@@ -842,6 +973,41 @@ int vt_ioctl(struct tty_struct *tty, struct file * file,
                }
                break;
+        case VT_SETACTIVATE:
+        {
+                struct vt_setactivate vsa;
+                if (!perm)
+                        goto eperm;
+                if (copy_from_user(&vsa, (struct vt_setactivate __user *)arg,
+                                                sizeof(struct vt_setactivate)))
+                        return -EFAULT;
+                if (vsa.console == 0 || vsa.console > MAX_NR_CONSOLES)
+                        ret = -ENXIO;
+                else {
+                        vsa.console--;
+                        acquire_console_sem();
+                        ret = vc_allocate(vsa.console);
+                        if (ret == 0) {
+                                struct vc_data *nvc;
+                                /* This is safe providing we don't drop the
+                                   console sem between vc_allocate and
+                                   finishing referencing nvc */
+                                nvc = vc_cons[vsa.console].d;
+                                nvc->vt_mode = vsa.mode;
+                                nvc->vt_mode.frsig = 0;
+                                put_pid(nvc->vt_pid);
+                                nvc->vt_pid = get_pid(task_pid(current));
+                        }
+                        release_console_sem();
+                        if (ret)
+                                break;
+                        /* Commence switch and lock */
+                        set_console(arg);
+                }
+        }
        /*
         * wait until the specified VT has been activated
         */
@@ -851,7 +1017,7 @@ int vt_ioctl(struct tty_struct *tty, struct file * file,
                if (arg == 0 || arg > MAX_NR_CONSOLES)
                        ret = -ENXIO;
                else
-                        ret = vt_waitactive(arg - 1);
+                        ret = vt_waitactive(arg);
                break;
        /*
@@ -1159,6 +1325,9 @@ int vt_ioctl(struct tty_struct *tty, struct file * file,
                ret = put_user(vc->vc_hi_font_mask,
                                        (unsigned short __user *)arg);
                break;
+        case VT_WAITEVENT:
+                ret = vt_event_wait_ioctl((struct vt_event __user *)arg);
+                break;
        default:
                ret = -ENOIOCTLCMD;
        }
@@ -1170,54 +1339,6 @@ eperm:
        goto out;
 }
-/*
- * Sometimes we want to wait until a particular VT has been activated. We
- * do it in a very simple manner. Everybody waits on a single queue and
- * get woken up at once. Those that are satisfied go on with their business,
- * while those not ready go back to sleep. Seems overkill to add a wait
- * to each vt just for this - usually this does nothing!
- */
-static DECLARE_WAIT_QUEUE_HEAD(vt_activate_queue);
-/*
- * Sleeps until a vt is activated, or the task is interrupted. Returns
- * 0 if activation, -EINTR if interrupted by a signal handler.
- */
-int vt_waitactive(int vt)
-{
-        int retval;
-        DECLARE_WAITQUEUE(wait, current);
-        add_wait_queue(&vt_activate_queue, &wait);
-        for (;;) {
-                retval = 0;
-                /*
-                 * Synchronize with redraw_screen(). By acquiring the console
-                 * semaphore we make sure that the console switch is completed
-                 * before we return. If we didn't wait for the semaphore, we
-                 * could return at a point where fg_console has already been
-                 * updated, but the console switch hasn't been completed.
-                 */
-                acquire_console_sem();
-                set_current_state(TASK_INTERRUPTIBLE);
-                if (vt == fg_console) {
-                        release_console_sem();
-                        break;
-                }
-                release_console_sem();
-                retval = -ERESTARTNOHAND;
-                if (signal_pending(current))
-                        break;
-                schedule();
-        }
-        remove_wait_queue(&vt_activate_queue, &wait);
-        __set_current_state(TASK_RUNNING);
-        return retval;
-}
-#define vt_wake_waitactive() wake_up(&vt_activate_queue)
 void reset_vc(struct vc_data *vc)
 {
        vc->vc_mode = KD_TEXT;
@@ -1256,12 +1377,216 @@ void vc_SAK(struct work_struct *work)
        release_console_sem();
 }
+#ifdef CONFIG_COMPAT
+struct compat_consolefontdesc {
+        unsigned short charcount;       /* characters in font (256 or 512) */
+        unsigned short charheight;      /* scan lines per character (1-32) */
+        compat_caddr_t chardata;        /* font data in expanded form */
+};
+static inline int
+compat_fontx_ioctl(int cmd, struct compat_consolefontdesc __user *user_cfd,
+                         int perm, struct console_font_op *op)
+{
+        struct compat_consolefontdesc cfdarg;
+        int i;
+        if (copy_from_user(&cfdarg, user_cfd, sizeof(struct compat_consolefontdesc)))
+                return -EFAULT;
+        switch (cmd) {
+        case PIO_FONTX:
+                if (!perm)
+                        return -EPERM;
+                op->op = KD_FONT_OP_SET;
+                op->flags = KD_FONT_FLAG_OLD;
+                op->width = 8;
+                op->height = cfdarg.charheight;
+                op->charcount = cfdarg.charcount;
+                op->data = compat_ptr(cfdarg.chardata);
+                return con_font_op(vc_cons[fg_console].d, op);
+        case GIO_FONTX:
+                op->op = KD_FONT_OP_GET;
+                op->flags = KD_FONT_FLAG_OLD;
+                op->width = 8;
+                op->height = cfdarg.charheight;
+                op->charcount = cfdarg.charcount;
+                op->data = compat_ptr(cfdarg.chardata);
+                i = con_font_op(vc_cons[fg_console].d, op);
+                if (i)
+                        return i;
+                cfdarg.charheight = op->height;
+                cfdarg.charcount = op->charcount;
+                if (copy_to_user(user_cfd, &cfdarg, sizeof(struct compat_consolefontdesc)))
+                        return -EFAULT;
+                return 0;
+        }
+        return -EINVAL;
+}
+struct compat_console_font_op {
+        compat_uint_t op;        /* operation code KD_FONT_OP_* */
+        compat_uint_t flags;     /* KD_FONT_FLAG_* */
+        compat_uint_t width, height;     /* font size */
+        compat_uint_t charcount;
+        compat_caddr_t data;    /* font data with height fixed to 32 */
+};
+static inline int
+compat_kdfontop_ioctl(struct compat_console_font_op __user *fontop,
+                         int perm, struct console_font_op *op, struct vc_data *vc)
+{
+        int i;
+        if (copy_from_user(op, fontop, sizeof(struct compat_console_font_op)))
+                return -EFAULT;
+        if (!perm && op->op != KD_FONT_OP_GET)
+                return -EPERM;
+        op->data = compat_ptr(((struct compat_console_font_op *)op)->data);
+        op->flags |= KD_FONT_FLAG_OLD;
+        i = con_font_op(vc, op);
+        if (i)
+                return i;
+        ((struct compat_console_font_op *)op)->data = (unsigned long)op->data;
+        if (copy_to_user(fontop, op, sizeof(struct compat_console_font_op)))
+                return -EFAULT;
+        return 0;
+}
+struct compat_unimapdesc {
+        unsigned short entry_ct;
+        compat_caddr_t entries;
+};
+static inline int
+compat_unimap_ioctl(unsigned int cmd, struct compat_unimapdesc __user *user_ud,
+                         int perm, struct vc_data *vc)
+{
+        struct compat_unimapdesc tmp;
+        struct unipair __user *tmp_entries;
+        if (copy_from_user(&tmp, user_ud, sizeof tmp))
+                return -EFAULT;
+        tmp_entries = compat_ptr(tmp.entries);
+        if (tmp_entries)
+                if (!access_ok(VERIFY_WRITE, tmp_entries,
+                                tmp.entry_ct*sizeof(struct unipair)))
+                        return -EFAULT;
+        switch (cmd) {
+        case PIO_UNIMAP:
+                if (!perm)
+                        return -EPERM;
+                return con_set_unimap(vc, tmp.entry_ct, tmp_entries);
+        case GIO_UNIMAP:
+                if (!perm && fg_console != vc->vc_num)
+                        return -EPERM;
+                return con_get_unimap(vc, tmp.entry_ct, &(user_ud->entry_ct), tmp_entries);
+        }
+        return 0;
+}
+long vt_compat_ioctl(struct tty_struct *tty, struct file * file,
+             unsigned int cmd, unsigned long arg)
+{
+        struct vc_data *vc = tty->driver_data;
+        struct console_font_op op;      /* used in multiple places here */
+        struct kbd_struct *kbd;
+        unsigned int console;
+        void __user *up = (void __user *)arg;
+        int perm;
+        int ret = 0;
+        console = vc->vc_num;
+        lock_kernel();
+        if (!vc_cons_allocated(console)) {      /* impossible? */
+                ret = -ENOIOCTLCMD;
+                goto out;
+        }
+        /*
+         * To have permissions to do most of the vt ioctls, we either have
+         * to be the owner of the tty, or have CAP_SYS_TTY_CONFIG.
+         */
+        perm = 0;
+        if (current->signal->tty == tty || capable(CAP_SYS_TTY_CONFIG))
+                perm = 1;
+        kbd = kbd_table + console;
+        switch (cmd) {
+        /*
+         * these need special handlers for incompatible data structures
+         */
+        case PIO_FONTX:
+        case GIO_FONTX:
+                ret = compat_fontx_ioctl(cmd, up, perm, &op);
+                break;
+        case KDFONTOP:
+                ret = compat_kdfontop_ioctl(up, perm, &op, vc);
+                break;
+        case PIO_UNIMAP:
+        case GIO_UNIMAP:
+                ret = do_unimap_ioctl(cmd, up, perm, vc);
+                break;
+        /*
+         * all these treat 'arg' as an integer
+         */
+        case KIOCSOUND:
+        case KDMKTONE:
+#ifdef CONFIG_X86
+        case KDADDIO:
+        case KDDELIO:
+#endif
+        case KDSETMODE:
+        case KDMAPDISP:
+        case KDUNMAPDISP:
+        case KDSKBMODE:
+        case KDSKBMETA:
+        case KDSKBLED:
+        case KDSETLED:
+        case KDSIGACCEPT:
+        case VT_ACTIVATE:
+        case VT_WAITACTIVE:
+        case VT_RELDISP:
+        case VT_DISALLOCATE:
+        case VT_RESIZE:
+        case VT_RESIZEX:
+                goto fallback;
+        /*
+         * the rest has a compatible data structure behind arg,
+         * but we have to convert it to a proper 64 bit pointer.
+         */
+        default:
+                arg = (unsigned long)compat_ptr(arg);
+                goto fallback;
+        }
+out:
+        unlock_kernel();
+        return ret;
+fallback:
+        unlock_kernel();
+        return vt_ioctl(tty, file, cmd, arg);
+}
+#endif /* CONFIG_COMPAT */
 /*
- * Performs the back end of a vt switch
+ * Performs the back end of a vt switch. Called under the console
+ * semaphore.
 */
 static void complete_change_console(struct vc_data *vc)
 {
        unsigned char old_vc_mode;
+        int old = fg_console;
        last_console = fg_console;
@@ -1325,7 +1650,7 @@ static void complete_change_console(struct vc_data *vc)
        /*
         * Wake anyone waiting for their VT to activate
         */
-        vt_wake_waitactive();
+        vt_event_post(VT_EVENT_SWITCH, old, vc->vc_num);
        return;
 }
@@ -1398,3 +1723,58 @@ void change_console(struct vc_data *new_vc)
        complete_change_console(new_vc);
 }
+/* Perform a kernel triggered VT switch for suspend/resume */
+static int disable_vt_switch;
+int vt_move_to_console(unsigned int vt, int alloc)
+{
+        int prev;
+        acquire_console_sem();
+        /* Graphics mode - up to X */
+        if (disable_vt_switch) {
+                release_console_sem();
+                return 0;
+        }
+        prev = fg_console;
+        if (alloc && vc_allocate(vt)) {
+                /* we can't have a free VC for now. Too bad,
+                 * we don't want to mess the screen for now. */
+                release_console_sem();
+                return -ENOSPC;
+        }
+        if (set_console(vt)) {
+                /*
+                 * We're unable to switch to the SUSPEND_CONSOLE.
+                 * Let the calling function know so it can decide
+                 * what to do.
+                 */
+                release_console_sem();
+                return -EIO;
+        }
+        release_console_sem();
+        if (vt_waitactive(vt + 1)) {
+                pr_debug("Suspend: Can't switch VCs.");
+                return -EINTR;
+        }
+        return prev;
+}
+/*
+ * Normally during a suspend, we allocate a new console and switch to it.
+ * When we resume, we switch back to the original console.  This switch
+ * can be slow, so on systems where the framebuffer can handle restoration
+ * of video registers anyways, there's little point in doing the console
+ * switch.  This function allows you to disable it by passing it '0'.
+ */
+void pm_set_vt_switch(int do_switch)
+{
+        acquire_console_sem();
+        disable_vt_switch = !do_switch;
+        release_console_sem();
+}
+EXPORT_SYMBOL(pm_set_vt_switch);
diff --git a/drivers/cpuidle/cpuidle.c b/drivers/cpuidle/cpuidle.c
index 8504a2108557..ad41f19b8e3f 100644
--- a/drivers/cpuidle/cpuidle.c
+++ b/drivers/cpuidle/cpuidle.c
@@ -17,6 +17,7 @@
 #include <linux/cpuidle.h>
 #include <linux/ktime.h>
 #include <linux/hrtimer.h>
+#include <trace/events/power.h>
 #include "cpuidle.h"
@@ -91,6 +92,7 @@ static void cpuidle_idle_call(void)
        /* give the governor an opportunity to reflect on the outcome */
        if (cpuidle_curr_governor->reflect)
                cpuidle_curr_governor->reflect(dev);
+        trace_power_end(0);
 }
 /**
diff --git a/drivers/gpu/drm/Kconfig b/drivers/gpu/drm/Kconfig
index 39b393d38bb3..e4d971c8b9d0 100644
--- a/drivers/gpu/drm/Kconfig
+++ b/drivers/gpu/drm/Kconfig
@@ -18,6 +18,14 @@ menuconfig DRM
          details.  You should also select and configure AGP
          (/dev/agpgart) support.
+config DRM_KMS_HELPER
+        tristate
+        depends on DRM
+        select FB
+        select FRAMEBUFFER_CONSOLE if !EMBEDDED
+        help
+          FB and CRTC helpers for KMS drivers.
 config DRM_TTM
        tristate
        depends on DRM
@@ -36,6 +44,7 @@ config DRM_TDFX
 config DRM_R128
        tristate "ATI Rage 128"
        depends on DRM && PCI
+        select FW_LOADER
        help
          Choose this option if you have an ATI Rage 128 graphics card.  If M
          is selected, the module will be called r128.  AGP support for
@@ -47,8 +56,9 @@ config DRM_RADEON
        select FB_CFB_FILLRECT
        select FB_CFB_COPYAREA
        select FB_CFB_IMAGEBLIT
-        select FB
+        select FW_LOADER
-        select FRAMEBUFFER_CONSOLE if !EMBEDDED
+        select DRM_KMS_HELPER
+        select DRM_TTM
        help
          Choose this option if you have an ATI Radeon graphics card.  There
          are both PCI and AGP versions.  You don't need to choose this to
@@ -82,11 +92,10 @@ config DRM_I830
 config DRM_I915
        tristate "i915 driver"
        depends on AGP_INTEL
+        select DRM_KMS_HELPER
        select FB_CFB_FILLRECT
        select FB_CFB_COPYAREA
        select FB_CFB_IMAGEBLIT
-        select FB
-        select FRAMEBUFFER_CONSOLE if !EMBEDDED
        # i915 depends on ACPI_VIDEO when ACPI is enabled
        # but for select to work, need to select ACPI_VIDEO's dependencies, ick
        select VIDEO_OUTPUT_CONTROL if ACPI
@@ -116,6 +125,7 @@ endchoice
 config DRM_MGA
        tristate "Matrox g200/g400"
        depends on DRM
+        select FW_LOADER
        help
          Choose this option if you have a Matrox G200, G400 or G450 graphics
          card.  If M is selected, the module will be called mga.  AGP
diff --git a/drivers/gpu/drm/Makefile b/drivers/gpu/drm/Makefile
index fe23f29f7cba..3c8827a7aabd 100644
--- a/drivers/gpu/drm/Makefile
+++ b/drivers/gpu/drm/Makefile
@@ -10,11 +10,15 @@ drm-y       :=	drm_auth.o drm_bufs.o drm_cache.o \
                drm_lock.o drm_memory.o drm_proc.o drm_stub.o drm_vm.o \
                drm_agpsupport.o drm_scatter.o ati_pcigart.o drm_pci.o \
                drm_sysfs.o drm_hashtab.o drm_sman.o drm_mm.o \
-                drm_crtc.o drm_crtc_helper.o drm_modes.o drm_edid.o \
+                drm_crtc.o drm_modes.o drm_edid.o \
-                drm_info.o drm_debugfs.o
+                drm_info.o drm_debugfs.o drm_encoder_slave.o
 drm-$(CONFIG_COMPAT) += drm_ioc32.o
+drm_kms_helper-y := drm_fb_helper.o drm_crtc_helper.o
+obj-$(CONFIG_DRM_KMS_HELPER) += drm_kms_helper.o
 obj-$(CONFIG_DRM)       += drm.o
 obj-$(CONFIG_DRM_TTM)   += ttm/
 obj-$(CONFIG_DRM_TDFX)  += tdfx/
diff --git a/drivers/gpu/drm/drm_bufs.c b/drivers/gpu/drm/drm_bufs.c
index 6246e3f3dad7..3d09e304f6f4 100644
--- a/drivers/gpu/drm/drm_bufs.c
+++ b/drivers/gpu/drm/drm_bufs.c
@@ -310,10 +310,10 @@ static int drm_addmap_core(struct drm_device * dev, resource_size_t offset,
                          (unsigned long long)map->offset, map->size);
                break;
+        }
        case _DRM_GEM:
-                DRM_ERROR("tried to rmmap GEM object\n");
+                DRM_ERROR("tried to addmap GEM object\n");
                break;
-        }
        case _DRM_SCATTER_GATHER:
                if (!dev->sg) {
                        kfree(map);
diff --git a/drivers/gpu/drm/drm_cache.c b/drivers/gpu/drm/drm_cache.c
index 0e994a0e46d4..0e3bd5b54b78 100644
--- a/drivers/gpu/drm/drm_cache.c
+++ b/drivers/gpu/drm/drm_cache.c
@@ -45,6 +45,23 @@ drm_clflush_page(struct page *page)
                clflush(page_virtual + i);
        kunmap_atomic(page_virtual, KM_USER0);
 }
+static void drm_cache_flush_clflush(struct page *pages[],
+                                    unsigned long num_pages)
+{
+        unsigned long i;
+        mb();
+        for (i = 0; i < num_pages; i++)
+                drm_clflush_page(*pages++);
+        mb();
+}
+static void
+drm_clflush_ipi_handler(void *null)
+{
+        wbinvd();
+}
 #endif
 void
@@ -53,17 +70,30 @@ drm_clflush_pages(struct page *pages[], unsigned long num_pages)
 #if defined(CONFIG_X86)
        if (cpu_has_clflush) {
-                unsigned long i;
+                drm_cache_flush_clflush(pages, num_pages);
-                mb();
-                for (i = 0; i < num_pages; ++i)
-                        drm_clflush_page(*pages++);
-                mb();
                return;
        }
-        wbinvd();
+        if (on_each_cpu(drm_clflush_ipi_handler, NULL, 1) != 0)
+                printk(KERN_ERR "Timed out waiting for cache flush.\n");
+#elif defined(__powerpc__)
+        unsigned long i;
+        for (i = 0; i < num_pages; i++) {
+                struct page *page = pages[i];
+                void *page_virtual;
+                if (unlikely(page == NULL))
+                        continue;
+                page_virtual = kmap_atomic(page, KM_USER0);
+                flush_dcache_range((unsigned long)page_virtual,
+                                   (unsigned long)page_virtual + PAGE_SIZE);
+                kunmap_atomic(page_virtual, KM_USER0);
+        }
+#else
+        printk(KERN_ERR "Architecture has no drm_cache.c support\n");
+        WARN_ON_ONCE(1);
 #endif
 }
 EXPORT_SYMBOL(drm_clflush_pages);
diff --git a/drivers/gpu/drm/drm_crtc.c b/drivers/gpu/drm/drm_crtc.c
index 2f631c75f704..ba728ad77f2a 100644
--- a/drivers/gpu/drm/drm_crtc.c
+++ b/drivers/gpu/drm/drm_crtc.c
@@ -68,10 +68,10 @@ DRM_ENUM_NAME_FN(drm_get_dpms_name, drm_dpms_enum_list)
 */
 static struct drm_prop_enum_list drm_scaling_mode_enum_list[] =
 {
-        { DRM_MODE_SCALE_NON_GPU, "Non-GPU" },
+        { DRM_MODE_SCALE_NONE, "None" },
-        { DRM_MODE_SCALE_FULLSCREEN, "Fullscreen" },
+        { DRM_MODE_SCALE_FULLSCREEN, "Full" },
-        { DRM_MODE_SCALE_NO_SCALE, "No scale" },
+        { DRM_MODE_SCALE_CENTER, "Center" },
-        { DRM_MODE_SCALE_ASPECT, "Aspect" },
+        { DRM_MODE_SCALE_ASPECT, "Full aspect" },
 };
 static struct drm_prop_enum_list drm_dithering_mode_enum_list[] =
@@ -108,6 +108,7 @@ static struct drm_prop_enum_list drm_tv_select_enum_list[] =
        { DRM_MODE_SUBCONNECTOR_Composite, "Composite" }, /* TV-out */
        { DRM_MODE_SUBCONNECTOR_SVIDEO,    "SVIDEO"    }, /* TV-out */
        { DRM_MODE_SUBCONNECTOR_Component, "Component" }, /* TV-out */
+        { DRM_MODE_SUBCONNECTOR_SCART,     "SCART"     }, /* TV-out */
 };
 DRM_ENUM_NAME_FN(drm_get_tv_select_name, drm_tv_select_enum_list)
@@ -118,6 +119,7 @@ static struct drm_prop_enum_list drm_tv_subconnector_enum_list[] =
        { DRM_MODE_SUBCONNECTOR_Composite, "Composite" }, /* TV-out */
        { DRM_MODE_SUBCONNECTOR_SVIDEO,    "SVIDEO"    }, /* TV-out */
        { DRM_MODE_SUBCONNECTOR_Component, "Component" }, /* TV-out */
+        { DRM_MODE_SUBCONNECTOR_SCART,     "SCART"     }, /* TV-out */
 };
 DRM_ENUM_NAME_FN(drm_get_tv_subconnector_name,
@@ -146,6 +148,7 @@ static struct drm_conn_prop_enum_list drm_connector_enum_list[] =
        { DRM_MODE_CONNECTOR_DisplayPort, "DisplayPort", 0 },
        { DRM_MODE_CONNECTOR_HDMIA, "HDMI Type A", 0 },
        { DRM_MODE_CONNECTOR_HDMIB, "HDMI Type B", 0 },
+        { DRM_MODE_CONNECTOR_TV, "TV", 0 },
 };
 static struct drm_prop_enum_list drm_encoder_enum_list[] =
@@ -165,6 +168,7 @@ char *drm_get_encoder_name(struct drm_encoder *encoder)
                 encoder->base.id);
        return buf;
 }
+EXPORT_SYMBOL(drm_get_encoder_name);
 char *drm_get_connector_name(struct drm_connector *connector)
 {
@@ -699,6 +703,42 @@ int drm_mode_create_tv_properties(struct drm_device *dev, int num_modes,
                drm_property_add_enum(dev->mode_config.tv_mode_property, i,
                                      i, modes[i]);
+        dev->mode_config.tv_brightness_property =
+                drm_property_create(dev, DRM_MODE_PROP_RANGE,
+                                    "brightness", 2);
+        dev->mode_config.tv_brightness_property->values[0] = 0;
+        dev->mode_config.tv_brightness_property->values[1] = 100;
+        dev->mode_config.tv_contrast_property =
+                drm_property_create(dev, DRM_MODE_PROP_RANGE,
+                                    "contrast", 2);
+        dev->mode_config.tv_contrast_property->values[0] = 0;
+        dev->mode_config.tv_contrast_property->values[1] = 100;
+        dev->mode_config.tv_flicker_reduction_property =
+                drm_property_create(dev, DRM_MODE_PROP_RANGE,
+                                    "flicker reduction", 2);
+        dev->mode_config.tv_flicker_reduction_property->values[0] = 0;
+        dev->mode_config.tv_flicker_reduction_property->values[1] = 100;
+        dev->mode_config.tv_overscan_property =
+                drm_property_create(dev, DRM_MODE_PROP_RANGE,
+                                    "overscan", 2);
+        dev->mode_config.tv_overscan_property->values[0] = 0;
+        dev->mode_config.tv_overscan_property->values[1] = 100;
+        dev->mode_config.tv_saturation_property =
+                drm_property_create(dev, DRM_MODE_PROP_RANGE,
+                                    "saturation", 2);
+        dev->mode_config.tv_saturation_property->values[0] = 0;
+        dev->mode_config.tv_saturation_property->values[1] = 100;
+        dev->mode_config.tv_hue_property =
+                drm_property_create(dev, DRM_MODE_PROP_RANGE,
+                                    "hue", 2);
+        dev->mode_config.tv_hue_property->values[0] = 0;
+        dev->mode_config.tv_hue_property->values[1] = 100;
        return 0;
 }
 EXPORT_SYMBOL(drm_mode_create_tv_properties);
@@ -1044,7 +1084,7 @@ int drm_mode_getresources(struct drm_device *dev, void *data,
                if (file_priv->master->minor->type == DRM_MINOR_CONTROL) {
                        list_for_each_entry(crtc, &dev->mode_config.crtc_list,
                                            head) {
-                                DRM_DEBUG("CRTC ID is %d\n", crtc->base.id);
+                                DRM_DEBUG_KMS("CRTC ID is %d\n", crtc->base.id);
                                if (put_user(crtc->base.id, crtc_id + copied)) {
                                        ret = -EFAULT;
                                        goto out;
@@ -1072,7 +1112,7 @@ int drm_mode_getresources(struct drm_device *dev, void *data,
                        list_for_each_entry(encoder,
                                            &dev->mode_config.encoder_list,
                                            head) {
-                                DRM_DEBUG("ENCODER ID is %d\n",
+                                DRM_DEBUG_KMS("ENCODER ID is %d\n",
                                          encoder->base.id);
                                if (put_user(encoder->base.id, encoder_id +
                                             copied)) {
@@ -1103,7 +1143,7 @@ int drm_mode_getresources(struct drm_device *dev, void *data,
                        list_for_each_entry(connector,
                                            &dev->mode_config.connector_list,
                                            head) {
-                                DRM_DEBUG("CONNECTOR ID is %d\n",
+                                DRM_DEBUG_KMS("CONNECTOR ID is %d\n",
                                          connector->base.id);
                                if (put_user(connector->base.id,
                                             connector_id + copied)) {
@@ -1127,7 +1167,7 @@ int drm_mode_getresources(struct drm_device *dev, void *data,
        }
        card_res->count_connectors = connector_count;
-        DRM_DEBUG("Counted %d %d %d\n", card_res->count_crtcs,
+        DRM_DEBUG_KMS("Counted %d %d %d\n", card_res->count_crtcs,
                  card_res->count_connectors, card_res->count_encoders);
 out:
@@ -1230,7 +1270,7 @@ int drm_mode_getconnector(struct drm_device *dev, void *data,
        memset(&u_mode, 0, sizeof(struct drm_mode_modeinfo));
-        DRM_DEBUG("connector id %d:\n", out_resp->connector_id);
+        DRM_DEBUG_KMS("connector id %d:\n", out_resp->connector_id);
        mutex_lock(&dev->mode_config.mutex);
@@ -1406,7 +1446,7 @@ int drm_mode_setcrtc(struct drm_device *dev, void *data,
        obj = drm_mode_object_find(dev, crtc_req->crtc_id,
                                   DRM_MODE_OBJECT_CRTC);
        if (!obj) {
-                DRM_DEBUG("Unknown CRTC ID %d\n", crtc_req->crtc_id);
+                DRM_DEBUG_KMS("Unknown CRTC ID %d\n", crtc_req->crtc_id);
                ret = -EINVAL;
                goto out;
        }
@@ -1419,7 +1459,8 @@ int drm_mode_setcrtc(struct drm_device *dev, void *data,
                        list_for_each_entry(crtcfb,
                                            &dev->mode_config.crtc_list, head) {
                                if (crtcfb == crtc) {
-                                        DRM_DEBUG("Using current fb for setmode\n");
+                                        DRM_DEBUG_KMS("Using current fb for "
+                                                        "setmode\n");
                                        fb = crtc->fb;
                                }
                        }
@@ -1427,7 +1468,8 @@ int drm_mode_setcrtc(struct drm_device *dev, void *data,
                        obj = drm_mode_object_find(dev, crtc_req->fb_id,
                                                   DRM_MODE_OBJECT_FB);
                        if (!obj) {
-                                DRM_DEBUG("Unknown FB ID%d\n", crtc_req->fb_id);
+                                DRM_DEBUG_KMS("Unknown FB ID%d\n",
+                                                crtc_req->fb_id);
                                ret = -EINVAL;
                                goto out;
                        }
@@ -1440,13 +1482,13 @@ int drm_mode_setcrtc(struct drm_device *dev, void *data,
        }
        if (crtc_req->count_connectors == 0 && mode) {
-                DRM_DEBUG("Count connectors is 0 but mode set\n");
+                DRM_DEBUG_KMS("Count connectors is 0 but mode set\n");
                ret = -EINVAL;
                goto out;
        }
        if (crtc_req->count_connectors > 0 && (!mode || !fb)) {
-                DRM_DEBUG("Count connectors is %d but no mode or fb set\n",
+                DRM_DEBUG_KMS("Count connectors is %d but no mode or fb set\n",
                          crtc_req->count_connectors);
                ret = -EINVAL;
                goto out;
@@ -1479,7 +1521,8 @@ int drm_mode_setcrtc(struct drm_device *dev, void *data,
                        obj = drm_mode_object_find(dev, out_id,
                                                   DRM_MODE_OBJECT_CONNECTOR);
                        if (!obj) {
-                                DRM_DEBUG("Connector id %d unknown\n", out_id);
+                                DRM_DEBUG_KMS("Connector id %d unknown\n",
+                                                out_id);
                                ret = -EINVAL;
                                goto out;
                        }
@@ -1512,7 +1555,7 @@ int drm_mode_cursor_ioctl(struct drm_device *dev,
        struct drm_crtc *crtc;
        int ret = 0;
-        DRM_DEBUG("\n");
+        DRM_DEBUG_KMS("\n");
        if (!req->flags) {
                DRM_ERROR("no operation set\n");
@@ -1522,7 +1565,7 @@ int drm_mode_cursor_ioctl(struct drm_device *dev,
        mutex_lock(&dev->mode_config.mutex);
        obj = drm_mode_object_find(dev, req->crtc_id, DRM_MODE_OBJECT_CRTC);
        if (!obj) {
-                DRM_DEBUG("Unknown CRTC ID %d\n", req->crtc_id);
+                DRM_DEBUG_KMS("Unknown CRTC ID %d\n", req->crtc_id);
                ret = -EINVAL;
                goto out;
        }
diff --git a/drivers/gpu/drm/drm_crtc_helper.c b/drivers/gpu/drm/drm_crtc_helper.c
index 6aaa2cb23365..fe8697447f32 100644
--- a/drivers/gpu/drm/drm_crtc_helper.c
+++ b/drivers/gpu/drm/drm_crtc_helper.c
@@ -33,15 +33,6 @@
 #include "drm_crtc.h"
 #include "drm_crtc_helper.h"
-/*
- * Detailed mode info for 800x600@60Hz
- */
-static struct drm_display_mode std_modes[] = {
-        { DRM_MODE("800x600", DRM_MODE_TYPE_DEFAULT, 40000, 800, 840,
-                   968, 1056, 0, 600, 601, 605, 628, 0,
-                   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
-};
 static void drm_mode_validate_flag(struct drm_connector *connector,
                                   int flags)
 {
@@ -94,7 +85,7 @@ int drm_helper_probe_single_connector_modes(struct drm_connector *connector,
        int count = 0;
        int mode_flags = 0;
-        DRM_DEBUG("%s\n", drm_get_connector_name(connector));
+        DRM_DEBUG_KMS("%s\n", drm_get_connector_name(connector));
        /* set all modes to the unverified state */
        list_for_each_entry_safe(mode, t, &connector->modes, head)
                mode->status = MODE_UNVERIFIED;
@@ -102,15 +93,17 @@ int drm_helper_probe_single_connector_modes(struct drm_connector *connector,
        connector->status = connector->funcs->detect(connector);
        if (connector->status == connector_status_disconnected) {
-                DRM_DEBUG("%s is disconnected\n",
+                DRM_DEBUG_KMS("%s is disconnected\n",
                          drm_get_connector_name(connector));
-                /* TODO set EDID to NULL */
+                goto prune;
-                return 0;
        }
        count = (*connector_funcs->get_modes)(connector);
-        if (!count)
+        if (!count) {
-                return 0;
+                count = drm_add_modes_noedid(connector, 800, 600);
+                if (!count)
+                        return 0;
+        }
        drm_mode_connector_list_update(connector);
@@ -130,7 +123,7 @@ int drm_helper_probe_single_connector_modes(struct drm_connector *connector,
                                                                   mode);
        }
+prune:
        drm_mode_prune_invalid(dev, &connector->modes, true);
        if (list_empty(&connector->modes))
@@ -138,7 +131,8 @@ int drm_helper_probe_single_connector_modes(struct drm_connector *connector,
        drm_mode_sort(&connector->modes);
-        DRM_DEBUG("Probed modes for %s\n", drm_get_connector_name(connector));
+        DRM_DEBUG_KMS("Probed modes for %s\n",
+                                drm_get_connector_name(connector));
        list_for_each_entry_safe(mode, t, &connector->modes, head) {
                mode->vrefresh = drm_mode_vrefresh(mode);
@@ -165,39 +159,6 @@ int drm_helper_probe_connector_modes(struct drm_device *dev, uint32_t maxX,
 }
 EXPORT_SYMBOL(drm_helper_probe_connector_modes);
-static void drm_helper_add_std_modes(struct drm_device *dev,
-                                     struct drm_connector *connector)
-{
-        struct drm_display_mode *mode, *t;
-        int i;
-        for (i = 0; i < ARRAY_SIZE(std_modes); i++) {
-                struct drm_display_mode *stdmode;
-                /*
-                 * When no valid EDID modes are available we end up
-                 * here and bailed in the past, now we add some standard
-                 * modes and move on.
-                 */
-                stdmode = drm_mode_duplicate(dev, &std_modes[i]);
-                drm_mode_probed_add(connector, stdmode);
-                drm_mode_list_concat(&connector->probed_modes,
-                                     &connector->modes);
-                DRM_DEBUG("Adding mode %s to %s\n", stdmode->name,
-                          drm_get_connector_name(connector));
-        }
-        drm_mode_sort(&connector->modes);
-        DRM_DEBUG("Added std modes on %s\n", drm_get_connector_name(connector));
-        list_for_each_entry_safe(mode, t, &connector->modes, head) {
-                mode->vrefresh = drm_mode_vrefresh(mode);
-                drm_mode_set_crtcinfo(mode, CRTC_INTERLACE_HALVE_V);
-                drm_mode_debug_printmodeline(mode);
-        }
-}
 /**
 * drm_helper_encoder_in_use - check if a given encoder is in use
 * @encoder: encoder to check
@@ -258,13 +219,27 @@ EXPORT_SYMBOL(drm_helper_crtc_in_use);
 void drm_helper_disable_unused_functions(struct drm_device *dev)
 {
        struct drm_encoder *encoder;
+        struct drm_connector *connector;
        struct drm_encoder_helper_funcs *encoder_funcs;
        struct drm_crtc *crtc;
+        list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
+                if (!connector->encoder)
+                        continue;
+                if (connector->status == connector_status_disconnected)
+                        connector->encoder = NULL;
+        }
        list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
                encoder_funcs = encoder->helper_private;
-                if (!drm_helper_encoder_in_use(encoder))
+                if (!drm_helper_encoder_in_use(encoder)) {
-                        (*encoder_funcs->dpms)(encoder, DRM_MODE_DPMS_OFF);
+                        if (encoder_funcs->disable)
+                                (*encoder_funcs->disable)(encoder);
+                        else
+                                (*encoder_funcs->dpms)(encoder, DRM_MODE_DPMS_OFF);
+                        /* disconnector encoder from any connector */
+                        encoder->crtc = NULL;
+                }
        }
        list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
@@ -312,7 +287,7 @@ static void drm_enable_connectors(struct drm_device *dev, bool *enabled)
        list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
                enabled[i] = drm_connector_enabled(connector, true);
-                DRM_DEBUG("connector %d enabled? %s\n", connector->base.id,
+                DRM_DEBUG_KMS("connector %d enabled? %s\n", connector->base.id,
                          enabled[i] ? "yes" : "no");
                any_enabled |= enabled[i];
                i++;
@@ -342,7 +317,7 @@ static bool drm_target_preferred(struct drm_device *dev,
                        continue;
                }
-                DRM_DEBUG("looking for preferred mode on connector %d\n",
+                DRM_DEBUG_KMS("looking for preferred mode on connector %d\n",
                          connector->base.id);
                modes[i] = drm_has_preferred_mode(connector, width, height);
@@ -351,7 +326,7 @@ static bool drm_target_preferred(struct drm_device *dev,
                        list_for_each_entry(modes[i], &connector->modes, head)
                                break;
                }
-                DRM_DEBUG("found mode %s\n", modes[i] ? modes[i]->name :
+                DRM_DEBUG_KMS("found mode %s\n", modes[i] ? modes[i]->name :
                          "none");
                i++;
        }
@@ -409,7 +384,7 @@ static int drm_pick_crtcs(struct drm_device *dev,
        c = 0;
        list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
-                if ((connector->encoder->possible_crtcs & (1 << c)) == 0) {
+                if ((encoder->possible_crtcs & (1 << c)) == 0) {
                        c++;
                        continue;
                }
@@ -452,7 +427,7 @@ static void drm_setup_crtcs(struct drm_device *dev)
        int width, height;
        int i, ret;
-        DRM_DEBUG("\n");
+        DRM_DEBUG_KMS("\n");
        width = dev->mode_config.max_width;
        height = dev->mode_config.max_height;
@@ -475,7 +450,7 @@ static void drm_setup_crtcs(struct drm_device *dev)
        if (!ret)
                DRM_ERROR("Unable to find initial modes\n");
-        DRM_DEBUG("picking CRTCs for %dx%d config\n", width, height);
+        DRM_DEBUG_KMS("picking CRTCs for %dx%d config\n", width, height);
        drm_pick_crtcs(dev, crtcs, modes, 0, width, height);
@@ -490,12 +465,14 @@ static void drm_setup_crtcs(struct drm_device *dev)
                }
                if (mode && crtc) {
-                        DRM_DEBUG("desired mode %s set on crtc %d\n",
+                        DRM_DEBUG_KMS("desired mode %s set on crtc %d\n",
                                  mode->name, crtc->base.id);
                        crtc->desired_mode = mode;
                        connector->encoder->crtc = crtc;
-                } else
+                } else {
                        connector->encoder->crtc = NULL;
+                        connector->encoder = NULL;
+                }
                i++;
        }
@@ -702,18 +679,17 @@ EXPORT_SYMBOL(drm_crtc_helper_set_mode);
 int drm_crtc_helper_set_config(struct drm_mode_set *set)
 {
        struct drm_device *dev;
-        struct drm_crtc **save_crtcs, *new_crtc;
+        struct drm_crtc *save_crtcs, *new_crtc, *crtc;
-        struct drm_encoder **save_encoders, *new_encoder;
+        struct drm_encoder *save_encoders, *new_encoder, *encoder;
        struct drm_framebuffer *old_fb = NULL;
-        bool save_enabled;
        bool mode_changed = false; /* if true do a full mode set */
        bool fb_changed = false; /* if true and !mode_changed just do a flip */
-        struct drm_connector *connector;
+        struct drm_connector *save_connectors, *connector;
        int count = 0, ro, fail = 0;
        struct drm_crtc_helper_funcs *crtc_funcs;
        int ret = 0;
-        DRM_DEBUG("\n");
+        DRM_DEBUG_KMS("\n");
        if (!set)
                return -EINVAL;
@@ -726,37 +702,60 @@ int drm_crtc_helper_set_config(struct drm_mode_set *set)
        crtc_funcs = set->crtc->helper_private;
-        DRM_DEBUG("crtc: %p %d fb: %p connectors: %p num_connectors: %d (x, y) (%i, %i)\n",
+        DRM_DEBUG_KMS("crtc: %p %d fb: %p connectors: %p num_connectors:"
+                        " %d (x, y) (%i, %i)\n",
                  set->crtc, set->crtc->base.id, set->fb, set->connectors,
                  (int)set->num_connectors, set->x, set->y);
        dev = set->crtc->dev;
-        /* save previous config */
+        /* Allocate space for the backup of all (non-pointer) crtc, encoder and
-        save_enabled = set->crtc->enabled;
+         * connector data. */
+        save_crtcs = kzalloc(dev->mode_config.num_crtc *
-        /*
+                             sizeof(struct drm_crtc), GFP_KERNEL);
-         * We do mode_config.num_connectors here since we'll look at the
-         * CRTC and encoder associated with each connector later.
-         */
-        save_crtcs = kzalloc(dev->mode_config.num_connector *
-                             sizeof(struct drm_crtc *), GFP_KERNEL);
        if (!save_crtcs)
                return -ENOMEM;
-        save_encoders = kzalloc(dev->mode_config.num_connector *
+        save_encoders = kzalloc(dev->mode_config.num_encoder *
-                                sizeof(struct drm_encoders *), GFP_KERNEL);
+                                sizeof(struct drm_encoder), GFP_KERNEL);
        if (!save_encoders) {
                kfree(save_crtcs);
                return -ENOMEM;
        }
+        save_connectors = kzalloc(dev->mode_config.num_connector *
+                                sizeof(struct drm_connector), GFP_KERNEL);
+        if (!save_connectors) {
+                kfree(save_crtcs);
+                kfree(save_encoders);
+                return -ENOMEM;
+        }
+        /* Copy data. Note that driver private data is not affected.
+         * Should anything bad happen only the expected state is
+         * restored, not the drivers personal bookkeeping.
+         */
+        count = 0;
+        list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
+                save_crtcs[count++] = *crtc;
+        }
+        count = 0;
+        list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
+                save_encoders[count++] = *encoder;
+        }
+        count = 0;
+        list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
+                save_connectors[count++] = *connector;
+        }
        /* We should be able to check here if the fb has the same properties
         * and then just flip_or_move it */
        if (set->crtc->fb != set->fb) {
                /* If we have no fb then treat it as a full mode set */
                if (set->crtc->fb == NULL) {
-                        DRM_DEBUG("crtc has no fb, full mode set\n");
+                        DRM_DEBUG_KMS("crtc has no fb, full mode set\n");
                        mode_changed = true;
                } else if (set->fb == NULL) {
                        mode_changed = true;
@@ -772,7 +771,7 @@ int drm_crtc_helper_set_config(struct drm_mode_set *set)
                fb_changed = true;
        if (set->mode && !drm_mode_equal(set->mode, &set->crtc->mode)) {
-                DRM_DEBUG("modes are different, full mode set\n");
+                DRM_DEBUG_KMS("modes are different, full mode set\n");
                drm_mode_debug_printmodeline(&set->crtc->mode);
                drm_mode_debug_printmodeline(set->mode);
                mode_changed = true;
@@ -783,7 +782,6 @@ int drm_crtc_helper_set_config(struct drm_mode_set *set)
        list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
                struct drm_connector_helper_funcs *connector_funcs =
                        connector->helper_private;
-                save_encoders[count++] = connector->encoder;
                new_encoder = connector->encoder;
                for (ro = 0; ro < set->num_connectors; ro++) {
                        if (set->connectors[ro] == connector) {
@@ -798,15 +796,20 @@ int drm_crtc_helper_set_config(struct drm_mode_set *set)
                }
                if (new_encoder != connector->encoder) {
-                        DRM_DEBUG("encoder changed, full mode switch\n");
+                        DRM_DEBUG_KMS("encoder changed, full mode switch\n");
                        mode_changed = true;
+                        /* If the encoder is reused for another connector, then
+                         * the appropriate crtc will be set later.
+                         */
+                        if (connector->encoder)
+                                connector->encoder->crtc = NULL;
                        connector->encoder = new_encoder;
                }
        }
        if (fail) {
                ret = -EINVAL;
-                goto fail_no_encoder;
+                goto fail;
        }
        count = 0;
@@ -814,8 +817,6 @@ int drm_crtc_helper_set_config(struct drm_mode_set *set)
                if (!connector->encoder)
                        continue;
-                save_crtcs[count++] = connector->encoder->crtc;
                if (connector->encoder->crtc == set->crtc)
                        new_crtc = NULL;
                else
@@ -830,14 +831,14 @@ int drm_crtc_helper_set_config(struct drm_mode_set *set)
                if (new_crtc &&
                    !drm_encoder_crtc_ok(connector->encoder, new_crtc)) {
                        ret = -EINVAL;
-                        goto fail_set_mode;
+                        goto fail;
                }
                if (new_crtc != connector->encoder->crtc) {
-                        DRM_DEBUG("crtc changed, full mode switch\n");
+                        DRM_DEBUG_KMS("crtc changed, full mode switch\n");
                        mode_changed = true;
                        connector->encoder->crtc = new_crtc;
                }
-                DRM_DEBUG("setting connector %d crtc to %p\n",
+                DRM_DEBUG_KMS("setting connector %d crtc to %p\n",
                          connector->base.id, new_crtc);
        }
@@ -850,7 +851,8 @@ int drm_crtc_helper_set_config(struct drm_mode_set *set)
                set->crtc->fb = set->fb;
                set->crtc->enabled = (set->mode != NULL);
                if (set->mode != NULL) {
-                        DRM_DEBUG("attempting to set mode from userspace\n");
+                        DRM_DEBUG_KMS("attempting to set mode from"
+                                        " userspace\n");
                        drm_mode_debug_printmodeline(set->mode);
                        if (!drm_crtc_helper_set_mode(set->crtc, set->mode,
                                                      set->x, set->y,
@@ -858,7 +860,7 @@ int drm_crtc_helper_set_config(struct drm_mode_set *set)
                                DRM_ERROR("failed to set mode on crtc %p\n",
                                          set->crtc);
                                ret = -EINVAL;
-                                goto fail_set_mode;
+                                goto fail;
                        }
                        /* TODO are these needed? */
                        set->crtc->desired_x = set->x;
@@ -867,43 +869,50 @@ int drm_crtc_helper_set_config(struct drm_mode_set *set)
                }
                drm_helper_disable_unused_functions(dev);
        } else if (fb_changed) {
+                set->crtc->x = set->x;
+                set->crtc->y = set->y;
                old_fb = set->crtc->fb;
                if (set->crtc->fb != set->fb)
                        set->crtc->fb = set->fb;
                ret = crtc_funcs->mode_set_base(set->crtc,
                                                set->x, set->y, old_fb);
                if (ret != 0)
-                    goto fail_set_mode;
+                        goto fail;
        }
+        kfree(save_connectors);
        kfree(save_encoders);
        kfree(save_crtcs);
        return 0;
-fail_set_mode:
+fail:
-        set->crtc->enabled = save_enabled;
+        /* Restore all previous data. */
-        set->crtc->fb = old_fb;
        count = 0;
-        list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
+        list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
-                if (!connector->encoder)
+                *crtc = save_crtcs[count++];
-                        continue;
+        }
-                connector->encoder->crtc = save_crtcs[count++];
+        count = 0;
+        list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
+                *encoder = save_encoders[count++];
        }
-fail_no_encoder:
-        kfree(save_crtcs);
        count = 0;
        list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
-                connector->encoder = save_encoders[count++];
+                *connector = save_connectors[count++];
        }
+        kfree(save_connectors);
        kfree(save_encoders);
+        kfree(save_crtcs);
        return ret;
 }
 EXPORT_SYMBOL(drm_crtc_helper_set_config);
 bool drm_helper_plugged_event(struct drm_device *dev)
 {
-        DRM_DEBUG("\n");
+        DRM_DEBUG_KMS("\n");
        drm_helper_probe_connector_modes(dev, dev->mode_config.max_width,
                                         dev->mode_config.max_height);
@@ -932,7 +941,6 @@ bool drm_helper_plugged_event(struct drm_device *dev)
 */
 bool drm_helper_initial_config(struct drm_device *dev)
 {
-        struct drm_connector *connector;
        int count = 0;
        count = drm_helper_probe_connector_modes(dev,
@@ -940,16 +948,9 @@ bool drm_helper_initial_config(struct drm_device *dev)
                                                 dev->mode_config.max_height);
        /*
-         * None of the available connectors had any modes, so add some
+         * we shouldn't end up with no modes here.
-         * and try to light them up anyway
         */
-        if (!count) {
+        WARN(!count, "Connected connector with 0 modes\n");
-                DRM_ERROR("connectors have no modes, using standard modes\n");
-                list_for_each_entry(connector,
-                                    &dev->mode_config.connector_list,
-                                    head)
-                        drm_helper_add_std_modes(dev, connector);
-        }
        drm_setup_crtcs(dev);
diff --git a/drivers/gpu/drm/drm_drv.c b/drivers/gpu/drm/drm_drv.c
index b39d7bfc0c9c..a75ca63deea6 100644
--- a/drivers/gpu/drm/drm_drv.c
+++ b/drivers/gpu/drm/drm_drv.c
@@ -63,12 +63,12 @@ static struct drm_ioctl_desc drm_ioctls[] = {
        DRM_IOCTL_DEF(DRM_IOCTL_GET_MAP, drm_getmap, 0),
        DRM_IOCTL_DEF(DRM_IOCTL_GET_CLIENT, drm_getclient, 0),
        DRM_IOCTL_DEF(DRM_IOCTL_GET_STATS, drm_getstats, 0),
-        DRM_IOCTL_DEF(DRM_IOCTL_SET_VERSION, drm_setversion, DRM_MASTER|DRM_ROOT_ONLY),
+        DRM_IOCTL_DEF(DRM_IOCTL_SET_VERSION, drm_setversion, DRM_MASTER),
        DRM_IOCTL_DEF(DRM_IOCTL_SET_UNIQUE, drm_setunique, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
        DRM_IOCTL_DEF(DRM_IOCTL_BLOCK, drm_noop, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
        DRM_IOCTL_DEF(DRM_IOCTL_UNBLOCK, drm_noop, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
-        DRM_IOCTL_DEF(DRM_IOCTL_AUTH_MAGIC, drm_authmagic, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
+        DRM_IOCTL_DEF(DRM_IOCTL_AUTH_MAGIC, drm_authmagic, DRM_AUTH|DRM_MASTER),
        DRM_IOCTL_DEF(DRM_IOCTL_ADD_MAP, drm_addmap_ioctl, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
        DRM_IOCTL_DEF(DRM_IOCTL_RM_MAP, drm_rmmap_ioctl, DRM_AUTH),
diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index 7f2728bbc16c..90d76bacff17 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -60,6 +60,12 @@
 #define EDID_QUIRK_FIRST_DETAILED_PREFERRED     (1 << 5)
 /* use +hsync +vsync for detailed mode */
 #define EDID_QUIRK_DETAILED_SYNC_PP             (1 << 6)
+/* define the number of Extension EDID block */
+#define MAX_EDID_EXT_NUM 4
+#define LEVEL_DMT       0
+#define LEVEL_GTF       1
+#define LEVEL_CVT       2
 static struct edid_quirk {
        char *vendor;
@@ -237,28 +243,291 @@ static void edid_fixup_preferred(struct drm_connector *connector,
        preferred_mode->type |= DRM_MODE_TYPE_PREFERRED;
 }
+/*
+ * Add the Autogenerated from the DMT spec.
+ * This table is copied from xfree86/modes/xf86EdidModes.c.
+ * But the mode with Reduced blank feature is deleted.
+ */
+static struct drm_display_mode drm_dmt_modes[] = {
+        /* 640x350@85Hz */
+        { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 31500, 640, 672,
+                   736, 832, 0, 350, 382, 385, 445, 0,
+                   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
+        /* 640x400@85Hz */
+        { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 31500, 640, 672,
+                   736, 832, 0, 400, 401, 404, 445, 0,
+                   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
+        /* 720x400@85Hz */
+        { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 35500, 720, 756,
+                   828, 936, 0, 400, 401, 404, 446, 0,
+                   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
+        /* 640x480@60Hz */
+        { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656,
+                   752, 800, 0, 480, 489, 492, 525, 0,
+                   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
+        /* 640x480@72Hz */
+        { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 664,
+                   704, 832, 0, 480, 489, 492, 520, 0,
+                   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
+        /* 640x480@75Hz */
+        { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 656,
+                   720, 840, 0, 480, 481, 484, 500, 0,
+                   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
+        /* 640x480@85Hz */
+        { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 36000, 640, 696,
+                   752, 832, 0, 480, 481, 484, 509, 0,
+                   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
+        /* 800x600@56Hz */
+        { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 36000, 800, 824,
+                   896, 1024, 0, 600, 601, 603, 625, 0,
+                   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
+        /* 800x600@60Hz */
+        { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840,
+                   968, 1056, 0, 600, 601, 605, 628, 0,
+                   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
+        /* 800x600@72Hz */
+        { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 50000, 800, 856,
+                   976, 1040, 0, 600, 637, 643, 666, 0,
+                   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
+        /* 800x600@75Hz */
+        { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 49500, 800, 816,
+                   896, 1056, 0, 600, 601, 604, 625, 0,
+                   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
+        /* 800x600@85Hz */
+        { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 56250, 800, 832,
+                   896, 1048, 0, 600, 601, 604, 631, 0,
+                   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
+        /* 848x480@60Hz */
+        { DRM_MODE("848x480", DRM_MODE_TYPE_DRIVER, 33750, 848, 864,
+                   976, 1088, 0, 480, 486, 494, 517, 0,
+                   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
+        /* 1024x768@43Hz, interlace */
+        { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 44900, 1024, 1032,
+                   1208, 1264, 0, 768, 768, 772, 817, 0,
+                   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
+                        DRM_MODE_FLAG_INTERLACE) },
+        /* 1024x768@60Hz */
+        { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048,
+                   1184, 1344, 0, 768, 771, 777, 806, 0,
+                   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
+        /* 1024x768@70Hz */
+        { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 75000, 1024, 1048,
+                   1184, 1328, 0, 768, 771, 777, 806, 0,
+                   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
+        /* 1024x768@75Hz */
+        { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 78750, 1024, 1040,
+                   1136, 1312, 0, 768, 769, 772, 800, 0,
+                   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
+        /* 1024x768@85Hz */
+        { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 94500, 1024, 1072,
+                   1072, 1376, 0, 768, 769, 772, 808, 0,
+                   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
+        /* 1152x864@75Hz */
+        { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216,
+                   1344, 1600, 0, 864, 865, 868, 900, 0,
+                   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
+        /* 1280x768@60Hz */
+        { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 79500, 1280, 1344,
+                   1472, 1664, 0, 768, 771, 778, 798, 0,
+                   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
+        /* 1280x768@75Hz */
+        { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 102250, 1280, 1360,
+                   1488, 1696, 0, 768, 771, 778, 805, 0,
+                   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
+        /* 1280x768@85Hz */
+        { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 117500, 1280, 1360,
+                   1496, 1712, 0, 768, 771, 778, 809, 0,
+                   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
+        /* 1280x800@60Hz */
+        { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 83500, 1280, 1352,
+                   1480, 1680, 0, 800, 803, 809, 831, 0,
+                   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
+        /* 1280x800@75Hz */
+        { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 106500, 1280, 1360,
+                   1488, 1696, 0, 800, 803, 809, 838, 0,
+                   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
+        /* 1280x800@85Hz */
+        { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 122500, 1280, 1360,
+                   1496, 1712, 0, 800, 803, 809, 843, 0,
+                   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
+        /* 1280x960@60Hz */
+        { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1376,
+                   1488, 1800, 0, 960, 961, 964, 1000, 0,
+                   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
+        /* 1280x960@85Hz */
+        { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1344,
+                   1504, 1728, 0, 960, 961, 964, 1011, 0,
+                   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
+        /* 1280x1024@60Hz */
+        { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1328,
+                   1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
+                   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
+        /* 1280x1024@75Hz */
+        { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 135000, 1280, 1296,
+                   1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
+                   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
+        /* 1280x1024@85Hz */
+        { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 157500, 1280, 1344,
+                   1504, 1728, 0, 1024, 1025, 1028, 1072, 0,
+                   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
+        /* 1360x768@60Hz */
+        { DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER, 85500, 1360, 1424,
+                   1536, 1792, 0, 768, 771, 777, 795, 0,
+                   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
+        /* 1440x1050@60Hz */
+        { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 121750, 1400, 1488,
+                   1632, 1864, 0, 1050, 1053, 1057, 1089, 0,
+                   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
+        /* 1440x1050@75Hz */
+        { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 156000, 1400, 1504,
+                   1648, 1896, 0, 1050, 1053, 1057, 1099, 0,
+                   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
+        /* 1440x1050@85Hz */
+        { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 179500, 1400, 1504,
+                   1656, 1912, 0, 1050, 1053, 1057, 1105, 0,
+                   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
+        /* 1440x900@60Hz */
+        { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 106500, 1440, 1520,
+                   1672, 1904, 0, 900, 903, 909, 934, 0,
+                   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
+        /* 1440x900@75Hz */
+        { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 136750, 1440, 1536,
+                   1688, 1936, 0, 900, 903, 909, 942, 0,
+                   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
+        /* 1440x900@85Hz */
+        { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 157000, 1440, 1544,
+                   1696, 1952, 0, 900, 903, 909, 948, 0,
+                   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
+        /* 1600x1200@60Hz */
+        { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 162000, 1600, 1664,
+                   1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
+                   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
+        /* 1600x1200@65Hz */
+        { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 175500, 1600, 1664,
+                   1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
+                   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
+        /* 1600x1200@70Hz */
+        { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 189000, 1600, 1664,
+                   1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
+                   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
+        /* 1600x1200@75Hz */
+        { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 2025000, 1600, 1664,
+                   1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
+                   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
+        /* 1600x1200@85Hz */
+        { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 229500, 1600, 1664,
+                   1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
+                   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
+        /* 1680x1050@60Hz */
+        { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 146250, 1680, 1784,
+                   1960, 2240, 0, 1050, 1053, 1059, 1089, 0,
+                   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
+        /* 1680x1050@75Hz */
+        { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 187000, 1680, 1800,
+                   1976, 2272, 0, 1050, 1053, 1059, 1099, 0,
+                   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
+        /* 1680x1050@85Hz */
+        { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 214750, 1680, 1808,
+                   1984, 2288, 0, 1050, 1053, 1059, 1105, 0,
+                   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
+        /* 1792x1344@60Hz */
+        { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 204750, 1792, 1920,
+                   2120, 2448, 0, 1344, 1345, 1348, 1394, 0,
+                   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
+        /* 1729x1344@75Hz */
+        { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 261000, 1792, 1888,
+                   2104, 2456, 0, 1344, 1345, 1348, 1417, 0,
+                   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
+        /* 1853x1392@60Hz */
+        { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 218250, 1856, 1952,
+                   2176, 2528, 0, 1392, 1393, 1396, 1439, 0,
+                   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
+        /* 1856x1392@75Hz */
+        { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 288000, 1856, 1984,
+                   2208, 2560, 0, 1392, 1395, 1399, 1500, 0,
+                   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
+        /* 1920x1200@60Hz */
+        { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 193250, 1920, 2056,
+                   2256, 2592, 0, 1200, 1203, 1209, 1245, 0,
+                   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
+        /* 1920x1200@75Hz */
+        { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 245250, 1920, 2056,
+                   2264, 2608, 0, 1200, 1203, 1209, 1255, 0,
+                   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
+        /* 1920x1200@85Hz */
+        { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 281250, 1920, 2064,
+                   2272, 2624, 0, 1200, 1203, 1209, 1262, 0,
+                   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
+        /* 1920x1440@60Hz */
+        { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 234000, 1920, 2048,
+                   2256, 2600, 0, 1440, 1441, 1444, 1500, 0,
+                   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
+        /* 1920x1440@75Hz */
+        { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2064,
+                   2288, 2640, 0, 1440, 1441, 1444, 1500, 0,
+                   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
+        /* 2560x1600@60Hz */
+        { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 348500, 2560, 2752,
+                   3032, 3504, 0, 1600, 1603, 1609, 1658, 0,
+                   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
+        /* 2560x1600@75HZ */
+        { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 443250, 2560, 2768,
+                   3048, 3536, 0, 1600, 1603, 1609, 1672, 0,
+                   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
+        /* 2560x1600@85HZ */
+        { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 505250, 2560, 2768,
+                   3048, 3536, 0, 1600, 1603, 1609, 1682, 0,
+                   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
+};
+static struct drm_display_mode *drm_find_dmt(struct drm_device *dev,
+                        int hsize, int vsize, int fresh)
+{
+        int i, count;
+        struct drm_display_mode *ptr, *mode;
+        count = sizeof(drm_dmt_modes) / sizeof(struct drm_display_mode);
+        mode = NULL;
+        for (i = 0; i < count; i++) {
+                ptr = &drm_dmt_modes[i];
+                if (hsize == ptr->hdisplay &&
+                        vsize == ptr->vdisplay &&
+                        fresh == drm_mode_vrefresh(ptr)) {
+                        /* get the expected default mode */
+                        mode = drm_mode_duplicate(dev, ptr);
+                        break;
+                }
+        }
+        return mode;
+}
 /**
 * drm_mode_std - convert standard mode info (width, height, refresh) into mode
 * @t: standard timing params
+ * @timing_level: standard timing level
 *
 * Take the standard timing params (in this case width, aspect, and refresh)
- * and convert them into a real mode using CVT.
+ * and convert them into a real mode using CVT/GTF/DMT.
 *
 * Punts for now, but should eventually use the FB layer's CVT based mode
 * generation code.
 */
 struct drm_display_mode *drm_mode_std(struct drm_device *dev,
-                                      struct std_timing *t)
+                                      struct std_timing *t,
+                                      int timing_level)
 {
        struct drm_display_mode *mode;
-        int hsize = t->hsize * 8 + 248, vsize;
+        int hsize, vsize;
+        int vrefresh_rate;
        unsigned aspect_ratio = (t->vfreq_aspect & EDID_TIMING_ASPECT_MASK)
                >> EDID_TIMING_ASPECT_SHIFT;
+        unsigned vfreq = (t->vfreq_aspect & EDID_TIMING_VFREQ_MASK)
-        mode = drm_mode_create(dev);
+                >> EDID_TIMING_VFREQ_SHIFT;
-        if (!mode)
-                return NULL;
+        /* According to the EDID spec, the hdisplay = hsize * 8 + 248 */
+        hsize = t->hsize * 8 + 248;
+        /* vrefresh_rate = vfreq + 60 */
+        vrefresh_rate = vfreq + 60;
+        /* the vdisplay is calculated based on the aspect ratio */
        if (aspect_ratio == 0)
                vsize = (hsize * 10) / 16;
        else if (aspect_ratio == 1)
@@ -267,9 +536,30 @@ struct drm_display_mode *drm_mode_std(struct drm_device *dev,
                vsize = (hsize * 4) / 5;
        else
                vsize = (hsize * 9) / 16;
+        /* HDTV hack */
-        drm_mode_set_name(mode);
+        if (hsize == 1360 && vsize == 765 && vrefresh_rate == 60) {
+                mode = drm_cvt_mode(dev, hsize, vsize, vrefresh_rate, 0, 0);
+                mode->hdisplay = 1366;
+                mode->vsync_start = mode->vsync_start - 1;
+                mode->vsync_end = mode->vsync_end - 1;
+                return mode;
+        }
+        mode = NULL;
+        /* check whether it can be found in default mode table */
+        mode = drm_find_dmt(dev, hsize, vsize, vrefresh_rate);
+        if (mode)
+                return mode;
+        switch (timing_level) {
+        case LEVEL_DMT:
+                break;
+        case LEVEL_GTF:
+                mode = drm_gtf_mode(dev, hsize, vsize, vrefresh_rate, 0, 0);
+                break;
+        case LEVEL_CVT:
+                mode = drm_cvt_mode(dev, hsize, vsize, vrefresh_rate, 0, 0);
+                break;
+        }
        return mode;
 }
@@ -451,6 +741,19 @@ static int add_established_modes(struct drm_connector *connector, struct edid *e
        return modes;
 }
+/**
+ * stanard_timing_level - get std. timing level(CVT/GTF/DMT)
+ * @edid: EDID block to scan
+ */
+static int standard_timing_level(struct edid *edid)
+{
+        if (edid->revision >= 2) {
+                if (edid->revision >= 4 && (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF))
+                        return LEVEL_CVT;
+                return LEVEL_GTF;
+        }
+        return LEVEL_DMT;
+}
 /**
 * add_standard_modes - get std. modes from EDID and add them
@@ -463,6 +766,9 @@ static int add_standard_modes(struct drm_connector *connector, struct edid *edid
 {
        struct drm_device *dev = connector->dev;
        int i, modes = 0;
+        int timing_level;
+        timing_level = standard_timing_level(edid);
        for (i = 0; i < EDID_STD_TIMINGS; i++) {
                struct std_timing *t = &edid->standard_timings[i];
@@ -472,7 +778,8 @@ static int add_standard_modes(struct drm_connector *connector, struct edid *edid
                if (t->hsize == 1 && t->vfreq_aspect == 1)
                        continue;
-                newmode = drm_mode_std(dev, &edid->standard_timings[i]);
+                newmode = drm_mode_std(dev, &edid->standard_timings[i],
+                                        timing_level);
                if (newmode) {
                        drm_mode_probed_add(connector, newmode);
                        modes++;
@@ -496,6 +803,9 @@ static int add_detailed_info(struct drm_connector *connector,
 {
        struct drm_device *dev = connector->dev;
        int i, j, modes = 0;
+        int timing_level;
+        timing_level = standard_timing_level(edid);
        for (i = 0; i < EDID_DETAILED_TIMINGS; i++) {
                struct detailed_timing *timing = &edid->detailed_timings[i];
@@ -525,7 +835,8 @@ static int add_detailed_info(struct drm_connector *connector,
                                        struct drm_display_mode *newmode;
                                        std = &data->data.timings[j];
-                                        newmode = drm_mode_std(dev, std);
+                                        newmode = drm_mode_std(dev, std,
+                                                               timing_level);
                                        if (newmode) {
                                                drm_mode_probed_add(connector, newmode);
                                                modes++;
@@ -551,6 +862,122 @@ static int add_detailed_info(struct drm_connector *connector,
        return modes;
 }
+/**
+ * add_detailed_mode_eedid - get detailed mode info from addtional timing
+ *                      EDID block
+ * @connector: attached connector
+ * @edid: EDID block to scan(It is only to get addtional timing EDID block)
+ * @quirks: quirks to apply
+ *
+ * Some of the detailed timing sections may contain mode information.  Grab
+ * it and add it to the list.
+ */
+static int add_detailed_info_eedid(struct drm_connector *connector,
+                             struct edid *edid, u32 quirks)
+{
+        struct drm_device *dev = connector->dev;
+        int i, j, modes = 0;
+        char *edid_ext = NULL;
+        struct detailed_timing *timing;
+        struct detailed_non_pixel *data;
+        struct drm_display_mode *newmode;
+        int edid_ext_num;
+        int start_offset, end_offset;
+        int timing_level;
+        if (edid->version == 1 && edid->revision < 3) {
+                /* If the EDID version is less than 1.3, there is no
+                 * extension EDID.
+                 */
+                return 0;
+        }
+        if (!edid->extensions) {
+                /* if there is no extension EDID, it is unnecessary to
+                 * parse the E-EDID to get detailed info
+                 */
+                return 0;
+        }
+        /* Chose real EDID extension number */
+        edid_ext_num = edid->extensions > MAX_EDID_EXT_NUM ?
+                       MAX_EDID_EXT_NUM : edid->extensions;
+        /* Find CEA extension */
+        for (i = 0; i < edid_ext_num; i++) {
+                edid_ext = (char *)edid + EDID_LENGTH * (i + 1);
+                /* This block is CEA extension */
+                if (edid_ext[0] == 0x02)
+                        break;
+        }
+        if (i == edid_ext_num) {
+                /* if there is no additional timing EDID block, return */
+                return 0;
+        }
+        /* Get the start offset of detailed timing block */
+        start_offset = edid_ext[2];
+        if (start_offset == 0) {
+                /* If the start_offset is zero, it means that neither detailed
+                 * info nor data block exist. In such case it is also
+                 * unnecessary to parse the detailed timing info.
+                 */
+                return 0;
+        }
+        timing_level = standard_timing_level(edid);
+        end_offset = EDID_LENGTH;
+        end_offset -= sizeof(struct detailed_timing);
+        for (i = start_offset; i < end_offset;
+                        i += sizeof(struct detailed_timing)) {
+                timing = (struct detailed_timing *)(edid_ext + i);
+                data = &timing->data.other_data;
+                /* Detailed mode timing */
+                if (timing->pixel_clock) {
+                        newmode = drm_mode_detailed(dev, edid, timing, quirks);
+                        if (!newmode)
+                                continue;
+                        drm_mode_probed_add(connector, newmode);
+                        modes++;
+                        continue;
+                }
+                /* Other timing or info */
+                switch (data->type) {
+                case EDID_DETAIL_MONITOR_SERIAL:
+                        break;
+                case EDID_DETAIL_MONITOR_STRING:
+                        break;
+                case EDID_DETAIL_MONITOR_RANGE:
+                        /* Get monitor range data */
+                        break;
+                case EDID_DETAIL_MONITOR_NAME:
+                        break;
+                case EDID_DETAIL_MONITOR_CPDATA:
+                        break;
+                case EDID_DETAIL_STD_MODES:
+                        /* Five modes per detailed section */
+                        for (j = 0; j < 5; i++) {
+                                struct std_timing *std;
+                                struct drm_display_mode *newmode;
+                                std = &data->data.timings[j];
+                                newmode = drm_mode_std(dev, std, timing_level);
+                                if (newmode) {
+                                        drm_mode_probed_add(connector, newmode);
+                                        modes++;
+                                }
+                        }
+                        break;
+                default:
+                        break;
+                }
+        }
+        return modes;
+}
 #define DDC_ADDR 0x50
 /**
@@ -584,7 +1011,6 @@ int drm_do_probe_ddc_edid(struct i2c_adapter *adapter,
        if (i2c_transfer(adapter, msgs, 2) == 2)
                return 0;
-        dev_info(&adapter->dev, "unable to read EDID block.\n");
        return -1;
 }
 EXPORT_SYMBOL(drm_do_probe_ddc_edid);
@@ -597,8 +1023,6 @@ static int drm_ddc_read_edid(struct drm_connector *connector,
        ret = drm_do_probe_ddc_edid(adapter, buf, len);
        if (ret != 0) {
-                dev_info(&connector->dev->pdev->dev, "%s: no EDID data\n",
-                         drm_get_connector_name(connector));
                goto end;
        }
        if (!edid_is_valid((struct edid *)buf)) {
@@ -610,7 +1034,6 @@ end:
        return ret;
 }
-#define MAX_EDID_EXT_NUM 4
 /**
 * drm_get_edid - get EDID data, if available
 * @connector: connector we're probing
@@ -763,6 +1186,7 @@ int drm_add_edid_modes(struct drm_connector *connector, struct edid *edid)
        num_modes += add_established_modes(connector, edid);
        num_modes += add_standard_modes(connector, edid);
        num_modes += add_detailed_info(connector, edid, quirks);
+        num_modes += add_detailed_info_eedid(connector, edid, quirks);
        if (quirks & (EDID_QUIRK_PREFER_LARGE_60 | EDID_QUIRK_PREFER_LARGE_75))
                edid_fixup_preferred(connector, quirks);
@@ -788,3 +1212,49 @@ int drm_add_edid_modes(struct drm_connector *connector, struct edid *edid)
        return num_modes;
 }
 EXPORT_SYMBOL(drm_add_edid_modes);
+/**
+ * drm_add_modes_noedid - add modes for the connectors without EDID
+ * @connector: connector we're probing
+ * @hdisplay: the horizontal display limit
+ * @vdisplay: the vertical display limit
+ *
+ * Add the specified modes to the connector's mode list. Only when the
+ * hdisplay/vdisplay is not beyond the given limit, it will be added.
+ *
+ * Return number of modes added or 0 if we couldn't find any.
+ */
+int drm_add_modes_noedid(struct drm_connector *connector,
+                        int hdisplay, int vdisplay)
+{
+        int i, count, num_modes = 0;
+        struct drm_display_mode *mode, *ptr;
+        struct drm_device *dev = connector->dev;
+        count = sizeof(drm_dmt_modes) / sizeof(struct drm_display_mode);
+        if (hdisplay < 0)
+                hdisplay = 0;
+        if (vdisplay < 0)
+                vdisplay = 0;
+        for (i = 0; i < count; i++) {
+                ptr = &drm_dmt_modes[i];
+                if (hdisplay && vdisplay) {
+                        /*
+                         * Only when two are valid, they will be used to check
+                         * whether the mode should be added to the mode list of
+                         * the connector.
+                         */
+                        if (ptr->hdisplay > hdisplay ||
+                                        ptr->vdisplay > vdisplay)
+                                continue;
+                }
+                mode = drm_mode_duplicate(dev, ptr);
+                if (mode) {
+                        drm_mode_probed_add(connector, mode);
+                        num_modes++;
+                }
+        }
+        return num_modes;
+}
+EXPORT_SYMBOL(drm_add_modes_noedid);
diff --git a/drivers/gpu/drm/drm_encoder_slave.c b/drivers/gpu/drm/drm_encoder_slave.c
new file mode 100644
index 000000000000..f0184696edf3
--- /dev/null
+++ b/drivers/gpu/drm/drm_encoder_slave.c
@@ -0,0 +1,116 @@
+/*
+ * Copyright (C) 2009 Francisco Jerez.
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial
+ * portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ */
+#include "drm_encoder_slave.h"
+/**
+ * drm_i2c_encoder_init - Initialize an I2C slave encoder
+ * @dev:        DRM device.
+ * @encoder:    Encoder to be attached to the I2C device. You aren't
+ *              required to have called drm_encoder_init() before.
+ * @adap:       I2C adapter that will be used to communicate with
+ *              the device.
+ * @info:       Information that will be used to create the I2C device.
+ *              Required fields are @addr and @type.
+ *
+ * Create an I2C device on the specified bus (the module containing its
+ * driver is transparently loaded) and attach it to the specified
+ * &drm_encoder_slave. The @slave_funcs field will be initialized with
+ * the hooks provided by the slave driver.
+ *
+ * Returns 0 on success or a negative errno on failure, in particular,
+ * -ENODEV is returned when no matching driver is found.
+ */
+int drm_i2c_encoder_init(struct drm_device *dev,
+                         struct drm_encoder_slave *encoder,
+                         struct i2c_adapter *adap,
+                         const struct i2c_board_info *info)
+{
+        char modalias[sizeof(I2C_MODULE_PREFIX)
+                      + I2C_NAME_SIZE];
+        struct module *module = NULL;
+        struct i2c_client *client;
+        struct drm_i2c_encoder_driver *encoder_drv;
+        int err = 0;
+        snprintf(modalias, sizeof(modalias),
+                 "%s%s", I2C_MODULE_PREFIX, info->type);
+        request_module(modalias);
+        client = i2c_new_device(adap, info);
+        if (!client) {
+                err = -ENOMEM;
+                goto fail;
+        }
+        if (!client->driver) {
+                err = -ENODEV;
+                goto fail_unregister;
+        }
+        module = client->driver->driver.owner;
+        if (!try_module_get(module)) {
+                err = -ENODEV;
+                goto fail_unregister;
+        }
+        encoder->bus_priv = client;
+        encoder_drv = to_drm_i2c_encoder_driver(client->driver);
+        err = encoder_drv->encoder_init(client, dev, encoder);
+        if (err)
+                goto fail_unregister;
+        return 0;
+fail_unregister:
+        i2c_unregister_device(client);
+        module_put(module);
+fail:
+        return err;
+}
+EXPORT_SYMBOL(drm_i2c_encoder_init);
+/**
+ * drm_i2c_encoder_destroy - Unregister the I2C device backing an encoder
+ * @drm_encoder:        Encoder to be unregistered.
+ *
+ * This should be called from the @destroy method of an I2C slave
+ * encoder driver once I2C access is no longer needed.
+ */
+void drm_i2c_encoder_destroy(struct drm_encoder *drm_encoder)
+{
+        struct drm_encoder_slave *encoder = to_encoder_slave(drm_encoder);
+        struct i2c_client *client = drm_i2c_encoder_get_client(drm_encoder);
+        struct module *module = client->driver->driver.owner;
+        i2c_unregister_device(client);
+        encoder->bus_priv = NULL;
+        module_put(module);
+}
+EXPORT_SYMBOL(drm_i2c_encoder_destroy);
diff --git a/drivers/gpu/drm/drm_fb_helper.c b/drivers/gpu/drm/drm_fb_helper.c
new file mode 100644
index 000000000000..2c4671314884
--- /dev/null
+++ b/drivers/gpu/drm/drm_fb_helper.c
@@ -0,0 +1,707 @@
+/*
+ * Copyright (c) 2006-2009 Red Hat Inc.
+ * Copyright (c) 2006-2008 Intel Corporation
+ * Copyright (c) 2007 Dave Airlie <airlied@linux.ie>
+ *
+ * DRM framebuffer helper functions
+ *
+ * Permission to use, copy, modify, distribute, and sell this software and its
+ * documentation for any purpose is hereby granted without fee, provided that
+ * the above copyright notice appear in all copies and that both that copyright
+ * notice and this permission notice appear in supporting documentation, and
+ * that the name of the copyright holders not be used in advertising or
+ * publicity pertaining to distribution of the software without specific,
+ * written prior permission.  The copyright holders make no representations
+ * about the suitability of this software for any purpose.  It is provided "as
+ * is" without express or implied warranty.
+ *
+ * THE COPYRIGHT HOLDERS DISCLAIM ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
+ * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
+ * EVENT SHALL THE COPYRIGHT HOLDERS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
+ * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
+ * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
+ * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE
+ * OF THIS SOFTWARE.
+ *
+ * Authors:
+ *      Dave Airlie <airlied@linux.ie>
+ *      Jesse Barnes <jesse.barnes@intel.com>
+ */
+#include <linux/sysrq.h>
+#include <linux/fb.h>
+#include "drmP.h"
+#include "drm_crtc.h"
+#include "drm_fb_helper.h"
+#include "drm_crtc_helper.h"
+MODULE_AUTHOR("David Airlie, Jesse Barnes");
+MODULE_DESCRIPTION("DRM KMS helper");
+MODULE_LICENSE("GPL and additional rights");
+static LIST_HEAD(kernel_fb_helper_list);
+bool drm_fb_helper_force_kernel_mode(void)
+{
+        int i = 0;
+        bool ret, error = false;
+        struct drm_fb_helper *helper;
+        if (list_empty(&kernel_fb_helper_list))
+                return false;
+        list_for_each_entry(helper, &kernel_fb_helper_list, kernel_fb_list) {
+                for (i = 0; i < helper->crtc_count; i++) {
+                        struct drm_mode_set *mode_set = &helper->crtc_info[i].mode_set;
+                        ret = drm_crtc_helper_set_config(mode_set);
+                        if (ret)
+                                error = true;
+                }
+        }
+        return error;
+}
+int drm_fb_helper_panic(struct notifier_block *n, unsigned long ununsed,
+                        void *panic_str)
+{
+        DRM_ERROR("panic occurred, switching back to text console\n");
+        return drm_fb_helper_force_kernel_mode();
+        return 0;
+}
+EXPORT_SYMBOL(drm_fb_helper_panic);
+static struct notifier_block paniced = {
+        .notifier_call = drm_fb_helper_panic,
+};
+/**
+ * drm_fb_helper_restore - restore the framebuffer console (kernel) config
+ *
+ * Restore's the kernel's fbcon mode, used for lastclose & panic paths.
+ */
+void drm_fb_helper_restore(void)
+{
+        bool ret;
+        ret = drm_fb_helper_force_kernel_mode();
+        if (ret == true)
+                DRM_ERROR("Failed to restore crtc configuration\n");
+}
+EXPORT_SYMBOL(drm_fb_helper_restore);
+static void drm_fb_helper_restore_work_fn(struct work_struct *ignored)
+{
+        drm_fb_helper_restore();
+}
+static DECLARE_WORK(drm_fb_helper_restore_work, drm_fb_helper_restore_work_fn);
+static void drm_fb_helper_sysrq(int dummy1, struct tty_struct *dummy3)
+{
+        schedule_work(&drm_fb_helper_restore_work);
+}
+static struct sysrq_key_op sysrq_drm_fb_helper_restore_op = {
+        .handler = drm_fb_helper_sysrq,
+        .help_msg = "force-fb(V)",
+        .action_msg = "Restore framebuffer console",
+};
+static void drm_fb_helper_on(struct fb_info *info)
+{
+        struct drm_fb_helper *fb_helper = info->par;
+        struct drm_device *dev = fb_helper->dev;
+        struct drm_crtc *crtc;
+        struct drm_encoder *encoder;
+        int i;
+        /*
+         * For each CRTC in this fb, turn the crtc on then,
+         * find all associated encoders and turn them on.
+         */
+        for (i = 0; i < fb_helper->crtc_count; i++) {
+                list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
+                        struct drm_crtc_helper_funcs *crtc_funcs =
+                                crtc->helper_private;
+                        /* Only mess with CRTCs in this fb */
+                        if (crtc->base.id != fb_helper->crtc_info[i].crtc_id ||
+                            !crtc->enabled)
+                                continue;
+                        mutex_lock(&dev->mode_config.mutex);
+                        crtc_funcs->dpms(crtc, DRM_MODE_DPMS_ON);
+                        mutex_unlock(&dev->mode_config.mutex);
+                        /* Found a CRTC on this fb, now find encoders */
+                        list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
+                                if (encoder->crtc == crtc) {
+                                        struct drm_encoder_helper_funcs *encoder_funcs;
+                                        encoder_funcs = encoder->helper_private;
+                                        mutex_lock(&dev->mode_config.mutex);
+                                        encoder_funcs->dpms(encoder, DRM_MODE_DPMS_ON);
+                                        mutex_unlock(&dev->mode_config.mutex);
+                                }
+                        }
+                }
+        }
+}
+static void drm_fb_helper_off(struct fb_info *info, int dpms_mode)
+{
+        struct drm_fb_helper *fb_helper = info->par;
+        struct drm_device *dev = fb_helper->dev;
+        struct drm_crtc *crtc;
+        struct drm_encoder *encoder;
+        int i;
+        /*
+         * For each CRTC in this fb, find all associated encoders
+         * and turn them off, then turn off the CRTC.
+         */
+        for (i = 0; i < fb_helper->crtc_count; i++) {
+                list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
+                        struct drm_crtc_helper_funcs *crtc_funcs =
+                                crtc->helper_private;
+                        /* Only mess with CRTCs in this fb */
+                        if (crtc->base.id != fb_helper->crtc_info[i].crtc_id ||
+                            !crtc->enabled)
+                                continue;
+                        /* Found a CRTC on this fb, now find encoders */
+                        list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
+                                if (encoder->crtc == crtc) {
+                                        struct drm_encoder_helper_funcs *encoder_funcs;
+                                        encoder_funcs = encoder->helper_private;
+                                        mutex_lock(&dev->mode_config.mutex);
+                                        encoder_funcs->dpms(encoder, dpms_mode);
+                                        mutex_unlock(&dev->mode_config.mutex);
+                                }
+                        }
+                        if (dpms_mode == DRM_MODE_DPMS_OFF) {
+                                mutex_lock(&dev->mode_config.mutex);
+                                crtc_funcs->dpms(crtc, dpms_mode);
+                                mutex_unlock(&dev->mode_config.mutex);
+                        }
+                }
+        }
+}
+int drm_fb_helper_blank(int blank, struct fb_info *info)
+{
+        switch (blank) {
+        case FB_BLANK_UNBLANK:
+                drm_fb_helper_on(info);
+                break;
+        case FB_BLANK_NORMAL:
+                drm_fb_helper_off(info, DRM_MODE_DPMS_STANDBY);
+                break;
+        case FB_BLANK_HSYNC_SUSPEND:
+                drm_fb_helper_off(info, DRM_MODE_DPMS_STANDBY);
+                break;
+        case FB_BLANK_VSYNC_SUSPEND:
+                drm_fb_helper_off(info, DRM_MODE_DPMS_SUSPEND);
+                break;
+        case FB_BLANK_POWERDOWN:
+                drm_fb_helper_off(info, DRM_MODE_DPMS_OFF);
+                break;
+        }
+        return 0;
+}
+EXPORT_SYMBOL(drm_fb_helper_blank);
+static void drm_fb_helper_crtc_free(struct drm_fb_helper *helper)
+{
+        int i;
+        for (i = 0; i < helper->crtc_count; i++)
+                kfree(helper->crtc_info[i].mode_set.connectors);
+        kfree(helper->crtc_info);
+}
+int drm_fb_helper_init_crtc_count(struct drm_fb_helper *helper, int crtc_count, int max_conn_count)
+{
+        struct drm_device *dev = helper->dev;
+        struct drm_crtc *crtc;
+        int ret = 0;
+        int i;
+        helper->crtc_info = kcalloc(crtc_count, sizeof(struct drm_fb_helper_crtc), GFP_KERNEL);
+        if (!helper->crtc_info)
+                return -ENOMEM;
+        helper->crtc_count = crtc_count;
+        for (i = 0; i < crtc_count; i++) {
+                helper->crtc_info[i].mode_set.connectors =
+                        kcalloc(max_conn_count,
+                                sizeof(struct drm_connector *),
+                                GFP_KERNEL);
+                if (!helper->crtc_info[i].mode_set.connectors) {
+                        ret = -ENOMEM;
+                        goto out_free;
+                }
+                helper->crtc_info[i].mode_set.num_connectors = 0;
+        }
+        i = 0;
+        list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
+                helper->crtc_info[i].crtc_id = crtc->base.id;
+                helper->crtc_info[i].mode_set.crtc = crtc;
+                i++;
+        }
+        helper->conn_limit = max_conn_count;
+        return 0;
+out_free:
+        drm_fb_helper_crtc_free(helper);
+        return -ENOMEM;
+}
+EXPORT_SYMBOL(drm_fb_helper_init_crtc_count);
+int drm_fb_helper_setcolreg(unsigned regno,
+                            unsigned red,
+                            unsigned green,
+                            unsigned blue,
+                            unsigned transp,
+                            struct fb_info *info)
+{
+        struct drm_fb_helper *fb_helper = info->par;
+        struct drm_device *dev = fb_helper->dev;
+        struct drm_crtc *crtc;
+        int i;
+        list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
+                struct drm_framebuffer *fb = fb_helper->fb;
+                for (i = 0; i < fb_helper->crtc_count; i++) {
+                        if (crtc->base.id == fb_helper->crtc_info[i].crtc_id)
+                                break;
+                }
+                if (i == fb_helper->crtc_count)
+                        continue;
+                if (regno > 255)
+                        return 1;
+                if (fb->depth == 8) {
+                        fb_helper->funcs->gamma_set(crtc, red, green, blue, regno);
+                        return 0;
+                }
+                if (regno < 16) {
+                        switch (fb->depth) {
+                        case 15:
+                                fb->pseudo_palette[regno] = ((red & 0xf800) >> 1) |
+                                        ((green & 0xf800) >>  6) |
+                                        ((blue & 0xf800) >> 11);
+                                break;
+                        case 16:
+                                fb->pseudo_palette[regno] = (red & 0xf800) |
+                                        ((green & 0xfc00) >>  5) |
+                                        ((blue  & 0xf800) >> 11);
+                                break;
+                        case 24:
+                        case 32:
+                                fb->pseudo_palette[regno] =
+                                        (((red >> 8) & 0xff) << info->var.red.offset) |
+                                        (((green >> 8) & 0xff) << info->var.green.offset) |
+                                        (((blue >> 8) & 0xff) << info->var.blue.offset);
+                                break;
+                        }
+                }
+        }
+        return 0;
+}
+EXPORT_SYMBOL(drm_fb_helper_setcolreg);
+int drm_fb_helper_check_var(struct fb_var_screeninfo *var,
+                            struct fb_info *info)
+{
+        struct drm_fb_helper *fb_helper = info->par;
+        struct drm_framebuffer *fb = fb_helper->fb;
+        int depth;
+        if (var->pixclock == -1 || !var->pixclock)
+                return -EINVAL;
+        /* Need to resize the fb object !!! */
+        if (var->xres > fb->width || var->yres > fb->height) {
+                DRM_ERROR("Requested width/height is greater than current fb "
+                           "object %dx%d > %dx%d\n", var->xres, var->yres,
+                           fb->width, fb->height);
+                DRM_ERROR("Need resizing code.\n");
+                return -EINVAL;
+        }
+        switch (var->bits_per_pixel) {
+        case 16:
+                depth = (var->green.length == 6) ? 16 : 15;
+                break;
+        case 32:
+                depth = (var->transp.length > 0) ? 32 : 24;
+                break;
+        default:
+                depth = var->bits_per_pixel;
+                break;
+        }
+        switch (depth) {
+        case 8:
+                var->red.offset = 0;
+                var->green.offset = 0;
+                var->blue.offset = 0;
+                var->red.length = 8;
+                var->green.length = 8;
+                var->blue.length = 8;
+                var->transp.length = 0;
+                var->transp.offset = 0;
+                break;
+        case 15:
+                var->red.offset = 10;
+                var->green.offset = 5;
+                var->blue.offset = 0;
+                var->red.length = 5;
+                var->green.length = 5;
+                var->blue.length = 5;
+                var->transp.length = 1;
+                var->transp.offset = 15;
+                break;
+        case 16:
+                var->red.offset = 11;
+                var->green.offset = 5;
+                var->blue.offset = 0;
+                var->red.length = 5;
+                var->green.length = 6;
+                var->blue.length = 5;
+                var->transp.length = 0;
+                var->transp.offset = 0;
+                break;
+        case 24:
+                var->red.offset = 16;
+                var->green.offset = 8;
+                var->blue.offset = 0;
+                var->red.length = 8;
+                var->green.length = 8;
+                var->blue.length = 8;
+                var->transp.length = 0;
+                var->transp.offset = 0;
+                break;
+        case 32:
+                var->red.offset = 16;
+                var->green.offset = 8;
+                var->blue.offset = 0;
+                var->red.length = 8;
+                var->green.length = 8;
+                var->blue.length = 8;
+                var->transp.length = 8;
+                var->transp.offset = 24;
+                break;
+        default:
+                return -EINVAL;
+        }
+        return 0;
+}
+EXPORT_SYMBOL(drm_fb_helper_check_var);
+/* this will let fbcon do the mode init */
+int drm_fb_helper_set_par(struct fb_info *info)
+{
+        struct drm_fb_helper *fb_helper = info->par;
+        struct drm_device *dev = fb_helper->dev;
+        struct fb_var_screeninfo *var = &info->var;
+        struct drm_crtc *crtc;
+        int ret;
+        int i;
+        if (var->pixclock != -1) {
+                DRM_ERROR("PIXEL CLCOK SET\n");
+                return -EINVAL;
+        }
+        list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
+                for (i = 0; i < fb_helper->crtc_count; i++) {
+                        if (crtc->base.id == fb_helper->crtc_info[i].crtc_id)
+                                break;
+                }
+                if (i == fb_helper->crtc_count)
+                        continue;
+                if (crtc->fb == fb_helper->crtc_info[i].mode_set.fb) {
+                        mutex_lock(&dev->mode_config.mutex);
+                        ret = crtc->funcs->set_config(&fb_helper->crtc_info->mode_set);
+                        mutex_unlock(&dev->mode_config.mutex);
+                        if (ret)
+                                return ret;
+                }
+        }
+        return 0;
+}
+EXPORT_SYMBOL(drm_fb_helper_set_par);
+int drm_fb_helper_pan_display(struct fb_var_screeninfo *var,
+                              struct fb_info *info)
+{
+        struct drm_fb_helper *fb_helper = info->par;
+        struct drm_device *dev = fb_helper->dev;
+        struct drm_mode_set *modeset;
+        struct drm_crtc *crtc;
+        int ret = 0;
+        int i;
+        list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
+                for (i = 0; i < fb_helper->crtc_count; i++) {
+                        if (crtc->base.id == fb_helper->crtc_info[i].crtc_id)
+                                break;
+                }
+                if (i == fb_helper->crtc_count)
+                        continue;
+                modeset = &fb_helper->crtc_info[i].mode_set;
+                modeset->x = var->xoffset;
+                modeset->y = var->yoffset;
+                if (modeset->num_connectors) {
+                        mutex_lock(&dev->mode_config.mutex);
+                        ret = crtc->funcs->set_config(modeset);
+                        mutex_unlock(&dev->mode_config.mutex);
+                        if (!ret) {
+                                info->var.xoffset = var->xoffset;
+                                info->var.yoffset = var->yoffset;
+                        }
+                }
+        }
+        return ret;
+}
+EXPORT_SYMBOL(drm_fb_helper_pan_display);
+int drm_fb_helper_single_fb_probe(struct drm_device *dev,
+                                  int (*fb_create)(struct drm_device *dev,
+                                                   uint32_t fb_width,
+                                                   uint32_t fb_height,
+                                                   uint32_t surface_width,
+                                                   uint32_t surface_height,
+                                                   struct drm_framebuffer **fb_ptr))
+{
+        struct drm_crtc *crtc;
+        struct drm_connector *connector;
+        unsigned int fb_width = (unsigned)-1, fb_height = (unsigned)-1;
+        unsigned int surface_width = 0, surface_height = 0;
+        int new_fb = 0;
+        int crtc_count = 0;
+        int ret, i, conn_count = 0;
+        struct fb_info *info;
+        struct drm_framebuffer *fb;
+        struct drm_mode_set *modeset = NULL;
+        struct drm_fb_helper *fb_helper;
+        /* first up get a count of crtcs now in use and new min/maxes width/heights */
+        list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
+                if (drm_helper_crtc_in_use(crtc)) {
+                        if (crtc->desired_mode) {
+                                if (crtc->desired_mode->hdisplay < fb_width)
+                                        fb_width = crtc->desired_mode->hdisplay;
+                                if (crtc->desired_mode->vdisplay < fb_height)
+                                        fb_height = crtc->desired_mode->vdisplay;
+                                if (crtc->desired_mode->hdisplay > surface_width)
+                                        surface_width = crtc->desired_mode->hdisplay;
+                                if (crtc->desired_mode->vdisplay > surface_height)
+                                        surface_height = crtc->desired_mode->vdisplay;
+                        }
+                        crtc_count++;
+                }
+        }
+        if (crtc_count == 0 || fb_width == -1 || fb_height == -1) {
+                /* hmm everyone went away - assume VGA cable just fell out
+                   and will come back later. */
+                return 0;
+        }
+        /* do we have an fb already? */
+        if (list_empty(&dev->mode_config.fb_kernel_list)) {
+                ret = (*fb_create)(dev, fb_width, fb_height, surface_width,
+                                   surface_height, &fb);
+                if (ret)
+                        return -EINVAL;
+                new_fb = 1;
+        } else {
+                fb = list_first_entry(&dev->mode_config.fb_kernel_list,
+                                      struct drm_framebuffer, filp_head);
+                /* if someone hotplugs something bigger than we have already allocated, we are pwned.
+                   As really we can't resize an fbdev that is in the wild currently due to fbdev
+                   not really being designed for the lower layers moving stuff around under it.
+                   - so in the grand style of things - punt. */
+                if ((fb->width < surface_width) ||
+                    (fb->height < surface_height)) {
+                        DRM_ERROR("Framebuffer not large enough to scale console onto.\n");
+                        return -EINVAL;
+                }
+        }
+        info = fb->fbdev;
+        fb_helper = info->par;
+        crtc_count = 0;
+        /* okay we need to setup new connector sets in the crtcs */
+        list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
+                modeset = &fb_helper->crtc_info[crtc_count].mode_set;
+                modeset->fb = fb;
+                conn_count = 0;
+                list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
+                        if (connector->encoder)
+                                if (connector->encoder->crtc == modeset->crtc) {
+                                        modeset->connectors[conn_count] = connector;
+                                        conn_count++;
+                                        if (conn_count > fb_helper->conn_limit)
+                                                BUG();
+                                }
+                }
+                for (i = conn_count; i < fb_helper->conn_limit; i++)
+                        modeset->connectors[i] = NULL;
+                modeset->crtc = crtc;
+                crtc_count++;
+                modeset->num_connectors = conn_count;
+                if (modeset->crtc->desired_mode) {
+                        if (modeset->mode)
+                                drm_mode_destroy(dev, modeset->mode);
+                        modeset->mode = drm_mode_duplicate(dev,
+                                                           modeset->crtc->desired_mode);
+                }
+        }
+        fb_helper->crtc_count = crtc_count;
+        fb_helper->fb = fb;
+        if (new_fb) {
+                info->var.pixclock = -1;
+                if (register_framebuffer(info) < 0)
+                        return -EINVAL;
+        } else {
+                drm_fb_helper_set_par(info);
+        }
+        printk(KERN_INFO "fb%d: %s frame buffer device\n", info->node,
+               info->fix.id);
+        /* Switch back to kernel console on panic */
+        /* multi card linked list maybe */
+        if (list_empty(&kernel_fb_helper_list)) {
+                printk(KERN_INFO "registered panic notifier\n");
+                atomic_notifier_chain_register(&panic_notifier_list,
+                                               &paniced);
+                register_sysrq_key('v', &sysrq_drm_fb_helper_restore_op);
+        }
+        list_add(&fb_helper->kernel_fb_list, &kernel_fb_helper_list);
+        return 0;
+}
+EXPORT_SYMBOL(drm_fb_helper_single_fb_probe);
+void drm_fb_helper_free(struct drm_fb_helper *helper)
+{
+        list_del(&helper->kernel_fb_list);
+        if (list_empty(&kernel_fb_helper_list)) {
+                printk(KERN_INFO "unregistered panic notifier\n");
+                atomic_notifier_chain_unregister(&panic_notifier_list,
+                                                 &paniced);
+                unregister_sysrq_key('v', &sysrq_drm_fb_helper_restore_op);
+        }
+        drm_fb_helper_crtc_free(helper);
+}
+EXPORT_SYMBOL(drm_fb_helper_free);
+void drm_fb_helper_fill_fix(struct fb_info *info, uint32_t pitch)
+{
+        info->fix.type = FB_TYPE_PACKED_PIXELS;
+        info->fix.visual = FB_VISUAL_TRUECOLOR;
+        info->fix.type_aux = 0;
+        info->fix.xpanstep = 1; /* doing it in hw */
+        info->fix.ypanstep = 1; /* doing it in hw */
+        info->fix.ywrapstep = 0;
+        info->fix.accel = FB_ACCEL_NONE;
+        info->fix.type_aux = 0;
+        info->fix.line_length = pitch;
+        return;
+}
+EXPORT_SYMBOL(drm_fb_helper_fill_fix);
+void drm_fb_helper_fill_var(struct fb_info *info, struct drm_framebuffer *fb,
+                            uint32_t fb_width, uint32_t fb_height)
+{
+        info->pseudo_palette = fb->pseudo_palette;
+        info->var.xres_virtual = fb->width;
+        info->var.yres_virtual = fb->height;
+        info->var.bits_per_pixel = fb->bits_per_pixel;
+        info->var.xoffset = 0;
+        info->var.yoffset = 0;
+        info->var.activate = FB_ACTIVATE_NOW;
+        info->var.height = -1;
+        info->var.width = -1;
+        switch (fb->depth) {
+        case 8:
+                info->var.red.offset = 0;
+                info->var.green.offset = 0;
+                info->var.blue.offset = 0;
+                info->var.red.length = 8; /* 8bit DAC */
+                info->var.green.length = 8;
+                info->var.blue.length = 8;
+                info->var.transp.offset = 0;
+                info->var.transp.length = 0;
+                break;
+        case 15:
+                info->var.red.offset = 10;
+                info->var.green.offset = 5;
+                info->var.blue.offset = 0;
+                info->var.red.length = 5;
+                info->var.green.length = 5;
+                info->var.blue.length = 5;
+                info->var.transp.offset = 15;
+                info->var.transp.length = 1;
+                break;
+        case 16:
+                info->var.red.offset = 11;
+                info->var.green.offset = 5;
+                info->var.blue.offset = 0;
+                info->var.red.length = 5;
+                info->var.green.length = 6;
+                info->var.blue.length = 5;
+                info->var.transp.offset = 0;
+                break;
+        case 24:
+                info->var.red.offset = 16;
+                info->var.green.offset = 8;
+                info->var.blue.offset = 0;
+                info->var.red.length = 8;
+                info->var.green.length = 8;
+                info->var.blue.length = 8;
+                info->var.transp.offset = 0;
+                info->var.transp.length = 0;
+                break;
+        case 32:
+                info->var.red.offset = 16;
+                info->var.green.offset = 8;
+                info->var.blue.offset = 0;
+                info->var.red.length = 8;
+                info->var.green.length = 8;
+                info->var.blue.length = 8;
+                info->var.transp.offset = 24;
+                info->var.transp.length = 8;
+                break;
+        default:
+                break;
+        }
+        info->var.xres = fb_width;
+        info->var.yres = fb_height;
+}
+EXPORT_SYMBOL(drm_fb_helper_fill_var);
diff --git a/drivers/gpu/drm/drm_gem.c b/drivers/gpu/drm/drm_gem.c
index ffe8f4394d50..230c9ffdd5e9 100644
--- a/drivers/gpu/drm/drm_gem.c
+++ b/drivers/gpu/drm/drm_gem.c
@@ -164,7 +164,7 @@ EXPORT_SYMBOL(drm_gem_object_alloc);
 * Removes the mapping from handle to filp for this object.
 */
 static int
-drm_gem_handle_delete(struct drm_file *filp, int handle)
+drm_gem_handle_delete(struct drm_file *filp, u32 handle)
 {
        struct drm_device *dev;
        struct drm_gem_object *obj;
@@ -207,7 +207,7 @@ drm_gem_handle_delete(struct drm_file *filp, int handle)
 int
 drm_gem_handle_create(struct drm_file *file_priv,
                       struct drm_gem_object *obj,
-                       int *handlep)
+                       u32 *handlep)
 {
        int     ret;
@@ -221,7 +221,7 @@ again:
        /* do the allocation under our spinlock */
        spin_lock(&file_priv->table_lock);
-        ret = idr_get_new_above(&file_priv->object_idr, obj, 1, handlep);
+        ret = idr_get_new_above(&file_priv->object_idr, obj, 1, (int *)handlep);
        spin_unlock(&file_priv->table_lock);
        if (ret == -EAGAIN)
                goto again;
@@ -237,7 +237,7 @@ EXPORT_SYMBOL(drm_gem_handle_create);
 /** Returns a reference to the object named by the handle. */
 struct drm_gem_object *
 drm_gem_object_lookup(struct drm_device *dev, struct drm_file *filp,
-                      int handle)
+                      u32 handle)
 {
        struct drm_gem_object *obj;
@@ -344,7 +344,7 @@ drm_gem_open_ioctl(struct drm_device *dev, void *data,
        struct drm_gem_open *args = data;
        struct drm_gem_object *obj;
        int ret;
-        int handle;
+        u32 handle;
        if (!(dev->driver->driver_features & DRIVER_GEM))
                return -ENODEV;
@@ -539,7 +539,6 @@ int drm_gem_mmap(struct file *filp, struct vm_area_struct *vma)
        vma->vm_flags |= VM_RESERVED | VM_IO | VM_PFNMAP | VM_DONTEXPAND;
        vma->vm_ops = obj->dev->driver->gem_vm_ops;
        vma->vm_private_data = map->handle;
-        /* FIXME: use pgprot_writecombine when available */
        vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot);
        /* Take a ref for this mapping of the object, so that the fault
diff --git a/drivers/gpu/drm/drm_irq.c b/drivers/gpu/drm/drm_irq.c
index f85aaf21e783..0a6f0b3bdc78 100644
--- a/drivers/gpu/drm/drm_irq.c
+++ b/drivers/gpu/drm/drm_irq.c
@@ -37,6 +37,7 @@
 #include <linux/interrupt.h>    /* For task queue support */
+#include <linux/vgaarb.h>
 /**
 * Get interrupt from bus id.
 *
@@ -171,6 +172,26 @@ err:
 }
 EXPORT_SYMBOL(drm_vblank_init);
+static void drm_irq_vgaarb_nokms(void *cookie, bool state)
+{
+        struct drm_device *dev = cookie;
+        if (dev->driver->vgaarb_irq) {
+                dev->driver->vgaarb_irq(dev, state);
+                return;
+        }
+        if (!dev->irq_enabled)
+                return;
+        if (state)
+                dev->driver->irq_uninstall(dev);
+        else {
+                dev->driver->irq_preinstall(dev);
+                dev->driver->irq_postinstall(dev);
+        }
+}
 /**
 * Install IRQ handler.
 *
@@ -231,6 +252,9 @@ int drm_irq_install(struct drm_device *dev)
                return ret;
        }
+        if (!drm_core_check_feature(dev, DRIVER_MODESET))
+                vga_client_register(dev->pdev, (void *)dev, drm_irq_vgaarb_nokms, NULL);
        /* After installing handler */
        ret = dev->driver->irq_postinstall(dev);
        if (ret < 0) {
@@ -279,6 +303,9 @@ int drm_irq_uninstall(struct drm_device * dev)
        DRM_DEBUG("irq=%d\n", dev->pdev->irq);
+        if (!drm_core_check_feature(dev, DRIVER_MODESET))
+                vga_client_register(dev->pdev, NULL, NULL, NULL);
        dev->driver->irq_uninstall(dev);
        free_irq(dev->pdev->irq, dev);
diff --git a/drivers/gpu/drm/drm_mm.c b/drivers/gpu/drm/drm_mm.c
index 3e47869d6dae..c861d80fd779 100644
--- a/drivers/gpu/drm/drm_mm.c
+++ b/drivers/gpu/drm/drm_mm.c
@@ -44,6 +44,7 @@
 #include "drmP.h"
 #include "drm_mm.h"
 #include <linux/slab.h>
+#include <linux/seq_file.h>
 #define MM_UNUSED_TARGET 4
@@ -370,3 +371,23 @@ void drm_mm_takedown(struct drm_mm * mm)
        BUG_ON(mm->num_unused != 0);
 }
 EXPORT_SYMBOL(drm_mm_takedown);
+#if defined(CONFIG_DEBUG_FS)
+int drm_mm_dump_table(struct seq_file *m, struct drm_mm *mm)
+{
+        struct drm_mm_node *entry;
+        int total_used = 0, total_free = 0, total = 0;
+        list_for_each_entry(entry, &mm->ml_entry, ml_entry) {
+                seq_printf(m, "0x%08lx-0x%08lx: 0x%08lx: %s\n", entry->start, entry->start + entry->size, entry->size, entry->free ? "free" : "used");
+                total += entry->size;
+                if (entry->free)
+                        total_free += entry->size;
+                else
+                        total_used += entry->size;
+        }
+        seq_printf(m, "total: %d, used %d free %d\n", total, total_free, total_used);
+        return 0;
+}
+EXPORT_SYMBOL(drm_mm_dump_table);
+#endif
diff --git a/drivers/gpu/drm/drm_modes.c b/drivers/gpu/drm/drm_modes.c
index 7914097b09c6..49404ce1666e 100644
--- a/drivers/gpu/drm/drm_modes.c
+++ b/drivers/gpu/drm/drm_modes.c
@@ -8,6 +8,8 @@
 * Copyright © 2007 Dave Airlie
 * Copyright © 2007-2008 Intel Corporation
 *   Jesse Barnes <jesse.barnes@intel.com>
+ * Copyright 2005-2006 Luc Verhaegen
+ * Copyright (c) 2001, Andy Ritger  aritger@nvidia.com
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
@@ -38,7 +40,6 @@
 #include "drm.h"
 #include "drm_crtc.h"
-#define DRM_MODESET_DEBUG       "drm_mode"
 /**
 * drm_mode_debug_printmodeline - debug print a mode
 * @dev: DRM device
@@ -51,8 +52,8 @@
 */
 void drm_mode_debug_printmodeline(struct drm_display_mode *mode)
 {
-        DRM_DEBUG_MODE(DRM_MODESET_DEBUG,
+        DRM_DEBUG_KMS("Modeline %d:\"%s\" %d %d %d %d %d %d %d %d %d %d "
-                "Modeline %d:\"%s\" %d %d %d %d %d %d %d %d %d %d 0x%x 0x%x\n",
+                        "0x%x 0x%x\n",
                mode->base.id, mode->name, mode->vrefresh, mode->clock,
                mode->hdisplay, mode->hsync_start,
                mode->hsync_end, mode->htotal,
@@ -62,6 +63,420 @@ void drm_mode_debug_printmodeline(struct drm_display_mode *mode)
 EXPORT_SYMBOL(drm_mode_debug_printmodeline);
 /**
+ * drm_cvt_mode -create a modeline based on CVT algorithm
+ * @dev: DRM device
+ * @hdisplay: hdisplay size
+ * @vdisplay: vdisplay size
+ * @vrefresh  : vrefresh rate
+ * @reduced : Whether the GTF calculation is simplified
+ * @interlaced:Whether the interlace is supported
+ *
+ * LOCKING:
+ * none.
+ *
+ * return the modeline based on CVT algorithm
+ *
+ * This function is called to generate the modeline based on CVT algorithm
+ * according to the hdisplay, vdisplay, vrefresh.
+ * It is based from the VESA(TM) Coordinated Video Timing Generator by
+ * Graham Loveridge April 9, 2003 available at
+ * http://www.vesa.org/public/CVT/CVTd6r1.xls
+ *
+ * And it is copied from xf86CVTmode in xserver/hw/xfree86/modes/xf86cvt.c.
+ * What I have done is to translate it by using integer calculation.
+ */
+#define HV_FACTOR                       1000
+struct drm_display_mode *drm_cvt_mode(struct drm_device *dev, int hdisplay,
+                                      int vdisplay, int vrefresh,
+                                      bool reduced, bool interlaced)
+{
+        /* 1) top/bottom margin size (% of height) - default: 1.8, */
+#define CVT_MARGIN_PERCENTAGE           18
+        /* 2) character cell horizontal granularity (pixels) - default 8 */
+#define CVT_H_GRANULARITY               8
+        /* 3) Minimum vertical porch (lines) - default 3 */
+#define CVT_MIN_V_PORCH                 3
+        /* 4) Minimum number of vertical back porch lines - default 6 */
+#define CVT_MIN_V_BPORCH                6
+        /* Pixel Clock step (kHz) */
+#define CVT_CLOCK_STEP                  250
+        struct drm_display_mode *drm_mode;
+        bool margins = false;
+        unsigned int vfieldrate, hperiod;
+        int hdisplay_rnd, hmargin, vdisplay_rnd, vmargin, vsync;
+        int interlace;
+        /* allocate the drm_display_mode structure. If failure, we will
+         * return directly
+         */
+        drm_mode = drm_mode_create(dev);
+        if (!drm_mode)
+                return NULL;
+        /* the CVT default refresh rate is 60Hz */
+        if (!vrefresh)
+                vrefresh = 60;
+        /* the required field fresh rate */
+        if (interlaced)
+                vfieldrate = vrefresh * 2;
+        else
+                vfieldrate = vrefresh;
+        /* horizontal pixels */
+        hdisplay_rnd = hdisplay - (hdisplay % CVT_H_GRANULARITY);
+        /* determine the left&right borders */
+        hmargin = 0;
+        if (margins) {
+                hmargin = hdisplay_rnd * CVT_MARGIN_PERCENTAGE / 1000;
+                hmargin -= hmargin % CVT_H_GRANULARITY;
+        }
+        /* find the total active pixels */
+        drm_mode->hdisplay = hdisplay_rnd + 2 * hmargin;
+        /* find the number of lines per field */
+        if (interlaced)
+                vdisplay_rnd = vdisplay / 2;
+        else
+                vdisplay_rnd = vdisplay;
+        /* find the top & bottom borders */
+        vmargin = 0;
+        if (margins)
+                vmargin = vdisplay_rnd * CVT_MARGIN_PERCENTAGE / 1000;
+        drm_mode->vdisplay = vdisplay + 2 * vmargin;
+        /* Interlaced */
+        if (interlaced)
+                interlace = 1;
+        else
+                interlace = 0;
+        /* Determine VSync Width from aspect ratio */
+        if (!(vdisplay % 3) && ((vdisplay * 4 / 3) == hdisplay))
+                vsync = 4;
+        else if (!(vdisplay % 9) && ((vdisplay * 16 / 9) == hdisplay))
+                vsync = 5;
+        else if (!(vdisplay % 10) && ((vdisplay * 16 / 10) == hdisplay))
+                vsync = 6;
+        else if (!(vdisplay % 4) && ((vdisplay * 5 / 4) == hdisplay))
+                vsync = 7;
+        else if (!(vdisplay % 9) && ((vdisplay * 15 / 9) == hdisplay))
+                vsync = 7;
+        else /* custom */
+                vsync = 10;
+        if (!reduced) {
+                /* simplify the GTF calculation */
+                /* 4) Minimum time of vertical sync + back porch interval (µs)
+                 * default 550.0
+                 */
+                int tmp1, tmp2;
+#define CVT_MIN_VSYNC_BP        550
+                /* 3) Nominal HSync width (% of line period) - default 8 */
+#define CVT_HSYNC_PERCENTAGE    8
+                unsigned int hblank_percentage;
+                int vsyncandback_porch, vback_porch, hblank;
+                /* estimated the horizontal period */
+                tmp1 = HV_FACTOR * 1000000  -
+                                CVT_MIN_VSYNC_BP * HV_FACTOR * vfieldrate;
+                tmp2 = (vdisplay_rnd + 2 * vmargin + CVT_MIN_V_PORCH) * 2 +
+                                interlace;
+                hperiod = tmp1 * 2 / (tmp2 * vfieldrate);
+                tmp1 = CVT_MIN_VSYNC_BP * HV_FACTOR / hperiod + 1;
+                /* 9. Find number of lines in sync + backporch */
+                if (tmp1 < (vsync + CVT_MIN_V_PORCH))
+                        vsyncandback_porch = vsync + CVT_MIN_V_PORCH;
+                else
+                        vsyncandback_porch = tmp1;
+                /* 10. Find number of lines in back porch */
+                vback_porch = vsyncandback_porch - vsync;
+                drm_mode->vtotal = vdisplay_rnd + 2 * vmargin +
+                                vsyncandback_porch + CVT_MIN_V_PORCH;
+                /* 5) Definition of Horizontal blanking time limitation */
+                /* Gradient (%/kHz) - default 600 */
+#define CVT_M_FACTOR    600
+                /* Offset (%) - default 40 */
+#define CVT_C_FACTOR    40
+                /* Blanking time scaling factor - default 128 */
+#define CVT_K_FACTOR    128
+                /* Scaling factor weighting - default 20 */
+#define CVT_J_FACTOR    20
+#define CVT_M_PRIME     (CVT_M_FACTOR * CVT_K_FACTOR / 256)
+#define CVT_C_PRIME     ((CVT_C_FACTOR - CVT_J_FACTOR) * CVT_K_FACTOR / 256 + \
+                         CVT_J_FACTOR)
+                /* 12. Find ideal blanking duty cycle from formula */
+                hblank_percentage = CVT_C_PRIME * HV_FACTOR - CVT_M_PRIME *
+                                        hperiod / 1000;
+                /* 13. Blanking time */
+                if (hblank_percentage < 20 * HV_FACTOR)
+                        hblank_percentage = 20 * HV_FACTOR;
+                hblank = drm_mode->hdisplay * hblank_percentage /
+                         (100 * HV_FACTOR - hblank_percentage);
+                hblank -= hblank % (2 * CVT_H_GRANULARITY);
+                /* 14. find the total pixes per line */
+                drm_mode->htotal = drm_mode->hdisplay + hblank;
+                drm_mode->hsync_end = drm_mode->hdisplay + hblank / 2;
+                drm_mode->hsync_start = drm_mode->hsync_end -
+                        (drm_mode->htotal * CVT_HSYNC_PERCENTAGE) / 100;
+                drm_mode->hsync_start += CVT_H_GRANULARITY -
+                        drm_mode->hsync_start % CVT_H_GRANULARITY;
+                /* fill the Vsync values */
+                drm_mode->vsync_start = drm_mode->vdisplay + CVT_MIN_V_PORCH;
+                drm_mode->vsync_end = drm_mode->vsync_start + vsync;
+        } else {
+                /* Reduced blanking */
+                /* Minimum vertical blanking interval time (µs)- default 460 */
+#define CVT_RB_MIN_VBLANK       460
+                /* Fixed number of clocks for horizontal sync */
+#define CVT_RB_H_SYNC           32
+                /* Fixed number of clocks for horizontal blanking */
+#define CVT_RB_H_BLANK          160
+                /* Fixed number of lines for vertical front porch - default 3*/
+#define CVT_RB_VFPORCH          3
+                int vbilines;
+                int tmp1, tmp2;
+                /* 8. Estimate Horizontal period. */
+                tmp1 = HV_FACTOR * 1000000 -
+                        CVT_RB_MIN_VBLANK * HV_FACTOR * vfieldrate;
+                tmp2 = vdisplay_rnd + 2 * vmargin;
+                hperiod = tmp1 / (tmp2 * vfieldrate);
+                /* 9. Find number of lines in vertical blanking */
+                vbilines = CVT_RB_MIN_VBLANK * HV_FACTOR / hperiod + 1;
+                /* 10. Check if vertical blanking is sufficient */
+                if (vbilines < (CVT_RB_VFPORCH + vsync + CVT_MIN_V_BPORCH))
+                        vbilines = CVT_RB_VFPORCH + vsync + CVT_MIN_V_BPORCH;
+                /* 11. Find total number of lines in vertical field */
+                drm_mode->vtotal = vdisplay_rnd + 2 * vmargin + vbilines;
+                /* 12. Find total number of pixels in a line */
+                drm_mode->htotal = drm_mode->hdisplay + CVT_RB_H_BLANK;
+                /* Fill in HSync values */
+                drm_mode->hsync_end = drm_mode->hdisplay + CVT_RB_H_BLANK / 2;
+                drm_mode->hsync_start = drm_mode->hsync_end = CVT_RB_H_SYNC;
+        }
+        /* 15/13. Find pixel clock frequency (kHz for xf86) */
+        drm_mode->clock = drm_mode->htotal * HV_FACTOR * 1000 / hperiod;
+        drm_mode->clock -= drm_mode->clock % CVT_CLOCK_STEP;
+        /* 18/16. Find actual vertical frame frequency */
+        /* ignore - just set the mode flag for interlaced */
+        if (interlaced)
+                drm_mode->vtotal *= 2;
+        /* Fill the mode line name */
+        drm_mode_set_name(drm_mode);
+        if (reduced)
+                drm_mode->flags |= (DRM_MODE_FLAG_PHSYNC |
+                                        DRM_MODE_FLAG_NVSYNC);
+        else
+                drm_mode->flags |= (DRM_MODE_FLAG_PVSYNC |
+                                        DRM_MODE_FLAG_NHSYNC);
+        if (interlaced)
+                drm_mode->flags |= DRM_MODE_FLAG_INTERLACE;
+    return drm_mode;
+}
+EXPORT_SYMBOL(drm_cvt_mode);
+/**
+ * drm_gtf_mode - create the modeline based on GTF algorithm
+ *
+ * @dev         :drm device
+ * @hdisplay    :hdisplay size
+ * @vdisplay    :vdisplay size
+ * @vrefresh    :vrefresh rate.
+ * @interlaced  :whether the interlace is supported
+ * @margins     :whether the margin is supported
+ *
+ * LOCKING.
+ * none.
+ *
+ * return the modeline based on GTF algorithm
+ *
+ * This function is to create the modeline based on the GTF algorithm.
+ * Generalized Timing Formula is derived from:
+ *      GTF Spreadsheet by Andy Morrish (1/5/97)
+ *      available at http://www.vesa.org
+ *
+ * And it is copied from the file of xserver/hw/xfree86/modes/xf86gtf.c.
+ * What I have done is to translate it by using integer calculation.
+ * I also refer to the function of fb_get_mode in the file of
+ * drivers/video/fbmon.c
+ */
+struct drm_display_mode *drm_gtf_mode(struct drm_device *dev, int hdisplay,
+                                      int vdisplay, int vrefresh,
+                                      bool interlaced, int margins)
+{
+        /* 1) top/bottom margin size (% of height) - default: 1.8, */
+#define GTF_MARGIN_PERCENTAGE           18
+        /* 2) character cell horizontal granularity (pixels) - default 8 */
+#define GTF_CELL_GRAN                   8
+        /* 3) Minimum vertical porch (lines) - default 3 */
+#define GTF_MIN_V_PORCH                 1
+        /* width of vsync in lines */
+#define V_SYNC_RQD                      3
+        /* width of hsync as % of total line */
+#define H_SYNC_PERCENT                  8
+        /* min time of vsync + back porch (microsec) */
+#define MIN_VSYNC_PLUS_BP               550
+        /* blanking formula gradient */
+#define GTF_M                           600
+        /* blanking formula offset */
+#define GTF_C                           40
+        /* blanking formula scaling factor */
+#define GTF_K                           128
+        /* blanking formula scaling factor */
+#define GTF_J                           20
+        /* C' and M' are part of the Blanking Duty Cycle computation */
+#define GTF_C_PRIME             (((GTF_C - GTF_J) * GTF_K / 256) + GTF_J)
+#define GTF_M_PRIME             (GTF_K * GTF_M / 256)
+        struct drm_display_mode *drm_mode;
+        unsigned int hdisplay_rnd, vdisplay_rnd, vfieldrate_rqd;
+        int top_margin, bottom_margin;
+        int interlace;
+        unsigned int hfreq_est;
+        int vsync_plus_bp, vback_porch;
+        unsigned int vtotal_lines, vfieldrate_est, hperiod;
+        unsigned int vfield_rate, vframe_rate;
+        int left_margin, right_margin;
+        unsigned int total_active_pixels, ideal_duty_cycle;
+        unsigned int hblank, total_pixels, pixel_freq;
+        int hsync, hfront_porch, vodd_front_porch_lines;
+        unsigned int tmp1, tmp2;
+        drm_mode = drm_mode_create(dev);
+        if (!drm_mode)
+                return NULL;
+        /* 1. In order to give correct results, the number of horizontal
+         * pixels requested is first processed to ensure that it is divisible
+         * by the character size, by rounding it to the nearest character
+         * cell boundary:
+         */
+        hdisplay_rnd = (hdisplay + GTF_CELL_GRAN / 2) / GTF_CELL_GRAN;
+        hdisplay_rnd = hdisplay_rnd * GTF_CELL_GRAN;
+        /* 2. If interlace is requested, the number of vertical lines assumed
+         * by the calculation must be halved, as the computation calculates
+         * the number of vertical lines per field.
+         */
+        if (interlaced)
+                vdisplay_rnd = vdisplay / 2;
+        else
+                vdisplay_rnd = vdisplay;
+        /* 3. Find the frame rate required: */
+        if (interlaced)
+                vfieldrate_rqd = vrefresh * 2;
+        else
+                vfieldrate_rqd = vrefresh;
+        /* 4. Find number of lines in Top margin: */
+        top_margin = 0;
+        if (margins)
+                top_margin = (vdisplay_rnd * GTF_MARGIN_PERCENTAGE + 500) /
+                                1000;
+        /* 5. Find number of lines in bottom margin: */
+        bottom_margin = top_margin;
+        /* 6. If interlace is required, then set variable interlace: */
+        if (interlaced)
+                interlace = 1;
+        else
+                interlace = 0;
+        /* 7. Estimate the Horizontal frequency */
+        {
+                tmp1 = (1000000  - MIN_VSYNC_PLUS_BP * vfieldrate_rqd) / 500;
+                tmp2 = (vdisplay_rnd + 2 * top_margin + GTF_MIN_V_PORCH) *
+                                2 + interlace;
+                hfreq_est = (tmp2 * 1000 * vfieldrate_rqd) / tmp1;
+        }
+        /* 8. Find the number of lines in V sync + back porch */
+        /* [V SYNC+BP] = RINT(([MIN VSYNC+BP] * hfreq_est / 1000000)) */
+        vsync_plus_bp = MIN_VSYNC_PLUS_BP * hfreq_est / 1000;
+        vsync_plus_bp = (vsync_plus_bp + 500) / 1000;
+        /*  9. Find the number of lines in V back porch alone: */
+        vback_porch = vsync_plus_bp - V_SYNC_RQD;
+        /*  10. Find the total number of lines in Vertical field period: */
+        vtotal_lines = vdisplay_rnd + top_margin + bottom_margin +
+                        vsync_plus_bp + GTF_MIN_V_PORCH;
+        /*  11. Estimate the Vertical field frequency: */
+        vfieldrate_est = hfreq_est / vtotal_lines;
+        /*  12. Find the actual horizontal period: */
+        hperiod = 1000000 / (vfieldrate_rqd * vtotal_lines);
+        /*  13. Find the actual Vertical field frequency: */
+        vfield_rate = hfreq_est / vtotal_lines;
+        /*  14. Find the Vertical frame frequency: */
+        if (interlaced)
+                vframe_rate = vfield_rate / 2;
+        else
+                vframe_rate = vfield_rate;
+        /*  15. Find number of pixels in left margin: */
+        if (margins)
+                left_margin = (hdisplay_rnd * GTF_MARGIN_PERCENTAGE + 500) /
+                                1000;
+        else
+                left_margin = 0;
+        /* 16.Find number of pixels in right margin: */
+        right_margin = left_margin;
+        /* 17.Find total number of active pixels in image and left and right */
+        total_active_pixels = hdisplay_rnd + left_margin + right_margin;
+        /* 18.Find the ideal blanking duty cycle from blanking duty cycle */
+        ideal_duty_cycle = GTF_C_PRIME * 1000 -
+                                (GTF_M_PRIME * 1000000 / hfreq_est);
+        /* 19.Find the number of pixels in the blanking time to the nearest
+         * double character cell: */
+        hblank = total_active_pixels * ideal_duty_cycle /
+                        (100000 - ideal_duty_cycle);
+        hblank = (hblank + GTF_CELL_GRAN) / (2 * GTF_CELL_GRAN);
+        hblank = hblank * 2 * GTF_CELL_GRAN;
+        /* 20.Find total number of pixels: */
+        total_pixels = total_active_pixels + hblank;
+        /* 21.Find pixel clock frequency: */
+        pixel_freq = total_pixels * hfreq_est / 1000;
+        /* Stage 1 computations are now complete; I should really pass
+         * the results to another function and do the Stage 2 computations,
+         * but I only need a few more values so I'll just append the
+         * computations here for now */
+        /* 17. Find the number of pixels in the horizontal sync period: */
+        hsync = H_SYNC_PERCENT * total_pixels / 100;
+        hsync = (hsync + GTF_CELL_GRAN / 2) / GTF_CELL_GRAN;
+        hsync = hsync * GTF_CELL_GRAN;
+        /* 18. Find the number of pixels in horizontal front porch period */
+        hfront_porch = hblank / 2 - hsync;
+        /*  36. Find the number of lines in the odd front porch period: */
+        vodd_front_porch_lines = GTF_MIN_V_PORCH ;
+        /* finally, pack the results in the mode struct */
+        drm_mode->hdisplay = hdisplay_rnd;
+        drm_mode->hsync_start = hdisplay_rnd + hfront_porch;
+        drm_mode->hsync_end = drm_mode->hsync_start + hsync;
+        drm_mode->htotal = total_pixels;
+        drm_mode->vdisplay = vdisplay_rnd;
+        drm_mode->vsync_start = vdisplay_rnd + vodd_front_porch_lines;
+        drm_mode->vsync_end = drm_mode->vsync_start + V_SYNC_RQD;
+        drm_mode->vtotal = vtotal_lines;
+        drm_mode->clock = pixel_freq;
+        drm_mode_set_name(drm_mode);
+        drm_mode->flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC;
+        if (interlaced) {
+                drm_mode->vtotal *= 2;
+                drm_mode->flags |= DRM_MODE_FLAG_INTERLACE;
+        }
+        return drm_mode;
+}
+EXPORT_SYMBOL(drm_gtf_mode);
+/**
 * drm_mode_set_name - set the name on a mode
 * @mode: name will be set in this mode
 *
@@ -151,7 +566,9 @@ EXPORT_SYMBOL(drm_mode_height);
 * FIXME: why is this needed?  shouldn't vrefresh be set already?
 *
 * RETURNS:
- * Vertical refresh rate of @mode x 1000. For precision reasons.
+ * Vertical refresh rate. It will be the result of actual value plus 0.5.
+ * If it is 70.288, it will return 70Hz.
+ * If it is 59.6, it will return 60Hz.
 */
 int drm_mode_vrefresh(struct drm_display_mode *mode)
 {
@@ -161,14 +578,13 @@ int drm_mode_vrefresh(struct drm_display_mode *mode)
        if (mode->vrefresh > 0)
                refresh = mode->vrefresh;
        else if (mode->htotal > 0 && mode->vtotal > 0) {
+                int vtotal;
+                vtotal = mode->vtotal;
                /* work out vrefresh the value will be x1000 */
                calc_val = (mode->clock * 1000);
                calc_val /= mode->htotal;
-                calc_val *= 1000;
+                refresh = (calc_val + vtotal / 2) / vtotal;
-                calc_val /= mode->vtotal;
-                refresh = calc_val;
                if (mode->flags & DRM_MODE_FLAG_INTERLACE)
                        refresh *= 2;
                if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
@@ -403,8 +819,7 @@ void drm_mode_prune_invalid(struct drm_device *dev,
                        list_del(&mode->head);
                        if (verbose) {
                                drm_mode_debug_printmodeline(mode);
-                                DRM_DEBUG_MODE(DRM_MODESET_DEBUG,
+                                DRM_DEBUG_KMS("Not using %s mode %d\n",
-                                        "Not using %s mode %d\n",
                                        mode->name, mode->status);
                        }
                        drm_mode_destroy(dev, mode);
diff --git a/drivers/gpu/drm/drm_proc.c b/drivers/gpu/drm/drm_proc.c
index bbd4b3d1074a..d379c4f2892f 100644
--- a/drivers/gpu/drm/drm_proc.c
+++ b/drivers/gpu/drm/drm_proc.c
@@ -106,20 +106,25 @@ int drm_proc_create_files(struct drm_info_list *files, int count,
                        continue;
                tmp = kmalloc(sizeof(struct drm_info_node), GFP_KERNEL);
-                ent = create_proc_entry(files[i].name, S_IFREG | S_IRUGO, root);
+                if (tmp == NULL) {
+                        ret = -1;
+                        goto fail;
+                }
+                tmp->minor = minor;
+                tmp->info_ent = &files[i];
+                list_add(&tmp->list, &minor->proc_nodes.list);
+                ent = proc_create_data(files[i].name, S_IRUGO, root,
+                                       &drm_proc_fops, tmp);
                if (!ent) {
                        DRM_ERROR("Cannot create /proc/dri/%s/%s\n",
                                  name, files[i].name);
+                        list_del(&tmp->list);
                        kfree(tmp);
                        ret = -1;
                        goto fail;
                }
-                ent->proc_fops = &drm_proc_fops;
-                ent->data = tmp;
-                tmp->minor = minor;
-                tmp->info_ent = &files[i];
-                list_add(&(tmp->list), &(minor->proc_nodes.list));
        }
        return 0;
diff --git a/drivers/gpu/drm/drm_sysfs.c b/drivers/gpu/drm/drm_sysfs.c
index f7a615b80c70..7e42b7e9d43a 100644
--- a/drivers/gpu/drm/drm_sysfs.c
+++ b/drivers/gpu/drm/drm_sysfs.c
@@ -16,6 +16,7 @@
 #include <linux/kdev_t.h>
 #include <linux/err.h>
+#include "drm_sysfs.h"
 #include "drm_core.h"
 #include "drmP.h"
@@ -76,7 +77,7 @@ static ssize_t version_show(struct class *dev, char *buf)
                       CORE_MINOR, CORE_PATCHLEVEL, CORE_DATE);
 }
-static char *drm_nodename(struct device *dev)
+static char *drm_devnode(struct device *dev, mode_t *mode)
 {
        return kasprintf(GFP_KERNEL, "dri/%s", dev_name(dev));
 }
@@ -112,7 +113,7 @@ struct class *drm_sysfs_create(struct module *owner, char *name)
        if (err)
                goto err_out_class;
-        class->nodename = drm_nodename;
+        class->devnode = drm_devnode;
        return class;
@@ -253,6 +254,7 @@ static ssize_t subconnector_show(struct device *device,
                case DRM_MODE_CONNECTOR_Composite:
                case DRM_MODE_CONNECTOR_SVIDEO:
                case DRM_MODE_CONNECTOR_Component:
+                case DRM_MODE_CONNECTOR_TV:
                        prop = dev->mode_config.tv_subconnector_property;
                        is_tv = 1;
                        break;
@@ -293,6 +295,7 @@ static ssize_t select_subconnector_show(struct device *device,
                case DRM_MODE_CONNECTOR_Composite:
                case DRM_MODE_CONNECTOR_SVIDEO:
                case DRM_MODE_CONNECTOR_Component:
+                case DRM_MODE_CONNECTOR_TV:
                        prop = dev->mode_config.tv_select_subconnector_property;
                        is_tv = 1;
                        break;
@@ -391,6 +394,7 @@ int drm_sysfs_connector_add(struct drm_connector *connector)
                case DRM_MODE_CONNECTOR_Composite:
                case DRM_MODE_CONNECTOR_SVIDEO:
                case DRM_MODE_CONNECTOR_Component:
+                case DRM_MODE_CONNECTOR_TV:
                        for (i = 0; i < ARRAY_SIZE(connector_attrs_opt1); i++) {
                                ret = device_create_file(&connector->kdev, &connector_attrs_opt1[i]);
                                if (ret)
@@ -519,3 +523,27 @@ void drm_sysfs_device_remove(struct drm_minor *minor)
 {
        device_unregister(&minor->kdev);
 }
+/**
+ * drm_class_device_register - Register a struct device in the drm class.
+ *
+ * @dev: pointer to struct device to register.
+ *
+ * @dev should have all relevant members pre-filled with the exception
+ * of the class member. In particular, the device_type member must
+ * be set.
+ */
+int drm_class_device_register(struct device *dev)
+{
+        dev->class = drm_class;
+        return device_register(dev);
+}
+EXPORT_SYMBOL_GPL(drm_class_device_register);
+void drm_class_device_unregister(struct device *dev)
+{
+        return device_unregister(dev);
+}
+EXPORT_SYMBOL_GPL(drm_class_device_unregister);
diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index 30d6b99fb302..5269dfa5f620 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -4,10 +4,10 @@
 ccflags-y := -Iinclude/drm
 i915-y := i915_drv.o i915_dma.o i915_irq.o i915_mem.o \
+          i915_debugfs.o \
          i915_suspend.o \
          i915_gem.o \
          i915_gem_debug.o \
-          i915_gem_debugfs.o \
          i915_gem_tiling.o \
          intel_display.o \
          intel_crt.o \
diff --git a/drivers/gpu/drm/i915/i915_gem_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index cb3b97405fbf..1e3bdcee863c 100644
--- a/drivers/gpu/drm/i915/i915_gem_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -158,16 +158,37 @@ static int i915_interrupt_info(struct seq_file *m, void *data)
        struct drm_device *dev = node->minor->dev;
        drm_i915_private_t *dev_priv = dev->dev_private;
-        seq_printf(m, "Interrupt enable:    %08x\n",
+        if (!IS_IGDNG(dev)) {
-                   I915_READ(IER));
+                seq_printf(m, "Interrupt enable:    %08x\n",
-        seq_printf(m, "Interrupt identity:  %08x\n",
+                           I915_READ(IER));
-                   I915_READ(IIR));
+                seq_printf(m, "Interrupt identity:  %08x\n",
-        seq_printf(m, "Interrupt mask:      %08x\n",
+                           I915_READ(IIR));
-                   I915_READ(IMR));
+                seq_printf(m, "Interrupt mask:      %08x\n",
-        seq_printf(m, "Pipe A stat:         %08x\n",
+                           I915_READ(IMR));
-                   I915_READ(PIPEASTAT));
+                seq_printf(m, "Pipe A stat:         %08x\n",
-        seq_printf(m, "Pipe B stat:         %08x\n",
+                           I915_READ(PIPEASTAT));
-                   I915_READ(PIPEBSTAT));
+                seq_printf(m, "Pipe B stat:         %08x\n",
+                           I915_READ(PIPEBSTAT));
+        } else {
+                seq_printf(m, "North Display Interrupt enable:          %08x\n",
+                           I915_READ(DEIER));
+                seq_printf(m, "North Display Interrupt identity:        %08x\n",
+                           I915_READ(DEIIR));
+                seq_printf(m, "North Display Interrupt mask:            %08x\n",
+                           I915_READ(DEIMR));
+                seq_printf(m, "South Display Interrupt enable:          %08x\n",
+                           I915_READ(SDEIER));
+                seq_printf(m, "South Display Interrupt identity:        %08x\n",
+                           I915_READ(SDEIIR));
+                seq_printf(m, "South Display Interrupt mask:            %08x\n",
+                           I915_READ(SDEIMR));
+                seq_printf(m, "Graphics Interrupt enable:               %08x\n",
+                           I915_READ(GTIER));
+                seq_printf(m, "Graphics Interrupt identity:             %08x\n",
+                           I915_READ(GTIIR));
+                seq_printf(m, "Graphics Interrupt mask:         %08x\n",
+                           I915_READ(GTIMR));
+        }
        seq_printf(m, "Interrupts received: %d\n",
                   atomic_read(&dev_priv->irq_received));
        if (dev_priv->hw_status_page != NULL) {
@@ -312,15 +333,13 @@ static int i915_ringbuffer_info(struct seq_file *m, void *data)
        struct drm_info_node *node = (struct drm_info_node *) m->private;
        struct drm_device *dev = node->minor->dev;
        drm_i915_private_t *dev_priv = dev->dev_private;
-        unsigned int head, tail, mask;
+        unsigned int head, tail;
        head = I915_READ(PRB0_HEAD) & HEAD_ADDR;
        tail = I915_READ(PRB0_TAIL) & TAIL_ADDR;
-        mask = dev_priv->ring.tail_mask;
        seq_printf(m, "RingHead :  %08x\n", head);
        seq_printf(m, "RingTail :  %08x\n", tail);
-        seq_printf(m, "RingMask :  %08x\n", mask);
        seq_printf(m, "RingSize :  %08lx\n", dev_priv->ring.Size);
        seq_printf(m, "Acthd :     %08x\n", I915_READ(IS_I965G(dev) ? ACTHD_I965 : ACTHD));
@@ -363,7 +382,37 @@ out:
        return 0;
 }
-static struct drm_info_list i915_gem_debugfs_list[] = {
+static int i915_registers_info(struct seq_file *m, void *data) {
+        struct drm_info_node *node = (struct drm_info_node *) m->private;
+        struct drm_device *dev = node->minor->dev;
+        drm_i915_private_t *dev_priv = dev->dev_private;
+        uint32_t reg;
+#define DUMP_RANGE(start, end) \
+        for (reg=start; reg < end; reg += 4) \
+        seq_printf(m, "%08x\t%08x\n", reg, I915_READ(reg));
+        DUMP_RANGE(0x00000, 0x00fff);   /* VGA registers */
+        DUMP_RANGE(0x02000, 0x02fff);   /* instruction, memory, interrupt control registers */
+        DUMP_RANGE(0x03000, 0x031ff);   /* FENCE and PPGTT control registers */
+        DUMP_RANGE(0x03200, 0x03fff);   /* frame buffer compression registers */
+        DUMP_RANGE(0x05000, 0x05fff);   /* I/O control registers */
+        DUMP_RANGE(0x06000, 0x06fff);   /* clock control registers */
+        DUMP_RANGE(0x07000, 0x07fff);   /* 3D internal debug registers */
+        DUMP_RANGE(0x07400, 0x088ff);   /* GPE debug registers */
+        DUMP_RANGE(0x0a000, 0x0afff);   /* display palette registers */
+        DUMP_RANGE(0x10000, 0x13fff);   /* MMIO MCHBAR */
+        DUMP_RANGE(0x30000, 0x3ffff);   /* overlay registers */
+        DUMP_RANGE(0x60000, 0x6ffff);   /* display engine pipeline registers */
+        DUMP_RANGE(0x70000, 0x72fff);   /* display and cursor registers */
+        DUMP_RANGE(0x73000, 0x73fff);   /* performance counters */
+        return 0;
+}
+static struct drm_info_list i915_debugfs_list[] = {
+        {"i915_regs", i915_registers_info, 0},
        {"i915_gem_active", i915_gem_object_list_info, 0, (void *) ACTIVE_LIST},
        {"i915_gem_flushing", i915_gem_object_list_info, 0, (void *) FLUSHING_LIST},
        {"i915_gem_inactive", i915_gem_object_list_info, 0, (void *) INACTIVE_LIST},
@@ -377,19 +426,19 @@ static struct drm_info_list i915_gem_debugfs_list[] = {
        {"i915_batchbuffers", i915_batchbuffer_info, 0},
        {"i915_error_state", i915_error_state, 0},
 };
-#define I915_GEM_DEBUGFS_ENTRIES ARRAY_SIZE(i915_gem_debugfs_list)
+#define I915_DEBUGFS_ENTRIES ARRAY_SIZE(i915_debugfs_list)
-int i915_gem_debugfs_init(struct drm_minor *minor)
+int i915_debugfs_init(struct drm_minor *minor)
 {
-        return drm_debugfs_create_files(i915_gem_debugfs_list,
+        return drm_debugfs_create_files(i915_debugfs_list,
-                                        I915_GEM_DEBUGFS_ENTRIES,
+                                        I915_DEBUGFS_ENTRIES,
                                        minor->debugfs_root, minor);
 }
-void i915_gem_debugfs_cleanup(struct drm_minor *minor)
+void i915_debugfs_cleanup(struct drm_minor *minor)
 {
-        drm_debugfs_remove_files(i915_gem_debugfs_list,
+        drm_debugfs_remove_files(i915_debugfs_list,
-                                 I915_GEM_DEBUGFS_ENTRIES, minor);
+                                 I915_DEBUGFS_ENTRIES, minor);
 }
 #endif /* CONFIG_DEBUG_FS */
diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c
index 50d1f782768c..5a49a1867b35 100644
--- a/drivers/gpu/drm/i915/i915_dma.c
+++ b/drivers/gpu/drm/i915/i915_dma.c
@@ -29,11 +29,11 @@
 #include "drmP.h"
 #include "drm.h"
 #include "drm_crtc_helper.h"
+#include "drm_fb_helper.h"
 #include "intel_drv.h"
 #include "i915_drm.h"
 #include "i915_drv.h"
+#include <linux/vgaarb.h>
-#define I915_DRV        "i915_drv"
 /* Really want an OS-independent resettable timer.  Would like to have
 * this loop run for (eg) 3 sec, but have the timer reset every time
@@ -80,6 +80,34 @@ int i915_wait_ring(struct drm_device * dev, int n, const char *caller)
        return -EBUSY;
 }
+/* As a ringbuffer is only allowed to wrap between instructions, fill
+ * the tail with NOOPs.
+ */
+int i915_wrap_ring(struct drm_device *dev)
+{
+        drm_i915_private_t *dev_priv = dev->dev_private;
+        volatile unsigned int *virt;
+        int rem;
+        rem = dev_priv->ring.Size - dev_priv->ring.tail;
+        if (dev_priv->ring.space < rem) {
+                int ret = i915_wait_ring(dev, rem, __func__);
+                if (ret)
+                        return ret;
+        }
+        dev_priv->ring.space -= rem;
+        virt = (unsigned int *)
+                (dev_priv->ring.virtual_start + dev_priv->ring.tail);
+        rem /= 4;
+        while (rem--)
+                *virt++ = MI_NOOP;
+        dev_priv->ring.tail = 0;
+        return 0;
+}
 /**
 * Sets up the hardware status page for devices that need a physical address
 * in the register.
@@ -101,7 +129,7 @@ static int i915_init_phys_hws(struct drm_device *dev)
        memset(dev_priv->hw_status_page, 0, PAGE_SIZE);
        I915_WRITE(HWS_PGA, dev_priv->dma_status_page);
-        DRM_DEBUG_DRIVER(I915_DRV, "Enabled hardware status page\n");
+        DRM_DEBUG_DRIVER("Enabled hardware status page\n");
        return 0;
 }
@@ -187,8 +215,7 @@ static int i915_initialize(struct drm_device * dev, drm_i915_init_t * init)
                master_priv->sarea_priv = (drm_i915_sarea_t *)
                        ((u8 *)master_priv->sarea->handle + init->sarea_priv_offset);
        } else {
-                DRM_DEBUG_DRIVER(I915_DRV,
+                DRM_DEBUG_DRIVER("sarea not found assuming DRI2 userspace\n");
-                                "sarea not found assuming DRI2 userspace\n");
        }
        if (init->ring_size != 0) {
@@ -200,7 +227,6 @@ static int i915_initialize(struct drm_device * dev, drm_i915_init_t * init)
                }
                dev_priv->ring.Size = init->ring_size;
-                dev_priv->ring.tail_mask = dev_priv->ring.Size - 1;
                dev_priv->ring.map.offset = init->ring_start;
                dev_priv->ring.map.size = init->ring_size;
@@ -238,7 +264,7 @@ static int i915_dma_resume(struct drm_device * dev)
 {
        drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
-        DRM_DEBUG_DRIVER(I915_DRV, "%s\n", __func__);
+        DRM_DEBUG_DRIVER("%s\n", __func__);
        if (dev_priv->ring.map.handle == NULL) {
                DRM_ERROR("can not ioremap virtual address for"
@@ -251,14 +277,14 @@ static int i915_dma_resume(struct drm_device * dev)
                DRM_ERROR("Can not find hardware status page\n");
                return -EINVAL;
        }
-        DRM_DEBUG_DRIVER(I915_DRV, "hw status page @ %p\n",
+        DRM_DEBUG_DRIVER("hw status page @ %p\n",
                                dev_priv->hw_status_page);
        if (dev_priv->status_gfx_addr != 0)
                I915_WRITE(HWS_PGA, dev_priv->status_gfx_addr);
        else
                I915_WRITE(HWS_PGA, dev_priv->dma_status_page);
-        DRM_DEBUG_DRIVER(I915_DRV, "Enabled hardware status page\n");
+        DRM_DEBUG_DRIVER("Enabled hardware status page\n");
        return 0;
 }
@@ -552,7 +578,7 @@ static int i915_dispatch_flip(struct drm_device * dev)
        if (!master_priv->sarea_priv)
                return -EINVAL;
-        DRM_DEBUG_DRIVER(I915_DRV, "%s: page=%d pfCurrentPage=%d\n",
+        DRM_DEBUG_DRIVER("%s: page=%d pfCurrentPage=%d\n",
                          __func__,
                         dev_priv->current_page,
                         master_priv->sarea_priv->pf_current_page);
@@ -633,8 +659,7 @@ static int i915_batchbuffer(struct drm_device *dev, void *data,
                return -EINVAL;
        }
-        DRM_DEBUG_DRIVER(I915_DRV,
+        DRM_DEBUG_DRIVER("i915 batchbuffer, start %x used %d cliprects %d\n",
-                        "i915 batchbuffer, start %x used %d cliprects %d\n",
                        batch->start, batch->used, batch->num_cliprects);
        RING_LOCK_TEST_WITH_RETURN(dev, file_priv);
@@ -681,8 +706,7 @@ static int i915_cmdbuffer(struct drm_device *dev, void *data,
        void *batch_data;
        int ret;
-        DRM_DEBUG_DRIVER(I915_DRV,
+        DRM_DEBUG_DRIVER("i915 cmdbuffer, buf %p sz %d cliprects %d\n",
-                        "i915 cmdbuffer, buf %p sz %d cliprects %d\n",
                        cmdbuf->buf, cmdbuf->sz, cmdbuf->num_cliprects);
        RING_LOCK_TEST_WITH_RETURN(dev, file_priv);
@@ -735,7 +759,7 @@ static int i915_flip_bufs(struct drm_device *dev, void *data,
 {
        int ret;
-        DRM_DEBUG_DRIVER(I915_DRV, "%s\n", __func__);
+        DRM_DEBUG_DRIVER("%s\n", __func__);
        RING_LOCK_TEST_WITH_RETURN(dev, file_priv);
@@ -778,7 +802,7 @@ static int i915_getparam(struct drm_device *dev, void *data,
                value = dev_priv->num_fence_regs - dev_priv->fence_reg_start;
                break;
        default:
-                DRM_DEBUG_DRIVER(I915_DRV, "Unknown parameter %d\n",
+                DRM_DEBUG_DRIVER("Unknown parameter %d\n",
                                        param->param);
                return -EINVAL;
        }
@@ -819,7 +843,7 @@ static int i915_setparam(struct drm_device *dev, void *data,
                dev_priv->fence_reg_start = param->value;
                break;
        default:
-                DRM_DEBUG_DRIVER(I915_DRV, "unknown parameter %d\n",
+                DRM_DEBUG_DRIVER("unknown parameter %d\n",
                                        param->param);
                return -EINVAL;
        }
@@ -846,7 +870,7 @@ static int i915_set_status_page(struct drm_device *dev, void *data,
                return 0;
        }
-        DRM_DEBUG("set status page addr 0x%08x\n", (u32)hws->addr);
+        DRM_DEBUG_DRIVER("set status page addr 0x%08x\n", (u32)hws->addr);
        dev_priv->status_gfx_addr = hws->addr & (0x1ffff<<12);
@@ -868,13 +892,25 @@ static int i915_set_status_page(struct drm_device *dev, void *data,
        memset(dev_priv->hw_status_page, 0, PAGE_SIZE);
        I915_WRITE(HWS_PGA, dev_priv->status_gfx_addr);
-        DRM_DEBUG_DRIVER(I915_DRV, "load hws HWS_PGA with gfx mem 0x%x\n",
+        DRM_DEBUG_DRIVER("load hws HWS_PGA with gfx mem 0x%x\n",
                                dev_priv->status_gfx_addr);
-        DRM_DEBUG_DRIVER(I915_DRV, "load hws at %p\n",
+        DRM_DEBUG_DRIVER("load hws at %p\n",
                                dev_priv->hw_status_page);
        return 0;
 }
+static int i915_get_bridge_dev(struct drm_device *dev)
+{
+        struct drm_i915_private *dev_priv = dev->dev_private;
+        dev_priv->bridge_dev = pci_get_bus_and_slot(0, PCI_DEVFN(0,0));
+        if (!dev_priv->bridge_dev) {
+                DRM_ERROR("bridge device not found\n");
+                return -1;
+        }
+        return 0;
+}
 /**
 * i915_probe_agp - get AGP bootup configuration
 * @pdev: PCI device
@@ -888,20 +924,13 @@ static int i915_set_status_page(struct drm_device *dev, void *data,
 static int i915_probe_agp(struct drm_device *dev, uint32_t *aperture_size,
                          uint32_t *preallocated_size)
 {
-        struct pci_dev *bridge_dev;
+        struct drm_i915_private *dev_priv = dev->dev_private;
        u16 tmp = 0;
        unsigned long overhead;
        unsigned long stolen;
-        bridge_dev = pci_get_bus_and_slot(0, PCI_DEVFN(0,0));
-        if (!bridge_dev) {
-                DRM_ERROR("bridge device not found\n");
-                return -1;
-        }
        /* Get the fb aperture size and "stolen" memory amount. */
-        pci_read_config_word(bridge_dev, INTEL_GMCH_CTRL, &tmp);
+        pci_read_config_word(dev_priv->bridge_dev, INTEL_GMCH_CTRL, &tmp);
-        pci_dev_put(bridge_dev);
        *aperture_size = 1024 * 1024;
        *preallocated_size = 1024 * 1024;
@@ -984,6 +1013,19 @@ static int i915_probe_agp(struct drm_device *dev, uint32_t *aperture_size,
        return 0;
 }
+/* true = enable decode, false = disable decoder */
+static unsigned int i915_vga_set_decode(void *cookie, bool state)
+{
+        struct drm_device *dev = cookie;
+        intel_modeset_vga_set_state(dev, state);
+        if (state)
+                return VGA_RSRC_LEGACY_IO | VGA_RSRC_LEGACY_MEM |
+                       VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM;
+        else
+                return VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM;
+}
 static int i915_load_modeset_init(struct drm_device *dev,
                                  unsigned long prealloc_size,
                                  unsigned long agp_size)
@@ -1029,6 +1071,11 @@ static int i915_load_modeset_init(struct drm_device *dev,
        if (ret)
                DRM_INFO("failed to find VBIOS tables\n");
+        /* if we have > 1 VGA cards, then disable the radeon VGA resources */
+        ret = vga_client_register(dev->pdev, dev, NULL, i915_vga_set_decode);
+        if (ret)
+                goto destroy_ringbuffer;
        ret = drm_irq_install(dev);
        if (ret)
                goto destroy_ringbuffer;
@@ -1153,11 +1200,16 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags)
        base = drm_get_resource_start(dev, mmio_bar);
        size = drm_get_resource_len(dev, mmio_bar);
+        if (i915_get_bridge_dev(dev)) {
+                ret = -EIO;
+                goto free_priv;
+        }
        dev_priv->regs = ioremap(base, size);
        if (!dev_priv->regs) {
                DRM_ERROR("failed to map registers\n");
                ret = -EIO;
-                goto free_priv;
+                goto put_bridge;
        }
        dev_priv->mm.gtt_mapping =
@@ -1269,6 +1321,8 @@ out_iomapfree:
        io_mapping_free(dev_priv->mm.gtt_mapping);
 out_rmmap:
        iounmap(dev_priv->regs);
+put_bridge:
+        pci_dev_put(dev_priv->bridge_dev);
 free_priv:
        kfree(dev_priv);
        return ret;
@@ -1289,6 +1343,7 @@ int i915_driver_unload(struct drm_device *dev)
        if (drm_core_check_feature(dev, DRIVER_MODESET)) {
                drm_irq_uninstall(dev);
+                vga_client_register(dev->pdev, NULL, NULL, NULL);
        }
        if (dev->pdev->msi_enabled)
@@ -1312,6 +1367,7 @@ int i915_driver_unload(struct drm_device *dev)
                i915_gem_lastclose(dev);
        }
+        pci_dev_put(dev_priv->bridge_dev);
        kfree(dev->dev_private);
        return 0;
@@ -1321,7 +1377,7 @@ int i915_driver_open(struct drm_device *dev, struct drm_file *file_priv)
 {
        struct drm_i915_file_private *i915_file_priv;
-        DRM_DEBUG_DRIVER(I915_DRV, "\n");
+        DRM_DEBUG_DRIVER("\n");
        i915_file_priv = (struct drm_i915_file_private *)
            kmalloc(sizeof(*i915_file_priv), GFP_KERNEL);
@@ -1352,7 +1408,7 @@ void i915_driver_lastclose(struct drm_device * dev)
        drm_i915_private_t *dev_priv = dev->dev_private;
        if (!dev_priv || drm_core_check_feature(dev, DRIVER_MODESET)) {
-                intelfb_restore();
+                drm_fb_helper_restore();
                return;
        }
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index fc4b68aa2d05..dbe568c9327b 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -37,12 +37,15 @@
 #include <linux/console.h>
 #include "drm_crtc_helper.h"
-static unsigned int i915_modeset = -1;
+static int i915_modeset = -1;
 module_param_named(modeset, i915_modeset, int, 0400);
 unsigned int i915_fbpercrtc = 0;
 module_param_named(fbpercrtc, i915_fbpercrtc, int, 0400);
+unsigned int i915_powersave = 1;
+module_param_named(powersave, i915_powersave, int, 0400);
 static struct drm_driver driver;
 static struct pci_device_id pciidlist[] = {
@@ -188,8 +191,8 @@ static struct drm_driver driver = {
        .master_create = i915_master_create,
        .master_destroy = i915_master_destroy,
 #if defined(CONFIG_DEBUG_FS)
-        .debugfs_init = i915_gem_debugfs_init,
+        .debugfs_init = i915_debugfs_init,
-        .debugfs_cleanup = i915_gem_debugfs_cleanup,
+        .debugfs_cleanup = i915_debugfs_cleanup,
 #endif
        .gem_init_object = i915_gem_init_object,
        .gem_free_object = i915_gem_free_object,
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 5b4f87e55621..a0632f8e76ac 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -85,7 +85,6 @@ struct drm_i915_gem_phys_object {
 };
 typedef struct _drm_i915_ring_buffer {
-        int tail_mask;
        unsigned long Size;
        u8 *virtual_start;
        int head;
@@ -156,6 +155,7 @@ typedef struct drm_i915_private {
        void __iomem *regs;
+        struct pci_dev *bridge_dev;
        drm_i915_ring_buffer_t ring;
        drm_dma_handle_t *status_page_dmah;
@@ -311,7 +311,7 @@ typedef struct drm_i915_private {
        u32 saveIMR;
        u32 saveCACHE_MODE_0;
        u32 saveD_STATE;
-        u32 saveCG_2D_DIS;
+        u32 saveDSPCLK_GATE_D;
        u32 saveMI_ARB_STATE;
        u32 saveSWF0[16];
        u32 saveSWF1[16];
@@ -443,6 +443,14 @@ typedef struct drm_i915_private {
                struct drm_i915_gem_phys_object *phys_objs[I915_MAX_PHYS_OBJECT];
        } mm;
        struct sdvo_device_mapping sdvo_mappings[2];
+        /* Reclocking support */
+        bool render_reclock_avail;
+        bool lvds_downclock_avail;
+        struct work_struct idle_work;
+        struct timer_list idle_timer;
+        bool busy;
+        u16 orig_clock;
 } drm_i915_private_t;
 /** driver private structure attached to each drm_gem_object */
@@ -575,6 +583,7 @@ enum intel_chip_family {
 extern struct drm_ioctl_desc i915_ioctls[];
 extern int i915_max_ioctl;
 extern unsigned int i915_fbpercrtc;
+extern unsigned int i915_powersave;
 extern int i915_master_create(struct drm_device *dev, struct drm_master *master);
 extern void i915_master_destroy(struct drm_device *dev, struct drm_master *master);
@@ -730,8 +739,8 @@ void i915_gem_dump_object(struct drm_gem_object *obj, int len,
 void i915_dump_lru(struct drm_device *dev, const char *where);
 /* i915_debugfs.c */
-int i915_gem_debugfs_init(struct drm_minor *minor);
+int i915_debugfs_init(struct drm_minor *minor);
-void i915_gem_debugfs_cleanup(struct drm_minor *minor);
+void i915_debugfs_cleanup(struct drm_minor *minor);
 /* i915_suspend.c */
 extern int i915_save_state(struct drm_device *dev);
@@ -757,6 +766,7 @@ static inline void opregion_enable_asle(struct drm_device *dev) { return; }
 /* modesetting */
 extern void intel_modeset_init(struct drm_device *dev);
 extern void intel_modeset_cleanup(struct drm_device *dev);
+extern int intel_modeset_vga_set_state(struct drm_device *dev, bool state);
 /**
 * Lock test for when it's just for synchronization of ring access.
@@ -781,33 +791,32 @@ extern void intel_modeset_cleanup(struct drm_device *dev);
 #define I915_VERBOSE 0
-#define RING_LOCALS     unsigned int outring, ringmask, outcount; \
+#define RING_LOCALS     volatile unsigned int *ring_virt__;
-                        volatile char *virt;
+#define BEGIN_LP_RING(n) do {                                           \
-#define BEGIN_LP_RING(n) do {                           \
+        int bytes__ = 4*(n);                                            \
-        if (I915_VERBOSE)                               \
+        if (I915_VERBOSE) DRM_DEBUG("BEGIN_LP_RING(%d)\n", (n));        \
-                DRM_DEBUG("BEGIN_LP_RING(%d)\n", (n));  \
+        /* a wrap must occur between instructions so pad beforehand */  \
-        if (dev_priv->ring.space < (n)*4)               \
+        if (unlikely (dev_priv->ring.tail + bytes__ > dev_priv->ring.Size)) \
-                i915_wait_ring(dev, (n)*4, __func__);           \
+                i915_wrap_ring(dev);                                    \
-        outcount = 0;                                   \
+        if (unlikely (dev_priv->ring.space < bytes__))                  \
-        outring = dev_priv->ring.tail;                  \
+                i915_wait_ring(dev, bytes__, __func__);                 \
-        ringmask = dev_priv->ring.tail_mask;            \
+        ring_virt__ = (unsigned int *)                                  \
-        virt = dev_priv->ring.virtual_start;            \
+                (dev_priv->ring.virtual_start + dev_priv->ring.tail);   \
+        dev_priv->ring.tail += bytes__;                                 \
+        dev_priv->ring.tail &= dev_priv->ring.Size - 1;                 \
+        dev_priv->ring.space -= bytes__;                                \
 } while (0)
-#define OUT_RING(n) do {                                        \
+#define OUT_RING(n) do {                                                \
        if (I915_VERBOSE) DRM_DEBUG("   OUT_RING %x\n", (int)(n));      \
-        *(volatile unsigned int *)(virt + outring) = (n);       \
+        *ring_virt__++ = (n);                                           \
-        outcount++;                                             \
-        outring += 4;                                           \
-        outring &= ringmask;                                    \
 } while (0)
 #define ADVANCE_LP_RING() do {                                          \
-        if (I915_VERBOSE) DRM_DEBUG("ADVANCE_LP_RING %x\n", outring);   \
+        if (I915_VERBOSE)                                               \
-        dev_priv->ring.tail = outring;                                  \
+                DRM_DEBUG("ADVANCE_LP_RING %x\n", dev_priv->ring.tail); \
-        dev_priv->ring.space -= outcount * 4;                           \
+        I915_WRITE(PRB0_TAIL, dev_priv->ring.tail);                     \
-        I915_WRITE(PRB0_TAIL, outring);                 \
 } while(0)
 /**
@@ -830,6 +839,7 @@ extern void intel_modeset_cleanup(struct drm_device *dev);
 #define I915_GEM_HWS_INDEX              0x20
 #define I915_BREADCRUMB_INDEX           0x21
+extern int i915_wrap_ring(struct drm_device * dev);
 extern int i915_wait_ring(struct drm_device * dev, int n, const char *caller);
 #define IS_I830(dev) ((dev)->pci_device == 0x3577)
@@ -903,6 +913,9 @@ extern int i915_wait_ring(struct drm_device * dev, int n, const char *caller);
 /* dsparb controlled by hw only */
 #define DSPARB_HWCONTROL(dev) (IS_G4X(dev) || IS_IGDNG(dev))
+#define HAS_FW_BLC(dev) (IS_I9XX(dev) || IS_G4X(dev) || IS_IGDNG(dev))
+#define HAS_PIPE_CXSR(dev) (IS_G4X(dev) || IS_IGDNG(dev))
 #define PRIMARY_RINGBUFFER_SIZE         (128*1024)
 #endif
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 80e5ba490dc2..c67317112f4a 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -29,6 +29,7 @@
 #include "drm.h"
 #include "i915_drm.h"
 #include "i915_drv.h"
+#include "intel_drv.h"
 #include <linux/swap.h>
 #include <linux/pci.h>
@@ -111,7 +112,8 @@ i915_gem_create_ioctl(struct drm_device *dev, void *data,
 {
        struct drm_i915_gem_create *args = data;
        struct drm_gem_object *obj;
-        int handle, ret;
+        int ret;
+        u32 handle;
        args->size = roundup(args->size, PAGE_SIZE);
@@ -981,6 +983,7 @@ i915_gem_set_domain_ioctl(struct drm_device *dev, void *data,
        struct drm_i915_private *dev_priv = dev->dev_private;
        struct drm_i915_gem_set_domain *args = data;
        struct drm_gem_object *obj;
+        struct drm_i915_gem_object *obj_priv;
        uint32_t read_domains = args->read_domains;
        uint32_t write_domain = args->write_domain;
        int ret;
@@ -1004,15 +1007,17 @@ i915_gem_set_domain_ioctl(struct drm_device *dev, void *data,
        obj = drm_gem_object_lookup(dev, file_priv, args->handle);
        if (obj == NULL)
                return -EBADF;
+        obj_priv = obj->driver_private;
        mutex_lock(&dev->struct_mutex);
+        intel_mark_busy(dev, obj);
 #if WATCH_BUF
        DRM_INFO("set_domain_ioctl %p(%zd), %08x %08x\n",
                 obj, obj->size, read_domains, write_domain);
 #endif
        if (read_domains & I915_GEM_DOMAIN_GTT) {
-                struct drm_i915_gem_object *obj_priv = obj->driver_private;
                ret = i915_gem_object_set_to_gtt_domain(obj, write_domain != 0);
                /* Update the LRU on the fence for the CPU access that's
@@ -2776,6 +2781,8 @@ i915_gem_object_set_to_gpu_domain(struct drm_gem_object *obj)
        BUG_ON(obj->pending_read_domains & I915_GEM_DOMAIN_CPU);
        BUG_ON(obj->pending_write_domain == I915_GEM_DOMAIN_CPU);
+        intel_mark_busy(dev, obj);
 #if WATCH_BUF
        DRM_INFO("%s: object %p read %08x -> %08x write %08x -> %08x\n",
                 __func__, obj,
@@ -4093,7 +4100,6 @@ i915_gem_init_ringbuffer(struct drm_device *dev)
        /* Set up the kernel mapping for the ring. */
        ring->Size = obj->size;
-        ring->tail_mask = obj->size - 1;
        ring->map.offset = dev->agp->base + obj_priv->gtt_offset;
        ring->map.size = obj->size;
diff --git a/drivers/gpu/drm/i915/i915_gem_tiling.c b/drivers/gpu/drm/i915/i915_gem_tiling.c
index a2d527b22ec4..200e398453ca 100644
--- a/drivers/gpu/drm/i915/i915_gem_tiling.c
+++ b/drivers/gpu/drm/i915/i915_gem_tiling.c
@@ -94,23 +94,15 @@
 static int
 intel_alloc_mchbar_resource(struct drm_device *dev)
 {
-        struct pci_dev *bridge_dev;
        drm_i915_private_t *dev_priv = dev->dev_private;
        int reg = IS_I965G(dev) ? MCHBAR_I965 : MCHBAR_I915;
        u32 temp_lo, temp_hi = 0;
        u64 mchbar_addr;
        int ret = 0;
-        bridge_dev = pci_get_bus_and_slot(0, PCI_DEVFN(0,0));
-        if (!bridge_dev) {
-                DRM_DEBUG("no bridge dev?!\n");
-                ret = -ENODEV;
-                goto out;
-        }
        if (IS_I965G(dev))
-                pci_read_config_dword(bridge_dev, reg + 4, &temp_hi);
+                pci_read_config_dword(dev_priv->bridge_dev, reg + 4, &temp_hi);
-        pci_read_config_dword(bridge_dev, reg, &temp_lo);
+        pci_read_config_dword(dev_priv->bridge_dev, reg, &temp_lo);
        mchbar_addr = ((u64)temp_hi << 32) | temp_lo;
        /* If ACPI doesn't have it, assume we need to allocate it ourselves */
@@ -118,30 +110,28 @@ intel_alloc_mchbar_resource(struct drm_device *dev)
        if (mchbar_addr &&
            pnp_range_reserved(mchbar_addr, mchbar_addr + MCHBAR_SIZE)) {
                ret = 0;
-                goto out_put;
+                goto out;
        }
 #endif
        /* Get some space for it */
-        ret = pci_bus_alloc_resource(bridge_dev->bus, &dev_priv->mch_res,
+        ret = pci_bus_alloc_resource(dev_priv->bridge_dev->bus, &dev_priv->mch_res,
                                     MCHBAR_SIZE, MCHBAR_SIZE,
                                     PCIBIOS_MIN_MEM,
                                     0,   pcibios_align_resource,
-                                     bridge_dev);
+                                     dev_priv->bridge_dev);
        if (ret) {
                DRM_DEBUG("failed bus alloc: %d\n", ret);
                dev_priv->mch_res.start = 0;
-                goto out_put;
+                goto out;
        }
        if (IS_I965G(dev))
-                pci_write_config_dword(bridge_dev, reg + 4,
+                pci_write_config_dword(dev_priv->bridge_dev, reg + 4,
                                       upper_32_bits(dev_priv->mch_res.start));
-        pci_write_config_dword(bridge_dev, reg,
+        pci_write_config_dword(dev_priv->bridge_dev, reg,
                               lower_32_bits(dev_priv->mch_res.start));
-out_put:
-        pci_dev_put(bridge_dev);
 out:
        return ret;
 }
@@ -150,44 +140,36 @@ out:
 static bool
 intel_setup_mchbar(struct drm_device *dev)
 {
-        struct pci_dev *bridge_dev;
+        drm_i915_private_t *dev_priv = dev->dev_private;
        int mchbar_reg = IS_I965G(dev) ? MCHBAR_I965 : MCHBAR_I915;
        u32 temp;
        bool need_disable = false, enabled;
-        bridge_dev = pci_get_bus_and_slot(0, PCI_DEVFN(0,0));
-        if (!bridge_dev) {
-                DRM_DEBUG("no bridge dev?!\n");
-                goto out;
-        }
        if (IS_I915G(dev) || IS_I915GM(dev)) {
-                pci_read_config_dword(bridge_dev, DEVEN_REG, &temp);
+                pci_read_config_dword(dev_priv->bridge_dev, DEVEN_REG, &temp);
                enabled = !!(temp & DEVEN_MCHBAR_EN);
        } else {
-                pci_read_config_dword(bridge_dev, mchbar_reg, &temp);
+                pci_read_config_dword(dev_priv->bridge_dev, mchbar_reg, &temp);
                enabled = temp & 1;
        }
        /* If it's already enabled, don't have to do anything */
        if (enabled)
-                goto out_put;
+                goto out;
        if (intel_alloc_mchbar_resource(dev))
-                goto out_put;
+                goto out;
        need_disable = true;
        /* Space is allocated or reserved, so enable it. */
        if (IS_I915G(dev) || IS_I915GM(dev)) {
-                pci_write_config_dword(bridge_dev, DEVEN_REG,
+                pci_write_config_dword(dev_priv->bridge_dev, DEVEN_REG,
                                       temp | DEVEN_MCHBAR_EN);
        } else {
-                pci_read_config_dword(bridge_dev, mchbar_reg, &temp);
+                pci_read_config_dword(dev_priv->bridge_dev, mchbar_reg, &temp);
-                pci_write_config_dword(bridge_dev, mchbar_reg, temp | 1);
+                pci_write_config_dword(dev_priv->bridge_dev, mchbar_reg, temp | 1);
        }
-out_put:
-        pci_dev_put(bridge_dev);
 out:
        return need_disable;
 }
@@ -196,25 +178,18 @@ static void
 intel_teardown_mchbar(struct drm_device *dev, bool disable)
 {
        drm_i915_private_t *dev_priv = dev->dev_private;
-        struct pci_dev *bridge_dev;
        int mchbar_reg = IS_I965G(dev) ? MCHBAR_I965 : MCHBAR_I915;
        u32 temp;
-        bridge_dev = pci_get_bus_and_slot(0, PCI_DEVFN(0,0));
-        if (!bridge_dev) {
-                DRM_DEBUG("no bridge dev?!\n");
-                return;
-        }
        if (disable) {
                if (IS_I915G(dev) || IS_I915GM(dev)) {
-                        pci_read_config_dword(bridge_dev, DEVEN_REG, &temp);
+                        pci_read_config_dword(dev_priv->bridge_dev, DEVEN_REG, &temp);
                        temp &= ~DEVEN_MCHBAR_EN;
-                        pci_write_config_dword(bridge_dev, DEVEN_REG, temp);
+                        pci_write_config_dword(dev_priv->bridge_dev, DEVEN_REG, temp);
                } else {
-                        pci_read_config_dword(bridge_dev, mchbar_reg, &temp);
+                        pci_read_config_dword(dev_priv->bridge_dev, mchbar_reg, &temp);
                        temp &= ~1;
-                        pci_write_config_dword(bridge_dev, mchbar_reg, temp);
+                        pci_write_config_dword(dev_priv->bridge_dev, mchbar_reg, temp);
                }
        }
@@ -234,7 +209,13 @@ i915_gem_detect_bit_6_swizzle(struct drm_device *dev)
        uint32_t swizzle_y = I915_BIT_6_SWIZZLE_UNKNOWN;
        bool need_disable;
-        if (!IS_I9XX(dev)) {
+        if (IS_IGDNG(dev)) {
+                /* On IGDNG whatever DRAM config, GPU always do
+                 * same swizzling setup.
+                 */
+                swizzle_x = I915_BIT_6_SWIZZLE_9_10;
+                swizzle_y = I915_BIT_6_SWIZZLE_9;
+        } else if (!IS_I9XX(dev)) {
                /* As far as we know, the 865 doesn't have these bit 6
                 * swizzling issues.
                 */
@@ -317,13 +298,6 @@ i915_gem_detect_bit_6_swizzle(struct drm_device *dev)
                }
        }
-        /* FIXME: check with memory config on IGDNG */
-        if (IS_IGDNG(dev)) {
-                DRM_ERROR("disable tiling on IGDNG...\n");
-                swizzle_x = I915_BIT_6_SWIZZLE_UNKNOWN;
-                swizzle_y = I915_BIT_6_SWIZZLE_UNKNOWN;
-        }
        dev_priv->mm.bit_6_swizzle_x = swizzle_x;
        dev_priv->mm.bit_6_swizzle_y = swizzle_y;
 }
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 7ebc84c2881e..6c89f2ff2495 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -565,6 +565,27 @@ irqreturn_t i915_driver_irq_handler(DRM_IRQ_ARGS)
                        I915_WRITE(PORT_HOTPLUG_STAT, hotplug_status);
                        I915_READ(PORT_HOTPLUG_STAT);
+                        /* EOS interrupts occurs */
+                        if (IS_IGD(dev) &&
+                                (hotplug_status & CRT_EOS_INT_STATUS)) {
+                                u32 temp;
+                                DRM_DEBUG("EOS interrupt occurs\n");
+                                /* status is already cleared */
+                                temp = I915_READ(ADPA);
+                                temp &= ~ADPA_DAC_ENABLE;
+                                I915_WRITE(ADPA, temp);
+                                temp = I915_READ(PORT_HOTPLUG_EN);
+                                temp &= ~CRT_EOS_INT_EN;
+                                I915_WRITE(PORT_HOTPLUG_EN, temp);
+                                temp = I915_READ(PORT_HOTPLUG_STAT);
+                                if (temp & CRT_EOS_INT_STATUS)
+                                        I915_WRITE(PORT_HOTPLUG_STAT,
+                                                CRT_EOS_INT_STATUS);
+                        }
                }
                I915_WRITE(IIR, iir);
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 2955083aa471..3f7963553464 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -30,6 +30,7 @@
 * fb aperture size and the amount of pre-reserved memory.
 */
 #define INTEL_GMCH_CTRL         0x52
+#define INTEL_GMCH_VGA_DISABLE  (1 << 1)
 #define INTEL_GMCH_ENABLED      0x4
 #define INTEL_GMCH_MEM_MASK     0x1
 #define INTEL_GMCH_MEM_64M      0x1
@@ -55,7 +56,7 @@
 /* PCI config space */
 #define HPLLCC  0xc0 /* 855 only */
-#define   GC_CLOCK_CONTROL_MASK         (3 << 0)
+#define   GC_CLOCK_CONTROL_MASK         (0xf << 0)
 #define   GC_CLOCK_133_200              (0 << 0)
 #define   GC_CLOCK_100_200              (1 << 0)
 #define   GC_CLOCK_100_133              (2 << 0)
@@ -65,6 +66,25 @@
 #define   GC_DISPLAY_CLOCK_190_200_MHZ  (0 << 4)
 #define   GC_DISPLAY_CLOCK_333_MHZ      (4 << 4)
 #define   GC_DISPLAY_CLOCK_MASK         (7 << 4)
+#define   GM45_GC_RENDER_CLOCK_MASK     (0xf << 0)
+#define   GM45_GC_RENDER_CLOCK_266_MHZ  (8 << 0)
+#define   GM45_GC_RENDER_CLOCK_320_MHZ  (9 << 0)
+#define   GM45_GC_RENDER_CLOCK_400_MHZ  (0xb << 0)
+#define   GM45_GC_RENDER_CLOCK_533_MHZ  (0xc << 0)
+#define   I965_GC_RENDER_CLOCK_MASK     (0xf << 0)
+#define   I965_GC_RENDER_CLOCK_267_MHZ  (2 << 0)
+#define   I965_GC_RENDER_CLOCK_333_MHZ  (3 << 0)
+#define   I965_GC_RENDER_CLOCK_444_MHZ  (4 << 0)
+#define   I965_GC_RENDER_CLOCK_533_MHZ  (5 << 0)
+#define   I945_GC_RENDER_CLOCK_MASK     (7 << 0)
+#define   I945_GC_RENDER_CLOCK_166_MHZ  (0 << 0)
+#define   I945_GC_RENDER_CLOCK_200_MHZ  (1 << 0)
+#define   I945_GC_RENDER_CLOCK_250_MHZ  (3 << 0)
+#define   I945_GC_RENDER_CLOCK_400_MHZ  (5 << 0)
+#define   I915_GC_RENDER_CLOCK_MASK     (7 << 0)
+#define   I915_GC_RENDER_CLOCK_166_MHZ  (0 << 0)
+#define   I915_GC_RENDER_CLOCK_200_MHZ  (1 << 0)
+#define   I915_GC_RENDER_CLOCK_333_MHZ  (4 << 0)
 #define LBB     0xf4
 /* VGA stuff */
@@ -553,9 +573,118 @@
 #define   DPLLA_TEST_M_BYPASS           (1 << 2)
 #define   DPLLA_INPUT_BUFFER_ENABLE     (1 << 0)
 #define D_STATE         0x6104
-#define CG_2D_DIS       0x6200
+#define  DSTATE_PLL_D3_OFF                      (1<<3)
-#define DPCUNIT_CLOCK_GATE_DISABLE      (1 << 24)
+#define  DSTATE_GFX_CLOCK_GATING                (1<<1)
-#define CG_3D_DIS       0x6204
+#define  DSTATE_DOT_CLOCK_GATING                (1<<0)
+#define DSPCLK_GATE_D           0x6200
+# define DPUNIT_B_CLOCK_GATE_DISABLE            (1 << 30) /* 965 */
+# define VSUNIT_CLOCK_GATE_DISABLE              (1 << 29) /* 965 */
+# define VRHUNIT_CLOCK_GATE_DISABLE             (1 << 28) /* 965 */
+# define VRDUNIT_CLOCK_GATE_DISABLE             (1 << 27) /* 965 */
+# define AUDUNIT_CLOCK_GATE_DISABLE             (1 << 26) /* 965 */
+# define DPUNIT_A_CLOCK_GATE_DISABLE            (1 << 25) /* 965 */
+# define DPCUNIT_CLOCK_GATE_DISABLE             (1 << 24) /* 965 */
+# define TVRUNIT_CLOCK_GATE_DISABLE             (1 << 23) /* 915-945 */
+# define TVCUNIT_CLOCK_GATE_DISABLE             (1 << 22) /* 915-945 */
+# define TVFUNIT_CLOCK_GATE_DISABLE             (1 << 21) /* 915-945 */
+# define TVEUNIT_CLOCK_GATE_DISABLE             (1 << 20) /* 915-945 */
+# define DVSUNIT_CLOCK_GATE_DISABLE             (1 << 19) /* 915-945 */
+# define DSSUNIT_CLOCK_GATE_DISABLE             (1 << 18) /* 915-945 */
+# define DDBUNIT_CLOCK_GATE_DISABLE             (1 << 17) /* 915-945 */
+# define DPRUNIT_CLOCK_GATE_DISABLE             (1 << 16) /* 915-945 */
+# define DPFUNIT_CLOCK_GATE_DISABLE             (1 << 15) /* 915-945 */
+# define DPBMUNIT_CLOCK_GATE_DISABLE            (1 << 14) /* 915-945 */
+# define DPLSUNIT_CLOCK_GATE_DISABLE            (1 << 13) /* 915-945 */
+# define DPLUNIT_CLOCK_GATE_DISABLE             (1 << 12) /* 915-945 */
+# define DPOUNIT_CLOCK_GATE_DISABLE             (1 << 11)
+# define DPBUNIT_CLOCK_GATE_DISABLE             (1 << 10)
+# define DCUNIT_CLOCK_GATE_DISABLE              (1 << 9)
+# define DPUNIT_CLOCK_GATE_DISABLE              (1 << 8)
+# define VRUNIT_CLOCK_GATE_DISABLE              (1 << 7) /* 915+: reserved */
+# define OVHUNIT_CLOCK_GATE_DISABLE             (1 << 6) /* 830-865 */
+# define DPIOUNIT_CLOCK_GATE_DISABLE            (1 << 6) /* 915-945 */
+# define OVFUNIT_CLOCK_GATE_DISABLE             (1 << 5)
+# define OVBUNIT_CLOCK_GATE_DISABLE             (1 << 4)
+/**
+ * This bit must be set on the 830 to prevent hangs when turning off the
+ * overlay scaler.
+ */
+# define OVRUNIT_CLOCK_GATE_DISABLE             (1 << 3)
+# define OVCUNIT_CLOCK_GATE_DISABLE             (1 << 2)
+# define OVUUNIT_CLOCK_GATE_DISABLE             (1 << 1)
+# define ZVUNIT_CLOCK_GATE_DISABLE              (1 << 0) /* 830 */
+# define OVLUNIT_CLOCK_GATE_DISABLE             (1 << 0) /* 845,865 */
+#define RENCLK_GATE_D1          0x6204
+# define BLITTER_CLOCK_GATE_DISABLE             (1 << 13) /* 945GM only */
+# define MPEG_CLOCK_GATE_DISABLE                (1 << 12) /* 945GM only */
+# define PC_FE_CLOCK_GATE_DISABLE               (1 << 11)
+# define PC_BE_CLOCK_GATE_DISABLE               (1 << 10)
+# define WINDOWER_CLOCK_GATE_DISABLE            (1 << 9)
+# define INTERPOLATOR_CLOCK_GATE_DISABLE        (1 << 8)
+# define COLOR_CALCULATOR_CLOCK_GATE_DISABLE    (1 << 7)
+# define MOTION_COMP_CLOCK_GATE_DISABLE         (1 << 6)
+# define MAG_CLOCK_GATE_DISABLE                 (1 << 5)
+/** This bit must be unset on 855,865 */
+# define MECI_CLOCK_GATE_DISABLE                (1 << 4)
+# define DCMP_CLOCK_GATE_DISABLE                (1 << 3)
+# define MEC_CLOCK_GATE_DISABLE                 (1 << 2)
+# define MECO_CLOCK_GATE_DISABLE                (1 << 1)
+/** This bit must be set on 855,865. */
+# define SV_CLOCK_GATE_DISABLE                  (1 << 0)
+# define I915_MPEG_CLOCK_GATE_DISABLE           (1 << 16)
+# define I915_VLD_IP_PR_CLOCK_GATE_DISABLE      (1 << 15)
+# define I915_MOTION_COMP_CLOCK_GATE_DISABLE    (1 << 14)
+# define I915_BD_BF_CLOCK_GATE_DISABLE          (1 << 13)
+# define I915_SF_SE_CLOCK_GATE_DISABLE          (1 << 12)
+# define I915_WM_CLOCK_GATE_DISABLE             (1 << 11)
+# define I915_IZ_CLOCK_GATE_DISABLE             (1 << 10)
+# define I915_PI_CLOCK_GATE_DISABLE             (1 << 9)
+# define I915_DI_CLOCK_GATE_DISABLE             (1 << 8)
+# define I915_SH_SV_CLOCK_GATE_DISABLE          (1 << 7)
+# define I915_PL_DG_QC_FT_CLOCK_GATE_DISABLE    (1 << 6)
+# define I915_SC_CLOCK_GATE_DISABLE             (1 << 5)
+# define I915_FL_CLOCK_GATE_DISABLE             (1 << 4)
+# define I915_DM_CLOCK_GATE_DISABLE             (1 << 3)
+# define I915_PS_CLOCK_GATE_DISABLE             (1 << 2)
+# define I915_CC_CLOCK_GATE_DISABLE             (1 << 1)
+# define I915_BY_CLOCK_GATE_DISABLE             (1 << 0)
+# define I965_RCZ_CLOCK_GATE_DISABLE            (1 << 30)
+/** This bit must always be set on 965G/965GM */
+# define I965_RCC_CLOCK_GATE_DISABLE            (1 << 29)
+# define I965_RCPB_CLOCK_GATE_DISABLE           (1 << 28)
+# define I965_DAP_CLOCK_GATE_DISABLE            (1 << 27)
+# define I965_ROC_CLOCK_GATE_DISABLE            (1 << 26)
+# define I965_GW_CLOCK_GATE_DISABLE             (1 << 25)
+# define I965_TD_CLOCK_GATE_DISABLE             (1 << 24)
+/** This bit must always be set on 965G */
+# define I965_ISC_CLOCK_GATE_DISABLE            (1 << 23)
+# define I965_IC_CLOCK_GATE_DISABLE             (1 << 22)
+# define I965_EU_CLOCK_GATE_DISABLE             (1 << 21)
+# define I965_IF_CLOCK_GATE_DISABLE             (1 << 20)
+# define I965_TC_CLOCK_GATE_DISABLE             (1 << 19)
+# define I965_SO_CLOCK_GATE_DISABLE             (1 << 17)
+# define I965_FBC_CLOCK_GATE_DISABLE            (1 << 16)
+# define I965_MARI_CLOCK_GATE_DISABLE           (1 << 15)
+# define I965_MASF_CLOCK_GATE_DISABLE           (1 << 14)
+# define I965_MAWB_CLOCK_GATE_DISABLE           (1 << 13)
+# define I965_EM_CLOCK_GATE_DISABLE             (1 << 12)
+# define I965_UC_CLOCK_GATE_DISABLE             (1 << 11)
+# define I965_SI_CLOCK_GATE_DISABLE             (1 << 6)
+# define I965_MT_CLOCK_GATE_DISABLE             (1 << 5)
+# define I965_PL_CLOCK_GATE_DISABLE             (1 << 4)
+# define I965_DG_CLOCK_GATE_DISABLE             (1 << 3)
+# define I965_QC_CLOCK_GATE_DISABLE             (1 << 2)
+# define I965_FT_CLOCK_GATE_DISABLE             (1 << 1)
+# define I965_DM_CLOCK_GATE_DISABLE             (1 << 0)
+#define RENCLK_GATE_D2          0x6208
+#define VF_UNIT_CLOCK_GATE_DISABLE              (1 << 9)
+#define GS_UNIT_CLOCK_GATE_DISABLE              (1 << 7)
+#define CL_UNIT_CLOCK_GATE_DISABLE              (1 << 6)
+#define RAMCLK_GATE_D           0x6210          /* CRL only */
+#define DEUC                    0x6214          /* CRL only */
 /*
 * Palette regs
@@ -683,6 +812,7 @@
 #define   SDVOB_HOTPLUG_INT_EN                  (1 << 26)
 #define   SDVOC_HOTPLUG_INT_EN                  (1 << 25)
 #define   TV_HOTPLUG_INT_EN                     (1 << 18)
+#define   CRT_EOS_INT_EN                        (1 << 10)
 #define   CRT_HOTPLUG_INT_EN                    (1 << 9)
 #define   CRT_HOTPLUG_FORCE_DETECT              (1 << 3)
 #define CRT_HOTPLUG_ACTIVATION_PERIOD_32        (0 << 8)
@@ -717,6 +847,7 @@
 #define   DPC_HOTPLUG_INT_STATUS                (1 << 28)
 #define   HDMID_HOTPLUG_INT_STATUS              (1 << 27)
 #define   DPD_HOTPLUG_INT_STATUS                (1 << 27)
+#define   CRT_EOS_INT_STATUS                    (1 << 12)
 #define   CRT_HOTPLUG_INT_STATUS                (1 << 11)
 #define   TV_HOTPLUG_INT_STATUS                 (1 << 10)
 #define   CRT_HOTPLUG_MONITOR_MASK              (3 << 8)
@@ -1586,6 +1717,7 @@
 #define   PIPECONF_PROGRESSIVE  (0 << 21)
 #define   PIPECONF_INTERLACE_W_FIELD_INDICATION (6 << 21)
 #define   PIPECONF_INTERLACE_FIELD_0_ONLY               (7 << 21)
+#define   PIPECONF_CXSR_DOWNCLOCK       (1<<16)
 #define PIPEASTAT               0x70024
 #define   PIPE_FIFO_UNDERRUN_STATUS             (1UL<<31)
 #define   PIPE_CRC_ERROR_ENABLE                 (1UL<<29)
@@ -1733,6 +1865,7 @@
 #define   DISPPLANE_NO_LINE_DOUBLE              0
 #define   DISPPLANE_STEREO_POLARITY_FIRST       0
 #define   DISPPLANE_STEREO_POLARITY_SECOND      (1<<18)
+#define   DISPPLANE_TRICKLE_FEED_DISABLE        (1<<14) /* IGDNG */
 #define   DISPPLANE_TILED                       (1<<10)
 #define DSPAADDR                0x70184
 #define DSPASTRIDE              0x70188
@@ -1913,6 +2046,9 @@
 #define GTIIR   0x44018
 #define GTIER   0x4401c
+#define DISP_ARB_CTL    0x45000
+#define  DISP_TILE_SURFACE_SWIZZLING    (1<<13)
 /* PCH */
 /* south display engine interrupt */
diff --git a/drivers/gpu/drm/i915/i915_suspend.c b/drivers/gpu/drm/i915/i915_suspend.c
index 1d04e1904ac6..20d4d19f5568 100644
--- a/drivers/gpu/drm/i915/i915_suspend.c
+++ b/drivers/gpu/drm/i915/i915_suspend.c
@@ -461,7 +461,7 @@ int i915_save_state(struct drm_device *dev)
        /* Clock gating state */
        dev_priv->saveD_STATE = I915_READ(D_STATE);
-        dev_priv->saveCG_2D_DIS = I915_READ(CG_2D_DIS);
+        dev_priv->saveDSPCLK_GATE_D = I915_READ(DSPCLK_GATE_D);
        /* Cache mode state */
        dev_priv->saveCACHE_MODE_0 = I915_READ(CACHE_MODE_0);
@@ -588,7 +588,7 @@ int i915_restore_state(struct drm_device *dev)
        /* Clock gating state */
        I915_WRITE (D_STATE, dev_priv->saveD_STATE);
-        I915_WRITE (CG_2D_DIS, dev_priv->saveCG_2D_DIS);
+        I915_WRITE (DSPCLK_GATE_D, dev_priv->saveDSPCLK_GATE_D);
        /* Cache mode state */
        I915_WRITE (CACHE_MODE_0, dev_priv->saveCACHE_MODE_0 | 0xffff0000);
diff --git a/drivers/gpu/drm/i915/intel_bios.c b/drivers/gpu/drm/i915/intel_bios.c
index f806fcc54e09..1e28c1652fd0 100644
--- a/drivers/gpu/drm/i915/intel_bios.c
+++ b/drivers/gpu/drm/i915/intel_bios.c
@@ -355,8 +355,14 @@ parse_driver_features(struct drm_i915_private *dev_priv,
        }
        driver = find_section(bdb, BDB_DRIVER_FEATURES);
-        if (driver && driver->lvds_config == BDB_DRIVER_FEATURE_EDP)
+        if (!driver)
+                return;
+        if (driver->lvds_config == BDB_DRIVER_FEATURE_EDP)
                dev_priv->edp_support = 1;
+        if (driver->dual_frequency)
+                dev_priv->render_reclock_avail = true;
 }
 /**
diff --git a/drivers/gpu/drm/i915/intel_crt.c b/drivers/gpu/drm/i915/intel_crt.c
index 590f81c8f594..88814fa2dfd2 100644
--- a/drivers/gpu/drm/i915/intel_crt.c
+++ b/drivers/gpu/drm/i915/intel_crt.c
@@ -64,6 +64,34 @@ static void intel_crt_dpms(struct drm_encoder *encoder, int mode)
        }
        I915_WRITE(reg, temp);
+        if (IS_IGD(dev)) {
+                if (mode == DRM_MODE_DPMS_OFF) {
+                        /* turn off DAC */
+                        temp = I915_READ(PORT_HOTPLUG_EN);
+                        temp &= ~CRT_EOS_INT_EN;
+                        I915_WRITE(PORT_HOTPLUG_EN, temp);
+                        temp = I915_READ(PORT_HOTPLUG_STAT);
+                        if (temp & CRT_EOS_INT_STATUS)
+                                I915_WRITE(PORT_HOTPLUG_STAT,
+                                        CRT_EOS_INT_STATUS);
+                } else {
+                        /* turn on DAC. EOS interrupt must be enabled after DAC
+                         * is enabled, so it sounds not good to enable it in
+                         * i915_driver_irq_postinstall()
+                         * wait 12.5ms after DAC is enabled
+                         */
+                        msleep(13);
+                        temp = I915_READ(PORT_HOTPLUG_STAT);
+                        if (temp & CRT_EOS_INT_STATUS)
+                                I915_WRITE(PORT_HOTPLUG_STAT,
+                                        CRT_EOS_INT_STATUS);
+                        temp = I915_READ(PORT_HOTPLUG_EN);
+                        temp |= CRT_EOS_INT_EN;
+                        I915_WRITE(PORT_HOTPLUG_EN, temp);
+                }
+        }
 }
 static int intel_crt_mode_valid(struct drm_connector *connector,
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 748ed50c55ca..0227b1652906 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -38,6 +38,7 @@
 bool intel_pipe_has_type (struct drm_crtc *crtc, int type);
 static void intel_update_watermarks(struct drm_device *dev);
+static void intel_increase_pllclock(struct drm_crtc *crtc, bool schedule);
 typedef struct {
    /* given values */
@@ -67,6 +68,8 @@ struct intel_limit {
    intel_p2_t      p2;
    bool (* find_pll)(const intel_limit_t *, struct drm_crtc *,
                      int, int, intel_clock_t *);
+    bool (* find_reduced_pll)(const intel_limit_t *, struct drm_crtc *,
+                              int, int, intel_clock_t *);
 };
 #define I8XX_DOT_MIN              25000
@@ -261,6 +264,9 @@ static bool
 intel_find_best_PLL(const intel_limit_t *limit, struct drm_crtc *crtc,
                    int target, int refclk, intel_clock_t *best_clock);
 static bool
+intel_find_best_reduced_PLL(const intel_limit_t *limit, struct drm_crtc *crtc,
+                            int target, int refclk, intel_clock_t *best_clock);
+static bool
 intel_g4x_find_best_PLL(const intel_limit_t *limit, struct drm_crtc *crtc,
                        int target, int refclk, intel_clock_t *best_clock);
 static bool
@@ -286,6 +292,7 @@ static const intel_limit_t intel_limits_i8xx_dvo = {
        .p2  = { .dot_limit = I8XX_P2_SLOW_LIMIT,
                 .p2_slow = I8XX_P2_SLOW,       .p2_fast = I8XX_P2_FAST },
        .find_pll = intel_find_best_PLL,
+        .find_reduced_pll = intel_find_best_reduced_PLL,
 };
 static const intel_limit_t intel_limits_i8xx_lvds = {
@@ -300,6 +307,7 @@ static const intel_limit_t intel_limits_i8xx_lvds = {
        .p2  = { .dot_limit = I8XX_P2_SLOW_LIMIT,
                 .p2_slow = I8XX_P2_LVDS_SLOW,  .p2_fast = I8XX_P2_LVDS_FAST },
        .find_pll = intel_find_best_PLL,
+        .find_reduced_pll = intel_find_best_reduced_PLL,
 };
        
 static const intel_limit_t intel_limits_i9xx_sdvo = {
@@ -314,6 +322,7 @@ static const intel_limit_t intel_limits_i9xx_sdvo = {
        .p2  = { .dot_limit = I9XX_P2_SDVO_DAC_SLOW_LIMIT,
                 .p2_slow = I9XX_P2_SDVO_DAC_SLOW,      .p2_fast = I9XX_P2_SDVO_DAC_FAST },
        .find_pll = intel_find_best_PLL,
+        .find_reduced_pll = intel_find_best_reduced_PLL,
 };
 static const intel_limit_t intel_limits_i9xx_lvds = {
@@ -331,6 +340,7 @@ static const intel_limit_t intel_limits_i9xx_lvds = {
        .p2  = { .dot_limit = I9XX_P2_LVDS_SLOW_LIMIT,
                 .p2_slow = I9XX_P2_LVDS_SLOW,  .p2_fast = I9XX_P2_LVDS_FAST },
        .find_pll = intel_find_best_PLL,
+        .find_reduced_pll = intel_find_best_reduced_PLL,
 };
    /* below parameter and function is for G4X Chipset Family*/
@@ -348,6 +358,7 @@ static const intel_limit_t intel_limits_g4x_sdvo = {
                 .p2_fast = G4X_P2_SDVO_FAST
        },
        .find_pll = intel_g4x_find_best_PLL,
+        .find_reduced_pll = intel_g4x_find_best_PLL,
 };
 static const intel_limit_t intel_limits_g4x_hdmi = {
@@ -364,6 +375,7 @@ static const intel_limit_t intel_limits_g4x_hdmi = {
                 .p2_fast = G4X_P2_HDMI_DAC_FAST
        },
        .find_pll = intel_g4x_find_best_PLL,
+        .find_reduced_pll = intel_g4x_find_best_PLL,
 };
 static const intel_limit_t intel_limits_g4x_single_channel_lvds = {
@@ -388,6 +400,7 @@ static const intel_limit_t intel_limits_g4x_single_channel_lvds = {
                 .p2_fast = G4X_P2_SINGLE_CHANNEL_LVDS_FAST
        },
        .find_pll = intel_g4x_find_best_PLL,
+        .find_reduced_pll = intel_g4x_find_best_PLL,
 };
 static const intel_limit_t intel_limits_g4x_dual_channel_lvds = {
@@ -412,6 +425,7 @@ static const intel_limit_t intel_limits_g4x_dual_channel_lvds = {
                 .p2_fast = G4X_P2_DUAL_CHANNEL_LVDS_FAST
        },
        .find_pll = intel_g4x_find_best_PLL,
+        .find_reduced_pll = intel_g4x_find_best_PLL,
 };
 static const intel_limit_t intel_limits_g4x_display_port = {
@@ -449,6 +463,7 @@ static const intel_limit_t intel_limits_igd_sdvo = {
        .p2  = { .dot_limit = I9XX_P2_SDVO_DAC_SLOW_LIMIT,
                 .p2_slow = I9XX_P2_SDVO_DAC_SLOW,      .p2_fast = I9XX_P2_SDVO_DAC_FAST },
        .find_pll = intel_find_best_PLL,
+        .find_reduced_pll = intel_find_best_reduced_PLL,
 };
 static const intel_limit_t intel_limits_igd_lvds = {
@@ -464,6 +479,7 @@ static const intel_limit_t intel_limits_igd_lvds = {
        .p2  = { .dot_limit = I9XX_P2_LVDS_SLOW_LIMIT,
                 .p2_slow = I9XX_P2_LVDS_SLOW,  .p2_fast = I9XX_P2_LVDS_SLOW },
        .find_pll = intel_find_best_PLL,
+        .find_reduced_pll = intel_find_best_reduced_PLL,
 };
 static const intel_limit_t intel_limits_igdng_sdvo = {
@@ -688,15 +704,16 @@ intel_find_best_PLL(const intel_limit_t *limit, struct drm_crtc *crtc,
        memset (best_clock, 0, sizeof (*best_clock));
-        for (clock.m1 = limit->m1.min; clock.m1 <= limit->m1.max; clock.m1++) {
+        for (clock.p1 = limit->p1.max; clock.p1 >= limit->p1.min; clock.p1--) {
-                for (clock.m2 = limit->m2.min; clock.m2 <= limit->m2.max; clock.m2++) {
+                for (clock.m1 = limit->m1.min; clock.m1 <= limit->m1.max;
-                        /* m1 is always 0 in IGD */
+                     clock.m1++) {
-                        if (clock.m2 >= clock.m1 && !IS_IGD(dev))
+                        for (clock.m2 = limit->m2.min;
-                                break;
+                             clock.m2 <= limit->m2.max; clock.m2++) {
-                        for (clock.n = limit->n.min; clock.n <= limit->n.max;
+                                /* m1 is always 0 in IGD */
-                             clock.n++) {
+                                if (clock.m2 >= clock.m1 && !IS_IGD(dev))
-                                for (clock.p1 = limit->p1.min;
+                                        break;
-                                     clock.p1 <= limit->p1.max; clock.p1++) {
+                                for (clock.n = limit->n.min;
+                                     clock.n <= limit->n.max; clock.n++) {
                                        int this_err;
                                        intel_clock(dev, refclk, &clock);
@@ -717,6 +734,46 @@ intel_find_best_PLL(const intel_limit_t *limit, struct drm_crtc *crtc,
        return (err != target);
 }
+static bool
+intel_find_best_reduced_PLL(const intel_limit_t *limit, struct drm_crtc *crtc,
+                            int target, int refclk, intel_clock_t *best_clock)
+{
+        struct drm_device *dev = crtc->dev;
+        intel_clock_t clock;
+        int err = target;
+        bool found = false;
+        memcpy(&clock, best_clock, sizeof(intel_clock_t));
+        for (clock.m1 = limit->m1.min; clock.m1 <= limit->m1.max; clock.m1++) {
+                for (clock.m2 = limit->m2.min; clock.m2 <= limit->m2.max; clock.m2++) {
+                        /* m1 is always 0 in IGD */
+                        if (clock.m2 >= clock.m1 && !IS_IGD(dev))
+                                break;
+                        for (clock.n = limit->n.min; clock.n <= limit->n.max;
+                             clock.n++) {
+                                int this_err;
+                                intel_clock(dev, refclk, &clock);
+                                if (!intel_PLL_is_valid(crtc, &clock))
+                                        continue;
+                                this_err = abs(clock.dot - target);
+                                if (this_err < err) {
+                                        *best_clock = clock;
+                                        err = this_err;
+                                        found = true;
+                                }
+                        }
+                }
+        }
+        return found;
+}
 static bool
 intel_g4x_find_best_PLL(const intel_limit_t *limit, struct drm_crtc *crtc,
                        int target, int refclk, intel_clock_t *best_clock)
@@ -747,7 +804,7 @@ intel_g4x_find_best_PLL(const intel_limit_t *limit, struct drm_crtc *crtc,
        max_n = limit->n.max;
        /* based on hardware requriment prefer smaller n to precision */
        for (clock.n = limit->n.min; clock.n <= max_n; clock.n++) {
-                /* based on hardware requirment prefere larger m1,m2, p1 */
+                /* based on hardware requirment prefere larger m1,m2 */
                for (clock.m1 = limit->m1.max;
                     clock.m1 >= limit->m1.min; clock.m1--) {
                        for (clock.m2 = limit->m2.max;
@@ -832,15 +889,14 @@ intel_igdng_find_best_PLL(const intel_limit_t *limit, struct drm_crtc *crtc,
        memset(best_clock, 0, sizeof(*best_clock));
        max_n = limit->n.max;
-        /* based on hardware requriment prefer smaller n to precision */
+        for (clock.p1 = limit->p1.max; clock.p1 >= limit->p1.min; clock.p1--) {
-        for (clock.n = limit->n.min; clock.n <= max_n; clock.n++) {
+                /* based on hardware requriment prefer smaller n to precision */
-                /* based on hardware requirment prefere larger m1,m2, p1 */
+                for (clock.n = limit->n.min; clock.n <= max_n; clock.n++) {
-                for (clock.m1 = limit->m1.max;
+                        /* based on hardware requirment prefere larger m1,m2 */
-                     clock.m1 >= limit->m1.min; clock.m1--) {
+                        for (clock.m1 = limit->m1.max;
-                        for (clock.m2 = limit->m2.max;
+                             clock.m1 >= limit->m1.min; clock.m1--) {
-                             clock.m2 >= limit->m2.min; clock.m2--) {
+                                for (clock.m2 = limit->m2.max;
-                                for (clock.p1 = limit->p1.max;
+                                     clock.m2 >= limit->m2.min; clock.m2--) {
-                                     clock.p1 >= limit->p1.min; clock.p1--) {
                                        int this_err;
                                        intel_clock(dev, refclk, &clock);
@@ -1008,6 +1064,10 @@ intel_pipe_set_base(struct drm_crtc *crtc, int x, int y,
                        dspcntr &= ~DISPPLANE_TILED;
        }
+        if (IS_IGDNG(dev))
+                /* must disable */
+                dspcntr |= DISPPLANE_TRICKLE_FEED_DISABLE;
        I915_WRITE(dspcntr_reg, dspcntr);
        Start = obj_priv->gtt_offset;
@@ -1030,8 +1090,11 @@ intel_pipe_set_base(struct drm_crtc *crtc, int x, int y,
        if (old_fb) {
                intel_fb = to_intel_framebuffer(old_fb);
+                obj_priv = intel_fb->obj->driver_private;
                i915_gem_object_unpin(intel_fb->obj);
        }
+        intel_increase_pllclock(crtc, true);
        mutex_unlock(&dev->struct_mutex);
        if (!dev->primary->master)
@@ -1581,6 +1644,8 @@ static void intel_crtc_dpms(struct drm_crtc *crtc, int mode)
        else
                i9xx_crtc_dpms(crtc, mode);
+        intel_crtc->dpms_mode = mode;
        if (!dev->primary->master)
                return;
@@ -1603,8 +1668,6 @@ static void intel_crtc_dpms(struct drm_crtc *crtc, int mode)
                DRM_ERROR("Can't update pipe %d in SAREA\n", pipe);
                break;
        }
-        intel_crtc->dpms_mode = mode;
 }
 static void intel_crtc_prepare (struct drm_crtc *crtc)
@@ -2054,6 +2117,18 @@ static int intel_get_fifo_size(struct drm_device *dev, int plane)
        return size;
 }
+static void g4x_update_wm(struct drm_device *dev)
+{
+        struct drm_i915_private *dev_priv = dev->dev_private;
+        u32 fw_blc_self = I915_READ(FW_BLC_SELF);
+        if (i915_powersave)
+                fw_blc_self |= FW_BLC_SELF_EN;
+        else
+                fw_blc_self &= ~FW_BLC_SELF_EN;
+        I915_WRITE(FW_BLC_SELF, fw_blc_self);
+}
 static void i965_update_wm(struct drm_device *dev)
 {
        struct drm_i915_private *dev_priv = dev->dev_private;
@@ -2105,7 +2180,8 @@ static void i9xx_update_wm(struct drm_device *dev, int planea_clock,
        cwm = 2;
        /* Calc sr entries for one plane configs */
-        if (sr_hdisplay && (!planea_clock || !planeb_clock)) {
+        if (HAS_FW_BLC(dev) && sr_hdisplay &&
+            (!planea_clock || !planeb_clock)) {
                /* self-refresh has much higher latency */
                const static int sr_latency_ns = 6000;
@@ -2120,8 +2196,7 @@ static void i9xx_update_wm(struct drm_device *dev, int planea_clock,
                srwm = total_size - sr_entries;
                if (srwm < 0)
                        srwm = 1;
-                if (IS_I9XX(dev))
+                I915_WRITE(FW_BLC_SELF, FW_BLC_SELF_EN | (srwm & 0x3f));
-                        I915_WRITE(FW_BLC_SELF, (srwm & 0x3f));
        }
        DRM_DEBUG("Setting FIFO watermarks - A: %d, B: %d, C: %d, SR %d\n",
@@ -2195,9 +2270,6 @@ static void intel_update_watermarks(struct drm_device *dev)
        unsigned long planea_clock = 0, planeb_clock = 0, sr_clock = 0;
        int enabled = 0, pixel_size = 0;
-        if (DSPARB_HWCONTROL(dev))
-                return;
        /* Get the clock config from both planes */
        list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
                intel_crtc = to_intel_crtc(crtc);
@@ -2230,7 +2302,9 @@ static void intel_update_watermarks(struct drm_device *dev)
        else if (IS_IGD(dev))
                igd_disable_cxsr(dev);
-        if (IS_I965G(dev))
+        if (IS_G4X(dev))
+                g4x_update_wm(dev);
+        else if (IS_I965G(dev))
                i965_update_wm(dev);
        else if (IS_I9XX(dev) || IS_MOBILE(dev))
                i9xx_update_wm(dev, planea_clock, planeb_clock, sr_hdisplay,
@@ -2264,9 +2338,9 @@ static int intel_crtc_mode_set(struct drm_crtc *crtc,
        int dsppos_reg = (pipe == 0) ? DSPAPOS : DSPBPOS;
        int pipesrc_reg = (pipe == 0) ? PIPEASRC : PIPEBSRC;
        int refclk, num_outputs = 0;
-        intel_clock_t clock;
+        intel_clock_t clock, reduced_clock;
-        u32 dpll = 0, fp = 0, dspcntr, pipeconf;
+        u32 dpll = 0, fp = 0, fp2 = 0, dspcntr, pipeconf;
-        bool ok, is_sdvo = false, is_dvo = false;
+        bool ok, has_reduced_clock = false, is_sdvo = false, is_dvo = false;
        bool is_crt = false, is_lvds = false, is_tv = false, is_dp = false;
        bool is_edp = false;
        struct drm_mode_config *mode_config = &dev->mode_config;
@@ -2349,6 +2423,14 @@ static int intel_crtc_mode_set(struct drm_crtc *crtc,
                return -EINVAL;
        }
+        if (limit->find_reduced_pll && dev_priv->lvds_downclock_avail) {
+                memcpy(&reduced_clock, &clock, sizeof(intel_clock_t));
+                has_reduced_clock = limit->find_reduced_pll(limit, crtc,
+                                                            (adjusted_mode->clock*3/4),
+                                                            refclk,
+                                                            &reduced_clock);
+        }
        /* SDVO TV has fixed PLL values depend on its clock range,
           this mirrors vbios setting. */
        if (is_sdvo && is_tv) {
@@ -2394,10 +2476,17 @@ static int intel_crtc_mode_set(struct drm_crtc *crtc,
                                  link_bw, &m_n);
        }
-        if (IS_IGD(dev))
+        if (IS_IGD(dev)) {
                fp = (1 << clock.n) << 16 | clock.m1 << 8 | clock.m2;
-        else
+                if (has_reduced_clock)
+                        fp2 = (1 << reduced_clock.n) << 16 |
+                                reduced_clock.m1 << 8 | reduced_clock.m2;
+        } else {
                fp = clock.n << 16 | clock.m1 << 8 | clock.m2;
+                if (has_reduced_clock)
+                        fp2 = reduced_clock.n << 16 | reduced_clock.m1 << 8 |
+                                reduced_clock.m2;
+        }
        if (!IS_IGDNG(dev))
                dpll = DPLL_VGA_MODE_DIS;
@@ -2426,6 +2515,8 @@ static int intel_crtc_mode_set(struct drm_crtc *crtc,
                        /* also FPA1 */
                        if (IS_IGDNG(dev))
                                dpll |= (1 << (clock.p1 - 1)) << DPLL_FPA1_P1_POST_DIV_SHIFT;
+                        if (IS_G4X(dev) && has_reduced_clock)
+                                dpll |= (1 << (reduced_clock.p1 - 1)) << DPLL_FPA1_P1_POST_DIV_SHIFT;
                }
                switch (clock.p2) {
                case 5:
@@ -2573,6 +2664,22 @@ static int intel_crtc_mode_set(struct drm_crtc *crtc,
                udelay(150);
        }
+        if (is_lvds && has_reduced_clock && i915_powersave) {
+                I915_WRITE(fp_reg + 4, fp2);
+                intel_crtc->lowfreq_avail = true;
+                if (HAS_PIPE_CXSR(dev)) {
+                        DRM_DEBUG("enabling CxSR downclocking\n");
+                        pipeconf |= PIPECONF_CXSR_DOWNCLOCK;
+                }
+        } else {
+                I915_WRITE(fp_reg + 4, fp);
+                intel_crtc->lowfreq_avail = false;
+                if (HAS_PIPE_CXSR(dev)) {
+                        DRM_DEBUG("disabling CxSR downclocking\n");
+                        pipeconf &= ~PIPECONF_CXSR_DOWNCLOCK;
+                }
+        }
        I915_WRITE(htot_reg, (adjusted_mode->crtc_hdisplay - 1) |
                   ((adjusted_mode->crtc_htotal - 1) << 16));
        I915_WRITE(hblank_reg, (adjusted_mode->crtc_hblank_start - 1) |
@@ -2616,6 +2723,12 @@ static int intel_crtc_mode_set(struct drm_crtc *crtc,
        intel_wait_for_vblank(dev);
+        if (IS_IGDNG(dev)) {
+                /* enable address swizzle for tiling buffer */
+                temp = I915_READ(DISP_ARB_CTL);
+                I915_WRITE(DISP_ARB_CTL, temp | DISP_TILE_SURFACE_SWIZZLING);
+        }
        I915_WRITE(dspcntr_reg, dspcntr);
        /* Flush the plane changes */
@@ -2769,10 +2882,16 @@ static int intel_crtc_cursor_move(struct drm_crtc *crtc, int x, int y)
        struct drm_device *dev = crtc->dev;
        struct drm_i915_private *dev_priv = dev->dev_private;
        struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
+        struct intel_framebuffer *intel_fb;
        int pipe = intel_crtc->pipe;
        uint32_t temp = 0;
        uint32_t adder;
+        if (crtc->fb) {
+                intel_fb = to_intel_framebuffer(crtc->fb);
+                intel_mark_busy(dev, intel_fb->obj);
+        }
        if (x < 0) {
                temp |= CURSOR_POS_SIGN << CURSOR_X_SHIFT;
                x = -x;
@@ -3070,12 +3189,319 @@ struct drm_display_mode *intel_crtc_mode_get(struct drm_device *dev,
        return mode;
 }
+#define GPU_IDLE_TIMEOUT 500 /* ms */
+/* When this timer fires, we've been idle for awhile */
+static void intel_gpu_idle_timer(unsigned long arg)
+{
+        struct drm_device *dev = (struct drm_device *)arg;
+        drm_i915_private_t *dev_priv = dev->dev_private;
+        DRM_DEBUG("idle timer fired, downclocking\n");
+        dev_priv->busy = false;
+        queue_work(dev_priv->wq, &dev_priv->idle_work);
+}
+void intel_increase_renderclock(struct drm_device *dev, bool schedule)
+{
+        drm_i915_private_t *dev_priv = dev->dev_private;
+        if (IS_IGDNG(dev))
+                return;
+        if (!dev_priv->render_reclock_avail) {
+                DRM_DEBUG("not reclocking render clock\n");
+                return;
+        }
+        /* Restore render clock frequency to original value */
+        if (IS_G4X(dev) || IS_I9XX(dev))
+                pci_write_config_word(dev->pdev, GCFGC, dev_priv->orig_clock);
+        else if (IS_I85X(dev))
+                pci_write_config_word(dev->pdev, HPLLCC, dev_priv->orig_clock);
+        DRM_DEBUG("increasing render clock frequency\n");
+        /* Schedule downclock */
+        if (schedule)
+                mod_timer(&dev_priv->idle_timer, jiffies +
+                          msecs_to_jiffies(GPU_IDLE_TIMEOUT));
+}
+void intel_decrease_renderclock(struct drm_device *dev)
+{
+        drm_i915_private_t *dev_priv = dev->dev_private;
+        if (IS_IGDNG(dev))
+                return;
+        if (!dev_priv->render_reclock_avail) {
+                DRM_DEBUG("not reclocking render clock\n");
+                return;
+        }
+        if (IS_G4X(dev)) {
+                u16 gcfgc;
+                /* Adjust render clock... */
+                pci_read_config_word(dev->pdev, GCFGC, &gcfgc);
+                /* Down to minimum... */
+                gcfgc &= ~GM45_GC_RENDER_CLOCK_MASK;
+                gcfgc |= GM45_GC_RENDER_CLOCK_266_MHZ;
+                pci_write_config_word(dev->pdev, GCFGC, gcfgc);
+        } else if (IS_I965G(dev)) {
+                u16 gcfgc;
+                /* Adjust render clock... */
+                pci_read_config_word(dev->pdev, GCFGC, &gcfgc);
+                /* Down to minimum... */
+                gcfgc &= ~I965_GC_RENDER_CLOCK_MASK;
+                gcfgc |= I965_GC_RENDER_CLOCK_267_MHZ;
+                pci_write_config_word(dev->pdev, GCFGC, gcfgc);
+        } else if (IS_I945G(dev) || IS_I945GM(dev)) {
+                u16 gcfgc;
+                /* Adjust render clock... */
+                pci_read_config_word(dev->pdev, GCFGC, &gcfgc);
+                /* Down to minimum... */
+                gcfgc &= ~I945_GC_RENDER_CLOCK_MASK;
+                gcfgc |= I945_GC_RENDER_CLOCK_166_MHZ;
+                pci_write_config_word(dev->pdev, GCFGC, gcfgc);
+        } else if (IS_I915G(dev)) {
+                u16 gcfgc;
+                /* Adjust render clock... */
+                pci_read_config_word(dev->pdev, GCFGC, &gcfgc);
+                /* Down to minimum... */
+                gcfgc &= ~I915_GC_RENDER_CLOCK_MASK;
+                gcfgc |= I915_GC_RENDER_CLOCK_166_MHZ;
+                pci_write_config_word(dev->pdev, GCFGC, gcfgc);
+        } else if (IS_I85X(dev)) {
+                u16 hpllcc;
+                /* Adjust render clock... */
+                pci_read_config_word(dev->pdev, HPLLCC, &hpllcc);
+                /* Up to maximum... */
+                hpllcc &= ~GC_CLOCK_CONTROL_MASK;
+                hpllcc |= GC_CLOCK_133_200;
+                pci_write_config_word(dev->pdev, HPLLCC, hpllcc);
+        }
+        DRM_DEBUG("decreasing render clock frequency\n");
+}
+/* Note that no increase function is needed for this - increase_renderclock()
+ *  will also rewrite these bits
+ */
+void intel_decrease_displayclock(struct drm_device *dev)
+{
+        if (IS_IGDNG(dev))
+                return;
+        if (IS_I945G(dev) || IS_I945GM(dev) || IS_I915G(dev) ||
+            IS_I915GM(dev)) {
+                u16 gcfgc;
+                /* Adjust render clock... */
+                pci_read_config_word(dev->pdev, GCFGC, &gcfgc);
+                /* Down to minimum... */
+                gcfgc &= ~0xf0;
+                gcfgc |= 0x80;
+                pci_write_config_word(dev->pdev, GCFGC, gcfgc);
+        }
+}
+#define CRTC_IDLE_TIMEOUT 1000 /* ms */
+static void intel_crtc_idle_timer(unsigned long arg)
+{
+        struct intel_crtc *intel_crtc = (struct intel_crtc *)arg;
+        struct drm_crtc *crtc = &intel_crtc->base;
+        drm_i915_private_t *dev_priv = crtc->dev->dev_private;
+        DRM_DEBUG("idle timer fired, downclocking\n");
+        intel_crtc->busy = false;
+        queue_work(dev_priv->wq, &dev_priv->idle_work);
+}
+static void intel_increase_pllclock(struct drm_crtc *crtc, bool schedule)
+{
+        struct drm_device *dev = crtc->dev;
+        drm_i915_private_t *dev_priv = dev->dev_private;
+        struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
+        int pipe = intel_crtc->pipe;
+        int dpll_reg = (pipe == 0) ? DPLL_A : DPLL_B;
+        int dpll = I915_READ(dpll_reg);
+        if (IS_IGDNG(dev))
+                return;
+        if (!dev_priv->lvds_downclock_avail)
+                return;
+        if (!HAS_PIPE_CXSR(dev) && (dpll & DISPLAY_RATE_SELECT_FPA1)) {
+                DRM_DEBUG("upclocking LVDS\n");
+                /* Unlock panel regs */
+                I915_WRITE(PP_CONTROL, I915_READ(PP_CONTROL) | (0xabcd << 16));
+                dpll &= ~DISPLAY_RATE_SELECT_FPA1;
+                I915_WRITE(dpll_reg, dpll);
+                dpll = I915_READ(dpll_reg);
+                intel_wait_for_vblank(dev);
+                dpll = I915_READ(dpll_reg);
+                if (dpll & DISPLAY_RATE_SELECT_FPA1)
+                        DRM_DEBUG("failed to upclock LVDS!\n");
+                /* ...and lock them again */
+                I915_WRITE(PP_CONTROL, I915_READ(PP_CONTROL) & 0x3);
+        }
+        /* Schedule downclock */
+        if (schedule)
+                mod_timer(&intel_crtc->idle_timer, jiffies +
+                          msecs_to_jiffies(CRTC_IDLE_TIMEOUT));
+}
+static void intel_decrease_pllclock(struct drm_crtc *crtc)
+{
+        struct drm_device *dev = crtc->dev;
+        drm_i915_private_t *dev_priv = dev->dev_private;
+        struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
+        int pipe = intel_crtc->pipe;
+        int dpll_reg = (pipe == 0) ? DPLL_A : DPLL_B;
+        int dpll = I915_READ(dpll_reg);
+        if (IS_IGDNG(dev))
+                return;
+        if (!dev_priv->lvds_downclock_avail)
+                return;
+        /*
+         * Since this is called by a timer, we should never get here in
+         * the manual case.
+         */
+        if (!HAS_PIPE_CXSR(dev) && intel_crtc->lowfreq_avail) {
+                DRM_DEBUG("downclocking LVDS\n");
+                /* Unlock panel regs */
+                I915_WRITE(PP_CONTROL, I915_READ(PP_CONTROL) | (0xabcd << 16));
+                dpll |= DISPLAY_RATE_SELECT_FPA1;
+                I915_WRITE(dpll_reg, dpll);
+                dpll = I915_READ(dpll_reg);
+                intel_wait_for_vblank(dev);
+                dpll = I915_READ(dpll_reg);
+                if (!(dpll & DISPLAY_RATE_SELECT_FPA1))
+                        DRM_DEBUG("failed to downclock LVDS!\n");
+                /* ...and lock them again */
+                I915_WRITE(PP_CONTROL, I915_READ(PP_CONTROL) & 0x3);
+        }
+}
+/**
+ * intel_idle_update - adjust clocks for idleness
+ * @work: work struct
+ *
+ * Either the GPU or display (or both) went idle.  Check the busy status
+ * here and adjust the CRTC and GPU clocks as necessary.
+ */
+static void intel_idle_update(struct work_struct *work)
+{
+        drm_i915_private_t *dev_priv = container_of(work, drm_i915_private_t,
+                                                    idle_work);
+        struct drm_device *dev = dev_priv->dev;
+        struct drm_crtc *crtc;
+        struct intel_crtc *intel_crtc;
+        if (!i915_powersave)
+                return;
+        mutex_lock(&dev->struct_mutex);
+        /* GPU isn't processing, downclock it. */
+        if (!dev_priv->busy) {
+                intel_decrease_renderclock(dev);
+                intel_decrease_displayclock(dev);
+        }
+        list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
+                /* Skip inactive CRTCs */
+                if (!crtc->fb)
+                        continue;
+                intel_crtc = to_intel_crtc(crtc);
+                if (!intel_crtc->busy)
+                        intel_decrease_pllclock(crtc);
+        }
+        mutex_unlock(&dev->struct_mutex);
+}
+/**
+ * intel_mark_busy - mark the GPU and possibly the display busy
+ * @dev: drm device
+ * @obj: object we're operating on
+ *
+ * Callers can use this function to indicate that the GPU is busy processing
+ * commands.  If @obj matches one of the CRTC objects (i.e. it's a scanout
+ * buffer), we'll also mark the display as busy, so we know to increase its
+ * clock frequency.
+ */
+void intel_mark_busy(struct drm_device *dev, struct drm_gem_object *obj)
+{
+        drm_i915_private_t *dev_priv = dev->dev_private;
+        struct drm_crtc *crtc = NULL;
+        struct intel_framebuffer *intel_fb;
+        struct intel_crtc *intel_crtc;
+        if (!drm_core_check_feature(dev, DRIVER_MODESET))
+                return;
+        dev_priv->busy = true;
+        intel_increase_renderclock(dev, true);
+        list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
+                if (!crtc->fb)
+                        continue;
+                intel_crtc = to_intel_crtc(crtc);
+                intel_fb = to_intel_framebuffer(crtc->fb);
+                if (intel_fb->obj == obj) {
+                        if (!intel_crtc->busy) {
+                                /* Non-busy -> busy, upclock */
+                                intel_increase_pllclock(crtc, true);
+                                intel_crtc->busy = true;
+                        } else {
+                                /* Busy -> busy, put off timer */
+                                mod_timer(&intel_crtc->idle_timer, jiffies +
+                                          msecs_to_jiffies(CRTC_IDLE_TIMEOUT));
+                        }
+                }
+        }
+}
 static void intel_crtc_destroy(struct drm_crtc *crtc)
 {
        struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
-        if (intel_crtc->mode_set.mode)
-                drm_mode_destroy(crtc->dev, intel_crtc->mode_set.mode);
        drm_crtc_cleanup(crtc);
        kfree(intel_crtc);
 }
@@ -3122,15 +3548,10 @@ static void intel_crtc_init(struct drm_device *dev, int pipe)
        intel_crtc->dpms_mode = DRM_MODE_DPMS_OFF;
        drm_crtc_helper_add(&intel_crtc->base, &intel_helper_funcs);
-        intel_crtc->mode_set.crtc = &intel_crtc->base;
+        intel_crtc->busy = false;
-        intel_crtc->mode_set.connectors = (struct drm_connector **)(intel_crtc + 1);
-        intel_crtc->mode_set.num_connectors = 0;
-        if (i915_fbpercrtc) {
+        setup_timer(&intel_crtc->idle_timer, intel_crtc_idle_timer,
+                    (unsigned long)intel_crtc);
-        }
 }
 int intel_get_pipe_from_crtc_id(struct drm_device *dev, void *data,
@@ -3138,30 +3559,26 @@ int intel_get_pipe_from_crtc_id(struct drm_device *dev, void *data,
 {
        drm_i915_private_t *dev_priv = dev->dev_private;
        struct drm_i915_get_pipe_from_crtc_id *pipe_from_crtc_id = data;
-        struct drm_crtc *crtc = NULL;
+        struct drm_mode_object *drmmode_obj;
-        int pipe = -1;
+        struct intel_crtc *crtc;
        if (!dev_priv) {
                DRM_ERROR("called with no initialization\n");
                return -EINVAL;
        }
-        list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
+        drmmode_obj = drm_mode_object_find(dev, pipe_from_crtc_id->crtc_id,
-                struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
+                        DRM_MODE_OBJECT_CRTC);
-                if (crtc->base.id == pipe_from_crtc_id->crtc_id) {
-                        pipe = intel_crtc->pipe;
-                        break;
-                }
-        }
-        if (pipe == -1) {
+        if (!drmmode_obj) {
                DRM_ERROR("no such CRTC id\n");
                return -EINVAL;
        }
-        pipe_from_crtc_id->pipe = pipe;
+        crtc = to_intel_crtc(obj_to_crtc(drmmode_obj));
+        pipe_from_crtc_id->pipe = crtc->pipe;
-       return 0;
+        return 0;
 }
 struct drm_crtc *intel_get_crtc_from_pipe(struct drm_device *dev, int pipe)
@@ -3362,8 +3779,56 @@ static const struct drm_mode_config_funcs intel_mode_funcs = {
        .fb_changed = intelfb_probe,
 };
+void intel_init_clock_gating(struct drm_device *dev)
+{
+        struct drm_i915_private *dev_priv = dev->dev_private;
+        /*
+         * Disable clock gating reported to work incorrectly according to the
+         * specs, but enable as much else as we can.
+         */
+        if (IS_G4X(dev)) {
+                uint32_t dspclk_gate;
+                I915_WRITE(RENCLK_GATE_D1, 0);
+                I915_WRITE(RENCLK_GATE_D2, VF_UNIT_CLOCK_GATE_DISABLE |
+                       GS_UNIT_CLOCK_GATE_DISABLE |
+                       CL_UNIT_CLOCK_GATE_DISABLE);
+                I915_WRITE(RAMCLK_GATE_D, 0);
+                dspclk_gate = VRHUNIT_CLOCK_GATE_DISABLE |
+                        OVRUNIT_CLOCK_GATE_DISABLE |
+                        OVCUNIT_CLOCK_GATE_DISABLE;
+                if (IS_GM45(dev))
+                        dspclk_gate |= DSSUNIT_CLOCK_GATE_DISABLE;
+                I915_WRITE(DSPCLK_GATE_D, dspclk_gate);
+        } else if (IS_I965GM(dev)) {
+                I915_WRITE(RENCLK_GATE_D1, I965_RCC_CLOCK_GATE_DISABLE);
+                I915_WRITE(RENCLK_GATE_D2, 0);
+                I915_WRITE(DSPCLK_GATE_D, 0);
+                I915_WRITE(RAMCLK_GATE_D, 0);
+                I915_WRITE16(DEUC, 0);
+        } else if (IS_I965G(dev)) {
+                I915_WRITE(RENCLK_GATE_D1, I965_RCZ_CLOCK_GATE_DISABLE |
+                       I965_RCC_CLOCK_GATE_DISABLE |
+                       I965_RCPB_CLOCK_GATE_DISABLE |
+                       I965_ISC_CLOCK_GATE_DISABLE |
+                       I965_FBC_CLOCK_GATE_DISABLE);
+                I915_WRITE(RENCLK_GATE_D2, 0);
+        } else if (IS_I9XX(dev)) {
+                u32 dstate = I915_READ(D_STATE);
+                dstate |= DSTATE_PLL_D3_OFF | DSTATE_GFX_CLOCK_GATING |
+                        DSTATE_DOT_CLOCK_GATING;
+                I915_WRITE(D_STATE, dstate);
+        } else if (IS_I855(dev) || IS_I865G(dev)) {
+                I915_WRITE(RENCLK_GATE_D1, SV_CLOCK_GATE_DISABLE);
+        } else if (IS_I830(dev)) {
+                I915_WRITE(DSPCLK_GATE_D, OVRUNIT_CLOCK_GATE_DISABLE);
+        }
+}
 void intel_modeset_init(struct drm_device *dev)
 {
+        struct drm_i915_private *dev_priv = dev->dev_private;
        int num_pipe;
        int i;
@@ -3398,15 +3863,47 @@ void intel_modeset_init(struct drm_device *dev)
        DRM_DEBUG("%d display pipe%s available.\n",
                  num_pipe, num_pipe > 1 ? "s" : "");
+        if (IS_I85X(dev))
+                pci_read_config_word(dev->pdev, HPLLCC, &dev_priv->orig_clock);
+        else if (IS_I9XX(dev) || IS_G4X(dev))
+                pci_read_config_word(dev->pdev, GCFGC, &dev_priv->orig_clock);
        for (i = 0; i < num_pipe; i++) {
                intel_crtc_init(dev, i);
        }
        intel_setup_outputs(dev);
+        intel_init_clock_gating(dev);
+        INIT_WORK(&dev_priv->idle_work, intel_idle_update);
+        setup_timer(&dev_priv->idle_timer, intel_gpu_idle_timer,
+                    (unsigned long)dev);
 }
 void intel_modeset_cleanup(struct drm_device *dev)
 {
+        struct drm_i915_private *dev_priv = dev->dev_private;
+        struct drm_crtc *crtc;
+        struct intel_crtc *intel_crtc;
+        mutex_lock(&dev->struct_mutex);
+        list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
+                /* Skip inactive CRTCs */
+                if (!crtc->fb)
+                        continue;
+                intel_crtc = to_intel_crtc(crtc);
+                intel_increase_pllclock(crtc, false);
+                del_timer_sync(&intel_crtc->idle_timer);
+        }
+        intel_increase_renderclock(dev, false);
+        del_timer_sync(&dev_priv->idle_timer);
+        mutex_unlock(&dev->struct_mutex);
        drm_mode_config_cleanup(dev);
 }
@@ -3420,3 +3917,20 @@ struct drm_encoder *intel_best_encoder(struct drm_connector *connector)
        return &intel_output->enc;
 }
+/*
+ * set vga decode state - true == enable VGA decode
+ */
+int intel_modeset_vga_set_state(struct drm_device *dev, bool state)
+{
+        struct drm_i915_private *dev_priv = dev->dev_private;
+        u16 gmch_ctrl;
+        pci_read_config_word(dev_priv->bridge_dev, INTEL_GMCH_CTRL, &gmch_ctrl);
+        if (state)
+                gmch_ctrl &= ~INTEL_GMCH_VGA_DISABLE;
+        else
+                gmch_ctrl |= INTEL_GMCH_VGA_DISABLE;
+        pci_write_config_word(dev_priv->bridge_dev, INTEL_GMCH_CTRL, gmch_ctrl);
+        return 0;
+}
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 26a6227c15fe..3ebbbabfe59b 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -117,9 +117,9 @@ struct intel_crtc {
        uint32_t cursor_addr;
        u8 lut_r[256], lut_g[256], lut_b[256];
        int dpms_mode;
-        struct intel_framebuffer *fbdev_fb;
+        bool busy; /* is scanout buffer being updated frequently? */
-        /* a mode_set for fbdev users on this crtc */
+        struct timer_list idle_timer;
-        struct drm_mode_set mode_set;
+        bool lowfreq_avail;
 };
 #define to_intel_crtc(x) container_of(x, struct intel_crtc, base)
@@ -138,6 +138,7 @@ extern void intel_hdmi_init(struct drm_device *dev, int sdvox_reg);
 extern bool intel_sdvo_init(struct drm_device *dev, int output_device);
 extern void intel_dvo_init(struct drm_device *dev);
 extern void intel_tv_init(struct drm_device *dev);
+extern void intel_mark_busy(struct drm_device *dev, struct drm_gem_object *obj);
 extern void intel_lvds_init(struct drm_device *dev);
 extern void intel_dp_init(struct drm_device *dev, int dp_reg);
 void
@@ -178,4 +179,5 @@ extern int intel_framebuffer_create(struct drm_device *dev,
                                    struct drm_mode_fb_cmd *mode_cmd,
                                    struct drm_framebuffer **fb,
                                    struct drm_gem_object *obj);
 #endif /* __INTEL_DRV_H__ */
diff --git a/drivers/gpu/drm/i915/intel_fb.c b/drivers/gpu/drm/i915/intel_fb.c
index 1d30802e773e..7ba4a232a97f 100644
--- a/drivers/gpu/drm/i915/intel_fb.c
+++ b/drivers/gpu/drm/i915/intel_fb.c
@@ -39,339 +39,34 @@
 #include "drmP.h"
 #include "drm.h"
 #include "drm_crtc.h"
+#include "drm_fb_helper.h"
 #include "intel_drv.h"
 #include "i915_drm.h"
 #include "i915_drv.h"
 struct intelfb_par {
-        struct drm_device *dev;
+        struct drm_fb_helper helper;
-        struct drm_display_mode *our_mode;
        struct intel_framebuffer *intel_fb;
-        int crtc_count;
+        struct drm_display_mode *our_mode;
-        /* crtc currently bound to this */
-        uint32_t crtc_ids[2];
 };
-static int intelfb_setcolreg(unsigned regno, unsigned red, unsigned green,
-                        unsigned blue, unsigned transp,
-                        struct fb_info *info)
-{
-        struct intelfb_par *par = info->par;
-        struct drm_device *dev = par->dev;
-        struct drm_crtc *crtc;
-        int i;
-        list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
-                struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
-                struct drm_mode_set *modeset = &intel_crtc->mode_set;
-                struct drm_framebuffer *fb = modeset->fb;
-                for (i = 0; i < par->crtc_count; i++)
-                        if (crtc->base.id == par->crtc_ids[i])
-                                break;
-                if (i == par->crtc_count)
-                        continue;
-                if (regno > 255)
-                        return 1;
-                if (fb->depth == 8) {
-                        intel_crtc_fb_gamma_set(crtc, red, green, blue, regno);
-                        return 0;
-                }
-                if (regno < 16) {
-                        switch (fb->depth) {
-                        case 15:
-                                fb->pseudo_palette[regno] = ((red & 0xf800) >> 1) |
-                                        ((green & 0xf800) >>  6) |
-                                        ((blue & 0xf800) >> 11);
-                                break;
-                        case 16:
-                                fb->pseudo_palette[regno] = (red & 0xf800) |
-                                        ((green & 0xfc00) >>  5) |
-                                        ((blue  & 0xf800) >> 11);
-                                break;
-                        case 24:
-                        case 32:
-                                fb->pseudo_palette[regno] = ((red & 0xff00) << 8) |
-                                        (green & 0xff00) |
-                                        ((blue  & 0xff00) >> 8);
-                                break;
-                        }
-                }
-        }
-        return 0;
-}
-static int intelfb_check_var(struct fb_var_screeninfo *var,
-                        struct fb_info *info)
-{
-        struct intelfb_par *par = info->par;
-        struct intel_framebuffer *intel_fb = par->intel_fb;
-        struct drm_framebuffer *fb = &intel_fb->base;
-        int depth;
-        if (var->pixclock == -1 || !var->pixclock)
-                return -EINVAL;
-        /* Need to resize the fb object !!! */
-        if (var->xres > fb->width || var->yres > fb->height) {
-                DRM_ERROR("Requested width/height is greater than current fb object %dx%d > %dx%d\n",var->xres,var->yres,fb->width,fb->height);
-                DRM_ERROR("Need resizing code.\n");
-                return -EINVAL;
-        }
-        switch (var->bits_per_pixel) {
-        case 16:
-                depth = (var->green.length == 6) ? 16 : 15;
-                break;
-        case 32:
-                depth = (var->transp.length > 0) ? 32 : 24;
-                break;
-        default:
-                depth = var->bits_per_pixel;
-                break;
-        }
-        switch (depth) {
-        case 8:
-                var->red.offset = 0;
-                var->green.offset = 0;
-                var->blue.offset = 0;
-                var->red.length = 8;
-                var->green.length = 8;
-                var->blue.length = 8;
-                var->transp.length = 0;
-                var->transp.offset = 0;
-                break;
-        case 15:
-                var->red.offset = 10;
-                var->green.offset = 5;
-                var->blue.offset = 0;
-                var->red.length = 5;
-                var->green.length = 5;
-                var->blue.length = 5;
-                var->transp.length = 1;
-                var->transp.offset = 15;
-                break;
-        case 16:
-                var->red.offset = 11;
-                var->green.offset = 5;
-                var->blue.offset = 0;
-                var->red.length = 5;
-                var->green.length = 6;
-                var->blue.length = 5;
-                var->transp.length = 0;
-                var->transp.offset = 0;
-                break;
-        case 24:
-                var->red.offset = 16;
-                var->green.offset = 8;
-                var->blue.offset = 0;
-                var->red.length = 8;
-                var->green.length = 8;
-                var->blue.length = 8;
-                var->transp.length = 0;
-                var->transp.offset = 0;
-                break;
-        case 32:
-                var->red.offset = 16;
-                var->green.offset = 8;
-                var->blue.offset = 0;
-                var->red.length = 8;
-                var->green.length = 8;
-                var->blue.length = 8;
-                var->transp.length = 8;
-                var->transp.offset = 24;
-                break;
-        default:
-                return -EINVAL;
-        }
-        return 0;
-}
-/* this will let fbcon do the mode init */
-/* FIXME: take mode config lock? */
-static int intelfb_set_par(struct fb_info *info)
-{
-        struct intelfb_par *par = info->par;
-        struct drm_device *dev = par->dev;
-        struct fb_var_screeninfo *var = &info->var;
-        int i;
-        DRM_DEBUG("%d %d\n", var->xres, var->pixclock);
-        if (var->pixclock != -1) {
-                DRM_ERROR("PIXEL CLOCK SET\n");
-                return -EINVAL;
-        } else {
-                struct drm_crtc *crtc;
-                int ret;
-                list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
-                        struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
-                        for (i = 0; i < par->crtc_count; i++)
-                                if (crtc->base.id == par->crtc_ids[i])
-                                        break;
-                        if (i == par->crtc_count)
-                                continue;
-                        if (crtc->fb == intel_crtc->mode_set.fb) {
-                                mutex_lock(&dev->mode_config.mutex);
-                                ret = crtc->funcs->set_config(&intel_crtc->mode_set);
-                                mutex_unlock(&dev->mode_config.mutex);
-                                if (ret)
-                                        return ret;
-                        }
-                }
-                return 0;
-        }
-}
-static int intelfb_pan_display(struct fb_var_screeninfo *var,
-                                struct fb_info *info)
-{
-        struct intelfb_par *par = info->par;
-        struct drm_device *dev = par->dev;
-        struct drm_mode_set *modeset;
-        struct drm_crtc *crtc;
-        struct intel_crtc *intel_crtc;
-        int ret = 0;
-        int i;
-        list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
-                for (i = 0; i < par->crtc_count; i++)
-                        if (crtc->base.id == par->crtc_ids[i])
-                                break;
-                if (i == par->crtc_count)
-                        continue;
-                intel_crtc = to_intel_crtc(crtc);
-                modeset = &intel_crtc->mode_set;
-                modeset->x = var->xoffset;
-                modeset->y = var->yoffset;
-                if (modeset->num_connectors) {
-                        mutex_lock(&dev->mode_config.mutex);
-                        ret = crtc->funcs->set_config(modeset);
-                        mutex_unlock(&dev->mode_config.mutex);
-                        if (!ret) {
-                                info->var.xoffset = var->xoffset;
-                                info->var.yoffset = var->yoffset;
-                        }
-                }
-        }
-        return ret;
-}
-static void intelfb_on(struct fb_info *info)
-{
-        struct intelfb_par *par = info->par;
-        struct drm_device *dev = par->dev;
-        struct drm_crtc *crtc;
-        struct drm_encoder *encoder;
-        int i;
-        /*
-         * For each CRTC in this fb, find all associated encoders
-         * and turn them off, then turn off the CRTC.
-         */
-        list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
-                struct drm_crtc_helper_funcs *crtc_funcs = crtc->helper_private;
-                for (i = 0; i < par->crtc_count; i++)
-                        if (crtc->base.id == par->crtc_ids[i])
-                                break;
-                crtc_funcs->dpms(crtc, DRM_MODE_DPMS_ON);
-                /* Found a CRTC on this fb, now find encoders */
-                list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
-                        if (encoder->crtc == crtc) {
-                                struct drm_encoder_helper_funcs *encoder_funcs;
-                                encoder_funcs = encoder->helper_private;
-                                encoder_funcs->dpms(encoder, DRM_MODE_DPMS_ON);
-                        }
-                }
-        }
-}
-static void intelfb_off(struct fb_info *info, int dpms_mode)
-{
-        struct intelfb_par *par = info->par;
-        struct drm_device *dev = par->dev;
-        struct drm_crtc *crtc;
-        struct drm_encoder *encoder;
-        int i;
-        /*
-         * For each CRTC in this fb, find all associated encoders
-         * and turn them off, then turn off the CRTC.
-         */
-        list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
-                struct drm_crtc_helper_funcs *crtc_funcs = crtc->helper_private;
-                for (i = 0; i < par->crtc_count; i++)
-                        if (crtc->base.id == par->crtc_ids[i])
-                                break;
-                /* Found a CRTC on this fb, now find encoders */
-                list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
-                        if (encoder->crtc == crtc) {
-                                struct drm_encoder_helper_funcs *encoder_funcs;
-                                encoder_funcs = encoder->helper_private;
-                                encoder_funcs->dpms(encoder, dpms_mode);
-                        }
-                }
-                if (dpms_mode == DRM_MODE_DPMS_OFF)
-                        crtc_funcs->dpms(crtc, dpms_mode);
-        }
-}
-static int intelfb_blank(int blank, struct fb_info *info)
-{
-        switch (blank) {
-        case FB_BLANK_UNBLANK:
-                intelfb_on(info);
-                break;
-        case FB_BLANK_NORMAL:
-                intelfb_off(info, DRM_MODE_DPMS_STANDBY);
-                break;
-        case FB_BLANK_HSYNC_SUSPEND:
-                intelfb_off(info, DRM_MODE_DPMS_STANDBY);
-                break;
-        case FB_BLANK_VSYNC_SUSPEND:
-                intelfb_off(info, DRM_MODE_DPMS_SUSPEND);
-                break;
-        case FB_BLANK_POWERDOWN:
-                intelfb_off(info, DRM_MODE_DPMS_OFF);
-                break;
-        }
-        return 0;
-}
 static struct fb_ops intelfb_ops = {
        .owner = THIS_MODULE,
-        .fb_check_var = intelfb_check_var,
+        .fb_check_var = drm_fb_helper_check_var,
-        .fb_set_par = intelfb_set_par,
+        .fb_set_par = drm_fb_helper_set_par,
-        .fb_setcolreg = intelfb_setcolreg,
+        .fb_setcolreg = drm_fb_helper_setcolreg,
        .fb_fillrect = cfb_fillrect,
        .fb_copyarea = cfb_copyarea,
        .fb_imageblit = cfb_imageblit,
-        .fb_pan_display = intelfb_pan_display,
+        .fb_pan_display = drm_fb_helper_pan_display,
-        .fb_blank = intelfb_blank,
+        .fb_blank = drm_fb_helper_blank,
 };
+static struct drm_fb_helper_funcs intel_fb_helper_funcs = {
+        .gamma_set = intel_crtc_fb_gamma_set,
+};
 /**
 * Curretly it is assumed that the old framebuffer is reused.
 *
@@ -412,25 +107,10 @@ int intelfb_resize(struct drm_device *dev, struct drm_crtc *crtc)
 }
 EXPORT_SYMBOL(intelfb_resize);
-static struct drm_mode_set kernelfb_mode;
-static int intelfb_panic(struct notifier_block *n, unsigned long ununsed,
-                         void *panic_str)
-{
-        DRM_ERROR("panic occurred, switching back to text console\n");
-        intelfb_restore();
-        return 0;
-}
-static struct notifier_block paniced = {
-        .notifier_call = intelfb_panic,
-};
 static int intelfb_create(struct drm_device *dev, uint32_t fb_width,
                          uint32_t fb_height, uint32_t surface_width,
                          uint32_t surface_height,
-                          struct intel_framebuffer **intel_fb_p)
+                          struct drm_framebuffer **fb_p)
 {
        struct fb_info *info;
        struct intelfb_par *par;
@@ -479,7 +159,7 @@ static int intelfb_create(struct drm_device *dev, uint32_t fb_width,
        list_add(&fb->filp_head, &dev->mode_config.fb_kernel_list);
        intel_fb = to_intel_framebuffer(fb);
-        *intel_fb_p = intel_fb;
+        *fb_p = fb;
        info = framebuffer_alloc(sizeof(struct intelfb_par), device);
        if (!info) {
@@ -489,21 +169,19 @@ static int intelfb_create(struct drm_device *dev, uint32_t fb_width,
        par = info->par;
+        par->helper.funcs = &intel_fb_helper_funcs;
+        par->helper.dev = dev;
+        ret = drm_fb_helper_init_crtc_count(&par->helper, 2,
+                                            INTELFB_CONN_LIMIT);
+        if (ret)
+                goto out_unref;
        strcpy(info->fix.id, "inteldrmfb");
-        info->fix.type = FB_TYPE_PACKED_PIXELS;
-        info->fix.visual = FB_VISUAL_TRUECOLOR;
-        info->fix.type_aux = 0;
-        info->fix.xpanstep = 1; /* doing it in hw */
-        info->fix.ypanstep = 1; /* doing it in hw */
-        info->fix.ywrapstep = 0;
-        info->fix.accel = FB_ACCEL_I830;
-        info->fix.type_aux = 0;
        info->flags = FBINFO_DEFAULT;
        info->fbops = &intelfb_ops;
-        info->fix.line_length = fb->pitch;
        /* setup aperture base/size for vesafb takeover */
        info->aperture_base = dev->mode_config.fb_base;
@@ -527,18 +205,8 @@ static int intelfb_create(struct drm_device *dev, uint32_t fb_width,
 //      memset(info->screen_base, 0, size);
-        info->pseudo_palette = fb->pseudo_palette;
+        drm_fb_helper_fill_fix(info, fb->pitch);
-        info->var.xres_virtual = fb->width;
+        drm_fb_helper_fill_var(info, fb, fb_width, fb_height);
-        info->var.yres_virtual = fb->height;
-        info->var.bits_per_pixel = fb->bits_per_pixel;
-        info->var.xoffset = 0;
-        info->var.yoffset = 0;
-        info->var.activate = FB_ACTIVATE_NOW;
-        info->var.height = -1;
-        info->var.width = -1;
-        info->var.xres = fb_width;
-        info->var.yres = fb_height;
        /* FIXME: we really shouldn't expose mmio space at all */
        info->fix.mmio_start = pci_resource_start(dev->pdev, mmio_bar);
@@ -550,64 +218,9 @@ static int intelfb_create(struct drm_device *dev, uint32_t fb_width,
        info->pixmap.flags = FB_PIXMAP_SYSTEM;
        info->pixmap.scan_align = 1;
-        switch(fb->depth) {
-        case 8:
-                info->var.red.offset = 0;
-                info->var.green.offset = 0;
-                info->var.blue.offset = 0;
-                info->var.red.length = 8; /* 8bit DAC */
-                info->var.green.length = 8;
-                info->var.blue.length = 8;
-                info->var.transp.offset = 0;
-                info->var.transp.length = 0;
-                break;
-        case 15:
-                info->var.red.offset = 10;
-                info->var.green.offset = 5;
-                info->var.blue.offset = 0;
-                info->var.red.length = 5;
-                info->var.green.length = 5;
-                info->var.blue.length = 5;
-                info->var.transp.offset = 15;
-                info->var.transp.length = 1;
-                break;
-        case 16:
-                info->var.red.offset = 11;
-                info->var.green.offset = 5;
-                info->var.blue.offset = 0;
-                info->var.red.length = 5;
-                info->var.green.length = 6;
-                info->var.blue.length = 5;
-                info->var.transp.offset = 0;
-                break;
-        case 24:
-                info->var.red.offset = 16;
-                info->var.green.offset = 8;
-                info->var.blue.offset = 0;
-                info->var.red.length = 8;
-                info->var.green.length = 8;
-                info->var.blue.length = 8;
-                info->var.transp.offset = 0;
-                info->var.transp.length = 0;
-                break;
-        case 32:
-                info->var.red.offset = 16;
-                info->var.green.offset = 8;
-                info->var.blue.offset = 0;
-                info->var.red.length = 8;
-                info->var.green.length = 8;
-                info->var.blue.length = 8;
-                info->var.transp.offset = 24;
-                info->var.transp.length = 8;
-                break;
-        default:
-                break;
-        }
        fb->fbdev = info;
        par->intel_fb = intel_fb;
-        par->dev = dev;
        /* To allow resizeing without swapping buffers */
        DRM_DEBUG("allocated %dx%d fb: 0x%08x, bo %p\n", intel_fb->base.width,
@@ -625,307 +238,12 @@ out:
        return ret;
 }
-static int intelfb_multi_fb_probe_crtc(struct drm_device *dev, struct drm_crtc *crtc)
-{
-        struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
-        struct intel_framebuffer *intel_fb;
-        struct drm_framebuffer *fb;
-        struct drm_connector *connector;
-        struct fb_info *info;
-        struct intelfb_par *par;
-        struct drm_mode_set *modeset;
-        unsigned int width, height;
-        int new_fb = 0;
-        int ret, i, conn_count;
-        if (!drm_helper_crtc_in_use(crtc))
-                return 0;
-        if (!crtc->desired_mode)
-                return 0;
-        width = crtc->desired_mode->hdisplay;
-        height = crtc->desired_mode->vdisplay;
-        /* is there an fb bound to this crtc already */
-        if (!intel_crtc->mode_set.fb) {
-                ret = intelfb_create(dev, width, height, width, height, &intel_fb);
-                if (ret)
-                        return -EINVAL;
-                new_fb = 1;
-        } else {
-                fb = intel_crtc->mode_set.fb;
-                intel_fb = to_intel_framebuffer(fb);
-                if ((intel_fb->base.width < width) || (intel_fb->base.height < height))
-                        return -EINVAL;
-        }
-        info = intel_fb->base.fbdev;
-        par = info->par;
-        modeset = &intel_crtc->mode_set;
-        modeset->fb = &intel_fb->base;
-        conn_count = 0;
-        list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
-                if (connector->encoder)
-                        if (connector->encoder->crtc == modeset->crtc) {
-                                modeset->connectors[conn_count] = connector;
-                                conn_count++;
-                                if (conn_count > INTELFB_CONN_LIMIT)
-                                        BUG();
-                        }
-        }
-        for (i = conn_count; i < INTELFB_CONN_LIMIT; i++)
-                modeset->connectors[i] = NULL;
-        par->crtc_ids[0] = crtc->base.id;
-        modeset->num_connectors = conn_count;
-        if (modeset->crtc->desired_mode) {
-                if (modeset->mode)
-                        drm_mode_destroy(dev, modeset->mode);
-                modeset->mode = drm_mode_duplicate(dev,
-                                                   modeset->crtc->desired_mode);
-        }
-        par->crtc_count = 1;
-        if (new_fb) {
-                info->var.pixclock = -1;
-                if (register_framebuffer(info) < 0)
-                        return -EINVAL;
-        } else
-                intelfb_set_par(info);
-        DRM_INFO("fb%d: %s frame buffer device\n", info->node,
-               info->fix.id);
-        /* Switch back to kernel console on panic */
-        kernelfb_mode = *modeset;
-        atomic_notifier_chain_register(&panic_notifier_list, &paniced);
-        DRM_DEBUG("registered panic notifier\n");
-        return 0;
-}
-static int intelfb_multi_fb_probe(struct drm_device *dev)
-{
-        struct drm_crtc *crtc;
-        int ret = 0;
-        list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
-                ret = intelfb_multi_fb_probe_crtc(dev, crtc);
-                if (ret)
-                        return ret;
-        }
-        return ret;
-}
-static int intelfb_single_fb_probe(struct drm_device *dev)
-{
-        struct drm_crtc *crtc;
-        struct drm_connector *connector;
-        unsigned int fb_width = (unsigned)-1, fb_height = (unsigned)-1;
-        unsigned int surface_width = 0, surface_height = 0;
-        int new_fb = 0;
-        int crtc_count = 0;
-        int ret, i, conn_count = 0;
-        struct intel_framebuffer *intel_fb;
-        struct fb_info *info;
-        struct intelfb_par *par;
-        struct drm_mode_set *modeset = NULL;
-        DRM_DEBUG("\n");
-        /* Get a count of crtcs now in use and new min/maxes width/heights */
-        list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
-                if (!drm_helper_crtc_in_use(crtc))
-                        continue;
-                crtc_count++;
-                if (!crtc->desired_mode)
-                        continue;
-                /* Smallest mode determines console size... */
-                if (crtc->desired_mode->hdisplay < fb_width)
-                        fb_width = crtc->desired_mode->hdisplay;
-                if (crtc->desired_mode->vdisplay < fb_height)
-                        fb_height = crtc->desired_mode->vdisplay;
-                /* ... but largest for memory allocation dimensions */
-                if (crtc->desired_mode->hdisplay > surface_width)
-                        surface_width = crtc->desired_mode->hdisplay;
-                if (crtc->desired_mode->vdisplay > surface_height)
-                        surface_height = crtc->desired_mode->vdisplay;
-        }
-        if (crtc_count == 0 || fb_width == -1 || fb_height == -1) {
-                /* hmm everyone went away - assume VGA cable just fell out
-                   and will come back later. */
-                DRM_DEBUG("no CRTCs available?\n");
-                return 0;
-        }
-//fail
-        /* Find the fb for our new config */
-        if (list_empty(&dev->mode_config.fb_kernel_list)) {
-                DRM_DEBUG("creating new fb (console size %dx%d, "
-                          "buffer size %dx%d)\n", fb_width, fb_height,
-                          surface_width, surface_height);
-                ret = intelfb_create(dev, fb_width, fb_height, surface_width,
-                                     surface_height, &intel_fb);
-                if (ret)
-                        return -EINVAL;
-                new_fb = 1;
-        } else {
-                struct drm_framebuffer *fb;
-                fb = list_first_entry(&dev->mode_config.fb_kernel_list,
-                                      struct drm_framebuffer, filp_head);
-                intel_fb = to_intel_framebuffer(fb);
-                /* if someone hotplugs something bigger than we have already
-                 * allocated, we are pwned.  As really we can't resize an
-                 * fbdev that is in the wild currently due to fbdev not really
-                 * being designed for the lower layers moving stuff around
-                 * under it.
-                 * - so in the grand style of things - punt.
-                 */
-                if ((fb->width < surface_width) ||
-                    (fb->height < surface_height)) {
-                        DRM_ERROR("fb not large enough for console\n");
-                        return -EINVAL;
-                }
-        }
-// fail
-        info = intel_fb->base.fbdev;
-        par = info->par;
-        crtc_count = 0;
-        /*
-         * For each CRTC, set up the connector list for the CRTC's mode
-         * set configuration.
-         */
-        list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
-                struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
-                modeset = &intel_crtc->mode_set;
-                modeset->fb = &intel_fb->base;
-                conn_count = 0;
-                list_for_each_entry(connector, &dev->mode_config.connector_list,
-                                    head) {
-                        if (!connector->encoder)
-                                continue;
-                        if(connector->encoder->crtc == modeset->crtc) {
-                                modeset->connectors[conn_count++] = connector;
-                                if (conn_count > INTELFB_CONN_LIMIT)
-                                        BUG();
-                        }
-                }
-                /* Zero out remaining connector pointers */
-                for (i = conn_count; i < INTELFB_CONN_LIMIT; i++)
-                        modeset->connectors[i] = NULL;
-                par->crtc_ids[crtc_count++] = crtc->base.id;
-                modeset->num_connectors = conn_count;
-                if (modeset->crtc->desired_mode) {
-                        if (modeset->mode)
-                                drm_mode_destroy(dev, modeset->mode);
-                        modeset->mode = drm_mode_duplicate(dev,
-                                                           modeset->crtc->desired_mode);
-                }
-        }
-        par->crtc_count = crtc_count;
-        if (new_fb) {
-                info->var.pixclock = -1;
-                if (register_framebuffer(info) < 0)
-                        return -EINVAL;
-        } else
-                intelfb_set_par(info);
-        DRM_INFO("fb%d: %s frame buffer device\n", info->node,
-               info->fix.id);
-        /* Switch back to kernel console on panic */
-        kernelfb_mode = *modeset;
-        atomic_notifier_chain_register(&panic_notifier_list, &paniced);
-        DRM_DEBUG("registered panic notifier\n");
-        return 0;
-}
-/**
- * intelfb_restore - restore the framebuffer console (kernel) config
- *
- * Restore's the kernel's fbcon mode, used for lastclose & panic paths.
- */
-void intelfb_restore(void)
-{
-        int ret;
-        if ((ret = drm_crtc_helper_set_config(&kernelfb_mode)) != 0) {
-                DRM_ERROR("Failed to restore crtc configuration: %d\n",
-                          ret);
-        }
-}
-static void intelfb_restore_work_fn(struct work_struct *ignored)
-{
-        intelfb_restore();
-}
-static DECLARE_WORK(intelfb_restore_work, intelfb_restore_work_fn);
-static void intelfb_sysrq(int dummy1, struct tty_struct *dummy3)
-{
-        schedule_work(&intelfb_restore_work);
-}
-static struct sysrq_key_op sysrq_intelfb_restore_op = {
-        .handler = intelfb_sysrq,
-        .help_msg = "force-fb(V)",
-        .action_msg = "Restore framebuffer console",
-};
 int intelfb_probe(struct drm_device *dev)
 {
        int ret;
        DRM_DEBUG("\n");
+        ret = drm_fb_helper_single_fb_probe(dev, intelfb_create);
-        /* something has changed in the lower levels of hell - deal with it
-           here */
-        /* two modes : a) 1 fb to rule all crtcs.
-                       b) one fb per crtc.
-           two actions 1) new connected device
-                       2) device removed.
-           case a/1 : if the fb surface isn't big enough - resize the surface fb.
-                      if the fb size isn't big enough - resize fb into surface.
-                      if everything big enough configure the new crtc/etc.
-           case a/2 : undo the configuration
-                      possibly resize down the fb to fit the new configuration.
-           case b/1 : see if it is on a new crtc - setup a new fb and add it.
-           case b/2 : teardown the new fb.
-        */
-        /* mode a first */
-        /* search for an fb */
-        if (i915_fbpercrtc == 1) {
-                ret = intelfb_multi_fb_probe(dev);
-        } else {
-                ret = intelfb_single_fb_probe(dev);
-        }
-        register_sysrq_key('v', &sysrq_intelfb_restore_op);
        return ret;
 }
 EXPORT_SYMBOL(intelfb_probe);
@@ -940,13 +258,14 @@ int intelfb_remove(struct drm_device *dev, struct drm_framebuffer *fb)
        info = fb->fbdev;
        if (info) {
+                struct intelfb_par *par = info->par;
                unregister_framebuffer(info);
                iounmap(info->screen_base);
+                if (info->par)
+                        drm_fb_helper_free(&par->helper);
                framebuffer_release(info);
        }
-        atomic_notifier_chain_unregister(&panic_notifier_list, &paniced);
-        memset(&kernelfb_mode, 0, sizeof(struct drm_mode_set));
        return 0;
 }
 EXPORT_SYMBOL(intelfb_remove);
diff --git a/drivers/gpu/drm/i915/intel_i2c.c b/drivers/gpu/drm/i915/intel_i2c.c
index 62b8bead7652..c7eab724c418 100644
--- a/drivers/gpu/drm/i915/intel_i2c.c
+++ b/drivers/gpu/drm/i915/intel_i2c.c
@@ -42,11 +42,11 @@ void intel_i2c_quirk_set(struct drm_device *dev, bool enable)
        if (!IS_IGD(dev))
                return;
        if (enable)
-                I915_WRITE(CG_2D_DIS,
+                I915_WRITE(DSPCLK_GATE_D,
-                        I915_READ(CG_2D_DIS) | DPCUNIT_CLOCK_GATE_DISABLE);
+                        I915_READ(DSPCLK_GATE_D) | DPCUNIT_CLOCK_GATE_DISABLE);
        else
-                I915_WRITE(CG_2D_DIS,
+                I915_WRITE(DSPCLK_GATE_D,
-                        I915_READ(CG_2D_DIS) & (~DPCUNIT_CLOCK_GATE_DISABLE));
+                        I915_READ(DSPCLK_GATE_D) & (~DPCUNIT_CLOCK_GATE_DISABLE));
 }
 /*
diff --git a/drivers/gpu/drm/i915/intel_lvds.c b/drivers/gpu/drm/i915/intel_lvds.c
index 8df02ef89261..dafc0da1c256 100644
--- a/drivers/gpu/drm/i915/intel_lvds.c
+++ b/drivers/gpu/drm/i915/intel_lvds.c
@@ -38,16 +38,6 @@
 #include "i915_drv.h"
 #include <linux/acpi.h>
-#define I915_LVDS "i915_lvds"
-/*
- * the following four scaling options are defined.
- * #define DRM_MODE_SCALE_NON_GPU       0
- * #define DRM_MODE_SCALE_FULLSCREEN    1
- * #define DRM_MODE_SCALE_NO_SCALE      2
- * #define DRM_MODE_SCALE_ASPECT        3
- */
 /* Private structure for the integrated LVDS support */
 struct intel_lvds_priv {
        int fitting_mode;
@@ -336,7 +326,7 @@ static bool intel_lvds_mode_fixup(struct drm_encoder *encoder,
        I915_WRITE(BCLRPAT_B, 0);
        switch (lvds_priv->fitting_mode) {
-        case DRM_MODE_SCALE_NO_SCALE:
+        case DRM_MODE_SCALE_CENTER:
                /*
                 * For centered modes, we have to calculate border widths &
                 * heights and modify the values programmed into the CRTC.
@@ -672,9 +662,8 @@ static int intel_lvds_set_property(struct drm_connector *connector,
                                connector->encoder) {
                struct drm_crtc *crtc = connector->encoder->crtc;
                struct intel_lvds_priv *lvds_priv = intel_output->dev_priv;
-                if (value == DRM_MODE_SCALE_NON_GPU) {
+                if (value == DRM_MODE_SCALE_NONE) {
-                        DRM_DEBUG_KMS(I915_LVDS,
+                        DRM_DEBUG_KMS("no scaling not supported\n");
-                                        "non_GPU property is unsupported\n");
                        return 0;
                }
                if (lvds_priv->fitting_mode == value) {
@@ -731,8 +720,7 @@ static const struct drm_encoder_funcs intel_lvds_enc_funcs = {
 static int __init intel_no_lvds_dmi_callback(const struct dmi_system_id *id)
 {
-        DRM_DEBUG_KMS(I915_LVDS,
+        DRM_DEBUG_KMS("Skipping LVDS initialization for %s\n", id->ident);
-                      "Skipping LVDS initialization for %s\n", id->ident);
        return 1;
 }
@@ -1027,7 +1015,7 @@ out:
        return;
 failed:
-        DRM_DEBUG_KMS(I915_LVDS, "No LVDS modes found, disabling.\n");
+        DRM_DEBUG_KMS("No LVDS modes found, disabling.\n");
        if (intel_output->ddc_bus)
                intel_i2c_destroy(intel_output->ddc_bus);
        drm_connector_cleanup(connector);
diff --git a/drivers/gpu/drm/i915/intel_sdvo.c b/drivers/gpu/drm/i915/intel_sdvo.c
index d3b74ba62b4a..0bf28efcf2c1 100644
--- a/drivers/gpu/drm/i915/intel_sdvo.c
+++ b/drivers/gpu/drm/i915/intel_sdvo.c
@@ -37,7 +37,19 @@
 #include "intel_sdvo_regs.h"
 #undef SDVO_DEBUG
-#define I915_SDVO       "i915_sdvo"
+static char *tv_format_names[] = {
+        "NTSC_M"   , "NTSC_J"  , "NTSC_443",
+        "PAL_B"    , "PAL_D"   , "PAL_G"   ,
+        "PAL_H"    , "PAL_I"   , "PAL_M"   ,
+        "PAL_N"    , "PAL_NC"  , "PAL_60"  ,
+        "SECAM_B"  , "SECAM_D" , "SECAM_G" ,
+        "SECAM_K"  , "SECAM_K1", "SECAM_L" ,
+        "SECAM_60"
+};
+#define TV_FORMAT_NUM  (sizeof(tv_format_names) / sizeof(*tv_format_names))
 struct intel_sdvo_priv {
        u8 slave_addr;
@@ -71,6 +83,15 @@ struct intel_sdvo_priv {
         */
        bool is_tv;
+        /* This is for current tv format name */
+        char *tv_format_name;
+        /* This contains all current supported TV format */
+        char *tv_format_supported[TV_FORMAT_NUM];
+        int   format_supported_num;
+        struct drm_property *tv_format_property;
+        struct drm_property *tv_format_name_property[TV_FORMAT_NUM];
        /**
         * This is set if we treat the device as HDMI, instead of DVI.
         */
@@ -97,14 +118,6 @@ struct intel_sdvo_priv {
         */
        struct intel_sdvo_sdtv_resolution_reply sdtv_resolutions;
-        /**
-         * Current selected TV format.
-         *
-         * This is stored in the same structure that's passed to the device, for
-         * convenience.
-         */
-        struct intel_sdvo_tv_format tv_format;
        /*
         * supported encoding mode, used to determine whether HDMI is
         * supported
@@ -114,6 +127,9 @@ struct intel_sdvo_priv {
        /* DDC bus used by this SDVO output */
        uint8_t ddc_bus;
+        /* Mac mini hack -- use the same DDC as the analog connector */
+        struct i2c_adapter *analog_ddc_bus;
        int save_sdvo_mult;
        u16 save_active_outputs;
        struct intel_sdvo_dtd save_input_dtd_1, save_input_dtd_2;
@@ -188,7 +204,7 @@ static bool intel_sdvo_read_byte(struct intel_output *intel_output, u8 addr,
                return true;
        }
-        DRM_DEBUG("i2c transfer returned %d\n", ret);
+        DRM_DEBUG_KMS("i2c transfer returned %d\n", ret);
        return false;
 }
@@ -298,7 +314,7 @@ static void intel_sdvo_debug_write(struct intel_output *intel_output, u8 cmd,
        struct intel_sdvo_priv *sdvo_priv = intel_output->dev_priv;
        int i;
-        DRM_DEBUG_KMS(I915_SDVO, "%s: W: %02X ",
+        DRM_DEBUG_KMS("%s: W: %02X ",
                                SDVO_NAME(sdvo_priv), cmd);
        for (i = 0; i < args_len; i++)
                DRM_LOG_KMS("%02X ", ((u8 *)args)[i]);
@@ -351,7 +367,7 @@ static void intel_sdvo_debug_response(struct intel_output *intel_output,
        struct intel_sdvo_priv *sdvo_priv = intel_output->dev_priv;
        int i;
-        DRM_DEBUG_KMS(I915_SDVO, "%s: R: ", SDVO_NAME(sdvo_priv));
+        DRM_DEBUG_KMS("%s: R: ", SDVO_NAME(sdvo_priv));
        for (i = 0; i < response_len; i++)
                DRM_LOG_KMS("%02X ", ((u8 *)response)[i]);
        for (; i < 8; i++)
@@ -668,10 +684,10 @@ static int intel_sdvo_get_clock_rate_mult(struct intel_output *intel_output)
        status = intel_sdvo_read_response(intel_output, &response, 1);
        if (status != SDVO_CMD_STATUS_SUCCESS) {
-                DRM_DEBUG("Couldn't get SDVO clock rate multiplier\n");
+                DRM_DEBUG_KMS("Couldn't get SDVO clock rate multiplier\n");
                return SDVO_CLOCK_RATE_MULT_1X;
        } else {
-                DRM_DEBUG("Current clock rate multiplier: %d\n", response);
+                DRM_DEBUG_KMS("Current clock rate multiplier: %d\n", response);
        }
        return response;
@@ -945,23 +961,28 @@ static void intel_sdvo_set_avi_infoframe(struct intel_output *output,
 static void intel_sdvo_set_tv_format(struct intel_output *output)
 {
+        struct intel_sdvo_tv_format format;
        struct intel_sdvo_priv *sdvo_priv = output->dev_priv;
-        struct intel_sdvo_tv_format *format, unset;
+        uint32_t format_map, i;
-        u8 status;
+        uint8_t status;
-        format = &sdvo_priv->tv_format;
+        for (i = 0; i < TV_FORMAT_NUM; i++)
-        memset(&unset, 0, sizeof(unset));
+                if (tv_format_names[i] == sdvo_priv->tv_format_name)
-        if (memcmp(format, &unset, sizeof(*format))) {
+                        break;
-                DRM_DEBUG("%s: Choosing default TV format of NTSC-M\n",
-                                SDVO_NAME(sdvo_priv));
+        format_map = 1 << i;
-                format->ntsc_m = 1;
+        memset(&format, 0, sizeof(format));
-                intel_sdvo_write_cmd(output, SDVO_CMD_SET_TV_FORMAT, format,
+        memcpy(&format, &format_map, sizeof(format_map) > sizeof(format) ?
-                                sizeof(*format));
+                        sizeof(format) : sizeof(format_map));
-                status = intel_sdvo_read_response(output, NULL, 0);
-                if (status != SDVO_CMD_STATUS_SUCCESS)
+        intel_sdvo_write_cmd(output, SDVO_CMD_SET_TV_FORMAT, &format_map,
-                        DRM_DEBUG("%s: Failed to set TV format\n",
+                             sizeof(format));
-                                        SDVO_NAME(sdvo_priv));
-        }
+        status = intel_sdvo_read_response(output, NULL, 0);
+        if (status != SDVO_CMD_STATUS_SUCCESS)
+                DRM_DEBUG("%s: Failed to set TV format\n",
+                          SDVO_NAME(sdvo_priv));
 }
 static bool intel_sdvo_mode_fixup(struct drm_encoder *encoder,
@@ -1230,8 +1251,8 @@ static void intel_sdvo_dpms(struct drm_encoder *encoder, int mode)
                 * a given it the status is a success, we succeeded.
                 */
                if (status == SDVO_CMD_STATUS_SUCCESS && !input1) {
-                        DRM_DEBUG("First %s output reported failure to sync\n",
+                        DRM_DEBUG_KMS("First %s output reported failure to "
-                                   SDVO_NAME(sdvo_priv));
+                                        "sync\n", SDVO_NAME(sdvo_priv));
                }
                if (0)
@@ -1326,8 +1347,8 @@ static void intel_sdvo_restore(struct drm_connector *connector)
                        intel_wait_for_vblank(dev);
                status = intel_sdvo_get_trained_inputs(intel_output, &input1, &input2);
                if (status == SDVO_CMD_STATUS_SUCCESS && !input1)
-                        DRM_DEBUG("First %s output reported failure to sync\n",
+                        DRM_DEBUG_KMS("First %s output reported failure to "
-                                   SDVO_NAME(sdvo_priv));
+                                        "sync\n", SDVO_NAME(sdvo_priv));
        }
        intel_sdvo_set_active_outputs(intel_output, sdvo_priv->save_active_outputs);
@@ -1405,7 +1426,7 @@ int intel_sdvo_supports_hotplug(struct drm_connector *connector)
        u8 response[2];
        u8 status;
        struct intel_output *intel_output;
-        DRM_DEBUG("\n");
+        DRM_DEBUG_KMS("\n");
        if (!connector)
                return 0;
@@ -1478,6 +1499,36 @@ intel_sdvo_multifunc_encoder(struct intel_output *intel_output)
        return (caps > 1);
 }
+static struct drm_connector *
+intel_find_analog_connector(struct drm_device *dev)
+{
+        struct drm_connector *connector;
+        struct intel_output *intel_output;
+        list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
+                intel_output = to_intel_output(connector);
+                if (intel_output->type == INTEL_OUTPUT_ANALOG)
+                        return connector;
+        }
+        return NULL;
+}
+static int
+intel_analog_is_connected(struct drm_device *dev)
+{
+        struct drm_connector *analog_connector;
+        analog_connector = intel_find_analog_connector(dev);
+        if (!analog_connector)
+                return false;
+        if (analog_connector->funcs->detect(analog_connector) ==
+                        connector_status_disconnected)
+                return false;
+        return true;
+}
 enum drm_connector_status
 intel_sdvo_hdmi_sink_detect(struct drm_connector *connector, u16 response)
 {
@@ -1488,6 +1539,15 @@ intel_sdvo_hdmi_sink_detect(struct drm_connector *connector, u16 response)
        edid = drm_get_edid(&intel_output->base,
                            intel_output->ddc_bus);
+        /* when there is no edid and no monitor is connected with VGA
+         * port, try to use the CRT ddc to read the EDID for DVI-connector
+         */
+        if (edid == NULL &&
+            sdvo_priv->analog_ddc_bus &&
+            !intel_analog_is_connected(intel_output->base.dev))
+                edid = drm_get_edid(&intel_output->base,
+                                    sdvo_priv->analog_ddc_bus);
        if (edid != NULL) {
                /* Don't report the output as connected if it's a DVI-I
                 * connector with a non-digital EDID coming out.
@@ -1516,10 +1576,11 @@ static enum drm_connector_status intel_sdvo_detect(struct drm_connector *connect
        struct intel_output *intel_output = to_intel_output(connector);
        struct intel_sdvo_priv *sdvo_priv = intel_output->dev_priv;
-        intel_sdvo_write_cmd(intel_output, SDVO_CMD_GET_ATTACHED_DISPLAYS, NULL, 0);
+        intel_sdvo_write_cmd(intel_output,
+                             SDVO_CMD_GET_ATTACHED_DISPLAYS, NULL, 0);
        status = intel_sdvo_read_response(intel_output, &response, 2);
-        DRM_DEBUG("SDVO response %d %d\n", response & 0xff, response >> 8);
+        DRM_DEBUG_KMS("SDVO response %d %d\n", response & 0xff, response >> 8);
        if (status != SDVO_CMD_STATUS_SUCCESS)
                return connector_status_unknown;
@@ -1540,50 +1601,32 @@ static enum drm_connector_status intel_sdvo_detect(struct drm_connector *connect
 static void intel_sdvo_get_ddc_modes(struct drm_connector *connector)
 {
        struct intel_output *intel_output = to_intel_output(connector);
+        struct intel_sdvo_priv *sdvo_priv = intel_output->dev_priv;
+        int num_modes;
        /* set the bus switch and get the modes */
-        intel_ddc_get_modes(intel_output);
+        num_modes = intel_ddc_get_modes(intel_output);
-#if 0
+        /*
-        struct drm_device *dev = encoder->dev;
+         * Mac mini hack.  On this device, the DVI-I connector shares one DDC
-        struct drm_i915_private *dev_priv = dev->dev_private;
+         * link between analog and digital outputs. So, if the regular SDVO
-        /* Mac mini hack.  On this device, I get DDC through the analog, which
+         * DDC fails, check to see if the analog output is disconnected, in
-         * load-detects as disconnected.  I fail to DDC through the SDVO DDC,
+         * which case we'll look there for the digital DDC data.
-         * but it does load-detect as connected.  So, just steal the DDC bits
-         * from analog when we fail at finding it the right way.
         */
-        crt = xf86_config->output[0];
+        if (num_modes == 0 &&
-        intel_output = crt->driver_private;
+            sdvo_priv->analog_ddc_bus &&
-        if (intel_output->type == I830_OUTPUT_ANALOG &&
+            !intel_analog_is_connected(intel_output->base.dev)) {
-            crt->funcs->detect(crt) == XF86OutputStatusDisconnected) {
+                struct i2c_adapter *digital_ddc_bus;
-                I830I2CInit(pScrn, &intel_output->pDDCBus, GPIOA, "CRTDDC_A");
-                edid_mon = xf86OutputGetEDID(crt, intel_output->pDDCBus);
-                xf86DestroyI2CBusRec(intel_output->pDDCBus, true, true);
-        }
-        if (edid_mon) {
-                xf86OutputSetEDID(output, edid_mon);
-                modes = xf86OutputGetEDIDModes(output);
-        }
-#endif
-}
-/**
+                /* Switch to the analog ddc bus and try that
- * This function checks the current TV format, and chooses a default if
+                 */
- * it hasn't been set.
+                digital_ddc_bus = intel_output->ddc_bus;
- */
+                intel_output->ddc_bus = sdvo_priv->analog_ddc_bus;
-static void
-intel_sdvo_check_tv_format(struct intel_output *output)
-{
-        struct intel_sdvo_priv *dev_priv = output->dev_priv;
-        struct intel_sdvo_tv_format format;
-        uint8_t status;
-        intel_sdvo_write_cmd(output, SDVO_CMD_GET_TV_FORMAT, NULL, 0);
+                (void) intel_ddc_get_modes(intel_output);
-        status = intel_sdvo_read_response(output, &format, sizeof(format));
-        if (status != SDVO_CMD_STATUS_SUCCESS)
-                return;
-        memcpy(&dev_priv->tv_format, &format, sizeof(format));
+                intel_output->ddc_bus = digital_ddc_bus;
+        }
 }
 /*
@@ -1656,17 +1699,26 @@ static void intel_sdvo_get_tv_modes(struct drm_connector *connector)
        struct intel_output *output = to_intel_output(connector);
        struct intel_sdvo_priv *sdvo_priv = output->dev_priv;
        struct intel_sdvo_sdtv_resolution_request tv_res;
-        uint32_t reply = 0;
+        uint32_t reply = 0, format_map = 0;
+        int i;
        uint8_t status;
-        int i = 0;
-        intel_sdvo_check_tv_format(output);
        /* Read the list of supported input resolutions for the selected TV
         * format.
         */
-        memset(&tv_res, 0, sizeof(tv_res));
+        for (i = 0; i < TV_FORMAT_NUM; i++)
-        memcpy(&tv_res, &sdvo_priv->tv_format, sizeof(tv_res));
+                if (tv_format_names[i] ==  sdvo_priv->tv_format_name)
+                        break;
+        format_map = (1 << i);
+        memcpy(&tv_res, &format_map,
+               sizeof(struct intel_sdvo_sdtv_resolution_request) >
+               sizeof(format_map) ? sizeof(format_map) :
+               sizeof(struct intel_sdvo_sdtv_resolution_request));
+        intel_sdvo_set_target_output(output, sdvo_priv->controlled_output);
        intel_sdvo_write_cmd(output, SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT,
                             &tv_res, sizeof(tv_res));
        status = intel_sdvo_read_response(output, &reply, 3);
@@ -1681,6 +1733,7 @@ static void intel_sdvo_get_tv_modes(struct drm_connector *connector)
                        if (nmode)
                                drm_mode_probed_add(connector, nmode);
                }
 }
 static void intel_sdvo_get_lvds_modes(struct drm_connector *connector)
@@ -1748,17 +1801,62 @@ static void intel_sdvo_destroy(struct drm_connector *connector)
                intel_i2c_destroy(intel_output->i2c_bus);
        if (intel_output->ddc_bus)
                intel_i2c_destroy(intel_output->ddc_bus);
+        if (sdvo_priv->analog_ddc_bus)
+                intel_i2c_destroy(sdvo_priv->analog_ddc_bus);
        if (sdvo_priv->sdvo_lvds_fixed_mode != NULL)
                drm_mode_destroy(connector->dev,
                                 sdvo_priv->sdvo_lvds_fixed_mode);
+        if (sdvo_priv->tv_format_property)
+                drm_property_destroy(connector->dev,
+                                     sdvo_priv->tv_format_property);
        drm_sysfs_connector_remove(connector);
        drm_connector_cleanup(connector);
        kfree(intel_output);
 }
+static int
+intel_sdvo_set_property(struct drm_connector *connector,
+                        struct drm_property *property,
+                        uint64_t val)
+{
+        struct intel_output *intel_output = to_intel_output(connector);
+        struct intel_sdvo_priv *sdvo_priv = intel_output->dev_priv;
+        struct drm_encoder *encoder = &intel_output->enc;
+        struct drm_crtc *crtc = encoder->crtc;
+        int ret = 0;
+        bool changed = false;
+        ret = drm_connector_property_set_value(connector, property, val);
+        if (ret < 0)
+                goto out;
+        if (property == sdvo_priv->tv_format_property) {
+                if (val >= TV_FORMAT_NUM) {
+                        ret = -EINVAL;
+                        goto out;
+                }
+                if (sdvo_priv->tv_format_name ==
+                    sdvo_priv->tv_format_supported[val])
+                        goto out;
+                sdvo_priv->tv_format_name = sdvo_priv->tv_format_supported[val];
+                changed = true;
+        } else {
+                ret = -EINVAL;
+                goto out;
+        }
+        if (changed && crtc)
+                drm_crtc_helper_set_mode(crtc, &crtc->mode, crtc->x,
+                                crtc->y, crtc->fb);
+out:
+        return ret;
+}
 static const struct drm_encoder_helper_funcs intel_sdvo_helper_funcs = {
        .dpms = intel_sdvo_dpms,
        .mode_fixup = intel_sdvo_mode_fixup,
@@ -1773,6 +1871,7 @@ static const struct drm_connector_funcs intel_sdvo_connector_funcs = {
        .restore = intel_sdvo_restore,
        .detect = intel_sdvo_detect,
        .fill_modes = drm_helper_probe_single_connector_modes,
+        .set_property = intel_sdvo_set_property,
        .destroy = intel_sdvo_destroy,
 };
@@ -2013,10 +2112,9 @@ intel_sdvo_output_setup(struct intel_output *intel_output, uint16_t flags)
                sdvo_priv->controlled_output = 0;
                memcpy(bytes, &sdvo_priv->caps.output_flags, 2);
-                DRM_DEBUG_KMS(I915_SDVO,
+                DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%02x%02x)\n",
-                                "%s: Unknown SDVO output type (0x%02x%02x)\n",
+                              SDVO_NAME(sdvo_priv),
-                                  SDVO_NAME(sdvo_priv),
+                              bytes[0], bytes[1]);
-                                  bytes[0], bytes[1]);
                ret = false;
        }
        intel_output->crtc_mask = (1 << 0) | (1 << 1);
@@ -2029,6 +2127,55 @@ intel_sdvo_output_setup(struct intel_output *intel_output, uint16_t flags)
 }
+static void intel_sdvo_tv_create_property(struct drm_connector *connector)
+{
+      struct intel_output *intel_output = to_intel_output(connector);
+        struct intel_sdvo_priv *sdvo_priv = intel_output->dev_priv;
+        struct intel_sdvo_tv_format format;
+        uint32_t format_map, i;
+        uint8_t status;
+        intel_sdvo_set_target_output(intel_output,
+                                     sdvo_priv->controlled_output);
+        intel_sdvo_write_cmd(intel_output,
+                             SDVO_CMD_GET_SUPPORTED_TV_FORMATS, NULL, 0);
+        status = intel_sdvo_read_response(intel_output,
+                                          &format, sizeof(format));
+        if (status != SDVO_CMD_STATUS_SUCCESS)
+                return;
+        memcpy(&format_map, &format, sizeof(format) > sizeof(format_map) ?
+               sizeof(format_map) : sizeof(format));
+        if (format_map == 0)
+                return;
+        sdvo_priv->format_supported_num = 0;
+        for (i = 0 ; i < TV_FORMAT_NUM; i++)
+                if (format_map & (1 << i)) {
+                        sdvo_priv->tv_format_supported
+                        [sdvo_priv->format_supported_num++] =
+                        tv_format_names[i];
+                }
+        sdvo_priv->tv_format_property =
+                        drm_property_create(
+                                connector->dev, DRM_MODE_PROP_ENUM,
+                                "mode", sdvo_priv->format_supported_num);
+        for (i = 0; i < sdvo_priv->format_supported_num; i++)
+                drm_property_add_enum(
+                                sdvo_priv->tv_format_property, i,
+                                i, sdvo_priv->tv_format_supported[i]);
+        sdvo_priv->tv_format_name = sdvo_priv->tv_format_supported[0];
+        drm_connector_attach_property(
+                        connector, sdvo_priv->tv_format_property, 0);
+}
 bool intel_sdvo_init(struct drm_device *dev, int output_device)
 {
        struct drm_connector *connector;
@@ -2066,18 +2213,22 @@ bool intel_sdvo_init(struct drm_device *dev, int output_device)
        /* Read the regs to test if we can talk to the device */
        for (i = 0; i < 0x40; i++) {
                if (!intel_sdvo_read_byte(intel_output, i, &ch[i])) {
-                        DRM_DEBUG_KMS(I915_SDVO,
+                        DRM_DEBUG_KMS("No SDVO device found on SDVO%c\n",
-                                        "No SDVO device found on SDVO%c\n",
                                        output_device == SDVOB ? 'B' : 'C');
                        goto err_i2c;
                }
        }
        /* setup the DDC bus. */
-        if (output_device == SDVOB)
+        if (output_device == SDVOB) {
                intel_output->ddc_bus = intel_i2c_create(dev, GPIOE, "SDVOB DDC BUS");
-        else
+                sdvo_priv->analog_ddc_bus = intel_i2c_create(dev, GPIOA,
+                                                "SDVOB/VGA DDC BUS");
+        } else {
                intel_output->ddc_bus = intel_i2c_create(dev, GPIOE, "SDVOC DDC BUS");
+                sdvo_priv->analog_ddc_bus = intel_i2c_create(dev, GPIOA,
+                                                "SDVOC/VGA DDC BUS");
+        }
        if (intel_output->ddc_bus == NULL)
                goto err_i2c;
@@ -2090,7 +2241,7 @@ bool intel_sdvo_init(struct drm_device *dev, int output_device)
        if (intel_sdvo_output_setup(intel_output,
                                    sdvo_priv->caps.output_flags) != true) {
-                DRM_DEBUG("SDVO output failed to setup on SDVO%c\n",
+                DRM_DEBUG_KMS("SDVO output failed to setup on SDVO%c\n",
                          output_device == SDVOB ? 'B' : 'C');
                goto err_i2c;
        }
@@ -2111,6 +2262,8 @@ bool intel_sdvo_init(struct drm_device *dev, int output_device)
        drm_encoder_helper_add(&intel_output->enc, &intel_sdvo_helper_funcs);
        drm_mode_connector_attach_encoder(&intel_output->base, &intel_output->enc);
+        if (sdvo_priv->is_tv)
+                intel_sdvo_tv_create_property(connector);
        drm_sysfs_connector_add(connector);
        intel_sdvo_select_ddc_bus(sdvo_priv);
@@ -2123,7 +2276,7 @@ bool intel_sdvo_init(struct drm_device *dev, int output_device)
                                               &sdvo_priv->pixel_clock_max);
-        DRM_DEBUG_KMS(I915_SDVO, "%s device VID/DID: %02X:%02X.%02X, "
+        DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, "
                        "clock range %dMHz - %dMHz, "
                        "input 1: %c, input 2: %c, "
                        "output 1: %c, output 2: %c\n",
@@ -2143,6 +2296,8 @@ bool intel_sdvo_init(struct drm_device *dev, int output_device)
        return true;
 err_i2c:
+        if (sdvo_priv->analog_ddc_bus != NULL)
+                intel_i2c_destroy(sdvo_priv->analog_ddc_bus);
        if (intel_output->ddc_bus != NULL)
                intel_i2c_destroy(intel_output->ddc_bus);
        if (intel_output->i2c_bus != NULL)
diff --git a/drivers/gpu/drm/i915/intel_tv.c b/drivers/gpu/drm/i915/intel_tv.c
index 5b1c9e9fdba0..c64eab493fb0 100644
--- a/drivers/gpu/drm/i915/intel_tv.c
+++ b/drivers/gpu/drm/i915/intel_tv.c
@@ -1437,6 +1437,35 @@ intel_tv_detect_type (struct drm_crtc *crtc, struct intel_output *intel_output)
        return type;
 }
+/*
+ * Here we set accurate tv format according to connector type
+ * i.e Component TV should not be assigned by NTSC or PAL
+ */
+static void intel_tv_find_better_format(struct drm_connector *connector)
+{
+        struct intel_output *intel_output = to_intel_output(connector);
+        struct intel_tv_priv *tv_priv = intel_output->dev_priv;
+        const struct tv_mode *tv_mode = intel_tv_mode_find(intel_output);
+        int i;
+        if ((tv_priv->type == DRM_MODE_CONNECTOR_Component) ==
+                tv_mode->component_only)
+                return;
+        for (i = 0; i < sizeof(tv_modes) / sizeof(*tv_modes); i++) {
+                tv_mode = tv_modes + i;
+                if ((tv_priv->type == DRM_MODE_CONNECTOR_Component) ==
+                        tv_mode->component_only)
+                        break;
+        }
+        tv_priv->tv_format = tv_mode->name;
+        drm_connector_property_set_value(connector,
+                connector->dev->mode_config.tv_mode_property, i);
+}
 /**
 * Detect the TV connection.
 *
@@ -1473,6 +1502,7 @@ intel_tv_detect(struct drm_connector *connector)
        if (type < 0)
                return connector_status_disconnected;
+        intel_tv_find_better_format(connector);
        return connector_status_connected;
 }
diff --git a/drivers/gpu/drm/mga/mga_dma.c b/drivers/gpu/drm/mga/mga_dma.c
index 6c67a02910c8..3c917fb3a60b 100644
--- a/drivers/gpu/drm/mga/mga_dma.c
+++ b/drivers/gpu/drm/mga/mga_dma.c
@@ -444,7 +444,7 @@ static int mga_do_agp_dma_bootstrap(struct drm_device * dev,
 {
        drm_mga_private_t *const dev_priv =
            (drm_mga_private_t *) dev->dev_private;
-        unsigned int warp_size = mga_warp_microcode_size(dev_priv);
+        unsigned int warp_size = MGA_WARP_UCODE_SIZE;
        int err;
        unsigned offset;
        const unsigned secondary_size = dma_bs->secondary_bin_count
@@ -619,7 +619,7 @@ static int mga_do_pci_dma_bootstrap(struct drm_device * dev,
 {
        drm_mga_private_t *const dev_priv =
            (drm_mga_private_t *) dev->dev_private;
-        unsigned int warp_size = mga_warp_microcode_size(dev_priv);
+        unsigned int warp_size = MGA_WARP_UCODE_SIZE;
        unsigned int primary_size;
        unsigned int bin_count;
        int err;
diff --git a/drivers/gpu/drm/mga/mga_drv.h b/drivers/gpu/drm/mga/mga_drv.h
index 3d264f288237..be6c6b9b0e89 100644
--- a/drivers/gpu/drm/mga/mga_drv.h
+++ b/drivers/gpu/drm/mga/mga_drv.h
@@ -177,7 +177,6 @@ extern void mga_do_dma_wrap_end(drm_mga_private_t * dev_priv);
 extern int mga_freelist_put(struct drm_device * dev, struct drm_buf * buf);
                                /* mga_warp.c */
-extern unsigned int mga_warp_microcode_size(const drm_mga_private_t * dev_priv);
 extern int mga_warp_install_microcode(drm_mga_private_t * dev_priv);
 extern int mga_warp_init(drm_mga_private_t * dev_priv);
diff --git a/drivers/gpu/drm/mga/mga_ucode.h b/drivers/gpu/drm/mga/mga_ucode.h
deleted file mode 100644
index b611e27470e1..000000000000
--- a/drivers/gpu/drm/mga/mga_ucode.h
+++ /dev/null
@@ -1,11645 +0,0 @@
-/* mga_ucode.h -- Matrox G200/G400 WARP engine microcode -*- linux-c -*-
- * Created: Thu Jan 11 21:20:43 2001 by gareth@valinux.com
- *
- * Copyright 1999 Matrox Graphics Inc.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included
- * in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
- * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * MATROX GRAPHICS INC., OR ANY OTHER CONTRIBUTORS BE LIABLE FOR ANY CLAIM,
- * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
- * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE
- * OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
- * Kernel-based WARP engine management:
- *    Gareth Hughes <gareth@valinux.com>
- */
-/*
- * WARP pipes are named according to the functions they perform, where:
- *
- *   - T stands for computation of texture stage 0
- *   - T2 stands for computation of both texture stage 0 and texture stage 1
- *   - G stands for computation of triangle intensity (Gouraud interpolation)
- *   - Z stands for computation of Z buffer interpolation
- *   - S stands for computation of specular highlight
- *   - A stands for computation of the alpha channel
- *   - F stands for computation of vertex fog interpolation
- */
-static unsigned char warp_g200_tgz[] = {
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x98, 0xA0, 0xE9,
-        0x40, 0x40, 0xD8, 0xEC,
-        0xFF, 0x80, 0xC0, 0xE9,
-        0x00, 0x80, 0x00, 0xE8,
-        0x1F, 0xD7, 0x18, 0xBD,
-        0x3F, 0xD7, 0x22, 0xBD,
-        0x81, 0x04,
-        0x89, 0x04,
-        0x01, 0x04,
-        0x09, 0x04,
-        0xC9, 0x41, 0xC0, 0xEC,
-        0x11, 0x04,
-        0x00, 0xE0,
-        0x41, 0xCC, 0x41, 0xCD,
-        0x49, 0xCC, 0x49, 0xCD,
-        0xD1, 0x41, 0xC0, 0xEC,
-        0x51, 0xCC, 0x51, 0xCD,
-        0x80, 0x04,
-        0x10, 0x04,
-        0x08, 0x04,
-        0x00, 0xE0,
-        0x00, 0xCC, 0xC0, 0xCD,
-        0xD1, 0x49, 0xC0, 0xEC,
-        0x8A, 0x1F, 0x20, 0xE9,
-        0x8B, 0x3F, 0x20, 0xE9,
-        0x41, 0x3C, 0x41, 0xAD,
-        0x49, 0x3C, 0x49, 0xAD,
-        0x10, 0xCC, 0x10, 0xCD,
-        0x08, 0xCC, 0x08, 0xCD,
-        0xB9, 0x41, 0x49, 0xBB,
-        0x1F, 0xF0, 0x41, 0xCD,
-        0x51, 0x3C, 0x51, 0xAD,
-        0x00, 0x98, 0x80, 0xE9,
-        0x72, 0x80, 0x07, 0xEA,
-        0x24, 0x1F, 0x20, 0xE9,
-        0x15, 0x41, 0x49, 0xBD,
-        0x1D, 0x41, 0x51, 0xBD,
-        0x2E, 0x41, 0x2A, 0xB8,
-        0x34, 0x53, 0xA0, 0xE8,
-        0x15, 0x30,
-        0x1D, 0x30,
-        0x58, 0xE3,
-        0x00, 0xE0,
-        0xB5, 0x40, 0x48, 0xBD,
-        0x3D, 0x40, 0x50, 0xBD,
-        0x24, 0x43, 0xA0, 0xE8,
-        0x2C, 0x4B, 0xA0, 0xE8,
-        0x15, 0x72,
-        0x09, 0xE3,
-        0x00, 0xE0,
-        0x1D, 0x72,
-        0x35, 0x30,
-        0xB5, 0x30,
-        0xBD, 0x30,
-        0x3D, 0x30,
-        0x9C, 0x97, 0x57, 0x9F,
-        0x00, 0x80, 0x00, 0xE8,
-        0x6C, 0x64, 0xC8, 0xEC,
-        0x98, 0xE1,
-        0xB5, 0x05,
-        0xBD, 0x05,
-        0x2E, 0x30,
-        0x32, 0xC0, 0xA0, 0xE8,
-        0x33, 0xC0, 0xA0, 0xE8,
-        0x74, 0x64, 0xC8, 0xEC,
-        0x40, 0x3C, 0x40, 0xAD,
-        0x32, 0x6A,
-        0x2A, 0x30,
-        0x20, 0x73,
-        0x33, 0x6A,
-        0x00, 0xE0,
-        0x28, 0x73,
-        0x1C, 0x72,
-        0x83, 0xE2,
-        0x60, 0x80, 0x15, 0xEA,
-        0xB8, 0x3D, 0x28, 0xDF,
-        0x30, 0x35, 0x20, 0xDF,
-        0x40, 0x30,
-        0x00, 0xE0,
-        0xCC, 0xE2,
-        0x64, 0x72,
-        0x25, 0x42, 0x52, 0xBF,
-        0x2D, 0x42, 0x4A, 0xBF,
-        0x30, 0x2E, 0x30, 0xDF,
-        0x38, 0x2E, 0x38, 0xDF,
-        0x18, 0x1D, 0x45, 0xE9,
-        0x1E, 0x15, 0x45, 0xE9,
-        0x2B, 0x49, 0x51, 0xBD,
-        0x00, 0xE0,
-        0x1F, 0x73,
-        0x38, 0x38, 0x40, 0xAF,
-        0x30, 0x30, 0x40, 0xAF,
-        0x24, 0x1F, 0x24, 0xDF,
-        0x1D, 0x32, 0x20, 0xE9,
-        0x2C, 0x1F, 0x2C, 0xDF,
-        0x1A, 0x33, 0x20, 0xE9,
-        0xB0, 0x10,
-        0x08, 0xE3,
-        0x40, 0x10,
-        0xB8, 0x10,
-        0x26, 0xF0, 0x30, 0xCD,
-        0x2F, 0xF0, 0x38, 0xCD,
-        0x2B, 0x80, 0x20, 0xE9,
-        0x2A, 0x80, 0x20, 0xE9,
-        0xA6, 0x20,
-        0x88, 0xE2,
-        0x00, 0xE0,
-        0xAF, 0x20,
-        0x28, 0x2A, 0x26, 0xAF,
-        0x20, 0x2A, 0xC0, 0xAF,
-        0x34, 0x1F, 0x34, 0xDF,
-        0x46, 0x24, 0x46, 0xDF,
-        0x28, 0x30, 0x80, 0xBF,
-        0x20, 0x38, 0x80, 0xBF,
-        0x47, 0x24, 0x47, 0xDF,
-        0x4E, 0x2C, 0x4E, 0xDF,
-        0x4F, 0x2C, 0x4F, 0xDF,
-        0x56, 0x34, 0x56, 0xDF,
-        0x28, 0x15, 0x28, 0xDF,
-        0x20, 0x1D, 0x20, 0xDF,
-        0x57, 0x34, 0x57, 0xDF,
-        0x00, 0xE0,
-        0x1D, 0x05,
-        0x04, 0x80, 0x10, 0xEA,
-        0x89, 0xE2,
-        0x2B, 0x30,
-        0x3F, 0xC1, 0x1D, 0xBD,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0xA0, 0x68,
-        0xBF, 0x25,
-        0x00, 0x80, 0x00, 0xE8,
-        0x20, 0xC0, 0x20, 0xAF,
-        0x28, 0x05,
-        0x97, 0x74,
-        0x00, 0xE0,
-        0x2A, 0x10,
-        0x16, 0xC0, 0x20, 0xE9,
-        0x04, 0x80, 0x10, 0xEA,
-        0x8C, 0xE2,
-        0x95, 0x05,
-        0x28, 0xC1, 0x28, 0xAD,
-        0x1F, 0xC1, 0x15, 0xBD,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0xA8, 0x67,
-        0x9F, 0x6B,
-        0x00, 0x80, 0x00, 0xE8,
-        0x28, 0xC0, 0x28, 0xAD,
-        0x1D, 0x25,
-        0x20, 0x05,
-        0x28, 0x32, 0x80, 0xAD,
-        0x40, 0x2A, 0x40, 0xBD,
-        0x1C, 0x80, 0x20, 0xE9,
-        0x20, 0x33, 0x20, 0xAD,
-        0x20, 0x73,
-        0x00, 0xE0,
-        0xB6, 0x49, 0x51, 0xBB,
-        0x26, 0x2F, 0xB0, 0xE8,
-        0x19, 0x20, 0x20, 0xE9,
-        0x35, 0x20, 0x35, 0xDF,
-        0x3D, 0x20, 0x3D, 0xDF,
-        0x15, 0x20, 0x15, 0xDF,
-        0x1D, 0x20, 0x1D, 0xDF,
-        0x26, 0xD0, 0x26, 0xCD,
-        0x29, 0x49, 0x2A, 0xB8,
-        0x26, 0x40, 0x80, 0xBD,
-        0x3B, 0x48, 0x50, 0xBD,
-        0x3E, 0x54, 0x57, 0x9F,
-        0x00, 0xE0,
-        0x82, 0xE1,
-        0x1E, 0xAF, 0x59, 0x9F,
-        0x00, 0x80, 0x00, 0xE8,
-        0x26, 0x30,
-        0x29, 0x30,
-        0x48, 0x3C, 0x48, 0xAD,
-        0x2B, 0x72,
-        0xC2, 0xE1,
-        0x2C, 0xC0, 0x44, 0xC2,
-        0x05, 0x24, 0x34, 0xBF,
-        0x0D, 0x24, 0x2C, 0xBF,
-        0x2D, 0x46, 0x4E, 0xBF,
-        0x25, 0x46, 0x56, 0xBF,
-        0x20, 0x1D, 0x6F, 0x8F,
-        0x32, 0x3E, 0x5F, 0xE9,
-        0x3E, 0x50, 0x56, 0x9F,
-        0x00, 0xE0,
-        0x3B, 0x30,
-        0x1E, 0x8F, 0x51, 0x9F,
-        0x33, 0x1E, 0x5F, 0xE9,
-        0x05, 0x44, 0x54, 0xB2,
-        0x0D, 0x44, 0x4C, 0xB2,
-        0x19, 0xC0, 0xB0, 0xE8,
-        0x34, 0xC0, 0x44, 0xC4,
-        0x33, 0x73,
-        0x00, 0xE0,
-        0x3E, 0x62, 0x57, 0x9F,
-        0x1E, 0xAF, 0x59, 0x9F,
-        0x00, 0xE0,
-        0x0D, 0x20,
-        0x84, 0x3E, 0x58, 0xE9,
-        0x28, 0x1D, 0x6F, 0x8F,
-        0x05, 0x20,
-        0x00, 0xE0,
-        0x85, 0x1E, 0x58, 0xE9,
-        0x9B, 0x3B, 0x33, 0xDF,
-        0x20, 0x20, 0x42, 0xAF,
-        0x30, 0x42, 0x56, 0x9F,
-        0x80, 0x3E, 0x57, 0xE9,
-        0x3F, 0x8F, 0x51, 0x9F,
-        0x30, 0x80, 0x5F, 0xE9,
-        0x28, 0x28, 0x24, 0xAF,
-        0x81, 0x1E, 0x57, 0xE9,
-        0x05, 0x47, 0x57, 0xBF,
-        0x0D, 0x47, 0x4F, 0xBF,
-        0x88, 0x80, 0x58, 0xE9,
-        0x1B, 0x29, 0x1B, 0xDF,
-        0x30, 0x1D, 0x6F, 0x8F,
-        0x3A, 0x30, 0x4F, 0xE9,
-        0x1C, 0x30, 0x26, 0xDF,
-        0x09, 0xE3,
-        0x3B, 0x05,
-        0x3E, 0x50, 0x56, 0x9F,
-        0x3B, 0x3F, 0x4F, 0xE9,
-        0x1E, 0x8F, 0x51, 0x9F,
-        0x00, 0xE0,
-        0xAC, 0x20,
-        0x2D, 0x44, 0x4C, 0xB4,
-        0x2C, 0x1C, 0xC0, 0xAF,
-        0x25, 0x44, 0x54, 0xB4,
-        0x00, 0xE0,
-        0xC8, 0x30,
-        0x30, 0x46, 0x30, 0xAF,
-        0x1B, 0x1B, 0x48, 0xAF,
-        0x00, 0xE0,
-        0x25, 0x20,
-        0x38, 0x2C, 0x4F, 0xE9,
-        0x86, 0x80, 0x57, 0xE9,
-        0x38, 0x1D, 0x6F, 0x8F,
-        0x28, 0x74,
-        0x00, 0xE0,
-        0x0D, 0x44, 0x4C, 0xB0,
-        0x05, 0x44, 0x54, 0xB0,
-        0x2D, 0x20,
-        0x9B, 0x10,
-        0x82, 0x3E, 0x57, 0xE9,
-        0x32, 0xF0, 0x1B, 0xCD,
-        0x1E, 0xBD, 0x59, 0x9F,
-        0x83, 0x1E, 0x57, 0xE9,
-        0x38, 0x47, 0x38, 0xAF,
-        0x34, 0x20,
-        0x2A, 0x30,
-        0x00, 0xE0,
-        0x0D, 0x20,
-        0x32, 0x20,
-        0x05, 0x20,
-        0x87, 0x80, 0x57, 0xE9,
-        0x1F, 0x54, 0x57, 0x9F,
-        0x17, 0x42, 0x56, 0x9F,
-        0x00, 0xE0,
-        0x3B, 0x6A,
-        0x3F, 0x8F, 0x51, 0x9F,
-        0x37, 0x1E, 0x4F, 0xE9,
-        0x37, 0x32, 0x2A, 0xAF,
-        0x00, 0xE0,
-        0x32, 0x00,
-        0x00, 0x80, 0x00, 0xE8,
-        0x27, 0xC0, 0x44, 0xC0,
-        0x36, 0x1F, 0x4F, 0xE9,
-        0x1F, 0x1F, 0x26, 0xDF,
-        0x37, 0x1B, 0x37, 0xBF,
-        0x17, 0x26, 0x17, 0xDF,
-        0x3E, 0x17, 0x4F, 0xE9,
-        0x3F, 0x3F, 0x4F, 0xE9,
-        0x34, 0x1F, 0x34, 0xAF,
-        0x2B, 0x05,
-        0xA7, 0x20,
-        0x33, 0x2B, 0x37, 0xDF,
-        0x27, 0x17, 0xC0, 0xAF,
-        0x34, 0x80, 0x4F, 0xE9,
-        0x00, 0x80, 0x00, 0xE8,
-        0x03, 0x80, 0x0A, 0xEA,
-        0x17, 0xC1, 0x2B, 0xBD,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0xB3, 0x68,
-        0x97, 0x25,
-        0x00, 0x80, 0x00, 0xE8,
-        0x33, 0xC0, 0x33, 0xAF,
-        0x3C, 0x27, 0x4F, 0xE9,
-        0x57, 0x39, 0x20, 0xE9,
-        0x28, 0x19, 0x60, 0xEC,
-        0x2B, 0x32, 0x20, 0xE9,
-        0x1D, 0x3B, 0x20, 0xE9,
-        0xB3, 0x05,
-        0x00, 0xE0,
-        0x16, 0x28, 0x20, 0xE9,
-        0x23, 0x3B, 0x33, 0xAD,
-        0x1E, 0x2B, 0x20, 0xE9,
-        0x1C, 0x80, 0x20, 0xE9,
-        0x57, 0x36, 0x20, 0xE9,
-        0x00, 0x80, 0xA0, 0xE9,
-        0x40, 0x40, 0xD8, 0xEC,
-        0xFF, 0x80, 0xC0, 0xE9,
-        0x90, 0xE2,
-        0x00, 0xE0,
-        0x85, 0xFF, 0x20, 0xEA,
-        0x19, 0xC8, 0xC1, 0xCD,
-        0x1F, 0xD7, 0x18, 0xBD,
-        0x3F, 0xD7, 0x22, 0xBD,
-        0x9F, 0x41, 0x49, 0xBD,
-        0x00, 0x80, 0x00, 0xE8,
-        0x25, 0x41, 0x49, 0xBD,
-        0x2D, 0x41, 0x51, 0xBD,
-        0x0D, 0x80, 0x07, 0xEA,
-        0x00, 0x80, 0x00, 0xE8,
-        0x35, 0x40, 0x48, 0xBD,
-        0x3D, 0x40, 0x50, 0xBD,
-        0x00, 0x80, 0x00, 0xE8,
-        0x25, 0x30,
-        0x2D, 0x30,
-        0x35, 0x30,
-        0xB5, 0x30,
-        0xBD, 0x30,
-        0x3D, 0x30,
-        0x9C, 0xA7, 0x5B, 0x9F,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x84, 0xFF, 0x0A, 0xEA,
-        0x00, 0x80, 0x00, 0xE8,
-        0xC9, 0x41, 0xC8, 0xEC,
-        0x42, 0xE1,
-        0x00, 0xE0,
-        0x82, 0xFF, 0x20, 0xEA,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0xC8, 0x40, 0xC0, 0xEC,
-        0x00, 0x80, 0x00, 0xE8,
-        0x7F, 0xFF, 0x20, 0xEA,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-};
-static unsigned char warp_g200_tgza[] = {
-        0x00, 0x98, 0xA0, 0xE9,
-        0x40, 0x40, 0xD8, 0xEC,
-        0xFF, 0x80, 0xC0, 0xE9,
-        0x00, 0x80, 0x00, 0xE8,
-        0x1F, 0xD7, 0x18, 0xBD,
-        0x3F, 0xD7, 0x22, 0xBD,
-        0x81, 0x04,
-        0x89, 0x04,
-        0x01, 0x04,
-        0x09, 0x04,
-        0xC9, 0x41, 0xC0, 0xEC,
-        0x11, 0x04,
-        0x00, 0xE0,
-        0x41, 0xCC, 0x41, 0xCD,
-        0x49, 0xCC, 0x49, 0xCD,
-        0xD1, 0x41, 0xC0, 0xEC,
-        0x51, 0xCC, 0x51, 0xCD,
-        0x80, 0x04,
-        0x10, 0x04,
-        0x08, 0x04,
-        0x00, 0xE0,
-        0x00, 0xCC, 0xC0, 0xCD,
-        0xD1, 0x49, 0xC0, 0xEC,
-        0x8A, 0x1F, 0x20, 0xE9,
-        0x8B, 0x3F, 0x20, 0xE9,
-        0x41, 0x3C, 0x41, 0xAD,
-        0x49, 0x3C, 0x49, 0xAD,
-        0x10, 0xCC, 0x10, 0xCD,
-        0x08, 0xCC, 0x08, 0xCD,
-        0xB9, 0x41, 0x49, 0xBB,
-        0x1F, 0xF0, 0x41, 0xCD,
-        0x51, 0x3C, 0x51, 0xAD,
-        0x00, 0x98, 0x80, 0xE9,
-        0x7D, 0x80, 0x07, 0xEA,
-        0x24, 0x1F, 0x20, 0xE9,
-        0x15, 0x41, 0x49, 0xBD,
-        0x1D, 0x41, 0x51, 0xBD,
-        0x2E, 0x41, 0x2A, 0xB8,
-        0x34, 0x53, 0xA0, 0xE8,
-        0x15, 0x30,
-        0x1D, 0x30,
-        0x58, 0xE3,
-        0x00, 0xE0,
-        0xB5, 0x40, 0x48, 0xBD,
-        0x3D, 0x40, 0x50, 0xBD,
-        0x24, 0x43, 0xA0, 0xE8,
-        0x2C, 0x4B, 0xA0, 0xE8,
-        0x15, 0x72,
-        0x09, 0xE3,
-        0x00, 0xE0,
-        0x1D, 0x72,
-        0x35, 0x30,
-        0xB5, 0x30,
-        0xBD, 0x30,
-        0x3D, 0x30,
-        0x9C, 0x97, 0x57, 0x9F,
-        0x00, 0x80, 0x00, 0xE8,
-        0x6C, 0x64, 0xC8, 0xEC,
-        0x98, 0xE1,
-        0xB5, 0x05,
-        0xBD, 0x05,
-        0x2E, 0x30,
-        0x32, 0xC0, 0xA0, 0xE8,
-        0x33, 0xC0, 0xA0, 0xE8,
-        0x74, 0x64, 0xC8, 0xEC,
-        0x40, 0x3C, 0x40, 0xAD,
-        0x32, 0x6A,
-        0x2A, 0x30,
-        0x20, 0x73,
-        0x33, 0x6A,
-        0x00, 0xE0,
-        0x28, 0x73,
-        0x1C, 0x72,
-        0x83, 0xE2,
-        0x6B, 0x80, 0x15, 0xEA,
-        0xB8, 0x3D, 0x28, 0xDF,
-        0x30, 0x35, 0x20, 0xDF,
-        0x40, 0x30,
-        0x00, 0xE0,
-        0xCC, 0xE2,
-        0x64, 0x72,
-        0x25, 0x42, 0x52, 0xBF,
-        0x2D, 0x42, 0x4A, 0xBF,
-        0x30, 0x2E, 0x30, 0xDF,
-        0x38, 0x2E, 0x38, 0xDF,
-        0x18, 0x1D, 0x45, 0xE9,
-        0x1E, 0x15, 0x45, 0xE9,
-        0x2B, 0x49, 0x51, 0xBD,
-        0x00, 0xE0,
-        0x1F, 0x73,
-        0x38, 0x38, 0x40, 0xAF,
-        0x30, 0x30, 0x40, 0xAF,
-        0x24, 0x1F, 0x24, 0xDF,
-        0x1D, 0x32, 0x20, 0xE9,
-        0x2C, 0x1F, 0x2C, 0xDF,
-        0x1A, 0x33, 0x20, 0xE9,
-        0xB0, 0x10,
-        0x08, 0xE3,
-        0x40, 0x10,
-        0xB8, 0x10,
-        0x26, 0xF0, 0x30, 0xCD,
-        0x2F, 0xF0, 0x38, 0xCD,
-        0x2B, 0x80, 0x20, 0xE9,
-        0x2A, 0x80, 0x20, 0xE9,
-        0xA6, 0x20,
-        0x88, 0xE2,
-        0x00, 0xE0,
-        0xAF, 0x20,
-        0x28, 0x2A, 0x26, 0xAF,
-        0x20, 0x2A, 0xC0, 0xAF,
-        0x34, 0x1F, 0x34, 0xDF,
-        0x46, 0x24, 0x46, 0xDF,
-        0x28, 0x30, 0x80, 0xBF,
-        0x20, 0x38, 0x80, 0xBF,
-        0x47, 0x24, 0x47, 0xDF,
-        0x4E, 0x2C, 0x4E, 0xDF,
-        0x4F, 0x2C, 0x4F, 0xDF,
-        0x56, 0x34, 0x56, 0xDF,
-        0x28, 0x15, 0x28, 0xDF,
-        0x20, 0x1D, 0x20, 0xDF,
-        0x57, 0x34, 0x57, 0xDF,
-        0x00, 0xE0,
-        0x1D, 0x05,
-        0x04, 0x80, 0x10, 0xEA,
-        0x89, 0xE2,
-        0x2B, 0x30,
-        0x3F, 0xC1, 0x1D, 0xBD,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0xA0, 0x68,
-        0xBF, 0x25,
-        0x00, 0x80, 0x00, 0xE8,
-        0x20, 0xC0, 0x20, 0xAF,
-        0x28, 0x05,
-        0x97, 0x74,
-        0x00, 0xE0,
-        0x2A, 0x10,
-        0x16, 0xC0, 0x20, 0xE9,
-        0x04, 0x80, 0x10, 0xEA,
-        0x8C, 0xE2,
-        0x95, 0x05,
-        0x28, 0xC1, 0x28, 0xAD,
-        0x1F, 0xC1, 0x15, 0xBD,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0xA8, 0x67,
-        0x9F, 0x6B,
-        0x00, 0x80, 0x00, 0xE8,
-        0x28, 0xC0, 0x28, 0xAD,
-        0x1D, 0x25,
-        0x20, 0x05,
-        0x28, 0x32, 0x80, 0xAD,
-        0x40, 0x2A, 0x40, 0xBD,
-        0x1C, 0x80, 0x20, 0xE9,
-        0x20, 0x33, 0x20, 0xAD,
-        0x20, 0x73,
-        0x00, 0xE0,
-        0xB6, 0x49, 0x51, 0xBB,
-        0x26, 0x2F, 0xB0, 0xE8,
-        0x19, 0x20, 0x20, 0xE9,
-        0x35, 0x20, 0x35, 0xDF,
-        0x3D, 0x20, 0x3D, 0xDF,
-        0x15, 0x20, 0x15, 0xDF,
-        0x1D, 0x20, 0x1D, 0xDF,
-        0x26, 0xD0, 0x26, 0xCD,
-        0x29, 0x49, 0x2A, 0xB8,
-        0x26, 0x40, 0x80, 0xBD,
-        0x3B, 0x48, 0x50, 0xBD,
-        0x3E, 0x54, 0x57, 0x9F,
-        0x00, 0xE0,
-        0x82, 0xE1,
-        0x1E, 0xAF, 0x59, 0x9F,
-        0x00, 0x80, 0x00, 0xE8,
-        0x26, 0x30,
-        0x29, 0x30,
-        0x48, 0x3C, 0x48, 0xAD,
-        0x2B, 0x72,
-        0xC2, 0xE1,
-        0x2C, 0xC0, 0x44, 0xC2,
-        0x05, 0x24, 0x34, 0xBF,
-        0x0D, 0x24, 0x2C, 0xBF,
-        0x2D, 0x46, 0x4E, 0xBF,
-        0x25, 0x46, 0x56, 0xBF,
-        0x20, 0x1D, 0x6F, 0x8F,
-        0x32, 0x3E, 0x5F, 0xE9,
-        0x3E, 0x50, 0x56, 0x9F,
-        0x00, 0xE0,
-        0x3B, 0x30,
-        0x1E, 0x8F, 0x51, 0x9F,
-        0x33, 0x1E, 0x5F, 0xE9,
-        0x05, 0x44, 0x54, 0xB2,
-        0x0D, 0x44, 0x4C, 0xB2,
-        0x19, 0xC0, 0xB0, 0xE8,
-        0x34, 0xC0, 0x44, 0xC4,
-        0x33, 0x73,
-        0x00, 0xE0,
-        0x3E, 0x62, 0x57, 0x9F,
-        0x1E, 0xAF, 0x59, 0x9F,
-        0x00, 0xE0,
-        0x0D, 0x20,
-        0x84, 0x3E, 0x58, 0xE9,
-        0x28, 0x1D, 0x6F, 0x8F,
-        0x05, 0x20,
-        0x00, 0xE0,
-        0x85, 0x1E, 0x58, 0xE9,
-        0x9B, 0x3B, 0x33, 0xDF,
-        0x20, 0x20, 0x42, 0xAF,
-        0x30, 0x42, 0x56, 0x9F,
-        0x80, 0x3E, 0x57, 0xE9,
-        0x3F, 0x8F, 0x51, 0x9F,
-        0x30, 0x80, 0x5F, 0xE9,
-        0x28, 0x28, 0x24, 0xAF,
-        0x81, 0x1E, 0x57, 0xE9,
-        0x05, 0x47, 0x57, 0xBF,
-        0x0D, 0x47, 0x4F, 0xBF,
-        0x88, 0x80, 0x58, 0xE9,
-        0x1B, 0x29, 0x1B, 0xDF,
-        0x30, 0x1D, 0x6F, 0x8F,
-        0x3A, 0x30, 0x4F, 0xE9,
-        0x1C, 0x30, 0x26, 0xDF,
-        0x09, 0xE3,
-        0x3B, 0x05,
-        0x3E, 0x50, 0x56, 0x9F,
-        0x3B, 0x3F, 0x4F, 0xE9,
-        0x1E, 0x8F, 0x51, 0x9F,
-        0x00, 0xE0,
-        0xAC, 0x20,
-        0x2D, 0x44, 0x4C, 0xB4,
-        0x2C, 0x1C, 0xC0, 0xAF,
-        0x25, 0x44, 0x54, 0xB4,
-        0x00, 0xE0,
-        0xC8, 0x30,
-        0x30, 0x46, 0x30, 0xAF,
-        0x1B, 0x1B, 0x48, 0xAF,
-        0x00, 0xE0,
-        0x25, 0x20,
-        0x38, 0x2C, 0x4F, 0xE9,
-        0x86, 0x80, 0x57, 0xE9,
-        0x38, 0x1D, 0x6F, 0x8F,
-        0x28, 0x74,
-        0x00, 0xE0,
-        0x0D, 0x44, 0x4C, 0xB0,
-        0x05, 0x44, 0x54, 0xB0,
-        0x2D, 0x20,
-        0x9B, 0x10,
-        0x82, 0x3E, 0x57, 0xE9,
-        0x32, 0xF0, 0x1B, 0xCD,
-        0x1E, 0xBD, 0x59, 0x9F,
-        0x83, 0x1E, 0x57, 0xE9,
-        0x38, 0x47, 0x38, 0xAF,
-        0x34, 0x20,
-        0x2A, 0x30,
-        0x00, 0xE0,
-        0x0D, 0x20,
-        0x32, 0x20,
-        0x05, 0x20,
-        0x87, 0x80, 0x57, 0xE9,
-        0x1F, 0x54, 0x57, 0x9F,
-        0x17, 0x42, 0x56, 0x9F,
-        0x00, 0xE0,
-        0x3B, 0x6A,
-        0x3F, 0x8F, 0x51, 0x9F,
-        0x37, 0x1E, 0x4F, 0xE9,
-        0x37, 0x32, 0x2A, 0xAF,
-        0x00, 0xE0,
-        0x32, 0x00,
-        0x00, 0x80, 0x00, 0xE8,
-        0x27, 0xC0, 0x44, 0xC0,
-        0x36, 0x1F, 0x4F, 0xE9,
-        0x1F, 0x1F, 0x26, 0xDF,
-        0x37, 0x1B, 0x37, 0xBF,
-        0x17, 0x26, 0x17, 0xDF,
-        0x3E, 0x17, 0x4F, 0xE9,
-        0x3F, 0x3F, 0x4F, 0xE9,
-        0x34, 0x1F, 0x34, 0xAF,
-        0x2B, 0x05,
-        0xA7, 0x20,
-        0x33, 0x2B, 0x37, 0xDF,
-        0x27, 0x17, 0xC0, 0xAF,
-        0x34, 0x80, 0x4F, 0xE9,
-        0x00, 0x80, 0x00, 0xE8,
-        0x2D, 0x44, 0x4C, 0xB6,
-        0x25, 0x44, 0x54, 0xB6,
-        0x03, 0x80, 0x2A, 0xEA,
-        0x17, 0xC1, 0x2B, 0xBD,
-        0x2D, 0x20,
-        0x25, 0x20,
-        0x07, 0xC0, 0x44, 0xC6,
-        0xB3, 0x68,
-        0x97, 0x25,
-        0x00, 0x80, 0x00, 0xE8,
-        0x33, 0xC0, 0x33, 0xAF,
-        0x3C, 0x27, 0x4F, 0xE9,
-        0x1F, 0x62, 0x57, 0x9F,
-        0x00, 0x80, 0x00, 0xE8,
-        0x3F, 0x3D, 0x5D, 0x9F,
-        0x00, 0xE0,
-        0x07, 0x20,
-        0x00, 0x80, 0x00, 0xE8,
-        0x28, 0x19, 0x60, 0xEC,
-        0xB3, 0x05,
-        0x00, 0xE0,
-        0x00, 0x80, 0x00, 0xE8,
-        0x23, 0x3B, 0x33, 0xAD,
-        0x00, 0x80, 0x00, 0xE8,
-        0x1F, 0x26, 0x1F, 0xDF,
-        0x9D, 0x1F, 0x4F, 0xE9,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x9E, 0x3F, 0x4F, 0xE9,
-        0x07, 0x07, 0x1F, 0xAF,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x9C, 0x80, 0x4F, 0xE9,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x57, 0x39, 0x20, 0xE9,
-        0x16, 0x28, 0x20, 0xE9,
-        0x1D, 0x3B, 0x20, 0xE9,
-        0x1E, 0x2B, 0x20, 0xE9,
-        0x2B, 0x32, 0x20, 0xE9,
-        0x1C, 0x23, 0x20, 0xE9,
-        0x57, 0x36, 0x20, 0xE9,
-        0x00, 0x80, 0xA0, 0xE9,
-        0x40, 0x40, 0xD8, 0xEC,
-        0xFF, 0x80, 0xC0, 0xE9,
-        0x90, 0xE2,
-        0x00, 0xE0,
-        0x7A, 0xFF, 0x20, 0xEA,
-        0x19, 0xC8, 0xC1, 0xCD,
-        0x1F, 0xD7, 0x18, 0xBD,
-        0x3F, 0xD7, 0x22, 0xBD,
-        0x9F, 0x41, 0x49, 0xBD,
-        0x00, 0x80, 0x00, 0xE8,
-        0x25, 0x41, 0x49, 0xBD,
-        0x2D, 0x41, 0x51, 0xBD,
-        0x0D, 0x80, 0x07, 0xEA,
-        0x00, 0x80, 0x00, 0xE8,
-        0x35, 0x40, 0x48, 0xBD,
-        0x3D, 0x40, 0x50, 0xBD,
-        0x00, 0x80, 0x00, 0xE8,
-        0x25, 0x30,
-        0x2D, 0x30,
-        0x35, 0x30,
-        0xB5, 0x30,
-        0xBD, 0x30,
-        0x3D, 0x30,
-        0x9C, 0xA7, 0x5B, 0x9F,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x79, 0xFF, 0x0A, 0xEA,
-        0x00, 0x80, 0x00, 0xE8,
-        0xC9, 0x41, 0xC8, 0xEC,
-        0x42, 0xE1,
-        0x00, 0xE0,
-        0x77, 0xFF, 0x20, 0xEA,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0xC8, 0x40, 0xC0, 0xEC,
-        0x00, 0x80, 0x00, 0xE8,
-        0x74, 0xFF, 0x20, 0xEA,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-};
-static unsigned char warp_g200_tgzaf[] = {
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x98, 0xA0, 0xE9,
-        0x40, 0x40, 0xD8, 0xEC,
-        0xFF, 0x80, 0xC0, 0xE9,
-        0x00, 0x80, 0x00, 0xE8,
-        0x1F, 0xD7, 0x18, 0xBD,
-        0x3F, 0xD7, 0x22, 0xBD,
-        0x81, 0x04,
-        0x89, 0x04,
-        0x01, 0x04,
-        0x09, 0x04,
-        0xC9, 0x41, 0xC0, 0xEC,
-        0x11, 0x04,
-        0x00, 0xE0,
-        0x41, 0xCC, 0x41, 0xCD,
-        0x49, 0xCC, 0x49, 0xCD,
-        0xD1, 0x41, 0xC0, 0xEC,
-        0x51, 0xCC, 0x51, 0xCD,
-        0x80, 0x04,
-        0x10, 0x04,
-        0x08, 0x04,
-        0x00, 0xE0,
-        0x00, 0xCC, 0xC0, 0xCD,
-        0xD1, 0x49, 0xC0, 0xEC,
-        0x8A, 0x1F, 0x20, 0xE9,
-        0x8B, 0x3F, 0x20, 0xE9,
-        0x41, 0x3C, 0x41, 0xAD,
-        0x49, 0x3C, 0x49, 0xAD,
-        0x10, 0xCC, 0x10, 0xCD,
-        0x08, 0xCC, 0x08, 0xCD,
-        0xB9, 0x41, 0x49, 0xBB,
-        0x1F, 0xF0, 0x41, 0xCD,
-        0x51, 0x3C, 0x51, 0xAD,
-        0x00, 0x98, 0x80, 0xE9,
-        0x83, 0x80, 0x07, 0xEA,
-        0x24, 0x1F, 0x20, 0xE9,
-        0x21, 0x45, 0x80, 0xE8,
-        0x1A, 0x4D, 0x80, 0xE8,
-        0x31, 0x55, 0x80, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x15, 0x41, 0x49, 0xBD,
-        0x1D, 0x41, 0x51, 0xBD,
-        0x2E, 0x41, 0x2A, 0xB8,
-        0x34, 0x53, 0xA0, 0xE8,
-        0x15, 0x30,
-        0x1D, 0x30,
-        0x58, 0xE3,
-        0x00, 0xE0,
-        0xB5, 0x40, 0x48, 0xBD,
-        0x3D, 0x40, 0x50, 0xBD,
-        0x24, 0x43, 0xA0, 0xE8,
-        0x2C, 0x4B, 0xA0, 0xE8,
-        0x15, 0x72,
-        0x09, 0xE3,
-        0x00, 0xE0,
-        0x1D, 0x72,
-        0x35, 0x30,
-        0xB5, 0x30,
-        0xBD, 0x30,
-        0x3D, 0x30,
-        0x9C, 0x97, 0x57, 0x9F,
-        0x00, 0x80, 0x00, 0xE8,
-        0x6C, 0x64, 0xC8, 0xEC,
-        0x98, 0xE1,
-        0xB5, 0x05,
-        0xBD, 0x05,
-        0x2E, 0x30,
-        0x32, 0xC0, 0xA0, 0xE8,
-        0x33, 0xC0, 0xA0, 0xE8,
-        0x74, 0x64, 0xC8, 0xEC,
-        0x40, 0x3C, 0x40, 0xAD,
-        0x32, 0x6A,
-        0x2A, 0x30,
-        0x20, 0x73,
-        0x33, 0x6A,
-        0x00, 0xE0,
-        0x28, 0x73,
-        0x1C, 0x72,
-        0x83, 0xE2,
-        0x6F, 0x80, 0x15, 0xEA,
-        0xB8, 0x3D, 0x28, 0xDF,
-        0x30, 0x35, 0x20, 0xDF,
-        0x40, 0x30,
-        0x00, 0xE0,
-        0xCC, 0xE2,
-        0x64, 0x72,
-        0x25, 0x42, 0x52, 0xBF,
-        0x2D, 0x42, 0x4A, 0xBF,
-        0x30, 0x2E, 0x30, 0xDF,
-        0x38, 0x2E, 0x38, 0xDF,
-        0x18, 0x1D, 0x45, 0xE9,
-        0x1E, 0x15, 0x45, 0xE9,
-        0x2B, 0x49, 0x51, 0xBD,
-        0x00, 0xE0,
-        0x1F, 0x73,
-        0x38, 0x38, 0x40, 0xAF,
-        0x30, 0x30, 0x40, 0xAF,
-        0x24, 0x1F, 0x24, 0xDF,
-        0x1D, 0x32, 0x20, 0xE9,
-        0x2C, 0x1F, 0x2C, 0xDF,
-        0x1A, 0x33, 0x20, 0xE9,
-        0xB0, 0x10,
-        0x08, 0xE3,
-        0x40, 0x10,
-        0xB8, 0x10,
-        0x26, 0xF0, 0x30, 0xCD,
-        0x2F, 0xF0, 0x38, 0xCD,
-        0x2B, 0x80, 0x20, 0xE9,
-        0x2A, 0x80, 0x20, 0xE9,
-        0xA6, 0x20,
-        0x88, 0xE2,
-        0x00, 0xE0,
-        0xAF, 0x20,
-        0x28, 0x2A, 0x26, 0xAF,
-        0x20, 0x2A, 0xC0, 0xAF,
-        0x34, 0x1F, 0x34, 0xDF,
-        0x46, 0x24, 0x46, 0xDF,
-        0x28, 0x30, 0x80, 0xBF,
-        0x20, 0x38, 0x80, 0xBF,
-        0x47, 0x24, 0x47, 0xDF,
-        0x4E, 0x2C, 0x4E, 0xDF,
-        0x4F, 0x2C, 0x4F, 0xDF,
-        0x56, 0x34, 0x56, 0xDF,
-        0x28, 0x15, 0x28, 0xDF,
-        0x20, 0x1D, 0x20, 0xDF,
-        0x57, 0x34, 0x57, 0xDF,
-        0x00, 0xE0,
-        0x1D, 0x05,
-        0x04, 0x80, 0x10, 0xEA,
-        0x89, 0xE2,
-        0x2B, 0x30,
-        0x3F, 0xC1, 0x1D, 0xBD,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0xA0, 0x68,
-        0xBF, 0x25,
-        0x00, 0x80, 0x00, 0xE8,
-        0x20, 0xC0, 0x20, 0xAF,
-        0x28, 0x05,
-        0x97, 0x74,
-        0x00, 0xE0,
-        0x2A, 0x10,
-        0x16, 0xC0, 0x20, 0xE9,
-        0x04, 0x80, 0x10, 0xEA,
-        0x8C, 0xE2,
-        0x95, 0x05,
-        0x28, 0xC1, 0x28, 0xAD,
-        0x1F, 0xC1, 0x15, 0xBD,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0xA8, 0x67,
-        0x9F, 0x6B,
-        0x00, 0x80, 0x00, 0xE8,
-        0x28, 0xC0, 0x28, 0xAD,
-        0x1D, 0x25,
-        0x20, 0x05,
-        0x28, 0x32, 0x80, 0xAD,
-        0x40, 0x2A, 0x40, 0xBD,
-        0x1C, 0x80, 0x20, 0xE9,
-        0x20, 0x33, 0x20, 0xAD,
-        0x20, 0x73,
-        0x00, 0xE0,
-        0xB6, 0x49, 0x51, 0xBB,
-        0x26, 0x2F, 0xB0, 0xE8,
-        0x19, 0x20, 0x20, 0xE9,
-        0x35, 0x20, 0x35, 0xDF,
-        0x3D, 0x20, 0x3D, 0xDF,
-        0x15, 0x20, 0x15, 0xDF,
-        0x1D, 0x20, 0x1D, 0xDF,
-        0x26, 0xD0, 0x26, 0xCD,
-        0x29, 0x49, 0x2A, 0xB8,
-        0x26, 0x40, 0x80, 0xBD,
-        0x3B, 0x48, 0x50, 0xBD,
-        0x3E, 0x54, 0x57, 0x9F,
-        0x00, 0xE0,
-        0x82, 0xE1,
-        0x1E, 0xAF, 0x59, 0x9F,
-        0x00, 0x80, 0x00, 0xE8,
-        0x26, 0x30,
-        0x29, 0x30,
-        0x48, 0x3C, 0x48, 0xAD,
-        0x2B, 0x72,
-        0xC2, 0xE1,
-        0x2C, 0xC0, 0x44, 0xC2,
-        0x05, 0x24, 0x34, 0xBF,
-        0x0D, 0x24, 0x2C, 0xBF,
-        0x2D, 0x46, 0x4E, 0xBF,
-        0x25, 0x46, 0x56, 0xBF,
-        0x20, 0x1D, 0x6F, 0x8F,
-        0x32, 0x3E, 0x5F, 0xE9,
-        0x3E, 0x50, 0x56, 0x9F,
-        0x00, 0xE0,
-        0x3B, 0x30,
-        0x1E, 0x8F, 0x51, 0x9F,
-        0x33, 0x1E, 0x5F, 0xE9,
-        0x05, 0x44, 0x54, 0xB2,
-        0x0D, 0x44, 0x4C, 0xB2,
-        0x19, 0xC0, 0xB0, 0xE8,
-        0x34, 0xC0, 0x44, 0xC4,
-        0x33, 0x73,
-        0x00, 0xE0,
-        0x3E, 0x62, 0x57, 0x9F,
-        0x1E, 0xAF, 0x59, 0x9F,
-        0x00, 0xE0,
-        0x0D, 0x20,
-        0x84, 0x3E, 0x58, 0xE9,
-        0x28, 0x1D, 0x6F, 0x8F,
-        0x05, 0x20,
-        0x00, 0xE0,
-        0x85, 0x1E, 0x58, 0xE9,
-        0x9B, 0x3B, 0x33, 0xDF,
-        0x20, 0x20, 0x42, 0xAF,
-        0x30, 0x42, 0x56, 0x9F,
-        0x80, 0x3E, 0x57, 0xE9,
-        0x3F, 0x8F, 0x51, 0x9F,
-        0x30, 0x80, 0x5F, 0xE9,
-        0x28, 0x28, 0x24, 0xAF,
-        0x81, 0x1E, 0x57, 0xE9,
-        0x05, 0x47, 0x57, 0xBF,
-        0x0D, 0x47, 0x4F, 0xBF,
-        0x88, 0x80, 0x58, 0xE9,
-        0x1B, 0x29, 0x1B, 0xDF,
-        0x30, 0x1D, 0x6F, 0x8F,
-        0x3A, 0x30, 0x4F, 0xE9,
-        0x1C, 0x30, 0x26, 0xDF,
-        0x09, 0xE3,
-        0x3B, 0x05,
-        0x3E, 0x50, 0x56, 0x9F,
-        0x3B, 0x3F, 0x4F, 0xE9,
-        0x1E, 0x8F, 0x51, 0x9F,
-        0x00, 0xE0,
-        0xAC, 0x20,
-        0x2D, 0x44, 0x4C, 0xB4,
-        0x2C, 0x1C, 0xC0, 0xAF,
-        0x25, 0x44, 0x54, 0xB4,
-        0x00, 0xE0,
-        0xC8, 0x30,
-        0x30, 0x46, 0x30, 0xAF,
-        0x1B, 0x1B, 0x48, 0xAF,
-        0x00, 0xE0,
-        0x25, 0x20,
-        0x38, 0x2C, 0x4F, 0xE9,
-        0x86, 0x80, 0x57, 0xE9,
-        0x38, 0x1D, 0x6F, 0x8F,
-        0x28, 0x74,
-        0x00, 0xE0,
-        0x0D, 0x44, 0x4C, 0xB0,
-        0x05, 0x44, 0x54, 0xB0,
-        0x2D, 0x20,
-        0x9B, 0x10,
-        0x82, 0x3E, 0x57, 0xE9,
-        0x32, 0xF0, 0x1B, 0xCD,
-        0x1E, 0xBD, 0x59, 0x9F,
-        0x83, 0x1E, 0x57, 0xE9,
-        0x38, 0x47, 0x38, 0xAF,
-        0x34, 0x20,
-        0x2A, 0x30,
-        0x00, 0xE0,
-        0x0D, 0x20,
-        0x32, 0x20,
-        0x05, 0x20,
-        0x87, 0x80, 0x57, 0xE9,
-        0x1F, 0x54, 0x57, 0x9F,
-        0x17, 0x42, 0x56, 0x9F,
-        0x00, 0xE0,
-        0x3B, 0x6A,
-        0x3F, 0x8F, 0x51, 0x9F,
-        0x37, 0x1E, 0x4F, 0xE9,
-        0x37, 0x32, 0x2A, 0xAF,
-        0x00, 0xE0,
-        0x32, 0x00,
-        0x00, 0x80, 0x00, 0xE8,
-        0x27, 0xC0, 0x44, 0xC0,
-        0x36, 0x1F, 0x4F, 0xE9,
-        0x1F, 0x1F, 0x26, 0xDF,
-        0x37, 0x1B, 0x37, 0xBF,
-        0x17, 0x26, 0x17, 0xDF,
-        0x3E, 0x17, 0x4F, 0xE9,
-        0x3F, 0x3F, 0x4F, 0xE9,
-        0x34, 0x1F, 0x34, 0xAF,
-        0x2B, 0x05,
-        0xA7, 0x20,
-        0x33, 0x2B, 0x37, 0xDF,
-        0x27, 0x17, 0xC0, 0xAF,
-        0x34, 0x80, 0x4F, 0xE9,
-        0x00, 0x80, 0x00, 0xE8,
-        0x0D, 0x21, 0x1A, 0xB6,
-        0x05, 0x21, 0x31, 0xB6,
-        0x2D, 0x44, 0x4C, 0xB6,
-        0x25, 0x44, 0x54, 0xB6,
-        0x03, 0x80, 0x2A, 0xEA,
-        0x17, 0xC1, 0x2B, 0xBD,
-        0x0D, 0x20,
-        0x05, 0x20,
-        0x2F, 0xC0, 0x21, 0xC6,
-        0xB3, 0x68,
-        0x97, 0x25,
-        0x00, 0x80, 0x00, 0xE8,
-        0x33, 0xC0, 0x33, 0xAF,
-        0x3C, 0x27, 0x4F, 0xE9,
-        0x00, 0xE0,
-        0x25, 0x20,
-        0x07, 0xC0, 0x44, 0xC6,
-        0x17, 0x50, 0x56, 0x9F,
-        0x00, 0xE0,
-        0x2D, 0x20,
-        0x37, 0x0F, 0x5C, 0x9F,
-        0x00, 0xE0,
-        0x2F, 0x20,
-        0x1F, 0x62, 0x57, 0x9F,
-        0x00, 0xE0,
-        0x07, 0x20,
-        0x3F, 0x3D, 0x5D, 0x9F,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x28, 0x19, 0x60, 0xEC,
-        0xB3, 0x05,
-        0x00, 0xE0,
-        0x17, 0x26, 0x17, 0xDF,
-        0x23, 0x3B, 0x33, 0xAD,
-        0x35, 0x17, 0x4F, 0xE9,
-        0x1F, 0x26, 0x1F, 0xDF,
-        0x9D, 0x1F, 0x4F, 0xE9,
-        0x9E, 0x3F, 0x4F, 0xE9,
-        0x39, 0x37, 0x4F, 0xE9,
-        0x2F, 0x2F, 0x17, 0xAF,
-        0x00, 0x80, 0x00, 0xE8,
-        0x07, 0x07, 0x1F, 0xAF,
-        0x00, 0x80, 0x00, 0xE8,
-        0x31, 0x80, 0x4F, 0xE9,
-        0x00, 0x80, 0x00, 0xE8,
-        0x9C, 0x80, 0x4F, 0xE9,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x57, 0x39, 0x20, 0xE9,
-        0x16, 0x28, 0x20, 0xE9,
-        0x1D, 0x3B, 0x20, 0xE9,
-        0x1E, 0x2B, 0x20, 0xE9,
-        0x2B, 0x32, 0x20, 0xE9,
-        0x1C, 0x23, 0x20, 0xE9,
-        0x57, 0x36, 0x20, 0xE9,
-        0x00, 0x80, 0xA0, 0xE9,
-        0x40, 0x40, 0xD8, 0xEC,
-        0xFF, 0x80, 0xC0, 0xE9,
-        0x90, 0xE2,
-        0x00, 0xE0,
-        0x74, 0xFF, 0x20, 0xEA,
-        0x19, 0xC8, 0xC1, 0xCD,
-        0x1F, 0xD7, 0x18, 0xBD,
-        0x3F, 0xD7, 0x22, 0xBD,
-        0x9F, 0x41, 0x49, 0xBD,
-        0x00, 0x80, 0x00, 0xE8,
-        0x25, 0x41, 0x49, 0xBD,
-        0x2D, 0x41, 0x51, 0xBD,
-        0x0D, 0x80, 0x07, 0xEA,
-        0x00, 0x80, 0x00, 0xE8,
-        0x35, 0x40, 0x48, 0xBD,
-        0x3D, 0x40, 0x50, 0xBD,
-        0x00, 0x80, 0x00, 0xE8,
-        0x25, 0x30,
-        0x2D, 0x30,
-        0x35, 0x30,
-        0xB5, 0x30,
-        0xBD, 0x30,
-        0x3D, 0x30,
-        0x9C, 0xA7, 0x5B, 0x9F,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x73, 0xFF, 0x0A, 0xEA,
-        0x00, 0x80, 0x00, 0xE8,
-        0xC9, 0x41, 0xC8, 0xEC,
-        0x42, 0xE1,
-        0x00, 0xE0,
-        0x71, 0xFF, 0x20, 0xEA,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0xC8, 0x40, 0xC0, 0xEC,
-        0x00, 0x80, 0x00, 0xE8,
-        0x6E, 0xFF, 0x20, 0xEA,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-};
-static unsigned char warp_g200_tgzf[] = {
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x98, 0xA0, 0xE9,
-        0x40, 0x40, 0xD8, 0xEC,
-        0xFF, 0x80, 0xC0, 0xE9,
-        0x00, 0x80, 0x00, 0xE8,
-        0x1F, 0xD7, 0x18, 0xBD,
-        0x3F, 0xD7, 0x22, 0xBD,
-        0x81, 0x04,
-        0x89, 0x04,
-        0x01, 0x04,
-        0x09, 0x04,
-        0xC9, 0x41, 0xC0, 0xEC,
-        0x11, 0x04,
-        0x00, 0xE0,
-        0x41, 0xCC, 0x41, 0xCD,
-        0x49, 0xCC, 0x49, 0xCD,
-        0xD1, 0x41, 0xC0, 0xEC,
-        0x51, 0xCC, 0x51, 0xCD,
-        0x80, 0x04,
-        0x10, 0x04,
-        0x08, 0x04,
-        0x00, 0xE0,
-        0x00, 0xCC, 0xC0, 0xCD,
-        0xD1, 0x49, 0xC0, 0xEC,
-        0x8A, 0x1F, 0x20, 0xE9,
-        0x8B, 0x3F, 0x20, 0xE9,
-        0x41, 0x3C, 0x41, 0xAD,
-        0x49, 0x3C, 0x49, 0xAD,
-        0x10, 0xCC, 0x10, 0xCD,
-        0x08, 0xCC, 0x08, 0xCD,
-        0xB9, 0x41, 0x49, 0xBB,
-        0x1F, 0xF0, 0x41, 0xCD,
-        0x51, 0x3C, 0x51, 0xAD,
-        0x00, 0x98, 0x80, 0xE9,
-        0x7F, 0x80, 0x07, 0xEA,
-        0x24, 0x1F, 0x20, 0xE9,
-        0x21, 0x45, 0x80, 0xE8,
-        0x1A, 0x4D, 0x80, 0xE8,
-        0x31, 0x55, 0x80, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x15, 0x41, 0x49, 0xBD,
-        0x1D, 0x41, 0x51, 0xBD,
-        0x2E, 0x41, 0x2A, 0xB8,
-        0x34, 0x53, 0xA0, 0xE8,
-        0x15, 0x30,
-        0x1D, 0x30,
-        0x58, 0xE3,
-        0x00, 0xE0,
-        0xB5, 0x40, 0x48, 0xBD,
-        0x3D, 0x40, 0x50, 0xBD,
-        0x24, 0x43, 0xA0, 0xE8,
-        0x2C, 0x4B, 0xA0, 0xE8,
-        0x15, 0x72,
-        0x09, 0xE3,
-        0x00, 0xE0,
-        0x1D, 0x72,
-        0x35, 0x30,
-        0xB5, 0x30,
-        0xBD, 0x30,
-        0x3D, 0x30,
-        0x9C, 0x97, 0x57, 0x9F,
-        0x00, 0x80, 0x00, 0xE8,
-        0x6C, 0x64, 0xC8, 0xEC,
-        0x98, 0xE1,
-        0xB5, 0x05,
-        0xBD, 0x05,
-        0x2E, 0x30,
-        0x32, 0xC0, 0xA0, 0xE8,
-        0x33, 0xC0, 0xA0, 0xE8,
-        0x74, 0x64, 0xC8, 0xEC,
-        0x40, 0x3C, 0x40, 0xAD,
-        0x32, 0x6A,
-        0x2A, 0x30,
-        0x20, 0x73,
-        0x33, 0x6A,
-        0x00, 0xE0,
-        0x28, 0x73,
-        0x1C, 0x72,
-        0x83, 0xE2,
-        0x6B, 0x80, 0x15, 0xEA,
-        0xB8, 0x3D, 0x28, 0xDF,
-        0x30, 0x35, 0x20, 0xDF,
-        0x40, 0x30,
-        0x00, 0xE0,
-        0xCC, 0xE2,
-        0x64, 0x72,
-        0x25, 0x42, 0x52, 0xBF,
-        0x2D, 0x42, 0x4A, 0xBF,
-        0x30, 0x2E, 0x30, 0xDF,
-        0x38, 0x2E, 0x38, 0xDF,
-        0x18, 0x1D, 0x45, 0xE9,
-        0x1E, 0x15, 0x45, 0xE9,
-        0x2B, 0x49, 0x51, 0xBD,
-        0x00, 0xE0,
-        0x1F, 0x73,
-        0x38, 0x38, 0x40, 0xAF,
-        0x30, 0x30, 0x40, 0xAF,
-        0x24, 0x1F, 0x24, 0xDF,
-        0x1D, 0x32, 0x20, 0xE9,
-        0x2C, 0x1F, 0x2C, 0xDF,
-        0x1A, 0x33, 0x20, 0xE9,
-        0xB0, 0x10,
-        0x08, 0xE3,
-        0x40, 0x10,
-        0xB8, 0x10,
-        0x26, 0xF0, 0x30, 0xCD,
-        0x2F, 0xF0, 0x38, 0xCD,
-        0x2B, 0x80, 0x20, 0xE9,
-        0x2A, 0x80, 0x20, 0xE9,
-        0xA6, 0x20,
-        0x88, 0xE2,
-        0x00, 0xE0,
-        0xAF, 0x20,
-        0x28, 0x2A, 0x26, 0xAF,
-        0x20, 0x2A, 0xC0, 0xAF,
-        0x34, 0x1F, 0x34, 0xDF,
-        0x46, 0x24, 0x46, 0xDF,
-        0x28, 0x30, 0x80, 0xBF,
-        0x20, 0x38, 0x80, 0xBF,
-        0x47, 0x24, 0x47, 0xDF,
-        0x4E, 0x2C, 0x4E, 0xDF,
-        0x4F, 0x2C, 0x4F, 0xDF,
-        0x56, 0x34, 0x56, 0xDF,
-        0x28, 0x15, 0x28, 0xDF,
-        0x20, 0x1D, 0x20, 0xDF,
-        0x57, 0x34, 0x57, 0xDF,
-        0x00, 0xE0,
-        0x1D, 0x05,
-        0x04, 0x80, 0x10, 0xEA,
-        0x89, 0xE2,
-        0x2B, 0x30,
-        0x3F, 0xC1, 0x1D, 0xBD,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0xA0, 0x68,
-        0xBF, 0x25,
-        0x00, 0x80, 0x00, 0xE8,
-        0x20, 0xC0, 0x20, 0xAF,
-        0x28, 0x05,
-        0x97, 0x74,
-        0x00, 0xE0,
-        0x2A, 0x10,
-        0x16, 0xC0, 0x20, 0xE9,
-        0x04, 0x80, 0x10, 0xEA,
-        0x8C, 0xE2,
-        0x95, 0x05,
-        0x28, 0xC1, 0x28, 0xAD,
-        0x1F, 0xC1, 0x15, 0xBD,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0xA8, 0x67,
-        0x9F, 0x6B,
-        0x00, 0x80, 0x00, 0xE8,
-        0x28, 0xC0, 0x28, 0xAD,
-        0x1D, 0x25,
-        0x20, 0x05,
-        0x28, 0x32, 0x80, 0xAD,
-        0x40, 0x2A, 0x40, 0xBD,
-        0x1C, 0x80, 0x20, 0xE9,
-        0x20, 0x33, 0x20, 0xAD,
-        0x20, 0x73,
-        0x00, 0xE0,
-        0xB6, 0x49, 0x51, 0xBB,
-        0x26, 0x2F, 0xB0, 0xE8,
-        0x19, 0x20, 0x20, 0xE9,
-        0x35, 0x20, 0x35, 0xDF,
-        0x3D, 0x20, 0x3D, 0xDF,
-        0x15, 0x20, 0x15, 0xDF,
-        0x1D, 0x20, 0x1D, 0xDF,
-        0x26, 0xD0, 0x26, 0xCD,
-        0x29, 0x49, 0x2A, 0xB8,
-        0x26, 0x40, 0x80, 0xBD,
-        0x3B, 0x48, 0x50, 0xBD,
-        0x3E, 0x54, 0x57, 0x9F,
-        0x00, 0xE0,
-        0x82, 0xE1,
-        0x1E, 0xAF, 0x59, 0x9F,
-        0x00, 0x80, 0x00, 0xE8,
-        0x26, 0x30,
-        0x29, 0x30,
-        0x48, 0x3C, 0x48, 0xAD,
-        0x2B, 0x72,
-        0xC2, 0xE1,
-        0x2C, 0xC0, 0x44, 0xC2,
-        0x05, 0x24, 0x34, 0xBF,
-        0x0D, 0x24, 0x2C, 0xBF,
-        0x2D, 0x46, 0x4E, 0xBF,
-        0x25, 0x46, 0x56, 0xBF,
-        0x20, 0x1D, 0x6F, 0x8F,
-        0x32, 0x3E, 0x5F, 0xE9,
-        0x3E, 0x50, 0x56, 0x9F,
-        0x00, 0xE0,
-        0x3B, 0x30,
-        0x1E, 0x8F, 0x51, 0x9F,
-        0x33, 0x1E, 0x5F, 0xE9,
-        0x05, 0x44, 0x54, 0xB2,
-        0x0D, 0x44, 0x4C, 0xB2,
-        0x19, 0xC0, 0xB0, 0xE8,
-        0x34, 0xC0, 0x44, 0xC4,
-        0x33, 0x73,
-        0x00, 0xE0,
-        0x3E, 0x62, 0x57, 0x9F,
-        0x1E, 0xAF, 0x59, 0x9F,
-        0x00, 0xE0,
-        0x0D, 0x20,
-        0x84, 0x3E, 0x58, 0xE9,
-        0x28, 0x1D, 0x6F, 0x8F,
-        0x05, 0x20,
-        0x00, 0xE0,
-        0x85, 0x1E, 0x58, 0xE9,
-        0x9B, 0x3B, 0x33, 0xDF,
-        0x20, 0x20, 0x42, 0xAF,
-        0x30, 0x42, 0x56, 0x9F,
-        0x80, 0x3E, 0x57, 0xE9,
-        0x3F, 0x8F, 0x51, 0x9F,
-        0x30, 0x80, 0x5F, 0xE9,
-        0x28, 0x28, 0x24, 0xAF,
-        0x81, 0x1E, 0x57, 0xE9,
-        0x05, 0x47, 0x57, 0xBF,
-        0x0D, 0x47, 0x4F, 0xBF,
-        0x88, 0x80, 0x58, 0xE9,
-        0x1B, 0x29, 0x1B, 0xDF,
-        0x30, 0x1D, 0x6F, 0x8F,
-        0x3A, 0x30, 0x4F, 0xE9,
-        0x1C, 0x30, 0x26, 0xDF,
-        0x09, 0xE3,
-        0x3B, 0x05,
-        0x3E, 0x50, 0x56, 0x9F,
-        0x3B, 0x3F, 0x4F, 0xE9,
-        0x1E, 0x8F, 0x51, 0x9F,
-        0x00, 0xE0,
-        0xAC, 0x20,
-        0x2D, 0x44, 0x4C, 0xB4,
-        0x2C, 0x1C, 0xC0, 0xAF,
-        0x25, 0x44, 0x54, 0xB4,
-        0x00, 0xE0,
-        0xC8, 0x30,
-        0x30, 0x46, 0x30, 0xAF,
-        0x1B, 0x1B, 0x48, 0xAF,
-        0x00, 0xE0,
-        0x25, 0x20,
-        0x38, 0x2C, 0x4F, 0xE9,
-        0x86, 0x80, 0x57, 0xE9,
-        0x38, 0x1D, 0x6F, 0x8F,
-        0x28, 0x74,
-        0x00, 0xE0,
-        0x0D, 0x44, 0x4C, 0xB0,
-        0x05, 0x44, 0x54, 0xB0,
-        0x2D, 0x20,
-        0x9B, 0x10,
-        0x82, 0x3E, 0x57, 0xE9,
-        0x32, 0xF0, 0x1B, 0xCD,
-        0x1E, 0xBD, 0x59, 0x9F,
-        0x83, 0x1E, 0x57, 0xE9,
-        0x38, 0x47, 0x38, 0xAF,
-        0x34, 0x20,
-        0x2A, 0x30,
-        0x00, 0xE0,
-        0x0D, 0x20,
-        0x32, 0x20,
-        0x05, 0x20,
-        0x87, 0x80, 0x57, 0xE9,
-        0x1F, 0x54, 0x57, 0x9F,
-        0x17, 0x42, 0x56, 0x9F,
-        0x00, 0xE0,
-        0x3B, 0x6A,
-        0x3F, 0x8F, 0x51, 0x9F,
-        0x37, 0x1E, 0x4F, 0xE9,
-        0x37, 0x32, 0x2A, 0xAF,
-        0x00, 0xE0,
-        0x32, 0x00,
-        0x00, 0x80, 0x00, 0xE8,
-        0x27, 0xC0, 0x44, 0xC0,
-        0x36, 0x1F, 0x4F, 0xE9,
-        0x1F, 0x1F, 0x26, 0xDF,
-        0x37, 0x1B, 0x37, 0xBF,
-        0x17, 0x26, 0x17, 0xDF,
-        0x3E, 0x17, 0x4F, 0xE9,
-        0x3F, 0x3F, 0x4F, 0xE9,
-        0x34, 0x1F, 0x34, 0xAF,
-        0x2B, 0x05,
-        0xA7, 0x20,
-        0x33, 0x2B, 0x37, 0xDF,
-        0x27, 0x17, 0xC0, 0xAF,
-        0x34, 0x80, 0x4F, 0xE9,
-        0x00, 0x80, 0x00, 0xE8,
-        0x0D, 0x21, 0x1A, 0xB6,
-        0x05, 0x21, 0x31, 0xB6,
-        0x03, 0x80, 0x2A, 0xEA,
-        0x17, 0xC1, 0x2B, 0xBD,
-        0x0D, 0x20,
-        0x05, 0x20,
-        0x2F, 0xC0, 0x21, 0xC6,
-        0xB3, 0x68,
-        0x97, 0x25,
-        0x00, 0x80, 0x00, 0xE8,
-        0x33, 0xC0, 0x33, 0xAF,
-        0x3C, 0x27, 0x4F, 0xE9,
-        0x17, 0x50, 0x56, 0x9F,
-        0x00, 0x80, 0x00, 0xE8,
-        0x37, 0x0F, 0x5C, 0x9F,
-        0x00, 0xE0,
-        0x2F, 0x20,
-        0x00, 0x80, 0x00, 0xE8,
-        0x28, 0x19, 0x60, 0xEC,
-        0xB3, 0x05,
-        0x00, 0xE0,
-        0x00, 0x80, 0x00, 0xE8,
-        0x23, 0x3B, 0x33, 0xAD,
-        0x00, 0x80, 0x00, 0xE8,
-        0x17, 0x26, 0x17, 0xDF,
-        0x35, 0x17, 0x4F, 0xE9,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x39, 0x37, 0x4F, 0xE9,
-        0x2F, 0x2F, 0x17, 0xAF,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x31, 0x80, 0x4F, 0xE9,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x57, 0x39, 0x20, 0xE9,
-        0x16, 0x28, 0x20, 0xE9,
-        0x1D, 0x3B, 0x20, 0xE9,
-        0x1E, 0x2B, 0x20, 0xE9,
-        0x2B, 0x32, 0x20, 0xE9,
-        0x1C, 0x23, 0x20, 0xE9,
-        0x57, 0x36, 0x20, 0xE9,
-        0x00, 0x80, 0xA0, 0xE9,
-        0x40, 0x40, 0xD8, 0xEC,
-        0xFF, 0x80, 0xC0, 0xE9,
-        0x90, 0xE2,
-        0x00, 0xE0,
-        0x78, 0xFF, 0x20, 0xEA,
-        0x19, 0xC8, 0xC1, 0xCD,
-        0x1F, 0xD7, 0x18, 0xBD,
-        0x3F, 0xD7, 0x22, 0xBD,
-        0x9F, 0x41, 0x49, 0xBD,
-        0x00, 0x80, 0x00, 0xE8,
-        0x25, 0x41, 0x49, 0xBD,
-        0x2D, 0x41, 0x51, 0xBD,
-        0x0D, 0x80, 0x07, 0xEA,
-        0x00, 0x80, 0x00, 0xE8,
-        0x35, 0x40, 0x48, 0xBD,
-        0x3D, 0x40, 0x50, 0xBD,
-        0x00, 0x80, 0x00, 0xE8,
-        0x25, 0x30,
-        0x2D, 0x30,
-        0x35, 0x30,
-        0xB5, 0x30,
-        0xBD, 0x30,
-        0x3D, 0x30,
-        0x9C, 0xA7, 0x5B, 0x9F,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x77, 0xFF, 0x0A, 0xEA,
-        0x00, 0x80, 0x00, 0xE8,
-        0xC9, 0x41, 0xC8, 0xEC,
-        0x42, 0xE1,
-        0x00, 0xE0,
-        0x75, 0xFF, 0x20, 0xEA,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0xC8, 0x40, 0xC0, 0xEC,
-        0x00, 0x80, 0x00, 0xE8,
-        0x72, 0xFF, 0x20, 0xEA,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-};
-static unsigned char warp_g200_tgzs[] = {
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x98, 0xA0, 0xE9,
-        0x40, 0x40, 0xD8, 0xEC,
-        0xFF, 0x80, 0xC0, 0xE9,
-        0x00, 0x80, 0x00, 0xE8,
-        0x1F, 0xD7, 0x18, 0xBD,
-        0x3F, 0xD7, 0x22, 0xBD,
-        0x81, 0x04,
-        0x89, 0x04,
-        0x01, 0x04,
-        0x09, 0x04,
-        0xC9, 0x41, 0xC0, 0xEC,
-        0x11, 0x04,
-        0x00, 0xE0,
-        0x41, 0xCC, 0x41, 0xCD,
-        0x49, 0xCC, 0x49, 0xCD,
-        0xD1, 0x41, 0xC0, 0xEC,
-        0x51, 0xCC, 0x51, 0xCD,
-        0x80, 0x04,
-        0x10, 0x04,
-        0x08, 0x04,
-        0x00, 0xE0,
-        0x00, 0xCC, 0xC0, 0xCD,
-        0xD1, 0x49, 0xC0, 0xEC,
-        0x8A, 0x1F, 0x20, 0xE9,
-        0x8B, 0x3F, 0x20, 0xE9,
-        0x41, 0x3C, 0x41, 0xAD,
-        0x49, 0x3C, 0x49, 0xAD,
-        0x10, 0xCC, 0x10, 0xCD,
-        0x08, 0xCC, 0x08, 0xCD,
-        0xB9, 0x41, 0x49, 0xBB,
-        0x1F, 0xF0, 0x41, 0xCD,
-        0x51, 0x3C, 0x51, 0xAD,
-        0x00, 0x98, 0x80, 0xE9,
-        0x8B, 0x80, 0x07, 0xEA,
-        0x24, 0x1F, 0x20, 0xE9,
-        0x21, 0x45, 0x80, 0xE8,
-        0x1A, 0x4D, 0x80, 0xE8,
-        0x31, 0x55, 0x80, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x15, 0x41, 0x49, 0xBD,
-        0x1D, 0x41, 0x51, 0xBD,
-        0x2E, 0x41, 0x2A, 0xB8,
-        0x34, 0x53, 0xA0, 0xE8,
-        0x15, 0x30,
-        0x1D, 0x30,
-        0x58, 0xE3,
-        0x00, 0xE0,
-        0xB5, 0x40, 0x48, 0xBD,
-        0x3D, 0x40, 0x50, 0xBD,
-        0x24, 0x43, 0xA0, 0xE8,
-        0x2C, 0x4B, 0xA0, 0xE8,
-        0x15, 0x72,
-        0x09, 0xE3,
-        0x00, 0xE0,
-        0x1D, 0x72,
-        0x35, 0x30,
-        0xB5, 0x30,
-        0xBD, 0x30,
-        0x3D, 0x30,
-        0x9C, 0x97, 0x57, 0x9F,
-        0x00, 0x80, 0x00, 0xE8,
-        0x6C, 0x64, 0xC8, 0xEC,
-        0x98, 0xE1,
-        0xB5, 0x05,
-        0xBD, 0x05,
-        0x2E, 0x30,
-        0x32, 0xC0, 0xA0, 0xE8,
-        0x33, 0xC0, 0xA0, 0xE8,
-        0x74, 0x64, 0xC8, 0xEC,
-        0x40, 0x3C, 0x40, 0xAD,
-        0x32, 0x6A,
-        0x2A, 0x30,
-        0x20, 0x73,
-        0x33, 0x6A,
-        0x00, 0xE0,
-        0x28, 0x73,
-        0x1C, 0x72,
-        0x83, 0xE2,
-        0x77, 0x80, 0x15, 0xEA,
-        0xB8, 0x3D, 0x28, 0xDF,
-        0x30, 0x35, 0x20, 0xDF,
-        0x40, 0x30,
-        0x00, 0xE0,
-        0xCC, 0xE2,
-        0x64, 0x72,
-        0x25, 0x42, 0x52, 0xBF,
-        0x2D, 0x42, 0x4A, 0xBF,
-        0x30, 0x2E, 0x30, 0xDF,
-        0x38, 0x2E, 0x38, 0xDF,
-        0x18, 0x1D, 0x45, 0xE9,
-        0x1E, 0x15, 0x45, 0xE9,
-        0x2B, 0x49, 0x51, 0xBD,
-        0x00, 0xE0,
-        0x1F, 0x73,
-        0x38, 0x38, 0x40, 0xAF,
-        0x30, 0x30, 0x40, 0xAF,
-        0x24, 0x1F, 0x24, 0xDF,
-        0x1D, 0x32, 0x20, 0xE9,
-        0x2C, 0x1F, 0x2C, 0xDF,
-        0x1A, 0x33, 0x20, 0xE9,
-        0xB0, 0x10,
-        0x08, 0xE3,
-        0x40, 0x10,
-        0xB8, 0x10,
-        0x26, 0xF0, 0x30, 0xCD,
-        0x2F, 0xF0, 0x38, 0xCD,
-        0x2B, 0x80, 0x20, 0xE9,
-        0x2A, 0x80, 0x20, 0xE9,
-        0xA6, 0x20,
-        0x88, 0xE2,
-        0x00, 0xE0,
-        0xAF, 0x20,
-        0x28, 0x2A, 0x26, 0xAF,
-        0x20, 0x2A, 0xC0, 0xAF,
-        0x34, 0x1F, 0x34, 0xDF,
-        0x46, 0x24, 0x46, 0xDF,
-        0x28, 0x30, 0x80, 0xBF,
-        0x20, 0x38, 0x80, 0xBF,
-        0x47, 0x24, 0x47, 0xDF,
-        0x4E, 0x2C, 0x4E, 0xDF,
-        0x4F, 0x2C, 0x4F, 0xDF,
-        0x56, 0x34, 0x56, 0xDF,
-        0x28, 0x15, 0x28, 0xDF,
-        0x20, 0x1D, 0x20, 0xDF,
-        0x57, 0x34, 0x57, 0xDF,
-        0x00, 0xE0,
-        0x1D, 0x05,
-        0x04, 0x80, 0x10, 0xEA,
-        0x89, 0xE2,
-        0x2B, 0x30,
-        0x3F, 0xC1, 0x1D, 0xBD,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0xA0, 0x68,
-        0xBF, 0x25,
-        0x00, 0x80, 0x00, 0xE8,
-        0x20, 0xC0, 0x20, 0xAF,
-        0x28, 0x05,
-        0x97, 0x74,
-        0x00, 0xE0,
-        0x2A, 0x10,
-        0x16, 0xC0, 0x20, 0xE9,
-        0x04, 0x80, 0x10, 0xEA,
-        0x8C, 0xE2,
-        0x95, 0x05,
-        0x28, 0xC1, 0x28, 0xAD,
-        0x1F, 0xC1, 0x15, 0xBD,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0xA8, 0x67,
-        0x9F, 0x6B,
-        0x00, 0x80, 0x00, 0xE8,
-        0x28, 0xC0, 0x28, 0xAD,
-        0x1D, 0x25,
-        0x20, 0x05,
-        0x28, 0x32, 0x80, 0xAD,
-        0x40, 0x2A, 0x40, 0xBD,
-        0x1C, 0x80, 0x20, 0xE9,
-        0x20, 0x33, 0x20, 0xAD,
-        0x20, 0x73,
-        0x00, 0xE0,
-        0xB6, 0x49, 0x51, 0xBB,
-        0x26, 0x2F, 0xB0, 0xE8,
-        0x19, 0x20, 0x20, 0xE9,
-        0x35, 0x20, 0x35, 0xDF,
-        0x3D, 0x20, 0x3D, 0xDF,
-        0x15, 0x20, 0x15, 0xDF,
-        0x1D, 0x20, 0x1D, 0xDF,
-        0x26, 0xD0, 0x26, 0xCD,
-        0x29, 0x49, 0x2A, 0xB8,
-        0x26, 0x40, 0x80, 0xBD,
-        0x3B, 0x48, 0x50, 0xBD,
-        0x3E, 0x54, 0x57, 0x9F,
-        0x00, 0xE0,
-        0x82, 0xE1,
-        0x1E, 0xAF, 0x59, 0x9F,
-        0x00, 0x80, 0x00, 0xE8,
-        0x26, 0x30,
-        0x29, 0x30,
-        0x48, 0x3C, 0x48, 0xAD,
-        0x2B, 0x72,
-        0xC2, 0xE1,
-        0x2C, 0xC0, 0x44, 0xC2,
-        0x05, 0x24, 0x34, 0xBF,
-        0x0D, 0x24, 0x2C, 0xBF,
-        0x2D, 0x46, 0x4E, 0xBF,
-        0x25, 0x46, 0x56, 0xBF,
-        0x20, 0x1D, 0x6F, 0x8F,
-        0x32, 0x3E, 0x5F, 0xE9,
-        0x3E, 0x50, 0x56, 0x9F,
-        0x00, 0xE0,
-        0x3B, 0x30,
-        0x1E, 0x8F, 0x51, 0x9F,
-        0x33, 0x1E, 0x5F, 0xE9,
-        0x05, 0x44, 0x54, 0xB2,
-        0x0D, 0x44, 0x4C, 0xB2,
-        0x19, 0xC0, 0xB0, 0xE8,
-        0x34, 0xC0, 0x44, 0xC4,
-        0x33, 0x73,
-        0x00, 0xE0,
-        0x3E, 0x62, 0x57, 0x9F,
-        0x1E, 0xAF, 0x59, 0x9F,
-        0x00, 0xE0,
-        0x0D, 0x20,
-        0x84, 0x3E, 0x58, 0xE9,
-        0x28, 0x1D, 0x6F, 0x8F,
-        0x05, 0x20,
-        0x00, 0xE0,
-        0x85, 0x1E, 0x58, 0xE9,
-        0x9B, 0x3B, 0x33, 0xDF,
-        0x20, 0x20, 0x42, 0xAF,
-        0x30, 0x42, 0x56, 0x9F,
-        0x80, 0x3E, 0x57, 0xE9,
-        0x3F, 0x8F, 0x51, 0x9F,
-        0x30, 0x80, 0x5F, 0xE9,
-        0x28, 0x28, 0x24, 0xAF,
-        0x81, 0x1E, 0x57, 0xE9,
-        0x05, 0x47, 0x57, 0xBF,
-        0x0D, 0x47, 0x4F, 0xBF,
-        0x88, 0x80, 0x58, 0xE9,
-        0x1B, 0x29, 0x1B, 0xDF,
-        0x30, 0x1D, 0x6F, 0x8F,
-        0x3A, 0x30, 0x4F, 0xE9,
-        0x1C, 0x30, 0x26, 0xDF,
-        0x09, 0xE3,
-        0x3B, 0x05,
-        0x3E, 0x50, 0x56, 0x9F,
-        0x3B, 0x3F, 0x4F, 0xE9,
-        0x1E, 0x8F, 0x51, 0x9F,
-        0x00, 0xE0,
-        0xAC, 0x20,
-        0x2D, 0x44, 0x4C, 0xB4,
-        0x2C, 0x1C, 0xC0, 0xAF,
-        0x25, 0x44, 0x54, 0xB4,
-        0x00, 0xE0,
-        0xC8, 0x30,
-        0x30, 0x46, 0x30, 0xAF,
-        0x1B, 0x1B, 0x48, 0xAF,
-        0x00, 0xE0,
-        0x25, 0x20,
-        0x38, 0x2C, 0x4F, 0xE9,
-        0x86, 0x80, 0x57, 0xE9,
-        0x38, 0x1D, 0x6F, 0x8F,
-        0x28, 0x74,
-        0x00, 0xE0,
-        0x0D, 0x44, 0x4C, 0xB0,
-        0x05, 0x44, 0x54, 0xB0,
-        0x2D, 0x20,
-        0x9B, 0x10,
-        0x82, 0x3E, 0x57, 0xE9,
-        0x32, 0xF0, 0x1B, 0xCD,
-        0x1E, 0xBD, 0x59, 0x9F,
-        0x83, 0x1E, 0x57, 0xE9,
-        0x38, 0x47, 0x38, 0xAF,
-        0x34, 0x20,
-        0x2A, 0x30,
-        0x00, 0xE0,
-        0x0D, 0x20,
-        0x32, 0x20,
-        0x05, 0x20,
-        0x87, 0x80, 0x57, 0xE9,
-        0x1F, 0x54, 0x57, 0x9F,
-        0x17, 0x42, 0x56, 0x9F,
-        0x00, 0xE0,
-        0x3B, 0x6A,
-        0x3F, 0x8F, 0x51, 0x9F,
-        0x37, 0x1E, 0x4F, 0xE9,
-        0x37, 0x32, 0x2A, 0xAF,
-        0x00, 0xE0,
-        0x32, 0x00,
-        0x00, 0x80, 0x00, 0xE8,
-        0x27, 0xC0, 0x44, 0xC0,
-        0x36, 0x1F, 0x4F, 0xE9,
-        0x1F, 0x1F, 0x26, 0xDF,
-        0x37, 0x1B, 0x37, 0xBF,
-        0x17, 0x26, 0x17, 0xDF,
-        0x3E, 0x17, 0x4F, 0xE9,
-        0x3F, 0x3F, 0x4F, 0xE9,
-        0x34, 0x1F, 0x34, 0xAF,
-        0x2B, 0x05,
-        0xA7, 0x20,
-        0x33, 0x2B, 0x37, 0xDF,
-        0x27, 0x17, 0xC0, 0xAF,
-        0x34, 0x80, 0x4F, 0xE9,
-        0x00, 0x80, 0x00, 0xE8,
-        0x2D, 0x21, 0x1A, 0xB0,
-        0x25, 0x21, 0x31, 0xB0,
-        0x0D, 0x21, 0x1A, 0xB2,
-        0x05, 0x21, 0x31, 0xB2,
-        0x03, 0x80, 0x2A, 0xEA,
-        0x17, 0xC1, 0x2B, 0xBD,
-        0x2D, 0x20,
-        0x25, 0x20,
-        0x05, 0x20,
-        0x0D, 0x20,
-        0xB3, 0x68,
-        0x97, 0x25,
-        0x00, 0x80, 0x00, 0xE8,
-        0x33, 0xC0, 0x33, 0xAF,
-        0x2F, 0xC0, 0x21, 0xC0,
-        0x16, 0x42, 0x56, 0x9F,
-        0x3C, 0x27, 0x4F, 0xE9,
-        0x1E, 0x62, 0x57, 0x9F,
-        0x00, 0x80, 0x00, 0xE8,
-        0x25, 0x21, 0x31, 0xB4,
-        0x2D, 0x21, 0x1A, 0xB4,
-        0x3F, 0x2F, 0x5D, 0x9F,
-        0x00, 0x80, 0x00, 0xE8,
-        0x33, 0x05,
-        0x00, 0xE0,
-        0x28, 0x19, 0x60, 0xEC,
-        0x37, 0x0F, 0x5C, 0x9F,
-        0x00, 0xE0,
-        0x2F, 0x20,
-        0x23, 0x3B, 0x33, 0xAD,
-        0x1E, 0x26, 0x1E, 0xDF,
-        0xA7, 0x1E, 0x4F, 0xE9,
-        0x17, 0x26, 0x16, 0xDF,
-        0x2D, 0x20,
-        0x00, 0xE0,
-        0xA8, 0x3F, 0x4F, 0xE9,
-        0x2F, 0x2F, 0x1E, 0xAF,
-        0x25, 0x20,
-        0x00, 0xE0,
-        0xA4, 0x16, 0x4F, 0xE9,
-        0x0F, 0xC0, 0x21, 0xC2,
-        0xA6, 0x80, 0x4F, 0xE9,
-        0x1F, 0x62, 0x57, 0x9F,
-        0x3F, 0x2F, 0x5D, 0x9F,
-        0x00, 0xE0,
-        0x8F, 0x20,
-        0xA5, 0x37, 0x4F, 0xE9,
-        0x0F, 0x17, 0x0F, 0xAF,
-        0x06, 0xC0, 0x21, 0xC4,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0xA3, 0x80, 0x4F, 0xE9,
-        0x06, 0x20,
-        0x00, 0xE0,
-        0x1F, 0x26, 0x1F, 0xDF,
-        0xA1, 0x1F, 0x4F, 0xE9,
-        0xA2, 0x3F, 0x4F, 0xE9,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x06, 0x06, 0x1F, 0xAF,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0xA0, 0x80, 0x4F, 0xE9,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x57, 0x39, 0x20, 0xE9,
-        0x16, 0x28, 0x20, 0xE9,
-        0x1D, 0x3B, 0x20, 0xE9,
-        0x1E, 0x2B, 0x20, 0xE9,
-        0x2B, 0x32, 0x20, 0xE9,
-        0x1C, 0x23, 0x20, 0xE9,
-        0x57, 0x36, 0x20, 0xE9,
-        0x00, 0x80, 0xA0, 0xE9,
-        0x40, 0x40, 0xD8, 0xEC,
-        0xFF, 0x80, 0xC0, 0xE9,
-        0x90, 0xE2,
-        0x00, 0xE0,
-        0x6C, 0xFF, 0x20, 0xEA,
-        0x19, 0xC8, 0xC1, 0xCD,
-        0x1F, 0xD7, 0x18, 0xBD,
-        0x3F, 0xD7, 0x22, 0xBD,
-        0x9F, 0x41, 0x49, 0xBD,
-        0x00, 0x80, 0x00, 0xE8,
-        0x25, 0x41, 0x49, 0xBD,
-        0x2D, 0x41, 0x51, 0xBD,
-        0x0D, 0x80, 0x07, 0xEA,
-        0x00, 0x80, 0x00, 0xE8,
-        0x35, 0x40, 0x48, 0xBD,
-        0x3D, 0x40, 0x50, 0xBD,
-        0x00, 0x80, 0x00, 0xE8,
-        0x25, 0x30,
-        0x2D, 0x30,
-        0x35, 0x30,
-        0xB5, 0x30,
-        0xBD, 0x30,
-        0x3D, 0x30,
-        0x9C, 0xA7, 0x5B, 0x9F,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x6B, 0xFF, 0x0A, 0xEA,
-        0x00, 0x80, 0x00, 0xE8,
-        0xC9, 0x41, 0xC8, 0xEC,
-        0x42, 0xE1,
-        0x00, 0xE0,
-        0x69, 0xFF, 0x20, 0xEA,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0xC8, 0x40, 0xC0, 0xEC,
-        0x00, 0x80, 0x00, 0xE8,
-        0x66, 0xFF, 0x20, 0xEA,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-};
-static unsigned char warp_g200_tgzsa[] = {
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x98, 0xA0, 0xE9,
-        0x40, 0x40, 0xD8, 0xEC,
-        0xFF, 0x80, 0xC0, 0xE9,
-        0x00, 0x80, 0x00, 0xE8,
-        0x1F, 0xD7, 0x18, 0xBD,
-        0x3F, 0xD7, 0x22, 0xBD,
-        0x81, 0x04,
-        0x89, 0x04,
-        0x01, 0x04,
-        0x09, 0x04,
-        0xC9, 0x41, 0xC0, 0xEC,
-        0x11, 0x04,
-        0x00, 0xE0,
-        0x41, 0xCC, 0x41, 0xCD,
-        0x49, 0xCC, 0x49, 0xCD,
-        0xD1, 0x41, 0xC0, 0xEC,
-        0x51, 0xCC, 0x51, 0xCD,
-        0x80, 0x04,
-        0x10, 0x04,
-        0x08, 0x04,
-        0x00, 0xE0,
-        0x00, 0xCC, 0xC0, 0xCD,
-        0xD1, 0x49, 0xC0, 0xEC,
-        0x8A, 0x1F, 0x20, 0xE9,
-        0x8B, 0x3F, 0x20, 0xE9,
-        0x41, 0x3C, 0x41, 0xAD,
-        0x49, 0x3C, 0x49, 0xAD,
-        0x10, 0xCC, 0x10, 0xCD,
-        0x08, 0xCC, 0x08, 0xCD,
-        0xB9, 0x41, 0x49, 0xBB,
-        0x1F, 0xF0, 0x41, 0xCD,
-        0x51, 0x3C, 0x51, 0xAD,
-        0x00, 0x98, 0x80, 0xE9,
-        0x8F, 0x80, 0x07, 0xEA,
-        0x24, 0x1F, 0x20, 0xE9,
-        0x21, 0x45, 0x80, 0xE8,
-        0x1A, 0x4D, 0x80, 0xE8,
-        0x31, 0x55, 0x80, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x15, 0x41, 0x49, 0xBD,
-        0x1D, 0x41, 0x51, 0xBD,
-        0x2E, 0x41, 0x2A, 0xB8,
-        0x34, 0x53, 0xA0, 0xE8,
-        0x15, 0x30,
-        0x1D, 0x30,
-        0x58, 0xE3,
-        0x00, 0xE0,
-        0xB5, 0x40, 0x48, 0xBD,
-        0x3D, 0x40, 0x50, 0xBD,
-        0x24, 0x43, 0xA0, 0xE8,
-        0x2C, 0x4B, 0xA0, 0xE8,
-        0x15, 0x72,
-        0x09, 0xE3,
-        0x00, 0xE0,
-        0x1D, 0x72,
-        0x35, 0x30,
-        0xB5, 0x30,
-        0xBD, 0x30,
-        0x3D, 0x30,
-        0x9C, 0x97, 0x57, 0x9F,
-        0x00, 0x80, 0x00, 0xE8,
-        0x6C, 0x64, 0xC8, 0xEC,
-        0x98, 0xE1,
-        0xB5, 0x05,
-        0xBD, 0x05,
-        0x2E, 0x30,
-        0x32, 0xC0, 0xA0, 0xE8,
-        0x33, 0xC0, 0xA0, 0xE8,
-        0x74, 0x64, 0xC8, 0xEC,
-        0x40, 0x3C, 0x40, 0xAD,
-        0x32, 0x6A,
-        0x2A, 0x30,
-        0x20, 0x73,
-        0x33, 0x6A,
-        0x00, 0xE0,
-        0x28, 0x73,
-        0x1C, 0x72,
-        0x83, 0xE2,
-        0x7B, 0x80, 0x15, 0xEA,
-        0xB8, 0x3D, 0x28, 0xDF,
-        0x30, 0x35, 0x20, 0xDF,
-        0x40, 0x30,
-        0x00, 0xE0,
-        0xCC, 0xE2,
-        0x64, 0x72,
-        0x25, 0x42, 0x52, 0xBF,
-        0x2D, 0x42, 0x4A, 0xBF,
-        0x30, 0x2E, 0x30, 0xDF,
-        0x38, 0x2E, 0x38, 0xDF,
-        0x18, 0x1D, 0x45, 0xE9,
-        0x1E, 0x15, 0x45, 0xE9,
-        0x2B, 0x49, 0x51, 0xBD,
-        0x00, 0xE0,
-        0x1F, 0x73,
-        0x38, 0x38, 0x40, 0xAF,
-        0x30, 0x30, 0x40, 0xAF,
-        0x24, 0x1F, 0x24, 0xDF,
-        0x1D, 0x32, 0x20, 0xE9,
-        0x2C, 0x1F, 0x2C, 0xDF,
-        0x1A, 0x33, 0x20, 0xE9,
-        0xB0, 0x10,
-        0x08, 0xE3,
-        0x40, 0x10,
-        0xB8, 0x10,
-        0x26, 0xF0, 0x30, 0xCD,
-        0x2F, 0xF0, 0x38, 0xCD,
-        0x2B, 0x80, 0x20, 0xE9,
-        0x2A, 0x80, 0x20, 0xE9,
-        0xA6, 0x20,
-        0x88, 0xE2,
-        0x00, 0xE0,
-        0xAF, 0x20,
-        0x28, 0x2A, 0x26, 0xAF,
-        0x20, 0x2A, 0xC0, 0xAF,
-        0x34, 0x1F, 0x34, 0xDF,
-        0x46, 0x24, 0x46, 0xDF,
-        0x28, 0x30, 0x80, 0xBF,
-        0x20, 0x38, 0x80, 0xBF,
-        0x47, 0x24, 0x47, 0xDF,
-        0x4E, 0x2C, 0x4E, 0xDF,
-        0x4F, 0x2C, 0x4F, 0xDF,
-        0x56, 0x34, 0x56, 0xDF,
-        0x28, 0x15, 0x28, 0xDF,
-        0x20, 0x1D, 0x20, 0xDF,
-        0x57, 0x34, 0x57, 0xDF,
-        0x00, 0xE0,
-        0x1D, 0x05,
-        0x04, 0x80, 0x10, 0xEA,
-        0x89, 0xE2,
-        0x2B, 0x30,
-        0x3F, 0xC1, 0x1D, 0xBD,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0xA0, 0x68,
-        0xBF, 0x25,
-        0x00, 0x80, 0x00, 0xE8,
-        0x20, 0xC0, 0x20, 0xAF,
-        0x28, 0x05,
-        0x97, 0x74,
-        0x00, 0xE0,
-        0x2A, 0x10,
-        0x16, 0xC0, 0x20, 0xE9,
-        0x04, 0x80, 0x10, 0xEA,
-        0x8C, 0xE2,
-        0x95, 0x05,
-        0x28, 0xC1, 0x28, 0xAD,
-        0x1F, 0xC1, 0x15, 0xBD,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0xA8, 0x67,
-        0x9F, 0x6B,
-        0x00, 0x80, 0x00, 0xE8,
-        0x28, 0xC0, 0x28, 0xAD,
-        0x1D, 0x25,
-        0x20, 0x05,
-        0x28, 0x32, 0x80, 0xAD,
-        0x40, 0x2A, 0x40, 0xBD,
-        0x1C, 0x80, 0x20, 0xE9,
-        0x20, 0x33, 0x20, 0xAD,
-        0x20, 0x73,
-        0x00, 0xE0,
-        0xB6, 0x49, 0x51, 0xBB,
-        0x26, 0x2F, 0xB0, 0xE8,
-        0x19, 0x20, 0x20, 0xE9,
-        0x35, 0x20, 0x35, 0xDF,
-        0x3D, 0x20, 0x3D, 0xDF,
-        0x15, 0x20, 0x15, 0xDF,
-        0x1D, 0x20, 0x1D, 0xDF,
-        0x26, 0xD0, 0x26, 0xCD,
-        0x29, 0x49, 0x2A, 0xB8,
-        0x26, 0x40, 0x80, 0xBD,
-        0x3B, 0x48, 0x50, 0xBD,
-        0x3E, 0x54, 0x57, 0x9F,
-        0x00, 0xE0,
-        0x82, 0xE1,
-        0x1E, 0xAF, 0x59, 0x9F,
-        0x00, 0x80, 0x00, 0xE8,
-        0x26, 0x30,
-        0x29, 0x30,
-        0x48, 0x3C, 0x48, 0xAD,
-        0x2B, 0x72,
-        0xC2, 0xE1,
-        0x2C, 0xC0, 0x44, 0xC2,
-        0x05, 0x24, 0x34, 0xBF,
-        0x0D, 0x24, 0x2C, 0xBF,
-        0x2D, 0x46, 0x4E, 0xBF,
-        0x25, 0x46, 0x56, 0xBF,
-        0x20, 0x1D, 0x6F, 0x8F,
-        0x32, 0x3E, 0x5F, 0xE9,
-        0x3E, 0x50, 0x56, 0x9F,
-        0x00, 0xE0,
-        0x3B, 0x30,
-        0x1E, 0x8F, 0x51, 0x9F,
-        0x33, 0x1E, 0x5F, 0xE9,
-        0x05, 0x44, 0x54, 0xB2,
-        0x0D, 0x44, 0x4C, 0xB2,
-        0x19, 0xC0, 0xB0, 0xE8,
-        0x34, 0xC0, 0x44, 0xC4,
-        0x33, 0x73,
-        0x00, 0xE0,
-        0x3E, 0x62, 0x57, 0x9F,
-        0x1E, 0xAF, 0x59, 0x9F,
-        0x00, 0xE0,
-        0x0D, 0x20,
-        0x84, 0x3E, 0x58, 0xE9,
-        0x28, 0x1D, 0x6F, 0x8F,
-        0x05, 0x20,
-        0x00, 0xE0,
-        0x85, 0x1E, 0x58, 0xE9,
-        0x9B, 0x3B, 0x33, 0xDF,
-        0x20, 0x20, 0x42, 0xAF,
-        0x30, 0x42, 0x56, 0x9F,
-        0x80, 0x3E, 0x57, 0xE9,
-        0x3F, 0x8F, 0x51, 0x9F,
-        0x30, 0x80, 0x5F, 0xE9,
-        0x28, 0x28, 0x24, 0xAF,
-        0x81, 0x1E, 0x57, 0xE9,
-        0x05, 0x47, 0x57, 0xBF,
-        0x0D, 0x47, 0x4F, 0xBF,
-        0x88, 0x80, 0x58, 0xE9,
-        0x1B, 0x29, 0x1B, 0xDF,
-        0x30, 0x1D, 0x6F, 0x8F,
-        0x3A, 0x30, 0x4F, 0xE9,
-        0x1C, 0x30, 0x26, 0xDF,
-        0x09, 0xE3,
-        0x3B, 0x05,
-        0x3E, 0x50, 0x56, 0x9F,
-        0x3B, 0x3F, 0x4F, 0xE9,
-        0x1E, 0x8F, 0x51, 0x9F,
-        0x00, 0xE0,
-        0xAC, 0x20,
-        0x2D, 0x44, 0x4C, 0xB4,
-        0x2C, 0x1C, 0xC0, 0xAF,
-        0x25, 0x44, 0x54, 0xB4,
-        0x00, 0xE0,
-        0xC8, 0x30,
-        0x30, 0x46, 0x30, 0xAF,
-        0x1B, 0x1B, 0x48, 0xAF,
-        0x00, 0xE0,
-        0x25, 0x20,
-        0x38, 0x2C, 0x4F, 0xE9,
-        0x86, 0x80, 0x57, 0xE9,
-        0x38, 0x1D, 0x6F, 0x8F,
-        0x28, 0x74,
-        0x00, 0xE0,
-        0x0D, 0x44, 0x4C, 0xB0,
-        0x05, 0x44, 0x54, 0xB0,
-        0x2D, 0x20,
-        0x9B, 0x10,
-        0x82, 0x3E, 0x57, 0xE9,
-        0x32, 0xF0, 0x1B, 0xCD,
-        0x1E, 0xBD, 0x59, 0x9F,
-        0x83, 0x1E, 0x57, 0xE9,
-        0x38, 0x47, 0x38, 0xAF,
-        0x34, 0x20,
-        0x2A, 0x30,
-        0x00, 0xE0,
-        0x0D, 0x20,
-        0x32, 0x20,
-        0x05, 0x20,
-        0x87, 0x80, 0x57, 0xE9,
-        0x1F, 0x54, 0x57, 0x9F,
-        0x17, 0x42, 0x56, 0x9F,
-        0x00, 0xE0,
-        0x3B, 0x6A,
-        0x3F, 0x8F, 0x51, 0x9F,
-        0x37, 0x1E, 0x4F, 0xE9,
-        0x37, 0x32, 0x2A, 0xAF,
-        0x00, 0xE0,
-        0x32, 0x00,
-        0x00, 0x80, 0x00, 0xE8,
-        0x27, 0xC0, 0x44, 0xC0,
-        0x36, 0x1F, 0x4F, 0xE9,
-        0x1F, 0x1F, 0x26, 0xDF,
-        0x37, 0x1B, 0x37, 0xBF,
-        0x17, 0x26, 0x17, 0xDF,
-        0x3E, 0x17, 0x4F, 0xE9,
-        0x3F, 0x3F, 0x4F, 0xE9,
-        0x34, 0x1F, 0x34, 0xAF,
-        0x2B, 0x05,
-        0xA7, 0x20,
-        0x33, 0x2B, 0x37, 0xDF,
-        0x27, 0x17, 0xC0, 0xAF,
-        0x34, 0x80, 0x4F, 0xE9,
-        0x00, 0x80, 0x00, 0xE8,
-        0x2D, 0x21, 0x1A, 0xB0,
-        0x25, 0x21, 0x31, 0xB0,
-        0x0D, 0x21, 0x1A, 0xB2,
-        0x05, 0x21, 0x31, 0xB2,
-        0x03, 0x80, 0x2A, 0xEA,
-        0x17, 0xC1, 0x2B, 0xBD,
-        0x2D, 0x20,
-        0x25, 0x20,
-        0x05, 0x20,
-        0x0D, 0x20,
-        0xB3, 0x68,
-        0x97, 0x25,
-        0x00, 0x80, 0x00, 0xE8,
-        0x33, 0xC0, 0x33, 0xAF,
-        0x2F, 0xC0, 0x21, 0xC0,
-        0x16, 0x42, 0x56, 0x9F,
-        0x3C, 0x27, 0x4F, 0xE9,
-        0x1E, 0x62, 0x57, 0x9F,
-        0x00, 0x80, 0x00, 0xE8,
-        0x25, 0x21, 0x31, 0xB4,
-        0x2D, 0x21, 0x1A, 0xB4,
-        0x3F, 0x2F, 0x5D, 0x9F,
-        0x00, 0x80, 0x00, 0xE8,
-        0x33, 0x05,
-        0x00, 0xE0,
-        0x28, 0x19, 0x60, 0xEC,
-        0x0D, 0x44, 0x4C, 0xB6,
-        0x05, 0x44, 0x54, 0xB6,
-        0x37, 0x0F, 0x5C, 0x9F,
-        0x00, 0xE0,
-        0x2F, 0x20,
-        0x23, 0x3B, 0x33, 0xAD,
-        0x1E, 0x26, 0x1E, 0xDF,
-        0xA7, 0x1E, 0x4F, 0xE9,
-        0x17, 0x26, 0x16, 0xDF,
-        0x2D, 0x20,
-        0x00, 0xE0,
-        0xA8, 0x3F, 0x4F, 0xE9,
-        0x2F, 0x2F, 0x1E, 0xAF,
-        0x25, 0x20,
-        0x00, 0xE0,
-        0xA4, 0x16, 0x4F, 0xE9,
-        0x0F, 0xC0, 0x21, 0xC2,
-        0xA6, 0x80, 0x4F, 0xE9,
-        0x1F, 0x62, 0x57, 0x9F,
-        0x0D, 0x20,
-        0x05, 0x20,
-        0x00, 0x80, 0x00, 0xE8,
-        0x3F, 0x2F, 0x5D, 0x9F,
-        0x00, 0xE0,
-        0x0F, 0x20,
-        0x17, 0x50, 0x56, 0x9F,
-        0xA5, 0x37, 0x4F, 0xE9,
-        0x06, 0xC0, 0x21, 0xC4,
-        0x0F, 0x17, 0x0F, 0xAF,
-        0x37, 0x0F, 0x5C, 0x9F,
-        0x00, 0x80, 0x00, 0xE8,
-        0x2F, 0xC0, 0x44, 0xC6,
-        0xA3, 0x80, 0x4F, 0xE9,
-        0x06, 0x20,
-        0x00, 0xE0,
-        0x1F, 0x26, 0x1F, 0xDF,
-        0x17, 0x26, 0x17, 0xDF,
-        0x9D, 0x17, 0x4F, 0xE9,
-        0xA1, 0x1F, 0x4F, 0xE9,
-        0xA2, 0x3F, 0x4F, 0xE9,
-        0x06, 0x06, 0x1F, 0xAF,
-        0x00, 0xE0,
-        0xAF, 0x20,
-        0x9E, 0x37, 0x4F, 0xE9,
-        0x2F, 0x17, 0x2F, 0xAF,
-        0xA0, 0x80, 0x4F, 0xE9,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x9C, 0x80, 0x4F, 0xE9,
-        0x00, 0x80, 0x00, 0xE8,
-        0x57, 0x39, 0x20, 0xE9,
-        0x16, 0x28, 0x20, 0xE9,
-        0x1D, 0x3B, 0x20, 0xE9,
-        0x1E, 0x2B, 0x20, 0xE9,
-        0x2B, 0x32, 0x20, 0xE9,
-        0x1C, 0x23, 0x20, 0xE9,
-        0x57, 0x36, 0x20, 0xE9,
-        0x00, 0x80, 0xA0, 0xE9,
-        0x40, 0x40, 0xD8, 0xEC,
-        0xFF, 0x80, 0xC0, 0xE9,
-        0x90, 0xE2,
-        0x00, 0xE0,
-        0x68, 0xFF, 0x20, 0xEA,
-        0x19, 0xC8, 0xC1, 0xCD,
-        0x1F, 0xD7, 0x18, 0xBD,
-        0x3F, 0xD7, 0x22, 0xBD,
-        0x9F, 0x41, 0x49, 0xBD,
-        0x00, 0x80, 0x00, 0xE8,
-        0x25, 0x41, 0x49, 0xBD,
-        0x2D, 0x41, 0x51, 0xBD,
-        0x0D, 0x80, 0x07, 0xEA,
-        0x00, 0x80, 0x00, 0xE8,
-        0x35, 0x40, 0x48, 0xBD,
-        0x3D, 0x40, 0x50, 0xBD,
-        0x00, 0x80, 0x00, 0xE8,
-        0x25, 0x30,
-        0x2D, 0x30,
-        0x35, 0x30,
-        0xB5, 0x30,
-        0xBD, 0x30,
-        0x3D, 0x30,
-        0x9C, 0xA7, 0x5B, 0x9F,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x67, 0xFF, 0x0A, 0xEA,
-        0x00, 0x80, 0x00, 0xE8,
-        0xC9, 0x41, 0xC8, 0xEC,
-        0x42, 0xE1,
-        0x00, 0xE0,
-        0x65, 0xFF, 0x20, 0xEA,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0xC8, 0x40, 0xC0, 0xEC,
-        0x00, 0x80, 0x00, 0xE8,
-        0x62, 0xFF, 0x20, 0xEA,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-};
-static unsigned char warp_g200_tgzsaf[] = {
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x98, 0xA0, 0xE9,
-        0x40, 0x40, 0xD8, 0xEC,
-        0xFF, 0x80, 0xC0, 0xE9,
-        0x00, 0x80, 0x00, 0xE8,
-        0x1F, 0xD7, 0x18, 0xBD,
-        0x3F, 0xD7, 0x22, 0xBD,
-        0x81, 0x04,
-        0x89, 0x04,
-        0x01, 0x04,
-        0x09, 0x04,
-        0xC9, 0x41, 0xC0, 0xEC,
-        0x11, 0x04,
-        0x00, 0xE0,
-        0x41, 0xCC, 0x41, 0xCD,
-        0x49, 0xCC, 0x49, 0xCD,
-        0xD1, 0x41, 0xC0, 0xEC,
-        0x51, 0xCC, 0x51, 0xCD,
-        0x80, 0x04,
-        0x10, 0x04,
-        0x08, 0x04,
-        0x00, 0xE0,
-        0x00, 0xCC, 0xC0, 0xCD,
-        0xD1, 0x49, 0xC0, 0xEC,
-        0x8A, 0x1F, 0x20, 0xE9,
-        0x8B, 0x3F, 0x20, 0xE9,
-        0x41, 0x3C, 0x41, 0xAD,
-        0x49, 0x3C, 0x49, 0xAD,
-        0x10, 0xCC, 0x10, 0xCD,
-        0x08, 0xCC, 0x08, 0xCD,
-        0xB9, 0x41, 0x49, 0xBB,
-        0x1F, 0xF0, 0x41, 0xCD,
-        0x51, 0x3C, 0x51, 0xAD,
-        0x00, 0x98, 0x80, 0xE9,
-        0x94, 0x80, 0x07, 0xEA,
-        0x24, 0x1F, 0x20, 0xE9,
-        0x21, 0x45, 0x80, 0xE8,
-        0x1A, 0x4D, 0x80, 0xE8,
-        0x31, 0x55, 0x80, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x15, 0x41, 0x49, 0xBD,
-        0x1D, 0x41, 0x51, 0xBD,
-        0x2E, 0x41, 0x2A, 0xB8,
-        0x34, 0x53, 0xA0, 0xE8,
-        0x15, 0x30,
-        0x1D, 0x30,
-        0x58, 0xE3,
-        0x00, 0xE0,
-        0xB5, 0x40, 0x48, 0xBD,
-        0x3D, 0x40, 0x50, 0xBD,
-        0x24, 0x43, 0xA0, 0xE8,
-        0x2C, 0x4B, 0xA0, 0xE8,
-        0x15, 0x72,
-        0x09, 0xE3,
-        0x00, 0xE0,
-        0x1D, 0x72,
-        0x35, 0x30,
-        0xB5, 0x30,
-        0xBD, 0x30,
-        0x3D, 0x30,
-        0x9C, 0x97, 0x57, 0x9F,
-        0x00, 0x80, 0x00, 0xE8,
-        0x6C, 0x64, 0xC8, 0xEC,
-        0x98, 0xE1,
-        0xB5, 0x05,
-        0xBD, 0x05,
-        0x2E, 0x30,
-        0x32, 0xC0, 0xA0, 0xE8,
-        0x33, 0xC0, 0xA0, 0xE8,
-        0x74, 0x64, 0xC8, 0xEC,
-        0x40, 0x3C, 0x40, 0xAD,
-        0x32, 0x6A,
-        0x2A, 0x30,
-        0x20, 0x73,
-        0x33, 0x6A,
-        0x00, 0xE0,
-        0x28, 0x73,
-        0x1C, 0x72,
-        0x83, 0xE2,
-        0x80, 0x80, 0x15, 0xEA,
-        0xB8, 0x3D, 0x28, 0xDF,
-        0x30, 0x35, 0x20, 0xDF,
-        0x40, 0x30,
-        0x00, 0xE0,
-        0xCC, 0xE2,
-        0x64, 0x72,
-        0x25, 0x42, 0x52, 0xBF,
-        0x2D, 0x42, 0x4A, 0xBF,
-        0x30, 0x2E, 0x30, 0xDF,
-        0x38, 0x2E, 0x38, 0xDF,
-        0x18, 0x1D, 0x45, 0xE9,
-        0x1E, 0x15, 0x45, 0xE9,
-        0x2B, 0x49, 0x51, 0xBD,
-        0x00, 0xE0,
-        0x1F, 0x73,
-        0x38, 0x38, 0x40, 0xAF,
-        0x30, 0x30, 0x40, 0xAF,
-        0x24, 0x1F, 0x24, 0xDF,
-        0x1D, 0x32, 0x20, 0xE9,
-        0x2C, 0x1F, 0x2C, 0xDF,
-        0x1A, 0x33, 0x20, 0xE9,
-        0xB0, 0x10,
-        0x08, 0xE3,
-        0x40, 0x10,
-        0xB8, 0x10,
-        0x26, 0xF0, 0x30, 0xCD,
-        0x2F, 0xF0, 0x38, 0xCD,
-        0x2B, 0x80, 0x20, 0xE9,
-        0x2A, 0x80, 0x20, 0xE9,
-        0xA6, 0x20,
-        0x88, 0xE2,
-        0x00, 0xE0,
-        0xAF, 0x20,
-        0x28, 0x2A, 0x26, 0xAF,
-        0x20, 0x2A, 0xC0, 0xAF,
-        0x34, 0x1F, 0x34, 0xDF,
-        0x46, 0x24, 0x46, 0xDF,
-        0x28, 0x30, 0x80, 0xBF,
-        0x20, 0x38, 0x80, 0xBF,
-        0x47, 0x24, 0x47, 0xDF,
-        0x4E, 0x2C, 0x4E, 0xDF,
-        0x4F, 0x2C, 0x4F, 0xDF,
-        0x56, 0x34, 0x56, 0xDF,
-        0x28, 0x15, 0x28, 0xDF,
-        0x20, 0x1D, 0x20, 0xDF,
-        0x57, 0x34, 0x57, 0xDF,
-        0x00, 0xE0,
-        0x1D, 0x05,
-        0x04, 0x80, 0x10, 0xEA,
-        0x89, 0xE2,
-        0x2B, 0x30,
-        0x3F, 0xC1, 0x1D, 0xBD,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0xA0, 0x68,
-        0xBF, 0x25,
-        0x00, 0x80, 0x00, 0xE8,
-        0x20, 0xC0, 0x20, 0xAF,
-        0x28, 0x05,
-        0x97, 0x74,
-        0x00, 0xE0,
-        0x2A, 0x10,
-        0x16, 0xC0, 0x20, 0xE9,
-        0x04, 0x80, 0x10, 0xEA,
-        0x8C, 0xE2,
-        0x95, 0x05,
-        0x28, 0xC1, 0x28, 0xAD,
-        0x1F, 0xC1, 0x15, 0xBD,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0xA8, 0x67,
-        0x9F, 0x6B,
-        0x00, 0x80, 0x00, 0xE8,
-        0x28, 0xC0, 0x28, 0xAD,
-        0x1D, 0x25,
-        0x20, 0x05,
-        0x28, 0x32, 0x80, 0xAD,
-        0x40, 0x2A, 0x40, 0xBD,
-        0x1C, 0x80, 0x20, 0xE9,
-        0x20, 0x33, 0x20, 0xAD,
-        0x20, 0x73,
-        0x00, 0xE0,
-        0xB6, 0x49, 0x51, 0xBB,
-        0x26, 0x2F, 0xB0, 0xE8,
-        0x19, 0x20, 0x20, 0xE9,
-        0x35, 0x20, 0x35, 0xDF,
-        0x3D, 0x20, 0x3D, 0xDF,
-        0x15, 0x20, 0x15, 0xDF,
-        0x1D, 0x20, 0x1D, 0xDF,
-        0x26, 0xD0, 0x26, 0xCD,
-        0x29, 0x49, 0x2A, 0xB8,
-        0x26, 0x40, 0x80, 0xBD,
-        0x3B, 0x48, 0x50, 0xBD,
-        0x3E, 0x54, 0x57, 0x9F,
-        0x00, 0xE0,
-        0x82, 0xE1,
-        0x1E, 0xAF, 0x59, 0x9F,
-        0x00, 0x80, 0x00, 0xE8,
-        0x26, 0x30,
-        0x29, 0x30,
-        0x48, 0x3C, 0x48, 0xAD,
-        0x2B, 0x72,
-        0xC2, 0xE1,
-        0x2C, 0xC0, 0x44, 0xC2,
-        0x05, 0x24, 0x34, 0xBF,
-        0x0D, 0x24, 0x2C, 0xBF,
-        0x2D, 0x46, 0x4E, 0xBF,
-        0x25, 0x46, 0x56, 0xBF,
-        0x20, 0x1D, 0x6F, 0x8F,
-        0x32, 0x3E, 0x5F, 0xE9,
-        0x3E, 0x50, 0x56, 0x9F,
-        0x00, 0xE0,
-        0x3B, 0x30,
-        0x1E, 0x8F, 0x51, 0x9F,
-        0x33, 0x1E, 0x5F, 0xE9,
-        0x05, 0x44, 0x54, 0xB2,
-        0x0D, 0x44, 0x4C, 0xB2,
-        0x19, 0xC0, 0xB0, 0xE8,
-        0x34, 0xC0, 0x44, 0xC4,
-        0x33, 0x73,
-        0x00, 0xE0,
-        0x3E, 0x62, 0x57, 0x9F,
-        0x1E, 0xAF, 0x59, 0x9F,
-        0x00, 0xE0,
-        0x0D, 0x20,
-        0x84, 0x3E, 0x58, 0xE9,
-        0x28, 0x1D, 0x6F, 0x8F,
-        0x05, 0x20,
-        0x00, 0xE0,
-        0x85, 0x1E, 0x58, 0xE9,
-        0x9B, 0x3B, 0x33, 0xDF,
-        0x20, 0x20, 0x42, 0xAF,
-        0x30, 0x42, 0x56, 0x9F,
-        0x80, 0x3E, 0x57, 0xE9,
-        0x3F, 0x8F, 0x51, 0x9F,
-        0x30, 0x80, 0x5F, 0xE9,
-        0x28, 0x28, 0x24, 0xAF,
-        0x81, 0x1E, 0x57, 0xE9,
-        0x05, 0x47, 0x57, 0xBF,
-        0x0D, 0x47, 0x4F, 0xBF,
-        0x88, 0x80, 0x58, 0xE9,
-        0x1B, 0x29, 0x1B, 0xDF,
-        0x30, 0x1D, 0x6F, 0x8F,
-        0x3A, 0x30, 0x4F, 0xE9,
-        0x1C, 0x30, 0x26, 0xDF,
-        0x09, 0xE3,
-        0x3B, 0x05,
-        0x3E, 0x50, 0x56, 0x9F,
-        0x3B, 0x3F, 0x4F, 0xE9,
-        0x1E, 0x8F, 0x51, 0x9F,
-        0x00, 0xE0,
-        0xAC, 0x20,
-        0x2D, 0x44, 0x4C, 0xB4,
-        0x2C, 0x1C, 0xC0, 0xAF,
-        0x25, 0x44, 0x54, 0xB4,
-        0x00, 0xE0,
-        0xC8, 0x30,
-        0x30, 0x46, 0x30, 0xAF,
-        0x1B, 0x1B, 0x48, 0xAF,
-        0x00, 0xE0,
-        0x25, 0x20,
-        0x38, 0x2C, 0x4F, 0xE9,
-        0x86, 0x80, 0x57, 0xE9,
-        0x38, 0x1D, 0x6F, 0x8F,
-        0x28, 0x74,
-        0x00, 0xE0,
-        0x0D, 0x44, 0x4C, 0xB0,
-        0x05, 0x44, 0x54, 0xB0,
-        0x2D, 0x20,
-        0x9B, 0x10,
-        0x82, 0x3E, 0x57, 0xE9,
-        0x32, 0xF0, 0x1B, 0xCD,
-        0x1E, 0xBD, 0x59, 0x9F,
-        0x83, 0x1E, 0x57, 0xE9,
-        0x38, 0x47, 0x38, 0xAF,
-        0x34, 0x20,
-        0x2A, 0x30,
-        0x00, 0xE0,
-        0x0D, 0x20,
-        0x32, 0x20,
-        0x05, 0x20,
-        0x87, 0x80, 0x57, 0xE9,
-        0x1F, 0x54, 0x57, 0x9F,
-        0x17, 0x42, 0x56, 0x9F,
-        0x00, 0xE0,
-        0x3B, 0x6A,
-        0x3F, 0x8F, 0x51, 0x9F,
-        0x37, 0x1E, 0x4F, 0xE9,
-        0x37, 0x32, 0x2A, 0xAF,
-        0x00, 0xE0,
-        0x32, 0x00,
-        0x00, 0x80, 0x00, 0xE8,
-        0x27, 0xC0, 0x44, 0xC0,
-        0x36, 0x1F, 0x4F, 0xE9,
-        0x1F, 0x1F, 0x26, 0xDF,
-        0x37, 0x1B, 0x37, 0xBF,
-        0x17, 0x26, 0x17, 0xDF,
-        0x3E, 0x17, 0x4F, 0xE9,
-        0x3F, 0x3F, 0x4F, 0xE9,
-        0x34, 0x1F, 0x34, 0xAF,
-        0x2B, 0x05,
-        0xA7, 0x20,
-        0x33, 0x2B, 0x37, 0xDF,
-        0x27, 0x17, 0xC0, 0xAF,
-        0x34, 0x80, 0x4F, 0xE9,
-        0x00, 0x80, 0x00, 0xE8,
-        0x2D, 0x21, 0x1A, 0xB0,
-        0x25, 0x21, 0x31, 0xB0,
-        0x0D, 0x21, 0x1A, 0xB2,
-        0x05, 0x21, 0x31, 0xB2,
-        0x03, 0x80, 0x2A, 0xEA,
-        0x17, 0xC1, 0x2B, 0xBD,
-        0x2D, 0x20,
-        0x25, 0x20,
-        0x05, 0x20,
-        0x0D, 0x20,
-        0xB3, 0x68,
-        0x97, 0x25,
-        0x00, 0x80, 0x00, 0xE8,
-        0x33, 0xC0, 0x33, 0xAF,
-        0x2F, 0xC0, 0x21, 0xC0,
-        0x16, 0x42, 0x56, 0x9F,
-        0x3C, 0x27, 0x4F, 0xE9,
-        0x1E, 0x62, 0x57, 0x9F,
-        0x00, 0x80, 0x00, 0xE8,
-        0x25, 0x21, 0x31, 0xB4,
-        0x2D, 0x21, 0x1A, 0xB4,
-        0x3F, 0x2F, 0x5D, 0x9F,
-        0x00, 0x80, 0x00, 0xE8,
-        0x33, 0x05,
-        0x00, 0xE0,
-        0x28, 0x19, 0x60, 0xEC,
-        0x0D, 0x21, 0x1A, 0xB6,
-        0x05, 0x21, 0x31, 0xB6,
-        0x37, 0x0F, 0x5C, 0x9F,
-        0x00, 0xE0,
-        0x2F, 0x20,
-        0x23, 0x3B, 0x33, 0xAD,
-        0x1E, 0x26, 0x1E, 0xDF,
-        0xA7, 0x1E, 0x4F, 0xE9,
-        0x17, 0x26, 0x16, 0xDF,
-        0x2D, 0x20,
-        0x00, 0xE0,
-        0xA8, 0x3F, 0x4F, 0xE9,
-        0x2F, 0x2F, 0x1E, 0xAF,
-        0x25, 0x20,
-        0x00, 0xE0,
-        0xA4, 0x16, 0x4F, 0xE9,
-        0x0F, 0xC0, 0x21, 0xC2,
-        0xA6, 0x80, 0x4F, 0xE9,
-        0x1F, 0x62, 0x57, 0x9F,
-        0x0D, 0x20,
-        0x05, 0x20,
-        0x2F, 0xC0, 0x21, 0xC6,
-        0x2D, 0x44, 0x4C, 0xB6,
-        0x25, 0x44, 0x54, 0xB6,
-        0x3F, 0x2F, 0x5D, 0x9F,
-        0x00, 0xE0,
-        0x0F, 0x20,
-        0x2D, 0x20,
-        0x25, 0x20,
-        0x07, 0xC0, 0x44, 0xC6,
-        0x17, 0x50, 0x56, 0x9F,
-        0xA5, 0x37, 0x4F, 0xE9,
-        0x06, 0xC0, 0x21, 0xC4,
-        0x0F, 0x17, 0x0F, 0xAF,
-        0x37, 0x0F, 0x5C, 0x9F,
-        0x00, 0x80, 0x00, 0xE8,
-        0x1E, 0x62, 0x57, 0x9F,
-        0x00, 0x80, 0x00, 0xE8,
-        0x3E, 0x3D, 0x5D, 0x9F,
-        0x00, 0xE0,
-        0x07, 0x20,
-        0x2F, 0x20,
-        0x00, 0xE0,
-        0xA3, 0x0F, 0x4F, 0xE9,
-        0x06, 0x20,
-        0x00, 0xE0,
-        0x1F, 0x26, 0x1F, 0xDF,
-        0x17, 0x26, 0x17, 0xDF,
-        0xA1, 0x1F, 0x4F, 0xE9,
-        0x1E, 0x26, 0x1E, 0xDF,
-        0x9D, 0x1E, 0x4F, 0xE9,
-        0x35, 0x17, 0x4F, 0xE9,
-        0xA2, 0x3F, 0x4F, 0xE9,
-        0x06, 0x06, 0x1F, 0xAF,
-        0x39, 0x37, 0x4F, 0xE9,
-        0x2F, 0x2F, 0x17, 0xAF,
-        0x07, 0x07, 0x1E, 0xAF,
-        0xA0, 0x80, 0x4F, 0xE9,
-        0x9E, 0x3E, 0x4F, 0xE9,
-        0x31, 0x80, 0x4F, 0xE9,
-        0x9C, 0x80, 0x4F, 0xE9,
-        0x00, 0x80, 0x00, 0xE8,
-        0x57, 0x39, 0x20, 0xE9,
-        0x16, 0x28, 0x20, 0xE9,
-        0x1D, 0x3B, 0x20, 0xE9,
-        0x1E, 0x2B, 0x20, 0xE9,
-        0x2B, 0x32, 0x20, 0xE9,
-        0x1C, 0x23, 0x20, 0xE9,
-        0x57, 0x36, 0x20, 0xE9,
-        0x00, 0x80, 0xA0, 0xE9,
-        0x40, 0x40, 0xD8, 0xEC,
-        0xFF, 0x80, 0xC0, 0xE9,
-        0x90, 0xE2,
-        0x00, 0xE0,
-        0x63, 0xFF, 0x20, 0xEA,
-        0x19, 0xC8, 0xC1, 0xCD,
-        0x1F, 0xD7, 0x18, 0xBD,
-        0x3F, 0xD7, 0x22, 0xBD,
-        0x9F, 0x41, 0x49, 0xBD,
-        0x00, 0x80, 0x00, 0xE8,
-        0x25, 0x41, 0x49, 0xBD,
-        0x2D, 0x41, 0x51, 0xBD,
-        0x0D, 0x80, 0x07, 0xEA,
-        0x00, 0x80, 0x00, 0xE8,
-        0x35, 0x40, 0x48, 0xBD,
-        0x3D, 0x40, 0x50, 0xBD,
-        0x00, 0x80, 0x00, 0xE8,
-        0x25, 0x30,
-        0x2D, 0x30,
-        0x35, 0x30,
-        0xB5, 0x30,
-        0xBD, 0x30,
-        0x3D, 0x30,
-        0x9C, 0xA7, 0x5B, 0x9F,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x62, 0xFF, 0x0A, 0xEA,
-        0x00, 0x80, 0x00, 0xE8,
-        0xC9, 0x41, 0xC8, 0xEC,
-        0x42, 0xE1,
-        0x00, 0xE0,
-        0x60, 0xFF, 0x20, 0xEA,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0xC8, 0x40, 0xC0, 0xEC,
-        0x00, 0x80, 0x00, 0xE8,
-        0x5D, 0xFF, 0x20, 0xEA,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-};
-static unsigned char warp_g200_tgzsf[] = {
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x98, 0xA0, 0xE9,
-        0x40, 0x40, 0xD8, 0xEC,
-        0xFF, 0x80, 0xC0, 0xE9,
-        0x00, 0x80, 0x00, 0xE8,
-        0x1F, 0xD7, 0x18, 0xBD,
-        0x3F, 0xD7, 0x22, 0xBD,
-        0x81, 0x04,
-        0x89, 0x04,
-        0x01, 0x04,
-        0x09, 0x04,
-        0xC9, 0x41, 0xC0, 0xEC,
-        0x11, 0x04,
-        0x00, 0xE0,
-        0x41, 0xCC, 0x41, 0xCD,
-        0x49, 0xCC, 0x49, 0xCD,
-        0xD1, 0x41, 0xC0, 0xEC,
-        0x51, 0xCC, 0x51, 0xCD,
-        0x80, 0x04,
-        0x10, 0x04,
-        0x08, 0x04,
-        0x00, 0xE0,
-        0x00, 0xCC, 0xC0, 0xCD,
-        0xD1, 0x49, 0xC0, 0xEC,
-        0x8A, 0x1F, 0x20, 0xE9,
-        0x8B, 0x3F, 0x20, 0xE9,
-        0x41, 0x3C, 0x41, 0xAD,
-        0x49, 0x3C, 0x49, 0xAD,
-        0x10, 0xCC, 0x10, 0xCD,
-        0x08, 0xCC, 0x08, 0xCD,
-        0xB9, 0x41, 0x49, 0xBB,
-        0x1F, 0xF0, 0x41, 0xCD,
-        0x51, 0x3C, 0x51, 0xAD,
-        0x00, 0x98, 0x80, 0xE9,
-        0x8F, 0x80, 0x07, 0xEA,
-        0x24, 0x1F, 0x20, 0xE9,
-        0x21, 0x45, 0x80, 0xE8,
-        0x1A, 0x4D, 0x80, 0xE8,
-        0x31, 0x55, 0x80, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x15, 0x41, 0x49, 0xBD,
-        0x1D, 0x41, 0x51, 0xBD,
-        0x2E, 0x41, 0x2A, 0xB8,
-        0x34, 0x53, 0xA0, 0xE8,
-        0x15, 0x30,
-        0x1D, 0x30,
-        0x58, 0xE3,
-        0x00, 0xE0,
-        0xB5, 0x40, 0x48, 0xBD,
-        0x3D, 0x40, 0x50, 0xBD,
-        0x24, 0x43, 0xA0, 0xE8,
-        0x2C, 0x4B, 0xA0, 0xE8,
-        0x15, 0x72,
-        0x09, 0xE3,
-        0x00, 0xE0,
-        0x1D, 0x72,
-        0x35, 0x30,
-        0xB5, 0x30,
-        0xBD, 0x30,
-        0x3D, 0x30,
-        0x9C, 0x97, 0x57, 0x9F,
-        0x00, 0x80, 0x00, 0xE8,
-        0x6C, 0x64, 0xC8, 0xEC,
-        0x98, 0xE1,
-        0xB5, 0x05,
-        0xBD, 0x05,
-        0x2E, 0x30,
-        0x32, 0xC0, 0xA0, 0xE8,
-        0x33, 0xC0, 0xA0, 0xE8,
-        0x74, 0x64, 0xC8, 0xEC,
-        0x40, 0x3C, 0x40, 0xAD,
-        0x32, 0x6A,
-        0x2A, 0x30,
-        0x20, 0x73,
-        0x33, 0x6A,
-        0x00, 0xE0,
-        0x28, 0x73,
-        0x1C, 0x72,
-        0x83, 0xE2,
-        0x7B, 0x80, 0x15, 0xEA,
-        0xB8, 0x3D, 0x28, 0xDF,
-        0x30, 0x35, 0x20, 0xDF,
-        0x40, 0x30,
-        0x00, 0xE0,
-        0xCC, 0xE2,
-        0x64, 0x72,
-        0x25, 0x42, 0x52, 0xBF,
-        0x2D, 0x42, 0x4A, 0xBF,
-        0x30, 0x2E, 0x30, 0xDF,
-        0x38, 0x2E, 0x38, 0xDF,
-        0x18, 0x1D, 0x45, 0xE9,
-        0x1E, 0x15, 0x45, 0xE9,
-        0x2B, 0x49, 0x51, 0xBD,
-        0x00, 0xE0,
-        0x1F, 0x73,
-        0x38, 0x38, 0x40, 0xAF,
-        0x30, 0x30, 0x40, 0xAF,
-        0x24, 0x1F, 0x24, 0xDF,
-        0x1D, 0x32, 0x20, 0xE9,
-        0x2C, 0x1F, 0x2C, 0xDF,
-        0x1A, 0x33, 0x20, 0xE9,
-        0xB0, 0x10,
-        0x08, 0xE3,
-        0x40, 0x10,
-        0xB8, 0x10,
-        0x26, 0xF0, 0x30, 0xCD,
-        0x2F, 0xF0, 0x38, 0xCD,
-        0x2B, 0x80, 0x20, 0xE9,
-        0x2A, 0x80, 0x20, 0xE9,
-        0xA6, 0x20,
-        0x88, 0xE2,
-        0x00, 0xE0,
-        0xAF, 0x20,
-        0x28, 0x2A, 0x26, 0xAF,
-        0x20, 0x2A, 0xC0, 0xAF,
-        0x34, 0x1F, 0x34, 0xDF,
-        0x46, 0x24, 0x46, 0xDF,
-        0x28, 0x30, 0x80, 0xBF,
-        0x20, 0x38, 0x80, 0xBF,
-        0x47, 0x24, 0x47, 0xDF,
-        0x4E, 0x2C, 0x4E, 0xDF,
-        0x4F, 0x2C, 0x4F, 0xDF,
-        0x56, 0x34, 0x56, 0xDF,
-        0x28, 0x15, 0x28, 0xDF,
-        0x20, 0x1D, 0x20, 0xDF,
-        0x57, 0x34, 0x57, 0xDF,
-        0x00, 0xE0,
-        0x1D, 0x05,
-        0x04, 0x80, 0x10, 0xEA,
-        0x89, 0xE2,
-        0x2B, 0x30,
-        0x3F, 0xC1, 0x1D, 0xBD,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0xA0, 0x68,
-        0xBF, 0x25,
-        0x00, 0x80, 0x00, 0xE8,
-        0x20, 0xC0, 0x20, 0xAF,
-        0x28, 0x05,
-        0x97, 0x74,
-        0x00, 0xE0,
-        0x2A, 0x10,
-        0x16, 0xC0, 0x20, 0xE9,
-        0x04, 0x80, 0x10, 0xEA,
-        0x8C, 0xE2,
-        0x95, 0x05,
-        0x28, 0xC1, 0x28, 0xAD,
-        0x1F, 0xC1, 0x15, 0xBD,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0xA8, 0x67,
-        0x9F, 0x6B,
-        0x00, 0x80, 0x00, 0xE8,
-        0x28, 0xC0, 0x28, 0xAD,
-        0x1D, 0x25,
-        0x20, 0x05,
-        0x28, 0x32, 0x80, 0xAD,
-        0x40, 0x2A, 0x40, 0xBD,
-        0x1C, 0x80, 0x20, 0xE9,
-        0x20, 0x33, 0x20, 0xAD,
-        0x20, 0x73,
-        0x00, 0xE0,
-        0xB6, 0x49, 0x51, 0xBB,
-        0x26, 0x2F, 0xB0, 0xE8,
-        0x19, 0x20, 0x20, 0xE9,
-        0x35, 0x20, 0x35, 0xDF,
-        0x3D, 0x20, 0x3D, 0xDF,
-        0x15, 0x20, 0x15, 0xDF,
-        0x1D, 0x20, 0x1D, 0xDF,
-        0x26, 0xD0, 0x26, 0xCD,
-        0x29, 0x49, 0x2A, 0xB8,
-        0x26, 0x40, 0x80, 0xBD,
-        0x3B, 0x48, 0x50, 0xBD,
-        0x3E, 0x54, 0x57, 0x9F,
-        0x00, 0xE0,
-        0x82, 0xE1,
-        0x1E, 0xAF, 0x59, 0x9F,
-        0x00, 0x80, 0x00, 0xE8,
-        0x26, 0x30,
-        0x29, 0x30,
-        0x48, 0x3C, 0x48, 0xAD,
-        0x2B, 0x72,
-        0xC2, 0xE1,
-        0x2C, 0xC0, 0x44, 0xC2,
-        0x05, 0x24, 0x34, 0xBF,
-        0x0D, 0x24, 0x2C, 0xBF,
-        0x2D, 0x46, 0x4E, 0xBF,
-        0x25, 0x46, 0x56, 0xBF,
-        0x20, 0x1D, 0x6F, 0x8F,
-        0x32, 0x3E, 0x5F, 0xE9,
-        0x3E, 0x50, 0x56, 0x9F,
-        0x00, 0xE0,
-        0x3B, 0x30,
-        0x1E, 0x8F, 0x51, 0x9F,
-        0x33, 0x1E, 0x5F, 0xE9,
-        0x05, 0x44, 0x54, 0xB2,
-        0x0D, 0x44, 0x4C, 0xB2,
-        0x19, 0xC0, 0xB0, 0xE8,
-        0x34, 0xC0, 0x44, 0xC4,
-        0x33, 0x73,
-        0x00, 0xE0,
-        0x3E, 0x62, 0x57, 0x9F,
-        0x1E, 0xAF, 0x59, 0x9F,
-        0x00, 0xE0,
-        0x0D, 0x20,
-        0x84, 0x3E, 0x58, 0xE9,
-        0x28, 0x1D, 0x6F, 0x8F,
-        0x05, 0x20,
-        0x00, 0xE0,
-        0x85, 0x1E, 0x58, 0xE9,
-        0x9B, 0x3B, 0x33, 0xDF,
-        0x20, 0x20, 0x42, 0xAF,
-        0x30, 0x42, 0x56, 0x9F,
-        0x80, 0x3E, 0x57, 0xE9,
-        0x3F, 0x8F, 0x51, 0x9F,
-        0x30, 0x80, 0x5F, 0xE9,
-        0x28, 0x28, 0x24, 0xAF,
-        0x81, 0x1E, 0x57, 0xE9,
-        0x05, 0x47, 0x57, 0xBF,
-        0x0D, 0x47, 0x4F, 0xBF,
-        0x88, 0x80, 0x58, 0xE9,
-        0x1B, 0x29, 0x1B, 0xDF,
-        0x30, 0x1D, 0x6F, 0x8F,
-        0x3A, 0x30, 0x4F, 0xE9,
-        0x1C, 0x30, 0x26, 0xDF,
-        0x09, 0xE3,
-        0x3B, 0x05,
-        0x3E, 0x50, 0x56, 0x9F,
-        0x3B, 0x3F, 0x4F, 0xE9,
-        0x1E, 0x8F, 0x51, 0x9F,
-        0x00, 0xE0,
-        0xAC, 0x20,
-        0x2D, 0x44, 0x4C, 0xB4,
-        0x2C, 0x1C, 0xC0, 0xAF,
-        0x25, 0x44, 0x54, 0xB4,
-        0x00, 0xE0,
-        0xC8, 0x30,
-        0x30, 0x46, 0x30, 0xAF,
-        0x1B, 0x1B, 0x48, 0xAF,
-        0x00, 0xE0,
-        0x25, 0x20,
-        0x38, 0x2C, 0x4F, 0xE9,
-        0x86, 0x80, 0x57, 0xE9,
-        0x38, 0x1D, 0x6F, 0x8F,
-        0x28, 0x74,
-        0x00, 0xE0,
-        0x0D, 0x44, 0x4C, 0xB0,
-        0x05, 0x44, 0x54, 0xB0,
-        0x2D, 0x20,
-        0x9B, 0x10,
-        0x82, 0x3E, 0x57, 0xE9,
-        0x32, 0xF0, 0x1B, 0xCD,
-        0x1E, 0xBD, 0x59, 0x9F,
-        0x83, 0x1E, 0x57, 0xE9,
-        0x38, 0x47, 0x38, 0xAF,
-        0x34, 0x20,
-        0x2A, 0x30,
-        0x00, 0xE0,
-        0x0D, 0x20,
-        0x32, 0x20,
-        0x05, 0x20,
-        0x87, 0x80, 0x57, 0xE9,
-        0x1F, 0x54, 0x57, 0x9F,
-        0x17, 0x42, 0x56, 0x9F,
-        0x00, 0xE0,
-        0x3B, 0x6A,
-        0x3F, 0x8F, 0x51, 0x9F,
-        0x37, 0x1E, 0x4F, 0xE9,
-        0x37, 0x32, 0x2A, 0xAF,
-        0x00, 0xE0,
-        0x32, 0x00,
-        0x00, 0x80, 0x00, 0xE8,
-        0x27, 0xC0, 0x44, 0xC0,
-        0x36, 0x1F, 0x4F, 0xE9,
-        0x1F, 0x1F, 0x26, 0xDF,
-        0x37, 0x1B, 0x37, 0xBF,
-        0x17, 0x26, 0x17, 0xDF,
-        0x3E, 0x17, 0x4F, 0xE9,
-        0x3F, 0x3F, 0x4F, 0xE9,
-        0x34, 0x1F, 0x34, 0xAF,
-        0x2B, 0x05,
-        0xA7, 0x20,
-        0x33, 0x2B, 0x37, 0xDF,
-        0x27, 0x17, 0xC0, 0xAF,
-        0x34, 0x80, 0x4F, 0xE9,
-        0x00, 0x80, 0x00, 0xE8,
-        0x2D, 0x21, 0x1A, 0xB0,
-        0x25, 0x21, 0x31, 0xB0,
-        0x0D, 0x21, 0x1A, 0xB2,
-        0x05, 0x21, 0x31, 0xB2,
-        0x03, 0x80, 0x2A, 0xEA,
-        0x17, 0xC1, 0x2B, 0xBD,
-        0x2D, 0x20,
-        0x25, 0x20,
-        0x05, 0x20,
-        0x0D, 0x20,
-        0xB3, 0x68,
-        0x97, 0x25,
-        0x00, 0x80, 0x00, 0xE8,
-        0x33, 0xC0, 0x33, 0xAF,
-        0x2F, 0xC0, 0x21, 0xC0,
-        0x16, 0x42, 0x56, 0x9F,
-        0x3C, 0x27, 0x4F, 0xE9,
-        0x1E, 0x62, 0x57, 0x9F,
-        0x00, 0x80, 0x00, 0xE8,
-        0x25, 0x21, 0x31, 0xB4,
-        0x2D, 0x21, 0x1A, 0xB4,
-        0x3F, 0x2F, 0x5D, 0x9F,
-        0x00, 0x80, 0x00, 0xE8,
-        0x33, 0x05,
-        0x00, 0xE0,
-        0x28, 0x19, 0x60, 0xEC,
-        0x0D, 0x21, 0x1A, 0xB6,
-        0x05, 0x21, 0x31, 0xB6,
-        0x37, 0x0F, 0x5C, 0x9F,
-        0x00, 0xE0,
-        0x2F, 0x20,
-        0x23, 0x3B, 0x33, 0xAD,
-        0x1E, 0x26, 0x1E, 0xDF,
-        0xA7, 0x1E, 0x4F, 0xE9,
-        0x17, 0x26, 0x16, 0xDF,
-        0x2D, 0x20,
-        0x00, 0xE0,
-        0xA8, 0x3F, 0x4F, 0xE9,
-        0x2F, 0x2F, 0x1E, 0xAF,
-        0x25, 0x20,
-        0x00, 0xE0,
-        0xA4, 0x16, 0x4F, 0xE9,
-        0x0F, 0xC0, 0x21, 0xC2,
-        0xA6, 0x80, 0x4F, 0xE9,
-        0x1F, 0x62, 0x57, 0x9F,
-        0x0D, 0x20,
-        0x05, 0x20,
-        0x2F, 0xC0, 0x21, 0xC6,
-        0x3F, 0x2F, 0x5D, 0x9F,
-        0x00, 0xE0,
-        0x0F, 0x20,
-        0x17, 0x50, 0x56, 0x9F,
-        0xA5, 0x37, 0x4F, 0xE9,
-        0x06, 0xC0, 0x21, 0xC4,
-        0x0F, 0x17, 0x0F, 0xAF,
-        0x37, 0x0F, 0x5C, 0x9F,
-        0x00, 0x80, 0x00, 0xE8,
-        0x2F, 0x20,
-        0x00, 0xE0,
-        0xA3, 0x80, 0x4F, 0xE9,
-        0x06, 0x20,
-        0x00, 0xE0,
-        0x1F, 0x26, 0x1F, 0xDF,
-        0x17, 0x26, 0x17, 0xDF,
-        0x35, 0x17, 0x4F, 0xE9,
-        0xA1, 0x1F, 0x4F, 0xE9,
-        0xA2, 0x3F, 0x4F, 0xE9,
-        0x06, 0x06, 0x1F, 0xAF,
-        0x39, 0x37, 0x4F, 0xE9,
-        0x2F, 0x2F, 0x17, 0xAF,
-        0x00, 0x80, 0x00, 0xE8,
-        0xA0, 0x80, 0x4F, 0xE9,
-        0x00, 0x80, 0x00, 0xE8,
-        0x31, 0x80, 0x4F, 0xE9,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x57, 0x39, 0x20, 0xE9,
-        0x16, 0x28, 0x20, 0xE9,
-        0x1D, 0x3B, 0x20, 0xE9,
-        0x1E, 0x2B, 0x20, 0xE9,
-        0x2B, 0x32, 0x20, 0xE9,
-        0x1C, 0x23, 0x20, 0xE9,
-        0x57, 0x36, 0x20, 0xE9,
-        0x00, 0x80, 0xA0, 0xE9,
-        0x40, 0x40, 0xD8, 0xEC,
-        0xFF, 0x80, 0xC0, 0xE9,
-        0x90, 0xE2,
-        0x00, 0xE0,
-        0x68, 0xFF, 0x20, 0xEA,
-        0x19, 0xC8, 0xC1, 0xCD,
-        0x1F, 0xD7, 0x18, 0xBD,
-        0x3F, 0xD7, 0x22, 0xBD,
-        0x9F, 0x41, 0x49, 0xBD,
-        0x00, 0x80, 0x00, 0xE8,
-        0x25, 0x41, 0x49, 0xBD,
-        0x2D, 0x41, 0x51, 0xBD,
-        0x0D, 0x80, 0x07, 0xEA,
-        0x00, 0x80, 0x00, 0xE8,
-        0x35, 0x40, 0x48, 0xBD,
-        0x3D, 0x40, 0x50, 0xBD,
-        0x00, 0x80, 0x00, 0xE8,
-        0x25, 0x30,
-        0x2D, 0x30,
-        0x35, 0x30,
-        0xB5, 0x30,
-        0xBD, 0x30,
-        0x3D, 0x30,
-        0x9C, 0xA7, 0x5B, 0x9F,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x67, 0xFF, 0x0A, 0xEA,
-        0x00, 0x80, 0x00, 0xE8,
-        0xC9, 0x41, 0xC8, 0xEC,
-        0x42, 0xE1,
-        0x00, 0xE0,
-        0x65, 0xFF, 0x20, 0xEA,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0xC8, 0x40, 0xC0, 0xEC,
-        0x00, 0x80, 0x00, 0xE8,
-        0x62, 0xFF, 0x20, 0xEA,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-};
-static unsigned char warp_g400_t2gz[] = {
-        0x00, 0x8A, 0x98, 0xE9,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0xA0, 0xE9,
-        0x00, 0x00, 0xD8, 0xEC,
-        0xFF, 0x80, 0xC0, 0xE9,
-        0x00, 0x80, 0x00, 0xE8,
-        0x0A, 0x40, 0x50, 0xBF,
-        0x2A, 0x40, 0x60, 0xBF,
-        0x32, 0x41, 0x51, 0xBF,
-        0x3A, 0x41, 0x61, 0xBF,
-        0xC3, 0x6B,
-        0xD3, 0x6B,
-        0x00, 0x8A, 0x98, 0xE9,
-        0x73, 0x7B, 0xC8, 0xEC,
-        0x96, 0xE2,
-        0x41, 0x04,
-        0x7B, 0x43, 0xA0, 0xE8,
-        0x73, 0x53, 0xA0, 0xE8,
-        0xAD, 0xEE, 0x23, 0x9F,
-        0x00, 0xE0,
-        0x51, 0x04,
-        0x90, 0xE2,
-        0x61, 0x04,
-        0x31, 0x46, 0xB1, 0xE8,
-        0x51, 0x41, 0xE0, 0xEC,
-        0x39, 0x67, 0xB1, 0xE8,
-        0x00, 0x04,
-        0x46, 0xE2,
-        0x73, 0x63, 0xA0, 0xE8,
-        0x61, 0x41, 0xE0, 0xEC,
-        0x31, 0x00,
-        0x39, 0x00,
-        0x78, 0x80, 0x15, 0xEA,
-        0x10, 0x04,
-        0x20, 0x04,
-        0x61, 0x51, 0xE0, 0xEC,
-        0x2F, 0x41, 0x60, 0xEA,
-        0x31, 0x20,
-        0x39, 0x20,
-        0x1F, 0x42, 0xA0, 0xE8,
-        0x2A, 0x42, 0x52, 0xBF,
-        0x0F, 0x52, 0xA0, 0xE8,
-        0x1A, 0x42, 0x62, 0xBF,
-        0x1E, 0x51, 0x60, 0xEA,
-        0x73, 0x7B, 0xC8, 0xEC,
-        0x0E, 0x61, 0x60, 0xEA,
-        0x32, 0x40, 0x50, 0xBD,
-        0x22, 0x40, 0x60, 0xBD,
-        0x12, 0x41, 0x51, 0xBD,
-        0x3A, 0x41, 0x61, 0xBD,
-        0xBF, 0x2F, 0x0E, 0xBD,
-        0x97, 0xE2,
-        0x7B, 0x72,
-        0x32, 0x20,
-        0x22, 0x20,
-        0x12, 0x20,
-        0x3A, 0x20,
-        0x35, 0x48, 0xB1, 0xE8,
-        0x3D, 0x59, 0xB1, 0xE8,
-        0x46, 0x31, 0x46, 0xBF,
-        0x56, 0x31, 0x56, 0xBF,
-        0xB3, 0xE2, 0x2D, 0x9F,
-        0x00, 0x80, 0x00, 0xE8,
-        0x66, 0x31, 0x66, 0xBF,
-        0x47, 0x39, 0x47, 0xBF,
-        0x57, 0x39, 0x57, 0xBF,
-        0x67, 0x39, 0x67, 0xBF,
-        0x69, 0x80, 0x07, 0xEA,
-        0x24, 0x41, 0x20, 0xE9,
-        0x35, 0x00,
-        0x3D, 0x00,
-        0x00, 0xE0,
-        0x2D, 0x73,
-        0x33, 0x72,
-        0x0C, 0xE3,
-        0x8D, 0x2F, 0x1E, 0xBD,
-        0x43, 0x75, 0xF8, 0xEC,
-        0x35, 0x20,
-        0x3D, 0x20,
-        0x43, 0x43, 0x2D, 0xDF,
-        0x53, 0x53, 0x2D, 0xDF,
-        0xAE, 0x1E, 0x0E, 0xBD,
-        0x58, 0xE3,
-        0x33, 0x66,
-        0x48, 0x35, 0x48, 0xBF,
-        0x58, 0x35, 0x58, 0xBF,
-        0x68, 0x35, 0x68, 0xBF,
-        0x49, 0x3D, 0x49, 0xBF,
-        0x59, 0x3D, 0x59, 0xBF,
-        0x69, 0x3D, 0x69, 0xBF,
-        0x63, 0x63, 0x2D, 0xDF,
-        0x4D, 0x7D, 0xF8, 0xEC,
-        0x59, 0xE3,
-        0x00, 0xE0,
-        0xB8, 0x38, 0x33, 0xBF,
-        0x2D, 0x73,
-        0x30, 0x76,
-        0x18, 0x3A, 0x41, 0xE9,
-        0x3F, 0x53, 0xA0, 0xE8,
-        0x05, 0x80, 0x3D, 0xEA,
-        0x37, 0x43, 0xA0, 0xE8,
-        0x3D, 0x63, 0xA0, 0xE8,
-        0x50, 0x70, 0xF8, 0xEC,
-        0x2B, 0x50, 0x3C, 0xE9,
-        0x1F, 0x0F, 0xBC, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x59, 0x78, 0xF8, 0xEC,
-        0x00, 0x80, 0x00, 0xE8,
-        0x15, 0xC0, 0x20, 0xE9,
-        0x15, 0xC0, 0x20, 0xE9,
-        0x15, 0xC0, 0x20, 0xE9,
-        0x15, 0xC0, 0x20, 0xE9,
-        0x1E, 0x12, 0x41, 0xE9,
-        0x1A, 0x22, 0x41, 0xE9,
-        0x46, 0x37, 0x46, 0xDF,
-        0x56, 0x3F, 0x56, 0xDF,
-        0x2B, 0x40, 0x3D, 0xE9,
-        0x66, 0x3D, 0x66, 0xDF,
-        0x1D, 0x32, 0x41, 0xE9,
-        0x67, 0x3D, 0x67, 0xDF,
-        0x47, 0x37, 0x47, 0xDF,
-        0x57, 0x3F, 0x57, 0xDF,
-        0x2A, 0x40, 0x20, 0xE9,
-        0x59, 0x3F, 0x59, 0xDF,
-        0x16, 0x30, 0x20, 0xE9,
-        0x69, 0x3D, 0x69, 0xDF,
-        0x48, 0x37, 0x48, 0xDF,
-        0x58, 0x3F, 0x58, 0xDF,
-        0x12, 0x12, 0x2D, 0xDF,
-        0x22, 0x22, 0x2D, 0xDF,
-        0x32, 0x32, 0x2D, 0xDF,
-        0x3A, 0x3A, 0x2D, 0xDF,
-        0x68, 0x3D, 0x68, 0xDF,
-        0x49, 0x37, 0x49, 0xDF,
-        0x3D, 0xCF, 0x74, 0xC0,
-        0x37, 0xCF, 0x74, 0xC4,
-        0x31, 0x53, 0x2F, 0x9F,
-        0x34, 0x80, 0x20, 0xE9,
-        0x39, 0xE5, 0x2C, 0x9F,
-        0x3C, 0x3D, 0x20, 0xE9,
-        0x0A, 0x44, 0x54, 0xB0,
-        0x02, 0x44, 0x64, 0xB0,
-        0x2A, 0x44, 0x54, 0xB2,
-        0x1A, 0x44, 0x64, 0xB2,
-        0x25, 0x80, 0x3A, 0xEA,
-        0x0A, 0x20,
-        0x02, 0x20,
-        0x3D, 0xCF, 0x74, 0xC2,
-        0x2A, 0x20,
-        0x1A, 0x20,
-        0x30, 0x50, 0x2E, 0x9F,
-        0x32, 0x31, 0x5F, 0xE9,
-        0x38, 0x21, 0x2C, 0x9F,
-        0x33, 0x39, 0x5F, 0xE9,
-        0x31, 0x53, 0x2F, 0x9F,
-        0x00, 0x80, 0x00, 0xE8,
-        0x2A, 0x44, 0x54, 0xB4,
-        0x1A, 0x44, 0x64, 0xB4,
-        0x39, 0xE5, 0x2C, 0x9F,
-        0x38, 0x3D, 0x20, 0xE9,
-        0x88, 0x73, 0x5E, 0xE9,
-        0x2A, 0x20,
-        0x1A, 0x20,
-        0x2A, 0x46, 0x56, 0xBF,
-        0x1A, 0x46, 0x66, 0xBF,
-        0x31, 0x53, 0x2F, 0x9F,
-        0x3E, 0x30, 0x4F, 0xE9,
-        0x39, 0xE5, 0x2C, 0x9F,
-        0x3F, 0x38, 0x4F, 0xE9,
-        0x0A, 0x47, 0x57, 0xBF,
-        0x02, 0x47, 0x67, 0xBF,
-        0x31, 0x53, 0x2F, 0x9F,
-        0x3A, 0x31, 0x4F, 0xE9,
-        0x39, 0xE5, 0x2C, 0x9F,
-        0x3B, 0x39, 0x4F, 0xE9,
-        0x2A, 0x43, 0x53, 0xBF,
-        0x1A, 0x43, 0x63, 0xBF,
-        0x30, 0x50, 0x2E, 0x9F,
-        0x36, 0x31, 0x4F, 0xE9,
-        0x38, 0x21, 0x2C, 0x9F,
-        0x37, 0x39, 0x4F, 0xE9,
-        0x0A, 0x48, 0x58, 0xBF,
-        0x02, 0x48, 0x68, 0xBF,
-        0x31, 0x53, 0x2F, 0x9F,
-        0x80, 0x31, 0x57, 0xE9,
-        0x39, 0xE5, 0x2C, 0x9F,
-        0x81, 0x39, 0x57, 0xE9,
-        0x2A, 0x49, 0x59, 0xBF,
-        0x1A, 0x49, 0x69, 0xBF,
-        0x30, 0x50, 0x2E, 0x9F,
-        0x82, 0x30, 0x57, 0xE9,
-        0x38, 0x21, 0x2C, 0x9F,
-        0x83, 0x38, 0x57, 0xE9,
-        0x31, 0x53, 0x2F, 0x9F,
-        0x84, 0x31, 0x5E, 0xE9,
-        0x39, 0xE5, 0x2C, 0x9F,
-        0x85, 0x39, 0x5E, 0xE9,
-        0x86, 0x76, 0x57, 0xE9,
-        0x8A, 0x36, 0x20, 0xE9,
-        0x87, 0x77, 0x57, 0xE9,
-        0x8B, 0x3E, 0xBF, 0xEA,
-        0x80, 0x30, 0x57, 0xE9,
-        0x81, 0x38, 0x57, 0xE9,
-        0x82, 0x31, 0x57, 0xE9,
-        0x86, 0x78, 0x57, 0xE9,
-        0x83, 0x39, 0x57, 0xE9,
-        0x87, 0x79, 0x57, 0xE9,
-        0x30, 0x1F, 0x5F, 0xE9,
-        0x8A, 0x34, 0x20, 0xE9,
-        0x8B, 0x3C, 0x20, 0xE9,
-        0x37, 0x50, 0x60, 0xBD,
-        0x57, 0x0D, 0x20, 0xE9,
-        0x35, 0x51, 0x61, 0xBD,
-        0x2B, 0x50, 0x20, 0xE9,
-        0x1D, 0x37, 0xE1, 0xEA,
-        0x1E, 0x35, 0xE1, 0xEA,
-        0x00, 0xE0,
-        0x0E, 0x77,
-        0x24, 0x51, 0x20, 0xE9,
-        0x9F, 0xFF, 0x20, 0xEA,
-        0x16, 0x0E, 0x20, 0xE9,
-        0x57, 0x2E, 0xBF, 0xEA,
-        0x0B, 0x46, 0xA0, 0xE8,
-        0x1B, 0x56, 0xA0, 0xE8,
-        0x2B, 0x66, 0xA0, 0xE8,
-        0x0C, 0x47, 0xA0, 0xE8,
-        0x1C, 0x57, 0xA0, 0xE8,
-        0x2C, 0x67, 0xA0, 0xE8,
-        0x0B, 0x00,
-        0x1B, 0x00,
-        0x2B, 0x00,
-        0x00, 0xE0,
-        0x0C, 0x00,
-        0x1C, 0x00,
-        0x2C, 0x00,
-        0x00, 0xE0,
-        0x0B, 0x65,
-        0x1B, 0x65,
-        0x2B, 0x65,
-        0x00, 0xE0,
-        0x0C, 0x65,
-        0x1C, 0x65,
-        0x2C, 0x65,
-        0x00, 0xE0,
-        0x0B, 0x1B, 0x60, 0xEC,
-        0x36, 0xD7, 0x36, 0xAD,
-        0x2B, 0x80, 0x60, 0xEC,
-        0x0C, 0x1C, 0x60, 0xEC,
-        0x3E, 0xD7, 0x3E, 0xAD,
-        0x2C, 0x80, 0x60, 0xEC,
-        0x0B, 0x2B, 0xDE, 0xE8,
-        0x1B, 0x80, 0xDE, 0xE8,
-        0x36, 0x80, 0x36, 0xBD,
-        0x3E, 0x80, 0x3E, 0xBD,
-        0x33, 0xD7, 0x0B, 0xBD,
-        0x3B, 0xD7, 0x1B, 0xBD,
-        0x46, 0x80, 0x46, 0xCF,
-        0x57, 0x80, 0x57, 0xCF,
-        0x66, 0x33, 0x66, 0xCF,
-        0x47, 0x3B, 0x47, 0xCF,
-        0x56, 0x33, 0x56, 0xCF,
-        0x67, 0x3B, 0x67, 0xCF,
-        0x0B, 0x48, 0xA0, 0xE8,
-        0x1B, 0x58, 0xA0, 0xE8,
-        0x2B, 0x68, 0xA0, 0xE8,
-        0x0C, 0x49, 0xA0, 0xE8,
-        0x1C, 0x59, 0xA0, 0xE8,
-        0x2C, 0x69, 0xA0, 0xE8,
-        0x0B, 0x00,
-        0x1B, 0x00,
-        0x2B, 0x00,
-        0x00, 0xE0,
-        0x0C, 0x00,
-        0x1C, 0x00,
-        0x2C, 0x00,
-        0x00, 0xE0,
-        0x0B, 0x65,
-        0x1B, 0x65,
-        0x2B, 0x65,
-        0x00, 0xE0,
-        0x0C, 0x65,
-        0x1C, 0x65,
-        0x2C, 0x65,
-        0x00, 0xE0,
-        0x0B, 0x1B, 0x60, 0xEC,
-        0x34, 0xD7, 0x34, 0xAD,
-        0x2B, 0x80, 0x60, 0xEC,
-        0x0C, 0x1C, 0x60, 0xEC,
-        0x3C, 0xD7, 0x3C, 0xAD,
-        0x2C, 0x80, 0x60, 0xEC,
-        0x0B, 0x2B, 0xDE, 0xE8,
-        0x1B, 0x80, 0xDE, 0xE8,
-        0x34, 0x80, 0x34, 0xBD,
-        0x3C, 0x80, 0x3C, 0xBD,
-        0x33, 0xD7, 0x0B, 0xBD,
-        0x3B, 0xD7, 0x1B, 0xBD,
-        0x48, 0x80, 0x48, 0xCF,
-        0x59, 0x80, 0x59, 0xCF,
-        0x68, 0x33, 0x68, 0xCF,
-        0x49, 0x3B, 0x49, 0xCF,
-        0xBE, 0xFF, 0x20, 0xEA,
-        0x00, 0x80, 0x00, 0xE8,
-        0x58, 0x33, 0x58, 0xCF,
-        0x69, 0x3B, 0x69, 0xCF,
-        0x7D, 0xFF, 0x20, 0xEA,
-        0x57, 0xC0, 0xBF, 0xEA,
-        0x00, 0x80, 0xA0, 0xE9,
-        0x00, 0x00, 0xD8, 0xEC,
-};
-static unsigned char warp_g400_t2gza[] = {
-        0x00, 0x8A, 0x98, 0xE9,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0xA0, 0xE9,
-        0x00, 0x00, 0xD8, 0xEC,
-        0xFF, 0x80, 0xC0, 0xE9,
-        0x00, 0x80, 0x00, 0xE8,
-        0x0A, 0x40, 0x50, 0xBF,
-        0x2A, 0x40, 0x60, 0xBF,
-        0x32, 0x41, 0x51, 0xBF,
-        0x3A, 0x41, 0x61, 0xBF,
-        0xC3, 0x6B,
-        0xD3, 0x6B,
-        0x00, 0x8A, 0x98, 0xE9,
-        0x73, 0x7B, 0xC8, 0xEC,
-        0x96, 0xE2,
-        0x41, 0x04,
-        0x7B, 0x43, 0xA0, 0xE8,
-        0x73, 0x53, 0xA0, 0xE8,
-        0xAD, 0xEE, 0x23, 0x9F,
-        0x00, 0xE0,
-        0x51, 0x04,
-        0x90, 0xE2,
-        0x61, 0x04,
-        0x31, 0x46, 0xB1, 0xE8,
-        0x51, 0x41, 0xE0, 0xEC,
-        0x39, 0x67, 0xB1, 0xE8,
-        0x00, 0x04,
-        0x46, 0xE2,
-        0x73, 0x63, 0xA0, 0xE8,
-        0x61, 0x41, 0xE0, 0xEC,
-        0x31, 0x00,
-        0x39, 0x00,
-        0x7C, 0x80, 0x15, 0xEA,
-        0x10, 0x04,
-        0x20, 0x04,
-        0x61, 0x51, 0xE0, 0xEC,
-        0x2F, 0x41, 0x60, 0xEA,
-        0x31, 0x20,
-        0x39, 0x20,
-        0x1F, 0x42, 0xA0, 0xE8,
-        0x2A, 0x42, 0x52, 0xBF,
-        0x0F, 0x52, 0xA0, 0xE8,
-        0x1A, 0x42, 0x62, 0xBF,
-        0x1E, 0x51, 0x60, 0xEA,
-        0x73, 0x7B, 0xC8, 0xEC,
-        0x0E, 0x61, 0x60, 0xEA,
-        0x32, 0x40, 0x50, 0xBD,
-        0x22, 0x40, 0x60, 0xBD,
-        0x12, 0x41, 0x51, 0xBD,
-        0x3A, 0x41, 0x61, 0xBD,
-        0xBF, 0x2F, 0x0E, 0xBD,
-        0x97, 0xE2,
-        0x7B, 0x72,
-        0x32, 0x20,
-        0x22, 0x20,
-        0x12, 0x20,
-        0x3A, 0x20,
-        0x35, 0x48, 0xB1, 0xE8,
-        0x3D, 0x59, 0xB1, 0xE8,
-        0x46, 0x31, 0x46, 0xBF,
-        0x56, 0x31, 0x56, 0xBF,
-        0xB3, 0xE2, 0x2D, 0x9F,
-        0x00, 0x80, 0x00, 0xE8,
-        0x66, 0x31, 0x66, 0xBF,
-        0x47, 0x39, 0x47, 0xBF,
-        0x57, 0x39, 0x57, 0xBF,
-        0x67, 0x39, 0x67, 0xBF,
-        0x6D, 0x80, 0x07, 0xEA,
-        0x24, 0x41, 0x20, 0xE9,
-        0x35, 0x00,
-        0x3D, 0x00,
-        0x00, 0xE0,
-        0x2D, 0x73,
-        0x33, 0x72,
-        0x0C, 0xE3,
-        0x8D, 0x2F, 0x1E, 0xBD,
-        0x43, 0x75, 0xF8, 0xEC,
-        0x35, 0x20,
-        0x3D, 0x20,
-        0x43, 0x43, 0x2D, 0xDF,
-        0x53, 0x53, 0x2D, 0xDF,
-        0xAE, 0x1E, 0x0E, 0xBD,
-        0x58, 0xE3,
-        0x33, 0x66,
-        0x48, 0x35, 0x48, 0xBF,
-        0x58, 0x35, 0x58, 0xBF,
-        0x68, 0x35, 0x68, 0xBF,
-        0x49, 0x3D, 0x49, 0xBF,
-        0x59, 0x3D, 0x59, 0xBF,
-        0x69, 0x3D, 0x69, 0xBF,
-        0x63, 0x63, 0x2D, 0xDF,
-        0x4D, 0x7D, 0xF8, 0xEC,
-        0x59, 0xE3,
-        0x00, 0xE0,
-        0xB8, 0x38, 0x33, 0xBF,
-        0x2D, 0x73,
-        0x30, 0x76,
-        0x18, 0x3A, 0x41, 0xE9,
-        0x3F, 0x53, 0xA0, 0xE8,
-        0x05, 0x80, 0x3D, 0xEA,
-        0x37, 0x43, 0xA0, 0xE8,
-        0x3D, 0x63, 0xA0, 0xE8,
-        0x50, 0x70, 0xF8, 0xEC,
-        0x2B, 0x50, 0x3C, 0xE9,
-        0x1F, 0x0F, 0xBC, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x59, 0x78, 0xF8, 0xEC,
-        0x00, 0x80, 0x00, 0xE8,
-        0x15, 0xC0, 0x20, 0xE9,
-        0x15, 0xC0, 0x20, 0xE9,
-        0x15, 0xC0, 0x20, 0xE9,
-        0x15, 0xC0, 0x20, 0xE9,
-        0x1E, 0x12, 0x41, 0xE9,
-        0x1A, 0x22, 0x41, 0xE9,
-        0x46, 0x37, 0x46, 0xDF,
-        0x56, 0x3F, 0x56, 0xDF,
-        0x2B, 0x40, 0x3D, 0xE9,
-        0x66, 0x3D, 0x66, 0xDF,
-        0x1D, 0x32, 0x41, 0xE9,
-        0x67, 0x3D, 0x67, 0xDF,
-        0x47, 0x37, 0x47, 0xDF,
-        0x57, 0x3F, 0x57, 0xDF,
-        0x2A, 0x40, 0x20, 0xE9,
-        0x59, 0x3F, 0x59, 0xDF,
-        0x16, 0x30, 0x20, 0xE9,
-        0x69, 0x3D, 0x69, 0xDF,
-        0x48, 0x37, 0x48, 0xDF,
-        0x58, 0x3F, 0x58, 0xDF,
-        0x12, 0x12, 0x2D, 0xDF,
-        0x22, 0x22, 0x2D, 0xDF,
-        0x32, 0x32, 0x2D, 0xDF,
-        0x3A, 0x3A, 0x2D, 0xDF,
-        0x68, 0x3D, 0x68, 0xDF,
-        0x49, 0x37, 0x49, 0xDF,
-        0x3D, 0xCF, 0x74, 0xC0,
-        0x37, 0xCF, 0x74, 0xC4,
-        0x31, 0x53, 0x2F, 0x9F,
-        0x34, 0x80, 0x20, 0xE9,
-        0x39, 0xE5, 0x2C, 0x9F,
-        0x3C, 0x3D, 0x20, 0xE9,
-        0x0A, 0x44, 0x54, 0xB0,
-        0x02, 0x44, 0x64, 0xB0,
-        0x2A, 0x44, 0x54, 0xB2,
-        0x1A, 0x44, 0x64, 0xB2,
-        0x29, 0x80, 0x3A, 0xEA,
-        0x0A, 0x20,
-        0x02, 0x20,
-        0x0F, 0xCF, 0x74, 0xC6,
-        0x3D, 0xCF, 0x74, 0xC2,
-        0x88, 0x73, 0x5E, 0xE9,
-        0x2A, 0x20,
-        0x1A, 0x20,
-        0x30, 0x50, 0x2E, 0x9F,
-        0x32, 0x31, 0x5F, 0xE9,
-        0x38, 0x21, 0x2C, 0x9F,
-        0x33, 0x39, 0x5F, 0xE9,
-        0x31, 0x53, 0x2F, 0x9F,
-        0x9C, 0x0F, 0x20, 0xE9,
-        0x0A, 0x44, 0x54, 0xB4,
-        0x02, 0x44, 0x64, 0xB4,
-        0x2A, 0x44, 0x54, 0xB6,
-        0x1A, 0x44, 0x64, 0xB6,
-        0x39, 0xE5, 0x2C, 0x9F,
-        0x38, 0x3D, 0x20, 0xE9,
-        0x0A, 0x20,
-        0x02, 0x20,
-        0x2A, 0x20,
-        0x1A, 0x20,
-        0x0A, 0x47, 0x57, 0xBF,
-        0x02, 0x47, 0x67, 0xBF,
-        0x30, 0x50, 0x2E, 0x9F,
-        0x3E, 0x30, 0x4F, 0xE9,
-        0x38, 0x21, 0x2C, 0x9F,
-        0x3F, 0x38, 0x4F, 0xE9,
-        0x2A, 0x46, 0x56, 0xBF,
-        0x1A, 0x46, 0x66, 0xBF,
-        0x31, 0x53, 0x2F, 0x9F,
-        0x3A, 0x31, 0x4F, 0xE9,
-        0x39, 0xE5, 0x2C, 0x9F,
-        0x3B, 0x39, 0x4F, 0xE9,
-        0x31, 0x53, 0x2F, 0x9F,
-        0x36, 0x30, 0x4F, 0xE9,
-        0x39, 0xE5, 0x2C, 0x9F,
-        0x37, 0x38, 0x4F, 0xE9,
-        0x2A, 0x43, 0x53, 0xBF,
-        0x1A, 0x43, 0x63, 0xBF,
-        0x30, 0x50, 0x2E, 0x9F,
-        0x9D, 0x31, 0x4F, 0xE9,
-        0x38, 0x21, 0x2C, 0x9F,
-        0x9E, 0x39, 0x4F, 0xE9,
-        0x0A, 0x48, 0x58, 0xBF,
-        0x02, 0x48, 0x68, 0xBF,
-        0x31, 0x53, 0x2F, 0x9F,
-        0x80, 0x31, 0x57, 0xE9,
-        0x39, 0xE5, 0x2C, 0x9F,
-        0x81, 0x39, 0x57, 0xE9,
-        0x2A, 0x49, 0x59, 0xBF,
-        0x1A, 0x49, 0x69, 0xBF,
-        0x30, 0x50, 0x2E, 0x9F,
-        0x82, 0x30, 0x57, 0xE9,
-        0x38, 0x21, 0x2C, 0x9F,
-        0x83, 0x38, 0x57, 0xE9,
-        0x31, 0x53, 0x2F, 0x9F,
-        0x84, 0x31, 0x5E, 0xE9,
-        0x39, 0xE5, 0x2C, 0x9F,
-        0x85, 0x39, 0x5E, 0xE9,
-        0x86, 0x76, 0x57, 0xE9,
-        0x8A, 0x36, 0x20, 0xE9,
-        0x87, 0x77, 0x57, 0xE9,
-        0x8B, 0x3E, 0xBF, 0xEA,
-        0x80, 0x30, 0x57, 0xE9,
-        0x81, 0x38, 0x57, 0xE9,
-        0x82, 0x31, 0x57, 0xE9,
-        0x86, 0x78, 0x57, 0xE9,
-        0x83, 0x39, 0x57, 0xE9,
-        0x87, 0x79, 0x57, 0xE9,
-        0x30, 0x1F, 0x5F, 0xE9,
-        0x8A, 0x34, 0x20, 0xE9,
-        0x8B, 0x3C, 0x20, 0xE9,
-        0x37, 0x50, 0x60, 0xBD,
-        0x57, 0x0D, 0x20, 0xE9,
-        0x35, 0x51, 0x61, 0xBD,
-        0x2B, 0x50, 0x20, 0xE9,
-        0x1D, 0x37, 0xE1, 0xEA,
-        0x1E, 0x35, 0xE1, 0xEA,
-        0x00, 0xE0,
-        0x0E, 0x77,
-        0x24, 0x51, 0x20, 0xE9,
-        0x9B, 0xFF, 0x20, 0xEA,
-        0x16, 0x0E, 0x20, 0xE9,
-        0x57, 0x2E, 0xBF, 0xEA,
-        0x0B, 0x46, 0xA0, 0xE8,
-        0x1B, 0x56, 0xA0, 0xE8,
-        0x2B, 0x66, 0xA0, 0xE8,
-        0x0C, 0x47, 0xA0, 0xE8,
-        0x1C, 0x57, 0xA0, 0xE8,
-        0x2C, 0x67, 0xA0, 0xE8,
-        0x0B, 0x00,
-        0x1B, 0x00,
-        0x2B, 0x00,
-        0x00, 0xE0,
-        0x0C, 0x00,
-        0x1C, 0x00,
-        0x2C, 0x00,
-        0x00, 0xE0,
-        0x0B, 0x65,
-        0x1B, 0x65,
-        0x2B, 0x65,
-        0x00, 0xE0,
-        0x0C, 0x65,
-        0x1C, 0x65,
-        0x2C, 0x65,
-        0x00, 0xE0,
-        0x0B, 0x1B, 0x60, 0xEC,
-        0x36, 0xD7, 0x36, 0xAD,
-        0x2B, 0x80, 0x60, 0xEC,
-        0x0C, 0x1C, 0x60, 0xEC,
-        0x3E, 0xD7, 0x3E, 0xAD,
-        0x2C, 0x80, 0x60, 0xEC,
-        0x0B, 0x2B, 0xDE, 0xE8,
-        0x1B, 0x80, 0xDE, 0xE8,
-        0x36, 0x80, 0x36, 0xBD,
-        0x3E, 0x80, 0x3E, 0xBD,
-        0x33, 0xD7, 0x0B, 0xBD,
-        0x3B, 0xD7, 0x1B, 0xBD,
-        0x46, 0x80, 0x46, 0xCF,
-        0x57, 0x80, 0x57, 0xCF,
-        0x66, 0x33, 0x66, 0xCF,
-        0x47, 0x3B, 0x47, 0xCF,
-        0x56, 0x33, 0x56, 0xCF,
-        0x67, 0x3B, 0x67, 0xCF,
-        0x0B, 0x48, 0xA0, 0xE8,
-        0x1B, 0x58, 0xA0, 0xE8,
-        0x2B, 0x68, 0xA0, 0xE8,
-        0x0C, 0x49, 0xA0, 0xE8,
-        0x1C, 0x59, 0xA0, 0xE8,
-        0x2C, 0x69, 0xA0, 0xE8,
-        0x0B, 0x00,
-        0x1B, 0x00,
-        0x2B, 0x00,
-        0x00, 0xE0,
-        0x0C, 0x00,
-        0x1C, 0x00,
-        0x2C, 0x00,
-        0x00, 0xE0,
-        0x0B, 0x65,
-        0x1B, 0x65,
-        0x2B, 0x65,
-        0x00, 0xE0,
-        0x0C, 0x65,
-        0x1C, 0x65,
-        0x2C, 0x65,
-        0x00, 0xE0,
-        0x0B, 0x1B, 0x60, 0xEC,
-        0x34, 0xD7, 0x34, 0xAD,
-        0x2B, 0x80, 0x60, 0xEC,
-        0x0C, 0x1C, 0x60, 0xEC,
-        0x3C, 0xD7, 0x3C, 0xAD,
-        0x2C, 0x80, 0x60, 0xEC,
-        0x0B, 0x2B, 0xDE, 0xE8,
-        0x1B, 0x80, 0xDE, 0xE8,
-        0x34, 0x80, 0x34, 0xBD,
-        0x3C, 0x80, 0x3C, 0xBD,
-        0x33, 0xD7, 0x0B, 0xBD,
-        0x3B, 0xD7, 0x1B, 0xBD,
-        0x48, 0x80, 0x48, 0xCF,
-        0x59, 0x80, 0x59, 0xCF,
-        0x68, 0x33, 0x68, 0xCF,
-        0x49, 0x3B, 0x49, 0xCF,
-        0xBA, 0xFF, 0x20, 0xEA,
-        0x00, 0x80, 0x00, 0xE8,
-        0x58, 0x33, 0x58, 0xCF,
-        0x69, 0x3B, 0x69, 0xCF,
-        0x79, 0xFF, 0x20, 0xEA,
-        0x57, 0xC0, 0xBF, 0xEA,
-        0x00, 0x80, 0xA0, 0xE9,
-        0x00, 0x00, 0xD8, 0xEC,
-};
-static unsigned char warp_g400_t2gzaf[] = {
-        0x00, 0x8A, 0x98, 0xE9,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0xA0, 0xE9,
-        0x00, 0x00, 0xD8, 0xEC,
-        0xFF, 0x80, 0xC0, 0xE9,
-        0x00, 0x80, 0x00, 0xE8,
-        0x0A, 0x40, 0x50, 0xBF,
-        0x2A, 0x40, 0x60, 0xBF,
-        0x32, 0x41, 0x51, 0xBF,
-        0x3A, 0x41, 0x61, 0xBF,
-        0xC3, 0x6B,
-        0xD3, 0x6B,
-        0x00, 0x8A, 0x98, 0xE9,
-        0x73, 0x7B, 0xC8, 0xEC,
-        0x96, 0xE2,
-        0x41, 0x04,
-        0x7B, 0x43, 0xA0, 0xE8,
-        0x73, 0x53, 0xA0, 0xE8,
-        0xAD, 0xEE, 0x23, 0x9F,
-        0x00, 0xE0,
-        0x51, 0x04,
-        0x90, 0xE2,
-        0x61, 0x04,
-        0x31, 0x46, 0xB1, 0xE8,
-        0x51, 0x41, 0xE0, 0xEC,
-        0x39, 0x67, 0xB1, 0xE8,
-        0x00, 0x04,
-        0x46, 0xE2,
-        0x73, 0x63, 0xA0, 0xE8,
-        0x61, 0x41, 0xE0, 0xEC,
-        0x31, 0x00,
-        0x39, 0x00,
-        0x81, 0x80, 0x15, 0xEA,
-        0x10, 0x04,
-        0x20, 0x04,
-        0x61, 0x51, 0xE0, 0xEC,
-        0x2F, 0x41, 0x60, 0xEA,
-        0x31, 0x20,
-        0x39, 0x20,
-        0x1F, 0x42, 0xA0, 0xE8,
-        0x2A, 0x42, 0x52, 0xBF,
-        0x0F, 0x52, 0xA0, 0xE8,
-        0x1A, 0x42, 0x62, 0xBF,
-        0x1E, 0x51, 0x60, 0xEA,
-        0x73, 0x7B, 0xC8, 0xEC,
-        0x0E, 0x61, 0x60, 0xEA,
-        0x32, 0x40, 0x50, 0xBD,
-        0x22, 0x40, 0x60, 0xBD,
-        0x12, 0x41, 0x51, 0xBD,
-        0x3A, 0x41, 0x61, 0xBD,
-        0xBF, 0x2F, 0x0E, 0xBD,
-        0x97, 0xE2,
-        0x7B, 0x72,
-        0x32, 0x20,
-        0x22, 0x20,
-        0x12, 0x20,
-        0x3A, 0x20,
-        0x35, 0x48, 0xB1, 0xE8,
-        0x3D, 0x59, 0xB1, 0xE8,
-        0x46, 0x31, 0x46, 0xBF,
-        0x56, 0x31, 0x56, 0xBF,
-        0xB3, 0xE2, 0x2D, 0x9F,
-        0x00, 0x80, 0x00, 0xE8,
-        0x66, 0x31, 0x66, 0xBF,
-        0x47, 0x39, 0x47, 0xBF,
-        0x57, 0x39, 0x57, 0xBF,
-        0x67, 0x39, 0x67, 0xBF,
-        0x72, 0x80, 0x07, 0xEA,
-        0x24, 0x41, 0x20, 0xE9,
-        0x35, 0x00,
-        0x3D, 0x00,
-        0x00, 0xE0,
-        0x2D, 0x73,
-        0x33, 0x72,
-        0x0C, 0xE3,
-        0x8D, 0x2F, 0x1E, 0xBD,
-        0x43, 0x75, 0xF8, 0xEC,
-        0x35, 0x20,
-        0x3D, 0x20,
-        0x43, 0x43, 0x2D, 0xDF,
-        0x53, 0x53, 0x2D, 0xDF,
-        0xAE, 0x1E, 0x0E, 0xBD,
-        0x58, 0xE3,
-        0x33, 0x66,
-        0x48, 0x35, 0x48, 0xBF,
-        0x58, 0x35, 0x58, 0xBF,
-        0x68, 0x35, 0x68, 0xBF,
-        0x49, 0x3D, 0x49, 0xBF,
-        0x59, 0x3D, 0x59, 0xBF,
-        0x69, 0x3D, 0x69, 0xBF,
-        0x63, 0x63, 0x2D, 0xDF,
-        0x4D, 0x7D, 0xF8, 0xEC,
-        0x59, 0xE3,
-        0x00, 0xE0,
-        0xB8, 0x38, 0x33, 0xBF,
-        0x2D, 0x73,
-        0x30, 0x76,
-        0x18, 0x3A, 0x41, 0xE9,
-        0x3F, 0x53, 0xA0, 0xE8,
-        0x05, 0x80, 0x3D, 0xEA,
-        0x37, 0x43, 0xA0, 0xE8,
-        0x3D, 0x63, 0xA0, 0xE8,
-        0x50, 0x70, 0xF8, 0xEC,
-        0x2B, 0x50, 0x3C, 0xE9,
-        0x1F, 0x0F, 0xBC, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x59, 0x78, 0xF8, 0xEC,
-        0x00, 0x80, 0x00, 0xE8,
-        0x15, 0xC0, 0x20, 0xE9,
-        0x15, 0xC0, 0x20, 0xE9,
-        0x15, 0xC0, 0x20, 0xE9,
-        0x15, 0xC0, 0x20, 0xE9,
-        0x1E, 0x12, 0x41, 0xE9,
-        0x1A, 0x22, 0x41, 0xE9,
-        0x46, 0x37, 0x46, 0xDF,
-        0x56, 0x3F, 0x56, 0xDF,
-        0x2B, 0x40, 0x3D, 0xE9,
-        0x66, 0x3D, 0x66, 0xDF,
-        0x1D, 0x32, 0x41, 0xE9,
-        0x67, 0x3D, 0x67, 0xDF,
-        0x47, 0x37, 0x47, 0xDF,
-        0x57, 0x3F, 0x57, 0xDF,
-        0x2A, 0x40, 0x20, 0xE9,
-        0x59, 0x3F, 0x59, 0xDF,
-        0x16, 0x30, 0x20, 0xE9,
-        0x69, 0x3D, 0x69, 0xDF,
-        0x48, 0x37, 0x48, 0xDF,
-        0x58, 0x3F, 0x58, 0xDF,
-        0x12, 0x12, 0x2D, 0xDF,
-        0x22, 0x22, 0x2D, 0xDF,
-        0x32, 0x32, 0x2D, 0xDF,
-        0x3A, 0x3A, 0x2D, 0xDF,
-        0x68, 0x3D, 0x68, 0xDF,
-        0x49, 0x37, 0x49, 0xDF,
-        0x3D, 0xCF, 0x74, 0xC0,
-        0x37, 0xCF, 0x74, 0xC4,
-        0x0A, 0x44, 0x54, 0xB0,
-        0x02, 0x44, 0x64, 0xB0,
-        0x31, 0x53, 0x2F, 0x9F,
-        0x34, 0x37, 0x20, 0xE9,
-        0x39, 0xE5, 0x2C, 0x9F,
-        0x3C, 0x3D, 0x20, 0xE9,
-        0x2A, 0x44, 0x54, 0xB2,
-        0x1A, 0x44, 0x64, 0xB2,
-        0x2E, 0x80, 0x3A, 0xEA,
-        0x0A, 0x20,
-        0x02, 0x20,
-        0x88, 0x73, 0x5E, 0xE9,
-        0x2A, 0x20,
-        0x1A, 0x20,
-        0x3D, 0xCF, 0x74, 0xC2,
-        0x0F, 0xCF, 0x74, 0xC6,
-        0x30, 0x50, 0x2E, 0x9F,
-        0x32, 0x31, 0x5F, 0xE9,
-        0x38, 0x21, 0x2C, 0x9F,
-        0x33, 0x39, 0x5F, 0xE9,
-        0x31, 0x53, 0x2F, 0x9F,
-        0x9C, 0x0F, 0x20, 0xE9,
-        0x0A, 0x44, 0x54, 0xB4,
-        0x02, 0x44, 0x64, 0xB4,
-        0x2A, 0x44, 0x54, 0xB6,
-        0x1A, 0x44, 0x64, 0xB6,
-        0x39, 0xE5, 0x2C, 0x9F,
-        0x38, 0x3D, 0x20, 0xE9,
-        0x0A, 0x20,
-        0x02, 0x20,
-        0x2A, 0x20,
-        0x1A, 0x20,
-        0x3D, 0xCF, 0x75, 0xC6,
-        0x00, 0x80, 0x00, 0xE8,
-        0x30, 0x50, 0x2E, 0x9F,
-        0x3E, 0x30, 0x4F, 0xE9,
-        0x38, 0x21, 0x2C, 0x9F,
-        0x3F, 0x38, 0x4F, 0xE9,
-        0x0A, 0x45, 0x55, 0xB6,
-        0x02, 0x45, 0x65, 0xB6,
-        0x31, 0x53, 0x2F, 0x9F,
-        0x3A, 0x31, 0x4F, 0xE9,
-        0x39, 0xE5, 0x2C, 0x9F,
-        0x3B, 0x39, 0x4F, 0xE9,
-        0x31, 0x3D, 0x20, 0xE9,
-        0x0A, 0x20,
-        0x02, 0x20,
-        0x2A, 0x46, 0x56, 0xBF,
-        0x1A, 0x46, 0x66, 0xBF,
-        0x0A, 0x47, 0x57, 0xBF,
-        0x02, 0x47, 0x67, 0xBF,
-        0x30, 0x50, 0x2E, 0x9F,
-        0x36, 0x30, 0x4F, 0xE9,
-        0x38, 0x21, 0x2C, 0x9F,
-        0x37, 0x38, 0x4F, 0xE9,
-        0x31, 0x53, 0x2F, 0x9F,
-        0x9D, 0x31, 0x4F, 0xE9,
-        0x39, 0xE5, 0x2C, 0x9F,
-        0x9E, 0x39, 0x4F, 0xE9,
-        0x2A, 0x43, 0x53, 0xBF,
-        0x1A, 0x43, 0x63, 0xBF,
-        0x30, 0x50, 0x2E, 0x9F,
-        0x35, 0x30, 0x4F, 0xE9,
-        0x38, 0x21, 0x2C, 0x9F,
-        0x39, 0x38, 0x4F, 0xE9,
-        0x0A, 0x48, 0x58, 0xBF,
-        0x02, 0x48, 0x68, 0xBF,
-        0x31, 0x53, 0x2F, 0x9F,
-        0x80, 0x31, 0x57, 0xE9,
-        0x39, 0xE5, 0x2C, 0x9F,
-        0x81, 0x39, 0x57, 0xE9,
-        0x2A, 0x49, 0x59, 0xBF,
-        0x1A, 0x49, 0x69, 0xBF,
-        0x30, 0x50, 0x2E, 0x9F,
-        0x82, 0x30, 0x57, 0xE9,
-        0x38, 0x21, 0x2C, 0x9F,
-        0x83, 0x38, 0x57, 0xE9,
-        0x31, 0x53, 0x2F, 0x9F,
-        0x84, 0x31, 0x5E, 0xE9,
-        0x39, 0xE5, 0x2C, 0x9F,
-        0x85, 0x39, 0x5E, 0xE9,
-        0x86, 0x76, 0x57, 0xE9,
-        0x8A, 0x36, 0x20, 0xE9,
-        0x87, 0x77, 0x57, 0xE9,
-        0x8B, 0x3E, 0xBF, 0xEA,
-        0x80, 0x30, 0x57, 0xE9,
-        0x81, 0x38, 0x57, 0xE9,
-        0x82, 0x31, 0x57, 0xE9,
-        0x86, 0x78, 0x57, 0xE9,
-        0x83, 0x39, 0x57, 0xE9,
-        0x87, 0x79, 0x57, 0xE9,
-        0x30, 0x1F, 0x5F, 0xE9,
-        0x8A, 0x34, 0x20, 0xE9,
-        0x8B, 0x3C, 0x20, 0xE9,
-        0x37, 0x50, 0x60, 0xBD,
-        0x57, 0x0D, 0x20, 0xE9,
-        0x35, 0x51, 0x61, 0xBD,
-        0x2B, 0x50, 0x20, 0xE9,
-        0x1D, 0x37, 0xE1, 0xEA,
-        0x1E, 0x35, 0xE1, 0xEA,
-        0x00, 0xE0,
-        0x0E, 0x77,
-        0x24, 0x51, 0x20, 0xE9,
-        0x96, 0xFF, 0x20, 0xEA,
-        0x16, 0x0E, 0x20, 0xE9,
-        0x57, 0x2E, 0xBF, 0xEA,
-        0x0B, 0x46, 0xA0, 0xE8,
-        0x1B, 0x56, 0xA0, 0xE8,
-        0x2B, 0x66, 0xA0, 0xE8,
-        0x0C, 0x47, 0xA0, 0xE8,
-        0x1C, 0x57, 0xA0, 0xE8,
-        0x2C, 0x67, 0xA0, 0xE8,
-        0x0B, 0x00,
-        0x1B, 0x00,
-        0x2B, 0x00,
-        0x00, 0xE0,
-        0x0C, 0x00,
-        0x1C, 0x00,
-        0x2C, 0x00,
-        0x00, 0xE0,
-        0x0B, 0x65,
-        0x1B, 0x65,
-        0x2B, 0x65,
-        0x00, 0xE0,
-        0x0C, 0x65,
-        0x1C, 0x65,
-        0x2C, 0x65,
-        0x00, 0xE0,
-        0x0B, 0x1B, 0x60, 0xEC,
-        0x36, 0xD7, 0x36, 0xAD,
-        0x2B, 0x80, 0x60, 0xEC,
-        0x0C, 0x1C, 0x60, 0xEC,
-        0x3E, 0xD7, 0x3E, 0xAD,
-        0x2C, 0x80, 0x60, 0xEC,
-        0x0B, 0x2B, 0xDE, 0xE8,
-        0x1B, 0x80, 0xDE, 0xE8,
-        0x36, 0x80, 0x36, 0xBD,
-        0x3E, 0x80, 0x3E, 0xBD,
-        0x33, 0xD7, 0x0B, 0xBD,
-        0x3B, 0xD7, 0x1B, 0xBD,
-        0x46, 0x80, 0x46, 0xCF,
-        0x57, 0x80, 0x57, 0xCF,
-        0x66, 0x33, 0x66, 0xCF,
-        0x47, 0x3B, 0x47, 0xCF,
-        0x56, 0x33, 0x56, 0xCF,
-        0x67, 0x3B, 0x67, 0xCF,
-        0x0B, 0x48, 0xA0, 0xE8,
-        0x1B, 0x58, 0xA0, 0xE8,
-        0x2B, 0x68, 0xA0, 0xE8,
-        0x0C, 0x49, 0xA0, 0xE8,
-        0x1C, 0x59, 0xA0, 0xE8,
-        0x2C, 0x69, 0xA0, 0xE8,
-        0x0B, 0x00,
-        0x1B, 0x00,
-        0x2B, 0x00,
-        0x00, 0xE0,
-        0x0C, 0x00,
-        0x1C, 0x00,
-        0x2C, 0x00,
-        0x00, 0xE0,
-        0x0B, 0x65,
-        0x1B, 0x65,
-        0x2B, 0x65,
-        0x00, 0xE0,
-        0x0C, 0x65,
-        0x1C, 0x65,
-        0x2C, 0x65,
-        0x00, 0xE0,
-        0x0B, 0x1B, 0x60, 0xEC,
-        0x34, 0xD7, 0x34, 0xAD,
-        0x2B, 0x80, 0x60, 0xEC,
-        0x0C, 0x1C, 0x60, 0xEC,
-        0x3C, 0xD7, 0x3C, 0xAD,
-        0x2C, 0x80, 0x60, 0xEC,
-        0x0B, 0x2B, 0xDE, 0xE8,
-        0x1B, 0x80, 0xDE, 0xE8,
-        0x34, 0x80, 0x34, 0xBD,
-        0x3C, 0x80, 0x3C, 0xBD,
-        0x33, 0xD7, 0x0B, 0xBD,
-        0x3B, 0xD7, 0x1B, 0xBD,
-        0x48, 0x80, 0x48, 0xCF,
-        0x59, 0x80, 0x59, 0xCF,
-        0x68, 0x33, 0x68, 0xCF,
-        0x49, 0x3B, 0x49, 0xCF,
-        0xB5, 0xFF, 0x20, 0xEA,
-        0x00, 0x80, 0x00, 0xE8,
-        0x58, 0x33, 0x58, 0xCF,
-        0x69, 0x3B, 0x69, 0xCF,
-        0x74, 0xFF, 0x20, 0xEA,
-        0x57, 0xC0, 0xBF, 0xEA,
-        0x00, 0x80, 0xA0, 0xE9,
-        0x00, 0x00, 0xD8, 0xEC,
-};
-static unsigned char warp_g400_t2gzf[] = {
-        0x00, 0x8A, 0x98, 0xE9,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0xA0, 0xE9,
-        0x00, 0x00, 0xD8, 0xEC,
-        0xFF, 0x80, 0xC0, 0xE9,
-        0x00, 0x80, 0x00, 0xE8,
-        0x0A, 0x40, 0x50, 0xBF,
-        0x2A, 0x40, 0x60, 0xBF,
-        0x32, 0x41, 0x51, 0xBF,
-        0x3A, 0x41, 0x61, 0xBF,
-        0xC3, 0x6B,
-        0xD3, 0x6B,
-        0x00, 0x8A, 0x98, 0xE9,
-        0x73, 0x7B, 0xC8, 0xEC,
-        0x96, 0xE2,
-        0x41, 0x04,
-        0x7B, 0x43, 0xA0, 0xE8,
-        0x73, 0x53, 0xA0, 0xE8,
-        0xAD, 0xEE, 0x23, 0x9F,
-        0x00, 0xE0,
-        0x51, 0x04,
-        0x90, 0xE2,
-        0x61, 0x04,
-        0x31, 0x46, 0xB1, 0xE8,
-        0x51, 0x41, 0xE0, 0xEC,
-        0x39, 0x67, 0xB1, 0xE8,
-        0x00, 0x04,
-        0x46, 0xE2,
-        0x73, 0x63, 0xA0, 0xE8,
-        0x61, 0x41, 0xE0, 0xEC,
-        0x31, 0x00,
-        0x39, 0x00,
-        0x7D, 0x80, 0x15, 0xEA,
-        0x10, 0x04,
-        0x20, 0x04,
-        0x61, 0x51, 0xE0, 0xEC,
-        0x2F, 0x41, 0x60, 0xEA,
-        0x31, 0x20,
-        0x39, 0x20,
-        0x1F, 0x42, 0xA0, 0xE8,
-        0x2A, 0x42, 0x52, 0xBF,
-        0x0F, 0x52, 0xA0, 0xE8,
-        0x1A, 0x42, 0x62, 0xBF,
-        0x1E, 0x51, 0x60, 0xEA,
-        0x73, 0x7B, 0xC8, 0xEC,
-        0x0E, 0x61, 0x60, 0xEA,
-        0x32, 0x40, 0x50, 0xBD,
-        0x22, 0x40, 0x60, 0xBD,
-        0x12, 0x41, 0x51, 0xBD,
-        0x3A, 0x41, 0x61, 0xBD,
-        0xBF, 0x2F, 0x0E, 0xBD,
-        0x97, 0xE2,
-        0x7B, 0x72,
-        0x32, 0x20,
-        0x22, 0x20,
-        0x12, 0x20,
-        0x3A, 0x20,
-        0x35, 0x48, 0xB1, 0xE8,
-        0x3D, 0x59, 0xB1, 0xE8,
-        0x46, 0x31, 0x46, 0xBF,
-        0x56, 0x31, 0x56, 0xBF,
-        0xB3, 0xE2, 0x2D, 0x9F,
-        0x00, 0x80, 0x00, 0xE8,
-        0x66, 0x31, 0x66, 0xBF,
-        0x47, 0x39, 0x47, 0xBF,
-        0x57, 0x39, 0x57, 0xBF,
-        0x67, 0x39, 0x67, 0xBF,
-        0x6E, 0x80, 0x07, 0xEA,
-        0x24, 0x41, 0x20, 0xE9,
-        0x35, 0x00,
-        0x3D, 0x00,
-        0x00, 0xE0,
-        0x2D, 0x73,
-        0x33, 0x72,
-        0x0C, 0xE3,
-        0x8D, 0x2F, 0x1E, 0xBD,
-        0x43, 0x75, 0xF8, 0xEC,
-        0x35, 0x20,
-        0x3D, 0x20,
-        0x43, 0x43, 0x2D, 0xDF,
-        0x53, 0x53, 0x2D, 0xDF,
-        0xAE, 0x1E, 0x0E, 0xBD,
-        0x58, 0xE3,
-        0x33, 0x66,
-        0x48, 0x35, 0x48, 0xBF,
-        0x58, 0x35, 0x58, 0xBF,
-        0x68, 0x35, 0x68, 0xBF,
-        0x49, 0x3D, 0x49, 0xBF,
-        0x59, 0x3D, 0x59, 0xBF,
-        0x69, 0x3D, 0x69, 0xBF,
-        0x63, 0x63, 0x2D, 0xDF,
-        0x4D, 0x7D, 0xF8, 0xEC,
-        0x59, 0xE3,
-        0x00, 0xE0,
-        0xB8, 0x38, 0x33, 0xBF,
-        0x2D, 0x73,
-        0x30, 0x76,
-        0x18, 0x3A, 0x41, 0xE9,
-        0x3F, 0x53, 0xA0, 0xE8,
-        0x05, 0x80, 0x3D, 0xEA,
-        0x37, 0x43, 0xA0, 0xE8,
-        0x3D, 0x63, 0xA0, 0xE8,
-        0x50, 0x70, 0xF8, 0xEC,
-        0x2B, 0x50, 0x3C, 0xE9,
-        0x1F, 0x0F, 0xBC, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x59, 0x78, 0xF8, 0xEC,
-        0x00, 0x80, 0x00, 0xE8,
-        0x15, 0xC0, 0x20, 0xE9,
-        0x15, 0xC0, 0x20, 0xE9,
-        0x15, 0xC0, 0x20, 0xE9,
-        0x15, 0xC0, 0x20, 0xE9,
-        0x1E, 0x12, 0x41, 0xE9,
-        0x1A, 0x22, 0x41, 0xE9,
-        0x46, 0x37, 0x46, 0xDF,
-        0x56, 0x3F, 0x56, 0xDF,
-        0x2B, 0x40, 0x3D, 0xE9,
-        0x66, 0x3D, 0x66, 0xDF,
-        0x1D, 0x32, 0x41, 0xE9,
-        0x67, 0x3D, 0x67, 0xDF,
-        0x47, 0x37, 0x47, 0xDF,
-        0x57, 0x3F, 0x57, 0xDF,
-        0x2A, 0x40, 0x20, 0xE9,
-        0x59, 0x3F, 0x59, 0xDF,
-        0x16, 0x30, 0x20, 0xE9,
-        0x69, 0x3D, 0x69, 0xDF,
-        0x48, 0x37, 0x48, 0xDF,
-        0x58, 0x3F, 0x58, 0xDF,
-        0x12, 0x12, 0x2D, 0xDF,
-        0x22, 0x22, 0x2D, 0xDF,
-        0x32, 0x32, 0x2D, 0xDF,
-        0x3A, 0x3A, 0x2D, 0xDF,
-        0x68, 0x3D, 0x68, 0xDF,
-        0x49, 0x37, 0x49, 0xDF,
-        0x3D, 0xCF, 0x74, 0xC0,
-        0x37, 0xCF, 0x74, 0xC4,
-        0x39, 0xE5, 0x2C, 0x9F,
-        0x34, 0x80, 0x20, 0xE9,
-        0x31, 0x53, 0x2F, 0x9F,
-        0x00, 0x80, 0x00, 0xE8,
-        0x88, 0x73, 0x5E, 0xE9,
-        0x00, 0x80, 0x00, 0xE8,
-        0x0F, 0xCF, 0x75, 0xC6,
-        0x3C, 0x3D, 0x20, 0xE9,
-        0x0A, 0x44, 0x54, 0xB0,
-        0x02, 0x44, 0x64, 0xB0,
-        0x2A, 0x44, 0x54, 0xB2,
-        0x1A, 0x44, 0x64, 0xB2,
-        0x28, 0x80, 0x3A, 0xEA,
-        0x0A, 0x20,
-        0x02, 0x20,
-        0x3D, 0xCF, 0x74, 0xC2,
-        0x2A, 0x20,
-        0x1A, 0x20,
-        0x30, 0x50, 0x2E, 0x9F,
-        0x32, 0x31, 0x5F, 0xE9,
-        0x38, 0x21, 0x2C, 0x9F,
-        0x33, 0x39, 0x5F, 0xE9,
-        0x31, 0x53, 0x2F, 0x9F,
-        0x31, 0x0F, 0x20, 0xE9,
-        0x0A, 0x44, 0x54, 0xB4,
-        0x02, 0x44, 0x64, 0xB4,
-        0x2A, 0x45, 0x55, 0xB6,
-        0x1A, 0x45, 0x65, 0xB6,
-        0x39, 0xE5, 0x2C, 0x9F,
-        0x38, 0x3D, 0x20, 0xE9,
-        0x0A, 0x20,
-        0x02, 0x20,
-        0x2A, 0x20,
-        0x1A, 0x20,
-        0x0A, 0x47, 0x57, 0xBF,
-        0x02, 0x47, 0x67, 0xBF,
-        0x30, 0x50, 0x2E, 0x9F,
-        0x3E, 0x30, 0x4F, 0xE9,
-        0x38, 0x21, 0x2C, 0x9F,
-        0x3F, 0x38, 0x4F, 0xE9,
-        0x2A, 0x46, 0x56, 0xBF,
-        0x1A, 0x46, 0x66, 0xBF,
-        0x31, 0x53, 0x2F, 0x9F,
-        0x3A, 0x31, 0x4F, 0xE9,
-        0x39, 0xE5, 0x2C, 0x9F,
-        0x3B, 0x39, 0x4F, 0xE9,
-        0x31, 0x53, 0x2F, 0x9F,
-        0x36, 0x30, 0x4F, 0xE9,
-        0x39, 0xE5, 0x2C, 0x9F,
-        0x37, 0x38, 0x4F, 0xE9,
-        0x2A, 0x43, 0x53, 0xBF,
-        0x1A, 0x43, 0x63, 0xBF,
-        0x30, 0x50, 0x2E, 0x9F,
-        0x35, 0x31, 0x4F, 0xE9,
-        0x38, 0x21, 0x2C, 0x9F,
-        0x39, 0x39, 0x4F, 0xE9,
-        0x0A, 0x48, 0x58, 0xBF,
-        0x02, 0x48, 0x68, 0xBF,
-        0x31, 0x53, 0x2F, 0x9F,
-        0x80, 0x31, 0x57, 0xE9,
-        0x39, 0xE5, 0x2C, 0x9F,
-        0x81, 0x39, 0x57, 0xE9,
-        0x2A, 0x49, 0x59, 0xBF,
-        0x1A, 0x49, 0x69, 0xBF,
-        0x30, 0x50, 0x2E, 0x9F,
-        0x82, 0x30, 0x57, 0xE9,
-        0x38, 0x21, 0x2C, 0x9F,
-        0x83, 0x38, 0x57, 0xE9,
-        0x31, 0x53, 0x2F, 0x9F,
-        0x84, 0x31, 0x5E, 0xE9,
-        0x39, 0xE5, 0x2C, 0x9F,
-        0x85, 0x39, 0x5E, 0xE9,
-        0x86, 0x76, 0x57, 0xE9,
-        0x8A, 0x36, 0x20, 0xE9,
-        0x87, 0x77, 0x57, 0xE9,
-        0x8B, 0x3E, 0xBF, 0xEA,
-        0x80, 0x30, 0x57, 0xE9,
-        0x81, 0x38, 0x57, 0xE9,
-        0x82, 0x31, 0x57, 0xE9,
-        0x86, 0x78, 0x57, 0xE9,
-        0x83, 0x39, 0x57, 0xE9,
-        0x87, 0x79, 0x57, 0xE9,
-        0x30, 0x1F, 0x5F, 0xE9,
-        0x8A, 0x34, 0x20, 0xE9,
-        0x8B, 0x3C, 0x20, 0xE9,
-        0x37, 0x50, 0x60, 0xBD,
-        0x57, 0x0D, 0x20, 0xE9,
-        0x35, 0x51, 0x61, 0xBD,
-        0x2B, 0x50, 0x20, 0xE9,
-        0x1D, 0x37, 0xE1, 0xEA,
-        0x1E, 0x35, 0xE1, 0xEA,
-        0x00, 0xE0,
-        0x0E, 0x77,
-        0x24, 0x51, 0x20, 0xE9,
-        0x9A, 0xFF, 0x20, 0xEA,
-        0x16, 0x0E, 0x20, 0xE9,
-        0x57, 0x2E, 0xBF, 0xEA,
-        0x0B, 0x46, 0xA0, 0xE8,
-        0x1B, 0x56, 0xA0, 0xE8,
-        0x2B, 0x66, 0xA0, 0xE8,
-        0x0C, 0x47, 0xA0, 0xE8,
-        0x1C, 0x57, 0xA0, 0xE8,
-        0x2C, 0x67, 0xA0, 0xE8,
-        0x0B, 0x00,
-        0x1B, 0x00,
-        0x2B, 0x00,
-        0x00, 0xE0,
-        0x0C, 0x00,
-        0x1C, 0x00,
-        0x2C, 0x00,
-        0x00, 0xE0,
-        0x0B, 0x65,
-        0x1B, 0x65,
-        0x2B, 0x65,
-        0x00, 0xE0,
-        0x0C, 0x65,
-        0x1C, 0x65,
-        0x2C, 0x65,
-        0x00, 0xE0,
-        0x0B, 0x1B, 0x60, 0xEC,
-        0x36, 0xD7, 0x36, 0xAD,
-        0x2B, 0x80, 0x60, 0xEC,
-        0x0C, 0x1C, 0x60, 0xEC,
-        0x3E, 0xD7, 0x3E, 0xAD,
-        0x2C, 0x80, 0x60, 0xEC,
-        0x0B, 0x2B, 0xDE, 0xE8,
-        0x1B, 0x80, 0xDE, 0xE8,
-        0x36, 0x80, 0x36, 0xBD,
-        0x3E, 0x80, 0x3E, 0xBD,
-        0x33, 0xD7, 0x0B, 0xBD,
-        0x3B, 0xD7, 0x1B, 0xBD,
-        0x46, 0x80, 0x46, 0xCF,
-        0x57, 0x80, 0x57, 0xCF,
-        0x66, 0x33, 0x66, 0xCF,
-        0x47, 0x3B, 0x47, 0xCF,
-        0x56, 0x33, 0x56, 0xCF,
-        0x67, 0x3B, 0x67, 0xCF,
-        0x0B, 0x48, 0xA0, 0xE8,
-        0x1B, 0x58, 0xA0, 0xE8,
-        0x2B, 0x68, 0xA0, 0xE8,
-        0x0C, 0x49, 0xA0, 0xE8,
-        0x1C, 0x59, 0xA0, 0xE8,
-        0x2C, 0x69, 0xA0, 0xE8,
-        0x0B, 0x00,
-        0x1B, 0x00,
-        0x2B, 0x00,
-        0x00, 0xE0,
-        0x0C, 0x00,
-        0x1C, 0x00,
-        0x2C, 0x00,
-        0x00, 0xE0,
-        0x0B, 0x65,
-        0x1B, 0x65,
-        0x2B, 0x65,
-        0x00, 0xE0,
-        0x0C, 0x65,
-        0x1C, 0x65,
-        0x2C, 0x65,
-        0x00, 0xE0,
-        0x0B, 0x1B, 0x60, 0xEC,
-        0x34, 0xD7, 0x34, 0xAD,
-        0x2B, 0x80, 0x60, 0xEC,
-        0x0C, 0x1C, 0x60, 0xEC,
-        0x3C, 0xD7, 0x3C, 0xAD,
-        0x2C, 0x80, 0x60, 0xEC,
-        0x0B, 0x2B, 0xDE, 0xE8,
-        0x1B, 0x80, 0xDE, 0xE8,
-        0x34, 0x80, 0x34, 0xBD,
-        0x3C, 0x80, 0x3C, 0xBD,
-        0x33, 0xD7, 0x0B, 0xBD,
-        0x3B, 0xD7, 0x1B, 0xBD,
-        0x48, 0x80, 0x48, 0xCF,
-        0x59, 0x80, 0x59, 0xCF,
-        0x68, 0x33, 0x68, 0xCF,
-        0x49, 0x3B, 0x49, 0xCF,
-        0xBB, 0xFF, 0x20, 0xEA,
-        0x00, 0x80, 0x00, 0xE8,
-        0x58, 0x33, 0x58, 0xCF,
-        0x69, 0x3B, 0x69, 0xCF,
-        0x78, 0xFF, 0x20, 0xEA,
-        0x57, 0xC0, 0xBF, 0xEA,
-        0x00, 0x80, 0xA0, 0xE9,
-        0x00, 0x00, 0xD8, 0xEC,
-};
-static unsigned char warp_g400_t2gzs[] = {
-        0x00, 0x8A, 0x98, 0xE9,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0xA0, 0xE9,
-        0x00, 0x00, 0xD8, 0xEC,
-        0xFF, 0x80, 0xC0, 0xE9,
-        0x00, 0x80, 0x00, 0xE8,
-        0x0A, 0x40, 0x50, 0xBF,
-        0x2A, 0x40, 0x60, 0xBF,
-        0x32, 0x41, 0x51, 0xBF,
-        0x3A, 0x41, 0x61, 0xBF,
-        0xC3, 0x6B,
-        0xD3, 0x6B,
-        0x00, 0x8A, 0x98, 0xE9,
-        0x73, 0x7B, 0xC8, 0xEC,
-        0x96, 0xE2,
-        0x41, 0x04,
-        0x7B, 0x43, 0xA0, 0xE8,
-        0x73, 0x53, 0xA0, 0xE8,
-        0xAD, 0xEE, 0x23, 0x9F,
-        0x00, 0xE0,
-        0x51, 0x04,
-        0x90, 0xE2,
-        0x61, 0x04,
-        0x31, 0x46, 0xB1, 0xE8,
-        0x51, 0x41, 0xE0, 0xEC,
-        0x39, 0x67, 0xB1, 0xE8,
-        0x00, 0x04,
-        0x46, 0xE2,
-        0x73, 0x63, 0xA0, 0xE8,
-        0x61, 0x41, 0xE0, 0xEC,
-        0x31, 0x00,
-        0x39, 0x00,
-        0x85, 0x80, 0x15, 0xEA,
-        0x10, 0x04,
-        0x20, 0x04,
-        0x61, 0x51, 0xE0, 0xEC,
-        0x2F, 0x41, 0x60, 0xEA,
-        0x31, 0x20,
-        0x39, 0x20,
-        0x1F, 0x42, 0xA0, 0xE8,
-        0x2A, 0x42, 0x52, 0xBF,
-        0x0F, 0x52, 0xA0, 0xE8,
-        0x1A, 0x42, 0x62, 0xBF,
-        0x1E, 0x51, 0x60, 0xEA,
-        0x73, 0x7B, 0xC8, 0xEC,
-        0x0E, 0x61, 0x60, 0xEA,
-        0x32, 0x40, 0x50, 0xBD,
-        0x22, 0x40, 0x60, 0xBD,
-        0x12, 0x41, 0x51, 0xBD,
-        0x3A, 0x41, 0x61, 0xBD,
-        0xBF, 0x2F, 0x0E, 0xBD,
-        0x97, 0xE2,
-        0x7B, 0x72,
-        0x32, 0x20,
-        0x22, 0x20,
-        0x12, 0x20,
-        0x3A, 0x20,
-        0x35, 0x48, 0xB1, 0xE8,
-        0x3D, 0x59, 0xB1, 0xE8,
-        0x46, 0x31, 0x46, 0xBF,
-        0x56, 0x31, 0x56, 0xBF,
-        0xB3, 0xE2, 0x2D, 0x9F,
-        0x00, 0x80, 0x00, 0xE8,
-        0x66, 0x31, 0x66, 0xBF,
-        0x47, 0x39, 0x47, 0xBF,
-        0x57, 0x39, 0x57, 0xBF,
-        0x67, 0x39, 0x67, 0xBF,
-        0x76, 0x80, 0x07, 0xEA,
-        0x24, 0x41, 0x20, 0xE9,
-        0x35, 0x00,
-        0x3D, 0x00,
-        0x00, 0xE0,
-        0x2D, 0x73,
-        0x33, 0x72,
-        0x0C, 0xE3,
-        0x8D, 0x2F, 0x1E, 0xBD,
-        0x43, 0x75, 0xF8, 0xEC,
-        0x35, 0x20,
-        0x3D, 0x20,
-        0x43, 0x43, 0x2D, 0xDF,
-        0x53, 0x53, 0x2D, 0xDF,
-        0xAE, 0x1E, 0x0E, 0xBD,
-        0x58, 0xE3,
-        0x33, 0x66,
-        0x48, 0x35, 0x48, 0xBF,
-        0x58, 0x35, 0x58, 0xBF,
-        0x68, 0x35, 0x68, 0xBF,
-        0x49, 0x3D, 0x49, 0xBF,
-        0x59, 0x3D, 0x59, 0xBF,
-        0x69, 0x3D, 0x69, 0xBF,
-        0x63, 0x63, 0x2D, 0xDF,
-        0x4D, 0x7D, 0xF8, 0xEC,
-        0x59, 0xE3,
-        0x00, 0xE0,
-        0xB8, 0x38, 0x33, 0xBF,
-        0x2D, 0x73,
-        0x30, 0x76,
-        0x18, 0x3A, 0x41, 0xE9,
-        0x3F, 0x53, 0xA0, 0xE8,
-        0x05, 0x80, 0x3D, 0xEA,
-        0x37, 0x43, 0xA0, 0xE8,
-        0x3D, 0x63, 0xA0, 0xE8,
-        0x50, 0x70, 0xF8, 0xEC,
-        0x2B, 0x50, 0x3C, 0xE9,
-        0x1F, 0x0F, 0xBC, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x59, 0x78, 0xF8, 0xEC,
-        0x00, 0x80, 0x00, 0xE8,
-        0x15, 0xC0, 0x20, 0xE9,
-        0x15, 0xC0, 0x20, 0xE9,
-        0x15, 0xC0, 0x20, 0xE9,
-        0x15, 0xC0, 0x20, 0xE9,
-        0x1E, 0x12, 0x41, 0xE9,
-        0x1A, 0x22, 0x41, 0xE9,
-        0x46, 0x37, 0x46, 0xDF,
-        0x56, 0x3F, 0x56, 0xDF,
-        0x2B, 0x40, 0x3D, 0xE9,
-        0x66, 0x3D, 0x66, 0xDF,
-        0x1D, 0x32, 0x41, 0xE9,
-        0x67, 0x3D, 0x67, 0xDF,
-        0x47, 0x37, 0x47, 0xDF,
-        0x57, 0x3F, 0x57, 0xDF,
-        0x2A, 0x40, 0x20, 0xE9,
-        0x59, 0x3F, 0x59, 0xDF,
-        0x16, 0x30, 0x20, 0xE9,
-        0x69, 0x3D, 0x69, 0xDF,
-        0x48, 0x37, 0x48, 0xDF,
-        0x58, 0x3F, 0x58, 0xDF,
-        0x68, 0x3D, 0x68, 0xDF,
-        0x49, 0x37, 0x49, 0xDF,
-        0x32, 0x32, 0x2D, 0xDF,
-        0x22, 0x22, 0x2D, 0xDF,
-        0x12, 0x12, 0x2D, 0xDF,
-        0x3A, 0x3A, 0x2D, 0xDF,
-        0x0F, 0xCF, 0x74, 0xC2,
-        0x37, 0xCF, 0x74, 0xC4,
-        0x0A, 0x44, 0x54, 0xB0,
-        0x02, 0x44, 0x64, 0xB0,
-        0x3D, 0xCF, 0x74, 0xC0,
-        0x34, 0x37, 0x20, 0xE9,
-        0x31, 0x53, 0x2F, 0x9F,
-        0x38, 0x0F, 0x20, 0xE9,
-        0x39, 0xE5, 0x2C, 0x9F,
-        0x3C, 0x3D, 0x20, 0xE9,
-        0x2A, 0x44, 0x54, 0xB2,
-        0x1A, 0x44, 0x64, 0xB2,
-        0x31, 0x80, 0x3A, 0xEA,
-        0x0A, 0x20,
-        0x02, 0x20,
-        0x0F, 0xCF, 0x75, 0xC0,
-        0x2A, 0x20,
-        0x1A, 0x20,
-        0x30, 0x50, 0x2E, 0x9F,
-        0x32, 0x31, 0x5F, 0xE9,
-        0x38, 0x21, 0x2C, 0x9F,
-        0x33, 0x39, 0x5F, 0xE9,
-        0x3D, 0xCF, 0x75, 0xC2,
-        0x37, 0xCF, 0x75, 0xC4,
-        0x31, 0x53, 0x2F, 0x9F,
-        0xA6, 0x0F, 0x20, 0xE9,
-        0x39, 0xE5, 0x2C, 0x9F,
-        0xA3, 0x3D, 0x20, 0xE9,
-        0x2A, 0x44, 0x54, 0xB4,
-        0x1A, 0x44, 0x64, 0xB4,
-        0x0A, 0x45, 0x55, 0xB0,
-        0x02, 0x45, 0x65, 0xB0,
-        0x88, 0x73, 0x5E, 0xE9,
-        0x2A, 0x20,
-        0x1A, 0x20,
-        0xA0, 0x37, 0x20, 0xE9,
-        0x0A, 0x20,
-        0x02, 0x20,
-        0x31, 0x53, 0x2F, 0x9F,
-        0x3E, 0x30, 0x4F, 0xE9,
-        0x39, 0xE5, 0x2C, 0x9F,
-        0x3F, 0x38, 0x4F, 0xE9,
-        0x30, 0x50, 0x2E, 0x9F,
-        0x3A, 0x31, 0x4F, 0xE9,
-        0x2A, 0x45, 0x55, 0xB2,
-        0x1A, 0x45, 0x65, 0xB2,
-        0x0A, 0x45, 0x55, 0xB4,
-        0x02, 0x45, 0x65, 0xB4,
-        0x38, 0x21, 0x2C, 0x9F,
-        0x3B, 0x39, 0x4F, 0xE9,
-        0x2A, 0x20,
-        0x1A, 0x20,
-        0x0A, 0x20,
-        0x02, 0x20,
-        0x2A, 0x46, 0x56, 0xBF,
-        0x1A, 0x46, 0x66, 0xBF,
-        0x31, 0x53, 0x2F, 0x9F,
-        0x36, 0x31, 0x4F, 0xE9,
-        0x39, 0xE5, 0x2C, 0x9F,
-        0x37, 0x39, 0x4F, 0xE9,
-        0x30, 0x50, 0x2E, 0x9F,
-        0xA7, 0x30, 0x4F, 0xE9,
-        0x38, 0x21, 0x2C, 0x9F,
-        0xA8, 0x38, 0x4F, 0xE9,
-        0x0A, 0x47, 0x57, 0xBF,
-        0x02, 0x47, 0x67, 0xBF,
-        0x31, 0x53, 0x2F, 0x9F,
-        0xA4, 0x31, 0x4F, 0xE9,
-        0x39, 0xE5, 0x2C, 0x9F,
-        0xA5, 0x39, 0x4F, 0xE9,
-        0x2A, 0x43, 0x53, 0xBF,
-        0x1A, 0x43, 0x63, 0xBF,
-        0x30, 0x50, 0x2E, 0x9F,
-        0xA1, 0x30, 0x4F, 0xE9,
-        0x38, 0x21, 0x2C, 0x9F,
-        0xA2, 0x38, 0x4F, 0xE9,
-        0x0A, 0x48, 0x58, 0xBF,
-        0x02, 0x48, 0x68, 0xBF,
-        0x31, 0x53, 0x2F, 0x9F,
-        0x80, 0x31, 0x57, 0xE9,
-        0x39, 0xE5, 0x2C, 0x9F,
-        0x81, 0x39, 0x57, 0xE9,
-        0x2A, 0x49, 0x59, 0xBF,
-        0x1A, 0x49, 0x69, 0xBF,
-        0x30, 0x50, 0x2E, 0x9F,
-        0x82, 0x30, 0x57, 0xE9,
-        0x38, 0x21, 0x2C, 0x9F,
-        0x83, 0x38, 0x57, 0xE9,
-        0x31, 0x53, 0x2F, 0x9F,
-        0x84, 0x31, 0x5E, 0xE9,
-        0x39, 0xE5, 0x2C, 0x9F,
-        0x85, 0x39, 0x5E, 0xE9,
-        0x86, 0x76, 0x57, 0xE9,
-        0x8A, 0x36, 0x20, 0xE9,
-        0x87, 0x77, 0x57, 0xE9,
-        0x8B, 0x3E, 0xBF, 0xEA,
-        0x80, 0x30, 0x57, 0xE9,
-        0x81, 0x38, 0x57, 0xE9,
-        0x82, 0x31, 0x57, 0xE9,
-        0x86, 0x78, 0x57, 0xE9,
-        0x83, 0x39, 0x57, 0xE9,
-        0x87, 0x79, 0x57, 0xE9,
-        0x30, 0x1F, 0x5F, 0xE9,
-        0x8A, 0x34, 0x20, 0xE9,
-        0x8B, 0x3C, 0x20, 0xE9,
-        0x37, 0x50, 0x60, 0xBD,
-        0x57, 0x0D, 0x20, 0xE9,
-        0x35, 0x51, 0x61, 0xBD,
-        0x2B, 0x50, 0x20, 0xE9,
-        0x1D, 0x37, 0xE1, 0xEA,
-        0x1E, 0x35, 0xE1, 0xEA,
-        0x00, 0xE0,
-        0x0E, 0x77,
-        0x24, 0x51, 0x20, 0xE9,
-        0x92, 0xFF, 0x20, 0xEA,
-        0x16, 0x0E, 0x20, 0xE9,
-        0x57, 0x2E, 0xBF, 0xEA,
-        0x0B, 0x46, 0xA0, 0xE8,
-        0x1B, 0x56, 0xA0, 0xE8,
-        0x2B, 0x66, 0xA0, 0xE8,
-        0x0C, 0x47, 0xA0, 0xE8,
-        0x1C, 0x57, 0xA0, 0xE8,
-        0x2C, 0x67, 0xA0, 0xE8,
-        0x0B, 0x00,
-        0x1B, 0x00,
-        0x2B, 0x00,
-        0x00, 0xE0,
-        0x0C, 0x00,
-        0x1C, 0x00,
-        0x2C, 0x00,
-        0x00, 0xE0,
-        0x0B, 0x65,
-        0x1B, 0x65,
-        0x2B, 0x65,
-        0x00, 0xE0,
-        0x0C, 0x65,
-        0x1C, 0x65,
-        0x2C, 0x65,
-        0x00, 0xE0,
-        0x0B, 0x1B, 0x60, 0xEC,
-        0x36, 0xD7, 0x36, 0xAD,
-        0x2B, 0x80, 0x60, 0xEC,
-        0x0C, 0x1C, 0x60, 0xEC,
-        0x3E, 0xD7, 0x3E, 0xAD,
-        0x2C, 0x80, 0x60, 0xEC,
-        0x0B, 0x2B, 0xDE, 0xE8,
-        0x1B, 0x80, 0xDE, 0xE8,
-        0x36, 0x80, 0x36, 0xBD,
-        0x3E, 0x80, 0x3E, 0xBD,
-        0x33, 0xD7, 0x0B, 0xBD,
-        0x3B, 0xD7, 0x1B, 0xBD,
-        0x46, 0x80, 0x46, 0xCF,
-        0x57, 0x80, 0x57, 0xCF,
-        0x66, 0x33, 0x66, 0xCF,
-        0x47, 0x3B, 0x47, 0xCF,
-        0x56, 0x33, 0x56, 0xCF,
-        0x67, 0x3B, 0x67, 0xCF,
-        0x0B, 0x48, 0xA0, 0xE8,
-        0x1B, 0x58, 0xA0, 0xE8,
-        0x2B, 0x68, 0xA0, 0xE8,
-        0x0C, 0x49, 0xA0, 0xE8,
-        0x1C, 0x59, 0xA0, 0xE8,
-        0x2C, 0x69, 0xA0, 0xE8,
-        0x0B, 0x00,
-        0x1B, 0x00,
-        0x2B, 0x00,
-        0x00, 0xE0,
-        0x0C, 0x00,
-        0x1C, 0x00,
-        0x2C, 0x00,
-        0x00, 0xE0,
-        0x0B, 0x65,
-        0x1B, 0x65,
-        0x2B, 0x65,
-        0x00, 0xE0,
-        0x0C, 0x65,
-        0x1C, 0x65,
-        0x2C, 0x65,
-        0x00, 0xE0,
-        0x0B, 0x1B, 0x60, 0xEC,
-        0x34, 0xD7, 0x34, 0xAD,
-        0x2B, 0x80, 0x60, 0xEC,
-        0x0C, 0x1C, 0x60, 0xEC,
-        0x3C, 0xD7, 0x3C, 0xAD,
-        0x2C, 0x80, 0x60, 0xEC,
-        0x0B, 0x2B, 0xDE, 0xE8,
-        0x1B, 0x80, 0xDE, 0xE8,
-        0x34, 0x80, 0x34, 0xBD,
-        0x3C, 0x80, 0x3C, 0xBD,
-        0x33, 0xD7, 0x0B, 0xBD,
-        0x3B, 0xD7, 0x1B, 0xBD,
-        0x48, 0x80, 0x48, 0xCF,
-        0x59, 0x80, 0x59, 0xCF,
-        0x68, 0x33, 0x68, 0xCF,
-        0x49, 0x3B, 0x49, 0xCF,
-        0xB2, 0xFF, 0x20, 0xEA,
-        0x00, 0x80, 0x00, 0xE8,
-        0x58, 0x33, 0x58, 0xCF,
-        0x69, 0x3B, 0x69, 0xCF,
-        0x70, 0xFF, 0x20, 0xEA,
-        0x57, 0xC0, 0xBF, 0xEA,
-        0x00, 0x80, 0xA0, 0xE9,
-        0x00, 0x00, 0xD8, 0xEC,
-};
-static unsigned char warp_g400_t2gzsa[] = {
-        0x00, 0x8A, 0x98, 0xE9,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0xA0, 0xE9,
-        0x00, 0x00, 0xD8, 0xEC,
-        0xFF, 0x80, 0xC0, 0xE9,
-        0x00, 0x80, 0x00, 0xE8,
-        0x0A, 0x40, 0x50, 0xBF,
-        0x2A, 0x40, 0x60, 0xBF,
-        0x32, 0x41, 0x51, 0xBF,
-        0x3A, 0x41, 0x61, 0xBF,
-        0xC3, 0x6B,
-        0xD3, 0x6B,
-        0x00, 0x8A, 0x98, 0xE9,
-        0x73, 0x7B, 0xC8, 0xEC,
-        0x96, 0xE2,
-        0x41, 0x04,
-        0x7B, 0x43, 0xA0, 0xE8,
-        0x73, 0x53, 0xA0, 0xE8,
-        0xAD, 0xEE, 0x23, 0x9F,
-        0x00, 0xE0,
-        0x51, 0x04,
-        0x90, 0xE2,
-        0x61, 0x04,
-        0x31, 0x46, 0xB1, 0xE8,
-        0x51, 0x41, 0xE0, 0xEC,
-        0x39, 0x67, 0xB1, 0xE8,
-        0x00, 0x04,
-        0x46, 0xE2,
-        0x73, 0x63, 0xA0, 0xE8,
-        0x61, 0x41, 0xE0, 0xEC,
-        0x31, 0x00,
-        0x39, 0x00,
-        0x8A, 0x80, 0x15, 0xEA,
-        0x10, 0x04,
-        0x20, 0x04,
-        0x61, 0x51, 0xE0, 0xEC,
-        0x2F, 0x41, 0x60, 0xEA,
-        0x31, 0x20,
-        0x39, 0x20,
-        0x1F, 0x42, 0xA0, 0xE8,
-        0x2A, 0x42, 0x52, 0xBF,
-        0x0F, 0x52, 0xA0, 0xE8,
-        0x1A, 0x42, 0x62, 0xBF,
-        0x1E, 0x51, 0x60, 0xEA,
-        0x73, 0x7B, 0xC8, 0xEC,
-        0x0E, 0x61, 0x60, 0xEA,
-        0x32, 0x40, 0x50, 0xBD,
-        0x22, 0x40, 0x60, 0xBD,
-        0x12, 0x41, 0x51, 0xBD,
-        0x3A, 0x41, 0x61, 0xBD,
-        0xBF, 0x2F, 0x0E, 0xBD,
-        0x97, 0xE2,
-        0x7B, 0x72,
-        0x32, 0x20,
-        0x22, 0x20,
-        0x12, 0x20,
-        0x3A, 0x20,
-        0x35, 0x48, 0xB1, 0xE8,
-        0x3D, 0x59, 0xB1, 0xE8,
-        0x46, 0x31, 0x46, 0xBF,
-        0x56, 0x31, 0x56, 0xBF,
-        0xB3, 0xE2, 0x2D, 0x9F,
-        0x00, 0x80, 0x00, 0xE8,
-        0x66, 0x31, 0x66, 0xBF,
-        0x47, 0x39, 0x47, 0xBF,
-        0x57, 0x39, 0x57, 0xBF,
-        0x67, 0x39, 0x67, 0xBF,
-        0x7B, 0x80, 0x07, 0xEA,
-        0x24, 0x41, 0x20, 0xE9,
-        0x35, 0x00,
-        0x3D, 0x00,
-        0x00, 0xE0,
-        0x2D, 0x73,
-        0x33, 0x72,
-        0x0C, 0xE3,
-        0x8D, 0x2F, 0x1E, 0xBD,
-        0x43, 0x75, 0xF8, 0xEC,
-        0x35, 0x20,
-        0x3D, 0x20,
-        0x43, 0x43, 0x2D, 0xDF,
-        0x53, 0x53, 0x2D, 0xDF,
-        0xAE, 0x1E, 0x0E, 0xBD,
-        0x58, 0xE3,
-        0x33, 0x66,
-        0x48, 0x35, 0x48, 0xBF,
-        0x58, 0x35, 0x58, 0xBF,
-        0x68, 0x35, 0x68, 0xBF,
-        0x49, 0x3D, 0x49, 0xBF,
-        0x59, 0x3D, 0x59, 0xBF,
-        0x69, 0x3D, 0x69, 0xBF,
-        0x63, 0x63, 0x2D, 0xDF,
-        0x4D, 0x7D, 0xF8, 0xEC,
-        0x59, 0xE3,
-        0x00, 0xE0,
-        0xB8, 0x38, 0x33, 0xBF,
-        0x2D, 0x73,
-        0x30, 0x76,
-        0x18, 0x3A, 0x41, 0xE9,
-        0x3F, 0x53, 0xA0, 0xE8,
-        0x05, 0x80, 0x3D, 0xEA,
-        0x37, 0x43, 0xA0, 0xE8,
-        0x3D, 0x63, 0xA0, 0xE8,
-        0x50, 0x70, 0xF8, 0xEC,
-        0x2B, 0x50, 0x3C, 0xE9,
-        0x1F, 0x0F, 0xBC, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x59, 0x78, 0xF8, 0xEC,
-        0x00, 0x80, 0x00, 0xE8,
-        0x15, 0xC0, 0x20, 0xE9,
-        0x15, 0xC0, 0x20, 0xE9,
-        0x15, 0xC0, 0x20, 0xE9,
-        0x15, 0xC0, 0x20, 0xE9,
-        0x1E, 0x12, 0x41, 0xE9,
-        0x1A, 0x22, 0x41, 0xE9,
-        0x46, 0x37, 0x46, 0xDF,
-        0x56, 0x3F, 0x56, 0xDF,
-        0x2B, 0x40, 0x3D, 0xE9,
-        0x66, 0x3D, 0x66, 0xDF,
-        0x1D, 0x32, 0x41, 0xE9,
-        0x67, 0x3D, 0x67, 0xDF,
-        0x47, 0x37, 0x47, 0xDF,
-        0x57, 0x3F, 0x57, 0xDF,
-        0x2A, 0x40, 0x20, 0xE9,
-        0x59, 0x3F, 0x59, 0xDF,
-        0x16, 0x30, 0x20, 0xE9,
-        0x69, 0x3D, 0x69, 0xDF,
-        0x48, 0x37, 0x48, 0xDF,
-        0x58, 0x3F, 0x58, 0xDF,
-        0x68, 0x3D, 0x68, 0xDF,
-        0x49, 0x37, 0x49, 0xDF,
-        0x32, 0x32, 0x2D, 0xDF,
-        0x22, 0x22, 0x2D, 0xDF,
-        0x12, 0x12, 0x2D, 0xDF,
-        0x3A, 0x3A, 0x2D, 0xDF,
-        0x0F, 0xCF, 0x74, 0xC2,
-        0x37, 0xCF, 0x74, 0xC4,
-        0x0A, 0x44, 0x54, 0xB0,
-        0x02, 0x44, 0x64, 0xB0,
-        0x3D, 0xCF, 0x74, 0xC0,
-        0x34, 0x37, 0x20, 0xE9,
-        0x31, 0x53, 0x2F, 0x9F,
-        0x38, 0x0F, 0x20, 0xE9,
-        0x39, 0xE5, 0x2C, 0x9F,
-        0x3C, 0x3D, 0x20, 0xE9,
-        0x2A, 0x44, 0x54, 0xB2,
-        0x1A, 0x44, 0x64, 0xB2,
-        0x36, 0x80, 0x3A, 0xEA,
-        0x0A, 0x20,
-        0x02, 0x20,
-        0x0F, 0xCF, 0x75, 0xC0,
-        0x2A, 0x20,
-        0x1A, 0x20,
-        0x30, 0x50, 0x2E, 0x9F,
-        0x32, 0x31, 0x5F, 0xE9,
-        0x38, 0x21, 0x2C, 0x9F,
-        0x33, 0x39, 0x5F, 0xE9,
-        0x3D, 0xCF, 0x75, 0xC2,
-        0x37, 0xCF, 0x75, 0xC4,
-        0x31, 0x53, 0x2F, 0x9F,
-        0xA6, 0x0F, 0x20, 0xE9,
-        0x39, 0xE5, 0x2C, 0x9F,
-        0xA3, 0x3D, 0x20, 0xE9,
-        0x2A, 0x44, 0x54, 0xB4,
-        0x1A, 0x44, 0x64, 0xB4,
-        0x0A, 0x45, 0x55, 0xB0,
-        0x02, 0x45, 0x65, 0xB0,
-        0x88, 0x73, 0x5E, 0xE9,
-        0x2A, 0x20,
-        0x1A, 0x20,
-        0xA0, 0x37, 0x20, 0xE9,
-        0x0A, 0x20,
-        0x02, 0x20,
-        0x31, 0x53, 0x2F, 0x9F,
-        0x3E, 0x30, 0x4F, 0xE9,
-        0x39, 0xE5, 0x2C, 0x9F,
-        0x3F, 0x38, 0x4F, 0xE9,
-        0x30, 0x50, 0x2E, 0x9F,
-        0x3A, 0x31, 0x4F, 0xE9,
-        0x38, 0x21, 0x2C, 0x9F,
-        0x3B, 0x39, 0x4F, 0xE9,
-        0x2A, 0x45, 0x55, 0xB2,
-        0x1A, 0x45, 0x65, 0xB2,
-        0x0A, 0x45, 0x55, 0xB4,
-        0x02, 0x45, 0x65, 0xB4,
-        0x0F, 0xCF, 0x74, 0xC6,
-        0x2A, 0x20,
-        0x1A, 0x20,
-        0xA7, 0x30, 0x4F, 0xE9,
-        0x0A, 0x20,
-        0x02, 0x20,
-        0x31, 0x53, 0x2F, 0x9F,
-        0x9C, 0x0F, 0x20, 0xE9,
-        0x39, 0xE5, 0x2C, 0x9F,
-        0xA8, 0x38, 0x4F, 0xE9,
-        0x2A, 0x44, 0x54, 0xB6,
-        0x1A, 0x44, 0x64, 0xB6,
-        0x30, 0x50, 0x2E, 0x9F,
-        0x36, 0x31, 0x4F, 0xE9,
-        0x38, 0x21, 0x2C, 0x9F,
-        0x37, 0x39, 0x4F, 0xE9,
-        0x00, 0x80, 0x00, 0xE8,
-        0x2A, 0x20,
-        0x1A, 0x20,
-        0x2A, 0x46, 0x56, 0xBF,
-        0x1A, 0x46, 0x66, 0xBF,
-        0x31, 0x53, 0x2F, 0x9F,
-        0xA4, 0x31, 0x4F, 0xE9,
-        0x39, 0xE5, 0x2C, 0x9F,
-        0xA5, 0x39, 0x4F, 0xE9,
-        0x0A, 0x47, 0x57, 0xBF,
-        0x02, 0x47, 0x67, 0xBF,
-        0x31, 0x53, 0x2F, 0x9F,
-        0xA1, 0x30, 0x4F, 0xE9,
-        0x39, 0xE5, 0x2C, 0x9F,
-        0xA2, 0x38, 0x4F, 0xE9,
-        0x2A, 0x43, 0x53, 0xBF,
-        0x1A, 0x43, 0x63, 0xBF,
-        0x30, 0x50, 0x2E, 0x9F,
-        0x9D, 0x31, 0x4F, 0xE9,
-        0x38, 0x21, 0x2C, 0x9F,
-        0x9E, 0x39, 0x4F, 0xE9,
-        0x0A, 0x48, 0x58, 0xBF,
-        0x02, 0x48, 0x68, 0xBF,
-        0x31, 0x53, 0x2F, 0x9F,
-        0x80, 0x31, 0x57, 0xE9,
-        0x39, 0xE5, 0x2C, 0x9F,
-        0x81, 0x39, 0x57, 0xE9,
-        0x2A, 0x49, 0x59, 0xBF,
-        0x1A, 0x49, 0x69, 0xBF,
-        0x30, 0x50, 0x2E, 0x9F,
-        0x82, 0x30, 0x57, 0xE9,
-        0x38, 0x21, 0x2C, 0x9F,
-        0x83, 0x38, 0x57, 0xE9,
-        0x31, 0x53, 0x2F, 0x9F,
-        0x84, 0x31, 0x5E, 0xE9,
-        0x39, 0xE5, 0x2C, 0x9F,
-        0x85, 0x39, 0x5E, 0xE9,
-        0x86, 0x76, 0x57, 0xE9,
-        0x8A, 0x36, 0x20, 0xE9,
-        0x87, 0x77, 0x57, 0xE9,
-        0x8B, 0x3E, 0xBF, 0xEA,
-        0x80, 0x30, 0x57, 0xE9,
-        0x81, 0x38, 0x57, 0xE9,
-        0x82, 0x31, 0x57, 0xE9,
-        0x86, 0x78, 0x57, 0xE9,
-        0x83, 0x39, 0x57, 0xE9,
-        0x87, 0x79, 0x57, 0xE9,
-        0x30, 0x1F, 0x5F, 0xE9,
-        0x8A, 0x34, 0x20, 0xE9,
-        0x8B, 0x3C, 0x20, 0xE9,
-        0x37, 0x50, 0x60, 0xBD,
-        0x57, 0x0D, 0x20, 0xE9,
-        0x35, 0x51, 0x61, 0xBD,
-        0x2B, 0x50, 0x20, 0xE9,
-        0x1D, 0x37, 0xE1, 0xEA,
-        0x1E, 0x35, 0xE1, 0xEA,
-        0x00, 0xE0,
-        0x0E, 0x77,
-        0x24, 0x51, 0x20, 0xE9,
-        0x8D, 0xFF, 0x20, 0xEA,
-        0x16, 0x0E, 0x20, 0xE9,
-        0x57, 0x2E, 0xBF, 0xEA,
-        0x0B, 0x46, 0xA0, 0xE8,
-        0x1B, 0x56, 0xA0, 0xE8,
-        0x2B, 0x66, 0xA0, 0xE8,
-        0x0C, 0x47, 0xA0, 0xE8,
-        0x1C, 0x57, 0xA0, 0xE8,
-        0x2C, 0x67, 0xA0, 0xE8,
-        0x0B, 0x00,
-        0x1B, 0x00,
-        0x2B, 0x00,
-        0x00, 0xE0,
-        0x0C, 0x00,
-        0x1C, 0x00,
-        0x2C, 0x00,
-        0x00, 0xE0,
-        0x0B, 0x65,
-        0x1B, 0x65,
-        0x2B, 0x65,
-        0x00, 0xE0,
-        0x0C, 0x65,
-        0x1C, 0x65,
-        0x2C, 0x65,
-        0x00, 0xE0,
-        0x0B, 0x1B, 0x60, 0xEC,
-        0x36, 0xD7, 0x36, 0xAD,
-        0x2B, 0x80, 0x60, 0xEC,
-        0x0C, 0x1C, 0x60, 0xEC,
-        0x3E, 0xD7, 0x3E, 0xAD,
-        0x2C, 0x80, 0x60, 0xEC,
-        0x0B, 0x2B, 0xDE, 0xE8,
-        0x1B, 0x80, 0xDE, 0xE8,
-        0x36, 0x80, 0x36, 0xBD,
-        0x3E, 0x80, 0x3E, 0xBD,
-        0x33, 0xD7, 0x0B, 0xBD,
-        0x3B, 0xD7, 0x1B, 0xBD,
-        0x46, 0x80, 0x46, 0xCF,
-        0x57, 0x80, 0x57, 0xCF,
-        0x66, 0x33, 0x66, 0xCF,
-        0x47, 0x3B, 0x47, 0xCF,
-        0x56, 0x33, 0x56, 0xCF,
-        0x67, 0x3B, 0x67, 0xCF,
-        0x0B, 0x48, 0xA0, 0xE8,
-        0x1B, 0x58, 0xA0, 0xE8,
-        0x2B, 0x68, 0xA0, 0xE8,
-        0x0C, 0x49, 0xA0, 0xE8,
-        0x1C, 0x59, 0xA0, 0xE8,
-        0x2C, 0x69, 0xA0, 0xE8,
-        0x0B, 0x00,
-        0x1B, 0x00,
-        0x2B, 0x00,
-        0x00, 0xE0,
-        0x0C, 0x00,
-        0x1C, 0x00,
-        0x2C, 0x00,
-        0x00, 0xE0,
-        0x0B, 0x65,
-        0x1B, 0x65,
-        0x2B, 0x65,
-        0x00, 0xE0,
-        0x0C, 0x65,
-        0x1C, 0x65,
-        0x2C, 0x65,
-        0x00, 0xE0,
-        0x0B, 0x1B, 0x60, 0xEC,
-        0x34, 0xD7, 0x34, 0xAD,
-        0x2B, 0x80, 0x60, 0xEC,
-        0x0C, 0x1C, 0x60, 0xEC,
-        0x3C, 0xD7, 0x3C, 0xAD,
-        0x2C, 0x80, 0x60, 0xEC,
-        0x0B, 0x2B, 0xDE, 0xE8,
-        0x1B, 0x80, 0xDE, 0xE8,
-        0x34, 0x80, 0x34, 0xBD,
-        0x3C, 0x80, 0x3C, 0xBD,
-        0x33, 0xD7, 0x0B, 0xBD,
-        0x3B, 0xD7, 0x1B, 0xBD,
-        0x48, 0x80, 0x48, 0xCF,
-        0x59, 0x80, 0x59, 0xCF,
-        0x68, 0x33, 0x68, 0xCF,
-        0x49, 0x3B, 0x49, 0xCF,
-        0xAD, 0xFF, 0x20, 0xEA,
-        0x00, 0x80, 0x00, 0xE8,
-        0x58, 0x33, 0x58, 0xCF,
-        0x69, 0x3B, 0x69, 0xCF,
-        0x6B, 0xFF, 0x20, 0xEA,
-        0x57, 0xC0, 0xBF, 0xEA,
-        0x00, 0x80, 0xA0, 0xE9,
-        0x00, 0x00, 0xD8, 0xEC,
-};
-static unsigned char warp_g400_t2gzsaf[] = {
-        0x00, 0x8A, 0x98, 0xE9,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0xA0, 0xE9,
-        0x00, 0x00, 0xD8, 0xEC,
-        0xFF, 0x80, 0xC0, 0xE9,
-        0x00, 0x80, 0x00, 0xE8,
-        0x0A, 0x40, 0x50, 0xBF,
-        0x2A, 0x40, 0x60, 0xBF,
-        0x32, 0x41, 0x51, 0xBF,
-        0x3A, 0x41, 0x61, 0xBF,
-        0xC3, 0x6B,
-        0xD3, 0x6B,
-        0x00, 0x8A, 0x98, 0xE9,
-        0x73, 0x7B, 0xC8, 0xEC,
-        0x96, 0xE2,
-        0x41, 0x04,
-        0x7B, 0x43, 0xA0, 0xE8,
-        0x73, 0x53, 0xA0, 0xE8,
-        0xAD, 0xEE, 0x23, 0x9F,
-        0x00, 0xE0,
-        0x51, 0x04,
-        0x90, 0xE2,
-        0x61, 0x04,
-        0x31, 0x46, 0xB1, 0xE8,
-        0x51, 0x41, 0xE0, 0xEC,
-        0x39, 0x67, 0xB1, 0xE8,
-        0x00, 0x04,
-        0x46, 0xE2,
-        0x73, 0x63, 0xA0, 0xE8,
-        0x61, 0x41, 0xE0, 0xEC,
-        0x31, 0x00,
-        0x39, 0x00,
-        0x8E, 0x80, 0x15, 0xEA,
-        0x10, 0x04,
-        0x20, 0x04,
-        0x61, 0x51, 0xE0, 0xEC,
-        0x2F, 0x41, 0x60, 0xEA,
-        0x31, 0x20,
-        0x39, 0x20,
-        0x1F, 0x42, 0xA0, 0xE8,
-        0x2A, 0x42, 0x52, 0xBF,
-        0x0F, 0x52, 0xA0, 0xE8,
-        0x1A, 0x42, 0x62, 0xBF,
-        0x1E, 0x51, 0x60, 0xEA,
-        0x73, 0x7B, 0xC8, 0xEC,
-        0x0E, 0x61, 0x60, 0xEA,
-        0x32, 0x40, 0x50, 0xBD,
-        0x22, 0x40, 0x60, 0xBD,
-        0x12, 0x41, 0x51, 0xBD,
-        0x3A, 0x41, 0x61, 0xBD,
-        0xBF, 0x2F, 0x0E, 0xBD,
-        0x97, 0xE2,
-        0x7B, 0x72,
-        0x32, 0x20,
-        0x22, 0x20,
-        0x12, 0x20,
-        0x3A, 0x20,
-        0x35, 0x48, 0xB1, 0xE8,
-        0x3D, 0x59, 0xB1, 0xE8,
-        0x46, 0x31, 0x46, 0xBF,
-        0x56, 0x31, 0x56, 0xBF,
-        0xB3, 0xE2, 0x2D, 0x9F,
-        0x00, 0x80, 0x00, 0xE8,
-        0x66, 0x31, 0x66, 0xBF,
-        0x47, 0x39, 0x47, 0xBF,
-        0x57, 0x39, 0x57, 0xBF,
-        0x67, 0x39, 0x67, 0xBF,
-        0x7F, 0x80, 0x07, 0xEA,
-        0x24, 0x41, 0x20, 0xE9,
-        0x35, 0x00,
-        0x3D, 0x00,
-        0x00, 0xE0,
-        0x2D, 0x73,
-        0x33, 0x72,
-        0x0C, 0xE3,
-        0x8D, 0x2F, 0x1E, 0xBD,
-        0x43, 0x75, 0xF8, 0xEC,
-        0x35, 0x20,
-        0x3D, 0x20,
-        0x43, 0x43, 0x2D, 0xDF,
-        0x53, 0x53, 0x2D, 0xDF,
-        0xAE, 0x1E, 0x0E, 0xBD,
-        0x58, 0xE3,
-        0x33, 0x66,
-        0x48, 0x35, 0x48, 0xBF,
-        0x58, 0x35, 0x58, 0xBF,
-        0x68, 0x35, 0x68, 0xBF,
-        0x49, 0x3D, 0x49, 0xBF,
-        0x59, 0x3D, 0x59, 0xBF,
-        0x69, 0x3D, 0x69, 0xBF,
-        0x63, 0x63, 0x2D, 0xDF,
-        0x4D, 0x7D, 0xF8, 0xEC,
-        0x59, 0xE3,
-        0x00, 0xE0,
-        0xB8, 0x38, 0x33, 0xBF,
-        0x2D, 0x73,
-        0x30, 0x76,
-        0x18, 0x3A, 0x41, 0xE9,
-        0x3F, 0x53, 0xA0, 0xE8,
-        0x05, 0x80, 0x3D, 0xEA,
-        0x37, 0x43, 0xA0, 0xE8,
-        0x3D, 0x63, 0xA0, 0xE8,
-        0x50, 0x70, 0xF8, 0xEC,
-        0x2B, 0x50, 0x3C, 0xE9,
-        0x1F, 0x0F, 0xBC, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x59, 0x78, 0xF8, 0xEC,
-        0x00, 0x80, 0x00, 0xE8,
-        0x15, 0xC0, 0x20, 0xE9,
-        0x15, 0xC0, 0x20, 0xE9,
-        0x15, 0xC0, 0x20, 0xE9,
-        0x15, 0xC0, 0x20, 0xE9,
-        0x1E, 0x12, 0x41, 0xE9,
-        0x1A, 0x22, 0x41, 0xE9,
-        0x46, 0x37, 0x46, 0xDF,
-        0x56, 0x3F, 0x56, 0xDF,
-        0x2B, 0x40, 0x3D, 0xE9,
-        0x66, 0x3D, 0x66, 0xDF,
-        0x1D, 0x32, 0x41, 0xE9,
-        0x67, 0x3D, 0x67, 0xDF,
-        0x47, 0x37, 0x47, 0xDF,
-        0x57, 0x3F, 0x57, 0xDF,
-        0x2A, 0x40, 0x20, 0xE9,
-        0x59, 0x3F, 0x59, 0xDF,
-        0x16, 0x30, 0x20, 0xE9,
-        0x69, 0x3D, 0x69, 0xDF,
-        0x48, 0x37, 0x48, 0xDF,
-        0x58, 0x3F, 0x58, 0xDF,
-        0x68, 0x3D, 0x68, 0xDF,
-        0x49, 0x37, 0x49, 0xDF,
-        0x32, 0x32, 0x2D, 0xDF,
-        0x22, 0x22, 0x2D, 0xDF,
-        0x12, 0x12, 0x2D, 0xDF,
-        0x3A, 0x3A, 0x2D, 0xDF,
-        0x0F, 0xCF, 0x74, 0xC2,
-        0x37, 0xCF, 0x74, 0xC4,
-        0x0A, 0x44, 0x54, 0xB0,
-        0x02, 0x44, 0x64, 0xB0,
-        0x3D, 0xCF, 0x74, 0xC0,
-        0x34, 0x37, 0x20, 0xE9,
-        0x31, 0x53, 0x2F, 0x9F,
-        0x38, 0x0F, 0x20, 0xE9,
-        0x39, 0xE5, 0x2C, 0x9F,
-        0x3C, 0x3D, 0x20, 0xE9,
-        0x2A, 0x44, 0x54, 0xB2,
-        0x1A, 0x44, 0x64, 0xB2,
-        0x3A, 0x80, 0x3A, 0xEA,
-        0x0A, 0x20,
-        0x02, 0x20,
-        0x0F, 0xCF, 0x75, 0xC0,
-        0x2A, 0x20,
-        0x1A, 0x20,
-        0x30, 0x50, 0x2E, 0x9F,
-        0x32, 0x31, 0x5F, 0xE9,
-        0x38, 0x21, 0x2C, 0x9F,
-        0x33, 0x39, 0x5F, 0xE9,
-        0x3D, 0xCF, 0x75, 0xC2,
-        0x37, 0xCF, 0x75, 0xC4,
-        0x31, 0x53, 0x2F, 0x9F,
-        0xA6, 0x0F, 0x20, 0xE9,
-        0x39, 0xE5, 0x2C, 0x9F,
-        0xA3, 0x3D, 0x20, 0xE9,
-        0x2A, 0x44, 0x54, 0xB4,
-        0x1A, 0x44, 0x64, 0xB4,
-        0x0A, 0x45, 0x55, 0xB0,
-        0x02, 0x45, 0x65, 0xB0,
-        0x88, 0x73, 0x5E, 0xE9,
-        0x2A, 0x20,
-        0x1A, 0x20,
-        0xA0, 0x37, 0x20, 0xE9,
-        0x0A, 0x20,
-        0x02, 0x20,
-        0x31, 0x53, 0x2F, 0x9F,
-        0x3E, 0x30, 0x4F, 0xE9,
-        0x39, 0xE5, 0x2C, 0x9F,
-        0x3F, 0x38, 0x4F, 0xE9,
-        0x30, 0x50, 0x2E, 0x9F,
-        0x3A, 0x31, 0x4F, 0xE9,
-        0x38, 0x21, 0x2C, 0x9F,
-        0x3B, 0x39, 0x4F, 0xE9,
-        0x2A, 0x45, 0x55, 0xB2,
-        0x1A, 0x45, 0x65, 0xB2,
-        0x0A, 0x45, 0x55, 0xB4,
-        0x02, 0x45, 0x65, 0xB4,
-        0x0F, 0xCF, 0x74, 0xC6,
-        0x2A, 0x20,
-        0x1A, 0x20,
-        0xA7, 0x30, 0x4F, 0xE9,
-        0x0A, 0x20,
-        0x02, 0x20,
-        0x31, 0x53, 0x2F, 0x9F,
-        0x9C, 0x0F, 0x20, 0xE9,
-        0x39, 0xE5, 0x2C, 0x9F,
-        0xA8, 0x38, 0x4F, 0xE9,
-        0x2A, 0x44, 0x54, 0xB6,
-        0x1A, 0x44, 0x64, 0xB6,
-        0x30, 0x50, 0x2E, 0x9F,
-        0x36, 0x31, 0x4F, 0xE9,
-        0x38, 0x21, 0x2C, 0x9F,
-        0x37, 0x39, 0x4F, 0xE9,
-        0x0A, 0x45, 0x55, 0xB6,
-        0x02, 0x45, 0x65, 0xB6,
-        0x3D, 0xCF, 0x75, 0xC6,
-        0x2A, 0x20,
-        0x1A, 0x20,
-        0x2A, 0x46, 0x56, 0xBF,
-        0x1A, 0x46, 0x66, 0xBF,
-        0x31, 0x53, 0x2F, 0x9F,
-        0xA4, 0x31, 0x4F, 0xE9,
-        0x39, 0xE5, 0x2C, 0x9F,
-        0xA5, 0x39, 0x4F, 0xE9,
-        0x31, 0x3D, 0x20, 0xE9,
-        0x0A, 0x20,
-        0x02, 0x20,
-        0x0A, 0x47, 0x57, 0xBF,
-        0x02, 0x47, 0x67, 0xBF,
-        0x30, 0x50, 0x2E, 0x9F,
-        0xA1, 0x30, 0x4F, 0xE9,
-        0x38, 0x21, 0x2C, 0x9F,
-        0xA2, 0x38, 0x4F, 0xE9,
-        0x31, 0x53, 0x2F, 0x9F,
-        0x9D, 0x31, 0x4F, 0xE9,
-        0x39, 0xE5, 0x2C, 0x9F,
-        0x9E, 0x39, 0x4F, 0xE9,
-        0x2A, 0x43, 0x53, 0xBF,
-        0x1A, 0x43, 0x63, 0xBF,
-        0x30, 0x50, 0x2E, 0x9F,
-        0x35, 0x30, 0x4F, 0xE9,
-        0x38, 0x21, 0x2C, 0x9F,
-        0x39, 0x38, 0x4F, 0xE9,
-        0x0A, 0x48, 0x58, 0xBF,
-        0x02, 0x48, 0x68, 0xBF,
-        0x31, 0x53, 0x2F, 0x9F,
-        0x80, 0x31, 0x57, 0xE9,
-        0x39, 0xE5, 0x2C, 0x9F,
-        0x81, 0x39, 0x57, 0xE9,
-        0x2A, 0x49, 0x59, 0xBF,
-        0x1A, 0x49, 0x69, 0xBF,
-        0x30, 0x50, 0x2E, 0x9F,
-        0x82, 0x30, 0x57, 0xE9,
-        0x38, 0x21, 0x2C, 0x9F,
-        0x83, 0x38, 0x57, 0xE9,
-        0x31, 0x53, 0x2F, 0x9F,
-        0x84, 0x31, 0x5E, 0xE9,
-        0x39, 0xE5, 0x2C, 0x9F,
-        0x85, 0x39, 0x5E, 0xE9,
-        0x86, 0x76, 0x57, 0xE9,
-        0x8A, 0x36, 0x20, 0xE9,
-        0x87, 0x77, 0x57, 0xE9,
-        0x8B, 0x3E, 0xBF, 0xEA,
-        0x80, 0x30, 0x57, 0xE9,
-        0x81, 0x38, 0x57, 0xE9,
-        0x82, 0x31, 0x57, 0xE9,
-        0x86, 0x78, 0x57, 0xE9,
-        0x83, 0x39, 0x57, 0xE9,
-        0x87, 0x79, 0x57, 0xE9,
-        0x30, 0x1F, 0x5F, 0xE9,
-        0x8A, 0x34, 0x20, 0xE9,
-        0x8B, 0x3C, 0x20, 0xE9,
-        0x37, 0x50, 0x60, 0xBD,
-        0x57, 0x0D, 0x20, 0xE9,
-        0x35, 0x51, 0x61, 0xBD,
-        0x2B, 0x50, 0x20, 0xE9,
-        0x1D, 0x37, 0xE1, 0xEA,
-        0x1E, 0x35, 0xE1, 0xEA,
-        0x00, 0xE0,
-        0x0E, 0x77,
-        0x24, 0x51, 0x20, 0xE9,
-        0x89, 0xFF, 0x20, 0xEA,
-        0x16, 0x0E, 0x20, 0xE9,
-        0x57, 0x2E, 0xBF, 0xEA,
-        0x0B, 0x46, 0xA0, 0xE8,
-        0x1B, 0x56, 0xA0, 0xE8,
-        0x2B, 0x66, 0xA0, 0xE8,
-        0x0C, 0x47, 0xA0, 0xE8,
-        0x1C, 0x57, 0xA0, 0xE8,
-        0x2C, 0x67, 0xA0, 0xE8,
-        0x0B, 0x00,
-        0x1B, 0x00,
-        0x2B, 0x00,
-        0x00, 0xE0,
-        0x0C, 0x00,
-        0x1C, 0x00,
-        0x2C, 0x00,
-        0x00, 0xE0,
-        0x0B, 0x65,
-        0x1B, 0x65,
-        0x2B, 0x65,
-        0x00, 0xE0,
-        0x0C, 0x65,
-        0x1C, 0x65,
-        0x2C, 0x65,
-        0x00, 0xE0,
-        0x0B, 0x1B, 0x60, 0xEC,
-        0x36, 0xD7, 0x36, 0xAD,
-        0x2B, 0x80, 0x60, 0xEC,
-        0x0C, 0x1C, 0x60, 0xEC,
-        0x3E, 0xD7, 0x3E, 0xAD,
-        0x2C, 0x80, 0x60, 0xEC,
-        0x0B, 0x2B, 0xDE, 0xE8,
-        0x1B, 0x80, 0xDE, 0xE8,
-        0x36, 0x80, 0x36, 0xBD,
-        0x3E, 0x80, 0x3E, 0xBD,
-        0x33, 0xD7, 0x0B, 0xBD,
-        0x3B, 0xD7, 0x1B, 0xBD,
-        0x46, 0x80, 0x46, 0xCF,
-        0x57, 0x80, 0x57, 0xCF,
-        0x66, 0x33, 0x66, 0xCF,
-        0x47, 0x3B, 0x47, 0xCF,
-        0x56, 0x33, 0x56, 0xCF,
-        0x67, 0x3B, 0x67, 0xCF,
-        0x0B, 0x48, 0xA0, 0xE8,
-        0x1B, 0x58, 0xA0, 0xE8,
-        0x2B, 0x68, 0xA0, 0xE8,
-        0x0C, 0x49, 0xA0, 0xE8,
-        0x1C, 0x59, 0xA0, 0xE8,
-        0x2C, 0x69, 0xA0, 0xE8,
-        0x0B, 0x00,
-        0x1B, 0x00,
-        0x2B, 0x00,
-        0x00, 0xE0,
-        0x0C, 0x00,
-        0x1C, 0x00,
-        0x2C, 0x00,
-        0x00, 0xE0,
-        0x0B, 0x65,
-        0x1B, 0x65,
-        0x2B, 0x65,
-        0x00, 0xE0,
-        0x0C, 0x65,
-        0x1C, 0x65,
-        0x2C, 0x65,
-        0x00, 0xE0,
-        0x0B, 0x1B, 0x60, 0xEC,
-        0x34, 0xD7, 0x34, 0xAD,
-        0x2B, 0x80, 0x60, 0xEC,
-        0x0C, 0x1C, 0x60, 0xEC,
-        0x3C, 0xD7, 0x3C, 0xAD,
-        0x2C, 0x80, 0x60, 0xEC,
-        0x0B, 0x2B, 0xDE, 0xE8,
-        0x1B, 0x80, 0xDE, 0xE8,
-        0x34, 0x80, 0x34, 0xBD,
-        0x3C, 0x80, 0x3C, 0xBD,
-        0x33, 0xD7, 0x0B, 0xBD,
-        0x3B, 0xD7, 0x1B, 0xBD,
-        0x48, 0x80, 0x48, 0xCF,
-        0x59, 0x80, 0x59, 0xCF,
-        0x68, 0x33, 0x68, 0xCF,
-        0x49, 0x3B, 0x49, 0xCF,
-        0xA9, 0xFF, 0x20, 0xEA,
-        0x00, 0x80, 0x00, 0xE8,
-        0x58, 0x33, 0x58, 0xCF,
-        0x69, 0x3B, 0x69, 0xCF,
-        0x67, 0xFF, 0x20, 0xEA,
-        0x57, 0xC0, 0xBF, 0xEA,
-        0x00, 0x80, 0xA0, 0xE9,
-        0x00, 0x00, 0xD8, 0xEC,
-};
-static unsigned char warp_g400_t2gzsf[] = {
-        0x00, 0x8A, 0x98, 0xE9,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0xA0, 0xE9,
-        0x00, 0x00, 0xD8, 0xEC,
-        0xFF, 0x80, 0xC0, 0xE9,
-        0x00, 0x80, 0x00, 0xE8,
-        0x0A, 0x40, 0x50, 0xBF,
-        0x2A, 0x40, 0x60, 0xBF,
-        0x32, 0x41, 0x51, 0xBF,
-        0x3A, 0x41, 0x61, 0xBF,
-        0xC3, 0x6B,
-        0xD3, 0x6B,
-        0x00, 0x8A, 0x98, 0xE9,
-        0x73, 0x7B, 0xC8, 0xEC,
-        0x96, 0xE2,
-        0x41, 0x04,
-        0x7B, 0x43, 0xA0, 0xE8,
-        0x73, 0x53, 0xA0, 0xE8,
-        0xAD, 0xEE, 0x23, 0x9F,
-        0x00, 0xE0,
-        0x51, 0x04,
-        0x90, 0xE2,
-        0x61, 0x04,
-        0x31, 0x46, 0xB1, 0xE8,
-        0x51, 0x41, 0xE0, 0xEC,
-        0x39, 0x67, 0xB1, 0xE8,
-        0x00, 0x04,
-        0x46, 0xE2,
-        0x73, 0x63, 0xA0, 0xE8,
-        0x61, 0x41, 0xE0, 0xEC,
-        0x31, 0x00,
-        0x39, 0x00,
-        0x8A, 0x80, 0x15, 0xEA,
-        0x10, 0x04,
-        0x20, 0x04,
-        0x61, 0x51, 0xE0, 0xEC,
-        0x2F, 0x41, 0x60, 0xEA,
-        0x31, 0x20,
-        0x39, 0x20,
-        0x1F, 0x42, 0xA0, 0xE8,
-        0x2A, 0x42, 0x52, 0xBF,
-        0x0F, 0x52, 0xA0, 0xE8,
-        0x1A, 0x42, 0x62, 0xBF,
-        0x1E, 0x51, 0x60, 0xEA,
-        0x73, 0x7B, 0xC8, 0xEC,
-        0x0E, 0x61, 0x60, 0xEA,
-        0x32, 0x40, 0x50, 0xBD,
-        0x22, 0x40, 0x60, 0xBD,
-        0x12, 0x41, 0x51, 0xBD,
-        0x3A, 0x41, 0x61, 0xBD,
-        0xBF, 0x2F, 0x0E, 0xBD,
-        0x97, 0xE2,
-        0x7B, 0x72,
-        0x32, 0x20,
-        0x22, 0x20,
-        0x12, 0x20,
-        0x3A, 0x20,
-        0x35, 0x48, 0xB1, 0xE8,
-        0x3D, 0x59, 0xB1, 0xE8,
-        0x46, 0x31, 0x46, 0xBF,
-        0x56, 0x31, 0x56, 0xBF,
-        0xB3, 0xE2, 0x2D, 0x9F,
-        0x00, 0x80, 0x00, 0xE8,
-        0x66, 0x31, 0x66, 0xBF,
-        0x47, 0x39, 0x47, 0xBF,
-        0x57, 0x39, 0x57, 0xBF,
-        0x67, 0x39, 0x67, 0xBF,
-        0x7B, 0x80, 0x07, 0xEA,
-        0x24, 0x41, 0x20, 0xE9,
-        0x35, 0x00,
-        0x3D, 0x00,
-        0x00, 0xE0,
-        0x2D, 0x73,
-        0x33, 0x72,
-        0x0C, 0xE3,
-        0x8D, 0x2F, 0x1E, 0xBD,
-        0x43, 0x75, 0xF8, 0xEC,
-        0x35, 0x20,
-        0x3D, 0x20,
-        0x43, 0x43, 0x2D, 0xDF,
-        0x53, 0x53, 0x2D, 0xDF,
-        0xAE, 0x1E, 0x0E, 0xBD,
-        0x58, 0xE3,
-        0x33, 0x66,
-        0x48, 0x35, 0x48, 0xBF,
-        0x58, 0x35, 0x58, 0xBF,
-        0x68, 0x35, 0x68, 0xBF,
-        0x49, 0x3D, 0x49, 0xBF,
-        0x59, 0x3D, 0x59, 0xBF,
-        0x69, 0x3D, 0x69, 0xBF,
-        0x63, 0x63, 0x2D, 0xDF,
-        0x4D, 0x7D, 0xF8, 0xEC,
-        0x59, 0xE3,
-        0x00, 0xE0,
-        0xB8, 0x38, 0x33, 0xBF,
-        0x2D, 0x73,
-        0x30, 0x76,
-        0x18, 0x3A, 0x41, 0xE9,
-        0x3F, 0x53, 0xA0, 0xE8,
-        0x05, 0x80, 0x3D, 0xEA,
-        0x37, 0x43, 0xA0, 0xE8,
-        0x3D, 0x63, 0xA0, 0xE8,
-        0x50, 0x70, 0xF8, 0xEC,
-        0x2B, 0x50, 0x3C, 0xE9,
-        0x1F, 0x0F, 0xBC, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x59, 0x78, 0xF8, 0xEC,
-        0x00, 0x80, 0x00, 0xE8,
-        0x15, 0xC0, 0x20, 0xE9,
-        0x15, 0xC0, 0x20, 0xE9,
-        0x15, 0xC0, 0x20, 0xE9,
-        0x15, 0xC0, 0x20, 0xE9,
-        0x1E, 0x12, 0x41, 0xE9,
-        0x1A, 0x22, 0x41, 0xE9,
-        0x46, 0x37, 0x46, 0xDF,
-        0x56, 0x3F, 0x56, 0xDF,
-        0x2B, 0x40, 0x3D, 0xE9,
-        0x66, 0x3D, 0x66, 0xDF,
-        0x1D, 0x32, 0x41, 0xE9,
-        0x67, 0x3D, 0x67, 0xDF,
-        0x47, 0x37, 0x47, 0xDF,
-        0x57, 0x3F, 0x57, 0xDF,
-        0x2A, 0x40, 0x20, 0xE9,
-        0x59, 0x3F, 0x59, 0xDF,
-        0x16, 0x30, 0x20, 0xE9,
-        0x69, 0x3D, 0x69, 0xDF,
-        0x48, 0x37, 0x48, 0xDF,
-        0x58, 0x3F, 0x58, 0xDF,
-        0x68, 0x3D, 0x68, 0xDF,
-        0x49, 0x37, 0x49, 0xDF,
-        0x32, 0x32, 0x2D, 0xDF,
-        0x22, 0x22, 0x2D, 0xDF,
-        0x12, 0x12, 0x2D, 0xDF,
-        0x3A, 0x3A, 0x2D, 0xDF,
-        0x0F, 0xCF, 0x74, 0xC2,
-        0x37, 0xCF, 0x74, 0xC4,
-        0x0A, 0x44, 0x54, 0xB0,
-        0x02, 0x44, 0x64, 0xB0,
-        0x3D, 0xCF, 0x74, 0xC0,
-        0x34, 0x37, 0x20, 0xE9,
-        0x31, 0x53, 0x2F, 0x9F,
-        0x38, 0x0F, 0x20, 0xE9,
-        0x39, 0xE5, 0x2C, 0x9F,
-        0x3C, 0x3D, 0x20, 0xE9,
-        0x2A, 0x44, 0x54, 0xB2,
-        0x1A, 0x44, 0x64, 0xB2,
-        0x36, 0x80, 0x3A, 0xEA,
-        0x0A, 0x20,
-        0x02, 0x20,
-        0x0F, 0xCF, 0x75, 0xC0,
-        0x2A, 0x20,
-        0x1A, 0x20,
-        0x30, 0x50, 0x2E, 0x9F,
-        0x32, 0x31, 0x5F, 0xE9,
-        0x38, 0x21, 0x2C, 0x9F,
-        0x33, 0x39, 0x5F, 0xE9,
-        0x3D, 0xCF, 0x75, 0xC2,
-        0x37, 0xCF, 0x75, 0xC4,
-        0x31, 0x53, 0x2F, 0x9F,
-        0xA6, 0x0F, 0x20, 0xE9,
-        0x39, 0xE5, 0x2C, 0x9F,
-        0xA3, 0x3D, 0x20, 0xE9,
-        0x2A, 0x44, 0x54, 0xB4,
-        0x1A, 0x44, 0x64, 0xB4,
-        0x0A, 0x45, 0x55, 0xB0,
-        0x02, 0x45, 0x65, 0xB0,
-        0x88, 0x73, 0x5E, 0xE9,
-        0x2A, 0x20,
-        0x1A, 0x20,
-        0xA0, 0x37, 0x20, 0xE9,
-        0x0A, 0x20,
-        0x02, 0x20,
-        0x31, 0x53, 0x2F, 0x9F,
-        0x3E, 0x30, 0x4F, 0xE9,
-        0x39, 0xE5, 0x2C, 0x9F,
-        0x3F, 0x38, 0x4F, 0xE9,
-        0x30, 0x50, 0x2E, 0x9F,
-        0x3A, 0x31, 0x4F, 0xE9,
-        0x38, 0x21, 0x2C, 0x9F,
-        0x3B, 0x39, 0x4F, 0xE9,
-        0x2A, 0x45, 0x55, 0xB2,
-        0x1A, 0x45, 0x65, 0xB2,
-        0x0A, 0x45, 0x55, 0xB4,
-        0x02, 0x45, 0x65, 0xB4,
-        0x0F, 0xCF, 0x75, 0xC6,
-        0x2A, 0x20,
-        0x1A, 0x20,
-        0xA7, 0x30, 0x4F, 0xE9,
-        0x0A, 0x20,
-        0x02, 0x20,
-        0x31, 0x53, 0x2F, 0x9F,
-        0x31, 0x0F, 0x20, 0xE9,
-        0x39, 0xE5, 0x2C, 0x9F,
-        0xA8, 0x38, 0x4F, 0xE9,
-        0x2A, 0x45, 0x55, 0xB6,
-        0x1A, 0x45, 0x65, 0xB6,
-        0x30, 0x50, 0x2E, 0x9F,
-        0x36, 0x31, 0x4F, 0xE9,
-        0x38, 0x21, 0x2C, 0x9F,
-        0x37, 0x39, 0x4F, 0xE9,
-        0x00, 0x80, 0x00, 0xE8,
-        0x2A, 0x20,
-        0x1A, 0x20,
-        0x2A, 0x46, 0x56, 0xBF,
-        0x1A, 0x46, 0x66, 0xBF,
-        0x31, 0x53, 0x2F, 0x9F,
-        0xA4, 0x31, 0x4F, 0xE9,
-        0x39, 0xE5, 0x2C, 0x9F,
-        0xA5, 0x39, 0x4F, 0xE9,
-        0x0A, 0x47, 0x57, 0xBF,
-        0x02, 0x47, 0x67, 0xBF,
-        0x31, 0x53, 0x2F, 0x9F,
-        0xA1, 0x30, 0x4F, 0xE9,
-        0x39, 0xE5, 0x2C, 0x9F,
-        0xA2, 0x38, 0x4F, 0xE9,
-        0x2A, 0x43, 0x53, 0xBF,
-        0x1A, 0x43, 0x63, 0xBF,
-        0x30, 0x50, 0x2E, 0x9F,
-        0x35, 0x31, 0x4F, 0xE9,
-        0x38, 0x21, 0x2C, 0x9F,
-        0x39, 0x39, 0x4F, 0xE9,
-        0x0A, 0x48, 0x58, 0xBF,
-        0x02, 0x48, 0x68, 0xBF,
-        0x31, 0x53, 0x2F, 0x9F,
-        0x80, 0x31, 0x57, 0xE9,
-        0x39, 0xE5, 0x2C, 0x9F,
-        0x81, 0x39, 0x57, 0xE9,
-        0x2A, 0x49, 0x59, 0xBF,
-        0x1A, 0x49, 0x69, 0xBF,
-        0x30, 0x50, 0x2E, 0x9F,
-        0x82, 0x30, 0x57, 0xE9,
-        0x38, 0x21, 0x2C, 0x9F,
-        0x83, 0x38, 0x57, 0xE9,
-        0x31, 0x53, 0x2F, 0x9F,
-        0x84, 0x31, 0x5E, 0xE9,
-        0x39, 0xE5, 0x2C, 0x9F,
-        0x85, 0x39, 0x5E, 0xE9,
-        0x86, 0x76, 0x57, 0xE9,
-        0x8A, 0x36, 0x20, 0xE9,
-        0x87, 0x77, 0x57, 0xE9,
-        0x8B, 0x3E, 0xBF, 0xEA,
-        0x80, 0x30, 0x57, 0xE9,
-        0x81, 0x38, 0x57, 0xE9,
-        0x82, 0x31, 0x57, 0xE9,
-        0x86, 0x78, 0x57, 0xE9,
-        0x83, 0x39, 0x57, 0xE9,
-        0x87, 0x79, 0x57, 0xE9,
-        0x30, 0x1F, 0x5F, 0xE9,
-        0x8A, 0x34, 0x20, 0xE9,
-        0x8B, 0x3C, 0x20, 0xE9,
-        0x37, 0x50, 0x60, 0xBD,
-        0x57, 0x0D, 0x20, 0xE9,
-        0x35, 0x51, 0x61, 0xBD,
-        0x2B, 0x50, 0x20, 0xE9,
-        0x1D, 0x37, 0xE1, 0xEA,
-        0x1E, 0x35, 0xE1, 0xEA,
-        0x00, 0xE0,
-        0x0E, 0x77,
-        0x24, 0x51, 0x20, 0xE9,
-        0x8D, 0xFF, 0x20, 0xEA,
-        0x16, 0x0E, 0x20, 0xE9,
-        0x57, 0x2E, 0xBF, 0xEA,
-        0x0B, 0x46, 0xA0, 0xE8,
-        0x1B, 0x56, 0xA0, 0xE8,
-        0x2B, 0x66, 0xA0, 0xE8,
-        0x0C, 0x47, 0xA0, 0xE8,
-        0x1C, 0x57, 0xA0, 0xE8,
-        0x2C, 0x67, 0xA0, 0xE8,
-        0x0B, 0x00,
-        0x1B, 0x00,
-        0x2B, 0x00,
-        0x00, 0xE0,
-        0x0C, 0x00,
-        0x1C, 0x00,
-        0x2C, 0x00,
-        0x00, 0xE0,
-        0x0B, 0x65,
-        0x1B, 0x65,
-        0x2B, 0x65,
-        0x00, 0xE0,
-        0x0C, 0x65,
-        0x1C, 0x65,
-        0x2C, 0x65,
-        0x00, 0xE0,
-        0x0B, 0x1B, 0x60, 0xEC,
-        0x36, 0xD7, 0x36, 0xAD,
-        0x2B, 0x80, 0x60, 0xEC,
-        0x0C, 0x1C, 0x60, 0xEC,
-        0x3E, 0xD7, 0x3E, 0xAD,
-        0x2C, 0x80, 0x60, 0xEC,
-        0x0B, 0x2B, 0xDE, 0xE8,
-        0x1B, 0x80, 0xDE, 0xE8,
-        0x36, 0x80, 0x36, 0xBD,
-        0x3E, 0x80, 0x3E, 0xBD,
-        0x33, 0xD7, 0x0B, 0xBD,
-        0x3B, 0xD7, 0x1B, 0xBD,
-        0x46, 0x80, 0x46, 0xCF,
-        0x57, 0x80, 0x57, 0xCF,
-        0x66, 0x33, 0x66, 0xCF,
-        0x47, 0x3B, 0x47, 0xCF,
-        0x56, 0x33, 0x56, 0xCF,
-        0x67, 0x3B, 0x67, 0xCF,
-        0x0B, 0x48, 0xA0, 0xE8,
-        0x1B, 0x58, 0xA0, 0xE8,
-        0x2B, 0x68, 0xA0, 0xE8,
-        0x0C, 0x49, 0xA0, 0xE8,
-        0x1C, 0x59, 0xA0, 0xE8,
-        0x2C, 0x69, 0xA0, 0xE8,
-        0x0B, 0x00,
-        0x1B, 0x00,
-        0x2B, 0x00,
-        0x00, 0xE0,
-        0x0C, 0x00,
-        0x1C, 0x00,
-        0x2C, 0x00,
-        0x00, 0xE0,
-        0x0B, 0x65,
-        0x1B, 0x65,
-        0x2B, 0x65,
-        0x00, 0xE0,
-        0x0C, 0x65,
-        0x1C, 0x65,
-        0x2C, 0x65,
-        0x00, 0xE0,
-        0x0B, 0x1B, 0x60, 0xEC,
-        0x34, 0xD7, 0x34, 0xAD,
-        0x2B, 0x80, 0x60, 0xEC,
-        0x0C, 0x1C, 0x60, 0xEC,
-        0x3C, 0xD7, 0x3C, 0xAD,
-        0x2C, 0x80, 0x60, 0xEC,
-        0x0B, 0x2B, 0xDE, 0xE8,
-        0x1B, 0x80, 0xDE, 0xE8,
-        0x34, 0x80, 0x34, 0xBD,
-        0x3C, 0x80, 0x3C, 0xBD,
-        0x33, 0xD7, 0x0B, 0xBD,
-        0x3B, 0xD7, 0x1B, 0xBD,
-        0x48, 0x80, 0x48, 0xCF,
-        0x59, 0x80, 0x59, 0xCF,
-        0x68, 0x33, 0x68, 0xCF,
-        0x49, 0x3B, 0x49, 0xCF,
-        0xAD, 0xFF, 0x20, 0xEA,
-        0x00, 0x80, 0x00, 0xE8,
-        0x58, 0x33, 0x58, 0xCF,
-        0x69, 0x3B, 0x69, 0xCF,
-        0x6B, 0xFF, 0x20, 0xEA,
-        0x57, 0xC0, 0xBF, 0xEA,
-        0x00, 0x80, 0xA0, 0xE9,
-        0x00, 0x00, 0xD8, 0xEC,
-};
-static unsigned char warp_g400_tgz[] = {
-        0x00, 0x88, 0x98, 0xE9,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0xA0, 0xE9,
-        0x00, 0x00, 0xD8, 0xEC,
-        0xFF, 0x80, 0xC0, 0xE9,
-        0x00, 0x80, 0x00, 0xE8,
-        0x22, 0x40, 0x48, 0xBF,
-        0x2A, 0x40, 0x50, 0xBF,
-        0x32, 0x41, 0x49, 0xBF,
-        0x3A, 0x41, 0x51, 0xBF,
-        0xC3, 0x6B,
-        0xCB, 0x6B,
-        0x00, 0x88, 0x98, 0xE9,
-        0x73, 0x7B, 0xC8, 0xEC,
-        0x96, 0xE2,
-        0x41, 0x04,
-        0x7B, 0x43, 0xA0, 0xE8,
-        0x73, 0x4B, 0xA0, 0xE8,
-        0xAD, 0xEE, 0x29, 0x9F,
-        0x00, 0xE0,
-        0x49, 0x04,
-        0x90, 0xE2,
-        0x51, 0x04,
-        0x31, 0x46, 0xB1, 0xE8,
-        0x49, 0x41, 0xC0, 0xEC,
-        0x39, 0x57, 0xB1, 0xE8,
-        0x00, 0x04,
-        0x46, 0xE2,
-        0x73, 0x53, 0xA0, 0xE8,
-        0x51, 0x41, 0xC0, 0xEC,
-        0x31, 0x00,
-        0x39, 0x00,
-        0x58, 0x80, 0x15, 0xEA,
-        0x08, 0x04,
-        0x10, 0x04,
-        0x51, 0x49, 0xC0, 0xEC,
-        0x2F, 0x41, 0x60, 0xEA,
-        0x31, 0x20,
-        0x39, 0x20,
-        0x1F, 0x42, 0xA0, 0xE8,
-        0x2A, 0x42, 0x4A, 0xBF,
-        0x27, 0x4A, 0xA0, 0xE8,
-        0x1A, 0x42, 0x52, 0xBF,
-        0x1E, 0x49, 0x60, 0xEA,
-        0x73, 0x7B, 0xC8, 0xEC,
-        0x26, 0x51, 0x60, 0xEA,
-        0x32, 0x40, 0x48, 0xBD,
-        0x22, 0x40, 0x50, 0xBD,
-        0x12, 0x41, 0x49, 0xBD,
-        0x3A, 0x41, 0x51, 0xBD,
-        0xBF, 0x2F, 0x26, 0xBD,
-        0x00, 0xE0,
-        0x7B, 0x72,
-        0x32, 0x20,
-        0x22, 0x20,
-        0x12, 0x20,
-        0x3A, 0x20,
-        0x46, 0x31, 0x46, 0xBF,
-        0x4E, 0x31, 0x4E, 0xBF,
-        0xB3, 0xE2, 0x2D, 0x9F,
-        0x00, 0x80, 0x00, 0xE8,
-        0x56, 0x31, 0x56, 0xBF,
-        0x47, 0x39, 0x47, 0xBF,
-        0x4F, 0x39, 0x4F, 0xBF,
-        0x57, 0x39, 0x57, 0xBF,
-        0x4A, 0x80, 0x07, 0xEA,
-        0x24, 0x41, 0x20, 0xE9,
-        0x42, 0x73, 0xF8, 0xEC,
-        0x00, 0xE0,
-        0x2D, 0x73,
-        0x33, 0x72,
-        0x0C, 0xE3,
-        0xA5, 0x2F, 0x1E, 0xBD,
-        0x43, 0x43, 0x2D, 0xDF,
-        0x4B, 0x4B, 0x2D, 0xDF,
-        0xAE, 0x1E, 0x26, 0xBD,
-        0x58, 0xE3,
-        0x33, 0x66,
-        0x53, 0x53, 0x2D, 0xDF,
-        0x00, 0x80, 0x00, 0xE8,
-        0xB8, 0x38, 0x33, 0xBF,
-        0x00, 0xE0,
-        0x59, 0xE3,
-        0x1E, 0x12, 0x41, 0xE9,
-        0x1A, 0x22, 0x41, 0xE9,
-        0x2B, 0x40, 0x3D, 0xE9,
-        0x3F, 0x4B, 0xA0, 0xE8,
-        0x2D, 0x73,
-        0x30, 0x76,
-        0x05, 0x80, 0x3D, 0xEA,
-        0x37, 0x43, 0xA0, 0xE8,
-        0x3D, 0x53, 0xA0, 0xE8,
-        0x48, 0x70, 0xF8, 0xEC,
-        0x2B, 0x48, 0x3C, 0xE9,
-        0x1F, 0x27, 0xBC, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x15, 0xC0, 0x20, 0xE9,
-        0x15, 0xC0, 0x20, 0xE9,
-        0x15, 0xC0, 0x20, 0xE9,
-        0x15, 0xC0, 0x20, 0xE9,
-        0x18, 0x3A, 0x41, 0xE9,
-        0x1D, 0x32, 0x41, 0xE9,
-        0x2A, 0x40, 0x20, 0xE9,
-        0x56, 0x3D, 0x56, 0xDF,
-        0x46, 0x37, 0x46, 0xDF,
-        0x4E, 0x3F, 0x4E, 0xDF,
-        0x16, 0x30, 0x20, 0xE9,
-        0x4F, 0x3F, 0x4F, 0xDF,
-        0x32, 0x32, 0x2D, 0xDF,
-        0x22, 0x22, 0x2D, 0xDF,
-        0x12, 0x12, 0x2D, 0xDF,
-        0x3A, 0x3A, 0x2D, 0xDF,
-        0x47, 0x37, 0x47, 0xDF,
-        0x57, 0x3D, 0x57, 0xDF,
-        0x3D, 0xCF, 0x74, 0xC0,
-        0x37, 0xCF, 0x74, 0xC4,
-        0x31, 0x53, 0x2F, 0x9F,
-        0x34, 0x80, 0x20, 0xE9,
-        0x39, 0xE5, 0x2C, 0x9F,
-        0x3C, 0x3D, 0x20, 0xE9,
-        0x0A, 0x44, 0x4C, 0xB0,
-        0x02, 0x44, 0x54, 0xB0,
-        0x2A, 0x44, 0x4C, 0xB2,
-        0x1A, 0x44, 0x54, 0xB2,
-        0x1D, 0x80, 0x3A, 0xEA,
-        0x0A, 0x20,
-        0x02, 0x20,
-        0x3D, 0xCF, 0x74, 0xC2,
-        0x2A, 0x20,
-        0x1A, 0x20,
-        0x30, 0x50, 0x2E, 0x9F,
-        0x32, 0x31, 0x5F, 0xE9,
-        0x38, 0x21, 0x2C, 0x9F,
-        0x33, 0x39, 0x5F, 0xE9,
-        0x31, 0x53, 0x2F, 0x9F,
-        0x00, 0x80, 0x00, 0xE8,
-        0x2A, 0x44, 0x4C, 0xB4,
-        0x1A, 0x44, 0x54, 0xB4,
-        0x39, 0xE5, 0x2C, 0x9F,
-        0x38, 0x3D, 0x20, 0xE9,
-        0x88, 0x73, 0x5E, 0xE9,
-        0x2A, 0x20,
-        0x1A, 0x20,
-        0x2A, 0x46, 0x4E, 0xBF,
-        0x1A, 0x46, 0x56, 0xBF,
-        0x31, 0x53, 0x2F, 0x9F,
-        0x3E, 0x30, 0x4F, 0xE9,
-        0x39, 0xE5, 0x2C, 0x9F,
-        0x3F, 0x38, 0x4F, 0xE9,
-        0x0A, 0x47, 0x4F, 0xBF,
-        0x02, 0x47, 0x57, 0xBF,
-        0x31, 0x53, 0x2F, 0x9F,
-        0x3A, 0x31, 0x4F, 0xE9,
-        0x39, 0xE5, 0x2C, 0x9F,
-        0x3B, 0x39, 0x4F, 0xE9,
-        0x2A, 0x43, 0x4B, 0xBF,
-        0x1A, 0x43, 0x53, 0xBF,
-        0x30, 0x50, 0x2E, 0x9F,
-        0x36, 0x31, 0x4F, 0xE9,
-        0x38, 0x21, 0x2C, 0x9F,
-        0x37, 0x39, 0x4F, 0xE9,
-        0x31, 0x53, 0x2F, 0x9F,
-        0x80, 0x31, 0x57, 0xE9,
-        0x39, 0xE5, 0x2C, 0x9F,
-        0x81, 0x39, 0x57, 0xE9,
-        0x37, 0x48, 0x50, 0xBD,
-        0x8A, 0x36, 0x20, 0xE9,
-        0x86, 0x76, 0x57, 0xE9,
-        0x8B, 0x3E, 0x20, 0xE9,
-        0x82, 0x30, 0x57, 0xE9,
-        0x87, 0x77, 0x57, 0xE9,
-        0x83, 0x38, 0x57, 0xE9,
-        0x35, 0x49, 0x51, 0xBD,
-        0x84, 0x31, 0x5E, 0xE9,
-        0x30, 0x1F, 0x5F, 0xE9,
-        0x85, 0x39, 0x5E, 0xE9,
-        0x57, 0x25, 0x20, 0xE9,
-        0x2B, 0x48, 0x20, 0xE9,
-        0x1D, 0x37, 0xE1, 0xEA,
-        0x1E, 0x35, 0xE1, 0xEA,
-        0x00, 0xE0,
-        0x26, 0x77,
-        0x24, 0x49, 0x20, 0xE9,
-        0xAF, 0xFF, 0x20, 0xEA,
-        0x16, 0x26, 0x20, 0xE9,
-        0x57, 0x2E, 0xBF, 0xEA,
-        0x1C, 0x46, 0xA0, 0xE8,
-        0x23, 0x4E, 0xA0, 0xE8,
-        0x2B, 0x56, 0xA0, 0xE8,
-        0x1D, 0x47, 0xA0, 0xE8,
-        0x24, 0x4F, 0xA0, 0xE8,
-        0x2C, 0x57, 0xA0, 0xE8,
-        0x1C, 0x00,
-        0x23, 0x00,
-        0x2B, 0x00,
-        0x00, 0xE0,
-        0x1D, 0x00,
-        0x24, 0x00,
-        0x2C, 0x00,
-        0x00, 0xE0,
-        0x1C, 0x65,
-        0x23, 0x65,
-        0x2B, 0x65,
-        0x00, 0xE0,
-        0x1D, 0x65,
-        0x24, 0x65,
-        0x2C, 0x65,
-        0x00, 0xE0,
-        0x1C, 0x23, 0x60, 0xEC,
-        0x36, 0xD7, 0x36, 0xAD,
-        0x2B, 0x80, 0x60, 0xEC,
-        0x1D, 0x24, 0x60, 0xEC,
-        0x3E, 0xD7, 0x3E, 0xAD,
-        0x2C, 0x80, 0x60, 0xEC,
-        0x1C, 0x2B, 0xDE, 0xE8,
-        0x23, 0x80, 0xDE, 0xE8,
-        0x36, 0x80, 0x36, 0xBD,
-        0x3E, 0x80, 0x3E, 0xBD,
-        0x33, 0xD7, 0x1C, 0xBD,
-        0x3B, 0xD7, 0x23, 0xBD,
-        0x46, 0x80, 0x46, 0xCF,
-        0x4F, 0x80, 0x4F, 0xCF,
-        0x56, 0x33, 0x56, 0xCF,
-        0x47, 0x3B, 0x47, 0xCF,
-        0xD6, 0xFF, 0x20, 0xEA,
-        0x00, 0x80, 0x00, 0xE8,
-        0x4E, 0x33, 0x4E, 0xCF,
-        0x57, 0x3B, 0x57, 0xCF,
-        0x9D, 0xFF, 0x20, 0xEA,
-        0x57, 0xC0, 0xBF, 0xEA,
-        0x00, 0x80, 0xA0, 0xE9,
-        0x00, 0x00, 0xD8, 0xEC,
-};
-static unsigned char warp_g400_tgza[] = {
-        0x00, 0x88, 0x98, 0xE9,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0xA0, 0xE9,
-        0x00, 0x00, 0xD8, 0xEC,
-        0xFF, 0x80, 0xC0, 0xE9,
-        0x00, 0x80, 0x00, 0xE8,
-        0x22, 0x40, 0x48, 0xBF,
-        0x2A, 0x40, 0x50, 0xBF,
-        0x32, 0x41, 0x49, 0xBF,
-        0x3A, 0x41, 0x51, 0xBF,
-        0xC3, 0x6B,
-        0xCB, 0x6B,
-        0x00, 0x88, 0x98, 0xE9,
-        0x73, 0x7B, 0xC8, 0xEC,
-        0x96, 0xE2,
-        0x41, 0x04,
-        0x7B, 0x43, 0xA0, 0xE8,
-        0x73, 0x4B, 0xA0, 0xE8,
-        0xAD, 0xEE, 0x29, 0x9F,
-        0x00, 0xE0,
-        0x49, 0x04,
-        0x90, 0xE2,
-        0x51, 0x04,
-        0x31, 0x46, 0xB1, 0xE8,
-        0x49, 0x41, 0xC0, 0xEC,
-        0x39, 0x57, 0xB1, 0xE8,
-        0x00, 0x04,
-        0x46, 0xE2,
-        0x73, 0x53, 0xA0, 0xE8,
-        0x51, 0x41, 0xC0, 0xEC,
-        0x31, 0x00,
-        0x39, 0x00,
-        0x5C, 0x80, 0x15, 0xEA,
-        0x08, 0x04,
-        0x10, 0x04,
-        0x51, 0x49, 0xC0, 0xEC,
-        0x2F, 0x41, 0x60, 0xEA,
-        0x31, 0x20,
-        0x39, 0x20,
-        0x1F, 0x42, 0xA0, 0xE8,
-        0x2A, 0x42, 0x4A, 0xBF,
-        0x27, 0x4A, 0xA0, 0xE8,
-        0x1A, 0x42, 0x52, 0xBF,
-        0x1E, 0x49, 0x60, 0xEA,
-        0x73, 0x7B, 0xC8, 0xEC,
-        0x26, 0x51, 0x60, 0xEA,
-        0x32, 0x40, 0x48, 0xBD,
-        0x22, 0x40, 0x50, 0xBD,
-        0x12, 0x41, 0x49, 0xBD,
-        0x3A, 0x41, 0x51, 0xBD,
-        0xBF, 0x2F, 0x26, 0xBD,
-        0x00, 0xE0,
-        0x7B, 0x72,
-        0x32, 0x20,
-        0x22, 0x20,
-        0x12, 0x20,
-        0x3A, 0x20,
-        0x46, 0x31, 0x46, 0xBF,
-        0x4E, 0x31, 0x4E, 0xBF,
-        0xB3, 0xE2, 0x2D, 0x9F,
-        0x00, 0x80, 0x00, 0xE8,
-        0x56, 0x31, 0x56, 0xBF,
-        0x47, 0x39, 0x47, 0xBF,
-        0x4F, 0x39, 0x4F, 0xBF,
-        0x57, 0x39, 0x57, 0xBF,
-        0x4E, 0x80, 0x07, 0xEA,
-        0x24, 0x41, 0x20, 0xE9,
-        0x42, 0x73, 0xF8, 0xEC,
-        0x00, 0xE0,
-        0x2D, 0x73,
-        0x33, 0x72,
-        0x0C, 0xE3,
-        0xA5, 0x2F, 0x1E, 0xBD,
-        0x43, 0x43, 0x2D, 0xDF,
-        0x4B, 0x4B, 0x2D, 0xDF,
-        0xAE, 0x1E, 0x26, 0xBD,
-        0x58, 0xE3,
-        0x33, 0x66,
-        0x53, 0x53, 0x2D, 0xDF,
-        0x00, 0x80, 0x00, 0xE8,
-        0xB8, 0x38, 0x33, 0xBF,
-        0x00, 0xE0,
-        0x59, 0xE3,
-        0x1E, 0x12, 0x41, 0xE9,
-        0x1A, 0x22, 0x41, 0xE9,
-        0x2B, 0x40, 0x3D, 0xE9,
-        0x3F, 0x4B, 0xA0, 0xE8,
-        0x2D, 0x73,
-        0x30, 0x76,
-        0x05, 0x80, 0x3D, 0xEA,
-        0x37, 0x43, 0xA0, 0xE8,
-        0x3D, 0x53, 0xA0, 0xE8,
-        0x48, 0x70, 0xF8, 0xEC,
-        0x2B, 0x48, 0x3C, 0xE9,
-        0x1F, 0x27, 0xBC, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x15, 0xC0, 0x20, 0xE9,
-        0x15, 0xC0, 0x20, 0xE9,
-        0x15, 0xC0, 0x20, 0xE9,
-        0x15, 0xC0, 0x20, 0xE9,
-        0x18, 0x3A, 0x41, 0xE9,
-        0x1D, 0x32, 0x41, 0xE9,
-        0x2A, 0x40, 0x20, 0xE9,
-        0x56, 0x3D, 0x56, 0xDF,
-        0x46, 0x37, 0x46, 0xDF,
-        0x4E, 0x3F, 0x4E, 0xDF,
-        0x16, 0x30, 0x20, 0xE9,
-        0x4F, 0x3F, 0x4F, 0xDF,
-        0x32, 0x32, 0x2D, 0xDF,
-        0x22, 0x22, 0x2D, 0xDF,
-        0x12, 0x12, 0x2D, 0xDF,
-        0x3A, 0x3A, 0x2D, 0xDF,
-        0x47, 0x37, 0x47, 0xDF,
-        0x57, 0x3D, 0x57, 0xDF,
-        0x3D, 0xCF, 0x74, 0xC0,
-        0x37, 0xCF, 0x74, 0xC4,
-        0x31, 0x53, 0x2F, 0x9F,
-        0x34, 0x80, 0x20, 0xE9,
-        0x39, 0xE5, 0x2C, 0x9F,
-        0x3C, 0x3D, 0x20, 0xE9,
-        0x27, 0xCF, 0x74, 0xC6,
-        0x3D, 0xCF, 0x74, 0xC2,
-        0x0A, 0x44, 0x4C, 0xB0,
-        0x02, 0x44, 0x54, 0xB0,
-        0x2A, 0x44, 0x4C, 0xB2,
-        0x1A, 0x44, 0x54, 0xB2,
-        0x20, 0x80, 0x3A, 0xEA,
-        0x0A, 0x20,
-        0x02, 0x20,
-        0x88, 0x73, 0x5E, 0xE9,
-        0x2A, 0x20,
-        0x1A, 0x20,
-        0x30, 0x50, 0x2E, 0x9F,
-        0x32, 0x31, 0x5F, 0xE9,
-        0x38, 0x21, 0x2C, 0x9F,
-        0x33, 0x39, 0x5F, 0xE9,
-        0x31, 0x53, 0x2F, 0x9F,
-        0x9C, 0x27, 0x20, 0xE9,
-        0x0A, 0x44, 0x4C, 0xB4,
-        0x02, 0x44, 0x54, 0xB4,
-        0x2A, 0x44, 0x4C, 0xB6,
-        0x1A, 0x44, 0x54, 0xB6,
-        0x39, 0xE5, 0x2C, 0x9F,
-        0x38, 0x3D, 0x20, 0xE9,
-        0x0A, 0x20,
-        0x02, 0x20,
-        0x2A, 0x20,
-        0x1A, 0x20,
-        0x0A, 0x47, 0x4F, 0xBF,
-        0x02, 0x47, 0x57, 0xBF,
-        0x30, 0x50, 0x2E, 0x9F,
-        0x3E, 0x30, 0x4F, 0xE9,
-        0x38, 0x21, 0x2C, 0x9F,
-        0x3F, 0x38, 0x4F, 0xE9,
-        0x2A, 0x46, 0x4E, 0xBF,
-        0x1A, 0x46, 0x56, 0xBF,
-        0x31, 0x53, 0x2F, 0x9F,
-        0x3A, 0x31, 0x4F, 0xE9,
-        0x39, 0xE5, 0x2C, 0x9F,
-        0x3B, 0x39, 0x4F, 0xE9,
-        0x31, 0x53, 0x2F, 0x9F,
-        0x36, 0x30, 0x4F, 0xE9,
-        0x39, 0xE5, 0x2C, 0x9F,
-        0x37, 0x38, 0x4F, 0xE9,
-        0x2A, 0x43, 0x4B, 0xBF,
-        0x1A, 0x43, 0x53, 0xBF,
-        0x30, 0x50, 0x2E, 0x9F,
-        0x9D, 0x31, 0x4F, 0xE9,
-        0x38, 0x21, 0x2C, 0x9F,
-        0x9E, 0x39, 0x4F, 0xE9,
-        0x31, 0x53, 0x2F, 0x9F,
-        0x80, 0x31, 0x57, 0xE9,
-        0x39, 0xE5, 0x2C, 0x9F,
-        0x81, 0x39, 0x57, 0xE9,
-        0x37, 0x48, 0x50, 0xBD,
-        0x8A, 0x36, 0x20, 0xE9,
-        0x86, 0x76, 0x57, 0xE9,
-        0x8B, 0x3E, 0x20, 0xE9,
-        0x82, 0x30, 0x57, 0xE9,
-        0x87, 0x77, 0x57, 0xE9,
-        0x83, 0x38, 0x57, 0xE9,
-        0x35, 0x49, 0x51, 0xBD,
-        0x84, 0x31, 0x5E, 0xE9,
-        0x30, 0x1F, 0x5F, 0xE9,
-        0x85, 0x39, 0x5E, 0xE9,
-        0x57, 0x25, 0x20, 0xE9,
-        0x2B, 0x48, 0x20, 0xE9,
-        0x1D, 0x37, 0xE1, 0xEA,
-        0x1E, 0x35, 0xE1, 0xEA,
-        0x00, 0xE0,
-        0x26, 0x77,
-        0x24, 0x49, 0x20, 0xE9,
-        0xAB, 0xFF, 0x20, 0xEA,
-        0x16, 0x26, 0x20, 0xE9,
-        0x57, 0x2E, 0xBF, 0xEA,
-        0x1C, 0x46, 0xA0, 0xE8,
-        0x23, 0x4E, 0xA0, 0xE8,
-        0x2B, 0x56, 0xA0, 0xE8,
-        0x1D, 0x47, 0xA0, 0xE8,
-        0x24, 0x4F, 0xA0, 0xE8,
-        0x2C, 0x57, 0xA0, 0xE8,
-        0x1C, 0x00,
-        0x23, 0x00,
-        0x2B, 0x00,
-        0x00, 0xE0,
-        0x1D, 0x00,
-        0x24, 0x00,
-        0x2C, 0x00,
-        0x00, 0xE0,
-        0x1C, 0x65,
-        0x23, 0x65,
-        0x2B, 0x65,
-        0x00, 0xE0,
-        0x1D, 0x65,
-        0x24, 0x65,
-        0x2C, 0x65,
-        0x00, 0xE0,
-        0x1C, 0x23, 0x60, 0xEC,
-        0x36, 0xD7, 0x36, 0xAD,
-        0x2B, 0x80, 0x60, 0xEC,
-        0x1D, 0x24, 0x60, 0xEC,
-        0x3E, 0xD7, 0x3E, 0xAD,
-        0x2C, 0x80, 0x60, 0xEC,
-        0x1C, 0x2B, 0xDE, 0xE8,
-        0x23, 0x80, 0xDE, 0xE8,
-        0x36, 0x80, 0x36, 0xBD,
-        0x3E, 0x80, 0x3E, 0xBD,
-        0x33, 0xD7, 0x1C, 0xBD,
-        0x3B, 0xD7, 0x23, 0xBD,
-        0x46, 0x80, 0x46, 0xCF,
-        0x4F, 0x80, 0x4F, 0xCF,
-        0x56, 0x33, 0x56, 0xCF,
-        0x47, 0x3B, 0x47, 0xCF,
-        0xD3, 0xFF, 0x20, 0xEA,
-        0x00, 0x80, 0x00, 0xE8,
-        0x4E, 0x33, 0x4E, 0xCF,
-        0x57, 0x3B, 0x57, 0xCF,
-        0x99, 0xFF, 0x20, 0xEA,
-        0x57, 0xC0, 0xBF, 0xEA,
-        0x00, 0x80, 0xA0, 0xE9,
-        0x00, 0x00, 0xD8, 0xEC,
-};
-static unsigned char warp_g400_tgzaf[] = {
-        0x00, 0x88, 0x98, 0xE9,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0xA0, 0xE9,
-        0x00, 0x00, 0xD8, 0xEC,
-        0xFF, 0x80, 0xC0, 0xE9,
-        0x00, 0x80, 0x00, 0xE8,
-        0x22, 0x40, 0x48, 0xBF,
-        0x2A, 0x40, 0x50, 0xBF,
-        0x32, 0x41, 0x49, 0xBF,
-        0x3A, 0x41, 0x51, 0xBF,
-        0xC3, 0x6B,
-        0xCB, 0x6B,
-        0x00, 0x88, 0x98, 0xE9,
-        0x73, 0x7B, 0xC8, 0xEC,
-        0x96, 0xE2,
-        0x41, 0x04,
-        0x7B, 0x43, 0xA0, 0xE8,
-        0x73, 0x4B, 0xA0, 0xE8,
-        0xAD, 0xEE, 0x29, 0x9F,
-        0x00, 0xE0,
-        0x49, 0x04,
-        0x90, 0xE2,
-        0x51, 0x04,
-        0x31, 0x46, 0xB1, 0xE8,
-        0x49, 0x41, 0xC0, 0xEC,
-        0x39, 0x57, 0xB1, 0xE8,
-        0x00, 0x04,
-        0x46, 0xE2,
-        0x73, 0x53, 0xA0, 0xE8,
-        0x51, 0x41, 0xC0, 0xEC,
-        0x31, 0x00,
-        0x39, 0x00,
-        0x61, 0x80, 0x15, 0xEA,
-        0x08, 0x04,
-        0x10, 0x04,
-        0x51, 0x49, 0xC0, 0xEC,
-        0x2F, 0x41, 0x60, 0xEA,
-        0x31, 0x20,
-        0x39, 0x20,
-        0x1F, 0x42, 0xA0, 0xE8,
-        0x2A, 0x42, 0x4A, 0xBF,
-        0x27, 0x4A, 0xA0, 0xE8,
-        0x1A, 0x42, 0x52, 0xBF,
-        0x1E, 0x49, 0x60, 0xEA,
-        0x73, 0x7B, 0xC8, 0xEC,
-        0x26, 0x51, 0x60, 0xEA,
-        0x32, 0x40, 0x48, 0xBD,
-        0x22, 0x40, 0x50, 0xBD,
-        0x12, 0x41, 0x49, 0xBD,
-        0x3A, 0x41, 0x51, 0xBD,
-        0xBF, 0x2F, 0x26, 0xBD,
-        0x00, 0xE0,
-        0x7B, 0x72,
-        0x32, 0x20,
-        0x22, 0x20,
-        0x12, 0x20,
-        0x3A, 0x20,
-        0x46, 0x31, 0x46, 0xBF,
-        0x4E, 0x31, 0x4E, 0xBF,
-        0xB3, 0xE2, 0x2D, 0x9F,
-        0x00, 0x80, 0x00, 0xE8,
-        0x56, 0x31, 0x56, 0xBF,
-        0x47, 0x39, 0x47, 0xBF,
-        0x4F, 0x39, 0x4F, 0xBF,
-        0x57, 0x39, 0x57, 0xBF,
-        0x53, 0x80, 0x07, 0xEA,
-        0x24, 0x41, 0x20, 0xE9,
-        0x42, 0x73, 0xF8, 0xEC,
-        0x00, 0xE0,
-        0x2D, 0x73,
-        0x33, 0x72,
-        0x0C, 0xE3,
-        0xA5, 0x2F, 0x1E, 0xBD,
-        0x43, 0x43, 0x2D, 0xDF,
-        0x4B, 0x4B, 0x2D, 0xDF,
-        0xAE, 0x1E, 0x26, 0xBD,
-        0x58, 0xE3,
-        0x33, 0x66,
-        0x53, 0x53, 0x2D, 0xDF,
-        0x00, 0x80, 0x00, 0xE8,
-        0xB8, 0x38, 0x33, 0xBF,
-        0x00, 0xE0,
-        0x59, 0xE3,
-        0x1E, 0x12, 0x41, 0xE9,
-        0x1A, 0x22, 0x41, 0xE9,
-        0x2B, 0x40, 0x3D, 0xE9,
-        0x3F, 0x4B, 0xA0, 0xE8,
-        0x2D, 0x73,
-        0x30, 0x76,
-        0x05, 0x80, 0x3D, 0xEA,
-        0x37, 0x43, 0xA0, 0xE8,
-        0x3D, 0x53, 0xA0, 0xE8,
-        0x48, 0x70, 0xF8, 0xEC,
-        0x2B, 0x48, 0x3C, 0xE9,
-        0x1F, 0x27, 0xBC, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x15, 0xC0, 0x20, 0xE9,
-        0x15, 0xC0, 0x20, 0xE9,
-        0x15, 0xC0, 0x20, 0xE9,
-        0x15, 0xC0, 0x20, 0xE9,
-        0x18, 0x3A, 0x41, 0xE9,
-        0x1D, 0x32, 0x41, 0xE9,
-        0x2A, 0x40, 0x20, 0xE9,
-        0x56, 0x3D, 0x56, 0xDF,
-        0x46, 0x37, 0x46, 0xDF,
-        0x4E, 0x3F, 0x4E, 0xDF,
-        0x16, 0x30, 0x20, 0xE9,
-        0x4F, 0x3F, 0x4F, 0xDF,
-        0x32, 0x32, 0x2D, 0xDF,
-        0x22, 0x22, 0x2D, 0xDF,
-        0x12, 0x12, 0x2D, 0xDF,
-        0x3A, 0x3A, 0x2D, 0xDF,
-        0x47, 0x37, 0x47, 0xDF,
-        0x57, 0x3D, 0x57, 0xDF,
-        0x3D, 0xCF, 0x74, 0xC0,
-        0x37, 0xCF, 0x74, 0xC4,
-        0x0A, 0x44, 0x4C, 0xB0,
-        0x02, 0x44, 0x54, 0xB0,
-        0x31, 0x53, 0x2F, 0x9F,
-        0x34, 0x37, 0x20, 0xE9,
-        0x39, 0xE5, 0x2C, 0x9F,
-        0x3C, 0x3D, 0x20, 0xE9,
-        0x2A, 0x44, 0x4C, 0xB2,
-        0x1A, 0x44, 0x54, 0xB2,
-        0x26, 0x80, 0x3A, 0xEA,
-        0x0A, 0x20,
-        0x02, 0x20,
-        0x88, 0x73, 0x5E, 0xE9,
-        0x2A, 0x20,
-        0x1A, 0x20,
-        0x3D, 0xCF, 0x74, 0xC2,
-        0x27, 0xCF, 0x74, 0xC6,
-        0x30, 0x50, 0x2E, 0x9F,
-        0x32, 0x31, 0x5F, 0xE9,
-        0x38, 0x21, 0x2C, 0x9F,
-        0x33, 0x39, 0x5F, 0xE9,
-        0x31, 0x53, 0x2F, 0x9F,
-        0x9C, 0x27, 0x20, 0xE9,
-        0x0A, 0x44, 0x4C, 0xB4,
-        0x02, 0x44, 0x54, 0xB4,
-        0x2A, 0x44, 0x4C, 0xB6,
-        0x1A, 0x44, 0x54, 0xB6,
-        0x39, 0xE5, 0x2C, 0x9F,
-        0x38, 0x3D, 0x20, 0xE9,
-        0x0A, 0x20,
-        0x02, 0x20,
-        0x2A, 0x20,
-        0x1A, 0x20,
-        0x3D, 0xCF, 0x75, 0xC6,
-        0x00, 0x80, 0x00, 0xE8,
-        0x30, 0x50, 0x2E, 0x9F,
-        0x3E, 0x30, 0x4F, 0xE9,
-        0x38, 0x21, 0x2C, 0x9F,
-        0x3F, 0x38, 0x4F, 0xE9,
-        0x0A, 0x45, 0x4D, 0xB6,
-        0x02, 0x45, 0x55, 0xB6,
-        0x31, 0x53, 0x2F, 0x9F,
-        0x3A, 0x31, 0x4F, 0xE9,
-        0x39, 0xE5, 0x2C, 0x9F,
-        0x3B, 0x39, 0x4F, 0xE9,
-        0x31, 0x3D, 0x20, 0xE9,
-        0x0A, 0x20,
-        0x02, 0x20,
-        0x2A, 0x46, 0x4E, 0xBF,
-        0x1A, 0x46, 0x56, 0xBF,
-        0x0A, 0x47, 0x4F, 0xBF,
-        0x02, 0x47, 0x57, 0xBF,
-        0x30, 0x50, 0x2E, 0x9F,
-        0x36, 0x30, 0x4F, 0xE9,
-        0x38, 0x21, 0x2C, 0x9F,
-        0x37, 0x38, 0x4F, 0xE9,
-        0x31, 0x53, 0x2F, 0x9F,
-        0x9D, 0x31, 0x4F, 0xE9,
-        0x39, 0xE5, 0x2C, 0x9F,
-        0x9E, 0x39, 0x4F, 0xE9,
-        0x2A, 0x43, 0x4B, 0xBF,
-        0x1A, 0x43, 0x53, 0xBF,
-        0x30, 0x50, 0x2E, 0x9F,
-        0x35, 0x30, 0x4F, 0xE9,
-        0x38, 0x21, 0x2C, 0x9F,
-        0x39, 0x38, 0x4F, 0xE9,
-        0x31, 0x53, 0x2F, 0x9F,
-        0x80, 0x31, 0x57, 0xE9,
-        0x39, 0xE5, 0x2C, 0x9F,
-        0x81, 0x39, 0x57, 0xE9,
-        0x37, 0x48, 0x50, 0xBD,
-        0x8A, 0x36, 0x20, 0xE9,
-        0x86, 0x76, 0x57, 0xE9,
-        0x8B, 0x3E, 0x20, 0xE9,
-        0x82, 0x30, 0x57, 0xE9,
-        0x87, 0x77, 0x57, 0xE9,
-        0x83, 0x38, 0x57, 0xE9,
-        0x35, 0x49, 0x51, 0xBD,
-        0x84, 0x31, 0x5E, 0xE9,
-        0x30, 0x1F, 0x5F, 0xE9,
-        0x85, 0x39, 0x5E, 0xE9,
-        0x57, 0x25, 0x20, 0xE9,
-        0x2B, 0x48, 0x20, 0xE9,
-        0x1D, 0x37, 0xE1, 0xEA,
-        0x1E, 0x35, 0xE1, 0xEA,
-        0x00, 0xE0,
-        0x26, 0x77,
-        0x24, 0x49, 0x20, 0xE9,
-        0xA6, 0xFF, 0x20, 0xEA,
-        0x16, 0x26, 0x20, 0xE9,
-        0x57, 0x2E, 0xBF, 0xEA,
-        0x1C, 0x46, 0xA0, 0xE8,
-        0x23, 0x4E, 0xA0, 0xE8,
-        0x2B, 0x56, 0xA0, 0xE8,
-        0x1D, 0x47, 0xA0, 0xE8,
-        0x24, 0x4F, 0xA0, 0xE8,
-        0x2C, 0x57, 0xA0, 0xE8,
-        0x1C, 0x00,
-        0x23, 0x00,
-        0x2B, 0x00,
-        0x00, 0xE0,
-        0x1D, 0x00,
-        0x24, 0x00,
-        0x2C, 0x00,
-        0x00, 0xE0,
-        0x1C, 0x65,
-        0x23, 0x65,
-        0x2B, 0x65,
-        0x00, 0xE0,
-        0x1D, 0x65,
-        0x24, 0x65,
-        0x2C, 0x65,
-        0x00, 0xE0,
-        0x1C, 0x23, 0x60, 0xEC,
-        0x36, 0xD7, 0x36, 0xAD,
-        0x2B, 0x80, 0x60, 0xEC,
-        0x1D, 0x24, 0x60, 0xEC,
-        0x3E, 0xD7, 0x3E, 0xAD,
-        0x2C, 0x80, 0x60, 0xEC,
-        0x1C, 0x2B, 0xDE, 0xE8,
-        0x23, 0x80, 0xDE, 0xE8,
-        0x36, 0x80, 0x36, 0xBD,
-        0x3E, 0x80, 0x3E, 0xBD,
-        0x33, 0xD7, 0x1C, 0xBD,
-        0x3B, 0xD7, 0x23, 0xBD,
-        0x46, 0x80, 0x46, 0xCF,
-        0x4F, 0x80, 0x4F, 0xCF,
-        0x56, 0x33, 0x56, 0xCF,
-        0x47, 0x3B, 0x47, 0xCF,
-        0xCD, 0xFF, 0x20, 0xEA,
-        0x00, 0x80, 0x00, 0xE8,
-        0x4E, 0x33, 0x4E, 0xCF,
-        0x57, 0x3B, 0x57, 0xCF,
-        0x94, 0xFF, 0x20, 0xEA,
-        0x57, 0xC0, 0xBF, 0xEA,
-        0x00, 0x80, 0xA0, 0xE9,
-        0x00, 0x00, 0xD8, 0xEC,
-};
-static unsigned char warp_g400_tgzf[] = {
-        0x00, 0x88, 0x98, 0xE9,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0xA0, 0xE9,
-        0x00, 0x00, 0xD8, 0xEC,
-        0xFF, 0x80, 0xC0, 0xE9,
-        0x00, 0x80, 0x00, 0xE8,
-        0x22, 0x40, 0x48, 0xBF,
-        0x2A, 0x40, 0x50, 0xBF,
-        0x32, 0x41, 0x49, 0xBF,
-        0x3A, 0x41, 0x51, 0xBF,
-        0xC3, 0x6B,
-        0xCB, 0x6B,
-        0x00, 0x88, 0x98, 0xE9,
-        0x73, 0x7B, 0xC8, 0xEC,
-        0x96, 0xE2,
-        0x41, 0x04,
-        0x7B, 0x43, 0xA0, 0xE8,
-        0x73, 0x4B, 0xA0, 0xE8,
-        0xAD, 0xEE, 0x29, 0x9F,
-        0x00, 0xE0,
-        0x49, 0x04,
-        0x90, 0xE2,
-        0x51, 0x04,
-        0x31, 0x46, 0xB1, 0xE8,
-        0x49, 0x41, 0xC0, 0xEC,
-        0x39, 0x57, 0xB1, 0xE8,
-        0x00, 0x04,
-        0x46, 0xE2,
-        0x73, 0x53, 0xA0, 0xE8,
-        0x51, 0x41, 0xC0, 0xEC,
-        0x31, 0x00,
-        0x39, 0x00,
-        0x5D, 0x80, 0x15, 0xEA,
-        0x08, 0x04,
-        0x10, 0x04,
-        0x51, 0x49, 0xC0, 0xEC,
-        0x2F, 0x41, 0x60, 0xEA,
-        0x31, 0x20,
-        0x39, 0x20,
-        0x1F, 0x42, 0xA0, 0xE8,
-        0x2A, 0x42, 0x4A, 0xBF,
-        0x27, 0x4A, 0xA0, 0xE8,
-        0x1A, 0x42, 0x52, 0xBF,
-        0x1E, 0x49, 0x60, 0xEA,
-        0x73, 0x7B, 0xC8, 0xEC,
-        0x26, 0x51, 0x60, 0xEA,
-        0x32, 0x40, 0x48, 0xBD,
-        0x22, 0x40, 0x50, 0xBD,
-        0x12, 0x41, 0x49, 0xBD,
-        0x3A, 0x41, 0x51, 0xBD,
-        0xBF, 0x2F, 0x26, 0xBD,
-        0x00, 0xE0,
-        0x7B, 0x72,
-        0x32, 0x20,
-        0x22, 0x20,
-        0x12, 0x20,
-        0x3A, 0x20,
-        0x46, 0x31, 0x46, 0xBF,
-        0x4E, 0x31, 0x4E, 0xBF,
-        0xB3, 0xE2, 0x2D, 0x9F,
-        0x00, 0x80, 0x00, 0xE8,
-        0x56, 0x31, 0x56, 0xBF,
-        0x47, 0x39, 0x47, 0xBF,
-        0x4F, 0x39, 0x4F, 0xBF,
-        0x57, 0x39, 0x57, 0xBF,
-        0x4F, 0x80, 0x07, 0xEA,
-        0x24, 0x41, 0x20, 0xE9,
-        0x42, 0x73, 0xF8, 0xEC,
-        0x00, 0xE0,
-        0x2D, 0x73,
-        0x33, 0x72,
-        0x0C, 0xE3,
-        0xA5, 0x2F, 0x1E, 0xBD,
-        0x43, 0x43, 0x2D, 0xDF,
-        0x4B, 0x4B, 0x2D, 0xDF,
-        0xAE, 0x1E, 0x26, 0xBD,
-        0x58, 0xE3,
-        0x33, 0x66,
-        0x53, 0x53, 0x2D, 0xDF,
-        0x00, 0x80, 0x00, 0xE8,
-        0xB8, 0x38, 0x33, 0xBF,
-        0x00, 0xE0,
-        0x59, 0xE3,
-        0x1E, 0x12, 0x41, 0xE9,
-        0x1A, 0x22, 0x41, 0xE9,
-        0x2B, 0x40, 0x3D, 0xE9,
-        0x3F, 0x4B, 0xA0, 0xE8,
-        0x2D, 0x73,
-        0x30, 0x76,
-        0x05, 0x80, 0x3D, 0xEA,
-        0x37, 0x43, 0xA0, 0xE8,
-        0x3D, 0x53, 0xA0, 0xE8,
-        0x48, 0x70, 0xF8, 0xEC,
-        0x2B, 0x48, 0x3C, 0xE9,
-        0x1F, 0x27, 0xBC, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x15, 0xC0, 0x20, 0xE9,
-        0x15, 0xC0, 0x20, 0xE9,
-        0x15, 0xC0, 0x20, 0xE9,
-        0x15, 0xC0, 0x20, 0xE9,
-        0x18, 0x3A, 0x41, 0xE9,
-        0x1D, 0x32, 0x41, 0xE9,
-        0x2A, 0x40, 0x20, 0xE9,
-        0x56, 0x3D, 0x56, 0xDF,
-        0x46, 0x37, 0x46, 0xDF,
-        0x4E, 0x3F, 0x4E, 0xDF,
-        0x16, 0x30, 0x20, 0xE9,
-        0x4F, 0x3F, 0x4F, 0xDF,
-        0x32, 0x32, 0x2D, 0xDF,
-        0x22, 0x22, 0x2D, 0xDF,
-        0x12, 0x12, 0x2D, 0xDF,
-        0x3A, 0x3A, 0x2D, 0xDF,
-        0x47, 0x37, 0x47, 0xDF,
-        0x57, 0x3D, 0x57, 0xDF,
-        0x3D, 0xCF, 0x74, 0xC0,
-        0x37, 0xCF, 0x74, 0xC4,
-        0x39, 0xE5, 0x2C, 0x9F,
-        0x34, 0x80, 0x20, 0xE9,
-        0x31, 0x53, 0x2F, 0x9F,
-        0x00, 0x80, 0x00, 0xE8,
-        0x88, 0x73, 0x5E, 0xE9,
-        0x00, 0x80, 0x00, 0xE8,
-        0x27, 0xCF, 0x75, 0xC6,
-        0x3C, 0x3D, 0x20, 0xE9,
-        0x0A, 0x44, 0x4C, 0xB0,
-        0x02, 0x44, 0x54, 0xB0,
-        0x2A, 0x44, 0x4C, 0xB2,
-        0x1A, 0x44, 0x54, 0xB2,
-        0x20, 0x80, 0x3A, 0xEA,
-        0x0A, 0x20,
-        0x02, 0x20,
-        0x3D, 0xCF, 0x74, 0xC2,
-        0x2A, 0x20,
-        0x1A, 0x20,
-        0x30, 0x50, 0x2E, 0x9F,
-        0x32, 0x31, 0x5F, 0xE9,
-        0x38, 0x21, 0x2C, 0x9F,
-        0x33, 0x39, 0x5F, 0xE9,
-        0x31, 0x53, 0x2F, 0x9F,
-        0x31, 0x27, 0x20, 0xE9,
-        0x0A, 0x44, 0x4C, 0xB4,
-        0x02, 0x44, 0x54, 0xB4,
-        0x2A, 0x45, 0x4D, 0xB6,
-        0x1A, 0x45, 0x55, 0xB6,
-        0x39, 0xE5, 0x2C, 0x9F,
-        0x38, 0x3D, 0x20, 0xE9,
-        0x0A, 0x20,
-        0x02, 0x20,
-        0x2A, 0x20,
-        0x1A, 0x20,
-        0x0A, 0x47, 0x4F, 0xBF,
-        0x02, 0x47, 0x57, 0xBF,
-        0x30, 0x50, 0x2E, 0x9F,
-        0x3E, 0x30, 0x4F, 0xE9,
-        0x38, 0x21, 0x2C, 0x9F,
-        0x3F, 0x38, 0x4F, 0xE9,
-        0x2A, 0x46, 0x4E, 0xBF,
-        0x1A, 0x46, 0x56, 0xBF,
-        0x31, 0x53, 0x2F, 0x9F,
-        0x3A, 0x31, 0x4F, 0xE9,
-        0x39, 0xE5, 0x2C, 0x9F,
-        0x3B, 0x39, 0x4F, 0xE9,
-        0x31, 0x53, 0x2F, 0x9F,
-        0x36, 0x30, 0x4F, 0xE9,
-        0x39, 0xE5, 0x2C, 0x9F,
-        0x37, 0x38, 0x4F, 0xE9,
-        0x2A, 0x43, 0x4B, 0xBF,
-        0x1A, 0x43, 0x53, 0xBF,
-        0x30, 0x50, 0x2E, 0x9F,
-        0x35, 0x31, 0x4F, 0xE9,
-        0x38, 0x21, 0x2C, 0x9F,
-        0x39, 0x39, 0x4F, 0xE9,
-        0x31, 0x53, 0x2F, 0x9F,
-        0x80, 0x31, 0x57, 0xE9,
-        0x39, 0xE5, 0x2C, 0x9F,
-        0x81, 0x39, 0x57, 0xE9,
-        0x37, 0x48, 0x50, 0xBD,
-        0x8A, 0x36, 0x20, 0xE9,
-        0x86, 0x76, 0x57, 0xE9,
-        0x8B, 0x3E, 0x20, 0xE9,
-        0x82, 0x30, 0x57, 0xE9,
-        0x87, 0x77, 0x57, 0xE9,
-        0x83, 0x38, 0x57, 0xE9,
-        0x35, 0x49, 0x51, 0xBD,
-        0x84, 0x31, 0x5E, 0xE9,
-        0x30, 0x1F, 0x5F, 0xE9,
-        0x85, 0x39, 0x5E, 0xE9,
-        0x57, 0x25, 0x20, 0xE9,
-        0x2B, 0x48, 0x20, 0xE9,
-        0x1D, 0x37, 0xE1, 0xEA,
-        0x1E, 0x35, 0xE1, 0xEA,
-        0x00, 0xE0,
-        0x26, 0x77,
-        0x24, 0x49, 0x20, 0xE9,
-        0xAA, 0xFF, 0x20, 0xEA,
-        0x16, 0x26, 0x20, 0xE9,
-        0x57, 0x2E, 0xBF, 0xEA,
-        0x1C, 0x46, 0xA0, 0xE8,
-        0x23, 0x4E, 0xA0, 0xE8,
-        0x2B, 0x56, 0xA0, 0xE8,
-        0x1D, 0x47, 0xA0, 0xE8,
-        0x24, 0x4F, 0xA0, 0xE8,
-        0x2C, 0x57, 0xA0, 0xE8,
-        0x1C, 0x00,
-        0x23, 0x00,
-        0x2B, 0x00,
-        0x00, 0xE0,
-        0x1D, 0x00,
-        0x24, 0x00,
-        0x2C, 0x00,
-        0x00, 0xE0,
-        0x1C, 0x65,
-        0x23, 0x65,
-        0x2B, 0x65,
-        0x00, 0xE0,
-        0x1D, 0x65,
-        0x24, 0x65,
-        0x2C, 0x65,
-        0x00, 0xE0,
-        0x1C, 0x23, 0x60, 0xEC,
-        0x36, 0xD7, 0x36, 0xAD,
-        0x2B, 0x80, 0x60, 0xEC,
-        0x1D, 0x24, 0x60, 0xEC,
-        0x3E, 0xD7, 0x3E, 0xAD,
-        0x2C, 0x80, 0x60, 0xEC,
-        0x1C, 0x2B, 0xDE, 0xE8,
-        0x23, 0x80, 0xDE, 0xE8,
-        0x36, 0x80, 0x36, 0xBD,
-        0x3E, 0x80, 0x3E, 0xBD,
-        0x33, 0xD7, 0x1C, 0xBD,
-        0x3B, 0xD7, 0x23, 0xBD,
-        0x46, 0x80, 0x46, 0xCF,
-        0x4F, 0x80, 0x4F, 0xCF,
-        0x56, 0x33, 0x56, 0xCF,
-        0x47, 0x3B, 0x47, 0xCF,
-        0xD3, 0xFF, 0x20, 0xEA,
-        0x00, 0x80, 0x00, 0xE8,
-        0x4E, 0x33, 0x4E, 0xCF,
-        0x57, 0x3B, 0x57, 0xCF,
-        0x98, 0xFF, 0x20, 0xEA,
-        0x57, 0xC0, 0xBF, 0xEA,
-        0x00, 0x80, 0xA0, 0xE9,
-        0x00, 0x00, 0xD8, 0xEC,
-};
-static unsigned char warp_g400_tgzs[] = {
-        0x00, 0x88, 0x98, 0xE9,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0xA0, 0xE9,
-        0x00, 0x00, 0xD8, 0xEC,
-        0xFF, 0x80, 0xC0, 0xE9,
-        0x00, 0x80, 0x00, 0xE8,
-        0x22, 0x40, 0x48, 0xBF,
-        0x2A, 0x40, 0x50, 0xBF,
-        0x32, 0x41, 0x49, 0xBF,
-        0x3A, 0x41, 0x51, 0xBF,
-        0xC3, 0x6B,
-        0xCB, 0x6B,
-        0x00, 0x88, 0x98, 0xE9,
-        0x73, 0x7B, 0xC8, 0xEC,
-        0x96, 0xE2,
-        0x41, 0x04,
-        0x7B, 0x43, 0xA0, 0xE8,
-        0x73, 0x4B, 0xA0, 0xE8,
-        0xAD, 0xEE, 0x29, 0x9F,
-        0x00, 0xE0,
-        0x49, 0x04,
-        0x90, 0xE2,
-        0x51, 0x04,
-        0x31, 0x46, 0xB1, 0xE8,
-        0x49, 0x41, 0xC0, 0xEC,
-        0x39, 0x57, 0xB1, 0xE8,
-        0x00, 0x04,
-        0x46, 0xE2,
-        0x73, 0x53, 0xA0, 0xE8,
-        0x51, 0x41, 0xC0, 0xEC,
-        0x31, 0x00,
-        0x39, 0x00,
-        0x65, 0x80, 0x15, 0xEA,
-        0x08, 0x04,
-        0x10, 0x04,
-        0x51, 0x49, 0xC0, 0xEC,
-        0x2F, 0x41, 0x60, 0xEA,
-        0x31, 0x20,
-        0x39, 0x20,
-        0x1F, 0x42, 0xA0, 0xE8,
-        0x2A, 0x42, 0x4A, 0xBF,
-        0x27, 0x4A, 0xA0, 0xE8,
-        0x1A, 0x42, 0x52, 0xBF,
-        0x1E, 0x49, 0x60, 0xEA,
-        0x73, 0x7B, 0xC8, 0xEC,
-        0x26, 0x51, 0x60, 0xEA,
-        0x32, 0x40, 0x48, 0xBD,
-        0x22, 0x40, 0x50, 0xBD,
-        0x12, 0x41, 0x49, 0xBD,
-        0x3A, 0x41, 0x51, 0xBD,
-        0xBF, 0x2F, 0x26, 0xBD,
-        0x00, 0xE0,
-        0x7B, 0x72,
-        0x32, 0x20,
-        0x22, 0x20,
-        0x12, 0x20,
-        0x3A, 0x20,
-        0x46, 0x31, 0x46, 0xBF,
-        0x4E, 0x31, 0x4E, 0xBF,
-        0xB3, 0xE2, 0x2D, 0x9F,
-        0x00, 0x80, 0x00, 0xE8,
-        0x56, 0x31, 0x56, 0xBF,
-        0x47, 0x39, 0x47, 0xBF,
-        0x4F, 0x39, 0x4F, 0xBF,
-        0x57, 0x39, 0x57, 0xBF,
-        0x57, 0x80, 0x07, 0xEA,
-        0x24, 0x41, 0x20, 0xE9,
-        0x42, 0x73, 0xF8, 0xEC,
-        0x00, 0xE0,
-        0x2D, 0x73,
-        0x33, 0x72,
-        0x0C, 0xE3,
-        0xA5, 0x2F, 0x1E, 0xBD,
-        0x43, 0x43, 0x2D, 0xDF,
-        0x4B, 0x4B, 0x2D, 0xDF,
-        0xAE, 0x1E, 0x26, 0xBD,
-        0x58, 0xE3,
-        0x33, 0x66,
-        0x53, 0x53, 0x2D, 0xDF,
-        0x00, 0x80, 0x00, 0xE8,
-        0xB8, 0x38, 0x33, 0xBF,
-        0x00, 0xE0,
-        0x59, 0xE3,
-        0x1E, 0x12, 0x41, 0xE9,
-        0x1A, 0x22, 0x41, 0xE9,
-        0x2B, 0x40, 0x3D, 0xE9,
-        0x3F, 0x4B, 0xA0, 0xE8,
-        0x2D, 0x73,
-        0x30, 0x76,
-        0x05, 0x80, 0x3D, 0xEA,
-        0x37, 0x43, 0xA0, 0xE8,
-        0x3D, 0x53, 0xA0, 0xE8,
-        0x48, 0x70, 0xF8, 0xEC,
-        0x2B, 0x48, 0x3C, 0xE9,
-        0x1F, 0x27, 0xBC, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x15, 0xC0, 0x20, 0xE9,
-        0x15, 0xC0, 0x20, 0xE9,
-        0x15, 0xC0, 0x20, 0xE9,
-        0x15, 0xC0, 0x20, 0xE9,
-        0x18, 0x3A, 0x41, 0xE9,
-        0x1D, 0x32, 0x41, 0xE9,
-        0x2A, 0x40, 0x20, 0xE9,
-        0x56, 0x3D, 0x56, 0xDF,
-        0x46, 0x37, 0x46, 0xDF,
-        0x4E, 0x3F, 0x4E, 0xDF,
-        0x16, 0x30, 0x20, 0xE9,
-        0x4F, 0x3F, 0x4F, 0xDF,
-        0x47, 0x37, 0x47, 0xDF,
-        0x57, 0x3D, 0x57, 0xDF,
-        0x32, 0x32, 0x2D, 0xDF,
-        0x22, 0x22, 0x2D, 0xDF,
-        0x12, 0x12, 0x2D, 0xDF,
-        0x3A, 0x3A, 0x2D, 0xDF,
-        0x27, 0xCF, 0x74, 0xC2,
-        0x37, 0xCF, 0x74, 0xC4,
-        0x0A, 0x44, 0x4C, 0xB0,
-        0x02, 0x44, 0x54, 0xB0,
-        0x3D, 0xCF, 0x74, 0xC0,
-        0x34, 0x37, 0x20, 0xE9,
-        0x31, 0x53, 0x2F, 0x9F,
-        0x38, 0x27, 0x20, 0xE9,
-        0x39, 0xE5, 0x2C, 0x9F,
-        0x3C, 0x3D, 0x20, 0xE9,
-        0x2A, 0x44, 0x4C, 0xB2,
-        0x1A, 0x44, 0x54, 0xB2,
-        0x29, 0x80, 0x3A, 0xEA,
-        0x0A, 0x20,
-        0x02, 0x20,
-        0x27, 0xCF, 0x75, 0xC0,
-        0x2A, 0x20,
-        0x1A, 0x20,
-        0x30, 0x50, 0x2E, 0x9F,
-        0x32, 0x31, 0x5F, 0xE9,
-        0x38, 0x21, 0x2C, 0x9F,
-        0x33, 0x39, 0x5F, 0xE9,
-        0x3D, 0xCF, 0x75, 0xC2,
-        0x37, 0xCF, 0x75, 0xC4,
-        0x31, 0x53, 0x2F, 0x9F,
-        0xA6, 0x27, 0x20, 0xE9,
-        0x39, 0xE5, 0x2C, 0x9F,
-        0xA3, 0x3D, 0x20, 0xE9,
-        0x2A, 0x44, 0x4C, 0xB4,
-        0x1A, 0x44, 0x54, 0xB4,
-        0x0A, 0x45, 0x4D, 0xB0,
-        0x02, 0x45, 0x55, 0xB0,
-        0x88, 0x73, 0x5E, 0xE9,
-        0x2A, 0x20,
-        0x1A, 0x20,
-        0xA0, 0x37, 0x20, 0xE9,
-        0x0A, 0x20,
-        0x02, 0x20,
-        0x31, 0x53, 0x2F, 0x9F,
-        0x3E, 0x30, 0x4F, 0xE9,
-        0x39, 0xE5, 0x2C, 0x9F,
-        0x3F, 0x38, 0x4F, 0xE9,
-        0x30, 0x50, 0x2E, 0x9F,
-        0x3A, 0x31, 0x4F, 0xE9,
-        0x2A, 0x45, 0x4D, 0xB2,
-        0x1A, 0x45, 0x55, 0xB2,
-        0x0A, 0x45, 0x4D, 0xB4,
-        0x02, 0x45, 0x55, 0xB4,
-        0x38, 0x21, 0x2C, 0x9F,
-        0x3B, 0x39, 0x4F, 0xE9,
-        0x0A, 0x20,
-        0x02, 0x20,
-        0x2A, 0x20,
-        0x1A, 0x20,
-        0x2A, 0x46, 0x4E, 0xBF,
-        0x1A, 0x46, 0x56, 0xBF,
-        0x31, 0x53, 0x2F, 0x9F,
-        0x36, 0x31, 0x4F, 0xE9,
-        0x39, 0xE5, 0x2C, 0x9F,
-        0x37, 0x39, 0x4F, 0xE9,
-        0x30, 0x50, 0x2E, 0x9F,
-        0xA7, 0x30, 0x4F, 0xE9,
-        0x38, 0x21, 0x2C, 0x9F,
-        0xA8, 0x38, 0x4F, 0xE9,
-        0x0A, 0x47, 0x4F, 0xBF,
-        0x02, 0x47, 0x57, 0xBF,
-        0x31, 0x53, 0x2F, 0x9F,
-        0xA4, 0x31, 0x4F, 0xE9,
-        0x39, 0xE5, 0x2C, 0x9F,
-        0xA5, 0x39, 0x4F, 0xE9,
-        0x2A, 0x43, 0x4B, 0xBF,
-        0x1A, 0x43, 0x53, 0xBF,
-        0x30, 0x50, 0x2E, 0x9F,
-        0xA1, 0x30, 0x4F, 0xE9,
-        0x38, 0x21, 0x2C, 0x9F,
-        0xA2, 0x38, 0x4F, 0xE9,
-        0x31, 0x53, 0x2F, 0x9F,
-        0x80, 0x31, 0x57, 0xE9,
-        0x39, 0xE5, 0x2C, 0x9F,
-        0x81, 0x39, 0x57, 0xE9,
-        0x37, 0x48, 0x50, 0xBD,
-        0x8A, 0x36, 0x20, 0xE9,
-        0x86, 0x76, 0x57, 0xE9,
-        0x8B, 0x3E, 0x20, 0xE9,
-        0x82, 0x30, 0x57, 0xE9,
-        0x87, 0x77, 0x57, 0xE9,
-        0x83, 0x38, 0x57, 0xE9,
-        0x35, 0x49, 0x51, 0xBD,
-        0x84, 0x31, 0x5E, 0xE9,
-        0x30, 0x1F, 0x5F, 0xE9,
-        0x85, 0x39, 0x5E, 0xE9,
-        0x57, 0x25, 0x20, 0xE9,
-        0x2B, 0x48, 0x20, 0xE9,
-        0x1D, 0x37, 0xE1, 0xEA,
-        0x1E, 0x35, 0xE1, 0xEA,
-        0x00, 0xE0,
-        0x26, 0x77,
-        0x24, 0x49, 0x20, 0xE9,
-        0xA2, 0xFF, 0x20, 0xEA,
-        0x16, 0x26, 0x20, 0xE9,
-        0x57, 0x2E, 0xBF, 0xEA,
-        0x1C, 0x46, 0xA0, 0xE8,
-        0x23, 0x4E, 0xA0, 0xE8,
-        0x2B, 0x56, 0xA0, 0xE8,
-        0x1D, 0x47, 0xA0, 0xE8,
-        0x24, 0x4F, 0xA0, 0xE8,
-        0x2C, 0x57, 0xA0, 0xE8,
-        0x1C, 0x00,
-        0x23, 0x00,
-        0x2B, 0x00,
-        0x00, 0xE0,
-        0x1D, 0x00,
-        0x24, 0x00,
-        0x2C, 0x00,
-        0x00, 0xE0,
-        0x1C, 0x65,
-        0x23, 0x65,
-        0x2B, 0x65,
-        0x00, 0xE0,
-        0x1D, 0x65,
-        0x24, 0x65,
-        0x2C, 0x65,
-        0x00, 0xE0,
-        0x1C, 0x23, 0x60, 0xEC,
-        0x36, 0xD7, 0x36, 0xAD,
-        0x2B, 0x80, 0x60, 0xEC,
-        0x1D, 0x24, 0x60, 0xEC,
-        0x3E, 0xD7, 0x3E, 0xAD,
-        0x2C, 0x80, 0x60, 0xEC,
-        0x1C, 0x2B, 0xDE, 0xE8,
-        0x23, 0x80, 0xDE, 0xE8,
-        0x36, 0x80, 0x36, 0xBD,
-        0x3E, 0x80, 0x3E, 0xBD,
-        0x33, 0xD7, 0x1C, 0xBD,
-        0x3B, 0xD7, 0x23, 0xBD,
-        0x46, 0x80, 0x46, 0xCF,
-        0x4F, 0x80, 0x4F, 0xCF,
-        0x56, 0x33, 0x56, 0xCF,
-        0x47, 0x3B, 0x47, 0xCF,
-        0xCA, 0xFF, 0x20, 0xEA,
-        0x00, 0x80, 0x00, 0xE8,
-        0x4E, 0x33, 0x4E, 0xCF,
-        0x57, 0x3B, 0x57, 0xCF,
-        0x90, 0xFF, 0x20, 0xEA,
-        0x57, 0xC0, 0xBF, 0xEA,
-        0x00, 0x80, 0xA0, 0xE9,
-        0x00, 0x00, 0xD8, 0xEC,
-};
-static unsigned char warp_g400_tgzsa[] = {
-        0x00, 0x88, 0x98, 0xE9,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0xA0, 0xE9,
-        0x00, 0x00, 0xD8, 0xEC,
-        0xFF, 0x80, 0xC0, 0xE9,
-        0x00, 0x80, 0x00, 0xE8,
-        0x22, 0x40, 0x48, 0xBF,
-        0x2A, 0x40, 0x50, 0xBF,
-        0x32, 0x41, 0x49, 0xBF,
-        0x3A, 0x41, 0x51, 0xBF,
-        0xC3, 0x6B,
-        0xCB, 0x6B,
-        0x00, 0x88, 0x98, 0xE9,
-        0x73, 0x7B, 0xC8, 0xEC,
-        0x96, 0xE2,
-        0x41, 0x04,
-        0x7B, 0x43, 0xA0, 0xE8,
-        0x73, 0x4B, 0xA0, 0xE8,
-        0xAD, 0xEE, 0x29, 0x9F,
-        0x00, 0xE0,
-        0x49, 0x04,
-        0x90, 0xE2,
-        0x51, 0x04,
-        0x31, 0x46, 0xB1, 0xE8,
-        0x49, 0x41, 0xC0, 0xEC,
-        0x39, 0x57, 0xB1, 0xE8,
-        0x00, 0x04,
-        0x46, 0xE2,
-        0x73, 0x53, 0xA0, 0xE8,
-        0x51, 0x41, 0xC0, 0xEC,
-        0x31, 0x00,
-        0x39, 0x00,
-        0x6A, 0x80, 0x15, 0xEA,
-        0x08, 0x04,
-        0x10, 0x04,
-        0x51, 0x49, 0xC0, 0xEC,
-        0x2F, 0x41, 0x60, 0xEA,
-        0x31, 0x20,
-        0x39, 0x20,
-        0x1F, 0x42, 0xA0, 0xE8,
-        0x2A, 0x42, 0x4A, 0xBF,
-        0x27, 0x4A, 0xA0, 0xE8,
-        0x1A, 0x42, 0x52, 0xBF,
-        0x1E, 0x49, 0x60, 0xEA,
-        0x73, 0x7B, 0xC8, 0xEC,
-        0x26, 0x51, 0x60, 0xEA,
-        0x32, 0x40, 0x48, 0xBD,
-        0x22, 0x40, 0x50, 0xBD,
-        0x12, 0x41, 0x49, 0xBD,
-        0x3A, 0x41, 0x51, 0xBD,
-        0xBF, 0x2F, 0x26, 0xBD,
-        0x00, 0xE0,
-        0x7B, 0x72,
-        0x32, 0x20,
-        0x22, 0x20,
-        0x12, 0x20,
-        0x3A, 0x20,
-        0x46, 0x31, 0x46, 0xBF,
-        0x4E, 0x31, 0x4E, 0xBF,
-        0xB3, 0xE2, 0x2D, 0x9F,
-        0x00, 0x80, 0x00, 0xE8,
-        0x56, 0x31, 0x56, 0xBF,
-        0x47, 0x39, 0x47, 0xBF,
-        0x4F, 0x39, 0x4F, 0xBF,
-        0x57, 0x39, 0x57, 0xBF,
-        0x5C, 0x80, 0x07, 0xEA,
-        0x24, 0x41, 0x20, 0xE9,
-        0x42, 0x73, 0xF8, 0xEC,
-        0x00, 0xE0,
-        0x2D, 0x73,
-        0x33, 0x72,
-        0x0C, 0xE3,
-        0xA5, 0x2F, 0x1E, 0xBD,
-        0x43, 0x43, 0x2D, 0xDF,
-        0x4B, 0x4B, 0x2D, 0xDF,
-        0xAE, 0x1E, 0x26, 0xBD,
-        0x58, 0xE3,
-        0x33, 0x66,
-        0x53, 0x53, 0x2D, 0xDF,
-        0x00, 0x80, 0x00, 0xE8,
-        0xB8, 0x38, 0x33, 0xBF,
-        0x00, 0xE0,
-        0x59, 0xE3,
-        0x1E, 0x12, 0x41, 0xE9,
-        0x1A, 0x22, 0x41, 0xE9,
-        0x2B, 0x40, 0x3D, 0xE9,
-        0x3F, 0x4B, 0xA0, 0xE8,
-        0x2D, 0x73,
-        0x30, 0x76,
-        0x05, 0x80, 0x3D, 0xEA,
-        0x37, 0x43, 0xA0, 0xE8,
-        0x3D, 0x53, 0xA0, 0xE8,
-        0x48, 0x70, 0xF8, 0xEC,
-        0x2B, 0x48, 0x3C, 0xE9,
-        0x1F, 0x27, 0xBC, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x15, 0xC0, 0x20, 0xE9,
-        0x15, 0xC0, 0x20, 0xE9,
-        0x15, 0xC0, 0x20, 0xE9,
-        0x15, 0xC0, 0x20, 0xE9,
-        0x18, 0x3A, 0x41, 0xE9,
-        0x1D, 0x32, 0x41, 0xE9,
-        0x2A, 0x40, 0x20, 0xE9,
-        0x56, 0x3D, 0x56, 0xDF,
-        0x46, 0x37, 0x46, 0xDF,
-        0x4E, 0x3F, 0x4E, 0xDF,
-        0x16, 0x30, 0x20, 0xE9,
-        0x4F, 0x3F, 0x4F, 0xDF,
-        0x47, 0x37, 0x47, 0xDF,
-        0x57, 0x3D, 0x57, 0xDF,
-        0x32, 0x32, 0x2D, 0xDF,
-        0x22, 0x22, 0x2D, 0xDF,
-        0x12, 0x12, 0x2D, 0xDF,
-        0x3A, 0x3A, 0x2D, 0xDF,
-        0x27, 0xCF, 0x74, 0xC2,
-        0x37, 0xCF, 0x74, 0xC4,
-        0x0A, 0x44, 0x4C, 0xB0,
-        0x02, 0x44, 0x54, 0xB0,
-        0x3D, 0xCF, 0x74, 0xC0,
-        0x34, 0x37, 0x20, 0xE9,
-        0x31, 0x53, 0x2F, 0x9F,
-        0x38, 0x27, 0x20, 0xE9,
-        0x39, 0xE5, 0x2C, 0x9F,
-        0x3C, 0x3D, 0x20, 0xE9,
-        0x2A, 0x44, 0x4C, 0xB2,
-        0x1A, 0x44, 0x54, 0xB2,
-        0x2E, 0x80, 0x3A, 0xEA,
-        0x0A, 0x20,
-        0x02, 0x20,
-        0x27, 0xCF, 0x75, 0xC0,
-        0x2A, 0x20,
-        0x1A, 0x20,
-        0x30, 0x50, 0x2E, 0x9F,
-        0x32, 0x31, 0x5F, 0xE9,
-        0x38, 0x21, 0x2C, 0x9F,
-        0x33, 0x39, 0x5F, 0xE9,
-        0x3D, 0xCF, 0x75, 0xC2,
-        0x37, 0xCF, 0x75, 0xC4,
-        0x31, 0x53, 0x2F, 0x9F,
-        0xA6, 0x27, 0x20, 0xE9,
-        0x39, 0xE5, 0x2C, 0x9F,
-        0xA3, 0x3D, 0x20, 0xE9,
-        0x2A, 0x44, 0x4C, 0xB4,
-        0x1A, 0x44, 0x54, 0xB4,
-        0x0A, 0x45, 0x4D, 0xB0,
-        0x02, 0x45, 0x55, 0xB0,
-        0x88, 0x73, 0x5E, 0xE9,
-        0x2A, 0x20,
-        0x1A, 0x20,
-        0xA0, 0x37, 0x20, 0xE9,
-        0x0A, 0x20,
-        0x02, 0x20,
-        0x31, 0x53, 0x2F, 0x9F,
-        0x3E, 0x30, 0x4F, 0xE9,
-        0x39, 0xE5, 0x2C, 0x9F,
-        0x3F, 0x38, 0x4F, 0xE9,
-        0x30, 0x50, 0x2E, 0x9F,
-        0x3A, 0x31, 0x4F, 0xE9,
-        0x38, 0x21, 0x2C, 0x9F,
-        0x3B, 0x39, 0x4F, 0xE9,
-        0x2A, 0x45, 0x4D, 0xB2,
-        0x1A, 0x45, 0x55, 0xB2,
-        0x0A, 0x45, 0x4D, 0xB4,
-        0x02, 0x45, 0x55, 0xB4,
-        0x27, 0xCF, 0x74, 0xC6,
-        0x2A, 0x20,
-        0x1A, 0x20,
-        0xA7, 0x30, 0x4F, 0xE9,
-        0x0A, 0x20,
-        0x02, 0x20,
-        0x31, 0x53, 0x2F, 0x9F,
-        0x9C, 0x27, 0x20, 0xE9,
-        0x39, 0xE5, 0x2C, 0x9F,
-        0xA8, 0x38, 0x4F, 0xE9,
-        0x2A, 0x44, 0x4C, 0xB6,
-        0x1A, 0x44, 0x54, 0xB6,
-        0x30, 0x50, 0x2E, 0x9F,
-        0x36, 0x31, 0x4F, 0xE9,
-        0x38, 0x21, 0x2C, 0x9F,
-        0x37, 0x39, 0x4F, 0xE9,
-        0x00, 0x80, 0x00, 0xE8,
-        0x2A, 0x20,
-        0x1A, 0x20,
-        0x2A, 0x46, 0x4E, 0xBF,
-        0x1A, 0x46, 0x56, 0xBF,
-        0x31, 0x53, 0x2F, 0x9F,
-        0xA4, 0x31, 0x4F, 0xE9,
-        0x39, 0xE5, 0x2C, 0x9F,
-        0xA5, 0x39, 0x4F, 0xE9,
-        0x0A, 0x47, 0x4F, 0xBF,
-        0x02, 0x47, 0x57, 0xBF,
-        0x31, 0x53, 0x2F, 0x9F,
-        0xA1, 0x30, 0x4F, 0xE9,
-        0x39, 0xE5, 0x2C, 0x9F,
-        0xA2, 0x38, 0x4F, 0xE9,
-        0x2A, 0x43, 0x4B, 0xBF,
-        0x1A, 0x43, 0x53, 0xBF,
-        0x30, 0x50, 0x2E, 0x9F,
-        0x9D, 0x31, 0x4F, 0xE9,
-        0x38, 0x21, 0x2C, 0x9F,
-        0x9E, 0x39, 0x4F, 0xE9,
-        0x31, 0x53, 0x2F, 0x9F,
-        0x80, 0x31, 0x57, 0xE9,
-        0x39, 0xE5, 0x2C, 0x9F,
-        0x81, 0x39, 0x57, 0xE9,
-        0x37, 0x48, 0x50, 0xBD,
-        0x8A, 0x36, 0x20, 0xE9,
-        0x86, 0x76, 0x57, 0xE9,
-        0x8B, 0x3E, 0x20, 0xE9,
-        0x82, 0x30, 0x57, 0xE9,
-        0x87, 0x77, 0x57, 0xE9,
-        0x83, 0x38, 0x57, 0xE9,
-        0x35, 0x49, 0x51, 0xBD,
-        0x84, 0x31, 0x5E, 0xE9,
-        0x30, 0x1F, 0x5F, 0xE9,
-        0x85, 0x39, 0x5E, 0xE9,
-        0x57, 0x25, 0x20, 0xE9,
-        0x2B, 0x48, 0x20, 0xE9,
-        0x1D, 0x37, 0xE1, 0xEA,
-        0x1E, 0x35, 0xE1, 0xEA,
-        0x00, 0xE0,
-        0x26, 0x77,
-        0x24, 0x49, 0x20, 0xE9,
-        0x9D, 0xFF, 0x20, 0xEA,
-        0x16, 0x26, 0x20, 0xE9,
-        0x57, 0x2E, 0xBF, 0xEA,
-        0x1C, 0x46, 0xA0, 0xE8,
-        0x23, 0x4E, 0xA0, 0xE8,
-        0x2B, 0x56, 0xA0, 0xE8,
-        0x1D, 0x47, 0xA0, 0xE8,
-        0x24, 0x4F, 0xA0, 0xE8,
-        0x2C, 0x57, 0xA0, 0xE8,
-        0x1C, 0x00,
-        0x23, 0x00,
-        0x2B, 0x00,
-        0x00, 0xE0,
-        0x1D, 0x00,
-        0x24, 0x00,
-        0x2C, 0x00,
-        0x00, 0xE0,
-        0x1C, 0x65,
-        0x23, 0x65,
-        0x2B, 0x65,
-        0x00, 0xE0,
-        0x1D, 0x65,
-        0x24, 0x65,
-        0x2C, 0x65,
-        0x00, 0xE0,
-        0x1C, 0x23, 0x60, 0xEC,
-        0x36, 0xD7, 0x36, 0xAD,
-        0x2B, 0x80, 0x60, 0xEC,
-        0x1D, 0x24, 0x60, 0xEC,
-        0x3E, 0xD7, 0x3E, 0xAD,
-        0x2C, 0x80, 0x60, 0xEC,
-        0x1C, 0x2B, 0xDE, 0xE8,
-        0x23, 0x80, 0xDE, 0xE8,
-        0x36, 0x80, 0x36, 0xBD,
-        0x3E, 0x80, 0x3E, 0xBD,
-        0x33, 0xD7, 0x1C, 0xBD,
-        0x3B, 0xD7, 0x23, 0xBD,
-        0x46, 0x80, 0x46, 0xCF,
-        0x4F, 0x80, 0x4F, 0xCF,
-        0x56, 0x33, 0x56, 0xCF,
-        0x47, 0x3B, 0x47, 0xCF,
-        0xC5, 0xFF, 0x20, 0xEA,
-        0x00, 0x80, 0x00, 0xE8,
-        0x4E, 0x33, 0x4E, 0xCF,
-        0x57, 0x3B, 0x57, 0xCF,
-        0x8B, 0xFF, 0x20, 0xEA,
-        0x57, 0xC0, 0xBF, 0xEA,
-        0x00, 0x80, 0xA0, 0xE9,
-        0x00, 0x00, 0xD8, 0xEC,
-};
-static unsigned char warp_g400_tgzsaf[] = {
-        0x00, 0x88, 0x98, 0xE9,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0xA0, 0xE9,
-        0x00, 0x00, 0xD8, 0xEC,
-        0xFF, 0x80, 0xC0, 0xE9,
-        0x00, 0x80, 0x00, 0xE8,
-        0x22, 0x40, 0x48, 0xBF,
-        0x2A, 0x40, 0x50, 0xBF,
-        0x32, 0x41, 0x49, 0xBF,
-        0x3A, 0x41, 0x51, 0xBF,
-        0xC3, 0x6B,
-        0xCB, 0x6B,
-        0x00, 0x88, 0x98, 0xE9,
-        0x73, 0x7B, 0xC8, 0xEC,
-        0x96, 0xE2,
-        0x41, 0x04,
-        0x7B, 0x43, 0xA0, 0xE8,
-        0x73, 0x4B, 0xA0, 0xE8,
-        0xAD, 0xEE, 0x29, 0x9F,
-        0x00, 0xE0,
-        0x49, 0x04,
-        0x90, 0xE2,
-        0x51, 0x04,
-        0x31, 0x46, 0xB1, 0xE8,
-        0x49, 0x41, 0xC0, 0xEC,
-        0x39, 0x57, 0xB1, 0xE8,
-        0x00, 0x04,
-        0x46, 0xE2,
-        0x73, 0x53, 0xA0, 0xE8,
-        0x51, 0x41, 0xC0, 0xEC,
-        0x31, 0x00,
-        0x39, 0x00,
-        0x6E, 0x80, 0x15, 0xEA,
-        0x08, 0x04,
-        0x10, 0x04,
-        0x51, 0x49, 0xC0, 0xEC,
-        0x2F, 0x41, 0x60, 0xEA,
-        0x31, 0x20,
-        0x39, 0x20,
-        0x1F, 0x42, 0xA0, 0xE8,
-        0x2A, 0x42, 0x4A, 0xBF,
-        0x27, 0x4A, 0xA0, 0xE8,
-        0x1A, 0x42, 0x52, 0xBF,
-        0x1E, 0x49, 0x60, 0xEA,
-        0x73, 0x7B, 0xC8, 0xEC,
-        0x26, 0x51, 0x60, 0xEA,
-        0x32, 0x40, 0x48, 0xBD,
-        0x22, 0x40, 0x50, 0xBD,
-        0x12, 0x41, 0x49, 0xBD,
-        0x3A, 0x41, 0x51, 0xBD,
-        0xBF, 0x2F, 0x26, 0xBD,
-        0x00, 0xE0,
-        0x7B, 0x72,
-        0x32, 0x20,
-        0x22, 0x20,
-        0x12, 0x20,
-        0x3A, 0x20,
-        0x46, 0x31, 0x46, 0xBF,
-        0x4E, 0x31, 0x4E, 0xBF,
-        0xB3, 0xE2, 0x2D, 0x9F,
-        0x00, 0x80, 0x00, 0xE8,
-        0x56, 0x31, 0x56, 0xBF,
-        0x47, 0x39, 0x47, 0xBF,
-        0x4F, 0x39, 0x4F, 0xBF,
-        0x57, 0x39, 0x57, 0xBF,
-        0x60, 0x80, 0x07, 0xEA,
-        0x24, 0x41, 0x20, 0xE9,
-        0x42, 0x73, 0xF8, 0xEC,
-        0x00, 0xE0,
-        0x2D, 0x73,
-        0x33, 0x72,
-        0x0C, 0xE3,
-        0xA5, 0x2F, 0x1E, 0xBD,
-        0x43, 0x43, 0x2D, 0xDF,
-        0x4B, 0x4B, 0x2D, 0xDF,
-        0xAE, 0x1E, 0x26, 0xBD,
-        0x58, 0xE3,
-        0x33, 0x66,
-        0x53, 0x53, 0x2D, 0xDF,
-        0x00, 0x80, 0x00, 0xE8,
-        0xB8, 0x38, 0x33, 0xBF,
-        0x00, 0xE0,
-        0x59, 0xE3,
-        0x1E, 0x12, 0x41, 0xE9,
-        0x1A, 0x22, 0x41, 0xE9,
-        0x2B, 0x40, 0x3D, 0xE9,
-        0x3F, 0x4B, 0xA0, 0xE8,
-        0x2D, 0x73,
-        0x30, 0x76,
-        0x05, 0x80, 0x3D, 0xEA,
-        0x37, 0x43, 0xA0, 0xE8,
-        0x3D, 0x53, 0xA0, 0xE8,
-        0x48, 0x70, 0xF8, 0xEC,
-        0x2B, 0x48, 0x3C, 0xE9,
-        0x1F, 0x27, 0xBC, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x15, 0xC0, 0x20, 0xE9,
-        0x15, 0xC0, 0x20, 0xE9,
-        0x15, 0xC0, 0x20, 0xE9,
-        0x15, 0xC0, 0x20, 0xE9,
-        0x18, 0x3A, 0x41, 0xE9,
-        0x1D, 0x32, 0x41, 0xE9,
-        0x2A, 0x40, 0x20, 0xE9,
-        0x56, 0x3D, 0x56, 0xDF,
-        0x46, 0x37, 0x46, 0xDF,
-        0x4E, 0x3F, 0x4E, 0xDF,
-        0x16, 0x30, 0x20, 0xE9,
-        0x4F, 0x3F, 0x4F, 0xDF,
-        0x47, 0x37, 0x47, 0xDF,
-        0x57, 0x3D, 0x57, 0xDF,
-        0x32, 0x32, 0x2D, 0xDF,
-        0x22, 0x22, 0x2D, 0xDF,
-        0x12, 0x12, 0x2D, 0xDF,
-        0x3A, 0x3A, 0x2D, 0xDF,
-        0x27, 0xCF, 0x74, 0xC2,
-        0x37, 0xCF, 0x74, 0xC4,
-        0x0A, 0x44, 0x4C, 0xB0,
-        0x02, 0x44, 0x54, 0xB0,
-        0x3D, 0xCF, 0x74, 0xC0,
-        0x34, 0x37, 0x20, 0xE9,
-        0x31, 0x53, 0x2F, 0x9F,
-        0x38, 0x27, 0x20, 0xE9,
-        0x39, 0xE5, 0x2C, 0x9F,
-        0x3C, 0x3D, 0x20, 0xE9,
-        0x2A, 0x44, 0x4C, 0xB2,
-        0x1A, 0x44, 0x54, 0xB2,
-        0x32, 0x80, 0x3A, 0xEA,
-        0x0A, 0x20,
-        0x02, 0x20,
-        0x27, 0xCF, 0x75, 0xC0,
-        0x2A, 0x20,
-        0x1A, 0x20,
-        0x30, 0x50, 0x2E, 0x9F,
-        0x32, 0x31, 0x5F, 0xE9,
-        0x38, 0x21, 0x2C, 0x9F,
-        0x33, 0x39, 0x5F, 0xE9,
-        0x3D, 0xCF, 0x75, 0xC2,
-        0x37, 0xCF, 0x75, 0xC4,
-        0x31, 0x53, 0x2F, 0x9F,
-        0xA6, 0x27, 0x20, 0xE9,
-        0x39, 0xE5, 0x2C, 0x9F,
-        0xA3, 0x3D, 0x20, 0xE9,
-        0x2A, 0x44, 0x4C, 0xB4,
-        0x1A, 0x44, 0x54, 0xB4,
-        0x0A, 0x45, 0x4D, 0xB0,
-        0x02, 0x45, 0x55, 0xB0,
-        0x88, 0x73, 0x5E, 0xE9,
-        0x2A, 0x20,
-        0x1A, 0x20,
-        0xA0, 0x37, 0x20, 0xE9,
-        0x0A, 0x20,
-        0x02, 0x20,
-        0x31, 0x53, 0x2F, 0x9F,
-        0x3E, 0x30, 0x4F, 0xE9,
-        0x39, 0xE5, 0x2C, 0x9F,
-        0x3F, 0x38, 0x4F, 0xE9,
-        0x30, 0x50, 0x2E, 0x9F,
-        0x3A, 0x31, 0x4F, 0xE9,
-        0x38, 0x21, 0x2C, 0x9F,
-        0x3B, 0x39, 0x4F, 0xE9,
-        0x2A, 0x45, 0x4D, 0xB2,
-        0x1A, 0x45, 0x55, 0xB2,
-        0x0A, 0x45, 0x4D, 0xB4,
-        0x02, 0x45, 0x55, 0xB4,
-        0x27, 0xCF, 0x74, 0xC6,
-        0x2A, 0x20,
-        0x1A, 0x20,
-        0xA7, 0x30, 0x4F, 0xE9,
-        0x0A, 0x20,
-        0x02, 0x20,
-        0x31, 0x53, 0x2F, 0x9F,
-        0x9C, 0x27, 0x20, 0xE9,
-        0x39, 0xE5, 0x2C, 0x9F,
-        0xA8, 0x38, 0x4F, 0xE9,
-        0x2A, 0x44, 0x4C, 0xB6,
-        0x1A, 0x44, 0x54, 0xB6,
-        0x30, 0x50, 0x2E, 0x9F,
-        0x36, 0x31, 0x4F, 0xE9,
-        0x38, 0x21, 0x2C, 0x9F,
-        0x37, 0x39, 0x4F, 0xE9,
-        0x0A, 0x45, 0x4D, 0xB6,
-        0x02, 0x45, 0x55, 0xB6,
-        0x3D, 0xCF, 0x75, 0xC6,
-        0x2A, 0x20,
-        0x1A, 0x20,
-        0x2A, 0x46, 0x4E, 0xBF,
-        0x1A, 0x46, 0x56, 0xBF,
-        0x31, 0x53, 0x2F, 0x9F,
-        0xA4, 0x31, 0x4F, 0xE9,
-        0x39, 0xE5, 0x2C, 0x9F,
-        0xA5, 0x39, 0x4F, 0xE9,
-        0x31, 0x3D, 0x20, 0xE9,
-        0x0A, 0x20,
-        0x02, 0x20,
-        0x0A, 0x47, 0x4F, 0xBF,
-        0x02, 0x47, 0x57, 0xBF,
-        0x30, 0x50, 0x2E, 0x9F,
-        0xA1, 0x30, 0x4F, 0xE9,
-        0x38, 0x21, 0x2C, 0x9F,
-        0xA2, 0x38, 0x4F, 0xE9,
-        0x31, 0x53, 0x2F, 0x9F,
-        0x9D, 0x31, 0x4F, 0xE9,
-        0x39, 0xE5, 0x2C, 0x9F,
-        0x9E, 0x39, 0x4F, 0xE9,
-        0x2A, 0x43, 0x4B, 0xBF,
-        0x1A, 0x43, 0x53, 0xBF,
-        0x30, 0x50, 0x2E, 0x9F,
-        0x35, 0x30, 0x4F, 0xE9,
-        0x38, 0x21, 0x2C, 0x9F,
-        0x39, 0x38, 0x4F, 0xE9,
-        0x31, 0x53, 0x2F, 0x9F,
-        0x80, 0x31, 0x57, 0xE9,
-        0x39, 0xE5, 0x2C, 0x9F,
-        0x81, 0x39, 0x57, 0xE9,
-        0x37, 0x48, 0x50, 0xBD,
-        0x8A, 0x36, 0x20, 0xE9,
-        0x86, 0x76, 0x57, 0xE9,
-        0x8B, 0x3E, 0x20, 0xE9,
-        0x82, 0x30, 0x57, 0xE9,
-        0x87, 0x77, 0x57, 0xE9,
-        0x83, 0x38, 0x57, 0xE9,
-        0x35, 0x49, 0x51, 0xBD,
-        0x84, 0x31, 0x5E, 0xE9,
-        0x30, 0x1F, 0x5F, 0xE9,
-        0x85, 0x39, 0x5E, 0xE9,
-        0x57, 0x25, 0x20, 0xE9,
-        0x2B, 0x48, 0x20, 0xE9,
-        0x1D, 0x37, 0xE1, 0xEA,
-        0x1E, 0x35, 0xE1, 0xEA,
-        0x00, 0xE0,
-        0x26, 0x77,
-        0x24, 0x49, 0x20, 0xE9,
-        0x99, 0xFF, 0x20, 0xEA,
-        0x16, 0x26, 0x20, 0xE9,
-        0x57, 0x2E, 0xBF, 0xEA,
-        0x1C, 0x46, 0xA0, 0xE8,
-        0x23, 0x4E, 0xA0, 0xE8,
-        0x2B, 0x56, 0xA0, 0xE8,
-        0x1D, 0x47, 0xA0, 0xE8,
-        0x24, 0x4F, 0xA0, 0xE8,
-        0x2C, 0x57, 0xA0, 0xE8,
-        0x1C, 0x00,
-        0x23, 0x00,
-        0x2B, 0x00,
-        0x00, 0xE0,
-        0x1D, 0x00,
-        0x24, 0x00,
-        0x2C, 0x00,
-        0x00, 0xE0,
-        0x1C, 0x65,
-        0x23, 0x65,
-        0x2B, 0x65,
-        0x00, 0xE0,
-        0x1D, 0x65,
-        0x24, 0x65,
-        0x2C, 0x65,
-        0x00, 0xE0,
-        0x1C, 0x23, 0x60, 0xEC,
-        0x36, 0xD7, 0x36, 0xAD,
-        0x2B, 0x80, 0x60, 0xEC,
-        0x1D, 0x24, 0x60, 0xEC,
-        0x3E, 0xD7, 0x3E, 0xAD,
-        0x2C, 0x80, 0x60, 0xEC,
-        0x1C, 0x2B, 0xDE, 0xE8,
-        0x23, 0x80, 0xDE, 0xE8,
-        0x36, 0x80, 0x36, 0xBD,
-        0x3E, 0x80, 0x3E, 0xBD,
-        0x33, 0xD7, 0x1C, 0xBD,
-        0x3B, 0xD7, 0x23, 0xBD,
-        0x46, 0x80, 0x46, 0xCF,
-        0x4F, 0x80, 0x4F, 0xCF,
-        0x56, 0x33, 0x56, 0xCF,
-        0x47, 0x3B, 0x47, 0xCF,
-        0xC1, 0xFF, 0x20, 0xEA,
-        0x00, 0x80, 0x00, 0xE8,
-        0x4E, 0x33, 0x4E, 0xCF,
-        0x57, 0x3B, 0x57, 0xCF,
-        0x87, 0xFF, 0x20, 0xEA,
-        0x57, 0xC0, 0xBF, 0xEA,
-        0x00, 0x80, 0xA0, 0xE9,
-        0x00, 0x00, 0xD8, 0xEC,
-};
-static unsigned char warp_g400_tgzsf[] = {
-        0x00, 0x88, 0x98, 0xE9,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0xA0, 0xE9,
-        0x00, 0x00, 0xD8, 0xEC,
-        0xFF, 0x80, 0xC0, 0xE9,
-        0x00, 0x80, 0x00, 0xE8,
-        0x22, 0x40, 0x48, 0xBF,
-        0x2A, 0x40, 0x50, 0xBF,
-        0x32, 0x41, 0x49, 0xBF,
-        0x3A, 0x41, 0x51, 0xBF,
-        0xC3, 0x6B,
-        0xCB, 0x6B,
-        0x00, 0x88, 0x98, 0xE9,
-        0x73, 0x7B, 0xC8, 0xEC,
-        0x96, 0xE2,
-        0x41, 0x04,
-        0x7B, 0x43, 0xA0, 0xE8,
-        0x73, 0x4B, 0xA0, 0xE8,
-        0xAD, 0xEE, 0x29, 0x9F,
-        0x00, 0xE0,
-        0x49, 0x04,
-        0x90, 0xE2,
-        0x51, 0x04,
-        0x31, 0x46, 0xB1, 0xE8,
-        0x49, 0x41, 0xC0, 0xEC,
-        0x39, 0x57, 0xB1, 0xE8,
-        0x00, 0x04,
-        0x46, 0xE2,
-        0x73, 0x53, 0xA0, 0xE8,
-        0x51, 0x41, 0xC0, 0xEC,
-        0x31, 0x00,
-        0x39, 0x00,
-        0x6A, 0x80, 0x15, 0xEA,
-        0x08, 0x04,
-        0x10, 0x04,
-        0x51, 0x49, 0xC0, 0xEC,
-        0x2F, 0x41, 0x60, 0xEA,
-        0x31, 0x20,
-        0x39, 0x20,
-        0x1F, 0x42, 0xA0, 0xE8,
-        0x2A, 0x42, 0x4A, 0xBF,
-        0x27, 0x4A, 0xA0, 0xE8,
-        0x1A, 0x42, 0x52, 0xBF,
-        0x1E, 0x49, 0x60, 0xEA,
-        0x73, 0x7B, 0xC8, 0xEC,
-        0x26, 0x51, 0x60, 0xEA,
-        0x32, 0x40, 0x48, 0xBD,
-        0x22, 0x40, 0x50, 0xBD,
-        0x12, 0x41, 0x49, 0xBD,
-        0x3A, 0x41, 0x51, 0xBD,
-        0xBF, 0x2F, 0x26, 0xBD,
-        0x00, 0xE0,
-        0x7B, 0x72,
-        0x32, 0x20,
-        0x22, 0x20,
-        0x12, 0x20,
-        0x3A, 0x20,
-        0x46, 0x31, 0x46, 0xBF,
-        0x4E, 0x31, 0x4E, 0xBF,
-        0xB3, 0xE2, 0x2D, 0x9F,
-        0x00, 0x80, 0x00, 0xE8,
-        0x56, 0x31, 0x56, 0xBF,
-        0x47, 0x39, 0x47, 0xBF,
-        0x4F, 0x39, 0x4F, 0xBF,
-        0x57, 0x39, 0x57, 0xBF,
-        0x5C, 0x80, 0x07, 0xEA,
-        0x24, 0x41, 0x20, 0xE9,
-        0x42, 0x73, 0xF8, 0xEC,
-        0x00, 0xE0,
-        0x2D, 0x73,
-        0x33, 0x72,
-        0x0C, 0xE3,
-        0xA5, 0x2F, 0x1E, 0xBD,
-        0x43, 0x43, 0x2D, 0xDF,
-        0x4B, 0x4B, 0x2D, 0xDF,
-        0xAE, 0x1E, 0x26, 0xBD,
-        0x58, 0xE3,
-        0x33, 0x66,
-        0x53, 0x53, 0x2D, 0xDF,
-        0x00, 0x80, 0x00, 0xE8,
-        0xB8, 0x38, 0x33, 0xBF,
-        0x00, 0xE0,
-        0x59, 0xE3,
-        0x1E, 0x12, 0x41, 0xE9,
-        0x1A, 0x22, 0x41, 0xE9,
-        0x2B, 0x40, 0x3D, 0xE9,
-        0x3F, 0x4B, 0xA0, 0xE8,
-        0x2D, 0x73,
-        0x30, 0x76,
-        0x05, 0x80, 0x3D, 0xEA,
-        0x37, 0x43, 0xA0, 0xE8,
-        0x3D, 0x53, 0xA0, 0xE8,
-        0x48, 0x70, 0xF8, 0xEC,
-        0x2B, 0x48, 0x3C, 0xE9,
-        0x1F, 0x27, 0xBC, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x00, 0x80, 0x00, 0xE8,
-        0x15, 0xC0, 0x20, 0xE9,
-        0x15, 0xC0, 0x20, 0xE9,
-        0x15, 0xC0, 0x20, 0xE9,
-        0x15, 0xC0, 0x20, 0xE9,
-        0x18, 0x3A, 0x41, 0xE9,
-        0x1D, 0x32, 0x41, 0xE9,
-        0x2A, 0x40, 0x20, 0xE9,
-        0x56, 0x3D, 0x56, 0xDF,
-        0x46, 0x37, 0x46, 0xDF,
-        0x4E, 0x3F, 0x4E, 0xDF,
-        0x16, 0x30, 0x20, 0xE9,
-        0x4F, 0x3F, 0x4F, 0xDF,
-        0x47, 0x37, 0x47, 0xDF,
-        0x57, 0x3D, 0x57, 0xDF,
-        0x32, 0x32, 0x2D, 0xDF,
-        0x22, 0x22, 0x2D, 0xDF,
-        0x12, 0x12, 0x2D, 0xDF,
-        0x3A, 0x3A, 0x2D, 0xDF,
-        0x27, 0xCF, 0x74, 0xC2,
-        0x37, 0xCF, 0x74, 0xC4,
-        0x0A, 0x44, 0x4C, 0xB0,
-        0x02, 0x44, 0x54, 0xB0,
-        0x3D, 0xCF, 0x74, 0xC0,
-        0x34, 0x37, 0x20, 0xE9,
-        0x31, 0x53, 0x2F, 0x9F,
-        0x38, 0x27, 0x20, 0xE9,
-        0x39, 0xE5, 0x2C, 0x9F,
-        0x3C, 0x3D, 0x20, 0xE9,
-        0x2A, 0x44, 0x4C, 0xB2,
-        0x1A, 0x44, 0x54, 0xB2,
-        0x2E, 0x80, 0x3A, 0xEA,
-        0x0A, 0x20,
-        0x02, 0x20,
-        0x27, 0xCF, 0x75, 0xC0,
-        0x2A, 0x20,
-        0x1A, 0x20,
-        0x30, 0x50, 0x2E, 0x9F,
-        0x32, 0x31, 0x5F, 0xE9,
-        0x38, 0x21, 0x2C, 0x9F,
-        0x33, 0x39, 0x5F, 0xE9,
-        0x3D, 0xCF, 0x75, 0xC2,
-        0x37, 0xCF, 0x75, 0xC4,
-        0x31, 0x53, 0x2F, 0x9F,
-        0xA6, 0x27, 0x20, 0xE9,
-        0x39, 0xE5, 0x2C, 0x9F,
-        0xA3, 0x3D, 0x20, 0xE9,
-        0x2A, 0x44, 0x4C, 0xB4,
-        0x1A, 0x44, 0x54, 0xB4,
-        0x0A, 0x45, 0x4D, 0xB0,
-        0x02, 0x45, 0x55, 0xB0,
-        0x88, 0x73, 0x5E, 0xE9,
-        0x2A, 0x20,
-        0x1A, 0x20,
-        0xA0, 0x37, 0x20, 0xE9,
-        0x0A, 0x20,
-        0x02, 0x20,
-        0x31, 0x53, 0x2F, 0x9F,
-        0x3E, 0x30, 0x4F, 0xE9,
-        0x39, 0xE5, 0x2C, 0x9F,
-        0x3F, 0x38, 0x4F, 0xE9,
-        0x30, 0x50, 0x2E, 0x9F,
-        0x3A, 0x31, 0x4F, 0xE9,
-        0x38, 0x21, 0x2C, 0x9F,
-        0x3B, 0x39, 0x4F, 0xE9,
-        0x2A, 0x45, 0x4D, 0xB2,
-        0x1A, 0x45, 0x55, 0xB2,
-        0x0A, 0x45, 0x4D, 0xB4,
-        0x02, 0x45, 0x55, 0xB4,
-        0x27, 0xCF, 0x75, 0xC6,
-        0x2A, 0x20,
-        0x1A, 0x20,
-        0xA7, 0x30, 0x4F, 0xE9,
-        0x0A, 0x20,
-        0x02, 0x20,
-        0x31, 0x53, 0x2F, 0x9F,
-        0x31, 0x27, 0x20, 0xE9,
-        0x39, 0xE5, 0x2C, 0x9F,
-        0xA8, 0x38, 0x4F, 0xE9,
-        0x2A, 0x45, 0x4D, 0xB6,
-        0x1A, 0x45, 0x55, 0xB6,
-        0x30, 0x50, 0x2E, 0x9F,
-        0x36, 0x31, 0x4F, 0xE9,
-        0x38, 0x21, 0x2C, 0x9F,
-        0x37, 0x39, 0x4F, 0xE9,
-        0x00, 0x80, 0x00, 0xE8,
-        0x2A, 0x20,
-        0x1A, 0x20,
-        0x2A, 0x46, 0x4E, 0xBF,
-        0x1A, 0x46, 0x56, 0xBF,
-        0x31, 0x53, 0x2F, 0x9F,
-        0xA4, 0x31, 0x4F, 0xE9,
-        0x39, 0xE5, 0x2C, 0x9F,
-        0xA5, 0x39, 0x4F, 0xE9,
-        0x0A, 0x47, 0x4F, 0xBF,
-        0x02, 0x47, 0x57, 0xBF,
-        0x31, 0x53, 0x2F, 0x9F,
-        0xA1, 0x30, 0x4F, 0xE9,
-        0x39, 0xE5, 0x2C, 0x9F,
-        0xA2, 0x38, 0x4F, 0xE9,
-        0x2A, 0x43, 0x4B, 0xBF,
-        0x1A, 0x43, 0x53, 0xBF,
-        0x30, 0x50, 0x2E, 0x9F,
-        0x35, 0x31, 0x4F, 0xE9,
-        0x38, 0x21, 0x2C, 0x9F,
-        0x39, 0x39, 0x4F, 0xE9,
-        0x31, 0x53, 0x2F, 0x9F,
-        0x80, 0x31, 0x57, 0xE9,
-        0x39, 0xE5, 0x2C, 0x9F,
-        0x81, 0x39, 0x57, 0xE9,
-        0x37, 0x48, 0x50, 0xBD,
-        0x8A, 0x36, 0x20, 0xE9,
-        0x86, 0x76, 0x57, 0xE9,
-        0x8B, 0x3E, 0x20, 0xE9,
-        0x82, 0x30, 0x57, 0xE9,
-        0x87, 0x77, 0x57, 0xE9,
-        0x83, 0x38, 0x57, 0xE9,
-        0x35, 0x49, 0x51, 0xBD,
-        0x84, 0x31, 0x5E, 0xE9,
-        0x30, 0x1F, 0x5F, 0xE9,
-        0x85, 0x39, 0x5E, 0xE9,
-        0x57, 0x25, 0x20, 0xE9,
-        0x2B, 0x48, 0x20, 0xE9,
-        0x1D, 0x37, 0xE1, 0xEA,
-        0x1E, 0x35, 0xE1, 0xEA,
-        0x00, 0xE0,
-        0x26, 0x77,
-        0x24, 0x49, 0x20, 0xE9,
-        0x9D, 0xFF, 0x20, 0xEA,
-        0x16, 0x26, 0x20, 0xE9,
-        0x57, 0x2E, 0xBF, 0xEA,
-        0x1C, 0x46, 0xA0, 0xE8,
-        0x23, 0x4E, 0xA0, 0xE8,
-        0x2B, 0x56, 0xA0, 0xE8,
-        0x1D, 0x47, 0xA0, 0xE8,
-        0x24, 0x4F, 0xA0, 0xE8,
-        0x2C, 0x57, 0xA0, 0xE8,
-        0x1C, 0x00,
-        0x23, 0x00,
-        0x2B, 0x00,
-        0x00, 0xE0,
-        0x1D, 0x00,
-        0x24, 0x00,
-        0x2C, 0x00,
-        0x00, 0xE0,
-        0x1C, 0x65,
-        0x23, 0x65,
-        0x2B, 0x65,
-        0x00, 0xE0,
-        0x1D, 0x65,
-        0x24, 0x65,
-        0x2C, 0x65,
-        0x00, 0xE0,
-        0x1C, 0x23, 0x60, 0xEC,
-        0x36, 0xD7, 0x36, 0xAD,
-        0x2B, 0x80, 0x60, 0xEC,
-        0x1D, 0x24, 0x60, 0xEC,
-        0x3E, 0xD7, 0x3E, 0xAD,
-        0x2C, 0x80, 0x60, 0xEC,
-        0x1C, 0x2B, 0xDE, 0xE8,
-        0x23, 0x80, 0xDE, 0xE8,
-        0x36, 0x80, 0x36, 0xBD,
-        0x3E, 0x80, 0x3E, 0xBD,
-        0x33, 0xD7, 0x1C, 0xBD,
-        0x3B, 0xD7, 0x23, 0xBD,
-        0x46, 0x80, 0x46, 0xCF,
-        0x4F, 0x80, 0x4F, 0xCF,
-        0x56, 0x33, 0x56, 0xCF,
-        0x47, 0x3B, 0x47, 0xCF,
-        0xC5, 0xFF, 0x20, 0xEA,
-        0x00, 0x80, 0x00, 0xE8,
-        0x4E, 0x33, 0x4E, 0xCF,
-        0x57, 0x3B, 0x57, 0xCF,
-        0x8B, 0xFF, 0x20, 0xEA,
-        0x57, 0xC0, 0xBF, 0xEA,
-        0x00, 0x80, 0xA0, 0xE9,
-        0x00, 0x00, 0xD8, 0xEC,
-};
diff --git a/drivers/gpu/drm/mga/mga_warp.c b/drivers/gpu/drm/mga/mga_warp.c
index 651b93c8ab5d..9aad4847afdf 100644
--- a/drivers/gpu/drm/mga/mga_warp.c
+++ b/drivers/gpu/drm/mga/mga_warp.c
@@ -27,132 +27,108 @@
 *    Gareth Hughes <gareth@valinux.com>
 */
+#include <linux/firmware.h>
+#include <linux/ihex.h>
+#include <linux/platform_device.h>
 #include "drmP.h"
 #include "drm.h"
 #include "mga_drm.h"
 #include "mga_drv.h"
-#include "mga_ucode.h"
+#define FIRMWARE_G200 "matrox/g200_warp.fw"
+#define FIRMWARE_G400 "matrox/g400_warp.fw"
+MODULE_FIRMWARE(FIRMWARE_G200);
+MODULE_FIRMWARE(FIRMWARE_G400);
 #define MGA_WARP_CODE_ALIGN             256     /* in bytes */
-#define WARP_UCODE_SIZE( which )                                        \
+#define WARP_UCODE_SIZE(size)           ALIGN(size, MGA_WARP_CODE_ALIGN)
-        ((sizeof(which) / MGA_WARP_CODE_ALIGN + 1) * MGA_WARP_CODE_ALIGN)
+int mga_warp_install_microcode(drm_mga_private_t * dev_priv)
-#define WARP_UCODE_INSTALL( which, where )                              \
-do {                                                                    \
-        DRM_DEBUG( " pcbase = 0x%08lx  vcbase = %p\n", pcbase, vcbase );\
-        dev_priv->warp_pipe_phys[where] = pcbase;                       \
-        memcpy( vcbase, which, sizeof(which) );                         \
-        pcbase += WARP_UCODE_SIZE( which );                             \
-        vcbase += WARP_UCODE_SIZE( which );                             \
-} while (0)
-static const unsigned int mga_warp_g400_microcode_size =
-    (WARP_UCODE_SIZE(warp_g400_tgz) +
-     WARP_UCODE_SIZE(warp_g400_tgza) +
-     WARP_UCODE_SIZE(warp_g400_tgzaf) +
-     WARP_UCODE_SIZE(warp_g400_tgzf) +
-     WARP_UCODE_SIZE(warp_g400_tgzs) +
-     WARP_UCODE_SIZE(warp_g400_tgzsa) +
-     WARP_UCODE_SIZE(warp_g400_tgzsaf) +
-     WARP_UCODE_SIZE(warp_g400_tgzsf) +
-     WARP_UCODE_SIZE(warp_g400_t2gz) +
-     WARP_UCODE_SIZE(warp_g400_t2gza) +
-     WARP_UCODE_SIZE(warp_g400_t2gzaf) +
-     WARP_UCODE_SIZE(warp_g400_t2gzf) +
-     WARP_UCODE_SIZE(warp_g400_t2gzs) +
-     WARP_UCODE_SIZE(warp_g400_t2gzsa) +
-     WARP_UCODE_SIZE(warp_g400_t2gzsaf) + WARP_UCODE_SIZE(warp_g400_t2gzsf));
-static const unsigned int mga_warp_g200_microcode_size =
-    (WARP_UCODE_SIZE(warp_g200_tgz) +
-     WARP_UCODE_SIZE(warp_g200_tgza) +
-     WARP_UCODE_SIZE(warp_g200_tgzaf) +
-     WARP_UCODE_SIZE(warp_g200_tgzf) +
-     WARP_UCODE_SIZE(warp_g200_tgzs) +
-     WARP_UCODE_SIZE(warp_g200_tgzsa) +
-     WARP_UCODE_SIZE(warp_g200_tgzsaf) + WARP_UCODE_SIZE(warp_g200_tgzsf));
-unsigned int mga_warp_microcode_size(const drm_mga_private_t * dev_priv)
 {
+        unsigned char *vcbase = dev_priv->warp->handle;
+        unsigned long pcbase = dev_priv->warp->offset;
+        const char *firmware_name;
+        struct platform_device *pdev;
+        const struct firmware *fw = NULL;
+        const struct ihex_binrec *rec;
+        unsigned int size;
+        int n_pipes, where;
+        int rc = 0;
        switch (dev_priv->chipset) {
        case MGA_CARD_TYPE_G400:
        case MGA_CARD_TYPE_G550:
-                return PAGE_ALIGN(mga_warp_g400_microcode_size);
+                firmware_name = FIRMWARE_G400;
+                n_pipes = MGA_MAX_G400_PIPES;
+                break;
        case MGA_CARD_TYPE_G200:
-                return PAGE_ALIGN(mga_warp_g200_microcode_size);
+                firmware_name = FIRMWARE_G200;
+                n_pipes = MGA_MAX_G200_PIPES;
+                break;
        default:
-                return 0;
+                return -EINVAL;
        }
-}
-static int mga_warp_install_g400_microcode(drm_mga_private_t * dev_priv)
-{
-        unsigned char *vcbase = dev_priv->warp->handle;
-        unsigned long pcbase = dev_priv->warp->offset;
-        memset(dev_priv->warp_pipe_phys, 0, sizeof(dev_priv->warp_pipe_phys));
-        WARP_UCODE_INSTALL(warp_g400_tgz, MGA_WARP_TGZ);
-        WARP_UCODE_INSTALL(warp_g400_tgzf, MGA_WARP_TGZF);
-        WARP_UCODE_INSTALL(warp_g400_tgza, MGA_WARP_TGZA);
-        WARP_UCODE_INSTALL(warp_g400_tgzaf, MGA_WARP_TGZAF);
-        WARP_UCODE_INSTALL(warp_g400_tgzs, MGA_WARP_TGZS);
-        WARP_UCODE_INSTALL(warp_g400_tgzsf, MGA_WARP_TGZSF);
-        WARP_UCODE_INSTALL(warp_g400_tgzsa, MGA_WARP_TGZSA);
-        WARP_UCODE_INSTALL(warp_g400_tgzsaf, MGA_WARP_TGZSAF);
-        WARP_UCODE_INSTALL(warp_g400_t2gz, MGA_WARP_T2GZ);
-        WARP_UCODE_INSTALL(warp_g400_t2gzf, MGA_WARP_T2GZF);
-        WARP_UCODE_INSTALL(warp_g400_t2gza, MGA_WARP_T2GZA);
-        WARP_UCODE_INSTALL(warp_g400_t2gzaf, MGA_WARP_T2GZAF);
-        WARP_UCODE_INSTALL(warp_g400_t2gzs, MGA_WARP_T2GZS);
-        WARP_UCODE_INSTALL(warp_g400_t2gzsf, MGA_WARP_T2GZSF);
-        WARP_UCODE_INSTALL(warp_g400_t2gzsa, MGA_WARP_T2GZSA);
-        WARP_UCODE_INSTALL(warp_g400_t2gzsaf, MGA_WARP_T2GZSAF);
-        return 0;
-}
-static int mga_warp_install_g200_microcode(drm_mga_private_t * dev_priv)
-{
-        unsigned char *vcbase = dev_priv->warp->handle;
-        unsigned long pcbase = dev_priv->warp->offset;
-        memset(dev_priv->warp_pipe_phys, 0, sizeof(dev_priv->warp_pipe_phys));
-        WARP_UCODE_INSTALL(warp_g200_tgz, MGA_WARP_TGZ);
-        WARP_UCODE_INSTALL(warp_g200_tgzf, MGA_WARP_TGZF);
-        WARP_UCODE_INSTALL(warp_g200_tgza, MGA_WARP_TGZA);
-        WARP_UCODE_INSTALL(warp_g200_tgzaf, MGA_WARP_TGZAF);
-        WARP_UCODE_INSTALL(warp_g200_tgzs, MGA_WARP_TGZS);
-        WARP_UCODE_INSTALL(warp_g200_tgzsf, MGA_WARP_TGZSF);
-        WARP_UCODE_INSTALL(warp_g200_tgzsa, MGA_WARP_TGZSA);
-        WARP_UCODE_INSTALL(warp_g200_tgzsaf, MGA_WARP_TGZSAF);
-        return 0;
+        pdev = platform_device_register_simple("mga_warp", 0, NULL, 0);
-}
+        if (IS_ERR(pdev)) {
+                DRM_ERROR("mga: Failed to register microcode\n");
+                return PTR_ERR(pdev);
+        }
+        rc = request_ihex_firmware(&fw, firmware_name, &pdev->dev);
+        platform_device_unregister(pdev);
+        if (rc) {
+                DRM_ERROR("mga: Failed to load microcode \"%s\"\n",
+                          firmware_name);
+                return rc;
+        }
-int mga_warp_install_microcode(drm_mga_private_t * dev_priv)
+        size = 0;
-{
+        where = 0;
-        const unsigned int size = mga_warp_microcode_size(dev_priv);
+        for (rec = (const struct ihex_binrec *)fw->data;
+             rec;
+             rec = ihex_next_binrec(rec)) {
+                size += WARP_UCODE_SIZE(be16_to_cpu(rec->len));
+                where++;
+        }
+        if (where != n_pipes) {
+                DRM_ERROR("mga: Invalid microcode \"%s\"\n", firmware_name);
+                rc = -EINVAL;
+                goto out;
+        }
+        size = PAGE_ALIGN(size);
        DRM_DEBUG("MGA ucode size = %d bytes\n", size);
        if (size > dev_priv->warp->size) {
                DRM_ERROR("microcode too large! (%u > %lu)\n",
                          size, dev_priv->warp->size);
-                return -ENOMEM;
+                rc = -ENOMEM;
+                goto out;
        }
-        switch (dev_priv->chipset) {
+        memset(dev_priv->warp_pipe_phys, 0, sizeof(dev_priv->warp_pipe_phys));
-        case MGA_CARD_TYPE_G400:
-        case MGA_CARD_TYPE_G550:
+        where = 0;
-                return mga_warp_install_g400_microcode(dev_priv);
+        for (rec = (const struct ihex_binrec *)fw->data;
-        case MGA_CARD_TYPE_G200:
+             rec;
-                return mga_warp_install_g200_microcode(dev_priv);
+             rec = ihex_next_binrec(rec)) {
-        default:
+                unsigned int src_size, dst_size;
-                return -EINVAL;
+                DRM_DEBUG(" pcbase = 0x%08lx  vcbase = %p\n", pcbase, vcbase);
+                dev_priv->warp_pipe_phys[where] = pcbase;
+                src_size = be16_to_cpu(rec->len);
+                dst_size = WARP_UCODE_SIZE(src_size);
+                memcpy(vcbase, rec->data, src_size);
+                pcbase += dst_size;
+                vcbase += dst_size;
+                where++;
        }
+out:
+        release_firmware(fw);
+        return rc;
 }
 #define WMISC_EXPECTED          (MGA_WUCODECACHE_ENABLE | MGA_WMASTER_ENABLE)
diff --git a/drivers/gpu/drm/r128/r128_cce.c b/drivers/gpu/drm/r128/r128_cce.c
index c75fd3564040..4c39a407aa4a 100644
--- a/drivers/gpu/drm/r128/r128_cce.c
+++ b/drivers/gpu/drm/r128/r128_cce.c
@@ -29,6 +29,9 @@
 *    Gareth Hughes <gareth@valinux.com>
 */
+#include <linux/firmware.h>
+#include <linux/platform_device.h>
 #include "drmP.h"
 #include "drm.h"
 #include "r128_drm.h"
@@ -36,50 +39,9 @@
 #define R128_FIFO_DEBUG         0
-/* CCE microcode (from ATI) */
+#define FIRMWARE_NAME           "r128/r128_cce.bin"
-static u32 r128_cce_microcode[] = {
-        0, 276838400, 0, 268449792, 2, 142, 2, 145, 0, 1076765731, 0,
+MODULE_FIRMWARE(FIRMWARE_NAME);
-        1617039951, 0, 774592877, 0, 1987540286, 0, 2307490946U, 0,
-        599558925, 0, 589505315, 0, 596487092, 0, 589505315, 1,
-        11544576, 1, 206848, 1, 311296, 1, 198656, 2, 912273422, 11,
-        262144, 0, 0, 1, 33559837, 1, 7438, 1, 14809, 1, 6615, 12, 28,
-        1, 6614, 12, 28, 2, 23, 11, 18874368, 0, 16790922, 1, 409600, 9,
-        30, 1, 147854772, 16, 420483072, 3, 8192, 0, 10240, 1, 198656,
-        1, 15630, 1, 51200, 10, 34858, 9, 42, 1, 33559823, 2, 10276, 1,
-        15717, 1, 15718, 2, 43, 1, 15936948, 1, 570480831, 1, 14715071,
-        12, 322123831, 1, 33953125, 12, 55, 1, 33559908, 1, 15718, 2,
-        46, 4, 2099258, 1, 526336, 1, 442623, 4, 4194365, 1, 509952, 1,
-        459007, 3, 0, 12, 92, 2, 46, 12, 176, 1, 15734, 1, 206848, 1,
-        18432, 1, 133120, 1, 100670734, 1, 149504, 1, 165888, 1,
-        15975928, 1, 1048576, 6, 3145806, 1, 15715, 16, 2150645232U, 2,
-        268449859, 2, 10307, 12, 176, 1, 15734, 1, 15735, 1, 15630, 1,
-        15631, 1, 5253120, 6, 3145810, 16, 2150645232U, 1, 15864, 2, 82,
-        1, 343310, 1, 1064207, 2, 3145813, 1, 15728, 1, 7817, 1, 15729,
-        3, 15730, 12, 92, 2, 98, 1, 16168, 1, 16167, 1, 16002, 1, 16008,
-        1, 15974, 1, 15975, 1, 15990, 1, 15976, 1, 15977, 1, 15980, 0,
-        15981, 1, 10240, 1, 5253120, 1, 15720, 1, 198656, 6, 110, 1,
-        180224, 1, 103824738, 2, 112, 2, 3145839, 0, 536885440, 1,
-        114880, 14, 125, 12, 206975, 1, 33559995, 12, 198784, 0,
-        33570236, 1, 15803, 0, 15804, 3, 294912, 1, 294912, 3, 442370,
-        1, 11544576, 0, 811612160, 1, 12593152, 1, 11536384, 1,
-        14024704, 7, 310382726, 0, 10240, 1, 14796, 1, 14797, 1, 14793,
-        1, 14794, 0, 14795, 1, 268679168, 1, 9437184, 1, 268449792, 1,
-        198656, 1, 9452827, 1, 1075854602, 1, 1075854603, 1, 557056, 1,
-        114880, 14, 159, 12, 198784, 1, 1109409213, 12, 198783, 1,
-        1107312059, 12, 198784, 1, 1109409212, 2, 162, 1, 1075854781, 1,
-        1073757627, 1, 1075854780, 1, 540672, 1, 10485760, 6, 3145894,
-        16, 274741248, 9, 168, 3, 4194304, 3, 4209949, 0, 0, 0, 256, 14,
-        174, 1, 114857, 1, 33560007, 12, 176, 0, 10240, 1, 114858, 1,
-        33560018, 1, 114857, 3, 33560007, 1, 16008, 1, 114874, 1,
-        33560360, 1, 114875, 1, 33560154, 0, 15963, 0, 256, 0, 4096, 1,
-        409611, 9, 188, 0, 10240, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-        0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-        0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-        0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-        0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-        0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-        0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
-};
 static int R128_READ_PLL(struct drm_device * dev, int addr)
 {
@@ -176,20 +138,50 @@ static int r128_do_wait_for_idle(drm_r128_private_t * dev_priv)
 */
 /* Load the microcode for the CCE */
-static void r128_cce_load_microcode(drm_r128_private_t * dev_priv)
+static int r128_cce_load_microcode(drm_r128_private_t *dev_priv)
 {
-        int i;
+        struct platform_device *pdev;
+        const struct firmware *fw;
+        const __be32 *fw_data;
+        int rc, i;
        DRM_DEBUG("\n");
+        pdev = platform_device_register_simple("r128_cce", 0, NULL, 0);
+        if (IS_ERR(pdev)) {
+                printk(KERN_ERR "r128_cce: Failed to register firmware\n");
+                return PTR_ERR(pdev);
+        }
+        rc = request_firmware(&fw, FIRMWARE_NAME, &pdev->dev);
+        platform_device_unregister(pdev);
+        if (rc) {
+                printk(KERN_ERR "r128_cce: Failed to load firmware \"%s\"\n",
+                       FIRMWARE_NAME);
+                return rc;
+        }
+        if (fw->size != 256 * 8) {
+                printk(KERN_ERR
+                       "r128_cce: Bogus length %zu in firmware \"%s\"\n",
+                       fw->size, FIRMWARE_NAME);
+                rc = -EINVAL;
+                goto out_release;
+        }
        r128_do_wait_for_idle(dev_priv);
+        fw_data = (const __be32 *)fw->data;
        R128_WRITE(R128_PM4_MICROCODE_ADDR, 0);
        for (i = 0; i < 256; i++) {
-                R128_WRITE(R128_PM4_MICROCODE_DATAH, r128_cce_microcode[i * 2]);
+                R128_WRITE(R128_PM4_MICROCODE_DATAH,
+                           be32_to_cpup(&fw_data[i * 2]));
                R128_WRITE(R128_PM4_MICROCODE_DATAL,
-                           r128_cce_microcode[i * 2 + 1]);
+                           be32_to_cpup(&fw_data[i * 2 + 1]));
        }
+out_release:
+        release_firmware(fw);
+        return rc;
 }
 /* Flush any pending commands to the CCE.  This should only be used just
@@ -350,9 +342,15 @@ static void r128_cce_init_ring_buffer(struct drm_device * dev,
 static int r128_do_init_cce(struct drm_device * dev, drm_r128_init_t * init)
 {
        drm_r128_private_t *dev_priv;
+        int rc;
        DRM_DEBUG("\n");
+        if (dev->dev_private) {
+                DRM_DEBUG("called when already initialized\n");
+                return -EINVAL;
+        }
        dev_priv = kzalloc(sizeof(drm_r128_private_t), GFP_KERNEL);
        if (dev_priv == NULL)
                return -ENOMEM;
@@ -575,13 +573,18 @@ static int r128_do_init_cce(struct drm_device * dev, drm_r128_init_t * init)
 #endif
        r128_cce_init_ring_buffer(dev, dev_priv);
-        r128_cce_load_microcode(dev_priv);
+        rc = r128_cce_load_microcode(dev_priv);
        dev->dev_private = (void *)dev_priv;
        r128_do_engine_reset(dev);
-        return 0;
+        if (rc) {
+                DRM_ERROR("Failed to load firmware!\n");
+                r128_do_cleanup_cce(dev);
+        }
+        return rc;
 }
 int r128_do_cleanup_cce(struct drm_device * dev)
@@ -649,6 +652,8 @@ int r128_cce_start(struct drm_device *dev, void *data, struct drm_file *file_pri
        LOCK_TEST_WITH_RETURN(dev, file_priv);
+        DEV_INIT_TEST_WITH_RETURN(dev_priv);
        if (dev_priv->cce_running || dev_priv->cce_mode == R128_PM4_NONPM4) {
                DRM_DEBUG("while CCE running\n");
                return 0;
@@ -671,6 +676,8 @@ int r128_cce_stop(struct drm_device *dev, void *data, struct drm_file *file_priv
        LOCK_TEST_WITH_RETURN(dev, file_priv);
+        DEV_INIT_TEST_WITH_RETURN(dev_priv);
        /* Flush any pending CCE commands.  This ensures any outstanding
         * commands are exectuted by the engine before we turn it off.
         */
@@ -708,10 +715,7 @@ int r128_cce_reset(struct drm_device *dev, void *data, struct drm_file *file_pri
        LOCK_TEST_WITH_RETURN(dev, file_priv);
-        if (!dev_priv) {
+        DEV_INIT_TEST_WITH_RETURN(dev_priv);
-                DRM_DEBUG("called before init done\n");
-                return -EINVAL;
-        }
        r128_do_cce_reset(dev_priv);
@@ -728,6 +732,8 @@ int r128_cce_idle(struct drm_device *dev, void *data, struct drm_file *file_priv
        LOCK_TEST_WITH_RETURN(dev, file_priv);
+        DEV_INIT_TEST_WITH_RETURN(dev_priv);
        if (dev_priv->cce_running) {
                r128_do_cce_flush(dev_priv);
        }
@@ -741,6 +747,8 @@ int r128_engine_reset(struct drm_device *dev, void *data, struct drm_file *file_
        LOCK_TEST_WITH_RETURN(dev, file_priv);
+        DEV_INIT_TEST_WITH_RETURN(dev->dev_private);
        return r128_do_engine_reset(dev);
 }
diff --git a/drivers/gpu/drm/r128/r128_drv.h b/drivers/gpu/drm/r128/r128_drv.h
index 797a26c42dab..3c60829d82e9 100644
--- a/drivers/gpu/drm/r128/r128_drv.h
+++ b/drivers/gpu/drm/r128/r128_drv.h
@@ -422,6 +422,14 @@ static __inline__ void r128_update_ring_snapshot(drm_r128_private_t * dev_priv)
 * Misc helper macros
 */
+#define DEV_INIT_TEST_WITH_RETURN(_dev_priv)                            \
+do {                                                                    \
+        if (!_dev_priv) {                                               \
+                DRM_ERROR("called with no initialization\n");           \
+                return -EINVAL;                                         \
+        }                                                               \
+} while (0)
 #define RING_SPACE_TEST_WITH_RETURN( dev_priv )                         \
 do {                                                                    \
        drm_r128_ring_buffer_t *ring = &dev_priv->ring; int i;          \
diff --git a/drivers/gpu/drm/r128/r128_state.c b/drivers/gpu/drm/r128/r128_state.c
index 026a48c95c8f..af2665cf4718 100644
--- a/drivers/gpu/drm/r128/r128_state.c
+++ b/drivers/gpu/drm/r128/r128_state.c
@@ -1244,14 +1244,18 @@ static void r128_cce_dispatch_stipple(struct drm_device * dev, u32 * stipple)
 static int r128_cce_clear(struct drm_device *dev, void *data, struct drm_file *file_priv)
 {
        drm_r128_private_t *dev_priv = dev->dev_private;
-        drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv;
+        drm_r128_sarea_t *sarea_priv;
        drm_r128_clear_t *clear = data;
        DRM_DEBUG("\n");
        LOCK_TEST_WITH_RETURN(dev, file_priv);
+        DEV_INIT_TEST_WITH_RETURN(dev_priv);
        RING_SPACE_TEST_WITH_RETURN(dev_priv);
+        sarea_priv = dev_priv->sarea_priv;
        if (sarea_priv->nbox > R128_NR_SAREA_CLIPRECTS)
                sarea_priv->nbox = R128_NR_SAREA_CLIPRECTS;
@@ -1312,6 +1316,8 @@ static int r128_cce_flip(struct drm_device *dev, void *data, struct drm_file *fi
        LOCK_TEST_WITH_RETURN(dev, file_priv);
+        DEV_INIT_TEST_WITH_RETURN(dev_priv);
        RING_SPACE_TEST_WITH_RETURN(dev_priv);
        if (!dev_priv->page_flipping)
@@ -1331,6 +1337,8 @@ static int r128_cce_swap(struct drm_device *dev, void *data, struct drm_file *fi
        LOCK_TEST_WITH_RETURN(dev, file_priv);
+        DEV_INIT_TEST_WITH_RETURN(dev_priv);
        RING_SPACE_TEST_WITH_RETURN(dev_priv);
        if (sarea_priv->nbox > R128_NR_SAREA_CLIPRECTS)
@@ -1354,10 +1362,7 @@ static int r128_cce_vertex(struct drm_device *dev, void *data, struct drm_file *
        LOCK_TEST_WITH_RETURN(dev, file_priv);
-        if (!dev_priv) {
+        DEV_INIT_TEST_WITH_RETURN(dev_priv);
-                DRM_ERROR("called with no initialization\n");
-                return -EINVAL;
-        }
        DRM_DEBUG("pid=%d index=%d count=%d discard=%d\n",
                  DRM_CURRENTPID, vertex->idx, vertex->count, vertex->discard);
@@ -1410,10 +1415,7 @@ static int r128_cce_indices(struct drm_device *dev, void *data, struct drm_file
        LOCK_TEST_WITH_RETURN(dev, file_priv);
-        if (!dev_priv) {
+        DEV_INIT_TEST_WITH_RETURN(dev_priv);
-                DRM_ERROR("called with no initialization\n");
-                return -EINVAL;
-        }
        DRM_DEBUG("pid=%d buf=%d s=%d e=%d d=%d\n", DRM_CURRENTPID,
                  elts->idx, elts->start, elts->end, elts->discard);
@@ -1476,6 +1478,8 @@ static int r128_cce_blit(struct drm_device *dev, void *data, struct drm_file *fi
        LOCK_TEST_WITH_RETURN(dev, file_priv);
+        DEV_INIT_TEST_WITH_RETURN(dev_priv);
        DRM_DEBUG("pid=%d index=%d\n", DRM_CURRENTPID, blit->idx);
        if (blit->idx < 0 || blit->idx >= dma->buf_count) {
@@ -1501,6 +1505,8 @@ static int r128_cce_depth(struct drm_device *dev, void *data, struct drm_file *f
        LOCK_TEST_WITH_RETURN(dev, file_priv);
+        DEV_INIT_TEST_WITH_RETURN(dev_priv);
        RING_SPACE_TEST_WITH_RETURN(dev_priv);
        ret = -EINVAL;
@@ -1531,6 +1537,8 @@ static int r128_cce_stipple(struct drm_device *dev, void *data, struct drm_file
        LOCK_TEST_WITH_RETURN(dev, file_priv);
+        DEV_INIT_TEST_WITH_RETURN(dev_priv);
        if (DRM_COPY_FROM_USER(&mask, stipple->mask, 32 * sizeof(u32)))
                return -EFAULT;
@@ -1555,10 +1563,7 @@ static int r128_cce_indirect(struct drm_device *dev, void *data, struct drm_file
        LOCK_TEST_WITH_RETURN(dev, file_priv);
-        if (!dev_priv) {
+        DEV_INIT_TEST_WITH_RETURN(dev_priv);
-                DRM_ERROR("called with no initialization\n");
-                return -EINVAL;
-        }
        DRM_DEBUG("idx=%d s=%d e=%d d=%d\n",
                  indirect->idx, indirect->start, indirect->end,
@@ -1620,10 +1625,7 @@ static int r128_getparam(struct drm_device *dev, void *data, struct drm_file *fi
        drm_r128_getparam_t *param = data;
        int value;
-        if (!dev_priv) {
+        DEV_INIT_TEST_WITH_RETURN(dev_priv);
-                DRM_ERROR("called with no initialization\n");
-                return -EINVAL;
-        }
        DRM_DEBUG("pid=%d\n", DRM_CURRENTPID);
diff --git a/drivers/gpu/drm/radeon/Kconfig b/drivers/gpu/drm/radeon/Kconfig
index 2168d67f09a6..5982321be4d5 100644
--- a/drivers/gpu/drm/radeon/Kconfig
+++ b/drivers/gpu/drm/radeon/Kconfig
@@ -1,7 +1,6 @@
 config DRM_RADEON_KMS
        bool "Enable modesetting on radeon by default"
        depends on DRM_RADEON
-        select DRM_TTM
        help
          Choose this option if you want kernel modesetting enabled by default,
          and you have a new enough userspace to support this. Running old
diff --git a/drivers/gpu/drm/radeon/Makefile b/drivers/gpu/drm/radeon/Makefile
index 013d38059943..09a28923f46e 100644
--- a/drivers/gpu/drm/radeon/Makefile
+++ b/drivers/gpu/drm/radeon/Makefile
@@ -3,18 +3,53 @@
 # Direct Rendering Infrastructure (DRI) in XFree86 4.1.0 and higher.
 ccflags-y := -Iinclude/drm
+hostprogs-y := mkregtable
+quiet_cmd_mkregtable = MKREGTABLE $@
+      cmd_mkregtable = $(obj)/mkregtable $< > $@
+$(obj)/rn50_reg_safe.h: $(src)/reg_srcs/rn50 $(obj)/mkregtable
+        $(call if_changed,mkregtable)
+$(obj)/r100_reg_safe.h: $(src)/reg_srcs/r100 $(obj)/mkregtable
+        $(call if_changed,mkregtable)
+$(obj)/r200_reg_safe.h: $(src)/reg_srcs/r200 $(obj)/mkregtable
+        $(call if_changed,mkregtable)
+$(obj)/rv515_reg_safe.h: $(src)/reg_srcs/rv515 $(obj)/mkregtable
+        $(call if_changed,mkregtable)
+$(obj)/r300_reg_safe.h: $(src)/reg_srcs/r300 $(obj)/mkregtable
+        $(call if_changed,mkregtable)
+$(obj)/rs600_reg_safe.h: $(src)/reg_srcs/rs600 $(obj)/mkregtable
+        $(call if_changed,mkregtable)
+$(obj)/r100.o: $(obj)/r100_reg_safe.h $(obj)/rn50_reg_safe.h
+$(obj)/r200.o: $(obj)/r200_reg_safe.h
+$(obj)/rv515.o: $(obj)/rv515_reg_safe.h
+$(obj)/r300.o: $(obj)/r300_reg_safe.h
+$(obj)/rs600.o: $(obj)/rs600_reg_safe.h
 radeon-y := radeon_drv.o radeon_cp.o radeon_state.o radeon_mem.o \
        radeon_irq.o r300_cmdbuf.o r600_cp.o
+# add KMS driver
-radeon-$(CONFIG_DRM_RADEON_KMS) += radeon_device.o radeon_kms.o \
+radeon-y += radeon_device.o radeon_kms.o \
        radeon_atombios.o radeon_agp.o atombios_crtc.o radeon_combios.o \
        atom.o radeon_fence.o radeon_ttm.o radeon_object.o radeon_gart.o \
        radeon_legacy_crtc.o radeon_legacy_encoders.o radeon_connectors.o \
        radeon_encoders.o radeon_display.o radeon_cursor.o radeon_i2c.o \
        radeon_clocks.o radeon_fb.o radeon_gem.o radeon_ring.o radeon_irq_kms.o \
        radeon_cs.o radeon_bios.o radeon_benchmark.o r100.o r300.o r420.o \
-        rs400.o rs600.o rs690.o rv515.o r520.o r600.o rs780.o rv770.o \
+        rs400.o rs600.o rs690.o rv515.o r520.o r600.o rv770.o radeon_test.o \
-        radeon_test.o
+        r200.o radeon_legacy_tv.o r600_cs.o r600_blit.o r600_blit_shaders.o \
+        r600_blit_kms.o
 radeon-$(CONFIG_COMPAT) += radeon_ioc32.o
diff --git a/drivers/gpu/drm/radeon/atombios.h b/drivers/gpu/drm/radeon/atombios.h
index cf67928abbc8..5d402086bc47 100644
--- a/drivers/gpu/drm/radeon/atombios.h
+++ b/drivers/gpu/drm/radeon/atombios.h
@@ -2374,6 +2374,17 @@ typedef struct _ATOM_ANALOG_TV_INFO {
        ATOM_MODE_TIMING aModeTimings[MAX_SUPPORTED_TV_TIMING];
 } ATOM_ANALOG_TV_INFO;
+#define MAX_SUPPORTED_TV_TIMING_V1_2    3
+typedef struct _ATOM_ANALOG_TV_INFO_V1_2 {
+        ATOM_COMMON_TABLE_HEADER sHeader;
+        UCHAR                    ucTV_SupportedStandard;
+        UCHAR                    ucTV_BootUpDefaultStandard;
+        UCHAR                    ucExt_TV_ASIC_ID;
+        UCHAR                    ucExt_TV_ASIC_SlaveAddr;
+        ATOM_DTD_FORMAT          aModeTimings[MAX_SUPPORTED_TV_TIMING];
+} ATOM_ANALOG_TV_INFO_V1_2;
 /**************************************************************************/
 /*  VRAM usage and their defintions */
diff --git a/drivers/gpu/drm/radeon/atombios_crtc.c b/drivers/gpu/drm/radeon/atombios_crtc.c
index 74d034f77c6b..6a015929deee 100644
--- a/drivers/gpu/drm/radeon/atombios_crtc.c
+++ b/drivers/gpu/drm/radeon/atombios_crtc.c
@@ -31,6 +31,10 @@
 #include "atom.h"
 #include "atom-bits.h"
+/* evil but including atombios.h is much worse */
+bool radeon_atom_get_tv_timings(struct radeon_device *rdev, int index,
+                                SET_CRTC_TIMING_PARAMETERS_PS_ALLOCATION *crtc_timing,
+                                int32_t *pixel_clock);
 static void atombios_overscan_setup(struct drm_crtc *crtc,
                                    struct drm_display_mode *mode,
                                    struct drm_display_mode *adjusted_mode)
@@ -89,17 +93,32 @@ static void atombios_scaler_setup(struct drm_crtc *crtc)
        struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
        ENABLE_SCALER_PS_ALLOCATION args;
        int index = GetIndexIntoMasterTable(COMMAND, EnableScaler);
        /* fixme - fill in enc_priv for atom dac */
        enum radeon_tv_std tv_std = TV_STD_NTSC;
+        bool is_tv = false, is_cv = false;
+        struct drm_encoder *encoder;
        if (!ASIC_IS_AVIVO(rdev) && radeon_crtc->crtc_id)
                return;
+        list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
+                /* find tv std */
+                if (encoder->crtc == crtc) {
+                        struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
+                        if (radeon_encoder->active_device & ATOM_DEVICE_TV_SUPPORT) {
+                                struct radeon_encoder_atom_dac *tv_dac = radeon_encoder->enc_priv;
+                                tv_std = tv_dac->tv_std;
+                                is_tv = true;
+                        }
+                }
+        }
        memset(&args, 0, sizeof(args));
        args.ucScaler = radeon_crtc->crtc_id;
-        if (radeon_crtc->devices & (ATOM_DEVICE_TV_SUPPORT)) {
+        if (is_tv) {
                switch (tv_std) {
                case TV_STD_NTSC:
                default:
@@ -128,7 +147,7 @@ static void atombios_scaler_setup(struct drm_crtc *crtc)
                        break;
                }
                args.ucEnable = SCALER_ENABLE_MULTITAP_MODE;
-        } else if (radeon_crtc->devices & (ATOM_DEVICE_CV_SUPPORT)) {
+        } else if (is_cv) {
                args.ucTVStandard = ATOM_TV_CV;
                args.ucEnable = SCALER_ENABLE_MULTITAP_MODE;
        } else {
@@ -151,9 +170,9 @@ static void atombios_scaler_setup(struct drm_crtc *crtc)
                }
        }
        atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args);
-        if (radeon_crtc->devices & (ATOM_DEVICE_CV_SUPPORT | ATOM_DEVICE_TV_SUPPORT)
+        if ((is_tv || is_cv)
-            && rdev->family >= CHIP_RV515 && rdev->family <= CHIP_RV570) {
+            && rdev->family >= CHIP_RV515 && rdev->family <= CHIP_R580) {
-                atom_rv515_force_tv_scaler(rdev);
+                atom_rv515_force_tv_scaler(rdev, radeon_crtc);
        }
 }
@@ -370,6 +389,7 @@ void atombios_crtc_set_pll(struct drm_crtc *crtc, struct drm_display_mode *mode)
                                        pll_flags |= RADEON_PLL_USE_REF_DIV;
                        }
                        radeon_encoder = to_radeon_encoder(encoder);
+                        break;
                }
        }
@@ -468,6 +488,11 @@ int atombios_crtc_set_base(struct drm_crtc *crtc, int x, int y,
        }
        switch (crtc->fb->bits_per_pixel) {
+        case 8:
+                fb_format =
+                    AVIVO_D1GRPH_CONTROL_DEPTH_8BPP |
+                    AVIVO_D1GRPH_CONTROL_8BPP_INDEXED;
+                break;
        case 15:
                fb_format =
                    AVIVO_D1GRPH_CONTROL_DEPTH_16BPP |
@@ -551,42 +576,68 @@ int atombios_crtc_mode_set(struct drm_crtc *crtc,
        struct radeon_device *rdev = dev->dev_private;
        struct drm_encoder *encoder;
        SET_CRTC_TIMING_PARAMETERS_PS_ALLOCATION crtc_timing;
+        int need_tv_timings = 0;
+        bool ret;
        /* TODO color tiling */
        memset(&crtc_timing, 0, sizeof(crtc_timing));
-        /* TODO tv */
        list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
+                /* find tv std */
+                if (encoder->crtc == crtc) {
+                        struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
+                        if (radeon_encoder->active_device & ATOM_DEVICE_TV_SUPPORT) {
+                                struct radeon_encoder_atom_dac *tv_dac = radeon_encoder->enc_priv;
+                                if (tv_dac) {
+                                        if (tv_dac->tv_std == TV_STD_NTSC ||
+                                            tv_dac->tv_std == TV_STD_NTSC_J ||
+                                            tv_dac->tv_std == TV_STD_PAL_M)
+                                                need_tv_timings = 1;
+                                        else
+                                                need_tv_timings = 2;
+                                        break;
+                                }
+                        }
+                }
        }
        crtc_timing.ucCRTC = radeon_crtc->crtc_id;
-        crtc_timing.usH_Total = adjusted_mode->crtc_htotal;
+        if (need_tv_timings) {
-        crtc_timing.usH_Disp = adjusted_mode->crtc_hdisplay;
+                ret = radeon_atom_get_tv_timings(rdev, need_tv_timings - 1,
-        crtc_timing.usH_SyncStart = adjusted_mode->crtc_hsync_start;
+                                                 &crtc_timing, &adjusted_mode->clock);
-        crtc_timing.usH_SyncWidth =
+                if (ret == false)
-            adjusted_mode->crtc_hsync_end - adjusted_mode->crtc_hsync_start;
+                        need_tv_timings = 0;
+        }
-        crtc_timing.usV_Total = adjusted_mode->crtc_vtotal;
+        if (!need_tv_timings) {
-        crtc_timing.usV_Disp = adjusted_mode->crtc_vdisplay;
+                crtc_timing.usH_Total = adjusted_mode->crtc_htotal;
-        crtc_timing.usV_SyncStart = adjusted_mode->crtc_vsync_start;
+                crtc_timing.usH_Disp = adjusted_mode->crtc_hdisplay;
-        crtc_timing.usV_SyncWidth =
+                crtc_timing.usH_SyncStart = adjusted_mode->crtc_hsync_start;
-            adjusted_mode->crtc_vsync_end - adjusted_mode->crtc_vsync_start;
+                crtc_timing.usH_SyncWidth =
+                        adjusted_mode->crtc_hsync_end - adjusted_mode->crtc_hsync_start;
-        if (adjusted_mode->flags & DRM_MODE_FLAG_NVSYNC)
+                crtc_timing.usV_Total = adjusted_mode->crtc_vtotal;
-                crtc_timing.susModeMiscInfo.usAccess |= ATOM_VSYNC_POLARITY;
+                crtc_timing.usV_Disp = adjusted_mode->crtc_vdisplay;
+                crtc_timing.usV_SyncStart = adjusted_mode->crtc_vsync_start;
+                crtc_timing.usV_SyncWidth =
+                        adjusted_mode->crtc_vsync_end - adjusted_mode->crtc_vsync_start;
-        if (adjusted_mode->flags & DRM_MODE_FLAG_NHSYNC)
+                if (adjusted_mode->flags & DRM_MODE_FLAG_NVSYNC)
-                crtc_timing.susModeMiscInfo.usAccess |= ATOM_HSYNC_POLARITY;
+                        crtc_timing.susModeMiscInfo.usAccess |= ATOM_VSYNC_POLARITY;
-        if (adjusted_mode->flags & DRM_MODE_FLAG_CSYNC)
+                if (adjusted_mode->flags & DRM_MODE_FLAG_NHSYNC)
-                crtc_timing.susModeMiscInfo.usAccess |= ATOM_COMPOSITESYNC;
+                        crtc_timing.susModeMiscInfo.usAccess |= ATOM_HSYNC_POLARITY;
-        if (adjusted_mode->flags & DRM_MODE_FLAG_INTERLACE)
+                if (adjusted_mode->flags & DRM_MODE_FLAG_CSYNC)
-                crtc_timing.susModeMiscInfo.usAccess |= ATOM_INTERLACE;
+                        crtc_timing.susModeMiscInfo.usAccess |= ATOM_COMPOSITESYNC;
-        if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN)
+                if (adjusted_mode->flags & DRM_MODE_FLAG_INTERLACE)
-                crtc_timing.susModeMiscInfo.usAccess |= ATOM_DOUBLE_CLOCK_MODE;
+                        crtc_timing.susModeMiscInfo.usAccess |= ATOM_INTERLACE;
+                if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN)
+                        crtc_timing.susModeMiscInfo.usAccess |= ATOM_DOUBLE_CLOCK_MODE;
+        }
        atombios_crtc_set_pll(crtc, adjusted_mode);
        atombios_crtc_set_timing(crtc, &crtc_timing);
diff --git a/drivers/gpu/drm/radeon/avivod.h b/drivers/gpu/drm/radeon/avivod.h
new file mode 100644
index 000000000000..e2b92c445bab
--- /dev/null
+++ b/drivers/gpu/drm/radeon/avivod.h
@@ -0,0 +1,69 @@
+/*
+ * Copyright 2009 Advanced Micro Devices, Inc.
+ * Copyright 2009 Red Hat Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors: Dave Airlie
+ *          Alex Deucher
+ *          Jerome Glisse
+ */
+#ifndef AVIVOD_H
+#define AVIVOD_H
+#define D1CRTC_CONTROL                                  0x6080
+#define         CRTC_EN                                         (1 << 0)
+#define D1CRTC_UPDATE_LOCK                              0x60E8
+#define D1GRPH_PRIMARY_SURFACE_ADDRESS                  0x6110
+#define D1GRPH_SECONDARY_SURFACE_ADDRESS                0x6118
+#define D2CRTC_CONTROL                                  0x6880
+#define D2CRTC_UPDATE_LOCK                              0x68E8
+#define D2GRPH_PRIMARY_SURFACE_ADDRESS                  0x6910
+#define D2GRPH_SECONDARY_SURFACE_ADDRESS                0x6918
+#define D1VGA_CONTROL                                   0x0330
+#define         DVGA_CONTROL_MODE_ENABLE                        (1 << 0)
+#define         DVGA_CONTROL_TIMING_SELECT                      (1 << 8)
+#define         DVGA_CONTROL_SYNC_POLARITY_SELECT               (1 << 9)
+#define         DVGA_CONTROL_OVERSCAN_TIMING_SELECT             (1 << 10)
+#define         DVGA_CONTROL_OVERSCAN_COLOR_EN                  (1 << 16)
+#define         DVGA_CONTROL_ROTATE                             (1 << 24)
+#define D2VGA_CONTROL                                   0x0338
+#define VGA_HDP_CONTROL                                 0x328
+#define         VGA_MEM_PAGE_SELECT_EN                          (1 << 0)
+#define         VGA_MEMORY_DISABLE                              (1 << 4)
+#define         VGA_RBBM_LOCK_DISABLE                           (1 << 8)
+#define         VGA_SOFT_RESET                                  (1 << 16)
+#define VGA_MEMORY_BASE_ADDRESS                         0x0310
+#define VGA_RENDER_CONTROL                              0x0300
+#define         VGA_VSTATUS_CNTL_MASK                           0x00030000
+/* AVIVO disable VGA rendering */
+static inline void radeon_avivo_vga_render_disable(struct radeon_device *rdev)
+{
+        u32 vga_render;
+        vga_render = RREG32(VGA_RENDER_CONTROL);
+        vga_render &= ~VGA_VSTATUS_CNTL_MASK;
+        WREG32(VGA_RENDER_CONTROL, vga_render);
+}
+#endif
diff --git a/drivers/gpu/drm/radeon/mkregtable.c b/drivers/gpu/drm/radeon/mkregtable.c
new file mode 100644
index 000000000000..fb211e585dea
--- /dev/null
+++ b/drivers/gpu/drm/radeon/mkregtable.c
@@ -0,0 +1,720 @@
+/* utility to create the register check tables
+ * this includes inlined list.h safe for userspace.
+ *
+ * Copyright 2009 Jerome Glisse
+ * Copyright 2009 Red Hat Inc.
+ *
+ * Authors:
+ *      Jerome Glisse
+ *      Dave Airlie
+ */
+#include <sys/types.h>
+#include <stdlib.h>
+#include <string.h>
+#include <stdio.h>
+#include <regex.h>
+#include <libgen.h>
+#define offsetof(TYPE, MEMBER) ((size_t) &((TYPE *)0)->MEMBER)
+/**
+ * container_of - cast a member of a structure out to the containing structure
+ * @ptr:    the pointer to the member.
+ * @type:   the type of the container struct this is embedded in.
+ * @member: the name of the member within the struct.
+ *
+ */
+#define container_of(ptr, type, member) ({          \
+        const typeof(((type *)0)->member)*__mptr = (ptr);    \
+                     (type *)((char *)__mptr - offsetof(type, member)); })
+/*
+ * Simple doubly linked list implementation.
+ *
+ * Some of the internal functions ("__xxx") are useful when
+ * manipulating whole lists rather than single entries, as
+ * sometimes we already know the next/prev entries and we can
+ * generate better code by using them directly rather than
+ * using the generic single-entry routines.
+ */
+struct list_head {
+        struct list_head *next, *prev;
+};
+#define LIST_HEAD_INIT(name) { &(name), &(name) }
+#define LIST_HEAD(name) \
+        struct list_head name = LIST_HEAD_INIT(name)
+static inline void INIT_LIST_HEAD(struct list_head *list)
+{
+        list->next = list;
+        list->prev = list;
+}
+/*
+ * Insert a new entry between two known consecutive entries.
+ *
+ * This is only for internal list manipulation where we know
+ * the prev/next entries already!
+ */
+#ifndef CONFIG_DEBUG_LIST
+static inline void __list_add(struct list_head *new,
+                              struct list_head *prev, struct list_head *next)
+{
+        next->prev = new;
+        new->next = next;
+        new->prev = prev;
+        prev->next = new;
+}
+#else
+extern void __list_add(struct list_head *new,
+                       struct list_head *prev, struct list_head *next);
+#endif
+/**
+ * list_add - add a new entry
+ * @new: new entry to be added
+ * @head: list head to add it after
+ *
+ * Insert a new entry after the specified head.
+ * This is good for implementing stacks.
+ */
+static inline void list_add(struct list_head *new, struct list_head *head)
+{
+        __list_add(new, head, head->next);
+}
+/**
+ * list_add_tail - add a new entry
+ * @new: new entry to be added
+ * @head: list head to add it before
+ *
+ * Insert a new entry before the specified head.
+ * This is useful for implementing queues.
+ */
+static inline void list_add_tail(struct list_head *new, struct list_head *head)
+{
+        __list_add(new, head->prev, head);
+}
+/*
+ * Delete a list entry by making the prev/next entries
+ * point to each other.
+ *
+ * This is only for internal list manipulation where we know
+ * the prev/next entries already!
+ */
+static inline void __list_del(struct list_head *prev, struct list_head *next)
+{
+        next->prev = prev;
+        prev->next = next;
+}
+/**
+ * list_del - deletes entry from list.
+ * @entry: the element to delete from the list.
+ * Note: list_empty() on entry does not return true after this, the entry is
+ * in an undefined state.
+ */
+#ifndef CONFIG_DEBUG_LIST
+static inline void list_del(struct list_head *entry)
+{
+        __list_del(entry->prev, entry->next);
+        entry->next = (void *)0xDEADBEEF;
+        entry->prev = (void *)0xBEEFDEAD;
+}
+#else
+extern void list_del(struct list_head *entry);
+#endif
+/**
+ * list_replace - replace old entry by new one
+ * @old : the element to be replaced
+ * @new : the new element to insert
+ *
+ * If @old was empty, it will be overwritten.
+ */
+static inline void list_replace(struct list_head *old, struct list_head *new)
+{
+        new->next = old->next;
+        new->next->prev = new;
+        new->prev = old->prev;
+        new->prev->next = new;
+}
+static inline void list_replace_init(struct list_head *old,
+                                     struct list_head *new)
+{
+        list_replace(old, new);
+        INIT_LIST_HEAD(old);
+}
+/**
+ * list_del_init - deletes entry from list and reinitialize it.
+ * @entry: the element to delete from the list.
+ */
+static inline void list_del_init(struct list_head *entry)
+{
+        __list_del(entry->prev, entry->next);
+        INIT_LIST_HEAD(entry);
+}
+/**
+ * list_move - delete from one list and add as another's head
+ * @list: the entry to move
+ * @head: the head that will precede our entry
+ */
+static inline void list_move(struct list_head *list, struct list_head *head)
+{
+        __list_del(list->prev, list->next);
+        list_add(list, head);
+}
+/**
+ * list_move_tail - delete from one list and add as another's tail
+ * @list: the entry to move
+ * @head: the head that will follow our entry
+ */
+static inline void list_move_tail(struct list_head *list,
+                                  struct list_head *head)
+{
+        __list_del(list->prev, list->next);
+        list_add_tail(list, head);
+}
+/**
+ * list_is_last - tests whether @list is the last entry in list @head
+ * @list: the entry to test
+ * @head: the head of the list
+ */
+static inline int list_is_last(const struct list_head *list,
+                               const struct list_head *head)
+{
+        return list->next == head;
+}
+/**
+ * list_empty - tests whether a list is empty
+ * @head: the list to test.
+ */
+static inline int list_empty(const struct list_head *head)
+{
+        return head->next == head;
+}
+/**
+ * list_empty_careful - tests whether a list is empty and not being modified
+ * @head: the list to test
+ *
+ * Description:
+ * tests whether a list is empty _and_ checks that no other CPU might be
+ * in the process of modifying either member (next or prev)
+ *
+ * NOTE: using list_empty_careful() without synchronization
+ * can only be safe if the only activity that can happen
+ * to the list entry is list_del_init(). Eg. it cannot be used
+ * if another CPU could re-list_add() it.
+ */
+static inline int list_empty_careful(const struct list_head *head)
+{
+        struct list_head *next = head->next;
+        return (next == head) && (next == head->prev);
+}
+/**
+ * list_is_singular - tests whether a list has just one entry.
+ * @head: the list to test.
+ */
+static inline int list_is_singular(const struct list_head *head)
+{
+        return !list_empty(head) && (head->next == head->prev);
+}
+static inline void __list_cut_position(struct list_head *list,
+                                       struct list_head *head,
+                                       struct list_head *entry)
+{
+        struct list_head *new_first = entry->next;
+        list->next = head->next;
+        list->next->prev = list;
+        list->prev = entry;
+        entry->next = list;
+        head->next = new_first;
+        new_first->prev = head;
+}
+/**
+ * list_cut_position - cut a list into two
+ * @list: a new list to add all removed entries
+ * @head: a list with entries
+ * @entry: an entry within head, could be the head itself
+ *      and if so we won't cut the list
+ *
+ * This helper moves the initial part of @head, up to and
+ * including @entry, from @head to @list. You should
+ * pass on @entry an element you know is on @head. @list
+ * should be an empty list or a list you do not care about
+ * losing its data.
+ *
+ */
+static inline void list_cut_position(struct list_head *list,
+                                     struct list_head *head,
+                                     struct list_head *entry)
+{
+        if (list_empty(head))
+                return;
+        if (list_is_singular(head) && (head->next != entry && head != entry))
+                return;
+        if (entry == head)
+                INIT_LIST_HEAD(list);
+        else
+                __list_cut_position(list, head, entry);
+}
+static inline void __list_splice(const struct list_head *list,
+                                 struct list_head *prev, struct list_head *next)
+{
+        struct list_head *first = list->next;
+        struct list_head *last = list->prev;
+        first->prev = prev;
+        prev->next = first;
+        last->next = next;
+        next->prev = last;
+}
+/**
+ * list_splice - join two lists, this is designed for stacks
+ * @list: the new list to add.
+ * @head: the place to add it in the first list.
+ */
+static inline void list_splice(const struct list_head *list,
+                               struct list_head *head)
+{
+        if (!list_empty(list))
+                __list_splice(list, head, head->next);
+}
+/**
+ * list_splice_tail - join two lists, each list being a queue
+ * @list: the new list to add.
+ * @head: the place to add it in the first list.
+ */
+static inline void list_splice_tail(struct list_head *list,
+                                    struct list_head *head)
+{
+        if (!list_empty(list))
+                __list_splice(list, head->prev, head);
+}
+/**
+ * list_splice_init - join two lists and reinitialise the emptied list.
+ * @list: the new list to add.
+ * @head: the place to add it in the first list.
+ *
+ * The list at @list is reinitialised
+ */
+static inline void list_splice_init(struct list_head *list,
+                                    struct list_head *head)
+{
+        if (!list_empty(list)) {
+                __list_splice(list, head, head->next);
+                INIT_LIST_HEAD(list);
+        }
+}
+/**
+ * list_splice_tail_init - join two lists and reinitialise the emptied list
+ * @list: the new list to add.
+ * @head: the place to add it in the first list.
+ *
+ * Each of the lists is a queue.
+ * The list at @list is reinitialised
+ */
+static inline void list_splice_tail_init(struct list_head *list,
+                                         struct list_head *head)
+{
+        if (!list_empty(list)) {
+                __list_splice(list, head->prev, head);
+                INIT_LIST_HEAD(list);
+        }
+}
+/**
+ * list_entry - get the struct for this entry
+ * @ptr:        the &struct list_head pointer.
+ * @type:       the type of the struct this is embedded in.
+ * @member:     the name of the list_struct within the struct.
+ */
+#define list_entry(ptr, type, member) \
+        container_of(ptr, type, member)
+/**
+ * list_first_entry - get the first element from a list
+ * @ptr:        the list head to take the element from.
+ * @type:       the type of the struct this is embedded in.
+ * @member:     the name of the list_struct within the struct.
+ *
+ * Note, that list is expected to be not empty.
+ */
+#define list_first_entry(ptr, type, member) \
+        list_entry((ptr)->next, type, member)
+/**
+ * list_for_each        -       iterate over a list
+ * @pos:        the &struct list_head to use as a loop cursor.
+ * @head:       the head for your list.
+ */
+#define list_for_each(pos, head) \
+        for (pos = (head)->next; prefetch(pos->next), pos != (head); \
+                pos = pos->next)
+/**
+ * __list_for_each      -       iterate over a list
+ * @pos:        the &struct list_head to use as a loop cursor.
+ * @head:       the head for your list.
+ *
+ * This variant differs from list_for_each() in that it's the
+ * simplest possible list iteration code, no prefetching is done.
+ * Use this for code that knows the list to be very short (empty
+ * or 1 entry) most of the time.
+ */
+#define __list_for_each(pos, head) \
+        for (pos = (head)->next; pos != (head); pos = pos->next)
+/**
+ * list_for_each_prev   -       iterate over a list backwards
+ * @pos:        the &struct list_head to use as a loop cursor.
+ * @head:       the head for your list.
+ */
+#define list_for_each_prev(pos, head) \
+        for (pos = (head)->prev; prefetch(pos->prev), pos != (head); \
+                pos = pos->prev)
+/**
+ * list_for_each_safe - iterate over a list safe against removal of list entry
+ * @pos:        the &struct list_head to use as a loop cursor.
+ * @n:          another &struct list_head to use as temporary storage
+ * @head:       the head for your list.
+ */
+#define list_for_each_safe(pos, n, head) \
+        for (pos = (head)->next, n = pos->next; pos != (head); \
+                pos = n, n = pos->next)
+/**
+ * list_for_each_prev_safe - iterate over a list backwards safe against removal of list entry
+ * @pos:        the &struct list_head to use as a loop cursor.
+ * @n:          another &struct list_head to use as temporary storage
+ * @head:       the head for your list.
+ */
+#define list_for_each_prev_safe(pos, n, head) \
+        for (pos = (head)->prev, n = pos->prev; \
+             prefetch(pos->prev), pos != (head); \
+             pos = n, n = pos->prev)
+/**
+ * list_for_each_entry  -       iterate over list of given type
+ * @pos:        the type * to use as a loop cursor.
+ * @head:       the head for your list.
+ * @member:     the name of the list_struct within the struct.
+ */
+#define list_for_each_entry(pos, head, member)                          \
+        for (pos = list_entry((head)->next, typeof(*pos), member);      \
+             &pos->member != (head);    \
+             pos = list_entry(pos->member.next, typeof(*pos), member))
+/**
+ * list_for_each_entry_reverse - iterate backwards over list of given type.
+ * @pos:        the type * to use as a loop cursor.
+ * @head:       the head for your list.
+ * @member:     the name of the list_struct within the struct.
+ */
+#define list_for_each_entry_reverse(pos, head, member)                  \
+        for (pos = list_entry((head)->prev, typeof(*pos), member);      \
+             prefetch(pos->member.prev), &pos->member != (head);        \
+             pos = list_entry(pos->member.prev, typeof(*pos), member))
+/**
+ * list_prepare_entry - prepare a pos entry for use in list_for_each_entry_continue()
+ * @pos:        the type * to use as a start point
+ * @head:       the head of the list
+ * @member:     the name of the list_struct within the struct.
+ *
+ * Prepares a pos entry for use as a start point in list_for_each_entry_continue().
+ */
+#define list_prepare_entry(pos, head, member) \
+        ((pos) ? : list_entry(head, typeof(*pos), member))
+/**
+ * list_for_each_entry_continue - continue iteration over list of given type
+ * @pos:        the type * to use as a loop cursor.
+ * @head:       the head for your list.
+ * @member:     the name of the list_struct within the struct.
+ *
+ * Continue to iterate over list of given type, continuing after
+ * the current position.
+ */
+#define list_for_each_entry_continue(pos, head, member)                 \
+        for (pos = list_entry(pos->member.next, typeof(*pos), member);  \
+             prefetch(pos->member.next), &pos->member != (head);        \
+             pos = list_entry(pos->member.next, typeof(*pos), member))
+/**
+ * list_for_each_entry_continue_reverse - iterate backwards from the given point
+ * @pos:        the type * to use as a loop cursor.
+ * @head:       the head for your list.
+ * @member:     the name of the list_struct within the struct.
+ *
+ * Start to iterate over list of given type backwards, continuing after
+ * the current position.
+ */
+#define list_for_each_entry_continue_reverse(pos, head, member)         \
+        for (pos = list_entry(pos->member.prev, typeof(*pos), member);  \
+             prefetch(pos->member.prev), &pos->member != (head);        \
+             pos = list_entry(pos->member.prev, typeof(*pos), member))
+/**
+ * list_for_each_entry_from - iterate over list of given type from the current point
+ * @pos:        the type * to use as a loop cursor.
+ * @head:       the head for your list.
+ * @member:     the name of the list_struct within the struct.
+ *
+ * Iterate over list of given type, continuing from current position.
+ */
+#define list_for_each_entry_from(pos, head, member)                     \
+        for (; prefetch(pos->member.next), &pos->member != (head);      \
+             pos = list_entry(pos->member.next, typeof(*pos), member))
+/**
+ * list_for_each_entry_safe - iterate over list of given type safe against removal of list entry
+ * @pos:        the type * to use as a loop cursor.
+ * @n:          another type * to use as temporary storage
+ * @head:       the head for your list.
+ * @member:     the name of the list_struct within the struct.
+ */
+#define list_for_each_entry_safe(pos, n, head, member)                  \
+        for (pos = list_entry((head)->next, typeof(*pos), member),      \
+                n = list_entry(pos->member.next, typeof(*pos), member); \
+             &pos->member != (head);                                    \
+             pos = n, n = list_entry(n->member.next, typeof(*n), member))
+/**
+ * list_for_each_entry_safe_continue
+ * @pos:        the type * to use as a loop cursor.
+ * @n:          another type * to use as temporary storage
+ * @head:       the head for your list.
+ * @member:     the name of the list_struct within the struct.
+ *
+ * Iterate over list of given type, continuing after current point,
+ * safe against removal of list entry.
+ */
+#define list_for_each_entry_safe_continue(pos, n, head, member)                 \
+        for (pos = list_entry(pos->member.next, typeof(*pos), member),          \
+                n = list_entry(pos->member.next, typeof(*pos), member);         \
+             &pos->member != (head);                                            \
+             pos = n, n = list_entry(n->member.next, typeof(*n), member))
+/**
+ * list_for_each_entry_safe_from
+ * @pos:        the type * to use as a loop cursor.
+ * @n:          another type * to use as temporary storage
+ * @head:       the head for your list.
+ * @member:     the name of the list_struct within the struct.
+ *
+ * Iterate over list of given type from current point, safe against
+ * removal of list entry.
+ */
+#define list_for_each_entry_safe_from(pos, n, head, member)                     \
+        for (n = list_entry(pos->member.next, typeof(*pos), member);            \
+             &pos->member != (head);                                            \
+             pos = n, n = list_entry(n->member.next, typeof(*n), member))
+/**
+ * list_for_each_entry_safe_reverse
+ * @pos:        the type * to use as a loop cursor.
+ * @n:          another type * to use as temporary storage
+ * @head:       the head for your list.
+ * @member:     the name of the list_struct within the struct.
+ *
+ * Iterate backwards over list of given type, safe against removal
+ * of list entry.
+ */
+#define list_for_each_entry_safe_reverse(pos, n, head, member)          \
+        for (pos = list_entry((head)->prev, typeof(*pos), member),      \
+                n = list_entry(pos->member.prev, typeof(*pos), member); \
+             &pos->member != (head);                                    \
+             pos = n, n = list_entry(n->member.prev, typeof(*n), member))
+struct offset {
+        struct list_head list;
+        unsigned offset;
+};
+struct table {
+        struct list_head offsets;
+        unsigned offset_max;
+        unsigned nentry;
+        unsigned *table;
+        char *gpu_prefix;
+};
+struct offset *offset_new(unsigned o)
+{
+        struct offset *offset;
+        offset = (struct offset *)malloc(sizeof(struct offset));
+        if (offset) {
+                INIT_LIST_HEAD(&offset->list);
+                offset->offset = o;
+        }
+        return offset;
+}
+void table_offset_add(struct table *t, struct offset *offset)
+{
+        list_add_tail(&offset->list, &t->offsets);
+}
+void table_init(struct table *t)
+{
+        INIT_LIST_HEAD(&t->offsets);
+        t->offset_max = 0;
+        t->nentry = 0;
+        t->table = NULL;
+}
+void table_print(struct table *t)
+{
+        unsigned nlloop, i, j, n, c, id;
+        nlloop = (t->nentry + 3) / 4;
+        c = t->nentry;
+        printf("static const unsigned %s_reg_safe_bm[%d] = {\n", t->gpu_prefix,
+               t->nentry);
+        for (i = 0, id = 0; i < nlloop; i++) {
+                n = 4;
+                if (n > c)
+                        n = c;
+                c -= n;
+                for (j = 0; j < n; j++) {
+                        if (j == 0)
+                                printf("\t");
+                        else
+                                printf(" ");
+                        printf("0x%08X,", t->table[id++]);
+                }
+                printf("\n");
+        }
+        printf("};\n");
+}
+int table_build(struct table *t)
+{
+        struct offset *offset;
+        unsigned i, m;
+        t->nentry = ((t->offset_max >> 2) + 31) / 32;
+        t->table = (unsigned *)malloc(sizeof(unsigned) * t->nentry);
+        if (t->table == NULL)
+                return -1;
+        memset(t->table, 0xff, sizeof(unsigned) * t->nentry);
+        list_for_each_entry(offset, &t->offsets, list) {
+                i = (offset->offset >> 2) / 32;
+                m = (offset->offset >> 2) & 31;
+                m = 1 << m;
+                t->table[i] ^= m;
+        }
+        return 0;
+}
+static char gpu_name[10];
+int parser_auth(struct table *t, const char *filename)
+{
+        FILE *file;
+        regex_t mask_rex;
+        regmatch_t match[4];
+        char buf[1024];
+        size_t end;
+        int len;
+        int done = 0;
+        int r;
+        unsigned o;
+        struct offset *offset;
+        char last_reg_s[10];
+        int last_reg;
+        if (regcomp
+            (&mask_rex, "(0x[0-9a-fA-F]*) *([_a-zA-Z0-9]*)", REG_EXTENDED)) {
+                fprintf(stderr, "Failed to compile regular expression\n");
+                return -1;
+        }
+        file = fopen(filename, "r");
+        if (file == NULL) {
+                fprintf(stderr, "Failed to open: %s\n", filename);
+                return -1;
+        }
+        fseek(file, 0, SEEK_END);
+        end = ftell(file);
+        fseek(file, 0, SEEK_SET);
+        /* get header */
+        if (fgets(buf, 1024, file) == NULL)
+                return -1;
+        /* first line will contain the last register
+         * and gpu name */
+        sscanf(buf, "%s %s", gpu_name, last_reg_s);
+        t->gpu_prefix = gpu_name;
+        last_reg = strtol(last_reg_s, NULL, 16);
+        do {
+                if (fgets(buf, 1024, file) == NULL)
+                        return -1;
+                len = strlen(buf);
+                if (ftell(file) == end)
+                        done = 1;
+                if (len) {
+                        r = regexec(&mask_rex, buf, 4, match, 0);
+                        if (r == REG_NOMATCH) {
+                        } else if (r) {
+                                fprintf(stderr,
+                                        "Error matching regular expression %d in %s\n",
+                                        r, filename);
+                                return -1;
+                        } else {
+                                buf[match[0].rm_eo] = 0;
+                                buf[match[1].rm_eo] = 0;
+                                buf[match[2].rm_eo] = 0;
+                                o = strtol(&buf[match[1].rm_so], NULL, 16);
+                                offset = offset_new(o);
+                                table_offset_add(t, offset);
+                                if (o > t->offset_max)
+                                        t->offset_max = o;
+                        }
+                }
+        } while (!done);
+        fclose(file);
+        if (t->offset_max < last_reg)
+                t->offset_max = last_reg;
+        return table_build(t);
+}
+int main(int argc, char *argv[])
+{
+        struct table t;
+        if (argc != 2) {
+                fprintf(stderr, "Usage: %s <authfile>\n", argv[0]);
+                exit(1);
+        }
+        table_init(&t);
+        if (parser_auth(&t, argv[1])) {
+                fprintf(stderr, "Failed to parse file %s\n", argv[1]);
+                return -1;
+        }
+        table_print(&t);
+        return 0;
+}
diff --git a/drivers/gpu/drm/radeon/r100.c b/drivers/gpu/drm/radeon/r100.c
index 68e728e8be4d..be51c5f7d0f6 100644
--- a/drivers/gpu/drm/radeon/r100.c
+++ b/drivers/gpu/drm/radeon/r100.c
@@ -29,15 +29,41 @@
 #include "drmP.h"
 #include "drm.h"
 #include "radeon_drm.h"
-#include "radeon_microcode.h"
 #include "radeon_reg.h"
 #include "radeon.h"
+#include "r100d.h"
+#include <linux/firmware.h>
+#include <linux/platform_device.h>
+#include "r100_reg_safe.h"
+#include "rn50_reg_safe.h"
+/* Firmware Names */
+#define FIRMWARE_R100           "radeon/R100_cp.bin"
+#define FIRMWARE_R200           "radeon/R200_cp.bin"
+#define FIRMWARE_R300           "radeon/R300_cp.bin"
+#define FIRMWARE_R420           "radeon/R420_cp.bin"
+#define FIRMWARE_RS690          "radeon/RS690_cp.bin"
+#define FIRMWARE_RS600          "radeon/RS600_cp.bin"
+#define FIRMWARE_R520           "radeon/R520_cp.bin"
+MODULE_FIRMWARE(FIRMWARE_R100);
+MODULE_FIRMWARE(FIRMWARE_R200);
+MODULE_FIRMWARE(FIRMWARE_R300);
+MODULE_FIRMWARE(FIRMWARE_R420);
+MODULE_FIRMWARE(FIRMWARE_RS690);
+MODULE_FIRMWARE(FIRMWARE_RS600);
+MODULE_FIRMWARE(FIRMWARE_R520);
+#include "r100_track.h"
 /* This files gather functions specifics to:
 * r100,rv100,rs100,rv200,rs200,r200,rv250,rs300,rv280
 *
 * Some of these functions might be used by newer ASICs.
 */
+int r200_init(struct radeon_device *rdev);
 void r100_hdp_reset(struct radeon_device *rdev);
 void r100_gpu_init(struct radeon_device *rdev);
 int r100_gui_wait_for_idle(struct radeon_device *rdev);
@@ -58,23 +84,28 @@ void r100_pci_gart_tlb_flush(struct radeon_device *rdev)
         * could end up in wrong address. */
 }
-int r100_pci_gart_enable(struct radeon_device *rdev)
+int r100_pci_gart_init(struct radeon_device *rdev)
 {
-        uint32_t tmp;
        int r;
+        if (rdev->gart.table.ram.ptr) {
+                WARN(1, "R100 PCI GART already initialized.\n");
+                return 0;
+        }
        /* Initialize common gart structure */
        r = radeon_gart_init(rdev);
-        if (r) {
+        if (r)
                return r;
-        }
+        rdev->gart.table_size = rdev->gart.num_gpu_pages * 4;
-        if (rdev->gart.table.ram.ptr == NULL) {
+        rdev->asic->gart_tlb_flush = &r100_pci_gart_tlb_flush;
-                rdev->gart.table_size = rdev->gart.num_gpu_pages * 4;
+        rdev->asic->gart_set_page = &r100_pci_gart_set_page;
-                r = radeon_gart_table_ram_alloc(rdev);
+        return radeon_gart_table_ram_alloc(rdev);
-                if (r) {
+}
-                        return r;
-                }
+int r100_pci_gart_enable(struct radeon_device *rdev)
-        }
+{
+        uint32_t tmp;
        /* discard memory request outside of configured range */
        tmp = RREG32(RADEON_AIC_CNTL) | RADEON_DIS_OUT_OF_PCI_GART_ACCESS;
        WREG32(RADEON_AIC_CNTL, tmp);
@@ -114,13 +145,11 @@ int r100_pci_gart_set_page(struct radeon_device *rdev, int i, uint64_t addr)
        return 0;
 }
-int r100_gart_enable(struct radeon_device *rdev)
+void r100_pci_gart_fini(struct radeon_device *rdev)
 {
-        if (rdev->flags & RADEON_IS_AGP) {
+        r100_pci_gart_disable(rdev);
-                r100_pci_gart_disable(rdev);
+        radeon_gart_table_ram_free(rdev);
-                return 0;
+        radeon_gart_fini(rdev);
-        }
-        return r100_pci_gart_enable(rdev);
 }
@@ -247,9 +276,6 @@ int r100_mc_init(struct radeon_device *rdev)
 void r100_mc_fini(struct radeon_device *rdev)
 {
-        r100_pci_gart_disable(rdev);
-        radeon_gart_table_ram_free(rdev);
-        radeon_gart_fini(rdev);
 }
@@ -273,6 +299,17 @@ int r100_irq_set(struct radeon_device *rdev)
        return 0;
 }
+void r100_irq_disable(struct radeon_device *rdev)
+{
+        u32 tmp;
+        WREG32(R_000040_GEN_INT_CNTL, 0);
+        /* Wait and acknowledge irq */
+        mdelay(1);
+        tmp = RREG32(R_000044_GEN_INT_STATUS);
+        WREG32(R_000044_GEN_INT_STATUS, tmp);
+}
 static inline uint32_t r100_irq_ack(struct radeon_device *rdev)
 {
        uint32_t irqs = RREG32(RADEON_GEN_INT_STATUS);
@@ -293,6 +330,9 @@ int r100_irq_process(struct radeon_device *rdev)
        if (!status) {
                return IRQ_NONE;
        }
+        if (rdev->shutdown) {
+                return IRQ_NONE;
+        }
        while (status) {
                /* SW interrupt */
                if (status & RADEON_SW_INT_TEST) {
@@ -367,14 +407,21 @@ int r100_wb_init(struct radeon_device *rdev)
                        return r;
                }
        }
-        WREG32(0x774, rdev->wb.gpu_addr);
+        WREG32(R_000774_SCRATCH_ADDR, rdev->wb.gpu_addr);
-        WREG32(0x70C, rdev->wb.gpu_addr + 1024);
+        WREG32(R_00070C_CP_RB_RPTR_ADDR,
-        WREG32(0x770, 0xff);
+                S_00070C_RB_RPTR_ADDR((rdev->wb.gpu_addr + 1024) >> 2));
+        WREG32(R_000770_SCRATCH_UMSK, 0xff);
        return 0;
 }
+void r100_wb_disable(struct radeon_device *rdev)
+{
+        WREG32(R_000770_SCRATCH_UMSK, 0);
+}
 void r100_wb_fini(struct radeon_device *rdev)
 {
+        r100_wb_disable(rdev);
        if (rdev->wb.wb_obj) {
                radeon_object_kunmap(rdev->wb.wb_obj);
                radeon_object_unpin(rdev->wb.wb_obj);
@@ -461,6 +508,21 @@ int r100_copy_blit(struct radeon_device *rdev,
 /*
 * CP
 */
+static int r100_cp_wait_for_idle(struct radeon_device *rdev)
+{
+        unsigned i;
+        u32 tmp;
+        for (i = 0; i < rdev->usec_timeout; i++) {
+                tmp = RREG32(R_000E40_RBBM_STATUS);
+                if (!G_000E40_CP_CMDSTRM_BUSY(tmp)) {
+                        return 0;
+                }
+                udelay(1);
+        }
+        return -1;
+}
 void r100_ring_start(struct radeon_device *rdev)
 {
        int r;
@@ -478,33 +540,33 @@ void r100_ring_start(struct radeon_device *rdev)
        radeon_ring_unlock_commit(rdev);
 }
-static void r100_cp_load_microcode(struct radeon_device *rdev)
+/* Load the microcode for the CP */
+static int r100_cp_init_microcode(struct radeon_device *rdev)
 {
-        int i;
+        struct platform_device *pdev;
+        const char *fw_name = NULL;
+        int err;
-        if (r100_gui_wait_for_idle(rdev)) {
+        DRM_DEBUG("\n");
-                printk(KERN_WARNING "Failed to wait GUI idle while "
-                       "programming pipes. Bad things might happen.\n");
-        }
-        WREG32(RADEON_CP_ME_RAM_ADDR, 0);
+        pdev = platform_device_register_simple("radeon_cp", 0, NULL, 0);
+        err = IS_ERR(pdev);
+        if (err) {
+                printk(KERN_ERR "radeon_cp: Failed to register firmware\n");
+                return -EINVAL;
+        }
        if ((rdev->family == CHIP_R100) || (rdev->family == CHIP_RV100) ||
            (rdev->family == CHIP_RV200) || (rdev->family == CHIP_RS100) ||
            (rdev->family == CHIP_RS200)) {
                DRM_INFO("Loading R100 Microcode\n");
-                for (i = 0; i < 256; i++) {
+                fw_name = FIRMWARE_R100;
-                        WREG32(RADEON_CP_ME_RAM_DATAH, R100_cp_microcode[i][1]);
-                        WREG32(RADEON_CP_ME_RAM_DATAL, R100_cp_microcode[i][0]);
-                }
        } else if ((rdev->family == CHIP_R200) ||
                   (rdev->family == CHIP_RV250) ||
                   (rdev->family == CHIP_RV280) ||
                   (rdev->family == CHIP_RS300)) {
                DRM_INFO("Loading R200 Microcode\n");
-                for (i = 0; i < 256; i++) {
+                fw_name = FIRMWARE_R200;
-                        WREG32(RADEON_CP_ME_RAM_DATAH, R200_cp_microcode[i][1]);
-                        WREG32(RADEON_CP_ME_RAM_DATAL, R200_cp_microcode[i][0]);
-                }
        } else if ((rdev->family == CHIP_R300) ||
                   (rdev->family == CHIP_R350) ||
                   (rdev->family == CHIP_RV350) ||
@@ -512,31 +574,19 @@ static void r100_cp_load_microcode(struct radeon_device *rdev)
                   (rdev->family == CHIP_RS400) ||
                   (rdev->family == CHIP_RS480)) {
                DRM_INFO("Loading R300 Microcode\n");
-                for (i = 0; i < 256; i++) {
+                fw_name = FIRMWARE_R300;
-                        WREG32(RADEON_CP_ME_RAM_DATAH, R300_cp_microcode[i][1]);
-                        WREG32(RADEON_CP_ME_RAM_DATAL, R300_cp_microcode[i][0]);
-                }
        } else if ((rdev->family == CHIP_R420) ||
                   (rdev->family == CHIP_R423) ||
                   (rdev->family == CHIP_RV410)) {
                DRM_INFO("Loading R400 Microcode\n");
-                for (i = 0; i < 256; i++) {
+                fw_name = FIRMWARE_R420;
-                        WREG32(RADEON_CP_ME_RAM_DATAH, R420_cp_microcode[i][1]);
-                        WREG32(RADEON_CP_ME_RAM_DATAL, R420_cp_microcode[i][0]);
-                }
        } else if ((rdev->family == CHIP_RS690) ||
                   (rdev->family == CHIP_RS740)) {
                DRM_INFO("Loading RS690/RS740 Microcode\n");
-                for (i = 0; i < 256; i++) {
+                fw_name = FIRMWARE_RS690;
-                        WREG32(RADEON_CP_ME_RAM_DATAH, RS690_cp_microcode[i][1]);
-                        WREG32(RADEON_CP_ME_RAM_DATAL, RS690_cp_microcode[i][0]);
-                }
        } else if (rdev->family == CHIP_RS600) {
                DRM_INFO("Loading RS600 Microcode\n");
-                for (i = 0; i < 256; i++) {
+                fw_name = FIRMWARE_RS600;
-                        WREG32(RADEON_CP_ME_RAM_DATAH, RS600_cp_microcode[i][1]);
-                        WREG32(RADEON_CP_ME_RAM_DATAL, RS600_cp_microcode[i][0]);
-                }
        } else if ((rdev->family == CHIP_RV515) ||
                   (rdev->family == CHIP_R520) ||
                   (rdev->family == CHIP_RV530) ||
@@ -544,9 +594,43 @@ static void r100_cp_load_microcode(struct radeon_device *rdev)
                   (rdev->family == CHIP_RV560) ||
                   (rdev->family == CHIP_RV570)) {
                DRM_INFO("Loading R500 Microcode\n");
-                for (i = 0; i < 256; i++) {
+                fw_name = FIRMWARE_R520;
-                        WREG32(RADEON_CP_ME_RAM_DATAH, R520_cp_microcode[i][1]);
+        }
-                        WREG32(RADEON_CP_ME_RAM_DATAL, R520_cp_microcode[i][0]);
+        err = request_firmware(&rdev->me_fw, fw_name, &pdev->dev);
+        platform_device_unregister(pdev);
+        if (err) {
+                printk(KERN_ERR "radeon_cp: Failed to load firmware \"%s\"\n",
+                       fw_name);
+        } else if (rdev->me_fw->size % 8) {
+                printk(KERN_ERR
+                       "radeon_cp: Bogus length %zu in firmware \"%s\"\n",
+                       rdev->me_fw->size, fw_name);
+                err = -EINVAL;
+                release_firmware(rdev->me_fw);
+                rdev->me_fw = NULL;
+        }
+        return err;
+}
+static void r100_cp_load_microcode(struct radeon_device *rdev)
+{
+        const __be32 *fw_data;
+        int i, size;
+        if (r100_gui_wait_for_idle(rdev)) {
+                printk(KERN_WARNING "Failed to wait GUI idle while "
+                       "programming pipes. Bad things might happen.\n");
+        }
+        if (rdev->me_fw) {
+                size = rdev->me_fw->size / 4;
+                fw_data = (const __be32 *)&rdev->me_fw->data[0];
+                WREG32(RADEON_CP_ME_RAM_ADDR, 0);
+                for (i = 0; i < size; i += 2) {
+                        WREG32(RADEON_CP_ME_RAM_DATAH,
+                               be32_to_cpup(&fw_data[i]));
+                        WREG32(RADEON_CP_ME_RAM_DATAL,
+                               be32_to_cpup(&fw_data[i + 1]));
                }
        }
 }
@@ -585,6 +669,15 @@ int r100_cp_init(struct radeon_device *rdev, unsigned ring_size)
        } else {
                DRM_INFO("radeon: cp idle (0x%08X)\n", tmp);
        }
+        if (!rdev->me_fw) {
+                r = r100_cp_init_microcode(rdev);
+                if (r) {
+                        DRM_ERROR("Failed to load firmware!\n");
+                        return r;
+                }
+        }
        /* Align ring size */
        rb_bufsz = drm_order(ring_size / 8);
        ring_size = (1 << (rb_bufsz + 1)) * 4;
@@ -658,9 +751,11 @@ int r100_cp_init(struct radeon_device *rdev, unsigned ring_size)
 void r100_cp_fini(struct radeon_device *rdev)
 {
+        if (r100_cp_wait_for_idle(rdev)) {
+                DRM_ERROR("Wait for CP idle timeout, shutting down CP.\n");
+        }
        /* Disable ring */
-        rdev->cp.ready = false;
+        r100_cp_disable(rdev);
-        WREG32(RADEON_CP_CSQ_CNTL, 0);
        radeon_ring_fini(rdev);
        DRM_INFO("radeon: cp finalized\n");
 }
@@ -710,6 +805,12 @@ int r100_cp_reset(struct radeon_device *rdev)
        return -1;
 }
+void r100_cp_commit(struct radeon_device *rdev)
+{
+        WREG32(RADEON_CP_RB_WPTR, rdev->cp.wptr);
+        (void)RREG32(RADEON_CP_RB_WPTR);
+}
 /*
 * CS functions
@@ -968,147 +1069,356 @@ int r100_cs_packet_next_reloc(struct radeon_cs_parser *p,
        return 0;
 }
+static int r100_get_vtx_size(uint32_t vtx_fmt)
+{
+        int vtx_size;
+        vtx_size = 2;
+        /* ordered according to bits in spec */
+        if (vtx_fmt & RADEON_SE_VTX_FMT_W0)
+                vtx_size++;
+        if (vtx_fmt & RADEON_SE_VTX_FMT_FPCOLOR)
+                vtx_size += 3;
+        if (vtx_fmt & RADEON_SE_VTX_FMT_FPALPHA)
+                vtx_size++;
+        if (vtx_fmt & RADEON_SE_VTX_FMT_PKCOLOR)
+                vtx_size++;
+        if (vtx_fmt & RADEON_SE_VTX_FMT_FPSPEC)
+                vtx_size += 3;
+        if (vtx_fmt & RADEON_SE_VTX_FMT_FPFOG)
+                vtx_size++;
+        if (vtx_fmt & RADEON_SE_VTX_FMT_PKSPEC)
+                vtx_size++;
+        if (vtx_fmt & RADEON_SE_VTX_FMT_ST0)
+                vtx_size += 2;
+        if (vtx_fmt & RADEON_SE_VTX_FMT_ST1)
+                vtx_size += 2;
+        if (vtx_fmt & RADEON_SE_VTX_FMT_Q1)
+                vtx_size++;
+        if (vtx_fmt & RADEON_SE_VTX_FMT_ST2)
+                vtx_size += 2;
+        if (vtx_fmt & RADEON_SE_VTX_FMT_Q2)
+                vtx_size++;
+        if (vtx_fmt & RADEON_SE_VTX_FMT_ST3)
+                vtx_size += 2;
+        if (vtx_fmt & RADEON_SE_VTX_FMT_Q3)
+                vtx_size++;
+        if (vtx_fmt & RADEON_SE_VTX_FMT_Q0)
+                vtx_size++;
+        /* blend weight */
+        if (vtx_fmt & (0x7 << 15))
+                vtx_size += (vtx_fmt >> 15) & 0x7;
+        if (vtx_fmt & RADEON_SE_VTX_FMT_N0)
+                vtx_size += 3;
+        if (vtx_fmt & RADEON_SE_VTX_FMT_XY1)
+                vtx_size += 2;
+        if (vtx_fmt & RADEON_SE_VTX_FMT_Z1)
+                vtx_size++;
+        if (vtx_fmt & RADEON_SE_VTX_FMT_W1)
+                vtx_size++;
+        if (vtx_fmt & RADEON_SE_VTX_FMT_N1)
+                vtx_size++;
+        if (vtx_fmt & RADEON_SE_VTX_FMT_Z)
+                vtx_size++;
+        return vtx_size;
+}
 static int r100_packet0_check(struct radeon_cs_parser *p,
-                              struct radeon_cs_packet *pkt)
+                              struct radeon_cs_packet *pkt,
+                              unsigned idx, unsigned reg)
 {
        struct radeon_cs_chunk *ib_chunk;
        struct radeon_cs_reloc *reloc;
+        struct r100_cs_track *track;
        volatile uint32_t *ib;
        uint32_t tmp;
-        unsigned reg;
-        unsigned i;
-        unsigned idx;
-        bool onereg;
        int r;
+        int i, face;
        u32 tile_flags = 0;
        ib = p->ib->ptr;
        ib_chunk = &p->chunks[p->chunk_ib_idx];
-        idx = pkt->idx + 1;
+        track = (struct r100_cs_track *)p->track;
-        reg = pkt->reg;
-        onereg = false;
+        switch (reg) {
-        if (CP_PACKET0_GET_ONE_REG_WR(ib_chunk->kdata[pkt->idx])) {
+        case RADEON_CRTC_GUI_TRIG_VLINE:
-                onereg = true;
+                r = r100_cs_packet_parse_vline(p);
-        }
+                if (r) {
-        for (i = 0; i <= pkt->count; i++, idx++, reg += 4) {
+                        DRM_ERROR("No reloc for ib[%d]=0x%04X\n",
-                switch (reg) {
+                                  idx, reg);
-                case RADEON_CRTC_GUI_TRIG_VLINE:
+                        r100_cs_dump_packet(p, pkt);
-                        r = r100_cs_packet_parse_vline(p);
+                        return r;
-                        if (r) {
+                }
-                                DRM_ERROR("No reloc for ib[%d]=0x%04X\n",
+                break;
-                                                idx, reg);
-                                r100_cs_dump_packet(p, pkt);
-                                return r;
-                        }
-                        break;
                /* FIXME: only allow PACKET3 blit? easier to check for out of
                 * range access */
-                case RADEON_DST_PITCH_OFFSET:
+        case RADEON_DST_PITCH_OFFSET:
-                case RADEON_SRC_PITCH_OFFSET:
+        case RADEON_SRC_PITCH_OFFSET:
-                        r = r100_cs_packet_next_reloc(p, &reloc);
+                r = r100_reloc_pitch_offset(p, pkt, idx, reg);
-                        if (r) {
+                if (r)
-                                DRM_ERROR("No reloc for ib[%d]=0x%04X\n",
+                        return r;
-                                          idx, reg);
+                break;
-                                r100_cs_dump_packet(p, pkt);
+        case RADEON_RB3D_DEPTHOFFSET:
-                                return r;
+                r = r100_cs_packet_next_reloc(p, &reloc);
-                        }
+                if (r) {
-                        tmp = ib_chunk->kdata[idx] & 0x003fffff;
+                        DRM_ERROR("No reloc for ib[%d]=0x%04X\n",
-                        tmp += (((u32)reloc->lobj.gpu_offset) >> 10);
+                                  idx, reg);
+                        r100_cs_dump_packet(p, pkt);
-                        if (reloc->lobj.tiling_flags & RADEON_TILING_MACRO)
+                        return r;
-                                tile_flags |= RADEON_DST_TILE_MACRO;
+                }
-                        if (reloc->lobj.tiling_flags & RADEON_TILING_MICRO) {
+                track->zb.robj = reloc->robj;
-                                if (reg == RADEON_SRC_PITCH_OFFSET) {
+                track->zb.offset = ib_chunk->kdata[idx];
-                                        DRM_ERROR("Cannot src blit from microtiled surface\n");
+                ib[idx] = ib_chunk->kdata[idx] + ((u32)reloc->lobj.gpu_offset);
-                                        r100_cs_dump_packet(p, pkt);
+                break;
-                                        return -EINVAL;
+        case RADEON_RB3D_COLOROFFSET:
-                                }
+                r = r100_cs_packet_next_reloc(p, &reloc);
-                                tile_flags |= RADEON_DST_TILE_MICRO;
+                if (r) {
-                        }
+                        DRM_ERROR("No reloc for ib[%d]=0x%04X\n",
+                                  idx, reg);
+                        r100_cs_dump_packet(p, pkt);
+                        return r;
+                }
+                track->cb[0].robj = reloc->robj;
+                track->cb[0].offset = ib_chunk->kdata[idx];
+                ib[idx] = ib_chunk->kdata[idx] + ((u32)reloc->lobj.gpu_offset);
+                break;
+        case RADEON_PP_TXOFFSET_0:
+        case RADEON_PP_TXOFFSET_1:
+        case RADEON_PP_TXOFFSET_2:
+                i = (reg - RADEON_PP_TXOFFSET_0) / 24;
+                r = r100_cs_packet_next_reloc(p, &reloc);
+                if (r) {
+                        DRM_ERROR("No reloc for ib[%d]=0x%04X\n",
+                                  idx, reg);
+                        r100_cs_dump_packet(p, pkt);
+                        return r;
+                }
+                ib[idx] = ib_chunk->kdata[idx] + ((u32)reloc->lobj.gpu_offset);
+                track->textures[i].robj = reloc->robj;
+                break;
+        case RADEON_PP_CUBIC_OFFSET_T0_0:
+        case RADEON_PP_CUBIC_OFFSET_T0_1:
+        case RADEON_PP_CUBIC_OFFSET_T0_2:
+        case RADEON_PP_CUBIC_OFFSET_T0_3:
+        case RADEON_PP_CUBIC_OFFSET_T0_4:
+                i = (reg - RADEON_PP_CUBIC_OFFSET_T0_0) / 4;
+                r = r100_cs_packet_next_reloc(p, &reloc);
+                if (r) {
+                        DRM_ERROR("No reloc for ib[%d]=0x%04X\n",
+                                  idx, reg);
+                        r100_cs_dump_packet(p, pkt);
+                        return r;
+                }
+                track->textures[0].cube_info[i].offset = ib_chunk->kdata[idx];
+                ib[idx] = ib_chunk->kdata[idx] + ((u32)reloc->lobj.gpu_offset);
+                track->textures[0].cube_info[i].robj = reloc->robj;
+                break;
+        case RADEON_PP_CUBIC_OFFSET_T1_0:
+        case RADEON_PP_CUBIC_OFFSET_T1_1:
+        case RADEON_PP_CUBIC_OFFSET_T1_2:
+        case RADEON_PP_CUBIC_OFFSET_T1_3:
+        case RADEON_PP_CUBIC_OFFSET_T1_4:
+                i = (reg - RADEON_PP_CUBIC_OFFSET_T1_0) / 4;
+                r = r100_cs_packet_next_reloc(p, &reloc);
+                if (r) {
+                        DRM_ERROR("No reloc for ib[%d]=0x%04X\n",
+                                  idx, reg);
+                        r100_cs_dump_packet(p, pkt);
+                        return r;
+                }
+                track->textures[1].cube_info[i].offset = ib_chunk->kdata[idx];
+                ib[idx] = ib_chunk->kdata[idx] + ((u32)reloc->lobj.gpu_offset);
+                track->textures[1].cube_info[i].robj = reloc->robj;
+                break;
+        case RADEON_PP_CUBIC_OFFSET_T2_0:
+        case RADEON_PP_CUBIC_OFFSET_T2_1:
+        case RADEON_PP_CUBIC_OFFSET_T2_2:
+        case RADEON_PP_CUBIC_OFFSET_T2_3:
+        case RADEON_PP_CUBIC_OFFSET_T2_4:
+                i = (reg - RADEON_PP_CUBIC_OFFSET_T2_0) / 4;
+                r = r100_cs_packet_next_reloc(p, &reloc);
+                if (r) {
+                        DRM_ERROR("No reloc for ib[%d]=0x%04X\n",
+                                  idx, reg);
+                        r100_cs_dump_packet(p, pkt);
+                        return r;
+                }
+                track->textures[2].cube_info[i].offset = ib_chunk->kdata[idx];
+                ib[idx] = ib_chunk->kdata[idx] + ((u32)reloc->lobj.gpu_offset);
+                track->textures[2].cube_info[i].robj = reloc->robj;
+                break;
+        case RADEON_RE_WIDTH_HEIGHT:
+                track->maxy = ((ib_chunk->kdata[idx] >> 16) & 0x7FF);
+                break;
+        case RADEON_RB3D_COLORPITCH:
+                r = r100_cs_packet_next_reloc(p, &reloc);
+                if (r) {
+                        DRM_ERROR("No reloc for ib[%d]=0x%04X\n",
+                                  idx, reg);
+                        r100_cs_dump_packet(p, pkt);
+                        return r;
+                }
-                        tmp |= tile_flags;
+                if (reloc->lobj.tiling_flags & RADEON_TILING_MACRO)
-                        ib[idx] = (ib_chunk->kdata[idx] & 0x3fc00000) | tmp;
+                        tile_flags |= RADEON_COLOR_TILE_ENABLE;
-                        break;
+                if (reloc->lobj.tiling_flags & RADEON_TILING_MICRO)
-                case RADEON_RB3D_DEPTHOFFSET:
+                        tile_flags |= RADEON_COLOR_MICROTILE_ENABLE;
-                case RADEON_RB3D_COLOROFFSET:
-                case R300_RB3D_COLOROFFSET0:
-                case R300_ZB_DEPTHOFFSET:
-                case R200_PP_TXOFFSET_0:
-                case R200_PP_TXOFFSET_1:
-                case R200_PP_TXOFFSET_2:
-                case R200_PP_TXOFFSET_3:
-                case R200_PP_TXOFFSET_4:
-                case R200_PP_TXOFFSET_5:
-                case RADEON_PP_TXOFFSET_0:
-                case RADEON_PP_TXOFFSET_1:
-                case RADEON_PP_TXOFFSET_2:
-                case R300_TX_OFFSET_0:
-                case R300_TX_OFFSET_0+4:
-                case R300_TX_OFFSET_0+8:
-                case R300_TX_OFFSET_0+12:
-                case R300_TX_OFFSET_0+16:
-                case R300_TX_OFFSET_0+20:
-                case R300_TX_OFFSET_0+24:
-                case R300_TX_OFFSET_0+28:
-                case R300_TX_OFFSET_0+32:
-                case R300_TX_OFFSET_0+36:
-                case R300_TX_OFFSET_0+40:
-                case R300_TX_OFFSET_0+44:
-                case R300_TX_OFFSET_0+48:
-                case R300_TX_OFFSET_0+52:
-                case R300_TX_OFFSET_0+56:
-                case R300_TX_OFFSET_0+60:
-                        /* rn50 has no 3D engine so fail on any 3d setup */
-                        if (ASIC_IS_RN50(p->rdev)) {
-                                DRM_ERROR("attempt to use RN50 3D engine failed\n");
-                                return -EINVAL;
-                        }
-                        r = r100_cs_packet_next_reloc(p, &reloc);
-                        if (r) {
-                                DRM_ERROR("No reloc for ib[%d]=0x%04X\n",
-                                          idx, reg);
-                                r100_cs_dump_packet(p, pkt);
-                                return r;
-                        }
-                        ib[idx] = ib_chunk->kdata[idx] + ((u32)reloc->lobj.gpu_offset);
-                        break;
-                case R300_RB3D_COLORPITCH0:
-                case RADEON_RB3D_COLORPITCH:
-                        r = r100_cs_packet_next_reloc(p, &reloc);
-                        if (r) {
-                                DRM_ERROR("No reloc for ib[%d]=0x%04X\n",
-                                          idx, reg);
-                                r100_cs_dump_packet(p, pkt);
-                                return r;
-                        }
-                        if (reloc->lobj.tiling_flags & RADEON_TILING_MACRO)
+                tmp = ib_chunk->kdata[idx] & ~(0x7 << 16);
-                                tile_flags |= RADEON_COLOR_TILE_ENABLE;
+                tmp |= tile_flags;
-                        if (reloc->lobj.tiling_flags & RADEON_TILING_MICRO)
+                ib[idx] = tmp;
-                                tile_flags |= RADEON_COLOR_MICROTILE_ENABLE;
-                        tmp = ib_chunk->kdata[idx] & ~(0x7 << 16);
+                track->cb[0].pitch = ib_chunk->kdata[idx] & RADEON_COLORPITCH_MASK;
-                        tmp |= tile_flags;
+                break;
-                        ib[idx] = tmp;
+        case RADEON_RB3D_DEPTHPITCH:
+                track->zb.pitch = ib_chunk->kdata[idx] & RADEON_DEPTHPITCH_MASK;
+                break;
+        case RADEON_RB3D_CNTL:
+                switch ((ib_chunk->kdata[idx] >> RADEON_RB3D_COLOR_FORMAT_SHIFT) & 0x1f) {
+                case 7:
+                case 8:
+                case 9:
+                case 11:
+                case 12:
+                        track->cb[0].cpp = 1;
                        break;
-                case RADEON_RB3D_ZPASS_ADDR:
+                case 3:
-                        r = r100_cs_packet_next_reloc(p, &reloc);
+                case 4:
-                        if (r) {
+                case 15:
-                                DRM_ERROR("No reloc for ib[%d]=0x%04X\n",
+                        track->cb[0].cpp = 2;
-                                          idx, reg);
+                        break;
-                                r100_cs_dump_packet(p, pkt);
+                case 6:
-                                return r;
+                        track->cb[0].cpp = 4;
-                        }
-                        ib[idx] = ib_chunk->kdata[idx] + ((u32)reloc->lobj.gpu_offset);
                        break;
                default:
-                        /* FIXME: we don't want to allow anyothers packet */
+                        DRM_ERROR("Invalid color buffer format (%d) !\n",
+                                  ((ib_chunk->kdata[idx] >> RADEON_RB3D_COLOR_FORMAT_SHIFT) & 0x1f));
+                        return -EINVAL;
+                }
+                track->z_enabled = !!(ib_chunk->kdata[idx] & RADEON_Z_ENABLE);
+                break;
+        case RADEON_RB3D_ZSTENCILCNTL:
+                switch (ib_chunk->kdata[idx] & 0xf) {
+                case 0:
+                        track->zb.cpp = 2;
+                        break;
+                case 2:
+                case 3:
+                case 4:
+                case 5:
+                case 9:
+                case 11:
+                        track->zb.cpp = 4;
                        break;
+                default:
+                        break;
+                }
+                break;
+        case RADEON_RB3D_ZPASS_ADDR:
+                r = r100_cs_packet_next_reloc(p, &reloc);
+                if (r) {
+                        DRM_ERROR("No reloc for ib[%d]=0x%04X\n",
+                                  idx, reg);
+                        r100_cs_dump_packet(p, pkt);
+                        return r;
+                }
+                ib[idx] = ib_chunk->kdata[idx] + ((u32)reloc->lobj.gpu_offset);
+                break;
+        case RADEON_PP_CNTL:
+                {
+                        uint32_t temp = ib_chunk->kdata[idx] >> 4;
+                        for (i = 0; i < track->num_texture; i++)
+                                track->textures[i].enabled = !!(temp & (1 << i));
                }
-                if (onereg) {
+                break;
-                        /* FIXME: forbid onereg write to register on relocate */
+        case RADEON_SE_VF_CNTL:
+                track->vap_vf_cntl = ib_chunk->kdata[idx];
+                break;
+        case RADEON_SE_VTX_FMT:
+                track->vtx_size = r100_get_vtx_size(ib_chunk->kdata[idx]);
+                break;
+        case RADEON_PP_TEX_SIZE_0:
+        case RADEON_PP_TEX_SIZE_1:
+        case RADEON_PP_TEX_SIZE_2:
+                i = (reg - RADEON_PP_TEX_SIZE_0) / 8;
+                track->textures[i].width = (ib_chunk->kdata[idx] & RADEON_TEX_USIZE_MASK) + 1;
+                track->textures[i].height = ((ib_chunk->kdata[idx] & RADEON_TEX_VSIZE_MASK) >> RADEON_TEX_VSIZE_SHIFT) + 1;
+                break;
+        case RADEON_PP_TEX_PITCH_0:
+        case RADEON_PP_TEX_PITCH_1:
+        case RADEON_PP_TEX_PITCH_2:
+                i = (reg - RADEON_PP_TEX_PITCH_0) / 8;
+                track->textures[i].pitch = ib_chunk->kdata[idx] + 32;
+                break;
+        case RADEON_PP_TXFILTER_0:
+        case RADEON_PP_TXFILTER_1:
+        case RADEON_PP_TXFILTER_2:
+                i = (reg - RADEON_PP_TXFILTER_0) / 24;
+                track->textures[i].num_levels = ((ib_chunk->kdata[idx] & RADEON_MAX_MIP_LEVEL_MASK)
+                                                 >> RADEON_MAX_MIP_LEVEL_SHIFT);
+                tmp = (ib_chunk->kdata[idx] >> 23) & 0x7;
+                if (tmp == 2 || tmp == 6)
+                        track->textures[i].roundup_w = false;
+                tmp = (ib_chunk->kdata[idx] >> 27) & 0x7;
+                if (tmp == 2 || tmp == 6)
+                        track->textures[i].roundup_h = false;
+                break;
+        case RADEON_PP_TXFORMAT_0:
+        case RADEON_PP_TXFORMAT_1:
+        case RADEON_PP_TXFORMAT_2:
+                i = (reg - RADEON_PP_TXFORMAT_0) / 24;
+                if (ib_chunk->kdata[idx] & RADEON_TXFORMAT_NON_POWER2) {
+                        track->textures[i].use_pitch = 1;
+                } else {
+                        track->textures[i].use_pitch = 0;
+                        track->textures[i].width = 1 << ((ib_chunk->kdata[idx] >> RADEON_TXFORMAT_WIDTH_SHIFT) & RADEON_TXFORMAT_WIDTH_MASK);
+                        track->textures[i].height = 1 << ((ib_chunk->kdata[idx] >> RADEON_TXFORMAT_HEIGHT_SHIFT) & RADEON_TXFORMAT_HEIGHT_MASK);
+                }
+                if (ib_chunk->kdata[idx] & RADEON_TXFORMAT_CUBIC_MAP_ENABLE)
+                        track->textures[i].tex_coord_type = 2;
+                switch ((ib_chunk->kdata[idx] & RADEON_TXFORMAT_FORMAT_MASK)) {
+                case RADEON_TXFORMAT_I8:
+                case RADEON_TXFORMAT_RGB332:
+                case RADEON_TXFORMAT_Y8:
+                        track->textures[i].cpp = 1;
                        break;
+                case RADEON_TXFORMAT_AI88:
+                case RADEON_TXFORMAT_ARGB1555:
+                case RADEON_TXFORMAT_RGB565:
+                case RADEON_TXFORMAT_ARGB4444:
+                case RADEON_TXFORMAT_VYUY422:
+                case RADEON_TXFORMAT_YVYU422:
+                case RADEON_TXFORMAT_DXT1:
+                case RADEON_TXFORMAT_SHADOW16:
+                case RADEON_TXFORMAT_LDUDV655:
+                case RADEON_TXFORMAT_DUDV88:
+                        track->textures[i].cpp = 2;
+                        break;
+                case RADEON_TXFORMAT_ARGB8888:
+                case RADEON_TXFORMAT_RGBA8888:
+                case RADEON_TXFORMAT_DXT23:
+                case RADEON_TXFORMAT_DXT45:
+                case RADEON_TXFORMAT_SHADOW32:
+                case RADEON_TXFORMAT_LDUDUV8888:
+                        track->textures[i].cpp = 4;
+                        break;
+                }
+                track->textures[i].cube_info[4].width = 1 << ((ib_chunk->kdata[idx] >> 16) & 0xf);
+                track->textures[i].cube_info[4].height = 1 << ((ib_chunk->kdata[idx] >> 20) & 0xf);
+                break;
+        case RADEON_PP_CUBIC_FACES_0:
+        case RADEON_PP_CUBIC_FACES_1:
+        case RADEON_PP_CUBIC_FACES_2:
+                tmp = ib_chunk->kdata[idx];
+                i = (reg - RADEON_PP_CUBIC_FACES_0) / 4;
+                for (face = 0; face < 4; face++) {
+                        track->textures[i].cube_info[face].width = 1 << ((tmp >> (face * 8)) & 0xf);
+                        track->textures[i].cube_info[face].height = 1 << ((tmp >> ((face * 8) + 4)) & 0xf);
                }
+                break;
+        default:
+                printk(KERN_ERR "Forbidden register 0x%04X in cs at %d\n",
+                       reg, idx);
+                return -EINVAL;
        }
        return 0;
 }
@@ -1137,6 +1447,7 @@ static int r100_packet3_check(struct radeon_cs_parser *p,
 {
        struct radeon_cs_chunk *ib_chunk;
        struct radeon_cs_reloc *reloc;
+        struct r100_cs_track *track;
        unsigned idx;
        unsigned i, c;
        volatile uint32_t *ib;
@@ -1145,9 +1456,11 @@ static int r100_packet3_check(struct radeon_cs_parser *p,
        ib = p->ib->ptr;
        ib_chunk = &p->chunks[p->chunk_ib_idx];
        idx = pkt->idx + 1;
+        track = (struct r100_cs_track *)p->track;
        switch (pkt->opcode) {
        case PACKET3_3D_LOAD_VBPNTR:
                c = ib_chunk->kdata[idx++];
+                track->num_arrays = c;
                for (i = 0; i < (c - 1); i += 2, idx += 3) {
                        r = r100_cs_packet_next_reloc(p, &reloc);
                        if (r) {
@@ -1157,6 +1470,9 @@ static int r100_packet3_check(struct radeon_cs_parser *p,
                                return r;
                        }
                        ib[idx+1] = ib_chunk->kdata[idx+1] + ((u32)reloc->lobj.gpu_offset);
+                        track->arrays[i + 0].robj = reloc->robj;
+                        track->arrays[i + 0].esize = ib_chunk->kdata[idx] >> 8;
+                        track->arrays[i + 0].esize &= 0x7F;
                        r = r100_cs_packet_next_reloc(p, &reloc);
                        if (r) {
                                DRM_ERROR("No reloc for packet3 %d\n",
@@ -1165,6 +1481,9 @@ static int r100_packet3_check(struct radeon_cs_parser *p,
                                return r;
                        }
                        ib[idx+2] = ib_chunk->kdata[idx+2] + ((u32)reloc->lobj.gpu_offset);
+                        track->arrays[i + 1].robj = reloc->robj;
+                        track->arrays[i + 1].esize = ib_chunk->kdata[idx] >> 24;
+                        track->arrays[i + 1].esize &= 0x7F;
                }
                if (c & 1) {
                        r = r100_cs_packet_next_reloc(p, &reloc);
@@ -1175,6 +1494,9 @@ static int r100_packet3_check(struct radeon_cs_parser *p,
                                return r;
                        }
                        ib[idx+1] = ib_chunk->kdata[idx+1] + ((u32)reloc->lobj.gpu_offset);
+                        track->arrays[i + 0].robj = reloc->robj;
+                        track->arrays[i + 0].esize = ib_chunk->kdata[idx] >> 8;
+                        track->arrays[i + 0].esize &= 0x7F;
                }
                break;
        case PACKET3_INDX_BUFFER:
@@ -1191,7 +1513,6 @@ static int r100_packet3_check(struct radeon_cs_parser *p,
                }
                break;
        case 0x23:
-                /* FIXME: cleanup */
                /* 3D_RNDR_GEN_INDX_PRIM on r100/r200 */
                r = r100_cs_packet_next_reloc(p, &reloc);
                if (r) {
@@ -1200,18 +1521,71 @@ static int r100_packet3_check(struct radeon_cs_parser *p,
                        return r;
                }
                ib[idx] = ib_chunk->kdata[idx] + ((u32)reloc->lobj.gpu_offset);
+                track->num_arrays = 1;
+                track->vtx_size = r100_get_vtx_size(ib_chunk->kdata[idx+2]);
+                track->arrays[0].robj = reloc->robj;
+                track->arrays[0].esize = track->vtx_size;
+                track->max_indx = ib_chunk->kdata[idx+1];
+                track->vap_vf_cntl = ib_chunk->kdata[idx+3];
+                track->immd_dwords = pkt->count - 1;
+                r = r100_cs_track_check(p->rdev, track);
+                if (r)
+                        return r;
                break;
        case PACKET3_3D_DRAW_IMMD:
+                if (((ib_chunk->kdata[idx+1] >> 4) & 0x3) != 3) {
+                        DRM_ERROR("PRIM_WALK must be 3 for IMMD draw\n");
+                        return -EINVAL;
+                }
+                track->vap_vf_cntl = ib_chunk->kdata[idx+1];
+                track->immd_dwords = pkt->count - 1;
+                r = r100_cs_track_check(p->rdev, track);
+                if (r)
+                        return r;
+                break;
                /* triggers drawing using in-packet vertex data */
        case PACKET3_3D_DRAW_IMMD_2:
+                if (((ib_chunk->kdata[idx] >> 4) & 0x3) != 3) {
+                        DRM_ERROR("PRIM_WALK must be 3 for IMMD draw\n");
+                        return -EINVAL;
+                }
+                track->vap_vf_cntl = ib_chunk->kdata[idx];
+                track->immd_dwords = pkt->count;
+                r = r100_cs_track_check(p->rdev, track);
+                if (r)
+                        return r;
+                break;
                /* triggers drawing using in-packet vertex data */
        case PACKET3_3D_DRAW_VBUF_2:
+                track->vap_vf_cntl = ib_chunk->kdata[idx];
+                r = r100_cs_track_check(p->rdev, track);
+                if (r)
+                        return r;
+                break;
                /* triggers drawing of vertex buffers setup elsewhere */
        case PACKET3_3D_DRAW_INDX_2:
+                track->vap_vf_cntl = ib_chunk->kdata[idx];
+                r = r100_cs_track_check(p->rdev, track);
+                if (r)
+                        return r;
+                break;
                /* triggers drawing using indices to vertex buffer */
        case PACKET3_3D_DRAW_VBUF:
+                track->vap_vf_cntl = ib_chunk->kdata[idx + 1];
+                r = r100_cs_track_check(p->rdev, track);
+                if (r)
+                        return r;
+                break;
                /* triggers drawing of vertex buffers setup elsewhere */
        case PACKET3_3D_DRAW_INDX:
+                track->vap_vf_cntl = ib_chunk->kdata[idx + 1];
+                r = r100_cs_track_check(p->rdev, track);
+                if (r)
+                        return r;
+                break;
                /* triggers drawing using indices to vertex buffer */
        case PACKET3_NOP:
                break;
@@ -1225,8 +1599,12 @@ static int r100_packet3_check(struct radeon_cs_parser *p,
 int r100_cs_parse(struct radeon_cs_parser *p)
 {
        struct radeon_cs_packet pkt;
+        struct r100_cs_track *track;
        int r;
+        track = kzalloc(sizeof(*track), GFP_KERNEL);
+        r100_cs_track_clear(p->rdev, track);
+        p->track = track;
        do {
                r = r100_cs_packet_parse(p, &pkt, p->idx);
                if (r) {
@@ -1235,7 +1613,16 @@ int r100_cs_parse(struct radeon_cs_parser *p)
                p->idx += pkt.count + 2;
                switch (pkt.type) {
                        case PACKET_TYPE0:
-                                r = r100_packet0_check(p, &pkt);
+                                if (p->rdev->family >= CHIP_R200)
+                                        r = r100_cs_parse_packet0(p, &pkt,
+                                                                  p->rdev->config.r100.reg_safe_bm,
+                                                                  p->rdev->config.r100.reg_safe_bm_size,
+                                                                  &r200_packet0_check);
+                                else
+                                        r = r100_cs_parse_packet0(p, &pkt,
+                                                                  p->rdev->config.r100.reg_safe_bm,
+                                                                  p->rdev->config.r100.reg_safe_bm_size,
+                                                                  &r100_packet0_check);
                                break;
                        case PACKET_TYPE2:
                                break;
@@ -1568,6 +1955,20 @@ void r100_vram_init_sizes(struct radeon_device *rdev)
                rdev->mc.real_vram_size = rdev->mc.aper_size;
 }
+void r100_vga_set_state(struct radeon_device *rdev, bool state)
+{
+        uint32_t temp;
+        temp = RREG32(RADEON_CONFIG_CNTL);
+        if (state == false) {
+                temp &= ~(1<<8);
+                temp |= (1<<9);
+        } else {
+                temp &= ~(1<<9);
+        }
+        WREG32(RADEON_CONFIG_CNTL, temp);
+}
 void r100_vram_info(struct radeon_device *rdev)
 {
        r100_vram_get_type(rdev);
@@ -1634,6 +2035,15 @@ void r100_pll_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v)
 int r100_init(struct radeon_device *rdev)
 {
+        if (ASIC_IS_RN50(rdev)) {
+                rdev->config.r100.reg_safe_bm = rn50_reg_safe_bm;
+                rdev->config.r100.reg_safe_bm_size = ARRAY_SIZE(rn50_reg_safe_bm);
+        } else if (rdev->family < CHIP_R200) {
+                rdev->config.r100.reg_safe_bm = r100_reg_safe_bm;
+                rdev->config.r100.reg_safe_bm_size = ARRAY_SIZE(r100_reg_safe_bm);
+        } else {
+                return r200_init(rdev);
+        }
        return 0;
 }
@@ -1839,6 +2249,11 @@ int r100_set_surface_reg(struct radeon_device *rdev, int reg,
                        flags |= R300_SURF_TILE_MICRO;
        }
+        if (tiling_flags & RADEON_TILING_SWAP_16BIT)
+                flags |= RADEON_SURF_AP0_SWP_16BPP | RADEON_SURF_AP1_SWP_16BPP;
+        if (tiling_flags & RADEON_TILING_SWAP_32BIT)
+                flags |= RADEON_SURF_AP0_SWP_32BPP | RADEON_SURF_AP1_SWP_32BPP;
        DRM_DEBUG("writing surface %d %d %x %x\n", reg, flags, offset, offset+obj_size-1);
        WREG32(RADEON_SURFACE0_INFO + surf_index, flags);
        WREG32(RADEON_SURFACE0_LOWER_BOUND + surf_index, offset);
@@ -2334,3 +2749,460 @@ void r100_bandwidth_update(struct radeon_device *rdev)
                          (unsigned int)RREG32(RADEON_GRPH2_BUFFER_CNTL));
        }
 }
+static inline void r100_cs_track_texture_print(struct r100_cs_track_texture *t)
+{
+        DRM_ERROR("pitch                      %d\n", t->pitch);
+        DRM_ERROR("width                      %d\n", t->width);
+        DRM_ERROR("height                     %d\n", t->height);
+        DRM_ERROR("num levels                 %d\n", t->num_levels);
+        DRM_ERROR("depth                      %d\n", t->txdepth);
+        DRM_ERROR("bpp                        %d\n", t->cpp);
+        DRM_ERROR("coordinate type            %d\n", t->tex_coord_type);
+        DRM_ERROR("width round to power of 2  %d\n", t->roundup_w);
+        DRM_ERROR("height round to power of 2 %d\n", t->roundup_h);
+}
+static int r100_cs_track_cube(struct radeon_device *rdev,
+                              struct r100_cs_track *track, unsigned idx)
+{
+        unsigned face, w, h;
+        struct radeon_object *cube_robj;
+        unsigned long size;
+        for (face = 0; face < 5; face++) {
+                cube_robj = track->textures[idx].cube_info[face].robj;
+                w = track->textures[idx].cube_info[face].width;
+                h = track->textures[idx].cube_info[face].height;
+                size = w * h;
+                size *= track->textures[idx].cpp;
+                size += track->textures[idx].cube_info[face].offset;
+                if (size > radeon_object_size(cube_robj)) {
+                        DRM_ERROR("Cube texture offset greater than object size %lu %lu\n",
+                                  size, radeon_object_size(cube_robj));
+                        r100_cs_track_texture_print(&track->textures[idx]);
+                        return -1;
+                }
+        }
+        return 0;
+}
+static int r100_cs_track_texture_check(struct radeon_device *rdev,
+                                       struct r100_cs_track *track)
+{
+        struct radeon_object *robj;
+        unsigned long size;
+        unsigned u, i, w, h;
+        int ret;
+        for (u = 0; u < track->num_texture; u++) {
+                if (!track->textures[u].enabled)
+                        continue;
+                robj = track->textures[u].robj;
+                if (robj == NULL) {
+                        DRM_ERROR("No texture bound to unit %u\n", u);
+                        return -EINVAL;
+                }
+                size = 0;
+                for (i = 0; i <= track->textures[u].num_levels; i++) {
+                        if (track->textures[u].use_pitch) {
+                                if (rdev->family < CHIP_R300)
+                                        w = (track->textures[u].pitch / track->textures[u].cpp) / (1 << i);
+                                else
+                                        w = track->textures[u].pitch / (1 << i);
+                        } else {
+                                w = track->textures[u].width / (1 << i);
+                                if (rdev->family >= CHIP_RV515)
+                                        w |= track->textures[u].width_11;
+                                if (track->textures[u].roundup_w)
+                                        w = roundup_pow_of_two(w);
+                        }
+                        h = track->textures[u].height / (1 << i);
+                        if (rdev->family >= CHIP_RV515)
+                                h |= track->textures[u].height_11;
+                        if (track->textures[u].roundup_h)
+                                h = roundup_pow_of_two(h);
+                        size += w * h;
+                }
+                size *= track->textures[u].cpp;
+                switch (track->textures[u].tex_coord_type) {
+                case 0:
+                        break;
+                case 1:
+                        size *= (1 << track->textures[u].txdepth);
+                        break;
+                case 2:
+                        if (track->separate_cube) {
+                                ret = r100_cs_track_cube(rdev, track, u);
+                                if (ret)
+                                        return ret;
+                        } else
+                                size *= 6;
+                        break;
+                default:
+                        DRM_ERROR("Invalid texture coordinate type %u for unit "
+                                  "%u\n", track->textures[u].tex_coord_type, u);
+                        return -EINVAL;
+                }
+                if (size > radeon_object_size(robj)) {
+                        DRM_ERROR("Texture of unit %u needs %lu bytes but is "
+                                  "%lu\n", u, size, radeon_object_size(robj));
+                        r100_cs_track_texture_print(&track->textures[u]);
+                        return -EINVAL;
+                }
+        }
+        return 0;
+}
+int r100_cs_track_check(struct radeon_device *rdev, struct r100_cs_track *track)
+{
+        unsigned i;
+        unsigned long size;
+        unsigned prim_walk;
+        unsigned nverts;
+        for (i = 0; i < track->num_cb; i++) {
+                if (track->cb[i].robj == NULL) {
+                        DRM_ERROR("[drm] No buffer for color buffer %d !\n", i);
+                        return -EINVAL;
+                }
+                size = track->cb[i].pitch * track->cb[i].cpp * track->maxy;
+                size += track->cb[i].offset;
+                if (size > radeon_object_size(track->cb[i].robj)) {
+                        DRM_ERROR("[drm] Buffer too small for color buffer %d "
+                                  "(need %lu have %lu) !\n", i, size,
+                                  radeon_object_size(track->cb[i].robj));
+                        DRM_ERROR("[drm] color buffer %d (%u %u %u %u)\n",
+                                  i, track->cb[i].pitch, track->cb[i].cpp,
+                                  track->cb[i].offset, track->maxy);
+                        return -EINVAL;
+                }
+        }
+        if (track->z_enabled) {
+                if (track->zb.robj == NULL) {
+                        DRM_ERROR("[drm] No buffer for z buffer !\n");
+                        return -EINVAL;
+                }
+                size = track->zb.pitch * track->zb.cpp * track->maxy;
+                size += track->zb.offset;
+                if (size > radeon_object_size(track->zb.robj)) {
+                        DRM_ERROR("[drm] Buffer too small for z buffer "
+                                  "(need %lu have %lu) !\n", size,
+                                  radeon_object_size(track->zb.robj));
+                        DRM_ERROR("[drm] zbuffer (%u %u %u %u)\n",
+                                  track->zb.pitch, track->zb.cpp,
+                                  track->zb.offset, track->maxy);
+                        return -EINVAL;
+                }
+        }
+        prim_walk = (track->vap_vf_cntl >> 4) & 0x3;
+        nverts = (track->vap_vf_cntl >> 16) & 0xFFFF;
+        switch (prim_walk) {
+        case 1:
+                for (i = 0; i < track->num_arrays; i++) {
+                        size = track->arrays[i].esize * track->max_indx * 4;
+                        if (track->arrays[i].robj == NULL) {
+                                DRM_ERROR("(PW %u) Vertex array %u no buffer "
+                                          "bound\n", prim_walk, i);
+                                return -EINVAL;
+                        }
+                        if (size > radeon_object_size(track->arrays[i].robj)) {
+                                DRM_ERROR("(PW %u) Vertex array %u need %lu dwords "
+                                           "have %lu dwords\n", prim_walk, i,
+                                           size >> 2,
+                                           radeon_object_size(track->arrays[i].robj) >> 2);
+                                DRM_ERROR("Max indices %u\n", track->max_indx);
+                                return -EINVAL;
+                        }
+                }
+                break;
+        case 2:
+                for (i = 0; i < track->num_arrays; i++) {
+                        size = track->arrays[i].esize * (nverts - 1) * 4;
+                        if (track->arrays[i].robj == NULL) {
+                                DRM_ERROR("(PW %u) Vertex array %u no buffer "
+                                          "bound\n", prim_walk, i);
+                                return -EINVAL;
+                        }
+                        if (size > radeon_object_size(track->arrays[i].robj)) {
+                                DRM_ERROR("(PW %u) Vertex array %u need %lu dwords "
+                                           "have %lu dwords\n", prim_walk, i, size >> 2,
+                                           radeon_object_size(track->arrays[i].robj) >> 2);
+                                return -EINVAL;
+                        }
+                }
+                break;
+        case 3:
+                size = track->vtx_size * nverts;
+                if (size != track->immd_dwords) {
+                        DRM_ERROR("IMMD draw %u dwors but needs %lu dwords\n",
+                                  track->immd_dwords, size);
+                        DRM_ERROR("VAP_VF_CNTL.NUM_VERTICES %u, VTX_SIZE %u\n",
+                                  nverts, track->vtx_size);
+                        return -EINVAL;
+                }
+                break;
+        default:
+                DRM_ERROR("[drm] Invalid primitive walk %d for VAP_VF_CNTL\n",
+                          prim_walk);
+                return -EINVAL;
+        }
+        return r100_cs_track_texture_check(rdev, track);
+}
+void r100_cs_track_clear(struct radeon_device *rdev, struct r100_cs_track *track)
+{
+        unsigned i, face;
+        if (rdev->family < CHIP_R300) {
+                track->num_cb = 1;
+                if (rdev->family <= CHIP_RS200)
+                        track->num_texture = 3;
+                else
+                        track->num_texture = 6;
+                track->maxy = 2048;
+                track->separate_cube = 1;
+        } else {
+                track->num_cb = 4;
+                track->num_texture = 16;
+                track->maxy = 4096;
+                track->separate_cube = 0;
+        }
+        for (i = 0; i < track->num_cb; i++) {
+                track->cb[i].robj = NULL;
+                track->cb[i].pitch = 8192;
+                track->cb[i].cpp = 16;
+                track->cb[i].offset = 0;
+        }
+        track->z_enabled = true;
+        track->zb.robj = NULL;
+        track->zb.pitch = 8192;
+        track->zb.cpp = 4;
+        track->zb.offset = 0;
+        track->vtx_size = 0x7F;
+        track->immd_dwords = 0xFFFFFFFFUL;
+        track->num_arrays = 11;
+        track->max_indx = 0x00FFFFFFUL;
+        for (i = 0; i < track->num_arrays; i++) {
+                track->arrays[i].robj = NULL;
+                track->arrays[i].esize = 0x7F;
+        }
+        for (i = 0; i < track->num_texture; i++) {
+                track->textures[i].pitch = 16536;
+                track->textures[i].width = 16536;
+                track->textures[i].height = 16536;
+                track->textures[i].width_11 = 1 << 11;
+                track->textures[i].height_11 = 1 << 11;
+                track->textures[i].num_levels = 12;
+                if (rdev->family <= CHIP_RS200) {
+                        track->textures[i].tex_coord_type = 0;
+                        track->textures[i].txdepth = 0;
+                } else {
+                        track->textures[i].txdepth = 16;
+                        track->textures[i].tex_coord_type = 1;
+                }
+                track->textures[i].cpp = 64;
+                track->textures[i].robj = NULL;
+                /* CS IB emission code makes sure texture unit are disabled */
+                track->textures[i].enabled = false;
+                track->textures[i].roundup_w = true;
+                track->textures[i].roundup_h = true;
+                if (track->separate_cube)
+                        for (face = 0; face < 5; face++) {
+                                track->textures[i].cube_info[face].robj = NULL;
+                                track->textures[i].cube_info[face].width = 16536;
+                                track->textures[i].cube_info[face].height = 16536;
+                                track->textures[i].cube_info[face].offset = 0;
+                        }
+        }
+}
+int r100_ring_test(struct radeon_device *rdev)
+{
+        uint32_t scratch;
+        uint32_t tmp = 0;
+        unsigned i;
+        int r;
+        r = radeon_scratch_get(rdev, &scratch);
+        if (r) {
+                DRM_ERROR("radeon: cp failed to get scratch reg (%d).\n", r);
+                return r;
+        }
+        WREG32(scratch, 0xCAFEDEAD);
+        r = radeon_ring_lock(rdev, 2);
+        if (r) {
+                DRM_ERROR("radeon: cp failed to lock ring (%d).\n", r);
+                radeon_scratch_free(rdev, scratch);
+                return r;
+        }
+        radeon_ring_write(rdev, PACKET0(scratch, 0));
+        radeon_ring_write(rdev, 0xDEADBEEF);
+        radeon_ring_unlock_commit(rdev);
+        for (i = 0; i < rdev->usec_timeout; i++) {
+                tmp = RREG32(scratch);
+                if (tmp == 0xDEADBEEF) {
+                        break;
+                }
+                DRM_UDELAY(1);
+        }
+        if (i < rdev->usec_timeout) {
+                DRM_INFO("ring test succeeded in %d usecs\n", i);
+        } else {
+                DRM_ERROR("radeon: ring test failed (sracth(0x%04X)=0x%08X)\n",
+                          scratch, tmp);
+                r = -EINVAL;
+        }
+        radeon_scratch_free(rdev, scratch);
+        return r;
+}
+void r100_ring_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib)
+{
+        radeon_ring_write(rdev, PACKET0(RADEON_CP_IB_BASE, 1));
+        radeon_ring_write(rdev, ib->gpu_addr);
+        radeon_ring_write(rdev, ib->length_dw);
+}
+int r100_ib_test(struct radeon_device *rdev)
+{
+        struct radeon_ib *ib;
+        uint32_t scratch;
+        uint32_t tmp = 0;
+        unsigned i;
+        int r;
+        r = radeon_scratch_get(rdev, &scratch);
+        if (r) {
+                DRM_ERROR("radeon: failed to get scratch reg (%d).\n", r);
+                return r;
+        }
+        WREG32(scratch, 0xCAFEDEAD);
+        r = radeon_ib_get(rdev, &ib);
+        if (r) {
+                return r;
+        }
+        ib->ptr[0] = PACKET0(scratch, 0);
+        ib->ptr[1] = 0xDEADBEEF;
+        ib->ptr[2] = PACKET2(0);
+        ib->ptr[3] = PACKET2(0);
+        ib->ptr[4] = PACKET2(0);
+        ib->ptr[5] = PACKET2(0);
+        ib->ptr[6] = PACKET2(0);
+        ib->ptr[7] = PACKET2(0);
+        ib->length_dw = 8;
+        r = radeon_ib_schedule(rdev, ib);
+        if (r) {
+                radeon_scratch_free(rdev, scratch);
+                radeon_ib_free(rdev, &ib);
+                return r;
+        }
+        r = radeon_fence_wait(ib->fence, false);
+        if (r) {
+                return r;
+        }
+        for (i = 0; i < rdev->usec_timeout; i++) {
+                tmp = RREG32(scratch);
+                if (tmp == 0xDEADBEEF) {
+                        break;
+                }
+                DRM_UDELAY(1);
+        }
+        if (i < rdev->usec_timeout) {
+                DRM_INFO("ib test succeeded in %u usecs\n", i);
+        } else {
+                DRM_ERROR("radeon: ib test failed (sracth(0x%04X)=0x%08X)\n",
+                          scratch, tmp);
+                r = -EINVAL;
+        }
+        radeon_scratch_free(rdev, scratch);
+        radeon_ib_free(rdev, &ib);
+        return r;
+}
+void r100_ib_fini(struct radeon_device *rdev)
+{
+        radeon_ib_pool_fini(rdev);
+}
+int r100_ib_init(struct radeon_device *rdev)
+{
+        int r;
+        r = radeon_ib_pool_init(rdev);
+        if (r) {
+                dev_err(rdev->dev, "failled initializing IB pool (%d).\n", r);
+                r100_ib_fini(rdev);
+                return r;
+        }
+        r = r100_ib_test(rdev);
+        if (r) {
+                dev_err(rdev->dev, "failled testing IB (%d).\n", r);
+                r100_ib_fini(rdev);
+                return r;
+        }
+        return 0;
+}
+void r100_mc_stop(struct radeon_device *rdev, struct r100_mc_save *save)
+{
+        /* Shutdown CP we shouldn't need to do that but better be safe than
+         * sorry
+         */
+        rdev->cp.ready = false;
+        WREG32(R_000740_CP_CSQ_CNTL, 0);
+        /* Save few CRTC registers */
+        save->GENMO_WT = RREG32(R_0003C0_GENMO_WT);
+        save->CRTC_EXT_CNTL = RREG32(R_000054_CRTC_EXT_CNTL);
+        save->CRTC_GEN_CNTL = RREG32(R_000050_CRTC_GEN_CNTL);
+        save->CUR_OFFSET = RREG32(R_000260_CUR_OFFSET);
+        if (!(rdev->flags & RADEON_SINGLE_CRTC)) {
+                save->CRTC2_GEN_CNTL = RREG32(R_0003F8_CRTC2_GEN_CNTL);
+                save->CUR2_OFFSET = RREG32(R_000360_CUR2_OFFSET);
+        }
+        /* Disable VGA aperture access */
+        WREG32(R_0003C0_GENMO_WT, C_0003C0_VGA_RAM_EN & save->GENMO_WT);
+        /* Disable cursor, overlay, crtc */
+        WREG32(R_000260_CUR_OFFSET, save->CUR_OFFSET | S_000260_CUR_LOCK(1));
+        WREG32(R_000054_CRTC_EXT_CNTL, save->CRTC_EXT_CNTL |
+                                        S_000054_CRTC_DISPLAY_DIS(1));
+        WREG32(R_000050_CRTC_GEN_CNTL,
+                        (C_000050_CRTC_CUR_EN & save->CRTC_GEN_CNTL) |
+                        S_000050_CRTC_DISP_REQ_EN_B(1));
+        WREG32(R_000420_OV0_SCALE_CNTL,
+                C_000420_OV0_OVERLAY_EN & RREG32(R_000420_OV0_SCALE_CNTL));
+        WREG32(R_000260_CUR_OFFSET, C_000260_CUR_LOCK & save->CUR_OFFSET);
+        if (!(rdev->flags & RADEON_SINGLE_CRTC)) {
+                WREG32(R_000360_CUR2_OFFSET, save->CUR2_OFFSET |
+                                                S_000360_CUR2_LOCK(1));
+                WREG32(R_0003F8_CRTC2_GEN_CNTL,
+                        (C_0003F8_CRTC2_CUR_EN & save->CRTC2_GEN_CNTL) |
+                        S_0003F8_CRTC2_DISPLAY_DIS(1) |
+                        S_0003F8_CRTC2_DISP_REQ_EN_B(1));
+                WREG32(R_000360_CUR2_OFFSET,
+                        C_000360_CUR2_LOCK & save->CUR2_OFFSET);
+        }
+}
+void r100_mc_resume(struct radeon_device *rdev, struct r100_mc_save *save)
+{
+        /* Update base address for crtc */
+        WREG32(R_00023C_DISPLAY_BASE_ADDR, rdev->mc.vram_location);
+        if (!(rdev->flags & RADEON_SINGLE_CRTC)) {
+                WREG32(R_00033C_CRTC2_DISPLAY_BASE_ADDR,
+                                rdev->mc.vram_location);
+        }
+        /* Restore CRTC registers */
+        WREG32(R_0003C0_GENMO_WT, save->GENMO_WT);
+        WREG32(R_000054_CRTC_EXT_CNTL, save->CRTC_EXT_CNTL);
+        WREG32(R_000050_CRTC_GEN_CNTL, save->CRTC_GEN_CNTL);
+        if (!(rdev->flags & RADEON_SINGLE_CRTC)) {
+                WREG32(R_0003F8_CRTC2_GEN_CNTL, save->CRTC2_GEN_CNTL);
+        }
+}
diff --git a/drivers/gpu/drm/radeon/r100_track.h b/drivers/gpu/drm/radeon/r100_track.h
new file mode 100644
index 000000000000..70a82eda394a
--- /dev/null
+++ b/drivers/gpu/drm/radeon/r100_track.h
@@ -0,0 +1,124 @@
+#define R100_TRACK_MAX_TEXTURE 3
+#define R200_TRACK_MAX_TEXTURE 6
+#define R300_TRACK_MAX_TEXTURE 16
+#define R100_MAX_CB 1
+#define R300_MAX_CB 4
+/*
+ * CS functions
+ */
+struct r100_cs_track_cb {
+        struct radeon_object    *robj;
+        unsigned                pitch;
+        unsigned                cpp;
+        unsigned                offset;
+};
+struct r100_cs_track_array {
+        struct radeon_object    *robj;
+        unsigned                esize;
+};
+struct r100_cs_cube_info {
+        struct radeon_object    *robj;
+        unsigned                offset;
+        unsigned                width;
+        unsigned                height;
+};
+struct r100_cs_track_texture {
+        struct radeon_object    *robj;
+        struct r100_cs_cube_info cube_info[5]; /* info for 5 non-primary faces */
+        unsigned                pitch;
+        unsigned                width;
+        unsigned                height;
+        unsigned                num_levels;
+        unsigned                cpp;
+        unsigned                tex_coord_type;
+        unsigned                txdepth;
+        unsigned                width_11;
+        unsigned                height_11;
+        bool                    use_pitch;
+        bool                    enabled;
+        bool                    roundup_w;
+        bool                    roundup_h;
+};
+struct r100_cs_track_limits {
+        unsigned num_cb;
+        unsigned num_texture;
+        unsigned max_levels;
+};
+struct r100_cs_track {
+        struct radeon_device *rdev;
+        unsigned                        num_cb;
+        unsigned                        num_texture;
+        unsigned                        maxy;
+        unsigned                        vtx_size;
+        unsigned                        vap_vf_cntl;
+        unsigned                        immd_dwords;
+        unsigned                        num_arrays;
+        unsigned                        max_indx;
+        struct r100_cs_track_array      arrays[11];
+        struct r100_cs_track_cb         cb[R300_MAX_CB];
+        struct r100_cs_track_cb         zb;
+        struct r100_cs_track_texture    textures[R300_TRACK_MAX_TEXTURE];
+        bool                            z_enabled;
+        bool                            separate_cube;
+};
+int r100_cs_track_check(struct radeon_device *rdev, struct r100_cs_track *track);
+void r100_cs_track_clear(struct radeon_device *rdev, struct r100_cs_track *track);
+int r100_cs_packet_next_reloc(struct radeon_cs_parser *p,
+                              struct radeon_cs_reloc **cs_reloc);
+void r100_cs_dump_packet(struct radeon_cs_parser *p,
+                         struct radeon_cs_packet *pkt);
+int r100_cs_packet_parse_vline(struct radeon_cs_parser *p);
+int r200_packet0_check(struct radeon_cs_parser *p,
+                       struct radeon_cs_packet *pkt,
+                       unsigned idx, unsigned reg);
+static inline int r100_reloc_pitch_offset(struct radeon_cs_parser *p,
+                                          struct radeon_cs_packet *pkt,
+                                          unsigned idx,
+                                          unsigned reg)
+{
+        int r;
+        u32 tile_flags = 0;
+        u32 tmp;
+        struct radeon_cs_reloc *reloc;
+        struct radeon_cs_chunk *ib_chunk;
+        ib_chunk = &p->chunks[p->chunk_ib_idx];
+        r = r100_cs_packet_next_reloc(p, &reloc);
+        if (r) {
+                DRM_ERROR("No reloc for ib[%d]=0x%04X\n",
+                          idx, reg);
+                r100_cs_dump_packet(p, pkt);
+                return r;
+        }
+        tmp = ib_chunk->kdata[idx] & 0x003fffff;
+        tmp += (((u32)reloc->lobj.gpu_offset) >> 10);
+        if (reloc->lobj.tiling_flags & RADEON_TILING_MACRO)
+                tile_flags |= RADEON_DST_TILE_MACRO;
+        if (reloc->lobj.tiling_flags & RADEON_TILING_MICRO) {
+                if (reg == RADEON_SRC_PITCH_OFFSET) {
+                        DRM_ERROR("Cannot src blit from microtiled surface\n");
+                        r100_cs_dump_packet(p, pkt);
+                        return -EINVAL;
+                }
+                tile_flags |= RADEON_DST_TILE_MICRO;
+        }
+        tmp |= tile_flags;
+        p->ib->ptr[idx] = (ib_chunk->kdata[idx] & 0x3fc00000) | tmp;
+        return 0;
+}
diff --git a/drivers/gpu/drm/radeon/r100d.h b/drivers/gpu/drm/radeon/r100d.h
new file mode 100644
index 000000000000..c4b257ec920e
--- /dev/null
+++ b/drivers/gpu/drm/radeon/r100d.h
@@ -0,0 +1,607 @@
+/*
+ * Copyright 2008 Advanced Micro Devices, Inc.
+ * Copyright 2008 Red Hat Inc.
+ * Copyright 2009 Jerome Glisse.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors: Dave Airlie
+ *          Alex Deucher
+ *          Jerome Glisse
+ */
+#ifndef __R100D_H__
+#define __R100D_H__
+#define CP_PACKET0                      0x00000000
+#define         PACKET0_BASE_INDEX_SHIFT        0
+#define         PACKET0_BASE_INDEX_MASK         (0x1ffff << 0)
+#define         PACKET0_COUNT_SHIFT             16
+#define         PACKET0_COUNT_MASK              (0x3fff << 16)
+#define CP_PACKET1                      0x40000000
+#define CP_PACKET2                      0x80000000
+#define         PACKET2_PAD_SHIFT               0
+#define         PACKET2_PAD_MASK                (0x3fffffff << 0)
+#define CP_PACKET3                      0xC0000000
+#define         PACKET3_IT_OPCODE_SHIFT         8
+#define         PACKET3_IT_OPCODE_MASK          (0xff << 8)
+#define         PACKET3_COUNT_SHIFT             16
+#define         PACKET3_COUNT_MASK              (0x3fff << 16)
+/* PACKET3 op code */
+#define         PACKET3_NOP                     0x10
+#define         PACKET3_3D_DRAW_VBUF            0x28
+#define         PACKET3_3D_DRAW_IMMD            0x29
+#define         PACKET3_3D_DRAW_INDX            0x2A
+#define         PACKET3_3D_LOAD_VBPNTR          0x2F
+#define         PACKET3_INDX_BUFFER             0x33
+#define         PACKET3_3D_DRAW_VBUF_2          0x34
+#define         PACKET3_3D_DRAW_IMMD_2          0x35
+#define         PACKET3_3D_DRAW_INDX_2          0x36
+#define         PACKET3_BITBLT_MULTI            0x9B
+#define PACKET0(reg, n) (CP_PACKET0 |                                   \
+                         REG_SET(PACKET0_BASE_INDEX, (reg) >> 2) |      \
+                         REG_SET(PACKET0_COUNT, (n)))
+#define PACKET2(v)      (CP_PACKET2 | REG_SET(PACKET2_PAD, (v)))
+#define PACKET3(op, n)  (CP_PACKET3 |                                   \
+                         REG_SET(PACKET3_IT_OPCODE, (op)) |             \
+                         REG_SET(PACKET3_COUNT, (n)))
+#define PACKET_TYPE0    0
+#define PACKET_TYPE1    1
+#define PACKET_TYPE2    2
+#define PACKET_TYPE3    3
+#define CP_PACKET_GET_TYPE(h) (((h) >> 30) & 3)
+#define CP_PACKET_GET_COUNT(h) (((h) >> 16) & 0x3FFF)
+#define CP_PACKET0_GET_REG(h) (((h) & 0x1FFF) << 2)
+#define CP_PACKET0_GET_ONE_REG_WR(h) (((h) >> 15) & 1)
+#define CP_PACKET3_GET_OPCODE(h) (((h) >> 8) & 0xFF)
+/* Registers */
+#define R_000040_GEN_INT_CNTL                        0x000040
+#define   S_000040_CRTC_VBLANK(x)                      (((x) & 0x1) << 0)
+#define   G_000040_CRTC_VBLANK(x)                      (((x) >> 0) & 0x1)
+#define   C_000040_CRTC_VBLANK                         0xFFFFFFFE
+#define   S_000040_CRTC_VLINE(x)                       (((x) & 0x1) << 1)
+#define   G_000040_CRTC_VLINE(x)                       (((x) >> 1) & 0x1)
+#define   C_000040_CRTC_VLINE                          0xFFFFFFFD
+#define   S_000040_CRTC_VSYNC(x)                       (((x) & 0x1) << 2)
+#define   G_000040_CRTC_VSYNC(x)                       (((x) >> 2) & 0x1)
+#define   C_000040_CRTC_VSYNC                          0xFFFFFFFB
+#define   S_000040_SNAPSHOT(x)                         (((x) & 0x1) << 3)
+#define   G_000040_SNAPSHOT(x)                         (((x) >> 3) & 0x1)
+#define   C_000040_SNAPSHOT                            0xFFFFFFF7
+#define   S_000040_FP_DETECT(x)                        (((x) & 0x1) << 4)
+#define   G_000040_FP_DETECT(x)                        (((x) >> 4) & 0x1)
+#define   C_000040_FP_DETECT                           0xFFFFFFEF
+#define   S_000040_CRTC2_VLINE(x)                      (((x) & 0x1) << 5)
+#define   G_000040_CRTC2_VLINE(x)                      (((x) >> 5) & 0x1)
+#define   C_000040_CRTC2_VLINE                         0xFFFFFFDF
+#define   S_000040_DMA_VIPH0_INT_EN(x)                 (((x) & 0x1) << 12)
+#define   G_000040_DMA_VIPH0_INT_EN(x)                 (((x) >> 12) & 0x1)
+#define   C_000040_DMA_VIPH0_INT_EN                    0xFFFFEFFF
+#define   S_000040_CRTC2_VSYNC(x)                      (((x) & 0x1) << 6)
+#define   G_000040_CRTC2_VSYNC(x)                      (((x) >> 6) & 0x1)
+#define   C_000040_CRTC2_VSYNC                         0xFFFFFFBF
+#define   S_000040_SNAPSHOT2(x)                        (((x) & 0x1) << 7)
+#define   G_000040_SNAPSHOT2(x)                        (((x) >> 7) & 0x1)
+#define   C_000040_SNAPSHOT2                           0xFFFFFF7F
+#define   S_000040_CRTC2_VBLANK(x)                     (((x) & 0x1) << 9)
+#define   G_000040_CRTC2_VBLANK(x)                     (((x) >> 9) & 0x1)
+#define   C_000040_CRTC2_VBLANK                        0xFFFFFDFF
+#define   S_000040_FP2_DETECT(x)                       (((x) & 0x1) << 10)
+#define   G_000040_FP2_DETECT(x)                       (((x) >> 10) & 0x1)
+#define   C_000040_FP2_DETECT                          0xFFFFFBFF
+#define   S_000040_VSYNC_DIFF_OVER_LIMIT(x)            (((x) & 0x1) << 11)
+#define   G_000040_VSYNC_DIFF_OVER_LIMIT(x)            (((x) >> 11) & 0x1)
+#define   C_000040_VSYNC_DIFF_OVER_LIMIT               0xFFFFF7FF
+#define   S_000040_DMA_VIPH1_INT_EN(x)                 (((x) & 0x1) << 13)
+#define   G_000040_DMA_VIPH1_INT_EN(x)                 (((x) >> 13) & 0x1)
+#define   C_000040_DMA_VIPH1_INT_EN                    0xFFFFDFFF
+#define   S_000040_DMA_VIPH2_INT_EN(x)                 (((x) & 0x1) << 14)
+#define   G_000040_DMA_VIPH2_INT_EN(x)                 (((x) >> 14) & 0x1)
+#define   C_000040_DMA_VIPH2_INT_EN                    0xFFFFBFFF
+#define   S_000040_DMA_VIPH3_INT_EN(x)                 (((x) & 0x1) << 15)
+#define   G_000040_DMA_VIPH3_INT_EN(x)                 (((x) >> 15) & 0x1)
+#define   C_000040_DMA_VIPH3_INT_EN                    0xFFFF7FFF
+#define   S_000040_I2C_INT_EN(x)                       (((x) & 0x1) << 17)
+#define   G_000040_I2C_INT_EN(x)                       (((x) >> 17) & 0x1)
+#define   C_000040_I2C_INT_EN                          0xFFFDFFFF
+#define   S_000040_GUI_IDLE(x)                         (((x) & 0x1) << 19)
+#define   G_000040_GUI_IDLE(x)                         (((x) >> 19) & 0x1)
+#define   C_000040_GUI_IDLE                            0xFFF7FFFF
+#define   S_000040_VIPH_INT_EN(x)                      (((x) & 0x1) << 24)
+#define   G_000040_VIPH_INT_EN(x)                      (((x) >> 24) & 0x1)
+#define   C_000040_VIPH_INT_EN                         0xFEFFFFFF
+#define   S_000040_SW_INT_EN(x)                        (((x) & 0x1) << 25)
+#define   G_000040_SW_INT_EN(x)                        (((x) >> 25) & 0x1)
+#define   C_000040_SW_INT_EN                           0xFDFFFFFF
+#define   S_000040_GEYSERVILLE(x)                      (((x) & 0x1) << 27)
+#define   G_000040_GEYSERVILLE(x)                      (((x) >> 27) & 0x1)
+#define   C_000040_GEYSERVILLE                         0xF7FFFFFF
+#define   S_000040_HDCP_AUTHORIZED_INT(x)              (((x) & 0x1) << 28)
+#define   G_000040_HDCP_AUTHORIZED_INT(x)              (((x) >> 28) & 0x1)
+#define   C_000040_HDCP_AUTHORIZED_INT                 0xEFFFFFFF
+#define   S_000040_DVI_I2C_INT(x)                      (((x) & 0x1) << 29)
+#define   G_000040_DVI_I2C_INT(x)                      (((x) >> 29) & 0x1)
+#define   C_000040_DVI_I2C_INT                         0xDFFFFFFF
+#define   S_000040_GUIDMA(x)                           (((x) & 0x1) << 30)
+#define   G_000040_GUIDMA(x)                           (((x) >> 30) & 0x1)
+#define   C_000040_GUIDMA                              0xBFFFFFFF
+#define   S_000040_VIDDMA(x)                           (((x) & 0x1) << 31)
+#define   G_000040_VIDDMA(x)                           (((x) >> 31) & 0x1)
+#define   C_000040_VIDDMA                              0x7FFFFFFF
+#define R_000044_GEN_INT_STATUS                      0x000044
+#define   S_000044_CRTC_VBLANK_STAT(x)                 (((x) & 0x1) << 0)
+#define   G_000044_CRTC_VBLANK_STAT(x)                 (((x) >> 0) & 0x1)
+#define   C_000044_CRTC_VBLANK_STAT                    0xFFFFFFFE
+#define   S_000044_CRTC_VBLANK_STAT_AK(x)              (((x) & 0x1) << 0)
+#define   G_000044_CRTC_VBLANK_STAT_AK(x)              (((x) >> 0) & 0x1)
+#define   C_000044_CRTC_VBLANK_STAT_AK                 0xFFFFFFFE
+#define   S_000044_CRTC_VLINE_STAT(x)                  (((x) & 0x1) << 1)
+#define   G_000044_CRTC_VLINE_STAT(x)                  (((x) >> 1) & 0x1)
+#define   C_000044_CRTC_VLINE_STAT                     0xFFFFFFFD
+#define   S_000044_CRTC_VLINE_STAT_AK(x)               (((x) & 0x1) << 1)
+#define   G_000044_CRTC_VLINE_STAT_AK(x)               (((x) >> 1) & 0x1)
+#define   C_000044_CRTC_VLINE_STAT_AK                  0xFFFFFFFD
+#define   S_000044_CRTC_VSYNC_STAT(x)                  (((x) & 0x1) << 2)
+#define   G_000044_CRTC_VSYNC_STAT(x)                  (((x) >> 2) & 0x1)
+#define   C_000044_CRTC_VSYNC_STAT                     0xFFFFFFFB
+#define   S_000044_CRTC_VSYNC_STAT_AK(x)               (((x) & 0x1) << 2)
+#define   G_000044_CRTC_VSYNC_STAT_AK(x)               (((x) >> 2) & 0x1)
+#define   C_000044_CRTC_VSYNC_STAT_AK                  0xFFFFFFFB
+#define   S_000044_SNAPSHOT_STAT(x)                    (((x) & 0x1) << 3)
+#define   G_000044_SNAPSHOT_STAT(x)                    (((x) >> 3) & 0x1)
+#define   C_000044_SNAPSHOT_STAT                       0xFFFFFFF7
+#define   S_000044_SNAPSHOT_STAT_AK(x)                 (((x) & 0x1) << 3)
+#define   G_000044_SNAPSHOT_STAT_AK(x)                 (((x) >> 3) & 0x1)
+#define   C_000044_SNAPSHOT_STAT_AK                    0xFFFFFFF7
+#define   S_000044_FP_DETECT_STAT(x)                   (((x) & 0x1) << 4)
+#define   G_000044_FP_DETECT_STAT(x)                   (((x) >> 4) & 0x1)
+#define   C_000044_FP_DETECT_STAT                      0xFFFFFFEF
+#define   S_000044_FP_DETECT_STAT_AK(x)                (((x) & 0x1) << 4)
+#define   G_000044_FP_DETECT_STAT_AK(x)                (((x) >> 4) & 0x1)
+#define   C_000044_FP_DETECT_STAT_AK                   0xFFFFFFEF
+#define   S_000044_CRTC2_VLINE_STAT(x)                 (((x) & 0x1) << 5)
+#define   G_000044_CRTC2_VLINE_STAT(x)                 (((x) >> 5) & 0x1)
+#define   C_000044_CRTC2_VLINE_STAT                    0xFFFFFFDF
+#define   S_000044_CRTC2_VLINE_STAT_AK(x)              (((x) & 0x1) << 5)
+#define   G_000044_CRTC2_VLINE_STAT_AK(x)              (((x) >> 5) & 0x1)
+#define   C_000044_CRTC2_VLINE_STAT_AK                 0xFFFFFFDF
+#define   S_000044_CRTC2_VSYNC_STAT(x)                 (((x) & 0x1) << 6)
+#define   G_000044_CRTC2_VSYNC_STAT(x)                 (((x) >> 6) & 0x1)
+#define   C_000044_CRTC2_VSYNC_STAT                    0xFFFFFFBF
+#define   S_000044_CRTC2_VSYNC_STAT_AK(x)              (((x) & 0x1) << 6)
+#define   G_000044_CRTC2_VSYNC_STAT_AK(x)              (((x) >> 6) & 0x1)
+#define   C_000044_CRTC2_VSYNC_STAT_AK                 0xFFFFFFBF
+#define   S_000044_SNAPSHOT2_STAT(x)                   (((x) & 0x1) << 7)
+#define   G_000044_SNAPSHOT2_STAT(x)                   (((x) >> 7) & 0x1)
+#define   C_000044_SNAPSHOT2_STAT                      0xFFFFFF7F
+#define   S_000044_SNAPSHOT2_STAT_AK(x)                (((x) & 0x1) << 7)
+#define   G_000044_SNAPSHOT2_STAT_AK(x)                (((x) >> 7) & 0x1)
+#define   C_000044_SNAPSHOT2_STAT_AK                   0xFFFFFF7F
+#define   S_000044_CAP0_INT_ACTIVE(x)                  (((x) & 0x1) << 8)
+#define   G_000044_CAP0_INT_ACTIVE(x)                  (((x) >> 8) & 0x1)
+#define   C_000044_CAP0_INT_ACTIVE                     0xFFFFFEFF
+#define   S_000044_CRTC2_VBLANK_STAT(x)                (((x) & 0x1) << 9)
+#define   G_000044_CRTC2_VBLANK_STAT(x)                (((x) >> 9) & 0x1)
+#define   C_000044_CRTC2_VBLANK_STAT                   0xFFFFFDFF
+#define   S_000044_CRTC2_VBLANK_STAT_AK(x)             (((x) & 0x1) << 9)
+#define   G_000044_CRTC2_VBLANK_STAT_AK(x)             (((x) >> 9) & 0x1)
+#define   C_000044_CRTC2_VBLANK_STAT_AK                0xFFFFFDFF
+#define   S_000044_FP2_DETECT_STAT(x)                  (((x) & 0x1) << 10)
+#define   G_000044_FP2_DETECT_STAT(x)                  (((x) >> 10) & 0x1)
+#define   C_000044_FP2_DETECT_STAT                     0xFFFFFBFF
+#define   S_000044_FP2_DETECT_STAT_AK(x)               (((x) & 0x1) << 10)
+#define   G_000044_FP2_DETECT_STAT_AK(x)               (((x) >> 10) & 0x1)
+#define   C_000044_FP2_DETECT_STAT_AK                  0xFFFFFBFF
+#define   S_000044_VSYNC_DIFF_OVER_LIMIT_STAT(x)       (((x) & 0x1) << 11)
+#define   G_000044_VSYNC_DIFF_OVER_LIMIT_STAT(x)       (((x) >> 11) & 0x1)
+#define   C_000044_VSYNC_DIFF_OVER_LIMIT_STAT          0xFFFFF7FF
+#define   S_000044_VSYNC_DIFF_OVER_LIMIT_STAT_AK(x)    (((x) & 0x1) << 11)
+#define   G_000044_VSYNC_DIFF_OVER_LIMIT_STAT_AK(x)    (((x) >> 11) & 0x1)
+#define   C_000044_VSYNC_DIFF_OVER_LIMIT_STAT_AK       0xFFFFF7FF
+#define   S_000044_DMA_VIPH0_INT(x)                    (((x) & 0x1) << 12)
+#define   G_000044_DMA_VIPH0_INT(x)                    (((x) >> 12) & 0x1)
+#define   C_000044_DMA_VIPH0_INT                       0xFFFFEFFF
+#define   S_000044_DMA_VIPH0_INT_AK(x)                 (((x) & 0x1) << 12)
+#define   G_000044_DMA_VIPH0_INT_AK(x)                 (((x) >> 12) & 0x1)
+#define   C_000044_DMA_VIPH0_INT_AK                    0xFFFFEFFF
+#define   S_000044_DMA_VIPH1_INT(x)                    (((x) & 0x1) << 13)
+#define   G_000044_DMA_VIPH1_INT(x)                    (((x) >> 13) & 0x1)
+#define   C_000044_DMA_VIPH1_INT                       0xFFFFDFFF
+#define   S_000044_DMA_VIPH1_INT_AK(x)                 (((x) & 0x1) << 13)
+#define   G_000044_DMA_VIPH1_INT_AK(x)                 (((x) >> 13) & 0x1)
+#define   C_000044_DMA_VIPH1_INT_AK                    0xFFFFDFFF
+#define   S_000044_DMA_VIPH2_INT(x)                    (((x) & 0x1) << 14)
+#define   G_000044_DMA_VIPH2_INT(x)                    (((x) >> 14) & 0x1)
+#define   C_000044_DMA_VIPH2_INT                       0xFFFFBFFF
+#define   S_000044_DMA_VIPH2_INT_AK(x)                 (((x) & 0x1) << 14)
+#define   G_000044_DMA_VIPH2_INT_AK(x)                 (((x) >> 14) & 0x1)
+#define   C_000044_DMA_VIPH2_INT_AK                    0xFFFFBFFF
+#define   S_000044_DMA_VIPH3_INT(x)                    (((x) & 0x1) << 15)
+#define   G_000044_DMA_VIPH3_INT(x)                    (((x) >> 15) & 0x1)
+#define   C_000044_DMA_VIPH3_INT                       0xFFFF7FFF
+#define   S_000044_DMA_VIPH3_INT_AK(x)                 (((x) & 0x1) << 15)
+#define   G_000044_DMA_VIPH3_INT_AK(x)                 (((x) >> 15) & 0x1)
+#define   C_000044_DMA_VIPH3_INT_AK                    0xFFFF7FFF
+#define   S_000044_I2C_INT(x)                          (((x) & 0x1) << 17)
+#define   G_000044_I2C_INT(x)                          (((x) >> 17) & 0x1)
+#define   C_000044_I2C_INT                             0xFFFDFFFF
+#define   S_000044_I2C_INT_AK(x)                       (((x) & 0x1) << 17)
+#define   G_000044_I2C_INT_AK(x)                       (((x) >> 17) & 0x1)
+#define   C_000044_I2C_INT_AK                          0xFFFDFFFF
+#define   S_000044_GUI_IDLE_STAT(x)                    (((x) & 0x1) << 19)
+#define   G_000044_GUI_IDLE_STAT(x)                    (((x) >> 19) & 0x1)
+#define   C_000044_GUI_IDLE_STAT                       0xFFF7FFFF
+#define   S_000044_GUI_IDLE_STAT_AK(x)                 (((x) & 0x1) << 19)
+#define   G_000044_GUI_IDLE_STAT_AK(x)                 (((x) >> 19) & 0x1)
+#define   C_000044_GUI_IDLE_STAT_AK                    0xFFF7FFFF
+#define   S_000044_VIPH_INT(x)                         (((x) & 0x1) << 24)
+#define   G_000044_VIPH_INT(x)                         (((x) >> 24) & 0x1)
+#define   C_000044_VIPH_INT                            0xFEFFFFFF
+#define   S_000044_SW_INT(x)                           (((x) & 0x1) << 25)
+#define   G_000044_SW_INT(x)                           (((x) >> 25) & 0x1)
+#define   C_000044_SW_INT                              0xFDFFFFFF
+#define   S_000044_SW_INT_AK(x)                        (((x) & 0x1) << 25)
+#define   G_000044_SW_INT_AK(x)                        (((x) >> 25) & 0x1)
+#define   C_000044_SW_INT_AK                           0xFDFFFFFF
+#define   S_000044_SW_INT_SET(x)                       (((x) & 0x1) << 26)
+#define   G_000044_SW_INT_SET(x)                       (((x) >> 26) & 0x1)
+#define   C_000044_SW_INT_SET                          0xFBFFFFFF
+#define   S_000044_GEYSERVILLE_STAT(x)                 (((x) & 0x1) << 27)
+#define   G_000044_GEYSERVILLE_STAT(x)                 (((x) >> 27) & 0x1)
+#define   C_000044_GEYSERVILLE_STAT                    0xF7FFFFFF
+#define   S_000044_GEYSERVILLE_STAT_AK(x)              (((x) & 0x1) << 27)
+#define   G_000044_GEYSERVILLE_STAT_AK(x)              (((x) >> 27) & 0x1)
+#define   C_000044_GEYSERVILLE_STAT_AK                 0xF7FFFFFF
+#define   S_000044_HDCP_AUTHORIZED_INT_STAT(x)         (((x) & 0x1) << 28)
+#define   G_000044_HDCP_AUTHORIZED_INT_STAT(x)         (((x) >> 28) & 0x1)
+#define   C_000044_HDCP_AUTHORIZED_INT_STAT            0xEFFFFFFF
+#define   S_000044_HDCP_AUTHORIZED_INT_AK(x)           (((x) & 0x1) << 28)
+#define   G_000044_HDCP_AUTHORIZED_INT_AK(x)           (((x) >> 28) & 0x1)
+#define   C_000044_HDCP_AUTHORIZED_INT_AK              0xEFFFFFFF
+#define   S_000044_DVI_I2C_INT_STAT(x)                 (((x) & 0x1) << 29)
+#define   G_000044_DVI_I2C_INT_STAT(x)                 (((x) >> 29) & 0x1)
+#define   C_000044_DVI_I2C_INT_STAT                    0xDFFFFFFF
+#define   S_000044_DVI_I2C_INT_AK(x)                   (((x) & 0x1) << 29)
+#define   G_000044_DVI_I2C_INT_AK(x)                   (((x) >> 29) & 0x1)
+#define   C_000044_DVI_I2C_INT_AK                      0xDFFFFFFF
+#define   S_000044_GUIDMA_STAT(x)                      (((x) & 0x1) << 30)
+#define   G_000044_GUIDMA_STAT(x)                      (((x) >> 30) & 0x1)
+#define   C_000044_GUIDMA_STAT                         0xBFFFFFFF
+#define   S_000044_GUIDMA_AK(x)                        (((x) & 0x1) << 30)
+#define   G_000044_GUIDMA_AK(x)                        (((x) >> 30) & 0x1)
+#define   C_000044_GUIDMA_AK                           0xBFFFFFFF
+#define   S_000044_VIDDMA_STAT(x)                      (((x) & 0x1) << 31)
+#define   G_000044_VIDDMA_STAT(x)                      (((x) >> 31) & 0x1)
+#define   C_000044_VIDDMA_STAT                         0x7FFFFFFF
+#define   S_000044_VIDDMA_AK(x)                        (((x) & 0x1) << 31)
+#define   G_000044_VIDDMA_AK(x)                        (((x) >> 31) & 0x1)
+#define   C_000044_VIDDMA_AK                           0x7FFFFFFF
+#define R_000050_CRTC_GEN_CNTL                       0x000050
+#define   S_000050_CRTC_DBL_SCAN_EN(x)                 (((x) & 0x1) << 0)
+#define   G_000050_CRTC_DBL_SCAN_EN(x)                 (((x) >> 0) & 0x1)
+#define   C_000050_CRTC_DBL_SCAN_EN                    0xFFFFFFFE
+#define   S_000050_CRTC_INTERLACE_EN(x)                (((x) & 0x1) << 1)
+#define   G_000050_CRTC_INTERLACE_EN(x)                (((x) >> 1) & 0x1)
+#define   C_000050_CRTC_INTERLACE_EN                   0xFFFFFFFD
+#define   S_000050_CRTC_C_SYNC_EN(x)                   (((x) & 0x1) << 4)
+#define   G_000050_CRTC_C_SYNC_EN(x)                   (((x) >> 4) & 0x1)
+#define   C_000050_CRTC_C_SYNC_EN                      0xFFFFFFEF
+#define   S_000050_CRTC_PIX_WIDTH(x)                   (((x) & 0xF) << 8)
+#define   G_000050_CRTC_PIX_WIDTH(x)                   (((x) >> 8) & 0xF)
+#define   C_000050_CRTC_PIX_WIDTH                      0xFFFFF0FF
+#define   S_000050_CRTC_ICON_EN(x)                     (((x) & 0x1) << 15)
+#define   G_000050_CRTC_ICON_EN(x)                     (((x) >> 15) & 0x1)
+#define   C_000050_CRTC_ICON_EN                        0xFFFF7FFF
+#define   S_000050_CRTC_CUR_EN(x)                      (((x) & 0x1) << 16)
+#define   G_000050_CRTC_CUR_EN(x)                      (((x) >> 16) & 0x1)
+#define   C_000050_CRTC_CUR_EN                         0xFFFEFFFF
+#define   S_000050_CRTC_VSTAT_MODE(x)                  (((x) & 0x3) << 17)
+#define   G_000050_CRTC_VSTAT_MODE(x)                  (((x) >> 17) & 0x3)
+#define   C_000050_CRTC_VSTAT_MODE                     0xFFF9FFFF
+#define   S_000050_CRTC_CUR_MODE(x)                    (((x) & 0x7) << 20)
+#define   G_000050_CRTC_CUR_MODE(x)                    (((x) >> 20) & 0x7)
+#define   C_000050_CRTC_CUR_MODE                       0xFF8FFFFF
+#define   S_000050_CRTC_EXT_DISP_EN(x)                 (((x) & 0x1) << 24)
+#define   G_000050_CRTC_EXT_DISP_EN(x)                 (((x) >> 24) & 0x1)
+#define   C_000050_CRTC_EXT_DISP_EN                    0xFEFFFFFF
+#define   S_000050_CRTC_EN(x)                          (((x) & 0x1) << 25)
+#define   G_000050_CRTC_EN(x)                          (((x) >> 25) & 0x1)
+#define   C_000050_CRTC_EN                             0xFDFFFFFF
+#define   S_000050_CRTC_DISP_REQ_EN_B(x)               (((x) & 0x1) << 26)
+#define   G_000050_CRTC_DISP_REQ_EN_B(x)               (((x) >> 26) & 0x1)
+#define   C_000050_CRTC_DISP_REQ_EN_B                  0xFBFFFFFF
+#define R_000054_CRTC_EXT_CNTL                       0x000054
+#define   S_000054_CRTC_VGA_XOVERSCAN(x)               (((x) & 0x1) << 0)
+#define   G_000054_CRTC_VGA_XOVERSCAN(x)               (((x) >> 0) & 0x1)
+#define   C_000054_CRTC_VGA_XOVERSCAN                  0xFFFFFFFE
+#define   S_000054_VGA_BLINK_RATE(x)                   (((x) & 0x3) << 1)
+#define   G_000054_VGA_BLINK_RATE(x)                   (((x) >> 1) & 0x3)
+#define   C_000054_VGA_BLINK_RATE                      0xFFFFFFF9
+#define   S_000054_VGA_ATI_LINEAR(x)                   (((x) & 0x1) << 3)
+#define   G_000054_VGA_ATI_LINEAR(x)                   (((x) >> 3) & 0x1)
+#define   C_000054_VGA_ATI_LINEAR                      0xFFFFFFF7
+#define   S_000054_VGA_128KAP_PAGING(x)                (((x) & 0x1) << 4)
+#define   G_000054_VGA_128KAP_PAGING(x)                (((x) >> 4) & 0x1)
+#define   C_000054_VGA_128KAP_PAGING                   0xFFFFFFEF
+#define   S_000054_VGA_TEXT_132(x)                     (((x) & 0x1) << 5)
+#define   G_000054_VGA_TEXT_132(x)                     (((x) >> 5) & 0x1)
+#define   C_000054_VGA_TEXT_132                        0xFFFFFFDF
+#define   S_000054_VGA_XCRT_CNT_EN(x)                  (((x) & 0x1) << 6)
+#define   G_000054_VGA_XCRT_CNT_EN(x)                  (((x) >> 6) & 0x1)
+#define   C_000054_VGA_XCRT_CNT_EN                     0xFFFFFFBF
+#define   S_000054_CRTC_HSYNC_DIS(x)                   (((x) & 0x1) << 8)
+#define   G_000054_CRTC_HSYNC_DIS(x)                   (((x) >> 8) & 0x1)
+#define   C_000054_CRTC_HSYNC_DIS                      0xFFFFFEFF
+#define   S_000054_CRTC_VSYNC_DIS(x)                   (((x) & 0x1) << 9)
+#define   G_000054_CRTC_VSYNC_DIS(x)                   (((x) >> 9) & 0x1)
+#define   C_000054_CRTC_VSYNC_DIS                      0xFFFFFDFF
+#define   S_000054_CRTC_DISPLAY_DIS(x)                 (((x) & 0x1) << 10)
+#define   G_000054_CRTC_DISPLAY_DIS(x)                 (((x) >> 10) & 0x1)
+#define   C_000054_CRTC_DISPLAY_DIS                    0xFFFFFBFF
+#define   S_000054_CRTC_SYNC_TRISTATE(x)               (((x) & 0x1) << 11)
+#define   G_000054_CRTC_SYNC_TRISTATE(x)               (((x) >> 11) & 0x1)
+#define   C_000054_CRTC_SYNC_TRISTATE                  0xFFFFF7FF
+#define   S_000054_CRTC_HSYNC_TRISTATE(x)              (((x) & 0x1) << 12)
+#define   G_000054_CRTC_HSYNC_TRISTATE(x)              (((x) >> 12) & 0x1)
+#define   C_000054_CRTC_HSYNC_TRISTATE                 0xFFFFEFFF
+#define   S_000054_CRTC_VSYNC_TRISTATE(x)              (((x) & 0x1) << 13)
+#define   G_000054_CRTC_VSYNC_TRISTATE(x)              (((x) >> 13) & 0x1)
+#define   C_000054_CRTC_VSYNC_TRISTATE                 0xFFFFDFFF
+#define   S_000054_CRT_ON(x)                           (((x) & 0x1) << 15)
+#define   G_000054_CRT_ON(x)                           (((x) >> 15) & 0x1)
+#define   C_000054_CRT_ON                              0xFFFF7FFF
+#define   S_000054_VGA_CUR_B_TEST(x)                   (((x) & 0x1) << 17)
+#define   G_000054_VGA_CUR_B_TEST(x)                   (((x) >> 17) & 0x1)
+#define   C_000054_VGA_CUR_B_TEST                      0xFFFDFFFF
+#define   S_000054_VGA_PACK_DIS(x)                     (((x) & 0x1) << 18)
+#define   G_000054_VGA_PACK_DIS(x)                     (((x) >> 18) & 0x1)
+#define   C_000054_VGA_PACK_DIS                        0xFFFBFFFF
+#define   S_000054_VGA_MEM_PS_EN(x)                    (((x) & 0x1) << 19)
+#define   G_000054_VGA_MEM_PS_EN(x)                    (((x) >> 19) & 0x1)
+#define   C_000054_VGA_MEM_PS_EN                       0xFFF7FFFF
+#define   S_000054_VCRTC_IDX_MASTER(x)                 (((x) & 0x7F) << 24)
+#define   G_000054_VCRTC_IDX_MASTER(x)                 (((x) >> 24) & 0x7F)
+#define   C_000054_VCRTC_IDX_MASTER                    0x80FFFFFF
+#define R_00023C_DISPLAY_BASE_ADDR                   0x00023C
+#define   S_00023C_DISPLAY_BASE_ADDR(x)                (((x) & 0xFFFFFFFF) << 0)
+#define   G_00023C_DISPLAY_BASE_ADDR(x)                (((x) >> 0) & 0xFFFFFFFF)
+#define   C_00023C_DISPLAY_BASE_ADDR                   0x00000000
+#define R_000260_CUR_OFFSET                          0x000260
+#define   S_000260_CUR_OFFSET(x)                       (((x) & 0x7FFFFFF) << 0)
+#define   G_000260_CUR_OFFSET(x)                       (((x) >> 0) & 0x7FFFFFF)
+#define   C_000260_CUR_OFFSET                          0xF8000000
+#define   S_000260_CUR_LOCK(x)                         (((x) & 0x1) << 31)
+#define   G_000260_CUR_LOCK(x)                         (((x) >> 31) & 0x1)
+#define   C_000260_CUR_LOCK                            0x7FFFFFFF
+#define R_00033C_CRTC2_DISPLAY_BASE_ADDR             0x00033C
+#define   S_00033C_CRTC2_DISPLAY_BASE_ADDR(x)          (((x) & 0xFFFFFFFF) << 0)
+#define   G_00033C_CRTC2_DISPLAY_BASE_ADDR(x)          (((x) >> 0) & 0xFFFFFFFF)
+#define   C_00033C_CRTC2_DISPLAY_BASE_ADDR             0x00000000
+#define R_000360_CUR2_OFFSET                         0x000360
+#define   S_000360_CUR2_OFFSET(x)                      (((x) & 0x7FFFFFF) << 0)
+#define   G_000360_CUR2_OFFSET(x)                      (((x) >> 0) & 0x7FFFFFF)
+#define   C_000360_CUR2_OFFSET                         0xF8000000
+#define   S_000360_CUR2_LOCK(x)                        (((x) & 0x1) << 31)
+#define   G_000360_CUR2_LOCK(x)                        (((x) >> 31) & 0x1)
+#define   C_000360_CUR2_LOCK                           0x7FFFFFFF
+#define R_0003C0_GENMO_WT                            0x0003C0
+#define   S_0003C0_GENMO_MONO_ADDRESS_B(x)             (((x) & 0x1) << 0)
+#define   G_0003C0_GENMO_MONO_ADDRESS_B(x)             (((x) >> 0) & 0x1)
+#define   C_0003C0_GENMO_MONO_ADDRESS_B                0xFFFFFFFE
+#define   S_0003C0_VGA_RAM_EN(x)                       (((x) & 0x1) << 1)
+#define   G_0003C0_VGA_RAM_EN(x)                       (((x) >> 1) & 0x1)
+#define   C_0003C0_VGA_RAM_EN                          0xFFFFFFFD
+#define   S_0003C0_VGA_CKSEL(x)                        (((x) & 0x3) << 2)
+#define   G_0003C0_VGA_CKSEL(x)                        (((x) >> 2) & 0x3)
+#define   C_0003C0_VGA_CKSEL                           0xFFFFFFF3
+#define   S_0003C0_ODD_EVEN_MD_PGSEL(x)                (((x) & 0x1) << 5)
+#define   G_0003C0_ODD_EVEN_MD_PGSEL(x)                (((x) >> 5) & 0x1)
+#define   C_0003C0_ODD_EVEN_MD_PGSEL                   0xFFFFFFDF
+#define   S_0003C0_VGA_HSYNC_POL(x)                    (((x) & 0x1) << 6)
+#define   G_0003C0_VGA_HSYNC_POL(x)                    (((x) >> 6) & 0x1)
+#define   C_0003C0_VGA_HSYNC_POL                       0xFFFFFFBF
+#define   S_0003C0_VGA_VSYNC_POL(x)                    (((x) & 0x1) << 7)
+#define   G_0003C0_VGA_VSYNC_POL(x)                    (((x) >> 7) & 0x1)
+#define   C_0003C0_VGA_VSYNC_POL                       0xFFFFFF7F
+#define R_0003F8_CRTC2_GEN_CNTL                      0x0003F8
+#define   S_0003F8_CRTC2_DBL_SCAN_EN(x)                (((x) & 0x1) << 0)
+#define   G_0003F8_CRTC2_DBL_SCAN_EN(x)                (((x) >> 0) & 0x1)
+#define   C_0003F8_CRTC2_DBL_SCAN_EN                   0xFFFFFFFE
+#define   S_0003F8_CRTC2_INTERLACE_EN(x)               (((x) & 0x1) << 1)
+#define   G_0003F8_CRTC2_INTERLACE_EN(x)               (((x) >> 1) & 0x1)
+#define   C_0003F8_CRTC2_INTERLACE_EN                  0xFFFFFFFD
+#define   S_0003F8_CRTC2_SYNC_TRISTATE(x)              (((x) & 0x1) << 4)
+#define   G_0003F8_CRTC2_SYNC_TRISTATE(x)              (((x) >> 4) & 0x1)
+#define   C_0003F8_CRTC2_SYNC_TRISTATE                 0xFFFFFFEF
+#define   S_0003F8_CRTC2_HSYNC_TRISTATE(x)             (((x) & 0x1) << 5)
+#define   G_0003F8_CRTC2_HSYNC_TRISTATE(x)             (((x) >> 5) & 0x1)
+#define   C_0003F8_CRTC2_HSYNC_TRISTATE                0xFFFFFFDF
+#define   S_0003F8_CRTC2_VSYNC_TRISTATE(x)             (((x) & 0x1) << 6)
+#define   G_0003F8_CRTC2_VSYNC_TRISTATE(x)             (((x) >> 6) & 0x1)
+#define   C_0003F8_CRTC2_VSYNC_TRISTATE                0xFFFFFFBF
+#define   S_0003F8_CRT2_ON(x)                          (((x) & 0x1) << 7)
+#define   G_0003F8_CRT2_ON(x)                          (((x) >> 7) & 0x1)
+#define   C_0003F8_CRT2_ON                             0xFFFFFF7F
+#define   S_0003F8_CRTC2_PIX_WIDTH(x)                  (((x) & 0xF) << 8)
+#define   G_0003F8_CRTC2_PIX_WIDTH(x)                  (((x) >> 8) & 0xF)
+#define   C_0003F8_CRTC2_PIX_WIDTH                     0xFFFFF0FF
+#define   S_0003F8_CRTC2_ICON_EN(x)                    (((x) & 0x1) << 15)
+#define   G_0003F8_CRTC2_ICON_EN(x)                    (((x) >> 15) & 0x1)
+#define   C_0003F8_CRTC2_ICON_EN                       0xFFFF7FFF
+#define   S_0003F8_CRTC2_CUR_EN(x)                     (((x) & 0x1) << 16)
+#define   G_0003F8_CRTC2_CUR_EN(x)                     (((x) >> 16) & 0x1)
+#define   C_0003F8_CRTC2_CUR_EN                        0xFFFEFFFF
+#define   S_0003F8_CRTC2_CUR_MODE(x)                   (((x) & 0x7) << 20)
+#define   G_0003F8_CRTC2_CUR_MODE(x)                   (((x) >> 20) & 0x7)
+#define   C_0003F8_CRTC2_CUR_MODE                      0xFF8FFFFF
+#define   S_0003F8_CRTC2_DISPLAY_DIS(x)                (((x) & 0x1) << 23)
+#define   G_0003F8_CRTC2_DISPLAY_DIS(x)                (((x) >> 23) & 0x1)
+#define   C_0003F8_CRTC2_DISPLAY_DIS                   0xFF7FFFFF
+#define   S_0003F8_CRTC2_EN(x)                         (((x) & 0x1) << 25)
+#define   G_0003F8_CRTC2_EN(x)                         (((x) >> 25) & 0x1)
+#define   C_0003F8_CRTC2_EN                            0xFDFFFFFF
+#define   S_0003F8_CRTC2_DISP_REQ_EN_B(x)              (((x) & 0x1) << 26)
+#define   G_0003F8_CRTC2_DISP_REQ_EN_B(x)              (((x) >> 26) & 0x1)
+#define   C_0003F8_CRTC2_DISP_REQ_EN_B                 0xFBFFFFFF
+#define   S_0003F8_CRTC2_C_SYNC_EN(x)                  (((x) & 0x1) << 27)
+#define   G_0003F8_CRTC2_C_SYNC_EN(x)                  (((x) >> 27) & 0x1)
+#define   C_0003F8_CRTC2_C_SYNC_EN                     0xF7FFFFFF
+#define   S_0003F8_CRTC2_HSYNC_DIS(x)                  (((x) & 0x1) << 28)
+#define   G_0003F8_CRTC2_HSYNC_DIS(x)                  (((x) >> 28) & 0x1)
+#define   C_0003F8_CRTC2_HSYNC_DIS                     0xEFFFFFFF
+#define   S_0003F8_CRTC2_VSYNC_DIS(x)                  (((x) & 0x1) << 29)
+#define   G_0003F8_CRTC2_VSYNC_DIS(x)                  (((x) >> 29) & 0x1)
+#define   C_0003F8_CRTC2_VSYNC_DIS                     0xDFFFFFFF
+#define R_000420_OV0_SCALE_CNTL                      0x000420
+#define   S_000420_OV0_NO_READ_BEHIND_SCAN(x)          (((x) & 0x1) << 1)
+#define   G_000420_OV0_NO_READ_BEHIND_SCAN(x)          (((x) >> 1) & 0x1)
+#define   C_000420_OV0_NO_READ_BEHIND_SCAN             0xFFFFFFFD
+#define   S_000420_OV0_HORZ_PICK_NEAREST(x)            (((x) & 0x1) << 2)
+#define   G_000420_OV0_HORZ_PICK_NEAREST(x)            (((x) >> 2) & 0x1)
+#define   C_000420_OV0_HORZ_PICK_NEAREST               0xFFFFFFFB
+#define   S_000420_OV0_VERT_PICK_NEAREST(x)            (((x) & 0x1) << 3)
+#define   G_000420_OV0_VERT_PICK_NEAREST(x)            (((x) >> 3) & 0x1)
+#define   C_000420_OV0_VERT_PICK_NEAREST               0xFFFFFFF7
+#define   S_000420_OV0_SIGNED_UV(x)                    (((x) & 0x1) << 4)
+#define   G_000420_OV0_SIGNED_UV(x)                    (((x) >> 4) & 0x1)
+#define   C_000420_OV0_SIGNED_UV                       0xFFFFFFEF
+#define   S_000420_OV0_GAMMA_SEL(x)                    (((x) & 0x7) << 5)
+#define   G_000420_OV0_GAMMA_SEL(x)                    (((x) >> 5) & 0x7)
+#define   C_000420_OV0_GAMMA_SEL                       0xFFFFFF1F
+#define   S_000420_OV0_SURFACE_FORMAT(x)               (((x) & 0xF) << 8)
+#define   G_000420_OV0_SURFACE_FORMAT(x)               (((x) >> 8) & 0xF)
+#define   C_000420_OV0_SURFACE_FORMAT                  0xFFFFF0FF
+#define   S_000420_OV0_ADAPTIVE_DEINT(x)               (((x) & 0x1) << 12)
+#define   G_000420_OV0_ADAPTIVE_DEINT(x)               (((x) >> 12) & 0x1)
+#define   C_000420_OV0_ADAPTIVE_DEINT                  0xFFFFEFFF
+#define   S_000420_OV0_CRTC_SEL(x)                     (((x) & 0x1) << 14)
+#define   G_000420_OV0_CRTC_SEL(x)                     (((x) >> 14) & 0x1)
+#define   C_000420_OV0_CRTC_SEL                        0xFFFFBFFF
+#define   S_000420_OV0_BURST_PER_PLANE(x)              (((x) & 0x7F) << 16)
+#define   G_000420_OV0_BURST_PER_PLANE(x)              (((x) >> 16) & 0x7F)
+#define   C_000420_OV0_BURST_PER_PLANE                 0xFF80FFFF
+#define   S_000420_OV0_DOUBLE_BUFFER_REGS(x)           (((x) & 0x1) << 24)
+#define   G_000420_OV0_DOUBLE_BUFFER_REGS(x)           (((x) >> 24) & 0x1)
+#define   C_000420_OV0_DOUBLE_BUFFER_REGS              0xFEFFFFFF
+#define   S_000420_OV0_BANDWIDTH(x)                    (((x) & 0x1) << 26)
+#define   G_000420_OV0_BANDWIDTH(x)                    (((x) >> 26) & 0x1)
+#define   C_000420_OV0_BANDWIDTH                       0xFBFFFFFF
+#define   S_000420_OV0_LIN_TRANS_BYPASS(x)             (((x) & 0x1) << 28)
+#define   G_000420_OV0_LIN_TRANS_BYPASS(x)             (((x) >> 28) & 0x1)
+#define   C_000420_OV0_LIN_TRANS_BYPASS                0xEFFFFFFF
+#define   S_000420_OV0_INT_EMU(x)                      (((x) & 0x1) << 29)
+#define   G_000420_OV0_INT_EMU(x)                      (((x) >> 29) & 0x1)
+#define   C_000420_OV0_INT_EMU                         0xDFFFFFFF
+#define   S_000420_OV0_OVERLAY_EN(x)                   (((x) & 0x1) << 30)
+#define   G_000420_OV0_OVERLAY_EN(x)                   (((x) >> 30) & 0x1)
+#define   C_000420_OV0_OVERLAY_EN                      0xBFFFFFFF
+#define   S_000420_OV0_SOFT_RESET(x)                   (((x) & 0x1) << 31)
+#define   G_000420_OV0_SOFT_RESET(x)                   (((x) >> 31) & 0x1)
+#define   C_000420_OV0_SOFT_RESET                      0x7FFFFFFF
+#define R_00070C_CP_RB_RPTR_ADDR                     0x00070C
+#define   S_00070C_RB_RPTR_SWAP(x)                     (((x) & 0x3) << 0)
+#define   G_00070C_RB_RPTR_SWAP(x)                     (((x) >> 0) & 0x3)
+#define   C_00070C_RB_RPTR_SWAP                        0xFFFFFFFC
+#define   S_00070C_RB_RPTR_ADDR(x)                     (((x) & 0x3FFFFFFF) << 2)
+#define   G_00070C_RB_RPTR_ADDR(x)                     (((x) >> 2) & 0x3FFFFFFF)
+#define   C_00070C_RB_RPTR_ADDR                        0x00000003
+#define R_000740_CP_CSQ_CNTL                         0x000740
+#define   S_000740_CSQ_CNT_PRIMARY(x)                  (((x) & 0xFF) << 0)
+#define   G_000740_CSQ_CNT_PRIMARY(x)                  (((x) >> 0) & 0xFF)
+#define   C_000740_CSQ_CNT_PRIMARY                     0xFFFFFF00
+#define   S_000740_CSQ_CNT_INDIRECT(x)                 (((x) & 0xFF) << 8)
+#define   G_000740_CSQ_CNT_INDIRECT(x)                 (((x) >> 8) & 0xFF)
+#define   C_000740_CSQ_CNT_INDIRECT                    0xFFFF00FF
+#define   S_000740_CSQ_MODE(x)                         (((x) & 0xF) << 28)
+#define   G_000740_CSQ_MODE(x)                         (((x) >> 28) & 0xF)
+#define   C_000740_CSQ_MODE                            0x0FFFFFFF
+#define R_000770_SCRATCH_UMSK                        0x000770
+#define   S_000770_SCRATCH_UMSK(x)                     (((x) & 0x3F) << 0)
+#define   G_000770_SCRATCH_UMSK(x)                     (((x) >> 0) & 0x3F)
+#define   C_000770_SCRATCH_UMSK                        0xFFFFFFC0
+#define   S_000770_SCRATCH_SWAP(x)                     (((x) & 0x3) << 16)
+#define   G_000770_SCRATCH_SWAP(x)                     (((x) >> 16) & 0x3)
+#define   C_000770_SCRATCH_SWAP                        0xFFFCFFFF
+#define R_000774_SCRATCH_ADDR                        0x000774
+#define   S_000774_SCRATCH_ADDR(x)                     (((x) & 0x7FFFFFF) << 5)
+#define   G_000774_SCRATCH_ADDR(x)                     (((x) >> 5) & 0x7FFFFFF)
+#define   C_000774_SCRATCH_ADDR                        0x0000001F
+#define R_000E40_RBBM_STATUS                         0x000E40
+#define   S_000E40_CMDFIFO_AVAIL(x)                    (((x) & 0x7F) << 0)
+#define   G_000E40_CMDFIFO_AVAIL(x)                    (((x) >> 0) & 0x7F)
+#define   C_000E40_CMDFIFO_AVAIL                       0xFFFFFF80
+#define   S_000E40_HIRQ_ON_RBB(x)                      (((x) & 0x1) << 8)
+#define   G_000E40_HIRQ_ON_RBB(x)                      (((x) >> 8) & 0x1)
+#define   C_000E40_HIRQ_ON_RBB                         0xFFFFFEFF
+#define   S_000E40_CPRQ_ON_RBB(x)                      (((x) & 0x1) << 9)
+#define   G_000E40_CPRQ_ON_RBB(x)                      (((x) >> 9) & 0x1)
+#define   C_000E40_CPRQ_ON_RBB                         0xFFFFFDFF
+#define   S_000E40_CFRQ_ON_RBB(x)                      (((x) & 0x1) << 10)
+#define   G_000E40_CFRQ_ON_RBB(x)                      (((x) >> 10) & 0x1)
+#define   C_000E40_CFRQ_ON_RBB                         0xFFFFFBFF
+#define   S_000E40_HIRQ_IN_RTBUF(x)                    (((x) & 0x1) << 11)
+#define   G_000E40_HIRQ_IN_RTBUF(x)                    (((x) >> 11) & 0x1)
+#define   C_000E40_HIRQ_IN_RTBUF                       0xFFFFF7FF
+#define   S_000E40_CPRQ_IN_RTBUF(x)                    (((x) & 0x1) << 12)
+#define   G_000E40_CPRQ_IN_RTBUF(x)                    (((x) >> 12) & 0x1)
+#define   C_000E40_CPRQ_IN_RTBUF                       0xFFFFEFFF
+#define   S_000E40_CFRQ_IN_RTBUF(x)                    (((x) & 0x1) << 13)
+#define   G_000E40_CFRQ_IN_RTBUF(x)                    (((x) >> 13) & 0x1)
+#define   C_000E40_CFRQ_IN_RTBUF                       0xFFFFDFFF
+#define   S_000E40_CF_PIPE_BUSY(x)                     (((x) & 0x1) << 14)
+#define   G_000E40_CF_PIPE_BUSY(x)                     (((x) >> 14) & 0x1)
+#define   C_000E40_CF_PIPE_BUSY                        0xFFFFBFFF
+#define   S_000E40_ENG_EV_BUSY(x)                      (((x) & 0x1) << 15)
+#define   G_000E40_ENG_EV_BUSY(x)                      (((x) >> 15) & 0x1)
+#define   C_000E40_ENG_EV_BUSY                         0xFFFF7FFF
+#define   S_000E40_CP_CMDSTRM_BUSY(x)                  (((x) & 0x1) << 16)
+#define   G_000E40_CP_CMDSTRM_BUSY(x)                  (((x) >> 16) & 0x1)
+#define   C_000E40_CP_CMDSTRM_BUSY                     0xFFFEFFFF
+#define   S_000E40_E2_BUSY(x)                          (((x) & 0x1) << 17)
+#define   G_000E40_E2_BUSY(x)                          (((x) >> 17) & 0x1)
+#define   C_000E40_E2_BUSY                             0xFFFDFFFF
+#define   S_000E40_RB2D_BUSY(x)                        (((x) & 0x1) << 18)
+#define   G_000E40_RB2D_BUSY(x)                        (((x) >> 18) & 0x1)
+#define   C_000E40_RB2D_BUSY                           0xFFFBFFFF
+#define   S_000E40_RB3D_BUSY(x)                        (((x) & 0x1) << 19)
+#define   G_000E40_RB3D_BUSY(x)                        (((x) >> 19) & 0x1)
+#define   C_000E40_RB3D_BUSY                           0xFFF7FFFF
+#define   S_000E40_SE_BUSY(x)                          (((x) & 0x1) << 20)
+#define   G_000E40_SE_BUSY(x)                          (((x) >> 20) & 0x1)
+#define   C_000E40_SE_BUSY                             0xFFEFFFFF
+#define   S_000E40_RE_BUSY(x)                          (((x) & 0x1) << 21)
+#define   G_000E40_RE_BUSY(x)                          (((x) >> 21) & 0x1)
+#define   C_000E40_RE_BUSY                             0xFFDFFFFF
+#define   S_000E40_TAM_BUSY(x)                         (((x) & 0x1) << 22)
+#define   G_000E40_TAM_BUSY(x)                         (((x) >> 22) & 0x1)
+#define   C_000E40_TAM_BUSY                            0xFFBFFFFF
+#define   S_000E40_TDM_BUSY(x)                         (((x) & 0x1) << 23)
+#define   G_000E40_TDM_BUSY(x)                         (((x) >> 23) & 0x1)
+#define   C_000E40_TDM_BUSY                            0xFF7FFFFF
+#define   S_000E40_PB_BUSY(x)                          (((x) & 0x1) << 24)
+#define   G_000E40_PB_BUSY(x)                          (((x) >> 24) & 0x1)
+#define   C_000E40_PB_BUSY                             0xFEFFFFFF
+#define   S_000E40_GUI_ACTIVE(x)                       (((x) & 0x1) << 31)
+#define   G_000E40_GUI_ACTIVE(x)                       (((x) >> 31) & 0x1)
+#define   C_000E40_GUI_ACTIVE                          0x7FFFFFFF
+#endif
diff --git a/drivers/gpu/drm/radeon/r200.c b/drivers/gpu/drm/radeon/r200.c
new file mode 100644
index 000000000000..568c74bfba3d
--- /dev/null
+++ b/drivers/gpu/drm/radeon/r200.c
@@ -0,0 +1,456 @@
+/*
+ * Copyright 2008 Advanced Micro Devices, Inc.
+ * Copyright 2008 Red Hat Inc.
+ * Copyright 2009 Jerome Glisse.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors: Dave Airlie
+ *          Alex Deucher
+ *          Jerome Glisse
+ */
+#include "drmP.h"
+#include "drm.h"
+#include "radeon_drm.h"
+#include "radeon_reg.h"
+#include "radeon.h"
+#include "r200_reg_safe.h"
+#include "r100_track.h"
+static int r200_get_vtx_size_0(uint32_t vtx_fmt_0)
+{
+        int vtx_size, i;
+        vtx_size = 2;
+        if (vtx_fmt_0 & R200_VTX_Z0)
+                vtx_size++;
+        if (vtx_fmt_0 & R200_VTX_W0)
+                vtx_size++;
+        /* blend weight */
+        if (vtx_fmt_0 & (0x7 << R200_VTX_WEIGHT_COUNT_SHIFT))
+                vtx_size += (vtx_fmt_0 >> R200_VTX_WEIGHT_COUNT_SHIFT) & 0x7;
+        if (vtx_fmt_0 & R200_VTX_PV_MATRIX_SEL)
+                vtx_size++;
+        if (vtx_fmt_0 & R200_VTX_N0)
+                vtx_size += 3;
+        if (vtx_fmt_0 & R200_VTX_POINT_SIZE)
+                vtx_size++;
+        if (vtx_fmt_0 & R200_VTX_DISCRETE_FOG)
+                vtx_size++;
+        if (vtx_fmt_0 & R200_VTX_SHININESS_0)
+                vtx_size++;
+        if (vtx_fmt_0 & R200_VTX_SHININESS_1)
+                vtx_size++;
+        for (i = 0; i < 8; i++) {
+                int color_size = (vtx_fmt_0 >> (11 + 2*i)) & 0x3;
+                switch (color_size) {
+                case 0: break;
+                case 1: vtx_size++; break;
+                case 2: vtx_size += 3; break;
+                case 3: vtx_size += 4; break;
+                }
+        }
+        if (vtx_fmt_0 & R200_VTX_XY1)
+                vtx_size += 2;
+        if (vtx_fmt_0 & R200_VTX_Z1)
+                vtx_size++;
+        if (vtx_fmt_0 & R200_VTX_W1)
+                vtx_size++;
+        if (vtx_fmt_0 & R200_VTX_N1)
+                vtx_size += 3;
+        return vtx_size;
+}
+static int r200_get_vtx_size_1(uint32_t vtx_fmt_1)
+{
+        int vtx_size, i, tex_size;
+        vtx_size = 0;
+        for (i = 0; i < 6; i++) {
+                tex_size = (vtx_fmt_1 >> (i * 3)) & 0x7;
+                if (tex_size > 4)
+                        continue;
+                vtx_size += tex_size;
+        }
+        return vtx_size;
+}
+int r200_packet0_check(struct radeon_cs_parser *p,
+                       struct radeon_cs_packet *pkt,
+                       unsigned idx, unsigned reg)
+{
+        struct radeon_cs_chunk *ib_chunk;
+        struct radeon_cs_reloc *reloc;
+        struct r100_cs_track *track;
+        volatile uint32_t *ib;
+        uint32_t tmp;
+        int r;
+        int i;
+        int face;
+        u32 tile_flags = 0;
+        ib = p->ib->ptr;
+        ib_chunk = &p->chunks[p->chunk_ib_idx];
+        track = (struct r100_cs_track *)p->track;
+        switch (reg) {
+        case RADEON_CRTC_GUI_TRIG_VLINE:
+                r = r100_cs_packet_parse_vline(p);
+                if (r) {
+                        DRM_ERROR("No reloc for ib[%d]=0x%04X\n",
+                                  idx, reg);
+                        r100_cs_dump_packet(p, pkt);
+                        return r;
+                }
+                break;
+                /* FIXME: only allow PACKET3 blit? easier to check for out of
+                 * range access */
+        case RADEON_DST_PITCH_OFFSET:
+        case RADEON_SRC_PITCH_OFFSET:
+                r = r100_reloc_pitch_offset(p, pkt, idx, reg);
+                if (r)
+                        return r;
+                break;
+        case RADEON_RB3D_DEPTHOFFSET:
+                r = r100_cs_packet_next_reloc(p, &reloc);
+                if (r) {
+                        DRM_ERROR("No reloc for ib[%d]=0x%04X\n",
+                                  idx, reg);
+                        r100_cs_dump_packet(p, pkt);
+                        return r;
+                }
+                track->zb.robj = reloc->robj;
+                track->zb.offset = ib_chunk->kdata[idx];
+                ib[idx] = ib_chunk->kdata[idx] + ((u32)reloc->lobj.gpu_offset);
+                break;
+        case RADEON_RB3D_COLOROFFSET:
+                r = r100_cs_packet_next_reloc(p, &reloc);
+                if (r) {
+                        DRM_ERROR("No reloc for ib[%d]=0x%04X\n",
+                                  idx, reg);
+                        r100_cs_dump_packet(p, pkt);
+                        return r;
+                }
+                track->cb[0].robj = reloc->robj;
+                track->cb[0].offset = ib_chunk->kdata[idx];
+                ib[idx] = ib_chunk->kdata[idx] + ((u32)reloc->lobj.gpu_offset);
+                break;
+        case R200_PP_TXOFFSET_0:
+        case R200_PP_TXOFFSET_1:
+        case R200_PP_TXOFFSET_2:
+        case R200_PP_TXOFFSET_3:
+        case R200_PP_TXOFFSET_4:
+        case R200_PP_TXOFFSET_5:
+                i = (reg - R200_PP_TXOFFSET_0) / 24;
+                r = r100_cs_packet_next_reloc(p, &reloc);
+                if (r) {
+                        DRM_ERROR("No reloc for ib[%d]=0x%04X\n",
+                                  idx, reg);
+                        r100_cs_dump_packet(p, pkt);
+                        return r;
+                }
+                ib[idx] = ib_chunk->kdata[idx] + ((u32)reloc->lobj.gpu_offset);
+                track->textures[i].robj = reloc->robj;
+                break;
+        case R200_PP_CUBIC_OFFSET_F1_0:
+        case R200_PP_CUBIC_OFFSET_F2_0:
+        case R200_PP_CUBIC_OFFSET_F3_0:
+        case R200_PP_CUBIC_OFFSET_F4_0:
+        case R200_PP_CUBIC_OFFSET_F5_0:
+        case R200_PP_CUBIC_OFFSET_F1_1:
+        case R200_PP_CUBIC_OFFSET_F2_1:
+        case R200_PP_CUBIC_OFFSET_F3_1:
+        case R200_PP_CUBIC_OFFSET_F4_1:
+        case R200_PP_CUBIC_OFFSET_F5_1:
+        case R200_PP_CUBIC_OFFSET_F1_2:
+        case R200_PP_CUBIC_OFFSET_F2_2:
+        case R200_PP_CUBIC_OFFSET_F3_2:
+        case R200_PP_CUBIC_OFFSET_F4_2:
+        case R200_PP_CUBIC_OFFSET_F5_2:
+        case R200_PP_CUBIC_OFFSET_F1_3:
+        case R200_PP_CUBIC_OFFSET_F2_3:
+        case R200_PP_CUBIC_OFFSET_F3_3:
+        case R200_PP_CUBIC_OFFSET_F4_3:
+        case R200_PP_CUBIC_OFFSET_F5_3:
+        case R200_PP_CUBIC_OFFSET_F1_4:
+        case R200_PP_CUBIC_OFFSET_F2_4:
+        case R200_PP_CUBIC_OFFSET_F3_4:
+        case R200_PP_CUBIC_OFFSET_F4_4:
+        case R200_PP_CUBIC_OFFSET_F5_4:
+        case R200_PP_CUBIC_OFFSET_F1_5:
+        case R200_PP_CUBIC_OFFSET_F2_5:
+        case R200_PP_CUBIC_OFFSET_F3_5:
+        case R200_PP_CUBIC_OFFSET_F4_5:
+        case R200_PP_CUBIC_OFFSET_F5_5:
+                i = (reg - R200_PP_TXOFFSET_0) / 24;
+                face = (reg - ((i * 24) + R200_PP_TXOFFSET_0)) / 4;
+                r = r100_cs_packet_next_reloc(p, &reloc);
+                if (r) {
+                        DRM_ERROR("No reloc for ib[%d]=0x%04X\n",
+                                  idx, reg);
+                        r100_cs_dump_packet(p, pkt);
+                        return r;
+                }
+                track->textures[i].cube_info[face - 1].offset = ib_chunk->kdata[idx];
+                ib[idx] = ib_chunk->kdata[idx] + ((u32)reloc->lobj.gpu_offset);
+                track->textures[i].cube_info[face - 1].robj = reloc->robj;
+                break;
+        case RADEON_RE_WIDTH_HEIGHT:
+                track->maxy = ((ib_chunk->kdata[idx] >> 16) & 0x7FF);
+                break;
+        case RADEON_RB3D_COLORPITCH:
+                r = r100_cs_packet_next_reloc(p, &reloc);
+                if (r) {
+                        DRM_ERROR("No reloc for ib[%d]=0x%04X\n",
+                                  idx, reg);
+                        r100_cs_dump_packet(p, pkt);
+                        return r;
+                }
+                if (reloc->lobj.tiling_flags & RADEON_TILING_MACRO)
+                        tile_flags |= RADEON_COLOR_TILE_ENABLE;
+                if (reloc->lobj.tiling_flags & RADEON_TILING_MICRO)
+                        tile_flags |= RADEON_COLOR_MICROTILE_ENABLE;
+                tmp = ib_chunk->kdata[idx] & ~(0x7 << 16);
+                tmp |= tile_flags;
+                ib[idx] = tmp;
+                track->cb[0].pitch = ib_chunk->kdata[idx] & RADEON_COLORPITCH_MASK;
+                break;
+        case RADEON_RB3D_DEPTHPITCH:
+                track->zb.pitch = ib_chunk->kdata[idx] & RADEON_DEPTHPITCH_MASK;
+                break;
+        case RADEON_RB3D_CNTL:
+                switch ((ib_chunk->kdata[idx] >> RADEON_RB3D_COLOR_FORMAT_SHIFT) & 0x1f) {
+                case 7:
+                case 8:
+                case 9:
+                case 11:
+                case 12:
+                        track->cb[0].cpp = 1;
+                        break;
+                case 3:
+                case 4:
+                case 15:
+                        track->cb[0].cpp = 2;
+                        break;
+                case 6:
+                        track->cb[0].cpp = 4;
+                        break;
+                default:
+                        DRM_ERROR("Invalid color buffer format (%d) !\n",
+                                  ((ib_chunk->kdata[idx] >> RADEON_RB3D_COLOR_FORMAT_SHIFT) & 0x1f));
+                        return -EINVAL;
+                }
+                if (ib_chunk->kdata[idx] & RADEON_DEPTHXY_OFFSET_ENABLE) {
+                        DRM_ERROR("No support for depth xy offset in kms\n");
+                        return -EINVAL;
+                }
+                track->z_enabled = !!(ib_chunk->kdata[idx] & RADEON_Z_ENABLE);
+                break;
+        case RADEON_RB3D_ZSTENCILCNTL:
+                switch (ib_chunk->kdata[idx] & 0xf) {
+                case 0:
+                        track->zb.cpp = 2;
+                        break;
+                case 2:
+                case 3:
+                case 4:
+                case 5:
+                case 9:
+                case 11:
+                        track->zb.cpp = 4;
+                        break;
+                default:
+                        break;
+                }
+                break;
+        case RADEON_RB3D_ZPASS_ADDR:
+                r = r100_cs_packet_next_reloc(p, &reloc);
+                if (r) {
+                        DRM_ERROR("No reloc for ib[%d]=0x%04X\n",
+                                  idx, reg);
+                        r100_cs_dump_packet(p, pkt);
+                        return r;
+                }
+                ib[idx] = ib_chunk->kdata[idx] + ((u32)reloc->lobj.gpu_offset);
+                break;
+        case RADEON_PP_CNTL:
+                {
+                        uint32_t temp = ib_chunk->kdata[idx] >> 4;
+                        for (i = 0; i < track->num_texture; i++)
+                                track->textures[i].enabled = !!(temp & (1 << i));
+                }
+                break;
+        case RADEON_SE_VF_CNTL:
+                track->vap_vf_cntl = ib_chunk->kdata[idx];
+                break;
+        case 0x210c:
+                /* VAP_VF_MAX_VTX_INDX */
+                track->max_indx = ib_chunk->kdata[idx] & 0x00FFFFFFUL;
+                break;
+        case R200_SE_VTX_FMT_0:
+                track->vtx_size = r200_get_vtx_size_0(ib_chunk->kdata[idx]);
+                break;
+        case R200_SE_VTX_FMT_1:
+                track->vtx_size += r200_get_vtx_size_1(ib_chunk->kdata[idx]);
+                break;
+        case R200_PP_TXSIZE_0:
+        case R200_PP_TXSIZE_1:
+        case R200_PP_TXSIZE_2:
+        case R200_PP_TXSIZE_3:
+        case R200_PP_TXSIZE_4:
+        case R200_PP_TXSIZE_5:
+                i = (reg - R200_PP_TXSIZE_0) / 32;
+                track->textures[i].width = (ib_chunk->kdata[idx] & RADEON_TEX_USIZE_MASK) + 1;
+                track->textures[i].height = ((ib_chunk->kdata[idx] & RADEON_TEX_VSIZE_MASK) >> RADEON_TEX_VSIZE_SHIFT) + 1;
+                break;
+        case R200_PP_TXPITCH_0:
+        case R200_PP_TXPITCH_1:
+        case R200_PP_TXPITCH_2:
+        case R200_PP_TXPITCH_3:
+        case R200_PP_TXPITCH_4:
+        case R200_PP_TXPITCH_5:
+                i = (reg - R200_PP_TXPITCH_0) / 32;
+                track->textures[i].pitch = ib_chunk->kdata[idx] + 32;
+                break;
+        case R200_PP_TXFILTER_0:
+        case R200_PP_TXFILTER_1:
+        case R200_PP_TXFILTER_2:
+        case R200_PP_TXFILTER_3:
+        case R200_PP_TXFILTER_4:
+        case R200_PP_TXFILTER_5:
+                i = (reg - R200_PP_TXFILTER_0) / 32;
+                track->textures[i].num_levels = ((ib_chunk->kdata[idx] & R200_MAX_MIP_LEVEL_MASK)
+                                                 >> R200_MAX_MIP_LEVEL_SHIFT);
+                tmp = (ib_chunk->kdata[idx] >> 23) & 0x7;
+                if (tmp == 2 || tmp == 6)
+                        track->textures[i].roundup_w = false;
+                tmp = (ib_chunk->kdata[idx] >> 27) & 0x7;
+                if (tmp == 2 || tmp == 6)
+                        track->textures[i].roundup_h = false;
+                break;
+        case R200_PP_TXMULTI_CTL_0:
+        case R200_PP_TXMULTI_CTL_1:
+        case R200_PP_TXMULTI_CTL_2:
+        case R200_PP_TXMULTI_CTL_3:
+        case R200_PP_TXMULTI_CTL_4:
+        case R200_PP_TXMULTI_CTL_5:
+                i = (reg - R200_PP_TXMULTI_CTL_0) / 32;
+                break;
+        case R200_PP_TXFORMAT_X_0:
+        case R200_PP_TXFORMAT_X_1:
+        case R200_PP_TXFORMAT_X_2:
+        case R200_PP_TXFORMAT_X_3:
+        case R200_PP_TXFORMAT_X_4:
+        case R200_PP_TXFORMAT_X_5:
+                i = (reg - R200_PP_TXFORMAT_X_0) / 32;
+                track->textures[i].txdepth = ib_chunk->kdata[idx] & 0x7;
+                tmp = (ib_chunk->kdata[idx] >> 16) & 0x3;
+                /* 2D, 3D, CUBE */
+                switch (tmp) {
+                case 0:
+                case 5:
+                case 6:
+                case 7:
+                        track->textures[i].tex_coord_type = 0;
+                        break;
+                case 1:
+                        track->textures[i].tex_coord_type = 1;
+                        break;
+                case 2:
+                        track->textures[i].tex_coord_type = 2;
+                        break;
+                }
+                break;
+        case R200_PP_TXFORMAT_0:
+        case R200_PP_TXFORMAT_1:
+        case R200_PP_TXFORMAT_2:
+        case R200_PP_TXFORMAT_3:
+        case R200_PP_TXFORMAT_4:
+        case R200_PP_TXFORMAT_5:
+                i = (reg - R200_PP_TXFORMAT_0) / 32;
+                if (ib_chunk->kdata[idx] & R200_TXFORMAT_NON_POWER2) {
+                        track->textures[i].use_pitch = 1;
+                } else {
+                        track->textures[i].use_pitch = 0;
+                        track->textures[i].width = 1 << ((ib_chunk->kdata[idx] >> RADEON_TXFORMAT_WIDTH_SHIFT) & RADEON_TXFORMAT_WIDTH_MASK);
+                        track->textures[i].height = 1 << ((ib_chunk->kdata[idx] >> RADEON_TXFORMAT_HEIGHT_SHIFT) & RADEON_TXFORMAT_HEIGHT_MASK);
+                }
+                switch ((ib_chunk->kdata[idx] & RADEON_TXFORMAT_FORMAT_MASK)) {
+                case R200_TXFORMAT_I8:
+                case R200_TXFORMAT_RGB332:
+                case R200_TXFORMAT_Y8:
+                        track->textures[i].cpp = 1;
+                        break;
+                case R200_TXFORMAT_DXT1:
+                case R200_TXFORMAT_AI88:
+                case R200_TXFORMAT_ARGB1555:
+                case R200_TXFORMAT_RGB565:
+                case R200_TXFORMAT_ARGB4444:
+                case R200_TXFORMAT_VYUY422:
+                case R200_TXFORMAT_YVYU422:
+                case R200_TXFORMAT_LDVDU655:
+                case R200_TXFORMAT_DVDU88:
+                case R200_TXFORMAT_AVYU4444:
+                        track->textures[i].cpp = 2;
+                        break;
+                case R200_TXFORMAT_ARGB8888:
+                case R200_TXFORMAT_RGBA8888:
+                case R200_TXFORMAT_ABGR8888:
+                case R200_TXFORMAT_BGR111110:
+                case R200_TXFORMAT_LDVDU8888:
+                case R200_TXFORMAT_DXT23:
+                case R200_TXFORMAT_DXT45:
+                        track->textures[i].cpp = 4;
+                        break;
+                }
+                track->textures[i].cube_info[4].width = 1 << ((ib_chunk->kdata[idx] >> 16) & 0xf);
+                track->textures[i].cube_info[4].height = 1 << ((ib_chunk->kdata[idx] >> 20) & 0xf);
+                break;
+        case R200_PP_CUBIC_FACES_0:
+        case R200_PP_CUBIC_FACES_1:
+        case R200_PP_CUBIC_FACES_2:
+        case R200_PP_CUBIC_FACES_3:
+        case R200_PP_CUBIC_FACES_4:
+        case R200_PP_CUBIC_FACES_5:
+                tmp = ib_chunk->kdata[idx];
+                i = (reg - R200_PP_CUBIC_FACES_0) / 32;
+                for (face = 0; face < 4; face++) {
+                        track->textures[i].cube_info[face].width = 1 << ((tmp >> (face * 8)) & 0xf);
+                        track->textures[i].cube_info[face].height = 1 << ((tmp >> ((face * 8) + 4)) & 0xf);
+                }
+                break;
+        default:
+                printk(KERN_ERR "Forbidden register 0x%04X in cs at %d\n",
+                       reg, idx);
+                return -EINVAL;
+        }
+        return 0;
+}
+int r200_init(struct radeon_device *rdev)
+{
+        rdev->config.r100.reg_safe_bm = r200_reg_safe_bm;
+        rdev->config.r100.reg_safe_bm_size = ARRAY_SIZE(r200_reg_safe_bm);
+        return 0;
+}
diff --git a/drivers/gpu/drm/radeon/r300.c b/drivers/gpu/drm/radeon/r300.c
index 051bca6e3a4f..bb151ecdf8fc 100644
--- a/drivers/gpu/drm/radeon/r300.c
+++ b/drivers/gpu/drm/radeon/r300.c
@@ -31,7 +31,10 @@
 #include "radeon_reg.h"
 #include "radeon.h"
 #include "radeon_drm.h"
-#include "radeon_share.h"
+#include "r100_track.h"
+#include "r300d.h"
+#include "r300_reg_safe.h"
 /* r300,r350,rv350,rv370,rv380 depends on : */
 void r100_hdp_reset(struct radeon_device *rdev);
@@ -39,7 +42,6 @@ int r100_cp_reset(struct radeon_device *rdev);
 int r100_rb2d_reset(struct radeon_device *rdev);
 int r100_cp_init(struct radeon_device *rdev, unsigned ring_size);
 int r100_pci_gart_enable(struct radeon_device *rdev);
-void r100_pci_gart_disable(struct radeon_device *rdev);
 void r100_mc_setup(struct radeon_device *rdev);
 void r100_mc_disable_clients(struct radeon_device *rdev);
 int r100_gui_wait_for_idle(struct radeon_device *rdev);
@@ -47,14 +49,10 @@ int r100_cs_packet_parse(struct radeon_cs_parser *p,
                         struct radeon_cs_packet *pkt,
                         unsigned idx);
 int r100_cs_packet_parse_vline(struct radeon_cs_parser *p);
-int r100_cs_packet_next_reloc(struct radeon_cs_parser *p,
-                              struct radeon_cs_reloc **cs_reloc);
 int r100_cs_parse_packet0(struct radeon_cs_parser *p,
                          struct radeon_cs_packet *pkt,
                          const unsigned *auth, unsigned n,
                          radeon_packet0_check_t check);
-void r100_cs_dump_packet(struct radeon_cs_parser *p,
-                         struct radeon_cs_packet *pkt);
 int r100_cs_track_check_pkt3_indx_buffer(struct radeon_cs_parser *p,
                                         struct radeon_cs_packet *pkt,
                                         struct radeon_object *robj);
@@ -87,26 +85,57 @@ void rv370_pcie_gart_tlb_flush(struct radeon_device *rdev)
        mb();
 }
-int rv370_pcie_gart_enable(struct radeon_device *rdev)
+int rv370_pcie_gart_set_page(struct radeon_device *rdev, int i, uint64_t addr)
+{
+        void __iomem *ptr = (void *)rdev->gart.table.vram.ptr;
+        if (i < 0 || i > rdev->gart.num_gpu_pages) {
+                return -EINVAL;
+        }
+        addr = (lower_32_bits(addr) >> 8) |
+               ((upper_32_bits(addr) & 0xff) << 24) |
+               0xc;
+        /* on x86 we want this to be CPU endian, on powerpc
+         * on powerpc without HW swappers, it'll get swapped on way
+         * into VRAM - so no need for cpu_to_le32 on VRAM tables */
+        writel(addr, ((void __iomem *)ptr) + (i * 4));
+        return 0;
+}
+int rv370_pcie_gart_init(struct radeon_device *rdev)
 {
-        uint32_t table_addr;
-        uint32_t tmp;
        int r;
+        if (rdev->gart.table.vram.robj) {
+                WARN(1, "RV370 PCIE GART already initialized.\n");
+                return 0;
+        }
        /* Initialize common gart structure */
        r = radeon_gart_init(rdev);
-        if (r) {
+        if (r)
                return r;
-        }
        r = rv370_debugfs_pcie_gart_info_init(rdev);
-        if (r) {
+        if (r)
                DRM_ERROR("Failed to register debugfs file for PCIE gart !\n");
-        }
        rdev->gart.table_size = rdev->gart.num_gpu_pages * 4;
-        r = radeon_gart_table_vram_alloc(rdev);
+        rdev->asic->gart_tlb_flush = &rv370_pcie_gart_tlb_flush;
-        if (r) {
+        rdev->asic->gart_set_page = &rv370_pcie_gart_set_page;
-                return r;
+        return radeon_gart_table_vram_alloc(rdev);
+}
+int rv370_pcie_gart_enable(struct radeon_device *rdev)
+{
+        uint32_t table_addr;
+        uint32_t tmp;
+        int r;
+        if (rdev->gart.table.vram.robj == NULL) {
+                dev_err(rdev->dev, "No VRAM object for PCIE GART.\n");
+                return -EINVAL;
        }
+        r = radeon_gart_table_vram_pin(rdev);
+        if (r)
+                return r;
        /* discard memory request outside of configured range */
        tmp = RADEON_PCIE_TX_GART_UNMAPPED_ACCESS_DISCARD;
        WREG32_PCIE(RADEON_PCIE_TX_GART_CNTL, tmp);
@@ -128,7 +157,7 @@ int rv370_pcie_gart_enable(struct radeon_device *rdev)
        WREG32_PCIE(RADEON_PCIE_TX_GART_CNTL, tmp);
        rv370_pcie_gart_tlb_flush(rdev);
        DRM_INFO("PCIE GART of %uM enabled (table at 0x%08X).\n",
-                 rdev->mc.gtt_size >> 20, table_addr);
+                 (unsigned)(rdev->mc.gtt_size >> 20), table_addr);
        rdev->gart.ready = true;
        return 0;
 }
@@ -146,45 +175,13 @@ void rv370_pcie_gart_disable(struct radeon_device *rdev)
        }
 }
-int rv370_pcie_gart_set_page(struct radeon_device *rdev, int i, uint64_t addr)
+void rv370_pcie_gart_fini(struct radeon_device *rdev)
 {
-        void __iomem *ptr = (void *)rdev->gart.table.vram.ptr;
+        rv370_pcie_gart_disable(rdev);
+        radeon_gart_table_vram_free(rdev);
-        if (i < 0 || i > rdev->gart.num_gpu_pages) {
+        radeon_gart_fini(rdev);
-                return -EINVAL;
-        }
-        addr = (lower_32_bits(addr) >> 8) |
-               ((upper_32_bits(addr) & 0xff) << 24) |
-               0xc;
-        /* on x86 we want this to be CPU endian, on powerpc
-         * on powerpc without HW swappers, it'll get swapped on way
-         * into VRAM - so no need for cpu_to_le32 on VRAM tables */
-        writel(addr, ((void __iomem *)ptr) + (i * 4));
-        return 0;
-}
-int r300_gart_enable(struct radeon_device *rdev)
-{
-#if __OS_HAS_AGP
-        if (rdev->flags & RADEON_IS_AGP) {
-                if (rdev->family > CHIP_RV350) {
-                        rv370_pcie_gart_disable(rdev);
-                } else {
-                        r100_pci_gart_disable(rdev);
-                }
-                return 0;
-        }
-#endif
-        if (rdev->flags & RADEON_IS_PCIE) {
-                rdev->asic->gart_disable = &rv370_pcie_gart_disable;
-                rdev->asic->gart_tlb_flush = &rv370_pcie_gart_tlb_flush;
-                rdev->asic->gart_set_page = &rv370_pcie_gart_set_page;
-                return rv370_pcie_gart_enable(rdev);
-        }
-        return r100_pci_gart_enable(rdev);
 }
 /*
 * MC
 */
@@ -232,14 +229,6 @@ int r300_mc_init(struct radeon_device *rdev)
 void r300_mc_fini(struct radeon_device *rdev)
 {
-        if (rdev->flags & RADEON_IS_PCIE) {
-                rv370_pcie_gart_disable(rdev);
-                radeon_gart_table_vram_free(rdev);
-        } else {
-                r100_pci_gart_disable(rdev);
-                radeon_gart_table_ram_free(rdev);
-        }
-        radeon_gart_fini(rdev);
 }
@@ -704,307 +693,13 @@ int rv370_debugfs_pcie_gart_info_init(struct radeon_device *rdev)
 /*
 * CS functions
 */
-struct r300_cs_track_cb {
-        struct radeon_object    *robj;
-        unsigned                pitch;
-        unsigned                cpp;
-        unsigned                offset;
-};
-struct r300_cs_track_array {
-        struct radeon_object    *robj;
-        unsigned                esize;
-};
-struct r300_cs_track_texture {
-        struct radeon_object    *robj;
-        unsigned                pitch;
-        unsigned                width;
-        unsigned                height;
-        unsigned                num_levels;
-        unsigned                cpp;
-        unsigned                tex_coord_type;
-        unsigned                txdepth;
-        unsigned                width_11;
-        unsigned                height_11;
-        bool                    use_pitch;
-        bool                    enabled;
-        bool                    roundup_w;
-        bool                    roundup_h;
-};
-struct r300_cs_track {
-        unsigned                        num_cb;
-        unsigned                        maxy;
-        unsigned                        vtx_size;
-        unsigned                        vap_vf_cntl;
-        unsigned                        immd_dwords;
-        unsigned                        num_arrays;
-        unsigned                        max_indx;
-        struct r300_cs_track_array      arrays[11];
-        struct r300_cs_track_cb         cb[4];
-        struct r300_cs_track_cb         zb;
-        struct r300_cs_track_texture    textures[16];
-        bool                            z_enabled;
-};
-static inline void r300_cs_track_texture_print(struct r300_cs_track_texture *t)
-{
-        DRM_ERROR("pitch                      %d\n", t->pitch);
-        DRM_ERROR("width                      %d\n", t->width);
-        DRM_ERROR("height                     %d\n", t->height);
-        DRM_ERROR("num levels                 %d\n", t->num_levels);
-        DRM_ERROR("depth                      %d\n", t->txdepth);
-        DRM_ERROR("bpp                        %d\n", t->cpp);
-        DRM_ERROR("coordinate type            %d\n", t->tex_coord_type);
-        DRM_ERROR("width round to power of 2  %d\n", t->roundup_w);
-        DRM_ERROR("height round to power of 2 %d\n", t->roundup_h);
-}
-static inline int r300_cs_track_texture_check(struct radeon_device *rdev,
-                                              struct r300_cs_track *track)
-{
-        struct radeon_object *robj;
-        unsigned long size;
-        unsigned u, i, w, h;
-        for (u = 0; u < 16; u++) {
-                if (!track->textures[u].enabled)
-                        continue;
-                robj = track->textures[u].robj;
-                if (robj == NULL) {
-                        DRM_ERROR("No texture bound to unit %u\n", u);
-                        return -EINVAL;
-                }
-                size = 0;
-                for (i = 0; i <= track->textures[u].num_levels; i++) {
-                        if (track->textures[u].use_pitch) {
-                                w = track->textures[u].pitch / (1 << i);
-                        } else {
-                                w = track->textures[u].width / (1 << i);
-                                if (rdev->family >= CHIP_RV515)
-                                        w |= track->textures[u].width_11;
-                                if (track->textures[u].roundup_w)
-                                        w = roundup_pow_of_two(w);
-                        }
-                        h = track->textures[u].height / (1 << i);
-                        if (rdev->family >= CHIP_RV515)
-                                h |= track->textures[u].height_11;
-                        if (track->textures[u].roundup_h)
-                                h = roundup_pow_of_two(h);
-                        size += w * h;
-                }
-                size *= track->textures[u].cpp;
-                switch (track->textures[u].tex_coord_type) {
-                case 0:
-                        break;
-                case 1:
-                        size *= (1 << track->textures[u].txdepth);
-                        break;
-                case 2:
-                        size *= 6;
-                        break;
-                default:
-                        DRM_ERROR("Invalid texture coordinate type %u for unit "
-                                  "%u\n", track->textures[u].tex_coord_type, u);
-                        return -EINVAL;
-                }
-                if (size > radeon_object_size(robj)) {
-                        DRM_ERROR("Texture of unit %u needs %lu bytes but is "
-                                  "%lu\n", u, size, radeon_object_size(robj));
-                        r300_cs_track_texture_print(&track->textures[u]);
-                        return -EINVAL;
-                }
-        }
-        return 0;
-}
-int r300_cs_track_check(struct radeon_device *rdev, struct r300_cs_track *track)
-{
-        unsigned i;
-        unsigned long size;
-        unsigned prim_walk;
-        unsigned nverts;
-        for (i = 0; i < track->num_cb; i++) {
-                if (track->cb[i].robj == NULL) {
-                        DRM_ERROR("[drm] No buffer for color buffer %d !\n", i);
-                        return -EINVAL;
-                }
-                size = track->cb[i].pitch * track->cb[i].cpp * track->maxy;
-                size += track->cb[i].offset;
-                if (size > radeon_object_size(track->cb[i].robj)) {
-                        DRM_ERROR("[drm] Buffer too small for color buffer %d "
-                                  "(need %lu have %lu) !\n", i, size,
-                                  radeon_object_size(track->cb[i].robj));
-                        DRM_ERROR("[drm] color buffer %d (%u %u %u %u)\n",
-                                  i, track->cb[i].pitch, track->cb[i].cpp,
-                                  track->cb[i].offset, track->maxy);
-                        return -EINVAL;
-                }
-        }
-        if (track->z_enabled) {
-                if (track->zb.robj == NULL) {
-                        DRM_ERROR("[drm] No buffer for z buffer !\n");
-                        return -EINVAL;
-                }
-                size = track->zb.pitch * track->zb.cpp * track->maxy;
-                size += track->zb.offset;
-                if (size > radeon_object_size(track->zb.robj)) {
-                        DRM_ERROR("[drm] Buffer too small for z buffer "
-                                  "(need %lu have %lu) !\n", size,
-                                  radeon_object_size(track->zb.robj));
-                        return -EINVAL;
-                }
-        }
-        prim_walk = (track->vap_vf_cntl >> 4) & 0x3;
-        nverts = (track->vap_vf_cntl >> 16) & 0xFFFF;
-        switch (prim_walk) {
-        case 1:
-                for (i = 0; i < track->num_arrays; i++) {
-                        size = track->arrays[i].esize * track->max_indx * 4;
-                        if (track->arrays[i].robj == NULL) {
-                                DRM_ERROR("(PW %u) Vertex array %u no buffer "
-                                          "bound\n", prim_walk, i);
-                                return -EINVAL;
-                        }
-                        if (size > radeon_object_size(track->arrays[i].robj)) {
-                                DRM_ERROR("(PW %u) Vertex array %u need %lu dwords "
-                                           "have %lu dwords\n", prim_walk, i,
-                                           size >> 2,
-                                           radeon_object_size(track->arrays[i].robj) >> 2);
-                                DRM_ERROR("Max indices %u\n", track->max_indx);
-                                return -EINVAL;
-                        }
-                }
-                break;
-        case 2:
-                for (i = 0; i < track->num_arrays; i++) {
-                        size = track->arrays[i].esize * (nverts - 1) * 4;
-                        if (track->arrays[i].robj == NULL) {
-                                DRM_ERROR("(PW %u) Vertex array %u no buffer "
-                                          "bound\n", prim_walk, i);
-                                return -EINVAL;
-                        }
-                        if (size > radeon_object_size(track->arrays[i].robj)) {
-                                DRM_ERROR("(PW %u) Vertex array %u need %lu dwords "
-                                           "have %lu dwords\n", prim_walk, i, size >> 2,
-                                           radeon_object_size(track->arrays[i].robj) >> 2);
-                                return -EINVAL;
-                        }
-                }
-                break;
-        case 3:
-                size = track->vtx_size * nverts;
-                if (size != track->immd_dwords) {
-                        DRM_ERROR("IMMD draw %u dwors but needs %lu dwords\n",
-                                  track->immd_dwords, size);
-                        DRM_ERROR("VAP_VF_CNTL.NUM_VERTICES %u, VTX_SIZE %u\n",
-                                  nverts, track->vtx_size);
-                        return -EINVAL;
-                }
-                break;
-        default:
-                DRM_ERROR("[drm] Invalid primitive walk %d for VAP_VF_CNTL\n",
-                          prim_walk);
-                return -EINVAL;
-        }
-        return r300_cs_track_texture_check(rdev, track);
-}
-static inline void r300_cs_track_clear(struct r300_cs_track *track)
-{
-        unsigned i;
-        track->num_cb = 4;
-        track->maxy = 4096;
-        for (i = 0; i < track->num_cb; i++) {
-                track->cb[i].robj = NULL;
-                track->cb[i].pitch = 8192;
-                track->cb[i].cpp = 16;
-                track->cb[i].offset = 0;
-        }
-        track->z_enabled = true;
-        track->zb.robj = NULL;
-        track->zb.pitch = 8192;
-        track->zb.cpp = 4;
-        track->zb.offset = 0;
-        track->vtx_size = 0x7F;
-        track->immd_dwords = 0xFFFFFFFFUL;
-        track->num_arrays = 11;
-        track->max_indx = 0x00FFFFFFUL;
-        for (i = 0; i < track->num_arrays; i++) {
-                track->arrays[i].robj = NULL;
-                track->arrays[i].esize = 0x7F;
-        }
-        for (i = 0; i < 16; i++) {
-                track->textures[i].pitch = 16536;
-                track->textures[i].width = 16536;
-                track->textures[i].height = 16536;
-                track->textures[i].width_11 = 1 << 11;
-                track->textures[i].height_11 = 1 << 11;
-                track->textures[i].num_levels = 12;
-                track->textures[i].txdepth = 16;
-                track->textures[i].cpp = 64;
-                track->textures[i].tex_coord_type = 1;
-                track->textures[i].robj = NULL;
-                /* CS IB emission code makes sure texture unit are disabled */
-                track->textures[i].enabled = false;
-                track->textures[i].roundup_w = true;
-                track->textures[i].roundup_h = true;
-        }
-}
-static const unsigned r300_reg_safe_bm[159] = {
-        0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-        0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-        0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-        0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-        0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-        0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-        0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-        0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-        0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-        0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-        0x17FF1FFF, 0xFFFFFFFC, 0xFFFFFFFF, 0xFF30FFBF,
-        0xFFFFFFF8, 0xC3E6FFFF, 0xFFFFF6DF, 0xFFFFFFFF,
-        0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-        0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-        0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFF03F,
-        0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-        0xFFFFFFFF, 0xFFFFEFCE, 0xF00EBFFF, 0x007C0000,
-        0xF0000078, 0xFF000009, 0xFFFFFFFF, 0xFFFFFFFF,
-        0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-        0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-        0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-        0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-        0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-        0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-        0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-        0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-        0xFFFFF7FF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-        0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-        0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-        0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-        0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-        0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-        0xFFFFFC78, 0xFFFFFFFF, 0xFFFFFFFE, 0xFFFFFFFF,
-        0x38FF8F50, 0xFFF88082, 0xF000000C, 0xFAE009FF,
-        0x0000FFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0x00000000,
-        0x00000000, 0x0000C100, 0x00000000, 0x00000000,
-        0x00000000, 0x00000000, 0x00000000, 0x00000000,
-        0x00000000, 0xFFFF0000, 0xFFFFFFFF, 0xFF80FFFF,
-        0x00000000, 0x00000000, 0x00000000, 0x00000000,
-        0x0003FC01, 0xFFFFFCF8, 0xFF800B19,
-};
 static int r300_packet0_check(struct radeon_cs_parser *p,
                struct radeon_cs_packet *pkt,
                unsigned idx, unsigned reg)
 {
        struct radeon_cs_chunk *ib_chunk;
        struct radeon_cs_reloc *reloc;
-        struct r300_cs_track *track;
+        struct r100_cs_track *track;
        volatile uint32_t *ib;
        uint32_t tmp, tile_flags = 0;
        unsigned i;
@@ -1012,7 +707,7 @@ static int r300_packet0_check(struct radeon_cs_parser *p,
        ib = p->ib->ptr;
        ib_chunk = &p->chunks[p->chunk_ib_idx];
-        track = (struct r300_cs_track*)p->track;
+        track = (struct r100_cs_track *)p->track;
        switch(reg) {
        case AVIVO_D1MODE_VLINE_START_END:
        case RADEON_CRTC_GUI_TRIG_VLINE:
@@ -1026,28 +721,9 @@ static int r300_packet0_check(struct radeon_cs_parser *p,
                break;
        case RADEON_DST_PITCH_OFFSET:
        case RADEON_SRC_PITCH_OFFSET:
-                r = r100_cs_packet_next_reloc(p, &reloc);
+                r = r100_reloc_pitch_offset(p, pkt, idx, reg);
-                if (r) {
+                if (r)
-                        DRM_ERROR("No reloc for ib[%d]=0x%04X\n",
-                                        idx, reg);
-                        r100_cs_dump_packet(p, pkt);
                        return r;
-                }
-                tmp = ib_chunk->kdata[idx] & 0x003fffff;
-                tmp += (((u32)reloc->lobj.gpu_offset) >> 10);
-                if (reloc->lobj.tiling_flags & RADEON_TILING_MACRO)
-                        tile_flags |= RADEON_DST_TILE_MACRO;
-                if (reloc->lobj.tiling_flags & RADEON_TILING_MICRO) {
-                        if (reg == RADEON_SRC_PITCH_OFFSET) {
-                                DRM_ERROR("Cannot src blit from microtiled surface\n");
-                                r100_cs_dump_packet(p, pkt);
-                                return -EINVAL;
-                        }
-                        tile_flags |= RADEON_DST_TILE_MICRO;
-                }
-                tmp |= tile_flags;
-                ib[idx] = (ib_chunk->kdata[idx] & 0x3fc00000) | tmp;
                break;
        case R300_RB3D_COLOROFFSET0:
        case R300_RB3D_COLOROFFSET1:
@@ -1256,42 +932,41 @@ static int r300_packet0_check(struct radeon_cs_parser *p,
                tmp = (ib_chunk->kdata[idx] >> 25) & 0x3;
                track->textures[i].tex_coord_type = tmp;
                switch ((ib_chunk->kdata[idx] & 0x1F)) {
-                case 0:
+                case R300_TX_FORMAT_X8:
-                case 2:
+                case R300_TX_FORMAT_Y4X4:
-                case 5:
+                case R300_TX_FORMAT_Z3Y3X2:
-                case 18:
-                case 20:
-                case 21:
                        track->textures[i].cpp = 1;
                        break;
-                case 1:
+                case R300_TX_FORMAT_X16:
-                case 3:
+                case R300_TX_FORMAT_Y8X8:
-                case 6:
+                case R300_TX_FORMAT_Z5Y6X5:
-                case 7:
+                case R300_TX_FORMAT_Z6Y5X5:
-                case 10:
+                case R300_TX_FORMAT_W4Z4Y4X4:
-                case 11:
+                case R300_TX_FORMAT_W1Z5Y5X5:
-                case 19:
+                case R300_TX_FORMAT_DXT1:
-                case 22:
+                case R300_TX_FORMAT_D3DMFT_CxV8U8:
-                case 24:
+                case R300_TX_FORMAT_B8G8_B8G8:
+                case R300_TX_FORMAT_G8R8_G8B8:
                        track->textures[i].cpp = 2;
                        break;
-                case 4:
+                case R300_TX_FORMAT_Y16X16:
-                case 8:
+                case R300_TX_FORMAT_Z11Y11X10:
-                case 9:
+                case R300_TX_FORMAT_Z10Y11X11:
-                case 12:
+                case R300_TX_FORMAT_W8Z8Y8X8:
-                case 13:
+                case R300_TX_FORMAT_W2Z10Y10X10:
-                case 23:
+                case 0x17:
-                case 25:
+                case R300_TX_FORMAT_FL_I32:
-                case 27:
+                case 0x1e:
-                case 30:
+                case R300_TX_FORMAT_DXT3:
+                case R300_TX_FORMAT_DXT5:
                        track->textures[i].cpp = 4;
                        break;
-                case 14:
+                case R300_TX_FORMAT_W16Z16Y16X16:
-                case 26:
+                case R300_TX_FORMAT_FL_R16G16B16A16:
-                case 28:
+                case R300_TX_FORMAT_FL_I32A32:
                        track->textures[i].cpp = 8;
                        break;
-                case 29:
+                case R300_TX_FORMAT_FL_R32G32B32A32:
                        track->textures[i].cpp = 16;
                        break;
                default:
@@ -1319,11 +994,11 @@ static int r300_packet0_check(struct radeon_cs_parser *p,
        case 0x443C:
                /* TX_FILTER0_[0-15] */
                i = (reg - 0x4400) >> 2;
-                tmp = ib_chunk->kdata[idx] & 0x7;;
+                tmp = ib_chunk->kdata[idx] & 0x7;
                if (tmp == 2 || tmp == 4 || tmp == 6) {
                        track->textures[i].roundup_w = false;
                }
-                tmp = (ib_chunk->kdata[idx] >> 3) & 0x7;;
+                tmp = (ib_chunk->kdata[idx] >> 3) & 0x7;
                if (tmp == 2 || tmp == 4 || tmp == 6) {
                        track->textures[i].roundup_h = false;
                }
@@ -1411,8 +1086,9 @@ static int r300_packet3_check(struct radeon_cs_parser *p,
                              struct radeon_cs_packet *pkt)
 {
        struct radeon_cs_chunk *ib_chunk;
        struct radeon_cs_reloc *reloc;
-        struct r300_cs_track *track;
+        struct r100_cs_track *track;
        volatile uint32_t *ib;
        unsigned idx;
        unsigned i, c;
@@ -1421,7 +1097,7 @@ static int r300_packet3_check(struct radeon_cs_parser *p,
        ib = p->ib->ptr;
        ib_chunk = &p->chunks[p->chunk_ib_idx];
        idx = pkt->idx + 1;
-        track = (struct r300_cs_track*)p->track;
+        track = (struct r100_cs_track *)p->track;
        switch(pkt->opcode) {
        case PACKET3_3D_LOAD_VBPNTR:
                c = ib_chunk->kdata[idx++] & 0x1F;
@@ -1488,7 +1164,7 @@ static int r300_packet3_check(struct radeon_cs_parser *p,
                }
                track->vap_vf_cntl = ib_chunk->kdata[idx+1];
                track->immd_dwords = pkt->count - 1;
-                r = r300_cs_track_check(p->rdev, track);
+                r = r100_cs_track_check(p->rdev, track);
                if (r) {
                        return r;
                }
@@ -1503,35 +1179,35 @@ static int r300_packet3_check(struct radeon_cs_parser *p,
                }
                track->vap_vf_cntl = ib_chunk->kdata[idx];
                track->immd_dwords = pkt->count;
-                r = r300_cs_track_check(p->rdev, track);
+                r = r100_cs_track_check(p->rdev, track);
                if (r) {
                        return r;
                }
                break;
        case PACKET3_3D_DRAW_VBUF:
                track->vap_vf_cntl = ib_chunk->kdata[idx + 1];
-                r = r300_cs_track_check(p->rdev, track);
+                r = r100_cs_track_check(p->rdev, track);
                if (r) {
                        return r;
                }
                break;
        case PACKET3_3D_DRAW_VBUF_2:
                track->vap_vf_cntl = ib_chunk->kdata[idx];
-                r = r300_cs_track_check(p->rdev, track);
+                r = r100_cs_track_check(p->rdev, track);
                if (r) {
                        return r;
                }
                break;
        case PACKET3_3D_DRAW_INDX:
                track->vap_vf_cntl = ib_chunk->kdata[idx + 1];
-                r = r300_cs_track_check(p->rdev, track);
+                r = r100_cs_track_check(p->rdev, track);
                if (r) {
                        return r;
                }
                break;
        case PACKET3_3D_DRAW_INDX_2:
                track->vap_vf_cntl = ib_chunk->kdata[idx];
-                r = r300_cs_track_check(p->rdev, track);
+                r = r100_cs_track_check(p->rdev, track);
                if (r) {
                        return r;
                }
@@ -1548,11 +1224,12 @@ static int r300_packet3_check(struct radeon_cs_parser *p,
 int r300_cs_parse(struct radeon_cs_parser *p)
 {
        struct radeon_cs_packet pkt;
-        struct r300_cs_track track;
+        struct r100_cs_track *track;
        int r;
-        r300_cs_track_clear(&track);
+        track = kzalloc(sizeof(*track), GFP_KERNEL);
-        p->track = &track;
+        r100_cs_track_clear(p->rdev, track);
+        p->track = track;
        do {
                r = r100_cs_packet_parse(p, &pkt, p->idx);
                if (r) {
@@ -1582,9 +1259,48 @@ int r300_cs_parse(struct radeon_cs_parser *p)
        return 0;
 }
-int r300_init(struct radeon_device *rdev)
+void r300_set_reg_safe(struct radeon_device *rdev)
 {
        rdev->config.r300.reg_safe_bm = r300_reg_safe_bm;
        rdev->config.r300.reg_safe_bm_size = ARRAY_SIZE(r300_reg_safe_bm);
+}
+int r300_init(struct radeon_device *rdev)
+{
+        r300_set_reg_safe(rdev);
        return 0;
 }
+void r300_mc_program(struct radeon_device *rdev)
+{
+        struct r100_mc_save save;
+        int r;
+        r = r100_debugfs_mc_info_init(rdev);
+        if (r) {
+                dev_err(rdev->dev, "Failed to create r100_mc debugfs file.\n");
+        }
+        /* Stops all mc clients */
+        r100_mc_stop(rdev, &save);
+        if (rdev->flags & RADEON_IS_AGP) {
+                WREG32(R_00014C_MC_AGP_LOCATION,
+                        S_00014C_MC_AGP_START(rdev->mc.gtt_start >> 16) |
+                        S_00014C_MC_AGP_TOP(rdev->mc.gtt_end >> 16));
+                WREG32(R_000170_AGP_BASE, lower_32_bits(rdev->mc.agp_base));
+                WREG32(R_00015C_AGP_BASE_2,
+                        upper_32_bits(rdev->mc.agp_base) & 0xff);
+        } else {
+                WREG32(R_00014C_MC_AGP_LOCATION, 0x0FFFFFFF);
+                WREG32(R_000170_AGP_BASE, 0);
+                WREG32(R_00015C_AGP_BASE_2, 0);
+        }
+        /* Wait for mc idle */
+        if (r300_mc_wait_for_idle(rdev))
+                DRM_INFO("Failed to wait MC idle before programming MC.\n");
+        /* Program MC, should be a 32bits limited address space */
+        WREG32(R_000148_MC_FB_LOCATION,
+                S_000148_MC_FB_START(rdev->mc.vram_start >> 16) |
+                S_000148_MC_FB_TOP(rdev->mc.vram_end >> 16));
+        r100_mc_resume(rdev, &save);
+}
diff --git a/drivers/gpu/drm/radeon/r300.h b/drivers/gpu/drm/radeon/r300.h
deleted file mode 100644
index 8486b4da9d69..000000000000
--- a/drivers/gpu/drm/radeon/r300.h
+++ /dev/null
@@ -1,36 +0,0 @@
-/*
- * Copyright 2008 Advanced Micro Devices, Inc.
- * Copyright 2008 Red Hat Inc.
- * Copyright 2009 Jerome Glisse.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- *
- * Authors: Dave Airlie
- *          Alex Deucher
- *          Jerome Glisse
- */
-#ifndef R300_H
-#define R300_H
-struct r300_asic {
-        const unsigned  *reg_safe_bm;
-        unsigned        reg_safe_bm_size;
-};
-#endif
diff --git a/drivers/gpu/drm/radeon/r300d.h b/drivers/gpu/drm/radeon/r300d.h
new file mode 100644
index 000000000000..d4fa3eb1074f
--- /dev/null
+++ b/drivers/gpu/drm/radeon/r300d.h
@@ -0,0 +1,101 @@
+/*
+ * Copyright 2008 Advanced Micro Devices, Inc.
+ * Copyright 2008 Red Hat Inc.
+ * Copyright 2009 Jerome Glisse.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors: Dave Airlie
+ *          Alex Deucher
+ *          Jerome Glisse
+ */
+#ifndef __R300D_H__
+#define __R300D_H__
+#define CP_PACKET0                      0x00000000
+#define         PACKET0_BASE_INDEX_SHIFT        0
+#define         PACKET0_BASE_INDEX_MASK         (0x1ffff << 0)
+#define         PACKET0_COUNT_SHIFT             16
+#define         PACKET0_COUNT_MASK              (0x3fff << 16)
+#define CP_PACKET1                      0x40000000
+#define CP_PACKET2                      0x80000000
+#define         PACKET2_PAD_SHIFT               0
+#define         PACKET2_PAD_MASK                (0x3fffffff << 0)
+#define CP_PACKET3                      0xC0000000
+#define         PACKET3_IT_OPCODE_SHIFT         8
+#define         PACKET3_IT_OPCODE_MASK          (0xff << 8)
+#define         PACKET3_COUNT_SHIFT             16
+#define         PACKET3_COUNT_MASK              (0x3fff << 16)
+/* PACKET3 op code */
+#define         PACKET3_NOP                     0x10
+#define         PACKET3_3D_DRAW_VBUF            0x28
+#define         PACKET3_3D_DRAW_IMMD            0x29
+#define         PACKET3_3D_DRAW_INDX            0x2A
+#define         PACKET3_3D_LOAD_VBPNTR          0x2F
+#define         PACKET3_INDX_BUFFER             0x33
+#define         PACKET3_3D_DRAW_VBUF_2          0x34
+#define         PACKET3_3D_DRAW_IMMD_2          0x35
+#define         PACKET3_3D_DRAW_INDX_2          0x36
+#define         PACKET3_BITBLT_MULTI            0x9B
+#define PACKET0(reg, n) (CP_PACKET0 |                                   \
+                         REG_SET(PACKET0_BASE_INDEX, (reg) >> 2) |      \
+                         REG_SET(PACKET0_COUNT, (n)))
+#define PACKET2(v)      (CP_PACKET2 | REG_SET(PACKET2_PAD, (v)))
+#define PACKET3(op, n)  (CP_PACKET3 |                                   \
+                         REG_SET(PACKET3_IT_OPCODE, (op)) |             \
+                         REG_SET(PACKET3_COUNT, (n)))
+#define PACKET_TYPE0    0
+#define PACKET_TYPE1    1
+#define PACKET_TYPE2    2
+#define PACKET_TYPE3    3
+#define CP_PACKET_GET_TYPE(h) (((h) >> 30) & 3)
+#define CP_PACKET_GET_COUNT(h) (((h) >> 16) & 0x3FFF)
+#define CP_PACKET0_GET_REG(h) (((h) & 0x1FFF) << 2)
+#define CP_PACKET0_GET_ONE_REG_WR(h) (((h) >> 15) & 1)
+#define CP_PACKET3_GET_OPCODE(h) (((h) >> 8) & 0xFF)
+/* Registers */
+#define R_000148_MC_FB_LOCATION                      0x000148
+#define   S_000148_MC_FB_START(x)                      (((x) & 0xFFFF) << 0)
+#define   G_000148_MC_FB_START(x)                      (((x) >> 0) & 0xFFFF)
+#define   C_000148_MC_FB_START                         0xFFFF0000
+#define   S_000148_MC_FB_TOP(x)                        (((x) & 0xFFFF) << 16)
+#define   G_000148_MC_FB_TOP(x)                        (((x) >> 16) & 0xFFFF)
+#define   C_000148_MC_FB_TOP                           0x0000FFFF
+#define R_00014C_MC_AGP_LOCATION                     0x00014C
+#define   S_00014C_MC_AGP_START(x)                     (((x) & 0xFFFF) << 0)
+#define   G_00014C_MC_AGP_START(x)                     (((x) >> 0) & 0xFFFF)
+#define   C_00014C_MC_AGP_START                        0xFFFF0000
+#define   S_00014C_MC_AGP_TOP(x)                       (((x) & 0xFFFF) << 16)
+#define   G_00014C_MC_AGP_TOP(x)                       (((x) >> 16) & 0xFFFF)
+#define   C_00014C_MC_AGP_TOP                          0x0000FFFF
+#define R_00015C_AGP_BASE_2                          0x00015C
+#define   S_00015C_AGP_BASE_ADDR_2(x)                  (((x) & 0xF) << 0)
+#define   G_00015C_AGP_BASE_ADDR_2(x)                  (((x) >> 0) & 0xF)
+#define   C_00015C_AGP_BASE_ADDR_2                     0xFFFFFFF0
+#define R_000170_AGP_BASE                            0x000170
+#define   S_000170_AGP_BASE_ADDR(x)                    (((x) & 0xFFFFFFFF) << 0)
+#define   G_000170_AGP_BASE_ADDR(x)                    (((x) >> 0) & 0xFFFFFFFF)
+#define   C_000170_AGP_BASE_ADDR                       0x00000000
+#endif
diff --git a/drivers/gpu/drm/radeon/r420.c b/drivers/gpu/drm/radeon/r420.c
index 97426a6f370f..49a2fdc57d27 100644
--- a/drivers/gpu/drm/radeon/r420.c
+++ b/drivers/gpu/drm/radeon/r420.c
@@ -29,47 +29,13 @@
 #include "drmP.h"
 #include "radeon_reg.h"
 #include "radeon.h"
+#include "atom.h"
+#include "r420d.h"
-/* r420,r423,rv410 depends on : */
-void r100_pci_gart_disable(struct radeon_device *rdev);
-void r100_hdp_reset(struct radeon_device *rdev);
-void r100_mc_setup(struct radeon_device *rdev);
-int r100_gui_wait_for_idle(struct radeon_device *rdev);
-void r100_mc_disable_clients(struct radeon_device *rdev);
-void r300_vram_info(struct radeon_device *rdev);
-int r300_mc_wait_for_idle(struct radeon_device *rdev);
-int rv370_pcie_gart_enable(struct radeon_device *rdev);
-void rv370_pcie_gart_disable(struct radeon_device *rdev);
-/* This files gather functions specifics to :
- * r420,r423,rv410
- *
- * Some of these functions might be used by newer ASICs.
- */
-void r420_gpu_init(struct radeon_device *rdev);
-int r420_debugfs_pipes_info_init(struct radeon_device *rdev);
-/*
- * MC
- */
 int r420_mc_init(struct radeon_device *rdev)
 {
        int r;
-        if (r100_debugfs_rbbm_init(rdev)) {
-                DRM_ERROR("Failed to register debugfs file for RBBM !\n");
-        }
-        if (r420_debugfs_pipes_info_init(rdev)) {
-                DRM_ERROR("Failed to register debugfs file for pipes !\n");
-        }
-        r420_gpu_init(rdev);
-        r100_pci_gart_disable(rdev);
-        if (rdev->flags & RADEON_IS_PCIE) {
-                rv370_pcie_gart_disable(rdev);
-        }
        /* Setup GPU memory space */
        rdev->mc.vram_location = 0xFFFFFFFFUL;
        rdev->mc.gtt_location = 0xFFFFFFFFUL;
@@ -87,33 +53,9 @@ int r420_mc_init(struct radeon_device *rdev)
        if (r) {
                return r;
        }
-        /* Program GPU memory space */
-        r100_mc_disable_clients(rdev);
-        if (r300_mc_wait_for_idle(rdev)) {
-                printk(KERN_WARNING "Failed to wait MC idle while "
-                       "programming pipes. Bad things might happen.\n");
-        }
-        r100_mc_setup(rdev);
        return 0;
 }
-void r420_mc_fini(struct radeon_device *rdev)
-{
-        rv370_pcie_gart_disable(rdev);
-        radeon_gart_table_vram_free(rdev);
-        radeon_gart_fini(rdev);
-}
-/*
- * Global GPU functions
- */
-void r420_errata(struct radeon_device *rdev)
-{
-        rdev->pll_errata = 0;
-}
 void r420_pipes_init(struct radeon_device *rdev)
 {
        unsigned tmp;
@@ -122,6 +64,11 @@ void r420_pipes_init(struct radeon_device *rdev)
        /* GA_ENHANCE workaround TCL deadlock issue */
        WREG32(0x4274, (1 << 0) | (1 << 1) | (1 << 2) | (1 << 3));
+        /* add idle wait as per freedesktop.org bug 24041 */
+        if (r100_gui_wait_for_idle(rdev)) {
+                printk(KERN_WARNING "Failed to wait GUI idle while "
+                       "programming pipes. Bad things might happen.\n");
+        }
        /* get max number of pipes */
        gb_pipe_select = RREG32(0x402C);
        num_pipes = ((gb_pipe_select >> 12) & 3) + 1;
@@ -179,25 +126,239 @@ void r420_pipes_init(struct radeon_device *rdev)
                 rdev->num_gb_pipes, rdev->num_z_pipes);
 }
-void r420_gpu_init(struct radeon_device *rdev)
+u32 r420_mc_rreg(struct radeon_device *rdev, u32 reg)
+{
+        u32 r;
+        WREG32(R_0001F8_MC_IND_INDEX, S_0001F8_MC_IND_ADDR(reg));
+        r = RREG32(R_0001FC_MC_IND_DATA);
+        return r;
+}
+void r420_mc_wreg(struct radeon_device *rdev, u32 reg, u32 v)
+{
+        WREG32(R_0001F8_MC_IND_INDEX, S_0001F8_MC_IND_ADDR(reg) |
+                S_0001F8_MC_IND_WR_EN(1));
+        WREG32(R_0001FC_MC_IND_DATA, v);
+}
+static void r420_debugfs(struct radeon_device *rdev)
+{
+        if (r100_debugfs_rbbm_init(rdev)) {
+                DRM_ERROR("Failed to register debugfs file for RBBM !\n");
+        }
+        if (r420_debugfs_pipes_info_init(rdev)) {
+                DRM_ERROR("Failed to register debugfs file for pipes !\n");
+        }
+}
+static void r420_clock_resume(struct radeon_device *rdev)
+{
+        u32 sclk_cntl;
+        sclk_cntl = RREG32_PLL(R_00000D_SCLK_CNTL);
+        sclk_cntl |= S_00000D_FORCE_CP(1) | S_00000D_FORCE_VIP(1);
+        if (rdev->family == CHIP_R420)
+                sclk_cntl |= S_00000D_FORCE_PX(1) | S_00000D_FORCE_TX(1);
+        WREG32_PLL(R_00000D_SCLK_CNTL, sclk_cntl);
+}
+static int r420_startup(struct radeon_device *rdev)
 {
-        r100_hdp_reset(rdev);
+        int r;
+        r300_mc_program(rdev);
+        /* Initialize GART (initialize after TTM so we can allocate
+         * memory through TTM but finalize after TTM) */
+        if (rdev->flags & RADEON_IS_PCIE) {
+                r = rv370_pcie_gart_enable(rdev);
+                if (r)
+                        return r;
+        }
+        if (rdev->flags & RADEON_IS_PCI) {
+                r = r100_pci_gart_enable(rdev);
+                if (r)
+                        return r;
+        }
        r420_pipes_init(rdev);
-        if (r300_mc_wait_for_idle(rdev)) {
+        /* Enable IRQ */
-                printk(KERN_WARNING "Failed to wait MC idle while "
+        rdev->irq.sw_int = true;
-                       "programming pipes. Bad things might happen.\n");
+        r100_irq_set(rdev);
+        /* 1M ring buffer */
+        r = r100_cp_init(rdev, 1024 * 1024);
+        if (r) {
+                dev_err(rdev->dev, "failled initializing CP (%d).\n", r);
+                return r;
+        }
+        r = r100_wb_init(rdev);
+        if (r) {
+                dev_err(rdev->dev, "failled initializing WB (%d).\n", r);
+        }
+        r = r100_ib_init(rdev);
+        if (r) {
+                dev_err(rdev->dev, "failled initializing IB (%d).\n", r);
+                return r;
        }
+        return 0;
 }
+int r420_resume(struct radeon_device *rdev)
+{
+        /* Make sur GART are not working */
+        if (rdev->flags & RADEON_IS_PCIE)
+                rv370_pcie_gart_disable(rdev);
+        if (rdev->flags & RADEON_IS_PCI)
+                r100_pci_gart_disable(rdev);
+        /* Resume clock before doing reset */
+        r420_clock_resume(rdev);
+        /* Reset gpu before posting otherwise ATOM will enter infinite loop */
+        if (radeon_gpu_reset(rdev)) {
+                dev_warn(rdev->dev, "GPU reset failed ! (0xE40=0x%08X, 0x7C0=0x%08X)\n",
+                        RREG32(R_000E40_RBBM_STATUS),
+                        RREG32(R_0007C0_CP_STAT));
+        }
+        /* check if cards are posted or not */
+        if (rdev->is_atom_bios) {
+                atom_asic_init(rdev->mode_info.atom_context);
+        } else {
+                radeon_combios_asic_init(rdev->ddev);
+        }
+        /* Resume clock after posting */
+        r420_clock_resume(rdev);
-/*
+        return r420_startup(rdev);
- * r420,r423,rv410 VRAM info
+}
- */
-void r420_vram_info(struct radeon_device *rdev)
+int r420_suspend(struct radeon_device *rdev)
 {
-        r300_vram_info(rdev);
+        r100_cp_disable(rdev);
+        r100_wb_disable(rdev);
+        r100_irq_disable(rdev);
+        if (rdev->flags & RADEON_IS_PCIE)
+                rv370_pcie_gart_disable(rdev);
+        if (rdev->flags & RADEON_IS_PCI)
+                r100_pci_gart_disable(rdev);
+        return 0;
+}
+void r420_fini(struct radeon_device *rdev)
+{
+        r100_cp_fini(rdev);
+        r100_wb_fini(rdev);
+        r100_ib_fini(rdev);
+        radeon_gem_fini(rdev);
+        if (rdev->flags & RADEON_IS_PCIE)
+                rv370_pcie_gart_fini(rdev);
+        if (rdev->flags & RADEON_IS_PCI)
+                r100_pci_gart_fini(rdev);
+        radeon_agp_fini(rdev);
+        radeon_irq_kms_fini(rdev);
+        radeon_fence_driver_fini(rdev);
+        radeon_object_fini(rdev);
+        if (rdev->is_atom_bios) {
+                radeon_atombios_fini(rdev);
+        } else {
+                radeon_combios_fini(rdev);
+        }
+        kfree(rdev->bios);
+        rdev->bios = NULL;
 }
+int r420_init(struct radeon_device *rdev)
+{
+        int r;
+        rdev->new_init_path = true;
+        /* Initialize scratch registers */
+        radeon_scratch_init(rdev);
+        /* Initialize surface registers */
+        radeon_surface_init(rdev);
+        /* TODO: disable VGA need to use VGA request */
+        /* BIOS*/
+        if (!radeon_get_bios(rdev)) {
+                if (ASIC_IS_AVIVO(rdev))
+                        return -EINVAL;
+        }
+        if (rdev->is_atom_bios) {
+                r = radeon_atombios_init(rdev);
+                if (r) {
+                        return r;
+                }
+        } else {
+                r = radeon_combios_init(rdev);
+                if (r) {
+                        return r;
+                }
+        }
+        /* Reset gpu before posting otherwise ATOM will enter infinite loop */
+        if (radeon_gpu_reset(rdev)) {
+                dev_warn(rdev->dev,
+                        "GPU reset failed ! (0xE40=0x%08X, 0x7C0=0x%08X)\n",
+                        RREG32(R_000E40_RBBM_STATUS),
+                        RREG32(R_0007C0_CP_STAT));
+        }
+        /* check if cards are posted or not */
+        if (!radeon_card_posted(rdev) && rdev->bios) {
+                DRM_INFO("GPU not posted. posting now...\n");
+                if (rdev->is_atom_bios) {
+                        atom_asic_init(rdev->mode_info.atom_context);
+                } else {
+                        radeon_combios_asic_init(rdev->ddev);
+                }
+        }
+        /* Initialize clocks */
+        radeon_get_clock_info(rdev->ddev);
+        /* Get vram informations */
+        r300_vram_info(rdev);
+        /* Initialize memory controller (also test AGP) */
+        r = r420_mc_init(rdev);
+        if (r) {
+                return r;
+        }
+        r420_debugfs(rdev);
+        /* Fence driver */
+        r = radeon_fence_driver_init(rdev);
+        if (r) {
+                return r;
+        }
+        r = radeon_irq_kms_init(rdev);
+        if (r) {
+                return r;
+        }
+        /* Memory manager */
+        r = radeon_object_init(rdev);
+        if (r) {
+                return r;
+        }
+        if (rdev->flags & RADEON_IS_PCIE) {
+                r = rv370_pcie_gart_init(rdev);
+                if (r)
+                        return r;
+        }
+        if (rdev->flags & RADEON_IS_PCI) {
+                r = r100_pci_gart_init(rdev);
+                if (r)
+                        return r;
+        }
+        r300_set_reg_safe(rdev);
+        rdev->accel_working = true;
+        r = r420_startup(rdev);
+        if (r) {
+                /* Somethings want wront with the accel init stop accel */
+                dev_err(rdev->dev, "Disabling GPU acceleration\n");
+                r420_suspend(rdev);
+                r100_cp_fini(rdev);
+                r100_wb_fini(rdev);
+                r100_ib_fini(rdev);
+                if (rdev->flags & RADEON_IS_PCIE)
+                        rv370_pcie_gart_fini(rdev);
+                if (rdev->flags & RADEON_IS_PCI)
+                        r100_pci_gart_fini(rdev);
+                radeon_agp_fini(rdev);
+                radeon_irq_kms_fini(rdev);
+                rdev->accel_working = false;
+        }
+        return 0;
+}
 /*
 * Debugfs info
diff --git a/drivers/gpu/drm/radeon/r420d.h b/drivers/gpu/drm/radeon/r420d.h
new file mode 100644
index 000000000000..a48a7db1e2aa
--- /dev/null
+++ b/drivers/gpu/drm/radeon/r420d.h
@@ -0,0 +1,249 @@
+/*
+ * Copyright 2008 Advanced Micro Devices, Inc.
+ * Copyright 2008 Red Hat Inc.
+ * Copyright 2009 Jerome Glisse.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors: Dave Airlie
+ *          Alex Deucher
+ *          Jerome Glisse
+ */
+#ifndef R420D_H
+#define R420D_H
+#define R_0001F8_MC_IND_INDEX                        0x0001F8
+#define   S_0001F8_MC_IND_ADDR(x)                      (((x) & 0x7F) << 0)
+#define   G_0001F8_MC_IND_ADDR(x)                      (((x) >> 0) & 0x7F)
+#define   C_0001F8_MC_IND_ADDR                         0xFFFFFF80
+#define   S_0001F8_MC_IND_WR_EN(x)                     (((x) & 0x1) << 8)
+#define   G_0001F8_MC_IND_WR_EN(x)                     (((x) >> 8) & 0x1)
+#define   C_0001F8_MC_IND_WR_EN                        0xFFFFFEFF
+#define R_0001FC_MC_IND_DATA                         0x0001FC
+#define   S_0001FC_MC_IND_DATA(x)                      (((x) & 0xFFFFFFFF) << 0)
+#define   G_0001FC_MC_IND_DATA(x)                      (((x) >> 0) & 0xFFFFFFFF)
+#define   C_0001FC_MC_IND_DATA                         0x00000000
+#define R_0007C0_CP_STAT                             0x0007C0
+#define   S_0007C0_MRU_BUSY(x)                         (((x) & 0x1) << 0)
+#define   G_0007C0_MRU_BUSY(x)                         (((x) >> 0) & 0x1)
+#define   C_0007C0_MRU_BUSY                            0xFFFFFFFE
+#define   S_0007C0_MWU_BUSY(x)                         (((x) & 0x1) << 1)
+#define   G_0007C0_MWU_BUSY(x)                         (((x) >> 1) & 0x1)
+#define   C_0007C0_MWU_BUSY                            0xFFFFFFFD
+#define   S_0007C0_RSIU_BUSY(x)                        (((x) & 0x1) << 2)
+#define   G_0007C0_RSIU_BUSY(x)                        (((x) >> 2) & 0x1)
+#define   C_0007C0_RSIU_BUSY                           0xFFFFFFFB
+#define   S_0007C0_RCIU_BUSY(x)                        (((x) & 0x1) << 3)
+#define   G_0007C0_RCIU_BUSY(x)                        (((x) >> 3) & 0x1)
+#define   C_0007C0_RCIU_BUSY                           0xFFFFFFF7
+#define   S_0007C0_CSF_PRIMARY_BUSY(x)                 (((x) & 0x1) << 9)
+#define   G_0007C0_CSF_PRIMARY_BUSY(x)                 (((x) >> 9) & 0x1)
+#define   C_0007C0_CSF_PRIMARY_BUSY                    0xFFFFFDFF
+#define   S_0007C0_CSF_INDIRECT_BUSY(x)                (((x) & 0x1) << 10)
+#define   G_0007C0_CSF_INDIRECT_BUSY(x)                (((x) >> 10) & 0x1)
+#define   C_0007C0_CSF_INDIRECT_BUSY                   0xFFFFFBFF
+#define   S_0007C0_CSQ_PRIMARY_BUSY(x)                 (((x) & 0x1) << 11)
+#define   G_0007C0_CSQ_PRIMARY_BUSY(x)                 (((x) >> 11) & 0x1)
+#define   C_0007C0_CSQ_PRIMARY_BUSY                    0xFFFFF7FF
+#define   S_0007C0_CSQ_INDIRECT_BUSY(x)                (((x) & 0x1) << 12)
+#define   G_0007C0_CSQ_INDIRECT_BUSY(x)                (((x) >> 12) & 0x1)
+#define   C_0007C0_CSQ_INDIRECT_BUSY                   0xFFFFEFFF
+#define   S_0007C0_CSI_BUSY(x)                         (((x) & 0x1) << 13)
+#define   G_0007C0_CSI_BUSY(x)                         (((x) >> 13) & 0x1)
+#define   C_0007C0_CSI_BUSY                            0xFFFFDFFF
+#define   S_0007C0_CSF_INDIRECT2_BUSY(x)               (((x) & 0x1) << 14)
+#define   G_0007C0_CSF_INDIRECT2_BUSY(x)               (((x) >> 14) & 0x1)
+#define   C_0007C0_CSF_INDIRECT2_BUSY                  0xFFFFBFFF
+#define   S_0007C0_CSQ_INDIRECT2_BUSY(x)               (((x) & 0x1) << 15)
+#define   G_0007C0_CSQ_INDIRECT2_BUSY(x)               (((x) >> 15) & 0x1)
+#define   C_0007C0_CSQ_INDIRECT2_BUSY                  0xFFFF7FFF
+#define   S_0007C0_GUIDMA_BUSY(x)                      (((x) & 0x1) << 28)
+#define   G_0007C0_GUIDMA_BUSY(x)                      (((x) >> 28) & 0x1)
+#define   C_0007C0_GUIDMA_BUSY                         0xEFFFFFFF
+#define   S_0007C0_VIDDMA_BUSY(x)                      (((x) & 0x1) << 29)
+#define   G_0007C0_VIDDMA_BUSY(x)                      (((x) >> 29) & 0x1)
+#define   C_0007C0_VIDDMA_BUSY                         0xDFFFFFFF
+#define   S_0007C0_CMDSTRM_BUSY(x)                     (((x) & 0x1) << 30)
+#define   G_0007C0_CMDSTRM_BUSY(x)                     (((x) >> 30) & 0x1)
+#define   C_0007C0_CMDSTRM_BUSY                        0xBFFFFFFF
+#define   S_0007C0_CP_BUSY(x)                          (((x) & 0x1) << 31)
+#define   G_0007C0_CP_BUSY(x)                          (((x) >> 31) & 0x1)
+#define   C_0007C0_CP_BUSY                             0x7FFFFFFF
+#define R_000E40_RBBM_STATUS                         0x000E40
+#define   S_000E40_CMDFIFO_AVAIL(x)                    (((x) & 0x7F) << 0)
+#define   G_000E40_CMDFIFO_AVAIL(x)                    (((x) >> 0) & 0x7F)
+#define   C_000E40_CMDFIFO_AVAIL                       0xFFFFFF80
+#define   S_000E40_HIRQ_ON_RBB(x)                      (((x) & 0x1) << 8)
+#define   G_000E40_HIRQ_ON_RBB(x)                      (((x) >> 8) & 0x1)
+#define   C_000E40_HIRQ_ON_RBB                         0xFFFFFEFF
+#define   S_000E40_CPRQ_ON_RBB(x)                      (((x) & 0x1) << 9)
+#define   G_000E40_CPRQ_ON_RBB(x)                      (((x) >> 9) & 0x1)
+#define   C_000E40_CPRQ_ON_RBB                         0xFFFFFDFF
+#define   S_000E40_CFRQ_ON_RBB(x)                      (((x) & 0x1) << 10)
+#define   G_000E40_CFRQ_ON_RBB(x)                      (((x) >> 10) & 0x1)
+#define   C_000E40_CFRQ_ON_RBB                         0xFFFFFBFF
+#define   S_000E40_HIRQ_IN_RTBUF(x)                    (((x) & 0x1) << 11)
+#define   G_000E40_HIRQ_IN_RTBUF(x)                    (((x) >> 11) & 0x1)
+#define   C_000E40_HIRQ_IN_RTBUF                       0xFFFFF7FF
+#define   S_000E40_CPRQ_IN_RTBUF(x)                    (((x) & 0x1) << 12)
+#define   G_000E40_CPRQ_IN_RTBUF(x)                    (((x) >> 12) & 0x1)
+#define   C_000E40_CPRQ_IN_RTBUF                       0xFFFFEFFF
+#define   S_000E40_CFRQ_IN_RTBUF(x)                    (((x) & 0x1) << 13)
+#define   G_000E40_CFRQ_IN_RTBUF(x)                    (((x) >> 13) & 0x1)
+#define   C_000E40_CFRQ_IN_RTBUF                       0xFFFFDFFF
+#define   S_000E40_CF_PIPE_BUSY(x)                     (((x) & 0x1) << 14)
+#define   G_000E40_CF_PIPE_BUSY(x)                     (((x) >> 14) & 0x1)
+#define   C_000E40_CF_PIPE_BUSY                        0xFFFFBFFF
+#define   S_000E40_ENG_EV_BUSY(x)                      (((x) & 0x1) << 15)
+#define   G_000E40_ENG_EV_BUSY(x)                      (((x) >> 15) & 0x1)
+#define   C_000E40_ENG_EV_BUSY                         0xFFFF7FFF
+#define   S_000E40_CP_CMDSTRM_BUSY(x)                  (((x) & 0x1) << 16)
+#define   G_000E40_CP_CMDSTRM_BUSY(x)                  (((x) >> 16) & 0x1)
+#define   C_000E40_CP_CMDSTRM_BUSY                     0xFFFEFFFF
+#define   S_000E40_E2_BUSY(x)                          (((x) & 0x1) << 17)
+#define   G_000E40_E2_BUSY(x)                          (((x) >> 17) & 0x1)
+#define   C_000E40_E2_BUSY                             0xFFFDFFFF
+#define   S_000E40_RB2D_BUSY(x)                        (((x) & 0x1) << 18)
+#define   G_000E40_RB2D_BUSY(x)                        (((x) >> 18) & 0x1)
+#define   C_000E40_RB2D_BUSY                           0xFFFBFFFF
+#define   S_000E40_RB3D_BUSY(x)                        (((x) & 0x1) << 19)
+#define   G_000E40_RB3D_BUSY(x)                        (((x) >> 19) & 0x1)
+#define   C_000E40_RB3D_BUSY                           0xFFF7FFFF
+#define   S_000E40_VAP_BUSY(x)                         (((x) & 0x1) << 20)
+#define   G_000E40_VAP_BUSY(x)                         (((x) >> 20) & 0x1)
+#define   C_000E40_VAP_BUSY                            0xFFEFFFFF
+#define   S_000E40_RE_BUSY(x)                          (((x) & 0x1) << 21)
+#define   G_000E40_RE_BUSY(x)                          (((x) >> 21) & 0x1)
+#define   C_000E40_RE_BUSY                             0xFFDFFFFF
+#define   S_000E40_TAM_BUSY(x)                         (((x) & 0x1) << 22)
+#define   G_000E40_TAM_BUSY(x)                         (((x) >> 22) & 0x1)
+#define   C_000E40_TAM_BUSY                            0xFFBFFFFF
+#define   S_000E40_TDM_BUSY(x)                         (((x) & 0x1) << 23)
+#define   G_000E40_TDM_BUSY(x)                         (((x) >> 23) & 0x1)
+#define   C_000E40_TDM_BUSY                            0xFF7FFFFF
+#define   S_000E40_PB_BUSY(x)                          (((x) & 0x1) << 24)
+#define   G_000E40_PB_BUSY(x)                          (((x) >> 24) & 0x1)
+#define   C_000E40_PB_BUSY                             0xFEFFFFFF
+#define   S_000E40_TIM_BUSY(x)                         (((x) & 0x1) << 25)
+#define   G_000E40_TIM_BUSY(x)                         (((x) >> 25) & 0x1)
+#define   C_000E40_TIM_BUSY                            0xFDFFFFFF
+#define   S_000E40_GA_BUSY(x)                          (((x) & 0x1) << 26)
+#define   G_000E40_GA_BUSY(x)                          (((x) >> 26) & 0x1)
+#define   C_000E40_GA_BUSY                             0xFBFFFFFF
+#define   S_000E40_CBA2D_BUSY(x)                       (((x) & 0x1) << 27)
+#define   G_000E40_CBA2D_BUSY(x)                       (((x) >> 27) & 0x1)
+#define   C_000E40_CBA2D_BUSY                          0xF7FFFFFF
+#define   S_000E40_GUI_ACTIVE(x)                       (((x) & 0x1) << 31)
+#define   G_000E40_GUI_ACTIVE(x)                       (((x) >> 31) & 0x1)
+#define   C_000E40_GUI_ACTIVE                          0x7FFFFFFF
+/* CLK registers */
+#define R_00000D_SCLK_CNTL                           0x00000D
+#define   S_00000D_SCLK_SRC_SEL(x)                     (((x) & 0x7) << 0)
+#define   G_00000D_SCLK_SRC_SEL(x)                     (((x) >> 0) & 0x7)
+#define   C_00000D_SCLK_SRC_SEL                        0xFFFFFFF8
+#define   S_00000D_CP_MAX_DYN_STOP_LAT(x)              (((x) & 0x1) << 3)
+#define   G_00000D_CP_MAX_DYN_STOP_LAT(x)              (((x) >> 3) & 0x1)
+#define   C_00000D_CP_MAX_DYN_STOP_LAT                 0xFFFFFFF7
+#define   S_00000D_HDP_MAX_DYN_STOP_LAT(x)             (((x) & 0x1) << 4)
+#define   G_00000D_HDP_MAX_DYN_STOP_LAT(x)             (((x) >> 4) & 0x1)
+#define   C_00000D_HDP_MAX_DYN_STOP_LAT                0xFFFFFFEF
+#define   S_00000D_TV_MAX_DYN_STOP_LAT(x)              (((x) & 0x1) << 5)
+#define   G_00000D_TV_MAX_DYN_STOP_LAT(x)              (((x) >> 5) & 0x1)
+#define   C_00000D_TV_MAX_DYN_STOP_LAT                 0xFFFFFFDF
+#define   S_00000D_E2_MAX_DYN_STOP_LAT(x)              (((x) & 0x1) << 6)
+#define   G_00000D_E2_MAX_DYN_STOP_LAT(x)              (((x) >> 6) & 0x1)
+#define   C_00000D_E2_MAX_DYN_STOP_LAT                 0xFFFFFFBF
+#define   S_00000D_SE_MAX_DYN_STOP_LAT(x)              (((x) & 0x1) << 7)
+#define   G_00000D_SE_MAX_DYN_STOP_LAT(x)              (((x) >> 7) & 0x1)
+#define   C_00000D_SE_MAX_DYN_STOP_LAT                 0xFFFFFF7F
+#define   S_00000D_IDCT_MAX_DYN_STOP_LAT(x)            (((x) & 0x1) << 8)
+#define   G_00000D_IDCT_MAX_DYN_STOP_LAT(x)            (((x) >> 8) & 0x1)
+#define   C_00000D_IDCT_MAX_DYN_STOP_LAT               0xFFFFFEFF
+#define   S_00000D_VIP_MAX_DYN_STOP_LAT(x)             (((x) & 0x1) << 9)
+#define   G_00000D_VIP_MAX_DYN_STOP_LAT(x)             (((x) >> 9) & 0x1)
+#define   C_00000D_VIP_MAX_DYN_STOP_LAT                0xFFFFFDFF
+#define   S_00000D_RE_MAX_DYN_STOP_LAT(x)              (((x) & 0x1) << 10)
+#define   G_00000D_RE_MAX_DYN_STOP_LAT(x)              (((x) >> 10) & 0x1)
+#define   C_00000D_RE_MAX_DYN_STOP_LAT                 0xFFFFFBFF
+#define   S_00000D_PB_MAX_DYN_STOP_LAT(x)              (((x) & 0x1) << 11)
+#define   G_00000D_PB_MAX_DYN_STOP_LAT(x)              (((x) >> 11) & 0x1)
+#define   C_00000D_PB_MAX_DYN_STOP_LAT                 0xFFFFF7FF
+#define   S_00000D_TAM_MAX_DYN_STOP_LAT(x)             (((x) & 0x1) << 12)
+#define   G_00000D_TAM_MAX_DYN_STOP_LAT(x)             (((x) >> 12) & 0x1)
+#define   C_00000D_TAM_MAX_DYN_STOP_LAT                0xFFFFEFFF
+#define   S_00000D_TDM_MAX_DYN_STOP_LAT(x)             (((x) & 0x1) << 13)
+#define   G_00000D_TDM_MAX_DYN_STOP_LAT(x)             (((x) >> 13) & 0x1)
+#define   C_00000D_TDM_MAX_DYN_STOP_LAT                0xFFFFDFFF
+#define   S_00000D_RB_MAX_DYN_STOP_LAT(x)              (((x) & 0x1) << 14)
+#define   G_00000D_RB_MAX_DYN_STOP_LAT(x)              (((x) >> 14) & 0x1)
+#define   C_00000D_RB_MAX_DYN_STOP_LAT                 0xFFFFBFFF
+#define   S_00000D_FORCE_DISP2(x)                      (((x) & 0x1) << 15)
+#define   G_00000D_FORCE_DISP2(x)                      (((x) >> 15) & 0x1)
+#define   C_00000D_FORCE_DISP2                         0xFFFF7FFF
+#define   S_00000D_FORCE_CP(x)                         (((x) & 0x1) << 16)
+#define   G_00000D_FORCE_CP(x)                         (((x) >> 16) & 0x1)
+#define   C_00000D_FORCE_CP                            0xFFFEFFFF
+#define   S_00000D_FORCE_HDP(x)                        (((x) & 0x1) << 17)
+#define   G_00000D_FORCE_HDP(x)                        (((x) >> 17) & 0x1)
+#define   C_00000D_FORCE_HDP                           0xFFFDFFFF
+#define   S_00000D_FORCE_DISP1(x)                      (((x) & 0x1) << 18)
+#define   G_00000D_FORCE_DISP1(x)                      (((x) >> 18) & 0x1)
+#define   C_00000D_FORCE_DISP1                         0xFFFBFFFF
+#define   S_00000D_FORCE_TOP(x)                        (((x) & 0x1) << 19)
+#define   G_00000D_FORCE_TOP(x)                        (((x) >> 19) & 0x1)
+#define   C_00000D_FORCE_TOP                           0xFFF7FFFF
+#define   S_00000D_FORCE_E2(x)                         (((x) & 0x1) << 20)
+#define   G_00000D_FORCE_E2(x)                         (((x) >> 20) & 0x1)
+#define   C_00000D_FORCE_E2                            0xFFEFFFFF
+#define   S_00000D_FORCE_SE(x)                         (((x) & 0x1) << 21)
+#define   G_00000D_FORCE_SE(x)                         (((x) >> 21) & 0x1)
+#define   C_00000D_FORCE_SE                            0xFFDFFFFF
+#define   S_00000D_FORCE_IDCT(x)                       (((x) & 0x1) << 22)
+#define   G_00000D_FORCE_IDCT(x)                       (((x) >> 22) & 0x1)
+#define   C_00000D_FORCE_IDCT                          0xFFBFFFFF
+#define   S_00000D_FORCE_VIP(x)                        (((x) & 0x1) << 23)
+#define   G_00000D_FORCE_VIP(x)                        (((x) >> 23) & 0x1)
+#define   C_00000D_FORCE_VIP                           0xFF7FFFFF
+#define   S_00000D_FORCE_RE(x)                         (((x) & 0x1) << 24)
+#define   G_00000D_FORCE_RE(x)                         (((x) >> 24) & 0x1)
+#define   C_00000D_FORCE_RE                            0xFEFFFFFF
+#define   S_00000D_FORCE_PB(x)                         (((x) & 0x1) << 25)
+#define   G_00000D_FORCE_PB(x)                         (((x) >> 25) & 0x1)
+#define   C_00000D_FORCE_PB                            0xFDFFFFFF
+#define   S_00000D_FORCE_PX(x)                         (((x) & 0x1) << 26)
+#define   G_00000D_FORCE_PX(x)                         (((x) >> 26) & 0x1)
+#define   C_00000D_FORCE_PX                            0xFBFFFFFF
+#define   S_00000D_FORCE_TX(x)                         (((x) & 0x1) << 27)
+#define   G_00000D_FORCE_TX(x)                         (((x) >> 27) & 0x1)
+#define   C_00000D_FORCE_TX                            0xF7FFFFFF
+#define   S_00000D_FORCE_RB(x)                         (((x) & 0x1) << 28)
+#define   G_00000D_FORCE_RB(x)                         (((x) >> 28) & 0x1)
+#define   C_00000D_FORCE_RB                            0xEFFFFFFF
+#define   S_00000D_FORCE_TV_SCLK(x)                    (((x) & 0x1) << 29)
+#define   G_00000D_FORCE_TV_SCLK(x)                    (((x) >> 29) & 0x1)
+#define   C_00000D_FORCE_TV_SCLK                       0xDFFFFFFF
+#define   S_00000D_FORCE_SUBPIC(x)                     (((x) & 0x1) << 30)
+#define   G_00000D_FORCE_SUBPIC(x)                     (((x) >> 30) & 0x1)
+#define   C_00000D_FORCE_SUBPIC                        0xBFFFFFFF
+#define   S_00000D_FORCE_OV0(x)                        (((x) & 0x1) << 31)
+#define   G_00000D_FORCE_OV0(x)                        (((x) >> 31) & 0x1)
+#define   C_00000D_FORCE_OV0                           0x7FFFFFFF
+#endif
diff --git a/drivers/gpu/drm/radeon/r520.c b/drivers/gpu/drm/radeon/r520.c
index ebd6b0f7bdff..d4b0b9d2e39b 100644
--- a/drivers/gpu/drm/radeon/r520.c
+++ b/drivers/gpu/drm/radeon/r520.c
@@ -28,12 +28,9 @@
 #include "drmP.h"
 #include "radeon_reg.h"
 #include "radeon.h"
-#include "radeon_share.h"
 /* r520,rv530,rv560,rv570,r580 depends on : */
 void r100_hdp_reset(struct radeon_device *rdev);
-int rv370_pcie_gart_enable(struct radeon_device *rdev);
-void rv370_pcie_gart_disable(struct radeon_device *rdev);
 void r420_pipes_init(struct radeon_device *rdev);
 void rs600_mc_disable_clients(struct radeon_device *rdev);
 void rs600_disable_vga(struct radeon_device *rdev);
@@ -119,9 +116,6 @@ int r520_mc_init(struct radeon_device *rdev)
 void r520_mc_fini(struct radeon_device *rdev)
 {
-        rv370_pcie_gart_disable(rdev);
-        radeon_gart_table_vram_free(rdev);
-        radeon_gart_fini(rdev);
 }
diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c
index 538cd907df69..eab31c1d6df1 100644
--- a/drivers/gpu/drm/radeon/r600.c
+++ b/drivers/gpu/drm/radeon/r600.c
@@ -25,12 +25,45 @@
 *          Alex Deucher
 *          Jerome Glisse
 */
+#include <linux/seq_file.h>
+#include <linux/firmware.h>
+#include <linux/platform_device.h>
 #include "drmP.h"
-#include "radeon_reg.h"
+#include "radeon_drm.h"
 #include "radeon.h"
+#include "radeon_mode.h"
+#include "r600d.h"
+#include "avivod.h"
+#include "atom.h"
-/* r600,rv610,rv630,rv620,rv635,rv670 depends on : */
+#define PFP_UCODE_SIZE 576
-void rs600_mc_disable_clients(struct radeon_device *rdev);
+#define PM4_UCODE_SIZE 1792
+#define R700_PFP_UCODE_SIZE 848
+#define R700_PM4_UCODE_SIZE 1360
+/* Firmware Names */
+MODULE_FIRMWARE("radeon/R600_pfp.bin");
+MODULE_FIRMWARE("radeon/R600_me.bin");
+MODULE_FIRMWARE("radeon/RV610_pfp.bin");
+MODULE_FIRMWARE("radeon/RV610_me.bin");
+MODULE_FIRMWARE("radeon/RV630_pfp.bin");
+MODULE_FIRMWARE("radeon/RV630_me.bin");
+MODULE_FIRMWARE("radeon/RV620_pfp.bin");
+MODULE_FIRMWARE("radeon/RV620_me.bin");
+MODULE_FIRMWARE("radeon/RV635_pfp.bin");
+MODULE_FIRMWARE("radeon/RV635_me.bin");
+MODULE_FIRMWARE("radeon/RV670_pfp.bin");
+MODULE_FIRMWARE("radeon/RV670_me.bin");
+MODULE_FIRMWARE("radeon/RS780_pfp.bin");
+MODULE_FIRMWARE("radeon/RS780_me.bin");
+MODULE_FIRMWARE("radeon/RV770_pfp.bin");
+MODULE_FIRMWARE("radeon/RV770_me.bin");
+MODULE_FIRMWARE("radeon/RV730_pfp.bin");
+MODULE_FIRMWARE("radeon/RV730_me.bin");
+MODULE_FIRMWARE("radeon/RV710_pfp.bin");
+MODULE_FIRMWARE("radeon/RV710_me.bin");
+int r600_debugfs_mc_info_init(struct radeon_device *rdev);
 /* This files gather functions specifics to:
 * r600,rv610,rv630,rv620,rv635,rv670
@@ -39,87 +72,293 @@ void rs600_mc_disable_clients(struct radeon_device *rdev);
 */
 int r600_mc_wait_for_idle(struct radeon_device *rdev);
 void r600_gpu_init(struct radeon_device *rdev);
+void r600_fini(struct radeon_device *rdev);
 /*
- * MC
+ * R600 PCIE GART
 */
-int r600_mc_init(struct radeon_device *rdev)
+int r600_gart_clear_page(struct radeon_device *rdev, int i)
 {
-        uint32_t tmp;
+        void __iomem *ptr = (void *)rdev->gart.table.vram.ptr;
+        u64 pte;
-        r600_gpu_init(rdev);
+        if (i < 0 || i > rdev->gart.num_gpu_pages)
+                return -EINVAL;
+        pte = 0;
+        writeq(pte, ((void __iomem *)ptr) + (i * 8));
+        return 0;
+}
-        /* setup the gart before changing location so we can ask to
+void r600_pcie_gart_tlb_flush(struct radeon_device *rdev)
-         * discard unmapped mc request
+{
-         */
+        unsigned i;
-        /* FIXME: disable out of gart access */
+        u32 tmp;
-        tmp = rdev->mc.gtt_location / 4096;
-        tmp = REG_SET(R600_LOGICAL_PAGE_NUMBER, tmp);
+        WREG32(VM_CONTEXT0_INVALIDATION_LOW_ADDR, rdev->mc.gtt_start >> 12);
-        WREG32(R600_MC_VM_SYSTEM_APERTURE_LOW_ADDR, tmp);
+        WREG32(VM_CONTEXT0_INVALIDATION_HIGH_ADDR, (rdev->mc.gtt_end - 1) >> 12);
-        tmp = (rdev->mc.gtt_location + rdev->mc.gtt_size) / 4096;
+        WREG32(VM_CONTEXT0_REQUEST_RESPONSE, REQUEST_TYPE(1));
-        tmp = REG_SET(R600_LOGICAL_PAGE_NUMBER, tmp);
+        for (i = 0; i < rdev->usec_timeout; i++) {
-        WREG32(R600_MC_VM_SYSTEM_APERTURE_HIGH_ADDR, tmp);
+                /* read MC_STATUS */
+                tmp = RREG32(VM_CONTEXT0_REQUEST_RESPONSE);
-        rs600_mc_disable_clients(rdev);
+                tmp = (tmp & RESPONSE_TYPE_MASK) >> RESPONSE_TYPE_SHIFT;
-        if (r600_mc_wait_for_idle(rdev)) {
+                if (tmp == 2) {
-                printk(KERN_WARNING "Failed to wait MC idle while "
+                        printk(KERN_WARNING "[drm] r600 flush TLB failed\n");
-                       "programming pipes. Bad things might happen.\n");
+                        return;
+                }
+                if (tmp) {
+                        return;
+                }
+                udelay(1);
        }
+}
-        tmp = rdev->mc.vram_location + rdev->mc.mc_vram_size - 1;
+int r600_pcie_gart_init(struct radeon_device *rdev)
-        tmp = REG_SET(R600_MC_FB_TOP, tmp >> 24);
+{
-        tmp |= REG_SET(R600_MC_FB_BASE, rdev->mc.vram_location >> 24);
+        int r;
-        WREG32(R600_MC_VM_FB_LOCATION, tmp);
-        tmp = rdev->mc.gtt_location + rdev->mc.gtt_size - 1;
+        if (rdev->gart.table.vram.robj) {
-        tmp = REG_SET(R600_MC_AGP_TOP, tmp >> 22);
+                WARN(1, "R600 PCIE GART already initialized.\n");
-        WREG32(R600_MC_VM_AGP_TOP, tmp);
+                return 0;
-        tmp = REG_SET(R600_MC_AGP_BOT, rdev->mc.gtt_location >> 22);
+        }
-        WREG32(R600_MC_VM_AGP_BOT, tmp);
+        /* Initialize common gart structure */
-        return 0;
+        r = radeon_gart_init(rdev);
+        if (r)
+                return r;
+        rdev->gart.table_size = rdev->gart.num_gpu_pages * 8;
+        return radeon_gart_table_vram_alloc(rdev);
 }
-void r600_mc_fini(struct radeon_device *rdev)
+int r600_pcie_gart_enable(struct radeon_device *rdev)
 {
-        /* FIXME: implement */
+        u32 tmp;
+        int r, i;
+        if (rdev->gart.table.vram.robj == NULL) {
+                dev_err(rdev->dev, "No VRAM object for PCIE GART.\n");
+                return -EINVAL;
+        }
+        r = radeon_gart_table_vram_pin(rdev);
+        if (r)
+                return r;
+        /* Setup L2 cache */
+        WREG32(VM_L2_CNTL, ENABLE_L2_CACHE | ENABLE_L2_FRAGMENT_PROCESSING |
+                                ENABLE_L2_PTE_CACHE_LRU_UPDATE_BY_WRITE |
+                                EFFECTIVE_L2_QUEUE_SIZE(7));
+        WREG32(VM_L2_CNTL2, 0);
+        WREG32(VM_L2_CNTL3, BANK_SELECT_0(0) | BANK_SELECT_1(1));
+        /* Setup TLB control */
+        tmp = ENABLE_L1_TLB | ENABLE_L1_FRAGMENT_PROCESSING |
+                SYSTEM_ACCESS_MODE_NOT_IN_SYS |
+                EFFECTIVE_L1_TLB_SIZE(5) | EFFECTIVE_L1_QUEUE_SIZE(5) |
+                ENABLE_WAIT_L2_QUERY;
+        WREG32(MC_VM_L1_TLB_MCB_RD_SYS_CNTL, tmp);
+        WREG32(MC_VM_L1_TLB_MCB_WR_SYS_CNTL, tmp);
+        WREG32(MC_VM_L1_TLB_MCB_RD_HDP_CNTL, tmp | ENABLE_L1_STRICT_ORDERING);
+        WREG32(MC_VM_L1_TLB_MCB_WR_HDP_CNTL, tmp);
+        WREG32(MC_VM_L1_TLB_MCD_RD_A_CNTL, tmp);
+        WREG32(MC_VM_L1_TLB_MCD_WR_A_CNTL, tmp);
+        WREG32(MC_VM_L1_TLB_MCD_RD_B_CNTL, tmp);
+        WREG32(MC_VM_L1_TLB_MCD_WR_B_CNTL, tmp);
+        WREG32(MC_VM_L1_TLB_MCB_RD_GFX_CNTL, tmp);
+        WREG32(MC_VM_L1_TLB_MCB_WR_GFX_CNTL, tmp);
+        WREG32(MC_VM_L1_TLB_MCB_RD_PDMA_CNTL, tmp);
+        WREG32(MC_VM_L1_TLB_MCB_WR_PDMA_CNTL, tmp);
+        WREG32(MC_VM_L1_TLB_MCB_RD_SEM_CNTL, tmp | ENABLE_SEMAPHORE_MODE);
+        WREG32(MC_VM_L1_TLB_MCB_WR_SEM_CNTL, tmp | ENABLE_SEMAPHORE_MODE);
+        WREG32(VM_CONTEXT0_PAGE_TABLE_START_ADDR, rdev->mc.gtt_start >> 12);
+        WREG32(VM_CONTEXT0_PAGE_TABLE_END_ADDR, (rdev->mc.gtt_end - 1) >> 12);
+        WREG32(VM_CONTEXT0_PAGE_TABLE_BASE_ADDR, rdev->gart.table_addr >> 12);
+        WREG32(VM_CONTEXT0_CNTL, ENABLE_CONTEXT | PAGE_TABLE_DEPTH(0) |
+                                RANGE_PROTECTION_FAULT_ENABLE_DEFAULT);
+        WREG32(VM_CONTEXT0_PROTECTION_FAULT_DEFAULT_ADDR,
+                        (u32)(rdev->dummy_page.addr >> 12));
+        for (i = 1; i < 7; i++)
+                WREG32(VM_CONTEXT0_CNTL + (i * 4), 0);
+        r600_pcie_gart_tlb_flush(rdev);
+        rdev->gart.ready = true;
+        return 0;
 }
+void r600_pcie_gart_disable(struct radeon_device *rdev)
+{
+        u32 tmp;
+        int i;
-/*
+        /* Disable all tables */
- * Global GPU functions
+        for (i = 0; i < 7; i++)
- */
+                WREG32(VM_CONTEXT0_CNTL + (i * 4), 0);
-void r600_errata(struct radeon_device *rdev)
+        /* Disable L2 cache */
+        WREG32(VM_L2_CNTL, ENABLE_L2_FRAGMENT_PROCESSING |
+                                EFFECTIVE_L2_QUEUE_SIZE(7));
+        WREG32(VM_L2_CNTL3, BANK_SELECT_0(0) | BANK_SELECT_1(1));
+        /* Setup L1 TLB control */
+        tmp = EFFECTIVE_L1_TLB_SIZE(5) | EFFECTIVE_L1_QUEUE_SIZE(5) |
+                ENABLE_WAIT_L2_QUERY;
+        WREG32(MC_VM_L1_TLB_MCD_RD_A_CNTL, tmp);
+        WREG32(MC_VM_L1_TLB_MCD_WR_A_CNTL, tmp);
+        WREG32(MC_VM_L1_TLB_MCD_RD_B_CNTL, tmp);
+        WREG32(MC_VM_L1_TLB_MCD_WR_B_CNTL, tmp);
+        WREG32(MC_VM_L1_TLB_MCB_RD_GFX_CNTL, tmp);
+        WREG32(MC_VM_L1_TLB_MCB_WR_GFX_CNTL, tmp);
+        WREG32(MC_VM_L1_TLB_MCB_RD_PDMA_CNTL, tmp);
+        WREG32(MC_VM_L1_TLB_MCB_WR_PDMA_CNTL, tmp);
+        WREG32(MC_VM_L1_TLB_MCB_RD_SEM_CNTL, tmp);
+        WREG32(MC_VM_L1_TLB_MCB_WR_SEM_CNTL, tmp);
+        WREG32(MC_VM_L1_TLB_MCB_RD_SYS_CNTL, tmp);
+        WREG32(MC_VM_L1_TLB_MCB_WR_SYS_CNTL, tmp);
+        WREG32(MC_VM_L1_TLB_MCB_RD_HDP_CNTL, tmp);
+        WREG32(MC_VM_L1_TLB_MCB_WR_HDP_CNTL, tmp);
+        if (rdev->gart.table.vram.robj) {
+                radeon_object_kunmap(rdev->gart.table.vram.robj);
+                radeon_object_unpin(rdev->gart.table.vram.robj);
+        }
+}
+void r600_pcie_gart_fini(struct radeon_device *rdev)
 {
-        rdev->pll_errata = 0;
+        r600_pcie_gart_disable(rdev);
+        radeon_gart_table_vram_free(rdev);
+        radeon_gart_fini(rdev);
 }
 int r600_mc_wait_for_idle(struct radeon_device *rdev)
 {
-        /* FIXME: implement */
+        unsigned i;
-        return 0;
+        u32 tmp;
+        for (i = 0; i < rdev->usec_timeout; i++) {
+                /* read MC_STATUS */
+                tmp = RREG32(R_000E50_SRBM_STATUS) & 0x3F00;
+                if (!tmp)
+                        return 0;
+                udelay(1);
+        }
+        return -1;
 }
-void r600_gpu_init(struct radeon_device *rdev)
+static void r600_mc_resume(struct radeon_device *rdev)
 {
-        /* FIXME: implement */
+        u32 d1vga_control, d2vga_control;
-}
+        u32 vga_render_control, vga_hdp_control;
+        u32 d1crtc_control, d2crtc_control;
+        u32 new_d1grph_primary, new_d1grph_secondary;
+        u32 new_d2grph_primary, new_d2grph_secondary;
+        u64 old_vram_start;
+        u32 tmp;
+        int i, j;
+        /* Initialize HDP */
+        for (i = 0, j = 0; i < 32; i++, j += 0x18) {
+                WREG32((0x2c14 + j), 0x00000000);
+                WREG32((0x2c18 + j), 0x00000000);
+                WREG32((0x2c1c + j), 0x00000000);
+                WREG32((0x2c20 + j), 0x00000000);
+                WREG32((0x2c24 + j), 0x00000000);
+        }
+        WREG32(HDP_REG_COHERENCY_FLUSH_CNTL, 0);
-/*
+        d1vga_control = RREG32(D1VGA_CONTROL);
- * VRAM info
+        d2vga_control = RREG32(D2VGA_CONTROL);
- */
+        vga_render_control = RREG32(VGA_RENDER_CONTROL);
-void r600_vram_get_type(struct radeon_device *rdev)
+        vga_hdp_control = RREG32(VGA_HDP_CONTROL);
+        d1crtc_control = RREG32(D1CRTC_CONTROL);
+        d2crtc_control = RREG32(D2CRTC_CONTROL);
+        old_vram_start = (u64)(RREG32(MC_VM_FB_LOCATION) & 0xFFFF) << 24;
+        new_d1grph_primary = RREG32(D1GRPH_PRIMARY_SURFACE_ADDRESS);
+        new_d1grph_secondary = RREG32(D1GRPH_SECONDARY_SURFACE_ADDRESS);
+        new_d1grph_primary += rdev->mc.vram_start - old_vram_start;
+        new_d1grph_secondary += rdev->mc.vram_start - old_vram_start;
+        new_d2grph_primary = RREG32(D2GRPH_PRIMARY_SURFACE_ADDRESS);
+        new_d2grph_secondary = RREG32(D2GRPH_SECONDARY_SURFACE_ADDRESS);
+        new_d2grph_primary += rdev->mc.vram_start - old_vram_start;
+        new_d2grph_secondary += rdev->mc.vram_start - old_vram_start;
+        /* Stop all video */
+        WREG32(D1VGA_CONTROL, 0);
+        WREG32(D2VGA_CONTROL, 0);
+        WREG32(VGA_RENDER_CONTROL, 0);
+        WREG32(D1CRTC_UPDATE_LOCK, 1);
+        WREG32(D2CRTC_UPDATE_LOCK, 1);
+        WREG32(D1CRTC_CONTROL, 0);
+        WREG32(D2CRTC_CONTROL, 0);
+        WREG32(D1CRTC_UPDATE_LOCK, 0);
+        WREG32(D2CRTC_UPDATE_LOCK, 0);
+        mdelay(1);
+        if (r600_mc_wait_for_idle(rdev)) {
+                printk(KERN_WARNING "[drm] MC not idle !\n");
+        }
+        /* Lockout access through VGA aperture*/
+        WREG32(VGA_HDP_CONTROL, VGA_MEMORY_DISABLE);
+        /* Update configuration */
+        WREG32(MC_VM_SYSTEM_APERTURE_LOW_ADDR, rdev->mc.vram_start >> 12);
+        WREG32(MC_VM_SYSTEM_APERTURE_HIGH_ADDR, (rdev->mc.vram_end - 1) >> 12);
+        WREG32(MC_VM_SYSTEM_APERTURE_DEFAULT_ADDR, 0);
+        tmp = (((rdev->mc.vram_end - 1) >> 24) & 0xFFFF) << 16;
+        tmp |= ((rdev->mc.vram_start >> 24) & 0xFFFF);
+        WREG32(MC_VM_FB_LOCATION, tmp);
+        WREG32(HDP_NONSURFACE_BASE, (rdev->mc.vram_start >> 8));
+        WREG32(HDP_NONSURFACE_INFO, (2 << 7));
+        WREG32(HDP_NONSURFACE_SIZE, (rdev->mc.mc_vram_size - 1) | 0x3FF);
+        if (rdev->flags & RADEON_IS_AGP) {
+                WREG32(MC_VM_AGP_TOP, (rdev->mc.gtt_end - 1) >> 16);
+                WREG32(MC_VM_AGP_BOT, rdev->mc.gtt_start >> 16);
+                WREG32(MC_VM_AGP_BASE, rdev->mc.agp_base >> 22);
+        } else {
+                WREG32(MC_VM_AGP_BASE, 0);
+                WREG32(MC_VM_AGP_TOP, 0x0FFFFFFF);
+                WREG32(MC_VM_AGP_BOT, 0x0FFFFFFF);
+        }
+        WREG32(D1GRPH_PRIMARY_SURFACE_ADDRESS, new_d1grph_primary);
+        WREG32(D1GRPH_SECONDARY_SURFACE_ADDRESS, new_d1grph_secondary);
+        WREG32(D2GRPH_PRIMARY_SURFACE_ADDRESS, new_d2grph_primary);
+        WREG32(D2GRPH_SECONDARY_SURFACE_ADDRESS, new_d2grph_secondary);
+        WREG32(VGA_MEMORY_BASE_ADDRESS, rdev->mc.vram_start);
+        /* Unlock host access */
+        WREG32(VGA_HDP_CONTROL, vga_hdp_control);
+        mdelay(1);
+        if (r600_mc_wait_for_idle(rdev)) {
+                printk(KERN_WARNING "[drm] MC not idle !\n");
+        }
+        /* Restore video state */
+        WREG32(D1CRTC_UPDATE_LOCK, 1);
+        WREG32(D2CRTC_UPDATE_LOCK, 1);
+        WREG32(D1CRTC_CONTROL, d1crtc_control);
+        WREG32(D2CRTC_CONTROL, d2crtc_control);
+        WREG32(D1CRTC_UPDATE_LOCK, 0);
+        WREG32(D2CRTC_UPDATE_LOCK, 0);
+        WREG32(D1VGA_CONTROL, d1vga_control);
+        WREG32(D2VGA_CONTROL, d2vga_control);
+        WREG32(VGA_RENDER_CONTROL, vga_render_control);
+        /* we need to own VRAM, so turn off the VGA renderer here
+         * to stop it overwriting our objects */
+        radeon_avivo_vga_render_disable(rdev);
+}
+int r600_mc_init(struct radeon_device *rdev)
 {
-        uint32_t tmp;
+        fixed20_12 a;
+        u32 tmp;
        int chansize;
+        int r;
+        /* Get VRAM informations */
        rdev->mc.vram_width = 128;
        rdev->mc.vram_is_ddr = true;
+        tmp = RREG32(RAMCFG);
-        tmp = RREG32(R600_RAMCFG);
+        if (tmp & CHANSIZE_OVERRIDE) {
-        if (tmp & R600_CHANSIZE_OVERRIDE) {
                chansize = 16;
-        } else if (tmp & R600_CHANSIZE) {
+        } else if (tmp & CHANSIZE_MASK) {
                chansize = 64;
        } else {
                chansize = 32;
@@ -135,36 +374,1459 @@ void r600_vram_get_type(struct radeon_device *rdev)
                        (rdev->family == CHIP_RV635)) {
                rdev->mc.vram_width = 2 * chansize;
        }
+        /* Could aper size report 0 ? */
+        rdev->mc.aper_base = drm_get_resource_start(rdev->ddev, 0);
+        rdev->mc.aper_size = drm_get_resource_len(rdev->ddev, 0);
+        /* Setup GPU memory space */
+        rdev->mc.mc_vram_size = RREG32(CONFIG_MEMSIZE);
+        rdev->mc.real_vram_size = RREG32(CONFIG_MEMSIZE);
+        if (rdev->flags & RADEON_IS_AGP) {
+                r = radeon_agp_init(rdev);
+                if (r)
+                        return r;
+                /* gtt_size is setup by radeon_agp_init */
+                rdev->mc.gtt_location = rdev->mc.agp_base;
+                tmp = 0xFFFFFFFFUL - rdev->mc.agp_base - rdev->mc.gtt_size;
+                /* Try to put vram before or after AGP because we
+                 * we want SYSTEM_APERTURE to cover both VRAM and
+                 * AGP so that GPU can catch out of VRAM/AGP access
+                 */
+                if (rdev->mc.gtt_location > rdev->mc.mc_vram_size) {
+                        /* Enought place before */
+                        rdev->mc.vram_location = rdev->mc.gtt_location -
+                                                        rdev->mc.mc_vram_size;
+                } else if (tmp > rdev->mc.mc_vram_size) {
+                        /* Enought place after */
+                        rdev->mc.vram_location = rdev->mc.gtt_location +
+                                                        rdev->mc.gtt_size;
+                } else {
+                        /* Try to setup VRAM then AGP might not
+                         * not work on some card
+                         */
+                        rdev->mc.vram_location = 0x00000000UL;
+                        rdev->mc.gtt_location = rdev->mc.mc_vram_size;
+                }
+        } else {
+                if (rdev->family == CHIP_RS780 || rdev->family == CHIP_RS880) {
+                        rdev->mc.vram_location = (RREG32(MC_VM_FB_LOCATION) &
+                                                                0xFFFF) << 24;
+                        rdev->mc.gtt_size = radeon_gart_size * 1024 * 1024;
+                        tmp = rdev->mc.vram_location + rdev->mc.mc_vram_size;
+                        if ((0xFFFFFFFFUL - tmp) >= rdev->mc.gtt_size) {
+                                /* Enough place after vram */
+                                rdev->mc.gtt_location = tmp;
+                        } else if (rdev->mc.vram_location >= rdev->mc.gtt_size) {
+                                /* Enough place before vram */
+                                rdev->mc.gtt_location = 0;
+                        } else {
+                                /* Not enough place after or before shrink
+                                 * gart size
+                                 */
+                                if (rdev->mc.vram_location > (0xFFFFFFFFUL - tmp)) {
+                                        rdev->mc.gtt_location = 0;
+                                        rdev->mc.gtt_size = rdev->mc.vram_location;
+                                } else {
+                                        rdev->mc.gtt_location = tmp;
+                                        rdev->mc.gtt_size = 0xFFFFFFFFUL - tmp;
+                                }
+                        }
+                        rdev->mc.gtt_location = rdev->mc.mc_vram_size;
+                } else {
+                        rdev->mc.vram_location = 0x00000000UL;
+                        rdev->mc.gtt_location = rdev->mc.mc_vram_size;
+                        rdev->mc.gtt_size = radeon_gart_size * 1024 * 1024;
+                }
+        }
+        rdev->mc.vram_start = rdev->mc.vram_location;
+        rdev->mc.vram_end = rdev->mc.vram_location + rdev->mc.mc_vram_size;
+        rdev->mc.gtt_start = rdev->mc.gtt_location;
+        rdev->mc.gtt_end = rdev->mc.gtt_location + rdev->mc.gtt_size;
+        /* FIXME: we should enforce default clock in case GPU is not in
+         * default setup
+         */
+        a.full = rfixed_const(100);
+        rdev->pm.sclk.full = rfixed_const(rdev->clock.default_sclk);
+        rdev->pm.sclk.full = rfixed_div(rdev->pm.sclk, a);
+        return 0;
 }
-void r600_vram_info(struct radeon_device *rdev)
+/* We doesn't check that the GPU really needs a reset we simply do the
+ * reset, it's up to the caller to determine if the GPU needs one. We
+ * might add an helper function to check that.
+ */
+int r600_gpu_soft_reset(struct radeon_device *rdev)
 {
-        r600_vram_get_type(rdev);
+        u32 grbm_busy_mask = S_008010_VC_BUSY(1) | S_008010_VGT_BUSY_NO_DMA(1) |
-        rdev->mc.real_vram_size = RREG32(R600_CONFIG_MEMSIZE);
+                                S_008010_VGT_BUSY(1) | S_008010_TA03_BUSY(1) |
-        rdev->mc.mc_vram_size = rdev->mc.real_vram_size;
+                                S_008010_TC_BUSY(1) | S_008010_SX_BUSY(1) |
+                                S_008010_SH_BUSY(1) | S_008010_SPI03_BUSY(1) |
+                                S_008010_SMX_BUSY(1) | S_008010_SC_BUSY(1) |
+                                S_008010_PA_BUSY(1) | S_008010_DB03_BUSY(1) |
+                                S_008010_CR_BUSY(1) | S_008010_CB03_BUSY(1) |
+                                S_008010_GUI_ACTIVE(1);
+        u32 grbm2_busy_mask = S_008014_SPI0_BUSY(1) | S_008014_SPI1_BUSY(1) |
+                        S_008014_SPI2_BUSY(1) | S_008014_SPI3_BUSY(1) |
+                        S_008014_TA0_BUSY(1) | S_008014_TA1_BUSY(1) |
+                        S_008014_TA2_BUSY(1) | S_008014_TA3_BUSY(1) |
+                        S_008014_DB0_BUSY(1) | S_008014_DB1_BUSY(1) |
+                        S_008014_DB2_BUSY(1) | S_008014_DB3_BUSY(1) |
+                        S_008014_CB0_BUSY(1) | S_008014_CB1_BUSY(1) |
+                        S_008014_CB2_BUSY(1) | S_008014_CB3_BUSY(1);
+        u32 srbm_reset = 0;
-        /* Could aper size report 0 ? */
+        /* Disable CP parsing/prefetching */
-        rdev->mc.aper_base = drm_get_resource_start(rdev->ddev, 0);
+        WREG32(R_0086D8_CP_ME_CNTL, S_0086D8_CP_ME_HALT(0xff));
-        rdev->mc.aper_size = drm_get_resource_len(rdev->ddev, 0);
+        /* Check if any of the rendering block is busy and reset it */
+        if ((RREG32(R_008010_GRBM_STATUS) & grbm_busy_mask) ||
+            (RREG32(R_008014_GRBM_STATUS2) & grbm2_busy_mask)) {
+                WREG32(R_008020_GRBM_SOFT_RESET, S_008020_SOFT_RESET_CR(1) |
+                        S_008020_SOFT_RESET_DB(1) |
+                        S_008020_SOFT_RESET_CB(1) |
+                        S_008020_SOFT_RESET_PA(1) |
+                        S_008020_SOFT_RESET_SC(1) |
+                        S_008020_SOFT_RESET_SMX(1) |
+                        S_008020_SOFT_RESET_SPI(1) |
+                        S_008020_SOFT_RESET_SX(1) |
+                        S_008020_SOFT_RESET_SH(1) |
+                        S_008020_SOFT_RESET_TC(1) |
+                        S_008020_SOFT_RESET_TA(1) |
+                        S_008020_SOFT_RESET_VC(1) |
+                        S_008020_SOFT_RESET_VGT(1));
+                (void)RREG32(R_008020_GRBM_SOFT_RESET);
+                udelay(50);
+                WREG32(R_008020_GRBM_SOFT_RESET, 0);
+                (void)RREG32(R_008020_GRBM_SOFT_RESET);
+        }
+        /* Reset CP (we always reset CP) */
+        WREG32(R_008020_GRBM_SOFT_RESET, S_008020_SOFT_RESET_CP(1));
+        (void)RREG32(R_008020_GRBM_SOFT_RESET);
+        udelay(50);
+        WREG32(R_008020_GRBM_SOFT_RESET, 0);
+        (void)RREG32(R_008020_GRBM_SOFT_RESET);
+        /* Reset others GPU block if necessary */
+        if (G_000E50_RLC_BUSY(RREG32(R_000E50_SRBM_STATUS)))
+                srbm_reset |= S_000E60_SOFT_RESET_RLC(1);
+        if (G_000E50_GRBM_RQ_PENDING(RREG32(R_000E50_SRBM_STATUS)))
+                srbm_reset |= S_000E60_SOFT_RESET_GRBM(1);
+        if (G_000E50_HI_RQ_PENDING(RREG32(R_000E50_SRBM_STATUS)))
+                srbm_reset |= S_000E60_SOFT_RESET_IH(1);
+        if (G_000E50_VMC_BUSY(RREG32(R_000E50_SRBM_STATUS)))
+                srbm_reset |= S_000E60_SOFT_RESET_VMC(1);
+        if (G_000E50_MCB_BUSY(RREG32(R_000E50_SRBM_STATUS)))
+                srbm_reset |= S_000E60_SOFT_RESET_MC(1);
+        if (G_000E50_MCDZ_BUSY(RREG32(R_000E50_SRBM_STATUS)))
+                srbm_reset |= S_000E60_SOFT_RESET_MC(1);
+        if (G_000E50_MCDY_BUSY(RREG32(R_000E50_SRBM_STATUS)))
+                srbm_reset |= S_000E60_SOFT_RESET_MC(1);
+        if (G_000E50_MCDX_BUSY(RREG32(R_000E50_SRBM_STATUS)))
+                srbm_reset |= S_000E60_SOFT_RESET_MC(1);
+        if (G_000E50_MCDW_BUSY(RREG32(R_000E50_SRBM_STATUS)))
+                srbm_reset |= S_000E60_SOFT_RESET_MC(1);
+        if (G_000E50_RLC_BUSY(RREG32(R_000E50_SRBM_STATUS)))
+                srbm_reset |= S_000E60_SOFT_RESET_RLC(1);
+        if (G_000E50_SEM_BUSY(RREG32(R_000E50_SRBM_STATUS)))
+                srbm_reset |= S_000E60_SOFT_RESET_SEM(1);
+        WREG32(R_000E60_SRBM_SOFT_RESET, srbm_reset);
+        (void)RREG32(R_000E60_SRBM_SOFT_RESET);
+        udelay(50);
+        WREG32(R_000E60_SRBM_SOFT_RESET, 0);
+        (void)RREG32(R_000E60_SRBM_SOFT_RESET);
+        /* Wait a little for things to settle down */
+        udelay(50);
+        return 0;
 }
+int r600_gpu_reset(struct radeon_device *rdev)
+{
+        return r600_gpu_soft_reset(rdev);
+}
+static u32 r600_get_tile_pipe_to_backend_map(u32 num_tile_pipes,
+                                             u32 num_backends,
+                                             u32 backend_disable_mask)
+{
+        u32 backend_map = 0;
+        u32 enabled_backends_mask;
+        u32 enabled_backends_count;
+        u32 cur_pipe;
+        u32 swizzle_pipe[R6XX_MAX_PIPES];
+        u32 cur_backend;
+        u32 i;
+        if (num_tile_pipes > R6XX_MAX_PIPES)
+                num_tile_pipes = R6XX_MAX_PIPES;
+        if (num_tile_pipes < 1)
+                num_tile_pipes = 1;
+        if (num_backends > R6XX_MAX_BACKENDS)
+                num_backends = R6XX_MAX_BACKENDS;
+        if (num_backends < 1)
+                num_backends = 1;
+        enabled_backends_mask = 0;
+        enabled_backends_count = 0;
+        for (i = 0; i < R6XX_MAX_BACKENDS; ++i) {
+                if (((backend_disable_mask >> i) & 1) == 0) {
+                        enabled_backends_mask |= (1 << i);
+                        ++enabled_backends_count;
+                }
+                if (enabled_backends_count == num_backends)
+                        break;
+        }
+        if (enabled_backends_count == 0) {
+                enabled_backends_mask = 1;
+                enabled_backends_count = 1;
+        }
+        if (enabled_backends_count != num_backends)
+                num_backends = enabled_backends_count;
+        memset((uint8_t *)&swizzle_pipe[0], 0, sizeof(u32) * R6XX_MAX_PIPES);
+        switch (num_tile_pipes) {
+        case 1:
+                swizzle_pipe[0] = 0;
+                break;
+        case 2:
+                swizzle_pipe[0] = 0;
+                swizzle_pipe[1] = 1;
+                break;
+        case 3:
+                swizzle_pipe[0] = 0;
+                swizzle_pipe[1] = 1;
+                swizzle_pipe[2] = 2;
+                break;
+        case 4:
+                swizzle_pipe[0] = 0;
+                swizzle_pipe[1] = 1;
+                swizzle_pipe[2] = 2;
+                swizzle_pipe[3] = 3;
+                break;
+        case 5:
+                swizzle_pipe[0] = 0;
+                swizzle_pipe[1] = 1;
+                swizzle_pipe[2] = 2;
+                swizzle_pipe[3] = 3;
+                swizzle_pipe[4] = 4;
+                break;
+        case 6:
+                swizzle_pipe[0] = 0;
+                swizzle_pipe[1] = 2;
+                swizzle_pipe[2] = 4;
+                swizzle_pipe[3] = 5;
+                swizzle_pipe[4] = 1;
+                swizzle_pipe[5] = 3;
+                break;
+        case 7:
+                swizzle_pipe[0] = 0;
+                swizzle_pipe[1] = 2;
+                swizzle_pipe[2] = 4;
+                swizzle_pipe[3] = 6;
+                swizzle_pipe[4] = 1;
+                swizzle_pipe[5] = 3;
+                swizzle_pipe[6] = 5;
+                break;
+        case 8:
+                swizzle_pipe[0] = 0;
+                swizzle_pipe[1] = 2;
+                swizzle_pipe[2] = 4;
+                swizzle_pipe[3] = 6;
+                swizzle_pipe[4] = 1;
+                swizzle_pipe[5] = 3;
+                swizzle_pipe[6] = 5;
+                swizzle_pipe[7] = 7;
+                break;
+        }
+        cur_backend = 0;
+        for (cur_pipe = 0; cur_pipe < num_tile_pipes; ++cur_pipe) {
+                while (((1 << cur_backend) & enabled_backends_mask) == 0)
+                        cur_backend = (cur_backend + 1) % R6XX_MAX_BACKENDS;
+                backend_map |= (u32)(((cur_backend & 3) << (swizzle_pipe[cur_pipe] * 2)));
+                cur_backend = (cur_backend + 1) % R6XX_MAX_BACKENDS;
+        }
+        return backend_map;
+}
+int r600_count_pipe_bits(uint32_t val)
+{
+        int i, ret = 0;
+        for (i = 0; i < 32; i++) {
+                ret += val & 1;
+                val >>= 1;
+        }
+        return ret;
+}
+void r600_gpu_init(struct radeon_device *rdev)
+{
+        u32 tiling_config;
+        u32 ramcfg;
+        u32 tmp;
+        int i, j;
+        u32 sq_config;
+        u32 sq_gpr_resource_mgmt_1 = 0;
+        u32 sq_gpr_resource_mgmt_2 = 0;
+        u32 sq_thread_resource_mgmt = 0;
+        u32 sq_stack_resource_mgmt_1 = 0;
+        u32 sq_stack_resource_mgmt_2 = 0;
+        /* FIXME: implement */
+        switch (rdev->family) {
+        case CHIP_R600:
+                rdev->config.r600.max_pipes = 4;
+                rdev->config.r600.max_tile_pipes = 8;
+                rdev->config.r600.max_simds = 4;
+                rdev->config.r600.max_backends = 4;
+                rdev->config.r600.max_gprs = 256;
+                rdev->config.r600.max_threads = 192;
+                rdev->config.r600.max_stack_entries = 256;
+                rdev->config.r600.max_hw_contexts = 8;
+                rdev->config.r600.max_gs_threads = 16;
+                rdev->config.r600.sx_max_export_size = 128;
+                rdev->config.r600.sx_max_export_pos_size = 16;
+                rdev->config.r600.sx_max_export_smx_size = 128;
+                rdev->config.r600.sq_num_cf_insts = 2;
+                break;
+        case CHIP_RV630:
+        case CHIP_RV635:
+                rdev->config.r600.max_pipes = 2;
+                rdev->config.r600.max_tile_pipes = 2;
+                rdev->config.r600.max_simds = 3;
+                rdev->config.r600.max_backends = 1;
+                rdev->config.r600.max_gprs = 128;
+                rdev->config.r600.max_threads = 192;
+                rdev->config.r600.max_stack_entries = 128;
+                rdev->config.r600.max_hw_contexts = 8;
+                rdev->config.r600.max_gs_threads = 4;
+                rdev->config.r600.sx_max_export_size = 128;
+                rdev->config.r600.sx_max_export_pos_size = 16;
+                rdev->config.r600.sx_max_export_smx_size = 128;
+                rdev->config.r600.sq_num_cf_insts = 2;
+                break;
+        case CHIP_RV610:
+        case CHIP_RV620:
+        case CHIP_RS780:
+        case CHIP_RS880:
+                rdev->config.r600.max_pipes = 1;
+                rdev->config.r600.max_tile_pipes = 1;
+                rdev->config.r600.max_simds = 2;
+                rdev->config.r600.max_backends = 1;
+                rdev->config.r600.max_gprs = 128;
+                rdev->config.r600.max_threads = 192;
+                rdev->config.r600.max_stack_entries = 128;
+                rdev->config.r600.max_hw_contexts = 4;
+                rdev->config.r600.max_gs_threads = 4;
+                rdev->config.r600.sx_max_export_size = 128;
+                rdev->config.r600.sx_max_export_pos_size = 16;
+                rdev->config.r600.sx_max_export_smx_size = 128;
+                rdev->config.r600.sq_num_cf_insts = 1;
+                break;
+        case CHIP_RV670:
+                rdev->config.r600.max_pipes = 4;
+                rdev->config.r600.max_tile_pipes = 4;
+                rdev->config.r600.max_simds = 4;
+                rdev->config.r600.max_backends = 4;
+                rdev->config.r600.max_gprs = 192;
+                rdev->config.r600.max_threads = 192;
+                rdev->config.r600.max_stack_entries = 256;
+                rdev->config.r600.max_hw_contexts = 8;
+                rdev->config.r600.max_gs_threads = 16;
+                rdev->config.r600.sx_max_export_size = 128;
+                rdev->config.r600.sx_max_export_pos_size = 16;
+                rdev->config.r600.sx_max_export_smx_size = 128;
+                rdev->config.r600.sq_num_cf_insts = 2;
+                break;
+        default:
+                break;
+        }
+        /* Initialize HDP */
+        for (i = 0, j = 0; i < 32; i++, j += 0x18) {
+                WREG32((0x2c14 + j), 0x00000000);
+                WREG32((0x2c18 + j), 0x00000000);
+                WREG32((0x2c1c + j), 0x00000000);
+                WREG32((0x2c20 + j), 0x00000000);
+                WREG32((0x2c24 + j), 0x00000000);
+        }
+        WREG32(GRBM_CNTL, GRBM_READ_TIMEOUT(0xff));
+        /* Setup tiling */
+        tiling_config = 0;
+        ramcfg = RREG32(RAMCFG);
+        switch (rdev->config.r600.max_tile_pipes) {
+        case 1:
+                tiling_config |= PIPE_TILING(0);
+                break;
+        case 2:
+                tiling_config |= PIPE_TILING(1);
+                break;
+        case 4:
+                tiling_config |= PIPE_TILING(2);
+                break;
+        case 8:
+                tiling_config |= PIPE_TILING(3);
+                break;
+        default:
+                break;
+        }
+        tiling_config |= BANK_TILING((ramcfg & NOOFBANK_MASK) >> NOOFBANK_SHIFT);
+        tiling_config |= GROUP_SIZE(0);
+        tmp = (ramcfg & NOOFROWS_MASK) >> NOOFROWS_SHIFT;
+        if (tmp > 3) {
+                tiling_config |= ROW_TILING(3);
+                tiling_config |= SAMPLE_SPLIT(3);
+        } else {
+                tiling_config |= ROW_TILING(tmp);
+                tiling_config |= SAMPLE_SPLIT(tmp);
+        }
+        tiling_config |= BANK_SWAPS(1);
+        tmp = r600_get_tile_pipe_to_backend_map(rdev->config.r600.max_tile_pipes,
+                                                rdev->config.r600.max_backends,
+                                                (0xff << rdev->config.r600.max_backends) & 0xff);
+        tiling_config |= BACKEND_MAP(tmp);
+        WREG32(GB_TILING_CONFIG, tiling_config);
+        WREG32(DCP_TILING_CONFIG, tiling_config & 0xffff);
+        WREG32(HDP_TILING_CONFIG, tiling_config & 0xffff);
+        tmp = BACKEND_DISABLE((R6XX_MAX_BACKENDS_MASK << rdev->config.r600.max_backends) & R6XX_MAX_BACKENDS_MASK);
+        WREG32(CC_RB_BACKEND_DISABLE, tmp);
+        /* Setup pipes */
+        tmp = INACTIVE_QD_PIPES((R6XX_MAX_PIPES_MASK << rdev->config.r600.max_pipes) & R6XX_MAX_PIPES_MASK);
+        tmp |= INACTIVE_SIMDS((R6XX_MAX_SIMDS_MASK << rdev->config.r600.max_simds) & R6XX_MAX_SIMDS_MASK);
+        WREG32(CC_GC_SHADER_PIPE_CONFIG, tmp);
+        WREG32(GC_USER_SHADER_PIPE_CONFIG, tmp);
+        tmp = R6XX_MAX_BACKENDS - r600_count_pipe_bits(tmp & INACTIVE_QD_PIPES_MASK);
+        WREG32(VGT_OUT_DEALLOC_CNTL, (tmp * 4) & DEALLOC_DIST_MASK);
+        WREG32(VGT_VERTEX_REUSE_BLOCK_CNTL, ((tmp * 4) - 2) & VTX_REUSE_DEPTH_MASK);
+        /* Setup some CP states */
+        WREG32(CP_QUEUE_THRESHOLDS, (ROQ_IB1_START(0x16) | ROQ_IB2_START(0x2b)));
+        WREG32(CP_MEQ_THRESHOLDS, (MEQ_END(0x40) | ROQ_END(0x40)));
+        WREG32(TA_CNTL_AUX, (DISABLE_CUBE_ANISO | SYNC_GRADIENT |
+                             SYNC_WALKER | SYNC_ALIGNER));
+        /* Setup various GPU states */
+        if (rdev->family == CHIP_RV670)
+                WREG32(ARB_GDEC_RD_CNTL, 0x00000021);
+        tmp = RREG32(SX_DEBUG_1);
+        tmp |= SMX_EVENT_RELEASE;
+        if ((rdev->family > CHIP_R600))
+                tmp |= ENABLE_NEW_SMX_ADDRESS;
+        WREG32(SX_DEBUG_1, tmp);
+        if (((rdev->family) == CHIP_R600) ||
+            ((rdev->family) == CHIP_RV630) ||
+            ((rdev->family) == CHIP_RV610) ||
+            ((rdev->family) == CHIP_RV620) ||
+            ((rdev->family) == CHIP_RS780)) {
+                WREG32(DB_DEBUG, PREZ_MUST_WAIT_FOR_POSTZ_DONE);
+        } else {
+                WREG32(DB_DEBUG, 0);
+        }
+        WREG32(DB_WATERMARKS, (DEPTH_FREE(4) | DEPTH_CACHELINE_FREE(16) |
+                               DEPTH_FLUSH(16) | DEPTH_PENDING_FREE(4)));
+        WREG32(PA_SC_MULTI_CHIP_CNTL, 0);
+        WREG32(VGT_NUM_INSTANCES, 0);
+        WREG32(SPI_CONFIG_CNTL, GPR_WRITE_PRIORITY(0));
+        WREG32(SPI_CONFIG_CNTL_1, VTX_DONE_DELAY(0));
+        tmp = RREG32(SQ_MS_FIFO_SIZES);
+        if (((rdev->family) == CHIP_RV610) ||
+            ((rdev->family) == CHIP_RV620) ||
+            ((rdev->family) == CHIP_RS780)) {
+                tmp = (CACHE_FIFO_SIZE(0xa) |
+                       FETCH_FIFO_HIWATER(0xa) |
+                       DONE_FIFO_HIWATER(0xe0) |
+                       ALU_UPDATE_FIFO_HIWATER(0x8));
+        } else if (((rdev->family) == CHIP_R600) ||
+                   ((rdev->family) == CHIP_RV630)) {
+                tmp &= ~DONE_FIFO_HIWATER(0xff);
+                tmp |= DONE_FIFO_HIWATER(0x4);
+        }
+        WREG32(SQ_MS_FIFO_SIZES, tmp);
+        /* SQ_CONFIG, SQ_GPR_RESOURCE_MGMT, SQ_THREAD_RESOURCE_MGMT, SQ_STACK_RESOURCE_MGMT
+         * should be adjusted as needed by the 2D/3D drivers.  This just sets default values
+         */
+        sq_config = RREG32(SQ_CONFIG);
+        sq_config &= ~(PS_PRIO(3) |
+                       VS_PRIO(3) |
+                       GS_PRIO(3) |
+                       ES_PRIO(3));
+        sq_config |= (DX9_CONSTS |
+                      VC_ENABLE |
+                      PS_PRIO(0) |
+                      VS_PRIO(1) |
+                      GS_PRIO(2) |
+                      ES_PRIO(3));
+        if ((rdev->family) == CHIP_R600) {
+                sq_gpr_resource_mgmt_1 = (NUM_PS_GPRS(124) |
+                                          NUM_VS_GPRS(124) |
+                                          NUM_CLAUSE_TEMP_GPRS(4));
+                sq_gpr_resource_mgmt_2 = (NUM_GS_GPRS(0) |
+                                          NUM_ES_GPRS(0));
+                sq_thread_resource_mgmt = (NUM_PS_THREADS(136) |
+                                           NUM_VS_THREADS(48) |
+                                           NUM_GS_THREADS(4) |
+                                           NUM_ES_THREADS(4));
+                sq_stack_resource_mgmt_1 = (NUM_PS_STACK_ENTRIES(128) |
+                                            NUM_VS_STACK_ENTRIES(128));
+                sq_stack_resource_mgmt_2 = (NUM_GS_STACK_ENTRIES(0) |
+                                            NUM_ES_STACK_ENTRIES(0));
+        } else if (((rdev->family) == CHIP_RV610) ||
+                   ((rdev->family) == CHIP_RV620) ||
+                   ((rdev->family) == CHIP_RS780)) {
+                /* no vertex cache */
+                sq_config &= ~VC_ENABLE;
+                sq_gpr_resource_mgmt_1 = (NUM_PS_GPRS(44) |
+                                          NUM_VS_GPRS(44) |
+                                          NUM_CLAUSE_TEMP_GPRS(2));
+                sq_gpr_resource_mgmt_2 = (NUM_GS_GPRS(17) |
+                                          NUM_ES_GPRS(17));
+                sq_thread_resource_mgmt = (NUM_PS_THREADS(79) |
+                                           NUM_VS_THREADS(78) |
+                                           NUM_GS_THREADS(4) |
+                                           NUM_ES_THREADS(31));
+                sq_stack_resource_mgmt_1 = (NUM_PS_STACK_ENTRIES(40) |
+                                            NUM_VS_STACK_ENTRIES(40));
+                sq_stack_resource_mgmt_2 = (NUM_GS_STACK_ENTRIES(32) |
+                                            NUM_ES_STACK_ENTRIES(16));
+        } else if (((rdev->family) == CHIP_RV630) ||
+                   ((rdev->family) == CHIP_RV635)) {
+                sq_gpr_resource_mgmt_1 = (NUM_PS_GPRS(44) |
+                                          NUM_VS_GPRS(44) |
+                                          NUM_CLAUSE_TEMP_GPRS(2));
+                sq_gpr_resource_mgmt_2 = (NUM_GS_GPRS(18) |
+                                          NUM_ES_GPRS(18));
+                sq_thread_resource_mgmt = (NUM_PS_THREADS(79) |
+                                           NUM_VS_THREADS(78) |
+                                           NUM_GS_THREADS(4) |
+                                           NUM_ES_THREADS(31));
+                sq_stack_resource_mgmt_1 = (NUM_PS_STACK_ENTRIES(40) |
+                                            NUM_VS_STACK_ENTRIES(40));
+                sq_stack_resource_mgmt_2 = (NUM_GS_STACK_ENTRIES(32) |
+                                            NUM_ES_STACK_ENTRIES(16));
+        } else if ((rdev->family) == CHIP_RV670) {
+                sq_gpr_resource_mgmt_1 = (NUM_PS_GPRS(44) |
+                                          NUM_VS_GPRS(44) |
+                                          NUM_CLAUSE_TEMP_GPRS(2));
+                sq_gpr_resource_mgmt_2 = (NUM_GS_GPRS(17) |
+                                          NUM_ES_GPRS(17));
+                sq_thread_resource_mgmt = (NUM_PS_THREADS(79) |
+                                           NUM_VS_THREADS(78) |
+                                           NUM_GS_THREADS(4) |
+                                           NUM_ES_THREADS(31));
+                sq_stack_resource_mgmt_1 = (NUM_PS_STACK_ENTRIES(64) |
+                                            NUM_VS_STACK_ENTRIES(64));
+                sq_stack_resource_mgmt_2 = (NUM_GS_STACK_ENTRIES(64) |
+                                            NUM_ES_STACK_ENTRIES(64));
+        }
+        WREG32(SQ_CONFIG, sq_config);
+        WREG32(SQ_GPR_RESOURCE_MGMT_1,  sq_gpr_resource_mgmt_1);
+        WREG32(SQ_GPR_RESOURCE_MGMT_2,  sq_gpr_resource_mgmt_2);
+        WREG32(SQ_THREAD_RESOURCE_MGMT, sq_thread_resource_mgmt);
+        WREG32(SQ_STACK_RESOURCE_MGMT_1, sq_stack_resource_mgmt_1);
+        WREG32(SQ_STACK_RESOURCE_MGMT_2, sq_stack_resource_mgmt_2);
+        if (((rdev->family) == CHIP_RV610) ||
+            ((rdev->family) == CHIP_RV620) ||
+            ((rdev->family) == CHIP_RS780)) {
+                WREG32(VGT_CACHE_INVALIDATION, CACHE_INVALIDATION(TC_ONLY));
+        } else {
+                WREG32(VGT_CACHE_INVALIDATION, CACHE_INVALIDATION(VC_AND_TC));
+        }
+        /* More default values. 2D/3D driver should adjust as needed */
+        WREG32(PA_SC_AA_SAMPLE_LOCS_2S, (S0_X(0xc) | S0_Y(0x4) |
+                                         S1_X(0x4) | S1_Y(0xc)));
+        WREG32(PA_SC_AA_SAMPLE_LOCS_4S, (S0_X(0xe) | S0_Y(0xe) |
+                                         S1_X(0x2) | S1_Y(0x2) |
+                                         S2_X(0xa) | S2_Y(0x6) |
+                                         S3_X(0x6) | S3_Y(0xa)));
+        WREG32(PA_SC_AA_SAMPLE_LOCS_8S_WD0, (S0_X(0xe) | S0_Y(0xb) |
+                                             S1_X(0x4) | S1_Y(0xc) |
+                                             S2_X(0x1) | S2_Y(0x6) |
+                                             S3_X(0xa) | S3_Y(0xe)));
+        WREG32(PA_SC_AA_SAMPLE_LOCS_8S_WD1, (S4_X(0x6) | S4_Y(0x1) |
+                                             S5_X(0x0) | S5_Y(0x0) |
+                                             S6_X(0xb) | S6_Y(0x4) |
+                                             S7_X(0x7) | S7_Y(0x8)));
+        WREG32(VGT_STRMOUT_EN, 0);
+        tmp = rdev->config.r600.max_pipes * 16;
+        switch (rdev->family) {
+        case CHIP_RV610:
+        case CHIP_RS780:
+        case CHIP_RV620:
+                tmp += 32;
+                break;
+        case CHIP_RV670:
+                tmp += 128;
+                break;
+        default:
+                break;
+        }
+        if (tmp > 256) {
+                tmp = 256;
+        }
+        WREG32(VGT_ES_PER_GS, 128);
+        WREG32(VGT_GS_PER_ES, tmp);
+        WREG32(VGT_GS_PER_VS, 2);
+        WREG32(VGT_GS_VERTEX_REUSE, 16);
+        /* more default values. 2D/3D driver should adjust as needed */
+        WREG32(PA_SC_LINE_STIPPLE_STATE, 0);
+        WREG32(VGT_STRMOUT_EN, 0);
+        WREG32(SX_MISC, 0);
+        WREG32(PA_SC_MODE_CNTL, 0);
+        WREG32(PA_SC_AA_CONFIG, 0);
+        WREG32(PA_SC_LINE_STIPPLE, 0);
+        WREG32(SPI_INPUT_Z, 0);
+        WREG32(SPI_PS_IN_CONTROL_0, NUM_INTERP(2));
+        WREG32(CB_COLOR7_FRAG, 0);
+        /* Clear render buffer base addresses */
+        WREG32(CB_COLOR0_BASE, 0);
+        WREG32(CB_COLOR1_BASE, 0);
+        WREG32(CB_COLOR2_BASE, 0);
+        WREG32(CB_COLOR3_BASE, 0);
+        WREG32(CB_COLOR4_BASE, 0);
+        WREG32(CB_COLOR5_BASE, 0);
+        WREG32(CB_COLOR6_BASE, 0);
+        WREG32(CB_COLOR7_BASE, 0);
+        WREG32(CB_COLOR7_FRAG, 0);
+        switch (rdev->family) {
+        case CHIP_RV610:
+        case CHIP_RS780:
+        case CHIP_RV620:
+                tmp = TC_L2_SIZE(8);
+                break;
+        case CHIP_RV630:
+        case CHIP_RV635:
+                tmp = TC_L2_SIZE(4);
+                break;
+        case CHIP_R600:
+                tmp = TC_L2_SIZE(0) | L2_DISABLE_LATE_HIT;
+                break;
+        default:
+                tmp = TC_L2_SIZE(0);
+                break;
+        }
+        WREG32(TC_CNTL, tmp);
+        tmp = RREG32(HDP_HOST_PATH_CNTL);
+        WREG32(HDP_HOST_PATH_CNTL, tmp);
+        tmp = RREG32(ARB_POP);
+        tmp |= ENABLE_TC128;
+        WREG32(ARB_POP, tmp);
+        WREG32(PA_SC_MULTI_CHIP_CNTL, 0);
+        WREG32(PA_CL_ENHANCE, (CLIP_VTX_REORDER_ENA |
+                               NUM_CLIP_SEQ(3)));
+        WREG32(PA_SC_ENHANCE, FORCE_EOV_MAX_CLK_CNT(4095));
+}
 /*
 * Indirect registers accessor
 */
-uint32_t r600_pciep_rreg(struct radeon_device *rdev, uint32_t reg)
+u32 r600_pciep_rreg(struct radeon_device *rdev, u32 reg)
 {
-        uint32_t r;
+        u32 r;
-        WREG32(R600_PCIE_PORT_INDEX, ((reg) & 0xff));
+        WREG32(PCIE_PORT_INDEX, ((reg) & 0xff));
-        (void)RREG32(R600_PCIE_PORT_INDEX);
+        (void)RREG32(PCIE_PORT_INDEX);
-        r = RREG32(R600_PCIE_PORT_DATA);
+        r = RREG32(PCIE_PORT_DATA);
        return r;
 }
-void r600_pciep_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v)
+void r600_pciep_wreg(struct radeon_device *rdev, u32 reg, u32 v)
 {
-        WREG32(R600_PCIE_PORT_INDEX, ((reg) & 0xff));
+        WREG32(PCIE_PORT_INDEX, ((reg) & 0xff));
-        (void)RREG32(R600_PCIE_PORT_INDEX);
+        (void)RREG32(PCIE_PORT_INDEX);
-        WREG32(R600_PCIE_PORT_DATA, (v));
+        WREG32(PCIE_PORT_DATA, (v));
-        (void)RREG32(R600_PCIE_PORT_DATA);
+        (void)RREG32(PCIE_PORT_DATA);
+}
+/*
+ * CP & Ring
+ */
+void r600_cp_stop(struct radeon_device *rdev)
+{
+        WREG32(R_0086D8_CP_ME_CNTL, S_0086D8_CP_ME_HALT(1));
+}
+int r600_cp_init_microcode(struct radeon_device *rdev)
+{
+        struct platform_device *pdev;
+        const char *chip_name;
+        size_t pfp_req_size, me_req_size;
+        char fw_name[30];
+        int err;
+        DRM_DEBUG("\n");
+        pdev = platform_device_register_simple("radeon_cp", 0, NULL, 0);
+        err = IS_ERR(pdev);
+        if (err) {
+                printk(KERN_ERR "radeon_cp: Failed to register firmware\n");
+                return -EINVAL;
+        }
+        switch (rdev->family) {
+        case CHIP_R600: chip_name = "R600"; break;
+        case CHIP_RV610: chip_name = "RV610"; break;
+        case CHIP_RV630: chip_name = "RV630"; break;
+        case CHIP_RV620: chip_name = "RV620"; break;
+        case CHIP_RV635: chip_name = "RV635"; break;
+        case CHIP_RV670: chip_name = "RV670"; break;
+        case CHIP_RS780:
+        case CHIP_RS880: chip_name = "RS780"; break;
+        case CHIP_RV770: chip_name = "RV770"; break;
+        case CHIP_RV730:
+        case CHIP_RV740: chip_name = "RV730"; break;
+        case CHIP_RV710: chip_name = "RV710"; break;
+        default: BUG();
+        }
+        if (rdev->family >= CHIP_RV770) {
+                pfp_req_size = R700_PFP_UCODE_SIZE * 4;
+                me_req_size = R700_PM4_UCODE_SIZE * 4;
+        } else {
+                pfp_req_size = PFP_UCODE_SIZE * 4;
+                me_req_size = PM4_UCODE_SIZE * 12;
+        }
+        DRM_INFO("Loading %s CP Microcode\n", chip_name);
+        snprintf(fw_name, sizeof(fw_name), "radeon/%s_pfp.bin", chip_name);
+        err = request_firmware(&rdev->pfp_fw, fw_name, &pdev->dev);
+        if (err)
+                goto out;
+        if (rdev->pfp_fw->size != pfp_req_size) {
+                printk(KERN_ERR
+                       "r600_cp: Bogus length %zu in firmware \"%s\"\n",
+                       rdev->pfp_fw->size, fw_name);
+                err = -EINVAL;
+                goto out;
+        }
+        snprintf(fw_name, sizeof(fw_name), "radeon/%s_me.bin", chip_name);
+        err = request_firmware(&rdev->me_fw, fw_name, &pdev->dev);
+        if (err)
+                goto out;
+        if (rdev->me_fw->size != me_req_size) {
+                printk(KERN_ERR
+                       "r600_cp: Bogus length %zu in firmware \"%s\"\n",
+                       rdev->me_fw->size, fw_name);
+                err = -EINVAL;
+        }
+out:
+        platform_device_unregister(pdev);
+        if (err) {
+                if (err != -EINVAL)
+                        printk(KERN_ERR
+                               "r600_cp: Failed to load firmware \"%s\"\n",
+                               fw_name);
+                release_firmware(rdev->pfp_fw);
+                rdev->pfp_fw = NULL;
+                release_firmware(rdev->me_fw);
+                rdev->me_fw = NULL;
+        }
+        return err;
+}
+static int r600_cp_load_microcode(struct radeon_device *rdev)
+{
+        const __be32 *fw_data;
+        int i;
+        if (!rdev->me_fw || !rdev->pfp_fw)
+                return -EINVAL;
+        r600_cp_stop(rdev);
+        WREG32(CP_RB_CNTL, RB_NO_UPDATE | RB_BLKSZ(15) | RB_BUFSZ(3));
+        /* Reset cp */
+        WREG32(GRBM_SOFT_RESET, SOFT_RESET_CP);
+        RREG32(GRBM_SOFT_RESET);
+        mdelay(15);
+        WREG32(GRBM_SOFT_RESET, 0);
+        WREG32(CP_ME_RAM_WADDR, 0);
+        fw_data = (const __be32 *)rdev->me_fw->data;
+        WREG32(CP_ME_RAM_WADDR, 0);
+        for (i = 0; i < PM4_UCODE_SIZE * 3; i++)
+                WREG32(CP_ME_RAM_DATA,
+                       be32_to_cpup(fw_data++));
+        fw_data = (const __be32 *)rdev->pfp_fw->data;
+        WREG32(CP_PFP_UCODE_ADDR, 0);
+        for (i = 0; i < PFP_UCODE_SIZE; i++)
+                WREG32(CP_PFP_UCODE_DATA,
+                       be32_to_cpup(fw_data++));
+        WREG32(CP_PFP_UCODE_ADDR, 0);
+        WREG32(CP_ME_RAM_WADDR, 0);
+        WREG32(CP_ME_RAM_RADDR, 0);
+        return 0;
+}
+int r600_cp_start(struct radeon_device *rdev)
+{
+        int r;
+        uint32_t cp_me;
+        r = radeon_ring_lock(rdev, 7);
+        if (r) {
+                DRM_ERROR("radeon: cp failed to lock ring (%d).\n", r);
+                return r;
+        }
+        radeon_ring_write(rdev, PACKET3(PACKET3_ME_INITIALIZE, 5));
+        radeon_ring_write(rdev, 0x1);
+        if (rdev->family < CHIP_RV770) {
+                radeon_ring_write(rdev, 0x3);
+                radeon_ring_write(rdev, rdev->config.r600.max_hw_contexts - 1);
+        } else {
+                radeon_ring_write(rdev, 0x0);
+                radeon_ring_write(rdev, rdev->config.rv770.max_hw_contexts - 1);
+        }
+        radeon_ring_write(rdev, PACKET3_ME_INITIALIZE_DEVICE_ID(1));
+        radeon_ring_write(rdev, 0);
+        radeon_ring_write(rdev, 0);
+        radeon_ring_unlock_commit(rdev);
+        cp_me = 0xff;
+        WREG32(R_0086D8_CP_ME_CNTL, cp_me);
+        return 0;
+}
+int r600_cp_resume(struct radeon_device *rdev)
+{
+        u32 tmp;
+        u32 rb_bufsz;
+        int r;
+        /* Reset cp */
+        WREG32(GRBM_SOFT_RESET, SOFT_RESET_CP);
+        RREG32(GRBM_SOFT_RESET);
+        mdelay(15);
+        WREG32(GRBM_SOFT_RESET, 0);
+        /* Set ring buffer size */
+        rb_bufsz = drm_order(rdev->cp.ring_size / 8);
+#ifdef __BIG_ENDIAN
+        WREG32(CP_RB_CNTL, BUF_SWAP_32BIT | RB_NO_UPDATE |
+                (drm_order(4096/8) << 8) | rb_bufsz);
+#else
+        WREG32(CP_RB_CNTL, RB_NO_UPDATE | (drm_order(4096/8) << 8) | rb_bufsz);
+#endif
+        WREG32(CP_SEM_WAIT_TIMER, 0x4);
+        /* Set the write pointer delay */
+        WREG32(CP_RB_WPTR_DELAY, 0);
+        /* Initialize the ring buffer's read and write pointers */
+        tmp = RREG32(CP_RB_CNTL);
+        WREG32(CP_RB_CNTL, tmp | RB_RPTR_WR_ENA);
+        WREG32(CP_RB_RPTR_WR, 0);
+        WREG32(CP_RB_WPTR, 0);
+        WREG32(CP_RB_RPTR_ADDR, rdev->cp.gpu_addr & 0xFFFFFFFF);
+        WREG32(CP_RB_RPTR_ADDR_HI, upper_32_bits(rdev->cp.gpu_addr));
+        mdelay(1);
+        WREG32(CP_RB_CNTL, tmp);
+        WREG32(CP_RB_BASE, rdev->cp.gpu_addr >> 8);
+        WREG32(CP_DEBUG, (1 << 27) | (1 << 28));
+        rdev->cp.rptr = RREG32(CP_RB_RPTR);
+        rdev->cp.wptr = RREG32(CP_RB_WPTR);
+        r600_cp_start(rdev);
+        rdev->cp.ready = true;
+        r = radeon_ring_test(rdev);
+        if (r) {
+                rdev->cp.ready = false;
+                return r;
+        }
+        return 0;
+}
+void r600_cp_commit(struct radeon_device *rdev)
+{
+        WREG32(CP_RB_WPTR, rdev->cp.wptr);
+        (void)RREG32(CP_RB_WPTR);
+}
+void r600_ring_init(struct radeon_device *rdev, unsigned ring_size)
+{
+        u32 rb_bufsz;
+        /* Align ring size */
+        rb_bufsz = drm_order(ring_size / 8);
+        ring_size = (1 << (rb_bufsz + 1)) * 4;
+        rdev->cp.ring_size = ring_size;
+        rdev->cp.align_mask = 16 - 1;
+}
+/*
+ * GPU scratch registers helpers function.
+ */
+void r600_scratch_init(struct radeon_device *rdev)
+{
+        int i;
+        rdev->scratch.num_reg = 7;
+        for (i = 0; i < rdev->scratch.num_reg; i++) {
+                rdev->scratch.free[i] = true;
+                rdev->scratch.reg[i] = SCRATCH_REG0 + (i * 4);
+        }
+}
+int r600_ring_test(struct radeon_device *rdev)
+{
+        uint32_t scratch;
+        uint32_t tmp = 0;
+        unsigned i;
+        int r;
+        r = radeon_scratch_get(rdev, &scratch);
+        if (r) {
+                DRM_ERROR("radeon: cp failed to get scratch reg (%d).\n", r);
+                return r;
+        }
+        WREG32(scratch, 0xCAFEDEAD);
+        r = radeon_ring_lock(rdev, 3);
+        if (r) {
+                DRM_ERROR("radeon: cp failed to lock ring (%d).\n", r);
+                radeon_scratch_free(rdev, scratch);
+                return r;
+        }
+        radeon_ring_write(rdev, PACKET3(PACKET3_SET_CONFIG_REG, 1));
+        radeon_ring_write(rdev, ((scratch - PACKET3_SET_CONFIG_REG_OFFSET) >> 2));
+        radeon_ring_write(rdev, 0xDEADBEEF);
+        radeon_ring_unlock_commit(rdev);
+        for (i = 0; i < rdev->usec_timeout; i++) {
+                tmp = RREG32(scratch);
+                if (tmp == 0xDEADBEEF)
+                        break;
+                DRM_UDELAY(1);
+        }
+        if (i < rdev->usec_timeout) {
+                DRM_INFO("ring test succeeded in %d usecs\n", i);
+        } else {
+                DRM_ERROR("radeon: ring test failed (scratch(0x%04X)=0x%08X)\n",
+                          scratch, tmp);
+                r = -EINVAL;
+        }
+        radeon_scratch_free(rdev, scratch);
+        return r;
+}
+/*
+ * Writeback
+ */
+int r600_wb_init(struct radeon_device *rdev)
+{
+        int r;
+        if (rdev->wb.wb_obj == NULL) {
+                r = radeon_object_create(rdev, NULL, 4096,
+                                         true,
+                                         RADEON_GEM_DOMAIN_GTT,
+                                         false, &rdev->wb.wb_obj);
+                if (r) {
+                        DRM_ERROR("radeon: failed to create WB buffer (%d).\n", r);
+                        return r;
+                }
+                r = radeon_object_pin(rdev->wb.wb_obj,
+                                      RADEON_GEM_DOMAIN_GTT,
+                                      &rdev->wb.gpu_addr);
+                if (r) {
+                        DRM_ERROR("radeon: failed to pin WB buffer (%d).\n", r);
+                        return r;
+                }
+                r = radeon_object_kmap(rdev->wb.wb_obj, (void **)&rdev->wb.wb);
+                if (r) {
+                        DRM_ERROR("radeon: failed to map WB buffer (%d).\n", r);
+                        return r;
+                }
+        }
+        WREG32(SCRATCH_ADDR, (rdev->wb.gpu_addr >> 8) & 0xFFFFFFFF);
+        WREG32(CP_RB_RPTR_ADDR, (rdev->wb.gpu_addr + 1024) & 0xFFFFFFFC);
+        WREG32(CP_RB_RPTR_ADDR_HI, upper_32_bits(rdev->wb.gpu_addr + 1024) & 0xFF);
+        WREG32(SCRATCH_UMSK, 0xff);
+        return 0;
+}
+void r600_wb_fini(struct radeon_device *rdev)
+{
+        if (rdev->wb.wb_obj) {
+                radeon_object_kunmap(rdev->wb.wb_obj);
+                radeon_object_unpin(rdev->wb.wb_obj);
+                radeon_object_unref(&rdev->wb.wb_obj);
+                rdev->wb.wb = NULL;
+                rdev->wb.wb_obj = NULL;
+        }
+}
+/*
+ * CS
+ */
+void r600_fence_ring_emit(struct radeon_device *rdev,
+                          struct radeon_fence *fence)
+{
+        /* Emit fence sequence & fire IRQ */
+        radeon_ring_write(rdev, PACKET3(PACKET3_SET_CONFIG_REG, 1));
+        radeon_ring_write(rdev, ((rdev->fence_drv.scratch_reg - PACKET3_SET_CONFIG_REG_OFFSET) >> 2));
+        radeon_ring_write(rdev, fence->seq);
+}
+int r600_copy_dma(struct radeon_device *rdev,
+                  uint64_t src_offset,
+                  uint64_t dst_offset,
+                  unsigned num_pages,
+                  struct radeon_fence *fence)
+{
+        /* FIXME: implement */
+        return 0;
+}
+int r600_copy_blit(struct radeon_device *rdev,
+                   uint64_t src_offset, uint64_t dst_offset,
+                   unsigned num_pages, struct radeon_fence *fence)
+{
+        r600_blit_prepare_copy(rdev, num_pages * 4096);
+        r600_kms_blit_copy(rdev, src_offset, dst_offset, num_pages * 4096);
+        r600_blit_done_copy(rdev, fence);
+        return 0;
+}
+int r600_irq_process(struct radeon_device *rdev)
+{
+        /* FIXME: implement */
+        return 0;
+}
+int r600_irq_set(struct radeon_device *rdev)
+{
+        /* FIXME: implement */
+        return 0;
+}
+int r600_set_surface_reg(struct radeon_device *rdev, int reg,
+                         uint32_t tiling_flags, uint32_t pitch,
+                         uint32_t offset, uint32_t obj_size)
+{
+        /* FIXME: implement */
+        return 0;
+}
+void r600_clear_surface_reg(struct radeon_device *rdev, int reg)
+{
+        /* FIXME: implement */
+}
+bool r600_card_posted(struct radeon_device *rdev)
+{
+        uint32_t reg;
+        /* first check CRTCs */
+        reg = RREG32(D1CRTC_CONTROL) |
+                RREG32(D2CRTC_CONTROL);
+        if (reg & CRTC_EN)
+                return true;
+        /* then check MEM_SIZE, in case the crtcs are off */
+        if (RREG32(CONFIG_MEMSIZE))
+                return true;
+        return false;
+}
+int r600_startup(struct radeon_device *rdev)
+{
+        int r;
+        r600_gpu_reset(rdev);
+        r600_mc_resume(rdev);
+        r = r600_pcie_gart_enable(rdev);
+        if (r)
+                return r;
+        r600_gpu_init(rdev);
+        r = radeon_object_pin(rdev->r600_blit.shader_obj, RADEON_GEM_DOMAIN_VRAM,
+                              &rdev->r600_blit.shader_gpu_addr);
+        if (r) {
+                DRM_ERROR("failed to pin blit object %d\n", r);
+                return r;
+        }
+        r = radeon_ring_init(rdev, rdev->cp.ring_size);
+        if (r)
+                return r;
+        r = r600_cp_load_microcode(rdev);
+        if (r)
+                return r;
+        r = r600_cp_resume(rdev);
+        if (r)
+                return r;
+        r = r600_wb_init(rdev);
+        if (r)
+                return r;
+        return 0;
+}
+void r600_vga_set_state(struct radeon_device *rdev, bool state)
+{
+        uint32_t temp;
+        temp = RREG32(CONFIG_CNTL);
+        if (state == false) {
+                temp &= ~(1<<0);
+                temp |= (1<<1);
+        } else {
+                temp &= ~(1<<1);
+        }
+        WREG32(CONFIG_CNTL, temp);
+}
+int r600_resume(struct radeon_device *rdev)
+{
+        int r;
+        if (radeon_gpu_reset(rdev)) {
+                /* FIXME: what do we want to do here ? */
+        }
+        /* post card */
+        if (rdev->is_atom_bios) {
+                atom_asic_init(rdev->mode_info.atom_context);
+        } else {
+                radeon_combios_asic_init(rdev->ddev);
+        }
+        /* Initialize clocks */
+        r = radeon_clocks_init(rdev);
+        if (r) {
+                return r;
+        }
+        r = r600_startup(rdev);
+        if (r) {
+                DRM_ERROR("r600 startup failed on resume\n");
+                return r;
+        }
+        r = radeon_ib_test(rdev);
+        if (r) {
+                DRM_ERROR("radeon: failled testing IB (%d).\n", r);
+                return r;
+        }
+        return r;
+}
+int r600_suspend(struct radeon_device *rdev)
+{
+        /* FIXME: we should wait for ring to be empty */
+        r600_cp_stop(rdev);
+        rdev->cp.ready = false;
+        r600_pcie_gart_disable(rdev);
+        /* unpin shaders bo */
+        radeon_object_unpin(rdev->r600_blit.shader_obj);
+        return 0;
+}
+/* Plan is to move initialization in that function and use
+ * helper function so that radeon_device_init pretty much
+ * do nothing more than calling asic specific function. This
+ * should also allow to remove a bunch of callback function
+ * like vram_info.
+ */
+int r600_init(struct radeon_device *rdev)
+{
+        int r;
+        rdev->new_init_path = true;
+        r = radeon_dummy_page_init(rdev);
+        if (r)
+                return r;
+        if (r600_debugfs_mc_info_init(rdev)) {
+                DRM_ERROR("Failed to register debugfs file for mc !\n");
+        }
+        /* This don't do much */
+        r = radeon_gem_init(rdev);
+        if (r)
+                return r;
+        /* Read BIOS */
+        if (!radeon_get_bios(rdev)) {
+                if (ASIC_IS_AVIVO(rdev))
+                        return -EINVAL;
+        }
+        /* Must be an ATOMBIOS */
+        if (!rdev->is_atom_bios)
+                return -EINVAL;
+        r = radeon_atombios_init(rdev);
+        if (r)
+                return r;
+        /* Post card if necessary */
+        if (!r600_card_posted(rdev) && rdev->bios) {
+                DRM_INFO("GPU not posted. posting now...\n");
+                atom_asic_init(rdev->mode_info.atom_context);
+        }
+        /* Initialize scratch registers */
+        r600_scratch_init(rdev);
+        /* Initialize surface registers */
+        radeon_surface_init(rdev);
+        radeon_get_clock_info(rdev->ddev);
+        r = radeon_clocks_init(rdev);
+        if (r)
+                return r;
+        /* Fence driver */
+        r = radeon_fence_driver_init(rdev);
+        if (r)
+                return r;
+        r = r600_mc_init(rdev);
+        if (r) {
+                if (rdev->flags & RADEON_IS_AGP) {
+                        /* Retry with disabling AGP */
+                        r600_fini(rdev);
+                        rdev->flags &= ~RADEON_IS_AGP;
+                        return r600_init(rdev);
+                }
+                return r;
+        }
+        /* Memory manager */
+        r = radeon_object_init(rdev);
+        if (r)
+                return r;
+        rdev->cp.ring_obj = NULL;
+        r600_ring_init(rdev, 1024 * 1024);
+        if (!rdev->me_fw || !rdev->pfp_fw) {
+                r = r600_cp_init_microcode(rdev);
+                if (r) {
+                        DRM_ERROR("Failed to load firmware!\n");
+                        return r;
+                }
+        }
+        r = r600_pcie_gart_init(rdev);
+        if (r)
+                return r;
+        rdev->accel_working = true;
+        r = r600_blit_init(rdev);
+        if (r) {
+                DRM_ERROR("radeon: failled blitter (%d).\n", r);
+                return r;
+        }
+        r = r600_startup(rdev);
+        if (r) {
+                if (rdev->flags & RADEON_IS_AGP) {
+                        /* Retry with disabling AGP */
+                        r600_fini(rdev);
+                        rdev->flags &= ~RADEON_IS_AGP;
+                        return r600_init(rdev);
+                }
+                rdev->accel_working = false;
+        }
+        if (rdev->accel_working) {
+                r = radeon_ib_pool_init(rdev);
+                if (r) {
+                        DRM_ERROR("radeon: failled initializing IB pool (%d).\n", r);
+                        rdev->accel_working = false;
+                }
+                r = radeon_ib_test(rdev);
+                if (r) {
+                        DRM_ERROR("radeon: failled testing IB (%d).\n", r);
+                        rdev->accel_working = false;
+                }
+        }
+        return 0;
+}
+void r600_fini(struct radeon_device *rdev)
+{
+        /* Suspend operations */
+        r600_suspend(rdev);
+        r600_blit_fini(rdev);
+        radeon_ring_fini(rdev);
+        r600_pcie_gart_fini(rdev);
+        radeon_gem_fini(rdev);
+        radeon_fence_driver_fini(rdev);
+        radeon_clocks_fini(rdev);
+#if __OS_HAS_AGP
+        if (rdev->flags & RADEON_IS_AGP)
+                radeon_agp_fini(rdev);
+#endif
+        radeon_object_fini(rdev);
+        if (rdev->is_atom_bios)
+                radeon_atombios_fini(rdev);
+        else
+                radeon_combios_fini(rdev);
+        kfree(rdev->bios);
+        rdev->bios = NULL;
+        radeon_dummy_page_fini(rdev);
+}
+/*
+ * CS stuff
+ */
+void r600_ring_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib)
+{
+        /* FIXME: implement */
+        radeon_ring_write(rdev, PACKET3(PACKET3_INDIRECT_BUFFER, 2));
+        radeon_ring_write(rdev, ib->gpu_addr & 0xFFFFFFFC);
+        radeon_ring_write(rdev, upper_32_bits(ib->gpu_addr) & 0xFF);
+        radeon_ring_write(rdev, ib->length_dw);
+}
+int r600_ib_test(struct radeon_device *rdev)
+{
+        struct radeon_ib *ib;
+        uint32_t scratch;
+        uint32_t tmp = 0;
+        unsigned i;
+        int r;
+        r = radeon_scratch_get(rdev, &scratch);
+        if (r) {
+                DRM_ERROR("radeon: failed to get scratch reg (%d).\n", r);
+                return r;
+        }
+        WREG32(scratch, 0xCAFEDEAD);
+        r = radeon_ib_get(rdev, &ib);
+        if (r) {
+                DRM_ERROR("radeon: failed to get ib (%d).\n", r);
+                return r;
+        }
+        ib->ptr[0] = PACKET3(PACKET3_SET_CONFIG_REG, 1);
+        ib->ptr[1] = ((scratch - PACKET3_SET_CONFIG_REG_OFFSET) >> 2);
+        ib->ptr[2] = 0xDEADBEEF;
+        ib->ptr[3] = PACKET2(0);
+        ib->ptr[4] = PACKET2(0);
+        ib->ptr[5] = PACKET2(0);
+        ib->ptr[6] = PACKET2(0);
+        ib->ptr[7] = PACKET2(0);
+        ib->ptr[8] = PACKET2(0);
+        ib->ptr[9] = PACKET2(0);
+        ib->ptr[10] = PACKET2(0);
+        ib->ptr[11] = PACKET2(0);
+        ib->ptr[12] = PACKET2(0);
+        ib->ptr[13] = PACKET2(0);
+        ib->ptr[14] = PACKET2(0);
+        ib->ptr[15] = PACKET2(0);
+        ib->length_dw = 16;
+        r = radeon_ib_schedule(rdev, ib);
+        if (r) {
+                radeon_scratch_free(rdev, scratch);
+                radeon_ib_free(rdev, &ib);
+                DRM_ERROR("radeon: failed to schedule ib (%d).\n", r);
+                return r;
+        }
+        r = radeon_fence_wait(ib->fence, false);
+        if (r) {
+                DRM_ERROR("radeon: fence wait failed (%d).\n", r);
+                return r;
+        }
+        for (i = 0; i < rdev->usec_timeout; i++) {
+                tmp = RREG32(scratch);
+                if (tmp == 0xDEADBEEF)
+                        break;
+                DRM_UDELAY(1);
+        }
+        if (i < rdev->usec_timeout) {
+                DRM_INFO("ib test succeeded in %u usecs\n", i);
+        } else {
+                DRM_ERROR("radeon: ib test failed (sracth(0x%04X)=0x%08X)\n",
+                          scratch, tmp);
+                r = -EINVAL;
+        }
+        radeon_scratch_free(rdev, scratch);
+        radeon_ib_free(rdev, &ib);
+        return r;
+}
+/*
+ * Debugfs info
+ */
+#if defined(CONFIG_DEBUG_FS)
+static int r600_debugfs_cp_ring_info(struct seq_file *m, void *data)
+{
+        struct drm_info_node *node = (struct drm_info_node *) m->private;
+        struct drm_device *dev = node->minor->dev;
+        struct radeon_device *rdev = dev->dev_private;
+        uint32_t rdp, wdp;
+        unsigned count, i, j;
+        radeon_ring_free_size(rdev);
+        rdp = RREG32(CP_RB_RPTR);
+        wdp = RREG32(CP_RB_WPTR);
+        count = (rdp + rdev->cp.ring_size - wdp) & rdev->cp.ptr_mask;
+        seq_printf(m, "CP_STAT 0x%08x\n", RREG32(CP_STAT));
+        seq_printf(m, "CP_RB_WPTR 0x%08x\n", wdp);
+        seq_printf(m, "CP_RB_RPTR 0x%08x\n", rdp);
+        seq_printf(m, "%u free dwords in ring\n", rdev->cp.ring_free_dw);
+        seq_printf(m, "%u dwords in ring\n", count);
+        for (j = 0; j <= count; j++) {
+                i = (rdp + j) & rdev->cp.ptr_mask;
+                seq_printf(m, "r[%04d]=0x%08x\n", i, rdev->cp.ring[i]);
+        }
+        return 0;
+}
+static int r600_debugfs_mc_info(struct seq_file *m, void *data)
+{
+        struct drm_info_node *node = (struct drm_info_node *) m->private;
+        struct drm_device *dev = node->minor->dev;
+        struct radeon_device *rdev = dev->dev_private;
+        DREG32_SYS(m, rdev, R_000E50_SRBM_STATUS);
+        DREG32_SYS(m, rdev, VM_L2_STATUS);
+        return 0;
+}
+static struct drm_info_list r600_mc_info_list[] = {
+        {"r600_mc_info", r600_debugfs_mc_info, 0, NULL},
+        {"r600_ring_info", r600_debugfs_cp_ring_info, 0, NULL},
+};
+#endif
+int r600_debugfs_mc_info_init(struct radeon_device *rdev)
+{
+#if defined(CONFIG_DEBUG_FS)
+        return radeon_debugfs_add_files(rdev, r600_mc_info_list, ARRAY_SIZE(r600_mc_info_list));
+#else
+        return 0;
+#endif
 }
diff --git a/drivers/gpu/drm/radeon/r600_blit.c b/drivers/gpu/drm/radeon/r600_blit.c
new file mode 100644
index 000000000000..dde2ccbf1d15
--- /dev/null
+++ b/drivers/gpu/drm/radeon/r600_blit.c
@@ -0,0 +1,850 @@
+/*
+ * Copyright 2009 Advanced Micro Devices, Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ *
+ * Authors:
+ *     Alex Deucher <alexander.deucher@amd.com>
+ */
+#include "drmP.h"
+#include "drm.h"
+#include "radeon_drm.h"
+#include "radeon_drv.h"
+#include "r600_blit_shaders.h"
+#define DI_PT_RECTLIST        0x11
+#define DI_INDEX_SIZE_16_BIT  0x0
+#define DI_SRC_SEL_AUTO_INDEX 0x2
+#define FMT_8                 0x1
+#define FMT_5_6_5             0x8
+#define FMT_8_8_8_8           0x1a
+#define COLOR_8               0x1
+#define COLOR_5_6_5           0x8
+#define COLOR_8_8_8_8         0x1a
+static inline void
+set_render_target(drm_radeon_private_t *dev_priv, int format, int w, int h, u64 gpu_addr)
+{
+        u32 cb_color_info;
+        int pitch, slice;
+        RING_LOCALS;
+        DRM_DEBUG("\n");
+        h = (h + 7) & ~7;
+        if (h < 8)
+                h = 8;
+        cb_color_info = ((format << 2) | (1 << 27));
+        pitch = (w / 8) - 1;
+        slice = ((w * h) / 64) - 1;
+        if (((dev_priv->flags & RADEON_FAMILY_MASK) > CHIP_R600) &&
+            ((dev_priv->flags & RADEON_FAMILY_MASK) < CHIP_RV770)) {
+                BEGIN_RING(21 + 2);
+                OUT_RING(CP_PACKET3(R600_IT_SET_CONTEXT_REG, 1));
+                OUT_RING((R600_CB_COLOR0_BASE - R600_SET_CONTEXT_REG_OFFSET) >> 2);
+                OUT_RING(gpu_addr >> 8);
+                OUT_RING(CP_PACKET3(R600_IT_SURFACE_BASE_UPDATE, 0));
+                OUT_RING(2 << 0);
+        } else {
+                BEGIN_RING(21);
+                OUT_RING(CP_PACKET3(R600_IT_SET_CONTEXT_REG, 1));
+                OUT_RING((R600_CB_COLOR0_BASE - R600_SET_CONTEXT_REG_OFFSET) >> 2);
+                OUT_RING(gpu_addr >> 8);
+        }
+        OUT_RING(CP_PACKET3(R600_IT_SET_CONTEXT_REG, 1));
+        OUT_RING((R600_CB_COLOR0_SIZE - R600_SET_CONTEXT_REG_OFFSET) >> 2);
+        OUT_RING((pitch << 0) | (slice << 10));
+        OUT_RING(CP_PACKET3(R600_IT_SET_CONTEXT_REG, 1));
+        OUT_RING((R600_CB_COLOR0_VIEW - R600_SET_CONTEXT_REG_OFFSET) >> 2);
+        OUT_RING(0);
+        OUT_RING(CP_PACKET3(R600_IT_SET_CONTEXT_REG, 1));
+        OUT_RING((R600_CB_COLOR0_INFO - R600_SET_CONTEXT_REG_OFFSET) >> 2);
+        OUT_RING(cb_color_info);
+        OUT_RING(CP_PACKET3(R600_IT_SET_CONTEXT_REG, 1));
+        OUT_RING((R600_CB_COLOR0_TILE - R600_SET_CONTEXT_REG_OFFSET) >> 2);
+        OUT_RING(0);
+        OUT_RING(CP_PACKET3(R600_IT_SET_CONTEXT_REG, 1));
+        OUT_RING((R600_CB_COLOR0_FRAG - R600_SET_CONTEXT_REG_OFFSET) >> 2);
+        OUT_RING(0);
+        OUT_RING(CP_PACKET3(R600_IT_SET_CONTEXT_REG, 1));
+        OUT_RING((R600_CB_COLOR0_MASK - R600_SET_CONTEXT_REG_OFFSET) >> 2);
+        OUT_RING(0);
+        ADVANCE_RING();
+}
+static inline void
+cp_set_surface_sync(drm_radeon_private_t *dev_priv,
+                    u32 sync_type, u32 size, u64 mc_addr)
+{
+        u32 cp_coher_size;
+        RING_LOCALS;
+        DRM_DEBUG("\n");
+        if (size == 0xffffffff)
+                cp_coher_size = 0xffffffff;
+        else
+                cp_coher_size = ((size + 255) >> 8);
+        BEGIN_RING(5);
+        OUT_RING(CP_PACKET3(R600_IT_SURFACE_SYNC, 3));
+        OUT_RING(sync_type);
+        OUT_RING(cp_coher_size);
+        OUT_RING((mc_addr >> 8));
+        OUT_RING(10); /* poll interval */
+        ADVANCE_RING();
+}
+static inline void
+set_shaders(struct drm_device *dev)
+{
+        drm_radeon_private_t *dev_priv = dev->dev_private;
+        u64 gpu_addr;
+        int i;
+        u32 *vs, *ps;
+        uint32_t sq_pgm_resources;
+        RING_LOCALS;
+        DRM_DEBUG("\n");
+        /* load shaders */
+        vs = (u32 *) ((char *)dev->agp_buffer_map->handle + dev_priv->blit_vb->offset);
+        ps = (u32 *) ((char *)dev->agp_buffer_map->handle + dev_priv->blit_vb->offset + 256);
+        for (i = 0; i < r6xx_vs_size; i++)
+                vs[i] = r6xx_vs[i];
+        for (i = 0; i < r6xx_ps_size; i++)
+                ps[i] = r6xx_ps[i];
+        dev_priv->blit_vb->used = 512;
+        gpu_addr = dev_priv->gart_buffers_offset + dev_priv->blit_vb->offset;
+        /* setup shader regs */
+        sq_pgm_resources = (1 << 0);
+        BEGIN_RING(9 + 12);
+        /* VS */
+        OUT_RING(CP_PACKET3(R600_IT_SET_CONTEXT_REG, 1));
+        OUT_RING((R600_SQ_PGM_START_VS - R600_SET_CONTEXT_REG_OFFSET) >> 2);
+        OUT_RING(gpu_addr >> 8);
+        OUT_RING(CP_PACKET3(R600_IT_SET_CONTEXT_REG, 1));
+        OUT_RING((R600_SQ_PGM_RESOURCES_VS - R600_SET_CONTEXT_REG_OFFSET) >> 2);
+        OUT_RING(sq_pgm_resources);
+        OUT_RING(CP_PACKET3(R600_IT_SET_CONTEXT_REG, 1));
+        OUT_RING((R600_SQ_PGM_CF_OFFSET_VS - R600_SET_CONTEXT_REG_OFFSET) >> 2);
+        OUT_RING(0);
+        /* PS */
+        OUT_RING(CP_PACKET3(R600_IT_SET_CONTEXT_REG, 1));
+        OUT_RING((R600_SQ_PGM_START_PS - R600_SET_CONTEXT_REG_OFFSET) >> 2);
+        OUT_RING((gpu_addr + 256) >> 8);
+        OUT_RING(CP_PACKET3(R600_IT_SET_CONTEXT_REG, 1));
+        OUT_RING((R600_SQ_PGM_RESOURCES_PS - R600_SET_CONTEXT_REG_OFFSET) >> 2);
+        OUT_RING(sq_pgm_resources | (1 << 28));
+        OUT_RING(CP_PACKET3(R600_IT_SET_CONTEXT_REG, 1));
+        OUT_RING((R600_SQ_PGM_EXPORTS_PS - R600_SET_CONTEXT_REG_OFFSET) >> 2);
+        OUT_RING(2);
+        OUT_RING(CP_PACKET3(R600_IT_SET_CONTEXT_REG, 1));
+        OUT_RING((R600_SQ_PGM_CF_OFFSET_PS - R600_SET_CONTEXT_REG_OFFSET) >> 2);
+        OUT_RING(0);
+        ADVANCE_RING();
+        cp_set_surface_sync(dev_priv,
+                            R600_SH_ACTION_ENA, 512, gpu_addr);
+}
+static inline void
+set_vtx_resource(drm_radeon_private_t *dev_priv, u64 gpu_addr)
+{
+        uint32_t sq_vtx_constant_word2;
+        RING_LOCALS;
+        DRM_DEBUG("\n");
+        sq_vtx_constant_word2 = (((gpu_addr >> 32) & 0xff) | (16 << 8));
+        BEGIN_RING(9);
+        OUT_RING(CP_PACKET3(R600_IT_SET_RESOURCE, 7));
+        OUT_RING(0x460);
+        OUT_RING(gpu_addr & 0xffffffff);
+        OUT_RING(48 - 1);
+        OUT_RING(sq_vtx_constant_word2);
+        OUT_RING(1 << 0);
+        OUT_RING(0);
+        OUT_RING(0);
+        OUT_RING(R600_SQ_TEX_VTX_VALID_BUFFER << 30);
+        ADVANCE_RING();
+        if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV610) ||
+            ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV620) ||
+            ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS780) ||
+            ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS880) ||
+            ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV710))
+                cp_set_surface_sync(dev_priv,
+                                    R600_TC_ACTION_ENA, 48, gpu_addr);
+        else
+                cp_set_surface_sync(dev_priv,
+                                    R600_VC_ACTION_ENA, 48, gpu_addr);
+}
+static inline void
+set_tex_resource(drm_radeon_private_t *dev_priv,
+                 int format, int w, int h, int pitch, u64 gpu_addr)
+{
+        uint32_t sq_tex_resource_word0, sq_tex_resource_word1, sq_tex_resource_word4;
+        RING_LOCALS;
+        DRM_DEBUG("\n");
+        if (h < 1)
+                h = 1;
+        sq_tex_resource_word0 = (1 << 0);
+        sq_tex_resource_word0 |= ((((pitch >> 3) - 1) << 8) |
+                                  ((w - 1) << 19));
+        sq_tex_resource_word1 = (format << 26);
+        sq_tex_resource_word1 |= ((h - 1) << 0);
+        sq_tex_resource_word4 = ((1 << 14) |
+                                 (0 << 16) |
+                                 (1 << 19) |
+                                 (2 << 22) |
+                                 (3 << 25));
+        BEGIN_RING(9);
+        OUT_RING(CP_PACKET3(R600_IT_SET_RESOURCE, 7));
+        OUT_RING(0);
+        OUT_RING(sq_tex_resource_word0);
+        OUT_RING(sq_tex_resource_word1);
+        OUT_RING(gpu_addr >> 8);
+        OUT_RING(gpu_addr >> 8);
+        OUT_RING(sq_tex_resource_word4);
+        OUT_RING(0);
+        OUT_RING(R600_SQ_TEX_VTX_VALID_TEXTURE << 30);
+        ADVANCE_RING();
+}
+static inline void
+set_scissors(drm_radeon_private_t *dev_priv, int x1, int y1, int x2, int y2)
+{
+        RING_LOCALS;
+        DRM_DEBUG("\n");
+        BEGIN_RING(12);
+        OUT_RING(CP_PACKET3(R600_IT_SET_CONTEXT_REG, 2));
+        OUT_RING((R600_PA_SC_SCREEN_SCISSOR_TL - R600_SET_CONTEXT_REG_OFFSET) >> 2);
+        OUT_RING((x1 << 0) | (y1 << 16));
+        OUT_RING((x2 << 0) | (y2 << 16));
+        OUT_RING(CP_PACKET3(R600_IT_SET_CONTEXT_REG, 2));
+        OUT_RING((R600_PA_SC_GENERIC_SCISSOR_TL - R600_SET_CONTEXT_REG_OFFSET) >> 2);
+        OUT_RING((x1 << 0) | (y1 << 16) | (1 << 31));
+        OUT_RING((x2 << 0) | (y2 << 16));
+        OUT_RING(CP_PACKET3(R600_IT_SET_CONTEXT_REG, 2));
+        OUT_RING((R600_PA_SC_WINDOW_SCISSOR_TL - R600_SET_CONTEXT_REG_OFFSET) >> 2);
+        OUT_RING((x1 << 0) | (y1 << 16) | (1 << 31));
+        OUT_RING((x2 << 0) | (y2 << 16));
+        ADVANCE_RING();
+}
+static inline void
+draw_auto(drm_radeon_private_t *dev_priv)
+{
+        RING_LOCALS;
+        DRM_DEBUG("\n");
+        BEGIN_RING(10);
+        OUT_RING(CP_PACKET3(R600_IT_SET_CONFIG_REG, 1));
+        OUT_RING((R600_VGT_PRIMITIVE_TYPE - R600_SET_CONFIG_REG_OFFSET) >> 2);
+        OUT_RING(DI_PT_RECTLIST);
+        OUT_RING(CP_PACKET3(R600_IT_INDEX_TYPE, 0));
+        OUT_RING(DI_INDEX_SIZE_16_BIT);
+        OUT_RING(CP_PACKET3(R600_IT_NUM_INSTANCES, 0));
+        OUT_RING(1);
+        OUT_RING(CP_PACKET3(R600_IT_DRAW_INDEX_AUTO, 1));
+        OUT_RING(3);
+        OUT_RING(DI_SRC_SEL_AUTO_INDEX);
+        ADVANCE_RING();
+        COMMIT_RING();
+}
+static inline void
+set_default_state(drm_radeon_private_t *dev_priv)
+{
+        int i;
+        u32 sq_config, sq_gpr_resource_mgmt_1, sq_gpr_resource_mgmt_2;
+        u32 sq_thread_resource_mgmt, sq_stack_resource_mgmt_1, sq_stack_resource_mgmt_2;
+        int num_ps_gprs, num_vs_gprs, num_temp_gprs, num_gs_gprs, num_es_gprs;
+        int num_ps_threads, num_vs_threads, num_gs_threads, num_es_threads;
+        int num_ps_stack_entries, num_vs_stack_entries, num_gs_stack_entries, num_es_stack_entries;
+        RING_LOCALS;
+        switch ((dev_priv->flags & RADEON_FAMILY_MASK)) {
+        case CHIP_R600:
+                num_ps_gprs = 192;
+                num_vs_gprs = 56;
+                num_temp_gprs = 4;
+                num_gs_gprs = 0;
+                num_es_gprs = 0;
+                num_ps_threads = 136;
+                num_vs_threads = 48;
+                num_gs_threads = 4;
+                num_es_threads = 4;
+                num_ps_stack_entries = 128;
+                num_vs_stack_entries = 128;
+                num_gs_stack_entries = 0;
+                num_es_stack_entries = 0;
+                break;
+        case CHIP_RV630:
+        case CHIP_RV635:
+                num_ps_gprs = 84;
+                num_vs_gprs = 36;
+                num_temp_gprs = 4;
+                num_gs_gprs = 0;
+                num_es_gprs = 0;
+                num_ps_threads = 144;
+                num_vs_threads = 40;
+                num_gs_threads = 4;
+                num_es_threads = 4;
+                num_ps_stack_entries = 40;
+                num_vs_stack_entries = 40;
+                num_gs_stack_entries = 32;
+                num_es_stack_entries = 16;
+                break;
+        case CHIP_RV610:
+        case CHIP_RV620:
+        case CHIP_RS780:
+        case CHIP_RS880:
+        default:
+                num_ps_gprs = 84;
+                num_vs_gprs = 36;
+                num_temp_gprs = 4;
+                num_gs_gprs = 0;
+                num_es_gprs = 0;
+                num_ps_threads = 136;
+                num_vs_threads = 48;
+                num_gs_threads = 4;
+                num_es_threads = 4;
+                num_ps_stack_entries = 40;
+                num_vs_stack_entries = 40;
+                num_gs_stack_entries = 32;
+                num_es_stack_entries = 16;
+                break;
+        case CHIP_RV670:
+                num_ps_gprs = 144;
+                num_vs_gprs = 40;
+                num_temp_gprs = 4;
+                num_gs_gprs = 0;
+                num_es_gprs = 0;
+                num_ps_threads = 136;
+                num_vs_threads = 48;
+                num_gs_threads = 4;
+                num_es_threads = 4;
+                num_ps_stack_entries = 40;
+                num_vs_stack_entries = 40;
+                num_gs_stack_entries = 32;
+                num_es_stack_entries = 16;
+                break;
+        case CHIP_RV770:
+                num_ps_gprs = 192;
+                num_vs_gprs = 56;
+                num_temp_gprs = 4;
+                num_gs_gprs = 0;
+                num_es_gprs = 0;
+                num_ps_threads = 188;
+                num_vs_threads = 60;
+                num_gs_threads = 0;
+                num_es_threads = 0;
+                num_ps_stack_entries = 256;
+                num_vs_stack_entries = 256;
+                num_gs_stack_entries = 0;
+                num_es_stack_entries = 0;
+                break;
+        case CHIP_RV730:
+        case CHIP_RV740:
+                num_ps_gprs = 84;
+                num_vs_gprs = 36;
+                num_temp_gprs = 4;
+                num_gs_gprs = 0;
+                num_es_gprs = 0;
+                num_ps_threads = 188;
+                num_vs_threads = 60;
+                num_gs_threads = 0;
+                num_es_threads = 0;
+                num_ps_stack_entries = 128;
+                num_vs_stack_entries = 128;
+                num_gs_stack_entries = 0;
+                num_es_stack_entries = 0;
+                break;
+        case CHIP_RV710:
+                num_ps_gprs = 192;
+                num_vs_gprs = 56;
+                num_temp_gprs = 4;
+                num_gs_gprs = 0;
+                num_es_gprs = 0;
+                num_ps_threads = 144;
+                num_vs_threads = 48;
+                num_gs_threads = 0;
+                num_es_threads = 0;
+                num_ps_stack_entries = 128;
+                num_vs_stack_entries = 128;
+                num_gs_stack_entries = 0;
+                num_es_stack_entries = 0;
+                break;
+        }
+        if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV610) ||
+            ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV620) ||
+            ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS780) ||
+            ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS880) ||
+            ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV710))
+                sq_config = 0;
+        else
+                sq_config = R600_VC_ENABLE;
+        sq_config |= (R600_DX9_CONSTS |
+                      R600_ALU_INST_PREFER_VECTOR |
+                      R600_PS_PRIO(0) |
+                      R600_VS_PRIO(1) |
+                      R600_GS_PRIO(2) |
+                      R600_ES_PRIO(3));
+        sq_gpr_resource_mgmt_1 = (R600_NUM_PS_GPRS(num_ps_gprs) |
+                                  R600_NUM_VS_GPRS(num_vs_gprs) |
+                                  R600_NUM_CLAUSE_TEMP_GPRS(num_temp_gprs));
+        sq_gpr_resource_mgmt_2 = (R600_NUM_GS_GPRS(num_gs_gprs) |
+                                  R600_NUM_ES_GPRS(num_es_gprs));
+        sq_thread_resource_mgmt = (R600_NUM_PS_THREADS(num_ps_threads) |
+                                   R600_NUM_VS_THREADS(num_vs_threads) |
+                                   R600_NUM_GS_THREADS(num_gs_threads) |
+                                   R600_NUM_ES_THREADS(num_es_threads));
+        sq_stack_resource_mgmt_1 = (R600_NUM_PS_STACK_ENTRIES(num_ps_stack_entries) |
+                                    R600_NUM_VS_STACK_ENTRIES(num_vs_stack_entries));
+        sq_stack_resource_mgmt_2 = (R600_NUM_GS_STACK_ENTRIES(num_gs_stack_entries) |
+                                    R600_NUM_ES_STACK_ENTRIES(num_es_stack_entries));
+        if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RV770) {
+                BEGIN_RING(r7xx_default_size + 10);
+                for (i = 0; i < r7xx_default_size; i++)
+                        OUT_RING(r7xx_default_state[i]);
+        } else {
+                BEGIN_RING(r6xx_default_size + 10);
+                for (i = 0; i < r6xx_default_size; i++)
+                        OUT_RING(r6xx_default_state[i]);
+        }
+        OUT_RING(CP_PACKET3(R600_IT_EVENT_WRITE, 0));
+        OUT_RING(R600_CACHE_FLUSH_AND_INV_EVENT);
+        /* SQ config */
+        OUT_RING(CP_PACKET3(R600_IT_SET_CONFIG_REG, 6));
+        OUT_RING((R600_SQ_CONFIG - R600_SET_CONFIG_REG_OFFSET) >> 2);
+        OUT_RING(sq_config);
+        OUT_RING(sq_gpr_resource_mgmt_1);
+        OUT_RING(sq_gpr_resource_mgmt_2);
+        OUT_RING(sq_thread_resource_mgmt);
+        OUT_RING(sq_stack_resource_mgmt_1);
+        OUT_RING(sq_stack_resource_mgmt_2);
+        ADVANCE_RING();
+}
+static inline uint32_t i2f(uint32_t input)
+{
+        u32 result, i, exponent, fraction;
+        if ((input & 0x3fff) == 0)
+                result = 0; /* 0 is a special case */
+        else {
+                exponent = 140; /* exponent biased by 127; */
+                fraction = (input & 0x3fff) << 10; /* cheat and only
+                                                      handle numbers below 2^^15 */
+                for (i = 0; i < 14; i++) {
+                        if (fraction & 0x800000)
+                                break;
+                        else {
+                                fraction = fraction << 1; /* keep
+                                                             shifting left until top bit = 1 */
+                                exponent = exponent - 1;
+                        }
+                }
+                result = exponent << 23 | (fraction & 0x7fffff); /* mask
+                                                                    off top bit; assumed 1 */
+        }
+        return result;
+}
+static inline int r600_nomm_get_vb(struct drm_device *dev)
+{
+        drm_radeon_private_t *dev_priv = dev->dev_private;
+        dev_priv->blit_vb = radeon_freelist_get(dev);
+        if (!dev_priv->blit_vb) {
+                DRM_ERROR("Unable to allocate vertex buffer for blit\n");
+                return -EAGAIN;
+        }
+        return 0;
+}
+static inline void r600_nomm_put_vb(struct drm_device *dev)
+{
+        drm_radeon_private_t *dev_priv = dev->dev_private;
+        dev_priv->blit_vb->used = 0;
+        radeon_cp_discard_buffer(dev, dev_priv->blit_vb->file_priv->master, dev_priv->blit_vb);
+}
+static inline void *r600_nomm_get_vb_ptr(struct drm_device *dev)
+{
+        drm_radeon_private_t *dev_priv = dev->dev_private;
+        return (((char *)dev->agp_buffer_map->handle +
+                 dev_priv->blit_vb->offset + dev_priv->blit_vb->used));
+}
+int
+r600_prepare_blit_copy(struct drm_device *dev, struct drm_file *file_priv)
+{
+        drm_radeon_private_t *dev_priv = dev->dev_private;
+        DRM_DEBUG("\n");
+        r600_nomm_get_vb(dev);
+        dev_priv->blit_vb->file_priv = file_priv;
+        set_default_state(dev_priv);
+        set_shaders(dev);
+        return 0;
+}
+void
+r600_done_blit_copy(struct drm_device *dev)
+{
+        drm_radeon_private_t *dev_priv = dev->dev_private;
+        RING_LOCALS;
+        DRM_DEBUG("\n");
+        BEGIN_RING(5);
+        OUT_RING(CP_PACKET3(R600_IT_EVENT_WRITE, 0));
+        OUT_RING(R600_CACHE_FLUSH_AND_INV_EVENT);
+        /* wait for 3D idle clean */
+        OUT_RING(CP_PACKET3(R600_IT_SET_CONFIG_REG, 1));
+        OUT_RING((R600_WAIT_UNTIL - R600_SET_CONFIG_REG_OFFSET) >> 2);
+        OUT_RING(RADEON_WAIT_3D_IDLE | RADEON_WAIT_3D_IDLECLEAN);
+        ADVANCE_RING();
+        COMMIT_RING();
+        r600_nomm_put_vb(dev);
+}
+void
+r600_blit_copy(struct drm_device *dev,
+               uint64_t src_gpu_addr, uint64_t dst_gpu_addr,
+               int size_bytes)
+{
+        drm_radeon_private_t *dev_priv = dev->dev_private;
+        int max_bytes;
+        u64 vb_addr;
+        u32 *vb;
+        vb = r600_nomm_get_vb_ptr(dev);
+        if ((size_bytes & 3) || (src_gpu_addr & 3) || (dst_gpu_addr & 3)) {
+                max_bytes = 8192;
+                while (size_bytes) {
+                        int cur_size = size_bytes;
+                        int src_x = src_gpu_addr & 255;
+                        int dst_x = dst_gpu_addr & 255;
+                        int h = 1;
+                        src_gpu_addr = src_gpu_addr & ~255;
+                        dst_gpu_addr = dst_gpu_addr & ~255;
+                        if (!src_x && !dst_x) {
+                                h = (cur_size / max_bytes);
+                                if (h > 8192)
+                                        h = 8192;
+                                if (h == 0)
+                                        h = 1;
+                                else
+                                        cur_size = max_bytes;
+                        } else {
+                                if (cur_size > max_bytes)
+                                        cur_size = max_bytes;
+                                if (cur_size > (max_bytes - dst_x))
+                                        cur_size = (max_bytes - dst_x);
+                                if (cur_size > (max_bytes - src_x))
+                                        cur_size = (max_bytes - src_x);
+                        }
+                        if ((dev_priv->blit_vb->used + 48) > dev_priv->blit_vb->total) {
+                                r600_nomm_put_vb(dev);
+                                r600_nomm_get_vb(dev);
+                                if (!dev_priv->blit_vb)
+                                        return;
+                                set_shaders(dev);
+                                vb = r600_nomm_get_vb_ptr(dev);
+                        }
+                        vb[0] = i2f(dst_x);
+                        vb[1] = 0;
+                        vb[2] = i2f(src_x);
+                        vb[3] = 0;
+                        vb[4] = i2f(dst_x);
+                        vb[5] = i2f(h);
+                        vb[6] = i2f(src_x);
+                        vb[7] = i2f(h);
+                        vb[8] = i2f(dst_x + cur_size);
+                        vb[9] = i2f(h);
+                        vb[10] = i2f(src_x + cur_size);
+                        vb[11] = i2f(h);
+                        /* src */
+                        set_tex_resource(dev_priv, FMT_8,
+                                         src_x + cur_size, h, src_x + cur_size,
+                                         src_gpu_addr);
+                        cp_set_surface_sync(dev_priv,
+                                            R600_TC_ACTION_ENA, (src_x + cur_size * h), src_gpu_addr);
+                        /* dst */
+                        set_render_target(dev_priv, COLOR_8,
+                                          dst_x + cur_size, h,
+                                          dst_gpu_addr);
+                        /* scissors */
+                        set_scissors(dev_priv, dst_x, 0, dst_x + cur_size, h);
+                        /* Vertex buffer setup */
+                        vb_addr = dev_priv->gart_buffers_offset +
+                                dev_priv->blit_vb->offset +
+                                dev_priv->blit_vb->used;
+                        set_vtx_resource(dev_priv, vb_addr);
+                        /* draw */
+                        draw_auto(dev_priv);
+                        cp_set_surface_sync(dev_priv,
+                                            R600_CB_ACTION_ENA | R600_CB0_DEST_BASE_ENA,
+                                            cur_size * h, dst_gpu_addr);
+                        vb += 12;
+                        dev_priv->blit_vb->used += 12 * 4;
+                        src_gpu_addr += cur_size * h;
+                        dst_gpu_addr += cur_size * h;
+                        size_bytes -= cur_size * h;
+                }
+        } else {
+                max_bytes = 8192 * 4;
+                while (size_bytes) {
+                        int cur_size = size_bytes;
+                        int src_x = (src_gpu_addr & 255);
+                        int dst_x = (dst_gpu_addr & 255);
+                        int h = 1;
+                        src_gpu_addr = src_gpu_addr & ~255;
+                        dst_gpu_addr = dst_gpu_addr & ~255;
+                        if (!src_x && !dst_x) {
+                                h = (cur_size / max_bytes);
+                                if (h > 8192)
+                                        h = 8192;
+                                if (h == 0)
+                                        h = 1;
+                                else
+                                        cur_size = max_bytes;
+                        } else {
+                                if (cur_size > max_bytes)
+                                        cur_size = max_bytes;
+                                if (cur_size > (max_bytes - dst_x))
+                                        cur_size = (max_bytes - dst_x);
+                                if (cur_size > (max_bytes - src_x))
+                                        cur_size = (max_bytes - src_x);
+                        }
+                        if ((dev_priv->blit_vb->used + 48) > dev_priv->blit_vb->total) {
+                                r600_nomm_put_vb(dev);
+                                r600_nomm_get_vb(dev);
+                                if (!dev_priv->blit_vb)
+                                        return;
+                                set_shaders(dev);
+                                vb = r600_nomm_get_vb_ptr(dev);
+                        }
+                        vb[0] = i2f(dst_x / 4);
+                        vb[1] = 0;
+                        vb[2] = i2f(src_x / 4);
+                        vb[3] = 0;
+                        vb[4] = i2f(dst_x / 4);
+                        vb[5] = i2f(h);
+                        vb[6] = i2f(src_x / 4);
+                        vb[7] = i2f(h);
+                        vb[8] = i2f((dst_x + cur_size) / 4);
+                        vb[9] = i2f(h);
+                        vb[10] = i2f((src_x + cur_size) / 4);
+                        vb[11] = i2f(h);
+                        /* src */
+                        set_tex_resource(dev_priv, FMT_8_8_8_8,
+                                         (src_x + cur_size) / 4,
+                                         h, (src_x + cur_size) / 4,
+                                         src_gpu_addr);
+                        cp_set_surface_sync(dev_priv,
+                                            R600_TC_ACTION_ENA, (src_x + cur_size * h), src_gpu_addr);
+                        /* dst */
+                        set_render_target(dev_priv, COLOR_8_8_8_8,
+                                          dst_x + cur_size, h,
+                                          dst_gpu_addr);
+                        /* scissors */
+                        set_scissors(dev_priv, (dst_x / 4), 0, (dst_x + cur_size / 4), h);
+                        /* Vertex buffer setup */
+                        vb_addr = dev_priv->gart_buffers_offset +
+                                dev_priv->blit_vb->offset +
+                                dev_priv->blit_vb->used;
+                        set_vtx_resource(dev_priv, vb_addr);
+                        /* draw */
+                        draw_auto(dev_priv);
+                        cp_set_surface_sync(dev_priv,
+                                            R600_CB_ACTION_ENA | R600_CB0_DEST_BASE_ENA,
+                                            cur_size * h, dst_gpu_addr);
+                        vb += 12;
+                        dev_priv->blit_vb->used += 12 * 4;
+                        src_gpu_addr += cur_size * h;
+                        dst_gpu_addr += cur_size * h;
+                        size_bytes -= cur_size * h;
+                }
+        }
+}
+void
+r600_blit_swap(struct drm_device *dev,
+               uint64_t src_gpu_addr, uint64_t dst_gpu_addr,
+               int sx, int sy, int dx, int dy,
+               int w, int h, int src_pitch, int dst_pitch, int cpp)
+{
+        drm_radeon_private_t *dev_priv = dev->dev_private;
+        int cb_format, tex_format;
+        u64 vb_addr;
+        u32 *vb;
+        vb = r600_nomm_get_vb_ptr(dev);
+        if ((dev_priv->blit_vb->used + 48) > dev_priv->blit_vb->total) {
+                r600_nomm_put_vb(dev);
+                r600_nomm_get_vb(dev);
+                if (!dev_priv->blit_vb)
+                        return;
+                set_shaders(dev);
+                vb = r600_nomm_get_vb_ptr(dev);
+        }
+        if (cpp == 4) {
+                cb_format = COLOR_8_8_8_8;
+                tex_format = FMT_8_8_8_8;
+        } else if (cpp == 2) {
+                cb_format = COLOR_5_6_5;
+                tex_format = FMT_5_6_5;
+        } else {
+                cb_format = COLOR_8;
+                tex_format = FMT_8;
+        }
+        vb[0] = i2f(dx);
+        vb[1] = i2f(dy);
+        vb[2] = i2f(sx);
+        vb[3] = i2f(sy);
+        vb[4] = i2f(dx);
+        vb[5] = i2f(dy + h);
+        vb[6] = i2f(sx);
+        vb[7] = i2f(sy + h);
+        vb[8] = i2f(dx + w);
+        vb[9] = i2f(dy + h);
+        vb[10] = i2f(sx + w);
+        vb[11] = i2f(sy + h);
+        /* src */
+        set_tex_resource(dev_priv, tex_format,
+                         src_pitch / cpp,
+                         sy + h, src_pitch / cpp,
+                         src_gpu_addr);
+        cp_set_surface_sync(dev_priv,
+                            R600_TC_ACTION_ENA, (src_pitch * (sy + h)), src_gpu_addr);
+        /* dst */
+        set_render_target(dev_priv, cb_format,
+                          dst_pitch / cpp, dy + h,
+                          dst_gpu_addr);
+        /* scissors */
+        set_scissors(dev_priv, dx, dy, dx + w, dy + h);
+        /* Vertex buffer setup */
+        vb_addr = dev_priv->gart_buffers_offset +
+                dev_priv->blit_vb->offset +
+                dev_priv->blit_vb->used;
+        set_vtx_resource(dev_priv, vb_addr);
+        /* draw */
+        draw_auto(dev_priv);
+        cp_set_surface_sync(dev_priv,
+                            R600_CB_ACTION_ENA | R600_CB0_DEST_BASE_ENA,
+                            dst_pitch * (dy + h), dst_gpu_addr);
+        dev_priv->blit_vb->used += 12 * 4;
+}
diff --git a/drivers/gpu/drm/radeon/r600_blit_kms.c b/drivers/gpu/drm/radeon/r600_blit_kms.c
new file mode 100644
index 000000000000..0a6f4681f468
--- /dev/null
+++ b/drivers/gpu/drm/radeon/r600_blit_kms.c
@@ -0,0 +1,805 @@
+#include "drmP.h"
+#include "drm.h"
+#include "radeon_drm.h"
+#include "radeon.h"
+#include "r600d.h"
+#include "r600_blit_shaders.h"
+#define DI_PT_RECTLIST        0x11
+#define DI_INDEX_SIZE_16_BIT  0x0
+#define DI_SRC_SEL_AUTO_INDEX 0x2
+#define FMT_8                 0x1
+#define FMT_5_6_5             0x8
+#define FMT_8_8_8_8           0x1a
+#define COLOR_8               0x1
+#define COLOR_5_6_5           0x8
+#define COLOR_8_8_8_8         0x1a
+/* emits 21 on rv770+, 23 on r600 */
+static void
+set_render_target(struct radeon_device *rdev, int format,
+                  int w, int h, u64 gpu_addr)
+{
+        u32 cb_color_info;
+        int pitch, slice;
+        h = (h + 7) & ~7;
+        if (h < 8)
+                h = 8;
+        cb_color_info = ((format << 2) | (1 << 27));
+        pitch = (w / 8) - 1;
+        slice = ((w * h) / 64) - 1;
+        radeon_ring_write(rdev, PACKET3(PACKET3_SET_CONTEXT_REG, 1));
+        radeon_ring_write(rdev, (CB_COLOR0_BASE - PACKET3_SET_CONTEXT_REG_OFFSET) >> 2);
+        radeon_ring_write(rdev, gpu_addr >> 8);
+        if (rdev->family > CHIP_R600 && rdev->family < CHIP_RV770) {
+                radeon_ring_write(rdev, PACKET3(PACKET3_SURFACE_BASE_UPDATE, 0));
+                radeon_ring_write(rdev, 2 << 0);
+        }
+        radeon_ring_write(rdev, PACKET3(PACKET3_SET_CONTEXT_REG, 1));
+        radeon_ring_write(rdev, (CB_COLOR0_SIZE - PACKET3_SET_CONTEXT_REG_OFFSET) >> 2);
+        radeon_ring_write(rdev, (pitch << 0) | (slice << 10));
+        radeon_ring_write(rdev, PACKET3(PACKET3_SET_CONTEXT_REG, 1));
+        radeon_ring_write(rdev, (CB_COLOR0_VIEW - PACKET3_SET_CONTEXT_REG_OFFSET) >> 2);
+        radeon_ring_write(rdev, 0);
+        radeon_ring_write(rdev, PACKET3(PACKET3_SET_CONTEXT_REG, 1));
+        radeon_ring_write(rdev, (CB_COLOR0_INFO - PACKET3_SET_CONTEXT_REG_OFFSET) >> 2);
+        radeon_ring_write(rdev, cb_color_info);
+        radeon_ring_write(rdev, PACKET3(PACKET3_SET_CONTEXT_REG, 1));
+        radeon_ring_write(rdev, (CB_COLOR0_TILE - PACKET3_SET_CONTEXT_REG_OFFSET) >> 2);
+        radeon_ring_write(rdev, 0);
+        radeon_ring_write(rdev, PACKET3(PACKET3_SET_CONTEXT_REG, 1));
+        radeon_ring_write(rdev, (CB_COLOR0_FRAG - PACKET3_SET_CONTEXT_REG_OFFSET) >> 2);
+        radeon_ring_write(rdev, 0);
+        radeon_ring_write(rdev, PACKET3(PACKET3_SET_CONTEXT_REG, 1));
+        radeon_ring_write(rdev, (CB_COLOR0_MASK - PACKET3_SET_CONTEXT_REG_OFFSET) >> 2);
+        radeon_ring_write(rdev, 0);
+}
+/* emits 5dw */
+static void
+cp_set_surface_sync(struct radeon_device *rdev,
+                    u32 sync_type, u32 size,
+                    u64 mc_addr)
+{
+        u32 cp_coher_size;
+        if (size == 0xffffffff)
+                cp_coher_size = 0xffffffff;
+        else
+                cp_coher_size = ((size + 255) >> 8);
+        radeon_ring_write(rdev, PACKET3(PACKET3_SURFACE_SYNC, 3));
+        radeon_ring_write(rdev, sync_type);
+        radeon_ring_write(rdev, cp_coher_size);
+        radeon_ring_write(rdev, mc_addr >> 8);
+        radeon_ring_write(rdev, 10); /* poll interval */
+}
+/* emits 21dw + 1 surface sync = 26dw */
+static void
+set_shaders(struct radeon_device *rdev)
+{
+        u64 gpu_addr;
+        u32 sq_pgm_resources;
+        /* setup shader regs */
+        sq_pgm_resources = (1 << 0);
+        /* VS */
+        gpu_addr = rdev->r600_blit.shader_gpu_addr + rdev->r600_blit.vs_offset;
+        radeon_ring_write(rdev, PACKET3(PACKET3_SET_CONTEXT_REG, 1));
+        radeon_ring_write(rdev, (SQ_PGM_START_VS - PACKET3_SET_CONTEXT_REG_OFFSET) >> 2);
+        radeon_ring_write(rdev, gpu_addr >> 8);
+        radeon_ring_write(rdev, PACKET3(PACKET3_SET_CONTEXT_REG, 1));
+        radeon_ring_write(rdev, (SQ_PGM_RESOURCES_VS - PACKET3_SET_CONTEXT_REG_OFFSET) >> 2);
+        radeon_ring_write(rdev, sq_pgm_resources);
+        radeon_ring_write(rdev, PACKET3(PACKET3_SET_CONTEXT_REG, 1));
+        radeon_ring_write(rdev, (SQ_PGM_CF_OFFSET_VS - PACKET3_SET_CONTEXT_REG_OFFSET) >> 2);
+        radeon_ring_write(rdev, 0);
+        /* PS */
+        gpu_addr = rdev->r600_blit.shader_gpu_addr + rdev->r600_blit.ps_offset;
+        radeon_ring_write(rdev, PACKET3(PACKET3_SET_CONTEXT_REG, 1));
+        radeon_ring_write(rdev, (SQ_PGM_START_PS - PACKET3_SET_CONTEXT_REG_OFFSET) >> 2);
+        radeon_ring_write(rdev, gpu_addr >> 8);
+        radeon_ring_write(rdev, PACKET3(PACKET3_SET_CONTEXT_REG, 1));
+        radeon_ring_write(rdev, (SQ_PGM_RESOURCES_PS - PACKET3_SET_CONTEXT_REG_OFFSET) >> 2);
+        radeon_ring_write(rdev, sq_pgm_resources | (1 << 28));
+        radeon_ring_write(rdev, PACKET3(PACKET3_SET_CONTEXT_REG, 1));
+        radeon_ring_write(rdev, (SQ_PGM_EXPORTS_PS - PACKET3_SET_CONTEXT_REG_OFFSET) >> 2);
+        radeon_ring_write(rdev, 2);
+        radeon_ring_write(rdev, PACKET3(PACKET3_SET_CONTEXT_REG, 1));
+        radeon_ring_write(rdev, (SQ_PGM_CF_OFFSET_PS - PACKET3_SET_CONTEXT_REG_OFFSET) >> 2);
+        radeon_ring_write(rdev, 0);
+        gpu_addr = rdev->r600_blit.shader_gpu_addr + rdev->r600_blit.vs_offset;
+        cp_set_surface_sync(rdev, PACKET3_SH_ACTION_ENA, 512, gpu_addr);
+}
+/* emits 9 + 1 sync (5) = 14*/
+static void
+set_vtx_resource(struct radeon_device *rdev, u64 gpu_addr)
+{
+        u32 sq_vtx_constant_word2;
+        sq_vtx_constant_word2 = ((upper_32_bits(gpu_addr) & 0xff) | (16 << 8));
+        radeon_ring_write(rdev, PACKET3(PACKET3_SET_RESOURCE, 7));
+        radeon_ring_write(rdev, 0x460);
+        radeon_ring_write(rdev, gpu_addr & 0xffffffff);
+        radeon_ring_write(rdev, 48 - 1);
+        radeon_ring_write(rdev, sq_vtx_constant_word2);
+        radeon_ring_write(rdev, 1 << 0);
+        radeon_ring_write(rdev, 0);
+        radeon_ring_write(rdev, 0);
+        radeon_ring_write(rdev, SQ_TEX_VTX_VALID_BUFFER << 30);
+        if ((rdev->family == CHIP_RV610) ||
+            (rdev->family == CHIP_RV620) ||
+            (rdev->family == CHIP_RS780) ||
+            (rdev->family == CHIP_RS880) ||
+            (rdev->family == CHIP_RV710))
+                cp_set_surface_sync(rdev,
+                                    PACKET3_TC_ACTION_ENA, 48, gpu_addr);
+        else
+                cp_set_surface_sync(rdev,
+                                    PACKET3_VC_ACTION_ENA, 48, gpu_addr);
+}
+/* emits 9 */
+static void
+set_tex_resource(struct radeon_device *rdev,
+                 int format, int w, int h, int pitch,
+                 u64 gpu_addr)
+{
+        uint32_t sq_tex_resource_word0, sq_tex_resource_word1, sq_tex_resource_word4;
+        if (h < 1)
+                h = 1;
+        sq_tex_resource_word0 = (1 << 0);
+        sq_tex_resource_word0 |= ((((pitch >> 3) - 1) << 8) |
+                                  ((w - 1) << 19));
+        sq_tex_resource_word1 = (format << 26);
+        sq_tex_resource_word1 |= ((h - 1) << 0);
+        sq_tex_resource_word4 = ((1 << 14) |
+                                 (0 << 16) |
+                                 (1 << 19) |
+                                 (2 << 22) |
+                                 (3 << 25));
+        radeon_ring_write(rdev, PACKET3(PACKET3_SET_RESOURCE, 7));
+        radeon_ring_write(rdev, 0);
+        radeon_ring_write(rdev, sq_tex_resource_word0);
+        radeon_ring_write(rdev, sq_tex_resource_word1);
+        radeon_ring_write(rdev, gpu_addr >> 8);
+        radeon_ring_write(rdev, gpu_addr >> 8);
+        radeon_ring_write(rdev, sq_tex_resource_word4);
+        radeon_ring_write(rdev, 0);
+        radeon_ring_write(rdev, SQ_TEX_VTX_VALID_TEXTURE << 30);
+}
+/* emits 12 */
+static void
+set_scissors(struct radeon_device *rdev, int x1, int y1,
+             int x2, int y2)
+{
+        radeon_ring_write(rdev, PACKET3(PACKET3_SET_CONTEXT_REG, 2));
+        radeon_ring_write(rdev, (PA_SC_SCREEN_SCISSOR_TL - PACKET3_SET_CONTEXT_REG_OFFSET) >> 2);
+        radeon_ring_write(rdev, (x1 << 0) | (y1 << 16));
+        radeon_ring_write(rdev, (x2 << 0) | (y2 << 16));
+        radeon_ring_write(rdev, PACKET3(PACKET3_SET_CONTEXT_REG, 2));
+        radeon_ring_write(rdev, (PA_SC_GENERIC_SCISSOR_TL - PACKET3_SET_CONTEXT_REG_OFFSET) >> 2);
+        radeon_ring_write(rdev, (x1 << 0) | (y1 << 16) | (1 << 31));
+        radeon_ring_write(rdev, (x2 << 0) | (y2 << 16));
+        radeon_ring_write(rdev, PACKET3(PACKET3_SET_CONTEXT_REG, 2));
+        radeon_ring_write(rdev, (PA_SC_WINDOW_SCISSOR_TL - PACKET3_SET_CONTEXT_REG_OFFSET) >> 2);
+        radeon_ring_write(rdev, (x1 << 0) | (y1 << 16) | (1 << 31));
+        radeon_ring_write(rdev, (x2 << 0) | (y2 << 16));
+}
+/* emits 10 */
+static void
+draw_auto(struct radeon_device *rdev)
+{
+        radeon_ring_write(rdev, PACKET3(PACKET3_SET_CONFIG_REG, 1));
+        radeon_ring_write(rdev, (VGT_PRIMITIVE_TYPE - PACKET3_SET_CONFIG_REG_OFFSET) >> 2);
+        radeon_ring_write(rdev, DI_PT_RECTLIST);
+        radeon_ring_write(rdev, PACKET3(PACKET3_INDEX_TYPE, 0));
+        radeon_ring_write(rdev, DI_INDEX_SIZE_16_BIT);
+        radeon_ring_write(rdev, PACKET3(PACKET3_NUM_INSTANCES, 0));
+        radeon_ring_write(rdev, 1);
+        radeon_ring_write(rdev, PACKET3(PACKET3_DRAW_INDEX_AUTO, 1));
+        radeon_ring_write(rdev, 3);
+        radeon_ring_write(rdev, DI_SRC_SEL_AUTO_INDEX);
+}
+/* emits 14 */
+static void
+set_default_state(struct radeon_device *rdev)
+{
+        u32 sq_config, sq_gpr_resource_mgmt_1, sq_gpr_resource_mgmt_2;
+        u32 sq_thread_resource_mgmt, sq_stack_resource_mgmt_1, sq_stack_resource_mgmt_2;
+        int num_ps_gprs, num_vs_gprs, num_temp_gprs, num_gs_gprs, num_es_gprs;
+        int num_ps_threads, num_vs_threads, num_gs_threads, num_es_threads;
+        int num_ps_stack_entries, num_vs_stack_entries, num_gs_stack_entries, num_es_stack_entries;
+        u64 gpu_addr;
+        int dwords;
+        switch (rdev->family) {
+        case CHIP_R600:
+                num_ps_gprs = 192;
+                num_vs_gprs = 56;
+                num_temp_gprs = 4;
+                num_gs_gprs = 0;
+                num_es_gprs = 0;
+                num_ps_threads = 136;
+                num_vs_threads = 48;
+                num_gs_threads = 4;
+                num_es_threads = 4;
+                num_ps_stack_entries = 128;
+                num_vs_stack_entries = 128;
+                num_gs_stack_entries = 0;
+                num_es_stack_entries = 0;
+                break;
+        case CHIP_RV630:
+        case CHIP_RV635:
+                num_ps_gprs = 84;
+                num_vs_gprs = 36;
+                num_temp_gprs = 4;
+                num_gs_gprs = 0;
+                num_es_gprs = 0;
+                num_ps_threads = 144;
+                num_vs_threads = 40;
+                num_gs_threads = 4;
+                num_es_threads = 4;
+                num_ps_stack_entries = 40;
+                num_vs_stack_entries = 40;
+                num_gs_stack_entries = 32;
+                num_es_stack_entries = 16;
+                break;
+        case CHIP_RV610:
+        case CHIP_RV620:
+        case CHIP_RS780:
+        case CHIP_RS880:
+        default:
+                num_ps_gprs = 84;
+                num_vs_gprs = 36;
+                num_temp_gprs = 4;
+                num_gs_gprs = 0;
+                num_es_gprs = 0;
+                num_ps_threads = 136;
+                num_vs_threads = 48;
+                num_gs_threads = 4;
+                num_es_threads = 4;
+                num_ps_stack_entries = 40;
+                num_vs_stack_entries = 40;
+                num_gs_stack_entries = 32;
+                num_es_stack_entries = 16;
+                break;
+        case CHIP_RV670:
+                num_ps_gprs = 144;
+                num_vs_gprs = 40;
+                num_temp_gprs = 4;
+                num_gs_gprs = 0;
+                num_es_gprs = 0;
+                num_ps_threads = 136;
+                num_vs_threads = 48;
+                num_gs_threads = 4;
+                num_es_threads = 4;
+                num_ps_stack_entries = 40;
+                num_vs_stack_entries = 40;
+                num_gs_stack_entries = 32;
+                num_es_stack_entries = 16;
+                break;
+        case CHIP_RV770:
+                num_ps_gprs = 192;
+                num_vs_gprs = 56;
+                num_temp_gprs = 4;
+                num_gs_gprs = 0;
+                num_es_gprs = 0;
+                num_ps_threads = 188;
+                num_vs_threads = 60;
+                num_gs_threads = 0;
+                num_es_threads = 0;
+                num_ps_stack_entries = 256;
+                num_vs_stack_entries = 256;
+                num_gs_stack_entries = 0;
+                num_es_stack_entries = 0;
+                break;
+        case CHIP_RV730:
+        case CHIP_RV740:
+                num_ps_gprs = 84;
+                num_vs_gprs = 36;
+                num_temp_gprs = 4;
+                num_gs_gprs = 0;
+                num_es_gprs = 0;
+                num_ps_threads = 188;
+                num_vs_threads = 60;
+                num_gs_threads = 0;
+                num_es_threads = 0;
+                num_ps_stack_entries = 128;
+                num_vs_stack_entries = 128;
+                num_gs_stack_entries = 0;
+                num_es_stack_entries = 0;
+                break;
+        case CHIP_RV710:
+                num_ps_gprs = 192;
+                num_vs_gprs = 56;
+                num_temp_gprs = 4;
+                num_gs_gprs = 0;
+                num_es_gprs = 0;
+                num_ps_threads = 144;
+                num_vs_threads = 48;
+                num_gs_threads = 0;
+                num_es_threads = 0;
+                num_ps_stack_entries = 128;
+                num_vs_stack_entries = 128;
+                num_gs_stack_entries = 0;
+                num_es_stack_entries = 0;
+                break;
+        }
+        if ((rdev->family == CHIP_RV610) ||
+            (rdev->family == CHIP_RV620) ||
+            (rdev->family == CHIP_RS780) ||
+            (rdev->family == CHIP_RS780) ||
+            (rdev->family == CHIP_RV710))
+                sq_config = 0;
+        else
+                sq_config = VC_ENABLE;
+        sq_config |= (DX9_CONSTS |
+                      ALU_INST_PREFER_VECTOR |
+                      PS_PRIO(0) |
+                      VS_PRIO(1) |
+                      GS_PRIO(2) |
+                      ES_PRIO(3));
+        sq_gpr_resource_mgmt_1 = (NUM_PS_GPRS(num_ps_gprs) |
+                                  NUM_VS_GPRS(num_vs_gprs) |
+                                  NUM_CLAUSE_TEMP_GPRS(num_temp_gprs));
+        sq_gpr_resource_mgmt_2 = (NUM_GS_GPRS(num_gs_gprs) |
+                                  NUM_ES_GPRS(num_es_gprs));
+        sq_thread_resource_mgmt = (NUM_PS_THREADS(num_ps_threads) |
+                                   NUM_VS_THREADS(num_vs_threads) |
+                                   NUM_GS_THREADS(num_gs_threads) |
+                                   NUM_ES_THREADS(num_es_threads));
+        sq_stack_resource_mgmt_1 = (NUM_PS_STACK_ENTRIES(num_ps_stack_entries) |
+                                    NUM_VS_STACK_ENTRIES(num_vs_stack_entries));
+        sq_stack_resource_mgmt_2 = (NUM_GS_STACK_ENTRIES(num_gs_stack_entries) |
+                                    NUM_ES_STACK_ENTRIES(num_es_stack_entries));
+        /* emit an IB pointing at default state */
+        dwords = (rdev->r600_blit.state_len + 0xf) & ~0xf;
+        gpu_addr = rdev->r600_blit.shader_gpu_addr + rdev->r600_blit.state_offset;
+        radeon_ring_write(rdev, PACKET3(PACKET3_INDIRECT_BUFFER, 2));
+        radeon_ring_write(rdev, gpu_addr & 0xFFFFFFFC);
+        radeon_ring_write(rdev, upper_32_bits(gpu_addr) & 0xFF);
+        radeon_ring_write(rdev, dwords);
+        radeon_ring_write(rdev, PACKET3(PACKET3_EVENT_WRITE, 0));
+        radeon_ring_write(rdev, CACHE_FLUSH_AND_INV_EVENT);
+        /* SQ config */
+        radeon_ring_write(rdev, PACKET3(PACKET3_SET_CONFIG_REG, 6));
+        radeon_ring_write(rdev, (SQ_CONFIG - PACKET3_SET_CONFIG_REG_OFFSET) >> 2);
+        radeon_ring_write(rdev, sq_config);
+        radeon_ring_write(rdev, sq_gpr_resource_mgmt_1);
+        radeon_ring_write(rdev, sq_gpr_resource_mgmt_2);
+        radeon_ring_write(rdev, sq_thread_resource_mgmt);
+        radeon_ring_write(rdev, sq_stack_resource_mgmt_1);
+        radeon_ring_write(rdev, sq_stack_resource_mgmt_2);
+}
+static inline uint32_t i2f(uint32_t input)
+{
+        u32 result, i, exponent, fraction;
+        if ((input & 0x3fff) == 0)
+                result = 0; /* 0 is a special case */
+        else {
+                exponent = 140; /* exponent biased by 127; */
+                fraction = (input & 0x3fff) << 10; /* cheat and only
+                                                      handle numbers below 2^^15 */
+                for (i = 0; i < 14; i++) {
+                        if (fraction & 0x800000)
+                                break;
+                        else {
+                                fraction = fraction << 1; /* keep
+                                                             shifting left until top bit = 1 */
+                                exponent = exponent - 1;
+                        }
+                }
+                result = exponent << 23 | (fraction & 0x7fffff); /* mask
+                                                                    off top bit; assumed 1 */
+        }
+        return result;
+}
+int r600_blit_init(struct radeon_device *rdev)
+{
+        u32 obj_size;
+        int r, dwords;
+        void *ptr;
+        u32 packet2s[16];
+        int num_packet2s = 0;
+        rdev->r600_blit.state_offset = 0;
+        if (rdev->family >= CHIP_RV770)
+                rdev->r600_blit.state_len = r7xx_default_size;
+        else
+                rdev->r600_blit.state_len = r6xx_default_size;
+        dwords = rdev->r600_blit.state_len;
+        while (dwords & 0xf) {
+                packet2s[num_packet2s++] = PACKET2(0);
+                dwords++;
+        }
+        obj_size = dwords * 4;
+        obj_size = ALIGN(obj_size, 256);
+        rdev->r600_blit.vs_offset = obj_size;
+        obj_size += r6xx_vs_size * 4;
+        obj_size = ALIGN(obj_size, 256);
+        rdev->r600_blit.ps_offset = obj_size;
+        obj_size += r6xx_ps_size * 4;
+        obj_size = ALIGN(obj_size, 256);
+        r = radeon_object_create(rdev, NULL, obj_size,
+                                 true, RADEON_GEM_DOMAIN_VRAM,
+                                 false, &rdev->r600_blit.shader_obj);
+        if (r) {
+                DRM_ERROR("r600 failed to allocate shader\n");
+                return r;
+        }
+        DRM_DEBUG("r6xx blit allocated bo %08x vs %08x ps %08x\n",
+                  obj_size,
+                  rdev->r600_blit.vs_offset, rdev->r600_blit.ps_offset);
+        r = radeon_object_kmap(rdev->r600_blit.shader_obj, &ptr);
+        if (r) {
+                DRM_ERROR("failed to map blit object %d\n", r);
+                return r;
+        }
+        if (rdev->family >= CHIP_RV770)
+                memcpy_toio(ptr + rdev->r600_blit.state_offset,
+                            r7xx_default_state, rdev->r600_blit.state_len * 4);
+        else
+                memcpy_toio(ptr + rdev->r600_blit.state_offset,
+                            r6xx_default_state, rdev->r600_blit.state_len * 4);
+        if (num_packet2s)
+                memcpy_toio(ptr + rdev->r600_blit.state_offset + (rdev->r600_blit.state_len * 4),
+                            packet2s, num_packet2s * 4);
+        memcpy(ptr + rdev->r600_blit.vs_offset, r6xx_vs, r6xx_vs_size * 4);
+        memcpy(ptr + rdev->r600_blit.ps_offset, r6xx_ps, r6xx_ps_size * 4);
+        radeon_object_kunmap(rdev->r600_blit.shader_obj);
+        return 0;
+}
+void r600_blit_fini(struct radeon_device *rdev)
+{
+        radeon_object_unpin(rdev->r600_blit.shader_obj);
+        radeon_object_unref(&rdev->r600_blit.shader_obj);
+}
+int r600_vb_ib_get(struct radeon_device *rdev)
+{
+        int r;
+        r = radeon_ib_get(rdev, &rdev->r600_blit.vb_ib);
+        if (r) {
+                DRM_ERROR("failed to get IB for vertex buffer\n");
+                return r;
+        }
+        rdev->r600_blit.vb_total = 64*1024;
+        rdev->r600_blit.vb_used = 0;
+        return 0;
+}
+void r600_vb_ib_put(struct radeon_device *rdev)
+{
+        radeon_fence_emit(rdev, rdev->r600_blit.vb_ib->fence);
+        mutex_lock(&rdev->ib_pool.mutex);
+        list_add_tail(&rdev->r600_blit.vb_ib->list, &rdev->ib_pool.scheduled_ibs);
+        mutex_unlock(&rdev->ib_pool.mutex);
+        radeon_ib_free(rdev, &rdev->r600_blit.vb_ib);
+}
+int r600_blit_prepare_copy(struct radeon_device *rdev, int size_bytes)
+{
+        int r;
+        int ring_size, line_size;
+        int max_size;
+        /* loops of emits 64 + fence emit possible */
+        int dwords_per_loop = 76, num_loops;
+        r = r600_vb_ib_get(rdev);
+        WARN_ON(r);
+        /* set_render_target emits 2 extra dwords on rv6xx */
+        if (rdev->family > CHIP_R600 && rdev->family < CHIP_RV770)
+                dwords_per_loop += 2;
+        /* 8 bpp vs 32 bpp for xfer unit */
+        if (size_bytes & 3)
+                line_size = 8192;
+        else
+                line_size = 8192*4;
+        max_size = 8192 * line_size;
+        /* major loops cover the max size transfer */
+        num_loops = ((size_bytes + max_size) / max_size);
+        /* minor loops cover the extra non aligned bits */
+        num_loops += ((size_bytes % line_size) ? 1 : 0);
+        /* calculate number of loops correctly */
+        ring_size = num_loops * dwords_per_loop;
+        /* set default  + shaders */
+        ring_size += 40; /* shaders + def state */
+        ring_size += 3; /* fence emit for VB IB */
+        ring_size += 5; /* done copy */
+        ring_size += 3; /* fence emit for done copy */
+        r = radeon_ring_lock(rdev, ring_size);
+        WARN_ON(r);
+        set_default_state(rdev); /* 14 */
+        set_shaders(rdev); /* 26 */
+        return 0;
+}
+void r600_blit_done_copy(struct radeon_device *rdev, struct radeon_fence *fence)
+{
+        int r;
+        radeon_ring_write(rdev, PACKET3(PACKET3_EVENT_WRITE, 0));
+        radeon_ring_write(rdev, CACHE_FLUSH_AND_INV_EVENT);
+        /* wait for 3D idle clean */
+        radeon_ring_write(rdev, PACKET3(PACKET3_SET_CONFIG_REG, 1));
+        radeon_ring_write(rdev, (WAIT_UNTIL - PACKET3_SET_CONFIG_REG_OFFSET) >> 2);
+        radeon_ring_write(rdev, WAIT_3D_IDLE_bit | WAIT_3D_IDLECLEAN_bit);
+        if (rdev->r600_blit.vb_ib)
+                r600_vb_ib_put(rdev);
+        if (fence)
+                r = radeon_fence_emit(rdev, fence);
+        radeon_ring_unlock_commit(rdev);
+}
+void r600_kms_blit_copy(struct radeon_device *rdev,
+                        u64 src_gpu_addr, u64 dst_gpu_addr,
+                        int size_bytes)
+{
+        int max_bytes;
+        u64 vb_gpu_addr;
+        u32 *vb;
+        DRM_DEBUG("emitting copy %16llx %16llx %d %d\n", src_gpu_addr, dst_gpu_addr,
+                  size_bytes, rdev->r600_blit.vb_used);
+        vb = (u32 *)(rdev->r600_blit.vb_ib->ptr + rdev->r600_blit.vb_used);
+        if ((size_bytes & 3) || (src_gpu_addr & 3) || (dst_gpu_addr & 3)) {
+                max_bytes = 8192;
+                while (size_bytes) {
+                        int cur_size = size_bytes;
+                        int src_x = src_gpu_addr & 255;
+                        int dst_x = dst_gpu_addr & 255;
+                        int h = 1;
+                        src_gpu_addr = src_gpu_addr & ~255;
+                        dst_gpu_addr = dst_gpu_addr & ~255;
+                        if (!src_x && !dst_x) {
+                                h = (cur_size / max_bytes);
+                                if (h > 8192)
+                                        h = 8192;
+                                if (h == 0)
+                                        h = 1;
+                                else
+                                        cur_size = max_bytes;
+                        } else {
+                                if (cur_size > max_bytes)
+                                        cur_size = max_bytes;
+                                if (cur_size > (max_bytes - dst_x))
+                                        cur_size = (max_bytes - dst_x);
+                                if (cur_size > (max_bytes - src_x))
+                                        cur_size = (max_bytes - src_x);
+                        }
+                        if ((rdev->r600_blit.vb_used + 48) > rdev->r600_blit.vb_total) {
+                                WARN_ON(1);
+#if 0
+                                r600_vb_ib_put(rdev);
+                                r600_nomm_put_vb(dev);
+                                r600_nomm_get_vb(dev);
+                                if (!dev_priv->blit_vb)
+                                        return;
+                                set_shaders(dev);
+                                vb = r600_nomm_get_vb_ptr(dev);
+#endif
+                        }
+                        vb[0] = i2f(dst_x);
+                        vb[1] = 0;
+                        vb[2] = i2f(src_x);
+                        vb[3] = 0;
+                        vb[4] = i2f(dst_x);
+                        vb[5] = i2f(h);
+                        vb[6] = i2f(src_x);
+                        vb[7] = i2f(h);
+                        vb[8] = i2f(dst_x + cur_size);
+                        vb[9] = i2f(h);
+                        vb[10] = i2f(src_x + cur_size);
+                        vb[11] = i2f(h);
+                        /* src 9 */
+                        set_tex_resource(rdev, FMT_8,
+                                         src_x + cur_size, h, src_x + cur_size,
+                                         src_gpu_addr);
+                        /* 5 */
+                        cp_set_surface_sync(rdev,
+                                            PACKET3_TC_ACTION_ENA, (src_x + cur_size * h), src_gpu_addr);
+                        /* dst 23 */
+                        set_render_target(rdev, COLOR_8,
+                                          dst_x + cur_size, h,
+                                          dst_gpu_addr);
+                        /* scissors 12 */
+                        set_scissors(rdev, dst_x, 0, dst_x + cur_size, h);
+                        /* 14 */
+                        vb_gpu_addr = rdev->r600_blit.vb_ib->gpu_addr + rdev->r600_blit.vb_used;
+                        set_vtx_resource(rdev, vb_gpu_addr);
+                        /* draw 10 */
+                        draw_auto(rdev);
+                        /* 5 */
+                        cp_set_surface_sync(rdev,
+                                            PACKET3_CB_ACTION_ENA | PACKET3_CB0_DEST_BASE_ENA,
+                                            cur_size * h, dst_gpu_addr);
+                        vb += 12;
+                        rdev->r600_blit.vb_used += 12 * 4;
+                        src_gpu_addr += cur_size * h;
+                        dst_gpu_addr += cur_size * h;
+                        size_bytes -= cur_size * h;
+                }
+        } else {
+                max_bytes = 8192 * 4;
+                while (size_bytes) {
+                        int cur_size = size_bytes;
+                        int src_x = (src_gpu_addr & 255);
+                        int dst_x = (dst_gpu_addr & 255);
+                        int h = 1;
+                        src_gpu_addr = src_gpu_addr & ~255;
+                        dst_gpu_addr = dst_gpu_addr & ~255;
+                        if (!src_x && !dst_x) {
+                                h = (cur_size / max_bytes);
+                                if (h > 8192)
+                                        h = 8192;
+                                if (h == 0)
+                                        h = 1;
+                                else
+                                        cur_size = max_bytes;
+                        } else {
+                                if (cur_size > max_bytes)
+                                        cur_size = max_bytes;
+                                if (cur_size > (max_bytes - dst_x))
+                                        cur_size = (max_bytes - dst_x);
+                                if (cur_size > (max_bytes - src_x))
+                                        cur_size = (max_bytes - src_x);
+                        }
+                        if ((rdev->r600_blit.vb_used + 48) > rdev->r600_blit.vb_total) {
+                                WARN_ON(1);
+                        }
+#if 0
+                        if ((rdev->blit_vb->used + 48) > rdev->blit_vb->total) {
+                                r600_nomm_put_vb(dev);
+                                r600_nomm_get_vb(dev);
+                                if (!rdev->blit_vb)
+                                        return;
+                                set_shaders(dev);
+                                vb = r600_nomm_get_vb_ptr(dev);
+                        }
+#endif
+                        vb[0] = i2f(dst_x / 4);
+                        vb[1] = 0;
+                        vb[2] = i2f(src_x / 4);
+                        vb[3] = 0;
+                        vb[4] = i2f(dst_x / 4);
+                        vb[5] = i2f(h);
+                        vb[6] = i2f(src_x / 4);
+                        vb[7] = i2f(h);
+                        vb[8] = i2f((dst_x + cur_size) / 4);
+                        vb[9] = i2f(h);
+                        vb[10] = i2f((src_x + cur_size) / 4);
+                        vb[11] = i2f(h);
+                        /* src 9 */
+                        set_tex_resource(rdev, FMT_8_8_8_8,
+                                         (src_x + cur_size) / 4,
+                                         h, (src_x + cur_size) / 4,
+                                         src_gpu_addr);
+                        /* 5 */
+                        cp_set_surface_sync(rdev,
+                                            PACKET3_TC_ACTION_ENA, (src_x + cur_size * h), src_gpu_addr);
+                        /* dst 23 */
+                        set_render_target(rdev, COLOR_8_8_8_8,
+                                          dst_x + cur_size, h,
+                                          dst_gpu_addr);
+                        /* scissors 12  */
+                        set_scissors(rdev, (dst_x / 4), 0, (dst_x + cur_size / 4), h);
+                        /* Vertex buffer setup 14 */
+                        vb_gpu_addr = rdev->r600_blit.vb_ib->gpu_addr + rdev->r600_blit.vb_used;
+                        set_vtx_resource(rdev, vb_gpu_addr);
+                        /* draw 10 */
+                        draw_auto(rdev);
+                        /* 5 */
+                        cp_set_surface_sync(rdev,
+                                            PACKET3_CB_ACTION_ENA | PACKET3_CB0_DEST_BASE_ENA,
+                                            cur_size * h, dst_gpu_addr);
+                        /* 78 ring dwords per loop */
+                        vb += 12;
+                        rdev->r600_blit.vb_used += 12 * 4;
+                        src_gpu_addr += cur_size * h;
+                        dst_gpu_addr += cur_size * h;
+                        size_bytes -= cur_size * h;
+                }
+        }
+}
diff --git a/drivers/gpu/drm/radeon/r600_blit_shaders.c b/drivers/gpu/drm/radeon/r600_blit_shaders.c
new file mode 100644
index 000000000000..d745e815c2e8
--- /dev/null
+++ b/drivers/gpu/drm/radeon/r600_blit_shaders.c
@@ -0,0 +1,1072 @@
+#include <linux/types.h>
+#include <linux/kernel.h>
+const u32 r6xx_default_state[] =
+{
+        0xc0002400,
+        0x00000000,
+        0xc0012800,
+        0x80000000,
+        0x80000000,
+        0xc0004600,
+        0x00000016,
+        0xc0016800,
+        0x00000010,
+        0x00028000,
+        0xc0016800,
+        0x00000010,
+        0x00008000,
+        0xc0016800,
+        0x00000542,
+        0x07000003,
+        0xc0016800,
+        0x000005c5,
+        0x00000000,
+        0xc0016800,
+        0x00000363,
+        0x00000000,
+        0xc0016800,
+        0x0000060c,
+        0x82000000,
+        0xc0016800,
+        0x0000060e,
+        0x01020204,
+        0xc0016f00,
+        0x00000000,
+        0x00000000,
+        0xc0016f00,
+        0x00000001,
+        0x00000000,
+        0xc0096900,
+        0x0000022a,
+        0x00000000,
+        0x00000000,
+        0x00000000,
+        0x00000000,
+        0x00000000,
+        0x00000000,
+        0x00000000,
+        0x00000000,
+        0x00000000,
+        0xc0016900,
+        0x00000004,
+        0x00000000,
+        0xc0016900,
+        0x0000000a,
+        0x00000000,
+        0xc0016900,
+        0x0000000b,
+        0x00000000,
+        0xc0016900,
+        0x0000010c,
+        0x00000000,
+        0xc0016900,
+        0x0000010d,
+        0x00000000,
+        0xc0016900,
+        0x00000200,
+        0x00000000,
+        0xc0016900,
+        0x00000343,
+        0x00000060,
+        0xc0016900,
+        0x00000344,
+        0x00000040,
+        0xc0016900,
+        0x00000351,
+        0x0000aa00,
+        0xc0016900,
+        0x00000104,
+        0x00000000,
+        0xc0016900,
+        0x0000010e,
+        0x00000000,
+        0xc0046900,
+        0x00000105,
+        0x00000000,
+        0x00000000,
+        0x00000000,
+        0x00000000,
+        0xc0036900,
+        0x00000109,
+        0x00000000,
+        0x00000000,
+        0x00000000,
+        0xc0046900,
+        0x0000030c,
+        0x01000000,
+        0x00000000,
+        0x00000000,
+        0x00000000,
+        0xc0046900,
+        0x00000048,
+        0x3f800000,
+        0x00000000,
+        0x3f800000,
+        0x3f800000,
+        0xc0016900,
+        0x0000008e,
+        0x0000000f,
+        0xc0016900,
+        0x00000080,
+        0x00000000,
+        0xc0016900,
+        0x00000083,
+        0x0000ffff,
+        0xc0016900,
+        0x00000084,
+        0x00000000,
+        0xc0016900,
+        0x00000085,
+        0x20002000,
+        0xc0016900,
+        0x00000086,
+        0x00000000,
+        0xc0016900,
+        0x00000087,
+        0x20002000,
+        0xc0016900,
+        0x00000088,
+        0x00000000,
+        0xc0016900,
+        0x00000089,
+        0x20002000,
+        0xc0016900,
+        0x0000008a,
+        0x00000000,
+        0xc0016900,
+        0x0000008b,
+        0x20002000,
+        0xc0016900,
+        0x0000008c,
+        0x00000000,
+        0xc0016900,
+        0x00000094,
+        0x80000000,
+        0xc0016900,
+        0x00000095,
+        0x20002000,
+        0xc0026900,
+        0x000000b4,
+        0x00000000,
+        0x3f800000,
+        0xc0016900,
+        0x00000096,
+        0x80000000,
+        0xc0016900,
+        0x00000097,
+        0x20002000,
+        0xc0026900,
+        0x000000b6,
+        0x00000000,
+        0x3f800000,
+        0xc0016900,
+        0x00000098,
+        0x80000000,
+        0xc0016900,
+        0x00000099,
+        0x20002000,
+        0xc0026900,
+        0x000000b8,
+        0x00000000,
+        0x3f800000,
+        0xc0016900,
+        0x0000009a,
+        0x80000000,
+        0xc0016900,
+        0x0000009b,
+        0x20002000,
+        0xc0026900,
+        0x000000ba,
+        0x00000000,
+        0x3f800000,
+        0xc0016900,
+        0x0000009c,
+        0x80000000,
+        0xc0016900,
+        0x0000009d,
+        0x20002000,
+        0xc0026900,
+        0x000000bc,
+        0x00000000,
+        0x3f800000,
+        0xc0016900,
+        0x0000009e,
+        0x80000000,
+        0xc0016900,
+        0x0000009f,
+        0x20002000,
+        0xc0026900,
+        0x000000be,
+        0x00000000,
+        0x3f800000,
+        0xc0016900,
+        0x000000a0,
+        0x80000000,
+        0xc0016900,
+        0x000000a1,
+        0x20002000,
+        0xc0026900,
+        0x000000c0,
+        0x00000000,
+        0x3f800000,
+        0xc0016900,
+        0x000000a2,
+        0x80000000,
+        0xc0016900,
+        0x000000a3,
+        0x20002000,
+        0xc0026900,
+        0x000000c2,
+        0x00000000,
+        0x3f800000,
+        0xc0016900,
+        0x000000a4,
+        0x80000000,
+        0xc0016900,
+        0x000000a5,
+        0x20002000,
+        0xc0026900,
+        0x000000c4,
+        0x00000000,
+        0x3f800000,
+        0xc0016900,
+        0x000000a6,
+        0x80000000,
+        0xc0016900,
+        0x000000a7,
+        0x20002000,
+        0xc0026900,
+        0x000000c6,
+        0x00000000,
+        0x3f800000,
+        0xc0016900,
+        0x000000a8,
+        0x80000000,
+        0xc0016900,
+        0x000000a9,
+        0x20002000,
+        0xc0026900,
+        0x000000c8,
+        0x00000000,
+        0x3f800000,
+        0xc0016900,
+        0x000000aa,
+        0x80000000,
+        0xc0016900,
+        0x000000ab,
+        0x20002000,
+        0xc0026900,
+        0x000000ca,
+        0x00000000,
+        0x3f800000,
+        0xc0016900,
+        0x000000ac,
+        0x80000000,
+        0xc0016900,
+        0x000000ad,
+        0x20002000,
+        0xc0026900,
+        0x000000cc,
+        0x00000000,
+        0x3f800000,
+        0xc0016900,
+        0x000000ae,
+        0x80000000,
+        0xc0016900,
+        0x000000af,
+        0x20002000,
+        0xc0026900,
+        0x000000ce,
+        0x00000000,
+        0x3f800000,
+        0xc0016900,
+        0x000000b0,
+        0x80000000,
+        0xc0016900,
+        0x000000b1,
+        0x20002000,
+        0xc0026900,
+        0x000000d0,
+        0x00000000,
+        0x3f800000,
+        0xc0016900,
+        0x000000b2,
+        0x80000000,
+        0xc0016900,
+        0x000000b3,
+        0x20002000,
+        0xc0026900,
+        0x000000d2,
+        0x00000000,
+        0x3f800000,
+        0xc0016900,
+        0x00000293,
+        0x00004010,
+        0xc0016900,
+        0x00000300,
+        0x00000000,
+        0xc0016900,
+        0x00000301,
+        0x00000000,
+        0xc0016900,
+        0x00000312,
+        0xffffffff,
+        0xc0016900,
+        0x00000307,
+        0x00000000,
+        0xc0016900,
+        0x00000308,
+        0x00000000,
+        0xc0016900,
+        0x00000283,
+        0x00000000,
+        0xc0016900,
+        0x00000292,
+        0x00000000,
+        0xc0066900,
+        0x0000010f,
+        0x00000000,
+        0x00000000,
+        0x00000000,
+        0x00000000,
+        0x00000000,
+        0x00000000,
+        0xc0016900,
+        0x00000206,
+        0x00000000,
+        0xc0016900,
+        0x00000207,
+        0x00000000,
+        0xc0016900,
+        0x00000208,
+        0x00000000,
+        0xc0046900,
+        0x00000303,
+        0x3f800000,
+        0x3f800000,
+        0x3f800000,
+        0x3f800000,
+        0xc0016900,
+        0x00000205,
+        0x00000004,
+        0xc0016900,
+        0x00000280,
+        0x00000000,
+        0xc0016900,
+        0x00000281,
+        0x00000000,
+        0xc0016900,
+        0x0000037e,
+        0x00000000,
+        0xc0016900,
+        0x00000382,
+        0x00000000,
+        0xc0016900,
+        0x00000380,
+        0x00000000,
+        0xc0016900,
+        0x00000383,
+        0x00000000,
+        0xc0016900,
+        0x00000381,
+        0x00000000,
+        0xc0016900,
+        0x00000282,
+        0x00000008,
+        0xc0016900,
+        0x00000302,
+        0x0000002d,
+        0xc0016900,
+        0x0000037f,
+        0x00000000,
+        0xc0016900,
+        0x000001b2,
+        0x00000000,
+        0xc0016900,
+        0x000001b6,
+        0x00000000,
+        0xc0016900,
+        0x000001b7,
+        0x00000000,
+        0xc0016900,
+        0x000001b8,
+        0x00000000,
+        0xc0016900,
+        0x000001b9,
+        0x00000000,
+        0xc0016900,
+        0x00000225,
+        0x00000000,
+        0xc0016900,
+        0x00000229,
+        0x00000000,
+        0xc0016900,
+        0x00000237,
+        0x00000000,
+        0xc0016900,
+        0x00000100,
+        0x00000800,
+        0xc0016900,
+        0x00000101,
+        0x00000000,
+        0xc0016900,
+        0x00000102,
+        0x00000000,
+        0xc0016900,
+        0x000002a8,
+        0x00000000,
+        0xc0016900,
+        0x000002a9,
+        0x00000000,
+        0xc0016900,
+        0x00000103,
+        0x00000000,
+        0xc0016900,
+        0x00000284,
+        0x00000000,
+        0xc0016900,
+        0x00000290,
+        0x00000000,
+        0xc0016900,
+        0x00000285,
+        0x00000000,
+        0xc0016900,
+        0x00000286,
+        0x00000000,
+        0xc0016900,
+        0x00000287,
+        0x00000000,
+        0xc0016900,
+        0x00000288,
+        0x00000000,
+        0xc0016900,
+        0x00000289,
+        0x00000000,
+        0xc0016900,
+        0x0000028a,
+        0x00000000,
+        0xc0016900,
+        0x0000028b,
+        0x00000000,
+        0xc0016900,
+        0x0000028c,
+        0x00000000,
+        0xc0016900,
+        0x0000028d,
+        0x00000000,
+        0xc0016900,
+        0x0000028e,
+        0x00000000,
+        0xc0016900,
+        0x0000028f,
+        0x00000000,
+        0xc0016900,
+        0x000002a1,
+        0x00000000,
+        0xc0016900,
+        0x000002a5,
+        0x00000000,
+        0xc0016900,
+        0x000002ac,
+        0x00000000,
+        0xc0016900,
+        0x000002ad,
+        0x00000000,
+        0xc0016900,
+        0x000002ae,
+        0x00000000,
+        0xc0016900,
+        0x000002c8,
+        0x00000000,
+        0xc0016900,
+        0x00000206,
+        0x00000100,
+        0xc0016900,
+        0x00000204,
+        0x00010000,
+        0xc0036e00,
+        0x00000000,
+        0x00000012,
+        0x00000000,
+        0x00000000,
+        0xc0016900,
+        0x0000008f,
+        0x0000000f,
+        0xc0016900,
+        0x000001e8,
+        0x00000001,
+        0xc0016900,
+        0x00000202,
+        0x00cc0000,
+        0xc0016900,
+        0x00000205,
+        0x00000244,
+        0xc0016900,
+        0x00000203,
+        0x00000210,
+        0xc0016900,
+        0x000001b1,
+        0x00000000,
+        0xc0016900,
+        0x00000185,
+        0x00000000,
+        0xc0016900,
+        0x000001b3,
+        0x00000001,
+        0xc0016900,
+        0x000001b4,
+        0x00000000,
+        0xc0016900,
+        0x00000191,
+        0x00000b00,
+        0xc0016900,
+        0x000001b5,
+        0x00000000,
+};
+const u32 r7xx_default_state[] =
+{
+        0xc0012800,
+        0x80000000,
+        0x80000000,
+        0xc0004600,
+        0x00000016,
+        0xc0016800,
+        0x00000010,
+        0x00028000,
+        0xc0016800,
+        0x00000010,
+        0x00008000,
+        0xc0016800,
+        0x00000542,
+        0x07000002,
+        0xc0016800,
+        0x000005c5,
+        0x00000000,
+        0xc0016800,
+        0x00000363,
+        0x00004000,
+        0xc0016800,
+        0x0000060c,
+        0x00000000,
+        0xc0016800,
+        0x0000060e,
+        0x00420204,
+        0xc0016f00,
+        0x00000000,
+        0x00000000,
+        0xc0016f00,
+        0x00000001,
+        0x00000000,
+        0xc0096900,
+        0x0000022a,
+        0x00000000,
+        0x00000000,
+        0x00000000,
+        0x00000000,
+        0x00000000,
+        0x00000000,
+        0x00000000,
+        0x00000000,
+        0x00000000,
+        0xc0016900,
+        0x00000004,
+        0x00000000,
+        0xc0016900,
+        0x0000000a,
+        0x00000000,
+        0xc0016900,
+        0x0000000b,
+        0x00000000,
+        0xc0016900,
+        0x0000010c,
+        0x00000000,
+        0xc0016900,
+        0x0000010d,
+        0x00000000,
+        0xc0016900,
+        0x00000200,
+        0x00000000,
+        0xc0016900,
+        0x00000343,
+        0x00000060,
+        0xc0016900,
+        0x00000344,
+        0x00000000,
+        0xc0016900,
+        0x00000351,
+        0x0000aa00,
+        0xc0016900,
+        0x00000104,
+        0x00000000,
+        0xc0016900,
+        0x0000010e,
+        0x00000000,
+        0xc0046900,
+        0x00000105,
+        0x00000000,
+        0x00000000,
+        0x00000000,
+        0x00000000,
+        0xc0046900,
+        0x0000030c,
+        0x01000000,
+        0x00000000,
+        0x00000000,
+        0x00000000,
+        0xc0016900,
+        0x0000008e,
+        0x0000000f,
+        0xc0016900,
+        0x00000080,
+        0x00000000,
+        0xc0016900,
+        0x00000083,
+        0x0000ffff,
+        0xc0016900,
+        0x00000084,
+        0x00000000,
+        0xc0016900,
+        0x00000085,
+        0x20002000,
+        0xc0016900,
+        0x00000086,
+        0x00000000,
+        0xc0016900,
+        0x00000087,
+        0x20002000,
+        0xc0016900,
+        0x00000088,
+        0x00000000,
+        0xc0016900,
+        0x00000089,
+        0x20002000,
+        0xc0016900,
+        0x0000008a,
+        0x00000000,
+        0xc0016900,
+        0x0000008b,
+        0x20002000,
+        0xc0016900,
+        0x0000008c,
+        0xaaaaaaaa,
+        0xc0016900,
+        0x00000094,
+        0x80000000,
+        0xc0016900,
+        0x00000095,
+        0x20002000,
+        0xc0026900,
+        0x000000b4,
+        0x00000000,
+        0x3f800000,
+        0xc0016900,
+        0x00000096,
+        0x80000000,
+        0xc0016900,
+        0x00000097,
+        0x20002000,
+        0xc0026900,
+        0x000000b6,
+        0x00000000,
+        0x3f800000,
+        0xc0016900,
+        0x00000098,
+        0x80000000,
+        0xc0016900,
+        0x00000099,
+        0x20002000,
+        0xc0026900,
+        0x000000b8,
+        0x00000000,
+        0x3f800000,
+        0xc0016900,
+        0x0000009a,
+        0x80000000,
+        0xc0016900,
+        0x0000009b,
+        0x20002000,
+        0xc0026900,
+        0x000000ba,
+        0x00000000,
+        0x3f800000,
+        0xc0016900,
+        0x0000009c,
+        0x80000000,
+        0xc0016900,
+        0x0000009d,
+        0x20002000,
+        0xc0026900,
+        0x000000bc,
+        0x00000000,
+        0x3f800000,
+        0xc0016900,
+        0x0000009e,
+        0x80000000,
+        0xc0016900,
+        0x0000009f,
+        0x20002000,
+        0xc0026900,
+        0x000000be,
+        0x00000000,
+        0x3f800000,
+        0xc0016900,
+        0x000000a0,
+        0x80000000,
+        0xc0016900,
+        0x000000a1,
+        0x20002000,
+        0xc0026900,
+        0x000000c0,
+        0x00000000,
+        0x3f800000,
+        0xc0016900,
+        0x000000a2,
+        0x80000000,
+        0xc0016900,
+        0x000000a3,
+        0x20002000,
+        0xc0026900,
+        0x000000c2,
+        0x00000000,
+        0x3f800000,
+        0xc0016900,
+        0x000000a4,
+        0x80000000,
+        0xc0016900,
+        0x000000a5,
+        0x20002000,
+        0xc0026900,
+        0x000000c4,
+        0x00000000,
+        0x3f800000,
+        0xc0016900,
+        0x000000a6,
+        0x80000000,
+        0xc0016900,
+        0x000000a7,
+        0x20002000,
+        0xc0026900,
+        0x000000c6,
+        0x00000000,
+        0x3f800000,
+        0xc0016900,
+        0x000000a8,
+        0x80000000,
+        0xc0016900,
+        0x000000a9,
+        0x20002000,
+        0xc0026900,
+        0x000000c8,
+        0x00000000,
+        0x3f800000,
+        0xc0016900,
+        0x000000aa,
+        0x80000000,
+        0xc0016900,
+        0x000000ab,
+        0x20002000,
+        0xc0026900,
+        0x000000ca,
+        0x00000000,
+        0x3f800000,
+        0xc0016900,
+        0x000000ac,
+        0x80000000,
+        0xc0016900,
+        0x000000ad,
+        0x20002000,
+        0xc0026900,
+        0x000000cc,
+        0x00000000,
+        0x3f800000,
+        0xc0016900,
+        0x000000ae,
+        0x80000000,
+        0xc0016900,
+        0x000000af,
+        0x20002000,
+        0xc0026900,
+        0x000000ce,
+        0x00000000,
+        0x3f800000,
+        0xc0016900,
+        0x000000b0,
+        0x80000000,
+        0xc0016900,
+        0x000000b1,
+        0x20002000,
+        0xc0026900,
+        0x000000d0,
+        0x00000000,
+        0x3f800000,
+        0xc0016900,
+        0x000000b2,
+        0x80000000,
+        0xc0016900,
+        0x000000b3,
+        0x20002000,
+        0xc0026900,
+        0x000000d2,
+        0x00000000,
+        0x3f800000,
+        0xc0016900,
+        0x00000293,
+        0x00514000,
+        0xc0016900,
+        0x00000300,
+        0x00000000,
+        0xc0016900,
+        0x00000301,
+        0x00000000,
+        0xc0016900,
+        0x00000312,
+        0xffffffff,
+        0xc0016900,
+        0x00000307,
+        0x00000000,
+        0xc0016900,
+        0x00000308,
+        0x00000000,
+        0xc0016900,
+        0x00000283,
+        0x00000000,
+        0xc0016900,
+        0x00000292,
+        0x00000000,
+        0xc0066900,
+        0x0000010f,
+        0x00000000,
+        0x00000000,
+        0x00000000,
+        0x00000000,
+        0x00000000,
+        0x00000000,
+        0xc0016900,
+        0x00000206,
+        0x00000000,
+        0xc0016900,
+        0x00000207,
+        0x00000000,
+        0xc0016900,
+        0x00000208,
+        0x00000000,
+        0xc0046900,
+        0x00000303,
+        0x3f800000,
+        0x3f800000,
+        0x3f800000,
+        0x3f800000,
+        0xc0016900,
+        0x00000205,
+        0x00000004,
+        0xc0016900,
+        0x00000280,
+        0x00000000,
+        0xc0016900,
+        0x00000281,
+        0x00000000,
+        0xc0016900,
+        0x0000037e,
+        0x00000000,
+        0xc0016900,
+        0x00000382,
+        0x00000000,
+        0xc0016900,
+        0x00000380,
+        0x00000000,
+        0xc0016900,
+        0x00000383,
+        0x00000000,
+        0xc0016900,
+        0x00000381,
+        0x00000000,
+        0xc0016900,
+        0x00000282,
+        0x00000008,
+        0xc0016900,
+        0x00000302,
+        0x0000002d,
+        0xc0016900,
+        0x0000037f,
+        0x00000000,
+        0xc0016900,
+        0x000001b2,
+        0x00000001,
+        0xc0016900,
+        0x000001b6,
+        0x00000000,
+        0xc0016900,
+        0x000001b7,
+        0x00000000,
+        0xc0016900,
+        0x000001b8,
+        0x00000000,
+        0xc0016900,
+        0x000001b9,
+        0x00000000,
+        0xc0016900,
+        0x00000225,
+        0x00000000,
+        0xc0016900,
+        0x00000229,
+        0x00000000,
+        0xc0016900,
+        0x00000237,
+        0x00000000,
+        0xc0016900,
+        0x00000100,
+        0x00000800,
+        0xc0016900,
+        0x00000101,
+        0x00000000,
+        0xc0016900,
+        0x00000102,
+        0x00000000,
+        0xc0016900,
+        0x000002a8,
+        0x00000000,
+        0xc0016900,
+        0x000002a9,
+        0x00000000,
+        0xc0016900,
+        0x00000103,
+        0x00000000,
+        0xc0016900,
+        0x00000284,
+        0x00000000,
+        0xc0016900,
+        0x00000290,
+        0x00000000,
+        0xc0016900,
+        0x00000285,
+        0x00000000,
+        0xc0016900,
+        0x00000286,
+        0x00000000,
+        0xc0016900,
+        0x00000287,
+        0x00000000,
+        0xc0016900,
+        0x00000288,
+        0x00000000,
+        0xc0016900,
+        0x00000289,
+        0x00000000,
+        0xc0016900,
+        0x0000028a,
+        0x00000000,
+        0xc0016900,
+        0x0000028b,
+        0x00000000,
+        0xc0016900,
+        0x0000028c,
+        0x00000000,
+        0xc0016900,
+        0x0000028d,
+        0x00000000,
+        0xc0016900,
+        0x0000028e,
+        0x00000000,
+        0xc0016900,
+        0x0000028f,
+        0x00000000,
+        0xc0016900,
+        0x000002a1,
+        0x00000000,
+        0xc0016900,
+        0x000002a5,
+        0x00000000,
+        0xc0016900,
+        0x000002ac,
+        0x00000000,
+        0xc0016900,
+        0x000002ad,
+        0x00000000,
+        0xc0016900,
+        0x000002ae,
+        0x00000000,
+        0xc0016900,
+        0x000002c8,
+        0x00000000,
+        0xc0016900,
+        0x00000206,
+        0x00000100,
+        0xc0016900,
+        0x00000204,
+        0x00010000,
+        0xc0036e00,
+        0x00000000,
+        0x00000012,
+        0x00000000,
+        0x00000000,
+        0xc0016900,
+        0x0000008f,
+        0x0000000f,
+        0xc0016900,
+        0x000001e8,
+        0x00000001,
+        0xc0016900,
+        0x00000202,
+        0x00cc0000,
+        0xc0016900,
+        0x00000205,
+        0x00000244,
+        0xc0016900,
+        0x00000203,
+        0x00000210,
+        0xc0016900,
+        0x000001b1,
+        0x00000000,
+        0xc0016900,
+        0x00000185,
+        0x00000000,
+        0xc0016900,
+        0x000001b3,
+        0x00000001,
+        0xc0016900,
+        0x000001b4,
+        0x00000000,
+        0xc0016900,
+        0x00000191,
+        0x00000b00,
+        0xc0016900,
+        0x000001b5,
+        0x00000000,
+};
+/* same for r6xx/r7xx */
+const u32 r6xx_vs[] =
+{
+        0x00000004,
+        0x81000000,
+        0x0000203c,
+        0x94000b08,
+        0x00004000,
+        0x14200b1a,
+        0x00000000,
+        0x00000000,
+        0x3c000000,
+        0x68cd1000,
+        0x00080000,
+        0x00000000,
+};
+const u32 r6xx_ps[] =
+{
+        0x00000002,
+        0x80800000,
+        0x00000000,
+        0x94200688,
+        0x00000010,
+        0x000d1000,
+        0xb0800000,
+        0x00000000,
+};
+const u32 r6xx_ps_size = ARRAY_SIZE(r6xx_ps);
+const u32 r6xx_vs_size = ARRAY_SIZE(r6xx_vs);
+const u32 r6xx_default_size = ARRAY_SIZE(r6xx_default_state);
+const u32 r7xx_default_size = ARRAY_SIZE(r7xx_default_state);
diff --git a/drivers/gpu/drm/radeon/r600_blit_shaders.h b/drivers/gpu/drm/radeon/r600_blit_shaders.h
new file mode 100644
index 000000000000..fdc3b378cbb0
--- /dev/null
+++ b/drivers/gpu/drm/radeon/r600_blit_shaders.h
@@ -0,0 +1,14 @@
+#ifndef R600_BLIT_SHADERS_H
+#define R600_BLIT_SHADERS_H
+extern const u32 r6xx_ps[];
+extern const u32 r6xx_vs[];
+extern const u32 r7xx_default_state[];
+extern const u32 r6xx_default_state[];
+extern const u32 r6xx_ps_size, r6xx_vs_size;
+extern const u32 r6xx_default_size, r7xx_default_size;
+#endif
diff --git a/drivers/gpu/drm/radeon/r600_cp.c b/drivers/gpu/drm/radeon/r600_cp.c
index 20f17908b036..6d5a711c2e91 100644
--- a/drivers/gpu/drm/radeon/r600_cp.c
+++ b/drivers/gpu/drm/radeon/r600_cp.c
@@ -31,7 +31,38 @@
 #include "radeon_drm.h"
 #include "radeon_drv.h"
-#include "r600_microcode.h"
+#define PFP_UCODE_SIZE 576
+#define PM4_UCODE_SIZE 1792
+#define R700_PFP_UCODE_SIZE 848
+#define R700_PM4_UCODE_SIZE 1360
+/* Firmware Names */
+MODULE_FIRMWARE("radeon/R600_pfp.bin");
+MODULE_FIRMWARE("radeon/R600_me.bin");
+MODULE_FIRMWARE("radeon/RV610_pfp.bin");
+MODULE_FIRMWARE("radeon/RV610_me.bin");
+MODULE_FIRMWARE("radeon/RV630_pfp.bin");
+MODULE_FIRMWARE("radeon/RV630_me.bin");
+MODULE_FIRMWARE("radeon/RV620_pfp.bin");
+MODULE_FIRMWARE("radeon/RV620_me.bin");
+MODULE_FIRMWARE("radeon/RV635_pfp.bin");
+MODULE_FIRMWARE("radeon/RV635_me.bin");
+MODULE_FIRMWARE("radeon/RV670_pfp.bin");
+MODULE_FIRMWARE("radeon/RV670_me.bin");
+MODULE_FIRMWARE("radeon/RS780_pfp.bin");
+MODULE_FIRMWARE("radeon/RS780_me.bin");
+MODULE_FIRMWARE("radeon/RV770_pfp.bin");
+MODULE_FIRMWARE("radeon/RV770_me.bin");
+MODULE_FIRMWARE("radeon/RV730_pfp.bin");
+MODULE_FIRMWARE("radeon/RV730_me.bin");
+MODULE_FIRMWARE("radeon/RV710_pfp.bin");
+MODULE_FIRMWARE("radeon/RV710_me.bin");
+int r600_cs_legacy(struct drm_device *dev, void *data, struct drm_file *filp,
+                        unsigned family, u32 *ib, int *l);
+void r600_cs_legacy_init(void);
 # define ATI_PCIGART_PAGE_SIZE          4096    /**< PCI GART page size */
 # define ATI_PCIGART_PAGE_MASK          (~(ATI_PCIGART_PAGE_SIZE-1))
@@ -275,11 +306,93 @@ static void r600_vm_init(struct drm_device *dev)
        r600_vm_flush_gart_range(dev);
 }
-/* load r600 microcode */
+static int r600_cp_init_microcode(drm_radeon_private_t *dev_priv)
+{
+        struct platform_device *pdev;
+        const char *chip_name;
+        size_t pfp_req_size, me_req_size;
+        char fw_name[30];
+        int err;
+        pdev = platform_device_register_simple("r600_cp", 0, NULL, 0);
+        err = IS_ERR(pdev);
+        if (err) {
+                printk(KERN_ERR "r600_cp: Failed to register firmware\n");
+                return -EINVAL;
+        }
+        switch (dev_priv->flags & RADEON_FAMILY_MASK) {
+        case CHIP_R600:  chip_name = "R600";  break;
+        case CHIP_RV610: chip_name = "RV610"; break;
+        case CHIP_RV630: chip_name = "RV630"; break;
+        case CHIP_RV620: chip_name = "RV620"; break;
+        case CHIP_RV635: chip_name = "RV635"; break;
+        case CHIP_RV670: chip_name = "RV670"; break;
+        case CHIP_RS780:
+        case CHIP_RS880: chip_name = "RS780"; break;
+        case CHIP_RV770: chip_name = "RV770"; break;
+        case CHIP_RV730:
+        case CHIP_RV740: chip_name = "RV730"; break;
+        case CHIP_RV710: chip_name = "RV710"; break;
+        default:         BUG();
+        }
+        if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RV770) {
+                pfp_req_size = R700_PFP_UCODE_SIZE * 4;
+                me_req_size = R700_PM4_UCODE_SIZE * 4;
+        } else {
+                pfp_req_size = PFP_UCODE_SIZE * 4;
+                me_req_size = PM4_UCODE_SIZE * 12;
+        }
+        DRM_INFO("Loading %s CP Microcode\n", chip_name);
+        snprintf(fw_name, sizeof(fw_name), "radeon/%s_pfp.bin", chip_name);
+        err = request_firmware(&dev_priv->pfp_fw, fw_name, &pdev->dev);
+        if (err)
+                goto out;
+        if (dev_priv->pfp_fw->size != pfp_req_size) {
+                printk(KERN_ERR
+                       "r600_cp: Bogus length %zu in firmware \"%s\"\n",
+                       dev_priv->pfp_fw->size, fw_name);
+                err = -EINVAL;
+                goto out;
+        }
+        snprintf(fw_name, sizeof(fw_name), "radeon/%s_me.bin", chip_name);
+        err = request_firmware(&dev_priv->me_fw, fw_name, &pdev->dev);
+        if (err)
+                goto out;
+        if (dev_priv->me_fw->size != me_req_size) {
+                printk(KERN_ERR
+                       "r600_cp: Bogus length %zu in firmware \"%s\"\n",
+                       dev_priv->me_fw->size, fw_name);
+                err = -EINVAL;
+        }
+out:
+        platform_device_unregister(pdev);
+        if (err) {
+                if (err != -EINVAL)
+                        printk(KERN_ERR
+                               "r600_cp: Failed to load firmware \"%s\"\n",
+                               fw_name);
+                release_firmware(dev_priv->pfp_fw);
+                dev_priv->pfp_fw = NULL;
+                release_firmware(dev_priv->me_fw);
+                dev_priv->me_fw = NULL;
+        }
+        return err;
+}
 static void r600_cp_load_microcode(drm_radeon_private_t *dev_priv)
 {
+        const __be32 *fw_data;
        int i;
+        if (!dev_priv->me_fw || !dev_priv->pfp_fw)
+                return;
        r600_do_cp_stop(dev_priv);
        RADEON_WRITE(R600_CP_RB_CNTL,
@@ -292,115 +405,18 @@ static void r600_cp_load_microcode(drm_radeon_private_t *dev_priv)
        DRM_UDELAY(15000);
        RADEON_WRITE(R600_GRBM_SOFT_RESET, 0);
+        fw_data = (const __be32 *)dev_priv->me_fw->data;
        RADEON_WRITE(R600_CP_ME_RAM_WADDR, 0);
+        for (i = 0; i < PM4_UCODE_SIZE * 3; i++)
+                RADEON_WRITE(R600_CP_ME_RAM_DATA,
+                             be32_to_cpup(fw_data++));
-        if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_R600)) {
+        fw_data = (const __be32 *)dev_priv->pfp_fw->data;
-                DRM_INFO("Loading R600 CP Microcode\n");
+        RADEON_WRITE(R600_CP_PFP_UCODE_ADDR, 0);
-                for (i = 0; i < PM4_UCODE_SIZE; i++) {
+        for (i = 0; i < PFP_UCODE_SIZE; i++)
-                        RADEON_WRITE(R600_CP_ME_RAM_DATA,
+                RADEON_WRITE(R600_CP_PFP_UCODE_DATA,
-                                     R600_cp_microcode[i][0]);
+                             be32_to_cpup(fw_data++));
-                        RADEON_WRITE(R600_CP_ME_RAM_DATA,
-                                     R600_cp_microcode[i][1]);
-                        RADEON_WRITE(R600_CP_ME_RAM_DATA,
-                                     R600_cp_microcode[i][2]);
-                }
-                RADEON_WRITE(R600_CP_PFP_UCODE_ADDR, 0);
-                DRM_INFO("Loading R600 PFP Microcode\n");
-                for (i = 0; i < PFP_UCODE_SIZE; i++)
-                        RADEON_WRITE(R600_CP_PFP_UCODE_DATA, R600_pfp_microcode[i]);
-        } else if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV610)) {
-                DRM_INFO("Loading RV610 CP Microcode\n");
-                for (i = 0; i < PM4_UCODE_SIZE; i++) {
-                        RADEON_WRITE(R600_CP_ME_RAM_DATA,
-                                     RV610_cp_microcode[i][0]);
-                        RADEON_WRITE(R600_CP_ME_RAM_DATA,
-                                     RV610_cp_microcode[i][1]);
-                        RADEON_WRITE(R600_CP_ME_RAM_DATA,
-                                     RV610_cp_microcode[i][2]);
-                }
-                RADEON_WRITE(R600_CP_PFP_UCODE_ADDR, 0);
-                DRM_INFO("Loading RV610 PFP Microcode\n");
-                for (i = 0; i < PFP_UCODE_SIZE; i++)
-                        RADEON_WRITE(R600_CP_PFP_UCODE_DATA, RV610_pfp_microcode[i]);
-        } else if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV630)) {
-                DRM_INFO("Loading RV630 CP Microcode\n");
-                for (i = 0; i < PM4_UCODE_SIZE; i++) {
-                        RADEON_WRITE(R600_CP_ME_RAM_DATA,
-                                     RV630_cp_microcode[i][0]);
-                        RADEON_WRITE(R600_CP_ME_RAM_DATA,
-                                     RV630_cp_microcode[i][1]);
-                        RADEON_WRITE(R600_CP_ME_RAM_DATA,
-                                     RV630_cp_microcode[i][2]);
-                }
-                RADEON_WRITE(R600_CP_PFP_UCODE_ADDR, 0);
-                DRM_INFO("Loading RV630 PFP Microcode\n");
-                for (i = 0; i < PFP_UCODE_SIZE; i++)
-                        RADEON_WRITE(R600_CP_PFP_UCODE_DATA, RV630_pfp_microcode[i]);
-        } else if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV620)) {
-                DRM_INFO("Loading RV620 CP Microcode\n");
-                for (i = 0; i < PM4_UCODE_SIZE; i++) {
-                        RADEON_WRITE(R600_CP_ME_RAM_DATA,
-                                     RV620_cp_microcode[i][0]);
-                        RADEON_WRITE(R600_CP_ME_RAM_DATA,
-                                     RV620_cp_microcode[i][1]);
-                        RADEON_WRITE(R600_CP_ME_RAM_DATA,
-                                     RV620_cp_microcode[i][2]);
-                }
-                RADEON_WRITE(R600_CP_PFP_UCODE_ADDR, 0);
-                DRM_INFO("Loading RV620 PFP Microcode\n");
-                for (i = 0; i < PFP_UCODE_SIZE; i++)
-                        RADEON_WRITE(R600_CP_PFP_UCODE_DATA, RV620_pfp_microcode[i]);
-        } else if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV635)) {
-                DRM_INFO("Loading RV635 CP Microcode\n");
-                for (i = 0; i < PM4_UCODE_SIZE; i++) {
-                        RADEON_WRITE(R600_CP_ME_RAM_DATA,
-                                     RV635_cp_microcode[i][0]);
-                        RADEON_WRITE(R600_CP_ME_RAM_DATA,
-                                     RV635_cp_microcode[i][1]);
-                        RADEON_WRITE(R600_CP_ME_RAM_DATA,
-                                     RV635_cp_microcode[i][2]);
-                }
-                RADEON_WRITE(R600_CP_PFP_UCODE_ADDR, 0);
-                DRM_INFO("Loading RV635 PFP Microcode\n");
-                for (i = 0; i < PFP_UCODE_SIZE; i++)
-                        RADEON_WRITE(R600_CP_PFP_UCODE_DATA, RV635_pfp_microcode[i]);
-        } else if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV670)) {
-                DRM_INFO("Loading RV670 CP Microcode\n");
-                for (i = 0; i < PM4_UCODE_SIZE; i++) {
-                        RADEON_WRITE(R600_CP_ME_RAM_DATA,
-                                     RV670_cp_microcode[i][0]);
-                        RADEON_WRITE(R600_CP_ME_RAM_DATA,
-                                     RV670_cp_microcode[i][1]);
-                        RADEON_WRITE(R600_CP_ME_RAM_DATA,
-                                     RV670_cp_microcode[i][2]);
-                }
-                RADEON_WRITE(R600_CP_PFP_UCODE_ADDR, 0);
-                DRM_INFO("Loading RV670 PFP Microcode\n");
-                for (i = 0; i < PFP_UCODE_SIZE; i++)
-                        RADEON_WRITE(R600_CP_PFP_UCODE_DATA, RV670_pfp_microcode[i]);
-        } else if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS780) ||
-                   ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS880)) {
-                DRM_INFO("Loading RS780/RS880 CP Microcode\n");
-                for (i = 0; i < PM4_UCODE_SIZE; i++) {
-                        RADEON_WRITE(R600_CP_ME_RAM_DATA,
-                                     RS780_cp_microcode[i][0]);
-                        RADEON_WRITE(R600_CP_ME_RAM_DATA,
-                                     RS780_cp_microcode[i][1]);
-                        RADEON_WRITE(R600_CP_ME_RAM_DATA,
-                                     RS780_cp_microcode[i][2]);
-                }
-                RADEON_WRITE(R600_CP_PFP_UCODE_ADDR, 0);
-                DRM_INFO("Loading RS780/RS880 PFP Microcode\n");
-                for (i = 0; i < PFP_UCODE_SIZE; i++)
-                        RADEON_WRITE(R600_CP_PFP_UCODE_DATA, RS780_pfp_microcode[i]);
-        }
        RADEON_WRITE(R600_CP_PFP_UCODE_ADDR, 0);
        RADEON_WRITE(R600_CP_ME_RAM_WADDR, 0);
        RADEON_WRITE(R600_CP_ME_RAM_RADDR, 0);
@@ -459,11 +475,14 @@ static void r700_vm_init(struct drm_device *dev)
        r600_vm_flush_gart_range(dev);
 }
-/* load r600 microcode */
 static void r700_cp_load_microcode(drm_radeon_private_t *dev_priv)
 {
+        const __be32 *fw_data;
        int i;
+        if (!dev_priv->me_fw || !dev_priv->pfp_fw)
+                return;
        r600_do_cp_stop(dev_priv);
        RADEON_WRITE(R600_CP_RB_CNTL,
@@ -476,48 +495,18 @@ static void r700_cp_load_microcode(drm_radeon_private_t *dev_priv)
        DRM_UDELAY(15000);
        RADEON_WRITE(R600_GRBM_SOFT_RESET, 0);
+        fw_data = (const __be32 *)dev_priv->pfp_fw->data;
+        RADEON_WRITE(R600_CP_PFP_UCODE_ADDR, 0);
+        for (i = 0; i < R700_PFP_UCODE_SIZE; i++)
+                RADEON_WRITE(R600_CP_PFP_UCODE_DATA, be32_to_cpup(fw_data++));
+        RADEON_WRITE(R600_CP_PFP_UCODE_ADDR, 0);
-        if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV770)) {
+        fw_data = (const __be32 *)dev_priv->me_fw->data;
-                RADEON_WRITE(R600_CP_PFP_UCODE_ADDR, 0);
+        RADEON_WRITE(R600_CP_ME_RAM_WADDR, 0);
-                DRM_INFO("Loading RV770/RV790 PFP Microcode\n");
+        for (i = 0; i < R700_PM4_UCODE_SIZE; i++)
-                for (i = 0; i < R700_PFP_UCODE_SIZE; i++)
+                RADEON_WRITE(R600_CP_ME_RAM_DATA, be32_to_cpup(fw_data++));
-                        RADEON_WRITE(R600_CP_PFP_UCODE_DATA, RV770_pfp_microcode[i]);
+        RADEON_WRITE(R600_CP_ME_RAM_WADDR, 0);
-                RADEON_WRITE(R600_CP_PFP_UCODE_ADDR, 0);
-                RADEON_WRITE(R600_CP_ME_RAM_WADDR, 0);
-                DRM_INFO("Loading RV770/RV790 CP Microcode\n");
-                for (i = 0; i < R700_PM4_UCODE_SIZE; i++)
-                        RADEON_WRITE(R600_CP_ME_RAM_DATA, RV770_cp_microcode[i]);
-                RADEON_WRITE(R600_CP_ME_RAM_WADDR, 0);
-        } else if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV730) ||
-                   ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV740)) {
-                RADEON_WRITE(R600_CP_PFP_UCODE_ADDR, 0);
-                DRM_INFO("Loading RV730/RV740 PFP Microcode\n");
-                for (i = 0; i < R700_PFP_UCODE_SIZE; i++)
-                        RADEON_WRITE(R600_CP_PFP_UCODE_DATA, RV730_pfp_microcode[i]);
-                RADEON_WRITE(R600_CP_PFP_UCODE_ADDR, 0);
-                RADEON_WRITE(R600_CP_ME_RAM_WADDR, 0);
-                DRM_INFO("Loading RV730/RV740 CP Microcode\n");
-                for (i = 0; i < R700_PM4_UCODE_SIZE; i++)
-                        RADEON_WRITE(R600_CP_ME_RAM_DATA, RV730_cp_microcode[i]);
-                RADEON_WRITE(R600_CP_ME_RAM_WADDR, 0);
-        } else if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV710)) {
-                RADEON_WRITE(R600_CP_PFP_UCODE_ADDR, 0);
-                DRM_INFO("Loading RV710 PFP Microcode\n");
-                for (i = 0; i < R700_PFP_UCODE_SIZE; i++)
-                        RADEON_WRITE(R600_CP_PFP_UCODE_DATA, RV710_pfp_microcode[i]);
-                RADEON_WRITE(R600_CP_PFP_UCODE_ADDR, 0);
-                RADEON_WRITE(R600_CP_ME_RAM_WADDR, 0);
-                DRM_INFO("Loading RV710 CP Microcode\n");
-                for (i = 0; i < R700_PM4_UCODE_SIZE; i++)
-                        RADEON_WRITE(R600_CP_ME_RAM_DATA, RV710_cp_microcode[i]);
-                RADEON_WRITE(R600_CP_ME_RAM_WADDR, 0);
-        }
        RADEON_WRITE(R600_CP_PFP_UCODE_ADDR, 0);
        RADEON_WRITE(R600_CP_ME_RAM_WADDR, 0);
        RADEON_WRITE(R600_CP_ME_RAM_RADDR, 0);
@@ -1874,6 +1863,8 @@ int r600_do_init_cp(struct drm_device *dev, drm_radeon_init_t *init,
        DRM_DEBUG("\n");
+        mutex_init(&dev_priv->cs_mutex);
+        r600_cs_legacy_init();
        /* if we require new memory map but we don't have it fail */
        if ((dev_priv->flags & RADEON_NEW_MEMMAP) && !dev_priv->new_memmap) {
                DRM_ERROR("Cannot initialise DRM on this card\nThis card requires a new X.org DDX for 3D\n");
@@ -1905,7 +1896,7 @@ int r600_do_init_cp(struct drm_device *dev, drm_radeon_init_t *init,
        /* Enable vblank on CRTC1 for older X servers
         */
        dev_priv->vblank_crtc = DRM_RADEON_VBLANK_CRTC1;
+        dev_priv->do_boxes = 0;
        dev_priv->cp_mode = init->cp_mode;
        /* We don't support anything other than bus-mastering ring mode,
@@ -1991,11 +1982,11 @@ int r600_do_init_cp(struct drm_device *dev, drm_radeon_init_t *init,
        } else
 #endif
        {
-                dev_priv->cp_ring->handle = (void *)dev_priv->cp_ring->offset;
+                dev_priv->cp_ring->handle = (void *)(unsigned long)dev_priv->cp_ring->offset;
                dev_priv->ring_rptr->handle =
-                    (void *)dev_priv->ring_rptr->offset;
+                        (void *)(unsigned long)dev_priv->ring_rptr->offset;
                dev->agp_buffer_map->handle =
-                    (void *)dev->agp_buffer_map->offset;
+                        (void *)(unsigned long)dev->agp_buffer_map->offset;
                DRM_DEBUG("dev_priv->cp_ring->handle %p\n",
                          dev_priv->cp_ring->handle);
@@ -2147,6 +2138,14 @@ int r600_do_init_cp(struct drm_device *dev, drm_radeon_init_t *init,
                        r600_vm_init(dev);
        }
+        if (!dev_priv->me_fw || !dev_priv->pfp_fw) {
+                int err = r600_cp_init_microcode(dev_priv);
+                if (err) {
+                        DRM_ERROR("Failed to load firmware!\n");
+                        r600_do_cleanup_cp(dev);
+                        return err;
+                }
+        }
        if (((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RV770))
                r700_cp_load_microcode(dev_priv);
        else
@@ -2291,3 +2290,239 @@ int r600_cp_dispatch_indirect(struct drm_device *dev,
        return 0;
 }
+void r600_cp_dispatch_swap(struct drm_device *dev, struct drm_file *file_priv)
+{
+        drm_radeon_private_t *dev_priv = dev->dev_private;
+        struct drm_master *master = file_priv->master;
+        struct drm_radeon_master_private *master_priv = master->driver_priv;
+        drm_radeon_sarea_t *sarea_priv = master_priv->sarea_priv;
+        int nbox = sarea_priv->nbox;
+        struct drm_clip_rect *pbox = sarea_priv->boxes;
+        int i, cpp, src_pitch, dst_pitch;
+        uint64_t src, dst;
+        RING_LOCALS;
+        DRM_DEBUG("\n");
+        if (dev_priv->color_fmt == RADEON_COLOR_FORMAT_ARGB8888)
+                cpp = 4;
+        else
+                cpp = 2;
+        if (sarea_priv->pfCurrentPage == 0) {
+                src_pitch = dev_priv->back_pitch;
+                dst_pitch = dev_priv->front_pitch;
+                src = dev_priv->back_offset + dev_priv->fb_location;
+                dst = dev_priv->front_offset + dev_priv->fb_location;
+        } else {
+                src_pitch = dev_priv->front_pitch;
+                dst_pitch = dev_priv->back_pitch;
+                src = dev_priv->front_offset + dev_priv->fb_location;
+                dst = dev_priv->back_offset + dev_priv->fb_location;
+        }
+        if (r600_prepare_blit_copy(dev, file_priv)) {
+                DRM_ERROR("unable to allocate vertex buffer for swap buffer\n");
+                return;
+        }
+        for (i = 0; i < nbox; i++) {
+                int x = pbox[i].x1;
+                int y = pbox[i].y1;
+                int w = pbox[i].x2 - x;
+                int h = pbox[i].y2 - y;
+                DRM_DEBUG("%d,%d-%d,%d\n", x, y, w, h);
+                r600_blit_swap(dev,
+                               src, dst,
+                               x, y, x, y, w, h,
+                               src_pitch, dst_pitch, cpp);
+        }
+        r600_done_blit_copy(dev);
+        /* Increment the frame counter.  The client-side 3D driver must
+         * throttle the framerate by waiting for this value before
+         * performing the swapbuffer ioctl.
+         */
+        sarea_priv->last_frame++;
+        BEGIN_RING(3);
+        R600_FRAME_AGE(sarea_priv->last_frame);
+        ADVANCE_RING();
+}
+int r600_cp_dispatch_texture(struct drm_device *dev,
+                             struct drm_file *file_priv,
+                             drm_radeon_texture_t *tex,
+                             drm_radeon_tex_image_t *image)
+{
+        drm_radeon_private_t *dev_priv = dev->dev_private;
+        struct drm_buf *buf;
+        u32 *buffer;
+        const u8 __user *data;
+        int size, pass_size;
+        u64 src_offset, dst_offset;
+        if (!radeon_check_offset(dev_priv, tex->offset)) {
+                DRM_ERROR("Invalid destination offset\n");
+                return -EINVAL;
+        }
+        /* this might fail for zero-sized uploads - are those illegal? */
+        if (!radeon_check_offset(dev_priv, tex->offset + tex->height * tex->pitch - 1)) {
+                DRM_ERROR("Invalid final destination offset\n");
+                return -EINVAL;
+        }
+        size = tex->height * tex->pitch;
+        if (size == 0)
+                return 0;
+        dst_offset = tex->offset;
+        if (r600_prepare_blit_copy(dev, file_priv)) {
+                DRM_ERROR("unable to allocate vertex buffer for swap buffer\n");
+                return -EAGAIN;
+        }
+        do {
+                data = (const u8 __user *)image->data;
+                pass_size = size;
+                buf = radeon_freelist_get(dev);
+                if (!buf) {
+                        DRM_DEBUG("EAGAIN\n");
+                        if (DRM_COPY_TO_USER(tex->image, image, sizeof(*image)))
+                                return -EFAULT;
+                        return -EAGAIN;
+                }
+                if (pass_size > buf->total)
+                        pass_size = buf->total;
+                /* Dispatch the indirect buffer.
+                 */
+                buffer =
+                    (u32 *) ((char *)dev->agp_buffer_map->handle + buf->offset);
+                if (DRM_COPY_FROM_USER(buffer, data, pass_size)) {
+                        DRM_ERROR("EFAULT on pad, %d bytes\n", pass_size);
+                        return -EFAULT;
+                }
+                buf->file_priv = file_priv;
+                buf->used = pass_size;
+                src_offset = dev_priv->gart_buffers_offset + buf->offset;
+                r600_blit_copy(dev, src_offset, dst_offset, pass_size);
+                radeon_cp_discard_buffer(dev, file_priv->master, buf);
+                /* Update the input parameters for next time */
+                image->data = (const u8 __user *)image->data + pass_size;
+                dst_offset += pass_size;
+                size -= pass_size;
+        } while (size > 0);
+        r600_done_blit_copy(dev);
+        return 0;
+}
+/*
+ * Legacy cs ioctl
+ */
+static u32 radeon_cs_id_get(struct drm_radeon_private *radeon)
+{
+        /* FIXME: check if wrap affect last reported wrap & sequence */
+        radeon->cs_id_scnt = (radeon->cs_id_scnt + 1) & 0x00FFFFFF;
+        if (!radeon->cs_id_scnt) {
+                /* increment wrap counter */
+                radeon->cs_id_wcnt += 0x01000000;
+                /* valid sequence counter start at 1 */
+                radeon->cs_id_scnt = 1;
+        }
+        return (radeon->cs_id_scnt | radeon->cs_id_wcnt);
+}
+static void r600_cs_id_emit(drm_radeon_private_t *dev_priv, u32 *id)
+{
+        RING_LOCALS;
+        *id = radeon_cs_id_get(dev_priv);
+        /* SCRATCH 2 */
+        BEGIN_RING(3);
+        R600_CLEAR_AGE(*id);
+        ADVANCE_RING();
+        COMMIT_RING();
+}
+static int r600_ib_get(struct drm_device *dev,
+                        struct drm_file *fpriv,
+                        struct drm_buf **buffer)
+{
+        struct drm_buf *buf;
+        *buffer = NULL;
+        buf = radeon_freelist_get(dev);
+        if (!buf) {
+                return -EBUSY;
+        }
+        buf->file_priv = fpriv;
+        *buffer = buf;
+        return 0;
+}
+static void r600_ib_free(struct drm_device *dev, struct drm_buf *buf,
+                        struct drm_file *fpriv, int l, int r)
+{
+        drm_radeon_private_t *dev_priv = dev->dev_private;
+        if (buf) {
+                if (!r)
+                        r600_cp_dispatch_indirect(dev, buf, 0, l * 4);
+                radeon_cp_discard_buffer(dev, fpriv->master, buf);
+                COMMIT_RING();
+        }
+}
+int r600_cs_legacy_ioctl(struct drm_device *dev, void *data, struct drm_file *fpriv)
+{
+        struct drm_radeon_private *dev_priv = dev->dev_private;
+        struct drm_radeon_cs *cs = data;
+        struct drm_buf *buf;
+        unsigned family;
+        int l, r = 0;
+        u32 *ib, cs_id = 0;
+        if (dev_priv == NULL) {
+                DRM_ERROR("called with no initialization\n");
+                return -EINVAL;
+        }
+        family = dev_priv->flags & RADEON_FAMILY_MASK;
+        if (family < CHIP_R600) {
+                DRM_ERROR("cs ioctl valid only for R6XX & R7XX in legacy mode\n");
+                return -EINVAL;
+        }
+        mutex_lock(&dev_priv->cs_mutex);
+        /* get ib */
+        r = r600_ib_get(dev, fpriv, &buf);
+        if (r) {
+                DRM_ERROR("ib_get failed\n");
+                goto out;
+        }
+        ib = dev->agp_buffer_map->handle + buf->offset;
+        /* now parse command stream */
+        r = r600_cs_legacy(dev, data,  fpriv, family, ib, &l);
+        if (r) {
+                goto out;
+        }
+out:
+        r600_ib_free(dev, buf, fpriv, l, r);
+        /* emit cs id sequence */
+        r600_cs_id_emit(dev_priv, &cs_id);
+        cs->cs_id = cs_id;
+        mutex_unlock(&dev_priv->cs_mutex);
+        return r;
+}
diff --git a/drivers/gpu/drm/radeon/r600_cs.c b/drivers/gpu/drm/radeon/r600_cs.c
new file mode 100644
index 000000000000..33b89cd8743e
--- /dev/null
+++ b/drivers/gpu/drm/radeon/r600_cs.c
@@ -0,0 +1,657 @@
+/*
+ * Copyright 2008 Advanced Micro Devices, Inc.
+ * Copyright 2008 Red Hat Inc.
+ * Copyright 2009 Jerome Glisse.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors: Dave Airlie
+ *          Alex Deucher
+ *          Jerome Glisse
+ */
+#include "drmP.h"
+#include "radeon.h"
+#include "r600d.h"
+#include "avivod.h"
+static int r600_cs_packet_next_reloc_mm(struct radeon_cs_parser *p,
+                                        struct radeon_cs_reloc **cs_reloc);
+static int r600_cs_packet_next_reloc_nomm(struct radeon_cs_parser *p,
+                                        struct radeon_cs_reloc **cs_reloc);
+typedef int (*next_reloc_t)(struct radeon_cs_parser*, struct radeon_cs_reloc**);
+static next_reloc_t r600_cs_packet_next_reloc = &r600_cs_packet_next_reloc_mm;
+/**
+ * r600_cs_packet_parse() - parse cp packet and point ib index to next packet
+ * @parser:     parser structure holding parsing context.
+ * @pkt:        where to store packet informations
+ *
+ * Assume that chunk_ib_index is properly set. Will return -EINVAL
+ * if packet is bigger than remaining ib size. or if packets is unknown.
+ **/
+int r600_cs_packet_parse(struct radeon_cs_parser *p,
+                        struct radeon_cs_packet *pkt,
+                        unsigned idx)
+{
+        struct radeon_cs_chunk *ib_chunk = &p->chunks[p->chunk_ib_idx];
+        uint32_t header;
+        if (idx >= ib_chunk->length_dw) {
+                DRM_ERROR("Can not parse packet at %d after CS end %d !\n",
+                          idx, ib_chunk->length_dw);
+                return -EINVAL;
+        }
+        header = ib_chunk->kdata[idx];
+        pkt->idx = idx;
+        pkt->type = CP_PACKET_GET_TYPE(header);
+        pkt->count = CP_PACKET_GET_COUNT(header);
+        pkt->one_reg_wr = 0;
+        switch (pkt->type) {
+        case PACKET_TYPE0:
+                pkt->reg = CP_PACKET0_GET_REG(header);
+                break;
+        case PACKET_TYPE3:
+                pkt->opcode = CP_PACKET3_GET_OPCODE(header);
+                break;
+        case PACKET_TYPE2:
+                pkt->count = -1;
+                break;
+        default:
+                DRM_ERROR("Unknown packet type %d at %d !\n", pkt->type, idx);
+                return -EINVAL;
+        }
+        if ((pkt->count + 1 + pkt->idx) >= ib_chunk->length_dw) {
+                DRM_ERROR("Packet (%d:%d:%d) end after CS buffer (%d) !\n",
+                          pkt->idx, pkt->type, pkt->count, ib_chunk->length_dw);
+                return -EINVAL;
+        }
+        return 0;
+}
+/**
+ * r600_cs_packet_next_reloc_mm() - parse next packet which should be reloc packet3
+ * @parser:             parser structure holding parsing context.
+ * @data:               pointer to relocation data
+ * @offset_start:       starting offset
+ * @offset_mask:        offset mask (to align start offset on)
+ * @reloc:              reloc informations
+ *
+ * Check next packet is relocation packet3, do bo validation and compute
+ * GPU offset using the provided start.
+ **/
+static int r600_cs_packet_next_reloc_mm(struct radeon_cs_parser *p,
+                                        struct radeon_cs_reloc **cs_reloc)
+{
+        struct radeon_cs_chunk *ib_chunk;
+        struct radeon_cs_chunk *relocs_chunk;
+        struct radeon_cs_packet p3reloc;
+        unsigned idx;
+        int r;
+        if (p->chunk_relocs_idx == -1) {
+                DRM_ERROR("No relocation chunk !\n");
+                return -EINVAL;
+        }
+        *cs_reloc = NULL;
+        ib_chunk = &p->chunks[p->chunk_ib_idx];
+        relocs_chunk = &p->chunks[p->chunk_relocs_idx];
+        r = r600_cs_packet_parse(p, &p3reloc, p->idx);
+        if (r) {
+                return r;
+        }
+        p->idx += p3reloc.count + 2;
+        if (p3reloc.type != PACKET_TYPE3 || p3reloc.opcode != PACKET3_NOP) {
+                DRM_ERROR("No packet3 for relocation for packet at %d.\n",
+                          p3reloc.idx);
+                return -EINVAL;
+        }
+        idx = ib_chunk->kdata[p3reloc.idx + 1];
+        if (idx >= relocs_chunk->length_dw) {
+                DRM_ERROR("Relocs at %d after relocations chunk end %d !\n",
+                          idx, relocs_chunk->length_dw);
+                return -EINVAL;
+        }
+        /* FIXME: we assume reloc size is 4 dwords */
+        *cs_reloc = p->relocs_ptr[(idx / 4)];
+        return 0;
+}
+/**
+ * r600_cs_packet_next_reloc_nomm() - parse next packet which should be reloc packet3
+ * @parser:             parser structure holding parsing context.
+ * @data:               pointer to relocation data
+ * @offset_start:       starting offset
+ * @offset_mask:        offset mask (to align start offset on)
+ * @reloc:              reloc informations
+ *
+ * Check next packet is relocation packet3, do bo validation and compute
+ * GPU offset using the provided start.
+ **/
+static int r600_cs_packet_next_reloc_nomm(struct radeon_cs_parser *p,
+                                        struct radeon_cs_reloc **cs_reloc)
+{
+        struct radeon_cs_chunk *ib_chunk;
+        struct radeon_cs_chunk *relocs_chunk;
+        struct radeon_cs_packet p3reloc;
+        unsigned idx;
+        int r;
+        if (p->chunk_relocs_idx == -1) {
+                DRM_ERROR("No relocation chunk !\n");
+                return -EINVAL;
+        }
+        *cs_reloc = NULL;
+        ib_chunk = &p->chunks[p->chunk_ib_idx];
+        relocs_chunk = &p->chunks[p->chunk_relocs_idx];
+        r = r600_cs_packet_parse(p, &p3reloc, p->idx);
+        if (r) {
+                return r;
+        }
+        p->idx += p3reloc.count + 2;
+        if (p3reloc.type != PACKET_TYPE3 || p3reloc.opcode != PACKET3_NOP) {
+                DRM_ERROR("No packet3 for relocation for packet at %d.\n",
+                          p3reloc.idx);
+                return -EINVAL;
+        }
+        idx = ib_chunk->kdata[p3reloc.idx + 1];
+        if (idx >= relocs_chunk->length_dw) {
+                DRM_ERROR("Relocs at %d after relocations chunk end %d !\n",
+                          idx, relocs_chunk->length_dw);
+                return -EINVAL;
+        }
+        *cs_reloc = &p->relocs[0];
+        (*cs_reloc)->lobj.gpu_offset = (u64)relocs_chunk->kdata[idx + 3] << 32;
+        (*cs_reloc)->lobj.gpu_offset |= relocs_chunk->kdata[idx + 0];
+        return 0;
+}
+static int r600_packet0_check(struct radeon_cs_parser *p,
+                                struct radeon_cs_packet *pkt,
+                                unsigned idx, unsigned reg)
+{
+        switch (reg) {
+        case AVIVO_D1MODE_VLINE_START_END:
+        case AVIVO_D2MODE_VLINE_START_END:
+                break;
+        default:
+                printk(KERN_ERR "Forbidden register 0x%04X in cs at %d\n",
+                       reg, idx);
+                return -EINVAL;
+        }
+        return 0;
+}
+static int r600_cs_parse_packet0(struct radeon_cs_parser *p,
+                                struct radeon_cs_packet *pkt)
+{
+        unsigned reg, i;
+        unsigned idx;
+        int r;
+        idx = pkt->idx + 1;
+        reg = pkt->reg;
+        for (i = 0; i <= pkt->count; i++, idx++, reg += 4) {
+                r = r600_packet0_check(p, pkt, idx, reg);
+                if (r) {
+                        return r;
+                }
+        }
+        return 0;
+}
+static int r600_packet3_check(struct radeon_cs_parser *p,
+                                struct radeon_cs_packet *pkt)
+{
+        struct radeon_cs_chunk *ib_chunk;
+        struct radeon_cs_reloc *reloc;
+        volatile u32 *ib;
+        unsigned idx;
+        unsigned i;
+        unsigned start_reg, end_reg, reg;
+        int r;
+        ib = p->ib->ptr;
+        ib_chunk = &p->chunks[p->chunk_ib_idx];
+        idx = pkt->idx + 1;
+        switch (pkt->opcode) {
+        case PACKET3_START_3D_CMDBUF:
+                if (p->family >= CHIP_RV770 || pkt->count) {
+                        DRM_ERROR("bad START_3D\n");
+                        return -EINVAL;
+                }
+                break;
+        case PACKET3_CONTEXT_CONTROL:
+                if (pkt->count != 1) {
+                        DRM_ERROR("bad CONTEXT_CONTROL\n");
+                        return -EINVAL;
+                }
+                break;
+        case PACKET3_INDEX_TYPE:
+        case PACKET3_NUM_INSTANCES:
+                if (pkt->count) {
+                        DRM_ERROR("bad INDEX_TYPE/NUM_INSTANCES\n");
+                        return -EINVAL;
+                }
+                break;
+        case PACKET3_DRAW_INDEX:
+                if (pkt->count != 3) {
+                        DRM_ERROR("bad DRAW_INDEX\n");
+                        return -EINVAL;
+                }
+                r = r600_cs_packet_next_reloc(p, &reloc);
+                if (r) {
+                        DRM_ERROR("bad DRAW_INDEX\n");
+                        return -EINVAL;
+                }
+                ib[idx+0] += (u32)(reloc->lobj.gpu_offset & 0xffffffff);
+                ib[idx+1] = upper_32_bits(reloc->lobj.gpu_offset) & 0xff;
+                break;
+        case PACKET3_DRAW_INDEX_AUTO:
+                if (pkt->count != 1) {
+                        DRM_ERROR("bad DRAW_INDEX_AUTO\n");
+                        return -EINVAL;
+                }
+                break;
+        case PACKET3_DRAW_INDEX_IMMD_BE:
+        case PACKET3_DRAW_INDEX_IMMD:
+                if (pkt->count < 2) {
+                        DRM_ERROR("bad DRAW_INDEX_IMMD\n");
+                        return -EINVAL;
+                }
+                break;
+        case PACKET3_WAIT_REG_MEM:
+                if (pkt->count != 5) {
+                        DRM_ERROR("bad WAIT_REG_MEM\n");
+                        return -EINVAL;
+                }
+                /* bit 4 is reg (0) or mem (1) */
+                if (ib_chunk->kdata[idx+0] & 0x10) {
+                        r = r600_cs_packet_next_reloc(p, &reloc);
+                        if (r) {
+                                DRM_ERROR("bad WAIT_REG_MEM\n");
+                                return -EINVAL;
+                        }
+                        ib[idx+1] += (u32)(reloc->lobj.gpu_offset & 0xffffffff);
+                        ib[idx+2] = upper_32_bits(reloc->lobj.gpu_offset) & 0xff;
+                }
+                break;
+        case PACKET3_SURFACE_SYNC:
+                if (pkt->count != 3) {
+                        DRM_ERROR("bad SURFACE_SYNC\n");
+                        return -EINVAL;
+                }
+                /* 0xffffffff/0x0 is flush all cache flag */
+                if (ib_chunk->kdata[idx+1] != 0xffffffff ||
+                    ib_chunk->kdata[idx+2] != 0) {
+                        r = r600_cs_packet_next_reloc(p, &reloc);
+                        if (r) {
+                                DRM_ERROR("bad SURFACE_SYNC\n");
+                                return -EINVAL;
+                        }
+                        ib[idx+2] += (u32)((reloc->lobj.gpu_offset >> 8) & 0xffffffff);
+                }
+                break;
+        case PACKET3_EVENT_WRITE:
+                if (pkt->count != 2 && pkt->count != 0) {
+                        DRM_ERROR("bad EVENT_WRITE\n");
+                        return -EINVAL;
+                }
+                if (pkt->count) {
+                        r = r600_cs_packet_next_reloc(p, &reloc);
+                        if (r) {
+                                DRM_ERROR("bad EVENT_WRITE\n");
+                                return -EINVAL;
+                        }
+                        ib[idx+1] += (u32)(reloc->lobj.gpu_offset & 0xffffffff);
+                        ib[idx+2] |= upper_32_bits(reloc->lobj.gpu_offset) & 0xff;
+                }
+                break;
+        case PACKET3_EVENT_WRITE_EOP:
+                if (pkt->count != 4) {
+                        DRM_ERROR("bad EVENT_WRITE_EOP\n");
+                        return -EINVAL;
+                }
+                r = r600_cs_packet_next_reloc(p, &reloc);
+                if (r) {
+                        DRM_ERROR("bad EVENT_WRITE\n");
+                        return -EINVAL;
+                }
+                ib[idx+1] += (u32)(reloc->lobj.gpu_offset & 0xffffffff);
+                ib[idx+2] |= upper_32_bits(reloc->lobj.gpu_offset) & 0xff;
+                break;
+        case PACKET3_SET_CONFIG_REG:
+                start_reg = (ib[idx+0] << 2) + PACKET3_SET_CONFIG_REG_OFFSET;
+                end_reg = 4 * pkt->count + start_reg - 4;
+                if ((start_reg < PACKET3_SET_CONFIG_REG_OFFSET) ||
+                    (start_reg >= PACKET3_SET_CONFIG_REG_END) ||
+                    (end_reg >= PACKET3_SET_CONFIG_REG_END)) {
+                        DRM_ERROR("bad PACKET3_SET_CONFIG_REG\n");
+                        return -EINVAL;
+                }
+                for (i = 0; i < pkt->count; i++) {
+                        reg = start_reg + (4 * i);
+                        switch (reg) {
+                        case CP_COHER_BASE:
+                                /* use PACKET3_SURFACE_SYNC */
+                                return -EINVAL;
+                        default:
+                                break;
+                        }
+                }
+                break;
+        case PACKET3_SET_CONTEXT_REG:
+                start_reg = (ib[idx+0] << 2) + PACKET3_SET_CONTEXT_REG_OFFSET;
+                end_reg = 4 * pkt->count + start_reg - 4;
+                if ((start_reg < PACKET3_SET_CONTEXT_REG_OFFSET) ||
+                    (start_reg >= PACKET3_SET_CONTEXT_REG_END) ||
+                    (end_reg >= PACKET3_SET_CONTEXT_REG_END)) {
+                        DRM_ERROR("bad PACKET3_SET_CONTEXT_REG\n");
+                        return -EINVAL;
+                }
+                for (i = 0; i < pkt->count; i++) {
+                        reg = start_reg + (4 * i);
+                        switch (reg) {
+                        case DB_DEPTH_BASE:
+                        case CB_COLOR0_BASE:
+                        case CB_COLOR1_BASE:
+                        case CB_COLOR2_BASE:
+                        case CB_COLOR3_BASE:
+                        case CB_COLOR4_BASE:
+                        case CB_COLOR5_BASE:
+                        case CB_COLOR6_BASE:
+                        case CB_COLOR7_BASE:
+                        case SQ_PGM_START_FS:
+                        case SQ_PGM_START_ES:
+                        case SQ_PGM_START_VS:
+                        case SQ_PGM_START_GS:
+                        case SQ_PGM_START_PS:
+                                r = r600_cs_packet_next_reloc(p, &reloc);
+                                if (r) {
+                                        DRM_ERROR("bad SET_CONTEXT_REG "
+                                                        "0x%04X\n", reg);
+                                        return -EINVAL;
+                                }
+                                ib[idx+1+i] += (u32)((reloc->lobj.gpu_offset >> 8) & 0xffffffff);
+                                break;
+                        case VGT_DMA_BASE:
+                        case VGT_DMA_BASE_HI:
+                                /* These should be handled by DRAW_INDEX packet 3 */
+                        case VGT_STRMOUT_BASE_OFFSET_0:
+                        case VGT_STRMOUT_BASE_OFFSET_1:
+                        case VGT_STRMOUT_BASE_OFFSET_2:
+                        case VGT_STRMOUT_BASE_OFFSET_3:
+                        case VGT_STRMOUT_BASE_OFFSET_HI_0:
+                        case VGT_STRMOUT_BASE_OFFSET_HI_1:
+                        case VGT_STRMOUT_BASE_OFFSET_HI_2:
+                        case VGT_STRMOUT_BASE_OFFSET_HI_3:
+                        case VGT_STRMOUT_BUFFER_BASE_0:
+                        case VGT_STRMOUT_BUFFER_BASE_1:
+                        case VGT_STRMOUT_BUFFER_BASE_2:
+                        case VGT_STRMOUT_BUFFER_BASE_3:
+                        case VGT_STRMOUT_BUFFER_OFFSET_0:
+                        case VGT_STRMOUT_BUFFER_OFFSET_1:
+                        case VGT_STRMOUT_BUFFER_OFFSET_2:
+                        case VGT_STRMOUT_BUFFER_OFFSET_3:
+                                /* These should be handled by STRMOUT_BUFFER packet 3 */
+                                DRM_ERROR("bad context reg: 0x%08x\n", reg);
+                                return -EINVAL;
+                        default:
+                                break;
+                        }
+                }
+                break;
+        case PACKET3_SET_RESOURCE:
+                if (pkt->count % 7) {
+                        DRM_ERROR("bad SET_RESOURCE\n");
+                        return -EINVAL;
+                }
+                start_reg = (ib[idx+0] << 2) + PACKET3_SET_RESOURCE_OFFSET;
+                end_reg = 4 * pkt->count + start_reg - 4;
+                if ((start_reg < PACKET3_SET_RESOURCE_OFFSET) ||
+                    (start_reg >= PACKET3_SET_RESOURCE_END) ||
+                    (end_reg >= PACKET3_SET_RESOURCE_END)) {
+                        DRM_ERROR("bad SET_RESOURCE\n");
+                        return -EINVAL;
+                }
+                for (i = 0; i < (pkt->count / 7); i++) {
+                        switch (G__SQ_VTX_CONSTANT_TYPE(ib[idx+(i*7)+6+1])) {
+                        case SQ_TEX_VTX_VALID_TEXTURE:
+                                /* tex base */
+                                r = r600_cs_packet_next_reloc(p, &reloc);
+                                if (r) {
+                                        DRM_ERROR("bad SET_RESOURCE\n");
+                                        return -EINVAL;
+                                }
+                                ib[idx+1+(i*7)+2] += (u32)((reloc->lobj.gpu_offset >> 8) & 0xffffffff);
+                                /* tex mip base */
+                                r = r600_cs_packet_next_reloc(p, &reloc);
+                                if (r) {
+                                        DRM_ERROR("bad SET_RESOURCE\n");
+                                        return -EINVAL;
+                                }
+                                ib[idx+1+(i*7)+3] += (u32)((reloc->lobj.gpu_offset >> 8) & 0xffffffff);
+                                break;
+                        case SQ_TEX_VTX_VALID_BUFFER:
+                                /* vtx base */
+                                r = r600_cs_packet_next_reloc(p, &reloc);
+                                if (r) {
+                                        DRM_ERROR("bad SET_RESOURCE\n");
+                                        return -EINVAL;
+                                }
+                                ib[idx+1+(i*7)+0] += (u32)((reloc->lobj.gpu_offset) & 0xffffffff);
+                                ib[idx+1+(i*7)+2] |= upper_32_bits(reloc->lobj.gpu_offset) & 0xff;
+                                break;
+                        case SQ_TEX_VTX_INVALID_TEXTURE:
+                        case SQ_TEX_VTX_INVALID_BUFFER:
+                        default:
+                                DRM_ERROR("bad SET_RESOURCE\n");
+                                return -EINVAL;
+                        }
+                }
+                break;
+        case PACKET3_SET_ALU_CONST:
+                start_reg = (ib[idx+0] << 2) + PACKET3_SET_ALU_CONST_OFFSET;
+                end_reg = 4 * pkt->count + start_reg - 4;
+                if ((start_reg < PACKET3_SET_ALU_CONST_OFFSET) ||
+                    (start_reg >= PACKET3_SET_ALU_CONST_END) ||
+                    (end_reg >= PACKET3_SET_ALU_CONST_END)) {
+                        DRM_ERROR("bad SET_ALU_CONST\n");
+                        return -EINVAL;
+                }
+                break;
+        case PACKET3_SET_BOOL_CONST:
+                start_reg = (ib[idx+0] << 2) + PACKET3_SET_BOOL_CONST_OFFSET;
+                end_reg = 4 * pkt->count + start_reg - 4;
+                if ((start_reg < PACKET3_SET_BOOL_CONST_OFFSET) ||
+                    (start_reg >= PACKET3_SET_BOOL_CONST_END) ||
+                    (end_reg >= PACKET3_SET_BOOL_CONST_END)) {
+                        DRM_ERROR("bad SET_BOOL_CONST\n");
+                        return -EINVAL;
+                }
+                break;
+        case PACKET3_SET_LOOP_CONST:
+                start_reg = (ib[idx+0] << 2) + PACKET3_SET_LOOP_CONST_OFFSET;
+                end_reg = 4 * pkt->count + start_reg - 4;
+                if ((start_reg < PACKET3_SET_LOOP_CONST_OFFSET) ||
+                    (start_reg >= PACKET3_SET_LOOP_CONST_END) ||
+                    (end_reg >= PACKET3_SET_LOOP_CONST_END)) {
+                        DRM_ERROR("bad SET_LOOP_CONST\n");
+                        return -EINVAL;
+                }
+                break;
+        case PACKET3_SET_CTL_CONST:
+                start_reg = (ib[idx+0] << 2) + PACKET3_SET_CTL_CONST_OFFSET;
+                end_reg = 4 * pkt->count + start_reg - 4;
+                if ((start_reg < PACKET3_SET_CTL_CONST_OFFSET) ||
+                    (start_reg >= PACKET3_SET_CTL_CONST_END) ||
+                    (end_reg >= PACKET3_SET_CTL_CONST_END)) {
+                        DRM_ERROR("bad SET_CTL_CONST\n");
+                        return -EINVAL;
+                }
+                break;
+        case PACKET3_SET_SAMPLER:
+                if (pkt->count % 3) {
+                        DRM_ERROR("bad SET_SAMPLER\n");
+                        return -EINVAL;
+                }
+                start_reg = (ib[idx+0] << 2) + PACKET3_SET_SAMPLER_OFFSET;
+                end_reg = 4 * pkt->count + start_reg - 4;
+                if ((start_reg < PACKET3_SET_SAMPLER_OFFSET) ||
+                    (start_reg >= PACKET3_SET_SAMPLER_END) ||
+                    (end_reg >= PACKET3_SET_SAMPLER_END)) {
+                        DRM_ERROR("bad SET_SAMPLER\n");
+                        return -EINVAL;
+                }
+                break;
+        case PACKET3_SURFACE_BASE_UPDATE:
+                if (p->family >= CHIP_RV770 || p->family == CHIP_R600) {
+                        DRM_ERROR("bad SURFACE_BASE_UPDATE\n");
+                        return -EINVAL;
+                }
+                if (pkt->count) {
+                        DRM_ERROR("bad SURFACE_BASE_UPDATE\n");
+                        return -EINVAL;
+                }
+                break;
+        case PACKET3_NOP:
+                break;
+        default:
+                DRM_ERROR("Packet3 opcode %x not supported\n", pkt->opcode);
+                return -EINVAL;
+        }
+        return 0;
+}
+int r600_cs_parse(struct radeon_cs_parser *p)
+{
+        struct radeon_cs_packet pkt;
+        int r;
+        do {
+                r = r600_cs_packet_parse(p, &pkt, p->idx);
+                if (r) {
+                        return r;
+                }
+                p->idx += pkt.count + 2;
+                switch (pkt.type) {
+                case PACKET_TYPE0:
+                        r = r600_cs_parse_packet0(p, &pkt);
+                        break;
+                case PACKET_TYPE2:
+                        break;
+                case PACKET_TYPE3:
+                        r = r600_packet3_check(p, &pkt);
+                        break;
+                default:
+                        DRM_ERROR("Unknown packet type %d !\n", pkt.type);
+                        return -EINVAL;
+                }
+                if (r) {
+                        return r;
+                }
+        } while (p->idx < p->chunks[p->chunk_ib_idx].length_dw);
+#if 0
+        for (r = 0; r < p->ib->length_dw; r++) {
+                printk(KERN_INFO "%05d  0x%08X\n", r, p->ib->ptr[r]);
+                mdelay(1);
+        }
+#endif
+        return 0;
+}
+static int r600_cs_parser_relocs_legacy(struct radeon_cs_parser *p)
+{
+        if (p->chunk_relocs_idx == -1) {
+                return 0;
+        }
+        p->relocs = kcalloc(1, sizeof(struct radeon_cs_reloc), GFP_KERNEL);
+        if (p->relocs == NULL) {
+                return -ENOMEM;
+        }
+        return 0;
+}
+/**
+ * cs_parser_fini() - clean parser states
+ * @parser:     parser structure holding parsing context.
+ * @error:      error number
+ *
+ * If error is set than unvalidate buffer, otherwise just free memory
+ * used by parsing context.
+ **/
+static void r600_cs_parser_fini(struct radeon_cs_parser *parser, int error)
+{
+        unsigned i;
+        kfree(parser->relocs);
+        for (i = 0; i < parser->nchunks; i++) {
+                kfree(parser->chunks[i].kdata);
+        }
+        kfree(parser->chunks);
+        kfree(parser->chunks_array);
+}
+int r600_cs_legacy(struct drm_device *dev, void *data, struct drm_file *filp,
+                        unsigned family, u32 *ib, int *l)
+{
+        struct radeon_cs_parser parser;
+        struct radeon_cs_chunk *ib_chunk;
+        struct radeon_ib        fake_ib;
+        int r;
+        /* initialize parser */
+        memset(&parser, 0, sizeof(struct radeon_cs_parser));
+        parser.filp = filp;
+        parser.rdev = NULL;
+        parser.family = family;
+        parser.ib = &fake_ib;
+        fake_ib.ptr = ib;
+        r = radeon_cs_parser_init(&parser, data);
+        if (r) {
+                DRM_ERROR("Failed to initialize parser !\n");
+                r600_cs_parser_fini(&parser, r);
+                return r;
+        }
+        r = r600_cs_parser_relocs_legacy(&parser);
+        if (r) {
+                DRM_ERROR("Failed to parse relocation !\n");
+                r600_cs_parser_fini(&parser, r);
+                return r;
+        }
+        /* Copy the packet into the IB, the parser will read from the
+         * input memory (cached) and write to the IB (which can be
+         * uncached). */
+        ib_chunk = &parser.chunks[parser.chunk_ib_idx];
+        parser.ib->length_dw = ib_chunk->length_dw;
+        memcpy((void *)parser.ib->ptr, ib_chunk->kdata, ib_chunk->length_dw*4);
+        *l = parser.ib->length_dw;
+        r = r600_cs_parse(&parser);
+        if (r) {
+                DRM_ERROR("Invalid command stream !\n");
+                r600_cs_parser_fini(&parser, r);
+                return r;
+        }
+        r600_cs_parser_fini(&parser, r);
+        return r;
+}
+void r600_cs_legacy_init(void)
+{
+        r600_cs_packet_next_reloc = &r600_cs_packet_next_reloc_nomm;
+}
diff --git a/drivers/gpu/drm/radeon/r600_microcode.h b/drivers/gpu/drm/radeon/r600_microcode.h
deleted file mode 100644
index 778c8b4b2fd9..000000000000
--- a/drivers/gpu/drm/radeon/r600_microcode.h
+++ /dev/null
@@ -1,23297 +0,0 @@
-/*
- * Copyright 2008-2009 Advanced Micro Devices, Inc.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
- * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
- * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
- * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
- */
-#ifndef R600_MICROCODE_H
-#define R600_MICROCODE_H
-static const int ME_JUMP_TABLE_START = 1764;
-static const int ME_JUMP_TABLE_END   = 1792;
-#define PFP_UCODE_SIZE 576
-#define PM4_UCODE_SIZE 1792
-#define R700_PFP_UCODE_SIZE 848
-#define R700_PM4_UCODE_SIZE 1360
-static const u32 R600_cp_microcode[][3] = {
-    { 0x00000000, 0xc0200400, 0x000 },
-    { 0x00000000, 0x00a0000a, 0x000 },
-    { 0x0000ffff, 0x00284621, 0x000 },
-    { 0x00000000, 0xd9004800, 0x000 },
-    { 0x00000000, 0xc0200400, 0x000 },
-    { 0x00000000, 0x00a0000a, 0x000 },
-    { 0x00000000, 0x00e00000, 0x000 },
-    { 0x00010000, 0xc0294620, 0x000 },
-    { 0x00000000, 0xd9004800, 0x000 },
-    { 0x00000000, 0xc0200400, 0x000 },
-    { 0x00000000, 0x00a0000a, 0x000 },
-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x00000001, 0x00204811, 0x000 },
-    { 0x00042004, 0x00604411, 0x614 },
-    { 0x00000000, 0x00600000, 0x5b2 },
-    { 0x00000000, 0x00600000, 0x5c5 },
-    { 0x00000000, 0xc0200800, 0x000 },
-    { 0x00000f00, 0x00281622, 0x000 },
-    { 0x00000008, 0x00211625, 0x000 },
-    { 0x00000020, 0x00203625, 0x000 },
-    { 0x8d000000, 0x00204411, 0x000 },
-    { 0x00000004, 0x002f0225, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x018 },
-    { 0x00412000, 0x00404811, 0x019 },
-    { 0x00422000, 0x00204811, 0x000 },
-    { 0x8e000000, 0x00204411, 0x000 },
-    { 0x00000031, 0x00204a2d, 0x000 },
-    { 0x90000000, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204805, 0x000 },
-    { 0x0000000c, 0x00211622, 0x000 },
-    { 0x00000003, 0x00281625, 0x000 },
-    { 0x00000019, 0x00211a22, 0x000 },
-    { 0x00000004, 0x00281a26, 0x000 },
-    { 0x00000000, 0x002914c5, 0x000 },
-    { 0x00000021, 0x00203625, 0x000 },
-    { 0x00000000, 0x003a1402, 0x000 },
-    { 0x00000016, 0x00211625, 0x000 },
-    { 0x00000003, 0x00281625, 0x000 },
-    { 0x0000001d, 0x00200e2d, 0x000 },
-    { 0xfffffffc, 0x00280e23, 0x000 },
-    { 0x00000000, 0x002914a3, 0x000 },
-    { 0x0000001d, 0x00203625, 0x000 },
-    { 0x00008000, 0x00280e22, 0x000 },
-    { 0x00000007, 0x00220e23, 0x000 },
-    { 0x00000000, 0x0029386e, 0x000 },
-    { 0x20000000, 0x00280e22, 0x000 },
-    { 0x00000006, 0x00210e23, 0x000 },
-    { 0x00000000, 0x0029386e, 0x000 },
-    { 0x00000000, 0x00220222, 0x000 },
-    { 0x00000000, 0x14e00000, 0x038 },
-    { 0x00000000, 0x2ee00000, 0x035 },
-    { 0x00000000, 0x2ce00000, 0x037 },
-    { 0x00000000, 0x00400e2d, 0x039 },
-    { 0x00000008, 0x00200e2d, 0x000 },
-    { 0x00000009, 0x0040122d, 0x046 },
-    { 0x00000001, 0x00400e2d, 0x039 },
-    { 0x00000000, 0xc0200c00, 0x000 },
-    { 0x003ffffc, 0x00281223, 0x000 },
-    { 0x00000002, 0x00221224, 0x000 },
-    { 0x0000001f, 0x00211e23, 0x000 },
-    { 0x00000000, 0x14e00000, 0x03e },
-    { 0x00000008, 0x00401c11, 0x041 },
-    { 0x0000000d, 0x00201e2d, 0x000 },
-    { 0x0000000f, 0x00281e27, 0x000 },
-    { 0x00000003, 0x00221e27, 0x000 },
-    { 0x7fc00000, 0x00281a23, 0x000 },
-    { 0x00000014, 0x00211a26, 0x000 },
-    { 0x00000001, 0x00331a26, 0x000 },
-    { 0x00000008, 0x00221a26, 0x000 },
-    { 0x00000000, 0x00290cc7, 0x000 },
-    { 0x00000030, 0x00203624, 0x000 },
-    { 0x00007f00, 0x00281221, 0x000 },
-    { 0x00001400, 0x002f0224, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x04b },
-    { 0x00000001, 0x00290e23, 0x000 },
-    { 0x00000010, 0x00203623, 0x000 },
-    { 0x0000e000, 0x00204411, 0x000 },
-    { 0xfff80000, 0x00294a23, 0x000 },
-    { 0x00000000, 0x003a2c02, 0x000 },
-    { 0x00000002, 0x00220e2b, 0x000 },
-    { 0xfc000000, 0x00280e23, 0x000 },
-    { 0x00000011, 0x00203623, 0x000 },
-    { 0x00001fff, 0x00294a23, 0x000 },
-    { 0x00000030, 0x00204a2d, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x00000032, 0x00200e2d, 0x000 },
-    { 0x060a0200, 0x00294a23, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x00000001, 0x00210222, 0x000 },
-    { 0x00000000, 0x14e00000, 0x061 },
-    { 0x00000000, 0x2ee00000, 0x05f },
-    { 0x00000000, 0x2ce00000, 0x05e },
-    { 0x00000000, 0x00400e2d, 0x062 },
-    { 0x00000001, 0x00400e2d, 0x062 },
-    { 0x0000000a, 0x00200e2d, 0x000 },
-    { 0x0000000b, 0x0040122d, 0x06a },
-    { 0x00000000, 0xc0200c00, 0x000 },
-    { 0x003ffffc, 0x00281223, 0x000 },
-    { 0x00000002, 0x00221224, 0x000 },
-    { 0x7fc00000, 0x00281623, 0x000 },
-    { 0x00000014, 0x00211625, 0x000 },
-    { 0x00000001, 0x00331625, 0x000 },
-    { 0x80000000, 0x00280e23, 0x000 },
-    { 0x00000000, 0x00290ca3, 0x000 },
-    { 0x3ffffc00, 0x00290e23, 0x000 },
-    { 0x0000001f, 0x00211e23, 0x000 },
-    { 0x00000000, 0x14e00000, 0x06d },
-    { 0x00000100, 0x00401c11, 0x070 },
-    { 0x0000000d, 0x00201e2d, 0x000 },
-    { 0x000000f0, 0x00281e27, 0x000 },
-    { 0x00000004, 0x00221e27, 0x000 },
-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x0000000d, 0x00204811, 0x000 },
-    { 0xfffff0ff, 0x00281a30, 0x000 },
-    { 0x0000a028, 0x00204411, 0x000 },
-    { 0x00000000, 0x002948e6, 0x000 },
-    { 0x0000a018, 0x00204411, 0x000 },
-    { 0x3fffffff, 0x00284a23, 0x000 },
-    { 0x0000a010, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204804, 0x000 },
-    { 0x0000002d, 0x0020162d, 0x000 },
-    { 0x00000000, 0x002f00a3, 0x000 },
-    { 0x00000000, 0x0cc00000, 0x080 },
-    { 0x0000002e, 0x0020162d, 0x000 },
-    { 0x00000000, 0x002f00a4, 0x000 },
-    { 0x00000000, 0x0cc00000, 0x081 },
-    { 0x00000000, 0x00400000, 0x087 },
-    { 0x0000002d, 0x00203623, 0x000 },
-    { 0x0000002e, 0x00203624, 0x000 },
-    { 0x0000001d, 0x00201e2d, 0x000 },
-    { 0x00000002, 0x00210227, 0x000 },
-    { 0x00000000, 0x14e00000, 0x087 },
-    { 0x00000000, 0x00600000, 0x5ed },
-    { 0x00000000, 0x00600000, 0x5e1 },
-    { 0x00000002, 0x00210e22, 0x000 },
-    { 0x00000000, 0x14c00000, 0x08a },
-    { 0x00000018, 0xc0403620, 0x090 },
-    { 0x00000000, 0x2ee00000, 0x08e },
-    { 0x00000000, 0x2ce00000, 0x08d },
-    { 0x00000002, 0x00400e2d, 0x08f },
-    { 0x00000003, 0x00400e2d, 0x08f },
-    { 0x0000000c, 0x00200e2d, 0x000 },
-    { 0x00000018, 0x00203623, 0x000 },
-    { 0x00000003, 0x00210e22, 0x000 },
-    { 0x00000000, 0x14c00000, 0x095 },
-    { 0x0000a00c, 0x00204411, 0x000 },
-    { 0x00000000, 0xc0204800, 0x000 },
-    { 0x00000000, 0xc0404800, 0x09d },
-    { 0x0000a00c, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x00000000, 0x2ee00000, 0x09b },
-    { 0x00000000, 0x2ce00000, 0x09a },
-    { 0x00000002, 0x00400e2d, 0x09c },
-    { 0x00000003, 0x00400e2d, 0x09c },
-    { 0x0000000c, 0x00200e2d, 0x000 },
-    { 0x00000000, 0x00204803, 0x000 },
-    { 0x00000000, 0x003a0c02, 0x000 },
-    { 0x003f0000, 0x00280e23, 0x000 },
-    { 0x00000010, 0x00210e23, 0x000 },
-    { 0x00000013, 0x00203623, 0x000 },
-    { 0x0000001e, 0x0021022b, 0x000 },
-    { 0x00000000, 0x14c00000, 0x0a4 },
-    { 0x0000001c, 0xc0203620, 0x000 },
-    { 0x0000001f, 0x0021022b, 0x000 },
-    { 0x00000000, 0x14c00000, 0x0a7 },
-    { 0x0000001b, 0xc0203620, 0x000 },
-    { 0x00000008, 0x00210e2b, 0x000 },
-    { 0x0000007f, 0x00280e23, 0x000 },
-    { 0x00000000, 0x002f0223, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x0db },
-    { 0x00000000, 0x27000000, 0x000 },
-    { 0x00000000, 0x00600000, 0x28c },
-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x00000006, 0x00204811, 0x000 },
-    { 0x0000000c, 0x00221e30, 0x000 },
-    { 0x99800000, 0x00204411, 0x000 },
-    { 0x00000004, 0x0020122d, 0x000 },
-    { 0x00000008, 0x00221224, 0x000 },
-    { 0x00000010, 0x00201811, 0x000 },
-    { 0x00000000, 0x00291ce4, 0x000 },
-    { 0x00000000, 0x00604807, 0x128 },
-    { 0x9b000000, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204802, 0x000 },
-    { 0x9c000000, 0x00204411, 0x000 },
-    { 0x00000000, 0x0033146f, 0x000 },
-    { 0x00000001, 0x00333e23, 0x000 },
-    { 0x00000000, 0xd9004800, 0x000 },
-    { 0x00000000, 0x00203c05, 0x000 },
-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x0000000e, 0x00204811, 0x000 },
-    { 0x00000000, 0x00201010, 0x000 },
-    { 0x0000e007, 0x00204411, 0x000 },
-    { 0x0000000f, 0x0021022b, 0x000 },
-    { 0x00000000, 0x14c00000, 0x0c5 },
-    { 0x00f8ff08, 0x00204811, 0x000 },
-    { 0x98000000, 0x00404811, 0x0d6 },
-    { 0x000000f0, 0x00280e22, 0x000 },
-    { 0x000000a0, 0x002f0223, 0x000 },
-    { 0x00000000, 0x0cc00000, 0x0d4 },
-    { 0x00000013, 0x00200e2d, 0x000 },
-    { 0x00000001, 0x002f0223, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x0cf },
-    { 0x00000002, 0x002f0223, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x0ce },
-    { 0x00003f00, 0x00400c11, 0x0d0 },
-    { 0x00001f00, 0x00400c11, 0x0d0 },
-    { 0x00000f00, 0x00200c11, 0x000 },
-    { 0x00380009, 0x00294a23, 0x000 },
-    { 0x3f000000, 0x00280e2b, 0x000 },
-    { 0x00000002, 0x00220e23, 0x000 },
-    { 0x00000007, 0x00494a23, 0x0d6 },
-    { 0x00380f09, 0x00204811, 0x000 },
-    { 0x68000007, 0x00204811, 0x000 },
-    { 0x00000008, 0x00214a27, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x060a0200, 0x00294a24, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x0000a202, 0x00204411, 0x000 },
-    { 0x00ff0000, 0x00284a22, 0x000 },
-    { 0x00000030, 0x00200e2d, 0x000 },
-    { 0x0000002e, 0x0020122d, 0x000 },
-    { 0x00000000, 0x002f0083, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x0e3 },
-    { 0x00000000, 0x00600000, 0x5e7 },
-    { 0x00000000, 0x00400000, 0x0e4 },
-    { 0x00000000, 0x00600000, 0x5ea },
-    { 0x00000007, 0x0020222d, 0x000 },
-    { 0x00000005, 0x00220e22, 0x000 },
-    { 0x00100000, 0x00280e23, 0x000 },
-    { 0x00000000, 0x00292068, 0x000 },
-    { 0x00000000, 0x003a0c02, 0x000 },
-    { 0x000000ef, 0x00280e23, 0x000 },
-    { 0x00000000, 0x00292068, 0x000 },
-    { 0x0000001d, 0x00200e2d, 0x000 },
-    { 0x00000003, 0x00210223, 0x000 },
-    { 0x00000000, 0x14e00000, 0x0f1 },
-    { 0x0000000b, 0x00210228, 0x000 },
-    { 0x00000000, 0x14c00000, 0x0f1 },
-    { 0x00000400, 0x00292228, 0x000 },
-    { 0x0000001a, 0x00203628, 0x000 },
-    { 0x0000001c, 0x00210e22, 0x000 },
-    { 0x00000000, 0x14c00000, 0x0f6 },
-    { 0x0000a30c, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x0000001e, 0x00210e22, 0x000 },
-    { 0x00000000, 0x14c00000, 0x104 },
-    { 0x0000a30f, 0x00204411, 0x000 },
-    { 0x00000013, 0x00200e2d, 0x000 },
-    { 0x00000001, 0x002f0223, 0x000 },
-    { 0x00000000, 0x0cc00000, 0x0fd },
-    { 0xffffffff, 0x00404811, 0x104 },
-    { 0x00000002, 0x002f0223, 0x000 },
-    { 0x00000000, 0x0cc00000, 0x100 },
-    { 0x0000ffff, 0x00404811, 0x104 },
-    { 0x00000004, 0x002f0223, 0x000 },
-    { 0x00000000, 0x0cc00000, 0x103 },
-    { 0x000000ff, 0x00404811, 0x104 },
-    { 0x00000001, 0x00204811, 0x000 },
-    { 0x0002c400, 0x00204411, 0x000 },
-    { 0x0000001f, 0x00210e22, 0x000 },
-    { 0x00000000, 0x14c00000, 0x10b },
-    { 0x00000010, 0x40210e20, 0x000 },
-    { 0x00000019, 0x00203623, 0x000 },
-    { 0x00000018, 0x40224a20, 0x000 },
-    { 0x00000010, 0xc0424a20, 0x10d },
-    { 0x00000000, 0x00200c11, 0x000 },
-    { 0x00000019, 0x00203623, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x0000000a, 0x00201011, 0x000 },
-    { 0x00000000, 0x002f0224, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x114 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x00000001, 0x00531224, 0x110 },
-    { 0xffbfffff, 0x00283a2e, 0x000 },
-    { 0x0000001b, 0x00210222, 0x000 },
-    { 0x00000000, 0x14c00000, 0x127 },
-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x0000000d, 0x00204811, 0x000 },
-    { 0x00000018, 0x00220e30, 0x000 },
-    { 0xfc000000, 0x00280e23, 0x000 },
-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x0000000e, 0x00204811, 0x000 },
-    { 0x00000000, 0x00201010, 0x000 },
-    { 0x0000e00e, 0x00204411, 0x000 },
-    { 0x07f8ff08, 0x00204811, 0x000 },
-    { 0x00000000, 0x00294a23, 0x000 },
-    { 0x00000024, 0x00201e2d, 0x000 },
-    { 0x00000008, 0x00214a27, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x060a0200, 0x00294a24, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x00000000, 0x00800000, 0x000 },
-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x00000001, 0x00204811, 0x000 },
-    { 0x0000217c, 0x00204411, 0x000 },
-    { 0x00800000, 0x00204811, 0x000 },
-    { 0x00000000, 0x00204806, 0x000 },
-    { 0x00000008, 0x00214a27, 0x000 },
-    { 0x00000000, 0x17000000, 0x000 },
-    { 0x0004217f, 0x00604411, 0x614 },
-    { 0x0000001f, 0x00210230, 0x000 },
-    { 0x00000000, 0x14c00000, 0x613 },
-    { 0x00000004, 0x00404c11, 0x12e },
-    { 0x00000000, 0x00600000, 0x00b },
-    { 0x00000000, 0x00600411, 0x2fe },
-    { 0x00000000, 0x00200411, 0x000 },
-    { 0x00000000, 0x00600811, 0x19f },
-    { 0x00000000, 0x00600000, 0x151 },
-    { 0x0000ffff, 0x40280e20, 0x000 },
-    { 0x00000010, 0xc0211220, 0x000 },
-    { 0x0000ffff, 0x40280620, 0x000 },
-    { 0x00000010, 0xc0210a20, 0x000 },
-    { 0x00000000, 0x00341461, 0x000 },
-    { 0x00000000, 0x00741882, 0x2a4 },
-    { 0x0001a1fd, 0x00604411, 0x2c9 },
-    { 0x00003fff, 0x002f022f, 0x000 },
-    { 0x00000000, 0x0cc00000, 0x138 },
-    { 0x00000000, 0xc0400400, 0x001 },
-    { 0x00000000, 0x00600000, 0x00b },
-    { 0x00000000, 0x00600411, 0x2fe },
-    { 0x00000000, 0x00200411, 0x000 },
-    { 0x00000000, 0x00600811, 0x19f },
-    { 0x00003fff, 0x002f022f, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x000 },
-    { 0x00000000, 0x00600000, 0x151 },
-    { 0x00000010, 0x40210e20, 0x000 },
-    { 0x0000ffff, 0xc0281220, 0x000 },
-    { 0x00000010, 0x40211620, 0x000 },
-    { 0x0000ffff, 0xc0681a20, 0x2a4 },
-    { 0x0001a1fd, 0x00604411, 0x2c9 },
-    { 0x00003fff, 0x002f022f, 0x000 },
-    { 0x00000000, 0x0cc00000, 0x149 },
-    { 0x00000000, 0xc0400400, 0x001 },
-    { 0x0000225c, 0x00204411, 0x000 },
-    { 0x00000001, 0x00300a2f, 0x000 },
-    { 0x00000001, 0x00210a22, 0x000 },
-    { 0x00000003, 0x00384a22, 0x000 },
-    { 0x00002256, 0x00204411, 0x000 },
-    { 0x0000001a, 0x00204811, 0x000 },
-    { 0x0000a1fc, 0x00204411, 0x000 },
-    { 0x00000001, 0x00804811, 0x000 },
-    { 0x00000000, 0x00600000, 0x00b },
-    { 0x00000000, 0x00600000, 0x17c },
-    { 0x00000000, 0x00600000, 0x18d },
-    { 0x00003fff, 0x002f022f, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x000 },
-    { 0x00000000, 0x00202c08, 0x000 },
-    { 0x00000000, 0x00202411, 0x000 },
-    { 0x00000000, 0x00202811, 0x000 },
-    { 0x00002256, 0x00204411, 0x000 },
-    { 0x00000016, 0x00204811, 0x000 },
-    { 0x0000225c, 0x00204411, 0x000 },
-    { 0x00000003, 0x00204811, 0x000 },
-    { 0x93800000, 0x00204411, 0x000 },
-    { 0x00000002, 0x00221e29, 0x000 },
-    { 0x00000000, 0x007048eb, 0x189 },
-    { 0x00000000, 0x00600000, 0x2a4 },
-    { 0x00000001, 0x40330620, 0x000 },
-    { 0x00000000, 0xc0302409, 0x000 },
-    { 0x00003fff, 0x002f022f, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x000 },
-    { 0x00000000, 0x00600000, 0x28c },
-    { 0x95000000, 0x00204411, 0x000 },
-    { 0x00000000, 0x002f0221, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x173 },
-    { 0x00000000, 0xc0204800, 0x000 },
-    { 0x00000001, 0x00530621, 0x16f },
-    { 0x92000000, 0x00204411, 0x000 },
-    { 0x00000000, 0xc0604800, 0x184 },
-    { 0x0001a1fd, 0x00204411, 0x000 },
-    { 0x00000013, 0x0020062d, 0x000 },
-    { 0x00000000, 0x0078042a, 0x2e4 },
-    { 0x00000000, 0x00202809, 0x000 },
-    { 0x00003fff, 0x002f022f, 0x000 },
-    { 0x00000000, 0x0cc00000, 0x165 },
-    { 0x00000000, 0xc0400400, 0x001 },
-    { 0x00000210, 0x00600411, 0x2fe },
-    { 0x00003fff, 0x002f022f, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x181 },
-    { 0x0000001b, 0xc0203620, 0x000 },
-    { 0x0000001c, 0xc0203620, 0x000 },
-    { 0x3f800000, 0x00200411, 0x000 },
-    { 0x46000000, 0x00600811, 0x19f },
-    { 0x00000000, 0x00800000, 0x000 },
-    { 0x0000a1fc, 0x00204411, 0x000 },
-    { 0x00003fff, 0x002f022f, 0x000 },
-    { 0x00000000, 0x0cc00000, 0x188 },
-    { 0x00000001, 0x00804811, 0x000 },
-    { 0x00000021, 0x00804811, 0x000 },
-    { 0x0000ffff, 0x40280e20, 0x000 },
-    { 0x00000010, 0xc0211220, 0x000 },
-    { 0x0000ffff, 0x40281620, 0x000 },
-    { 0x00000010, 0xc0811a20, 0x000 },
-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x00000006, 0x00204811, 0x000 },
-    { 0x00000008, 0x00221e30, 0x000 },
-    { 0x00000032, 0x00201a2d, 0x000 },
-    { 0x0000e000, 0x00204411, 0x000 },
-    { 0xfffbff09, 0x00204811, 0x000 },
-    { 0x00000011, 0x0020222d, 0x000 },
-    { 0x00001fff, 0x00294a28, 0x000 },
-    { 0x00000006, 0x0020222d, 0x000 },
-    { 0x00000000, 0x002920e8, 0x000 },
-    { 0x00000000, 0x00204808, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x060a0200, 0x00294a26, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x00000100, 0x00201811, 0x000 },
-    { 0x00000008, 0x00621e28, 0x128 },
-    { 0x00000008, 0x00822228, 0x000 },
-    { 0x0002c000, 0x00204411, 0x000 },
-    { 0x0000001b, 0x00600e2d, 0x1aa },
-    { 0x0000001c, 0x00600e2d, 0x1aa },
-    { 0x0000c008, 0x00204411, 0x000 },
-    { 0x0000001d, 0x00200e2d, 0x000 },
-    { 0x00000000, 0x14c00000, 0x1a6 },
-    { 0x00000000, 0x00200411, 0x000 },
-    { 0x00000000, 0x00204801, 0x000 },
-    { 0x39000000, 0x00204811, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x00000000, 0x00804802, 0x000 },
-    { 0x00000020, 0x00202e2d, 0x000 },
-    { 0x00000000, 0x003b0d63, 0x000 },
-    { 0x00000008, 0x00224a23, 0x000 },
-    { 0x00000010, 0x00224a23, 0x000 },
-    { 0x00000018, 0x00224a23, 0x000 },
-    { 0x00000000, 0x00804803, 0x000 },
-    { 0x00000000, 0x00600000, 0x00b },
-    { 0x00001000, 0x00600411, 0x2fe },
-    { 0x00000000, 0x00200411, 0x000 },
-    { 0x00000000, 0x00600811, 0x19f },
-    { 0x00000007, 0x0021062f, 0x000 },
-    { 0x00000019, 0x00200a2d, 0x000 },
-    { 0x00000001, 0x00202c11, 0x000 },
-    { 0x0000ffff, 0x40282220, 0x000 },
-    { 0x0000000f, 0x00262228, 0x000 },
-    { 0x00000010, 0x40212620, 0x000 },
-    { 0x0000000f, 0x00262629, 0x000 },
-    { 0x00000000, 0x00202802, 0x000 },
-    { 0x00002256, 0x00204411, 0x000 },
-    { 0x0000001b, 0x00204811, 0x000 },
-    { 0x00000000, 0x002f0221, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x1cd },
-    { 0x0000225c, 0x00204411, 0x000 },
-    { 0x00000081, 0x00204811, 0x000 },
-    { 0x0000a1fc, 0x00204411, 0x000 },
-    { 0x00000001, 0x00204811, 0x000 },
-    { 0x00000080, 0x00201c11, 0x000 },
-    { 0x00000000, 0x002f0227, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x1c9 },
-    { 0x00000000, 0x00600000, 0x1d6 },
-    { 0x00000001, 0x00531e27, 0x1c5 },
-    { 0x00000001, 0x00202c11, 0x000 },
-    { 0x0000001f, 0x00280a22, 0x000 },
-    { 0x0000001f, 0x00282a2a, 0x000 },
-    { 0x00000001, 0x00530621, 0x1be },
-    { 0x0000225c, 0x00204411, 0x000 },
-    { 0x00000002, 0x00304a2f, 0x000 },
-    { 0x0000a1fc, 0x00204411, 0x000 },
-    { 0x00000001, 0x00204811, 0x000 },
-    { 0x00000001, 0x00301e2f, 0x000 },
-    { 0x00000000, 0x002f0227, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x000 },
-    { 0x00000000, 0x00600000, 0x1d6 },
-    { 0x00000001, 0x00531e27, 0x1d2 },
-    { 0x0000ffff, 0x40280e20, 0x000 },
-    { 0x0000000f, 0x00260e23, 0x000 },
-    { 0x00000010, 0xc0211220, 0x000 },
-    { 0x0000000f, 0x00261224, 0x000 },
-    { 0x00000000, 0x00201411, 0x000 },
-    { 0x00000000, 0x00601811, 0x2a4 },
-    { 0x0001a1fd, 0x00204411, 0x000 },
-    { 0x00000000, 0x002f022b, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x1e5 },
-    { 0x00000010, 0x00221628, 0x000 },
-    { 0xffff0000, 0x00281625, 0x000 },
-    { 0x0000ffff, 0x00281a29, 0x000 },
-    { 0x00000000, 0x002948c5, 0x000 },
-    { 0x00000000, 0x0020480a, 0x000 },
-    { 0x00000000, 0x00202c11, 0x000 },
-    { 0x00000010, 0x00221623, 0x000 },
-    { 0xffff0000, 0x00281625, 0x000 },
-    { 0x0000ffff, 0x00281a24, 0x000 },
-    { 0x00000000, 0x002948c5, 0x000 },
-    { 0x00000000, 0x00731503, 0x1f2 },
-    { 0x00000000, 0x00201805, 0x000 },
-    { 0x00000000, 0x00731524, 0x1f2 },
-    { 0x00000000, 0x002d14c5, 0x000 },
-    { 0x00000000, 0x003008a2, 0x000 },
-    { 0x00000000, 0x00204802, 0x000 },
-    { 0x00000000, 0x00202802, 0x000 },
-    { 0x00000000, 0x00202003, 0x000 },
-    { 0x00000000, 0x00802404, 0x000 },
-    { 0x0000000f, 0x00210225, 0x000 },
-    { 0x00000000, 0x14c00000, 0x613 },
-    { 0x00000000, 0x002b1405, 0x000 },
-    { 0x00000001, 0x00901625, 0x000 },
-    { 0x00000000, 0x00600000, 0x00b },
-    { 0x00000000, 0x00600411, 0x2fe },
-    { 0x00000000, 0x00200411, 0x000 },
-    { 0x00000000, 0x00600811, 0x19f },
-    { 0x00002256, 0x00204411, 0x000 },
-    { 0x0000001a, 0x00294a22, 0x000 },
-    { 0x00000000, 0xc0200000, 0x000 },
-    { 0x00003fff, 0x002f022f, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x000 },
-    { 0x00000000, 0xc0200400, 0x000 },
-    { 0x0000225c, 0x00204411, 0x000 },
-    { 0x00000003, 0x00384a21, 0x000 },
-    { 0x0000a1fc, 0x00204411, 0x000 },
-    { 0x00000001, 0x00204811, 0x000 },
-    { 0x0000ffff, 0x40281220, 0x000 },
-    { 0x00000010, 0xc0211a20, 0x000 },
-    { 0x0000ffff, 0x40280e20, 0x000 },
-    { 0x00000010, 0xc0211620, 0x000 },
-    { 0x00000000, 0x00741465, 0x2a4 },
-    { 0x0001a1fd, 0x00604411, 0x2c9 },
-    { 0x00000001, 0x00330621, 0x000 },
-    { 0x00000000, 0x002f0221, 0x000 },
-    { 0x00000000, 0x0cc00000, 0x206 },
-    { 0x00003fff, 0x002f022f, 0x000 },
-    { 0x00000000, 0x0cc00000, 0x1ff },
-    { 0x00000000, 0xc0400400, 0x001 },
-    { 0x00000000, 0x00600000, 0x5c5 },
-    { 0x00000000, 0x0040040f, 0x200 },
-    { 0x00000000, 0x00600000, 0x5b2 },
-    { 0x00000000, 0x00600000, 0x5c5 },
-    { 0x00000210, 0x00600411, 0x2fe },
-    { 0x00000000, 0x00600000, 0x18d },
-    { 0x00000000, 0x00600000, 0x189 },
-    { 0x00000000, 0x00600000, 0x2a4 },
-    { 0x00000000, 0x00600000, 0x28c },
-    { 0x93800000, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204808, 0x000 },
-    { 0x95000000, 0x00204411, 0x000 },
-    { 0x00000000, 0x002f022f, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x21f },
-    { 0x00000000, 0xc0404800, 0x21c },
-    { 0x92000000, 0x00204411, 0x000 },
-    { 0x00000000, 0xc0204800, 0x000 },
-    { 0x00002256, 0x00204411, 0x000 },
-    { 0x00000016, 0x00204811, 0x000 },
-    { 0x0000225c, 0x00204411, 0x000 },
-    { 0x00000003, 0x00204811, 0x000 },
-    { 0x0000a1fc, 0x00204411, 0x000 },
-    { 0x00000001, 0x00204811, 0x000 },
-    { 0x0001a1fd, 0x00204411, 0x000 },
-    { 0x00000000, 0x00600411, 0x2e4 },
-    { 0x00000000, 0xc0400400, 0x001 },
-    { 0x00000000, 0x00600000, 0x5b2 },
-    { 0x0000a00c, 0x00204411, 0x000 },
-    { 0x00000000, 0xc0204800, 0x000 },
-    { 0x00000000, 0xc0404800, 0x000 },
-    { 0x00000000, 0x00600000, 0x00b },
-    { 0x00000018, 0x40210a20, 0x000 },
-    { 0x00000003, 0x002f0222, 0x000 },
-    { 0x00000000, 0x0ae00000, 0x235 },
-    { 0x0000001a, 0x0020222d, 0x000 },
-    { 0x00080101, 0x00292228, 0x000 },
-    { 0x0000001a, 0x00203628, 0x000 },
-    { 0x0000a30c, 0x00204411, 0x000 },
-    { 0x00000000, 0xc0204800, 0x000 },
-    { 0x00000000, 0xc0204800, 0x000 },
-    { 0x00000000, 0xc0404800, 0x23a },
-    { 0x00000000, 0x00600000, 0x00b },
-    { 0x00000010, 0x00600411, 0x2fe },
-    { 0x3f800000, 0x00200411, 0x000 },
-    { 0x00000000, 0x00600811, 0x19f },
-    { 0x0000225c, 0x00204411, 0x000 },
-    { 0x00000003, 0x00204811, 0x000 },
-    { 0x00000000, 0x00600000, 0x265 },
-    { 0x0000001d, 0x00201e2d, 0x000 },
-    { 0x00000001, 0x00211e27, 0x000 },
-    { 0x00000000, 0x14e00000, 0x253 },
-    { 0x00000018, 0x00201e2d, 0x000 },
-    { 0x0000ffff, 0x00281e27, 0x000 },
-    { 0x00000000, 0x00341c27, 0x000 },
-    { 0x00000000, 0x12c00000, 0x248 },
-    { 0x00000000, 0x00201c11, 0x000 },
-    { 0x00000000, 0x002f00e5, 0x000 },
-    { 0x00000000, 0x08c00000, 0x24b },
-    { 0x00000000, 0x00201407, 0x000 },
-    { 0x00000018, 0x00201e2d, 0x000 },
-    { 0x00000010, 0x00211e27, 0x000 },
-    { 0x00000000, 0x00341c47, 0x000 },
-    { 0x00000000, 0x12c00000, 0x250 },
-    { 0x00000000, 0x00201c11, 0x000 },
-    { 0x00000000, 0x002f00e6, 0x000 },
-    { 0x00000000, 0x08c00000, 0x253 },
-    { 0x00000000, 0x00201807, 0x000 },
-    { 0x00000000, 0x00600000, 0x2aa },
-    { 0x00002256, 0x00204411, 0x000 },
-    { 0x00000000, 0x00342023, 0x000 },
-    { 0x00000000, 0x12c00000, 0x25b },
-    { 0x00000000, 0x00342044, 0x000 },
-    { 0x00000000, 0x12c00000, 0x25a },
-    { 0x00000016, 0x00404811, 0x25f },
-    { 0x00000018, 0x00404811, 0x25f },
-    { 0x00000000, 0x00342044, 0x000 },
-    { 0x00000000, 0x12c00000, 0x25e },
-    { 0x00000017, 0x00404811, 0x25f },
-    { 0x00000019, 0x00204811, 0x000 },
-    { 0x0000a1fc, 0x00204411, 0x000 },
-    { 0x00000001, 0x00204811, 0x000 },
-    { 0x0001a1fd, 0x00604411, 0x2d2 },
-    { 0x00003fff, 0x002f022f, 0x000 },
-    { 0x00000000, 0x0cc00000, 0x23f },
-    { 0x00000000, 0xc0400400, 0x001 },
-    { 0x00000010, 0x40210620, 0x000 },
-    { 0x0000ffff, 0xc0280a20, 0x000 },
-    { 0x00000010, 0x40210e20, 0x000 },
-    { 0x0000ffff, 0xc0281220, 0x000 },
-    { 0x00000010, 0x40211620, 0x000 },
-    { 0x0000ffff, 0xc0881a20, 0x000 },
-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x00000001, 0x00204811, 0x000 },
-    { 0x00042004, 0x00604411, 0x614 },
-    { 0x00000000, 0x00600000, 0x5b2 },
-    { 0x00000000, 0xc0600000, 0x28c },
-    { 0x00000005, 0x00200a2d, 0x000 },
-    { 0x00000008, 0x00220a22, 0x000 },
-    { 0x00000034, 0x00201a2d, 0x000 },
-    { 0x00000024, 0x00201e2d, 0x000 },
-    { 0x00007000, 0x00281e27, 0x000 },
-    { 0x00000000, 0x00311ce6, 0x000 },
-    { 0x00000033, 0x00201a2d, 0x000 },
-    { 0x0000000c, 0x00221a26, 0x000 },
-    { 0x00000000, 0x002f00e6, 0x000 },
-    { 0x00000000, 0x06e00000, 0x27b },
-    { 0x00000000, 0x00201c11, 0x000 },
-    { 0x00000000, 0x00200c11, 0x000 },
-    { 0x00000034, 0x00203623, 0x000 },
-    { 0x00000010, 0x00201811, 0x000 },
-    { 0x00000000, 0x00691ce2, 0x128 },
-    { 0x93800000, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204807, 0x000 },
-    { 0x95000000, 0x00204411, 0x000 },
-    { 0x00000000, 0x002f022f, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x286 },
-    { 0x00000001, 0x00333e2f, 0x000 },
-    { 0x00000000, 0xd9004800, 0x000 },
-    { 0x92000000, 0x00204411, 0x000 },
-    { 0x00000000, 0xc0204800, 0x000 },
-    { 0x00000024, 0x00403627, 0x000 },
-    { 0x0000000c, 0xc0220a20, 0x000 },
-    { 0x00000032, 0x00203622, 0x000 },
-    { 0x00000031, 0xc0403620, 0x000 },
-    { 0x0000a2a4, 0x00204411, 0x000 },
-    { 0x00000009, 0x00204811, 0x000 },
-    { 0xa1000000, 0x00204411, 0x000 },
-    { 0x00000001, 0x00804811, 0x000 },
-    { 0x00000029, 0x00201e2d, 0x000 },
-    { 0x00000000, 0x002c1ce3, 0x000 },
-    { 0x00000029, 0x00203627, 0x000 },
-    { 0x0000002a, 0x00201e2d, 0x000 },
-    { 0x00000000, 0x002c1ce4, 0x000 },
-    { 0x0000002a, 0x00203627, 0x000 },
-    { 0x0000002b, 0x00201e2d, 0x000 },
-    { 0x00000000, 0x003120a3, 0x000 },
-    { 0x00000000, 0x002d1d07, 0x000 },
-    { 0x0000002b, 0x00203627, 0x000 },
-    { 0x0000002c, 0x00201e2d, 0x000 },
-    { 0x00000000, 0x003120c4, 0x000 },
-    { 0x00000000, 0x002d1d07, 0x000 },
-    { 0x0000002c, 0x00803627, 0x000 },
-    { 0x00000029, 0x00203623, 0x000 },
-    { 0x0000002a, 0x00203624, 0x000 },
-    { 0x00000000, 0x00311ca3, 0x000 },
-    { 0x0000002b, 0x00203627, 0x000 },
-    { 0x00000000, 0x00311cc4, 0x000 },
-    { 0x0000002c, 0x00803627, 0x000 },
-    { 0x00000022, 0x00203627, 0x000 },
-    { 0x00000023, 0x00203628, 0x000 },
-    { 0x0000001d, 0x00201e2d, 0x000 },
-    { 0x00000002, 0x00210227, 0x000 },
-    { 0x00000000, 0x14c00000, 0x2c5 },
-    { 0x00000000, 0x00400000, 0x2c2 },
-    { 0x00000022, 0x00203627, 0x000 },
-    { 0x00000023, 0x00203628, 0x000 },
-    { 0x0000001d, 0x00201e2d, 0x000 },
-    { 0x00000002, 0x00210227, 0x000 },
-    { 0x00000000, 0x14e00000, 0x2c2 },
-    { 0x00000003, 0x00210227, 0x000 },
-    { 0x00000000, 0x14e00000, 0x2c5 },
-    { 0x0000002b, 0x00201e2d, 0x000 },
-    { 0x00000000, 0x002e00e1, 0x000 },
-    { 0x00000000, 0x02c00000, 0x2c5 },
-    { 0x00000029, 0x00201e2d, 0x000 },
-    { 0x00000000, 0x003120a1, 0x000 },
-    { 0x00000000, 0x002e00e8, 0x000 },
-    { 0x00000000, 0x06c00000, 0x2c5 },
-    { 0x0000002c, 0x00201e2d, 0x000 },
-    { 0x00000000, 0x002e00e2, 0x000 },
-    { 0x00000000, 0x02c00000, 0x2c5 },
-    { 0x0000002a, 0x00201e2d, 0x000 },
-    { 0x00000000, 0x003120c2, 0x000 },
-    { 0x00000000, 0x002e00e8, 0x000 },
-    { 0x00000000, 0x06c00000, 0x2c5 },
-    { 0x00000000, 0x00600000, 0x5ed },
-    { 0x00000000, 0x00600000, 0x29e },
-    { 0x00000000, 0x00400000, 0x2c7 },
-    { 0x00000000, 0x00600000, 0x29e },
-    { 0x00000000, 0x00600000, 0x5e4 },
-    { 0x00000000, 0x00400000, 0x2c7 },
-    { 0x00000000, 0x00600000, 0x290 },
-    { 0x00000000, 0x00400000, 0x2c7 },
-    { 0x00000022, 0x00201e2d, 0x000 },
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-    { 0x0000ffff, 0x00282228, 0x000 },
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-    { 0x00000010, 0x00221e23, 0x000 },
-    { 0x00000000, 0x00294887, 0x000 },
-    { 0x00000001, 0x00220a21, 0x000 },
-    { 0x00000000, 0x003308a2, 0x000 },
-    { 0x00000010, 0x00221e22, 0x000 },
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-    { 0x00000000, 0x00294887, 0x000 },
-    { 0x00000001, 0x00220a21, 0x000 },
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-    { 0x00000000, 0x00294907, 0x000 },
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-    { 0x00000001, 0x00220a22, 0x000 },
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-    { 0x00000000, 0xc0204800, 0x000 },
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-    { 0x00000000, 0xc0200800, 0x000 },
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-    { 0x00000000, 0x0ce00000, 0x000 },
-    { 0x00000000, 0x40204800, 0x000 },
-    { 0x00000001, 0x40304a20, 0x000 },
-    { 0x00000002, 0xc0304a20, 0x000 },
-    { 0x00000001, 0x00530a22, 0x334 },
-    { 0x0000003f, 0xc0280a20, 0x000 },
-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x00000001, 0x00204811, 0x000 },
-    { 0x000021f8, 0x00204411, 0x000 },
-    { 0x00000017, 0x00204811, 0x000 },
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-    { 0x00000049, 0x00201811, 0x000 },
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-    { 0x00000001, 0x00331a26, 0x000 },
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-    { 0x00000000, 0x0cc00000, 0x360 },
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-    { 0x00000001, 0x00204811, 0x000 },
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-    { 0x00000000, 0x14e00000, 0x3b9 },
-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x00000001, 0x00204811, 0x000 },
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-    { 0x00000001, 0x00204811, 0x000 },
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-    { 0x00000000, 0x0ce00000, 0x46d },
-    { 0x00000000, 0x00400000, 0x47a },
-    { 0x00000004, 0x002f0222, 0x000 },
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-    { 0x00000000, 0x00400000, 0x47a },
-    { 0x00000005, 0x002f0222, 0x000 },
-    { 0x00000000, 0x0ae00000, 0x468 },
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-    { 0x00000000, 0x06e00000, 0x46d },
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-    { 0x00000006, 0x002f0222, 0x000 },
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-    { 0x00000000, 0x002f00c9, 0x000 },
-    { 0x00000000, 0x08e00000, 0x46d },
-    { 0x00000000, 0x00400000, 0x47a },
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-    { 0x00000000, 0x0ae00000, 0x000 },
-    { 0x00000008, 0x00210a23, 0x000 },
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-    { 0x00002169, 0x00204411, 0x000 },
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-    { 0x00000000, 0xc0204800, 0x000 },
-    { 0x00000000, 0xc0204800, 0x000 },
-    { 0xcafebabe, 0x00404811, 0x000 },
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-    { 0x00000000, 0xc0200000, 0x000 },
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-    { 0x00000000, 0x0ae00000, 0x480 },
-    { 0x00000000, 0xc0200000, 0x000 },
-    { 0x00000000, 0xc0200000, 0x000 },
-    { 0x00000000, 0xc0400000, 0x000 },
-    { 0x00000000, 0x00404c08, 0x43c },
-    { 0x00000000, 0xc0200800, 0x000 },
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-    { 0x00000011, 0x40211220, 0x000 },
-    { 0x00000012, 0x40211620, 0x000 },
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-    { 0x00000000, 0x00204802, 0x000 },
-    { 0x00000000, 0x00210225, 0x000 },
-    { 0x00000000, 0x14e00000, 0x48a },
-    { 0x00040000, 0xc0494a20, 0x48b },
-    { 0xfffbffff, 0xc0284a20, 0x000 },
-    { 0x00000000, 0x00210223, 0x000 },
-    { 0x00000000, 0x14e00000, 0x497 },
-    { 0x00000000, 0xc0204800, 0x000 },
-    { 0x00000000, 0xc0204800, 0x000 },
-    { 0x00000000, 0x00210224, 0x000 },
-    { 0x00000000, 0x14c00000, 0x000 },
-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x0000000c, 0x00204811, 0x000 },
-    { 0x00000000, 0x00200010, 0x000 },
-    { 0x00000000, 0x14c00000, 0x493 },
-    { 0xa0000000, 0x00204411, 0x000 },
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-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x00000004, 0x00204811, 0x000 },
-    { 0x0000216b, 0x00204411, 0x000 },
-    { 0x00000000, 0xc0204810, 0x000 },
-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x00000005, 0x00204811, 0x000 },
-    { 0x0000216c, 0x00204411, 0x000 },
-    { 0x00000000, 0xc0204810, 0x000 },
-    { 0x00000000, 0x002f0224, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x000 },
-    { 0x00000000, 0x00400000, 0x491 },
-    { 0x00000000, 0xc0210a20, 0x000 },
-    { 0x00000000, 0x14c00000, 0x4ae },
-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x0000216d, 0x00204411, 0x000 },
-    { 0x00000000, 0xc0204800, 0x000 },
-    { 0x00000000, 0xc0204800, 0x000 },
-    { 0x00000000, 0x1ac00000, 0x4a9 },
-    { 0x9e000000, 0x00204411, 0x000 },
-    { 0xcafebabe, 0x00204811, 0x000 },
-    { 0x00000000, 0x1ae00000, 0x4ac },
-    { 0x00000000, 0x00400000, 0x4b2 },
-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x00000001, 0x00204811, 0x000 },
-    { 0x00040000, 0xc0294620, 0x000 },
-    { 0x00000000, 0xc0600000, 0x614 },
-    { 0x00000001, 0x00210222, 0x000 },
-    { 0x00000000, 0x14c00000, 0x4b9 },
-    { 0x00002169, 0x00204411, 0x000 },
-    { 0x00000000, 0xc0204800, 0x000 },
-    { 0x00000000, 0xc0204800, 0x000 },
-    { 0x00000000, 0x00204810, 0x000 },
-    { 0xcafebabe, 0x00404811, 0x000 },
-    { 0x00000000, 0xc0204400, 0x000 },
-    { 0x00000000, 0xc0404810, 0x000 },
-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x00000001, 0x00204811, 0x000 },
-    { 0x000021f8, 0x00204411, 0x000 },
-    { 0x0000000d, 0x00204811, 0x000 },
-    { 0x000421f9, 0x00604411, 0x614 },
-    { 0x00000000, 0x00210230, 0x000 },
-    { 0x00000000, 0x14c00000, 0x4bb },
-    { 0x00002180, 0x00204411, 0x000 },
-    { 0x00000000, 0xc0204800, 0x000 },
-    { 0x00000000, 0xc0200000, 0x000 },
-    { 0x00000000, 0xc0204800, 0x000 },
-    { 0x00000000, 0xc0200000, 0x000 },
-    { 0x00000000, 0xc0404800, 0x000 },
-    { 0x00000003, 0x00333e2f, 0x000 },
-    { 0x00000001, 0x00210221, 0x000 },
-    { 0x00000000, 0x14e00000, 0x4eb },
-    { 0x00000035, 0x00200a2d, 0x000 },
-    { 0x00040000, 0x18e00c11, 0x4da },
-    { 0x00000001, 0x00333e2f, 0x000 },
-    { 0x00002169, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204802, 0x000 },
-    { 0x00000000, 0x00204803, 0x000 },
-    { 0x00000008, 0x00300a22, 0x000 },
-    { 0x00000000, 0xc0204800, 0x000 },
-    { 0x00000000, 0xc0204800, 0x000 },
-    { 0x00002169, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204802, 0x000 },
-    { 0x00000000, 0x00204803, 0x000 },
-    { 0x00000008, 0x00300a22, 0x000 },
-    { 0x00000000, 0xc0204800, 0x000 },
-    { 0x00000000, 0xd8c04800, 0x4ce },
-    { 0x00002169, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204802, 0x000 },
-    { 0x00000000, 0x00204803, 0x000 },
-    { 0x00000008, 0x00300a22, 0x000 },
-    { 0x00000000, 0xc0204800, 0x000 },
-    { 0x00000000, 0xc0204800, 0x000 },
-    { 0x00000036, 0x0020122d, 0x000 },
-    { 0x00000000, 0x00290c83, 0x000 },
-    { 0x00002169, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204802, 0x000 },
-    { 0x00000000, 0x00204803, 0x000 },
-    { 0x00000008, 0x00300a22, 0x000 },
-    { 0x00000000, 0xc0204800, 0x000 },
-    { 0x00000000, 0xc0204800, 0x000 },
-    { 0x00000011, 0x00210224, 0x000 },
-    { 0x00000000, 0x14c00000, 0x000 },
-    { 0x00000000, 0x00400000, 0x491 },
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-    { 0x00000036, 0xc0403620, 0x000 },
-    { 0x0000304a, 0x00204411, 0x000 },
-    { 0xe0000000, 0xc0484a20, 0x000 },
-    { 0x0000000f, 0x00210221, 0x000 },
-    { 0x00000000, 0x14c00000, 0x4f2 },
-    { 0x00000000, 0x00600000, 0x00b },
-    { 0x00000000, 0xd9000000, 0x000 },
-    { 0x00000000, 0xc0400400, 0x001 },
-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x00000002, 0x00204811, 0x000 },
-    { 0x000000ff, 0x00280e30, 0x000 },
-    { 0x00000000, 0x002f0223, 0x000 },
-    { 0x00000000, 0x0cc00000, 0x4f6 },
-    { 0x00000000, 0xc0200800, 0x000 },
-    { 0x00000000, 0x14c00000, 0x50b },
-    { 0x00000000, 0x00200c11, 0x000 },
-    { 0x00000024, 0x00203623, 0x000 },
-    { 0x00000034, 0x00203623, 0x000 },
-    { 0x00000032, 0x00203623, 0x000 },
-    { 0x00000031, 0x00203623, 0x000 },
-    { 0x0000001d, 0x00203623, 0x000 },
-    { 0x0000002d, 0x00203623, 0x000 },
-    { 0x0000002e, 0x00203623, 0x000 },
-    { 0x0000001b, 0x00203623, 0x000 },
-    { 0x0000001c, 0x00203623, 0x000 },
-    { 0xffffe000, 0x00200c11, 0x000 },
-    { 0x00000029, 0x00203623, 0x000 },
-    { 0x0000002a, 0x00203623, 0x000 },
-    { 0x00001fff, 0x00200c11, 0x000 },
-    { 0x0000002b, 0x00203623, 0x000 },
-    { 0x0000002c, 0x00203623, 0x000 },
-    { 0xf1ffffff, 0x00283a2e, 0x000 },
-    { 0x0000001a, 0xc0220e20, 0x000 },
-    { 0x00000000, 0x0029386e, 0x000 },
-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x00000006, 0x00204811, 0x000 },
-    { 0x00000033, 0x40203620, 0x000 },
-    { 0x87000000, 0x00204411, 0x000 },
-    { 0x00000000, 0xc0204800, 0x000 },
-    { 0x0000a1f4, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204810, 0x000 },
-    { 0x9d000000, 0x00204411, 0x000 },
-    { 0x0000001f, 0x40214a20, 0x000 },
-    { 0x96000000, 0x00204411, 0x000 },
-    { 0x00000000, 0xc0204800, 0x000 },
-    { 0x00000000, 0xc0200c00, 0x000 },
-    { 0x00000000, 0xc0201000, 0x000 },
-    { 0x0000001f, 0x00211624, 0x000 },
-    { 0x00000000, 0x14c00000, 0x000 },
-    { 0x00000025, 0x00203623, 0x000 },
-    { 0x00000003, 0x00281e23, 0x000 },
-    { 0x00000008, 0x00222223, 0x000 },
-    { 0xfffff000, 0x00282228, 0x000 },
-    { 0x00000000, 0x002920e8, 0x000 },
-    { 0x00000027, 0x00203628, 0x000 },
-    { 0x00000018, 0x00211e23, 0x000 },
-    { 0x00000028, 0x00203627, 0x000 },
-    { 0x00000002, 0x00221624, 0x000 },
-    { 0x00000000, 0x003014a8, 0x000 },
-    { 0x00000026, 0x00203625, 0x000 },
-    { 0x00000003, 0x00211a24, 0x000 },
-    { 0x10000000, 0x00281a26, 0x000 },
-    { 0xefffffff, 0x00283a2e, 0x000 },
-    { 0x00000000, 0x004938ce, 0x602 },
-    { 0x00000001, 0x40280a20, 0x000 },
-    { 0x00000006, 0x40280e20, 0x000 },
-    { 0x00000300, 0xc0281220, 0x000 },
-    { 0x00000008, 0x00211224, 0x000 },
-    { 0x00000000, 0xc0201620, 0x000 },
-    { 0x00000000, 0xc0201a20, 0x000 },
-    { 0x00000000, 0x00210222, 0x000 },
-    { 0x00000000, 0x14c00000, 0x541 },
-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x00000001, 0x00204811, 0x000 },
-    { 0x00002258, 0x00300a24, 0x000 },
-    { 0x00040000, 0x00694622, 0x614 },
-    { 0x00002169, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204805, 0x000 },
-    { 0x00020000, 0x00294a26, 0x000 },
-    { 0x00000000, 0x00204810, 0x000 },
-    { 0xcafebabe, 0x00204811, 0x000 },
-    { 0x00000002, 0x002f0223, 0x000 },
-    { 0x00000000, 0x0cc00000, 0x549 },
-    { 0x00000000, 0xc0201c10, 0x000 },
-    { 0x00000000, 0xc0400000, 0x55b },
-    { 0x00000002, 0x002f0223, 0x000 },
-    { 0x00000000, 0x0cc00000, 0x549 },
-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x00000001, 0x00204811, 0x000 },
-    { 0x00002258, 0x00300a24, 0x000 },
-    { 0x00040000, 0x00694622, 0x614 },
-    { 0x00000000, 0xc0201c10, 0x000 },
-    { 0x00000000, 0xc0400000, 0x55b },
-    { 0x00000000, 0x002f0223, 0x000 },
-    { 0x00000000, 0x0cc00000, 0x54d },
-    { 0x00000000, 0xc0201c00, 0x000 },
-    { 0x00000000, 0xc0400000, 0x55b },
-    { 0x00000004, 0x002f0223, 0x000 },
-    { 0x00000000, 0x0cc00000, 0x559 },
-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x0000216d, 0x00204411, 0x000 },
-    { 0x00000000, 0xc0204800, 0x000 },
-    { 0x00000000, 0xc0204800, 0x000 },
-    { 0x00000000, 0x1ac00000, 0x554 },
-    { 0x9e000000, 0x00204411, 0x000 },
-    { 0xcafebabe, 0x00204811, 0x000 },
-    { 0x00000000, 0x1ae00000, 0x557 },
-    { 0x00000000, 0x00401c10, 0x55b },
-    { 0x00000000, 0xc0200000, 0x000 },
-    { 0x00000000, 0xc0400000, 0x000 },
-    { 0x00000000, 0x0ee00000, 0x55d },
-    { 0x00000000, 0x00600000, 0x5a4 },
-    { 0x00000000, 0x002f0224, 0x000 },
-    { 0x00000000, 0x0cc00000, 0x56d },
-    { 0x0000a2b7, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204807, 0x000 },
-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x00000001, 0x00204811, 0x000 },
-    { 0x0004a2b6, 0x00604411, 0x614 },
-    { 0x0000001a, 0x00212230, 0x000 },
-    { 0x00000006, 0x00222630, 0x000 },
-    { 0x0000a2c4, 0x00204411, 0x000 },
-    { 0x00000000, 0x003048e9, 0x000 },
-    { 0x00000000, 0x00e00000, 0x56b },
-    { 0x0000a2d1, 0x00204411, 0x000 },
-    { 0x00000000, 0x00404808, 0x000 },
-    { 0x0000a2d1, 0x00204411, 0x000 },
-    { 0x00000001, 0x00504a28, 0x000 },
-    { 0x00000001, 0x002f0224, 0x000 },
-    { 0x00000000, 0x0cc00000, 0x57d },
-    { 0x0000a2bb, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204807, 0x000 },
-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x00000001, 0x00204811, 0x000 },
-    { 0x0004a2ba, 0x00604411, 0x614 },
-    { 0x0000001a, 0x00212230, 0x000 },
-    { 0x00000006, 0x00222630, 0x000 },
-    { 0x0000a2c5, 0x00204411, 0x000 },
-    { 0x00000000, 0x003048e9, 0x000 },
-    { 0x00000000, 0x00e00000, 0x57b },
-    { 0x0000a2d2, 0x00204411, 0x000 },
-    { 0x00000000, 0x00404808, 0x000 },
-    { 0x0000a2d2, 0x00204411, 0x000 },
-    { 0x00000001, 0x00504a28, 0x000 },
-    { 0x00000002, 0x002f0224, 0x000 },
-    { 0x00000000, 0x0cc00000, 0x58d },
-    { 0x0000a2bf, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204807, 0x000 },
-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x00000001, 0x00204811, 0x000 },
-    { 0x0004a2be, 0x00604411, 0x614 },
-    { 0x0000001a, 0x00212230, 0x000 },
-    { 0x00000006, 0x00222630, 0x000 },
-    { 0x0000a2c6, 0x00204411, 0x000 },
-    { 0x00000000, 0x003048e9, 0x000 },
-    { 0x00000000, 0x00e00000, 0x58b },
-    { 0x0000a2d3, 0x00204411, 0x000 },
-    { 0x00000000, 0x00404808, 0x000 },
-    { 0x0000a2d3, 0x00204411, 0x000 },
-    { 0x00000001, 0x00504a28, 0x000 },
-    { 0x0000a2c3, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204807, 0x000 },
-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x00000001, 0x00204811, 0x000 },
-    { 0x0004a2c2, 0x00604411, 0x614 },
-    { 0x0000001a, 0x00212230, 0x000 },
-    { 0x00000006, 0x00222630, 0x000 },
-    { 0x0000a2c7, 0x00204411, 0x000 },
-    { 0x00000000, 0x003048e9, 0x000 },
-    { 0x00000000, 0x00e00000, 0x599 },
-    { 0x0000a2d4, 0x00204411, 0x000 },
-    { 0x00000000, 0x00404808, 0x000 },
-    { 0x0000a2d4, 0x00204411, 0x000 },
-    { 0x00000001, 0x00504a28, 0x000 },
-    { 0x85000000, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204801, 0x000 },
-    { 0x0000304a, 0x00204411, 0x000 },
-    { 0x01000000, 0x00204811, 0x000 },
-    { 0x00000000, 0x00400000, 0x59f },
-    { 0xa4000000, 0xc0204411, 0x000 },
-    { 0x00000000, 0xc0404800, 0x000 },
-    { 0x00000000, 0xc0600000, 0x5a4 },
-    { 0x00000000, 0xc0400400, 0x001 },
-    { 0x0001a2a4, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x00000005, 0x00204811, 0x000 },
-    { 0x0000a1f4, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x88000000, 0x00204411, 0x000 },
-    { 0x00000001, 0x00204811, 0x000 },
-    { 0xff000000, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x00000001, 0x00204811, 0x000 },
-    { 0x00000002, 0x00804811, 0x000 },
-    { 0x00000000, 0x0ee00000, 0x5b7 },
-    { 0x00001000, 0x00200811, 0x000 },
-    { 0x00000034, 0x00203622, 0x000 },
-    { 0x00000000, 0x00600000, 0x5bb },
-    { 0x00000000, 0x00600000, 0x5a4 },
-    { 0x98000000, 0x00204411, 0x000 },
-    { 0x00000000, 0x00804811, 0x000 },
-    { 0x00000000, 0xc0600000, 0x5bb },
-    { 0x00000000, 0xc0400400, 0x001 },
-    { 0x0000a2a4, 0x00204411, 0x000 },
-    { 0x00000022, 0x00204811, 0x000 },
-    { 0x89000000, 0x00204411, 0x000 },
-    { 0x00000001, 0x00204811, 0x000 },
-    { 0xff000000, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x00000001, 0x00204811, 0x000 },
-    { 0x00000002, 0x00804811, 0x000 },
-    { 0x0000217a, 0xc0204411, 0x000 },
-    { 0x00000000, 0x00404811, 0x000 },
-    { 0x97000000, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x8a000000, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0xff000000, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x00000001, 0x00204811, 0x000 },
-    { 0x00000002, 0x00804811, 0x000 },
-    { 0x00000000, 0x00600000, 0x5e1 },
-    { 0x00002010, 0x00204411, 0x000 },
-    { 0x00008000, 0x00204811, 0x000 },
-    { 0x0001a2a4, 0xc0204411, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x00000016, 0x00604811, 0x35e },
-    { 0x00000016, 0x00204811, 0x000 },
-    { 0x00002010, 0x00204411, 0x000 },
-    { 0x00010000, 0x00204811, 0x000 },
-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x00000001, 0x00204811, 0x000 },
-    { 0x0000217c, 0x00204411, 0x000 },
-    { 0x09800000, 0x00204811, 0x000 },
-    { 0xffffffff, 0x00204811, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x00000000, 0x17000000, 0x000 },
-    { 0x0004217f, 0x00604411, 0x614 },
-    { 0x0000001f, 0x00210230, 0x000 },
-    { 0x00000000, 0x14c00000, 0x000 },
-    { 0x00000004, 0x00404c11, 0x5dc },
-    { 0x0000001d, 0x00201e2d, 0x000 },
-    { 0x00000004, 0x00291e27, 0x000 },
-    { 0x0000001d, 0x00803627, 0x000 },
-    { 0x0000001d, 0x00201e2d, 0x000 },
-    { 0xfffffffb, 0x00281e27, 0x000 },
-    { 0x0000001d, 0x00803627, 0x000 },
-    { 0x0000001d, 0x00201e2d, 0x000 },
-    { 0x00000008, 0x00291e27, 0x000 },
-    { 0x0000001d, 0x00803627, 0x000 },
-    { 0x0000001d, 0x00201e2d, 0x000 },
-    { 0xfffffff7, 0x00281e27, 0x000 },
-    { 0x0000001d, 0x00803627, 0x000 },
-    { 0x00002010, 0x00204411, 0x000 },
-    { 0x00008000, 0x00204811, 0x000 },
-    { 0x0001a2a4, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x00000016, 0x00604811, 0x35e },
-    { 0x00000016, 0x00204811, 0x000 },
-    { 0x00002010, 0x00204411, 0x000 },
-    { 0x00010000, 0x00204811, 0x000 },
-    { 0x0000217c, 0x00204411, 0x000 },
-    { 0x01800000, 0x00204811, 0x000 },
-    { 0x00ffffff, 0x00204811, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x00000000, 0x17000000, 0x000 },
-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x00000001, 0x00204811, 0x000 },
-    { 0x0004217f, 0x00604411, 0x614 },
-    { 0x00000000, 0x00200010, 0x000 },
-    { 0x00000000, 0x14c00000, 0x613 },
-    { 0x00000010, 0x00404c11, 0x5f9 },
-    { 0x00000000, 0xc0200400, 0x000 },
-    { 0x00000000, 0x38c00000, 0x000 },
-    { 0x00000025, 0x00200a2d, 0x000 },
-    { 0x00000026, 0x00200e2d, 0x000 },
-    { 0x00000027, 0x0020122d, 0x000 },
-    { 0x00000028, 0x0020162d, 0x000 },
-    { 0x00002169, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204804, 0x000 },
-    { 0x00000000, 0x00204805, 0x000 },
-    { 0x00000000, 0x00204801, 0x000 },
-    { 0xcafebabe, 0x00204811, 0x000 },
-    { 0x00000004, 0x00301224, 0x000 },
-    { 0x00000000, 0x002f0064, 0x000 },
-    { 0x00000000, 0x0cc00000, 0x612 },
-    { 0x00000003, 0x00281a22, 0x000 },
-    { 0x00000008, 0x00221222, 0x000 },
-    { 0xfffff000, 0x00281224, 0x000 },
-    { 0x00000000, 0x002910c4, 0x000 },
-    { 0x00000027, 0x00403624, 0x000 },
-    { 0x00000000, 0x00800000, 0x000 },
-    { 0x00000000, 0x1ac00000, 0x614 },
-    { 0x9f000000, 0x00204411, 0x000 },
-    { 0xcafebabe, 0x00204811, 0x000 },
-    { 0x00000000, 0x1ae00000, 0x617 },
-    { 0x00000000, 0x00800000, 0x000 },
-    { 0x00000000, 0x00600000, 0x00b },
-    { 0x00001000, 0x00600411, 0x2fe },
-    { 0x00000000, 0x00200411, 0x000 },
-    { 0x00000000, 0x00600811, 0x19f },
-    { 0x0000225c, 0x00204411, 0x000 },
-    { 0x00000003, 0x00204811, 0x000 },
-    { 0x00002256, 0x00204411, 0x000 },
-    { 0x0000001b, 0x00204811, 0x000 },
-    { 0x0000a1fc, 0x00204411, 0x000 },
-    { 0x00000001, 0x00204811, 0x000 },
-    { 0x0001a1fd, 0xc0204411, 0x000 },
-    { 0x00000029, 0x00201e2d, 0x000 },
-    { 0x00000010, 0x00221e27, 0x000 },
-    { 0x0000002c, 0x0020222d, 0x000 },
-    { 0x0000ffff, 0x00282228, 0x000 },
-    { 0x00000000, 0x00294907, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x0000002a, 0x0020222d, 0x000 },
-    { 0x0000ffff, 0x00282228, 0x000 },
-    { 0x00000000, 0x00294907, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x0000002b, 0x00201e2d, 0x000 },
-    { 0x00000010, 0x00221e27, 0x000 },
-    { 0x00000000, 0x00294907, 0x000 },
-    { 0x00000000, 0x00404811, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x013304ef, 0x059b0239, 0x000 },
-    { 0x01b00159, 0x0425059b, 0x000 },
-    { 0x021201f6, 0x02390142, 0x000 },
-    { 0x0210022e, 0x0289022a, 0x000 },
-    { 0x03c2059b, 0x059b059b, 0x000 },
-    { 0x05cd05ce, 0x0308059b, 0x000 },
-    { 0x059b05a0, 0x03090329, 0x000 },
-    { 0x0313026b, 0x032b031d, 0x000 },
-    { 0x059b059b, 0x059b059b, 0x000 },
-    { 0x059b052c, 0x059b059b, 0x000 },
-    { 0x03a5059b, 0x04a2032d, 0x000 },
-    { 0x04810433, 0x0423059b, 0x000 },
-    { 0x04bb04ed, 0x042704c8, 0x000 },
-    { 0x043304f4, 0x033a0365, 0x000 },
-    { 0x059b059b, 0x059b059b, 0x000 },
-    { 0x059b059b, 0x059b059b, 0x000 },
-    { 0x059b059b, 0x05b905a2, 0x000 },
-    { 0x059b059b, 0x0007059b, 0x000 },
-    { 0x059b059b, 0x059b059b, 0x000 },
-    { 0x059b059b, 0x059b059b, 0x000 },
-    { 0x03e303d8, 0x03f303f1, 0x000 },
-    { 0x03f903f5, 0x03f703fb, 0x000 },
-    { 0x04070403, 0x040f040b, 0x000 },
-    { 0x04170413, 0x041f041b, 0x000 },
-    { 0x059b059b, 0x059b059b, 0x000 },
-    { 0x059b059b, 0x059b059b, 0x000 },
-    { 0x059b059b, 0x059b059b, 0x000 },
-    { 0x00020600, 0x06190006, 0x000 },
-};
-static const u32 R600_pfp_microcode[] = {
-0xd40071,
-0xd40072,
-0xca0400,
-0xa00000,
-0x7e828b,
-0x800003,
-0xca0400,
-0xd4401e,
-0xee001e,
-0xca0400,
-0xa00000,
-0x7e828b,
-0xc41838,
-0xca2400,
-0xca2800,
-0x9581a8,
-0xc41c3a,
-0xc3c000,
-0xca0800,
-0xca0c00,
-0x7c744b,
-0xc20005,
-0x99c000,
-0xc41c3a,
-0x7c744c,
-0xc0fff0,
-0x042c04,
-0x309002,
-0x7d2500,
-0x351402,
-0x7d350b,
-0x255403,
-0x7cd580,
-0x259c03,
-0x95c004,
-0xd5001b,
-0x7eddc1,
-0x7d9d80,
-0xd6801b,
-0xd5801b,
-0xd4401e,
-0xd5401e,
-0xd6401e,
-0xd6801e,
-0xd4801e,
-0xd4c01e,
-0x9783d4,
-0xd5c01e,
-0xca0800,
-0x80001b,
-0xca0c00,
-0xe4011e,
-0xd4001e,
-0x80000d,
-0xc41838,
-0xe4013e,
-0xd4001e,
-0x80000d,
-0xc41838,
-0xd4401e,
-0xee001e,
-0xca0400,
-0xa00000,
-0x7e828b,
-0xe4011e,
-0xd4001e,
-0xd4401e,
-0xee001e,
-0xca0400,
-0xa00000,
-0x7e828b,
-0xe4013e,
-0xd4001e,
-0xd4401e,
-0xee001e,
-0xca0400,
-0xa00000,
-0x7e828b,
-0xca1800,
-0xd4401e,
-0xd5801e,
-0x800054,
-0xd40073,
-0xd4401e,
-0xca0800,
-0xca0c00,
-0xca1000,
-0xd48019,
-0xd4c018,
-0xd50017,
-0xd4801e,
-0xd4c01e,
-0xd5001e,
-0xe2001e,
-0xca0400,
-0xa00000,
-0x7e828b,
-0xca0800,
-0xd48060,
-0xd4401e,
-0x800002,
-0xd4801e,
-0xca0800,
-0xd48061,
-0xd4401e,
-0x800002,
-0xd4801e,
-0xca0800,
-0xca0c00,
-0xd4401e,
-0xd48016,
-0xd4c016,
-0xd4801e,
-0x8001b9,
-0xd4c01e,
-0xc6083e,
-0xca0c00,
-0xca1000,
-0x948004,
-0xca1400,
-0xe420f3,
-0xd42013,
-0xd56065,
-0xd4e01c,
-0xd5201c,
-0xd5601c,
-0x800002,
-0x062001,
-0xc6083e,
-0xca0c00,
-0xca1000,
-0x9483f7,
-0xca1400,
-0xe420f3,
-0x80007a,
-0xd42013,
-0xc6083e,
-0xca0c00,
-0xca1000,
-0x9883ef,
-0xca1400,
-0xd40064,
-0x80008e,
-0x000000,
-0xc41432,
-0xc6183e,
-0xc4082f,
-0x954005,
-0xc40c30,
-0xd4401e,
-0x800002,
-0xee001e,
-0x9583f5,
-0xc41031,
-0xd44033,
-0xd52065,
-0xd4a01c,
-0xd4e01c,
-0xd5201c,
-0xd40073,
-0xe4015e,
-0xd4001e,
-0x8001b9,
-0x062001,
-0x0a2001,
-0xd60074,
-0xc40836,
-0xc61040,
-0x988007,
-0xcc3835,
-0x95010f,
-0xd4001f,
-0xd46062,
-0x800002,
-0xd42062,
-0xcc1433,
-0x8401bc,
-0xd40070,
-0xd5401e,
-0x800002,
-0xee001e,
-0xca0c00,
-0xca1000,
-0xd4c01a,
-0x8401bc,
-0xd5001a,
-0xcc0443,
-0x35101f,
-0x2c9401,
-0x7d098b,
-0x984005,
-0x7d15cb,
-0xd4001a,
-0x8001b9,
-0xd4006d,
-0x344401,
-0xcc0c44,
-0x98403a,
-0xcc2c46,
-0x958004,
-0xcc0445,
-0x8001b9,
-0xd4001a,
-0xd4c01a,
-0x282801,
-0x8400f3,
-0xcc1003,
-0x98801b,
-0x04380c,
-0x8400f3,
-0xcc1003,
-0x988017,
-0x043808,
-0x8400f3,
-0xcc1003,
-0x988013,
-0x043804,
-0x8400f3,
-0xcc1003,
-0x988014,
-0xcc1047,
-0x9a8009,
-0xcc1448,
-0x9840da,
-0xd4006d,
-0xcc1844,
-0xd5001a,
-0xd5401a,
-0x8000cc,
-0xd5801a,
-0x96c0d3,
-0xd4006d,
-0x8001b9,
-0xd4006e,
-0x9ac003,
-0xd4006d,
-0xd4006e,
-0x800002,
-0xec007f,
-0x9ac0ca,
-0xd4006d,
-0x8001b9,
-0xd4006e,
-0xcc1403,
-0xcc1803,
-0xcc1c03,
-0x7d9103,
-0x7dd583,
-0x7d190c,
-0x35cc1f,
-0x35701f,
-0x7cf0cb,
-0x7cd08b,
-0x880000,
-0x7e8e8b,
-0x95c004,
-0xd4006e,
-0x8001b9,
-0xd4001a,
-0xd4c01a,
-0xcc0803,
-0xcc0c03,
-0xcc1003,
-0xcc1403,
-0xcc1803,
-0xcc1c03,
-0xcc2403,
-0xcc2803,
-0x35c41f,
-0x36b01f,
-0x7c704b,
-0x34f01f,
-0x7c704b,
-0x35701f,
-0x7c704b,
-0x7d8881,
-0x7dccc1,
-0x7e5101,
-0x7e9541,
-0x7c9082,
-0x7cd4c2,
-0x7c848b,
-0x9ac003,
-0x7c8c8b,
-0x2c8801,
-0x98809c,
-0xd4006d,
-0x98409a,
-0xd4006e,
-0xcc0847,
-0xcc0c48,
-0xcc1044,
-0xd4801a,
-0xd4c01a,
-0x800104,
-0xd5001a,
-0xcc0832,
-0xd40032,
-0x9482d8,
-0xca0c00,
-0xd4401e,
-0x800002,
-0xd4001e,
-0xe4011e,
-0xd4001e,
-0xca0800,
-0xca0c00,
-0xca1000,
-0xd4401e,
-0xca1400,
-0xd4801e,
-0xd4c01e,
-0xd5001e,
-0xd5401e,
-0xd54034,
-0x800002,
-0xee001e,
-0x280404,
-0xe2001a,
-0xe2001a,
-0xd4401a,
-0xca3800,
-0xcc0803,
-0xcc0c03,
-0xcc0c03,
-0xcc0c03,
-0x9882bc,
-0x000000,
-0x8401bc,
-0xd7806f,
-0x800002,
-0xee001f,
-0xca0400,
-0xc2ff00,
-0xcc0834,
-0xc13fff,
-0x7c74cb,
-0x7cc90b,
-0x7d010f,
-0x9902af,
-0x7c738b,
-0x8401bc,
-0xd7806f,
-0x800002,
-0xee001f,
-0xca0800,
-0x281900,
-0x7d898b,
-0x958014,
-0x281404,
-0xca0c00,
-0xca1000,
-0xca1c00,
-0xca2400,
-0xe2001f,
-0xd4c01a,
-0xd5001a,
-0xd5401a,
-0xcc1803,
-0xcc2c03,
-0xcc2c03,
-0xcc2c03,
-0x7da58b,
-0x7d9c47,
-0x984296,
-0x000000,
-0x800164,
-0xd4c01a,
-0xd4401e,
-0xd4801e,
-0x800002,
-0xee001e,
-0xe4011e,
-0xd4001e,
-0xd4401e,
-0xee001e,
-0xca0400,
-0xa00000,
-0x7e828b,
-0xe4013e,
-0xd4001e,
-0xd4401e,
-0xee001e,
-0xca0400,
-0xa00000,
-0x7e828b,
-0xca0800,
-0x248c06,
-0x0ccc06,
-0x98c006,
-0xcc1049,
-0x990004,
-0xd40071,
-0xe4011e,
-0xd4001e,
-0xd4401e,
-0xd4801e,
-0x800002,
-0xee001e,
-0xca0800,
-0xca0c00,
-0x34d018,
-0x251001,
-0x95001f,
-0xc17fff,
-0xca1000,
-0xca1400,
-0xca1800,
-0xd4801d,
-0xd4c01d,
-0x7db18b,
-0xc14202,
-0xc2c001,
-0xd5801d,
-0x34dc0e,
-0x7d5d4c,
-0x7f734c,
-0xd7401e,
-0xd5001e,
-0xd5401e,
-0xc14200,
-0xc2c000,
-0x099c01,
-0x31dc10,
-0x7f5f4c,
-0x7f734c,
-0x7d8380,
-0xd5806f,
-0xd58066,
-0xd7401e,
-0xec005e,
-0xc82402,
-0x8001b9,
-0xd60074,
-0xd4401e,
-0xd4801e,
-0xd4c01e,
-0x800002,
-0xee001e,
-0x800002,
-0xee001f,
-0xd4001f,
-0x800002,
-0xd4001f,
-0xd4001f,
-0x880000,
-0xd4001f,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x010174,
-0x02017b,
-0x030090,
-0x040080,
-0x050005,
-0x060040,
-0x070033,
-0x08012f,
-0x090047,
-0x0a0037,
-0x1001b7,
-0x1700a4,
-0x22013d,
-0x23014c,
-0x2000b5,
-0x240128,
-0x27004e,
-0x28006b,
-0x2a0061,
-0x2b0053,
-0x2f0066,
-0x320088,
-0x340182,
-0x3c0159,
-0x3f0073,
-0x41018f,
-0x440131,
-0x550176,
-0x56017d,
-0x60000c,
-0x610035,
-0x620039,
-0x630039,
-0x640039,
-0x650039,
-0x660039,
-0x670039,
-0x68003b,
-0x690042,
-0x6a0049,
-0x6b0049,
-0x6c0049,
-0x6d0049,
-0x6e0049,
-0x6f0049,
-0x7301b7,
-0x000007,
-0x000007,
-0x000007,
-0x000007,
-0x000007,
-0x000007,
-0x000007,
-0x000007,
-0x000007,
-0x000007,
-0x000007,
-0x000007,
-0x000007,
-0x000007,
-0x000007,
-0x000007,
-0x000007,
-0x000007,
-};
-static const u32 RV610_cp_microcode[][3] = {
-    { 0x00000000, 0xc0200400, 0x000 },
-    { 0x00000000, 0x00a0000a, 0x000 },
-    { 0x0000ffff, 0x00284621, 0x000 },
-    { 0x00000000, 0xd9004800, 0x000 },
-    { 0x00000000, 0xc0200400, 0x000 },
-    { 0x00000000, 0x00a0000a, 0x000 },
-    { 0x00000000, 0x00e00000, 0x000 },
-    { 0x00010000, 0xc0294620, 0x000 },
-    { 0x00000000, 0xd9004800, 0x000 },
-    { 0x00000000, 0xc0200400, 0x000 },
-    { 0x00000000, 0x00a0000a, 0x000 },
-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x00000001, 0x00204811, 0x000 },
-    { 0x00042004, 0x00604411, 0x68d },
-    { 0x00000000, 0x00600000, 0x631 },
-    { 0x00000000, 0x00600000, 0x645 },
-    { 0x00000000, 0xc0200800, 0x000 },
-    { 0x00000f00, 0x00281622, 0x000 },
-    { 0x00000008, 0x00211625, 0x000 },
-    { 0x00000018, 0x00203625, 0x000 },
-    { 0x8d000000, 0x00204411, 0x000 },
-    { 0x00000004, 0x002f0225, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x018 },
-    { 0x00412000, 0x00404811, 0x019 },
-    { 0x00422000, 0x00204811, 0x000 },
-    { 0x8e000000, 0x00204411, 0x000 },
-    { 0x00000028, 0x00204a2d, 0x000 },
-    { 0x90000000, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204805, 0x000 },
-    { 0x0000000c, 0x00211622, 0x000 },
-    { 0x00000003, 0x00281625, 0x000 },
-    { 0x00000019, 0x00211a22, 0x000 },
-    { 0x00000004, 0x00281a26, 0x000 },
-    { 0x00000000, 0x002914c5, 0x000 },
-    { 0x00000019, 0x00203625, 0x000 },
-    { 0x00000000, 0x003a1402, 0x000 },
-    { 0x00000016, 0x00211625, 0x000 },
-    { 0x00000003, 0x00281625, 0x000 },
-    { 0x00000017, 0x00200e2d, 0x000 },
-    { 0xfffffffc, 0x00280e23, 0x000 },
-    { 0x00000000, 0x002914a3, 0x000 },
-    { 0x00000017, 0x00203625, 0x000 },
-    { 0x00008000, 0x00280e22, 0x000 },
-    { 0x00000007, 0x00220e23, 0x000 },
-    { 0x00000000, 0x0029386e, 0x000 },
-    { 0x20000000, 0x00280e22, 0x000 },
-    { 0x00000006, 0x00210e23, 0x000 },
-    { 0x00000000, 0x0029386e, 0x000 },
-    { 0x00000000, 0x00220222, 0x000 },
-    { 0x00000000, 0x14e00000, 0x038 },
-    { 0x00000000, 0x2ee00000, 0x035 },
-    { 0x00000000, 0x2ce00000, 0x037 },
-    { 0x00000000, 0x00400e2d, 0x039 },
-    { 0x00000008, 0x00200e2d, 0x000 },
-    { 0x00000009, 0x0040122d, 0x046 },
-    { 0x00000001, 0x00400e2d, 0x039 },
-    { 0x00000000, 0xc0200c00, 0x000 },
-    { 0x003ffffc, 0x00281223, 0x000 },
-    { 0x00000002, 0x00221224, 0x000 },
-    { 0x0000001f, 0x00211e23, 0x000 },
-    { 0x00000000, 0x14e00000, 0x03e },
-    { 0x00000008, 0x00401c11, 0x041 },
-    { 0x0000000d, 0x00201e2d, 0x000 },
-    { 0x0000000f, 0x00281e27, 0x000 },
-    { 0x00000003, 0x00221e27, 0x000 },
-    { 0x7fc00000, 0x00281a23, 0x000 },
-    { 0x00000014, 0x00211a26, 0x000 },
-    { 0x00000001, 0x00331a26, 0x000 },
-    { 0x00000008, 0x00221a26, 0x000 },
-    { 0x00000000, 0x00290cc7, 0x000 },
-    { 0x00000027, 0x00203624, 0x000 },
-    { 0x00007f00, 0x00281221, 0x000 },
-    { 0x00001400, 0x002f0224, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x04b },
-    { 0x00000001, 0x00290e23, 0x000 },
-    { 0x0000000e, 0x00203623, 0x000 },
-    { 0x0000e000, 0x00204411, 0x000 },
-    { 0xfff80000, 0x00294a23, 0x000 },
-    { 0x00000000, 0x003a2c02, 0x000 },
-    { 0x00000002, 0x00220e2b, 0x000 },
-    { 0xfc000000, 0x00280e23, 0x000 },
-    { 0x0000000f, 0x00203623, 0x000 },
-    { 0x00001fff, 0x00294a23, 0x000 },
-    { 0x00000027, 0x00204a2d, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x00000029, 0x00200e2d, 0x000 },
-    { 0x060a0200, 0x00294a23, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x00000001, 0x00210222, 0x000 },
-    { 0x00000000, 0x14e00000, 0x061 },
-    { 0x00000000, 0x2ee00000, 0x05f },
-    { 0x00000000, 0x2ce00000, 0x05e },
-    { 0x00000000, 0x00400e2d, 0x062 },
-    { 0x00000001, 0x00400e2d, 0x062 },
-    { 0x0000000a, 0x00200e2d, 0x000 },
-    { 0x0000000b, 0x0040122d, 0x06a },
-    { 0x00000000, 0xc0200c00, 0x000 },
-    { 0x003ffffc, 0x00281223, 0x000 },
-    { 0x00000002, 0x00221224, 0x000 },
-    { 0x7fc00000, 0x00281623, 0x000 },
-    { 0x00000014, 0x00211625, 0x000 },
-    { 0x00000001, 0x00331625, 0x000 },
-    { 0x80000000, 0x00280e23, 0x000 },
-    { 0x00000000, 0x00290ca3, 0x000 },
-    { 0x3ffffc00, 0x00290e23, 0x000 },
-    { 0x0000001f, 0x00211e23, 0x000 },
-    { 0x00000000, 0x14e00000, 0x06d },
-    { 0x00000100, 0x00401c11, 0x070 },
-    { 0x0000000d, 0x00201e2d, 0x000 },
-    { 0x000000f0, 0x00281e27, 0x000 },
-    { 0x00000004, 0x00221e27, 0x000 },
-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x0000000d, 0x00204811, 0x000 },
-    { 0xfffff0ff, 0x00281a30, 0x000 },
-    { 0x0000a028, 0x00204411, 0x000 },
-    { 0x00000000, 0x002948e6, 0x000 },
-    { 0x0000a018, 0x00204411, 0x000 },
-    { 0x3fffffff, 0x00284a23, 0x000 },
-    { 0x0000a010, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204804, 0x000 },
-    { 0x00000030, 0x0020162d, 0x000 },
-    { 0x00000002, 0x00291625, 0x000 },
-    { 0x00000030, 0x00203625, 0x000 },
-    { 0x00000025, 0x0020162d, 0x000 },
-    { 0x00000000, 0x002f00a3, 0x000 },
-    { 0x00000000, 0x0cc00000, 0x083 },
-    { 0x00000026, 0x0020162d, 0x000 },
-    { 0x00000000, 0x002f00a4, 0x000 },
-    { 0x00000000, 0x0cc00000, 0x084 },
-    { 0x00000000, 0x00400000, 0x08a },
-    { 0x00000025, 0x00203623, 0x000 },
-    { 0x00000026, 0x00203624, 0x000 },
-    { 0x00000017, 0x00201e2d, 0x000 },
-    { 0x00000002, 0x00210227, 0x000 },
-    { 0x00000000, 0x14e00000, 0x08a },
-    { 0x00000000, 0x00600000, 0x668 },
-    { 0x00000000, 0x00600000, 0x65c },
-    { 0x00000002, 0x00210e22, 0x000 },
-    { 0x00000000, 0x14c00000, 0x08d },
-    { 0x00000012, 0xc0403620, 0x093 },
-    { 0x00000000, 0x2ee00000, 0x091 },
-    { 0x00000000, 0x2ce00000, 0x090 },
-    { 0x00000002, 0x00400e2d, 0x092 },
-    { 0x00000003, 0x00400e2d, 0x092 },
-    { 0x0000000c, 0x00200e2d, 0x000 },
-    { 0x00000012, 0x00203623, 0x000 },
-    { 0x00000003, 0x00210e22, 0x000 },
-    { 0x00000000, 0x14c00000, 0x098 },
-    { 0x0000a00c, 0x00204411, 0x000 },
-    { 0x00000000, 0xc0204800, 0x000 },
-    { 0x00000000, 0xc0404800, 0x0a0 },
-    { 0x0000a00c, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x00000000, 0x2ee00000, 0x09e },
-    { 0x00000000, 0x2ce00000, 0x09d },
-    { 0x00000002, 0x00400e2d, 0x09f },
-    { 0x00000003, 0x00400e2d, 0x09f },
-    { 0x0000000c, 0x00200e2d, 0x000 },
-    { 0x00000000, 0x00204803, 0x000 },
-    { 0x00000000, 0x003a0c02, 0x000 },
-    { 0x003f0000, 0x00280e23, 0x000 },
-    { 0x00000010, 0x00210e23, 0x000 },
-    { 0x00000011, 0x00203623, 0x000 },
-    { 0x0000001e, 0x0021022b, 0x000 },
-    { 0x00000000, 0x14c00000, 0x0a7 },
-    { 0x00000016, 0xc0203620, 0x000 },
-    { 0x0000001f, 0x0021022b, 0x000 },
-    { 0x00000000, 0x14c00000, 0x0aa },
-    { 0x00000015, 0xc0203620, 0x000 },
-    { 0x00000008, 0x00210e2b, 0x000 },
-    { 0x0000007f, 0x00280e23, 0x000 },
-    { 0x00000000, 0x002f0223, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x0e1 },
-    { 0x00000000, 0x27000000, 0x000 },
-    { 0x00000000, 0x00600000, 0x2a3 },
-    { 0x00000001, 0x002f0223, 0x000 },
-    { 0x00000000, 0x0ae00000, 0x0b3 },
-    { 0x00000000, 0x00600000, 0x13a },
-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x00000006, 0x00204811, 0x000 },
-    { 0x0000000c, 0x00221e30, 0x000 },
-    { 0x99800000, 0x00204411, 0x000 },
-    { 0x00000004, 0x0020122d, 0x000 },
-    { 0x00000008, 0x00221224, 0x000 },
-    { 0x00000010, 0x00201811, 0x000 },
-    { 0x00000000, 0x00291ce4, 0x000 },
-    { 0x00000000, 0x00604807, 0x12f },
-    { 0x9b000000, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204802, 0x000 },
-    { 0x9c000000, 0x00204411, 0x000 },
-    { 0x00000000, 0x0033146f, 0x000 },
-    { 0x00000001, 0x00333e23, 0x000 },
-    { 0x00000000, 0xd9004800, 0x000 },
-    { 0x00000000, 0x00203c05, 0x000 },
-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x0000000e, 0x00204811, 0x000 },
-    { 0x00000000, 0x00201010, 0x000 },
-    { 0x0000e007, 0x00204411, 0x000 },
-    { 0x0000000f, 0x0021022b, 0x000 },
-    { 0x00000000, 0x14c00000, 0x0cb },
-    { 0x00f8ff08, 0x00204811, 0x000 },
-    { 0x98000000, 0x00404811, 0x0dc },
-    { 0x000000f0, 0x00280e22, 0x000 },
-    { 0x000000a0, 0x002f0223, 0x000 },
-    { 0x00000000, 0x0cc00000, 0x0da },
-    { 0x00000011, 0x00200e2d, 0x000 },
-    { 0x00000001, 0x002f0223, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x0d5 },
-    { 0x00000002, 0x002f0223, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x0d4 },
-    { 0x00003f00, 0x00400c11, 0x0d6 },
-    { 0x00001f00, 0x00400c11, 0x0d6 },
-    { 0x00000f00, 0x00200c11, 0x000 },
-    { 0x00380009, 0x00294a23, 0x000 },
-    { 0x3f000000, 0x00280e2b, 0x000 },
-    { 0x00000002, 0x00220e23, 0x000 },
-    { 0x00000007, 0x00494a23, 0x0dc },
-    { 0x00380f09, 0x00204811, 0x000 },
-    { 0x68000007, 0x00204811, 0x000 },
-    { 0x00000008, 0x00214a27, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x060a0200, 0x00294a24, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x0000a202, 0x00204411, 0x000 },
-    { 0x00ff0000, 0x00280e22, 0x000 },
-    { 0x00000080, 0x00294a23, 0x000 },
-    { 0x00000027, 0x00200e2d, 0x000 },
-    { 0x00000026, 0x0020122d, 0x000 },
-    { 0x00000000, 0x002f0083, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x0ea },
-    { 0x00000000, 0x00600000, 0x662 },
-    { 0x00000000, 0x00400000, 0x0eb },
-    { 0x00000000, 0x00600000, 0x665 },
-    { 0x00000007, 0x0020222d, 0x000 },
-    { 0x00000005, 0x00220e22, 0x000 },
-    { 0x00100000, 0x00280e23, 0x000 },
-    { 0x00000000, 0x00292068, 0x000 },
-    { 0x00000000, 0x003a0c02, 0x000 },
-    { 0x000000ef, 0x00280e23, 0x000 },
-    { 0x00000000, 0x00292068, 0x000 },
-    { 0x00000017, 0x00200e2d, 0x000 },
-    { 0x00000003, 0x00210223, 0x000 },
-    { 0x00000000, 0x14e00000, 0x0f8 },
-    { 0x0000000b, 0x00210228, 0x000 },
-    { 0x00000000, 0x14c00000, 0x0f8 },
-    { 0x00000400, 0x00292228, 0x000 },
-    { 0x00000014, 0x00203628, 0x000 },
-    { 0x0000001c, 0x00210e22, 0x000 },
-    { 0x00000000, 0x14c00000, 0x0fd },
-    { 0x0000a30c, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x0000001e, 0x00210e22, 0x000 },
-    { 0x00000000, 0x14c00000, 0x10b },
-    { 0x0000a30f, 0x00204411, 0x000 },
-    { 0x00000011, 0x00200e2d, 0x000 },
-    { 0x00000001, 0x002f0223, 0x000 },
-    { 0x00000000, 0x0cc00000, 0x104 },
-    { 0xffffffff, 0x00404811, 0x10b },
-    { 0x00000002, 0x002f0223, 0x000 },
-    { 0x00000000, 0x0cc00000, 0x107 },
-    { 0x0000ffff, 0x00404811, 0x10b },
-    { 0x00000004, 0x002f0223, 0x000 },
-    { 0x00000000, 0x0cc00000, 0x10a },
-    { 0x000000ff, 0x00404811, 0x10b },
-    { 0x00000001, 0x00204811, 0x000 },
-    { 0x0002c400, 0x00204411, 0x000 },
-    { 0x0000001f, 0x00210e22, 0x000 },
-    { 0x00000000, 0x14c00000, 0x112 },
-    { 0x00000010, 0x40210e20, 0x000 },
-    { 0x00000013, 0x00203623, 0x000 },
-    { 0x00000018, 0x40224a20, 0x000 },
-    { 0x00000010, 0xc0424a20, 0x114 },
-    { 0x00000000, 0x00200c11, 0x000 },
-    { 0x00000013, 0x00203623, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x0000000a, 0x00201011, 0x000 },
-    { 0x00000000, 0x002f0224, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x11b },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x00000001, 0x00531224, 0x117 },
-    { 0xffbfffff, 0x00283a2e, 0x000 },
-    { 0x0000001b, 0x00210222, 0x000 },
-    { 0x00000000, 0x14c00000, 0x12e },
-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x0000000d, 0x00204811, 0x000 },
-    { 0x00000018, 0x00220e30, 0x000 },
-    { 0xfc000000, 0x00280e23, 0x000 },
-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x0000000e, 0x00204811, 0x000 },
-    { 0x00000000, 0x00201010, 0x000 },
-    { 0x0000e00e, 0x00204411, 0x000 },
-    { 0x07f8ff08, 0x00204811, 0x000 },
-    { 0x00000000, 0x00294a23, 0x000 },
-    { 0x0000001c, 0x00201e2d, 0x000 },
-    { 0x00000008, 0x00214a27, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x060a0200, 0x00294a24, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x00000000, 0x00800000, 0x000 },
-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x00000001, 0x00204811, 0x000 },
-    { 0x0000217c, 0x00204411, 0x000 },
-    { 0x00800000, 0x00204811, 0x000 },
-    { 0x00000000, 0x00204806, 0x000 },
-    { 0x00000008, 0x00214a27, 0x000 },
-    { 0x00000000, 0x17000000, 0x000 },
-    { 0x0004217f, 0x00604411, 0x68d },
-    { 0x0000001f, 0x00210230, 0x000 },
-    { 0x00000000, 0x14c00000, 0x68c },
-    { 0x00000004, 0x00404c11, 0x135 },
-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x00000001, 0x00204811, 0x000 },
-    { 0x000021f8, 0x00204411, 0x000 },
-    { 0x0000001c, 0x00204811, 0x000 },
-    { 0x000421f9, 0x00604411, 0x68d },
-    { 0x00000011, 0x00210230, 0x000 },
-    { 0x00000000, 0x14e00000, 0x13c },
-    { 0x00000000, 0x00800000, 0x000 },
-    { 0x00000000, 0x00600000, 0x00b },
-    { 0x00000000, 0x00600411, 0x315 },
-    { 0x00000000, 0x00200411, 0x000 },
-    { 0x00000000, 0x00600811, 0x1b2 },
-    { 0x00000000, 0x00600000, 0x160 },
-    { 0x0000ffff, 0x40280e20, 0x000 },
-    { 0x00000010, 0xc0211220, 0x000 },
-    { 0x0000ffff, 0x40280620, 0x000 },
-    { 0x00000010, 0xc0210a20, 0x000 },
-    { 0x00000000, 0x00341461, 0x000 },
-    { 0x00000000, 0x00741882, 0x2bb },
-    { 0x0001a1fd, 0x00604411, 0x2e0 },
-    { 0x00003fff, 0x002f022f, 0x000 },
-    { 0x00000000, 0x0cc00000, 0x147 },
-    { 0x00000000, 0xc0400400, 0x001 },
-    { 0x00000000, 0x00600000, 0x00b },
-    { 0x00000000, 0x00600411, 0x315 },
-    { 0x00000000, 0x00200411, 0x000 },
-    { 0x00000000, 0x00600811, 0x1b2 },
-    { 0x00003fff, 0x002f022f, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x000 },
-    { 0x00000000, 0x00600000, 0x160 },
-    { 0x00000010, 0x40210e20, 0x000 },
-    { 0x0000ffff, 0xc0281220, 0x000 },
-    { 0x00000010, 0x40211620, 0x000 },
-    { 0x0000ffff, 0xc0681a20, 0x2bb },
-    { 0x0001a1fd, 0x00604411, 0x2e0 },
-    { 0x00003fff, 0x002f022f, 0x000 },
-    { 0x00000000, 0x0cc00000, 0x158 },
-    { 0x00000000, 0xc0400400, 0x001 },
-    { 0x0000225c, 0x00204411, 0x000 },
-    { 0x00000001, 0x00300a2f, 0x000 },
-    { 0x00000001, 0x00210a22, 0x000 },
-    { 0x00000003, 0x00384a22, 0x000 },
-    { 0x00002256, 0x00204411, 0x000 },
-    { 0x0000001a, 0x00204811, 0x000 },
-    { 0x0000a1fc, 0x00204411, 0x000 },
-    { 0x00000001, 0x00804811, 0x000 },
-    { 0x00000000, 0x00600000, 0x00b },
-    { 0x00000000, 0x00600000, 0x18f },
-    { 0x00000000, 0x00600000, 0x1a0 },
-    { 0x00003fff, 0x002f022f, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x000 },
-    { 0x00000000, 0x00202c08, 0x000 },
-    { 0x00000000, 0x00202411, 0x000 },
-    { 0x00000000, 0x00202811, 0x000 },
-    { 0x00002256, 0x00204411, 0x000 },
-    { 0x00000016, 0x00204811, 0x000 },
-    { 0x0000225c, 0x00204411, 0x000 },
-    { 0x00000003, 0x00204811, 0x000 },
-    { 0x93800000, 0x00204411, 0x000 },
-    { 0x00000002, 0x00221e29, 0x000 },
-    { 0x00000000, 0x007048eb, 0x19c },
-    { 0x00000000, 0x00600000, 0x2bb },
-    { 0x00000001, 0x40330620, 0x000 },
-    { 0x00000000, 0xc0302409, 0x000 },
-    { 0x00003fff, 0x002f022f, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x000 },
-    { 0x00000000, 0x00600000, 0x2a3 },
-    { 0x00000000, 0x002f0221, 0x000 },
-    { 0x00000000, 0x0ae00000, 0x181 },
-    { 0x00000000, 0x00600000, 0x13a },
-    { 0x00000000, 0x00400000, 0x186 },
-    { 0x95000000, 0x00204411, 0x000 },
-    { 0x00000000, 0x002f0221, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x186 },
-    { 0x00000000, 0xc0204800, 0x000 },
-    { 0x00000001, 0x00530621, 0x182 },
-    { 0x92000000, 0x00204411, 0x000 },
-    { 0x00000000, 0xc0604800, 0x197 },
-    { 0x0001a1fd, 0x00204411, 0x000 },
-    { 0x00000011, 0x0020062d, 0x000 },
-    { 0x00000000, 0x0078042a, 0x2fb },
-    { 0x00000000, 0x00202809, 0x000 },
-    { 0x00003fff, 0x002f022f, 0x000 },
-    { 0x00000000, 0x0cc00000, 0x174 },
-    { 0x00000000, 0xc0400400, 0x001 },
-    { 0x00000210, 0x00600411, 0x315 },
-    { 0x00003fff, 0x002f022f, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x194 },
-    { 0x00000015, 0xc0203620, 0x000 },
-    { 0x00000016, 0xc0203620, 0x000 },
-    { 0x3f800000, 0x00200411, 0x000 },
-    { 0x46000000, 0x00600811, 0x1b2 },
-    { 0x00000000, 0x00800000, 0x000 },
-    { 0x0000a1fc, 0x00204411, 0x000 },
-    { 0x00003fff, 0x002f022f, 0x000 },
-    { 0x00000000, 0x0cc00000, 0x19b },
-    { 0x00000001, 0x00804811, 0x000 },
-    { 0x00000021, 0x00804811, 0x000 },
-    { 0x0000ffff, 0x40280e20, 0x000 },
-    { 0x00000010, 0xc0211220, 0x000 },
-    { 0x0000ffff, 0x40281620, 0x000 },
-    { 0x00000010, 0xc0811a20, 0x000 },
-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x00000006, 0x00204811, 0x000 },
-    { 0x00000008, 0x00221e30, 0x000 },
-    { 0x00000029, 0x00201a2d, 0x000 },
-    { 0x0000e000, 0x00204411, 0x000 },
-    { 0xfffbff09, 0x00204811, 0x000 },
-    { 0x0000000f, 0x0020222d, 0x000 },
-    { 0x00001fff, 0x00294a28, 0x000 },
-    { 0x00000006, 0x0020222d, 0x000 },
-    { 0x00000000, 0x002920e8, 0x000 },
-    { 0x00000000, 0x00204808, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x060a0200, 0x00294a26, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x00000100, 0x00201811, 0x000 },
-    { 0x00000008, 0x00621e28, 0x12f },
-    { 0x00000008, 0x00822228, 0x000 },
-    { 0x0002c000, 0x00204411, 0x000 },
-    { 0x00000015, 0x00600e2d, 0x1bd },
-    { 0x00000016, 0x00600e2d, 0x1bd },
-    { 0x0000c008, 0x00204411, 0x000 },
-    { 0x00000017, 0x00200e2d, 0x000 },
-    { 0x00000000, 0x14c00000, 0x1b9 },
-    { 0x00000000, 0x00200411, 0x000 },
-    { 0x00000000, 0x00204801, 0x000 },
-    { 0x39000000, 0x00204811, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x00000000, 0x00804802, 0x000 },
-    { 0x00000018, 0x00202e2d, 0x000 },
-    { 0x00000000, 0x003b0d63, 0x000 },
-    { 0x00000008, 0x00224a23, 0x000 },
-    { 0x00000010, 0x00224a23, 0x000 },
-    { 0x00000018, 0x00224a23, 0x000 },
-    { 0x00000000, 0x00804803, 0x000 },
-    { 0x00000000, 0x00600000, 0x00b },
-    { 0x00001000, 0x00600411, 0x315 },
-    { 0x00000000, 0x00200411, 0x000 },
-    { 0x00000000, 0x00600811, 0x1b2 },
-    { 0x00000007, 0x0021062f, 0x000 },
-    { 0x00000013, 0x00200a2d, 0x000 },
-    { 0x00000001, 0x00202c11, 0x000 },
-    { 0x0000ffff, 0x40282220, 0x000 },
-    { 0x0000000f, 0x00262228, 0x000 },
-    { 0x00000010, 0x40212620, 0x000 },
-    { 0x0000000f, 0x00262629, 0x000 },
-    { 0x00000000, 0x00202802, 0x000 },
-    { 0x00002256, 0x00204411, 0x000 },
-    { 0x0000001b, 0x00204811, 0x000 },
-    { 0x00000000, 0x002f0221, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x1e0 },
-    { 0x0000225c, 0x00204411, 0x000 },
-    { 0x00000081, 0x00204811, 0x000 },
-    { 0x0000a1fc, 0x00204411, 0x000 },
-    { 0x00000001, 0x00204811, 0x000 },
-    { 0x00000080, 0x00201c11, 0x000 },
-    { 0x00000000, 0x002f0227, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x1dc },
-    { 0x00000000, 0x00600000, 0x1e9 },
-    { 0x00000001, 0x00531e27, 0x1d8 },
-    { 0x00000001, 0x00202c11, 0x000 },
-    { 0x0000001f, 0x00280a22, 0x000 },
-    { 0x0000001f, 0x00282a2a, 0x000 },
-    { 0x00000001, 0x00530621, 0x1d1 },
-    { 0x0000225c, 0x00204411, 0x000 },
-    { 0x00000002, 0x00304a2f, 0x000 },
-    { 0x0000a1fc, 0x00204411, 0x000 },
-    { 0x00000001, 0x00204811, 0x000 },
-    { 0x00000001, 0x00301e2f, 0x000 },
-    { 0x00000000, 0x002f0227, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x000 },
-    { 0x00000000, 0x00600000, 0x1e9 },
-    { 0x00000001, 0x00531e27, 0x1e5 },
-    { 0x0000ffff, 0x40280e20, 0x000 },
-    { 0x0000000f, 0x00260e23, 0x000 },
-    { 0x00000010, 0xc0211220, 0x000 },
-    { 0x0000000f, 0x00261224, 0x000 },
-    { 0x00000000, 0x00201411, 0x000 },
-    { 0x00000000, 0x00601811, 0x2bb },
-    { 0x0001a1fd, 0x00204411, 0x000 },
-    { 0x00000000, 0x002f022b, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x1f8 },
-    { 0x00000010, 0x00221628, 0x000 },
-    { 0xffff0000, 0x00281625, 0x000 },
-    { 0x0000ffff, 0x00281a29, 0x000 },
-    { 0x00000000, 0x002948c5, 0x000 },
-    { 0x00000000, 0x0020480a, 0x000 },
-    { 0x00000000, 0x00202c11, 0x000 },
-    { 0x00000010, 0x00221623, 0x000 },
-    { 0xffff0000, 0x00281625, 0x000 },
-    { 0x0000ffff, 0x00281a24, 0x000 },
-    { 0x00000000, 0x002948c5, 0x000 },
-    { 0x00000000, 0x00731503, 0x205 },
-    { 0x00000000, 0x00201805, 0x000 },
-    { 0x00000000, 0x00731524, 0x205 },
-    { 0x00000000, 0x002d14c5, 0x000 },
-    { 0x00000000, 0x003008a2, 0x000 },
-    { 0x00000000, 0x00204802, 0x000 },
-    { 0x00000000, 0x00202802, 0x000 },
-    { 0x00000000, 0x00202003, 0x000 },
-    { 0x00000000, 0x00802404, 0x000 },
-    { 0x0000000f, 0x00210225, 0x000 },
-    { 0x00000000, 0x14c00000, 0x68c },
-    { 0x00000000, 0x002b1405, 0x000 },
-    { 0x00000001, 0x00901625, 0x000 },
-    { 0x00000000, 0x00600000, 0x00b },
-    { 0x00000000, 0x00600411, 0x315 },
-    { 0x00000000, 0x00200411, 0x000 },
-    { 0x00000000, 0x00600811, 0x1b2 },
-    { 0x00002256, 0x00204411, 0x000 },
-    { 0x0000001a, 0x00294a22, 0x000 },
-    { 0x00000000, 0xc0200000, 0x000 },
-    { 0x00003fff, 0x002f022f, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x000 },
-    { 0x00000000, 0xc0200400, 0x000 },
-    { 0x0000225c, 0x00204411, 0x000 },
-    { 0x00000003, 0x00384a21, 0x000 },
-    { 0x0000a1fc, 0x00204411, 0x000 },
-    { 0x00000001, 0x00204811, 0x000 },
-    { 0x0000ffff, 0x40281220, 0x000 },
-    { 0x00000010, 0xc0211a20, 0x000 },
-    { 0x0000ffff, 0x40280e20, 0x000 },
-    { 0x00000010, 0xc0211620, 0x000 },
-    { 0x00000000, 0x00741465, 0x2bb },
-    { 0x0001a1fd, 0x00604411, 0x2e0 },
-    { 0x00000001, 0x00330621, 0x000 },
-    { 0x00000000, 0x002f0221, 0x000 },
-    { 0x00000000, 0x0cc00000, 0x219 },
-    { 0x00003fff, 0x002f022f, 0x000 },
-    { 0x00000000, 0x0cc00000, 0x212 },
-    { 0x00000000, 0xc0400400, 0x001 },
-    { 0x00000000, 0x00600000, 0x645 },
-    { 0x00000000, 0x0040040f, 0x213 },
-    { 0x00000000, 0x00600000, 0x631 },
-    { 0x00000000, 0x00600000, 0x645 },
-    { 0x00000210, 0x00600411, 0x315 },
-    { 0x00000000, 0x00600000, 0x1a0 },
-    { 0x00000000, 0x00600000, 0x19c },
-    { 0x00000000, 0x00600000, 0x2bb },
-    { 0x00000000, 0x00600000, 0x2a3 },
-    { 0x93800000, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204808, 0x000 },
-    { 0x00000000, 0x002f022f, 0x000 },
-    { 0x00000000, 0x0ae00000, 0x232 },
-    { 0x00000000, 0x00600000, 0x13a },
-    { 0x00000000, 0x00400000, 0x236 },
-    { 0x95000000, 0x00204411, 0x000 },
-    { 0x00000000, 0x002f022f, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x236 },
-    { 0x00000000, 0xc0404800, 0x233 },
-    { 0x92000000, 0x00204411, 0x000 },
-    { 0x00000000, 0xc0204800, 0x000 },
-    { 0x00002256, 0x00204411, 0x000 },
-    { 0x00000016, 0x00204811, 0x000 },
-    { 0x0000225c, 0x00204411, 0x000 },
-    { 0x00000003, 0x00204811, 0x000 },
-    { 0x0000a1fc, 0x00204411, 0x000 },
-    { 0x00000001, 0x00204811, 0x000 },
-    { 0x0001a1fd, 0x00204411, 0x000 },
-    { 0x00000000, 0x00600411, 0x2fb },
-    { 0x00000000, 0xc0400400, 0x001 },
-    { 0x00000000, 0x00600000, 0x631 },
-    { 0x0000a00c, 0x00204411, 0x000 },
-    { 0x00000000, 0xc0204800, 0x000 },
-    { 0x00000000, 0xc0404800, 0x000 },
-    { 0x00000000, 0x00600000, 0x00b },
-    { 0x00000018, 0x40210a20, 0x000 },
-    { 0x00000003, 0x002f0222, 0x000 },
-    { 0x00000000, 0x0ae00000, 0x24c },
-    { 0x00000014, 0x0020222d, 0x000 },
-    { 0x00080101, 0x00292228, 0x000 },
-    { 0x00000014, 0x00203628, 0x000 },
-    { 0x0000a30c, 0x00204411, 0x000 },
-    { 0x00000000, 0xc0204800, 0x000 },
-    { 0x00000000, 0xc0204800, 0x000 },
-    { 0x00000000, 0xc0404800, 0x251 },
-    { 0x00000000, 0x00600000, 0x00b },
-    { 0x00000010, 0x00600411, 0x315 },
-    { 0x3f800000, 0x00200411, 0x000 },
-    { 0x00000000, 0x00600811, 0x1b2 },
-    { 0x0000225c, 0x00204411, 0x000 },
-    { 0x00000003, 0x00204811, 0x000 },
-    { 0x00000000, 0x00600000, 0x27c },
-    { 0x00000017, 0x00201e2d, 0x000 },
-    { 0x00000001, 0x00211e27, 0x000 },
-    { 0x00000000, 0x14e00000, 0x26a },
-    { 0x00000012, 0x00201e2d, 0x000 },
-    { 0x0000ffff, 0x00281e27, 0x000 },
-    { 0x00000000, 0x00341c27, 0x000 },
-    { 0x00000000, 0x12c00000, 0x25f },
-    { 0x00000000, 0x00201c11, 0x000 },
-    { 0x00000000, 0x002f00e5, 0x000 },
-    { 0x00000000, 0x08c00000, 0x262 },
-    { 0x00000000, 0x00201407, 0x000 },
-    { 0x00000012, 0x00201e2d, 0x000 },
-    { 0x00000010, 0x00211e27, 0x000 },
-    { 0x00000000, 0x00341c47, 0x000 },
-    { 0x00000000, 0x12c00000, 0x267 },
-    { 0x00000000, 0x00201c11, 0x000 },
-    { 0x00000000, 0x002f00e6, 0x000 },
-    { 0x00000000, 0x08c00000, 0x26a },
-    { 0x00000000, 0x00201807, 0x000 },
-    { 0x00000000, 0x00600000, 0x2c1 },
-    { 0x00002256, 0x00204411, 0x000 },
-    { 0x00000000, 0x00342023, 0x000 },
-    { 0x00000000, 0x12c00000, 0x272 },
-    { 0x00000000, 0x00342044, 0x000 },
-    { 0x00000000, 0x12c00000, 0x271 },
-    { 0x00000016, 0x00404811, 0x276 },
-    { 0x00000018, 0x00404811, 0x276 },
-    { 0x00000000, 0x00342044, 0x000 },
-    { 0x00000000, 0x12c00000, 0x275 },
-    { 0x00000017, 0x00404811, 0x276 },
-    { 0x00000019, 0x00204811, 0x000 },
-    { 0x0000a1fc, 0x00204411, 0x000 },
-    { 0x00000001, 0x00204811, 0x000 },
-    { 0x0001a1fd, 0x00604411, 0x2e9 },
-    { 0x00003fff, 0x002f022f, 0x000 },
-    { 0x00000000, 0x0cc00000, 0x256 },
-    { 0x00000000, 0xc0400400, 0x001 },
-    { 0x00000010, 0x40210620, 0x000 },
-    { 0x0000ffff, 0xc0280a20, 0x000 },
-    { 0x00000010, 0x40210e20, 0x000 },
-    { 0x0000ffff, 0xc0281220, 0x000 },
-    { 0x00000010, 0x40211620, 0x000 },
-    { 0x0000ffff, 0xc0881a20, 0x000 },
-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x00000001, 0x00204811, 0x000 },
-    { 0x00042004, 0x00604411, 0x68d },
-    { 0x00000000, 0x00600000, 0x631 },
-    { 0x00000000, 0xc0600000, 0x2a3 },
-    { 0x00000005, 0x00200a2d, 0x000 },
-    { 0x00000008, 0x00220a22, 0x000 },
-    { 0x0000002b, 0x00201a2d, 0x000 },
-    { 0x0000001c, 0x00201e2d, 0x000 },
-    { 0x00007000, 0x00281e27, 0x000 },
-    { 0x00000000, 0x00311ce6, 0x000 },
-    { 0x0000002a, 0x00201a2d, 0x000 },
-    { 0x0000000c, 0x00221a26, 0x000 },
-    { 0x00000000, 0x002f00e6, 0x000 },
-    { 0x00000000, 0x06e00000, 0x292 },
-    { 0x00000000, 0x00201c11, 0x000 },
-    { 0x00000000, 0x00200c11, 0x000 },
-    { 0x0000002b, 0x00203623, 0x000 },
-    { 0x00000010, 0x00201811, 0x000 },
-    { 0x00000000, 0x00691ce2, 0x12f },
-    { 0x93800000, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204807, 0x000 },
-    { 0x95000000, 0x00204411, 0x000 },
-    { 0x00000000, 0x002f022f, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x29d },
-    { 0x00000001, 0x00333e2f, 0x000 },
-    { 0x00000000, 0xd9004800, 0x000 },
-    { 0x92000000, 0x00204411, 0x000 },
-    { 0x00000000, 0xc0204800, 0x000 },
-    { 0x0000001c, 0x00403627, 0x000 },
-    { 0x0000000c, 0xc0220a20, 0x000 },
-    { 0x00000029, 0x00203622, 0x000 },
-    { 0x00000028, 0xc0403620, 0x000 },
-    { 0x0000a2a4, 0x00204411, 0x000 },
-    { 0x00000009, 0x00204811, 0x000 },
-    { 0xa1000000, 0x00204411, 0x000 },
-    { 0x00000001, 0x00804811, 0x000 },
-    { 0x00000021, 0x00201e2d, 0x000 },
-    { 0x00000000, 0x002c1ce3, 0x000 },
-    { 0x00000021, 0x00203627, 0x000 },
-    { 0x00000022, 0x00201e2d, 0x000 },
-    { 0x00000000, 0x002c1ce4, 0x000 },
-    { 0x00000022, 0x00203627, 0x000 },
-    { 0x00000023, 0x00201e2d, 0x000 },
-    { 0x00000000, 0x003120a3, 0x000 },
-    { 0x00000000, 0x002d1d07, 0x000 },
-    { 0x00000023, 0x00203627, 0x000 },
-    { 0x00000024, 0x00201e2d, 0x000 },
-    { 0x00000000, 0x003120c4, 0x000 },
-    { 0x00000000, 0x002d1d07, 0x000 },
-    { 0x00000024, 0x00803627, 0x000 },
-    { 0x00000021, 0x00203623, 0x000 },
-    { 0x00000022, 0x00203624, 0x000 },
-    { 0x00000000, 0x00311ca3, 0x000 },
-    { 0x00000023, 0x00203627, 0x000 },
-    { 0x00000000, 0x00311cc4, 0x000 },
-    { 0x00000024, 0x00803627, 0x000 },
-    { 0x0000001a, 0x00203627, 0x000 },
-    { 0x0000001b, 0x00203628, 0x000 },
-    { 0x00000017, 0x00201e2d, 0x000 },
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-    { 0x00000000, 0x14c00000, 0x2dc },
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-    { 0x00000001, 0x00220a21, 0x000 },
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-    { 0x00000001, 0x00220a21, 0x000 },
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-    { 0x00000000, 0x00294907, 0x000 },
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-    { 0x00000001, 0x00220a22, 0x000 },
-    { 0x00000000, 0x003308a2, 0x000 },
-    { 0x00000010, 0x00221e22, 0x000 },
-    { 0x00000010, 0x00212222, 0x000 },
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-    { 0x0000a1fc, 0x00204411, 0x000 },
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-    { 0x00000001, 0x00530a22, 0x34b },
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-    { 0x00000001, 0x00204811, 0x000 },
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-    { 0x00000001, 0x00331a26, 0x000 },
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-    { 0x00000001, 0x00204811, 0x000 },
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-    { 0x00000016, 0x00204811, 0x000 },
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-    { 0x0000003f, 0x00204811, 0x000 },
-    { 0x0000003f, 0x00204811, 0x000 },
-    { 0x0000003f, 0x00204811, 0x000 },
-    { 0x0000003f, 0x00204811, 0x000 },
-    { 0x00000005, 0x00204811, 0x000 },
-    { 0x0000a1f4, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x88000000, 0x00204411, 0x000 },
-    { 0x00000001, 0x00204811, 0x000 },
-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x00000006, 0x00204811, 0x000 },
-    { 0x00000001, 0x002f0230, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x62c },
-    { 0x00000030, 0x0020062d, 0x000 },
-    { 0x00000000, 0x002f0221, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x62c },
-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x00000001, 0x00204811, 0x000 },
-    { 0x00007e00, 0x00280621, 0x000 },
-    { 0x00000000, 0x002f0221, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x605 },
-    { 0x0000a092, 0x00204411, 0x000 },
-    { 0x00000031, 0x00204a2d, 0x000 },
-    { 0x0000a093, 0x00204411, 0x000 },
-    { 0x00000032, 0x00204a2d, 0x000 },
-    { 0x0000a2b6, 0x00204411, 0x000 },
-    { 0x00000033, 0x00204a2d, 0x000 },
-    { 0x0000a2ba, 0x00204411, 0x000 },
-    { 0x00000034, 0x00204a2d, 0x000 },
-    { 0x0000a2be, 0x00204411, 0x000 },
-    { 0x00000035, 0x00204a2d, 0x000 },
-    { 0x0000a2c2, 0x00204411, 0x000 },
-    { 0x00000036, 0x00204a2d, 0x000 },
-    { 0x00000030, 0x0020062d, 0x000 },
-    { 0x000001ff, 0x00280621, 0x000 },
-    { 0x00000000, 0x002f0221, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x62b },
-    { 0x00000000, 0x00210221, 0x000 },
-    { 0x00000000, 0x14c00000, 0x60e },
-    { 0x0004a003, 0x00604411, 0x68d },
-    { 0x0000a003, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204810, 0x000 },
-    { 0x00000001, 0x00210621, 0x000 },
-    { 0x00000000, 0x14c00000, 0x613 },
-    { 0x0004a010, 0x00604411, 0x68d },
-    { 0x0000a010, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204810, 0x000 },
-    { 0x00000001, 0x00210621, 0x000 },
-    { 0x00000000, 0x002f0221, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x62b },
-    { 0x0004a011, 0x00604411, 0x68d },
-    { 0x0000a011, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204810, 0x000 },
-    { 0x0004a012, 0x00604411, 0x68d },
-    { 0x0000a012, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204810, 0x000 },
-    { 0x0004a013, 0x00604411, 0x68d },
-    { 0x0000a013, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204810, 0x000 },
-    { 0x0004a014, 0x00604411, 0x68d },
-    { 0x0000a014, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204810, 0x000 },
-    { 0x0004a015, 0x00604411, 0x68d },
-    { 0x0000a015, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204810, 0x000 },
-    { 0x0004a016, 0x00604411, 0x68d },
-    { 0x0000a016, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204810, 0x000 },
-    { 0x0004a017, 0x00604411, 0x68d },
-    { 0x0000a017, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204810, 0x000 },
-    { 0x00042004, 0x00604411, 0x68d },
-    { 0x0000002c, 0x0080062d, 0x000 },
-    { 0xff000000, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x00000001, 0x00204811, 0x000 },
-    { 0x00000002, 0x00804811, 0x000 },
-    { 0x00000000, 0x0ee00000, 0x63d },
-    { 0x00000030, 0x0020062d, 0x000 },
-    { 0x00000002, 0x00280621, 0x000 },
-    { 0x00000000, 0x002f0221, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x63b },
-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x00000001, 0x00204811, 0x000 },
-    { 0x00042004, 0x00604411, 0x68d },
-    { 0x00001000, 0x00200811, 0x000 },
-    { 0x0000002b, 0x00203622, 0x000 },
-    { 0x00000000, 0x00600000, 0x641 },
-    { 0x00000000, 0x00600000, 0x5c9 },
-    { 0x98000000, 0x00204411, 0x000 },
-    { 0x00000000, 0x00804811, 0x000 },
-    { 0x00000000, 0xc0600000, 0x641 },
-    { 0x00000000, 0xc0400400, 0x001 },
-    { 0x0000a2a4, 0x00204411, 0x000 },
-    { 0x00000022, 0x00204811, 0x000 },
-    { 0x89000000, 0x00204411, 0x000 },
-    { 0x00000001, 0x00404811, 0x62d },
-    { 0x97000000, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x8a000000, 0x00204411, 0x000 },
-    { 0x00000000, 0x00404811, 0x62d },
-    { 0x00000000, 0x00600000, 0x65c },
-    { 0x00002010, 0x00204411, 0x000 },
-    { 0x00008000, 0x00204811, 0x000 },
-    { 0x0001a2a4, 0xc0204411, 0x000 },
-    { 0x00000016, 0x00604811, 0x36e },
-    { 0x00002010, 0x00204411, 0x000 },
-    { 0x00010000, 0x00204811, 0x000 },
-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x00000001, 0x00204811, 0x000 },
-    { 0x0000217c, 0x00204411, 0x000 },
-    { 0x09800000, 0x00204811, 0x000 },
-    { 0xffffffff, 0x00204811, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x00000000, 0x17000000, 0x000 },
-    { 0x0004217f, 0x00604411, 0x68d },
-    { 0x0000001f, 0x00210230, 0x000 },
-    { 0x00000000, 0x14c00000, 0x000 },
-    { 0x00000004, 0x00404c11, 0x656 },
-    { 0x00000000, 0x00400000, 0x000 },
-    { 0x00000017, 0x00201e2d, 0x000 },
-    { 0x00000004, 0x00291e27, 0x000 },
-    { 0x00000017, 0x00803627, 0x000 },
-    { 0x00000017, 0x00201e2d, 0x000 },
-    { 0xfffffffb, 0x00281e27, 0x000 },
-    { 0x00000017, 0x00803627, 0x000 },
-    { 0x00000017, 0x00201e2d, 0x000 },
-    { 0x00000008, 0x00291e27, 0x000 },
-    { 0x00000017, 0x00803627, 0x000 },
-    { 0x00000017, 0x00201e2d, 0x000 },
-    { 0xfffffff7, 0x00281e27, 0x000 },
-    { 0x00000017, 0x00803627, 0x000 },
-    { 0x00002010, 0x00204411, 0x000 },
-    { 0x00008000, 0x00204811, 0x000 },
-    { 0x0001a2a4, 0x00204411, 0x000 },
-    { 0x00000016, 0x00604811, 0x36e },
-    { 0x00002010, 0x00204411, 0x000 },
-    { 0x00010000, 0x00204811, 0x000 },
-    { 0x0000217c, 0x00204411, 0x000 },
-    { 0x01800000, 0x00204811, 0x000 },
-    { 0xffffffff, 0x00204811, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x00000000, 0x17000000, 0x000 },
-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x00000001, 0x00204811, 0x000 },
-    { 0x0004217f, 0x00604411, 0x68d },
-    { 0x0000001f, 0x00210230, 0x000 },
-    { 0x00000000, 0x14c00000, 0x68c },
-    { 0x00000010, 0x00404c11, 0x672 },
-    { 0x00000000, 0xc0200400, 0x000 },
-    { 0x00000000, 0x38c00000, 0x000 },
-    { 0x0000001d, 0x00200a2d, 0x000 },
-    { 0x0000001e, 0x00200e2d, 0x000 },
-    { 0x0000001f, 0x0020122d, 0x000 },
-    { 0x00000020, 0x0020162d, 0x000 },
-    { 0x00002169, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204804, 0x000 },
-    { 0x00000000, 0x00204805, 0x000 },
-    { 0x00000000, 0x00204801, 0x000 },
-    { 0xcafebabe, 0x00204811, 0x000 },
-    { 0x00000004, 0x00301224, 0x000 },
-    { 0x00000000, 0x002f0064, 0x000 },
-    { 0x00000000, 0x0cc00000, 0x68b },
-    { 0x00000003, 0x00281a22, 0x000 },
-    { 0x00000008, 0x00221222, 0x000 },
-    { 0xfffff000, 0x00281224, 0x000 },
-    { 0x00000000, 0x002910c4, 0x000 },
-    { 0x0000001f, 0x00403624, 0x000 },
-    { 0x00000000, 0x00800000, 0x000 },
-    { 0x00000000, 0x1ac00000, 0x68d },
-    { 0x9f000000, 0x00204411, 0x000 },
-    { 0xcafebabe, 0x00204811, 0x000 },
-    { 0x00000000, 0x1ae00000, 0x690 },
-    { 0x00000000, 0x00800000, 0x000 },
-    { 0x00000000, 0x1ac00000, 0x692 },
-    { 0x9e000000, 0x00204411, 0x000 },
-    { 0xcafebabe, 0x00204811, 0x000 },
-    { 0x00000000, 0x1ae00000, 0x695 },
-    { 0x00000000, 0x00800000, 0x000 },
-    { 0x00000000, 0x00600000, 0x00b },
-    { 0x00001000, 0x00600411, 0x315 },
-    { 0x00000000, 0x00200411, 0x000 },
-    { 0x00000000, 0x00600811, 0x1b2 },
-    { 0x0000225c, 0x00204411, 0x000 },
-    { 0x00000003, 0x00204811, 0x000 },
-    { 0x00002256, 0x00204411, 0x000 },
-    { 0x0000001b, 0x00204811, 0x000 },
-    { 0x0000a1fc, 0x00204411, 0x000 },
-    { 0x00000001, 0x00204811, 0x000 },
-    { 0x0001a1fd, 0xc0204411, 0x000 },
-    { 0x00000021, 0x00201e2d, 0x000 },
-    { 0x00000010, 0x00221e27, 0x000 },
-    { 0x00000024, 0x0020222d, 0x000 },
-    { 0x0000ffff, 0x00282228, 0x000 },
-    { 0x00000000, 0x00294907, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x00000022, 0x0020222d, 0x000 },
-    { 0x0000ffff, 0x00282228, 0x000 },
-    { 0x00000000, 0x00294907, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x00000023, 0x00201e2d, 0x000 },
-    { 0x00000010, 0x00221e27, 0x000 },
-    { 0x00000000, 0x00294907, 0x000 },
-    { 0x00000000, 0x00404811, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x01420502, 0x05c00250, 0x000 },
-    { 0x01c30168, 0x043f05c0, 0x000 },
-    { 0x02250209, 0x02500151, 0x000 },
-    { 0x02230245, 0x02a00241, 0x000 },
-    { 0x03d705c0, 0x05c005c0, 0x000 },
-    { 0x0649064a, 0x031f05c0, 0x000 },
-    { 0x05c005c5, 0x03200340, 0x000 },
-    { 0x032a0282, 0x03420334, 0x000 },
-    { 0x05c005c0, 0x05c005c0, 0x000 },
-    { 0x05c00551, 0x05c005c0, 0x000 },
-    { 0x03ba05c0, 0x04bb0344, 0x000 },
-    { 0x049a0450, 0x043d05c0, 0x000 },
-    { 0x04d005c0, 0x044104dd, 0x000 },
-    { 0x04500507, 0x03510375, 0x000 },
-    { 0x05c005c0, 0x05c005c0, 0x000 },
-    { 0x05c005c0, 0x05c005c0, 0x000 },
-    { 0x05c005c0, 0x063f05c7, 0x000 },
-    { 0x05c005c0, 0x000705c0, 0x000 },
-    { 0x05c005c0, 0x05c005c0, 0x000 },
-    { 0x05c005c0, 0x05c005c0, 0x000 },
-    { 0x03f803ed, 0x04080406, 0x000 },
-    { 0x040e040a, 0x040c0410, 0x000 },
-    { 0x041c0418, 0x04240420, 0x000 },
-    { 0x042c0428, 0x04340430, 0x000 },
-    { 0x05c005c0, 0x043805c0, 0x000 },
-    { 0x05c005c0, 0x05c005c0, 0x000 },
-    { 0x05c005c0, 0x05c005c0, 0x000 },
-    { 0x00020679, 0x06970006, 0x000 },
-};
-static const u32 RV610_pfp_microcode[] = {
-0xca0400,
-0xa00000,
-0x7e828b,
-0x7c038b,
-0x8001b8,
-0x7c038b,
-0xd4401e,
-0xee001e,
-0xca0400,
-0xa00000,
-0x7e828b,
-0xc41838,
-0xca2400,
-0xca2800,
-0x9581a8,
-0xc41c3a,
-0xc3c000,
-0xca0800,
-0xca0c00,
-0x7c744b,
-0xc20005,
-0x99c000,
-0xc41c3a,
-0x7c744c,
-0xc0fff0,
-0x042c04,
-0x309002,
-0x7d2500,
-0x351402,
-0x7d350b,
-0x255403,
-0x7cd580,
-0x259c03,
-0x95c004,
-0xd5001b,
-0x7eddc1,
-0x7d9d80,
-0xd6801b,
-0xd5801b,
-0xd4401e,
-0xd5401e,
-0xd6401e,
-0xd6801e,
-0xd4801e,
-0xd4c01e,
-0x9783d3,
-0xd5c01e,
-0xca0800,
-0x80001a,
-0xca0c00,
-0xe4011e,
-0xd4001e,
-0x80000c,
-0xc41838,
-0xe4013e,
-0xd4001e,
-0x80000c,
-0xc41838,
-0xd4401e,
-0xee001e,
-0xca0400,
-0xa00000,
-0x7e828b,
-0xe4011e,
-0xd4001e,
-0xd4401e,
-0xee001e,
-0xca0400,
-0xa00000,
-0x7e828b,
-0xe4013e,
-0xd4001e,
-0xd4401e,
-0xee001e,
-0xca0400,
-0xa00000,
-0x7e828b,
-0xca1800,
-0xd4401e,
-0xd5801e,
-0x800053,
-0xd40075,
-0xd4401e,
-0xca0800,
-0xca0c00,
-0xca1000,
-0xd48019,
-0xd4c018,
-0xd50017,
-0xd4801e,
-0xd4c01e,
-0xd5001e,
-0xe2001e,
-0xca0400,
-0xa00000,
-0x7e828b,
-0xca0800,
-0xd48060,
-0xd4401e,
-0x800000,
-0xd4801e,
-0xca0800,
-0xd48061,
-0xd4401e,
-0x800000,
-0xd4801e,
-0xca0800,
-0xca0c00,
-0xd4401e,
-0xd48016,
-0xd4c016,
-0xd4801e,
-0x8001b8,
-0xd4c01e,
-0xc60843,
-0xca0c00,
-0xca1000,
-0x948004,
-0xca1400,
-0xe420f3,
-0xd42013,
-0xd56065,
-0xd4e01c,
-0xd5201c,
-0xd5601c,
-0x800000,
-0x062001,
-0xc60843,
-0xca0c00,
-0xca1000,
-0x9483f7,
-0xca1400,
-0xe420f3,
-0x800079,
-0xd42013,
-0xc60843,
-0xca0c00,
-0xca1000,
-0x9883ef,
-0xca1400,
-0xd40064,
-0x80008d,
-0x000000,
-0xc41432,
-0xc61843,
-0xc4082f,
-0x954005,
-0xc40c30,
-0xd4401e,
-0x800000,
-0xee001e,
-0x9583f5,
-0xc41031,
-0xd44033,
-0xd52065,
-0xd4a01c,
-0xd4e01c,
-0xd5201c,
-0xe4015e,
-0xd4001e,
-0x800000,
-0x062001,
-0xca1800,
-0x0a2001,
-0xd60076,
-0xc40836,
-0x988007,
-0xc61045,
-0x950110,
-0xd4001f,
-0xd46062,
-0x800000,
-0xd42062,
-0xcc3835,
-0xcc1433,
-0x8401bb,
-0xd40072,
-0xd5401e,
-0x800000,
-0xee001e,
-0xe2001a,
-0x8401bb,
-0xe2001a,
-0xcc104b,
-0xcc0447,
-0x2c9401,
-0x7d098b,
-0x984005,
-0x7d15cb,
-0xd4001a,
-0x8001b8,
-0xd4006d,
-0x344401,
-0xcc0c48,
-0x98403a,
-0xcc2c4a,
-0x958004,
-0xcc0449,
-0x8001b8,
-0xd4001a,
-0xd4c01a,
-0x282801,
-0x8400f0,
-0xcc1003,
-0x98801b,
-0x04380c,
-0x8400f0,
-0xcc1003,
-0x988017,
-0x043808,
-0x8400f0,
-0xcc1003,
-0x988013,
-0x043804,
-0x8400f0,
-0xcc1003,
-0x988014,
-0xcc104c,
-0x9a8009,
-0xcc144d,
-0x9840dc,
-0xd4006d,
-0xcc1848,
-0xd5001a,
-0xd5401a,
-0x8000c9,
-0xd5801a,
-0x96c0d5,
-0xd4006d,
-0x8001b8,
-0xd4006e,
-0x9ac003,
-0xd4006d,
-0xd4006e,
-0x800000,
-0xec007f,
-0x9ac0cc,
-0xd4006d,
-0x8001b8,
-0xd4006e,
-0xcc1403,
-0xcc1803,
-0xcc1c03,
-0x7d9103,
-0x7dd583,
-0x7d190c,
-0x35cc1f,
-0x35701f,
-0x7cf0cb,
-0x7cd08b,
-0x880000,
-0x7e8e8b,
-0x95c004,
-0xd4006e,
-0x8001b8,
-0xd4001a,
-0xd4c01a,
-0xcc0803,
-0xcc0c03,
-0xcc1003,
-0xcc1403,
-0xcc1803,
-0xcc1c03,
-0xcc2403,
-0xcc2803,
-0x35c41f,
-0x36b01f,
-0x7c704b,
-0x34f01f,
-0x7c704b,
-0x35701f,
-0x7c704b,
-0x7d8881,
-0x7dccc1,
-0x7e5101,
-0x7e9541,
-0x7c9082,
-0x7cd4c2,
-0x7c848b,
-0x9ac003,
-0x7c8c8b,
-0x2c8801,
-0x98809e,
-0xd4006d,
-0x98409c,
-0xd4006e,
-0xcc084c,
-0xcc0c4d,
-0xcc1048,
-0xd4801a,
-0xd4c01a,
-0x800101,
-0xd5001a,
-0xcc0832,
-0xd40032,
-0x9482d9,
-0xca0c00,
-0xd4401e,
-0x800000,
-0xd4001e,
-0xe4011e,
-0xd4001e,
-0xca0800,
-0xca0c00,
-0xca1000,
-0xd4401e,
-0xca1400,
-0xd4801e,
-0xd4c01e,
-0xd5001e,
-0xd5401e,
-0xd54034,
-0x800000,
-0xee001e,
-0x280404,
-0xe2001a,
-0xe2001a,
-0xd4401a,
-0xca3800,
-0xcc0803,
-0xcc0c03,
-0xcc0c03,
-0xcc0c03,
-0x9882bd,
-0x000000,
-0x8401bb,
-0xd7a06f,
-0x800000,
-0xee001f,
-0xca0400,
-0xc2ff00,
-0xcc0834,
-0xc13fff,
-0x7c74cb,
-0x7cc90b,
-0x7d010f,
-0x9902b0,
-0x7c738b,
-0x8401bb,
-0xd7a06f,
-0x800000,
-0xee001f,
-0xca0800,
-0x281900,
-0x7d898b,
-0x958014,
-0x281404,
-0xca0c00,
-0xca1000,
-0xca1c00,
-0xca2400,
-0xe2001f,
-0xd4c01a,
-0xd5001a,
-0xd5401a,
-0xcc1803,
-0xcc2c03,
-0xcc2c03,
-0xcc2c03,
-0x7da58b,
-0x7d9c47,
-0x984297,
-0x000000,
-0x800161,
-0xd4c01a,
-0xd4401e,
-0xd4801e,
-0x800000,
-0xee001e,
-0xe4011e,
-0xd4001e,
-0xd4401e,
-0xee001e,
-0xca0400,
-0xa00000,
-0x7e828b,
-0xe4013e,
-0xd4001e,
-0xd4401e,
-0xee001e,
-0xca0400,
-0xa00000,
-0x7e828b,
-0xca0800,
-0x248c06,
-0x0ccc06,
-0x98c006,
-0xcc104e,
-0x990004,
-0xd40073,
-0xe4011e,
-0xd4001e,
-0xd4401e,
-0xd4801e,
-0x800000,
-0xee001e,
-0xca0800,
-0xca0c00,
-0x34d018,
-0x251001,
-0x950021,
-0xc17fff,
-0xca1000,
-0xca1400,
-0xca1800,
-0xd4801d,
-0xd4c01d,
-0x7db18b,
-0xc14202,
-0xc2c001,
-0xd5801d,
-0x34dc0e,
-0x7d5d4c,
-0x7f734c,
-0xd7401e,
-0xd5001e,
-0xd5401e,
-0xc14200,
-0xc2c000,
-0x099c01,
-0x31dc10,
-0x7f5f4c,
-0x7f734c,
-0x042802,
-0x7d8380,
-0xd5a86f,
-0xd58066,
-0xd7401e,
-0xec005e,
-0xc82402,
-0xc82402,
-0x8001b8,
-0xd60076,
-0xd4401e,
-0xd4801e,
-0xd4c01e,
-0x800000,
-0xee001e,
-0x800000,
-0xee001f,
-0xd4001f,
-0x800000,
-0xd4001f,
-0xd4001f,
-0x880000,
-0xd4001f,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x010171,
-0x020178,
-0x03008f,
-0x04007f,
-0x050003,
-0x06003f,
-0x070032,
-0x08012c,
-0x090046,
-0x0a0036,
-0x1001b6,
-0x1700a2,
-0x22013a,
-0x230149,
-0x2000b4,
-0x240125,
-0x27004d,
-0x28006a,
-0x2a0060,
-0x2b0052,
-0x2f0065,
-0x320087,
-0x34017f,
-0x3c0156,
-0x3f0072,
-0x41018c,
-0x44012e,
-0x550173,
-0x56017a,
-0x60000b,
-0x610034,
-0x620038,
-0x630038,
-0x640038,
-0x650038,
-0x660038,
-0x670038,
-0x68003a,
-0x690041,
-0x6a0048,
-0x6b0048,
-0x6c0048,
-0x6d0048,
-0x6e0048,
-0x6f0048,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-};
-static const u32 RV620_cp_microcode[][3] = {
-    { 0x00000000, 0xc0200400, 0x000 },
-    { 0x00000000, 0x00a0000a, 0x000 },
-    { 0x0000ffff, 0x00284621, 0x000 },
-    { 0x00000000, 0xd9004800, 0x000 },
-    { 0x00000000, 0xc0200400, 0x000 },
-    { 0x00000000, 0x00a0000a, 0x000 },
-    { 0x00000000, 0x00e00000, 0x000 },
-    { 0x00010000, 0xc0294620, 0x000 },
-    { 0x00000000, 0xd9004800, 0x000 },
-    { 0x00000000, 0xc0200400, 0x000 },
-    { 0x00000000, 0x00a0000a, 0x000 },
-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x00000001, 0x00204811, 0x000 },
-    { 0x00042004, 0x00604411, 0x68d },
-    { 0x00000000, 0x00600000, 0x631 },
-    { 0x00000000, 0x00600000, 0x645 },
-    { 0x00000000, 0xc0200800, 0x000 },
-    { 0x00000f00, 0x00281622, 0x000 },
-    { 0x00000008, 0x00211625, 0x000 },
-    { 0x00000018, 0x00203625, 0x000 },
-    { 0x8d000000, 0x00204411, 0x000 },
-    { 0x00000004, 0x002f0225, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x018 },
-    { 0x00412000, 0x00404811, 0x019 },
-    { 0x00422000, 0x00204811, 0x000 },
-    { 0x8e000000, 0x00204411, 0x000 },
-    { 0x00000028, 0x00204a2d, 0x000 },
-    { 0x90000000, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204805, 0x000 },
-    { 0x0000000c, 0x00211622, 0x000 },
-    { 0x00000003, 0x00281625, 0x000 },
-    { 0x00000019, 0x00211a22, 0x000 },
-    { 0x00000004, 0x00281a26, 0x000 },
-    { 0x00000000, 0x002914c5, 0x000 },
-    { 0x00000019, 0x00203625, 0x000 },
-    { 0x00000000, 0x003a1402, 0x000 },
-    { 0x00000016, 0x00211625, 0x000 },
-    { 0x00000003, 0x00281625, 0x000 },
-    { 0x00000017, 0x00200e2d, 0x000 },
-    { 0xfffffffc, 0x00280e23, 0x000 },
-    { 0x00000000, 0x002914a3, 0x000 },
-    { 0x00000017, 0x00203625, 0x000 },
-    { 0x00008000, 0x00280e22, 0x000 },
-    { 0x00000007, 0x00220e23, 0x000 },
-    { 0x00000000, 0x0029386e, 0x000 },
-    { 0x20000000, 0x00280e22, 0x000 },
-    { 0x00000006, 0x00210e23, 0x000 },
-    { 0x00000000, 0x0029386e, 0x000 },
-    { 0x00000000, 0x00220222, 0x000 },
-    { 0x00000000, 0x14e00000, 0x038 },
-    { 0x00000000, 0x2ee00000, 0x035 },
-    { 0x00000000, 0x2ce00000, 0x037 },
-    { 0x00000000, 0x00400e2d, 0x039 },
-    { 0x00000008, 0x00200e2d, 0x000 },
-    { 0x00000009, 0x0040122d, 0x046 },
-    { 0x00000001, 0x00400e2d, 0x039 },
-    { 0x00000000, 0xc0200c00, 0x000 },
-    { 0x003ffffc, 0x00281223, 0x000 },
-    { 0x00000002, 0x00221224, 0x000 },
-    { 0x0000001f, 0x00211e23, 0x000 },
-    { 0x00000000, 0x14e00000, 0x03e },
-    { 0x00000008, 0x00401c11, 0x041 },
-    { 0x0000000d, 0x00201e2d, 0x000 },
-    { 0x0000000f, 0x00281e27, 0x000 },
-    { 0x00000003, 0x00221e27, 0x000 },
-    { 0x7fc00000, 0x00281a23, 0x000 },
-    { 0x00000014, 0x00211a26, 0x000 },
-    { 0x00000001, 0x00331a26, 0x000 },
-    { 0x00000008, 0x00221a26, 0x000 },
-    { 0x00000000, 0x00290cc7, 0x000 },
-    { 0x00000027, 0x00203624, 0x000 },
-    { 0x00007f00, 0x00281221, 0x000 },
-    { 0x00001400, 0x002f0224, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x04b },
-    { 0x00000001, 0x00290e23, 0x000 },
-    { 0x0000000e, 0x00203623, 0x000 },
-    { 0x0000e000, 0x00204411, 0x000 },
-    { 0xfff80000, 0x00294a23, 0x000 },
-    { 0x00000000, 0x003a2c02, 0x000 },
-    { 0x00000002, 0x00220e2b, 0x000 },
-    { 0xfc000000, 0x00280e23, 0x000 },
-    { 0x0000000f, 0x00203623, 0x000 },
-    { 0x00001fff, 0x00294a23, 0x000 },
-    { 0x00000027, 0x00204a2d, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x00000029, 0x00200e2d, 0x000 },
-    { 0x060a0200, 0x00294a23, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x00000001, 0x00210222, 0x000 },
-    { 0x00000000, 0x14e00000, 0x061 },
-    { 0x00000000, 0x2ee00000, 0x05f },
-    { 0x00000000, 0x2ce00000, 0x05e },
-    { 0x00000000, 0x00400e2d, 0x062 },
-    { 0x00000001, 0x00400e2d, 0x062 },
-    { 0x0000000a, 0x00200e2d, 0x000 },
-    { 0x0000000b, 0x0040122d, 0x06a },
-    { 0x00000000, 0xc0200c00, 0x000 },
-    { 0x003ffffc, 0x00281223, 0x000 },
-    { 0x00000002, 0x00221224, 0x000 },
-    { 0x7fc00000, 0x00281623, 0x000 },
-    { 0x00000014, 0x00211625, 0x000 },
-    { 0x00000001, 0x00331625, 0x000 },
-    { 0x80000000, 0x00280e23, 0x000 },
-    { 0x00000000, 0x00290ca3, 0x000 },
-    { 0x3ffffc00, 0x00290e23, 0x000 },
-    { 0x0000001f, 0x00211e23, 0x000 },
-    { 0x00000000, 0x14e00000, 0x06d },
-    { 0x00000100, 0x00401c11, 0x070 },
-    { 0x0000000d, 0x00201e2d, 0x000 },
-    { 0x000000f0, 0x00281e27, 0x000 },
-    { 0x00000004, 0x00221e27, 0x000 },
-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x0000000d, 0x00204811, 0x000 },
-    { 0xfffff0ff, 0x00281a30, 0x000 },
-    { 0x0000a028, 0x00204411, 0x000 },
-    { 0x00000000, 0x002948e6, 0x000 },
-    { 0x0000a018, 0x00204411, 0x000 },
-    { 0x3fffffff, 0x00284a23, 0x000 },
-    { 0x0000a010, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204804, 0x000 },
-    { 0x00000030, 0x0020162d, 0x000 },
-    { 0x00000002, 0x00291625, 0x000 },
-    { 0x00000030, 0x00203625, 0x000 },
-    { 0x00000025, 0x0020162d, 0x000 },
-    { 0x00000000, 0x002f00a3, 0x000 },
-    { 0x00000000, 0x0cc00000, 0x083 },
-    { 0x00000026, 0x0020162d, 0x000 },
-    { 0x00000000, 0x002f00a4, 0x000 },
-    { 0x00000000, 0x0cc00000, 0x084 },
-    { 0x00000000, 0x00400000, 0x08a },
-    { 0x00000025, 0x00203623, 0x000 },
-    { 0x00000026, 0x00203624, 0x000 },
-    { 0x00000017, 0x00201e2d, 0x000 },
-    { 0x00000002, 0x00210227, 0x000 },
-    { 0x00000000, 0x14e00000, 0x08a },
-    { 0x00000000, 0x00600000, 0x668 },
-    { 0x00000000, 0x00600000, 0x65c },
-    { 0x00000002, 0x00210e22, 0x000 },
-    { 0x00000000, 0x14c00000, 0x08d },
-    { 0x00000012, 0xc0403620, 0x093 },
-    { 0x00000000, 0x2ee00000, 0x091 },
-    { 0x00000000, 0x2ce00000, 0x090 },
-    { 0x00000002, 0x00400e2d, 0x092 },
-    { 0x00000003, 0x00400e2d, 0x092 },
-    { 0x0000000c, 0x00200e2d, 0x000 },
-    { 0x00000012, 0x00203623, 0x000 },
-    { 0x00000003, 0x00210e22, 0x000 },
-    { 0x00000000, 0x14c00000, 0x098 },
-    { 0x0000a00c, 0x00204411, 0x000 },
-    { 0x00000000, 0xc0204800, 0x000 },
-    { 0x00000000, 0xc0404800, 0x0a0 },
-    { 0x0000a00c, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x00000000, 0x2ee00000, 0x09e },
-    { 0x00000000, 0x2ce00000, 0x09d },
-    { 0x00000002, 0x00400e2d, 0x09f },
-    { 0x00000003, 0x00400e2d, 0x09f },
-    { 0x0000000c, 0x00200e2d, 0x000 },
-    { 0x00000000, 0x00204803, 0x000 },
-    { 0x00000000, 0x003a0c02, 0x000 },
-    { 0x003f0000, 0x00280e23, 0x000 },
-    { 0x00000010, 0x00210e23, 0x000 },
-    { 0x00000011, 0x00203623, 0x000 },
-    { 0x0000001e, 0x0021022b, 0x000 },
-    { 0x00000000, 0x14c00000, 0x0a7 },
-    { 0x00000016, 0xc0203620, 0x000 },
-    { 0x0000001f, 0x0021022b, 0x000 },
-    { 0x00000000, 0x14c00000, 0x0aa },
-    { 0x00000015, 0xc0203620, 0x000 },
-    { 0x00000008, 0x00210e2b, 0x000 },
-    { 0x0000007f, 0x00280e23, 0x000 },
-    { 0x00000000, 0x002f0223, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x0e1 },
-    { 0x00000000, 0x27000000, 0x000 },
-    { 0x00000000, 0x00600000, 0x2a3 },
-    { 0x00000001, 0x002f0223, 0x000 },
-    { 0x00000000, 0x0ae00000, 0x0b3 },
-    { 0x00000000, 0x00600000, 0x13a },
-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x00000006, 0x00204811, 0x000 },
-    { 0x0000000c, 0x00221e30, 0x000 },
-    { 0x99800000, 0x00204411, 0x000 },
-    { 0x00000004, 0x0020122d, 0x000 },
-    { 0x00000008, 0x00221224, 0x000 },
-    { 0x00000010, 0x00201811, 0x000 },
-    { 0x00000000, 0x00291ce4, 0x000 },
-    { 0x00000000, 0x00604807, 0x12f },
-    { 0x9b000000, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204802, 0x000 },
-    { 0x9c000000, 0x00204411, 0x000 },
-    { 0x00000000, 0x0033146f, 0x000 },
-    { 0x00000001, 0x00333e23, 0x000 },
-    { 0x00000000, 0xd9004800, 0x000 },
-    { 0x00000000, 0x00203c05, 0x000 },
-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x0000000e, 0x00204811, 0x000 },
-    { 0x00000000, 0x00201010, 0x000 },
-    { 0x0000e007, 0x00204411, 0x000 },
-    { 0x0000000f, 0x0021022b, 0x000 },
-    { 0x00000000, 0x14c00000, 0x0cb },
-    { 0x00f8ff08, 0x00204811, 0x000 },
-    { 0x98000000, 0x00404811, 0x0dc },
-    { 0x000000f0, 0x00280e22, 0x000 },
-    { 0x000000a0, 0x002f0223, 0x000 },
-    { 0x00000000, 0x0cc00000, 0x0da },
-    { 0x00000011, 0x00200e2d, 0x000 },
-    { 0x00000001, 0x002f0223, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x0d5 },
-    { 0x00000002, 0x002f0223, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x0d4 },
-    { 0x00003f00, 0x00400c11, 0x0d6 },
-    { 0x00001f00, 0x00400c11, 0x0d6 },
-    { 0x00000f00, 0x00200c11, 0x000 },
-    { 0x00380009, 0x00294a23, 0x000 },
-    { 0x3f000000, 0x00280e2b, 0x000 },
-    { 0x00000002, 0x00220e23, 0x000 },
-    { 0x00000007, 0x00494a23, 0x0dc },
-    { 0x00380f09, 0x00204811, 0x000 },
-    { 0x68000007, 0x00204811, 0x000 },
-    { 0x00000008, 0x00214a27, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x060a0200, 0x00294a24, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x0000a202, 0x00204411, 0x000 },
-    { 0x00ff0000, 0x00280e22, 0x000 },
-    { 0x00000080, 0x00294a23, 0x000 },
-    { 0x00000027, 0x00200e2d, 0x000 },
-    { 0x00000026, 0x0020122d, 0x000 },
-    { 0x00000000, 0x002f0083, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x0ea },
-    { 0x00000000, 0x00600000, 0x662 },
-    { 0x00000000, 0x00400000, 0x0eb },
-    { 0x00000000, 0x00600000, 0x665 },
-    { 0x00000007, 0x0020222d, 0x000 },
-    { 0x00000005, 0x00220e22, 0x000 },
-    { 0x00100000, 0x00280e23, 0x000 },
-    { 0x00000000, 0x00292068, 0x000 },
-    { 0x00000000, 0x003a0c02, 0x000 },
-    { 0x000000ef, 0x00280e23, 0x000 },
-    { 0x00000000, 0x00292068, 0x000 },
-    { 0x00000017, 0x00200e2d, 0x000 },
-    { 0x00000003, 0x00210223, 0x000 },
-    { 0x00000000, 0x14e00000, 0x0f8 },
-    { 0x0000000b, 0x00210228, 0x000 },
-    { 0x00000000, 0x14c00000, 0x0f8 },
-    { 0x00000400, 0x00292228, 0x000 },
-    { 0x00000014, 0x00203628, 0x000 },
-    { 0x0000001c, 0x00210e22, 0x000 },
-    { 0x00000000, 0x14c00000, 0x0fd },
-    { 0x0000a30c, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x0000001e, 0x00210e22, 0x000 },
-    { 0x00000000, 0x14c00000, 0x10b },
-    { 0x0000a30f, 0x00204411, 0x000 },
-    { 0x00000011, 0x00200e2d, 0x000 },
-    { 0x00000001, 0x002f0223, 0x000 },
-    { 0x00000000, 0x0cc00000, 0x104 },
-    { 0xffffffff, 0x00404811, 0x10b },
-    { 0x00000002, 0x002f0223, 0x000 },
-    { 0x00000000, 0x0cc00000, 0x107 },
-    { 0x0000ffff, 0x00404811, 0x10b },
-    { 0x00000004, 0x002f0223, 0x000 },
-    { 0x00000000, 0x0cc00000, 0x10a },
-    { 0x000000ff, 0x00404811, 0x10b },
-    { 0x00000001, 0x00204811, 0x000 },
-    { 0x0002c400, 0x00204411, 0x000 },
-    { 0x0000001f, 0x00210e22, 0x000 },
-    { 0x00000000, 0x14c00000, 0x112 },
-    { 0x00000010, 0x40210e20, 0x000 },
-    { 0x00000013, 0x00203623, 0x000 },
-    { 0x00000018, 0x40224a20, 0x000 },
-    { 0x00000010, 0xc0424a20, 0x114 },
-    { 0x00000000, 0x00200c11, 0x000 },
-    { 0x00000013, 0x00203623, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x0000000a, 0x00201011, 0x000 },
-    { 0x00000000, 0x002f0224, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x11b },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x00000001, 0x00531224, 0x117 },
-    { 0xffbfffff, 0x00283a2e, 0x000 },
-    { 0x0000001b, 0x00210222, 0x000 },
-    { 0x00000000, 0x14c00000, 0x12e },
-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x0000000d, 0x00204811, 0x000 },
-    { 0x00000018, 0x00220e30, 0x000 },
-    { 0xfc000000, 0x00280e23, 0x000 },
-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x0000000e, 0x00204811, 0x000 },
-    { 0x00000000, 0x00201010, 0x000 },
-    { 0x0000e00e, 0x00204411, 0x000 },
-    { 0x07f8ff08, 0x00204811, 0x000 },
-    { 0x00000000, 0x00294a23, 0x000 },
-    { 0x0000001c, 0x00201e2d, 0x000 },
-    { 0x00000008, 0x00214a27, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x060a0200, 0x00294a24, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x00000000, 0x00800000, 0x000 },
-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x00000001, 0x00204811, 0x000 },
-    { 0x0000217c, 0x00204411, 0x000 },
-    { 0x00800000, 0x00204811, 0x000 },
-    { 0x00000000, 0x00204806, 0x000 },
-    { 0x00000008, 0x00214a27, 0x000 },
-    { 0x00000000, 0x17000000, 0x000 },
-    { 0x0004217f, 0x00604411, 0x68d },
-    { 0x0000001f, 0x00210230, 0x000 },
-    { 0x00000000, 0x14c00000, 0x68c },
-    { 0x00000004, 0x00404c11, 0x135 },
-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x00000001, 0x00204811, 0x000 },
-    { 0x000021f8, 0x00204411, 0x000 },
-    { 0x0000001c, 0x00204811, 0x000 },
-    { 0x000421f9, 0x00604411, 0x68d },
-    { 0x00000011, 0x00210230, 0x000 },
-    { 0x00000000, 0x14e00000, 0x13c },
-    { 0x00000000, 0x00800000, 0x000 },
-    { 0x00000000, 0x00600000, 0x00b },
-    { 0x00000000, 0x00600411, 0x315 },
-    { 0x00000000, 0x00200411, 0x000 },
-    { 0x00000000, 0x00600811, 0x1b2 },
-    { 0x00000000, 0x00600000, 0x160 },
-    { 0x0000ffff, 0x40280e20, 0x000 },
-    { 0x00000010, 0xc0211220, 0x000 },
-    { 0x0000ffff, 0x40280620, 0x000 },
-    { 0x00000010, 0xc0210a20, 0x000 },
-    { 0x00000000, 0x00341461, 0x000 },
-    { 0x00000000, 0x00741882, 0x2bb },
-    { 0x0001a1fd, 0x00604411, 0x2e0 },
-    { 0x00003fff, 0x002f022f, 0x000 },
-    { 0x00000000, 0x0cc00000, 0x147 },
-    { 0x00000000, 0xc0400400, 0x001 },
-    { 0x00000000, 0x00600000, 0x00b },
-    { 0x00000000, 0x00600411, 0x315 },
-    { 0x00000000, 0x00200411, 0x000 },
-    { 0x00000000, 0x00600811, 0x1b2 },
-    { 0x00003fff, 0x002f022f, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x000 },
-    { 0x00000000, 0x00600000, 0x160 },
-    { 0x00000010, 0x40210e20, 0x000 },
-    { 0x0000ffff, 0xc0281220, 0x000 },
-    { 0x00000010, 0x40211620, 0x000 },
-    { 0x0000ffff, 0xc0681a20, 0x2bb },
-    { 0x0001a1fd, 0x00604411, 0x2e0 },
-    { 0x00003fff, 0x002f022f, 0x000 },
-    { 0x00000000, 0x0cc00000, 0x158 },
-    { 0x00000000, 0xc0400400, 0x001 },
-    { 0x0000225c, 0x00204411, 0x000 },
-    { 0x00000001, 0x00300a2f, 0x000 },
-    { 0x00000001, 0x00210a22, 0x000 },
-    { 0x00000003, 0x00384a22, 0x000 },
-    { 0x00002256, 0x00204411, 0x000 },
-    { 0x0000001a, 0x00204811, 0x000 },
-    { 0x0000a1fc, 0x00204411, 0x000 },
-    { 0x00000001, 0x00804811, 0x000 },
-    { 0x00000000, 0x00600000, 0x00b },
-    { 0x00000000, 0x00600000, 0x18f },
-    { 0x00000000, 0x00600000, 0x1a0 },
-    { 0x00003fff, 0x002f022f, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x000 },
-    { 0x00000000, 0x00202c08, 0x000 },
-    { 0x00000000, 0x00202411, 0x000 },
-    { 0x00000000, 0x00202811, 0x000 },
-    { 0x00002256, 0x00204411, 0x000 },
-    { 0x00000016, 0x00204811, 0x000 },
-    { 0x0000225c, 0x00204411, 0x000 },
-    { 0x00000003, 0x00204811, 0x000 },
-    { 0x93800000, 0x00204411, 0x000 },
-    { 0x00000002, 0x00221e29, 0x000 },
-    { 0x00000000, 0x007048eb, 0x19c },
-    { 0x00000000, 0x00600000, 0x2bb },
-    { 0x00000001, 0x40330620, 0x000 },
-    { 0x00000000, 0xc0302409, 0x000 },
-    { 0x00003fff, 0x002f022f, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x000 },
-    { 0x00000000, 0x00600000, 0x2a3 },
-    { 0x00000000, 0x002f0221, 0x000 },
-    { 0x00000000, 0x0ae00000, 0x181 },
-    { 0x00000000, 0x00600000, 0x13a },
-    { 0x00000000, 0x00400000, 0x186 },
-    { 0x95000000, 0x00204411, 0x000 },
-    { 0x00000000, 0x002f0221, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x186 },
-    { 0x00000000, 0xc0204800, 0x000 },
-    { 0x00000001, 0x00530621, 0x182 },
-    { 0x92000000, 0x00204411, 0x000 },
-    { 0x00000000, 0xc0604800, 0x197 },
-    { 0x0001a1fd, 0x00204411, 0x000 },
-    { 0x00000011, 0x0020062d, 0x000 },
-    { 0x00000000, 0x0078042a, 0x2fb },
-    { 0x00000000, 0x00202809, 0x000 },
-    { 0x00003fff, 0x002f022f, 0x000 },
-    { 0x00000000, 0x0cc00000, 0x174 },
-    { 0x00000000, 0xc0400400, 0x001 },
-    { 0x00000210, 0x00600411, 0x315 },
-    { 0x00003fff, 0x002f022f, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x194 },
-    { 0x00000015, 0xc0203620, 0x000 },
-    { 0x00000016, 0xc0203620, 0x000 },
-    { 0x3f800000, 0x00200411, 0x000 },
-    { 0x46000000, 0x00600811, 0x1b2 },
-    { 0x00000000, 0x00800000, 0x000 },
-    { 0x0000a1fc, 0x00204411, 0x000 },
-    { 0x00003fff, 0x002f022f, 0x000 },
-    { 0x00000000, 0x0cc00000, 0x19b },
-    { 0x00000001, 0x00804811, 0x000 },
-    { 0x00000021, 0x00804811, 0x000 },
-    { 0x0000ffff, 0x40280e20, 0x000 },
-    { 0x00000010, 0xc0211220, 0x000 },
-    { 0x0000ffff, 0x40281620, 0x000 },
-    { 0x00000010, 0xc0811a20, 0x000 },
-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x00000006, 0x00204811, 0x000 },
-    { 0x00000008, 0x00221e30, 0x000 },
-    { 0x00000029, 0x00201a2d, 0x000 },
-    { 0x0000e000, 0x00204411, 0x000 },
-    { 0xfffbff09, 0x00204811, 0x000 },
-    { 0x0000000f, 0x0020222d, 0x000 },
-    { 0x00001fff, 0x00294a28, 0x000 },
-    { 0x00000006, 0x0020222d, 0x000 },
-    { 0x00000000, 0x002920e8, 0x000 },
-    { 0x00000000, 0x00204808, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x060a0200, 0x00294a26, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x00000100, 0x00201811, 0x000 },
-    { 0x00000008, 0x00621e28, 0x12f },
-    { 0x00000008, 0x00822228, 0x000 },
-    { 0x0002c000, 0x00204411, 0x000 },
-    { 0x00000015, 0x00600e2d, 0x1bd },
-    { 0x00000016, 0x00600e2d, 0x1bd },
-    { 0x0000c008, 0x00204411, 0x000 },
-    { 0x00000017, 0x00200e2d, 0x000 },
-    { 0x00000000, 0x14c00000, 0x1b9 },
-    { 0x00000000, 0x00200411, 0x000 },
-    { 0x00000000, 0x00204801, 0x000 },
-    { 0x39000000, 0x00204811, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x00000000, 0x00804802, 0x000 },
-    { 0x00000018, 0x00202e2d, 0x000 },
-    { 0x00000000, 0x003b0d63, 0x000 },
-    { 0x00000008, 0x00224a23, 0x000 },
-    { 0x00000010, 0x00224a23, 0x000 },
-    { 0x00000018, 0x00224a23, 0x000 },
-    { 0x00000000, 0x00804803, 0x000 },
-    { 0x00000000, 0x00600000, 0x00b },
-    { 0x00001000, 0x00600411, 0x315 },
-    { 0x00000000, 0x00200411, 0x000 },
-    { 0x00000000, 0x00600811, 0x1b2 },
-    { 0x00000007, 0x0021062f, 0x000 },
-    { 0x00000013, 0x00200a2d, 0x000 },
-    { 0x00000001, 0x00202c11, 0x000 },
-    { 0x0000ffff, 0x40282220, 0x000 },
-    { 0x0000000f, 0x00262228, 0x000 },
-    { 0x00000010, 0x40212620, 0x000 },
-    { 0x0000000f, 0x00262629, 0x000 },
-    { 0x00000000, 0x00202802, 0x000 },
-    { 0x00002256, 0x00204411, 0x000 },
-    { 0x0000001b, 0x00204811, 0x000 },
-    { 0x00000000, 0x002f0221, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x1e0 },
-    { 0x0000225c, 0x00204411, 0x000 },
-    { 0x00000081, 0x00204811, 0x000 },
-    { 0x0000a1fc, 0x00204411, 0x000 },
-    { 0x00000001, 0x00204811, 0x000 },
-    { 0x00000080, 0x00201c11, 0x000 },
-    { 0x00000000, 0x002f0227, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x1dc },
-    { 0x00000000, 0x00600000, 0x1e9 },
-    { 0x00000001, 0x00531e27, 0x1d8 },
-    { 0x00000001, 0x00202c11, 0x000 },
-    { 0x0000001f, 0x00280a22, 0x000 },
-    { 0x0000001f, 0x00282a2a, 0x000 },
-    { 0x00000001, 0x00530621, 0x1d1 },
-    { 0x0000225c, 0x00204411, 0x000 },
-    { 0x00000002, 0x00304a2f, 0x000 },
-    { 0x0000a1fc, 0x00204411, 0x000 },
-    { 0x00000001, 0x00204811, 0x000 },
-    { 0x00000001, 0x00301e2f, 0x000 },
-    { 0x00000000, 0x002f0227, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x000 },
-    { 0x00000000, 0x00600000, 0x1e9 },
-    { 0x00000001, 0x00531e27, 0x1e5 },
-    { 0x0000ffff, 0x40280e20, 0x000 },
-    { 0x0000000f, 0x00260e23, 0x000 },
-    { 0x00000010, 0xc0211220, 0x000 },
-    { 0x0000000f, 0x00261224, 0x000 },
-    { 0x00000000, 0x00201411, 0x000 },
-    { 0x00000000, 0x00601811, 0x2bb },
-    { 0x0001a1fd, 0x00204411, 0x000 },
-    { 0x00000000, 0x002f022b, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x1f8 },
-    { 0x00000010, 0x00221628, 0x000 },
-    { 0xffff0000, 0x00281625, 0x000 },
-    { 0x0000ffff, 0x00281a29, 0x000 },
-    { 0x00000000, 0x002948c5, 0x000 },
-    { 0x00000000, 0x0020480a, 0x000 },
-    { 0x00000000, 0x00202c11, 0x000 },
-    { 0x00000010, 0x00221623, 0x000 },
-    { 0xffff0000, 0x00281625, 0x000 },
-    { 0x0000ffff, 0x00281a24, 0x000 },
-    { 0x00000000, 0x002948c5, 0x000 },
-    { 0x00000000, 0x00731503, 0x205 },
-    { 0x00000000, 0x00201805, 0x000 },
-    { 0x00000000, 0x00731524, 0x205 },
-    { 0x00000000, 0x002d14c5, 0x000 },
-    { 0x00000000, 0x003008a2, 0x000 },
-    { 0x00000000, 0x00204802, 0x000 },
-    { 0x00000000, 0x00202802, 0x000 },
-    { 0x00000000, 0x00202003, 0x000 },
-    { 0x00000000, 0x00802404, 0x000 },
-    { 0x0000000f, 0x00210225, 0x000 },
-    { 0x00000000, 0x14c00000, 0x68c },
-    { 0x00000000, 0x002b1405, 0x000 },
-    { 0x00000001, 0x00901625, 0x000 },
-    { 0x00000000, 0x00600000, 0x00b },
-    { 0x00000000, 0x00600411, 0x315 },
-    { 0x00000000, 0x00200411, 0x000 },
-    { 0x00000000, 0x00600811, 0x1b2 },
-    { 0x00002256, 0x00204411, 0x000 },
-    { 0x0000001a, 0x00294a22, 0x000 },
-    { 0x00000000, 0xc0200000, 0x000 },
-    { 0x00003fff, 0x002f022f, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x000 },
-    { 0x00000000, 0xc0200400, 0x000 },
-    { 0x0000225c, 0x00204411, 0x000 },
-    { 0x00000003, 0x00384a21, 0x000 },
-    { 0x0000a1fc, 0x00204411, 0x000 },
-    { 0x00000001, 0x00204811, 0x000 },
-    { 0x0000ffff, 0x40281220, 0x000 },
-    { 0x00000010, 0xc0211a20, 0x000 },
-    { 0x0000ffff, 0x40280e20, 0x000 },
-    { 0x00000010, 0xc0211620, 0x000 },
-    { 0x00000000, 0x00741465, 0x2bb },
-    { 0x0001a1fd, 0x00604411, 0x2e0 },
-    { 0x00000001, 0x00330621, 0x000 },
-    { 0x00000000, 0x002f0221, 0x000 },
-    { 0x00000000, 0x0cc00000, 0x219 },
-    { 0x00003fff, 0x002f022f, 0x000 },
-    { 0x00000000, 0x0cc00000, 0x212 },
-    { 0x00000000, 0xc0400400, 0x001 },
-    { 0x00000000, 0x00600000, 0x645 },
-    { 0x00000000, 0x0040040f, 0x213 },
-    { 0x00000000, 0x00600000, 0x631 },
-    { 0x00000000, 0x00600000, 0x645 },
-    { 0x00000210, 0x00600411, 0x315 },
-    { 0x00000000, 0x00600000, 0x1a0 },
-    { 0x00000000, 0x00600000, 0x19c },
-    { 0x00000000, 0x00600000, 0x2bb },
-    { 0x00000000, 0x00600000, 0x2a3 },
-    { 0x93800000, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204808, 0x000 },
-    { 0x00000000, 0x002f022f, 0x000 },
-    { 0x00000000, 0x0ae00000, 0x232 },
-    { 0x00000000, 0x00600000, 0x13a },
-    { 0x00000000, 0x00400000, 0x236 },
-    { 0x95000000, 0x00204411, 0x000 },
-    { 0x00000000, 0x002f022f, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x236 },
-    { 0x00000000, 0xc0404800, 0x233 },
-    { 0x92000000, 0x00204411, 0x000 },
-    { 0x00000000, 0xc0204800, 0x000 },
-    { 0x00002256, 0x00204411, 0x000 },
-    { 0x00000016, 0x00204811, 0x000 },
-    { 0x0000225c, 0x00204411, 0x000 },
-    { 0x00000003, 0x00204811, 0x000 },
-    { 0x0000a1fc, 0x00204411, 0x000 },
-    { 0x00000001, 0x00204811, 0x000 },
-    { 0x0001a1fd, 0x00204411, 0x000 },
-    { 0x00000000, 0x00600411, 0x2fb },
-    { 0x00000000, 0xc0400400, 0x001 },
-    { 0x00000000, 0x00600000, 0x631 },
-    { 0x0000a00c, 0x00204411, 0x000 },
-    { 0x00000000, 0xc0204800, 0x000 },
-    { 0x00000000, 0xc0404800, 0x000 },
-    { 0x00000000, 0x00600000, 0x00b },
-    { 0x00000018, 0x40210a20, 0x000 },
-    { 0x00000003, 0x002f0222, 0x000 },
-    { 0x00000000, 0x0ae00000, 0x24c },
-    { 0x00000014, 0x0020222d, 0x000 },
-    { 0x00080101, 0x00292228, 0x000 },
-    { 0x00000014, 0x00203628, 0x000 },
-    { 0x0000a30c, 0x00204411, 0x000 },
-    { 0x00000000, 0xc0204800, 0x000 },
-    { 0x00000000, 0xc0204800, 0x000 },
-    { 0x00000000, 0xc0404800, 0x251 },
-    { 0x00000000, 0x00600000, 0x00b },
-    { 0x00000010, 0x00600411, 0x315 },
-    { 0x3f800000, 0x00200411, 0x000 },
-    { 0x00000000, 0x00600811, 0x1b2 },
-    { 0x0000225c, 0x00204411, 0x000 },
-    { 0x00000003, 0x00204811, 0x000 },
-    { 0x00000000, 0x00600000, 0x27c },
-    { 0x00000017, 0x00201e2d, 0x000 },
-    { 0x00000001, 0x00211e27, 0x000 },
-    { 0x00000000, 0x14e00000, 0x26a },
-    { 0x00000012, 0x00201e2d, 0x000 },
-    { 0x0000ffff, 0x00281e27, 0x000 },
-    { 0x00000000, 0x00341c27, 0x000 },
-    { 0x00000000, 0x12c00000, 0x25f },
-    { 0x00000000, 0x00201c11, 0x000 },
-    { 0x00000000, 0x002f00e5, 0x000 },
-    { 0x00000000, 0x08c00000, 0x262 },
-    { 0x00000000, 0x00201407, 0x000 },
-    { 0x00000012, 0x00201e2d, 0x000 },
-    { 0x00000010, 0x00211e27, 0x000 },
-    { 0x00000000, 0x00341c47, 0x000 },
-    { 0x00000000, 0x12c00000, 0x267 },
-    { 0x00000000, 0x00201c11, 0x000 },
-    { 0x00000000, 0x002f00e6, 0x000 },
-    { 0x00000000, 0x08c00000, 0x26a },
-    { 0x00000000, 0x00201807, 0x000 },
-    { 0x00000000, 0x00600000, 0x2c1 },
-    { 0x00002256, 0x00204411, 0x000 },
-    { 0x00000000, 0x00342023, 0x000 },
-    { 0x00000000, 0x12c00000, 0x272 },
-    { 0x00000000, 0x00342044, 0x000 },
-    { 0x00000000, 0x12c00000, 0x271 },
-    { 0x00000016, 0x00404811, 0x276 },
-    { 0x00000018, 0x00404811, 0x276 },
-    { 0x00000000, 0x00342044, 0x000 },
-    { 0x00000000, 0x12c00000, 0x275 },
-    { 0x00000017, 0x00404811, 0x276 },
-    { 0x00000019, 0x00204811, 0x000 },
-    { 0x0000a1fc, 0x00204411, 0x000 },
-    { 0x00000001, 0x00204811, 0x000 },
-    { 0x0001a1fd, 0x00604411, 0x2e9 },
-    { 0x00003fff, 0x002f022f, 0x000 },
-    { 0x00000000, 0x0cc00000, 0x256 },
-    { 0x00000000, 0xc0400400, 0x001 },
-    { 0x00000010, 0x40210620, 0x000 },
-    { 0x0000ffff, 0xc0280a20, 0x000 },
-    { 0x00000010, 0x40210e20, 0x000 },
-    { 0x0000ffff, 0xc0281220, 0x000 },
-    { 0x00000010, 0x40211620, 0x000 },
-    { 0x0000ffff, 0xc0881a20, 0x000 },
-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x00000001, 0x00204811, 0x000 },
-    { 0x00042004, 0x00604411, 0x68d },
-    { 0x00000000, 0x00600000, 0x631 },
-    { 0x00000000, 0xc0600000, 0x2a3 },
-    { 0x00000005, 0x00200a2d, 0x000 },
-    { 0x00000008, 0x00220a22, 0x000 },
-    { 0x0000002b, 0x00201a2d, 0x000 },
-    { 0x0000001c, 0x00201e2d, 0x000 },
-    { 0x00007000, 0x00281e27, 0x000 },
-    { 0x00000000, 0x00311ce6, 0x000 },
-    { 0x0000002a, 0x00201a2d, 0x000 },
-    { 0x0000000c, 0x00221a26, 0x000 },
-    { 0x00000000, 0x002f00e6, 0x000 },
-    { 0x00000000, 0x06e00000, 0x292 },
-    { 0x00000000, 0x00201c11, 0x000 },
-    { 0x00000000, 0x00200c11, 0x000 },
-    { 0x0000002b, 0x00203623, 0x000 },
-    { 0x00000010, 0x00201811, 0x000 },
-    { 0x00000000, 0x00691ce2, 0x12f },
-    { 0x93800000, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204807, 0x000 },
-    { 0x95000000, 0x00204411, 0x000 },
-    { 0x00000000, 0x002f022f, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x29d },
-    { 0x00000001, 0x00333e2f, 0x000 },
-    { 0x00000000, 0xd9004800, 0x000 },
-    { 0x92000000, 0x00204411, 0x000 },
-    { 0x00000000, 0xc0204800, 0x000 },
-    { 0x0000001c, 0x00403627, 0x000 },
-    { 0x0000000c, 0xc0220a20, 0x000 },
-    { 0x00000029, 0x00203622, 0x000 },
-    { 0x00000028, 0xc0403620, 0x000 },
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-    { 0x00000009, 0x00204811, 0x000 },
-    { 0xa1000000, 0x00204411, 0x000 },
-    { 0x00000001, 0x00804811, 0x000 },
-    { 0x00000021, 0x00201e2d, 0x000 },
-    { 0x00000000, 0x002c1ce3, 0x000 },
-    { 0x00000021, 0x00203627, 0x000 },
-    { 0x00000022, 0x00201e2d, 0x000 },
-    { 0x00000000, 0x002c1ce4, 0x000 },
-    { 0x00000022, 0x00203627, 0x000 },
-    { 0x00000023, 0x00201e2d, 0x000 },
-    { 0x00000000, 0x003120a3, 0x000 },
-    { 0x00000000, 0x002d1d07, 0x000 },
-    { 0x00000023, 0x00203627, 0x000 },
-    { 0x00000024, 0x00201e2d, 0x000 },
-    { 0x00000000, 0x003120c4, 0x000 },
-    { 0x00000000, 0x002d1d07, 0x000 },
-    { 0x00000024, 0x00803627, 0x000 },
-    { 0x00000021, 0x00203623, 0x000 },
-    { 0x00000022, 0x00203624, 0x000 },
-    { 0x00000000, 0x00311ca3, 0x000 },
-    { 0x00000023, 0x00203627, 0x000 },
-    { 0x00000000, 0x00311cc4, 0x000 },
-    { 0x00000024, 0x00803627, 0x000 },
-    { 0x0000001a, 0x00203627, 0x000 },
-    { 0x0000001b, 0x00203628, 0x000 },
-    { 0x00000017, 0x00201e2d, 0x000 },
-    { 0x00000002, 0x00210227, 0x000 },
-    { 0x00000000, 0x14c00000, 0x2dc },
-    { 0x00000000, 0x00400000, 0x2d9 },
-    { 0x0000001a, 0x00203627, 0x000 },
-    { 0x0000001b, 0x00203628, 0x000 },
-    { 0x00000017, 0x00201e2d, 0x000 },
-    { 0x00000002, 0x00210227, 0x000 },
-    { 0x00000000, 0x14e00000, 0x2d9 },
-    { 0x00000003, 0x00210227, 0x000 },
-    { 0x00000000, 0x14e00000, 0x2dc },
-    { 0x00000023, 0x00201e2d, 0x000 },
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-    { 0x00000000, 0x02c00000, 0x2dc },
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-    { 0x00000000, 0x003120a1, 0x000 },
-    { 0x00000000, 0x002e00e8, 0x000 },
-    { 0x00000000, 0x06c00000, 0x2dc },
-    { 0x00000024, 0x00201e2d, 0x000 },
-    { 0x00000000, 0x002e00e2, 0x000 },
-    { 0x00000000, 0x02c00000, 0x2dc },
-    { 0x00000022, 0x00201e2d, 0x000 },
-    { 0x00000000, 0x003120c2, 0x000 },
-    { 0x00000000, 0x002e00e8, 0x000 },
-    { 0x00000000, 0x06c00000, 0x2dc },
-    { 0x00000000, 0x00600000, 0x668 },
-    { 0x00000000, 0x00600000, 0x2b5 },
-    { 0x00000000, 0x00400000, 0x2de },
-    { 0x00000000, 0x00600000, 0x2b5 },
-    { 0x00000000, 0x00600000, 0x65f },
-    { 0x00000000, 0x00400000, 0x2de },
-    { 0x00000000, 0x00600000, 0x2a7 },
-    { 0x00000000, 0x00400000, 0x2de },
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-    { 0x0000001b, 0x0080222d, 0x000 },
-    { 0x00000010, 0x00221e23, 0x000 },
-    { 0x00000000, 0x00294887, 0x000 },
-    { 0x00000000, 0x00311ca3, 0x000 },
-    { 0x00000010, 0x00221e27, 0x000 },
-    { 0x00000000, 0x00294887, 0x000 },
-    { 0x00000010, 0x00221e23, 0x000 },
-    { 0x00000000, 0x003120c4, 0x000 },
-    { 0x0000ffff, 0x00282228, 0x000 },
-    { 0x00000000, 0x00894907, 0x000 },
-    { 0x00000010, 0x00221e23, 0x000 },
-    { 0x00000000, 0x00294887, 0x000 },
-    { 0x00000010, 0x00221e21, 0x000 },
-    { 0x00000000, 0x00294847, 0x000 },
-    { 0x00000000, 0x00311ca3, 0x000 },
-    { 0x00000010, 0x00221e27, 0x000 },
-    { 0x00000000, 0x00294887, 0x000 },
-    { 0x00000000, 0x00311ca1, 0x000 },
-    { 0x00000010, 0x00221e27, 0x000 },
-    { 0x00000000, 0x00294847, 0x000 },
-    { 0x00000010, 0x00221e23, 0x000 },
-    { 0x00000000, 0x003120c4, 0x000 },
-    { 0x0000ffff, 0x00282228, 0x000 },
-    { 0x00000000, 0x00294907, 0x000 },
-    { 0x00000010, 0x00221e21, 0x000 },
-    { 0x00000000, 0x003120c2, 0x000 },
-    { 0x0000ffff, 0x00282228, 0x000 },
-    { 0x00000000, 0x00894907, 0x000 },
-    { 0x00000010, 0x00221e23, 0x000 },
-    { 0x00000000, 0x00294887, 0x000 },
-    { 0x00000001, 0x00220a21, 0x000 },
-    { 0x00000000, 0x003308a2, 0x000 },
-    { 0x00000010, 0x00221e22, 0x000 },
-    { 0x00000010, 0x00212222, 0x000 },
-    { 0x00000000, 0x00294907, 0x000 },
-    { 0x00000000, 0x00311ca3, 0x000 },
-    { 0x00000010, 0x00221e27, 0x000 },
-    { 0x00000000, 0x00294887, 0x000 },
-    { 0x00000001, 0x00220a21, 0x000 },
-    { 0x00000000, 0x003008a2, 0x000 },
-    { 0x00000010, 0x00221e22, 0x000 },
-    { 0x00000010, 0x00212222, 0x000 },
-    { 0x00000000, 0x00294907, 0x000 },
-    { 0x00000010, 0x00221e23, 0x000 },
-    { 0x00000000, 0x003120c4, 0x000 },
-    { 0x0000ffff, 0x00282228, 0x000 },
-    { 0x00000000, 0x00294907, 0x000 },
-    { 0x00000000, 0x003808c5, 0x000 },
-    { 0x00000000, 0x00300841, 0x000 },
-    { 0x00000001, 0x00220a22, 0x000 },
-    { 0x00000000, 0x003308a2, 0x000 },
-    { 0x00000010, 0x00221e22, 0x000 },
-    { 0x00000010, 0x00212222, 0x000 },
-    { 0x00000000, 0x00894907, 0x000 },
-    { 0x00000017, 0x0020222d, 0x000 },
-    { 0x00000000, 0x14c00000, 0x318 },
-    { 0xffffffef, 0x00280621, 0x000 },
-    { 0x00000014, 0x0020222d, 0x000 },
-    { 0x0000f8e0, 0x00204411, 0x000 },
-    { 0x00000000, 0x00294901, 0x000 },
-    { 0x00000000, 0x00894901, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x060a0200, 0x00804811, 0x000 },
-    { 0x00000000, 0xc0200000, 0x000 },
-    { 0x97000000, 0xc0204411, 0x000 },
-    { 0x00000000, 0xc0204811, 0x000 },
-    { 0x8a000000, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x0000225c, 0x00204411, 0x000 },
-    { 0x00000000, 0xc0204800, 0x000 },
-    { 0x0000a1fc, 0x00204411, 0x000 },
-    { 0x00000000, 0xc0204800, 0x000 },
-    { 0x00000000, 0xc0200400, 0x000 },
-    { 0x00000000, 0x00a0000a, 0x000 },
-    { 0x97000000, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x8a000000, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x0000225c, 0x00204411, 0x000 },
-    { 0x00000000, 0xc0204800, 0x000 },
-    { 0x0000a1fc, 0x00204411, 0x000 },
-    { 0x00000000, 0xc0204800, 0x000 },
-    { 0x00000000, 0xc0200400, 0x000 },
-    { 0x00000000, 0x00a0000a, 0x000 },
-    { 0x97000000, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x8a000000, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x0000225c, 0x00204411, 0x000 },
-    { 0x00000000, 0xc0204800, 0x000 },
-    { 0x0000a1fc, 0x00204411, 0x000 },
-    { 0x00000000, 0xc0204800, 0x000 },
-    { 0x0001a1fd, 0x00204411, 0x000 },
-    { 0x00000000, 0xd9004800, 0x000 },
-    { 0x00000000, 0xc0200400, 0x000 },
-    { 0x00000000, 0x00a0000a, 0x000 },
-    { 0x00002257, 0x00204411, 0x000 },
-    { 0x00000003, 0xc0484a20, 0x000 },
-    { 0x0000225d, 0x00204411, 0x000 },
-    { 0x00000000, 0xc0404800, 0x000 },
-    { 0x00000000, 0x00600000, 0x645 },
-    { 0x00000000, 0xc0200800, 0x000 },
-    { 0x0000225c, 0x00204411, 0x000 },
-    { 0x00000003, 0x00384a22, 0x000 },
-    { 0x0000a1fc, 0x00204411, 0x000 },
-    { 0x00000000, 0xc0204800, 0x000 },
-    { 0x0001a1fd, 0x00204411, 0x000 },
-    { 0x00000000, 0x002f0222, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x000 },
-    { 0x00000000, 0x40204800, 0x000 },
-    { 0x00000001, 0x40304a20, 0x000 },
-    { 0x00000002, 0xc0304a20, 0x000 },
-    { 0x00000001, 0x00530a22, 0x34b },
-    { 0x0000003f, 0xc0280a20, 0x000 },
-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x00000001, 0x00204811, 0x000 },
-    { 0x000021f8, 0x00204411, 0x000 },
-    { 0x00000018, 0x00204811, 0x000 },
-    { 0x000421f9, 0x00604411, 0x68d },
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-    { 0x00000000, 0x14e00000, 0x354 },
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-    { 0x00000000, 0x0cc00000, 0x364 },
-    { 0x00002010, 0x00204411, 0x000 },
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-    { 0x0001a2a4, 0x00204411, 0x000 },
-    { 0x00000000, 0x00604802, 0x36e },
-    { 0x00002100, 0x00204411, 0x000 },
-    { 0x00000000, 0xc0204800, 0x000 },
-    { 0x00000000, 0xc0204800, 0x000 },
-    { 0x00000000, 0xc0204800, 0x000 },
-    { 0x00000000, 0xc0404800, 0x000 },
-    { 0x00000004, 0x002f0222, 0x000 },
-    { 0x00000000, 0x0cc00000, 0x36a },
-    { 0x00002010, 0x00204411, 0x000 },
-    { 0x00008000, 0x00204811, 0x000 },
-    { 0x0001a2a4, 0x00204411, 0x000 },
-    { 0x00000000, 0x00404802, 0x35f },
-    { 0x00000028, 0x002f0222, 0x000 },
-    { 0x00000000, 0x0cc00000, 0x5c0 },
-    { 0x0001a2a4, 0x00204411, 0x000 },
-    { 0x00000000, 0x00404802, 0x35f },
-    { 0x0000002c, 0x00203626, 0x000 },
-    { 0x00000049, 0x00201811, 0x000 },
-    { 0x0000003f, 0x00204811, 0x000 },
-    { 0x00000001, 0x00331a26, 0x000 },
-    { 0x00000000, 0x002f0226, 0x000 },
-    { 0x00000000, 0x0cc00000, 0x370 },
-    { 0x0000002c, 0x00801a2d, 0x000 },
-    { 0x0000003f, 0xc0280a20, 0x000 },
-    { 0x00000015, 0x002f0222, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x386 },
-    { 0x00000006, 0x002f0222, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x3b1 },
-    { 0x00000016, 0x002f0222, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x3b5 },
-    { 0x00000020, 0x002f0222, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x39c },
-    { 0x0000000f, 0x002f0222, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x3a8 },
-    { 0x00000010, 0x002f0222, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x3a8 },
-    { 0x0000001e, 0x002f0222, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x390 },
-    { 0x0000a2a4, 0x00204411, 0x000 },
-    { 0x00000000, 0x00404802, 0x000 },
-    { 0x08000000, 0x00290a22, 0x000 },
-    { 0x00000003, 0x40210e20, 0x000 },
-    { 0x0000000c, 0xc0211220, 0x000 },
-    { 0x00080000, 0x00281224, 0x000 },
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-    { 0x00000000, 0x002914a4, 0x000 },
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-    { 0x00000000, 0x002948a2, 0x000 },
-    { 0x0000a1fe, 0x00204411, 0x000 },
-    { 0x00000000, 0x00404803, 0x000 },
-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x00000001, 0x00204811, 0x000 },
-    { 0x000021f8, 0x00204411, 0x000 },
-    { 0x00000016, 0x00204811, 0x000 },
-    { 0x000421f9, 0x00604411, 0x68d },
-    { 0x00000015, 0x00210230, 0x000 },
-    { 0x00000000, 0x14e00000, 0x392 },
-    { 0x0000210e, 0x00204411, 0x000 },
-    { 0x00000000, 0xc0204800, 0x000 },
-    { 0x00000000, 0xc0204800, 0x000 },
-    { 0x0000a2a4, 0x00204411, 0x000 },
-    { 0x00000000, 0x00404802, 0x000 },
-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x00000001, 0x00204811, 0x000 },
-    { 0x000021f8, 0x00204411, 0x000 },
-    { 0x00000017, 0x00204811, 0x000 },
-    { 0x000421f9, 0x00604411, 0x68d },
-    { 0x00000003, 0x00210230, 0x000 },
-    { 0x00000000, 0x14e00000, 0x39e },
-    { 0x00002108, 0x00204411, 0x000 },
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-    { 0x00000000, 0xc0204800, 0x000 },
-    { 0x0000a2a4, 0x00204411, 0x000 },
-    { 0x00000000, 0x00404802, 0x000 },
-    { 0x0000a2a4, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204802, 0x000 },
-    { 0x80000000, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x00000010, 0x00204811, 0x000 },
-    { 0x00000000, 0x00200010, 0x000 },
-    { 0x00000000, 0x14c00000, 0x3ae },
-    { 0x00000000, 0x00400000, 0x000 },
-    { 0x00002010, 0x00204411, 0x000 },
-    { 0x00008000, 0x00204811, 0x000 },
-    { 0x0001a2a4, 0x00204411, 0x000 },
-    { 0x00000006, 0x00404811, 0x000 },
-    { 0x00002010, 0x00204411, 0x000 },
-    { 0x00008000, 0x00204811, 0x000 },
-    { 0x0001a2a4, 0x00204411, 0x000 },
-    { 0x00000016, 0x00604811, 0x36e },
-    { 0x00000000, 0x00400000, 0x000 },
-    { 0x00000000, 0xc0200800, 0x000 },
-    { 0x00000000, 0xc0200c00, 0x000 },
-    { 0x0000001d, 0x00210223, 0x000 },
-    { 0x00000000, 0x14e00000, 0x3ce },
-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x00000001, 0x00204811, 0x000 },
-    { 0x000021f8, 0x00204411, 0x000 },
-    { 0x00000018, 0x00204811, 0x000 },
-    { 0x000421f9, 0x00604411, 0x68d },
-    { 0x00000011, 0x00210230, 0x000 },
-    { 0x00000000, 0x14e00000, 0x3c0 },
-    { 0x00002100, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204802, 0x000 },
-    { 0x00000000, 0x00204803, 0x000 },
-    { 0xbabecafe, 0x00204811, 0x000 },
-    { 0xcafebabe, 0x00204811, 0x000 },
-    { 0x00002010, 0x00204411, 0x000 },
-    { 0x00008000, 0x00204811, 0x000 },
-    { 0x0000a2a4, 0x00204411, 0x000 },
-    { 0x00000004, 0x00404811, 0x000 },
-    { 0x00002170, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204802, 0x000 },
-    { 0x00000000, 0x00204803, 0x000 },
-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x0000000a, 0x00204811, 0x000 },
-    { 0x00000000, 0x00200010, 0x000 },
-    { 0x00000000, 0x14c00000, 0x3d3 },
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-    { 0xcafebabe, 0x00404811, 0x000 },
-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x00000001, 0x00204811, 0x000 },
-    { 0x00003fff, 0x40280a20, 0x000 },
-    { 0x80000000, 0x40280e20, 0x000 },
-    { 0x40000000, 0xc0281220, 0x000 },
-    { 0x00040000, 0x00694622, 0x68d },
-    { 0x00000000, 0x00201410, 0x000 },
-    { 0x00000000, 0x002f0223, 0x000 },
-    { 0x00000000, 0x0cc00000, 0x3e1 },
-    { 0x00000000, 0xc0401800, 0x3e4 },
-    { 0x00003fff, 0xc0281a20, 0x000 },
-    { 0x00040000, 0x00694626, 0x68d },
-    { 0x00000000, 0x00201810, 0x000 },
-    { 0x00000000, 0x002f0224, 0x000 },
-    { 0x00000000, 0x0cc00000, 0x3e7 },
-    { 0x00000000, 0xc0401c00, 0x3ea },
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-    { 0x00040000, 0x00694627, 0x68d },
-    { 0x00000000, 0x00201c10, 0x000 },
-    { 0x00000000, 0x00204402, 0x000 },
-    { 0x00000000, 0x002820c5, 0x000 },
-    { 0x00000000, 0x004948e8, 0x000 },
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-    { 0x00002000, 0x00200c11, 0x000 },
-    { 0x83000000, 0x00604411, 0x412 },
-    { 0x00000000, 0x00204402, 0x000 },
-    { 0x00000000, 0xc0204800, 0x000 },
-    { 0x00000000, 0x40204800, 0x000 },
-    { 0x0000001f, 0xc0210220, 0x000 },
-    { 0x00000000, 0x14c00000, 0x3f7 },
-    { 0x00002010, 0x00204411, 0x000 },
-    { 0x00008000, 0x00204811, 0x000 },
-    { 0x0000ffff, 0xc0481220, 0x3ff },
-    { 0xa7800000, 0x00200811, 0x000 },
-    { 0x0000a000, 0x00200c11, 0x000 },
-    { 0x83000000, 0x00604411, 0x412 },
-    { 0x00000000, 0x00204402, 0x000 },
-    { 0x00000000, 0xc0204800, 0x000 },
-    { 0x00000000, 0xc0204800, 0x000 },
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-    { 0x00000000, 0x00304883, 0x000 },
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-    { 0x00000000, 0x1d000000, 0x000 },
-    { 0x83000000, 0x00604411, 0x412 },
-    { 0x00000000, 0xc0400400, 0x001 },
-    { 0xa9800000, 0x00200811, 0x000 },
-    { 0x0000c000, 0x00400c11, 0x3fa },
-    { 0xab800000, 0x00200811, 0x000 },
-    { 0x0000f8e0, 0x00400c11, 0x3fa },
-    { 0xad800000, 0x00200811, 0x000 },
-    { 0x0000f880, 0x00400c11, 0x3fa },
-    { 0xb3800000, 0x00200811, 0x000 },
-    { 0x0000f3fc, 0x00400c11, 0x3fa },
-    { 0xaf800000, 0x00200811, 0x000 },
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-    { 0xb1800000, 0x00200811, 0x000 },
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-    { 0x84000000, 0x00204411, 0x000 },
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-    { 0x00000000, 0x00800000, 0x000 },
-    { 0x01182000, 0xc0304620, 0x000 },
-    { 0x00000000, 0xd9004800, 0x000 },
-    { 0x00000000, 0xc0200400, 0x000 },
-    { 0x00000000, 0x00a0000a, 0x000 },
-    { 0x0218a000, 0xc0304620, 0x000 },
-    { 0x00000000, 0xd9004800, 0x000 },
-    { 0x00000000, 0xc0200400, 0x000 },
-    { 0x00000000, 0x00a0000a, 0x000 },
-    { 0x0318c000, 0xc0304620, 0x000 },
-    { 0x00000000, 0xd9004800, 0x000 },
-    { 0x00000000, 0xc0200400, 0x000 },
-    { 0x00000000, 0x00a0000a, 0x000 },
-    { 0x0418f8e0, 0xc0304620, 0x000 },
-    { 0x00000000, 0xd9004800, 0x000 },
-    { 0x00000000, 0xc0200400, 0x000 },
-    { 0x00000000, 0x00a0000a, 0x000 },
-    { 0x0518f880, 0xc0304620, 0x000 },
-    { 0x00000000, 0xd9004800, 0x000 },
-    { 0x00000000, 0xc0200400, 0x000 },
-    { 0x00000000, 0x00a0000a, 0x000 },
-    { 0x0618e000, 0xc0304620, 0x000 },
-    { 0x00000000, 0xd9004800, 0x000 },
-    { 0x00000000, 0xc0200400, 0x000 },
-    { 0x00000000, 0x00a0000a, 0x000 },
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-    { 0x00000000, 0x00400000, 0x5c4 },
-    { 0xa4000000, 0xc0204411, 0x000 },
-    { 0x00000000, 0xc0404800, 0x000 },
-    { 0x00000000, 0xc0600000, 0x5c9 },
-    { 0x00000000, 0xc0400400, 0x001 },
-    { 0x0000002c, 0x00203621, 0x000 },
-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x00000006, 0x00204811, 0x000 },
-    { 0x00000000, 0x002f0230, 0x000 },
-    { 0x00000000, 0x0cc00000, 0x5d0 },
-    { 0x00000000, 0x00200411, 0x000 },
-    { 0x00000030, 0x00403621, 0x5e3 },
-    { 0x00000030, 0x0020062d, 0x000 },
-    { 0x00007e00, 0x00280621, 0x000 },
-    { 0x00000000, 0x002f0221, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x5e3 },
-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x00000001, 0x00204811, 0x000 },
-    { 0x0004a092, 0x00604411, 0x68d },
-    { 0x00000031, 0x00203630, 0x000 },
-    { 0x0004a093, 0x00604411, 0x68d },
-    { 0x00000032, 0x00203630, 0x000 },
-    { 0x0004a2b6, 0x00604411, 0x68d },
-    { 0x00000033, 0x00203630, 0x000 },
-    { 0x0004a2ba, 0x00604411, 0x68d },
-    { 0x00000034, 0x00203630, 0x000 },
-    { 0x0004a2be, 0x00604411, 0x68d },
-    { 0x00000035, 0x00203630, 0x000 },
-    { 0x0004a2c2, 0x00604411, 0x68d },
-    { 0x00000036, 0x00203630, 0x000 },
-    { 0x00042004, 0x00604411, 0x68d },
-    { 0x0001a2a4, 0x00204411, 0x000 },
-    { 0x0000003f, 0x00204811, 0x000 },
-    { 0x0000003f, 0x00204811, 0x000 },
-    { 0x0000003f, 0x00204811, 0x000 },
-    { 0x0000003f, 0x00204811, 0x000 },
-    { 0x00000005, 0x00204811, 0x000 },
-    { 0x0000a1f4, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x88000000, 0x00204411, 0x000 },
-    { 0x00000001, 0x00204811, 0x000 },
-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x00000006, 0x00204811, 0x000 },
-    { 0x00000001, 0x002f0230, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x62c },
-    { 0x00000030, 0x0020062d, 0x000 },
-    { 0x00000000, 0x002f0221, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x62c },
-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x00000001, 0x00204811, 0x000 },
-    { 0x00007e00, 0x00280621, 0x000 },
-    { 0x00000000, 0x002f0221, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x605 },
-    { 0x0000a092, 0x00204411, 0x000 },
-    { 0x00000031, 0x00204a2d, 0x000 },
-    { 0x0000a093, 0x00204411, 0x000 },
-    { 0x00000032, 0x00204a2d, 0x000 },
-    { 0x0000a2b6, 0x00204411, 0x000 },
-    { 0x00000033, 0x00204a2d, 0x000 },
-    { 0x0000a2ba, 0x00204411, 0x000 },
-    { 0x00000034, 0x00204a2d, 0x000 },
-    { 0x0000a2be, 0x00204411, 0x000 },
-    { 0x00000035, 0x00204a2d, 0x000 },
-    { 0x0000a2c2, 0x00204411, 0x000 },
-    { 0x00000036, 0x00204a2d, 0x000 },
-    { 0x00000030, 0x0020062d, 0x000 },
-    { 0x000001ff, 0x00280621, 0x000 },
-    { 0x00000000, 0x002f0221, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x62b },
-    { 0x00000000, 0x00210221, 0x000 },
-    { 0x00000000, 0x14c00000, 0x60e },
-    { 0x0004a003, 0x00604411, 0x68d },
-    { 0x0000a003, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204810, 0x000 },
-    { 0x00000001, 0x00210621, 0x000 },
-    { 0x00000000, 0x14c00000, 0x613 },
-    { 0x0004a010, 0x00604411, 0x68d },
-    { 0x0000a010, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204810, 0x000 },
-    { 0x00000001, 0x00210621, 0x000 },
-    { 0x00000000, 0x002f0221, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x62b },
-    { 0x0004a011, 0x00604411, 0x68d },
-    { 0x0000a011, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204810, 0x000 },
-    { 0x0004a012, 0x00604411, 0x68d },
-    { 0x0000a012, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204810, 0x000 },
-    { 0x0004a013, 0x00604411, 0x68d },
-    { 0x0000a013, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204810, 0x000 },
-    { 0x0004a014, 0x00604411, 0x68d },
-    { 0x0000a014, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204810, 0x000 },
-    { 0x0004a015, 0x00604411, 0x68d },
-    { 0x0000a015, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204810, 0x000 },
-    { 0x0004a016, 0x00604411, 0x68d },
-    { 0x0000a016, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204810, 0x000 },
-    { 0x0004a017, 0x00604411, 0x68d },
-    { 0x0000a017, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204810, 0x000 },
-    { 0x00042004, 0x00604411, 0x68d },
-    { 0x0000002c, 0x0080062d, 0x000 },
-    { 0xff000000, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x00000001, 0x00204811, 0x000 },
-    { 0x00000002, 0x00804811, 0x000 },
-    { 0x00000000, 0x0ee00000, 0x63d },
-    { 0x00000030, 0x0020062d, 0x000 },
-    { 0x00000002, 0x00280621, 0x000 },
-    { 0x00000000, 0x002f0221, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x63b },
-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x00000001, 0x00204811, 0x000 },
-    { 0x00042004, 0x00604411, 0x68d },
-    { 0x00001000, 0x00200811, 0x000 },
-    { 0x0000002b, 0x00203622, 0x000 },
-    { 0x00000000, 0x00600000, 0x641 },
-    { 0x00000000, 0x00600000, 0x5c9 },
-    { 0x98000000, 0x00204411, 0x000 },
-    { 0x00000000, 0x00804811, 0x000 },
-    { 0x00000000, 0xc0600000, 0x641 },
-    { 0x00000000, 0xc0400400, 0x001 },
-    { 0x0000a2a4, 0x00204411, 0x000 },
-    { 0x00000022, 0x00204811, 0x000 },
-    { 0x89000000, 0x00204411, 0x000 },
-    { 0x00000001, 0x00404811, 0x62d },
-    { 0x97000000, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x8a000000, 0x00204411, 0x000 },
-    { 0x00000000, 0x00404811, 0x62d },
-    { 0x00000000, 0x00600000, 0x65c },
-    { 0x00002010, 0x00204411, 0x000 },
-    { 0x00008000, 0x00204811, 0x000 },
-    { 0x0001a2a4, 0xc0204411, 0x000 },
-    { 0x00000016, 0x00604811, 0x36e },
-    { 0x00002010, 0x00204411, 0x000 },
-    { 0x00010000, 0x00204811, 0x000 },
-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x00000001, 0x00204811, 0x000 },
-    { 0x0000217c, 0x00204411, 0x000 },
-    { 0x09800000, 0x00204811, 0x000 },
-    { 0xffffffff, 0x00204811, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x00000000, 0x17000000, 0x000 },
-    { 0x0004217f, 0x00604411, 0x68d },
-    { 0x0000001f, 0x00210230, 0x000 },
-    { 0x00000000, 0x14c00000, 0x000 },
-    { 0x00000004, 0x00404c11, 0x656 },
-    { 0x00000000, 0x00400000, 0x000 },
-    { 0x00000017, 0x00201e2d, 0x000 },
-    { 0x00000004, 0x00291e27, 0x000 },
-    { 0x00000017, 0x00803627, 0x000 },
-    { 0x00000017, 0x00201e2d, 0x000 },
-    { 0xfffffffb, 0x00281e27, 0x000 },
-    { 0x00000017, 0x00803627, 0x000 },
-    { 0x00000017, 0x00201e2d, 0x000 },
-    { 0x00000008, 0x00291e27, 0x000 },
-    { 0x00000017, 0x00803627, 0x000 },
-    { 0x00000017, 0x00201e2d, 0x000 },
-    { 0xfffffff7, 0x00281e27, 0x000 },
-    { 0x00000017, 0x00803627, 0x000 },
-    { 0x00002010, 0x00204411, 0x000 },
-    { 0x00008000, 0x00204811, 0x000 },
-    { 0x0001a2a4, 0x00204411, 0x000 },
-    { 0x00000016, 0x00604811, 0x36e },
-    { 0x00002010, 0x00204411, 0x000 },
-    { 0x00010000, 0x00204811, 0x000 },
-    { 0x0000217c, 0x00204411, 0x000 },
-    { 0x01800000, 0x00204811, 0x000 },
-    { 0xffffffff, 0x00204811, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x00000000, 0x17000000, 0x000 },
-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x00000001, 0x00204811, 0x000 },
-    { 0x0004217f, 0x00604411, 0x68d },
-    { 0x0000001f, 0x00210230, 0x000 },
-    { 0x00000000, 0x14c00000, 0x68c },
-    { 0x00000010, 0x00404c11, 0x672 },
-    { 0x00000000, 0xc0200400, 0x000 },
-    { 0x00000000, 0x38c00000, 0x000 },
-    { 0x0000001d, 0x00200a2d, 0x000 },
-    { 0x0000001e, 0x00200e2d, 0x000 },
-    { 0x0000001f, 0x0020122d, 0x000 },
-    { 0x00000020, 0x0020162d, 0x000 },
-    { 0x00002169, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204804, 0x000 },
-    { 0x00000000, 0x00204805, 0x000 },
-    { 0x00000000, 0x00204801, 0x000 },
-    { 0xcafebabe, 0x00204811, 0x000 },
-    { 0x00000004, 0x00301224, 0x000 },
-    { 0x00000000, 0x002f0064, 0x000 },
-    { 0x00000000, 0x0cc00000, 0x68b },
-    { 0x00000003, 0x00281a22, 0x000 },
-    { 0x00000008, 0x00221222, 0x000 },
-    { 0xfffff000, 0x00281224, 0x000 },
-    { 0x00000000, 0x002910c4, 0x000 },
-    { 0x0000001f, 0x00403624, 0x000 },
-    { 0x00000000, 0x00800000, 0x000 },
-    { 0x00000000, 0x1ac00000, 0x68d },
-    { 0x9f000000, 0x00204411, 0x000 },
-    { 0xcafebabe, 0x00204811, 0x000 },
-    { 0x00000000, 0x1ae00000, 0x690 },
-    { 0x00000000, 0x00800000, 0x000 },
-    { 0x00000000, 0x1ac00000, 0x692 },
-    { 0x9e000000, 0x00204411, 0x000 },
-    { 0xcafebabe, 0x00204811, 0x000 },
-    { 0x00000000, 0x1ae00000, 0x695 },
-    { 0x00000000, 0x00800000, 0x000 },
-    { 0x00000000, 0x00600000, 0x00b },
-    { 0x00001000, 0x00600411, 0x315 },
-    { 0x00000000, 0x00200411, 0x000 },
-    { 0x00000000, 0x00600811, 0x1b2 },
-    { 0x0000225c, 0x00204411, 0x000 },
-    { 0x00000003, 0x00204811, 0x000 },
-    { 0x00002256, 0x00204411, 0x000 },
-    { 0x0000001b, 0x00204811, 0x000 },
-    { 0x0000a1fc, 0x00204411, 0x000 },
-    { 0x00000001, 0x00204811, 0x000 },
-    { 0x0001a1fd, 0xc0204411, 0x000 },
-    { 0x00000021, 0x00201e2d, 0x000 },
-    { 0x00000010, 0x00221e27, 0x000 },
-    { 0x00000024, 0x0020222d, 0x000 },
-    { 0x0000ffff, 0x00282228, 0x000 },
-    { 0x00000000, 0x00294907, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x00000022, 0x0020222d, 0x000 },
-    { 0x0000ffff, 0x00282228, 0x000 },
-    { 0x00000000, 0x00294907, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x00000023, 0x00201e2d, 0x000 },
-    { 0x00000010, 0x00221e27, 0x000 },
-    { 0x00000000, 0x00294907, 0x000 },
-    { 0x00000000, 0x00404811, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x01420502, 0x05c00250, 0x000 },
-    { 0x01c30168, 0x043f05c0, 0x000 },
-    { 0x02250209, 0x02500151, 0x000 },
-    { 0x02230245, 0x02a00241, 0x000 },
-    { 0x03d705c0, 0x05c005c0, 0x000 },
-    { 0x0649064a, 0x031f05c0, 0x000 },
-    { 0x05c005c5, 0x03200340, 0x000 },
-    { 0x032a0282, 0x03420334, 0x000 },
-    { 0x05c005c0, 0x05c005c0, 0x000 },
-    { 0x05c00551, 0x05c005c0, 0x000 },
-    { 0x03ba05c0, 0x04bb0344, 0x000 },
-    { 0x049a0450, 0x043d05c0, 0x000 },
-    { 0x04d005c0, 0x044104dd, 0x000 },
-    { 0x04500507, 0x03510375, 0x000 },
-    { 0x05c005c0, 0x05c005c0, 0x000 },
-    { 0x05c005c0, 0x05c005c0, 0x000 },
-    { 0x05c005c0, 0x063f05c7, 0x000 },
-    { 0x05c005c0, 0x000705c0, 0x000 },
-    { 0x05c005c0, 0x05c005c0, 0x000 },
-    { 0x05c005c0, 0x05c005c0, 0x000 },
-    { 0x03f803ed, 0x04080406, 0x000 },
-    { 0x040e040a, 0x040c0410, 0x000 },
-    { 0x041c0418, 0x04240420, 0x000 },
-    { 0x042c0428, 0x04340430, 0x000 },
-    { 0x05c005c0, 0x043805c0, 0x000 },
-    { 0x05c005c0, 0x05c005c0, 0x000 },
-    { 0x05c005c0, 0x05c005c0, 0x000 },
-    { 0x00020679, 0x06970006, 0x000 },
-};
-static const u32 RV620_pfp_microcode[] = {
-0xca0400,
-0xa00000,
-0x7e828b,
-0x7c038b,
-0x8001b8,
-0x7c038b,
-0xd4401e,
-0xee001e,
-0xca0400,
-0xa00000,
-0x7e828b,
-0xc41838,
-0xca2400,
-0xca2800,
-0x9581a8,
-0xc41c3a,
-0xc3c000,
-0xca0800,
-0xca0c00,
-0x7c744b,
-0xc20005,
-0x99c000,
-0xc41c3a,
-0x7c744c,
-0xc0fff0,
-0x042c04,
-0x309002,
-0x7d2500,
-0x351402,
-0x7d350b,
-0x255403,
-0x7cd580,
-0x259c03,
-0x95c004,
-0xd5001b,
-0x7eddc1,
-0x7d9d80,
-0xd6801b,
-0xd5801b,
-0xd4401e,
-0xd5401e,
-0xd6401e,
-0xd6801e,
-0xd4801e,
-0xd4c01e,
-0x9783d3,
-0xd5c01e,
-0xca0800,
-0x80001a,
-0xca0c00,
-0xe4011e,
-0xd4001e,
-0x80000c,
-0xc41838,
-0xe4013e,
-0xd4001e,
-0x80000c,
-0xc41838,
-0xd4401e,
-0xee001e,
-0xca0400,
-0xa00000,
-0x7e828b,
-0xe4011e,
-0xd4001e,
-0xd4401e,
-0xee001e,
-0xca0400,
-0xa00000,
-0x7e828b,
-0xe4013e,
-0xd4001e,
-0xd4401e,
-0xee001e,
-0xca0400,
-0xa00000,
-0x7e828b,
-0xca1800,
-0xd4401e,
-0xd5801e,
-0x800053,
-0xd40075,
-0xd4401e,
-0xca0800,
-0xca0c00,
-0xca1000,
-0xd48019,
-0xd4c018,
-0xd50017,
-0xd4801e,
-0xd4c01e,
-0xd5001e,
-0xe2001e,
-0xca0400,
-0xa00000,
-0x7e828b,
-0xca0800,
-0xd48060,
-0xd4401e,
-0x800000,
-0xd4801e,
-0xca0800,
-0xd48061,
-0xd4401e,
-0x800000,
-0xd4801e,
-0xca0800,
-0xca0c00,
-0xd4401e,
-0xd48016,
-0xd4c016,
-0xd4801e,
-0x8001b8,
-0xd4c01e,
-0xc60843,
-0xca0c00,
-0xca1000,
-0x948004,
-0xca1400,
-0xe420f3,
-0xd42013,
-0xd56065,
-0xd4e01c,
-0xd5201c,
-0xd5601c,
-0x800000,
-0x062001,
-0xc60843,
-0xca0c00,
-0xca1000,
-0x9483f7,
-0xca1400,
-0xe420f3,
-0x800079,
-0xd42013,
-0xc60843,
-0xca0c00,
-0xca1000,
-0x9883ef,
-0xca1400,
-0xd40064,
-0x80008d,
-0x000000,
-0xc41432,
-0xc61843,
-0xc4082f,
-0x954005,
-0xc40c30,
-0xd4401e,
-0x800000,
-0xee001e,
-0x9583f5,
-0xc41031,
-0xd44033,
-0xd52065,
-0xd4a01c,
-0xd4e01c,
-0xd5201c,
-0xe4015e,
-0xd4001e,
-0x800000,
-0x062001,
-0xca1800,
-0x0a2001,
-0xd60076,
-0xc40836,
-0x988007,
-0xc61045,
-0x950110,
-0xd4001f,
-0xd46062,
-0x800000,
-0xd42062,
-0xcc3835,
-0xcc1433,
-0x8401bb,
-0xd40072,
-0xd5401e,
-0x800000,
-0xee001e,
-0xe2001a,
-0x8401bb,
-0xe2001a,
-0xcc104b,
-0xcc0447,
-0x2c9401,
-0x7d098b,
-0x984005,
-0x7d15cb,
-0xd4001a,
-0x8001b8,
-0xd4006d,
-0x344401,
-0xcc0c48,
-0x98403a,
-0xcc2c4a,
-0x958004,
-0xcc0449,
-0x8001b8,
-0xd4001a,
-0xd4c01a,
-0x282801,
-0x8400f0,
-0xcc1003,
-0x98801b,
-0x04380c,
-0x8400f0,
-0xcc1003,
-0x988017,
-0x043808,
-0x8400f0,
-0xcc1003,
-0x988013,
-0x043804,
-0x8400f0,
-0xcc1003,
-0x988014,
-0xcc104c,
-0x9a8009,
-0xcc144d,
-0x9840dc,
-0xd4006d,
-0xcc1848,
-0xd5001a,
-0xd5401a,
-0x8000c9,
-0xd5801a,
-0x96c0d5,
-0xd4006d,
-0x8001b8,
-0xd4006e,
-0x9ac003,
-0xd4006d,
-0xd4006e,
-0x800000,
-0xec007f,
-0x9ac0cc,
-0xd4006d,
-0x8001b8,
-0xd4006e,
-0xcc1403,
-0xcc1803,
-0xcc1c03,
-0x7d9103,
-0x7dd583,
-0x7d190c,
-0x35cc1f,
-0x35701f,
-0x7cf0cb,
-0x7cd08b,
-0x880000,
-0x7e8e8b,
-0x95c004,
-0xd4006e,
-0x8001b8,
-0xd4001a,
-0xd4c01a,
-0xcc0803,
-0xcc0c03,
-0xcc1003,
-0xcc1403,
-0xcc1803,
-0xcc1c03,
-0xcc2403,
-0xcc2803,
-0x35c41f,
-0x36b01f,
-0x7c704b,
-0x34f01f,
-0x7c704b,
-0x35701f,
-0x7c704b,
-0x7d8881,
-0x7dccc1,
-0x7e5101,
-0x7e9541,
-0x7c9082,
-0x7cd4c2,
-0x7c848b,
-0x9ac003,
-0x7c8c8b,
-0x2c8801,
-0x98809e,
-0xd4006d,
-0x98409c,
-0xd4006e,
-0xcc084c,
-0xcc0c4d,
-0xcc1048,
-0xd4801a,
-0xd4c01a,
-0x800101,
-0xd5001a,
-0xcc0832,
-0xd40032,
-0x9482d9,
-0xca0c00,
-0xd4401e,
-0x800000,
-0xd4001e,
-0xe4011e,
-0xd4001e,
-0xca0800,
-0xca0c00,
-0xca1000,
-0xd4401e,
-0xca1400,
-0xd4801e,
-0xd4c01e,
-0xd5001e,
-0xd5401e,
-0xd54034,
-0x800000,
-0xee001e,
-0x280404,
-0xe2001a,
-0xe2001a,
-0xd4401a,
-0xca3800,
-0xcc0803,
-0xcc0c03,
-0xcc0c03,
-0xcc0c03,
-0x9882bd,
-0x000000,
-0x8401bb,
-0xd7a06f,
-0x800000,
-0xee001f,
-0xca0400,
-0xc2ff00,
-0xcc0834,
-0xc13fff,
-0x7c74cb,
-0x7cc90b,
-0x7d010f,
-0x9902b0,
-0x7c738b,
-0x8401bb,
-0xd7a06f,
-0x800000,
-0xee001f,
-0xca0800,
-0x281900,
-0x7d898b,
-0x958014,
-0x281404,
-0xca0c00,
-0xca1000,
-0xca1c00,
-0xca2400,
-0xe2001f,
-0xd4c01a,
-0xd5001a,
-0xd5401a,
-0xcc1803,
-0xcc2c03,
-0xcc2c03,
-0xcc2c03,
-0x7da58b,
-0x7d9c47,
-0x984297,
-0x000000,
-0x800161,
-0xd4c01a,
-0xd4401e,
-0xd4801e,
-0x800000,
-0xee001e,
-0xe4011e,
-0xd4001e,
-0xd4401e,
-0xee001e,
-0xca0400,
-0xa00000,
-0x7e828b,
-0xe4013e,
-0xd4001e,
-0xd4401e,
-0xee001e,
-0xca0400,
-0xa00000,
-0x7e828b,
-0xca0800,
-0x248c06,
-0x0ccc06,
-0x98c006,
-0xcc104e,
-0x990004,
-0xd40073,
-0xe4011e,
-0xd4001e,
-0xd4401e,
-0xd4801e,
-0x800000,
-0xee001e,
-0xca0800,
-0xca0c00,
-0x34d018,
-0x251001,
-0x950021,
-0xc17fff,
-0xca1000,
-0xca1400,
-0xca1800,
-0xd4801d,
-0xd4c01d,
-0x7db18b,
-0xc14202,
-0xc2c001,
-0xd5801d,
-0x34dc0e,
-0x7d5d4c,
-0x7f734c,
-0xd7401e,
-0xd5001e,
-0xd5401e,
-0xc14200,
-0xc2c000,
-0x099c01,
-0x31dc10,
-0x7f5f4c,
-0x7f734c,
-0x042802,
-0x7d8380,
-0xd5a86f,
-0xd58066,
-0xd7401e,
-0xec005e,
-0xc82402,
-0xc82402,
-0x8001b8,
-0xd60076,
-0xd4401e,
-0xd4801e,
-0xd4c01e,
-0x800000,
-0xee001e,
-0x800000,
-0xee001f,
-0xd4001f,
-0x800000,
-0xd4001f,
-0xd4001f,
-0x880000,
-0xd4001f,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x010171,
-0x020178,
-0x03008f,
-0x04007f,
-0x050003,
-0x06003f,
-0x070032,
-0x08012c,
-0x090046,
-0x0a0036,
-0x1001b6,
-0x1700a2,
-0x22013a,
-0x230149,
-0x2000b4,
-0x240125,
-0x27004d,
-0x28006a,
-0x2a0060,
-0x2b0052,
-0x2f0065,
-0x320087,
-0x34017f,
-0x3c0156,
-0x3f0072,
-0x41018c,
-0x44012e,
-0x550173,
-0x56017a,
-0x60000b,
-0x610034,
-0x620038,
-0x630038,
-0x640038,
-0x650038,
-0x660038,
-0x670038,
-0x68003a,
-0x690041,
-0x6a0048,
-0x6b0048,
-0x6c0048,
-0x6d0048,
-0x6e0048,
-0x6f0048,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-};
-static const u32 RV630_cp_microcode[][3] = {
-    { 0x00000000, 0xc0200400, 0x000 },
-    { 0x00000000, 0x00a0000a, 0x000 },
-    { 0x0000ffff, 0x00284621, 0x000 },
-    { 0x00000000, 0xd9004800, 0x000 },
-    { 0x00000000, 0xc0200400, 0x000 },
-    { 0x00000000, 0x00a0000a, 0x000 },
-    { 0x00000000, 0x00e00000, 0x000 },
-    { 0x00010000, 0xc0294620, 0x000 },
-    { 0x00000000, 0xd9004800, 0x000 },
-    { 0x00000000, 0xc0200400, 0x000 },
-    { 0x00000000, 0x00a0000a, 0x000 },
-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x00000001, 0x00204811, 0x000 },
-    { 0x00042004, 0x00604411, 0x68a },
-    { 0x00000000, 0x00600000, 0x62e },
-    { 0x00000000, 0x00600000, 0x642 },
-    { 0x00000000, 0xc0200800, 0x000 },
-    { 0x00000f00, 0x00281622, 0x000 },
-    { 0x00000008, 0x00211625, 0x000 },
-    { 0x00000018, 0x00203625, 0x000 },
-    { 0x8d000000, 0x00204411, 0x000 },
-    { 0x00000004, 0x002f0225, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x018 },
-    { 0x00412000, 0x00404811, 0x019 },
-    { 0x00422000, 0x00204811, 0x000 },
-    { 0x8e000000, 0x00204411, 0x000 },
-    { 0x00000028, 0x00204a2d, 0x000 },
-    { 0x90000000, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204805, 0x000 },
-    { 0x0000000c, 0x00211622, 0x000 },
-    { 0x00000003, 0x00281625, 0x000 },
-    { 0x00000019, 0x00211a22, 0x000 },
-    { 0x00000004, 0x00281a26, 0x000 },
-    { 0x00000000, 0x002914c5, 0x000 },
-    { 0x00000019, 0x00203625, 0x000 },
-    { 0x00000000, 0x003a1402, 0x000 },
-    { 0x00000016, 0x00211625, 0x000 },
-    { 0x00000003, 0x00281625, 0x000 },
-    { 0x00000017, 0x00200e2d, 0x000 },
-    { 0xfffffffc, 0x00280e23, 0x000 },
-    { 0x00000000, 0x002914a3, 0x000 },
-    { 0x00000017, 0x00203625, 0x000 },
-    { 0x00008000, 0x00280e22, 0x000 },
-    { 0x00000007, 0x00220e23, 0x000 },
-    { 0x00000000, 0x0029386e, 0x000 },
-    { 0x20000000, 0x00280e22, 0x000 },
-    { 0x00000006, 0x00210e23, 0x000 },
-    { 0x00000000, 0x0029386e, 0x000 },
-    { 0x00000000, 0x00220222, 0x000 },
-    { 0x00000000, 0x14e00000, 0x038 },
-    { 0x00000000, 0x2ee00000, 0x035 },
-    { 0x00000000, 0x2ce00000, 0x037 },
-    { 0x00000000, 0x00400e2d, 0x039 },
-    { 0x00000008, 0x00200e2d, 0x000 },
-    { 0x00000009, 0x0040122d, 0x046 },
-    { 0x00000001, 0x00400e2d, 0x039 },
-    { 0x00000000, 0xc0200c00, 0x000 },
-    { 0x003ffffc, 0x00281223, 0x000 },
-    { 0x00000002, 0x00221224, 0x000 },
-    { 0x0000001f, 0x00211e23, 0x000 },
-    { 0x00000000, 0x14e00000, 0x03e },
-    { 0x00000008, 0x00401c11, 0x041 },
-    { 0x0000000d, 0x00201e2d, 0x000 },
-    { 0x0000000f, 0x00281e27, 0x000 },
-    { 0x00000003, 0x00221e27, 0x000 },
-    { 0x7fc00000, 0x00281a23, 0x000 },
-    { 0x00000014, 0x00211a26, 0x000 },
-    { 0x00000001, 0x00331a26, 0x000 },
-    { 0x00000008, 0x00221a26, 0x000 },
-    { 0x00000000, 0x00290cc7, 0x000 },
-    { 0x00000027, 0x00203624, 0x000 },
-    { 0x00007f00, 0x00281221, 0x000 },
-    { 0x00001400, 0x002f0224, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x04b },
-    { 0x00000001, 0x00290e23, 0x000 },
-    { 0x0000000e, 0x00203623, 0x000 },
-    { 0x0000e000, 0x00204411, 0x000 },
-    { 0xfff80000, 0x00294a23, 0x000 },
-    { 0x00000000, 0x003a2c02, 0x000 },
-    { 0x00000002, 0x00220e2b, 0x000 },
-    { 0xfc000000, 0x00280e23, 0x000 },
-    { 0x0000000f, 0x00203623, 0x000 },
-    { 0x00001fff, 0x00294a23, 0x000 },
-    { 0x00000027, 0x00204a2d, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x00000029, 0x00200e2d, 0x000 },
-    { 0x060a0200, 0x00294a23, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x00000001, 0x00210222, 0x000 },
-    { 0x00000000, 0x14e00000, 0x061 },
-    { 0x00000000, 0x2ee00000, 0x05f },
-    { 0x00000000, 0x2ce00000, 0x05e },
-    { 0x00000000, 0x00400e2d, 0x062 },
-    { 0x00000001, 0x00400e2d, 0x062 },
-    { 0x0000000a, 0x00200e2d, 0x000 },
-    { 0x0000000b, 0x0040122d, 0x06a },
-    { 0x00000000, 0xc0200c00, 0x000 },
-    { 0x003ffffc, 0x00281223, 0x000 },
-    { 0x00000002, 0x00221224, 0x000 },
-    { 0x7fc00000, 0x00281623, 0x000 },
-    { 0x00000014, 0x00211625, 0x000 },
-    { 0x00000001, 0x00331625, 0x000 },
-    { 0x80000000, 0x00280e23, 0x000 },
-    { 0x00000000, 0x00290ca3, 0x000 },
-    { 0x3ffffc00, 0x00290e23, 0x000 },
-    { 0x0000001f, 0x00211e23, 0x000 },
-    { 0x00000000, 0x14e00000, 0x06d },
-    { 0x00000100, 0x00401c11, 0x070 },
-    { 0x0000000d, 0x00201e2d, 0x000 },
-    { 0x000000f0, 0x00281e27, 0x000 },
-    { 0x00000004, 0x00221e27, 0x000 },
-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x0000000d, 0x00204811, 0x000 },
-    { 0xfffff0ff, 0x00281a30, 0x000 },
-    { 0x0000a028, 0x00204411, 0x000 },
-    { 0x00000000, 0x002948e6, 0x000 },
-    { 0x0000a018, 0x00204411, 0x000 },
-    { 0x3fffffff, 0x00284a23, 0x000 },
-    { 0x0000a010, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204804, 0x000 },
-    { 0x00000030, 0x0020162d, 0x000 },
-    { 0x00000002, 0x00291625, 0x000 },
-    { 0x00000030, 0x00203625, 0x000 },
-    { 0x00000025, 0x0020162d, 0x000 },
-    { 0x00000000, 0x002f00a3, 0x000 },
-    { 0x00000000, 0x0cc00000, 0x083 },
-    { 0x00000026, 0x0020162d, 0x000 },
-    { 0x00000000, 0x002f00a4, 0x000 },
-    { 0x00000000, 0x0cc00000, 0x084 },
-    { 0x00000000, 0x00400000, 0x08a },
-    { 0x00000025, 0x00203623, 0x000 },
-    { 0x00000026, 0x00203624, 0x000 },
-    { 0x00000017, 0x00201e2d, 0x000 },
-    { 0x00000002, 0x00210227, 0x000 },
-    { 0x00000000, 0x14e00000, 0x08a },
-    { 0x00000000, 0x00600000, 0x665 },
-    { 0x00000000, 0x00600000, 0x659 },
-    { 0x00000002, 0x00210e22, 0x000 },
-    { 0x00000000, 0x14c00000, 0x08d },
-    { 0x00000012, 0xc0403620, 0x093 },
-    { 0x00000000, 0x2ee00000, 0x091 },
-    { 0x00000000, 0x2ce00000, 0x090 },
-    { 0x00000002, 0x00400e2d, 0x092 },
-    { 0x00000003, 0x00400e2d, 0x092 },
-    { 0x0000000c, 0x00200e2d, 0x000 },
-    { 0x00000012, 0x00203623, 0x000 },
-    { 0x00000003, 0x00210e22, 0x000 },
-    { 0x00000000, 0x14c00000, 0x098 },
-    { 0x0000a00c, 0x00204411, 0x000 },
-    { 0x00000000, 0xc0204800, 0x000 },
-    { 0x00000000, 0xc0404800, 0x0a0 },
-    { 0x0000a00c, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x00000000, 0x2ee00000, 0x09e },
-    { 0x00000000, 0x2ce00000, 0x09d },
-    { 0x00000002, 0x00400e2d, 0x09f },
-    { 0x00000003, 0x00400e2d, 0x09f },
-    { 0x0000000c, 0x00200e2d, 0x000 },
-    { 0x00000000, 0x00204803, 0x000 },
-    { 0x00000000, 0x003a0c02, 0x000 },
-    { 0x003f0000, 0x00280e23, 0x000 },
-    { 0x00000010, 0x00210e23, 0x000 },
-    { 0x00000011, 0x00203623, 0x000 },
-    { 0x0000001e, 0x0021022b, 0x000 },
-    { 0x00000000, 0x14c00000, 0x0a7 },
-    { 0x00000016, 0xc0203620, 0x000 },
-    { 0x0000001f, 0x0021022b, 0x000 },
-    { 0x00000000, 0x14c00000, 0x0aa },
-    { 0x00000015, 0xc0203620, 0x000 },
-    { 0x00000008, 0x00210e2b, 0x000 },
-    { 0x0000007f, 0x00280e23, 0x000 },
-    { 0x00000000, 0x002f0223, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x0e1 },
-    { 0x00000000, 0x27000000, 0x000 },
-    { 0x00000000, 0x00600000, 0x2a3 },
-    { 0x00000001, 0x002f0223, 0x000 },
-    { 0x00000000, 0x0ae00000, 0x0b3 },
-    { 0x00000000, 0x00600000, 0x13a },
-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x00000006, 0x00204811, 0x000 },
-    { 0x0000000c, 0x00221e30, 0x000 },
-    { 0x99800000, 0x00204411, 0x000 },
-    { 0x00000004, 0x0020122d, 0x000 },
-    { 0x00000008, 0x00221224, 0x000 },
-    { 0x00000010, 0x00201811, 0x000 },
-    { 0x00000000, 0x00291ce4, 0x000 },
-    { 0x00000000, 0x00604807, 0x12f },
-    { 0x9b000000, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204802, 0x000 },
-    { 0x9c000000, 0x00204411, 0x000 },
-    { 0x00000000, 0x0033146f, 0x000 },
-    { 0x00000001, 0x00333e23, 0x000 },
-    { 0x00000000, 0xd9004800, 0x000 },
-    { 0x00000000, 0x00203c05, 0x000 },
-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x0000000e, 0x00204811, 0x000 },
-    { 0x00000000, 0x00201010, 0x000 },
-    { 0x0000e007, 0x00204411, 0x000 },
-    { 0x0000000f, 0x0021022b, 0x000 },
-    { 0x00000000, 0x14c00000, 0x0cb },
-    { 0x00f8ff08, 0x00204811, 0x000 },
-    { 0x98000000, 0x00404811, 0x0dc },
-    { 0x000000f0, 0x00280e22, 0x000 },
-    { 0x000000a0, 0x002f0223, 0x000 },
-    { 0x00000000, 0x0cc00000, 0x0da },
-    { 0x00000011, 0x00200e2d, 0x000 },
-    { 0x00000001, 0x002f0223, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x0d5 },
-    { 0x00000002, 0x002f0223, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x0d4 },
-    { 0x00003f00, 0x00400c11, 0x0d6 },
-    { 0x00001f00, 0x00400c11, 0x0d6 },
-    { 0x00000f00, 0x00200c11, 0x000 },
-    { 0x00380009, 0x00294a23, 0x000 },
-    { 0x3f000000, 0x00280e2b, 0x000 },
-    { 0x00000002, 0x00220e23, 0x000 },
-    { 0x00000007, 0x00494a23, 0x0dc },
-    { 0x00380f09, 0x00204811, 0x000 },
-    { 0x68000007, 0x00204811, 0x000 },
-    { 0x00000008, 0x00214a27, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x060a0200, 0x00294a24, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x0000a202, 0x00204411, 0x000 },
-    { 0x00ff0000, 0x00280e22, 0x000 },
-    { 0x00000080, 0x00294a23, 0x000 },
-    { 0x00000027, 0x00200e2d, 0x000 },
-    { 0x00000026, 0x0020122d, 0x000 },
-    { 0x00000000, 0x002f0083, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x0ea },
-    { 0x00000000, 0x00600000, 0x65f },
-    { 0x00000000, 0x00400000, 0x0eb },
-    { 0x00000000, 0x00600000, 0x662 },
-    { 0x00000007, 0x0020222d, 0x000 },
-    { 0x00000005, 0x00220e22, 0x000 },
-    { 0x00100000, 0x00280e23, 0x000 },
-    { 0x00000000, 0x00292068, 0x000 },
-    { 0x00000000, 0x003a0c02, 0x000 },
-    { 0x000000ef, 0x00280e23, 0x000 },
-    { 0x00000000, 0x00292068, 0x000 },
-    { 0x00000017, 0x00200e2d, 0x000 },
-    { 0x00000003, 0x00210223, 0x000 },
-    { 0x00000000, 0x14e00000, 0x0f8 },
-    { 0x0000000b, 0x00210228, 0x000 },
-    { 0x00000000, 0x14c00000, 0x0f8 },
-    { 0x00000400, 0x00292228, 0x000 },
-    { 0x00000014, 0x00203628, 0x000 },
-    { 0x0000001c, 0x00210e22, 0x000 },
-    { 0x00000000, 0x14c00000, 0x0fd },
-    { 0x0000a30c, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x0000001e, 0x00210e22, 0x000 },
-    { 0x00000000, 0x14c00000, 0x10b },
-    { 0x0000a30f, 0x00204411, 0x000 },
-    { 0x00000011, 0x00200e2d, 0x000 },
-    { 0x00000001, 0x002f0223, 0x000 },
-    { 0x00000000, 0x0cc00000, 0x104 },
-    { 0xffffffff, 0x00404811, 0x10b },
-    { 0x00000002, 0x002f0223, 0x000 },
-    { 0x00000000, 0x0cc00000, 0x107 },
-    { 0x0000ffff, 0x00404811, 0x10b },
-    { 0x00000004, 0x002f0223, 0x000 },
-    { 0x00000000, 0x0cc00000, 0x10a },
-    { 0x000000ff, 0x00404811, 0x10b },
-    { 0x00000001, 0x00204811, 0x000 },
-    { 0x0002c400, 0x00204411, 0x000 },
-    { 0x0000001f, 0x00210e22, 0x000 },
-    { 0x00000000, 0x14c00000, 0x112 },
-    { 0x00000010, 0x40210e20, 0x000 },
-    { 0x00000013, 0x00203623, 0x000 },
-    { 0x00000018, 0x40224a20, 0x000 },
-    { 0x00000010, 0xc0424a20, 0x114 },
-    { 0x00000000, 0x00200c11, 0x000 },
-    { 0x00000013, 0x00203623, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x0000000a, 0x00201011, 0x000 },
-    { 0x00000000, 0x002f0224, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x11b },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x00000001, 0x00531224, 0x117 },
-    { 0xffbfffff, 0x00283a2e, 0x000 },
-    { 0x0000001b, 0x00210222, 0x000 },
-    { 0x00000000, 0x14c00000, 0x12e },
-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x0000000d, 0x00204811, 0x000 },
-    { 0x00000018, 0x00220e30, 0x000 },
-    { 0xfc000000, 0x00280e23, 0x000 },
-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x0000000e, 0x00204811, 0x000 },
-    { 0x00000000, 0x00201010, 0x000 },
-    { 0x0000e00e, 0x00204411, 0x000 },
-    { 0x07f8ff08, 0x00204811, 0x000 },
-    { 0x00000000, 0x00294a23, 0x000 },
-    { 0x0000001c, 0x00201e2d, 0x000 },
-    { 0x00000008, 0x00214a27, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x060a0200, 0x00294a24, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x00000000, 0x00800000, 0x000 },
-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x00000001, 0x00204811, 0x000 },
-    { 0x0000217c, 0x00204411, 0x000 },
-    { 0x00800000, 0x00204811, 0x000 },
-    { 0x00000000, 0x00204806, 0x000 },
-    { 0x00000008, 0x00214a27, 0x000 },
-    { 0x00000000, 0x17000000, 0x000 },
-    { 0x0004217f, 0x00604411, 0x68a },
-    { 0x0000001f, 0x00210230, 0x000 },
-    { 0x00000000, 0x14c00000, 0x689 },
-    { 0x00000004, 0x00404c11, 0x135 },
-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x00000001, 0x00204811, 0x000 },
-    { 0x000021f8, 0x00204411, 0x000 },
-    { 0x0000001c, 0x00204811, 0x000 },
-    { 0x000421f9, 0x00604411, 0x68a },
-    { 0x00000011, 0x00210230, 0x000 },
-    { 0x00000000, 0x14e00000, 0x13c },
-    { 0x00000000, 0x00800000, 0x000 },
-    { 0x00000000, 0x00600000, 0x00b },
-    { 0x00000000, 0x00600411, 0x315 },
-    { 0x00000000, 0x00200411, 0x000 },
-    { 0x00000000, 0x00600811, 0x1b2 },
-    { 0x00000000, 0x00600000, 0x160 },
-    { 0x0000ffff, 0x40280e20, 0x000 },
-    { 0x00000010, 0xc0211220, 0x000 },
-    { 0x0000ffff, 0x40280620, 0x000 },
-    { 0x00000010, 0xc0210a20, 0x000 },
-    { 0x00000000, 0x00341461, 0x000 },
-    { 0x00000000, 0x00741882, 0x2bb },
-    { 0x0001a1fd, 0x00604411, 0x2e0 },
-    { 0x00003fff, 0x002f022f, 0x000 },
-    { 0x00000000, 0x0cc00000, 0x147 },
-    { 0x00000000, 0xc0400400, 0x001 },
-    { 0x00000000, 0x00600000, 0x00b },
-    { 0x00000000, 0x00600411, 0x315 },
-    { 0x00000000, 0x00200411, 0x000 },
-    { 0x00000000, 0x00600811, 0x1b2 },
-    { 0x00003fff, 0x002f022f, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x000 },
-    { 0x00000000, 0x00600000, 0x160 },
-    { 0x00000010, 0x40210e20, 0x000 },
-    { 0x0000ffff, 0xc0281220, 0x000 },
-    { 0x00000010, 0x40211620, 0x000 },
-    { 0x0000ffff, 0xc0681a20, 0x2bb },
-    { 0x0001a1fd, 0x00604411, 0x2e0 },
-    { 0x00003fff, 0x002f022f, 0x000 },
-    { 0x00000000, 0x0cc00000, 0x158 },
-    { 0x00000000, 0xc0400400, 0x001 },
-    { 0x0000225c, 0x00204411, 0x000 },
-    { 0x00000001, 0x00300a2f, 0x000 },
-    { 0x00000001, 0x00210a22, 0x000 },
-    { 0x00000003, 0x00384a22, 0x000 },
-    { 0x00002256, 0x00204411, 0x000 },
-    { 0x0000001a, 0x00204811, 0x000 },
-    { 0x0000a1fc, 0x00204411, 0x000 },
-    { 0x00000001, 0x00804811, 0x000 },
-    { 0x00000000, 0x00600000, 0x00b },
-    { 0x00000000, 0x00600000, 0x18f },
-    { 0x00000000, 0x00600000, 0x1a0 },
-    { 0x00003fff, 0x002f022f, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x000 },
-    { 0x00000000, 0x00202c08, 0x000 },
-    { 0x00000000, 0x00202411, 0x000 },
-    { 0x00000000, 0x00202811, 0x000 },
-    { 0x00002256, 0x00204411, 0x000 },
-    { 0x00000016, 0x00204811, 0x000 },
-    { 0x0000225c, 0x00204411, 0x000 },
-    { 0x00000003, 0x00204811, 0x000 },
-    { 0x93800000, 0x00204411, 0x000 },
-    { 0x00000002, 0x00221e29, 0x000 },
-    { 0x00000000, 0x007048eb, 0x19c },
-    { 0x00000000, 0x00600000, 0x2bb },
-    { 0x00000001, 0x40330620, 0x000 },
-    { 0x00000000, 0xc0302409, 0x000 },
-    { 0x00003fff, 0x002f022f, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x000 },
-    { 0x00000000, 0x00600000, 0x2a3 },
-    { 0x00000000, 0x002f0221, 0x000 },
-    { 0x00000000, 0x0ae00000, 0x181 },
-    { 0x00000000, 0x00600000, 0x13a },
-    { 0x00000000, 0x00400000, 0x186 },
-    { 0x95000000, 0x00204411, 0x000 },
-    { 0x00000000, 0x002f0221, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x186 },
-    { 0x00000000, 0xc0204800, 0x000 },
-    { 0x00000001, 0x00530621, 0x182 },
-    { 0x92000000, 0x00204411, 0x000 },
-    { 0x00000000, 0xc0604800, 0x197 },
-    { 0x0001a1fd, 0x00204411, 0x000 },
-    { 0x00000011, 0x0020062d, 0x000 },
-    { 0x00000000, 0x0078042a, 0x2fb },
-    { 0x00000000, 0x00202809, 0x000 },
-    { 0x00003fff, 0x002f022f, 0x000 },
-    { 0x00000000, 0x0cc00000, 0x174 },
-    { 0x00000000, 0xc0400400, 0x001 },
-    { 0x00000210, 0x00600411, 0x315 },
-    { 0x00003fff, 0x002f022f, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x194 },
-    { 0x00000015, 0xc0203620, 0x000 },
-    { 0x00000016, 0xc0203620, 0x000 },
-    { 0x3f800000, 0x00200411, 0x000 },
-    { 0x46000000, 0x00600811, 0x1b2 },
-    { 0x00000000, 0x00800000, 0x000 },
-    { 0x0000a1fc, 0x00204411, 0x000 },
-    { 0x00003fff, 0x002f022f, 0x000 },
-    { 0x00000000, 0x0cc00000, 0x19b },
-    { 0x00000001, 0x00804811, 0x000 },
-    { 0x00000021, 0x00804811, 0x000 },
-    { 0x0000ffff, 0x40280e20, 0x000 },
-    { 0x00000010, 0xc0211220, 0x000 },
-    { 0x0000ffff, 0x40281620, 0x000 },
-    { 0x00000010, 0xc0811a20, 0x000 },
-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x00000006, 0x00204811, 0x000 },
-    { 0x00000008, 0x00221e30, 0x000 },
-    { 0x00000029, 0x00201a2d, 0x000 },
-    { 0x0000e000, 0x00204411, 0x000 },
-    { 0xfffbff09, 0x00204811, 0x000 },
-    { 0x0000000f, 0x0020222d, 0x000 },
-    { 0x00001fff, 0x00294a28, 0x000 },
-    { 0x00000006, 0x0020222d, 0x000 },
-    { 0x00000000, 0x002920e8, 0x000 },
-    { 0x00000000, 0x00204808, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x060a0200, 0x00294a26, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x00000100, 0x00201811, 0x000 },
-    { 0x00000008, 0x00621e28, 0x12f },
-    { 0x00000008, 0x00822228, 0x000 },
-    { 0x0002c000, 0x00204411, 0x000 },
-    { 0x00000015, 0x00600e2d, 0x1bd },
-    { 0x00000016, 0x00600e2d, 0x1bd },
-    { 0x0000c008, 0x00204411, 0x000 },
-    { 0x00000017, 0x00200e2d, 0x000 },
-    { 0x00000000, 0x14c00000, 0x1b9 },
-    { 0x00000000, 0x00200411, 0x000 },
-    { 0x00000000, 0x00204801, 0x000 },
-    { 0x39000000, 0x00204811, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x00000000, 0x00804802, 0x000 },
-    { 0x00000018, 0x00202e2d, 0x000 },
-    { 0x00000000, 0x003b0d63, 0x000 },
-    { 0x00000008, 0x00224a23, 0x000 },
-    { 0x00000010, 0x00224a23, 0x000 },
-    { 0x00000018, 0x00224a23, 0x000 },
-    { 0x00000000, 0x00804803, 0x000 },
-    { 0x00000000, 0x00600000, 0x00b },
-    { 0x00001000, 0x00600411, 0x315 },
-    { 0x00000000, 0x00200411, 0x000 },
-    { 0x00000000, 0x00600811, 0x1b2 },
-    { 0x00000007, 0x0021062f, 0x000 },
-    { 0x00000013, 0x00200a2d, 0x000 },
-    { 0x00000001, 0x00202c11, 0x000 },
-    { 0x0000ffff, 0x40282220, 0x000 },
-    { 0x0000000f, 0x00262228, 0x000 },
-    { 0x00000010, 0x40212620, 0x000 },
-    { 0x0000000f, 0x00262629, 0x000 },
-    { 0x00000000, 0x00202802, 0x000 },
-    { 0x00002256, 0x00204411, 0x000 },
-    { 0x0000001b, 0x00204811, 0x000 },
-    { 0x00000000, 0x002f0221, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x1e0 },
-    { 0x0000225c, 0x00204411, 0x000 },
-    { 0x00000081, 0x00204811, 0x000 },
-    { 0x0000a1fc, 0x00204411, 0x000 },
-    { 0x00000001, 0x00204811, 0x000 },
-    { 0x00000080, 0x00201c11, 0x000 },
-    { 0x00000000, 0x002f0227, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x1dc },
-    { 0x00000000, 0x00600000, 0x1e9 },
-    { 0x00000001, 0x00531e27, 0x1d8 },
-    { 0x00000001, 0x00202c11, 0x000 },
-    { 0x0000001f, 0x00280a22, 0x000 },
-    { 0x0000001f, 0x00282a2a, 0x000 },
-    { 0x00000001, 0x00530621, 0x1d1 },
-    { 0x0000225c, 0x00204411, 0x000 },
-    { 0x00000002, 0x00304a2f, 0x000 },
-    { 0x0000a1fc, 0x00204411, 0x000 },
-    { 0x00000001, 0x00204811, 0x000 },
-    { 0x00000001, 0x00301e2f, 0x000 },
-    { 0x00000000, 0x002f0227, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x000 },
-    { 0x00000000, 0x00600000, 0x1e9 },
-    { 0x00000001, 0x00531e27, 0x1e5 },
-    { 0x0000ffff, 0x40280e20, 0x000 },
-    { 0x0000000f, 0x00260e23, 0x000 },
-    { 0x00000010, 0xc0211220, 0x000 },
-    { 0x0000000f, 0x00261224, 0x000 },
-    { 0x00000000, 0x00201411, 0x000 },
-    { 0x00000000, 0x00601811, 0x2bb },
-    { 0x0001a1fd, 0x00204411, 0x000 },
-    { 0x00000000, 0x002f022b, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x1f8 },
-    { 0x00000010, 0x00221628, 0x000 },
-    { 0xffff0000, 0x00281625, 0x000 },
-    { 0x0000ffff, 0x00281a29, 0x000 },
-    { 0x00000000, 0x002948c5, 0x000 },
-    { 0x00000000, 0x0020480a, 0x000 },
-    { 0x00000000, 0x00202c11, 0x000 },
-    { 0x00000010, 0x00221623, 0x000 },
-    { 0xffff0000, 0x00281625, 0x000 },
-    { 0x0000ffff, 0x00281a24, 0x000 },
-    { 0x00000000, 0x002948c5, 0x000 },
-    { 0x00000000, 0x00731503, 0x205 },
-    { 0x00000000, 0x00201805, 0x000 },
-    { 0x00000000, 0x00731524, 0x205 },
-    { 0x00000000, 0x002d14c5, 0x000 },
-    { 0x00000000, 0x003008a2, 0x000 },
-    { 0x00000000, 0x00204802, 0x000 },
-    { 0x00000000, 0x00202802, 0x000 },
-    { 0x00000000, 0x00202003, 0x000 },
-    { 0x00000000, 0x00802404, 0x000 },
-    { 0x0000000f, 0x00210225, 0x000 },
-    { 0x00000000, 0x14c00000, 0x689 },
-    { 0x00000000, 0x002b1405, 0x000 },
-    { 0x00000001, 0x00901625, 0x000 },
-    { 0x00000000, 0x00600000, 0x00b },
-    { 0x00000000, 0x00600411, 0x315 },
-    { 0x00000000, 0x00200411, 0x000 },
-    { 0x00000000, 0x00600811, 0x1b2 },
-    { 0x00002256, 0x00204411, 0x000 },
-    { 0x0000001a, 0x00294a22, 0x000 },
-    { 0x00000000, 0xc0200000, 0x000 },
-    { 0x00003fff, 0x002f022f, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x000 },
-    { 0x00000000, 0xc0200400, 0x000 },
-    { 0x0000225c, 0x00204411, 0x000 },
-    { 0x00000003, 0x00384a21, 0x000 },
-    { 0x0000a1fc, 0x00204411, 0x000 },
-    { 0x00000001, 0x00204811, 0x000 },
-    { 0x0000ffff, 0x40281220, 0x000 },
-    { 0x00000010, 0xc0211a20, 0x000 },
-    { 0x0000ffff, 0x40280e20, 0x000 },
-    { 0x00000010, 0xc0211620, 0x000 },
-    { 0x00000000, 0x00741465, 0x2bb },
-    { 0x0001a1fd, 0x00604411, 0x2e0 },
-    { 0x00000001, 0x00330621, 0x000 },
-    { 0x00000000, 0x002f0221, 0x000 },
-    { 0x00000000, 0x0cc00000, 0x219 },
-    { 0x00003fff, 0x002f022f, 0x000 },
-    { 0x00000000, 0x0cc00000, 0x212 },
-    { 0x00000000, 0xc0400400, 0x001 },
-    { 0x00000000, 0x00600000, 0x642 },
-    { 0x00000000, 0x0040040f, 0x213 },
-    { 0x00000000, 0x00600000, 0x62e },
-    { 0x00000000, 0x00600000, 0x642 },
-    { 0x00000210, 0x00600411, 0x315 },
-    { 0x00000000, 0x00600000, 0x1a0 },
-    { 0x00000000, 0x00600000, 0x19c },
-    { 0x00000000, 0x00600000, 0x2bb },
-    { 0x00000000, 0x00600000, 0x2a3 },
-    { 0x93800000, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204808, 0x000 },
-    { 0x00000000, 0x002f022f, 0x000 },
-    { 0x00000000, 0x0ae00000, 0x232 },
-    { 0x00000000, 0x00600000, 0x13a },
-    { 0x00000000, 0x00400000, 0x236 },
-    { 0x95000000, 0x00204411, 0x000 },
-    { 0x00000000, 0x002f022f, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x236 },
-    { 0x00000000, 0xc0404800, 0x233 },
-    { 0x92000000, 0x00204411, 0x000 },
-    { 0x00000000, 0xc0204800, 0x000 },
-    { 0x00002256, 0x00204411, 0x000 },
-    { 0x00000016, 0x00204811, 0x000 },
-    { 0x0000225c, 0x00204411, 0x000 },
-    { 0x00000003, 0x00204811, 0x000 },
-    { 0x0000a1fc, 0x00204411, 0x000 },
-    { 0x00000001, 0x00204811, 0x000 },
-    { 0x0001a1fd, 0x00204411, 0x000 },
-    { 0x00000000, 0x00600411, 0x2fb },
-    { 0x00000000, 0xc0400400, 0x001 },
-    { 0x00000000, 0x00600000, 0x62e },
-    { 0x0000a00c, 0x00204411, 0x000 },
-    { 0x00000000, 0xc0204800, 0x000 },
-    { 0x00000000, 0xc0404800, 0x000 },
-    { 0x00000000, 0x00600000, 0x00b },
-    { 0x00000018, 0x40210a20, 0x000 },
-    { 0x00000003, 0x002f0222, 0x000 },
-    { 0x00000000, 0x0ae00000, 0x24c },
-    { 0x00000014, 0x0020222d, 0x000 },
-    { 0x00080101, 0x00292228, 0x000 },
-    { 0x00000014, 0x00203628, 0x000 },
-    { 0x0000a30c, 0x00204411, 0x000 },
-    { 0x00000000, 0xc0204800, 0x000 },
-    { 0x00000000, 0xc0204800, 0x000 },
-    { 0x00000000, 0xc0404800, 0x251 },
-    { 0x00000000, 0x00600000, 0x00b },
-    { 0x00000010, 0x00600411, 0x315 },
-    { 0x3f800000, 0x00200411, 0x000 },
-    { 0x00000000, 0x00600811, 0x1b2 },
-    { 0x0000225c, 0x00204411, 0x000 },
-    { 0x00000003, 0x00204811, 0x000 },
-    { 0x00000000, 0x00600000, 0x27c },
-    { 0x00000017, 0x00201e2d, 0x000 },
-    { 0x00000001, 0x00211e27, 0x000 },
-    { 0x00000000, 0x14e00000, 0x26a },
-    { 0x00000012, 0x00201e2d, 0x000 },
-    { 0x0000ffff, 0x00281e27, 0x000 },
-    { 0x00000000, 0x00341c27, 0x000 },
-    { 0x00000000, 0x12c00000, 0x25f },
-    { 0x00000000, 0x00201c11, 0x000 },
-    { 0x00000000, 0x002f00e5, 0x000 },
-    { 0x00000000, 0x08c00000, 0x262 },
-    { 0x00000000, 0x00201407, 0x000 },
-    { 0x00000012, 0x00201e2d, 0x000 },
-    { 0x00000010, 0x00211e27, 0x000 },
-    { 0x00000000, 0x00341c47, 0x000 },
-    { 0x00000000, 0x12c00000, 0x267 },
-    { 0x00000000, 0x00201c11, 0x000 },
-    { 0x00000000, 0x002f00e6, 0x000 },
-    { 0x00000000, 0x08c00000, 0x26a },
-    { 0x00000000, 0x00201807, 0x000 },
-    { 0x00000000, 0x00600000, 0x2c1 },
-    { 0x00002256, 0x00204411, 0x000 },
-    { 0x00000000, 0x00342023, 0x000 },
-    { 0x00000000, 0x12c00000, 0x272 },
-    { 0x00000000, 0x00342044, 0x000 },
-    { 0x00000000, 0x12c00000, 0x271 },
-    { 0x00000016, 0x00404811, 0x276 },
-    { 0x00000018, 0x00404811, 0x276 },
-    { 0x00000000, 0x00342044, 0x000 },
-    { 0x00000000, 0x12c00000, 0x275 },
-    { 0x00000017, 0x00404811, 0x276 },
-    { 0x00000019, 0x00204811, 0x000 },
-    { 0x0000a1fc, 0x00204411, 0x000 },
-    { 0x00000001, 0x00204811, 0x000 },
-    { 0x0001a1fd, 0x00604411, 0x2e9 },
-    { 0x00003fff, 0x002f022f, 0x000 },
-    { 0x00000000, 0x0cc00000, 0x256 },
-    { 0x00000000, 0xc0400400, 0x001 },
-    { 0x00000010, 0x40210620, 0x000 },
-    { 0x0000ffff, 0xc0280a20, 0x000 },
-    { 0x00000010, 0x40210e20, 0x000 },
-    { 0x0000ffff, 0xc0281220, 0x000 },
-    { 0x00000010, 0x40211620, 0x000 },
-    { 0x0000ffff, 0xc0881a20, 0x000 },
-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x00000001, 0x00204811, 0x000 },
-    { 0x00042004, 0x00604411, 0x68a },
-    { 0x00000000, 0x00600000, 0x62e },
-    { 0x00000000, 0xc0600000, 0x2a3 },
-    { 0x00000005, 0x00200a2d, 0x000 },
-    { 0x00000008, 0x00220a22, 0x000 },
-    { 0x0000002b, 0x00201a2d, 0x000 },
-    { 0x0000001c, 0x00201e2d, 0x000 },
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-    { 0x00000000, 0x00311ce6, 0x000 },
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-    { 0x00000000, 0x002f00e6, 0x000 },
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-    { 0x00000000, 0x00691ce2, 0x12f },
-    { 0x93800000, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204807, 0x000 },
-    { 0x95000000, 0x00204411, 0x000 },
-    { 0x00000000, 0x002f022f, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x29d },
-    { 0x00000001, 0x00333e2f, 0x000 },
-    { 0x00000000, 0xd9004800, 0x000 },
-    { 0x92000000, 0x00204411, 0x000 },
-    { 0x00000000, 0xc0204800, 0x000 },
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-    { 0x00000009, 0x00204811, 0x000 },
-    { 0xa1000000, 0x00204411, 0x000 },
-    { 0x00000001, 0x00804811, 0x000 },
-    { 0x00000021, 0x00201e2d, 0x000 },
-    { 0x00000000, 0x002c1ce3, 0x000 },
-    { 0x00000021, 0x00203627, 0x000 },
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-    { 0x00000000, 0x002c1ce4, 0x000 },
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-    { 0x00000000, 0x003120c4, 0x000 },
-    { 0x00000000, 0x002d1d07, 0x000 },
-    { 0x00000024, 0x00803627, 0x000 },
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-    { 0x0000001a, 0x00203627, 0x000 },
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-    { 0x00000002, 0x00210227, 0x000 },
-    { 0x00000000, 0x14c00000, 0x2dc },
-    { 0x00000000, 0x00400000, 0x2d9 },
-    { 0x0000001a, 0x00203627, 0x000 },
-    { 0x0000001b, 0x00203628, 0x000 },
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-    { 0x00000002, 0x00210227, 0x000 },
-    { 0x00000000, 0x14e00000, 0x2d9 },
-    { 0x00000003, 0x00210227, 0x000 },
-    { 0x00000000, 0x14e00000, 0x2dc },
-    { 0x00000023, 0x00201e2d, 0x000 },
-    { 0x00000000, 0x002e00e1, 0x000 },
-    { 0x00000000, 0x02c00000, 0x2dc },
-    { 0x00000021, 0x00201e2d, 0x000 },
-    { 0x00000000, 0x003120a1, 0x000 },
-    { 0x00000000, 0x002e00e8, 0x000 },
-    { 0x00000000, 0x06c00000, 0x2dc },
-    { 0x00000024, 0x00201e2d, 0x000 },
-    { 0x00000000, 0x002e00e2, 0x000 },
-    { 0x00000000, 0x02c00000, 0x2dc },
-    { 0x00000022, 0x00201e2d, 0x000 },
-    { 0x00000000, 0x003120c2, 0x000 },
-    { 0x00000000, 0x002e00e8, 0x000 },
-    { 0x00000000, 0x06c00000, 0x2dc },
-    { 0x00000000, 0x00600000, 0x665 },
-    { 0x00000000, 0x00600000, 0x2b5 },
-    { 0x00000000, 0x00400000, 0x2de },
-    { 0x00000000, 0x00600000, 0x2b5 },
-    { 0x00000000, 0x00600000, 0x65c },
-    { 0x00000000, 0x00400000, 0x2de },
-    { 0x00000000, 0x00600000, 0x2a7 },
-    { 0x00000000, 0x00400000, 0x2de },
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-    { 0x0000001b, 0x0080222d, 0x000 },
-    { 0x00000010, 0x00221e23, 0x000 },
-    { 0x00000000, 0x00294887, 0x000 },
-    { 0x00000000, 0x00311ca3, 0x000 },
-    { 0x00000010, 0x00221e27, 0x000 },
-    { 0x00000000, 0x00294887, 0x000 },
-    { 0x00000010, 0x00221e23, 0x000 },
-    { 0x00000000, 0x003120c4, 0x000 },
-    { 0x0000ffff, 0x00282228, 0x000 },
-    { 0x00000000, 0x00894907, 0x000 },
-    { 0x00000010, 0x00221e23, 0x000 },
-    { 0x00000000, 0x00294887, 0x000 },
-    { 0x00000010, 0x00221e21, 0x000 },
-    { 0x00000000, 0x00294847, 0x000 },
-    { 0x00000000, 0x00311ca3, 0x000 },
-    { 0x00000010, 0x00221e27, 0x000 },
-    { 0x00000000, 0x00294887, 0x000 },
-    { 0x00000000, 0x00311ca1, 0x000 },
-    { 0x00000010, 0x00221e27, 0x000 },
-    { 0x00000000, 0x00294847, 0x000 },
-    { 0x00000010, 0x00221e23, 0x000 },
-    { 0x00000000, 0x003120c4, 0x000 },
-    { 0x0000ffff, 0x00282228, 0x000 },
-    { 0x00000000, 0x00294907, 0x000 },
-    { 0x00000010, 0x00221e21, 0x000 },
-    { 0x00000000, 0x003120c2, 0x000 },
-    { 0x0000ffff, 0x00282228, 0x000 },
-    { 0x00000000, 0x00894907, 0x000 },
-    { 0x00000010, 0x00221e23, 0x000 },
-    { 0x00000000, 0x00294887, 0x000 },
-    { 0x00000001, 0x00220a21, 0x000 },
-    { 0x00000000, 0x003308a2, 0x000 },
-    { 0x00000010, 0x00221e22, 0x000 },
-    { 0x00000010, 0x00212222, 0x000 },
-    { 0x00000000, 0x00294907, 0x000 },
-    { 0x00000000, 0x00311ca3, 0x000 },
-    { 0x00000010, 0x00221e27, 0x000 },
-    { 0x00000000, 0x00294887, 0x000 },
-    { 0x00000001, 0x00220a21, 0x000 },
-    { 0x00000000, 0x003008a2, 0x000 },
-    { 0x00000010, 0x00221e22, 0x000 },
-    { 0x00000010, 0x00212222, 0x000 },
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-    { 0x0000ffff, 0x00282228, 0x000 },
-    { 0x00000000, 0x00294907, 0x000 },
-    { 0x00000000, 0x003808c5, 0x000 },
-    { 0x00000000, 0x00300841, 0x000 },
-    { 0x00000001, 0x00220a22, 0x000 },
-    { 0x00000000, 0x003308a2, 0x000 },
-    { 0x00000010, 0x00221e22, 0x000 },
-    { 0x00000010, 0x00212222, 0x000 },
-    { 0x00000000, 0x00894907, 0x000 },
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-    { 0x00000000, 0x14c00000, 0x318 },
-    { 0xffffffef, 0x00280621, 0x000 },
-    { 0x00000014, 0x0020222d, 0x000 },
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-    { 0x00000000, 0x00294901, 0x000 },
-    { 0x00000000, 0x00894901, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x060a0200, 0x00804811, 0x000 },
-    { 0x00000000, 0xc0200000, 0x000 },
-    { 0x97000000, 0xc0204411, 0x000 },
-    { 0x00000000, 0xc0204811, 0x000 },
-    { 0x8a000000, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x0000225c, 0x00204411, 0x000 },
-    { 0x00000000, 0xc0204800, 0x000 },
-    { 0x0000a1fc, 0x00204411, 0x000 },
-    { 0x00000000, 0xc0204800, 0x000 },
-    { 0x00000000, 0xc0200400, 0x000 },
-    { 0x00000000, 0x00a0000a, 0x000 },
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-    { 0x00000000, 0xd9004800, 0x000 },
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-    { 0x00000003, 0xc0484a20, 0x000 },
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-    { 0x00000000, 0xc0404800, 0x000 },
-    { 0x00000000, 0x00600000, 0x642 },
-    { 0x00000000, 0xc0200800, 0x000 },
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-    { 0x00000000, 0x0ce00000, 0x000 },
-    { 0x00000000, 0x40204800, 0x000 },
-    { 0x00000001, 0x40304a20, 0x000 },
-    { 0x00000002, 0xc0304a20, 0x000 },
-    { 0x00000001, 0x00530a22, 0x34b },
-    { 0x0000003f, 0xc0280a20, 0x000 },
-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x00000001, 0x00204811, 0x000 },
-    { 0x000021f8, 0x00204411, 0x000 },
-    { 0x00000018, 0x00204811, 0x000 },
-    { 0x000421f9, 0x00604411, 0x68a },
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-    { 0x00000000, 0x0cc00000, 0x364 },
-    { 0x00002010, 0x00204411, 0x000 },
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-    { 0x0001a2a4, 0x00204411, 0x000 },
-    { 0x00000000, 0x00604802, 0x36e },
-    { 0x00002100, 0x00204411, 0x000 },
-    { 0x00000000, 0xc0204800, 0x000 },
-    { 0x00000000, 0xc0204800, 0x000 },
-    { 0x00000000, 0xc0204800, 0x000 },
-    { 0x00000000, 0xc0404800, 0x000 },
-    { 0x00000004, 0x002f0222, 0x000 },
-    { 0x00000000, 0x0cc00000, 0x36a },
-    { 0x00002010, 0x00204411, 0x000 },
-    { 0x00008000, 0x00204811, 0x000 },
-    { 0x0001a2a4, 0x00204411, 0x000 },
-    { 0x00000000, 0x00404802, 0x35f },
-    { 0x00000028, 0x002f0222, 0x000 },
-    { 0x00000000, 0x0cc00000, 0x5bd },
-    { 0x0001a2a4, 0x00204411, 0x000 },
-    { 0x00000000, 0x00404802, 0x35f },
-    { 0x0000002c, 0x00203626, 0x000 },
-    { 0x00000049, 0x00201811, 0x000 },
-    { 0x0000003f, 0x00204811, 0x000 },
-    { 0x00000001, 0x00331a26, 0x000 },
-    { 0x00000000, 0x002f0226, 0x000 },
-    { 0x00000000, 0x0cc00000, 0x370 },
-    { 0x0000002c, 0x00801a2d, 0x000 },
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-    { 0x00000000, 0x0ce00000, 0x386 },
-    { 0x00000006, 0x002f0222, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x3b1 },
-    { 0x00000016, 0x002f0222, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x3b5 },
-    { 0x00000020, 0x002f0222, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x39c },
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-    { 0x00000000, 0x0ce00000, 0x3a8 },
-    { 0x00000010, 0x002f0222, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x3a8 },
-    { 0x0000001e, 0x002f0222, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x390 },
-    { 0x0000a2a4, 0x00204411, 0x000 },
-    { 0x00000000, 0x00404802, 0x000 },
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-    { 0x00000003, 0x40210e20, 0x000 },
-    { 0x0000000c, 0xc0211220, 0x000 },
-    { 0x00080000, 0x00281224, 0x000 },
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-    { 0x00000000, 0x002914a4, 0x000 },
-    { 0x0000a2a4, 0x00204411, 0x000 },
-    { 0x00000000, 0x002948a2, 0x000 },
-    { 0x0000a1fe, 0x00204411, 0x000 },
-    { 0x00000000, 0x00404803, 0x000 },
-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x00000001, 0x00204811, 0x000 },
-    { 0x000021f8, 0x00204411, 0x000 },
-    { 0x00000016, 0x00204811, 0x000 },
-    { 0x000421f9, 0x00604411, 0x68a },
-    { 0x00000015, 0x00210230, 0x000 },
-    { 0x00000000, 0x14e00000, 0x392 },
-    { 0x0000210e, 0x00204411, 0x000 },
-    { 0x00000000, 0xc0204800, 0x000 },
-    { 0x00000000, 0xc0204800, 0x000 },
-    { 0x0000a2a4, 0x00204411, 0x000 },
-    { 0x00000000, 0x00404802, 0x000 },
-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x00000001, 0x00204811, 0x000 },
-    { 0x000021f8, 0x00204411, 0x000 },
-    { 0x00000017, 0x00204811, 0x000 },
-    { 0x000421f9, 0x00604411, 0x68a },
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-    { 0x00000000, 0x14e00000, 0x39e },
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-    { 0x00000000, 0xc0204800, 0x000 },
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-    { 0x00000000, 0x00404802, 0x000 },
-    { 0x0000a2a4, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204802, 0x000 },
-    { 0x80000000, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x00000010, 0x00204811, 0x000 },
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-    { 0x00000000, 0x14c00000, 0x3ae },
-    { 0x00000000, 0x00400000, 0x000 },
-    { 0x00002010, 0x00204411, 0x000 },
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-    { 0x00000006, 0x00404811, 0x000 },
-    { 0x00002010, 0x00204411, 0x000 },
-    { 0x00008000, 0x00204811, 0x000 },
-    { 0x0001a2a4, 0x00204411, 0x000 },
-    { 0x00000016, 0x00604811, 0x36e },
-    { 0x00000000, 0x00400000, 0x000 },
-    { 0x00000000, 0xc0200800, 0x000 },
-    { 0x00000000, 0xc0200c00, 0x000 },
-    { 0x0000001d, 0x00210223, 0x000 },
-    { 0x00000000, 0x14e00000, 0x3ce },
-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x00000001, 0x00204811, 0x000 },
-    { 0x000021f8, 0x00204411, 0x000 },
-    { 0x00000018, 0x00204811, 0x000 },
-    { 0x000421f9, 0x00604411, 0x68a },
-    { 0x00000011, 0x00210230, 0x000 },
-    { 0x00000000, 0x14e00000, 0x3c0 },
-    { 0x00002100, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204802, 0x000 },
-    { 0x00000000, 0x00204803, 0x000 },
-    { 0xbabecafe, 0x00204811, 0x000 },
-    { 0xcafebabe, 0x00204811, 0x000 },
-    { 0x00002010, 0x00204411, 0x000 },
-    { 0x00008000, 0x00204811, 0x000 },
-    { 0x0000a2a4, 0x00204411, 0x000 },
-    { 0x00000004, 0x00404811, 0x000 },
-    { 0x00002170, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204802, 0x000 },
-    { 0x00000000, 0x00204803, 0x000 },
-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x0000000a, 0x00204811, 0x000 },
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-    { 0x00000000, 0x14c00000, 0x3d3 },
-    { 0x8c000000, 0x00204411, 0x000 },
-    { 0xcafebabe, 0x00404811, 0x000 },
-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x00000001, 0x00204811, 0x000 },
-    { 0x00003fff, 0x40280a20, 0x000 },
-    { 0x80000000, 0x40280e20, 0x000 },
-    { 0x40000000, 0xc0281220, 0x000 },
-    { 0x00040000, 0x00694622, 0x68a },
-    { 0x00000000, 0x00201410, 0x000 },
-    { 0x00000000, 0x002f0223, 0x000 },
-    { 0x00000000, 0x0cc00000, 0x3e1 },
-    { 0x00000000, 0xc0401800, 0x3e4 },
-    { 0x00003fff, 0xc0281a20, 0x000 },
-    { 0x00040000, 0x00694626, 0x68a },
-    { 0x00000000, 0x00201810, 0x000 },
-    { 0x00000000, 0x002f0224, 0x000 },
-    { 0x00000000, 0x0cc00000, 0x3e7 },
-    { 0x00000000, 0xc0401c00, 0x3ea },
-    { 0x00003fff, 0xc0281e20, 0x000 },
-    { 0x00040000, 0x00694627, 0x68a },
-    { 0x00000000, 0x00201c10, 0x000 },
-    { 0x00000000, 0x00204402, 0x000 },
-    { 0x00000000, 0x002820c5, 0x000 },
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-    { 0x00002000, 0x00200c11, 0x000 },
-    { 0x83000000, 0x00604411, 0x412 },
-    { 0x00000000, 0x00204402, 0x000 },
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-    { 0x00000000, 0x40204800, 0x000 },
-    { 0x0000001f, 0xc0210220, 0x000 },
-    { 0x00000000, 0x14c00000, 0x3f7 },
-    { 0x00002010, 0x00204411, 0x000 },
-    { 0x00008000, 0x00204811, 0x000 },
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-    { 0xa7800000, 0x00200811, 0x000 },
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-    { 0x83000000, 0x00604411, 0x412 },
-    { 0x00000000, 0x00204402, 0x000 },
-    { 0x00000000, 0xc0204800, 0x000 },
-    { 0x00000000, 0xc0204800, 0x000 },
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-    { 0x00000000, 0x00304883, 0x000 },
-    { 0x84000000, 0x00204411, 0x000 },
-    { 0x00000000, 0xc0204800, 0x000 },
-    { 0x00000000, 0x1d000000, 0x000 },
-    { 0x83000000, 0x00604411, 0x412 },
-    { 0x00000000, 0xc0400400, 0x001 },
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-    { 0x0000c000, 0x00400c11, 0x3fa },
-    { 0xab800000, 0x00200811, 0x000 },
-    { 0x0000f8e0, 0x00400c11, 0x3fa },
-    { 0xad800000, 0x00200811, 0x000 },
-    { 0x0000f880, 0x00400c11, 0x3fa },
-    { 0xb3800000, 0x00200811, 0x000 },
-    { 0x0000f3fc, 0x00400c11, 0x3fa },
-    { 0xaf800000, 0x00200811, 0x000 },
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-    { 0x00000006, 0x00222630, 0x000 },
-    { 0x00042004, 0x00604411, 0x68a },
-    { 0x0000a2c6, 0x00204411, 0x000 },
-    { 0x00000000, 0x003048e9, 0x000 },
-    { 0x00000000, 0x00e00000, 0x5ac },
-    { 0x0000a2d3, 0x00204411, 0x000 },
-    { 0x00000000, 0x00404808, 0x000 },
-    { 0x0000a2d3, 0x00204411, 0x000 },
-    { 0x00000001, 0x00504a28, 0x000 },
-    { 0x0000a2c3, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204807, 0x000 },
-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x00000001, 0x00204811, 0x000 },
-    { 0x0004a2c2, 0x00604411, 0x68a },
-    { 0x0000001a, 0x00212230, 0x000 },
-    { 0x00000006, 0x00222630, 0x000 },
-    { 0x00042004, 0x00604411, 0x68a },
-    { 0x0000a2c7, 0x00204411, 0x000 },
-    { 0x00000000, 0x003048e9, 0x000 },
-    { 0x00000000, 0x00e00000, 0x5bb },
-    { 0x0000a2d4, 0x00204411, 0x000 },
-    { 0x00000000, 0x00404808, 0x000 },
-    { 0x0000a2d4, 0x00204411, 0x000 },
-    { 0x00000001, 0x00504a28, 0x000 },
-    { 0x85000000, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204801, 0x000 },
-    { 0x0000304a, 0x00204411, 0x000 },
-    { 0x01000000, 0x00204811, 0x000 },
-    { 0x00000000, 0x00400000, 0x5c1 },
-    { 0xa4000000, 0xc0204411, 0x000 },
-    { 0x00000000, 0xc0404800, 0x000 },
-    { 0x00000000, 0xc0600000, 0x5c6 },
-    { 0x00000000, 0xc0400400, 0x001 },
-    { 0x0000002c, 0x00203621, 0x000 },
-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x00000006, 0x00204811, 0x000 },
-    { 0x00000000, 0x002f0230, 0x000 },
-    { 0x00000000, 0x0cc00000, 0x5cd },
-    { 0x00000000, 0x00200411, 0x000 },
-    { 0x00000030, 0x00403621, 0x5e0 },
-    { 0x00000030, 0x0020062d, 0x000 },
-    { 0x00007e00, 0x00280621, 0x000 },
-    { 0x00000000, 0x002f0221, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x5e0 },
-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x00000001, 0x00204811, 0x000 },
-    { 0x0004a092, 0x00604411, 0x68a },
-    { 0x00000031, 0x00203630, 0x000 },
-    { 0x0004a093, 0x00604411, 0x68a },
-    { 0x00000032, 0x00203630, 0x000 },
-    { 0x0004a2b6, 0x00604411, 0x68a },
-    { 0x00000033, 0x00203630, 0x000 },
-    { 0x0004a2ba, 0x00604411, 0x68a },
-    { 0x00000034, 0x00203630, 0x000 },
-    { 0x0004a2be, 0x00604411, 0x68a },
-    { 0x00000035, 0x00203630, 0x000 },
-    { 0x0004a2c2, 0x00604411, 0x68a },
-    { 0x00000036, 0x00203630, 0x000 },
-    { 0x00042004, 0x00604411, 0x68a },
-    { 0x0001a2a4, 0x00204411, 0x000 },
-    { 0x0000003f, 0x00204811, 0x000 },
-    { 0x0000003f, 0x00204811, 0x000 },
-    { 0x0000003f, 0x00204811, 0x000 },
-    { 0x0000003f, 0x00204811, 0x000 },
-    { 0x00000005, 0x00204811, 0x000 },
-    { 0x0000a1f4, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x88000000, 0x00204411, 0x000 },
-    { 0x00000001, 0x00204811, 0x000 },
-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x00000006, 0x00204811, 0x000 },
-    { 0x00000001, 0x002f0230, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x629 },
-    { 0x00000030, 0x0020062d, 0x000 },
-    { 0x00000000, 0x002f0221, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x629 },
-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x00000001, 0x00204811, 0x000 },
-    { 0x00007e00, 0x00280621, 0x000 },
-    { 0x00000000, 0x002f0221, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x602 },
-    { 0x0000a092, 0x00204411, 0x000 },
-    { 0x00000031, 0x00204a2d, 0x000 },
-    { 0x0000a093, 0x00204411, 0x000 },
-    { 0x00000032, 0x00204a2d, 0x000 },
-    { 0x0000a2b6, 0x00204411, 0x000 },
-    { 0x00000033, 0x00204a2d, 0x000 },
-    { 0x0000a2ba, 0x00204411, 0x000 },
-    { 0x00000034, 0x00204a2d, 0x000 },
-    { 0x0000a2be, 0x00204411, 0x000 },
-    { 0x00000035, 0x00204a2d, 0x000 },
-    { 0x0000a2c2, 0x00204411, 0x000 },
-    { 0x00000036, 0x00204a2d, 0x000 },
-    { 0x00000030, 0x0020062d, 0x000 },
-    { 0x000001ff, 0x00280621, 0x000 },
-    { 0x00000000, 0x002f0221, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x628 },
-    { 0x00000000, 0x00210221, 0x000 },
-    { 0x00000000, 0x14c00000, 0x60b },
-    { 0x0004a003, 0x00604411, 0x68a },
-    { 0x0000a003, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204810, 0x000 },
-    { 0x00000001, 0x00210621, 0x000 },
-    { 0x00000000, 0x14c00000, 0x610 },
-    { 0x0004a010, 0x00604411, 0x68a },
-    { 0x0000a010, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204810, 0x000 },
-    { 0x00000001, 0x00210621, 0x000 },
-    { 0x00000000, 0x002f0221, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x628 },
-    { 0x0004a011, 0x00604411, 0x68a },
-    { 0x0000a011, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204810, 0x000 },
-    { 0x0004a012, 0x00604411, 0x68a },
-    { 0x0000a012, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204810, 0x000 },
-    { 0x0004a013, 0x00604411, 0x68a },
-    { 0x0000a013, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204810, 0x000 },
-    { 0x0004a014, 0x00604411, 0x68a },
-    { 0x0000a014, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204810, 0x000 },
-    { 0x0004a015, 0x00604411, 0x68a },
-    { 0x0000a015, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204810, 0x000 },
-    { 0x0004a016, 0x00604411, 0x68a },
-    { 0x0000a016, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204810, 0x000 },
-    { 0x0004a017, 0x00604411, 0x68a },
-    { 0x0000a017, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204810, 0x000 },
-    { 0x00042004, 0x00604411, 0x68a },
-    { 0x0000002c, 0x0080062d, 0x000 },
-    { 0xff000000, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x00000001, 0x00204811, 0x000 },
-    { 0x00000002, 0x00804811, 0x000 },
-    { 0x00000000, 0x0ee00000, 0x63a },
-    { 0x00000030, 0x0020062d, 0x000 },
-    { 0x00000002, 0x00280621, 0x000 },
-    { 0x00000000, 0x002f0221, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x638 },
-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x00000001, 0x00204811, 0x000 },
-    { 0x00042004, 0x00604411, 0x68a },
-    { 0x00001000, 0x00200811, 0x000 },
-    { 0x0000002b, 0x00203622, 0x000 },
-    { 0x00000000, 0x00600000, 0x63e },
-    { 0x00000000, 0x00600000, 0x5c6 },
-    { 0x98000000, 0x00204411, 0x000 },
-    { 0x00000000, 0x00804811, 0x000 },
-    { 0x00000000, 0xc0600000, 0x63e },
-    { 0x00000000, 0xc0400400, 0x001 },
-    { 0x0000a2a4, 0x00204411, 0x000 },
-    { 0x00000022, 0x00204811, 0x000 },
-    { 0x89000000, 0x00204411, 0x000 },
-    { 0x00000001, 0x00404811, 0x62a },
-    { 0x97000000, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x8a000000, 0x00204411, 0x000 },
-    { 0x00000000, 0x00404811, 0x62a },
-    { 0x00000000, 0x00600000, 0x659 },
-    { 0x00002010, 0x00204411, 0x000 },
-    { 0x00008000, 0x00204811, 0x000 },
-    { 0x0001a2a4, 0xc0204411, 0x000 },
-    { 0x00000016, 0x00604811, 0x36e },
-    { 0x00002010, 0x00204411, 0x000 },
-    { 0x00010000, 0x00204811, 0x000 },
-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x00000001, 0x00204811, 0x000 },
-    { 0x0000217c, 0x00204411, 0x000 },
-    { 0x09800000, 0x00204811, 0x000 },
-    { 0xffffffff, 0x00204811, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x00000000, 0x17000000, 0x000 },
-    { 0x0004217f, 0x00604411, 0x68a },
-    { 0x0000001f, 0x00210230, 0x000 },
-    { 0x00000000, 0x14c00000, 0x000 },
-    { 0x00000004, 0x00404c11, 0x653 },
-    { 0x00000000, 0x00400000, 0x000 },
-    { 0x00000017, 0x00201e2d, 0x000 },
-    { 0x00000004, 0x00291e27, 0x000 },
-    { 0x00000017, 0x00803627, 0x000 },
-    { 0x00000017, 0x00201e2d, 0x000 },
-    { 0xfffffffb, 0x00281e27, 0x000 },
-    { 0x00000017, 0x00803627, 0x000 },
-    { 0x00000017, 0x00201e2d, 0x000 },
-    { 0x00000008, 0x00291e27, 0x000 },
-    { 0x00000017, 0x00803627, 0x000 },
-    { 0x00000017, 0x00201e2d, 0x000 },
-    { 0xfffffff7, 0x00281e27, 0x000 },
-    { 0x00000017, 0x00803627, 0x000 },
-    { 0x00002010, 0x00204411, 0x000 },
-    { 0x00008000, 0x00204811, 0x000 },
-    { 0x0001a2a4, 0x00204411, 0x000 },
-    { 0x00000016, 0x00604811, 0x36e },
-    { 0x00002010, 0x00204411, 0x000 },
-    { 0x00010000, 0x00204811, 0x000 },
-    { 0x0000217c, 0x00204411, 0x000 },
-    { 0x01800000, 0x00204811, 0x000 },
-    { 0xffffffff, 0x00204811, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x00000000, 0x17000000, 0x000 },
-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x00000001, 0x00204811, 0x000 },
-    { 0x0004217f, 0x00604411, 0x68a },
-    { 0x0000001f, 0x00210230, 0x000 },
-    { 0x00000000, 0x14c00000, 0x689 },
-    { 0x00000010, 0x00404c11, 0x66f },
-    { 0x00000000, 0xc0200400, 0x000 },
-    { 0x00000000, 0x38c00000, 0x000 },
-    { 0x0000001d, 0x00200a2d, 0x000 },
-    { 0x0000001e, 0x00200e2d, 0x000 },
-    { 0x0000001f, 0x0020122d, 0x000 },
-    { 0x00000020, 0x0020162d, 0x000 },
-    { 0x00002169, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204804, 0x000 },
-    { 0x00000000, 0x00204805, 0x000 },
-    { 0x00000000, 0x00204801, 0x000 },
-    { 0xcafebabe, 0x00204811, 0x000 },
-    { 0x00000004, 0x00301224, 0x000 },
-    { 0x00000000, 0x002f0064, 0x000 },
-    { 0x00000000, 0x0cc00000, 0x688 },
-    { 0x00000003, 0x00281a22, 0x000 },
-    { 0x00000008, 0x00221222, 0x000 },
-    { 0xfffff000, 0x00281224, 0x000 },
-    { 0x00000000, 0x002910c4, 0x000 },
-    { 0x0000001f, 0x00403624, 0x000 },
-    { 0x00000000, 0x00800000, 0x000 },
-    { 0x00000000, 0x1ac00000, 0x68a },
-    { 0x9f000000, 0x00204411, 0x000 },
-    { 0xcafebabe, 0x00204811, 0x000 },
-    { 0x00000000, 0x1ae00000, 0x68d },
-    { 0x00000000, 0x00800000, 0x000 },
-    { 0x00000000, 0x1ac00000, 0x68f },
-    { 0x9e000000, 0x00204411, 0x000 },
-    { 0xcafebabe, 0x00204811, 0x000 },
-    { 0x00000000, 0x1ae00000, 0x692 },
-    { 0x00000000, 0x00800000, 0x000 },
-    { 0x00000000, 0x00600000, 0x00b },
-    { 0x00001000, 0x00600411, 0x315 },
-    { 0x00000000, 0x00200411, 0x000 },
-    { 0x00000000, 0x00600811, 0x1b2 },
-    { 0x0000225c, 0x00204411, 0x000 },
-    { 0x00000003, 0x00204811, 0x000 },
-    { 0x00002256, 0x00204411, 0x000 },
-    { 0x0000001b, 0x00204811, 0x000 },
-    { 0x0000a1fc, 0x00204411, 0x000 },
-    { 0x00000001, 0x00204811, 0x000 },
-    { 0x0001a1fd, 0xc0204411, 0x000 },
-    { 0x00000021, 0x00201e2d, 0x000 },
-    { 0x00000010, 0x00221e27, 0x000 },
-    { 0x00000024, 0x0020222d, 0x000 },
-    { 0x0000ffff, 0x00282228, 0x000 },
-    { 0x00000000, 0x00294907, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x00000022, 0x0020222d, 0x000 },
-    { 0x0000ffff, 0x00282228, 0x000 },
-    { 0x00000000, 0x00294907, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x00000023, 0x00201e2d, 0x000 },
-    { 0x00000010, 0x00221e27, 0x000 },
-    { 0x00000000, 0x00294907, 0x000 },
-    { 0x00000000, 0x00404811, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x014204ff, 0x05bd0250, 0x000 },
-    { 0x01c30168, 0x043f05bd, 0x000 },
-    { 0x02250209, 0x02500151, 0x000 },
-    { 0x02230245, 0x02a00241, 0x000 },
-    { 0x03d705bd, 0x05bd05bd, 0x000 },
-    { 0x06460647, 0x031f05bd, 0x000 },
-    { 0x05bd05c2, 0x03200340, 0x000 },
-    { 0x032a0282, 0x03420334, 0x000 },
-    { 0x05bd05bd, 0x05bd05bd, 0x000 },
-    { 0x05bd054e, 0x05bd05bd, 0x000 },
-    { 0x03ba05bd, 0x04b80344, 0x000 },
-    { 0x0497044d, 0x043d05bd, 0x000 },
-    { 0x04cd05bd, 0x044104da, 0x000 },
-    { 0x044d0504, 0x03510375, 0x000 },
-    { 0x05bd05bd, 0x05bd05bd, 0x000 },
-    { 0x05bd05bd, 0x05bd05bd, 0x000 },
-    { 0x05bd05bd, 0x063c05c4, 0x000 },
-    { 0x05bd05bd, 0x000705bd, 0x000 },
-    { 0x05bd05bd, 0x05bd05bd, 0x000 },
-    { 0x05bd05bd, 0x05bd05bd, 0x000 },
-    { 0x03f803ed, 0x04080406, 0x000 },
-    { 0x040e040a, 0x040c0410, 0x000 },
-    { 0x041c0418, 0x04240420, 0x000 },
-    { 0x042c0428, 0x04340430, 0x000 },
-    { 0x05bd05bd, 0x043805bd, 0x000 },
-    { 0x05bd05bd, 0x05bd05bd, 0x000 },
-    { 0x05bd05bd, 0x05bd05bd, 0x000 },
-    { 0x00020676, 0x06940006, 0x000 },
-};
-static const u32 RV630_pfp_microcode[] = {
-0xca0400,
-0xa00000,
-0x7e828b,
-0x7c038b,
-0x8001b8,
-0x7c038b,
-0xd4401e,
-0xee001e,
-0xca0400,
-0xa00000,
-0x7e828b,
-0xc41838,
-0xca2400,
-0xca2800,
-0x9581a8,
-0xc41c3a,
-0xc3c000,
-0xca0800,
-0xca0c00,
-0x7c744b,
-0xc20005,
-0x99c000,
-0xc41c3a,
-0x7c744c,
-0xc0fff0,
-0x042c04,
-0x309002,
-0x7d2500,
-0x351402,
-0x7d350b,
-0x255403,
-0x7cd580,
-0x259c03,
-0x95c004,
-0xd5001b,
-0x7eddc1,
-0x7d9d80,
-0xd6801b,
-0xd5801b,
-0xd4401e,
-0xd5401e,
-0xd6401e,
-0xd6801e,
-0xd4801e,
-0xd4c01e,
-0x9783d3,
-0xd5c01e,
-0xca0800,
-0x80001a,
-0xca0c00,
-0xe4011e,
-0xd4001e,
-0x80000c,
-0xc41838,
-0xe4013e,
-0xd4001e,
-0x80000c,
-0xc41838,
-0xd4401e,
-0xee001e,
-0xca0400,
-0xa00000,
-0x7e828b,
-0xe4011e,
-0xd4001e,
-0xd4401e,
-0xee001e,
-0xca0400,
-0xa00000,
-0x7e828b,
-0xe4013e,
-0xd4001e,
-0xd4401e,
-0xee001e,
-0xca0400,
-0xa00000,
-0x7e828b,
-0xca1800,
-0xd4401e,
-0xd5801e,
-0x800053,
-0xd40075,
-0xd4401e,
-0xca0800,
-0xca0c00,
-0xca1000,
-0xd48019,
-0xd4c018,
-0xd50017,
-0xd4801e,
-0xd4c01e,
-0xd5001e,
-0xe2001e,
-0xca0400,
-0xa00000,
-0x7e828b,
-0xca0800,
-0xd48060,
-0xd4401e,
-0x800000,
-0xd4801e,
-0xca0800,
-0xd48061,
-0xd4401e,
-0x800000,
-0xd4801e,
-0xca0800,
-0xca0c00,
-0xd4401e,
-0xd48016,
-0xd4c016,
-0xd4801e,
-0x8001b8,
-0xd4c01e,
-0xc60843,
-0xca0c00,
-0xca1000,
-0x948004,
-0xca1400,
-0xe420f3,
-0xd42013,
-0xd56065,
-0xd4e01c,
-0xd5201c,
-0xd5601c,
-0x800000,
-0x062001,
-0xc60843,
-0xca0c00,
-0xca1000,
-0x9483f7,
-0xca1400,
-0xe420f3,
-0x800079,
-0xd42013,
-0xc60843,
-0xca0c00,
-0xca1000,
-0x9883ef,
-0xca1400,
-0xd40064,
-0x80008d,
-0x000000,
-0xc41432,
-0xc61843,
-0xc4082f,
-0x954005,
-0xc40c30,
-0xd4401e,
-0x800000,
-0xee001e,
-0x9583f5,
-0xc41031,
-0xd44033,
-0xd52065,
-0xd4a01c,
-0xd4e01c,
-0xd5201c,
-0xe4015e,
-0xd4001e,
-0x800000,
-0x062001,
-0xca1800,
-0x0a2001,
-0xd60076,
-0xc40836,
-0x988007,
-0xc61045,
-0x950110,
-0xd4001f,
-0xd46062,
-0x800000,
-0xd42062,
-0xcc3835,
-0xcc1433,
-0x8401bb,
-0xd40072,
-0xd5401e,
-0x800000,
-0xee001e,
-0xe2001a,
-0x8401bb,
-0xe2001a,
-0xcc104b,
-0xcc0447,
-0x2c9401,
-0x7d098b,
-0x984005,
-0x7d15cb,
-0xd4001a,
-0x8001b8,
-0xd4006d,
-0x344401,
-0xcc0c48,
-0x98403a,
-0xcc2c4a,
-0x958004,
-0xcc0449,
-0x8001b8,
-0xd4001a,
-0xd4c01a,
-0x282801,
-0x8400f0,
-0xcc1003,
-0x98801b,
-0x04380c,
-0x8400f0,
-0xcc1003,
-0x988017,
-0x043808,
-0x8400f0,
-0xcc1003,
-0x988013,
-0x043804,
-0x8400f0,
-0xcc1003,
-0x988014,
-0xcc104c,
-0x9a8009,
-0xcc144d,
-0x9840dc,
-0xd4006d,
-0xcc1848,
-0xd5001a,
-0xd5401a,
-0x8000c9,
-0xd5801a,
-0x96c0d5,
-0xd4006d,
-0x8001b8,
-0xd4006e,
-0x9ac003,
-0xd4006d,
-0xd4006e,
-0x800000,
-0xec007f,
-0x9ac0cc,
-0xd4006d,
-0x8001b8,
-0xd4006e,
-0xcc1403,
-0xcc1803,
-0xcc1c03,
-0x7d9103,
-0x7dd583,
-0x7d190c,
-0x35cc1f,
-0x35701f,
-0x7cf0cb,
-0x7cd08b,
-0x880000,
-0x7e8e8b,
-0x95c004,
-0xd4006e,
-0x8001b8,
-0xd4001a,
-0xd4c01a,
-0xcc0803,
-0xcc0c03,
-0xcc1003,
-0xcc1403,
-0xcc1803,
-0xcc1c03,
-0xcc2403,
-0xcc2803,
-0x35c41f,
-0x36b01f,
-0x7c704b,
-0x34f01f,
-0x7c704b,
-0x35701f,
-0x7c704b,
-0x7d8881,
-0x7dccc1,
-0x7e5101,
-0x7e9541,
-0x7c9082,
-0x7cd4c2,
-0x7c848b,
-0x9ac003,
-0x7c8c8b,
-0x2c8801,
-0x98809e,
-0xd4006d,
-0x98409c,
-0xd4006e,
-0xcc084c,
-0xcc0c4d,
-0xcc1048,
-0xd4801a,
-0xd4c01a,
-0x800101,
-0xd5001a,
-0xcc0832,
-0xd40032,
-0x9482d9,
-0xca0c00,
-0xd4401e,
-0x800000,
-0xd4001e,
-0xe4011e,
-0xd4001e,
-0xca0800,
-0xca0c00,
-0xca1000,
-0xd4401e,
-0xca1400,
-0xd4801e,
-0xd4c01e,
-0xd5001e,
-0xd5401e,
-0xd54034,
-0x800000,
-0xee001e,
-0x280404,
-0xe2001a,
-0xe2001a,
-0xd4401a,
-0xca3800,
-0xcc0803,
-0xcc0c03,
-0xcc0c03,
-0xcc0c03,
-0x9882bd,
-0x000000,
-0x8401bb,
-0xd7a06f,
-0x800000,
-0xee001f,
-0xca0400,
-0xc2ff00,
-0xcc0834,
-0xc13fff,
-0x7c74cb,
-0x7cc90b,
-0x7d010f,
-0x9902b0,
-0x7c738b,
-0x8401bb,
-0xd7a06f,
-0x800000,
-0xee001f,
-0xca0800,
-0x281900,
-0x7d898b,
-0x958014,
-0x281404,
-0xca0c00,
-0xca1000,
-0xca1c00,
-0xca2400,
-0xe2001f,
-0xd4c01a,
-0xd5001a,
-0xd5401a,
-0xcc1803,
-0xcc2c03,
-0xcc2c03,
-0xcc2c03,
-0x7da58b,
-0x7d9c47,
-0x984297,
-0x000000,
-0x800161,
-0xd4c01a,
-0xd4401e,
-0xd4801e,
-0x800000,
-0xee001e,
-0xe4011e,
-0xd4001e,
-0xd4401e,
-0xee001e,
-0xca0400,
-0xa00000,
-0x7e828b,
-0xe4013e,
-0xd4001e,
-0xd4401e,
-0xee001e,
-0xca0400,
-0xa00000,
-0x7e828b,
-0xca0800,
-0x248c06,
-0x0ccc06,
-0x98c006,
-0xcc104e,
-0x990004,
-0xd40073,
-0xe4011e,
-0xd4001e,
-0xd4401e,
-0xd4801e,
-0x800000,
-0xee001e,
-0xca0800,
-0xca0c00,
-0x34d018,
-0x251001,
-0x950021,
-0xc17fff,
-0xca1000,
-0xca1400,
-0xca1800,
-0xd4801d,
-0xd4c01d,
-0x7db18b,
-0xc14202,
-0xc2c001,
-0xd5801d,
-0x34dc0e,
-0x7d5d4c,
-0x7f734c,
-0xd7401e,
-0xd5001e,
-0xd5401e,
-0xc14200,
-0xc2c000,
-0x099c01,
-0x31dc10,
-0x7f5f4c,
-0x7f734c,
-0x042802,
-0x7d8380,
-0xd5a86f,
-0xd58066,
-0xd7401e,
-0xec005e,
-0xc82402,
-0xc82402,
-0x8001b8,
-0xd60076,
-0xd4401e,
-0xd4801e,
-0xd4c01e,
-0x800000,
-0xee001e,
-0x800000,
-0xee001f,
-0xd4001f,
-0x800000,
-0xd4001f,
-0xd4001f,
-0x880000,
-0xd4001f,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x010171,
-0x020178,
-0x03008f,
-0x04007f,
-0x050003,
-0x06003f,
-0x070032,
-0x08012c,
-0x090046,
-0x0a0036,
-0x1001b6,
-0x1700a2,
-0x22013a,
-0x230149,
-0x2000b4,
-0x240125,
-0x27004d,
-0x28006a,
-0x2a0060,
-0x2b0052,
-0x2f0065,
-0x320087,
-0x34017f,
-0x3c0156,
-0x3f0072,
-0x41018c,
-0x44012e,
-0x550173,
-0x56017a,
-0x60000b,
-0x610034,
-0x620038,
-0x630038,
-0x640038,
-0x650038,
-0x660038,
-0x670038,
-0x68003a,
-0x690041,
-0x6a0048,
-0x6b0048,
-0x6c0048,
-0x6d0048,
-0x6e0048,
-0x6f0048,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-};
-static const u32 RV635_cp_microcode[][3] = {
-    { 0x00000000, 0xc0200400, 0x000 },
-    { 0x00000000, 0x00a0000a, 0x000 },
-    { 0x0000ffff, 0x00284621, 0x000 },
-    { 0x00000000, 0xd9004800, 0x000 },
-    { 0x00000000, 0xc0200400, 0x000 },
-    { 0x00000000, 0x00a0000a, 0x000 },
-    { 0x00000000, 0x00e00000, 0x000 },
-    { 0x00010000, 0xc0294620, 0x000 },
-    { 0x00000000, 0xd9004800, 0x000 },
-    { 0x00000000, 0xc0200400, 0x000 },
-    { 0x00000000, 0x00a0000a, 0x000 },
-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x00000001, 0x00204811, 0x000 },
-    { 0x00042004, 0x00604411, 0x68a },
-    { 0x00000000, 0x00600000, 0x62e },
-    { 0x00000000, 0x00600000, 0x642 },
-    { 0x00000000, 0xc0200800, 0x000 },
-    { 0x00000f00, 0x00281622, 0x000 },
-    { 0x00000008, 0x00211625, 0x000 },
-    { 0x00000018, 0x00203625, 0x000 },
-    { 0x8d000000, 0x00204411, 0x000 },
-    { 0x00000004, 0x002f0225, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x018 },
-    { 0x00412000, 0x00404811, 0x019 },
-    { 0x00422000, 0x00204811, 0x000 },
-    { 0x8e000000, 0x00204411, 0x000 },
-    { 0x00000028, 0x00204a2d, 0x000 },
-    { 0x90000000, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204805, 0x000 },
-    { 0x0000000c, 0x00211622, 0x000 },
-    { 0x00000003, 0x00281625, 0x000 },
-    { 0x00000019, 0x00211a22, 0x000 },
-    { 0x00000004, 0x00281a26, 0x000 },
-    { 0x00000000, 0x002914c5, 0x000 },
-    { 0x00000019, 0x00203625, 0x000 },
-    { 0x00000000, 0x003a1402, 0x000 },
-    { 0x00000016, 0x00211625, 0x000 },
-    { 0x00000003, 0x00281625, 0x000 },
-    { 0x00000017, 0x00200e2d, 0x000 },
-    { 0xfffffffc, 0x00280e23, 0x000 },
-    { 0x00000000, 0x002914a3, 0x000 },
-    { 0x00000017, 0x00203625, 0x000 },
-    { 0x00008000, 0x00280e22, 0x000 },
-    { 0x00000007, 0x00220e23, 0x000 },
-    { 0x00000000, 0x0029386e, 0x000 },
-    { 0x20000000, 0x00280e22, 0x000 },
-    { 0x00000006, 0x00210e23, 0x000 },
-    { 0x00000000, 0x0029386e, 0x000 },
-    { 0x00000000, 0x00220222, 0x000 },
-    { 0x00000000, 0x14e00000, 0x038 },
-    { 0x00000000, 0x2ee00000, 0x035 },
-    { 0x00000000, 0x2ce00000, 0x037 },
-    { 0x00000000, 0x00400e2d, 0x039 },
-    { 0x00000008, 0x00200e2d, 0x000 },
-    { 0x00000009, 0x0040122d, 0x046 },
-    { 0x00000001, 0x00400e2d, 0x039 },
-    { 0x00000000, 0xc0200c00, 0x000 },
-    { 0x003ffffc, 0x00281223, 0x000 },
-    { 0x00000002, 0x00221224, 0x000 },
-    { 0x0000001f, 0x00211e23, 0x000 },
-    { 0x00000000, 0x14e00000, 0x03e },
-    { 0x00000008, 0x00401c11, 0x041 },
-    { 0x0000000d, 0x00201e2d, 0x000 },
-    { 0x0000000f, 0x00281e27, 0x000 },
-    { 0x00000003, 0x00221e27, 0x000 },
-    { 0x7fc00000, 0x00281a23, 0x000 },
-    { 0x00000014, 0x00211a26, 0x000 },
-    { 0x00000001, 0x00331a26, 0x000 },
-    { 0x00000008, 0x00221a26, 0x000 },
-    { 0x00000000, 0x00290cc7, 0x000 },
-    { 0x00000027, 0x00203624, 0x000 },
-    { 0x00007f00, 0x00281221, 0x000 },
-    { 0x00001400, 0x002f0224, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x04b },
-    { 0x00000001, 0x00290e23, 0x000 },
-    { 0x0000000e, 0x00203623, 0x000 },
-    { 0x0000e000, 0x00204411, 0x000 },
-    { 0xfff80000, 0x00294a23, 0x000 },
-    { 0x00000000, 0x003a2c02, 0x000 },
-    { 0x00000002, 0x00220e2b, 0x000 },
-    { 0xfc000000, 0x00280e23, 0x000 },
-    { 0x0000000f, 0x00203623, 0x000 },
-    { 0x00001fff, 0x00294a23, 0x000 },
-    { 0x00000027, 0x00204a2d, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x00000029, 0x00200e2d, 0x000 },
-    { 0x060a0200, 0x00294a23, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x00000001, 0x00210222, 0x000 },
-    { 0x00000000, 0x14e00000, 0x061 },
-    { 0x00000000, 0x2ee00000, 0x05f },
-    { 0x00000000, 0x2ce00000, 0x05e },
-    { 0x00000000, 0x00400e2d, 0x062 },
-    { 0x00000001, 0x00400e2d, 0x062 },
-    { 0x0000000a, 0x00200e2d, 0x000 },
-    { 0x0000000b, 0x0040122d, 0x06a },
-    { 0x00000000, 0xc0200c00, 0x000 },
-    { 0x003ffffc, 0x00281223, 0x000 },
-    { 0x00000002, 0x00221224, 0x000 },
-    { 0x7fc00000, 0x00281623, 0x000 },
-    { 0x00000014, 0x00211625, 0x000 },
-    { 0x00000001, 0x00331625, 0x000 },
-    { 0x80000000, 0x00280e23, 0x000 },
-    { 0x00000000, 0x00290ca3, 0x000 },
-    { 0x3ffffc00, 0x00290e23, 0x000 },
-    { 0x0000001f, 0x00211e23, 0x000 },
-    { 0x00000000, 0x14e00000, 0x06d },
-    { 0x00000100, 0x00401c11, 0x070 },
-    { 0x0000000d, 0x00201e2d, 0x000 },
-    { 0x000000f0, 0x00281e27, 0x000 },
-    { 0x00000004, 0x00221e27, 0x000 },
-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x0000000d, 0x00204811, 0x000 },
-    { 0xfffff0ff, 0x00281a30, 0x000 },
-    { 0x0000a028, 0x00204411, 0x000 },
-    { 0x00000000, 0x002948e6, 0x000 },
-    { 0x0000a018, 0x00204411, 0x000 },
-    { 0x3fffffff, 0x00284a23, 0x000 },
-    { 0x0000a010, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204804, 0x000 },
-    { 0x00000030, 0x0020162d, 0x000 },
-    { 0x00000002, 0x00291625, 0x000 },
-    { 0x00000030, 0x00203625, 0x000 },
-    { 0x00000025, 0x0020162d, 0x000 },
-    { 0x00000000, 0x002f00a3, 0x000 },
-    { 0x00000000, 0x0cc00000, 0x083 },
-    { 0x00000026, 0x0020162d, 0x000 },
-    { 0x00000000, 0x002f00a4, 0x000 },
-    { 0x00000000, 0x0cc00000, 0x084 },
-    { 0x00000000, 0x00400000, 0x08a },
-    { 0x00000025, 0x00203623, 0x000 },
-    { 0x00000026, 0x00203624, 0x000 },
-    { 0x00000017, 0x00201e2d, 0x000 },
-    { 0x00000002, 0x00210227, 0x000 },
-    { 0x00000000, 0x14e00000, 0x08a },
-    { 0x00000000, 0x00600000, 0x665 },
-    { 0x00000000, 0x00600000, 0x659 },
-    { 0x00000002, 0x00210e22, 0x000 },
-    { 0x00000000, 0x14c00000, 0x08d },
-    { 0x00000012, 0xc0403620, 0x093 },
-    { 0x00000000, 0x2ee00000, 0x091 },
-    { 0x00000000, 0x2ce00000, 0x090 },
-    { 0x00000002, 0x00400e2d, 0x092 },
-    { 0x00000003, 0x00400e2d, 0x092 },
-    { 0x0000000c, 0x00200e2d, 0x000 },
-    { 0x00000012, 0x00203623, 0x000 },
-    { 0x00000003, 0x00210e22, 0x000 },
-    { 0x00000000, 0x14c00000, 0x098 },
-    { 0x0000a00c, 0x00204411, 0x000 },
-    { 0x00000000, 0xc0204800, 0x000 },
-    { 0x00000000, 0xc0404800, 0x0a0 },
-    { 0x0000a00c, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x00000000, 0x2ee00000, 0x09e },
-    { 0x00000000, 0x2ce00000, 0x09d },
-    { 0x00000002, 0x00400e2d, 0x09f },
-    { 0x00000003, 0x00400e2d, 0x09f },
-    { 0x0000000c, 0x00200e2d, 0x000 },
-    { 0x00000000, 0x00204803, 0x000 },
-    { 0x00000000, 0x003a0c02, 0x000 },
-    { 0x003f0000, 0x00280e23, 0x000 },
-    { 0x00000010, 0x00210e23, 0x000 },
-    { 0x00000011, 0x00203623, 0x000 },
-    { 0x0000001e, 0x0021022b, 0x000 },
-    { 0x00000000, 0x14c00000, 0x0a7 },
-    { 0x00000016, 0xc0203620, 0x000 },
-    { 0x0000001f, 0x0021022b, 0x000 },
-    { 0x00000000, 0x14c00000, 0x0aa },
-    { 0x00000015, 0xc0203620, 0x000 },
-    { 0x00000008, 0x00210e2b, 0x000 },
-    { 0x0000007f, 0x00280e23, 0x000 },
-    { 0x00000000, 0x002f0223, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x0e1 },
-    { 0x00000000, 0x27000000, 0x000 },
-    { 0x00000000, 0x00600000, 0x2a3 },
-    { 0x00000001, 0x002f0223, 0x000 },
-    { 0x00000000, 0x0ae00000, 0x0b3 },
-    { 0x00000000, 0x00600000, 0x13a },
-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x00000006, 0x00204811, 0x000 },
-    { 0x0000000c, 0x00221e30, 0x000 },
-    { 0x99800000, 0x00204411, 0x000 },
-    { 0x00000004, 0x0020122d, 0x000 },
-    { 0x00000008, 0x00221224, 0x000 },
-    { 0x00000010, 0x00201811, 0x000 },
-    { 0x00000000, 0x00291ce4, 0x000 },
-    { 0x00000000, 0x00604807, 0x12f },
-    { 0x9b000000, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204802, 0x000 },
-    { 0x9c000000, 0x00204411, 0x000 },
-    { 0x00000000, 0x0033146f, 0x000 },
-    { 0x00000001, 0x00333e23, 0x000 },
-    { 0x00000000, 0xd9004800, 0x000 },
-    { 0x00000000, 0x00203c05, 0x000 },
-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x0000000e, 0x00204811, 0x000 },
-    { 0x00000000, 0x00201010, 0x000 },
-    { 0x0000e007, 0x00204411, 0x000 },
-    { 0x0000000f, 0x0021022b, 0x000 },
-    { 0x00000000, 0x14c00000, 0x0cb },
-    { 0x00f8ff08, 0x00204811, 0x000 },
-    { 0x98000000, 0x00404811, 0x0dc },
-    { 0x000000f0, 0x00280e22, 0x000 },
-    { 0x000000a0, 0x002f0223, 0x000 },
-    { 0x00000000, 0x0cc00000, 0x0da },
-    { 0x00000011, 0x00200e2d, 0x000 },
-    { 0x00000001, 0x002f0223, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x0d5 },
-    { 0x00000002, 0x002f0223, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x0d4 },
-    { 0x00003f00, 0x00400c11, 0x0d6 },
-    { 0x00001f00, 0x00400c11, 0x0d6 },
-    { 0x00000f00, 0x00200c11, 0x000 },
-    { 0x00380009, 0x00294a23, 0x000 },
-    { 0x3f000000, 0x00280e2b, 0x000 },
-    { 0x00000002, 0x00220e23, 0x000 },
-    { 0x00000007, 0x00494a23, 0x0dc },
-    { 0x00380f09, 0x00204811, 0x000 },
-    { 0x68000007, 0x00204811, 0x000 },
-    { 0x00000008, 0x00214a27, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x060a0200, 0x00294a24, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x0000a202, 0x00204411, 0x000 },
-    { 0x00ff0000, 0x00280e22, 0x000 },
-    { 0x00000080, 0x00294a23, 0x000 },
-    { 0x00000027, 0x00200e2d, 0x000 },
-    { 0x00000026, 0x0020122d, 0x000 },
-    { 0x00000000, 0x002f0083, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x0ea },
-    { 0x00000000, 0x00600000, 0x65f },
-    { 0x00000000, 0x00400000, 0x0eb },
-    { 0x00000000, 0x00600000, 0x662 },
-    { 0x00000007, 0x0020222d, 0x000 },
-    { 0x00000005, 0x00220e22, 0x000 },
-    { 0x00100000, 0x00280e23, 0x000 },
-    { 0x00000000, 0x00292068, 0x000 },
-    { 0x00000000, 0x003a0c02, 0x000 },
-    { 0x000000ef, 0x00280e23, 0x000 },
-    { 0x00000000, 0x00292068, 0x000 },
-    { 0x00000017, 0x00200e2d, 0x000 },
-    { 0x00000003, 0x00210223, 0x000 },
-    { 0x00000000, 0x14e00000, 0x0f8 },
-    { 0x0000000b, 0x00210228, 0x000 },
-    { 0x00000000, 0x14c00000, 0x0f8 },
-    { 0x00000400, 0x00292228, 0x000 },
-    { 0x00000014, 0x00203628, 0x000 },
-    { 0x0000001c, 0x00210e22, 0x000 },
-    { 0x00000000, 0x14c00000, 0x0fd },
-    { 0x0000a30c, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x0000001e, 0x00210e22, 0x000 },
-    { 0x00000000, 0x14c00000, 0x10b },
-    { 0x0000a30f, 0x00204411, 0x000 },
-    { 0x00000011, 0x00200e2d, 0x000 },
-    { 0x00000001, 0x002f0223, 0x000 },
-    { 0x00000000, 0x0cc00000, 0x104 },
-    { 0xffffffff, 0x00404811, 0x10b },
-    { 0x00000002, 0x002f0223, 0x000 },
-    { 0x00000000, 0x0cc00000, 0x107 },
-    { 0x0000ffff, 0x00404811, 0x10b },
-    { 0x00000004, 0x002f0223, 0x000 },
-    { 0x00000000, 0x0cc00000, 0x10a },
-    { 0x000000ff, 0x00404811, 0x10b },
-    { 0x00000001, 0x00204811, 0x000 },
-    { 0x0002c400, 0x00204411, 0x000 },
-    { 0x0000001f, 0x00210e22, 0x000 },
-    { 0x00000000, 0x14c00000, 0x112 },
-    { 0x00000010, 0x40210e20, 0x000 },
-    { 0x00000013, 0x00203623, 0x000 },
-    { 0x00000018, 0x40224a20, 0x000 },
-    { 0x00000010, 0xc0424a20, 0x114 },
-    { 0x00000000, 0x00200c11, 0x000 },
-    { 0x00000013, 0x00203623, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x0000000a, 0x00201011, 0x000 },
-    { 0x00000000, 0x002f0224, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x11b },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x00000001, 0x00531224, 0x117 },
-    { 0xffbfffff, 0x00283a2e, 0x000 },
-    { 0x0000001b, 0x00210222, 0x000 },
-    { 0x00000000, 0x14c00000, 0x12e },
-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x0000000d, 0x00204811, 0x000 },
-    { 0x00000018, 0x00220e30, 0x000 },
-    { 0xfc000000, 0x00280e23, 0x000 },
-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x0000000e, 0x00204811, 0x000 },
-    { 0x00000000, 0x00201010, 0x000 },
-    { 0x0000e00e, 0x00204411, 0x000 },
-    { 0x07f8ff08, 0x00204811, 0x000 },
-    { 0x00000000, 0x00294a23, 0x000 },
-    { 0x0000001c, 0x00201e2d, 0x000 },
-    { 0x00000008, 0x00214a27, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x060a0200, 0x00294a24, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x00000000, 0x00800000, 0x000 },
-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x00000001, 0x00204811, 0x000 },
-    { 0x0000217c, 0x00204411, 0x000 },
-    { 0x00800000, 0x00204811, 0x000 },
-    { 0x00000000, 0x00204806, 0x000 },
-    { 0x00000008, 0x00214a27, 0x000 },
-    { 0x00000000, 0x17000000, 0x000 },
-    { 0x0004217f, 0x00604411, 0x68a },
-    { 0x0000001f, 0x00210230, 0x000 },
-    { 0x00000000, 0x14c00000, 0x689 },
-    { 0x00000004, 0x00404c11, 0x135 },
-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x00000001, 0x00204811, 0x000 },
-    { 0x000021f8, 0x00204411, 0x000 },
-    { 0x0000001c, 0x00204811, 0x000 },
-    { 0x000421f9, 0x00604411, 0x68a },
-    { 0x00000011, 0x00210230, 0x000 },
-    { 0x00000000, 0x14e00000, 0x13c },
-    { 0x00000000, 0x00800000, 0x000 },
-    { 0x00000000, 0x00600000, 0x00b },
-    { 0x00000000, 0x00600411, 0x315 },
-    { 0x00000000, 0x00200411, 0x000 },
-    { 0x00000000, 0x00600811, 0x1b2 },
-    { 0x00000000, 0x00600000, 0x160 },
-    { 0x0000ffff, 0x40280e20, 0x000 },
-    { 0x00000010, 0xc0211220, 0x000 },
-    { 0x0000ffff, 0x40280620, 0x000 },
-    { 0x00000010, 0xc0210a20, 0x000 },
-    { 0x00000000, 0x00341461, 0x000 },
-    { 0x00000000, 0x00741882, 0x2bb },
-    { 0x0001a1fd, 0x00604411, 0x2e0 },
-    { 0x00003fff, 0x002f022f, 0x000 },
-    { 0x00000000, 0x0cc00000, 0x147 },
-    { 0x00000000, 0xc0400400, 0x001 },
-    { 0x00000000, 0x00600000, 0x00b },
-    { 0x00000000, 0x00600411, 0x315 },
-    { 0x00000000, 0x00200411, 0x000 },
-    { 0x00000000, 0x00600811, 0x1b2 },
-    { 0x00003fff, 0x002f022f, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x000 },
-    { 0x00000000, 0x00600000, 0x160 },
-    { 0x00000010, 0x40210e20, 0x000 },
-    { 0x0000ffff, 0xc0281220, 0x000 },
-    { 0x00000010, 0x40211620, 0x000 },
-    { 0x0000ffff, 0xc0681a20, 0x2bb },
-    { 0x0001a1fd, 0x00604411, 0x2e0 },
-    { 0x00003fff, 0x002f022f, 0x000 },
-    { 0x00000000, 0x0cc00000, 0x158 },
-    { 0x00000000, 0xc0400400, 0x001 },
-    { 0x0000225c, 0x00204411, 0x000 },
-    { 0x00000001, 0x00300a2f, 0x000 },
-    { 0x00000001, 0x00210a22, 0x000 },
-    { 0x00000003, 0x00384a22, 0x000 },
-    { 0x00002256, 0x00204411, 0x000 },
-    { 0x0000001a, 0x00204811, 0x000 },
-    { 0x0000a1fc, 0x00204411, 0x000 },
-    { 0x00000001, 0x00804811, 0x000 },
-    { 0x00000000, 0x00600000, 0x00b },
-    { 0x00000000, 0x00600000, 0x18f },
-    { 0x00000000, 0x00600000, 0x1a0 },
-    { 0x00003fff, 0x002f022f, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x000 },
-    { 0x00000000, 0x00202c08, 0x000 },
-    { 0x00000000, 0x00202411, 0x000 },
-    { 0x00000000, 0x00202811, 0x000 },
-    { 0x00002256, 0x00204411, 0x000 },
-    { 0x00000016, 0x00204811, 0x000 },
-    { 0x0000225c, 0x00204411, 0x000 },
-    { 0x00000003, 0x00204811, 0x000 },
-    { 0x93800000, 0x00204411, 0x000 },
-    { 0x00000002, 0x00221e29, 0x000 },
-    { 0x00000000, 0x007048eb, 0x19c },
-    { 0x00000000, 0x00600000, 0x2bb },
-    { 0x00000001, 0x40330620, 0x000 },
-    { 0x00000000, 0xc0302409, 0x000 },
-    { 0x00003fff, 0x002f022f, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x000 },
-    { 0x00000000, 0x00600000, 0x2a3 },
-    { 0x00000000, 0x002f0221, 0x000 },
-    { 0x00000000, 0x0ae00000, 0x181 },
-    { 0x00000000, 0x00600000, 0x13a },
-    { 0x00000000, 0x00400000, 0x186 },
-    { 0x95000000, 0x00204411, 0x000 },
-    { 0x00000000, 0x002f0221, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x186 },
-    { 0x00000000, 0xc0204800, 0x000 },
-    { 0x00000001, 0x00530621, 0x182 },
-    { 0x92000000, 0x00204411, 0x000 },
-    { 0x00000000, 0xc0604800, 0x197 },
-    { 0x0001a1fd, 0x00204411, 0x000 },
-    { 0x00000011, 0x0020062d, 0x000 },
-    { 0x00000000, 0x0078042a, 0x2fb },
-    { 0x00000000, 0x00202809, 0x000 },
-    { 0x00003fff, 0x002f022f, 0x000 },
-    { 0x00000000, 0x0cc00000, 0x174 },
-    { 0x00000000, 0xc0400400, 0x001 },
-    { 0x00000210, 0x00600411, 0x315 },
-    { 0x00003fff, 0x002f022f, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x194 },
-    { 0x00000015, 0xc0203620, 0x000 },
-    { 0x00000016, 0xc0203620, 0x000 },
-    { 0x3f800000, 0x00200411, 0x000 },
-    { 0x46000000, 0x00600811, 0x1b2 },
-    { 0x00000000, 0x00800000, 0x000 },
-    { 0x0000a1fc, 0x00204411, 0x000 },
-    { 0x00003fff, 0x002f022f, 0x000 },
-    { 0x00000000, 0x0cc00000, 0x19b },
-    { 0x00000001, 0x00804811, 0x000 },
-    { 0x00000021, 0x00804811, 0x000 },
-    { 0x0000ffff, 0x40280e20, 0x000 },
-    { 0x00000010, 0xc0211220, 0x000 },
-    { 0x0000ffff, 0x40281620, 0x000 },
-    { 0x00000010, 0xc0811a20, 0x000 },
-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x00000006, 0x00204811, 0x000 },
-    { 0x00000008, 0x00221e30, 0x000 },
-    { 0x00000029, 0x00201a2d, 0x000 },
-    { 0x0000e000, 0x00204411, 0x000 },
-    { 0xfffbff09, 0x00204811, 0x000 },
-    { 0x0000000f, 0x0020222d, 0x000 },
-    { 0x00001fff, 0x00294a28, 0x000 },
-    { 0x00000006, 0x0020222d, 0x000 },
-    { 0x00000000, 0x002920e8, 0x000 },
-    { 0x00000000, 0x00204808, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x060a0200, 0x00294a26, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x00000100, 0x00201811, 0x000 },
-    { 0x00000008, 0x00621e28, 0x12f },
-    { 0x00000008, 0x00822228, 0x000 },
-    { 0x0002c000, 0x00204411, 0x000 },
-    { 0x00000015, 0x00600e2d, 0x1bd },
-    { 0x00000016, 0x00600e2d, 0x1bd },
-    { 0x0000c008, 0x00204411, 0x000 },
-    { 0x00000017, 0x00200e2d, 0x000 },
-    { 0x00000000, 0x14c00000, 0x1b9 },
-    { 0x00000000, 0x00200411, 0x000 },
-    { 0x00000000, 0x00204801, 0x000 },
-    { 0x39000000, 0x00204811, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x00000000, 0x00804802, 0x000 },
-    { 0x00000018, 0x00202e2d, 0x000 },
-    { 0x00000000, 0x003b0d63, 0x000 },
-    { 0x00000008, 0x00224a23, 0x000 },
-    { 0x00000010, 0x00224a23, 0x000 },
-    { 0x00000018, 0x00224a23, 0x000 },
-    { 0x00000000, 0x00804803, 0x000 },
-    { 0x00000000, 0x00600000, 0x00b },
-    { 0x00001000, 0x00600411, 0x315 },
-    { 0x00000000, 0x00200411, 0x000 },
-    { 0x00000000, 0x00600811, 0x1b2 },
-    { 0x00000007, 0x0021062f, 0x000 },
-    { 0x00000013, 0x00200a2d, 0x000 },
-    { 0x00000001, 0x00202c11, 0x000 },
-    { 0x0000ffff, 0x40282220, 0x000 },
-    { 0x0000000f, 0x00262228, 0x000 },
-    { 0x00000010, 0x40212620, 0x000 },
-    { 0x0000000f, 0x00262629, 0x000 },
-    { 0x00000000, 0x00202802, 0x000 },
-    { 0x00002256, 0x00204411, 0x000 },
-    { 0x0000001b, 0x00204811, 0x000 },
-    { 0x00000000, 0x002f0221, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x1e0 },
-    { 0x0000225c, 0x00204411, 0x000 },
-    { 0x00000081, 0x00204811, 0x000 },
-    { 0x0000a1fc, 0x00204411, 0x000 },
-    { 0x00000001, 0x00204811, 0x000 },
-    { 0x00000080, 0x00201c11, 0x000 },
-    { 0x00000000, 0x002f0227, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x1dc },
-    { 0x00000000, 0x00600000, 0x1e9 },
-    { 0x00000001, 0x00531e27, 0x1d8 },
-    { 0x00000001, 0x00202c11, 0x000 },
-    { 0x0000001f, 0x00280a22, 0x000 },
-    { 0x0000001f, 0x00282a2a, 0x000 },
-    { 0x00000001, 0x00530621, 0x1d1 },
-    { 0x0000225c, 0x00204411, 0x000 },
-    { 0x00000002, 0x00304a2f, 0x000 },
-    { 0x0000a1fc, 0x00204411, 0x000 },
-    { 0x00000001, 0x00204811, 0x000 },
-    { 0x00000001, 0x00301e2f, 0x000 },
-    { 0x00000000, 0x002f0227, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x000 },
-    { 0x00000000, 0x00600000, 0x1e9 },
-    { 0x00000001, 0x00531e27, 0x1e5 },
-    { 0x0000ffff, 0x40280e20, 0x000 },
-    { 0x0000000f, 0x00260e23, 0x000 },
-    { 0x00000010, 0xc0211220, 0x000 },
-    { 0x0000000f, 0x00261224, 0x000 },
-    { 0x00000000, 0x00201411, 0x000 },
-    { 0x00000000, 0x00601811, 0x2bb },
-    { 0x0001a1fd, 0x00204411, 0x000 },
-    { 0x00000000, 0x002f022b, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x1f8 },
-    { 0x00000010, 0x00221628, 0x000 },
-    { 0xffff0000, 0x00281625, 0x000 },
-    { 0x0000ffff, 0x00281a29, 0x000 },
-    { 0x00000000, 0x002948c5, 0x000 },
-    { 0x00000000, 0x0020480a, 0x000 },
-    { 0x00000000, 0x00202c11, 0x000 },
-    { 0x00000010, 0x00221623, 0x000 },
-    { 0xffff0000, 0x00281625, 0x000 },
-    { 0x0000ffff, 0x00281a24, 0x000 },
-    { 0x00000000, 0x002948c5, 0x000 },
-    { 0x00000000, 0x00731503, 0x205 },
-    { 0x00000000, 0x00201805, 0x000 },
-    { 0x00000000, 0x00731524, 0x205 },
-    { 0x00000000, 0x002d14c5, 0x000 },
-    { 0x00000000, 0x003008a2, 0x000 },
-    { 0x00000000, 0x00204802, 0x000 },
-    { 0x00000000, 0x00202802, 0x000 },
-    { 0x00000000, 0x00202003, 0x000 },
-    { 0x00000000, 0x00802404, 0x000 },
-    { 0x0000000f, 0x00210225, 0x000 },
-    { 0x00000000, 0x14c00000, 0x689 },
-    { 0x00000000, 0x002b1405, 0x000 },
-    { 0x00000001, 0x00901625, 0x000 },
-    { 0x00000000, 0x00600000, 0x00b },
-    { 0x00000000, 0x00600411, 0x315 },
-    { 0x00000000, 0x00200411, 0x000 },
-    { 0x00000000, 0x00600811, 0x1b2 },
-    { 0x00002256, 0x00204411, 0x000 },
-    { 0x0000001a, 0x00294a22, 0x000 },
-    { 0x00000000, 0xc0200000, 0x000 },
-    { 0x00003fff, 0x002f022f, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x000 },
-    { 0x00000000, 0xc0200400, 0x000 },
-    { 0x0000225c, 0x00204411, 0x000 },
-    { 0x00000003, 0x00384a21, 0x000 },
-    { 0x0000a1fc, 0x00204411, 0x000 },
-    { 0x00000001, 0x00204811, 0x000 },
-    { 0x0000ffff, 0x40281220, 0x000 },
-    { 0x00000010, 0xc0211a20, 0x000 },
-    { 0x0000ffff, 0x40280e20, 0x000 },
-    { 0x00000010, 0xc0211620, 0x000 },
-    { 0x00000000, 0x00741465, 0x2bb },
-    { 0x0001a1fd, 0x00604411, 0x2e0 },
-    { 0x00000001, 0x00330621, 0x000 },
-    { 0x00000000, 0x002f0221, 0x000 },
-    { 0x00000000, 0x0cc00000, 0x219 },
-    { 0x00003fff, 0x002f022f, 0x000 },
-    { 0x00000000, 0x0cc00000, 0x212 },
-    { 0x00000000, 0xc0400400, 0x001 },
-    { 0x00000000, 0x00600000, 0x642 },
-    { 0x00000000, 0x0040040f, 0x213 },
-    { 0x00000000, 0x00600000, 0x62e },
-    { 0x00000000, 0x00600000, 0x642 },
-    { 0x00000210, 0x00600411, 0x315 },
-    { 0x00000000, 0x00600000, 0x1a0 },
-    { 0x00000000, 0x00600000, 0x19c },
-    { 0x00000000, 0x00600000, 0x2bb },
-    { 0x00000000, 0x00600000, 0x2a3 },
-    { 0x93800000, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204808, 0x000 },
-    { 0x00000000, 0x002f022f, 0x000 },
-    { 0x00000000, 0x0ae00000, 0x232 },
-    { 0x00000000, 0x00600000, 0x13a },
-    { 0x00000000, 0x00400000, 0x236 },
-    { 0x95000000, 0x00204411, 0x000 },
-    { 0x00000000, 0x002f022f, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x236 },
-    { 0x00000000, 0xc0404800, 0x233 },
-    { 0x92000000, 0x00204411, 0x000 },
-    { 0x00000000, 0xc0204800, 0x000 },
-    { 0x00002256, 0x00204411, 0x000 },
-    { 0x00000016, 0x00204811, 0x000 },
-    { 0x0000225c, 0x00204411, 0x000 },
-    { 0x00000003, 0x00204811, 0x000 },
-    { 0x0000a1fc, 0x00204411, 0x000 },
-    { 0x00000001, 0x00204811, 0x000 },
-    { 0x0001a1fd, 0x00204411, 0x000 },
-    { 0x00000000, 0x00600411, 0x2fb },
-    { 0x00000000, 0xc0400400, 0x001 },
-    { 0x00000000, 0x00600000, 0x62e },
-    { 0x0000a00c, 0x00204411, 0x000 },
-    { 0x00000000, 0xc0204800, 0x000 },
-    { 0x00000000, 0xc0404800, 0x000 },
-    { 0x00000000, 0x00600000, 0x00b },
-    { 0x00000018, 0x40210a20, 0x000 },
-    { 0x00000003, 0x002f0222, 0x000 },
-    { 0x00000000, 0x0ae00000, 0x24c },
-    { 0x00000014, 0x0020222d, 0x000 },
-    { 0x00080101, 0x00292228, 0x000 },
-    { 0x00000014, 0x00203628, 0x000 },
-    { 0x0000a30c, 0x00204411, 0x000 },
-    { 0x00000000, 0xc0204800, 0x000 },
-    { 0x00000000, 0xc0204800, 0x000 },
-    { 0x00000000, 0xc0404800, 0x251 },
-    { 0x00000000, 0x00600000, 0x00b },
-    { 0x00000010, 0x00600411, 0x315 },
-    { 0x3f800000, 0x00200411, 0x000 },
-    { 0x00000000, 0x00600811, 0x1b2 },
-    { 0x0000225c, 0x00204411, 0x000 },
-    { 0x00000003, 0x00204811, 0x000 },
-    { 0x00000000, 0x00600000, 0x27c },
-    { 0x00000017, 0x00201e2d, 0x000 },
-    { 0x00000001, 0x00211e27, 0x000 },
-    { 0x00000000, 0x14e00000, 0x26a },
-    { 0x00000012, 0x00201e2d, 0x000 },
-    { 0x0000ffff, 0x00281e27, 0x000 },
-    { 0x00000000, 0x00341c27, 0x000 },
-    { 0x00000000, 0x12c00000, 0x25f },
-    { 0x00000000, 0x00201c11, 0x000 },
-    { 0x00000000, 0x002f00e5, 0x000 },
-    { 0x00000000, 0x08c00000, 0x262 },
-    { 0x00000000, 0x00201407, 0x000 },
-    { 0x00000012, 0x00201e2d, 0x000 },
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-    { 0x00000001, 0x00204811, 0x000 },
-    { 0x0001a1fd, 0x00604411, 0x2e9 },
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-    { 0x00000001, 0x00204811, 0x000 },
-    { 0x00042004, 0x00604411, 0x68a },
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-    { 0x00000000, 0xc0600000, 0x2a3 },
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-    { 0x00000000, 0x00294887, 0x000 },
-    { 0x00000001, 0x00220a21, 0x000 },
-    { 0x00000000, 0x003308a2, 0x000 },
-    { 0x00000010, 0x00221e22, 0x000 },
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-    { 0x00000000, 0x00294887, 0x000 },
-    { 0x00000001, 0x00220a21, 0x000 },
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-    { 0x00000001, 0x40304a20, 0x000 },
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-    { 0x00000001, 0x00530a22, 0x34b },
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-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x00000001, 0x00204811, 0x000 },
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-    { 0x00000049, 0x00201811, 0x000 },
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-    { 0x00000001, 0x00331a26, 0x000 },
-    { 0x00000000, 0x002f0226, 0x000 },
-    { 0x00000000, 0x0cc00000, 0x370 },
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-    { 0x000421f9, 0x00604411, 0x68a },
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-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x00000001, 0x00204811, 0x000 },
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-    { 0x000421f9, 0x00604411, 0x68a },
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-    { 0x00000000, 0x14e00000, 0x3ce },
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-    { 0x00000001, 0x00204811, 0x000 },
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-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x00000001, 0x00204811, 0x000 },
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-    { 0x0000a2d1, 0x00204411, 0x000 },
-    { 0x00000000, 0x00404808, 0x000 },
-    { 0x0000a2d1, 0x00204411, 0x000 },
-    { 0x00000001, 0x00504a28, 0x000 },
-    { 0x00000001, 0x002f0224, 0x000 },
-    { 0x00000000, 0x0cc00000, 0x59d },
-    { 0x0000a2bb, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204807, 0x000 },
-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x00000001, 0x00204811, 0x000 },
-    { 0x0004a2ba, 0x00604411, 0x68a },
-    { 0x0000001a, 0x00212230, 0x000 },
-    { 0x00000006, 0x00222630, 0x000 },
-    { 0x00042004, 0x00604411, 0x68a },
-    { 0x0000a2c5, 0x00204411, 0x000 },
-    { 0x00000000, 0x003048e9, 0x000 },
-    { 0x00000000, 0x00e00000, 0x59b },
-    { 0x0000a2d2, 0x00204411, 0x000 },
-    { 0x00000000, 0x00404808, 0x000 },
-    { 0x0000a2d2, 0x00204411, 0x000 },
-    { 0x00000001, 0x00504a28, 0x000 },
-    { 0x00000002, 0x002f0224, 0x000 },
-    { 0x00000000, 0x0cc00000, 0x5ae },
-    { 0x0000a2bf, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204807, 0x000 },
-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x00000001, 0x00204811, 0x000 },
-    { 0x0004a2be, 0x00604411, 0x68a },
-    { 0x0000001a, 0x00212230, 0x000 },
-    { 0x00000006, 0x00222630, 0x000 },
-    { 0x00042004, 0x00604411, 0x68a },
-    { 0x0000a2c6, 0x00204411, 0x000 },
-    { 0x00000000, 0x003048e9, 0x000 },
-    { 0x00000000, 0x00e00000, 0x5ac },
-    { 0x0000a2d3, 0x00204411, 0x000 },
-    { 0x00000000, 0x00404808, 0x000 },
-    { 0x0000a2d3, 0x00204411, 0x000 },
-    { 0x00000001, 0x00504a28, 0x000 },
-    { 0x0000a2c3, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204807, 0x000 },
-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x00000001, 0x00204811, 0x000 },
-    { 0x0004a2c2, 0x00604411, 0x68a },
-    { 0x0000001a, 0x00212230, 0x000 },
-    { 0x00000006, 0x00222630, 0x000 },
-    { 0x00042004, 0x00604411, 0x68a },
-    { 0x0000a2c7, 0x00204411, 0x000 },
-    { 0x00000000, 0x003048e9, 0x000 },
-    { 0x00000000, 0x00e00000, 0x5bb },
-    { 0x0000a2d4, 0x00204411, 0x000 },
-    { 0x00000000, 0x00404808, 0x000 },
-    { 0x0000a2d4, 0x00204411, 0x000 },
-    { 0x00000001, 0x00504a28, 0x000 },
-    { 0x85000000, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204801, 0x000 },
-    { 0x0000304a, 0x00204411, 0x000 },
-    { 0x01000000, 0x00204811, 0x000 },
-    { 0x00000000, 0x00400000, 0x5c1 },
-    { 0xa4000000, 0xc0204411, 0x000 },
-    { 0x00000000, 0xc0404800, 0x000 },
-    { 0x00000000, 0xc0600000, 0x5c6 },
-    { 0x00000000, 0xc0400400, 0x001 },
-    { 0x0000002c, 0x00203621, 0x000 },
-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x00000006, 0x00204811, 0x000 },
-    { 0x00000000, 0x002f0230, 0x000 },
-    { 0x00000000, 0x0cc00000, 0x5cd },
-    { 0x00000000, 0x00200411, 0x000 },
-    { 0x00000030, 0x00403621, 0x5e0 },
-    { 0x00000030, 0x0020062d, 0x000 },
-    { 0x00007e00, 0x00280621, 0x000 },
-    { 0x00000000, 0x002f0221, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x5e0 },
-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x00000001, 0x00204811, 0x000 },
-    { 0x0004a092, 0x00604411, 0x68a },
-    { 0x00000031, 0x00203630, 0x000 },
-    { 0x0004a093, 0x00604411, 0x68a },
-    { 0x00000032, 0x00203630, 0x000 },
-    { 0x0004a2b6, 0x00604411, 0x68a },
-    { 0x00000033, 0x00203630, 0x000 },
-    { 0x0004a2ba, 0x00604411, 0x68a },
-    { 0x00000034, 0x00203630, 0x000 },
-    { 0x0004a2be, 0x00604411, 0x68a },
-    { 0x00000035, 0x00203630, 0x000 },
-    { 0x0004a2c2, 0x00604411, 0x68a },
-    { 0x00000036, 0x00203630, 0x000 },
-    { 0x00042004, 0x00604411, 0x68a },
-    { 0x0001a2a4, 0x00204411, 0x000 },
-    { 0x0000003f, 0x00204811, 0x000 },
-    { 0x0000003f, 0x00204811, 0x000 },
-    { 0x0000003f, 0x00204811, 0x000 },
-    { 0x0000003f, 0x00204811, 0x000 },
-    { 0x00000005, 0x00204811, 0x000 },
-    { 0x0000a1f4, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x88000000, 0x00204411, 0x000 },
-    { 0x00000001, 0x00204811, 0x000 },
-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x00000006, 0x00204811, 0x000 },
-    { 0x00000001, 0x002f0230, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x629 },
-    { 0x00000030, 0x0020062d, 0x000 },
-    { 0x00000000, 0x002f0221, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x629 },
-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x00000001, 0x00204811, 0x000 },
-    { 0x00007e00, 0x00280621, 0x000 },
-    { 0x00000000, 0x002f0221, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x602 },
-    { 0x0000a092, 0x00204411, 0x000 },
-    { 0x00000031, 0x00204a2d, 0x000 },
-    { 0x0000a093, 0x00204411, 0x000 },
-    { 0x00000032, 0x00204a2d, 0x000 },
-    { 0x0000a2b6, 0x00204411, 0x000 },
-    { 0x00000033, 0x00204a2d, 0x000 },
-    { 0x0000a2ba, 0x00204411, 0x000 },
-    { 0x00000034, 0x00204a2d, 0x000 },
-    { 0x0000a2be, 0x00204411, 0x000 },
-    { 0x00000035, 0x00204a2d, 0x000 },
-    { 0x0000a2c2, 0x00204411, 0x000 },
-    { 0x00000036, 0x00204a2d, 0x000 },
-    { 0x00000030, 0x0020062d, 0x000 },
-    { 0x000001ff, 0x00280621, 0x000 },
-    { 0x00000000, 0x002f0221, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x628 },
-    { 0x00000000, 0x00210221, 0x000 },
-    { 0x00000000, 0x14c00000, 0x60b },
-    { 0x0004a003, 0x00604411, 0x68a },
-    { 0x0000a003, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204810, 0x000 },
-    { 0x00000001, 0x00210621, 0x000 },
-    { 0x00000000, 0x14c00000, 0x610 },
-    { 0x0004a010, 0x00604411, 0x68a },
-    { 0x0000a010, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204810, 0x000 },
-    { 0x00000001, 0x00210621, 0x000 },
-    { 0x00000000, 0x002f0221, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x628 },
-    { 0x0004a011, 0x00604411, 0x68a },
-    { 0x0000a011, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204810, 0x000 },
-    { 0x0004a012, 0x00604411, 0x68a },
-    { 0x0000a012, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204810, 0x000 },
-    { 0x0004a013, 0x00604411, 0x68a },
-    { 0x0000a013, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204810, 0x000 },
-    { 0x0004a014, 0x00604411, 0x68a },
-    { 0x0000a014, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204810, 0x000 },
-    { 0x0004a015, 0x00604411, 0x68a },
-    { 0x0000a015, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204810, 0x000 },
-    { 0x0004a016, 0x00604411, 0x68a },
-    { 0x0000a016, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204810, 0x000 },
-    { 0x0004a017, 0x00604411, 0x68a },
-    { 0x0000a017, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204810, 0x000 },
-    { 0x00042004, 0x00604411, 0x68a },
-    { 0x0000002c, 0x0080062d, 0x000 },
-    { 0xff000000, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x00000001, 0x00204811, 0x000 },
-    { 0x00000002, 0x00804811, 0x000 },
-    { 0x00000000, 0x0ee00000, 0x63a },
-    { 0x00000030, 0x0020062d, 0x000 },
-    { 0x00000002, 0x00280621, 0x000 },
-    { 0x00000000, 0x002f0221, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x638 },
-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x00000001, 0x00204811, 0x000 },
-    { 0x00042004, 0x00604411, 0x68a },
-    { 0x00001000, 0x00200811, 0x000 },
-    { 0x0000002b, 0x00203622, 0x000 },
-    { 0x00000000, 0x00600000, 0x63e },
-    { 0x00000000, 0x00600000, 0x5c6 },
-    { 0x98000000, 0x00204411, 0x000 },
-    { 0x00000000, 0x00804811, 0x000 },
-    { 0x00000000, 0xc0600000, 0x63e },
-    { 0x00000000, 0xc0400400, 0x001 },
-    { 0x0000a2a4, 0x00204411, 0x000 },
-    { 0x00000022, 0x00204811, 0x000 },
-    { 0x89000000, 0x00204411, 0x000 },
-    { 0x00000001, 0x00404811, 0x62a },
-    { 0x97000000, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x8a000000, 0x00204411, 0x000 },
-    { 0x00000000, 0x00404811, 0x62a },
-    { 0x00000000, 0x00600000, 0x659 },
-    { 0x00002010, 0x00204411, 0x000 },
-    { 0x00008000, 0x00204811, 0x000 },
-    { 0x0001a2a4, 0xc0204411, 0x000 },
-    { 0x00000016, 0x00604811, 0x36e },
-    { 0x00002010, 0x00204411, 0x000 },
-    { 0x00010000, 0x00204811, 0x000 },
-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x00000001, 0x00204811, 0x000 },
-    { 0x0000217c, 0x00204411, 0x000 },
-    { 0x09800000, 0x00204811, 0x000 },
-    { 0xffffffff, 0x00204811, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x00000000, 0x17000000, 0x000 },
-    { 0x0004217f, 0x00604411, 0x68a },
-    { 0x0000001f, 0x00210230, 0x000 },
-    { 0x00000000, 0x14c00000, 0x000 },
-    { 0x00000004, 0x00404c11, 0x653 },
-    { 0x00000000, 0x00400000, 0x000 },
-    { 0x00000017, 0x00201e2d, 0x000 },
-    { 0x00000004, 0x00291e27, 0x000 },
-    { 0x00000017, 0x00803627, 0x000 },
-    { 0x00000017, 0x00201e2d, 0x000 },
-    { 0xfffffffb, 0x00281e27, 0x000 },
-    { 0x00000017, 0x00803627, 0x000 },
-    { 0x00000017, 0x00201e2d, 0x000 },
-    { 0x00000008, 0x00291e27, 0x000 },
-    { 0x00000017, 0x00803627, 0x000 },
-    { 0x00000017, 0x00201e2d, 0x000 },
-    { 0xfffffff7, 0x00281e27, 0x000 },
-    { 0x00000017, 0x00803627, 0x000 },
-    { 0x00002010, 0x00204411, 0x000 },
-    { 0x00008000, 0x00204811, 0x000 },
-    { 0x0001a2a4, 0x00204411, 0x000 },
-    { 0x00000016, 0x00604811, 0x36e },
-    { 0x00002010, 0x00204411, 0x000 },
-    { 0x00010000, 0x00204811, 0x000 },
-    { 0x0000217c, 0x00204411, 0x000 },
-    { 0x01800000, 0x00204811, 0x000 },
-    { 0xffffffff, 0x00204811, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x00000000, 0x17000000, 0x000 },
-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x00000001, 0x00204811, 0x000 },
-    { 0x0004217f, 0x00604411, 0x68a },
-    { 0x0000001f, 0x00210230, 0x000 },
-    { 0x00000000, 0x14c00000, 0x689 },
-    { 0x00000010, 0x00404c11, 0x66f },
-    { 0x00000000, 0xc0200400, 0x000 },
-    { 0x00000000, 0x38c00000, 0x000 },
-    { 0x0000001d, 0x00200a2d, 0x000 },
-    { 0x0000001e, 0x00200e2d, 0x000 },
-    { 0x0000001f, 0x0020122d, 0x000 },
-    { 0x00000020, 0x0020162d, 0x000 },
-    { 0x00002169, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204804, 0x000 },
-    { 0x00000000, 0x00204805, 0x000 },
-    { 0x00000000, 0x00204801, 0x000 },
-    { 0xcafebabe, 0x00204811, 0x000 },
-    { 0x00000004, 0x00301224, 0x000 },
-    { 0x00000000, 0x002f0064, 0x000 },
-    { 0x00000000, 0x0cc00000, 0x688 },
-    { 0x00000003, 0x00281a22, 0x000 },
-    { 0x00000008, 0x00221222, 0x000 },
-    { 0xfffff000, 0x00281224, 0x000 },
-    { 0x00000000, 0x002910c4, 0x000 },
-    { 0x0000001f, 0x00403624, 0x000 },
-    { 0x00000000, 0x00800000, 0x000 },
-    { 0x00000000, 0x1ac00000, 0x68a },
-    { 0x9f000000, 0x00204411, 0x000 },
-    { 0xcafebabe, 0x00204811, 0x000 },
-    { 0x00000000, 0x1ae00000, 0x68d },
-    { 0x00000000, 0x00800000, 0x000 },
-    { 0x00000000, 0x1ac00000, 0x68f },
-    { 0x9e000000, 0x00204411, 0x000 },
-    { 0xcafebabe, 0x00204811, 0x000 },
-    { 0x00000000, 0x1ae00000, 0x692 },
-    { 0x00000000, 0x00800000, 0x000 },
-    { 0x00000000, 0x00600000, 0x00b },
-    { 0x00001000, 0x00600411, 0x315 },
-    { 0x00000000, 0x00200411, 0x000 },
-    { 0x00000000, 0x00600811, 0x1b2 },
-    { 0x0000225c, 0x00204411, 0x000 },
-    { 0x00000003, 0x00204811, 0x000 },
-    { 0x00002256, 0x00204411, 0x000 },
-    { 0x0000001b, 0x00204811, 0x000 },
-    { 0x0000a1fc, 0x00204411, 0x000 },
-    { 0x00000001, 0x00204811, 0x000 },
-    { 0x0001a1fd, 0xc0204411, 0x000 },
-    { 0x00000021, 0x00201e2d, 0x000 },
-    { 0x00000010, 0x00221e27, 0x000 },
-    { 0x00000024, 0x0020222d, 0x000 },
-    { 0x0000ffff, 0x00282228, 0x000 },
-    { 0x00000000, 0x00294907, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x00000022, 0x0020222d, 0x000 },
-    { 0x0000ffff, 0x00282228, 0x000 },
-    { 0x00000000, 0x00294907, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x00000023, 0x00201e2d, 0x000 },
-    { 0x00000010, 0x00221e27, 0x000 },
-    { 0x00000000, 0x00294907, 0x000 },
-    { 0x00000000, 0x00404811, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x014204ff, 0x05bd0250, 0x000 },
-    { 0x01c30168, 0x043f05bd, 0x000 },
-    { 0x02250209, 0x02500151, 0x000 },
-    { 0x02230245, 0x02a00241, 0x000 },
-    { 0x03d705bd, 0x05bd05bd, 0x000 },
-    { 0x06460647, 0x031f05bd, 0x000 },
-    { 0x05bd05c2, 0x03200340, 0x000 },
-    { 0x032a0282, 0x03420334, 0x000 },
-    { 0x05bd05bd, 0x05bd05bd, 0x000 },
-    { 0x05bd054e, 0x05bd05bd, 0x000 },
-    { 0x03ba05bd, 0x04b80344, 0x000 },
-    { 0x0497044d, 0x043d05bd, 0x000 },
-    { 0x04cd05bd, 0x044104da, 0x000 },
-    { 0x044d0504, 0x03510375, 0x000 },
-    { 0x05bd05bd, 0x05bd05bd, 0x000 },
-    { 0x05bd05bd, 0x05bd05bd, 0x000 },
-    { 0x05bd05bd, 0x063c05c4, 0x000 },
-    { 0x05bd05bd, 0x000705bd, 0x000 },
-    { 0x05bd05bd, 0x05bd05bd, 0x000 },
-    { 0x05bd05bd, 0x05bd05bd, 0x000 },
-    { 0x03f803ed, 0x04080406, 0x000 },
-    { 0x040e040a, 0x040c0410, 0x000 },
-    { 0x041c0418, 0x04240420, 0x000 },
-    { 0x042c0428, 0x04340430, 0x000 },
-    { 0x05bd05bd, 0x043805bd, 0x000 },
-    { 0x05bd05bd, 0x05bd05bd, 0x000 },
-    { 0x05bd05bd, 0x05bd05bd, 0x000 },
-    { 0x00020676, 0x06940006, 0x000 },
-};
-static const u32 RV635_pfp_microcode[] = {
-0xca0400,
-0xa00000,
-0x7e828b,
-0x7c038b,
-0x8001b8,
-0x7c038b,
-0xd4401e,
-0xee001e,
-0xca0400,
-0xa00000,
-0x7e828b,
-0xc41838,
-0xca2400,
-0xca2800,
-0x9581a8,
-0xc41c3a,
-0xc3c000,
-0xca0800,
-0xca0c00,
-0x7c744b,
-0xc20005,
-0x99c000,
-0xc41c3a,
-0x7c744c,
-0xc0fff0,
-0x042c04,
-0x309002,
-0x7d2500,
-0x351402,
-0x7d350b,
-0x255403,
-0x7cd580,
-0x259c03,
-0x95c004,
-0xd5001b,
-0x7eddc1,
-0x7d9d80,
-0xd6801b,
-0xd5801b,
-0xd4401e,
-0xd5401e,
-0xd6401e,
-0xd6801e,
-0xd4801e,
-0xd4c01e,
-0x9783d3,
-0xd5c01e,
-0xca0800,
-0x80001a,
-0xca0c00,
-0xe4011e,
-0xd4001e,
-0x80000c,
-0xc41838,
-0xe4013e,
-0xd4001e,
-0x80000c,
-0xc41838,
-0xd4401e,
-0xee001e,
-0xca0400,
-0xa00000,
-0x7e828b,
-0xe4011e,
-0xd4001e,
-0xd4401e,
-0xee001e,
-0xca0400,
-0xa00000,
-0x7e828b,
-0xe4013e,
-0xd4001e,
-0xd4401e,
-0xee001e,
-0xca0400,
-0xa00000,
-0x7e828b,
-0xca1800,
-0xd4401e,
-0xd5801e,
-0x800053,
-0xd40075,
-0xd4401e,
-0xca0800,
-0xca0c00,
-0xca1000,
-0xd48019,
-0xd4c018,
-0xd50017,
-0xd4801e,
-0xd4c01e,
-0xd5001e,
-0xe2001e,
-0xca0400,
-0xa00000,
-0x7e828b,
-0xca0800,
-0xd48060,
-0xd4401e,
-0x800000,
-0xd4801e,
-0xca0800,
-0xd48061,
-0xd4401e,
-0x800000,
-0xd4801e,
-0xca0800,
-0xca0c00,
-0xd4401e,
-0xd48016,
-0xd4c016,
-0xd4801e,
-0x8001b8,
-0xd4c01e,
-0xc60843,
-0xca0c00,
-0xca1000,
-0x948004,
-0xca1400,
-0xe420f3,
-0xd42013,
-0xd56065,
-0xd4e01c,
-0xd5201c,
-0xd5601c,
-0x800000,
-0x062001,
-0xc60843,
-0xca0c00,
-0xca1000,
-0x9483f7,
-0xca1400,
-0xe420f3,
-0x800079,
-0xd42013,
-0xc60843,
-0xca0c00,
-0xca1000,
-0x9883ef,
-0xca1400,
-0xd40064,
-0x80008d,
-0x000000,
-0xc41432,
-0xc61843,
-0xc4082f,
-0x954005,
-0xc40c30,
-0xd4401e,
-0x800000,
-0xee001e,
-0x9583f5,
-0xc41031,
-0xd44033,
-0xd52065,
-0xd4a01c,
-0xd4e01c,
-0xd5201c,
-0xe4015e,
-0xd4001e,
-0x800000,
-0x062001,
-0xca1800,
-0x0a2001,
-0xd60076,
-0xc40836,
-0x988007,
-0xc61045,
-0x950110,
-0xd4001f,
-0xd46062,
-0x800000,
-0xd42062,
-0xcc3835,
-0xcc1433,
-0x8401bb,
-0xd40072,
-0xd5401e,
-0x800000,
-0xee001e,
-0xe2001a,
-0x8401bb,
-0xe2001a,
-0xcc104b,
-0xcc0447,
-0x2c9401,
-0x7d098b,
-0x984005,
-0x7d15cb,
-0xd4001a,
-0x8001b8,
-0xd4006d,
-0x344401,
-0xcc0c48,
-0x98403a,
-0xcc2c4a,
-0x958004,
-0xcc0449,
-0x8001b8,
-0xd4001a,
-0xd4c01a,
-0x282801,
-0x8400f0,
-0xcc1003,
-0x98801b,
-0x04380c,
-0x8400f0,
-0xcc1003,
-0x988017,
-0x043808,
-0x8400f0,
-0xcc1003,
-0x988013,
-0x043804,
-0x8400f0,
-0xcc1003,
-0x988014,
-0xcc104c,
-0x9a8009,
-0xcc144d,
-0x9840dc,
-0xd4006d,
-0xcc1848,
-0xd5001a,
-0xd5401a,
-0x8000c9,
-0xd5801a,
-0x96c0d5,
-0xd4006d,
-0x8001b8,
-0xd4006e,
-0x9ac003,
-0xd4006d,
-0xd4006e,
-0x800000,
-0xec007f,
-0x9ac0cc,
-0xd4006d,
-0x8001b8,
-0xd4006e,
-0xcc1403,
-0xcc1803,
-0xcc1c03,
-0x7d9103,
-0x7dd583,
-0x7d190c,
-0x35cc1f,
-0x35701f,
-0x7cf0cb,
-0x7cd08b,
-0x880000,
-0x7e8e8b,
-0x95c004,
-0xd4006e,
-0x8001b8,
-0xd4001a,
-0xd4c01a,
-0xcc0803,
-0xcc0c03,
-0xcc1003,
-0xcc1403,
-0xcc1803,
-0xcc1c03,
-0xcc2403,
-0xcc2803,
-0x35c41f,
-0x36b01f,
-0x7c704b,
-0x34f01f,
-0x7c704b,
-0x35701f,
-0x7c704b,
-0x7d8881,
-0x7dccc1,
-0x7e5101,
-0x7e9541,
-0x7c9082,
-0x7cd4c2,
-0x7c848b,
-0x9ac003,
-0x7c8c8b,
-0x2c8801,
-0x98809e,
-0xd4006d,
-0x98409c,
-0xd4006e,
-0xcc084c,
-0xcc0c4d,
-0xcc1048,
-0xd4801a,
-0xd4c01a,
-0x800101,
-0xd5001a,
-0xcc0832,
-0xd40032,
-0x9482d9,
-0xca0c00,
-0xd4401e,
-0x800000,
-0xd4001e,
-0xe4011e,
-0xd4001e,
-0xca0800,
-0xca0c00,
-0xca1000,
-0xd4401e,
-0xca1400,
-0xd4801e,
-0xd4c01e,
-0xd5001e,
-0xd5401e,
-0xd54034,
-0x800000,
-0xee001e,
-0x280404,
-0xe2001a,
-0xe2001a,
-0xd4401a,
-0xca3800,
-0xcc0803,
-0xcc0c03,
-0xcc0c03,
-0xcc0c03,
-0x9882bd,
-0x000000,
-0x8401bb,
-0xd7a06f,
-0x800000,
-0xee001f,
-0xca0400,
-0xc2ff00,
-0xcc0834,
-0xc13fff,
-0x7c74cb,
-0x7cc90b,
-0x7d010f,
-0x9902b0,
-0x7c738b,
-0x8401bb,
-0xd7a06f,
-0x800000,
-0xee001f,
-0xca0800,
-0x281900,
-0x7d898b,
-0x958014,
-0x281404,
-0xca0c00,
-0xca1000,
-0xca1c00,
-0xca2400,
-0xe2001f,
-0xd4c01a,
-0xd5001a,
-0xd5401a,
-0xcc1803,
-0xcc2c03,
-0xcc2c03,
-0xcc2c03,
-0x7da58b,
-0x7d9c47,
-0x984297,
-0x000000,
-0x800161,
-0xd4c01a,
-0xd4401e,
-0xd4801e,
-0x800000,
-0xee001e,
-0xe4011e,
-0xd4001e,
-0xd4401e,
-0xee001e,
-0xca0400,
-0xa00000,
-0x7e828b,
-0xe4013e,
-0xd4001e,
-0xd4401e,
-0xee001e,
-0xca0400,
-0xa00000,
-0x7e828b,
-0xca0800,
-0x248c06,
-0x0ccc06,
-0x98c006,
-0xcc104e,
-0x990004,
-0xd40073,
-0xe4011e,
-0xd4001e,
-0xd4401e,
-0xd4801e,
-0x800000,
-0xee001e,
-0xca0800,
-0xca0c00,
-0x34d018,
-0x251001,
-0x950021,
-0xc17fff,
-0xca1000,
-0xca1400,
-0xca1800,
-0xd4801d,
-0xd4c01d,
-0x7db18b,
-0xc14202,
-0xc2c001,
-0xd5801d,
-0x34dc0e,
-0x7d5d4c,
-0x7f734c,
-0xd7401e,
-0xd5001e,
-0xd5401e,
-0xc14200,
-0xc2c000,
-0x099c01,
-0x31dc10,
-0x7f5f4c,
-0x7f734c,
-0x042802,
-0x7d8380,
-0xd5a86f,
-0xd58066,
-0xd7401e,
-0xec005e,
-0xc82402,
-0xc82402,
-0x8001b8,
-0xd60076,
-0xd4401e,
-0xd4801e,
-0xd4c01e,
-0x800000,
-0xee001e,
-0x800000,
-0xee001f,
-0xd4001f,
-0x800000,
-0xd4001f,
-0xd4001f,
-0x880000,
-0xd4001f,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x010171,
-0x020178,
-0x03008f,
-0x04007f,
-0x050003,
-0x06003f,
-0x070032,
-0x08012c,
-0x090046,
-0x0a0036,
-0x1001b6,
-0x1700a2,
-0x22013a,
-0x230149,
-0x2000b4,
-0x240125,
-0x27004d,
-0x28006a,
-0x2a0060,
-0x2b0052,
-0x2f0065,
-0x320087,
-0x34017f,
-0x3c0156,
-0x3f0072,
-0x41018c,
-0x44012e,
-0x550173,
-0x56017a,
-0x60000b,
-0x610034,
-0x620038,
-0x630038,
-0x640038,
-0x650038,
-0x660038,
-0x670038,
-0x68003a,
-0x690041,
-0x6a0048,
-0x6b0048,
-0x6c0048,
-0x6d0048,
-0x6e0048,
-0x6f0048,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-};
-static const u32 RV670_cp_microcode[][3] = {
-    { 0x00000000, 0xc0200400, 0x000 },
-    { 0x00000000, 0x00a0000a, 0x000 },
-    { 0x0000ffff, 0x00284621, 0x000 },
-    { 0x00000000, 0xd9004800, 0x000 },
-    { 0x00000000, 0xc0200400, 0x000 },
-    { 0x00000000, 0x00a0000a, 0x000 },
-    { 0x00000000, 0x00e00000, 0x000 },
-    { 0x00010000, 0xc0294620, 0x000 },
-    { 0x00000000, 0xd9004800, 0x000 },
-    { 0x00000000, 0xc0200400, 0x000 },
-    { 0x00000000, 0x00a0000a, 0x000 },
-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x00000001, 0x00204811, 0x000 },
-    { 0x00042004, 0x00604411, 0x67c },
-    { 0x00000000, 0x00600000, 0x624 },
-    { 0x00000000, 0x00600000, 0x638 },
-    { 0x00000000, 0xc0200800, 0x000 },
-    { 0x00000f00, 0x00281622, 0x000 },
-    { 0x00000008, 0x00211625, 0x000 },
-    { 0x00000018, 0x00203625, 0x000 },
-    { 0x8d000000, 0x00204411, 0x000 },
-    { 0x00000004, 0x002f0225, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x018 },
-    { 0x00412000, 0x00404811, 0x019 },
-    { 0x00422000, 0x00204811, 0x000 },
-    { 0x8e000000, 0x00204411, 0x000 },
-    { 0x00000028, 0x00204a2d, 0x000 },
-    { 0x90000000, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204805, 0x000 },
-    { 0x0000000c, 0x00211622, 0x000 },
-    { 0x00000003, 0x00281625, 0x000 },
-    { 0x00000019, 0x00211a22, 0x000 },
-    { 0x00000004, 0x00281a26, 0x000 },
-    { 0x00000000, 0x002914c5, 0x000 },
-    { 0x00000019, 0x00203625, 0x000 },
-    { 0x00000000, 0x003a1402, 0x000 },
-    { 0x00000016, 0x00211625, 0x000 },
-    { 0x00000003, 0x00281625, 0x000 },
-    { 0x00000017, 0x00200e2d, 0x000 },
-    { 0xfffffffc, 0x00280e23, 0x000 },
-    { 0x00000000, 0x002914a3, 0x000 },
-    { 0x00000017, 0x00203625, 0x000 },
-    { 0x00008000, 0x00280e22, 0x000 },
-    { 0x00000007, 0x00220e23, 0x000 },
-    { 0x00000000, 0x0029386e, 0x000 },
-    { 0x20000000, 0x00280e22, 0x000 },
-    { 0x00000006, 0x00210e23, 0x000 },
-    { 0x00000000, 0x0029386e, 0x000 },
-    { 0x00000000, 0x00220222, 0x000 },
-    { 0x00000000, 0x14e00000, 0x038 },
-    { 0x00000000, 0x2ee00000, 0x035 },
-    { 0x00000000, 0x2ce00000, 0x037 },
-    { 0x00000000, 0x00400e2d, 0x039 },
-    { 0x00000008, 0x00200e2d, 0x000 },
-    { 0x00000009, 0x0040122d, 0x046 },
-    { 0x00000001, 0x00400e2d, 0x039 },
-    { 0x00000000, 0xc0200c00, 0x000 },
-    { 0x003ffffc, 0x00281223, 0x000 },
-    { 0x00000002, 0x00221224, 0x000 },
-    { 0x0000001f, 0x00211e23, 0x000 },
-    { 0x00000000, 0x14e00000, 0x03e },
-    { 0x00000008, 0x00401c11, 0x041 },
-    { 0x0000000d, 0x00201e2d, 0x000 },
-    { 0x0000000f, 0x00281e27, 0x000 },
-    { 0x00000003, 0x00221e27, 0x000 },
-    { 0x7fc00000, 0x00281a23, 0x000 },
-    { 0x00000014, 0x00211a26, 0x000 },
-    { 0x00000001, 0x00331a26, 0x000 },
-    { 0x00000008, 0x00221a26, 0x000 },
-    { 0x00000000, 0x00290cc7, 0x000 },
-    { 0x00000027, 0x00203624, 0x000 },
-    { 0x00007f00, 0x00281221, 0x000 },
-    { 0x00001400, 0x002f0224, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x04b },
-    { 0x00000001, 0x00290e23, 0x000 },
-    { 0x0000000e, 0x00203623, 0x000 },
-    { 0x0000e000, 0x00204411, 0x000 },
-    { 0xfff80000, 0x00294a23, 0x000 },
-    { 0x00000000, 0x003a2c02, 0x000 },
-    { 0x00000002, 0x00220e2b, 0x000 },
-    { 0xfc000000, 0x00280e23, 0x000 },
-    { 0x0000000f, 0x00203623, 0x000 },
-    { 0x00001fff, 0x00294a23, 0x000 },
-    { 0x00000027, 0x00204a2d, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x00000029, 0x00200e2d, 0x000 },
-    { 0x060a0200, 0x00294a23, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x00000001, 0x00210222, 0x000 },
-    { 0x00000000, 0x14e00000, 0x061 },
-    { 0x00000000, 0x2ee00000, 0x05f },
-    { 0x00000000, 0x2ce00000, 0x05e },
-    { 0x00000000, 0x00400e2d, 0x062 },
-    { 0x00000001, 0x00400e2d, 0x062 },
-    { 0x0000000a, 0x00200e2d, 0x000 },
-    { 0x0000000b, 0x0040122d, 0x06a },
-    { 0x00000000, 0xc0200c00, 0x000 },
-    { 0x003ffffc, 0x00281223, 0x000 },
-    { 0x00000002, 0x00221224, 0x000 },
-    { 0x7fc00000, 0x00281623, 0x000 },
-    { 0x00000014, 0x00211625, 0x000 },
-    { 0x00000001, 0x00331625, 0x000 },
-    { 0x80000000, 0x00280e23, 0x000 },
-    { 0x00000000, 0x00290ca3, 0x000 },
-    { 0x3ffffc00, 0x00290e23, 0x000 },
-    { 0x0000001f, 0x00211e23, 0x000 },
-    { 0x00000000, 0x14e00000, 0x06d },
-    { 0x00000100, 0x00401c11, 0x070 },
-    { 0x0000000d, 0x00201e2d, 0x000 },
-    { 0x000000f0, 0x00281e27, 0x000 },
-    { 0x00000004, 0x00221e27, 0x000 },
-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x0000000d, 0x00204811, 0x000 },
-    { 0xfffff0ff, 0x00281a30, 0x000 },
-    { 0x0000a028, 0x00204411, 0x000 },
-    { 0x00000000, 0x002948e6, 0x000 },
-    { 0x0000a018, 0x00204411, 0x000 },
-    { 0x3fffffff, 0x00284a23, 0x000 },
-    { 0x0000a010, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204804, 0x000 },
-    { 0x00000030, 0x0020162d, 0x000 },
-    { 0x00000002, 0x00291625, 0x000 },
-    { 0x00000030, 0x00203625, 0x000 },
-    { 0x00000025, 0x0020162d, 0x000 },
-    { 0x00000000, 0x002f00a3, 0x000 },
-    { 0x00000000, 0x0cc00000, 0x083 },
-    { 0x00000026, 0x0020162d, 0x000 },
-    { 0x00000000, 0x002f00a4, 0x000 },
-    { 0x00000000, 0x0cc00000, 0x084 },
-    { 0x00000000, 0x00400000, 0x08a },
-    { 0x00000025, 0x00203623, 0x000 },
-    { 0x00000026, 0x00203624, 0x000 },
-    { 0x00000017, 0x00201e2d, 0x000 },
-    { 0x00000002, 0x00210227, 0x000 },
-    { 0x00000000, 0x14e00000, 0x08a },
-    { 0x00000000, 0x00600000, 0x659 },
-    { 0x00000000, 0x00600000, 0x64d },
-    { 0x00000002, 0x00210e22, 0x000 },
-    { 0x00000000, 0x14c00000, 0x08d },
-    { 0x00000012, 0xc0403620, 0x093 },
-    { 0x00000000, 0x2ee00000, 0x091 },
-    { 0x00000000, 0x2ce00000, 0x090 },
-    { 0x00000002, 0x00400e2d, 0x092 },
-    { 0x00000003, 0x00400e2d, 0x092 },
-    { 0x0000000c, 0x00200e2d, 0x000 },
-    { 0x00000012, 0x00203623, 0x000 },
-    { 0x00000003, 0x00210e22, 0x000 },
-    { 0x00000000, 0x14c00000, 0x098 },
-    { 0x0000a00c, 0x00204411, 0x000 },
-    { 0x00000000, 0xc0204800, 0x000 },
-    { 0x00000000, 0xc0404800, 0x0a0 },
-    { 0x0000a00c, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x00000000, 0x2ee00000, 0x09e },
-    { 0x00000000, 0x2ce00000, 0x09d },
-    { 0x00000002, 0x00400e2d, 0x09f },
-    { 0x00000003, 0x00400e2d, 0x09f },
-    { 0x0000000c, 0x00200e2d, 0x000 },
-    { 0x00000000, 0x00204803, 0x000 },
-    { 0x00000000, 0x003a0c02, 0x000 },
-    { 0x003f0000, 0x00280e23, 0x000 },
-    { 0x00000010, 0x00210e23, 0x000 },
-    { 0x00000011, 0x00203623, 0x000 },
-    { 0x0000001e, 0x0021022b, 0x000 },
-    { 0x00000000, 0x14c00000, 0x0a7 },
-    { 0x00000016, 0xc0203620, 0x000 },
-    { 0x0000001f, 0x0021022b, 0x000 },
-    { 0x00000000, 0x14c00000, 0x0aa },
-    { 0x00000015, 0xc0203620, 0x000 },
-    { 0x00000008, 0x00210e2b, 0x000 },
-    { 0x0000007f, 0x00280e23, 0x000 },
-    { 0x00000000, 0x002f0223, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x0e1 },
-    { 0x00000000, 0x27000000, 0x000 },
-    { 0x00000000, 0x00600000, 0x2a3 },
-    { 0x00000001, 0x002f0223, 0x000 },
-    { 0x00000000, 0x0ae00000, 0x0b3 },
-    { 0x00000000, 0x00600000, 0x13a },
-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x00000006, 0x00204811, 0x000 },
-    { 0x0000000c, 0x00221e30, 0x000 },
-    { 0x99800000, 0x00204411, 0x000 },
-    { 0x00000004, 0x0020122d, 0x000 },
-    { 0x00000008, 0x00221224, 0x000 },
-    { 0x00000010, 0x00201811, 0x000 },
-    { 0x00000000, 0x00291ce4, 0x000 },
-    { 0x00000000, 0x00604807, 0x12f },
-    { 0x9b000000, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204802, 0x000 },
-    { 0x9c000000, 0x00204411, 0x000 },
-    { 0x00000000, 0x0033146f, 0x000 },
-    { 0x00000001, 0x00333e23, 0x000 },
-    { 0x00000000, 0xd9004800, 0x000 },
-    { 0x00000000, 0x00203c05, 0x000 },
-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x0000000e, 0x00204811, 0x000 },
-    { 0x00000000, 0x00201010, 0x000 },
-    { 0x0000e007, 0x00204411, 0x000 },
-    { 0x0000000f, 0x0021022b, 0x000 },
-    { 0x00000000, 0x14c00000, 0x0cb },
-    { 0x00f8ff08, 0x00204811, 0x000 },
-    { 0x98000000, 0x00404811, 0x0dc },
-    { 0x000000f0, 0x00280e22, 0x000 },
-    { 0x000000a0, 0x002f0223, 0x000 },
-    { 0x00000000, 0x0cc00000, 0x0da },
-    { 0x00000011, 0x00200e2d, 0x000 },
-    { 0x00000001, 0x002f0223, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x0d5 },
-    { 0x00000002, 0x002f0223, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x0d4 },
-    { 0x00003f00, 0x00400c11, 0x0d6 },
-    { 0x00001f00, 0x00400c11, 0x0d6 },
-    { 0x00000f00, 0x00200c11, 0x000 },
-    { 0x00380009, 0x00294a23, 0x000 },
-    { 0x3f000000, 0x00280e2b, 0x000 },
-    { 0x00000002, 0x00220e23, 0x000 },
-    { 0x00000007, 0x00494a23, 0x0dc },
-    { 0x00380f09, 0x00204811, 0x000 },
-    { 0x68000007, 0x00204811, 0x000 },
-    { 0x00000008, 0x00214a27, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x060a0200, 0x00294a24, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x0000a202, 0x00204411, 0x000 },
-    { 0x00ff0000, 0x00280e22, 0x000 },
-    { 0x00000080, 0x00294a23, 0x000 },
-    { 0x00000027, 0x00200e2d, 0x000 },
-    { 0x00000026, 0x0020122d, 0x000 },
-    { 0x00000000, 0x002f0083, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x0ea },
-    { 0x00000000, 0x00600000, 0x653 },
-    { 0x00000000, 0x00400000, 0x0eb },
-    { 0x00000000, 0x00600000, 0x656 },
-    { 0x00000007, 0x0020222d, 0x000 },
-    { 0x00000005, 0x00220e22, 0x000 },
-    { 0x00100000, 0x00280e23, 0x000 },
-    { 0x00000000, 0x00292068, 0x000 },
-    { 0x00000000, 0x003a0c02, 0x000 },
-    { 0x000000ef, 0x00280e23, 0x000 },
-    { 0x00000000, 0x00292068, 0x000 },
-    { 0x00000017, 0x00200e2d, 0x000 },
-    { 0x00000003, 0x00210223, 0x000 },
-    { 0x00000000, 0x14e00000, 0x0f8 },
-    { 0x0000000b, 0x00210228, 0x000 },
-    { 0x00000000, 0x14c00000, 0x0f8 },
-    { 0x00000400, 0x00292228, 0x000 },
-    { 0x00000014, 0x00203628, 0x000 },
-    { 0x0000001c, 0x00210e22, 0x000 },
-    { 0x00000000, 0x14c00000, 0x0fd },
-    { 0x0000a30c, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x0000001e, 0x00210e22, 0x000 },
-    { 0x00000000, 0x14c00000, 0x10b },
-    { 0x0000a30f, 0x00204411, 0x000 },
-    { 0x00000011, 0x00200e2d, 0x000 },
-    { 0x00000001, 0x002f0223, 0x000 },
-    { 0x00000000, 0x0cc00000, 0x104 },
-    { 0xffffffff, 0x00404811, 0x10b },
-    { 0x00000002, 0x002f0223, 0x000 },
-    { 0x00000000, 0x0cc00000, 0x107 },
-    { 0x0000ffff, 0x00404811, 0x10b },
-    { 0x00000004, 0x002f0223, 0x000 },
-    { 0x00000000, 0x0cc00000, 0x10a },
-    { 0x000000ff, 0x00404811, 0x10b },
-    { 0x00000001, 0x00204811, 0x000 },
-    { 0x0002c400, 0x00204411, 0x000 },
-    { 0x0000001f, 0x00210e22, 0x000 },
-    { 0x00000000, 0x14c00000, 0x112 },
-    { 0x00000010, 0x40210e20, 0x000 },
-    { 0x00000013, 0x00203623, 0x000 },
-    { 0x00000018, 0x40224a20, 0x000 },
-    { 0x00000010, 0xc0424a20, 0x114 },
-    { 0x00000000, 0x00200c11, 0x000 },
-    { 0x00000013, 0x00203623, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x0000000a, 0x00201011, 0x000 },
-    { 0x00000000, 0x002f0224, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x11b },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x00000001, 0x00531224, 0x117 },
-    { 0xffbfffff, 0x00283a2e, 0x000 },
-    { 0x0000001b, 0x00210222, 0x000 },
-    { 0x00000000, 0x14c00000, 0x12e },
-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x0000000d, 0x00204811, 0x000 },
-    { 0x00000018, 0x00220e30, 0x000 },
-    { 0xfc000000, 0x00280e23, 0x000 },
-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x0000000e, 0x00204811, 0x000 },
-    { 0x00000000, 0x00201010, 0x000 },
-    { 0x0000e00e, 0x00204411, 0x000 },
-    { 0x07f8ff08, 0x00204811, 0x000 },
-    { 0x00000000, 0x00294a23, 0x000 },
-    { 0x0000001c, 0x00201e2d, 0x000 },
-    { 0x00000008, 0x00214a27, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x060a0200, 0x00294a24, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x00000000, 0x00800000, 0x000 },
-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x00000001, 0x00204811, 0x000 },
-    { 0x0000217c, 0x00204411, 0x000 },
-    { 0x00800000, 0x00204811, 0x000 },
-    { 0x00000000, 0x00204806, 0x000 },
-    { 0x00000008, 0x00214a27, 0x000 },
-    { 0x00000000, 0x17000000, 0x000 },
-    { 0x0004217f, 0x00604411, 0x67c },
-    { 0x0000001f, 0x00210230, 0x000 },
-    { 0x00000000, 0x14c00000, 0x67b },
-    { 0x00000004, 0x00404c11, 0x135 },
-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x00000001, 0x00204811, 0x000 },
-    { 0x000021f8, 0x00204411, 0x000 },
-    { 0x0000001c, 0x00204811, 0x000 },
-    { 0x000421f9, 0x00604411, 0x67c },
-    { 0x00000011, 0x00210230, 0x000 },
-    { 0x00000000, 0x14e00000, 0x13c },
-    { 0x00000000, 0x00800000, 0x000 },
-    { 0x00000000, 0x00600000, 0x00b },
-    { 0x00000000, 0x00600411, 0x315 },
-    { 0x00000000, 0x00200411, 0x000 },
-    { 0x00000000, 0x00600811, 0x1b2 },
-    { 0x00000000, 0x00600000, 0x160 },
-    { 0x0000ffff, 0x40280e20, 0x000 },
-    { 0x00000010, 0xc0211220, 0x000 },
-    { 0x0000ffff, 0x40280620, 0x000 },
-    { 0x00000010, 0xc0210a20, 0x000 },
-    { 0x00000000, 0x00341461, 0x000 },
-    { 0x00000000, 0x00741882, 0x2bb },
-    { 0x0001a1fd, 0x00604411, 0x2e0 },
-    { 0x00003fff, 0x002f022f, 0x000 },
-    { 0x00000000, 0x0cc00000, 0x147 },
-    { 0x00000000, 0xc0400400, 0x001 },
-    { 0x00000000, 0x00600000, 0x00b },
-    { 0x00000000, 0x00600411, 0x315 },
-    { 0x00000000, 0x00200411, 0x000 },
-    { 0x00000000, 0x00600811, 0x1b2 },
-    { 0x00003fff, 0x002f022f, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x000 },
-    { 0x00000000, 0x00600000, 0x160 },
-    { 0x00000010, 0x40210e20, 0x000 },
-    { 0x0000ffff, 0xc0281220, 0x000 },
-    { 0x00000010, 0x40211620, 0x000 },
-    { 0x0000ffff, 0xc0681a20, 0x2bb },
-    { 0x0001a1fd, 0x00604411, 0x2e0 },
-    { 0x00003fff, 0x002f022f, 0x000 },
-    { 0x00000000, 0x0cc00000, 0x158 },
-    { 0x00000000, 0xc0400400, 0x001 },
-    { 0x0000225c, 0x00204411, 0x000 },
-    { 0x00000001, 0x00300a2f, 0x000 },
-    { 0x00000001, 0x00210a22, 0x000 },
-    { 0x00000003, 0x00384a22, 0x000 },
-    { 0x00002256, 0x00204411, 0x000 },
-    { 0x0000001a, 0x00204811, 0x000 },
-    { 0x0000a1fc, 0x00204411, 0x000 },
-    { 0x00000001, 0x00804811, 0x000 },
-    { 0x00000000, 0x00600000, 0x00b },
-    { 0x00000000, 0x00600000, 0x18f },
-    { 0x00000000, 0x00600000, 0x1a0 },
-    { 0x00003fff, 0x002f022f, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x000 },
-    { 0x00000000, 0x00202c08, 0x000 },
-    { 0x00000000, 0x00202411, 0x000 },
-    { 0x00000000, 0x00202811, 0x000 },
-    { 0x00002256, 0x00204411, 0x000 },
-    { 0x00000016, 0x00204811, 0x000 },
-    { 0x0000225c, 0x00204411, 0x000 },
-    { 0x00000003, 0x00204811, 0x000 },
-    { 0x93800000, 0x00204411, 0x000 },
-    { 0x00000002, 0x00221e29, 0x000 },
-    { 0x00000000, 0x007048eb, 0x19c },
-    { 0x00000000, 0x00600000, 0x2bb },
-    { 0x00000001, 0x40330620, 0x000 },
-    { 0x00000000, 0xc0302409, 0x000 },
-    { 0x00003fff, 0x002f022f, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x000 },
-    { 0x00000000, 0x00600000, 0x2a3 },
-    { 0x00000000, 0x002f0221, 0x000 },
-    { 0x00000000, 0x0ae00000, 0x181 },
-    { 0x00000000, 0x00600000, 0x13a },
-    { 0x00000000, 0x00400000, 0x186 },
-    { 0x95000000, 0x00204411, 0x000 },
-    { 0x00000000, 0x002f0221, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x186 },
-    { 0x00000000, 0xc0204800, 0x000 },
-    { 0x00000001, 0x00530621, 0x182 },
-    { 0x92000000, 0x00204411, 0x000 },
-    { 0x00000000, 0xc0604800, 0x197 },
-    { 0x0001a1fd, 0x00204411, 0x000 },
-    { 0x00000011, 0x0020062d, 0x000 },
-    { 0x00000000, 0x0078042a, 0x2fb },
-    { 0x00000000, 0x00202809, 0x000 },
-    { 0x00003fff, 0x002f022f, 0x000 },
-    { 0x00000000, 0x0cc00000, 0x174 },
-    { 0x00000000, 0xc0400400, 0x001 },
-    { 0x00000210, 0x00600411, 0x315 },
-    { 0x00003fff, 0x002f022f, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x194 },
-    { 0x00000015, 0xc0203620, 0x000 },
-    { 0x00000016, 0xc0203620, 0x000 },
-    { 0x3f800000, 0x00200411, 0x000 },
-    { 0x46000000, 0x00600811, 0x1b2 },
-    { 0x00000000, 0x00800000, 0x000 },
-    { 0x0000a1fc, 0x00204411, 0x000 },
-    { 0x00003fff, 0x002f022f, 0x000 },
-    { 0x00000000, 0x0cc00000, 0x19b },
-    { 0x00000001, 0x00804811, 0x000 },
-    { 0x00000021, 0x00804811, 0x000 },
-    { 0x0000ffff, 0x40280e20, 0x000 },
-    { 0x00000010, 0xc0211220, 0x000 },
-    { 0x0000ffff, 0x40281620, 0x000 },
-    { 0x00000010, 0xc0811a20, 0x000 },
-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x00000006, 0x00204811, 0x000 },
-    { 0x00000008, 0x00221e30, 0x000 },
-    { 0x00000029, 0x00201a2d, 0x000 },
-    { 0x0000e000, 0x00204411, 0x000 },
-    { 0xfffbff09, 0x00204811, 0x000 },
-    { 0x0000000f, 0x0020222d, 0x000 },
-    { 0x00001fff, 0x00294a28, 0x000 },
-    { 0x00000006, 0x0020222d, 0x000 },
-    { 0x00000000, 0x002920e8, 0x000 },
-    { 0x00000000, 0x00204808, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x060a0200, 0x00294a26, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x00000100, 0x00201811, 0x000 },
-    { 0x00000008, 0x00621e28, 0x12f },
-    { 0x00000008, 0x00822228, 0x000 },
-    { 0x0002c000, 0x00204411, 0x000 },
-    { 0x00000015, 0x00600e2d, 0x1bd },
-    { 0x00000016, 0x00600e2d, 0x1bd },
-    { 0x0000c008, 0x00204411, 0x000 },
-    { 0x00000017, 0x00200e2d, 0x000 },
-    { 0x00000000, 0x14c00000, 0x1b9 },
-    { 0x00000000, 0x00200411, 0x000 },
-    { 0x00000000, 0x00204801, 0x000 },
-    { 0x39000000, 0x00204811, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x00000000, 0x00804802, 0x000 },
-    { 0x00000018, 0x00202e2d, 0x000 },
-    { 0x00000000, 0x003b0d63, 0x000 },
-    { 0x00000008, 0x00224a23, 0x000 },
-    { 0x00000010, 0x00224a23, 0x000 },
-    { 0x00000018, 0x00224a23, 0x000 },
-    { 0x00000000, 0x00804803, 0x000 },
-    { 0x00000000, 0x00600000, 0x00b },
-    { 0x00001000, 0x00600411, 0x315 },
-    { 0x00000000, 0x00200411, 0x000 },
-    { 0x00000000, 0x00600811, 0x1b2 },
-    { 0x00000007, 0x0021062f, 0x000 },
-    { 0x00000013, 0x00200a2d, 0x000 },
-    { 0x00000001, 0x00202c11, 0x000 },
-    { 0x0000ffff, 0x40282220, 0x000 },
-    { 0x0000000f, 0x00262228, 0x000 },
-    { 0x00000010, 0x40212620, 0x000 },
-    { 0x0000000f, 0x00262629, 0x000 },
-    { 0x00000000, 0x00202802, 0x000 },
-    { 0x00002256, 0x00204411, 0x000 },
-    { 0x0000001b, 0x00204811, 0x000 },
-    { 0x00000000, 0x002f0221, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x1e0 },
-    { 0x0000225c, 0x00204411, 0x000 },
-    { 0x00000081, 0x00204811, 0x000 },
-    { 0x0000a1fc, 0x00204411, 0x000 },
-    { 0x00000001, 0x00204811, 0x000 },
-    { 0x00000080, 0x00201c11, 0x000 },
-    { 0x00000000, 0x002f0227, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x1dc },
-    { 0x00000000, 0x00600000, 0x1e9 },
-    { 0x00000001, 0x00531e27, 0x1d8 },
-    { 0x00000001, 0x00202c11, 0x000 },
-    { 0x0000001f, 0x00280a22, 0x000 },
-    { 0x0000001f, 0x00282a2a, 0x000 },
-    { 0x00000001, 0x00530621, 0x1d1 },
-    { 0x0000225c, 0x00204411, 0x000 },
-    { 0x00000002, 0x00304a2f, 0x000 },
-    { 0x0000a1fc, 0x00204411, 0x000 },
-    { 0x00000001, 0x00204811, 0x000 },
-    { 0x00000001, 0x00301e2f, 0x000 },
-    { 0x00000000, 0x002f0227, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x000 },
-    { 0x00000000, 0x00600000, 0x1e9 },
-    { 0x00000001, 0x00531e27, 0x1e5 },
-    { 0x0000ffff, 0x40280e20, 0x000 },
-    { 0x0000000f, 0x00260e23, 0x000 },
-    { 0x00000010, 0xc0211220, 0x000 },
-    { 0x0000000f, 0x00261224, 0x000 },
-    { 0x00000000, 0x00201411, 0x000 },
-    { 0x00000000, 0x00601811, 0x2bb },
-    { 0x0001a1fd, 0x00204411, 0x000 },
-    { 0x00000000, 0x002f022b, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x1f8 },
-    { 0x00000010, 0x00221628, 0x000 },
-    { 0xffff0000, 0x00281625, 0x000 },
-    { 0x0000ffff, 0x00281a29, 0x000 },
-    { 0x00000000, 0x002948c5, 0x000 },
-    { 0x00000000, 0x0020480a, 0x000 },
-    { 0x00000000, 0x00202c11, 0x000 },
-    { 0x00000010, 0x00221623, 0x000 },
-    { 0xffff0000, 0x00281625, 0x000 },
-    { 0x0000ffff, 0x00281a24, 0x000 },
-    { 0x00000000, 0x002948c5, 0x000 },
-    { 0x00000000, 0x00731503, 0x205 },
-    { 0x00000000, 0x00201805, 0x000 },
-    { 0x00000000, 0x00731524, 0x205 },
-    { 0x00000000, 0x002d14c5, 0x000 },
-    { 0x00000000, 0x003008a2, 0x000 },
-    { 0x00000000, 0x00204802, 0x000 },
-    { 0x00000000, 0x00202802, 0x000 },
-    { 0x00000000, 0x00202003, 0x000 },
-    { 0x00000000, 0x00802404, 0x000 },
-    { 0x0000000f, 0x00210225, 0x000 },
-    { 0x00000000, 0x14c00000, 0x67b },
-    { 0x00000000, 0x002b1405, 0x000 },
-    { 0x00000001, 0x00901625, 0x000 },
-    { 0x00000000, 0x00600000, 0x00b },
-    { 0x00000000, 0x00600411, 0x315 },
-    { 0x00000000, 0x00200411, 0x000 },
-    { 0x00000000, 0x00600811, 0x1b2 },
-    { 0x00002256, 0x00204411, 0x000 },
-    { 0x0000001a, 0x00294a22, 0x000 },
-    { 0x00000000, 0xc0200000, 0x000 },
-    { 0x00003fff, 0x002f022f, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x000 },
-    { 0x00000000, 0xc0200400, 0x000 },
-    { 0x0000225c, 0x00204411, 0x000 },
-    { 0x00000003, 0x00384a21, 0x000 },
-    { 0x0000a1fc, 0x00204411, 0x000 },
-    { 0x00000001, 0x00204811, 0x000 },
-    { 0x0000ffff, 0x40281220, 0x000 },
-    { 0x00000010, 0xc0211a20, 0x000 },
-    { 0x0000ffff, 0x40280e20, 0x000 },
-    { 0x00000010, 0xc0211620, 0x000 },
-    { 0x00000000, 0x00741465, 0x2bb },
-    { 0x0001a1fd, 0x00604411, 0x2e0 },
-    { 0x00000001, 0x00330621, 0x000 },
-    { 0x00000000, 0x002f0221, 0x000 },
-    { 0x00000000, 0x0cc00000, 0x219 },
-    { 0x00003fff, 0x002f022f, 0x000 },
-    { 0x00000000, 0x0cc00000, 0x212 },
-    { 0x00000000, 0xc0400400, 0x001 },
-    { 0x00000000, 0x00600000, 0x638 },
-    { 0x00000000, 0x0040040f, 0x213 },
-    { 0x00000000, 0x00600000, 0x624 },
-    { 0x00000000, 0x00600000, 0x638 },
-    { 0x00000210, 0x00600411, 0x315 },
-    { 0x00000000, 0x00600000, 0x1a0 },
-    { 0x00000000, 0x00600000, 0x19c },
-    { 0x00000000, 0x00600000, 0x2bb },
-    { 0x00000000, 0x00600000, 0x2a3 },
-    { 0x93800000, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204808, 0x000 },
-    { 0x00000000, 0x002f022f, 0x000 },
-    { 0x00000000, 0x0ae00000, 0x232 },
-    { 0x00000000, 0x00600000, 0x13a },
-    { 0x00000000, 0x00400000, 0x236 },
-    { 0x95000000, 0x00204411, 0x000 },
-    { 0x00000000, 0x002f022f, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x236 },
-    { 0x00000000, 0xc0404800, 0x233 },
-    { 0x92000000, 0x00204411, 0x000 },
-    { 0x00000000, 0xc0204800, 0x000 },
-    { 0x00002256, 0x00204411, 0x000 },
-    { 0x00000016, 0x00204811, 0x000 },
-    { 0x0000225c, 0x00204411, 0x000 },
-    { 0x00000003, 0x00204811, 0x000 },
-    { 0x0000a1fc, 0x00204411, 0x000 },
-    { 0x00000001, 0x00204811, 0x000 },
-    { 0x0001a1fd, 0x00204411, 0x000 },
-    { 0x00000000, 0x00600411, 0x2fb },
-    { 0x00000000, 0xc0400400, 0x001 },
-    { 0x00000000, 0x00600000, 0x624 },
-    { 0x0000a00c, 0x00204411, 0x000 },
-    { 0x00000000, 0xc0204800, 0x000 },
-    { 0x00000000, 0xc0404800, 0x000 },
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-    { 0x00000001, 0x00204811, 0x000 },
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-    { 0x00000001, 0x00333e2f, 0x000 },
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-    { 0x92000000, 0x00204411, 0x000 },
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-    { 0x00000001, 0x00804811, 0x000 },
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-    { 0x00000001, 0x00220a21, 0x000 },
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-    { 0x00000001, 0x40304a20, 0x000 },
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-    { 0x81000000, 0x00204411, 0x000 },
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-    { 0x00000001, 0x00331a26, 0x000 },
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-    { 0x00000000, 0x0cc00000, 0x36c },
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-    { 0x81000000, 0x00204411, 0x000 },
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-    { 0x00000000, 0x14e00000, 0x3c4 },
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-    { 0x00000001, 0x00204811, 0x000 },
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-    { 0x00000018, 0x00204811, 0x000 },
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-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x00000001, 0x00204811, 0x000 },
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-    { 0x00000000, 0xc0204800, 0x000 },
-    { 0x00000000, 0xc0604800, 0x681 },
-    { 0x00000000, 0x00401c10, 0x56f },
-    { 0x00000000, 0xc0200000, 0x000 },
-    { 0x00000000, 0xc0400000, 0x000 },
-    { 0x00000000, 0x0ee00000, 0x571 },
-    { 0x00000000, 0x00600000, 0x5bc },
-    { 0x00000000, 0x002f0224, 0x000 },
-    { 0x00000000, 0x0cc00000, 0x582 },
-    { 0x0000a2b7, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204807, 0x000 },
-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x00000001, 0x00204811, 0x000 },
-    { 0x0004a2b6, 0x00604411, 0x67c },
-    { 0x0000001a, 0x00212230, 0x000 },
-    { 0x00000006, 0x00222630, 0x000 },
-    { 0x00042004, 0x00604411, 0x67c },
-    { 0x0000a2c4, 0x00204411, 0x000 },
-    { 0x00000000, 0x003048e9, 0x000 },
-    { 0x00000000, 0x00e00000, 0x580 },
-    { 0x0000a2d1, 0x00204411, 0x000 },
-    { 0x00000000, 0x00404808, 0x000 },
-    { 0x0000a2d1, 0x00204411, 0x000 },
-    { 0x00000001, 0x00504a28, 0x000 },
-    { 0x00000001, 0x002f0224, 0x000 },
-    { 0x00000000, 0x0cc00000, 0x593 },
-    { 0x0000a2bb, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204807, 0x000 },
-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x00000001, 0x00204811, 0x000 },
-    { 0x0004a2ba, 0x00604411, 0x67c },
-    { 0x0000001a, 0x00212230, 0x000 },
-    { 0x00000006, 0x00222630, 0x000 },
-    { 0x00042004, 0x00604411, 0x67c },
-    { 0x0000a2c5, 0x00204411, 0x000 },
-    { 0x00000000, 0x003048e9, 0x000 },
-    { 0x00000000, 0x00e00000, 0x591 },
-    { 0x0000a2d2, 0x00204411, 0x000 },
-    { 0x00000000, 0x00404808, 0x000 },
-    { 0x0000a2d2, 0x00204411, 0x000 },
-    { 0x00000001, 0x00504a28, 0x000 },
-    { 0x00000002, 0x002f0224, 0x000 },
-    { 0x00000000, 0x0cc00000, 0x5a4 },
-    { 0x0000a2bf, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204807, 0x000 },
-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x00000001, 0x00204811, 0x000 },
-    { 0x0004a2be, 0x00604411, 0x67c },
-    { 0x0000001a, 0x00212230, 0x000 },
-    { 0x00000006, 0x00222630, 0x000 },
-    { 0x00042004, 0x00604411, 0x67c },
-    { 0x0000a2c6, 0x00204411, 0x000 },
-    { 0x00000000, 0x003048e9, 0x000 },
-    { 0x00000000, 0x00e00000, 0x5a2 },
-    { 0x0000a2d3, 0x00204411, 0x000 },
-    { 0x00000000, 0x00404808, 0x000 },
-    { 0x0000a2d3, 0x00204411, 0x000 },
-    { 0x00000001, 0x00504a28, 0x000 },
-    { 0x0000a2c3, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204807, 0x000 },
-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x00000001, 0x00204811, 0x000 },
-    { 0x0004a2c2, 0x00604411, 0x67c },
-    { 0x0000001a, 0x00212230, 0x000 },
-    { 0x00000006, 0x00222630, 0x000 },
-    { 0x00042004, 0x00604411, 0x67c },
-    { 0x0000a2c7, 0x00204411, 0x000 },
-    { 0x00000000, 0x003048e9, 0x000 },
-    { 0x00000000, 0x00e00000, 0x5b1 },
-    { 0x0000a2d4, 0x00204411, 0x000 },
-    { 0x00000000, 0x00404808, 0x000 },
-    { 0x0000a2d4, 0x00204411, 0x000 },
-    { 0x00000001, 0x00504a28, 0x000 },
-    { 0x85000000, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204801, 0x000 },
-    { 0x0000304a, 0x00204411, 0x000 },
-    { 0x01000000, 0x00204811, 0x000 },
-    { 0x00000000, 0x00400000, 0x5b7 },
-    { 0xa4000000, 0xc0204411, 0x000 },
-    { 0x00000000, 0xc0404800, 0x000 },
-    { 0x00000000, 0xc0600000, 0x5bc },
-    { 0x00000000, 0xc0400400, 0x001 },
-    { 0x0000002c, 0x00203621, 0x000 },
-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x00000006, 0x00204811, 0x000 },
-    { 0x00000000, 0x002f0230, 0x000 },
-    { 0x00000000, 0x0cc00000, 0x5c3 },
-    { 0x00000000, 0x00200411, 0x000 },
-    { 0x00000030, 0x00403621, 0x5d6 },
-    { 0x00000030, 0x0020062d, 0x000 },
-    { 0x00007e00, 0x00280621, 0x000 },
-    { 0x00000000, 0x002f0221, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x5d6 },
-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x00000001, 0x00204811, 0x000 },
-    { 0x0004a092, 0x00604411, 0x67c },
-    { 0x00000031, 0x00203630, 0x000 },
-    { 0x0004a093, 0x00604411, 0x67c },
-    { 0x00000032, 0x00203630, 0x000 },
-    { 0x0004a2b6, 0x00604411, 0x67c },
-    { 0x00000033, 0x00203630, 0x000 },
-    { 0x0004a2ba, 0x00604411, 0x67c },
-    { 0x00000034, 0x00203630, 0x000 },
-    { 0x0004a2be, 0x00604411, 0x67c },
-    { 0x00000035, 0x00203630, 0x000 },
-    { 0x0004a2c2, 0x00604411, 0x67c },
-    { 0x00000036, 0x00203630, 0x000 },
-    { 0x00042004, 0x00604411, 0x67c },
-    { 0x0001a2a4, 0x00204411, 0x000 },
-    { 0x0000003f, 0x00204811, 0x000 },
-    { 0x0000003f, 0x00204811, 0x000 },
-    { 0x0000003f, 0x00204811, 0x000 },
-    { 0x0000003f, 0x00204811, 0x000 },
-    { 0x00000005, 0x00204811, 0x000 },
-    { 0x0000a1f4, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x88000000, 0x00204411, 0x000 },
-    { 0x00000001, 0x00204811, 0x000 },
-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x00000006, 0x00204811, 0x000 },
-    { 0x00000001, 0x002f0230, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x61f },
-    { 0x00000030, 0x0020062d, 0x000 },
-    { 0x00000000, 0x002f0221, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x61f },
-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x00000001, 0x00204811, 0x000 },
-    { 0x00007e00, 0x00280621, 0x000 },
-    { 0x00000000, 0x002f0221, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x5f8 },
-    { 0x0000a092, 0x00204411, 0x000 },
-    { 0x00000031, 0x00204a2d, 0x000 },
-    { 0x0000a093, 0x00204411, 0x000 },
-    { 0x00000032, 0x00204a2d, 0x000 },
-    { 0x0000a2b6, 0x00204411, 0x000 },
-    { 0x00000033, 0x00204a2d, 0x000 },
-    { 0x0000a2ba, 0x00204411, 0x000 },
-    { 0x00000034, 0x00204a2d, 0x000 },
-    { 0x0000a2be, 0x00204411, 0x000 },
-    { 0x00000035, 0x00204a2d, 0x000 },
-    { 0x0000a2c2, 0x00204411, 0x000 },
-    { 0x00000036, 0x00204a2d, 0x000 },
-    { 0x00000030, 0x0020062d, 0x000 },
-    { 0x000001ff, 0x00280621, 0x000 },
-    { 0x00000000, 0x002f0221, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x61e },
-    { 0x00000000, 0x00210221, 0x000 },
-    { 0x00000000, 0x14c00000, 0x601 },
-    { 0x0004a003, 0x00604411, 0x67c },
-    { 0x0000a003, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204810, 0x000 },
-    { 0x00000001, 0x00210621, 0x000 },
-    { 0x00000000, 0x14c00000, 0x606 },
-    { 0x0004a010, 0x00604411, 0x67c },
-    { 0x0000a010, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204810, 0x000 },
-    { 0x00000001, 0x00210621, 0x000 },
-    { 0x00000000, 0x002f0221, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x61e },
-    { 0x0004a011, 0x00604411, 0x67c },
-    { 0x0000a011, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204810, 0x000 },
-    { 0x0004a012, 0x00604411, 0x67c },
-    { 0x0000a012, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204810, 0x000 },
-    { 0x0004a013, 0x00604411, 0x67c },
-    { 0x0000a013, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204810, 0x000 },
-    { 0x0004a014, 0x00604411, 0x67c },
-    { 0x0000a014, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204810, 0x000 },
-    { 0x0004a015, 0x00604411, 0x67c },
-    { 0x0000a015, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204810, 0x000 },
-    { 0x0004a016, 0x00604411, 0x67c },
-    { 0x0000a016, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204810, 0x000 },
-    { 0x0004a017, 0x00604411, 0x67c },
-    { 0x0000a017, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204810, 0x000 },
-    { 0x00042004, 0x00604411, 0x67c },
-    { 0x0000002c, 0x0080062d, 0x000 },
-    { 0xff000000, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x00000001, 0x00204811, 0x000 },
-    { 0x00000002, 0x00804811, 0x000 },
-    { 0x00000000, 0x0ee00000, 0x630 },
-    { 0x00000030, 0x0020062d, 0x000 },
-    { 0x00000002, 0x00280621, 0x000 },
-    { 0x00000000, 0x002f0221, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x62e },
-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x00000001, 0x00204811, 0x000 },
-    { 0x00042004, 0x00604411, 0x67c },
-    { 0x00001000, 0x00200811, 0x000 },
-    { 0x0000002b, 0x00203622, 0x000 },
-    { 0x00000000, 0x00600000, 0x634 },
-    { 0x00000000, 0x00600000, 0x5bc },
-    { 0x98000000, 0x00204411, 0x000 },
-    { 0x00000000, 0x00804811, 0x000 },
-    { 0x00000000, 0xc0600000, 0x634 },
-    { 0x00000000, 0xc0400400, 0x001 },
-    { 0x0000a2a4, 0x00204411, 0x000 },
-    { 0x00000022, 0x00204811, 0x000 },
-    { 0x89000000, 0x00204411, 0x000 },
-    { 0x00000001, 0x00404811, 0x620 },
-    { 0x97000000, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x8a000000, 0x00204411, 0x000 },
-    { 0x00000000, 0x00404811, 0x620 },
-    { 0x00000000, 0x00600000, 0x64d },
-    { 0x0001a2a4, 0xc0204411, 0x000 },
-    { 0x00000016, 0x00604811, 0x36a },
-    { 0x00002010, 0x00204411, 0x000 },
-    { 0x00010000, 0x00204811, 0x000 },
-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x00000001, 0x00204811, 0x000 },
-    { 0x0000217c, 0x00204411, 0x000 },
-    { 0x09800000, 0x00204811, 0x000 },
-    { 0xffffffff, 0x00204811, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x00000000, 0x17000000, 0x000 },
-    { 0x0004217f, 0x00604411, 0x67c },
-    { 0x0000001f, 0x00210230, 0x000 },
-    { 0x00000000, 0x14c00000, 0x000 },
-    { 0x00000004, 0x00404c11, 0x647 },
-    { 0x00000000, 0x00400000, 0x000 },
-    { 0x00000017, 0x00201e2d, 0x000 },
-    { 0x00000004, 0x00291e27, 0x000 },
-    { 0x00000017, 0x00803627, 0x000 },
-    { 0x00000017, 0x00201e2d, 0x000 },
-    { 0xfffffffb, 0x00281e27, 0x000 },
-    { 0x00000017, 0x00803627, 0x000 },
-    { 0x00000017, 0x00201e2d, 0x000 },
-    { 0x00000008, 0x00291e27, 0x000 },
-    { 0x00000017, 0x00803627, 0x000 },
-    { 0x00000017, 0x00201e2d, 0x000 },
-    { 0xfffffff7, 0x00281e27, 0x000 },
-    { 0x00000017, 0x00803627, 0x000 },
-    { 0x0001a2a4, 0x00204411, 0x000 },
-    { 0x00000016, 0x00604811, 0x36a },
-    { 0x00002010, 0x00204411, 0x000 },
-    { 0x00010000, 0x00204811, 0x000 },
-    { 0x0000217c, 0x00204411, 0x000 },
-    { 0x01800000, 0x00204811, 0x000 },
-    { 0xffffffff, 0x00204811, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x00000000, 0x17000000, 0x000 },
-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x00000001, 0x00204811, 0x000 },
-    { 0x0004217f, 0x00604411, 0x67c },
-    { 0x0000001f, 0x00210230, 0x000 },
-    { 0x00000000, 0x14c00000, 0x67b },
-    { 0x00000010, 0x00404c11, 0x661 },
-    { 0x00000000, 0xc0200400, 0x000 },
-    { 0x00000000, 0x38c00000, 0x000 },
-    { 0x0000001d, 0x00200a2d, 0x000 },
-    { 0x0000001e, 0x00200e2d, 0x000 },
-    { 0x0000001f, 0x0020122d, 0x000 },
-    { 0x00000020, 0x0020162d, 0x000 },
-    { 0x00002169, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204804, 0x000 },
-    { 0x00000000, 0x00204805, 0x000 },
-    { 0x00000000, 0x00204801, 0x000 },
-    { 0xcafebabe, 0x00204811, 0x000 },
-    { 0x00000004, 0x00301224, 0x000 },
-    { 0x00000000, 0x002f0064, 0x000 },
-    { 0x00000000, 0x0cc00000, 0x67a },
-    { 0x00000003, 0x00281a22, 0x000 },
-    { 0x00000008, 0x00221222, 0x000 },
-    { 0xfffff000, 0x00281224, 0x000 },
-    { 0x00000000, 0x002910c4, 0x000 },
-    { 0x0000001f, 0x00403624, 0x000 },
-    { 0x00000000, 0x00800000, 0x000 },
-    { 0x00000000, 0x1ac00000, 0x67c },
-    { 0x9f000000, 0x00204411, 0x000 },
-    { 0xcafebabe, 0x00204811, 0x000 },
-    { 0x00000000, 0x1ae00000, 0x67f },
-    { 0x00000000, 0x00800000, 0x000 },
-    { 0x00000000, 0x1ac00000, 0x681 },
-    { 0x9e000000, 0x00204411, 0x000 },
-    { 0xcafebabe, 0x00204811, 0x000 },
-    { 0x00000000, 0x1ae00000, 0x684 },
-    { 0x00000000, 0x00800000, 0x000 },
-    { 0x00000000, 0x00600000, 0x00b },
-    { 0x00001000, 0x00600411, 0x315 },
-    { 0x00000000, 0x00200411, 0x000 },
-    { 0x00000000, 0x00600811, 0x1b2 },
-    { 0x0000225c, 0x00204411, 0x000 },
-    { 0x00000003, 0x00204811, 0x000 },
-    { 0x00002256, 0x00204411, 0x000 },
-    { 0x0000001b, 0x00204811, 0x000 },
-    { 0x0000a1fc, 0x00204411, 0x000 },
-    { 0x00000001, 0x00204811, 0x000 },
-    { 0x0001a1fd, 0xc0204411, 0x000 },
-    { 0x00000021, 0x00201e2d, 0x000 },
-    { 0x00000010, 0x00221e27, 0x000 },
-    { 0x00000024, 0x0020222d, 0x000 },
-    { 0x0000ffff, 0x00282228, 0x000 },
-    { 0x00000000, 0x00294907, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x00000022, 0x0020222d, 0x000 },
-    { 0x0000ffff, 0x00282228, 0x000 },
-    { 0x00000000, 0x00294907, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x00000023, 0x00201e2d, 0x000 },
-    { 0x00000010, 0x00221e27, 0x000 },
-    { 0x00000000, 0x00294907, 0x000 },
-    { 0x00000000, 0x00404811, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x00000000, 0x00000000, 0x000 },
-    { 0x014204f5, 0x05b30250, 0x000 },
-    { 0x01c30168, 0x043505b3, 0x000 },
-    { 0x02250209, 0x02500151, 0x000 },
-    { 0x02230245, 0x02a00241, 0x000 },
-    { 0x03cd05b3, 0x05b305b3, 0x000 },
-    { 0x063c063d, 0x031f05b3, 0x000 },
-    { 0x05b305b8, 0x03200340, 0x000 },
-    { 0x032a0282, 0x03420334, 0x000 },
-    { 0x05b305b3, 0x05b305b3, 0x000 },
-    { 0x05b30544, 0x05b305b3, 0x000 },
-    { 0x03b205b3, 0x04ae0344, 0x000 },
-    { 0x048d0443, 0x043305b3, 0x000 },
-    { 0x04c305b3, 0x043704d0, 0x000 },
-    { 0x044304fa, 0x03510371, 0x000 },
-    { 0x05b305b3, 0x05b305b3, 0x000 },
-    { 0x05b305b3, 0x05b305b3, 0x000 },
-    { 0x05b305b3, 0x063205ba, 0x000 },
-    { 0x05b305b3, 0x000705b3, 0x000 },
-    { 0x05b305b3, 0x05b305b3, 0x000 },
-    { 0x05b305b3, 0x05b305b3, 0x000 },
-    { 0x03ee03e3, 0x03fe03fc, 0x000 },
-    { 0x04040400, 0x04020406, 0x000 },
-    { 0x0412040e, 0x041a0416, 0x000 },
-    { 0x0422041e, 0x042a0426, 0x000 },
-    { 0x05b305b3, 0x042e05b3, 0x000 },
-    { 0x05b305b3, 0x05b305b3, 0x000 },
-    { 0x05b305b3, 0x05b305b3, 0x000 },
-    { 0x00020668, 0x06860006, 0x000 },
-};
-static const u32 RV670_pfp_microcode[] = {
-0xca0400,
-0xa00000,
-0x7e828b,
-0x7c038b,
-0x8001b8,
-0x7c038b,
-0xd4401e,
-0xee001e,
-0xca0400,
-0xa00000,
-0x7e828b,
-0xc41838,
-0xca2400,
-0xca2800,
-0x9581a8,
-0xc41c3a,
-0xc3c000,
-0xca0800,
-0xca0c00,
-0x7c744b,
-0xc20005,
-0x99c000,
-0xc41c3a,
-0x7c744c,
-0xc0fff0,
-0x042c04,
-0x309002,
-0x7d2500,
-0x351402,
-0x7d350b,
-0x255403,
-0x7cd580,
-0x259c03,
-0x95c004,
-0xd5001b,
-0x7eddc1,
-0x7d9d80,
-0xd6801b,
-0xd5801b,
-0xd4401e,
-0xd5401e,
-0xd6401e,
-0xd6801e,
-0xd4801e,
-0xd4c01e,
-0x9783d3,
-0xd5c01e,
-0xca0800,
-0x80001a,
-0xca0c00,
-0xe4011e,
-0xd4001e,
-0x80000c,
-0xc41838,
-0xe4013e,
-0xd4001e,
-0x80000c,
-0xc41838,
-0xd4401e,
-0xee001e,
-0xca0400,
-0xa00000,
-0x7e828b,
-0xe4011e,
-0xd4001e,
-0xd4401e,
-0xee001e,
-0xca0400,
-0xa00000,
-0x7e828b,
-0xe4013e,
-0xd4001e,
-0xd4401e,
-0xee001e,
-0xca0400,
-0xa00000,
-0x7e828b,
-0xca1800,
-0xd4401e,
-0xd5801e,
-0x800053,
-0xd40075,
-0xd4401e,
-0xca0800,
-0xca0c00,
-0xca1000,
-0xd48019,
-0xd4c018,
-0xd50017,
-0xd4801e,
-0xd4c01e,
-0xd5001e,
-0xe2001e,
-0xca0400,
-0xa00000,
-0x7e828b,
-0xca0800,
-0xd48060,
-0xd4401e,
-0x800000,
-0xd4801e,
-0xca0800,
-0xd48061,
-0xd4401e,
-0x800000,
-0xd4801e,
-0xca0800,
-0xca0c00,
-0xd4401e,
-0xd48016,
-0xd4c016,
-0xd4801e,
-0x8001b8,
-0xd4c01e,
-0xc60843,
-0xca0c00,
-0xca1000,
-0x948004,
-0xca1400,
-0xe420f3,
-0xd42013,
-0xd56065,
-0xd4e01c,
-0xd5201c,
-0xd5601c,
-0x800000,
-0x062001,
-0xc60843,
-0xca0c00,
-0xca1000,
-0x9483f7,
-0xca1400,
-0xe420f3,
-0x800079,
-0xd42013,
-0xc60843,
-0xca0c00,
-0xca1000,
-0x9883ef,
-0xca1400,
-0xd40064,
-0x80008d,
-0x000000,
-0xc41432,
-0xc61843,
-0xc4082f,
-0x954005,
-0xc40c30,
-0xd4401e,
-0x800000,
-0xee001e,
-0x9583f5,
-0xc41031,
-0xd44033,
-0xd52065,
-0xd4a01c,
-0xd4e01c,
-0xd5201c,
-0xe4015e,
-0xd4001e,
-0x800000,
-0x062001,
-0xca1800,
-0x0a2001,
-0xd60076,
-0xc40836,
-0x988007,
-0xc61045,
-0x950110,
-0xd4001f,
-0xd46062,
-0x800000,
-0xd42062,
-0xcc3835,
-0xcc1433,
-0x8401bb,
-0xd40072,
-0xd5401e,
-0x800000,
-0xee001e,
-0xe2001a,
-0x8401bb,
-0xe2001a,
-0xcc104b,
-0xcc0447,
-0x2c9401,
-0x7d098b,
-0x984005,
-0x7d15cb,
-0xd4001a,
-0x8001b8,
-0xd4006d,
-0x344401,
-0xcc0c48,
-0x98403a,
-0xcc2c4a,
-0x958004,
-0xcc0449,
-0x8001b8,
-0xd4001a,
-0xd4c01a,
-0x282801,
-0x8400f0,
-0xcc1003,
-0x98801b,
-0x04380c,
-0x8400f0,
-0xcc1003,
-0x988017,
-0x043808,
-0x8400f0,
-0xcc1003,
-0x988013,
-0x043804,
-0x8400f0,
-0xcc1003,
-0x988014,
-0xcc104c,
-0x9a8009,
-0xcc144d,
-0x9840dc,
-0xd4006d,
-0xcc1848,
-0xd5001a,
-0xd5401a,
-0x8000c9,
-0xd5801a,
-0x96c0d5,
-0xd4006d,
-0x8001b8,
-0xd4006e,
-0x9ac003,
-0xd4006d,
-0xd4006e,
-0x800000,
-0xec007f,
-0x9ac0cc,
-0xd4006d,
-0x8001b8,
-0xd4006e,
-0xcc1403,
-0xcc1803,
-0xcc1c03,
-0x7d9103,
-0x7dd583,
-0x7d190c,
-0x35cc1f,
-0x35701f,
-0x7cf0cb,
-0x7cd08b,
-0x880000,
-0x7e8e8b,
-0x95c004,
-0xd4006e,
-0x8001b8,
-0xd4001a,
-0xd4c01a,
-0xcc0803,
-0xcc0c03,
-0xcc1003,
-0xcc1403,
-0xcc1803,
-0xcc1c03,
-0xcc2403,
-0xcc2803,
-0x35c41f,
-0x36b01f,
-0x7c704b,
-0x34f01f,
-0x7c704b,
-0x35701f,
-0x7c704b,
-0x7d8881,
-0x7dccc1,
-0x7e5101,
-0x7e9541,
-0x7c9082,
-0x7cd4c2,
-0x7c848b,
-0x9ac003,
-0x7c8c8b,
-0x2c8801,
-0x98809e,
-0xd4006d,
-0x98409c,
-0xd4006e,
-0xcc084c,
-0xcc0c4d,
-0xcc1048,
-0xd4801a,
-0xd4c01a,
-0x800101,
-0xd5001a,
-0xcc0832,
-0xd40032,
-0x9482d9,
-0xca0c00,
-0xd4401e,
-0x800000,
-0xd4001e,
-0xe4011e,
-0xd4001e,
-0xca0800,
-0xca0c00,
-0xca1000,
-0xd4401e,
-0xca1400,
-0xd4801e,
-0xd4c01e,
-0xd5001e,
-0xd5401e,
-0xd54034,
-0x800000,
-0xee001e,
-0x280404,
-0xe2001a,
-0xe2001a,
-0xd4401a,
-0xca3800,
-0xcc0803,
-0xcc0c03,
-0xcc0c03,
-0xcc0c03,
-0x9882bd,
-0x000000,
-0x8401bb,
-0xd7a06f,
-0x800000,
-0xee001f,
-0xca0400,
-0xc2ff00,
-0xcc0834,
-0xc13fff,
-0x7c74cb,
-0x7cc90b,
-0x7d010f,
-0x9902b0,
-0x7c738b,
-0x8401bb,
-0xd7a06f,
-0x800000,
-0xee001f,
-0xca0800,
-0x281900,
-0x7d898b,
-0x958014,
-0x281404,
-0xca0c00,
-0xca1000,
-0xca1c00,
-0xca2400,
-0xe2001f,
-0xd4c01a,
-0xd5001a,
-0xd5401a,
-0xcc1803,
-0xcc2c03,
-0xcc2c03,
-0xcc2c03,
-0x7da58b,
-0x7d9c47,
-0x984297,
-0x000000,
-0x800161,
-0xd4c01a,
-0xd4401e,
-0xd4801e,
-0x800000,
-0xee001e,
-0xe4011e,
-0xd4001e,
-0xd4401e,
-0xee001e,
-0xca0400,
-0xa00000,
-0x7e828b,
-0xe4013e,
-0xd4001e,
-0xd4401e,
-0xee001e,
-0xca0400,
-0xa00000,
-0x7e828b,
-0xca0800,
-0x248c06,
-0x0ccc06,
-0x98c006,
-0xcc104e,
-0x990004,
-0xd40073,
-0xe4011e,
-0xd4001e,
-0xd4401e,
-0xd4801e,
-0x800000,
-0xee001e,
-0xca0800,
-0xca0c00,
-0x34d018,
-0x251001,
-0x950021,
-0xc17fff,
-0xca1000,
-0xca1400,
-0xca1800,
-0xd4801d,
-0xd4c01d,
-0x7db18b,
-0xc14202,
-0xc2c001,
-0xd5801d,
-0x34dc0e,
-0x7d5d4c,
-0x7f734c,
-0xd7401e,
-0xd5001e,
-0xd5401e,
-0xc14200,
-0xc2c000,
-0x099c01,
-0x31dc10,
-0x7f5f4c,
-0x7f734c,
-0x042802,
-0x7d8380,
-0xd5a86f,
-0xd58066,
-0xd7401e,
-0xec005e,
-0xc82402,
-0xc82402,
-0x8001b8,
-0xd60076,
-0xd4401e,
-0xd4801e,
-0xd4c01e,
-0x800000,
-0xee001e,
-0x800000,
-0xee001f,
-0xd4001f,
-0x800000,
-0xd4001f,
-0xd4001f,
-0x880000,
-0xd4001f,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x010171,
-0x020178,
-0x03008f,
-0x04007f,
-0x050003,
-0x06003f,
-0x070032,
-0x08012c,
-0x090046,
-0x0a0036,
-0x1001b6,
-0x1700a2,
-0x22013a,
-0x230149,
-0x2000b4,
-0x240125,
-0x27004d,
-0x28006a,
-0x2a0060,
-0x2b0052,
-0x2f0065,
-0x320087,
-0x34017f,
-0x3c0156,
-0x3f0072,
-0x41018c,
-0x44012e,
-0x550173,
-0x56017a,
-0x60000b,
-0x610034,
-0x620038,
-0x630038,
-0x640038,
-0x650038,
-0x660038,
-0x670038,
-0x68003a,
-0x690041,
-0x6a0048,
-0x6b0048,
-0x6c0048,
-0x6d0048,
-0x6e0048,
-0x6f0048,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-};
-static const u32 RS780_cp_microcode[][3] = {
-    { 0x00000000, 0xc0200400, 0x000 },
-    { 0x00000000, 0x00a0000a, 0x000 },
-    { 0x0000ffff, 0x00284621, 0x000 },
-    { 0x00000000, 0xd9004800, 0x000 },
-    { 0x00000000, 0xc0200400, 0x000 },
-    { 0x00000000, 0x00a0000a, 0x000 },
-    { 0x00000000, 0x00e00000, 0x000 },
-    { 0x00010000, 0xc0294620, 0x000 },
-    { 0x00000000, 0xd9004800, 0x000 },
-    { 0x00000000, 0xc0200400, 0x000 },
-    { 0x00000000, 0x00a0000a, 0x000 },
-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x00000001, 0x00204811, 0x000 },
-    { 0x00042004, 0x00604411, 0x622 },
-    { 0x00000000, 0x00600000, 0x5d1 },
-    { 0x00000000, 0x00600000, 0x5de },
-    { 0x00000000, 0xc0200800, 0x000 },
-    { 0x00000f00, 0x00281622, 0x000 },
-    { 0x00000008, 0x00211625, 0x000 },
-    { 0x00000018, 0x00203625, 0x000 },
-    { 0x8d000000, 0x00204411, 0x000 },
-    { 0x00000004, 0x002f0225, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x018 },
-    { 0x00412000, 0x00404811, 0x019 },
-    { 0x00422000, 0x00204811, 0x000 },
-    { 0x8e000000, 0x00204411, 0x000 },
-    { 0x00000028, 0x00204a2d, 0x000 },
-    { 0x90000000, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204805, 0x000 },
-    { 0x0000000c, 0x00211622, 0x000 },
-    { 0x00000003, 0x00281625, 0x000 },
-    { 0x00000019, 0x00211a22, 0x000 },
-    { 0x00000004, 0x00281a26, 0x000 },
-    { 0x00000000, 0x002914c5, 0x000 },
-    { 0x00000019, 0x00203625, 0x000 },
-    { 0x00000000, 0x003a1402, 0x000 },
-    { 0x00000016, 0x00211625, 0x000 },
-    { 0x00000003, 0x00281625, 0x000 },
-    { 0x00000017, 0x00200e2d, 0x000 },
-    { 0xfffffffc, 0x00280e23, 0x000 },
-    { 0x00000000, 0x002914a3, 0x000 },
-    { 0x00000017, 0x00203625, 0x000 },
-    { 0x00008000, 0x00280e22, 0x000 },
-    { 0x00000007, 0x00220e23, 0x000 },
-    { 0x00000000, 0x0029386e, 0x000 },
-    { 0x20000000, 0x00280e22, 0x000 },
-    { 0x00000006, 0x00210e23, 0x000 },
-    { 0x00000000, 0x0029386e, 0x000 },
-    { 0x00000000, 0x00220222, 0x000 },
-    { 0x00000000, 0x14e00000, 0x038 },
-    { 0x00000000, 0x2ee00000, 0x035 },
-    { 0x00000000, 0x2ce00000, 0x037 },
-    { 0x00000000, 0x00400e2d, 0x039 },
-    { 0x00000008, 0x00200e2d, 0x000 },
-    { 0x00000009, 0x0040122d, 0x046 },
-    { 0x00000001, 0x00400e2d, 0x039 },
-    { 0x00000000, 0xc0200c00, 0x000 },
-    { 0x003ffffc, 0x00281223, 0x000 },
-    { 0x00000002, 0x00221224, 0x000 },
-    { 0x0000001f, 0x00211e23, 0x000 },
-    { 0x00000000, 0x14e00000, 0x03e },
-    { 0x00000008, 0x00401c11, 0x041 },
-    { 0x0000000d, 0x00201e2d, 0x000 },
-    { 0x0000000f, 0x00281e27, 0x000 },
-    { 0x00000003, 0x00221e27, 0x000 },
-    { 0x7fc00000, 0x00281a23, 0x000 },
-    { 0x00000014, 0x00211a26, 0x000 },
-    { 0x00000001, 0x00331a26, 0x000 },
-    { 0x00000008, 0x00221a26, 0x000 },
-    { 0x00000000, 0x00290cc7, 0x000 },
-    { 0x00000027, 0x00203624, 0x000 },
-    { 0x00007f00, 0x00281221, 0x000 },
-    { 0x00001400, 0x002f0224, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x04b },
-    { 0x00000001, 0x00290e23, 0x000 },
-    { 0x0000000e, 0x00203623, 0x000 },
-    { 0x0000e000, 0x00204411, 0x000 },
-    { 0xfff80000, 0x00294a23, 0x000 },
-    { 0x00000000, 0x003a2c02, 0x000 },
-    { 0x00000002, 0x00220e2b, 0x000 },
-    { 0xfc000000, 0x00280e23, 0x000 },
-    { 0x0000000f, 0x00203623, 0x000 },
-    { 0x00001fff, 0x00294a23, 0x000 },
-    { 0x00000027, 0x00204a2d, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x00000029, 0x00200e2d, 0x000 },
-    { 0x060a0200, 0x00294a23, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x00000001, 0x00210222, 0x000 },
-    { 0x00000000, 0x14e00000, 0x061 },
-    { 0x00000000, 0x2ee00000, 0x05f },
-    { 0x00000000, 0x2ce00000, 0x05e },
-    { 0x00000000, 0x00400e2d, 0x062 },
-    { 0x00000001, 0x00400e2d, 0x062 },
-    { 0x0000000a, 0x00200e2d, 0x000 },
-    { 0x0000000b, 0x0040122d, 0x06a },
-    { 0x00000000, 0xc0200c00, 0x000 },
-    { 0x003ffffc, 0x00281223, 0x000 },
-    { 0x00000002, 0x00221224, 0x000 },
-    { 0x7fc00000, 0x00281623, 0x000 },
-    { 0x00000014, 0x00211625, 0x000 },
-    { 0x00000001, 0x00331625, 0x000 },
-    { 0x80000000, 0x00280e23, 0x000 },
-    { 0x00000000, 0x00290ca3, 0x000 },
-    { 0x3ffffc00, 0x00290e23, 0x000 },
-    { 0x0000001f, 0x00211e23, 0x000 },
-    { 0x00000000, 0x14e00000, 0x06d },
-    { 0x00000100, 0x00401c11, 0x070 },
-    { 0x0000000d, 0x00201e2d, 0x000 },
-    { 0x000000f0, 0x00281e27, 0x000 },
-    { 0x00000004, 0x00221e27, 0x000 },
-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x0000000d, 0x00204811, 0x000 },
-    { 0xfffff0ff, 0x00281a30, 0x000 },
-    { 0x0000a028, 0x00204411, 0x000 },
-    { 0x00000000, 0x002948e6, 0x000 },
-    { 0x0000a018, 0x00204411, 0x000 },
-    { 0x3fffffff, 0x00284a23, 0x000 },
-    { 0x0000a010, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204804, 0x000 },
-    { 0x00000030, 0x0020162d, 0x000 },
-    { 0x00000002, 0x00291625, 0x000 },
-    { 0x00000030, 0x00203625, 0x000 },
-    { 0x00000025, 0x0020162d, 0x000 },
-    { 0x00000000, 0x002f00a3, 0x000 },
-    { 0x00000000, 0x0cc00000, 0x083 },
-    { 0x00000026, 0x0020162d, 0x000 },
-    { 0x00000000, 0x002f00a4, 0x000 },
-    { 0x00000000, 0x0cc00000, 0x084 },
-    { 0x00000000, 0x00400000, 0x08a },
-    { 0x00000025, 0x00203623, 0x000 },
-    { 0x00000026, 0x00203624, 0x000 },
-    { 0x00000017, 0x00201e2d, 0x000 },
-    { 0x00000002, 0x00210227, 0x000 },
-    { 0x00000000, 0x14e00000, 0x08a },
-    { 0x00000000, 0x00600000, 0x5ff },
-    { 0x00000000, 0x00600000, 0x5f3 },
-    { 0x00000002, 0x00210e22, 0x000 },
-    { 0x00000000, 0x14c00000, 0x08d },
-    { 0x00000012, 0xc0403620, 0x093 },
-    { 0x00000000, 0x2ee00000, 0x091 },
-    { 0x00000000, 0x2ce00000, 0x090 },
-    { 0x00000002, 0x00400e2d, 0x092 },
-    { 0x00000003, 0x00400e2d, 0x092 },
-    { 0x0000000c, 0x00200e2d, 0x000 },
-    { 0x00000012, 0x00203623, 0x000 },
-    { 0x00000003, 0x00210e22, 0x000 },
-    { 0x00000000, 0x14c00000, 0x098 },
-    { 0x0000a00c, 0x00204411, 0x000 },
-    { 0x00000000, 0xc0204800, 0x000 },
-    { 0x00000000, 0xc0404800, 0x0a0 },
-    { 0x0000a00c, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x00000000, 0x2ee00000, 0x09e },
-    { 0x00000000, 0x2ce00000, 0x09d },
-    { 0x00000002, 0x00400e2d, 0x09f },
-    { 0x00000003, 0x00400e2d, 0x09f },
-    { 0x0000000c, 0x00200e2d, 0x000 },
-    { 0x00000000, 0x00204803, 0x000 },
-    { 0x00000000, 0x003a0c02, 0x000 },
-    { 0x003f0000, 0x00280e23, 0x000 },
-    { 0x00000010, 0x00210e23, 0x000 },
-    { 0x00000011, 0x00203623, 0x000 },
-    { 0x0000001e, 0x0021022b, 0x000 },
-    { 0x00000000, 0x14c00000, 0x0a7 },
-    { 0x00000016, 0xc0203620, 0x000 },
-    { 0x0000001f, 0x0021022b, 0x000 },
-    { 0x00000000, 0x14c00000, 0x0aa },
-    { 0x00000015, 0xc0203620, 0x000 },
-    { 0x00000008, 0x00210e2b, 0x000 },
-    { 0x0000007f, 0x00280e23, 0x000 },
-    { 0x00000000, 0x002f0223, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x0e1 },
-    { 0x00000000, 0x27000000, 0x000 },
-    { 0x00000000, 0x00600000, 0x2a3 },
-    { 0x00000001, 0x002f0223, 0x000 },
-    { 0x00000000, 0x0ae00000, 0x0b3 },
-    { 0x00000000, 0x00600000, 0x13a },
-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x00000006, 0x00204811, 0x000 },
-    { 0x0000000c, 0x00221e30, 0x000 },
-    { 0x99800000, 0x00204411, 0x000 },
-    { 0x00000004, 0x0020122d, 0x000 },
-    { 0x00000008, 0x00221224, 0x000 },
-    { 0x00000010, 0x00201811, 0x000 },
-    { 0x00000000, 0x00291ce4, 0x000 },
-    { 0x00000000, 0x00604807, 0x12f },
-    { 0x9b000000, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204802, 0x000 },
-    { 0x9c000000, 0x00204411, 0x000 },
-    { 0x00000000, 0x0033146f, 0x000 },
-    { 0x00000001, 0x00333e23, 0x000 },
-    { 0x00000000, 0xd9004800, 0x000 },
-    { 0x00000000, 0x00203c05, 0x000 },
-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x0000000e, 0x00204811, 0x000 },
-    { 0x00000000, 0x00201010, 0x000 },
-    { 0x0000e007, 0x00204411, 0x000 },
-    { 0x0000000f, 0x0021022b, 0x000 },
-    { 0x00000000, 0x14c00000, 0x0cb },
-    { 0x00f8ff08, 0x00204811, 0x000 },
-    { 0x98000000, 0x00404811, 0x0dc },
-    { 0x000000f0, 0x00280e22, 0x000 },
-    { 0x000000a0, 0x002f0223, 0x000 },
-    { 0x00000000, 0x0cc00000, 0x0da },
-    { 0x00000011, 0x00200e2d, 0x000 },
-    { 0x00000001, 0x002f0223, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x0d5 },
-    { 0x00000002, 0x002f0223, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x0d4 },
-    { 0x00003f00, 0x00400c11, 0x0d6 },
-    { 0x00001f00, 0x00400c11, 0x0d6 },
-    { 0x00000f00, 0x00200c11, 0x000 },
-    { 0x00380009, 0x00294a23, 0x000 },
-    { 0x3f000000, 0x00280e2b, 0x000 },
-    { 0x00000002, 0x00220e23, 0x000 },
-    { 0x00000007, 0x00494a23, 0x0dc },
-    { 0x00380f09, 0x00204811, 0x000 },
-    { 0x68000007, 0x00204811, 0x000 },
-    { 0x00000008, 0x00214a27, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x060a0200, 0x00294a24, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x0000a202, 0x00204411, 0x000 },
-    { 0x00ff0000, 0x00280e22, 0x000 },
-    { 0x00000080, 0x00294a23, 0x000 },
-    { 0x00000027, 0x00200e2d, 0x000 },
-    { 0x00000026, 0x0020122d, 0x000 },
-    { 0x00000000, 0x002f0083, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x0ea },
-    { 0x00000000, 0x00600000, 0x5f9 },
-    { 0x00000000, 0x00400000, 0x0eb },
-    { 0x00000000, 0x00600000, 0x5fc },
-    { 0x00000007, 0x0020222d, 0x000 },
-    { 0x00000005, 0x00220e22, 0x000 },
-    { 0x00100000, 0x00280e23, 0x000 },
-    { 0x00000000, 0x00292068, 0x000 },
-    { 0x00000000, 0x003a0c02, 0x000 },
-    { 0x000000ef, 0x00280e23, 0x000 },
-    { 0x00000000, 0x00292068, 0x000 },
-    { 0x00000017, 0x00200e2d, 0x000 },
-    { 0x00000003, 0x00210223, 0x000 },
-    { 0x00000000, 0x14e00000, 0x0f8 },
-    { 0x0000000b, 0x00210228, 0x000 },
-    { 0x00000000, 0x14c00000, 0x0f8 },
-    { 0x00000400, 0x00292228, 0x000 },
-    { 0x00000014, 0x00203628, 0x000 },
-    { 0x0000001c, 0x00210e22, 0x000 },
-    { 0x00000000, 0x14c00000, 0x0fd },
-    { 0x0000a30c, 0x00204411, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x0000001e, 0x00210e22, 0x000 },
-    { 0x00000000, 0x14c00000, 0x10b },
-    { 0x0000a30f, 0x00204411, 0x000 },
-    { 0x00000011, 0x00200e2d, 0x000 },
-    { 0x00000001, 0x002f0223, 0x000 },
-    { 0x00000000, 0x0cc00000, 0x104 },
-    { 0xffffffff, 0x00404811, 0x10b },
-    { 0x00000002, 0x002f0223, 0x000 },
-    { 0x00000000, 0x0cc00000, 0x107 },
-    { 0x0000ffff, 0x00404811, 0x10b },
-    { 0x00000004, 0x002f0223, 0x000 },
-    { 0x00000000, 0x0cc00000, 0x10a },
-    { 0x000000ff, 0x00404811, 0x10b },
-    { 0x00000001, 0x00204811, 0x000 },
-    { 0x0002c400, 0x00204411, 0x000 },
-    { 0x0000001f, 0x00210e22, 0x000 },
-    { 0x00000000, 0x14c00000, 0x112 },
-    { 0x00000010, 0x40210e20, 0x000 },
-    { 0x00000013, 0x00203623, 0x000 },
-    { 0x00000018, 0x40224a20, 0x000 },
-    { 0x00000010, 0xc0424a20, 0x114 },
-    { 0x00000000, 0x00200c11, 0x000 },
-    { 0x00000013, 0x00203623, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x0000000a, 0x00201011, 0x000 },
-    { 0x00000000, 0x002f0224, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x11b },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x00000001, 0x00531224, 0x117 },
-    { 0xffbfffff, 0x00283a2e, 0x000 },
-    { 0x0000001b, 0x00210222, 0x000 },
-    { 0x00000000, 0x14c00000, 0x12e },
-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x0000000d, 0x00204811, 0x000 },
-    { 0x00000018, 0x00220e30, 0x000 },
-    { 0xfc000000, 0x00280e23, 0x000 },
-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x0000000e, 0x00204811, 0x000 },
-    { 0x00000000, 0x00201010, 0x000 },
-    { 0x0000e00e, 0x00204411, 0x000 },
-    { 0x07f8ff08, 0x00204811, 0x000 },
-    { 0x00000000, 0x00294a23, 0x000 },
-    { 0x0000001c, 0x00201e2d, 0x000 },
-    { 0x00000008, 0x00214a27, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x060a0200, 0x00294a24, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x00000000, 0x00800000, 0x000 },
-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x00000001, 0x00204811, 0x000 },
-    { 0x0000217c, 0x00204411, 0x000 },
-    { 0x00800000, 0x00204811, 0x000 },
-    { 0x00000000, 0x00204806, 0x000 },
-    { 0x00000008, 0x00214a27, 0x000 },
-    { 0x00000000, 0x17000000, 0x000 },
-    { 0x0004217f, 0x00604411, 0x622 },
-    { 0x0000001f, 0x00210230, 0x000 },
-    { 0x00000000, 0x14c00000, 0x621 },
-    { 0x00000004, 0x00404c11, 0x135 },
-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x00000001, 0x00204811, 0x000 },
-    { 0x000021f8, 0x00204411, 0x000 },
-    { 0x0000001c, 0x00204811, 0x000 },
-    { 0x000421f9, 0x00604411, 0x622 },
-    { 0x00000011, 0x00210230, 0x000 },
-    { 0x00000000, 0x14e00000, 0x13c },
-    { 0x00000000, 0x00800000, 0x000 },
-    { 0x00000000, 0x00600000, 0x00b },
-    { 0x00000000, 0x00600411, 0x315 },
-    { 0x00000000, 0x00200411, 0x000 },
-    { 0x00000000, 0x00600811, 0x1b2 },
-    { 0x00000000, 0x00600000, 0x160 },
-    { 0x0000ffff, 0x40280e20, 0x000 },
-    { 0x00000010, 0xc0211220, 0x000 },
-    { 0x0000ffff, 0x40280620, 0x000 },
-    { 0x00000010, 0xc0210a20, 0x000 },
-    { 0x00000000, 0x00341461, 0x000 },
-    { 0x00000000, 0x00741882, 0x2bb },
-    { 0x0001a1fd, 0x00604411, 0x2e0 },
-    { 0x00003fff, 0x002f022f, 0x000 },
-    { 0x00000000, 0x0cc00000, 0x147 },
-    { 0x00000000, 0xc0400400, 0x001 },
-    { 0x00000000, 0x00600000, 0x00b },
-    { 0x00000000, 0x00600411, 0x315 },
-    { 0x00000000, 0x00200411, 0x000 },
-    { 0x00000000, 0x00600811, 0x1b2 },
-    { 0x00003fff, 0x002f022f, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x000 },
-    { 0x00000000, 0x00600000, 0x160 },
-    { 0x00000010, 0x40210e20, 0x000 },
-    { 0x0000ffff, 0xc0281220, 0x000 },
-    { 0x00000010, 0x40211620, 0x000 },
-    { 0x0000ffff, 0xc0681a20, 0x2bb },
-    { 0x0001a1fd, 0x00604411, 0x2e0 },
-    { 0x00003fff, 0x002f022f, 0x000 },
-    { 0x00000000, 0x0cc00000, 0x158 },
-    { 0x00000000, 0xc0400400, 0x001 },
-    { 0x0000225c, 0x00204411, 0x000 },
-    { 0x00000001, 0x00300a2f, 0x000 },
-    { 0x00000001, 0x00210a22, 0x000 },
-    { 0x00000003, 0x00384a22, 0x000 },
-    { 0x00002256, 0x00204411, 0x000 },
-    { 0x0000001a, 0x00204811, 0x000 },
-    { 0x0000a1fc, 0x00204411, 0x000 },
-    { 0x00000001, 0x00804811, 0x000 },
-    { 0x00000000, 0x00600000, 0x00b },
-    { 0x00000000, 0x00600000, 0x18f },
-    { 0x00000000, 0x00600000, 0x1a0 },
-    { 0x00003fff, 0x002f022f, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x000 },
-    { 0x00000000, 0x00202c08, 0x000 },
-    { 0x00000000, 0x00202411, 0x000 },
-    { 0x00000000, 0x00202811, 0x000 },
-    { 0x00002256, 0x00204411, 0x000 },
-    { 0x00000016, 0x00204811, 0x000 },
-    { 0x0000225c, 0x00204411, 0x000 },
-    { 0x00000003, 0x00204811, 0x000 },
-    { 0x93800000, 0x00204411, 0x000 },
-    { 0x00000002, 0x00221e29, 0x000 },
-    { 0x00000000, 0x007048eb, 0x19c },
-    { 0x00000000, 0x00600000, 0x2bb },
-    { 0x00000001, 0x40330620, 0x000 },
-    { 0x00000000, 0xc0302409, 0x000 },
-    { 0x00003fff, 0x002f022f, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x000 },
-    { 0x00000000, 0x00600000, 0x2a3 },
-    { 0x00000000, 0x002f0221, 0x000 },
-    { 0x00000000, 0x0ae00000, 0x181 },
-    { 0x00000000, 0x00600000, 0x13a },
-    { 0x00000000, 0x00400000, 0x186 },
-    { 0x95000000, 0x00204411, 0x000 },
-    { 0x00000000, 0x002f0221, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x186 },
-    { 0x00000000, 0xc0204800, 0x000 },
-    { 0x00000001, 0x00530621, 0x182 },
-    { 0x92000000, 0x00204411, 0x000 },
-    { 0x00000000, 0xc0604800, 0x197 },
-    { 0x0001a1fd, 0x00204411, 0x000 },
-    { 0x00000011, 0x0020062d, 0x000 },
-    { 0x00000000, 0x0078042a, 0x2fb },
-    { 0x00000000, 0x00202809, 0x000 },
-    { 0x00003fff, 0x002f022f, 0x000 },
-    { 0x00000000, 0x0cc00000, 0x174 },
-    { 0x00000000, 0xc0400400, 0x001 },
-    { 0x00000210, 0x00600411, 0x315 },
-    { 0x00003fff, 0x002f022f, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x194 },
-    { 0x00000015, 0xc0203620, 0x000 },
-    { 0x00000016, 0xc0203620, 0x000 },
-    { 0x3f800000, 0x00200411, 0x000 },
-    { 0x46000000, 0x00600811, 0x1b2 },
-    { 0x00000000, 0x00800000, 0x000 },
-    { 0x0000a1fc, 0x00204411, 0x000 },
-    { 0x00003fff, 0x002f022f, 0x000 },
-    { 0x00000000, 0x0cc00000, 0x19b },
-    { 0x00000001, 0x00804811, 0x000 },
-    { 0x00000021, 0x00804811, 0x000 },
-    { 0x0000ffff, 0x40280e20, 0x000 },
-    { 0x00000010, 0xc0211220, 0x000 },
-    { 0x0000ffff, 0x40281620, 0x000 },
-    { 0x00000010, 0xc0811a20, 0x000 },
-    { 0x81000000, 0x00204411, 0x000 },
-    { 0x00000006, 0x00204811, 0x000 },
-    { 0x00000008, 0x00221e30, 0x000 },
-    { 0x00000029, 0x00201a2d, 0x000 },
-    { 0x0000e000, 0x00204411, 0x000 },
-    { 0xfffbff09, 0x00204811, 0x000 },
-    { 0x0000000f, 0x0020222d, 0x000 },
-    { 0x00001fff, 0x00294a28, 0x000 },
-    { 0x00000006, 0x0020222d, 0x000 },
-    { 0x00000000, 0x002920e8, 0x000 },
-    { 0x00000000, 0x00204808, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x060a0200, 0x00294a26, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x00000100, 0x00201811, 0x000 },
-    { 0x00000008, 0x00621e28, 0x12f },
-    { 0x00000008, 0x00822228, 0x000 },
-    { 0x0002c000, 0x00204411, 0x000 },
-    { 0x00000015, 0x00600e2d, 0x1bd },
-    { 0x00000016, 0x00600e2d, 0x1bd },
-    { 0x0000c008, 0x00204411, 0x000 },
-    { 0x00000017, 0x00200e2d, 0x000 },
-    { 0x00000000, 0x14c00000, 0x1b9 },
-    { 0x00000000, 0x00200411, 0x000 },
-    { 0x00000000, 0x00204801, 0x000 },
-    { 0x39000000, 0x00204811, 0x000 },
-    { 0x00000000, 0x00204811, 0x000 },
-    { 0x00000000, 0x00804802, 0x000 },
-    { 0x00000018, 0x00202e2d, 0x000 },
-    { 0x00000000, 0x003b0d63, 0x000 },
-    { 0x00000008, 0x00224a23, 0x000 },
-    { 0x00000010, 0x00224a23, 0x000 },
-    { 0x00000018, 0x00224a23, 0x000 },
-    { 0x00000000, 0x00804803, 0x000 },
-    { 0x00000000, 0x00600000, 0x00b },
-    { 0x00001000, 0x00600411, 0x315 },
-    { 0x00000000, 0x00200411, 0x000 },
-    { 0x00000000, 0x00600811, 0x1b2 },
-    { 0x00000007, 0x0021062f, 0x000 },
-    { 0x00000013, 0x00200a2d, 0x000 },
-    { 0x00000001, 0x00202c11, 0x000 },
-    { 0x0000ffff, 0x40282220, 0x000 },
-    { 0x0000000f, 0x00262228, 0x000 },
-    { 0x00000010, 0x40212620, 0x000 },
-    { 0x0000000f, 0x00262629, 0x000 },
-    { 0x00000000, 0x00202802, 0x000 },
-    { 0x00002256, 0x00204411, 0x000 },
-    { 0x0000001b, 0x00204811, 0x000 },
-    { 0x00000000, 0x002f0221, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x1e0 },
-    { 0x0000225c, 0x00204411, 0x000 },
-    { 0x00000081, 0x00204811, 0x000 },
-    { 0x0000a1fc, 0x00204411, 0x000 },
-    { 0x00000001, 0x00204811, 0x000 },
-    { 0x00000080, 0x00201c11, 0x000 },
-    { 0x00000000, 0x002f0227, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x1dc },
-    { 0x00000000, 0x00600000, 0x1e9 },
-    { 0x00000001, 0x00531e27, 0x1d8 },
-    { 0x00000001, 0x00202c11, 0x000 },
-    { 0x0000001f, 0x00280a22, 0x000 },
-    { 0x0000001f, 0x00282a2a, 0x000 },
-    { 0x00000001, 0x00530621, 0x1d1 },
-    { 0x0000225c, 0x00204411, 0x000 },
-    { 0x00000002, 0x00304a2f, 0x000 },
-    { 0x0000a1fc, 0x00204411, 0x000 },
-    { 0x00000001, 0x00204811, 0x000 },
-    { 0x00000001, 0x00301e2f, 0x000 },
-    { 0x00000000, 0x002f0227, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x000 },
-    { 0x00000000, 0x00600000, 0x1e9 },
-    { 0x00000001, 0x00531e27, 0x1e5 },
-    { 0x0000ffff, 0x40280e20, 0x000 },
-    { 0x0000000f, 0x00260e23, 0x000 },
-    { 0x00000010, 0xc0211220, 0x000 },
-    { 0x0000000f, 0x00261224, 0x000 },
-    { 0x00000000, 0x00201411, 0x000 },
-    { 0x00000000, 0x00601811, 0x2bb },
-    { 0x0001a1fd, 0x00204411, 0x000 },
-    { 0x00000000, 0x002f022b, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x1f8 },
-    { 0x00000010, 0x00221628, 0x000 },
-    { 0xffff0000, 0x00281625, 0x000 },
-    { 0x0000ffff, 0x00281a29, 0x000 },
-    { 0x00000000, 0x002948c5, 0x000 },
-    { 0x00000000, 0x0020480a, 0x000 },
-    { 0x00000000, 0x00202c11, 0x000 },
-    { 0x00000010, 0x00221623, 0x000 },
-    { 0xffff0000, 0x00281625, 0x000 },
-    { 0x0000ffff, 0x00281a24, 0x000 },
-    { 0x00000000, 0x002948c5, 0x000 },
-    { 0x00000000, 0x00731503, 0x205 },
-    { 0x00000000, 0x00201805, 0x000 },
-    { 0x00000000, 0x00731524, 0x205 },
-    { 0x00000000, 0x002d14c5, 0x000 },
-    { 0x00000000, 0x003008a2, 0x000 },
-    { 0x00000000, 0x00204802, 0x000 },
-    { 0x00000000, 0x00202802, 0x000 },
-    { 0x00000000, 0x00202003, 0x000 },
-    { 0x00000000, 0x00802404, 0x000 },
-    { 0x0000000f, 0x00210225, 0x000 },
-    { 0x00000000, 0x14c00000, 0x621 },
-    { 0x00000000, 0x002b1405, 0x000 },
-    { 0x00000001, 0x00901625, 0x000 },
-    { 0x00000000, 0x00600000, 0x00b },
-    { 0x00000000, 0x00600411, 0x315 },
-    { 0x00000000, 0x00200411, 0x000 },
-    { 0x00000000, 0x00600811, 0x1b2 },
-    { 0x00002256, 0x00204411, 0x000 },
-    { 0x0000001a, 0x00294a22, 0x000 },
-    { 0x00000000, 0xc0200000, 0x000 },
-    { 0x00003fff, 0x002f022f, 0x000 },
-    { 0x00000000, 0x0ce00000, 0x000 },
-    { 0x00000000, 0xc0200400, 0x000 },
-    { 0x0000225c, 0x00204411, 0x000 },
-    { 0x00000003, 0x00384a21, 0x000 },
-    { 0x0000a1fc, 0x00204411, 0x000 },
-    { 0x00000001, 0x00204811, 0x000 },
-    { 0x0000ffff, 0x40281220, 0x000 },
-    { 0x00000010, 0xc0211a20, 0x000 },
-    { 0x0000ffff, 0x40280e20, 0x000 },
-    { 0x00000010, 0xc0211620, 0x000 },
-    { 0x00000000, 0x00741465, 0x2bb },
-    { 0x0001a1fd, 0x00604411, 0x2e0 },
-    { 0x00000001, 0x00330621, 0x000 },
-    { 0x00000000, 0x002f0221, 0x000 },
-    { 0x00000000, 0x0cc00000, 0x219 },
-    { 0x00003fff, 0x002f022f, 0x000 },
-    { 0x00000000, 0x0cc00000, 0x212 },
-    { 0x00000000, 0xc0400400, 0x001 },
-    { 0x00000000, 0x00600000, 0x5de },
-    { 0x00000000, 0x0040040f, 0x213 },
-    { 0x00000000, 0x00600000, 0x5d1 },
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-    { 0x00000001, 0x40280a20, 0x000 },
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-    { 0x00000001, 0x00204811, 0x000 },
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-    { 0x00000001, 0x00504a28, 0x000 },
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-    { 0x00000000, 0x0cc00000, 0x5ae },
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-    { 0x00000001, 0x00504a28, 0x000 },
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-    { 0x00000000, 0x00204807, 0x000 },
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-    { 0x00000000, 0x00404808, 0x000 },
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-    { 0x00000001, 0x00504a28, 0x000 },
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-    { 0x00000001, 0x00204811, 0x000 },
-    { 0xff000000, 0x00204411, 0x000 },
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-    { 0x00000001, 0x00204811, 0x000 },
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-    { 0x00000001, 0x00404811, 0x5cd },
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-    { 0x00000001, 0x00204811, 0x000 },
-    { 0x0000217c, 0x00204411, 0x000 },
-    { 0x09800000, 0x00204811, 0x000 },
-    { 0xffffffff, 0x00204811, 0x000 },
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-    { 0x05ba05ba, 0x000705ba, 0x000 },
-    { 0x05ba05ba, 0x05ba05ba, 0x000 },
-    { 0x05ba05ba, 0x05ba05ba, 0x000 },
-    { 0x03f803ed, 0x04080406, 0x000 },
-    { 0x040e040a, 0x040c0410, 0x000 },
-    { 0x041c0418, 0x04240420, 0x000 },
-    { 0x042c0428, 0x04340430, 0x000 },
-    { 0x05ba05ba, 0x043a0438, 0x000 },
-    { 0x05ba05ba, 0x05ba05ba, 0x000 },
-    { 0x05ba05ba, 0x05ba05ba, 0x000 },
-    { 0x0002060e, 0x062c0006, 0x000 },
-};
-static const u32 RS780_pfp_microcode[] = {
-0xca0400,
-0xa00000,
-0x7e828b,
-0x7c038b,
-0x8001db,
-0x7c038b,
-0xd4401e,
-0xee001e,
-0xca0400,
-0xa00000,
-0x7e828b,
-0xc41838,
-0xca2400,
-0xca2800,
-0x9581cb,
-0xc41c3a,
-0xc3c000,
-0xca0800,
-0xca0c00,
-0x7c744b,
-0xc20005,
-0x99c000,
-0xc41c3a,
-0x7c744c,
-0xc0ffe0,
-0x042c08,
-0x309002,
-0x7d2500,
-0x351402,
-0x7d350b,
-0x255407,
-0x7cd580,
-0x259c07,
-0x95c004,
-0xd5001b,
-0x7eddc1,
-0x7d9d80,
-0xd6801b,
-0xd5801b,
-0xd4401e,
-0xd5401e,
-0xd6401e,
-0xd6801e,
-0xd4801e,
-0xd4c01e,
-0x9783d3,
-0xd5c01e,
-0xca0800,
-0x80001a,
-0xca0c00,
-0xe4011e,
-0xd4001e,
-0x80000c,
-0xc41838,
-0xe4013e,
-0xd4001e,
-0x80000c,
-0xc41838,
-0xd4401e,
-0xee001e,
-0xca0400,
-0xa00000,
-0x7e828b,
-0xe4011e,
-0xd4001e,
-0xd4401e,
-0xee001e,
-0xca0400,
-0xa00000,
-0x7e828b,
-0xe4013e,
-0xd4001e,
-0xd4401e,
-0xee001e,
-0xca0400,
-0xa00000,
-0x7e828b,
-0xca0800,
-0xca0c00,
-0x8001db,
-0xd48024,
-0xca0800,
-0x7c00c0,
-0xc81425,
-0xc81824,
-0x7c9488,
-0x7c9880,
-0xc20003,
-0xd40075,
-0x7c744c,
-0x800064,
-0xd4401e,
-0xca1800,
-0xd4401e,
-0xd5801e,
-0x800062,
-0xd40075,
-0xd4401e,
-0xca0800,
-0xca0c00,
-0xca1000,
-0xd48019,
-0xd4c018,
-0xd50017,
-0xd4801e,
-0xd4c01e,
-0xd5001e,
-0xe2001e,
-0xca0400,
-0xa00000,
-0x7e828b,
-0xd40075,
-0xd4401e,
-0xca0800,
-0xca0c00,
-0xca1000,
-0xd48019,
-0xd4c018,
-0xd50017,
-0xd4801e,
-0xd4c01e,
-0xd5001e,
-0xee001e,
-0xca0400,
-0xa00000,
-0x7e828b,
-0xca0800,
-0x248c01,
-0xd48060,
-0x94c003,
-0x041001,
-0x041002,
-0xd50025,
-0xd4401e,
-0x800000,
-0xd4801e,
-0xca0800,
-0xd48061,
-0xd4401e,
-0x800000,
-0xd4801e,
-0xca0800,
-0xca0c00,
-0xd4401e,
-0xd48016,
-0xd4c016,
-0xd4801e,
-0x8001db,
-0xd4c01e,
-0xc60843,
-0xca0c00,
-0xca1000,
-0x948004,
-0xca1400,
-0xe420f3,
-0xd42013,
-0xd56065,
-0xd4e01c,
-0xd5201c,
-0xd5601c,
-0x800000,
-0x062001,
-0xc60843,
-0xca0c00,
-0xca1000,
-0x9483f7,
-0xca1400,
-0xe420f3,
-0x80009c,
-0xd42013,
-0xc60843,
-0xca0c00,
-0xca1000,
-0x9883ef,
-0xca1400,
-0xd40064,
-0x8000b0,
-0x000000,
-0xc41432,
-0xc61843,
-0xc4082f,
-0x954005,
-0xc40c30,
-0xd4401e,
-0x800000,
-0xee001e,
-0x9583f5,
-0xc41031,
-0xd44033,
-0xd52065,
-0xd4a01c,
-0xd4e01c,
-0xd5201c,
-0xe4015e,
-0xd4001e,
-0x800000,
-0x062001,
-0xca1800,
-0x0a2001,
-0xd60076,
-0xc40836,
-0x988007,
-0xc61045,
-0x950110,
-0xd4001f,
-0xd46062,
-0x800000,
-0xd42062,
-0xcc3835,
-0xcc1433,
-0x8401de,
-0xd40072,
-0xd5401e,
-0x800000,
-0xee001e,
-0xe2001a,
-0x8401de,
-0xe2001a,
-0xcc104b,
-0xcc0447,
-0x2c9401,
-0x7d098b,
-0x984005,
-0x7d15cb,
-0xd4001a,
-0x8001db,
-0xd4006d,
-0x344401,
-0xcc0c48,
-0x98403a,
-0xcc2c4a,
-0x958004,
-0xcc0449,
-0x8001db,
-0xd4001a,
-0xd4c01a,
-0x282801,
-0x840113,
-0xcc1003,
-0x98801b,
-0x04380c,
-0x840113,
-0xcc1003,
-0x988017,
-0x043808,
-0x840113,
-0xcc1003,
-0x988013,
-0x043804,
-0x840113,
-0xcc1003,
-0x988014,
-0xcc104c,
-0x9a8009,
-0xcc144d,
-0x9840dc,
-0xd4006d,
-0xcc1848,
-0xd5001a,
-0xd5401a,
-0x8000ec,
-0xd5801a,
-0x96c0d5,
-0xd4006d,
-0x8001db,
-0xd4006e,
-0x9ac003,
-0xd4006d,
-0xd4006e,
-0x800000,
-0xec007f,
-0x9ac0cc,
-0xd4006d,
-0x8001db,
-0xd4006e,
-0xcc1403,
-0xcc1803,
-0xcc1c03,
-0x7d9103,
-0x7dd583,
-0x7d190c,
-0x35cc1f,
-0x35701f,
-0x7cf0cb,
-0x7cd08b,
-0x880000,
-0x7e8e8b,
-0x95c004,
-0xd4006e,
-0x8001db,
-0xd4001a,
-0xd4c01a,
-0xcc0803,
-0xcc0c03,
-0xcc1003,
-0xcc1403,
-0xcc1803,
-0xcc1c03,
-0xcc2403,
-0xcc2803,
-0x35c41f,
-0x36b01f,
-0x7c704b,
-0x34f01f,
-0x7c704b,
-0x35701f,
-0x7c704b,
-0x7d8881,
-0x7dccc1,
-0x7e5101,
-0x7e9541,
-0x7c9082,
-0x7cd4c2,
-0x7c848b,
-0x9ac003,
-0x7c8c8b,
-0x2c8801,
-0x98809e,
-0xd4006d,
-0x98409c,
-0xd4006e,
-0xcc084c,
-0xcc0c4d,
-0xcc1048,
-0xd4801a,
-0xd4c01a,
-0x800124,
-0xd5001a,
-0xcc0832,
-0xd40032,
-0x9482b6,
-0xca0c00,
-0xd4401e,
-0x800000,
-0xd4001e,
-0xe4011e,
-0xd4001e,
-0xca0800,
-0xca0c00,
-0xca1000,
-0xd4401e,
-0xca1400,
-0xd4801e,
-0xd4c01e,
-0xd5001e,
-0xd5401e,
-0xd54034,
-0x800000,
-0xee001e,
-0x280404,
-0xe2001a,
-0xe2001a,
-0xd4401a,
-0xca3800,
-0xcc0803,
-0xcc0c03,
-0xcc0c03,
-0xcc0c03,
-0x98829a,
-0x000000,
-0x8401de,
-0xd7a06f,
-0x800000,
-0xee001f,
-0xca0400,
-0xc2ff00,
-0xcc0834,
-0xc13fff,
-0x7c74cb,
-0x7cc90b,
-0x7d010f,
-0x99028d,
-0x7c738b,
-0x8401de,
-0xd7a06f,
-0x800000,
-0xee001f,
-0xca0800,
-0x281900,
-0x7d898b,
-0x958014,
-0x281404,
-0xca0c00,
-0xca1000,
-0xca1c00,
-0xca2400,
-0xe2001f,
-0xd4c01a,
-0xd5001a,
-0xd5401a,
-0xcc1803,
-0xcc2c03,
-0xcc2c03,
-0xcc2c03,
-0x7da58b,
-0x7d9c47,
-0x984274,
-0x000000,
-0x800184,
-0xd4c01a,
-0xd4401e,
-0xd4801e,
-0x800000,
-0xee001e,
-0xe4011e,
-0xd4001e,
-0xd4401e,
-0xee001e,
-0xca0400,
-0xa00000,
-0x7e828b,
-0xe4013e,
-0xd4001e,
-0xd4401e,
-0xee001e,
-0xca0400,
-0xa00000,
-0x7e828b,
-0xca0800,
-0x248c06,
-0x0ccc06,
-0x98c006,
-0xcc104e,
-0x990004,
-0xd40073,
-0xe4011e,
-0xd4001e,
-0xd4401e,
-0xd4801e,
-0x800000,
-0xee001e,
-0xca0800,
-0xca0c00,
-0x34d018,
-0x251001,
-0x950021,
-0xc17fff,
-0xca1000,
-0xca1400,
-0xca1800,
-0xd4801d,
-0xd4c01d,
-0x7db18b,
-0xc14202,
-0xc2c001,
-0xd5801d,
-0x34dc0e,
-0x7d5d4c,
-0x7f734c,
-0xd7401e,
-0xd5001e,
-0xd5401e,
-0xc14200,
-0xc2c000,
-0x099c01,
-0x31dc10,
-0x7f5f4c,
-0x7f734c,
-0x042802,
-0x7d8380,
-0xd5a86f,
-0xd58066,
-0xd7401e,
-0xec005e,
-0xc82402,
-0xc82402,
-0x8001db,
-0xd60076,
-0xd4401e,
-0xd4801e,
-0xd4c01e,
-0x800000,
-0xee001e,
-0x800000,
-0xee001f,
-0xd4001f,
-0x800000,
-0xd4001f,
-0xd4001f,
-0x880000,
-0xd4001f,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x010194,
-0x02019b,
-0x0300b2,
-0x0400a2,
-0x050003,
-0x06003f,
-0x070032,
-0x08014f,
-0x090046,
-0x0a0036,
-0x1001d9,
-0x1700c5,
-0x22015d,
-0x23016c,
-0x2000d7,
-0x240148,
-0x26004d,
-0x27005c,
-0x28008d,
-0x290051,
-0x2a007e,
-0x2b0061,
-0x2f0088,
-0x3200aa,
-0x3401a2,
-0x36006f,
-0x3c0179,
-0x3f0095,
-0x4101af,
-0x440151,
-0x550196,
-0x56019d,
-0x60000b,
-0x610034,
-0x620038,
-0x630038,
-0x640038,
-0x650038,
-0x660038,
-0x670038,
-0x68003a,
-0x690041,
-0x6a0048,
-0x6b0048,
-0x6c0048,
-0x6d0048,
-0x6e0048,
-0x6f0048,
-0x7301d9,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-};
-static const u32 RV770_cp_microcode[] = {
-0xcc0003ea,
-0x7c408000,
-0xa0000000,
-0xcc800062,
-0x80000001,
-0xd040007f,
-0x80000001,
-0xcc400041,
-0x7c40c000,
-0xc0160004,
-0x30d03fff,
-0x7d15000c,
-0xcc110000,
-0x28d8001e,
-0x31980001,
-0x28dc001f,
-0xc8200004,
-0x95c00006,
-0x7c424000,
-0xcc000062,
-0x7e56800c,
-0xcc290000,
-0xc8240004,
-0x7e26000b,
-0x95800006,
-0x7c42c000,
-0xcc000062,
-0x7ed7000c,
-0xcc310000,
-0xc82c0004,
-0x7e2e000c,
-0xcc000062,
-0x31103fff,
-0x80000001,
-0xce110000,
-0x7c40c000,
-0x80000001,
-0xcc400040,
-0x80000001,
-0xcc412257,
-0x7c418000,
-0xcc400045,
-0xcc400048,
-0xcc41225c,
-0xcc41a1fc,
-0x7c408000,
-0xa0000000,
-0xcc800062,
-0xcc400045,
-0xcc400048,
-0x7c40c000,
-0xcc41225c,
-0xcc41a1fc,
-0x7c408000,
-0xa0000000,
-0xcc800062,
-0xcc000045,
-0xcc000048,
-0xcc41225c,
-0xcc41a1fc,
-0x7c408000,
-0xa0000000,
-0xcc800062,
-0x040ca1fd,
-0xc0120001,
-0xcc000045,
-0xcc000048,
-0x7cd0c00c,
-0xcc41225c,
-0xcc41a1fc,
-0xd04d0000,
-0x7c408000,
-0xa0000000,
-0xcc800062,
-0x80000001,
-0xcc41225d,
-0x7c408000,
-0x7c40c000,
-0xc02a0002,
-0x7c410000,
-0x7d29000c,
-0x30940001,
-0x30980006,
-0x309c0300,
-0x29dc0008,
-0x7c420000,
-0x7c424000,
-0x9540000f,
-0xc02e0004,
-0x05f02258,
-0x7f2f000c,
-0xcc310000,
-0xc8280004,
-0xccc12169,
-0xcd01216a,
-0xce81216b,
-0x0db40002,
-0xcc01216c,
-0x9740000e,
-0x0db40000,
-0x8000007b,
-0xc834000a,
-0x0db40002,
-0x97400009,
-0x0db40000,
-0xc02e0004,
-0x05f02258,
-0x7f2f000c,
-0xcc310000,
-0xc8280004,
-0x8000007b,
-0xc834000a,
-0x97400004,
-0x7e028000,
-0x8000007b,
-0xc834000a,
-0x0db40004,
-0x9740ff8c,
-0x00000000,
-0xce01216d,
-0xce41216e,
-0xc8280003,
-0xc834000a,
-0x9b400004,
-0x043c0005,
-0x8400026d,
-0xcc000062,
-0x0df40000,
-0x9740000b,
-0xc82c03e6,
-0xce81a2b7,
-0xc0300006,
-0x7ef34028,
-0xc0300020,
-0x7f6b8020,
-0x7fb3c029,
-0xcf81a2c4,
-0x80000001,
-0xcfc1a2d1,
-0x0df40001,
-0x9740000b,
-0xc82c03e7,
-0xce81a2bb,
-0xc0300006,
-0x7ef34028,
-0xc0300020,
-0x7f6b8020,
-0x7fb3c029,
-0xcf81a2c5,
-0x80000001,
-0xcfc1a2d2,
-0x0df40002,
-0x9740000b,
-0xc82c03e8,
-0xce81a2bf,
-0xc0300006,
-0x7ef34028,
-0xc0300020,
-0x7f6b8020,
-0x7fb3c029,
-0xcf81a2c6,
-0x80000001,
-0xcfc1a2d3,
-0xc82c03e9,
-0xce81a2c3,
-0xc0300006,
-0x7ef34028,
-0xc0300020,
-0x7f6b8020,
-0x7fb3c029,
-0xcf81a2c7,
-0x80000001,
-0xcfc1a2d4,
-0x80000001,
-0xcc400042,
-0x7c40c000,
-0x7c410000,
-0x2914001d,
-0x31540001,
-0x9940000d,
-0x31181000,
-0xc81c0011,
-0x09dc0001,
-0x95c0ffff,
-0xc81c0011,
-0xccc12100,
-0xcd012101,
-0xccc12102,
-0xcd012103,
-0x04180004,
-0x8000039f,
-0xcd81a2a4,
-0xc02a0004,
-0x95800008,
-0x36a821a3,
-0xcc290000,
-0xc8280004,
-0xc81c0011,
-0x0de40040,
-0x9640ffff,
-0xc81c0011,
-0xccc12170,
-0xcd012171,
-0xc8200012,
-0x96000000,
-0xc8200012,
-0x8000039f,
-0xcc000064,
-0x7c40c000,
-0x7c410000,
-0xcc000045,
-0xcc000048,
-0x40d40003,
-0xcd41225c,
-0xcd01a1fc,
-0xc01a0001,
-0x041ca1fd,
-0x7dd9c00c,
-0x7c420000,
-0x08cc0001,
-0x06240001,
-0x06280002,
-0xce1d0000,
-0xce5d0000,
-0x98c0fffa,
-0xce9d0000,
-0x7c408000,
-0xa0000000,
-0xcc800062,
-0x7c40c000,
-0x30d00001,
-0x28cc0001,
-0x7c414000,
-0x95000006,
-0x7c418000,
-0xcd41216d,
-0xcd81216e,
-0x800000f3,
-0xc81c0003,
-0xc0220004,
-0x7e16000c,
-0xcc210000,
-0xc81c0004,
-0x7c424000,
-0x98c00004,
-0x7c428000,
-0x80000001,
-0xcde50000,
-0xce412169,
-0xce81216a,
-0xcdc1216b,
-0x80000001,
-0xcc01216c,
-0x7c40c000,
-0x7c410000,
-0x7c414000,
-0x7c418000,
-0x7c41c000,
-0x28a40008,
-0x326400ff,
-0x0e68003c,
-0x9680000a,
-0x7c020000,
-0x7c420000,
-0x1e300003,
-0xcc00006a,
-0x9b000003,
-0x42200005,
-0x04200040,
-0x80000110,
-0x7c024000,
-0x7e024000,
-0x9a400000,
-0x0a640001,
-0x30ec0010,
-0x9ac0000a,
-0xcc000062,
-0xc02a0004,
-0xc82c0021,
-0x7e92800c,
-0xcc000041,
-0xcc290000,
-0xcec00021,
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-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00010333,
-0x00100004,
-0x00170006,
-0x00210008,
-0x00270028,
-0x00280023,
-0x00290029,
-0x002a0026,
-0x002b0029,
-0x002d0038,
-0x002e003f,
-0x002f004a,
-0x0034004c,
-0x00360030,
-0x003900af,
-0x003a00d0,
-0x003b00e5,
-0x003c00fd,
-0x003d016c,
-0x003f00ad,
-0x00410338,
-0x0043036c,
-0x0044018f,
-0x004500fd,
-0x004601ad,
-0x004701ad,
-0x00480200,
-0x0049020e,
-0x004a0257,
-0x004b0284,
-0x00520261,
-0x00530273,
-0x00540289,
-0x0057029b,
-0x0060029f,
-0x006102ae,
-0x006202b8,
-0x006302c2,
-0x006402cc,
-0x006502d6,
-0x006602e0,
-0x006702ea,
-0x006802f4,
-0x006902f8,
-0x006a02fc,
-0x006b0300,
-0x006c0304,
-0x006d0308,
-0x006e030c,
-0x006f0310,
-0x00700314,
-0x00720386,
-0x0074038c,
-0x0079038a,
-0x007c031e,
-0x000f039b,
-0x000f039b,
-0x000f039b,
-0x000f039b,
-0x000f039b,
-0x000f039b,
-0x000f039b,
-0x000f039b,
-0x000f039b,
-0x000f039b,
-0x000f039b,
-0x000f039b,
-0x000f039b,
-0x000f039b,
-0x000f039b,
-0x000f039b,
-0x000f039b,
-0x000f039b,
-0x000f039b,
-0x000f039b,
-0x000f039b,
-0x000f039b,
-0x000f039b,
-0x000f039b,
-0x000f039b,
-};
-static const u32 RV770_pfp_microcode[] = {
-0x7c408000,
-0xa0000000,
-0x7e82800b,
-0x80000000,
-0xdc030000,
-0xcc800040,
-0xd0400040,
-0x7c408000,
-0xa0000000,
-0x7e82800b,
-0xc818000e,
-0x31980001,
-0x7c424000,
-0x95800252,
-0x7c428000,
-0xc81c001c,
-0xc037c000,
-0x7c40c000,
-0x7c410000,
-0x7cb4800b,
-0xc0360003,
-0x99c00000,
-0xc81c001c,
-0x7cb4800c,
-0x24d40002,
-0x7d654000,
-0xcd400043,
-0xce800043,
-0xcd000043,
-0xcc800040,
-0xce400040,
-0xce800040,
-0xccc00040,
-0xdc3a0000,
-0x9780ffde,
-0xcd000040,
-0x7c40c000,
-0x80000018,
-0x7c410000,
-0xd4000340,
-0xd4000fc0,
-0xd4000fa2,
-0xc818000e,
-0x8000000c,
-0x31980002,
-0xd40003c0,
-0xd4000fc0,
-0xd4000fa2,
-0xc818000e,
-0x288c0008,
-0x30cc000f,
-0x34100001,
-0x7d0d0008,
-0x8000000c,
-0x7d91800b,
-0xcc800040,
-0xd0400040,
-0x7c408000,
-0xa0000000,
-0x7e82800b,
-0xd4000340,
-0xd4000fc0,
-0xd4000fa2,
-0xcc800040,
-0xd0400040,
-0x7c408000,
-0xa0000000,
-0x7e82800b,
-0xd40003c0,
-0xd4000fc0,
-0xd4000fa2,
-0xcc800040,
-0xd0400040,
-0x7c408000,
-0xa0000000,
-0x7e82800b,
-0xcc4003f9,
-0x80000261,
-0xcc4003f8,
-0xc82003f8,
-0xc81c03f9,
-0xc81803fb,
-0xc037ffff,
-0x7c414000,
-0xcf41a29e,
-0x66200020,
-0x7de1c02c,
-0x7d58c008,
-0x7cdcc020,
-0x68d00020,
-0xc0360003,
-0xcc000054,
-0x7cb4800c,
-0x8000006a,
-0xcc800040,
-0x7c418000,
-0xcd81a29e,
-0xcc800040,
-0xcd800040,
-0x80000068,
-0xcc000054,
-0xc019ffff,
-0xcc800040,
-0xcd81a29e,
-0x7c40c000,
-0x7c410000,
-0x7c414000,
-0xccc1a1fa,
-0xcd01a1f9,
-0xcd41a29d,
-0xccc00040,
-0xcd000040,
-0xcd400040,
-0xcc400040,
-0x7c408000,
-0xa0000000,
-0x7e82800b,
-0xcc000054,
-0xcc800040,
-0x7c40c000,
-0x7c410000,
-0x7c414000,
-0xccc1a1fa,
-0xcd01a1f9,
-0xcd41a29d,
-0xccc00040,
-0xcd000040,
-0xcd400040,
-0xd0400040,
-0x7c408000,
-0xa0000000,
-0x7e82800b,
-0x7c40c000,
-0x30d00001,
-0xccc1a29f,
-0x95000003,
-0x04140001,
-0x04140002,
-0xcd4003fb,
-0xcc800040,
-0x80000000,
-0xccc00040,
-0x7c40c000,
-0xcc800040,
-0xccc1a2a2,
-0x80000000,
-0xccc00040,
-0x7c40c000,
-0x28d4001f,
-0xcc800040,
-0x95400003,
-0x7c410000,
-0xccc00057,
-0x2918001f,
-0xccc00040,
-0x95800003,
-0xcd000040,
-0xcd000058,
-0x80000261,
-0xcc00007f,
-0xc8200017,
-0xc8300022,
-0x9a000006,
-0x0e280001,
-0xc824001e,
-0x0a640001,
-0xd4001240,
-0xce400040,
-0xc036c000,
-0x96800007,
-0x37747900,
-0x041c0001,
-0xcf400040,
-0xcdc00040,
-0xcf0003fa,
-0x7c030000,
-0xca0c0010,
-0x7c410000,
-0x94c00004,
-0x7c414000,
-0xd42002c4,
-0xcde00044,
-0x9b00000b,
-0x7c418000,
-0xcc00004b,
-0xcda00049,
-0xcd200041,
-0xcd600041,
-0xcda00041,
-0x06200001,
-0xce000056,
-0x80000261,
-0xcc00007f,
-0xc8280020,
-0xc82c0021,
-0xcc000063,
-0x7eea4001,
-0x65740020,
-0x7f53402c,
-0x269c0002,
-0x7df5c020,
-0x69f80020,
-0xce80004b,
-0xce600049,
-0xcde00041,
-0xcfa00041,
-0xce600041,
-0x271c0002,
-0x7df5c020,
-0x69f80020,
-0x7db24001,
-0xcf00004b,
-0xce600049,
-0xcde00041,
-0xcfa00041,
-0x800000bd,
-0xce600041,
-0xc8200017,
-0xc8300022,
-0x9a000006,
-0x0e280001,
-0xc824001e,
-0x0a640001,
-0xd4001240,
-0xce400040,
-0xca0c0010,
-0x7c410000,
-0x94c0000b,
-0xc036c000,
-0x96800007,
-0x37747900,
-0x041c0001,
-0xcf400040,
-0xcdc00040,
-0xcf0003fa,
-0x7c030000,
-0x800000b6,
-0x7c414000,
-0xcc000048,
-0x800000ef,
-0x00000000,
-0xc8200017,
-0xc81c0023,
-0x0e240002,
-0x99c00015,
-0x7c418000,
-0x0a200001,
-0xce000056,
-0xd4000440,
-0xcc000040,
-0xc036c000,
-0xca140013,
-0x96400007,
-0x37747900,
-0xcf400040,
-0xcc000040,
-0xc83003fa,
-0x80000104,
-0xcf000022,
-0xcc000022,
-0x9540015d,
-0xcc00007f,
-0xcca00046,
-0x80000000,
-0xcc200046,
-0x80000261,
-0xcc000064,
-0xc8200017,
-0xc810001f,
-0x96000005,
-0x09100001,
-0xd4000440,
-0xcd000040,
-0xcd000022,
-0xcc800040,
-0xd0400040,
-0xc80c0025,
-0x94c0feeb,
-0xc8100008,
-0xcd000040,
-0xd4000fc0,
-0x80000000,
-0xd4000fa2,
-0x7c40c000,
-0x7c410000,
-0xccc003fd,
-0xcd0003fc,
-0xccc00042,
-0xcd000042,
-0x2914001f,
-0x29180010,
-0x31980007,
-0x3b5c0001,
-0x7d76000b,
-0x99800005,
-0x7d5e400b,
-0xcc000042,
-0x80000261,
-0xcc00004d,
-0x29980001,
-0x292c0008,
-0x9980003d,
-0x32ec0001,
-0x96000004,
-0x2930000c,
-0x80000261,
-0xcc000042,
-0x04140010,
-0xcd400042,
-0x33300001,
-0x34280001,
-0x8400015e,
-0xc8140003,
-0x9b40001b,
-0x0438000c,
-0x8400015e,
-0xc8140003,
-0x9b400017,
-0x04380008,
-0x8400015e,
-0xc8140003,
-0x9b400013,
-0x04380004,
-0x8400015e,
-0xc8140003,
-0x9b400015,
-0xc80c03fd,
-0x9a800009,
-0xc81003fc,
-0x9b000118,
-0xcc00004d,
-0x04140010,
-0xccc00042,
-0xcd000042,
-0x80000136,
-0xcd400042,
-0x96c00111,
-0xcc00004d,
-0x80000261,
-0xcc00004e,
-0x9ac00003,
-0xcc00004d,
-0xcc00004e,
-0xdf830000,
-0x80000000,
-0xd80301ff,
-0x9ac00107,
-0xcc00004d,
-0x80000261,
-0xcc00004e,
-0xc8180003,
-0xc81c0003,
-0xc8200003,
-0x7d5d4003,
-0x7da1c003,
-0x7d5d400c,
-0x2a10001f,
-0x299c001f,
-0x7d1d000b,
-0x7d17400b,
-0x88000000,
-0x7e92800b,
-0x96400004,
-0xcc00004e,
-0x80000261,
-0xcc000042,
-0x04380008,
-0xcf800042,
-0xc8080003,
-0xc80c0003,
-0xc8100003,
-0xc8140003,
-0xc8180003,
-0xc81c0003,
-0xc8240003,
-0xc8280003,
-0x29fc001f,
-0x2ab0001f,
-0x7ff3c00b,
-0x28f0001f,
-0x7ff3c00b,
-0x2970001f,
-0x7ff3c00b,
-0x7d888001,
-0x7dccc001,
-0x7e510001,
-0x7e954001,
-0x7c908002,
-0x7cd4c002,
-0x7cbc800b,
-0x9ac00003,
-0x7c8f400b,
-0x38b40001,
-0x9b4000d8,
-0xcc00004d,
-0x9bc000d6,
-0xcc00004e,
-0xc80c03fd,
-0xc81003fc,
-0xccc00042,
-0x8000016f,
-0xcd000042,
-0xd4000340,
-0xd4000fc0,
-0xd4000fa2,
-0xcc800040,
-0xcc400040,
-0xcc400040,
-0xcc400040,
-0x7c40c000,
-0xccc00040,
-0xccc0000d,
-0x80000000,
-0xd0400040,
-0x7c40c000,
-0x7c410000,
-0x65140020,
-0x7d4d402c,
-0x24580002,
-0x7d598020,
-0x7c41c000,
-0xcd800042,
-0x69980020,
-0xcd800042,
-0xcdc00042,
-0xc023c000,
-0x05e40002,
-0x7ca0800b,
-0x26640010,
-0x7ca4800c,
-0xcc800040,
-0xcdc00040,
-0xccc00040,
-0x95c0000e,
-0xcd000040,
-0x09dc0001,
-0xc8280003,
-0x96800008,
-0xce800040,
-0xc834001d,
-0x97400000,
-0xc834001d,
-0x26a80008,
-0x84000264,
-0xcc2b0000,
-0x99c0fff7,
-0x09dc0001,
-0xdc3a0000,
-0x97800004,
-0x7c418000,
-0x800001a3,
-0x25980002,
-0xa0000000,
-0x7d808000,
-0xc818001d,
-0x7c40c000,
-0x64d00008,
-0x95800000,
-0xc818001d,
-0xcc130000,
-0xcc800040,
-0xccc00040,
-0x80000000,
-0xcc400040,
-0xc810001f,
-0x7c40c000,
-0xcc800040,
-0x7cd1400c,
-0xcd400040,
-0x05180001,
-0x80000000,
-0xcd800022,
-0x7c40c000,
-0x64500020,
-0x84000264,
-0xcc000061,
-0x7cd0c02c,
-0xc8200017,
-0xc8d60000,
-0x99400008,
-0x7c438000,
-0xdf830000,
-0xcfa0004f,
-0x84000264,
-0xcc000062,
-0x80000000,
-0xd040007f,
-0x80000261,
-0xcc000062,
-0x84000264,
-0xcc000061,
-0xc8200017,
-0x7c40c000,
-0xc036ff00,
-0xc810000d,
-0xc0303fff,
-0x7cf5400b,
-0x7d51800b,
-0x7d81800f,
-0x99800008,
-0x7cf3800b,
-0xdf830000,
-0xcfa0004f,
-0x84000264,
-0xcc000062,
-0x80000000,
-0xd040007f,
-0x80000261,
-0xcc000062,
-0x84000264,
-0x7c40c000,
-0x28dc0008,
-0x95c00019,
-0x30dc0010,
-0x7c410000,
-0x99c00004,
-0x64540020,
-0x80000209,
-0xc91d0000,
-0x7d15002c,
-0xc91e0000,
-0x7c420000,
-0x7c424000,
-0x7c418000,
-0x7de5c00b,
-0x7de28007,
-0x9a80000e,
-0x41ac0005,
-0x9ac00000,
-0x0aec0001,
-0x30dc0010,
-0x99c00004,
-0x00000000,
-0x8000020c,
-0xc91d0000,
-0x8000020c,
-0xc91e0000,
-0xcc800040,
-0xccc00040,
-0xd0400040,
-0xc80c0025,
-0x94c0fde3,
-0xc8100008,
-0xcd000040,
-0xd4000fc0,
-0x80000000,
-0xd4000fa2,
-0xd4000340,
-0xd4000fc0,
-0xd4000fa2,
-0xcc800040,
-0xd0400040,
-0x7c408000,
-0xa0000000,
-0x7e82800b,
-0xd40003c0,
-0xd4000fc0,
-0xd4000fa2,
-0xcc800040,
-0xd0400040,
-0x7c408000,
-0xa0000000,
-0x7e82800b,
-0x7c40c000,
-0x30d00006,
-0x0d100006,
-0x99000007,
-0xc8140015,
-0x99400005,
-0xcc000052,
-0xd4000340,
-0xd4000fc0,
-0xd4000fa2,
-0xcc800040,
-0xccc00040,
-0x80000000,
-0xd0400040,
-0x7c40c000,
-0xcc4d0000,
-0xdc3a0000,
-0x9780fdbc,
-0x04cc0001,
-0x80000243,
-0xcc4d0000,
-0x7c40c000,
-0x7c410000,
-0x29240018,
-0x32640001,
-0x9640000f,
-0xcc800040,
-0x7c414000,
-0x7c418000,
-0x7c41c000,
-0xccc00043,
-0xcd000043,
-0x31dc7fff,
-0xcdc00043,
-0xccc00040,
-0xcd000040,
-0xcd400040,
-0xcd800040,
-0x80000000,
-0xcdc00040,
-0xccc00040,
-0xcd000040,
-0x80000000,
-0xd0400040,
-0x80000000,
-0xd040007f,
-0xcc00007f,
-0x80000000,
-0xcc00007f,
-0xcc00007f,
-0x88000000,
-0xcc00007f,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00030223,
-0x0004022b,
-0x000500a0,
-0x00020003,
-0x0006003c,
-0x00070027,
-0x00080192,
-0x00090044,
-0x000a002d,
-0x0010025f,
-0x001700f1,
-0x002201d8,
-0x002301e9,
-0x0026004c,
-0x0027005f,
-0x0020011b,
-0x00280093,
-0x0029004f,
-0x002a0084,
-0x002b0065,
-0x002f008e,
-0x003200d9,
-0x00340233,
-0x00360075,
-0x0039010b,
-0x003c01fd,
-0x003f00a0,
-0x00410248,
-0x00440195,
-0x0048019e,
-0x004901c6,
-0x004a01d0,
-0x00550226,
-0x0056022e,
-0x0060000a,
-0x0061002a,
-0x00620030,
-0x00630030,
-0x00640030,
-0x00650030,
-0x00660030,
-0x00670030,
-0x00680037,
-0x0069003f,
-0x006a0047,
-0x006b0047,
-0x006c0047,
-0x006d0047,
-0x006e0047,
-0x006f0047,
-0x00700047,
-0x0073025f,
-0x007b0241,
-0x00000005,
-0x00000005,
-0x00000005,
-0x00000005,
-0x00000005,
-0x00000005,
-0x00000005,
-0x00000005,
-0x00000005,
-0x00000005,
-0x00000005,
-0x00000005,
-0x00000005,
-0x00000005,
-0x00000005,
-0x00000005,
-0x00000005,
-0x00000005,
-0x00000005,
-0x00000005,
-0x00000005,
-0x00000005,
-0x00000005,
-0x00000005,
-0x00000005,
-0x00000005,
-0x00000005,
-};
-static const u32 RV730_pfp_microcode[] = {
-0x7c408000,
-0xa0000000,
-0x7e82800b,
-0x80000000,
-0xdc030000,
-0xcc800040,
-0xd0400040,
-0x7c408000,
-0xa0000000,
-0x7e82800b,
-0xc818000e,
-0x31980001,
-0x7c424000,
-0x9580023a,
-0x7c428000,
-0xc81c001c,
-0xc037c000,
-0x7c40c000,
-0x7c410000,
-0x7cb4800b,
-0xc0360003,
-0x99c00000,
-0xc81c001c,
-0x7cb4800c,
-0x24d40002,
-0x7d654000,
-0xcd400043,
-0xce800043,
-0xcd000043,
-0xcc800040,
-0xce400040,
-0xce800040,
-0xccc00040,
-0xdc3a0000,
-0x9780ffde,
-0xcd000040,
-0x7c40c000,
-0x80000018,
-0x7c410000,
-0xd4000340,
-0xd4000fc0,
-0xd4000fa2,
-0xc818000e,
-0x8000000c,
-0x31980002,
-0xd40003c0,
-0xd4000fc0,
-0xd4000fa2,
-0xc818000e,
-0x288c0008,
-0x30cc000f,
-0x34100001,
-0x7d0d0008,
-0x8000000c,
-0x7d91800b,
-0xcc800040,
-0xd0400040,
-0x7c408000,
-0xa0000000,
-0x7e82800b,
-0xd4000340,
-0xd4000fc0,
-0xd4000fa2,
-0xcc800040,
-0xd0400040,
-0x7c408000,
-0xa0000000,
-0x7e82800b,
-0xd40003c0,
-0xd4000fc0,
-0xd4000fa2,
-0xcc800040,
-0xd0400040,
-0x7c408000,
-0xa0000000,
-0x7e82800b,
-0xcc4003f9,
-0x80000249,
-0xcc4003f8,
-0xc037ffff,
-0x7c414000,
-0xcf41a29e,
-0xc82003f8,
-0xc81c03f9,
-0x66200020,
-0xc81803fb,
-0x7de1c02c,
-0x7d58c008,
-0x7cdcc020,
-0x69100020,
-0xc0360003,
-0xcc000054,
-0x7cb4800c,
-0x80000069,
-0xcc800040,
-0x7c418000,
-0xcd81a29e,
-0xcc800040,
-0x80000067,
-0xcd800040,
-0xc019ffff,
-0xcc800040,
-0xcd81a29e,
-0x7c40c000,
-0x7c410000,
-0x7c414000,
-0xccc1a1fa,
-0xcd01a1f9,
-0xcd41a29d,
-0xccc00040,
-0xcd000040,
-0xcd400040,
-0xcc400040,
-0x7c408000,
-0xa0000000,
-0x7e82800b,
-0xcc000054,
-0xcc800040,
-0x7c40c000,
-0x7c410000,
-0x7c414000,
-0xccc1a1fa,
-0xcd01a1f9,
-0xcd41a29d,
-0xccc00040,
-0xcd000040,
-0xcd400040,
-0xd0400040,
-0x7c408000,
-0xa0000000,
-0x7e82800b,
-0x7c40c000,
-0x30d00001,
-0xccc1a29f,
-0x95000003,
-0x04140001,
-0x04140002,
-0xcd4003fb,
-0xcc800040,
-0x80000000,
-0xccc00040,
-0x7c40c000,
-0xcc800040,
-0xccc1a2a2,
-0x80000000,
-0xccc00040,
-0x7c40c000,
-0x28d4001f,
-0xcc800040,
-0x95400003,
-0x7c410000,
-0xccc00057,
-0x2918001f,
-0xccc00040,
-0x95800003,
-0xcd000040,
-0xcd000058,
-0x80000249,
-0xcc00007f,
-0xc8200017,
-0xc8300022,
-0x9a000006,
-0x0e280001,
-0xc824001e,
-0x0a640001,
-0xd4001240,
-0xce400040,
-0xc036c000,
-0x96800007,
-0x37747900,
-0x041c0001,
-0xcf400040,
-0xcdc00040,
-0xcf0003fa,
-0x7c030000,
-0xca0c0010,
-0x7c410000,
-0x94c00004,
-0x7c414000,
-0xd42002c4,
-0xcde00044,
-0x9b00000b,
-0x7c418000,
-0xcc00004b,
-0xcda00049,
-0xcd200041,
-0xcd600041,
-0xcda00041,
-0x06200001,
-0xce000056,
-0x80000249,
-0xcc00007f,
-0xc8280020,
-0xc82c0021,
-0xcc000063,
-0x7eea4001,
-0x65740020,
-0x7f53402c,
-0x269c0002,
-0x7df5c020,
-0x69f80020,
-0xce80004b,
-0xce600049,
-0xcde00041,
-0xcfa00041,
-0xce600041,
-0x271c0002,
-0x7df5c020,
-0x69f80020,
-0x7db24001,
-0xcf00004b,
-0xce600049,
-0xcde00041,
-0xcfa00041,
-0x800000bc,
-0xce600041,
-0xc8200017,
-0xc8300022,
-0x9a000006,
-0x0e280001,
-0xc824001e,
-0x0a640001,
-0xd4001240,
-0xce400040,
-0xca0c0010,
-0x7c410000,
-0x94c0000b,
-0xc036c000,
-0x96800007,
-0x37747900,
-0x041c0001,
-0xcf400040,
-0xcdc00040,
-0xcf0003fa,
-0x7c030000,
-0x800000b5,
-0x7c414000,
-0xcc000048,
-0x800000ee,
-0x00000000,
-0xc8200017,
-0xc81c0023,
-0x0e240002,
-0x99c00015,
-0x7c418000,
-0x0a200001,
-0xce000056,
-0xd4000440,
-0xcc000040,
-0xc036c000,
-0xca140013,
-0x96400007,
-0x37747900,
-0xcf400040,
-0xcc000040,
-0xc83003fa,
-0x80000103,
-0xcf000022,
-0xcc000022,
-0x95400146,
-0xcc00007f,
-0xcca00046,
-0x80000000,
-0xcc200046,
-0x80000249,
-0xcc000064,
-0xc8200017,
-0xc810001f,
-0x96000005,
-0x09100001,
-0xd4000440,
-0xcd000040,
-0xcd000022,
-0xcc800040,
-0xd0400040,
-0xc80c0025,
-0x94c0feec,
-0xc8100008,
-0xcd000040,
-0xd4000fc0,
-0x80000000,
-0xd4000fa2,
-0x7c40c000,
-0x7c410000,
-0xccc003fd,
-0xcd0003fc,
-0xccc00042,
-0xcd000042,
-0x2914001f,
-0x29180010,
-0x31980007,
-0x3b5c0001,
-0x7d76000b,
-0x99800005,
-0x7d5e400b,
-0xcc000042,
-0x80000249,
-0xcc00004d,
-0x29980001,
-0x292c0008,
-0x9980003d,
-0x32ec0001,
-0x96000004,
-0x2930000c,
-0x80000249,
-0xcc000042,
-0x04140010,
-0xcd400042,
-0x33300001,
-0x34280001,
-0x8400015d,
-0xc8140003,
-0x9b40001b,
-0x0438000c,
-0x8400015d,
-0xc8140003,
-0x9b400017,
-0x04380008,
-0x8400015d,
-0xc8140003,
-0x9b400013,
-0x04380004,
-0x8400015d,
-0xc8140003,
-0x9b400015,
-0xc80c03fd,
-0x9a800009,
-0xc81003fc,
-0x9b000101,
-0xcc00004d,
-0x04140010,
-0xccc00042,
-0xcd000042,
-0x80000135,
-0xcd400042,
-0x96c000fa,
-0xcc00004d,
-0x80000249,
-0xcc00004e,
-0x9ac00003,
-0xcc00004d,
-0xcc00004e,
-0xdf830000,
-0x80000000,
-0xd80301ff,
-0x9ac000f0,
-0xcc00004d,
-0x80000249,
-0xcc00004e,
-0xc8180003,
-0xc81c0003,
-0xc8200003,
-0x7d5d4003,
-0x7da1c003,
-0x7d5d400c,
-0x2a10001f,
-0x299c001f,
-0x7d1d000b,
-0x7d17400b,
-0x88000000,
-0x7e92800b,
-0x96400004,
-0xcc00004e,
-0x80000249,
-0xcc000042,
-0x04380008,
-0xcf800042,
-0xc8080003,
-0xc80c0003,
-0xc8100003,
-0xc8140003,
-0xc8180003,
-0xc81c0003,
-0xc8240003,
-0xc8280003,
-0x29fc001f,
-0x2ab0001f,
-0x7ff3c00b,
-0x28f0001f,
-0x7ff3c00b,
-0x2970001f,
-0x7ff3c00b,
-0x7d888001,
-0x7dccc001,
-0x7e510001,
-0x7e954001,
-0x7c908002,
-0x7cd4c002,
-0x7cbc800b,
-0x9ac00003,
-0x7c8f400b,
-0x38b40001,
-0x9b4000c1,
-0xcc00004d,
-0x9bc000bf,
-0xcc00004e,
-0xc80c03fd,
-0xc81003fc,
-0xccc00042,
-0x8000016e,
-0xcd000042,
-0xd4000340,
-0xd4000fc0,
-0xd4000fa2,
-0xcc800040,
-0xcc400040,
-0xcc400040,
-0xcc400040,
-0x7c40c000,
-0xccc00040,
-0xccc0000d,
-0x80000000,
-0xd0400040,
-0x7c40c000,
-0x7c410000,
-0x65140020,
-0x7d4d402c,
-0x24580002,
-0x7d598020,
-0x7c41c000,
-0xcd800042,
-0x69980020,
-0xcd800042,
-0xcdc00042,
-0xc023c000,
-0x05e40002,
-0x7ca0800b,
-0x26640010,
-0x7ca4800c,
-0xcc800040,
-0xcdc00040,
-0xccc00040,
-0x95c0000e,
-0xcd000040,
-0x09dc0001,
-0xc8280003,
-0x96800008,
-0xce800040,
-0xc834001d,
-0x97400000,
-0xc834001d,
-0x26a80008,
-0x8400024c,
-0xcc2b0000,
-0x99c0fff7,
-0x09dc0001,
-0xdc3a0000,
-0x97800004,
-0x7c418000,
-0x800001a2,
-0x25980002,
-0xa0000000,
-0x7d808000,
-0xc818001d,
-0x7c40c000,
-0x64d00008,
-0x95800000,
-0xc818001d,
-0xcc130000,
-0xcc800040,
-0xccc00040,
-0x80000000,
-0xcc400040,
-0xc810001f,
-0x7c40c000,
-0xcc800040,
-0x7cd1400c,
-0xcd400040,
-0x05180001,
-0x80000000,
-0xcd800022,
-0x7c40c000,
-0x64500020,
-0x8400024c,
-0xcc000061,
-0x7cd0c02c,
-0xc8200017,
-0xc8d60000,
-0x99400008,
-0x7c438000,
-0xdf830000,
-0xcfa0004f,
-0x8400024c,
-0xcc000062,
-0x80000000,
-0xd040007f,
-0x80000249,
-0xcc000062,
-0x8400024c,
-0xcc000061,
-0xc8200017,
-0x7c40c000,
-0xc036ff00,
-0xc810000d,
-0xc0303fff,
-0x7cf5400b,
-0x7d51800b,
-0x7d81800f,
-0x99800008,
-0x7cf3800b,
-0xdf830000,
-0xcfa0004f,
-0x8400024c,
-0xcc000062,
-0x80000000,
-0xd040007f,
-0x80000249,
-0xcc000062,
-0x8400024c,
-0x7c40c000,
-0x28dc0008,
-0x95c00019,
-0x30dc0010,
-0x7c410000,
-0x99c00004,
-0x64540020,
-0x80000208,
-0xc91d0000,
-0x7d15002c,
-0xc91e0000,
-0x7c420000,
-0x7c424000,
-0x7c418000,
-0x7de5c00b,
-0x7de28007,
-0x9a80000e,
-0x41ac0005,
-0x9ac00000,
-0x0aec0001,
-0x30dc0010,
-0x99c00004,
-0x00000000,
-0x8000020b,
-0xc91d0000,
-0x8000020b,
-0xc91e0000,
-0xcc800040,
-0xccc00040,
-0xd0400040,
-0xc80c0025,
-0x94c0fde4,
-0xc8100008,
-0xcd000040,
-0xd4000fc0,
-0x80000000,
-0xd4000fa2,
-0xd4000340,
-0xd4000fc0,
-0xd4000fa2,
-0xcc800040,
-0xd0400040,
-0x7c408000,
-0xa0000000,
-0x7e82800b,
-0xd40003c0,
-0xd4000fc0,
-0xd4000fa2,
-0xcc800040,
-0xd0400040,
-0x7c408000,
-0xa0000000,
-0x7e82800b,
-0x7c40c000,
-0x30d00006,
-0x0d100006,
-0x99000007,
-0xc8140015,
-0x99400005,
-0xcc000052,
-0xd4000340,
-0xd4000fc0,
-0xd4000fa2,
-0xcc800040,
-0xccc00040,
-0x80000000,
-0xd0400040,
-0x7c40c000,
-0xcc4d0000,
-0xdc3a0000,
-0x9780fdbd,
-0x04cc0001,
-0x80000242,
-0xcc4d0000,
-0x80000000,
-0xd040007f,
-0xcc00007f,
-0x80000000,
-0xcc00007f,
-0xcc00007f,
-0x88000000,
-0xcc00007f,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00030222,
-0x0004022a,
-0x0005009f,
-0x00020003,
-0x0006003c,
-0x00070027,
-0x00080191,
-0x00090044,
-0x000a002d,
-0x00100247,
-0x001700f0,
-0x002201d7,
-0x002301e8,
-0x0026004c,
-0x0027005f,
-0x0020011a,
-0x00280092,
-0x0029004f,
-0x002a0083,
-0x002b0064,
-0x002f008d,
-0x003200d8,
-0x00340232,
-0x00360074,
-0x0039010a,
-0x003c01fc,
-0x003f009f,
-0x00410005,
-0x00440194,
-0x0048019d,
-0x004901c5,
-0x004a01cf,
-0x00550225,
-0x0056022d,
-0x0060000a,
-0x0061002a,
-0x00620030,
-0x00630030,
-0x00640030,
-0x00650030,
-0x00660030,
-0x00670030,
-0x00680037,
-0x0069003f,
-0x006a0047,
-0x006b0047,
-0x006c0047,
-0x006d0047,
-0x006e0047,
-0x006f0047,
-0x00700047,
-0x00730247,
-0x007b0240,
-0x00000005,
-0x00000005,
-0x00000005,
-0x00000005,
-0x00000005,
-0x00000005,
-0x00000005,
-0x00000005,
-0x00000005,
-0x00000005,
-0x00000005,
-0x00000005,
-0x00000005,
-0x00000005,
-0x00000005,
-0x00000005,
-0x00000005,
-0x00000005,
-0x00000005,
-0x00000005,
-0x00000005,
-0x00000005,
-0x00000005,
-0x00000005,
-0x00000005,
-0x00000005,
-0x00000005,
-};
-static const u32 RV730_cp_microcode[] = {
-0xcc0003ea,
-0x7c408000,
-0xa0000000,
-0xcc800062,
-0x80000001,
-0xd040007f,
-0x80000001,
-0xcc400041,
-0x7c40c000,
-0xc0160004,
-0x30d03fff,
-0x7d15000c,
-0xcc110000,
-0x28d8001e,
-0x31980001,
-0x28dc001f,
-0xc8200004,
-0x95c00006,
-0x7c424000,
-0xcc000062,
-0x7e56800c,
-0xcc290000,
-0xc8240004,
-0x7e26000b,
-0x95800006,
-0x7c42c000,
-0xcc000062,
-0x7ed7000c,
-0xcc310000,
-0xc82c0004,
-0x7e2e000c,
-0xcc000062,
-0x31103fff,
-0x80000001,
-0xce110000,
-0x7c40c000,
-0x80000001,
-0xcc400040,
-0x80000001,
-0xcc412257,
-0x7c418000,
-0xcc400045,
-0xcc400048,
-0xcc41225c,
-0xcc41a1fc,
-0x7c408000,
-0xa0000000,
-0xcc800062,
-0xcc400045,
-0xcc400048,
-0x7c40c000,
-0xcc41225c,
-0xcc41a1fc,
-0x7c408000,
-0xa0000000,
-0xcc800062,
-0xcc000045,
-0xcc000048,
-0xcc41225c,
-0xcc41a1fc,
-0x7c408000,
-0xa0000000,
-0xcc800062,
-0x040ca1fd,
-0xc0120001,
-0xcc000045,
-0xcc000048,
-0x7cd0c00c,
-0xcc41225c,
-0xcc41a1fc,
-0xd04d0000,
-0x7c408000,
-0xa0000000,
-0xcc800062,
-0x80000001,
-0xcc41225d,
-0x7c408000,
-0x7c40c000,
-0xc02a0002,
-0x7c410000,
-0x7d29000c,
-0x30940001,
-0x30980006,
-0x309c0300,
-0x29dc0008,
-0x7c420000,
-0x7c424000,
-0x9540000f,
-0xc02e0004,
-0x05f02258,
-0x7f2f000c,
-0xcc310000,
-0xc8280004,
-0xccc12169,
-0xcd01216a,
-0xce81216b,
-0x0db40002,
-0xcc01216c,
-0x9740000e,
-0x0db40000,
-0x8000007b,
-0xc834000a,
-0x0db40002,
-0x97400009,
-0x0db40000,
-0xc02e0004,
-0x05f02258,
-0x7f2f000c,
-0xcc310000,
-0xc8280004,
-0x8000007b,
-0xc834000a,
-0x97400004,
-0x7e028000,
-0x8000007b,
-0xc834000a,
-0x0db40004,
-0x9740ff8c,
-0x00000000,
-0xce01216d,
-0xce41216e,
-0xc8280003,
-0xc834000a,
-0x9b400004,
-0x043c0005,
-0x8400026b,
-0xcc000062,
-0x0df40000,
-0x9740000b,
-0xc82c03e6,
-0xce81a2b7,
-0xc0300006,
-0x7ef34028,
-0xc0300020,
-0x7f6b8020,
-0x7fb3c029,
-0xcf81a2c4,
-0x80000001,
-0xcfc1a2d1,
-0x0df40001,
-0x9740000b,
-0xc82c03e7,
-0xce81a2bb,
-0xc0300006,
-0x7ef34028,
-0xc0300020,
-0x7f6b8020,
-0x7fb3c029,
-0xcf81a2c5,
-0x80000001,
-0xcfc1a2d2,
-0x0df40002,
-0x9740000b,
-0xc82c03e8,
-0xce81a2bf,
-0xc0300006,
-0x7ef34028,
-0xc0300020,
-0x7f6b8020,
-0x7fb3c029,
-0xcf81a2c6,
-0x80000001,
-0xcfc1a2d3,
-0xc82c03e9,
-0xce81a2c3,
-0xc0300006,
-0x7ef34028,
-0xc0300020,
-0x7f6b8020,
-0x7fb3c029,
-0xcf81a2c7,
-0x80000001,
-0xcfc1a2d4,
-0x80000001,
-0xcc400042,
-0x7c40c000,
-0x7c410000,
-0x2914001d,
-0x31540001,
-0x9940000c,
-0x31181000,
-0xc81c0011,
-0x95c00000,
-0xc81c0011,
-0xccc12100,
-0xcd012101,
-0xccc12102,
-0xcd012103,
-0x04180004,
-0x8000037c,
-0xcd81a2a4,
-0xc02a0004,
-0x95800008,
-0x36a821a3,
-0xcc290000,
-0xc8280004,
-0xc81c0011,
-0x0de40040,
-0x9640ffff,
-0xc81c0011,
-0xccc12170,
-0xcd012171,
-0xc8200012,
-0x96000000,
-0xc8200012,
-0x8000037c,
-0xcc000064,
-0x7c40c000,
-0x7c410000,
-0xcc000045,
-0xcc000048,
-0x40d40003,
-0xcd41225c,
-0xcd01a1fc,
-0xc01a0001,
-0x041ca1fd,
-0x7dd9c00c,
-0x7c420000,
-0x08cc0001,
-0x06240001,
-0x06280002,
-0xce1d0000,
-0xce5d0000,
-0x98c0fffa,
-0xce9d0000,
-0x7c408000,
-0xa0000000,
-0xcc800062,
-0x7c40c000,
-0x30d00001,
-0x28cc0001,
-0x7c414000,
-0x95000006,
-0x7c418000,
-0xcd41216d,
-0xcd81216e,
-0x800000f2,
-0xc81c0003,
-0xc0220004,
-0x7e16000c,
-0xcc210000,
-0xc81c0004,
-0x7c424000,
-0x98c00004,
-0x7c428000,
-0x80000001,
-0xcde50000,
-0xce412169,
-0xce81216a,
-0xcdc1216b,
-0x80000001,
-0xcc01216c,
-0x7c40c000,
-0x7c410000,
-0x7c414000,
-0x7c418000,
-0x7c41c000,
-0x28a40008,
-0x326400ff,
-0x0e68003c,
-0x9680000a,
-0x7c020000,
-0x7c420000,
-0x1e300003,
-0xcc00006a,
-0x9b000003,
-0x42200005,
-0x04200040,
-0x8000010f,
-0x7c024000,
-0x7e024000,
-0x9a400000,
-0x0a640001,
-0x30ec0010,
-0x9ac0000a,
-0xcc000062,
-0xc02a0004,
-0xc82c0021,
-0x7e92800c,
-0xcc000041,
-0xcc290000,
-0xcec00021,
-0x8000011f,
-0xc8300004,
-0xcd01216d,
-0xcd41216e,
-0xc8300003,
-0x7f1f000b,
-0x30f40007,
-0x27780001,
-0x9740002a,
-0x07b80124,
-0x9f800000,
-0x00000000,
-0x80000134,
-0x7f1b8004,
-0x80000138,
-0x7f1b8005,
-0x8000013c,
-0x7f1b8002,
-0x80000140,
-0x7f1b8003,
-0x80000144,
-0x7f1b8007,
-0x80000148,
-0x7f1b8006,
-0x8000014d,
-0x28a40008,
-0x9b800019,
-0x28a40008,
-0x8000015d,
-0x326400ff,
-0x9b800015,
-0x28a40008,
-0x8000015d,
-0x326400ff,
-0x9b800011,
-0x28a40008,
-0x8000015d,
-0x326400ff,
-0x9b80000d,
-0x28a40008,
-0x8000015d,
-0x326400ff,
-0x9b800009,
-0x28a40008,
-0x8000015d,
-0x326400ff,
-0x9b800005,
-0x28a40008,
-0x8000015d,
-0x326400ff,
-0x28a40008,
-0x326400ff,
-0x0e68003c,
-0x9a80feb2,
-0x28ec0008,
-0x7c434000,
-0x7c438000,
-0x7c43c000,
-0x96c00007,
-0xcc000062,
-0xcf412169,
-0xcf81216a,
-0xcfc1216b,
-0x80000001,
-0xcc01216c,
-0x80000001,
-0xcff50000,
-0xcc00006b,
-0x8400037f,
-0x0e68003c,
-0x9a800004,
-0xc8280015,
-0x80000001,
-0xd040007f,
-0x9680ffab,
-0x7e024000,
-0x84000239,
-0xc00e0002,
-0xcc000041,
-0x80000237,
-0xccc1304a,
-0x7c40c000,
-0x7c410000,
-0xc01e0001,
-0x29240012,
-0xc0220002,
-0x96400005,
-0xc0260004,
-0xc027fffb,
-0x7d25000b,
-0xc0260000,
-0x7dd2800b,
-0x7e12c00b,
-0x7d25000c,
-0x7c414000,
-0x7c418000,
-0xccc12169,
-0x9a80000a,
-0xcd01216a,
-0xcd41216b,
-0x96c0fe83,
-0xcd81216c,
-0xc8300018,
-0x97000000,
-0xc8300018,
-0x80000001,
-0xcc000018,
-0x8400037f,
-0xcc00007f,
-0xc8140013,
-0xc8180014,
-0xcd41216b,
-0x96c0fe77,
-0xcd81216c,
-0x80000181,
-0xc8300018,
-0xc80c0008,
-0x98c00000,
-0xc80c0008,
-0x7c410000,
-0x95000002,
-0x00000000,
-0x7c414000,
-0xc8200009,
-0xcc400043,
-0xce01a1f4,
-0xcc400044,
-0xc00e8000,
-0x7c424000,
-0x7c428000,
-0x2aac001f,
-0x96c0fe64,
-0xc035f000,
-0xce4003e2,
-0x32780003,
-0x267c0008,
-0x7ff7c00b,
-0x7ffbc00c,
-0x2a780018,
-0xcfc003e3,
-0xcf8003e4,
-0x26b00002,
-0x7f3f0000,
-0xcf0003e5,
-0x8000031d,
-0x7c80c000,
-0x7c40c000,
-0x28d00008,
-0x3110000f,
-0x9500000f,
-0x25280001,
-0x06a801b2,
-0x9e800000,
-0x00000000,
-0x800001d3,
-0xc0120800,
-0x800001e1,
-0xc814000f,
-0x800001e8,
-0xc8140010,
-0x800001ef,
-0xccc1a2a4,
-0x800001f8,
-0xc8140011,
-0x30d0003f,
-0x0d280015,
-0x9a800012,
-0x0d28001e,
-0x9a80001e,
-0x0d280020,
-0x9a800023,
-0x0d24000f,
-0x0d280010,
-0x7e6a800c,
-0x9a800026,
-0x0d200004,
-0x0d240014,
-0x0d280028,
-0x7e62400c,
-0x7ea6800c,
-0x9a80002a,
-0xc8140011,
-0x80000001,
-0xccc1a2a4,
-0xc0120800,
-0x7c414000,
-0x7d0cc00c,
-0xc0120008,
-0x29580003,
-0x295c000c,
-0x7c420000,
-0x7dd1c00b,
-0x26200014,
-0x7e1e400c,
-0x7e4e800c,
-0xce81a2a4,
-0x80000001,
-0xcd81a1fe,
-0xc814000f,
-0x0410210e,
-0x95400000,
-0xc814000f,
-0xd0510000,
-0x80000001,
-0xccc1a2a4,
-0xc8140010,
-0x04102108,
-0x95400000,
-0xc8140010,
-0xd0510000,
-0x80000001,
-0xccc1a2a4,
-0xccc1a2a4,
-0x04100001,
-0xcd000019,
-0x8400037f,
-0xcc00007f,
-0xc8100019,
-0x99000000,
-0xc8100019,
-0x80000002,
-0x7c408000,
-0x04102100,
-0x95400000,
-0xc8140011,
-0xd0510000,
-0x8000037c,
-0xccc1a2a4,
-0x7c40c000,
-0xcc40000d,
-0x94c0fe01,
-0xcc40000e,
-0x7c410000,
-0x95000005,
-0x08cc0001,
-0xc8140005,
-0x99400014,
-0x00000000,
-0x98c0fffb,
-0x7c410000,
-0x80000002,
-0x7d008000,
-0xc8140005,
-0x7c40c000,
-0x9940000c,
-0xc818000c,
-0x7c410000,
-0x9580fdf0,
-0xc820000e,
-0xc81c000d,
-0x66200020,
-0x7e1e002c,
-0x25240002,
-0x7e624020,
-0x80000001,
-0xcce60000,
-0x7c410000,
-0xcc00006c,
-0xcc00006d,
-0xc818001f,
-0xc81c001e,
-0x65980020,
-0x7dd9c02c,
-0x7cd4c00c,
-0xccde0000,
-0x45dc0004,
-0xc8280017,
-0x9680000f,
-0xc00e0001,
-0x28680008,
-0x2aac0016,
-0x32a800ff,
-0x0eb00049,
-0x7f2f000b,
-0x97000006,
-0x00000000,
-0xc8140005,
-0x7c40c000,
-0x80000221,
-0x7c410000,
-0x80000224,
-0xd040007f,
-0x84000239,
-0xcc000041,
-0xccc1304a,
-0x94000000,
-0xc83c001a,
-0x043c0005,
-0xcfc1a2a4,
-0xc0361f90,
-0xc0387fff,
-0x7c03c010,
-0x7f7b400c,
-0xcf41217c,
-0xcfc1217d,
-0xcc01217e,
-0xc03a0004,
-0x0434217f,
-0x7f7b400c,
-0xcc350000,
-0xc83c0004,
-0x2bfc001f,
-0x04380020,
-0x97c00005,
-0xcc000062,
-0x9b800000,
-0x0bb80001,
-0x80000245,
-0xcc000071,
-0xcc01a1f4,
-0x04380016,
-0xc0360002,
-0xcf81a2a4,
-0x88000000,
-0xcf412010,
-0x7c40c000,
-0x28d0001c,
-0x95000005,
-0x04d40001,
-0xcd400065,
-0x80000001,
-0xcd400068,
-0x09540002,
-0x80000001,
-0xcd400066,
-0x8400026a,
-0xc81803ea,
-0x7c40c000,
-0x9980fd9f,
-0xc8140016,
-0x08d00001,
-0x9940002b,
-0xcd000068,
-0x7c408000,
-0xa0000000,
-0xcc800062,
-0x043c0005,
-0xcfc1a2a4,
-0xcc01a1f4,
-0x8400037f,
-0xcc000046,
-0x88000000,
-0xcc00007f,
-0x8400027c,
-0xc81803ea,
-0x7c40c000,
-0x9980fd8d,
-0xc8140016,
-0x08d00001,
-0x99400019,
-0xcd000068,
-0x7c408000,
-0xa0000000,
-0xcc800062,
-0x043c0022,
-0xcfc1a2a4,
-0x8400037f,
-0xcc000047,
-0x88000000,
-0xcc00007f,
-0xc8100016,
-0x9900000d,
-0xcc400067,
-0x80000002,
-0x7c408000,
-0xc81803ea,
-0x9980fd79,
-0x7c40c000,
-0x94c00003,
-0xc8100016,
-0x99000004,
-0xccc00068,
-0x80000002,
-0x7c408000,
-0x84000239,
-0xc0148000,
-0xcc000041,
-0xcd41304a,
-0xc0148000,
-0x99000000,
-0xc8100016,
-0x80000002,
-0x7c408000,
-0xc0120001,
-0x7c51400c,
-0x80000001,
-0xd0550000,
-0x7c40c000,
-0x7c410000,
-0x7c414000,
-0x7c418000,
-0x291c001f,
-0xccc0004a,
-0xcd00004b,
-0x95c00003,
-0xc01c8000,
-0xcdc12010,
-0xdd830000,
-0x055c2000,
-0xcc000062,
-0x80000001,
-0xd81f4100,
-0x7c40c000,
-0x7c410000,
-0x7c414000,
-0x7c418000,
-0xccc0004c,
-0xcd00004d,
-0xdd830000,
-0x055ca000,
-0x80000001,
-0xd81f4100,
-0x7c40c000,
-0x7c410000,
-0x7c414000,
-0x7c418000,
-0xccc0004e,
-0xcd00004f,
-0xdd830000,
-0x055cc000,
-0x80000001,
-0xd81f4100,
-0x7c40c000,
-0x7c410000,
-0x7c414000,
-0x7c418000,
-0xccc00050,
-0xcd000051,
-0xdd830000,
-0x055cf8e0,
-0x80000001,
-0xd81f4100,
-0x7c40c000,
-0x7c410000,
-0x7c414000,
-0x7c418000,
-0xccc00052,
-0xcd000053,
-0xdd830000,
-0x055cf880,
-0x80000001,
-0xd81f4100,
-0x7c40c000,
-0x7c410000,
-0x7c414000,
-0x7c418000,
-0xccc00054,
-0xcd000055,
-0xdd830000,
-0x055ce000,
-0x80000001,
-0xd81f4100,
-0x7c40c000,
-0x7c410000,
-0x7c414000,
-0x7c418000,
-0xccc00056,
-0xcd000057,
-0xdd830000,
-0x055cf000,
-0x80000001,
-0xd81f4100,
-0x7c40c000,
-0x7c410000,
-0x7c414000,
-0x7c418000,
-0xccc00058,
-0xcd000059,
-0xdd830000,
-0x055cf3fc,
-0x80000001,
-0xd81f4100,
-0xd0432000,
-0x7c408000,
-0xa0000000,
-0xcc800062,
-0xd043a000,
-0x7c408000,
-0xa0000000,
-0xcc800062,
-0xd043c000,
-0x7c408000,
-0xa0000000,
-0xcc800062,
-0xd043f8e0,
-0x7c408000,
-0xa0000000,
-0xcc800062,
-0xd043f880,
-0x7c408000,
-0xa0000000,
-0xcc800062,
-0xd043e000,
-0x7c408000,
-0xa0000000,
-0xcc800062,
-0xd043f000,
-0x7c408000,
-0xa0000000,
-0xcc800062,
-0xd043f3fc,
-0x7c408000,
-0xa0000000,
-0xcc800062,
-0xc81403e0,
-0xcc430000,
-0xcc430000,
-0xcc430000,
-0x7d45c000,
-0xcdc30000,
-0xd0430000,
-0x7c408000,
-0xa0000000,
-0xcc800062,
-0x7c40c000,
-0xc81003e2,
-0xc81403e5,
-0xc81803e3,
-0xc81c03e4,
-0xcd812169,
-0xcdc1216a,
-0xccc1216b,
-0xcc01216c,
-0x04200004,
-0x7da18000,
-0x7d964002,
-0x9640fcd9,
-0xcd8003e3,
-0x31280003,
-0xc02df000,
-0x25180008,
-0x7dad800b,
-0x7da9800c,
-0x80000001,
-0xcd8003e3,
-0x308cffff,
-0xd04d0000,
-0x7c408000,
-0xa0000000,
-0xcc800062,
-0xc8140020,
-0x15580002,
-0x9580ffff,
-0xc8140020,
-0xcc00006e,
-0xcc412180,
-0x7c40c000,
-0xccc1218d,
-0xcc412181,
-0x28d0001f,
-0x34588000,
-0xcd81218c,
-0x9500fcbf,
-0xcc412182,
-0xc8140020,
-0x9940ffff,
-0xc8140020,
-0x80000002,
-0x7c408000,
-0x7c40c000,
-0x28d00018,
-0x31100001,
-0xc0160080,
-0x95000003,
-0xc02a0004,
-0x7cd4c00c,
-0xccc1217c,
-0xcc41217d,
-0xcc41217e,
-0x7c418000,
-0x1db00003,
-0x36a0217f,
-0x9b000003,
-0x419c0005,
-0x041c0040,
-0x99c00000,
-0x09dc0001,
-0xcc210000,
-0xc8240004,
-0x2a6c001f,
-0x419c0005,
-0x9ac0fffa,
-0xcc800062,
-0x80000002,
-0x7c408000,
-0x7c40c000,
-0x04d403e6,
-0x80000001,
-0xcc540000,
-0x8000037c,
-0xcc4003ea,
-0xc01c8000,
-0x044ca000,
-0xcdc12010,
-0x7c410000,
-0xc8140009,
-0x04180000,
-0x041c0008,
-0xcd800071,
-0x09dc0001,
-0x05980001,
-0xcd0d0000,
-0x99c0fffc,
-0xcc800062,
-0x8000037c,
-0xcd400071,
-0xc00e0100,
-0xcc000041,
-0xccc1304a,
-0xc83c007f,
-0xcc00007f,
-0x80000001,
-0xcc00007f,
-0xcc00007f,
-0x88000000,
-0xcc00007f,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00010331,
-0x00100004,
-0x00170006,
-0x00210008,
-0x00270028,
-0x00280023,
-0x00290029,
-0x002a0026,
-0x002b0029,
-0x002d0038,
-0x002e003f,
-0x002f004a,
-0x0034004c,
-0x00360030,
-0x003900af,
-0x003a00cf,
-0x003b00e4,
-0x003c00fc,
-0x003d016b,
-0x003f00ad,
-0x00410336,
-0x00430349,
-0x0044018e,
-0x004500fc,
-0x004601ac,
-0x004701ac,
-0x004801fe,
-0x0049020c,
-0x004a0255,
-0x004b0282,
-0x0052025f,
-0x00530271,
-0x00540287,
-0x00570299,
-0x0060029d,
-0x006102ac,
-0x006202b6,
-0x006302c0,
-0x006402ca,
-0x006502d4,
-0x006602de,
-0x006702e8,
-0x006802f2,
-0x006902f6,
-0x006a02fa,
-0x006b02fe,
-0x006c0302,
-0x006d0306,
-0x006e030a,
-0x006f030e,
-0x00700312,
-0x00720363,
-0x00740369,
-0x00790367,
-0x007c031c,
-0x000f0378,
-0x000f0378,
-0x000f0378,
-0x000f0378,
-0x000f0378,
-0x000f0378,
-0x000f0378,
-0x000f0378,
-0x000f0378,
-0x000f0378,
-0x000f0378,
-0x000f0378,
-0x000f0378,
-0x000f0378,
-0x000f0378,
-0x000f0378,
-0x000f0378,
-0x000f0378,
-0x000f0378,
-0x000f0378,
-0x000f0378,
-0x000f0378,
-0x000f0378,
-0x000f0378,
-0x000f0378,
-};
-static const u32 RV710_pfp_microcode[] = {
-0x7c408000,
-0xa0000000,
-0x7e82800b,
-0x80000000,
-0xdc030000,
-0xcc800040,
-0xd0400040,
-0x7c408000,
-0xa0000000,
-0x7e82800b,
-0xc818000e,
-0x31980001,
-0x7c424000,
-0x9580023a,
-0x7c428000,
-0xc81c001c,
-0xc037c000,
-0x7c40c000,
-0x7c410000,
-0x7cb4800b,
-0xc0360003,
-0x99c00000,
-0xc81c001c,
-0x7cb4800c,
-0x24d40002,
-0x7d654000,
-0xcd400043,
-0xce800043,
-0xcd000043,
-0xcc800040,
-0xce400040,
-0xce800040,
-0xccc00040,
-0xdc3a0000,
-0x9780ffde,
-0xcd000040,
-0x7c40c000,
-0x80000018,
-0x7c410000,
-0xd4000340,
-0xd4000fc0,
-0xd4000fa2,
-0xc818000e,
-0x8000000c,
-0x31980002,
-0xd40003c0,
-0xd4000fc0,
-0xd4000fa2,
-0xc818000e,
-0x288c0008,
-0x30cc000f,
-0x34100001,
-0x7d0d0008,
-0x8000000c,
-0x7d91800b,
-0xcc800040,
-0xd0400040,
-0x7c408000,
-0xa0000000,
-0x7e82800b,
-0xd4000340,
-0xd4000fc0,
-0xd4000fa2,
-0xcc800040,
-0xd0400040,
-0x7c408000,
-0xa0000000,
-0x7e82800b,
-0xd40003c0,
-0xd4000fc0,
-0xd4000fa2,
-0xcc800040,
-0xd0400040,
-0x7c408000,
-0xa0000000,
-0x7e82800b,
-0xcc4003f9,
-0x80000249,
-0xcc4003f8,
-0xc037ffff,
-0x7c414000,
-0xcf41a29e,
-0xc82003f8,
-0xc81c03f9,
-0x66200020,
-0xc81803fb,
-0x7de1c02c,
-0x7d58c008,
-0x7cdcc020,
-0x69100020,
-0xc0360003,
-0xcc000054,
-0x7cb4800c,
-0x80000069,
-0xcc800040,
-0x7c418000,
-0xcd81a29e,
-0xcc800040,
-0x80000067,
-0xcd800040,
-0xc019ffff,
-0xcc800040,
-0xcd81a29e,
-0x7c40c000,
-0x7c410000,
-0x7c414000,
-0xccc1a1fa,
-0xcd01a1f9,
-0xcd41a29d,
-0xccc00040,
-0xcd000040,
-0xcd400040,
-0xcc400040,
-0x7c408000,
-0xa0000000,
-0x7e82800b,
-0xcc000054,
-0xcc800040,
-0x7c40c000,
-0x7c410000,
-0x7c414000,
-0xccc1a1fa,
-0xcd01a1f9,
-0xcd41a29d,
-0xccc00040,
-0xcd000040,
-0xcd400040,
-0xd0400040,
-0x7c408000,
-0xa0000000,
-0x7e82800b,
-0x7c40c000,
-0x30d00001,
-0xccc1a29f,
-0x95000003,
-0x04140001,
-0x04140002,
-0xcd4003fb,
-0xcc800040,
-0x80000000,
-0xccc00040,
-0x7c40c000,
-0xcc800040,
-0xccc1a2a2,
-0x80000000,
-0xccc00040,
-0x7c40c000,
-0x28d4001f,
-0xcc800040,
-0x95400003,
-0x7c410000,
-0xccc00057,
-0x2918001f,
-0xccc00040,
-0x95800003,
-0xcd000040,
-0xcd000058,
-0x80000249,
-0xcc00007f,
-0xc8200017,
-0xc8300022,
-0x9a000006,
-0x0e280001,
-0xc824001e,
-0x0a640001,
-0xd4001240,
-0xce400040,
-0xc036c000,
-0x96800007,
-0x37747900,
-0x041c0001,
-0xcf400040,
-0xcdc00040,
-0xcf0003fa,
-0x7c030000,
-0xca0c0010,
-0x7c410000,
-0x94c00004,
-0x7c414000,
-0xd42002c4,
-0xcde00044,
-0x9b00000b,
-0x7c418000,
-0xcc00004b,
-0xcda00049,
-0xcd200041,
-0xcd600041,
-0xcda00041,
-0x06200001,
-0xce000056,
-0x80000249,
-0xcc00007f,
-0xc8280020,
-0xc82c0021,
-0xcc000063,
-0x7eea4001,
-0x65740020,
-0x7f53402c,
-0x269c0002,
-0x7df5c020,
-0x69f80020,
-0xce80004b,
-0xce600049,
-0xcde00041,
-0xcfa00041,
-0xce600041,
-0x271c0002,
-0x7df5c020,
-0x69f80020,
-0x7db24001,
-0xcf00004b,
-0xce600049,
-0xcde00041,
-0xcfa00041,
-0x800000bc,
-0xce600041,
-0xc8200017,
-0xc8300022,
-0x9a000006,
-0x0e280001,
-0xc824001e,
-0x0a640001,
-0xd4001240,
-0xce400040,
-0xca0c0010,
-0x7c410000,
-0x94c0000b,
-0xc036c000,
-0x96800007,
-0x37747900,
-0x041c0001,
-0xcf400040,
-0xcdc00040,
-0xcf0003fa,
-0x7c030000,
-0x800000b5,
-0x7c414000,
-0xcc000048,
-0x800000ee,
-0x00000000,
-0xc8200017,
-0xc81c0023,
-0x0e240002,
-0x99c00015,
-0x7c418000,
-0x0a200001,
-0xce000056,
-0xd4000440,
-0xcc000040,
-0xc036c000,
-0xca140013,
-0x96400007,
-0x37747900,
-0xcf400040,
-0xcc000040,
-0xc83003fa,
-0x80000103,
-0xcf000022,
-0xcc000022,
-0x95400146,
-0xcc00007f,
-0xcca00046,
-0x80000000,
-0xcc200046,
-0x80000249,
-0xcc000064,
-0xc8200017,
-0xc810001f,
-0x96000005,
-0x09100001,
-0xd4000440,
-0xcd000040,
-0xcd000022,
-0xcc800040,
-0xd0400040,
-0xc80c0025,
-0x94c0feec,
-0xc8100008,
-0xcd000040,
-0xd4000fc0,
-0x80000000,
-0xd4000fa2,
-0x7c40c000,
-0x7c410000,
-0xccc003fd,
-0xcd0003fc,
-0xccc00042,
-0xcd000042,
-0x2914001f,
-0x29180010,
-0x31980007,
-0x3b5c0001,
-0x7d76000b,
-0x99800005,
-0x7d5e400b,
-0xcc000042,
-0x80000249,
-0xcc00004d,
-0x29980001,
-0x292c0008,
-0x9980003d,
-0x32ec0001,
-0x96000004,
-0x2930000c,
-0x80000249,
-0xcc000042,
-0x04140010,
-0xcd400042,
-0x33300001,
-0x34280001,
-0x8400015d,
-0xc8140003,
-0x9b40001b,
-0x0438000c,
-0x8400015d,
-0xc8140003,
-0x9b400017,
-0x04380008,
-0x8400015d,
-0xc8140003,
-0x9b400013,
-0x04380004,
-0x8400015d,
-0xc8140003,
-0x9b400015,
-0xc80c03fd,
-0x9a800009,
-0xc81003fc,
-0x9b000101,
-0xcc00004d,
-0x04140010,
-0xccc00042,
-0xcd000042,
-0x80000135,
-0xcd400042,
-0x96c000fa,
-0xcc00004d,
-0x80000249,
-0xcc00004e,
-0x9ac00003,
-0xcc00004d,
-0xcc00004e,
-0xdf830000,
-0x80000000,
-0xd80301ff,
-0x9ac000f0,
-0xcc00004d,
-0x80000249,
-0xcc00004e,
-0xc8180003,
-0xc81c0003,
-0xc8200003,
-0x7d5d4003,
-0x7da1c003,
-0x7d5d400c,
-0x2a10001f,
-0x299c001f,
-0x7d1d000b,
-0x7d17400b,
-0x88000000,
-0x7e92800b,
-0x96400004,
-0xcc00004e,
-0x80000249,
-0xcc000042,
-0x04380008,
-0xcf800042,
-0xc8080003,
-0xc80c0003,
-0xc8100003,
-0xc8140003,
-0xc8180003,
-0xc81c0003,
-0xc8240003,
-0xc8280003,
-0x29fc001f,
-0x2ab0001f,
-0x7ff3c00b,
-0x28f0001f,
-0x7ff3c00b,
-0x2970001f,
-0x7ff3c00b,
-0x7d888001,
-0x7dccc001,
-0x7e510001,
-0x7e954001,
-0x7c908002,
-0x7cd4c002,
-0x7cbc800b,
-0x9ac00003,
-0x7c8f400b,
-0x38b40001,
-0x9b4000c1,
-0xcc00004d,
-0x9bc000bf,
-0xcc00004e,
-0xc80c03fd,
-0xc81003fc,
-0xccc00042,
-0x8000016e,
-0xcd000042,
-0xd4000340,
-0xd4000fc0,
-0xd4000fa2,
-0xcc800040,
-0xcc400040,
-0xcc400040,
-0xcc400040,
-0x7c40c000,
-0xccc00040,
-0xccc0000d,
-0x80000000,
-0xd0400040,
-0x7c40c000,
-0x7c410000,
-0x65140020,
-0x7d4d402c,
-0x24580002,
-0x7d598020,
-0x7c41c000,
-0xcd800042,
-0x69980020,
-0xcd800042,
-0xcdc00042,
-0xc023c000,
-0x05e40002,
-0x7ca0800b,
-0x26640010,
-0x7ca4800c,
-0xcc800040,
-0xcdc00040,
-0xccc00040,
-0x95c0000e,
-0xcd000040,
-0x09dc0001,
-0xc8280003,
-0x96800008,
-0xce800040,
-0xc834001d,
-0x97400000,
-0xc834001d,
-0x26a80008,
-0x8400024c,
-0xcc2b0000,
-0x99c0fff7,
-0x09dc0001,
-0xdc3a0000,
-0x97800004,
-0x7c418000,
-0x800001a2,
-0x25980002,
-0xa0000000,
-0x7d808000,
-0xc818001d,
-0x7c40c000,
-0x64d00008,
-0x95800000,
-0xc818001d,
-0xcc130000,
-0xcc800040,
-0xccc00040,
-0x80000000,
-0xcc400040,
-0xc810001f,
-0x7c40c000,
-0xcc800040,
-0x7cd1400c,
-0xcd400040,
-0x05180001,
-0x80000000,
-0xcd800022,
-0x7c40c000,
-0x64500020,
-0x8400024c,
-0xcc000061,
-0x7cd0c02c,
-0xc8200017,
-0xc8d60000,
-0x99400008,
-0x7c438000,
-0xdf830000,
-0xcfa0004f,
-0x8400024c,
-0xcc000062,
-0x80000000,
-0xd040007f,
-0x80000249,
-0xcc000062,
-0x8400024c,
-0xcc000061,
-0xc8200017,
-0x7c40c000,
-0xc036ff00,
-0xc810000d,
-0xc0303fff,
-0x7cf5400b,
-0x7d51800b,
-0x7d81800f,
-0x99800008,
-0x7cf3800b,
-0xdf830000,
-0xcfa0004f,
-0x8400024c,
-0xcc000062,
-0x80000000,
-0xd040007f,
-0x80000249,
-0xcc000062,
-0x8400024c,
-0x7c40c000,
-0x28dc0008,
-0x95c00019,
-0x30dc0010,
-0x7c410000,
-0x99c00004,
-0x64540020,
-0x80000208,
-0xc91d0000,
-0x7d15002c,
-0xc91e0000,
-0x7c420000,
-0x7c424000,
-0x7c418000,
-0x7de5c00b,
-0x7de28007,
-0x9a80000e,
-0x41ac0005,
-0x9ac00000,
-0x0aec0001,
-0x30dc0010,
-0x99c00004,
-0x00000000,
-0x8000020b,
-0xc91d0000,
-0x8000020b,
-0xc91e0000,
-0xcc800040,
-0xccc00040,
-0xd0400040,
-0xc80c0025,
-0x94c0fde4,
-0xc8100008,
-0xcd000040,
-0xd4000fc0,
-0x80000000,
-0xd4000fa2,
-0xd4000340,
-0xd4000fc0,
-0xd4000fa2,
-0xcc800040,
-0xd0400040,
-0x7c408000,
-0xa0000000,
-0x7e82800b,
-0xd40003c0,
-0xd4000fc0,
-0xd4000fa2,
-0xcc800040,
-0xd0400040,
-0x7c408000,
-0xa0000000,
-0x7e82800b,
-0x7c40c000,
-0x30d00006,
-0x0d100006,
-0x99000007,
-0xc8140015,
-0x99400005,
-0xcc000052,
-0xd4000340,
-0xd4000fc0,
-0xd4000fa2,
-0xcc800040,
-0xccc00040,
-0x80000000,
-0xd0400040,
-0x7c40c000,
-0xcc4d0000,
-0xdc3a0000,
-0x9780fdbd,
-0x04cc0001,
-0x80000242,
-0xcc4d0000,
-0x80000000,
-0xd040007f,
-0xcc00007f,
-0x80000000,
-0xcc00007f,
-0xcc00007f,
-0x88000000,
-0xcc00007f,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00000000,
-0x00030222,
-0x0004022a,
-0x0005009f,
-0x00020003,
-0x0006003c,
-0x00070027,
-0x00080191,
-0x00090044,
-0x000a002d,
-0x00100247,
-0x001700f0,
-0x002201d7,
-0x002301e8,
-0x0026004c,
-0x0027005f,
-0x0020011a,
-0x00280092,
-0x0029004f,
-0x002a0083,
-0x002b0064,
-0x002f008d,
-0x003200d8,
-0x00340232,
-0x00360074,
-0x0039010a,
-0x003c01fc,
-0x003f009f,
-0x00410005,
-0x00440194,
-0x0048019d,
-0x004901c5,
-0x004a01cf,
-0x00550225,
-0x0056022d,
-0x0060000a,
-0x0061002a,
-0x00620030,
-0x00630030,
-0x00640030,
-0x00650030,
-0x00660030,
-0x00670030,
-0x00680037,
-0x0069003f,
-0x006a0047,
-0x006b0047,
-0x006c0047,
-0x006d0047,
-0x006e0047,
-0x006f0047,
-0x00700047,
-0x00730247,
-0x007b0240,
-0x00000005,
-0x00000005,
-0x00000005,
-0x00000005,
-0x00000005,
-0x00000005,
-0x00000005,
-0x00000005,
-0x00000005,
-0x00000005,
-0x00000005,
-0x00000005,
-0x00000005,
-0x00000005,
-0x00000005,
-0x00000005,
-0x00000005,
-0x00000005,
-0x00000005,
-0x00000005,
-0x00000005,
-0x00000005,
-0x00000005,
-0x00000005,
-0x00000005,
-0x00000005,
-0x00000005,
-};
-static const u32 RV710_cp_microcode[] = {
-0xcc0003ea,
-0x04080003,
-0xcc800043,
-0x7c408000,
-0xa0000000,
-0xcc800062,
-0x80000003,
-0xd040007f,
-0x80000003,
-0xcc400041,
-0x7c40c000,
-0xc0160004,
-0x30d03fff,
-0x7d15000c,
-0xcc110000,
-0x28d8001e,
-0x31980001,
-0x28dc001f,
-0xc8200004,
-0x95c00006,
-0x7c424000,
-0xcc000062,
-0x7e56800c,
-0xcc290000,
-0xc8240004,
-0x7e26000b,
-0x95800006,
-0x7c42c000,
-0xcc000062,
-0x7ed7000c,
-0xcc310000,
-0xc82c0004,
-0x7e2e000c,
-0xcc000062,
-0x31103fff,
-0x80000003,
-0xce110000,
-0x7c40c000,
-0x80000003,
-0xcc400040,
-0x80000003,
-0xcc412257,
-0x7c418000,
-0xcc400045,
-0xcc400048,
-0xcc41225c,
-0xcc41a1fc,
-0x7c408000,
-0xa0000000,
-0xcc800062,
-0xcc400045,
-0xcc400048,
-0x7c40c000,
-0xcc41225c,
-0xcc41a1fc,
-0x7c408000,
-0xa0000000,
-0xcc800062,
-0xcc000045,
-0xcc000048,
-0xcc41225c,
-0xcc41a1fc,
-0x7c408000,
-0xa0000000,
-0xcc800062,
-0x040ca1fd,
-0xc0120001,
-0xcc000045,
-0xcc000048,
-0x7cd0c00c,
-0xcc41225c,
-0xcc41a1fc,
-0xd04d0000,
-0x7c408000,
-0xa0000000,
-0xcc800062,
-0x80000003,
-0xcc41225d,
-0x7c408000,
-0x7c40c000,
-0xc02a0002,
-0x7c410000,
-0x7d29000c,
-0x30940001,
-0x30980006,
-0x309c0300,
-0x29dc0008,
-0x7c420000,
-0x7c424000,
-0x9540000f,
-0xc02e0004,
-0x05f02258,
-0x7f2f000c,
-0xcc310000,
-0xc8280004,
-0xccc12169,
-0xcd01216a,
-0xce81216b,
-0x0db40002,
-0xcc01216c,
-0x9740000e,
-0x0db40000,
-0x8000007d,
-0xc834000a,
-0x0db40002,
-0x97400009,
-0x0db40000,
-0xc02e0004,
-0x05f02258,
-0x7f2f000c,
-0xcc310000,
-0xc8280004,
-0x8000007d,
-0xc834000a,
-0x97400004,
-0x7e028000,
-0x8000007d,
-0xc834000a,
-0x0db40004,
-0x9740ff8c,
-0x00000000,
-0xce01216d,
-0xce41216e,
-0xc8280003,
-0xc834000a,
-0x9b400004,
-0x043c0005,
-0x8400026d,
-0xcc000062,
-0x0df40000,
-0x9740000b,
-0xc82c03e6,
-0xce81a2b7,
-0xc0300006,
-0x7ef34028,
-0xc0300020,
-0x7f6b8020,
-0x7fb3c029,
-0xcf81a2c4,
-0x80000003,
-0xcfc1a2d1,
-0x0df40001,
-0x9740000b,
-0xc82c03e7,
-0xce81a2bb,
-0xc0300006,
-0x7ef34028,
-0xc0300020,
-0x7f6b8020,
-0x7fb3c029,
-0xcf81a2c5,
-0x80000003,
-0xcfc1a2d2,
-0x0df40002,
-0x9740000b,
-0xc82c03e8,
-0xce81a2bf,
-0xc0300006,
-0x7ef34028,
-0xc0300020,
-0x7f6b8020,
-0x7fb3c029,
-0xcf81a2c6,
-0x80000003,
-0xcfc1a2d3,
-0xc82c03e9,
-0xce81a2c3,
-0xc0300006,
-0x7ef34028,
-0xc0300020,
-0x7f6b8020,
-0x7fb3c029,
-0xcf81a2c7,
-0x80000003,
-0xcfc1a2d4,
-0x80000003,
-0xcc400042,
-0x7c40c000,
-0x7c410000,
-0x2914001d,
-0x31540001,
-0x9940000c,
-0x31181000,
-0xc81c0011,
-0x95c00000,
-0xc81c0011,
-0xccc12100,
-0xcd012101,
-0xccc12102,
-0xcd012103,
-0x04180004,
-0x8000037e,
-0xcd81a2a4,
-0xc02a0004,
-0x95800008,
-0x36a821a3,
-0xcc290000,
-0xc8280004,
-0xc81c0011,
-0x0de40040,
-0x9640ffff,
-0xc81c0011,
-0xccc12170,
-0xcd012171,
-0xc8200012,
-0x96000000,
-0xc8200012,
-0x8000037e,
-0xcc000064,
-0x7c40c000,
-0x7c410000,
-0xcc000045,
-0xcc000048,
-0x40d40003,
-0xcd41225c,
-0xcd01a1fc,
-0xc01a0001,
-0x041ca1fd,
-0x7dd9c00c,
-0x7c420000,
-0x08cc0001,
-0x06240001,
-0x06280002,
-0xce1d0000,
-0xce5d0000,
-0x98c0fffa,
-0xce9d0000,
-0x7c408000,
-0xa0000000,
-0xcc800062,
-0x7c40c000,
-0x30d00001,
-0x28cc0001,
-0x7c414000,
-0x95000006,
-0x7c418000,
-0xcd41216d,
-0xcd81216e,
-0x800000f4,
-0xc81c0003,
-0xc0220004,
-0x7e16000c,
-0xcc210000,
-0xc81c0004,
-0x7c424000,
-0x98c00004,
-0x7c428000,
-0x80000003,
-0xcde50000,
-0xce412169,
-0xce81216a,
-0xcdc1216b,
-0x80000003,
-0xcc01216c,
-0x7c40c000,
-0x7c410000,
-0x7c414000,
-0x7c418000,
-0x7c41c000,
-0x28a40008,
-0x326400ff,
-0x0e68003c,
-0x9680000a,
-0x7c020000,
-0x7c420000,
-0x1e300003,
-0xcc00006a,
-0x9b000003,
-0x42200005,
-0x04200040,
-0x80000111,
-0x7c024000,
-0x7e024000,
-0x9a400000,
-0x0a640001,
-0x30ec0010,
-0x9ac0000a,
-0xcc000062,
-0xc02a0004,
-0xc82c0021,
-0x7e92800c,
-0xcc000041,
-0xcc290000,
-0xcec00021,
-0x80000121,
-0xc8300004,
-0xcd01216d,
-0xcd41216e,
-0xc8300003,
-0x7f1f000b,
-0x30f40007,
-0x27780001,
-0x9740002a,
-0x07b80126,
-0x9f800000,
-0x00000000,
-0x80000136,
-0x7f1b8004,
-0x8000013a,
-0x7f1b8005,
-0x8000013e,
-0x7f1b8002,
-0x80000142,
-0x7f1b8003,
-0x80000146,
-0x7f1b8007,
-0x8000014a,
-0x7f1b8006,
-0x8000014f,
-0x28a40008,
-0x9b800019,
-0x28a40008,
-0x8000015f,
-0x326400ff,
-0x9b800015,
-0x28a40008,
-0x8000015f,
-0x326400ff,
-0x9b800011,
-0x28a40008,
-0x8000015f,
-0x326400ff,
-0x9b80000d,
-0x28a40008,
-0x8000015f,
-0x326400ff,
-0x9b800009,
-0x28a40008,
-0x8000015f,
-0x326400ff,
-0x9b800005,
-0x28a40008,
-0x8000015f,
-0x326400ff,
-0x28a40008,
-0x326400ff,
-0x0e68003c,
-0x9a80feb2,
-0x28ec0008,
-0x7c434000,
-0x7c438000,
-0x7c43c000,
-0x96c00007,
-0xcc000062,
-0xcf412169,
-0xcf81216a,
-0xcfc1216b,
-0x80000003,
-0xcc01216c,
-0x80000003,
-0xcff50000,
-0xcc00006b,
-0x84000381,
-0x0e68003c,
-0x9a800004,
-0xc8280015,
-0x80000003,
-0xd040007f,
-0x9680ffab,
-0x7e024000,
-0x8400023b,
-0xc00e0002,
-0xcc000041,
-0x80000239,
-0xccc1304a,
-0x7c40c000,
-0x7c410000,
-0xc01e0001,
-0x29240012,
-0xc0220002,
-0x96400005,
-0xc0260004,
-0xc027fffb,
-0x7d25000b,
-0xc0260000,
-0x7dd2800b,
-0x7e12c00b,
-0x7d25000c,
-0x7c414000,
-0x7c418000,
-0xccc12169,
-0x9a80000a,
-0xcd01216a,
-0xcd41216b,
-0x96c0fe83,
-0xcd81216c,
-0xc8300018,
-0x97000000,
-0xc8300018,
-0x80000003,
-0xcc000018,
-0x84000381,
-0xcc00007f,
-0xc8140013,
-0xc8180014,
-0xcd41216b,
-0x96c0fe77,
-0xcd81216c,
-0x80000183,
-0xc8300018,
-0xc80c0008,
-0x98c00000,
-0xc80c0008,
-0x7c410000,
-0x95000002,
-0x00000000,
-0x7c414000,
-0xc8200009,
-0xcc400043,
-0xce01a1f4,
-0xcc400044,
-0xc00e8000,
-0x7c424000,
-0x7c428000,
-0x2aac001f,
-0x96c0fe64,
-0xc035f000,
-0xce4003e2,
-0x32780003,
-0x267c0008,
-0x7ff7c00b,
-0x7ffbc00c,
-0x2a780018,
-0xcfc003e3,
-0xcf8003e4,
-0x26b00002,
-0x7f3f0000,
-0xcf0003e5,
-0x8000031f,
-0x7c80c000,
-0x7c40c000,
-0x28d00008,
-0x3110000f,
-0x9500000f,
-0x25280001,
-0x06a801b4,
-0x9e800000,
-0x00000000,
-0x800001d5,
-0xc0120800,
-0x800001e3,
-0xc814000f,
-0x800001ea,
-0xc8140010,
-0x800001f1,
-0xccc1a2a4,
-0x800001fa,
-0xc8140011,
-0x30d0003f,
-0x0d280015,
-0x9a800012,
-0x0d28001e,
-0x9a80001e,
-0x0d280020,
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-};
-#endif
diff --git a/drivers/gpu/drm/radeon/r600d.h b/drivers/gpu/drm/radeon/r600d.h
new file mode 100644
index 000000000000..4a9028a85c9b
--- /dev/null
+++ b/drivers/gpu/drm/radeon/r600d.h
@@ -0,0 +1,662 @@
+/*
+ * Copyright 2009 Advanced Micro Devices, Inc.
+ * Copyright 2009 Red Hat Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors: Dave Airlie
+ *          Alex Deucher
+ *          Jerome Glisse
+ */
+#ifndef R600D_H
+#define R600D_H
+#define CP_PACKET2                      0x80000000
+#define         PACKET2_PAD_SHIFT               0
+#define         PACKET2_PAD_MASK                (0x3fffffff << 0)
+#define PACKET2(v)      (CP_PACKET2 | REG_SET(PACKET2_PAD, (v)))
+#define R6XX_MAX_SH_GPRS                        256
+#define R6XX_MAX_TEMP_GPRS                      16
+#define R6XX_MAX_SH_THREADS                     256
+#define R6XX_MAX_SH_STACK_ENTRIES               4096
+#define R6XX_MAX_BACKENDS                       8
+#define R6XX_MAX_BACKENDS_MASK                  0xff
+#define R6XX_MAX_SIMDS                          8
+#define R6XX_MAX_SIMDS_MASK                     0xff
+#define R6XX_MAX_PIPES                          8
+#define R6XX_MAX_PIPES_MASK                     0xff
+/* PTE flags */
+#define PTE_VALID                               (1 << 0)
+#define PTE_SYSTEM                              (1 << 1)
+#define PTE_SNOOPED                             (1 << 2)
+#define PTE_READABLE                            (1 << 5)
+#define PTE_WRITEABLE                           (1 << 6)
+/* Registers */
+#define ARB_POP                                         0x2418
+#define         ENABLE_TC128                                    (1 << 30)
+#define ARB_GDEC_RD_CNTL                                0x246C
+#define CC_GC_SHADER_PIPE_CONFIG                        0x8950
+#define CC_RB_BACKEND_DISABLE                           0x98F4
+#define         BACKEND_DISABLE(x)                              ((x) << 16)
+#define CB_COLOR0_BASE                                  0x28040
+#define CB_COLOR1_BASE                                  0x28044
+#define CB_COLOR2_BASE                                  0x28048
+#define CB_COLOR3_BASE                                  0x2804C
+#define CB_COLOR4_BASE                                  0x28050
+#define CB_COLOR5_BASE                                  0x28054
+#define CB_COLOR6_BASE                                  0x28058
+#define CB_COLOR7_BASE                                  0x2805C
+#define CB_COLOR7_FRAG                                  0x280FC
+#define CB_COLOR0_SIZE                                  0x28060
+#define CB_COLOR0_VIEW                                  0x28080
+#define CB_COLOR0_INFO                                  0x280a0
+#define CB_COLOR0_TILE                                  0x280c0
+#define CB_COLOR0_FRAG                                  0x280e0
+#define CB_COLOR0_MASK                                  0x28100
+#define CONFIG_MEMSIZE                                  0x5428
+#define CONFIG_CNTL                                     0x5424
+#define CP_STAT                                         0x8680
+#define CP_COHER_BASE                                   0x85F8
+#define CP_DEBUG                                        0xC1FC
+#define R_0086D8_CP_ME_CNTL                     0x86D8
+#define         S_0086D8_CP_ME_HALT(x)                  (((x) & 1)<<28)
+#define         C_0086D8_CP_ME_HALT(x)                  ((x) & 0xEFFFFFFF)
+#define CP_ME_RAM_DATA                                  0xC160
+#define CP_ME_RAM_RADDR                                 0xC158
+#define CP_ME_RAM_WADDR                                 0xC15C
+#define CP_MEQ_THRESHOLDS                               0x8764
+#define         MEQ_END(x)                                      ((x) << 16)
+#define         ROQ_END(x)                                      ((x) << 24)
+#define CP_PERFMON_CNTL                                 0x87FC
+#define CP_PFP_UCODE_ADDR                               0xC150
+#define CP_PFP_UCODE_DATA                               0xC154
+#define CP_QUEUE_THRESHOLDS                             0x8760
+#define         ROQ_IB1_START(x)                                ((x) << 0)
+#define         ROQ_IB2_START(x)                                ((x) << 8)
+#define CP_RB_BASE                                      0xC100
+#define CP_RB_CNTL                                      0xC104
+#define         RB_BUFSZ(x)                                     ((x)<<0)
+#define         RB_BLKSZ(x)                                     ((x)<<8)
+#define         RB_NO_UPDATE                                    (1<<27)
+#define         RB_RPTR_WR_ENA                                  (1<<31)
+#define         BUF_SWAP_32BIT                                  (2 << 16)
+#define CP_RB_RPTR                                      0x8700
+#define CP_RB_RPTR_ADDR                                 0xC10C
+#define CP_RB_RPTR_ADDR_HI                              0xC110
+#define CP_RB_RPTR_WR                                   0xC108
+#define CP_RB_WPTR                                      0xC114
+#define CP_RB_WPTR_ADDR                                 0xC118
+#define CP_RB_WPTR_ADDR_HI                              0xC11C
+#define CP_RB_WPTR_DELAY                                0x8704
+#define CP_ROQ_IB1_STAT                                 0x8784
+#define CP_ROQ_IB2_STAT                                 0x8788
+#define CP_SEM_WAIT_TIMER                               0x85BC
+#define DB_DEBUG                                        0x9830
+#define         PREZ_MUST_WAIT_FOR_POSTZ_DONE                   (1 << 31)
+#define DB_DEPTH_BASE                                   0x2800C
+#define DB_WATERMARKS                                   0x9838
+#define         DEPTH_FREE(x)                                   ((x) << 0)
+#define         DEPTH_FLUSH(x)                                  ((x) << 5)
+#define         DEPTH_PENDING_FREE(x)                           ((x) << 15)
+#define         DEPTH_CACHELINE_FREE(x)                         ((x) << 20)
+#define DCP_TILING_CONFIG                               0x6CA0
+#define         PIPE_TILING(x)                                  ((x) << 1)
+#define         BANK_TILING(x)                                  ((x) << 4)
+#define         GROUP_SIZE(x)                                   ((x) << 6)
+#define         ROW_TILING(x)                                   ((x) << 8)
+#define         BANK_SWAPS(x)                                   ((x) << 11)
+#define         SAMPLE_SPLIT(x)                                 ((x) << 14)
+#define         BACKEND_MAP(x)                                  ((x) << 16)
+#define GB_TILING_CONFIG                                0x98F0
+#define GC_USER_SHADER_PIPE_CONFIG                      0x8954
+#define         INACTIVE_QD_PIPES(x)                            ((x) << 8)
+#define         INACTIVE_QD_PIPES_MASK                          0x0000FF00
+#define         INACTIVE_SIMDS(x)                               ((x) << 16)
+#define         INACTIVE_SIMDS_MASK                             0x00FF0000
+#define SQ_CONFIG                                         0x8c00
+#       define VC_ENABLE                                  (1 << 0)
+#       define EXPORT_SRC_C                               (1 << 1)
+#       define DX9_CONSTS                                 (1 << 2)
+#       define ALU_INST_PREFER_VECTOR                     (1 << 3)
+#       define DX10_CLAMP                                 (1 << 4)
+#       define CLAUSE_SEQ_PRIO(x)                         ((x) << 8)
+#       define PS_PRIO(x)                                 ((x) << 24)
+#       define VS_PRIO(x)                                 ((x) << 26)
+#       define GS_PRIO(x)                                 ((x) << 28)
+#       define ES_PRIO(x)                                 ((x) << 30)
+#define SQ_GPR_RESOURCE_MGMT_1                            0x8c04
+#       define NUM_PS_GPRS(x)                             ((x) << 0)
+#       define NUM_VS_GPRS(x)                             ((x) << 16)
+#       define NUM_CLAUSE_TEMP_GPRS(x)                    ((x) << 28)
+#define SQ_GPR_RESOURCE_MGMT_2                            0x8c08
+#       define NUM_GS_GPRS(x)                             ((x) << 0)
+#       define NUM_ES_GPRS(x)                             ((x) << 16)
+#define SQ_THREAD_RESOURCE_MGMT                           0x8c0c
+#       define NUM_PS_THREADS(x)                          ((x) << 0)
+#       define NUM_VS_THREADS(x)                          ((x) << 8)
+#       define NUM_GS_THREADS(x)                          ((x) << 16)
+#       define NUM_ES_THREADS(x)                          ((x) << 24)
+#define SQ_STACK_RESOURCE_MGMT_1                          0x8c10
+#       define NUM_PS_STACK_ENTRIES(x)                    ((x) << 0)
+#       define NUM_VS_STACK_ENTRIES(x)                    ((x) << 16)
+#define SQ_STACK_RESOURCE_MGMT_2                          0x8c14
+#       define NUM_GS_STACK_ENTRIES(x)                    ((x) << 0)
+#       define NUM_ES_STACK_ENTRIES(x)                    ((x) << 16)
+#define GRBM_CNTL                                       0x8000
+#       define GRBM_READ_TIMEOUT(x)                     ((x) << 0)
+#define GRBM_STATUS                                     0x8010
+#define         CMDFIFO_AVAIL_MASK                              0x0000001F
+#define         GUI_ACTIVE                                      (1<<31)
+#define GRBM_STATUS2                                    0x8014
+#define GRBM_SOFT_RESET                                 0x8020
+#define         SOFT_RESET_CP                                   (1<<0)
+#define HDP_HOST_PATH_CNTL                              0x2C00
+#define HDP_NONSURFACE_BASE                             0x2C04
+#define HDP_NONSURFACE_INFO                             0x2C08
+#define HDP_NONSURFACE_SIZE                             0x2C0C
+#define HDP_REG_COHERENCY_FLUSH_CNTL                    0x54A0
+#define HDP_TILING_CONFIG                               0x2F3C
+#define MC_VM_AGP_TOP                                   0x2184
+#define MC_VM_AGP_BOT                                   0x2188
+#define MC_VM_AGP_BASE                                  0x218C
+#define MC_VM_FB_LOCATION                               0x2180
+#define MC_VM_L1_TLB_MCD_RD_A_CNTL                      0x219C
+#define         ENABLE_L1_TLB                                   (1 << 0)
+#define         ENABLE_L1_FRAGMENT_PROCESSING                   (1 << 1)
+#define         ENABLE_L1_STRICT_ORDERING                       (1 << 2)
+#define         SYSTEM_ACCESS_MODE_MASK                         0x000000C0
+#define         SYSTEM_ACCESS_MODE_SHIFT                        6
+#define         SYSTEM_ACCESS_MODE_PA_ONLY                      (0 << 6)
+#define         SYSTEM_ACCESS_MODE_USE_SYS_MAP                  (1 << 6)
+#define         SYSTEM_ACCESS_MODE_IN_SYS                       (2 << 6)
+#define         SYSTEM_ACCESS_MODE_NOT_IN_SYS                   (3 << 6)
+#define         SYSTEM_APERTURE_UNMAPPED_ACCESS_PASS_THRU       (0 << 8)
+#define         SYSTEM_APERTURE_UNMAPPED_ACCESS_DEFAULT_PAGE    (1 << 8)
+#define         ENABLE_SEMAPHORE_MODE                           (1 << 10)
+#define         ENABLE_WAIT_L2_QUERY                            (1 << 11)
+#define         EFFECTIVE_L1_TLB_SIZE(x)                        (((x) & 7) << 12)
+#define         EFFECTIVE_L1_TLB_SIZE_MASK                      0x00007000
+#define         EFFECTIVE_L1_TLB_SIZE_SHIFT                     12
+#define         EFFECTIVE_L1_QUEUE_SIZE(x)                      (((x) & 7) << 15)
+#define         EFFECTIVE_L1_QUEUE_SIZE_MASK                    0x00038000
+#define         EFFECTIVE_L1_QUEUE_SIZE_SHIFT                   15
+#define MC_VM_L1_TLB_MCD_RD_B_CNTL                      0x21A0
+#define MC_VM_L1_TLB_MCB_RD_GFX_CNTL                    0x21FC
+#define MC_VM_L1_TLB_MCB_RD_HDP_CNTL                    0x2204
+#define MC_VM_L1_TLB_MCB_RD_PDMA_CNTL                   0x2208
+#define MC_VM_L1_TLB_MCB_RD_SEM_CNTL                    0x220C
+#define MC_VM_L1_TLB_MCB_RD_SYS_CNTL                    0x2200
+#define MC_VM_L1_TLB_MCD_WR_A_CNTL                      0x21A4
+#define MC_VM_L1_TLB_MCD_WR_B_CNTL                      0x21A8
+#define MC_VM_L1_TLB_MCB_WR_GFX_CNTL                    0x2210
+#define MC_VM_L1_TLB_MCB_WR_HDP_CNTL                    0x2218
+#define MC_VM_L1_TLB_MCB_WR_PDMA_CNTL                   0x221C
+#define MC_VM_L1_TLB_MCB_WR_SEM_CNTL                    0x2220
+#define MC_VM_L1_TLB_MCB_WR_SYS_CNTL                    0x2214
+#define MC_VM_SYSTEM_APERTURE_LOW_ADDR                  0x2190
+#define         LOGICAL_PAGE_NUMBER_MASK                        0x000FFFFF
+#define         LOGICAL_PAGE_NUMBER_SHIFT                       0
+#define MC_VM_SYSTEM_APERTURE_HIGH_ADDR                 0x2194
+#define MC_VM_SYSTEM_APERTURE_DEFAULT_ADDR              0x2198
+#define PA_CL_ENHANCE                                   0x8A14
+#define         CLIP_VTX_REORDER_ENA                            (1 << 0)
+#define         NUM_CLIP_SEQ(x)                                 ((x) << 1)
+#define PA_SC_AA_CONFIG                                 0x28C04
+#define PA_SC_AA_SAMPLE_LOCS_2S                         0x8B40
+#define PA_SC_AA_SAMPLE_LOCS_4S                         0x8B44
+#define PA_SC_AA_SAMPLE_LOCS_8S_WD0                     0x8B48
+#define PA_SC_AA_SAMPLE_LOCS_8S_WD1                     0x8B4C
+#define         S0_X(x)                                         ((x) << 0)
+#define         S0_Y(x)                                         ((x) << 4)
+#define         S1_X(x)                                         ((x) << 8)
+#define         S1_Y(x)                                         ((x) << 12)
+#define         S2_X(x)                                         ((x) << 16)
+#define         S2_Y(x)                                         ((x) << 20)
+#define         S3_X(x)                                         ((x) << 24)
+#define         S3_Y(x)                                         ((x) << 28)
+#define         S4_X(x)                                         ((x) << 0)
+#define         S4_Y(x)                                         ((x) << 4)
+#define         S5_X(x)                                         ((x) << 8)
+#define         S5_Y(x)                                         ((x) << 12)
+#define         S6_X(x)                                         ((x) << 16)
+#define         S6_Y(x)                                         ((x) << 20)
+#define         S7_X(x)                                         ((x) << 24)
+#define         S7_Y(x)                                         ((x) << 28)
+#define PA_SC_CLIPRECT_RULE                             0x2820c
+#define PA_SC_ENHANCE                                   0x8BF0
+#define         FORCE_EOV_MAX_CLK_CNT(x)                        ((x) << 0)
+#define         FORCE_EOV_MAX_TILE_CNT(x)                       ((x) << 12)
+#define PA_SC_LINE_STIPPLE                              0x28A0C
+#define PA_SC_LINE_STIPPLE_STATE                        0x8B10
+#define PA_SC_MODE_CNTL                                 0x28A4C
+#define PA_SC_MULTI_CHIP_CNTL                           0x8B20
+#define PA_SC_SCREEN_SCISSOR_TL                         0x28030
+#define PA_SC_GENERIC_SCISSOR_TL                        0x28240
+#define PA_SC_WINDOW_SCISSOR_TL                         0x28204
+#define PCIE_PORT_INDEX                                 0x0038
+#define PCIE_PORT_DATA                                  0x003C
+#define RAMCFG                                          0x2408
+#define         NOOFBANK_SHIFT                                  0
+#define         NOOFBANK_MASK                                   0x00000001
+#define         NOOFRANK_SHIFT                                  1
+#define         NOOFRANK_MASK                                   0x00000002
+#define         NOOFROWS_SHIFT                                  2
+#define         NOOFROWS_MASK                                   0x0000001C
+#define         NOOFCOLS_SHIFT                                  5
+#define         NOOFCOLS_MASK                                   0x00000060
+#define         CHANSIZE_SHIFT                                  7
+#define         CHANSIZE_MASK                                   0x00000080
+#define         BURSTLENGTH_SHIFT                               8
+#define         BURSTLENGTH_MASK                                0x00000100
+#define         CHANSIZE_OVERRIDE                               (1 << 10)
+#define SCRATCH_REG0                                    0x8500
+#define SCRATCH_REG1                                    0x8504
+#define SCRATCH_REG2                                    0x8508
+#define SCRATCH_REG3                                    0x850C
+#define SCRATCH_REG4                                    0x8510
+#define SCRATCH_REG5                                    0x8514
+#define SCRATCH_REG6                                    0x8518
+#define SCRATCH_REG7                                    0x851C
+#define SCRATCH_UMSK                                    0x8540
+#define SCRATCH_ADDR                                    0x8544
+#define SPI_CONFIG_CNTL                                 0x9100
+#define         GPR_WRITE_PRIORITY(x)                           ((x) << 0)
+#define         DISABLE_INTERP_1                                (1 << 5)
+#define SPI_CONFIG_CNTL_1                               0x913C
+#define         VTX_DONE_DELAY(x)                               ((x) << 0)
+#define         INTERP_ONE_PRIM_PER_ROW                         (1 << 4)
+#define SPI_INPUT_Z                                     0x286D8
+#define SPI_PS_IN_CONTROL_0                             0x286CC
+#define         NUM_INTERP(x)                                   ((x)<<0)
+#define         POSITION_ENA                                    (1<<8)
+#define         POSITION_CENTROID                               (1<<9)
+#define         POSITION_ADDR(x)                                ((x)<<10)
+#define         PARAM_GEN(x)                                    ((x)<<15)
+#define         PARAM_GEN_ADDR(x)                               ((x)<<19)
+#define         BARYC_SAMPLE_CNTL(x)                            ((x)<<26)
+#define         PERSP_GRADIENT_ENA                              (1<<28)
+#define         LINEAR_GRADIENT_ENA                             (1<<29)
+#define         POSITION_SAMPLE                                 (1<<30)
+#define         BARYC_AT_SAMPLE_ENA                             (1<<31)
+#define SPI_PS_IN_CONTROL_1                             0x286D0
+#define         GEN_INDEX_PIX                                   (1<<0)
+#define         GEN_INDEX_PIX_ADDR(x)                           ((x)<<1)
+#define         FRONT_FACE_ENA                                  (1<<8)
+#define         FRONT_FACE_CHAN(x)                              ((x)<<9)
+#define         FRONT_FACE_ALL_BITS                             (1<<11)
+#define         FRONT_FACE_ADDR(x)                              ((x)<<12)
+#define         FOG_ADDR(x)                                     ((x)<<17)
+#define         FIXED_PT_POSITION_ENA                           (1<<24)
+#define         FIXED_PT_POSITION_ADDR(x)                       ((x)<<25)
+#define SQ_MS_FIFO_SIZES                                0x8CF0
+#define         CACHE_FIFO_SIZE(x)                              ((x) << 0)
+#define         FETCH_FIFO_HIWATER(x)                           ((x) << 8)
+#define         DONE_FIFO_HIWATER(x)                            ((x) << 16)
+#define         ALU_UPDATE_FIFO_HIWATER(x)                      ((x) << 24)
+#define SQ_PGM_START_ES                                 0x28880
+#define SQ_PGM_START_FS                                 0x28894
+#define SQ_PGM_START_GS                                 0x2886C
+#define SQ_PGM_START_PS                                 0x28840
+#define SQ_PGM_RESOURCES_PS                             0x28850
+#define SQ_PGM_EXPORTS_PS                               0x28854
+#define SQ_PGM_CF_OFFSET_PS                             0x288cc
+#define SQ_PGM_START_VS                                 0x28858
+#define SQ_PGM_RESOURCES_VS                             0x28868
+#define SQ_PGM_CF_OFFSET_VS                             0x288d0
+#define SQ_VTX_CONSTANT_WORD6_0                         0x38018
+#define         S__SQ_VTX_CONSTANT_TYPE(x)                      (((x) & 3) << 30)
+#define         G__SQ_VTX_CONSTANT_TYPE(x)                      (((x) >> 30) & 3)
+#define                 SQ_TEX_VTX_INVALID_TEXTURE                      0x0
+#define                 SQ_TEX_VTX_INVALID_BUFFER                       0x1
+#define                 SQ_TEX_VTX_VALID_TEXTURE                        0x2
+#define                 SQ_TEX_VTX_VALID_BUFFER                         0x3
+#define SX_MISC                                         0x28350
+#define SX_DEBUG_1                                      0x9054
+#define         SMX_EVENT_RELEASE                               (1 << 0)
+#define         ENABLE_NEW_SMX_ADDRESS                          (1 << 16)
+#define TA_CNTL_AUX                                     0x9508
+#define         DISABLE_CUBE_WRAP                               (1 << 0)
+#define         DISABLE_CUBE_ANISO                              (1 << 1)
+#define         SYNC_GRADIENT                                   (1 << 24)
+#define         SYNC_WALKER                                     (1 << 25)
+#define         SYNC_ALIGNER                                    (1 << 26)
+#define         BILINEAR_PRECISION_6_BIT                        (0 << 31)
+#define         BILINEAR_PRECISION_8_BIT                        (1 << 31)
+#define TC_CNTL                                         0x9608
+#define         TC_L2_SIZE(x)                                   ((x)<<5)
+#define         L2_DISABLE_LATE_HIT                             (1<<9)
+#define VGT_CACHE_INVALIDATION                          0x88C4
+#define         CACHE_INVALIDATION(x)                           ((x)<<0)
+#define                 VC_ONLY                                         0
+#define                 TC_ONLY                                         1
+#define                 VC_AND_TC                                       2
+#define VGT_DMA_BASE                                    0x287E8
+#define VGT_DMA_BASE_HI                                 0x287E4
+#define VGT_ES_PER_GS                                   0x88CC
+#define VGT_GS_PER_ES                                   0x88C8
+#define VGT_GS_PER_VS                                   0x88E8
+#define VGT_GS_VERTEX_REUSE                             0x88D4
+#define VGT_PRIMITIVE_TYPE                              0x8958
+#define VGT_NUM_INSTANCES                               0x8974
+#define VGT_OUT_DEALLOC_CNTL                            0x28C5C
+#define         DEALLOC_DIST_MASK                               0x0000007F
+#define VGT_STRMOUT_BASE_OFFSET_0                       0x28B10
+#define VGT_STRMOUT_BASE_OFFSET_1                       0x28B14
+#define VGT_STRMOUT_BASE_OFFSET_2                       0x28B18
+#define VGT_STRMOUT_BASE_OFFSET_3                       0x28B1c
+#define VGT_STRMOUT_BASE_OFFSET_HI_0                    0x28B44
+#define VGT_STRMOUT_BASE_OFFSET_HI_1                    0x28B48
+#define VGT_STRMOUT_BASE_OFFSET_HI_2                    0x28B4c
+#define VGT_STRMOUT_BASE_OFFSET_HI_3                    0x28B50
+#define VGT_STRMOUT_BUFFER_BASE_0                       0x28AD8
+#define VGT_STRMOUT_BUFFER_BASE_1                       0x28AE8
+#define VGT_STRMOUT_BUFFER_BASE_2                       0x28AF8
+#define VGT_STRMOUT_BUFFER_BASE_3                       0x28B08
+#define VGT_STRMOUT_BUFFER_OFFSET_0                     0x28ADC
+#define VGT_STRMOUT_BUFFER_OFFSET_1                     0x28AEC
+#define VGT_STRMOUT_BUFFER_OFFSET_2                     0x28AFC
+#define VGT_STRMOUT_BUFFER_OFFSET_3                     0x28B0C
+#define VGT_STRMOUT_EN                                  0x28AB0
+#define VGT_VERTEX_REUSE_BLOCK_CNTL                     0x28C58
+#define         VTX_REUSE_DEPTH_MASK                            0x000000FF
+#define VGT_EVENT_INITIATOR                             0x28a90
+#       define CACHE_FLUSH_AND_INV_EVENT                        (0x16 << 0)
+#define VM_CONTEXT0_CNTL                                0x1410
+#define         ENABLE_CONTEXT                                  (1 << 0)
+#define         PAGE_TABLE_DEPTH(x)                             (((x) & 3) << 1)
+#define         RANGE_PROTECTION_FAULT_ENABLE_DEFAULT           (1 << 4)
+#define VM_CONTEXT0_INVALIDATION_LOW_ADDR               0x1490
+#define VM_CONTEXT0_INVALIDATION_HIGH_ADDR              0x14B0
+#define VM_CONTEXT0_PAGE_TABLE_BASE_ADDR                0x1574
+#define VM_CONTEXT0_PAGE_TABLE_START_ADDR               0x1594
+#define VM_CONTEXT0_PAGE_TABLE_END_ADDR                 0x15B4
+#define VM_CONTEXT0_PROTECTION_FAULT_DEFAULT_ADDR       0x1554
+#define VM_CONTEXT0_REQUEST_RESPONSE                    0x1470
+#define         REQUEST_TYPE(x)                                 (((x) & 0xf) << 0)
+#define         RESPONSE_TYPE_MASK                              0x000000F0
+#define         RESPONSE_TYPE_SHIFT                             4
+#define VM_L2_CNTL                                      0x1400
+#define         ENABLE_L2_CACHE                                 (1 << 0)
+#define         ENABLE_L2_FRAGMENT_PROCESSING                   (1 << 1)
+#define         ENABLE_L2_PTE_CACHE_LRU_UPDATE_BY_WRITE         (1 << 9)
+#define         EFFECTIVE_L2_QUEUE_SIZE(x)                      (((x) & 7) << 13)
+#define VM_L2_CNTL2                                     0x1404
+#define         INVALIDATE_ALL_L1_TLBS                          (1 << 0)
+#define         INVALIDATE_L2_CACHE                             (1 << 1)
+#define VM_L2_CNTL3                                     0x1408
+#define         BANK_SELECT_0(x)                                (((x) & 0x1f) << 0)
+#define         BANK_SELECT_1(x)                                (((x) & 0x1f) << 5)
+#define         L2_CACHE_UPDATE_MODE(x)                         (((x) & 3) << 10)
+#define VM_L2_STATUS                                    0x140C
+#define         L2_BUSY                                         (1 << 0)
+#define WAIT_UNTIL                                      0x8040
+#define         WAIT_2D_IDLE_bit                                (1 << 14)
+#define         WAIT_3D_IDLE_bit                                (1 << 15)
+#define         WAIT_2D_IDLECLEAN_bit                           (1 << 16)
+#define         WAIT_3D_IDLECLEAN_bit                           (1 << 17)
+/*
+ * PM4
+ */
+#define PACKET_TYPE0    0
+#define PACKET_TYPE1    1
+#define PACKET_TYPE2    2
+#define PACKET_TYPE3    3
+#define CP_PACKET_GET_TYPE(h) (((h) >> 30) & 3)
+#define CP_PACKET_GET_COUNT(h) (((h) >> 16) & 0x3FFF)
+#define CP_PACKET0_GET_REG(h) (((h) & 0xFFFF) << 2)
+#define CP_PACKET3_GET_OPCODE(h) (((h) >> 8) & 0xFF)
+#define PACKET0(reg, n) ((PACKET_TYPE0 << 30) |                         \
+                         (((reg) >> 2) & 0xFFFF) |                      \
+                         ((n) & 0x3FFF) << 16)
+#define PACKET3(op, n)  ((PACKET_TYPE3 << 30) |                         \
+                         (((op) & 0xFF) << 8) |                         \
+                         ((n) & 0x3FFF) << 16)
+/* Packet 3 types */
+#define PACKET3_NOP                                     0x10
+#define PACKET3_INDIRECT_BUFFER_END                     0x17
+#define PACKET3_SET_PREDICATION                         0x20
+#define PACKET3_REG_RMW                                 0x21
+#define PACKET3_COND_EXEC                               0x22
+#define PACKET3_PRED_EXEC                               0x23
+#define PACKET3_START_3D_CMDBUF                         0x24
+#define PACKET3_DRAW_INDEX_2                            0x27
+#define PACKET3_CONTEXT_CONTROL                         0x28
+#define PACKET3_DRAW_INDEX_IMMD_BE                      0x29
+#define PACKET3_INDEX_TYPE                              0x2A
+#define PACKET3_DRAW_INDEX                              0x2B
+#define PACKET3_DRAW_INDEX_AUTO                         0x2D
+#define PACKET3_DRAW_INDEX_IMMD                         0x2E
+#define PACKET3_NUM_INSTANCES                           0x2F
+#define PACKET3_STRMOUT_BUFFER_UPDATE                   0x34
+#define PACKET3_INDIRECT_BUFFER_MP                      0x38
+#define PACKET3_MEM_SEMAPHORE                           0x39
+#define PACKET3_MPEG_INDEX                              0x3A
+#define PACKET3_WAIT_REG_MEM                            0x3C
+#define PACKET3_MEM_WRITE                               0x3D
+#define PACKET3_INDIRECT_BUFFER                         0x32
+#define PACKET3_CP_INTERRUPT                            0x40
+#define PACKET3_SURFACE_SYNC                            0x43
+#              define PACKET3_CB0_DEST_BASE_ENA    (1 << 6)
+#              define PACKET3_TC_ACTION_ENA        (1 << 23)
+#              define PACKET3_VC_ACTION_ENA        (1 << 24)
+#              define PACKET3_CB_ACTION_ENA        (1 << 25)
+#              define PACKET3_DB_ACTION_ENA        (1 << 26)
+#              define PACKET3_SH_ACTION_ENA        (1 << 27)
+#              define PACKET3_SMX_ACTION_ENA       (1 << 28)
+#define PACKET3_ME_INITIALIZE                           0x44
+#define         PACKET3_ME_INITIALIZE_DEVICE_ID(x) ((x) << 16)
+#define PACKET3_COND_WRITE                              0x45
+#define PACKET3_EVENT_WRITE                             0x46
+#define PACKET3_EVENT_WRITE_EOP                         0x47
+#define PACKET3_ONE_REG_WRITE                           0x57
+#define PACKET3_SET_CONFIG_REG                          0x68
+#define         PACKET3_SET_CONFIG_REG_OFFSET                   0x00008000
+#define         PACKET3_SET_CONFIG_REG_END                      0x0000ac00
+#define PACKET3_SET_CONTEXT_REG                         0x69
+#define         PACKET3_SET_CONTEXT_REG_OFFSET                  0x00028000
+#define         PACKET3_SET_CONTEXT_REG_END                     0x00029000
+#define PACKET3_SET_ALU_CONST                           0x6A
+#define         PACKET3_SET_ALU_CONST_OFFSET                    0x00030000
+#define         PACKET3_SET_ALU_CONST_END                       0x00032000
+#define PACKET3_SET_BOOL_CONST                          0x6B
+#define         PACKET3_SET_BOOL_CONST_OFFSET                   0x0003e380
+#define         PACKET3_SET_BOOL_CONST_END                      0x00040000
+#define PACKET3_SET_LOOP_CONST                          0x6C
+#define         PACKET3_SET_LOOP_CONST_OFFSET                   0x0003e200
+#define         PACKET3_SET_LOOP_CONST_END                      0x0003e380
+#define PACKET3_SET_RESOURCE                            0x6D
+#define         PACKET3_SET_RESOURCE_OFFSET                     0x00038000
+#define         PACKET3_SET_RESOURCE_END                        0x0003c000
+#define PACKET3_SET_SAMPLER                             0x6E
+#define         PACKET3_SET_SAMPLER_OFFSET                      0x0003c000
+#define         PACKET3_SET_SAMPLER_END                         0x0003cff0
+#define PACKET3_SET_CTL_CONST                           0x6F
+#define         PACKET3_SET_CTL_CONST_OFFSET                    0x0003cff0
+#define         PACKET3_SET_CTL_CONST_END                       0x0003e200
+#define PACKET3_SURFACE_BASE_UPDATE                     0x73
+#define R_008020_GRBM_SOFT_RESET                0x8020
+#define         S_008020_SOFT_RESET_CP(x)               (((x) & 1) << 0)
+#define         S_008020_SOFT_RESET_CB(x)               (((x) & 1) << 1)
+#define         S_008020_SOFT_RESET_CR(x)               (((x) & 1) << 2)
+#define         S_008020_SOFT_RESET_DB(x)               (((x) & 1) << 3)
+#define         S_008020_SOFT_RESET_PA(x)               (((x) & 1) << 5)
+#define         S_008020_SOFT_RESET_SC(x)               (((x) & 1) << 6)
+#define         S_008020_SOFT_RESET_SMX(x)              (((x) & 1) << 7)
+#define         S_008020_SOFT_RESET_SPI(x)              (((x) & 1) << 8)
+#define         S_008020_SOFT_RESET_SH(x)               (((x) & 1) << 9)
+#define         S_008020_SOFT_RESET_SX(x)               (((x) & 1) << 10)
+#define         S_008020_SOFT_RESET_TC(x)               (((x) & 1) << 11)
+#define         S_008020_SOFT_RESET_TA(x)               (((x) & 1) << 12)
+#define         S_008020_SOFT_RESET_VC(x)               (((x) & 1) << 13)
+#define         S_008020_SOFT_RESET_VGT(x)              (((x) & 1) << 14)
+#define R_008010_GRBM_STATUS                    0x8010
+#define         S_008010_CMDFIFO_AVAIL(x)               (((x) & 0x1F) << 0)
+#define         S_008010_CP_RQ_PENDING(x)               (((x) & 1) << 6)
+#define         S_008010_CF_RQ_PENDING(x)               (((x) & 1) << 7)
+#define         S_008010_PF_RQ_PENDING(x)               (((x) & 1) << 8)
+#define         S_008010_GRBM_EE_BUSY(x)                (((x) & 1) << 10)
+#define         S_008010_VC_BUSY(x)                     (((x) & 1) << 11)
+#define         S_008010_DB03_CLEAN(x)                  (((x) & 1) << 12)
+#define         S_008010_CB03_CLEAN(x)                  (((x) & 1) << 13)
+#define         S_008010_VGT_BUSY_NO_DMA(x)             (((x) & 1) << 16)
+#define         S_008010_VGT_BUSY(x)                    (((x) & 1) << 17)
+#define         S_008010_TA03_BUSY(x)                   (((x) & 1) << 18)
+#define         S_008010_TC_BUSY(x)                     (((x) & 1) << 19)
+#define         S_008010_SX_BUSY(x)                     (((x) & 1) << 20)
+#define         S_008010_SH_BUSY(x)                     (((x) & 1) << 21)
+#define         S_008010_SPI03_BUSY(x)                  (((x) & 1) << 22)
+#define         S_008010_SMX_BUSY(x)                    (((x) & 1) << 23)
+#define         S_008010_SC_BUSY(x)                     (((x) & 1) << 24)
+#define         S_008010_PA_BUSY(x)                     (((x) & 1) << 25)
+#define         S_008010_DB03_BUSY(x)                   (((x) & 1) << 26)
+#define         S_008010_CR_BUSY(x)                     (((x) & 1) << 27)
+#define         S_008010_CP_COHERENCY_BUSY(x)           (((x) & 1) << 28)
+#define         S_008010_CP_BUSY(x)                     (((x) & 1) << 29)
+#define         S_008010_CB03_BUSY(x)                   (((x) & 1) << 30)
+#define         S_008010_GUI_ACTIVE(x)                  (((x) & 1) << 31)
+#define         G_008010_CMDFIFO_AVAIL(x)               (((x) >> 0) & 0x1F)
+#define         G_008010_CP_RQ_PENDING(x)               (((x) >> 6) & 1)
+#define         G_008010_CF_RQ_PENDING(x)               (((x) >> 7) & 1)
+#define         G_008010_PF_RQ_PENDING(x)               (((x) >> 8) & 1)
+#define         G_008010_GRBM_EE_BUSY(x)                (((x) >> 10) & 1)
+#define         G_008010_VC_BUSY(x)                     (((x) >> 11) & 1)
+#define         G_008010_DB03_CLEAN(x)                  (((x) >> 12) & 1)
+#define         G_008010_CB03_CLEAN(x)                  (((x) >> 13) & 1)
+#define         G_008010_VGT_BUSY_NO_DMA(x)             (((x) >> 16) & 1)
+#define         G_008010_VGT_BUSY(x)                    (((x) >> 17) & 1)
+#define         G_008010_TA03_BUSY(x)                   (((x) >> 18) & 1)
+#define         G_008010_TC_BUSY(x)                     (((x) >> 19) & 1)
+#define         G_008010_SX_BUSY(x)                     (((x) >> 20) & 1)
+#define         G_008010_SH_BUSY(x)                     (((x) >> 21) & 1)
+#define         G_008010_SPI03_BUSY(x)                  (((x) >> 22) & 1)
+#define         G_008010_SMX_BUSY(x)                    (((x) >> 23) & 1)
+#define         G_008010_SC_BUSY(x)                     (((x) >> 24) & 1)
+#define         G_008010_PA_BUSY(x)                     (((x) >> 25) & 1)
+#define         G_008010_DB03_BUSY(x)                   (((x) >> 26) & 1)
+#define         G_008010_CR_BUSY(x)                     (((x) >> 27) & 1)
+#define         G_008010_CP_COHERENCY_BUSY(x)           (((x) >> 28) & 1)
+#define         G_008010_CP_BUSY(x)                     (((x) >> 29) & 1)
+#define         G_008010_CB03_BUSY(x)                   (((x) >> 30) & 1)
+#define         G_008010_GUI_ACTIVE(x)                  (((x) >> 31) & 1)
+#define R_008014_GRBM_STATUS2                   0x8014
+#define         S_008014_CR_CLEAN(x)                    (((x) & 1) << 0)
+#define         S_008014_SMX_CLEAN(x)                   (((x) & 1) << 1)
+#define         S_008014_SPI0_BUSY(x)                   (((x) & 1) << 8)
+#define         S_008014_SPI1_BUSY(x)                   (((x) & 1) << 9)
+#define         S_008014_SPI2_BUSY(x)                   (((x) & 1) << 10)
+#define         S_008014_SPI3_BUSY(x)                   (((x) & 1) << 11)
+#define         S_008014_TA0_BUSY(x)                    (((x) & 1) << 12)
+#define         S_008014_TA1_BUSY(x)                    (((x) & 1) << 13)
+#define         S_008014_TA2_BUSY(x)                    (((x) & 1) << 14)
+#define         S_008014_TA3_BUSY(x)                    (((x) & 1) << 15)
+#define         S_008014_DB0_BUSY(x)                    (((x) & 1) << 16)
+#define         S_008014_DB1_BUSY(x)                    (((x) & 1) << 17)
+#define         S_008014_DB2_BUSY(x)                    (((x) & 1) << 18)
+#define         S_008014_DB3_BUSY(x)                    (((x) & 1) << 19)
+#define         S_008014_CB0_BUSY(x)                    (((x) & 1) << 20)
+#define         S_008014_CB1_BUSY(x)                    (((x) & 1) << 21)
+#define         S_008014_CB2_BUSY(x)                    (((x) & 1) << 22)
+#define         S_008014_CB3_BUSY(x)                    (((x) & 1) << 23)
+#define         G_008014_CR_CLEAN(x)                    (((x) >> 0) & 1)
+#define         G_008014_SMX_CLEAN(x)                   (((x) >> 1) & 1)
+#define         G_008014_SPI0_BUSY(x)                   (((x) >> 8) & 1)
+#define         G_008014_SPI1_BUSY(x)                   (((x) >> 9) & 1)
+#define         G_008014_SPI2_BUSY(x)                   (((x) >> 10) & 1)
+#define         G_008014_SPI3_BUSY(x)                   (((x) >> 11) & 1)
+#define         G_008014_TA0_BUSY(x)                    (((x) >> 12) & 1)
+#define         G_008014_TA1_BUSY(x)                    (((x) >> 13) & 1)
+#define         G_008014_TA2_BUSY(x)                    (((x) >> 14) & 1)
+#define         G_008014_TA3_BUSY(x)                    (((x) >> 15) & 1)
+#define         G_008014_DB0_BUSY(x)                    (((x) >> 16) & 1)
+#define         G_008014_DB1_BUSY(x)                    (((x) >> 17) & 1)
+#define         G_008014_DB2_BUSY(x)                    (((x) >> 18) & 1)
+#define         G_008014_DB3_BUSY(x)                    (((x) >> 19) & 1)
+#define         G_008014_CB0_BUSY(x)                    (((x) >> 20) & 1)
+#define         G_008014_CB1_BUSY(x)                    (((x) >> 21) & 1)
+#define         G_008014_CB2_BUSY(x)                    (((x) >> 22) & 1)
+#define         G_008014_CB3_BUSY(x)                    (((x) >> 23) & 1)
+#define R_000E50_SRBM_STATUS                            0x0E50
+#define         G_000E50_RLC_RQ_PENDING(x)              (((x) >> 3) & 1)
+#define         G_000E50_RCU_RQ_PENDING(x)              (((x) >> 4) & 1)
+#define         G_000E50_GRBM_RQ_PENDING(x)             (((x) >> 5) & 1)
+#define         G_000E50_HI_RQ_PENDING(x)               (((x) >> 6) & 1)
+#define         G_000E50_IO_EXTERN_SIGNAL(x)            (((x) >> 7) & 1)
+#define         G_000E50_VMC_BUSY(x)                    (((x) >> 8) & 1)
+#define         G_000E50_MCB_BUSY(x)                    (((x) >> 9) & 1)
+#define         G_000E50_MCDZ_BUSY(x)                   (((x) >> 10) & 1)
+#define         G_000E50_MCDY_BUSY(x)                   (((x) >> 11) & 1)
+#define         G_000E50_MCDX_BUSY(x)                   (((x) >> 12) & 1)
+#define         G_000E50_MCDW_BUSY(x)                   (((x) >> 13) & 1)
+#define         G_000E50_SEM_BUSY(x)                    (((x) >> 14) & 1)
+#define         G_000E50_RLC_BUSY(x)                    (((x) >> 15) & 1)
+#define R_000E60_SRBM_SOFT_RESET                        0x0E60
+#define         S_000E60_SOFT_RESET_BIF(x)              (((x) & 1) << 1)
+#define         S_000E60_SOFT_RESET_CG(x)               (((x) & 1) << 2)
+#define         S_000E60_SOFT_RESET_CMC(x)              (((x) & 1) << 3)
+#define         S_000E60_SOFT_RESET_CSC(x)              (((x) & 1) << 4)
+#define         S_000E60_SOFT_RESET_DC(x)               (((x) & 1) << 5)
+#define         S_000E60_SOFT_RESET_GRBM(x)             (((x) & 1) << 8)
+#define         S_000E60_SOFT_RESET_HDP(x)              (((x) & 1) << 9)
+#define         S_000E60_SOFT_RESET_IH(x)               (((x) & 1) << 10)
+#define         S_000E60_SOFT_RESET_MC(x)               (((x) & 1) << 11)
+#define         S_000E60_SOFT_RESET_RLC(x)              (((x) & 1) << 13)
+#define         S_000E60_SOFT_RESET_ROM(x)              (((x) & 1) << 14)
+#define         S_000E60_SOFT_RESET_SEM(x)              (((x) & 1) << 15)
+#define         S_000E60_SOFT_RESET_TSC(x)              (((x) & 1) << 16)
+#define         S_000E60_SOFT_RESET_VMC(x)              (((x) & 1) << 17)
+#endif
diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h
index b519fb2fecbb..c839b608970f 100644
--- a/drivers/gpu/drm/radeon/radeon.h
+++ b/drivers/gpu/drm/radeon/radeon.h
@@ -51,7 +51,6 @@
 #include "radeon_mode.h"
 #include "radeon_reg.h"
-#include "r300.h"
 /*
 * Modules parameters.
@@ -66,6 +65,7 @@ extern int radeon_gart_size;
 extern int radeon_benchmarking;
 extern int radeon_testing;
 extern int radeon_connector_table;
+extern int radeon_tv;
 /*
 * Copy from radeon_drv.h so we don't have to include both and have conflicting
@@ -75,6 +75,7 @@ extern int radeon_connector_table;
 #define RADEON_IB_POOL_SIZE             16
 #define RADEON_DEBUGFS_MAX_NUM_FILES    32
 #define RADEONFB_CONN_LIMIT             4
+#define RADEON_BIOS_NUM_SCRATCH         8
 enum radeon_family {
        CHIP_R100,
@@ -107,14 +108,15 @@ enum radeon_family {
        CHIP_R600,
        CHIP_RV610,
        CHIP_RV630,
+        CHIP_RV670,
        CHIP_RV620,
        CHIP_RV635,
-        CHIP_RV670,
        CHIP_RS780,
+        CHIP_RS880,
        CHIP_RV770,
        CHIP_RV730,
        CHIP_RV710,
-        CHIP_RS880,
+        CHIP_RV740,
        CHIP_LAST,
 };
@@ -151,10 +153,21 @@ struct radeon_device;
 */
 bool radeon_get_bios(struct radeon_device *rdev);
 /*
- * Clocks
+ * Dummy page
 */
+struct radeon_dummy_page {
+        struct page     *page;
+        dma_addr_t      addr;
+};
+int radeon_dummy_page_init(struct radeon_device *rdev);
+void radeon_dummy_page_fini(struct radeon_device *rdev);
+/*
+ * Clocks
+ */
 struct radeon_clock {
        struct radeon_pll p1pll;
        struct radeon_pll p2pll;
@@ -165,6 +178,7 @@ struct radeon_clock {
        uint32_t default_sclk;
 };
 /*
 * Fences.
 */
@@ -331,14 +345,18 @@ struct radeon_mc {
        resource_size_t         aper_size;
        resource_size_t         aper_base;
        resource_size_t         agp_base;
-        unsigned                gtt_location;
-        unsigned                gtt_size;
-        unsigned                vram_location;
        /* for some chips with <= 32MB we need to lie
         * about vram size near mc fb location */
-        unsigned                mc_vram_size;
+        u64                     mc_vram_size;
+        u64                     gtt_location;
+        u64                     gtt_size;
+        u64                     gtt_start;
+        u64                     gtt_end;
+        u64                     vram_location;
+        u64                     vram_start;
+        u64                     vram_end;
        unsigned                vram_width;
-        unsigned                real_vram_size;
+        u64                     real_vram_size;
        int                     vram_mtrr;
        bool                    vram_is_ddr;
 };
@@ -385,6 +403,10 @@ struct radeon_ib {
        uint32_t                length_dw;
 };
+/*
+ * locking -
+ * mutex protects scheduled_ibs, ready, alloc_bm
+ */
 struct radeon_ib_pool {
        struct mutex            mutex;
        struct radeon_object    *robj;
@@ -410,6 +432,16 @@ struct radeon_cp {
        bool                    ready;
 };
+struct r600_blit {
+        struct radeon_object    *shader_obj;
+        u64 shader_gpu_addr;
+        u32 vs_offset, ps_offset;
+        u32 state_offset;
+        u32 state_len;
+        u32 vb_used, vb_total;
+        struct radeon_ib *vb_ib;
+};
 int radeon_ib_get(struct radeon_device *rdev, struct radeon_ib **ib);
 void radeon_ib_free(struct radeon_device *rdev, struct radeon_ib **ib);
 int radeon_ib_schedule(struct radeon_device *rdev, struct radeon_ib *ib);
@@ -462,6 +494,7 @@ struct radeon_cs_parser {
        int                     chunk_relocs_idx;
        struct radeon_ib        *ib;
        void                    *track;
+        unsigned                family;
 };
 struct radeon_cs_packet {
@@ -558,13 +591,19 @@ int r100_debugfs_cp_init(struct radeon_device *rdev);
 */
 struct radeon_asic {
        int (*init)(struct radeon_device *rdev);
+        void (*fini)(struct radeon_device *rdev);
+        int (*resume)(struct radeon_device *rdev);
+        int (*suspend)(struct radeon_device *rdev);
        void (*errata)(struct radeon_device *rdev);
        void (*vram_info)(struct radeon_device *rdev);
+        void (*vga_set_state)(struct radeon_device *rdev, bool state);
        int (*gpu_reset)(struct radeon_device *rdev);
        int (*mc_init)(struct radeon_device *rdev);
        void (*mc_fini)(struct radeon_device *rdev);
        int (*wb_init)(struct radeon_device *rdev);
        void (*wb_fini)(struct radeon_device *rdev);
+        int (*gart_init)(struct radeon_device *rdev);
+        void (*gart_fini)(struct radeon_device *rdev);
        int (*gart_enable)(struct radeon_device *rdev);
        void (*gart_disable)(struct radeon_device *rdev);
        void (*gart_tlb_flush)(struct radeon_device *rdev);
@@ -572,7 +611,11 @@ struct radeon_asic {
        int (*cp_init)(struct radeon_device *rdev, unsigned ring_size);
        void (*cp_fini)(struct radeon_device *rdev);
        void (*cp_disable)(struct radeon_device *rdev);
+        void (*cp_commit)(struct radeon_device *rdev);
        void (*ring_start)(struct radeon_device *rdev);
+        int (*ring_test)(struct radeon_device *rdev);
+        void (*ring_ib_execute)(struct radeon_device *rdev, struct radeon_ib *ib);
+        int (*ib_test)(struct radeon_device *rdev);
        int (*irq_set)(struct radeon_device *rdev);
        int (*irq_process)(struct radeon_device *rdev);
        u32 (*get_vblank_counter)(struct radeon_device *rdev, int crtc);
@@ -604,8 +647,60 @@ struct radeon_asic {
        void (*bandwidth_update)(struct radeon_device *rdev);
 };
+/*
+ * Asic structures
+ */
+struct r100_asic {
+        const unsigned  *reg_safe_bm;
+        unsigned        reg_safe_bm_size;
+};
+struct r300_asic {
+        const unsigned  *reg_safe_bm;
+        unsigned        reg_safe_bm_size;
+};
+struct r600_asic {
+        unsigned max_pipes;
+        unsigned max_tile_pipes;
+        unsigned max_simds;
+        unsigned max_backends;
+        unsigned max_gprs;
+        unsigned max_threads;
+        unsigned max_stack_entries;
+        unsigned max_hw_contexts;
+        unsigned max_gs_threads;
+        unsigned sx_max_export_size;
+        unsigned sx_max_export_pos_size;
+        unsigned sx_max_export_smx_size;
+        unsigned sq_num_cf_insts;
+};
+struct rv770_asic {
+        unsigned max_pipes;
+        unsigned max_tile_pipes;
+        unsigned max_simds;
+        unsigned max_backends;
+        unsigned max_gprs;
+        unsigned max_threads;
+        unsigned max_stack_entries;
+        unsigned max_hw_contexts;
+        unsigned max_gs_threads;
+        unsigned sx_max_export_size;
+        unsigned sx_max_export_pos_size;
+        unsigned sx_max_export_smx_size;
+        unsigned sq_num_cf_insts;
+        unsigned sx_num_of_sets;
+        unsigned sc_prim_fifo_size;
+        unsigned sc_hiz_tile_fifo_size;
+        unsigned sc_earlyz_tile_fifo_fize;
+};
 union radeon_asic_config {
        struct r300_asic        r300;
+        struct r100_asic        r100;
+        struct r600_asic        r600;
+        struct rv770_asic       rv770;
 };
@@ -646,6 +741,7 @@ typedef uint32_t (*radeon_rreg_t)(struct radeon_device*, uint32_t);
 typedef void (*radeon_wreg_t)(struct radeon_device*, uint32_t, uint32_t);
 struct radeon_device {
+        struct device                   *dev;
        struct drm_device               *ddev;
        struct pci_dev                  *pdev;
        /* ASIC */
@@ -689,13 +785,20 @@ struct radeon_device {
        struct radeon_asic              *asic;
        struct radeon_gem               gem;
        struct radeon_pm                pm;
+        uint32_t                        bios_scratch[RADEON_BIOS_NUM_SCRATCH];
        struct mutex                    cs_mutex;
        struct radeon_wb                wb;
+        struct radeon_dummy_page        dummy_page;
        bool                            gpu_lockup;
        bool                            shutdown;
        bool                            suspend;
        bool                            need_dma32;
+        bool                            new_init_path;
+        bool                            accel_working;
        struct radeon_surface_reg surface_regs[RADEON_GEM_MAX_SURFACES];
+        const struct firmware *me_fw;   /* all family ME firmware */
+        const struct firmware *pfp_fw;  /* r6/700 PFP firmware */
+        struct r600_blit r600_blit;
 };
 int radeon_device_init(struct radeon_device *rdev,
@@ -705,6 +808,13 @@ int radeon_device_init(struct radeon_device *rdev,
 void radeon_device_fini(struct radeon_device *rdev);
 int radeon_gpu_wait_for_idle(struct radeon_device *rdev);
+/* r600 blit */
+int r600_blit_prepare_copy(struct radeon_device *rdev, int size_bytes);
+void r600_blit_done_copy(struct radeon_device *rdev, struct radeon_fence *fence);
+void r600_kms_blit_copy(struct radeon_device *rdev,
+                        u64 src_gpu_addr, u64 dst_gpu_addr,
+                        int size_bytes);
 static inline uint32_t r100_mm_rreg(struct radeon_device *rdev, uint32_t reg)
 {
        if (reg < 0x10000)
@@ -732,6 +842,7 @@ static inline void r100_mm_wreg(struct radeon_device *rdev, uint32_t reg, uint32
 #define RREG8(reg) readb(((void __iomem *)rdev->rmmio) + (reg))
 #define WREG8(reg, v) writeb(v, ((void __iomem *)rdev->rmmio) + (reg))
 #define RREG32(reg) r100_mm_rreg(rdev, (reg))
+#define DREG32(reg) printk(KERN_INFO "REGISTER: " #reg " : 0x%08X\n", r100_mm_rreg(rdev, (reg)))
 #define WREG32(reg, v) r100_mm_wreg(rdev, (reg), (v))
 #define REG_SET(FIELD, v) (((v) << FIELD##_SHIFT) & FIELD##_MASK)
 #define REG_GET(FIELD, v) (((v) << FIELD##_SHIFT) & FIELD##_MASK)
@@ -755,6 +866,7 @@ static inline void r100_mm_wreg(struct radeon_device *rdev, uint32_t reg, uint32
                tmp_ |= ((val) & ~(mask));                      \
                WREG32_PLL(reg, tmp_);                          \
        } while (0)
+#define DREG32_SYS(sqf, rdev, reg) seq_printf((sqf), #reg " : 0x%08X\n", r100_mm_rreg((rdev), (reg)))
 /*
 * Indirect registers accessor
@@ -819,51 +931,6 @@ void radeon_atombios_fini(struct radeon_device *rdev);
 /*
 * RING helpers.
 */
-#define CP_PACKET0                      0x00000000
-#define         PACKET0_BASE_INDEX_SHIFT        0
-#define         PACKET0_BASE_INDEX_MASK         (0x1ffff << 0)
-#define         PACKET0_COUNT_SHIFT             16
-#define         PACKET0_COUNT_MASK              (0x3fff << 16)
-#define CP_PACKET1                      0x40000000
-#define CP_PACKET2                      0x80000000
-#define         PACKET2_PAD_SHIFT               0
-#define         PACKET2_PAD_MASK                (0x3fffffff << 0)
-#define CP_PACKET3                      0xC0000000
-#define         PACKET3_IT_OPCODE_SHIFT         8
-#define         PACKET3_IT_OPCODE_MASK          (0xff << 8)
-#define         PACKET3_COUNT_SHIFT             16
-#define         PACKET3_COUNT_MASK              (0x3fff << 16)
-/* PACKET3 op code */
-#define         PACKET3_NOP                     0x10
-#define         PACKET3_3D_DRAW_VBUF            0x28
-#define         PACKET3_3D_DRAW_IMMD            0x29
-#define         PACKET3_3D_DRAW_INDX            0x2A
-#define         PACKET3_3D_LOAD_VBPNTR          0x2F
-#define         PACKET3_INDX_BUFFER             0x33
-#define         PACKET3_3D_DRAW_VBUF_2          0x34
-#define         PACKET3_3D_DRAW_IMMD_2          0x35
-#define         PACKET3_3D_DRAW_INDX_2          0x36
-#define         PACKET3_BITBLT_MULTI            0x9B
-#define PACKET0(reg, n) (CP_PACKET0 |                                   \
-                         REG_SET(PACKET0_BASE_INDEX, (reg) >> 2) |      \
-                         REG_SET(PACKET0_COUNT, (n)))
-#define PACKET2(v)      (CP_PACKET2 | REG_SET(PACKET2_PAD, (v)))
-#define PACKET3(op, n)  (CP_PACKET3 |                                   \
-                         REG_SET(PACKET3_IT_OPCODE, (op)) |             \
-                         REG_SET(PACKET3_COUNT, (n)))
-#define PACKET_TYPE0    0
-#define PACKET_TYPE1    1
-#define PACKET_TYPE2    2
-#define PACKET_TYPE3    3
-#define CP_PACKET_GET_TYPE(h) (((h) >> 30) & 3)
-#define CP_PACKET_GET_COUNT(h) (((h) >> 16) & 0x3FFF)
-#define CP_PACKET0_GET_REG(h) (((h) & 0x1FFF) << 2)
-#define CP_PACKET0_GET_ONE_REG_WR(h) (((h) >> 15) & 1)
-#define CP_PACKET3_GET_OPCODE(h) (((h) >> 8) & 0xFF)
 static inline void radeon_ring_write(struct radeon_device *rdev, uint32_t v)
 {
 #if DRM_DEBUG_CODE
@@ -882,14 +949,20 @@ static inline void radeon_ring_write(struct radeon_device *rdev, uint32_t v)
 * ASICs macro.
 */
 #define radeon_init(rdev) (rdev)->asic->init((rdev))
+#define radeon_fini(rdev) (rdev)->asic->fini((rdev))
+#define radeon_resume(rdev) (rdev)->asic->resume((rdev))
+#define radeon_suspend(rdev) (rdev)->asic->suspend((rdev))
 #define radeon_cs_parse(p) rdev->asic->cs_parse((p))
 #define radeon_errata(rdev) (rdev)->asic->errata((rdev))
 #define radeon_vram_info(rdev) (rdev)->asic->vram_info((rdev))
+#define radeon_vga_set_state(rdev, state) (rdev)->asic->vga_set_state((rdev), (state))
 #define radeon_gpu_reset(rdev) (rdev)->asic->gpu_reset((rdev))
 #define radeon_mc_init(rdev) (rdev)->asic->mc_init((rdev))
 #define radeon_mc_fini(rdev) (rdev)->asic->mc_fini((rdev))
 #define radeon_wb_init(rdev) (rdev)->asic->wb_init((rdev))
 #define radeon_wb_fini(rdev) (rdev)->asic->wb_fini((rdev))
+#define radeon_gpu_gart_init(rdev) (rdev)->asic->gart_init((rdev))
+#define radeon_gpu_gart_fini(rdev) (rdev)->asic->gart_fini((rdev))
 #define radeon_gart_enable(rdev) (rdev)->asic->gart_enable((rdev))
 #define radeon_gart_disable(rdev) (rdev)->asic->gart_disable((rdev))
 #define radeon_gart_tlb_flush(rdev) (rdev)->asic->gart_tlb_flush((rdev))
@@ -897,7 +970,11 @@ static inline void radeon_ring_write(struct radeon_device *rdev, uint32_t v)
 #define radeon_cp_init(rdev,rsize) (rdev)->asic->cp_init((rdev), (rsize))
 #define radeon_cp_fini(rdev) (rdev)->asic->cp_fini((rdev))
 #define radeon_cp_disable(rdev) (rdev)->asic->cp_disable((rdev))
+#define radeon_cp_commit(rdev) (rdev)->asic->cp_commit((rdev))
 #define radeon_ring_start(rdev) (rdev)->asic->ring_start((rdev))
+#define radeon_ring_test(rdev) (rdev)->asic->ring_test((rdev))
+#define radeon_ring_ib_execute(rdev, ib) (rdev)->asic->ring_ib_execute((rdev), (ib))
+#define radeon_ib_test(rdev) (rdev)->asic->ib_test((rdev))
 #define radeon_irq_set(rdev) (rdev)->asic->irq_set((rdev))
 #define radeon_irq_process(rdev) (rdev)->asic->irq_process((rdev))
 #define radeon_get_vblank_counter(rdev, crtc) (rdev)->asic->get_vblank_counter((rdev), (crtc))
@@ -913,4 +990,88 @@ static inline void radeon_ring_write(struct radeon_device *rdev, uint32_t v)
 #define radeon_clear_surface_reg(rdev, r) ((rdev)->asic->clear_surface_reg((rdev), (r)))
 #define radeon_bandwidth_update(rdev) (rdev)->asic->bandwidth_update((rdev))
+/* Common functions */
+extern int radeon_gart_table_vram_pin(struct radeon_device *rdev);
+extern int radeon_modeset_init(struct radeon_device *rdev);
+extern void radeon_modeset_fini(struct radeon_device *rdev);
+extern bool radeon_card_posted(struct radeon_device *rdev);
+extern int radeon_clocks_init(struct radeon_device *rdev);
+extern void radeon_clocks_fini(struct radeon_device *rdev);
+extern void radeon_scratch_init(struct radeon_device *rdev);
+extern void radeon_surface_init(struct radeon_device *rdev);
+extern int radeon_cs_parser_init(struct radeon_cs_parser *p, void *data);
+/* r100,rv100,rs100,rv200,rs200,r200,rv250,rs300,rv280 */
+struct r100_mc_save {
+        u32     GENMO_WT;
+        u32     CRTC_EXT_CNTL;
+        u32     CRTC_GEN_CNTL;
+        u32     CRTC2_GEN_CNTL;
+        u32     CUR_OFFSET;
+        u32     CUR2_OFFSET;
+};
+extern void r100_cp_disable(struct radeon_device *rdev);
+extern int r100_cp_init(struct radeon_device *rdev, unsigned ring_size);
+extern void r100_cp_fini(struct radeon_device *rdev);
+extern void r100_pci_gart_tlb_flush(struct radeon_device *rdev);
+extern int r100_pci_gart_init(struct radeon_device *rdev);
+extern void r100_pci_gart_fini(struct radeon_device *rdev);
+extern int r100_pci_gart_enable(struct radeon_device *rdev);
+extern void r100_pci_gart_disable(struct radeon_device *rdev);
+extern int r100_pci_gart_set_page(struct radeon_device *rdev, int i, uint64_t addr);
+extern int r100_debugfs_mc_info_init(struct radeon_device *rdev);
+extern int r100_gui_wait_for_idle(struct radeon_device *rdev);
+extern void r100_ib_fini(struct radeon_device *rdev);
+extern int r100_ib_init(struct radeon_device *rdev);
+extern void r100_irq_disable(struct radeon_device *rdev);
+extern int r100_irq_set(struct radeon_device *rdev);
+extern void r100_mc_stop(struct radeon_device *rdev, struct r100_mc_save *save);
+extern void r100_mc_resume(struct radeon_device *rdev, struct r100_mc_save *save);
+extern void r100_vram_init_sizes(struct radeon_device *rdev);
+extern void r100_wb_disable(struct radeon_device *rdev);
+extern void r100_wb_fini(struct radeon_device *rdev);
+extern int r100_wb_init(struct radeon_device *rdev);
+/* r300,r350,rv350,rv370,rv380 */
+extern void r300_set_reg_safe(struct radeon_device *rdev);
+extern void r300_mc_program(struct radeon_device *rdev);
+extern void r300_vram_info(struct radeon_device *rdev);
+extern int rv370_pcie_gart_init(struct radeon_device *rdev);
+extern void rv370_pcie_gart_fini(struct radeon_device *rdev);
+extern int rv370_pcie_gart_enable(struct radeon_device *rdev);
+extern void rv370_pcie_gart_disable(struct radeon_device *rdev);
+/* r420,r423,rv410 */
+extern u32 r420_mc_rreg(struct radeon_device *rdev, u32 reg);
+extern void r420_mc_wreg(struct radeon_device *rdev, u32 reg, u32 v);
+extern int r420_debugfs_pipes_info_init(struct radeon_device *rdev);
+/* rv515 */
+extern void rv515_bandwidth_avivo_update(struct radeon_device *rdev);
+/* rs690, rs740 */
+extern void rs690_line_buffer_adjust(struct radeon_device *rdev,
+                                        struct drm_display_mode *mode1,
+                                        struct drm_display_mode *mode2);
+/* r600, rv610, rv630, rv620, rv635, rv670, rs780, rs880 */
+extern bool r600_card_posted(struct radeon_device *rdev);
+extern void r600_cp_stop(struct radeon_device *rdev);
+extern void r600_ring_init(struct radeon_device *rdev, unsigned ring_size);
+extern int r600_cp_resume(struct radeon_device *rdev);
+extern int r600_count_pipe_bits(uint32_t val);
+extern int r600_gart_clear_page(struct radeon_device *rdev, int i);
+extern int r600_mc_wait_for_idle(struct radeon_device *rdev);
+extern int r600_pcie_gart_init(struct radeon_device *rdev);
+extern void r600_pcie_gart_tlb_flush(struct radeon_device *rdev);
+extern int r600_ib_test(struct radeon_device *rdev);
+extern int r600_ring_test(struct radeon_device *rdev);
+extern int r600_wb_init(struct radeon_device *rdev);
+extern void r600_wb_fini(struct radeon_device *rdev);
+extern void r600_scratch_init(struct radeon_device *rdev);
+extern int r600_blit_init(struct radeon_device *rdev);
+extern void r600_blit_fini(struct radeon_device *rdev);
+extern int r600_cp_init_microcode(struct radeon_device *rdev);
+extern int r600_gpu_reset(struct radeon_device *rdev);
 #endif
diff --git a/drivers/gpu/drm/radeon/radeon_asic.h b/drivers/gpu/drm/radeon/radeon_asic.h
index 93d8f8889302..8968f78fa1e3 100644
--- a/drivers/gpu/drm/radeon/radeon_asic.h
+++ b/drivers/gpu/drm/radeon/radeon_asic.h
@@ -42,23 +42,28 @@ void radeon_atom_set_clock_gating(struct radeon_device *rdev, int enable);
 * r100,rv100,rs100,rv200,rs200,r200,rv250,rs300,rv280
 */
 int r100_init(struct radeon_device *rdev);
+int r200_init(struct radeon_device *rdev);
 uint32_t r100_mm_rreg(struct radeon_device *rdev, uint32_t reg);
 void r100_mm_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v);
 void r100_errata(struct radeon_device *rdev);
 void r100_vram_info(struct radeon_device *rdev);
+void r100_vga_set_state(struct radeon_device *rdev, bool state);
 int r100_gpu_reset(struct radeon_device *rdev);
 int r100_mc_init(struct radeon_device *rdev);
 void r100_mc_fini(struct radeon_device *rdev);
 u32 r100_get_vblank_counter(struct radeon_device *rdev, int crtc);
 int r100_wb_init(struct radeon_device *rdev);
 void r100_wb_fini(struct radeon_device *rdev);
-int r100_gart_enable(struct radeon_device *rdev);
+int r100_pci_gart_init(struct radeon_device *rdev);
+void r100_pci_gart_fini(struct radeon_device *rdev);
+int r100_pci_gart_enable(struct radeon_device *rdev);
 void r100_pci_gart_disable(struct radeon_device *rdev);
 void r100_pci_gart_tlb_flush(struct radeon_device *rdev);
 int r100_pci_gart_set_page(struct radeon_device *rdev, int i, uint64_t addr);
 int r100_cp_init(struct radeon_device *rdev, unsigned ring_size);
 void r100_cp_fini(struct radeon_device *rdev);
 void r100_cp_disable(struct radeon_device *rdev);
+void r100_cp_commit(struct radeon_device *rdev);
 void r100_ring_start(struct radeon_device *rdev);
 int r100_irq_set(struct radeon_device *rdev);
 int r100_irq_process(struct radeon_device *rdev);
@@ -77,24 +82,34 @@ int r100_set_surface_reg(struct radeon_device *rdev, int reg,
                         uint32_t offset, uint32_t obj_size);
 int r100_clear_surface_reg(struct radeon_device *rdev, int reg);
 void r100_bandwidth_update(struct radeon_device *rdev);
+void r100_ring_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib);
+int r100_ib_test(struct radeon_device *rdev);
+int r100_ring_test(struct radeon_device *rdev);
 static struct radeon_asic r100_asic = {
        .init = &r100_init,
        .errata = &r100_errata,
        .vram_info = &r100_vram_info,
+        .vga_set_state = &r100_vga_set_state,
        .gpu_reset = &r100_gpu_reset,
        .mc_init = &r100_mc_init,
        .mc_fini = &r100_mc_fini,
        .wb_init = &r100_wb_init,
        .wb_fini = &r100_wb_fini,
-        .gart_enable = &r100_gart_enable,
+        .gart_init = &r100_pci_gart_init,
+        .gart_fini = &r100_pci_gart_fini,
+        .gart_enable = &r100_pci_gart_enable,
        .gart_disable = &r100_pci_gart_disable,
        .gart_tlb_flush = &r100_pci_gart_tlb_flush,
        .gart_set_page = &r100_pci_gart_set_page,
        .cp_init = &r100_cp_init,
        .cp_fini = &r100_cp_fini,
        .cp_disable = &r100_cp_disable,
+        .cp_commit = &r100_cp_commit,
        .ring_start = &r100_ring_start,
+        .ring_test = &r100_ring_test,
+        .ring_ib_execute = &r100_ring_ib_execute,
+        .ib_test = &r100_ib_test,
        .irq_set = &r100_irq_set,
        .irq_process = &r100_irq_process,
        .get_vblank_counter = &r100_get_vblank_counter,
@@ -126,7 +141,9 @@ void r300_ring_start(struct radeon_device *rdev);
 void r300_fence_ring_emit(struct radeon_device *rdev,
                          struct radeon_fence *fence);
 int r300_cs_parse(struct radeon_cs_parser *p);
-int r300_gart_enable(struct radeon_device *rdev);
+int rv370_pcie_gart_init(struct radeon_device *rdev);
+void rv370_pcie_gart_fini(struct radeon_device *rdev);
+int rv370_pcie_gart_enable(struct radeon_device *rdev);
 void rv370_pcie_gart_disable(struct radeon_device *rdev);
 void rv370_pcie_gart_tlb_flush(struct radeon_device *rdev);
 int rv370_pcie_gart_set_page(struct radeon_device *rdev, int i, uint64_t addr);
@@ -143,19 +160,26 @@ static struct radeon_asic r300_asic = {
        .init = &r300_init,
        .errata = &r300_errata,
        .vram_info = &r300_vram_info,
+        .vga_set_state = &r100_vga_set_state,
        .gpu_reset = &r300_gpu_reset,
        .mc_init = &r300_mc_init,
        .mc_fini = &r300_mc_fini,
        .wb_init = &r100_wb_init,
        .wb_fini = &r100_wb_fini,
-        .gart_enable = &r300_gart_enable,
+        .gart_init = &r100_pci_gart_init,
+        .gart_fini = &r100_pci_gart_fini,
+        .gart_enable = &r100_pci_gart_enable,
        .gart_disable = &r100_pci_gart_disable,
        .gart_tlb_flush = &r100_pci_gart_tlb_flush,
        .gart_set_page = &r100_pci_gart_set_page,
        .cp_init = &r100_cp_init,
        .cp_fini = &r100_cp_fini,
        .cp_disable = &r100_cp_disable,
+        .cp_commit = &r100_cp_commit,
        .ring_start = &r300_ring_start,
+        .ring_test = &r100_ring_test,
+        .ring_ib_execute = &r100_ring_ib_execute,
+        .ib_test = &r100_ib_test,
        .irq_set = &r100_irq_set,
        .irq_process = &r100_irq_process,
        .get_vblank_counter = &r100_get_vblank_counter,
@@ -176,27 +200,35 @@ static struct radeon_asic r300_asic = {
 /*
 * r420,r423,rv410
 */
-void r420_errata(struct radeon_device *rdev);
+extern int r420_init(struct radeon_device *rdev);
-void r420_vram_info(struct radeon_device *rdev);
+extern void r420_fini(struct radeon_device *rdev);
-int r420_mc_init(struct radeon_device *rdev);
+extern int r420_suspend(struct radeon_device *rdev);
-void r420_mc_fini(struct radeon_device *rdev);
+extern int r420_resume(struct radeon_device *rdev);
 static struct radeon_asic r420_asic = {
-        .init = &r300_init,
+        .init = &r420_init,
-        .errata = &r420_errata,
+        .fini = &r420_fini,
-        .vram_info = &r420_vram_info,
+        .suspend = &r420_suspend,
+        .resume = &r420_resume,
+        .errata = NULL,
+        .vram_info = NULL,
+        .vga_set_state = &r100_vga_set_state,
        .gpu_reset = &r300_gpu_reset,
-        .mc_init = &r420_mc_init,
+        .mc_init = NULL,
-        .mc_fini = &r420_mc_fini,
+        .mc_fini = NULL,
-        .wb_init = &r100_wb_init,
+        .wb_init = NULL,
-        .wb_fini = &r100_wb_fini,
+        .wb_fini = NULL,
-        .gart_enable = &r300_gart_enable,
+        .gart_enable = NULL,
-        .gart_disable = &rv370_pcie_gart_disable,
+        .gart_disable = NULL,
        .gart_tlb_flush = &rv370_pcie_gart_tlb_flush,
        .gart_set_page = &rv370_pcie_gart_set_page,
-        .cp_init = &r100_cp_init,
+        .cp_init = NULL,
-        .cp_fini = &r100_cp_fini,
+        .cp_fini = NULL,
-        .cp_disable = &r100_cp_disable,
+        .cp_disable = NULL,
+        .cp_commit = &r100_cp_commit,
        .ring_start = &r300_ring_start,
+        .ring_test = &r100_ring_test,
+        .ring_ib_execute = &r100_ring_ib_execute,
+        .ib_test = NULL,
        .irq_set = &r100_irq_set,
        .irq_process = &r100_irq_process,
        .get_vblank_counter = &r100_get_vblank_counter,
@@ -222,6 +254,8 @@ void rs400_errata(struct radeon_device *rdev);
 void rs400_vram_info(struct radeon_device *rdev);
 int rs400_mc_init(struct radeon_device *rdev);
 void rs400_mc_fini(struct radeon_device *rdev);
+int rs400_gart_init(struct radeon_device *rdev);
+void rs400_gart_fini(struct radeon_device *rdev);
 int rs400_gart_enable(struct radeon_device *rdev);
 void rs400_gart_disable(struct radeon_device *rdev);
 void rs400_gart_tlb_flush(struct radeon_device *rdev);
@@ -232,11 +266,14 @@ static struct radeon_asic rs400_asic = {
        .init = &r300_init,
        .errata = &rs400_errata,
        .vram_info = &rs400_vram_info,
+        .vga_set_state = &r100_vga_set_state,
        .gpu_reset = &r300_gpu_reset,
        .mc_init = &rs400_mc_init,
        .mc_fini = &rs400_mc_fini,
        .wb_init = &r100_wb_init,
        .wb_fini = &r100_wb_fini,
+        .gart_init = &rs400_gart_init,
+        .gart_fini = &rs400_gart_fini,
        .gart_enable = &rs400_gart_enable,
        .gart_disable = &rs400_gart_disable,
        .gart_tlb_flush = &rs400_gart_tlb_flush,
@@ -244,7 +281,11 @@ static struct radeon_asic rs400_asic = {
        .cp_init = &r100_cp_init,
        .cp_fini = &r100_cp_fini,
        .cp_disable = &r100_cp_disable,
+        .cp_commit = &r100_cp_commit,
        .ring_start = &r300_ring_start,
+        .ring_test = &r100_ring_test,
+        .ring_ib_execute = &r100_ring_ib_execute,
+        .ib_test = &r100_ib_test,
        .irq_set = &r100_irq_set,
        .irq_process = &r100_irq_process,
        .get_vblank_counter = &r100_get_vblank_counter,
@@ -266,7 +307,7 @@ static struct radeon_asic rs400_asic = {
 /*
 * rs600.
 */
-int rs600_init(struct radeon_device *dev);
+int rs600_init(struct radeon_device *rdev);
 void rs600_errata(struct radeon_device *rdev);
 void rs600_vram_info(struct radeon_device *rdev);
 int rs600_mc_init(struct radeon_device *rdev);
@@ -274,6 +315,8 @@ void rs600_mc_fini(struct radeon_device *rdev);
 int rs600_irq_set(struct radeon_device *rdev);
 int rs600_irq_process(struct radeon_device *rdev);
 u32 rs600_get_vblank_counter(struct radeon_device *rdev, int crtc);
+int rs600_gart_init(struct radeon_device *rdev);
+void rs600_gart_fini(struct radeon_device *rdev);
 int rs600_gart_enable(struct radeon_device *rdev);
 void rs600_gart_disable(struct radeon_device *rdev);
 void rs600_gart_tlb_flush(struct radeon_device *rdev);
@@ -285,11 +328,14 @@ static struct radeon_asic rs600_asic = {
        .init = &rs600_init,
        .errata = &rs600_errata,
        .vram_info = &rs600_vram_info,
+        .vga_set_state = &r100_vga_set_state,
        .gpu_reset = &r300_gpu_reset,
        .mc_init = &rs600_mc_init,
        .mc_fini = &rs600_mc_fini,
        .wb_init = &r100_wb_init,
        .wb_fini = &r100_wb_fini,
+        .gart_init = &rs600_gart_init,
+        .gart_fini = &rs600_gart_fini,
        .gart_enable = &rs600_gart_enable,
        .gart_disable = &rs600_gart_disable,
        .gart_tlb_flush = &rs600_gart_tlb_flush,
@@ -297,7 +343,11 @@ static struct radeon_asic rs600_asic = {
        .cp_init = &r100_cp_init,
        .cp_fini = &r100_cp_fini,
        .cp_disable = &r100_cp_disable,
+        .cp_commit = &r100_cp_commit,
        .ring_start = &r300_ring_start,
+        .ring_test = &r100_ring_test,
+        .ring_ib_execute = &r100_ring_ib_execute,
+        .ib_test = &r100_ib_test,
        .irq_set = &rs600_irq_set,
        .irq_process = &rs600_irq_process,
        .get_vblank_counter = &rs600_get_vblank_counter,
@@ -328,11 +378,14 @@ static struct radeon_asic rs690_asic = {
        .init = &rs600_init,
        .errata = &rs690_errata,
        .vram_info = &rs690_vram_info,
+        .vga_set_state = &r100_vga_set_state,
        .gpu_reset = &r300_gpu_reset,
        .mc_init = &rs690_mc_init,
        .mc_fini = &rs690_mc_fini,
        .wb_init = &r100_wb_init,
        .wb_fini = &r100_wb_fini,
+        .gart_init = &rs400_gart_init,
+        .gart_fini = &rs400_gart_fini,
        .gart_enable = &rs400_gart_enable,
        .gart_disable = &rs400_gart_disable,
        .gart_tlb_flush = &rs400_gart_tlb_flush,
@@ -340,7 +393,11 @@ static struct radeon_asic rs690_asic = {
        .cp_init = &r100_cp_init,
        .cp_fini = &r100_cp_fini,
        .cp_disable = &r100_cp_disable,
+        .cp_commit = &r100_cp_commit,
        .ring_start = &r300_ring_start,
+        .ring_test = &r100_ring_test,
+        .ring_ib_execute = &r100_ring_ib_execute,
+        .ib_test = &r100_ib_test,
        .irq_set = &rs600_irq_set,
        .irq_process = &rs600_irq_process,
        .get_vblank_counter = &rs600_get_vblank_counter,
@@ -378,19 +435,26 @@ static struct radeon_asic rv515_asic = {
        .init = &rv515_init,
        .errata = &rv515_errata,
        .vram_info = &rv515_vram_info,
+        .vga_set_state = &r100_vga_set_state,
        .gpu_reset = &rv515_gpu_reset,
        .mc_init = &rv515_mc_init,
        .mc_fini = &rv515_mc_fini,
        .wb_init = &r100_wb_init,
        .wb_fini = &r100_wb_fini,
-        .gart_enable = &r300_gart_enable,
+        .gart_init = &rv370_pcie_gart_init,
+        .gart_fini = &rv370_pcie_gart_fini,
+        .gart_enable = &rv370_pcie_gart_enable,
        .gart_disable = &rv370_pcie_gart_disable,
        .gart_tlb_flush = &rv370_pcie_gart_tlb_flush,
        .gart_set_page = &rv370_pcie_gart_set_page,
        .cp_init = &r100_cp_init,
        .cp_fini = &r100_cp_fini,
        .cp_disable = &r100_cp_disable,
+        .cp_commit = &r100_cp_commit,
        .ring_start = &rv515_ring_start,
+        .ring_test = &r100_ring_test,
+        .ring_ib_execute = &r100_ring_ib_execute,
+        .ib_test = &r100_ib_test,
        .irq_set = &rs600_irq_set,
        .irq_process = &rs600_irq_process,
        .get_vblank_counter = &rs600_get_vblank_counter,
@@ -421,19 +485,26 @@ static struct radeon_asic r520_asic = {
        .init = &rv515_init,
        .errata = &r520_errata,
        .vram_info = &r520_vram_info,
+        .vga_set_state = &r100_vga_set_state,
        .gpu_reset = &rv515_gpu_reset,
        .mc_init = &r520_mc_init,
        .mc_fini = &r520_mc_fini,
        .wb_init = &r100_wb_init,
        .wb_fini = &r100_wb_fini,
-        .gart_enable = &r300_gart_enable,
+        .gart_init = &rv370_pcie_gart_init,
+        .gart_fini = &rv370_pcie_gart_fini,
+        .gart_enable = &rv370_pcie_gart_enable,
        .gart_disable = &rv370_pcie_gart_disable,
        .gart_tlb_flush = &rv370_pcie_gart_tlb_flush,
        .gart_set_page = &rv370_pcie_gart_set_page,
        .cp_init = &r100_cp_init,
        .cp_fini = &r100_cp_fini,
        .cp_disable = &r100_cp_disable,
+        .cp_commit = &r100_cp_commit,
        .ring_start = &rv515_ring_start,
+        .ring_test = &r100_ring_test,
+        .ring_ib_execute = &r100_ring_ib_execute,
+        .ib_test = &r100_ib_test,
        .irq_set = &rs600_irq_set,
        .irq_process = &rs600_irq_process,
        .get_vblank_counter = &rs600_get_vblank_counter,
@@ -452,9 +523,130 @@ static struct radeon_asic r520_asic = {
 };
 /*
- * r600,rv610,rv630,rv620,rv635,rv670,rs780,rv770,rv730,rv710
+ * r600,rv610,rv630,rv620,rv635,rv670,rs780,rs880
 */
+int r600_init(struct radeon_device *rdev);
+void r600_fini(struct radeon_device *rdev);
+int r600_suspend(struct radeon_device *rdev);
+int r600_resume(struct radeon_device *rdev);
+void r600_vga_set_state(struct radeon_device *rdev, bool state);
+int r600_wb_init(struct radeon_device *rdev);
+void r600_wb_fini(struct radeon_device *rdev);
+void r600_cp_commit(struct radeon_device *rdev);
+void r600_pcie_gart_tlb_flush(struct radeon_device *rdev);
 uint32_t r600_pciep_rreg(struct radeon_device *rdev, uint32_t reg);
 void r600_pciep_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v);
+int r600_cs_parse(struct radeon_cs_parser *p);
+void r600_fence_ring_emit(struct radeon_device *rdev,
+                          struct radeon_fence *fence);
+int r600_copy_dma(struct radeon_device *rdev,
+                  uint64_t src_offset,
+                  uint64_t dst_offset,
+                  unsigned num_pages,
+                  struct radeon_fence *fence);
+int r600_irq_process(struct radeon_device *rdev);
+int r600_irq_set(struct radeon_device *rdev);
+int r600_gpu_reset(struct radeon_device *rdev);
+int r600_set_surface_reg(struct radeon_device *rdev, int reg,
+                         uint32_t tiling_flags, uint32_t pitch,
+                         uint32_t offset, uint32_t obj_size);
+int r600_clear_surface_reg(struct radeon_device *rdev, int reg);
+void r600_ring_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib);
+int r600_ib_test(struct radeon_device *rdev);
+int r600_ring_test(struct radeon_device *rdev);
+int r600_copy_blit(struct radeon_device *rdev,
+                   uint64_t src_offset, uint64_t dst_offset,
+                   unsigned num_pages, struct radeon_fence *fence);
+static struct radeon_asic r600_asic = {
+        .errata = NULL,
+        .init = &r600_init,
+        .fini = &r600_fini,
+        .suspend = &r600_suspend,
+        .resume = &r600_resume,
+        .cp_commit = &r600_cp_commit,
+        .vram_info = NULL,
+        .vga_set_state = &r600_vga_set_state,
+        .gpu_reset = &r600_gpu_reset,
+        .mc_init = NULL,
+        .mc_fini = NULL,
+        .wb_init = &r600_wb_init,
+        .wb_fini = &r600_wb_fini,
+        .gart_enable = NULL,
+        .gart_disable = NULL,
+        .gart_tlb_flush = &r600_pcie_gart_tlb_flush,
+        .gart_set_page = &rs600_gart_set_page,
+        .cp_init = NULL,
+        .cp_fini = NULL,
+        .cp_disable = NULL,
+        .ring_start = NULL,
+        .ring_test = &r600_ring_test,
+        .ring_ib_execute = &r600_ring_ib_execute,
+        .ib_test = &r600_ib_test,
+        .irq_set = &r600_irq_set,
+        .irq_process = &r600_irq_process,
+        .fence_ring_emit = &r600_fence_ring_emit,
+        .cs_parse = &r600_cs_parse,
+        .copy_blit = &r600_copy_blit,
+        .copy_dma = &r600_copy_blit,
+        .copy = &r600_copy_blit,
+        .set_engine_clock = &radeon_atom_set_engine_clock,
+        .set_memory_clock = &radeon_atom_set_memory_clock,
+        .set_pcie_lanes = NULL,
+        .set_clock_gating = &radeon_atom_set_clock_gating,
+        .set_surface_reg = r600_set_surface_reg,
+        .clear_surface_reg = r600_clear_surface_reg,
+        .bandwidth_update = &r520_bandwidth_update,
+};
+/*
+ * rv770,rv730,rv710,rv740
+ */
+int rv770_init(struct radeon_device *rdev);
+void rv770_fini(struct radeon_device *rdev);
+int rv770_suspend(struct radeon_device *rdev);
+int rv770_resume(struct radeon_device *rdev);
+int rv770_gpu_reset(struct radeon_device *rdev);
+static struct radeon_asic rv770_asic = {
+        .errata = NULL,
+        .init = &rv770_init,
+        .fini = &rv770_fini,
+        .suspend = &rv770_suspend,
+        .resume = &rv770_resume,
+        .cp_commit = &r600_cp_commit,
+        .vram_info = NULL,
+        .gpu_reset = &rv770_gpu_reset,
+        .vga_set_state = &r600_vga_set_state,
+        .mc_init = NULL,
+        .mc_fini = NULL,
+        .wb_init = &r600_wb_init,
+        .wb_fini = &r600_wb_fini,
+        .gart_enable = NULL,
+        .gart_disable = NULL,
+        .gart_tlb_flush = &r600_pcie_gart_tlb_flush,
+        .gart_set_page = &rs600_gart_set_page,
+        .cp_init = NULL,
+        .cp_fini = NULL,
+        .cp_disable = NULL,
+        .ring_start = NULL,
+        .ring_test = &r600_ring_test,
+        .ring_ib_execute = &r600_ring_ib_execute,
+        .ib_test = &r600_ib_test,
+        .irq_set = &r600_irq_set,
+        .irq_process = &r600_irq_process,
+        .fence_ring_emit = &r600_fence_ring_emit,
+        .cs_parse = &r600_cs_parse,
+        .copy_blit = &r600_copy_blit,
+        .copy_dma = &r600_copy_blit,
+        .copy = &r600_copy_blit,
+        .set_engine_clock = &radeon_atom_set_engine_clock,
+        .set_memory_clock = &radeon_atom_set_memory_clock,
+        .set_pcie_lanes = NULL,
+        .set_clock_gating = &radeon_atom_set_clock_gating,
+        .set_surface_reg = r600_set_surface_reg,
+        .clear_surface_reg = r600_clear_surface_reg,
+        .bandwidth_update = &r520_bandwidth_update,
+};
 #endif
diff --git a/drivers/gpu/drm/radeon/radeon_atombios.c b/drivers/gpu/drm/radeon/radeon_atombios.c
index fcfe5c02d744..743742128307 100644
--- a/drivers/gpu/drm/radeon/radeon_atombios.c
+++ b/drivers/gpu/drm/radeon/radeon_atombios.c
@@ -104,7 +104,7 @@ static bool radeon_atom_apply_quirks(struct drm_device *dev,
                                     uint32_t supported_device,
                                     int *connector_type,
                                     struct radeon_i2c_bus_rec *i2c_bus,
-                                     uint8_t *line_mux)
+                                     uint16_t *line_mux)
 {
        /* Asus M2A-VM HDMI board lists the DVI port as HDMI */
@@ -143,20 +143,31 @@ static bool radeon_atom_apply_quirks(struct drm_device *dev,
                        return false;
        }
-        /* some BIOSes seem to report DAC on HDMI - they hurt me with their lies */
-        if ((*connector_type == DRM_MODE_CONNECTOR_HDMIA) ||
-            (*connector_type == DRM_MODE_CONNECTOR_HDMIB)) {
-                if (supported_device & (ATOM_DEVICE_CRT_SUPPORT)) {
-                        return false;
-                }
-        }
        /* ASUS HD 3600 XT board lists the DVI port as HDMI */
        if ((dev->pdev->device == 0x9598) &&
            (dev->pdev->subsystem_vendor == 0x1043) &&
            (dev->pdev->subsystem_device == 0x01da)) {
-                if (*connector_type == DRM_MODE_CONNECTOR_HDMIB) {
+                if (*connector_type == DRM_MODE_CONNECTOR_HDMIA) {
-                        *connector_type = DRM_MODE_CONNECTOR_DVID;
+                        *connector_type = DRM_MODE_CONNECTOR_DVII;
+                }
+        }
+        /* ASUS HD 3450 board lists the DVI port as HDMI */
+        if ((dev->pdev->device == 0x95C5) &&
+            (dev->pdev->subsystem_vendor == 0x1043) &&
+            (dev->pdev->subsystem_device == 0x01e2)) {
+                if (*connector_type == DRM_MODE_CONNECTOR_HDMIA) {
+                        *connector_type = DRM_MODE_CONNECTOR_DVII;
+                }
+        }
+        /* some BIOSes seem to report DAC on HDMI - usually this is a board with
+         * HDMI + VGA reporting as HDMI
+         */
+        if (*connector_type == DRM_MODE_CONNECTOR_HDMIA) {
+                if (supported_device & (ATOM_DEVICE_CRT_SUPPORT)) {
+                        *connector_type = DRM_MODE_CONNECTOR_VGA;
+                        *line_mux = 0;
                }
        }
@@ -192,11 +203,11 @@ const int object_connector_convert[] = {
        DRM_MODE_CONNECTOR_Composite,
        DRM_MODE_CONNECTOR_SVIDEO,
        DRM_MODE_CONNECTOR_Unknown,
+        DRM_MODE_CONNECTOR_Unknown,
        DRM_MODE_CONNECTOR_9PinDIN,
        DRM_MODE_CONNECTOR_Unknown,
        DRM_MODE_CONNECTOR_HDMIA,
        DRM_MODE_CONNECTOR_HDMIB,
-        DRM_MODE_CONNECTOR_HDMIB,
        DRM_MODE_CONNECTOR_LVDS,
        DRM_MODE_CONNECTOR_9PinDIN,
        DRM_MODE_CONNECTOR_Unknown,
@@ -218,7 +229,7 @@ bool radeon_get_atom_connector_info_from_object_table(struct drm_device *dev)
        ATOM_OBJECT_HEADER *obj_header;
        int i, j, path_size, device_support;
        int connector_type;
-        uint16_t igp_lane_info;
+        uint16_t igp_lane_info, conn_id;
        bool linkb;
        struct radeon_i2c_bus_rec ddc_bus;
@@ -370,10 +381,6 @@ bool radeon_get_atom_connector_info_from_object_table(struct drm_device *dev)
                                                       && record->
                                                       ucRecordType <=
                                                       ATOM_MAX_OBJECT_RECORD_NUMBER) {
-                                                        DRM_ERROR
-                                                            ("record type %d\n",
-                                                             record->
-                                                             ucRecordType);
                                                        switch (record->
                                                                ucRecordType) {
                                                        case ATOM_I2C_RECORD_TYPE:
@@ -409,9 +416,15 @@ bool radeon_get_atom_connector_info_from_object_table(struct drm_device *dev)
                        else
                                ddc_bus = radeon_lookup_gpio(dev, line_mux);
+                        conn_id = le16_to_cpu(path->usConnObjectId);
+                        if (!radeon_atom_apply_quirks
+                            (dev, le16_to_cpu(path->usDeviceTag), &connector_type,
+                             &ddc_bus, &conn_id))
+                                continue;
                        radeon_add_atom_connector(dev,
-                                                  le16_to_cpu(path->
+                                                  conn_id,
-                                                              usConnObjectId),
                                                  le16_to_cpu(path->
                                                              usDeviceTag),
                                                  connector_type, &ddc_bus,
@@ -427,7 +440,7 @@ bool radeon_get_atom_connector_info_from_object_table(struct drm_device *dev)
 struct bios_connector {
        bool valid;
-        uint8_t line_mux;
+        uint16_t line_mux;
        uint16_t devices;
        int connector_type;
        struct radeon_i2c_bus_rec ddc_bus;
@@ -471,11 +484,6 @@ bool radeon_get_atom_connector_info_from_supported_devices_table(struct
                        continue;
                }
-                if (i == ATOM_DEVICE_TV1_INDEX) {
-                        DRM_DEBUG("Skipping TV Out\n");
-                        continue;
-                }
                bios_connectors[i].connector_type =
                    supported_devices_connector_convert[ci.sucConnectorInfo.
                                                        sbfAccess.
@@ -711,9 +719,8 @@ bool radeon_atom_get_clock_info(struct drm_device *dev)
        return false;
 }
-struct radeon_encoder_int_tmds *radeon_atombios_get_tmds_info(struct
+bool radeon_atombios_get_tmds_info(struct radeon_encoder *encoder,
-                                                              radeon_encoder
+                                   struct radeon_encoder_int_tmds *tmds)
-                                                              *encoder)
 {
        struct drm_device *dev = encoder->base.dev;
        struct radeon_device *rdev = dev->dev_private;
@@ -724,7 +731,6 @@ struct radeon_encoder_int_tmds *radeon_atombios_get_tmds_info(struct
        uint8_t frev, crev;
        uint16_t maxfreq;
        int i;
-        struct radeon_encoder_int_tmds *tmds = NULL;
        atom_parse_data_header(mode_info->atom_context, index, NULL, &frev,
                               &crev, &data_offset);
@@ -734,12 +740,6 @@ struct radeon_encoder_int_tmds *radeon_atombios_get_tmds_info(struct
                                       data_offset);
        if (tmds_info) {
-                tmds =
-                    kzalloc(sizeof(struct radeon_encoder_int_tmds), GFP_KERNEL);
-                if (!tmds)
-                        return NULL;
                maxfreq = le16_to_cpu(tmds_info->usMaxFrequency);
                for (i = 0; i < 4; i++) {
                        tmds->tmds_pll[i].freq =
@@ -765,8 +765,9 @@ struct radeon_encoder_int_tmds *radeon_atombios_get_tmds_info(struct
                                break;
                        }
                }
+                return true;
        }
-        return tmds;
+        return false;
 }
 union lvds_info {
@@ -858,6 +859,72 @@ radeon_atombios_get_primary_dac_info(struct radeon_encoder *encoder)
        return p_dac;
 }
+bool radeon_atom_get_tv_timings(struct radeon_device *rdev, int index,
+                                SET_CRTC_TIMING_PARAMETERS_PS_ALLOCATION *crtc_timing,
+                                int32_t *pixel_clock)
+{
+        struct radeon_mode_info *mode_info = &rdev->mode_info;
+        ATOM_ANALOG_TV_INFO *tv_info;
+        ATOM_ANALOG_TV_INFO_V1_2 *tv_info_v1_2;
+        ATOM_DTD_FORMAT *dtd_timings;
+        int data_index = GetIndexIntoMasterTable(DATA, AnalogTV_Info);
+        u8 frev, crev;
+        uint16_t data_offset;
+        atom_parse_data_header(mode_info->atom_context, data_index, NULL, &frev, &crev, &data_offset);
+        switch (crev) {
+        case 1:
+                tv_info = (ATOM_ANALOG_TV_INFO *)(mode_info->atom_context->bios + data_offset);
+                if (index > MAX_SUPPORTED_TV_TIMING)
+                        return false;
+                crtc_timing->usH_Total = le16_to_cpu(tv_info->aModeTimings[index].usCRTC_H_Total);
+                crtc_timing->usH_Disp = le16_to_cpu(tv_info->aModeTimings[index].usCRTC_H_Disp);
+                crtc_timing->usH_SyncStart = le16_to_cpu(tv_info->aModeTimings[index].usCRTC_H_SyncStart);
+                crtc_timing->usH_SyncWidth = le16_to_cpu(tv_info->aModeTimings[index].usCRTC_H_SyncWidth);
+                crtc_timing->usV_Total = le16_to_cpu(tv_info->aModeTimings[index].usCRTC_V_Total);
+                crtc_timing->usV_Disp = le16_to_cpu(tv_info->aModeTimings[index].usCRTC_V_Disp);
+                crtc_timing->usV_SyncStart = le16_to_cpu(tv_info->aModeTimings[index].usCRTC_V_SyncStart);
+                crtc_timing->usV_SyncWidth = le16_to_cpu(tv_info->aModeTimings[index].usCRTC_V_SyncWidth);
+                crtc_timing->susModeMiscInfo = tv_info->aModeTimings[index].susModeMiscInfo;
+                crtc_timing->ucOverscanRight = le16_to_cpu(tv_info->aModeTimings[index].usCRTC_OverscanRight);
+                crtc_timing->ucOverscanLeft = le16_to_cpu(tv_info->aModeTimings[index].usCRTC_OverscanLeft);
+                crtc_timing->ucOverscanBottom = le16_to_cpu(tv_info->aModeTimings[index].usCRTC_OverscanBottom);
+                crtc_timing->ucOverscanTop = le16_to_cpu(tv_info->aModeTimings[index].usCRTC_OverscanTop);
+                *pixel_clock = le16_to_cpu(tv_info->aModeTimings[index].usPixelClock) * 10;
+                if (index == 1) {
+                        /* PAL timings appear to have wrong values for totals */
+                        crtc_timing->usH_Total -= 1;
+                        crtc_timing->usV_Total -= 1;
+                }
+                break;
+        case 2:
+                tv_info_v1_2 = (ATOM_ANALOG_TV_INFO_V1_2 *)(mode_info->atom_context->bios + data_offset);
+                if (index > MAX_SUPPORTED_TV_TIMING_V1_2)
+                        return false;
+                dtd_timings = &tv_info_v1_2->aModeTimings[index];
+                crtc_timing->usH_Total = le16_to_cpu(dtd_timings->usHActive) + le16_to_cpu(dtd_timings->usHBlanking_Time);
+                crtc_timing->usH_Disp = le16_to_cpu(dtd_timings->usHActive);
+                crtc_timing->usH_SyncStart = le16_to_cpu(dtd_timings->usHActive) + le16_to_cpu(dtd_timings->usHSyncOffset);
+                crtc_timing->usH_SyncWidth = le16_to_cpu(dtd_timings->usHSyncWidth);
+                crtc_timing->usV_Total = le16_to_cpu(dtd_timings->usVActive) + le16_to_cpu(dtd_timings->usVBlanking_Time);
+                crtc_timing->usV_Disp = le16_to_cpu(dtd_timings->usVActive);
+                crtc_timing->usV_SyncStart = le16_to_cpu(dtd_timings->usVActive) + le16_to_cpu(dtd_timings->usVSyncOffset);
+                crtc_timing->usV_SyncWidth = le16_to_cpu(dtd_timings->usVSyncWidth);
+                crtc_timing->susModeMiscInfo.usAccess = le16_to_cpu(dtd_timings->susModeMiscInfo.usAccess);
+                *pixel_clock = le16_to_cpu(dtd_timings->usPixClk) * 10;
+                break;
+        }
+        return true;
+}
 struct radeon_encoder_tv_dac *
 radeon_atombios_get_tv_dac_info(struct radeon_encoder *encoder)
 {
@@ -948,10 +1015,10 @@ void radeon_atom_initialize_bios_scratch_regs(struct drm_device *dev)
        uint32_t bios_2_scratch, bios_6_scratch;
        if (rdev->family >= CHIP_R600) {
-                bios_2_scratch = RREG32(R600_BIOS_0_SCRATCH);
+                bios_2_scratch = RREG32(R600_BIOS_2_SCRATCH);
                bios_6_scratch = RREG32(R600_BIOS_6_SCRATCH);
        } else {
-                bios_2_scratch = RREG32(RADEON_BIOS_0_SCRATCH);
+                bios_2_scratch = RREG32(RADEON_BIOS_2_SCRATCH);
                bios_6_scratch = RREG32(RADEON_BIOS_6_SCRATCH);
        }
@@ -971,6 +1038,34 @@ void radeon_atom_initialize_bios_scratch_regs(struct drm_device *dev)
 }
+void radeon_save_bios_scratch_regs(struct radeon_device *rdev)
+{
+        uint32_t scratch_reg;
+        int i;
+        if (rdev->family >= CHIP_R600)
+                scratch_reg = R600_BIOS_0_SCRATCH;
+        else
+                scratch_reg = RADEON_BIOS_0_SCRATCH;
+        for (i = 0; i < RADEON_BIOS_NUM_SCRATCH; i++)
+                rdev->bios_scratch[i] = RREG32(scratch_reg + (i * 4));
+}
+void radeon_restore_bios_scratch_regs(struct radeon_device *rdev)
+{
+        uint32_t scratch_reg;
+        int i;
+        if (rdev->family >= CHIP_R600)
+                scratch_reg = R600_BIOS_0_SCRATCH;
+        else
+                scratch_reg = RADEON_BIOS_0_SCRATCH;
+        for (i = 0; i < RADEON_BIOS_NUM_SCRATCH; i++)
+                WREG32(scratch_reg + (i * 4), rdev->bios_scratch[i]);
+}
 void radeon_atom_output_lock(struct drm_encoder *encoder, bool lock)
 {
        struct drm_device *dev = encoder->dev;
diff --git a/drivers/gpu/drm/radeon/radeon_clocks.c b/drivers/gpu/drm/radeon/radeon_clocks.c
index a37cbce53181..152eef13197a 100644
--- a/drivers/gpu/drm/radeon/radeon_clocks.c
+++ b/drivers/gpu/drm/radeon/radeon_clocks.c
@@ -102,10 +102,12 @@ void radeon_get_clock_info(struct drm_device *dev)
                        p1pll->reference_div = 12;
                if (p2pll->reference_div < 2)
                        p2pll->reference_div = 12;
-                if (spll->reference_div < 2)
+                if (rdev->family < CHIP_RS600) {
-                        spll->reference_div =
+                        if (spll->reference_div < 2)
-                            RREG32_PLL(RADEON_M_SPLL_REF_FB_DIV) &
+                                spll->reference_div =
-                            RADEON_M_SPLL_REF_DIV_MASK;
+                                        RREG32_PLL(RADEON_M_SPLL_REF_FB_DIV) &
+                                        RADEON_M_SPLL_REF_DIV_MASK;
+                }
                if (mpll->reference_div < 2)
                        mpll->reference_div = spll->reference_div;
        } else {
diff --git a/drivers/gpu/drm/radeon/radeon_combios.c b/drivers/gpu/drm/radeon/radeon_combios.c
index 2a027e00762a..748265a105b3 100644
--- a/drivers/gpu/drm/radeon/radeon_combios.c
+++ b/drivers/gpu/drm/radeon/radeon_combios.c
@@ -863,8 +863,10 @@ struct radeon_encoder_lvds *radeon_combios_get_lvds_info(struct radeon_encoder
        int tmp, i;
        struct radeon_encoder_lvds *lvds = NULL;
-        if (rdev->bios == NULL)
+        if (rdev->bios == NULL) {
-                return radeon_legacy_get_lvds_info_from_regs(rdev);
+                lvds = radeon_legacy_get_lvds_info_from_regs(rdev);
+                goto out;
+        }
        lcd_info = combios_get_table_offset(dev, COMBIOS_LCD_INFO_TABLE);
@@ -965,11 +967,13 @@ struct radeon_encoder_lvds *radeon_combios_get_lvds_info(struct radeon_encoder
                                lvds->native_mode.flags = 0;
                        }
                }
-                encoder->native_mode = lvds->native_mode;
        } else {
                DRM_INFO("No panel info found in BIOS\n");
-                return radeon_legacy_get_lvds_info_from_regs(rdev);
+                lvds = radeon_legacy_get_lvds_info_from_regs(rdev);
        }
+out:
+        if (lvds)
+                encoder->native_mode = lvds->native_mode;
        return lvds;
 }
@@ -994,48 +998,37 @@ static const struct radeon_tmds_pll default_tmds_pll[CHIP_LAST][4] = {
        {{15000, 0xb0155}, {0xffffffff, 0xb01cb}, {0, 0}, {0, 0}},      /* CHIP_RS480 */
 };
-static struct radeon_encoder_int_tmds
+bool radeon_legacy_get_tmds_info_from_table(struct radeon_encoder *encoder,
-    *radeon_legacy_get_tmds_info_from_table(struct radeon_device *rdev)
+                                            struct radeon_encoder_int_tmds *tmds)
 {
+        struct drm_device *dev = encoder->base.dev;
+        struct radeon_device *rdev = dev->dev_private;
        int i;
-        struct radeon_encoder_int_tmds *tmds = NULL;
-        tmds = kzalloc(sizeof(struct radeon_encoder_int_tmds), GFP_KERNEL);
-        if (!tmds)
-                return NULL;
        for (i = 0; i < 4; i++) {
                tmds->tmds_pll[i].value =
-                    default_tmds_pll[rdev->family][i].value;
+                        default_tmds_pll[rdev->family][i].value;
                tmds->tmds_pll[i].freq = default_tmds_pll[rdev->family][i].freq;
        }
-        return tmds;
+        return true;
 }
-struct radeon_encoder_int_tmds *radeon_combios_get_tmds_info(struct
+bool radeon_legacy_get_tmds_info_from_combios(struct radeon_encoder *encoder,
-                                                             radeon_encoder
+                                              struct radeon_encoder_int_tmds *tmds)
-                                                             *encoder)
 {
        struct drm_device *dev = encoder->base.dev;
        struct radeon_device *rdev = dev->dev_private;
        uint16_t tmds_info;
        int i, n;
        uint8_t ver;
-        struct radeon_encoder_int_tmds *tmds = NULL;
        if (rdev->bios == NULL)
-                return radeon_legacy_get_tmds_info_from_table(rdev);
+                return false;
        tmds_info = combios_get_table_offset(dev, COMBIOS_DFP_INFO_TABLE);
        if (tmds_info) {
-                tmds =
-                    kzalloc(sizeof(struct radeon_encoder_int_tmds), GFP_KERNEL);
-                if (!tmds)
-                        return NULL;
                ver = RBIOS8(tmds_info);
                DRM_INFO("DFP table revision: %d\n", ver);
@@ -1073,6 +1066,23 @@ struct radeon_encoder_int_tmds *radeon_combios_get_tmds_info(struct
                }
        } else
                DRM_INFO("No TMDS info found in BIOS\n");
+        return true;
+}
+struct radeon_encoder_int_tmds *radeon_combios_get_tmds_info(struct radeon_encoder *encoder)
+{
+        struct radeon_encoder_int_tmds *tmds = NULL;
+        bool ret;
+        tmds = kzalloc(sizeof(struct radeon_encoder_int_tmds), GFP_KERNEL);
+        if (!tmds)
+                return NULL;
+        ret = radeon_legacy_get_tmds_info_from_combios(encoder, tmds);
+        if (ret == false)
+                radeon_legacy_get_tmds_info_from_table(encoder, tmds);
        return tmds;
 }
diff --git a/drivers/gpu/drm/radeon/radeon_connectors.c b/drivers/gpu/drm/radeon/radeon_connectors.c
index 70ede6a52d4e..af1d551f1a8f 100644
--- a/drivers/gpu/drm/radeon/radeon_connectors.c
+++ b/drivers/gpu/drm/radeon/radeon_connectors.c
@@ -28,6 +28,7 @@
 #include "drm_crtc_helper.h"
 #include "radeon_drm.h"
 #include "radeon.h"
+#include "atom.h"
 extern void
 radeon_combios_connected_scratch_regs(struct drm_connector *connector,
@@ -38,6 +39,15 @@ radeon_atombios_connected_scratch_regs(struct drm_connector *connector,
                                       struct drm_encoder *encoder,
                                       bool connected);
+static void radeon_property_change_mode(struct drm_encoder *encoder)
+{
+        struct drm_crtc *crtc = encoder->crtc;
+        if (crtc && crtc->enabled) {
+                drm_crtc_helper_set_mode(crtc, &crtc->mode,
+                                         crtc->x, crtc->y, crtc->fb);
+        }
+}
 static void
 radeon_connector_update_scratch_regs(struct drm_connector *connector, enum drm_connector_status status)
 {
@@ -77,6 +87,27 @@ radeon_connector_update_scratch_regs(struct drm_connector *connector, enum drm_c
        }
 }
+struct drm_encoder *radeon_find_encoder(struct drm_connector *connector, int encoder_type)
+{
+        struct drm_mode_object *obj;
+        struct drm_encoder *encoder;
+        int i;
+        for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
+                if (connector->encoder_ids[i] == 0)
+                        break;
+                obj = drm_mode_object_find(connector->dev, connector->encoder_ids[i], DRM_MODE_OBJECT_ENCODER);
+                if (!obj)
+                        continue;
+                encoder = obj_to_encoder(obj);
+                if (encoder->encoder_type == encoder_type)
+                        return encoder;
+        }
+        return NULL;
+}
 struct drm_encoder *radeon_best_single_encoder(struct drm_connector *connector)
 {
        int enc_id = connector->encoder_ids[0];
@@ -94,6 +125,53 @@ struct drm_encoder *radeon_best_single_encoder(struct drm_connector *connector)
        return NULL;
 }
+/*
+ * radeon_connector_analog_encoder_conflict_solve
+ * - search for other connectors sharing this encoder
+ *   if priority is true, then set them disconnected if this is connected
+ *   if priority is false, set us disconnected if they are connected
+ */
+static enum drm_connector_status
+radeon_connector_analog_encoder_conflict_solve(struct drm_connector *connector,
+                                               struct drm_encoder *encoder,
+                                               enum drm_connector_status current_status,
+                                               bool priority)
+{
+        struct drm_device *dev = connector->dev;
+        struct drm_connector *conflict;
+        int i;
+        list_for_each_entry(conflict, &dev->mode_config.connector_list, head) {
+                if (conflict == connector)
+                        continue;
+                for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
+                        if (conflict->encoder_ids[i] == 0)
+                                break;
+                        /* if the IDs match */
+                        if (conflict->encoder_ids[i] == encoder->base.id) {
+                                if (conflict->status != connector_status_connected)
+                                        continue;
+                                if (priority == true) {
+                                        DRM_INFO("1: conflicting encoders switching off %s\n", drm_get_connector_name(conflict));
+                                        DRM_INFO("in favor of %s\n", drm_get_connector_name(connector));
+                                        conflict->status = connector_status_disconnected;
+                                        radeon_connector_update_scratch_regs(conflict, connector_status_disconnected);
+                                } else {
+                                        DRM_INFO("2: conflicting encoders switching off %s\n", drm_get_connector_name(connector));
+                                        DRM_INFO("in favor of %s\n", drm_get_connector_name(conflict));
+                                        current_status = connector_status_disconnected;
+                                }
+                                break;
+                        }
+                }
+        }
+        return current_status;
+}
 static struct drm_display_mode *radeon_fp_native_mode(struct drm_encoder *encoder)
 {
        struct drm_device *dev = encoder->dev;
@@ -126,12 +204,171 @@ static struct drm_display_mode *radeon_fp_native_mode(struct drm_encoder *encode
        return mode;
 }
+static void radeon_add_common_modes(struct drm_encoder *encoder, struct drm_connector *connector)
+{
+        struct drm_device *dev = encoder->dev;
+        struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
+        struct drm_display_mode *mode = NULL;
+        struct radeon_native_mode *native_mode = &radeon_encoder->native_mode;
+        int i;
+        struct mode_size {
+                int w;
+                int h;
+        } common_modes[17] = {
+                { 640,  480},
+                { 720,  480},
+                { 800,  600},
+                { 848,  480},
+                {1024,  768},
+                {1152,  768},
+                {1280,  720},
+                {1280,  800},
+                {1280,  854},
+                {1280,  960},
+                {1280, 1024},
+                {1440,  900},
+                {1400, 1050},
+                {1680, 1050},
+                {1600, 1200},
+                {1920, 1080},
+                {1920, 1200}
+        };
+        for (i = 0; i < 17; i++) {
+                if (radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT)) {
+                        if (common_modes[i].w > native_mode->panel_xres ||
+                            common_modes[i].h > native_mode->panel_yres ||
+                            (common_modes[i].w == native_mode->panel_xres &&
+                             common_modes[i].h == native_mode->panel_yres))
+                                continue;
+                }
+                if (common_modes[i].w < 320 || common_modes[i].h < 200)
+                        continue;
+                mode = drm_cvt_mode(dev, common_modes[i].w, common_modes[i].h, 60, false, false);
+                drm_mode_probed_add(connector, mode);
+        }
+}
 int radeon_connector_set_property(struct drm_connector *connector, struct drm_property *property,
                                  uint64_t val)
 {
+        struct drm_device *dev = connector->dev;
+        struct radeon_device *rdev = dev->dev_private;
+        struct drm_encoder *encoder;
+        struct radeon_encoder *radeon_encoder;
+        if (property == rdev->mode_info.coherent_mode_property) {
+                struct radeon_encoder_atom_dig *dig;
+                /* need to find digital encoder on connector */
+                encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS);
+                if (!encoder)
+                        return 0;
+                radeon_encoder = to_radeon_encoder(encoder);
+                if (!radeon_encoder->enc_priv)
+                        return 0;
+                dig = radeon_encoder->enc_priv;
+                dig->coherent_mode = val ? true : false;
+                radeon_property_change_mode(&radeon_encoder->base);
+        }
+        if (property == rdev->mode_info.tv_std_property) {
+                encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TVDAC);
+                if (!encoder) {
+                        encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_DAC);
+                }
+                if (!encoder)
+                        return 0;
+                radeon_encoder = to_radeon_encoder(encoder);
+                if (!radeon_encoder->enc_priv)
+                        return 0;
+                if (rdev->is_atom_bios) {
+                        struct radeon_encoder_atom_dac *dac_int;
+                        dac_int = radeon_encoder->enc_priv;
+                        dac_int->tv_std = val;
+                } else {
+                        struct radeon_encoder_tv_dac *dac_int;
+                        dac_int = radeon_encoder->enc_priv;
+                        dac_int->tv_std = val;
+                }
+                radeon_property_change_mode(&radeon_encoder->base);
+        }
+        if (property == rdev->mode_info.load_detect_property) {
+                struct radeon_connector *radeon_connector =
+                        to_radeon_connector(connector);
+                if (val == 0)
+                        radeon_connector->dac_load_detect = false;
+                else
+                        radeon_connector->dac_load_detect = true;
+        }
+        if (property == rdev->mode_info.tmds_pll_property) {
+                struct radeon_encoder_int_tmds *tmds = NULL;
+                bool ret = false;
+                /* need to find digital encoder on connector */
+                encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS);
+                if (!encoder)
+                        return 0;
+                radeon_encoder = to_radeon_encoder(encoder);
+                tmds = radeon_encoder->enc_priv;
+                if (!tmds)
+                        return 0;
+                if (val == 0) {
+                        if (rdev->is_atom_bios)
+                                ret = radeon_atombios_get_tmds_info(radeon_encoder, tmds);
+                        else
+                                ret = radeon_legacy_get_tmds_info_from_combios(radeon_encoder, tmds);
+                }
+                if (val == 1 || ret == false) {
+                        radeon_legacy_get_tmds_info_from_table(radeon_encoder, tmds);
+                }
+                radeon_property_change_mode(&radeon_encoder->base);
+        }
        return 0;
 }
+static void radeon_fixup_lvds_native_mode(struct drm_encoder *encoder,
+                                          struct drm_connector *connector)
+{
+        struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
+        struct radeon_native_mode *native_mode = &radeon_encoder->native_mode;
+        /* Try to get native mode details from EDID if necessary */
+        if (!native_mode->dotclock) {
+                struct drm_display_mode *t, *mode;
+                list_for_each_entry_safe(mode, t, &connector->probed_modes, head) {
+                        if (mode->hdisplay == native_mode->panel_xres &&
+                            mode->vdisplay == native_mode->panel_yres) {
+                                native_mode->hblank = mode->htotal - mode->hdisplay;
+                                native_mode->hoverplus = mode->hsync_start - mode->hdisplay;
+                                native_mode->hsync_width = mode->hsync_end - mode->hsync_start;
+                                native_mode->vblank = mode->vtotal - mode->vdisplay;
+                                native_mode->voverplus = mode->vsync_start - mode->vdisplay;
+                                native_mode->vsync_width = mode->vsync_end - mode->vsync_start;
+                                native_mode->dotclock = mode->clock;
+                                DRM_INFO("Determined LVDS native mode details from EDID\n");
+                                break;
+                        }
+                }
+        }
+        if (!native_mode->dotclock) {
+                DRM_INFO("No LVDS native mode details, disabling RMX\n");
+                radeon_encoder->rmx_type = RMX_OFF;
+        }
+}
 static int radeon_lvds_get_modes(struct drm_connector *connector)
 {
@@ -143,6 +380,12 @@ static int radeon_lvds_get_modes(struct drm_connector *connector)
        if (radeon_connector->ddc_bus) {
                ret = radeon_ddc_get_modes(radeon_connector);
                if (ret > 0) {
+                        encoder = radeon_best_single_encoder(connector);
+                        if (encoder) {
+                                radeon_fixup_lvds_native_mode(encoder, connector);
+                                /* add scaled modes */
+                                radeon_add_common_modes(encoder, connector);
+                        }
                        return ret;
                }
        }
@@ -156,7 +399,10 @@ static int radeon_lvds_get_modes(struct drm_connector *connector)
        if (mode) {
                ret = 1;
                drm_mode_probed_add(connector, mode);
+                /* add scaled modes */
+                radeon_add_common_modes(encoder, connector);
        }
        return ret;
 }
@@ -186,6 +432,42 @@ static void radeon_connector_destroy(struct drm_connector *connector)
        kfree(connector);
 }
+static int radeon_lvds_set_property(struct drm_connector *connector,
+                                    struct drm_property *property,
+                                    uint64_t value)
+{
+        struct drm_device *dev = connector->dev;
+        struct radeon_encoder *radeon_encoder;
+        enum radeon_rmx_type rmx_type;
+        DRM_DEBUG("\n");
+        if (property != dev->mode_config.scaling_mode_property)
+                return 0;
+        if (connector->encoder)
+                radeon_encoder = to_radeon_encoder(connector->encoder);
+        else {
+                struct drm_connector_helper_funcs *connector_funcs = connector->helper_private;
+                radeon_encoder = to_radeon_encoder(connector_funcs->best_encoder(connector));
+        }
+        switch (value) {
+        case DRM_MODE_SCALE_NONE: rmx_type = RMX_OFF; break;
+        case DRM_MODE_SCALE_CENTER: rmx_type = RMX_CENTER; break;
+        case DRM_MODE_SCALE_ASPECT: rmx_type = RMX_ASPECT; break;
+        default:
+        case DRM_MODE_SCALE_FULLSCREEN: rmx_type = RMX_FULL; break;
+        }
+        if (radeon_encoder->rmx_type == rmx_type)
+                return 0;
+        radeon_encoder->rmx_type = rmx_type;
+        radeon_property_change_mode(&radeon_encoder->base);
+        return 0;
+}
 struct drm_connector_helper_funcs radeon_lvds_connector_helper_funcs = {
        .get_modes = radeon_lvds_get_modes,
        .mode_valid = radeon_lvds_mode_valid,
@@ -197,7 +479,7 @@ struct drm_connector_funcs radeon_lvds_connector_funcs = {
        .detect = radeon_lvds_detect,
        .fill_modes = drm_helper_probe_single_connector_modes,
        .destroy = radeon_connector_destroy,
-        .set_property = radeon_connector_set_property,
+        .set_property = radeon_lvds_set_property,
 };
 static int radeon_vga_get_modes(struct drm_connector *connector)
@@ -213,7 +495,6 @@ static int radeon_vga_get_modes(struct drm_connector *connector)
 static int radeon_vga_mode_valid(struct drm_connector *connector,
                                  struct drm_display_mode *mode)
 {
        return MODE_OK;
 }
@@ -225,22 +506,24 @@ static enum drm_connector_status radeon_vga_detect(struct drm_connector *connect
        bool dret;
        enum drm_connector_status ret = connector_status_disconnected;
+        encoder = radeon_best_single_encoder(connector);
+        if (!encoder)
+                ret = connector_status_disconnected;
        radeon_i2c_do_lock(radeon_connector, 1);
        dret = radeon_ddc_probe(radeon_connector);
        radeon_i2c_do_lock(radeon_connector, 0);
        if (dret)
                ret = connector_status_connected;
        else {
-                /* if EDID fails to a load detect */
+                if (radeon_connector->dac_load_detect) {
-                encoder = radeon_best_single_encoder(connector);
-                if (!encoder)
-                        ret = connector_status_disconnected;
-                else {
                        encoder_funcs = encoder->helper_private;
                        ret = encoder_funcs->detect(encoder, connector);
                }
        }
+        if (ret == connector_status_connected)
+                ret = radeon_connector_analog_encoder_conflict_solve(connector, encoder, ret, true);
        radeon_connector_update_scratch_regs(connector, ret);
        return ret;
 }
@@ -259,21 +542,97 @@ struct drm_connector_funcs radeon_vga_connector_funcs = {
        .set_property = radeon_connector_set_property,
 };
+static int radeon_tv_get_modes(struct drm_connector *connector)
+{
+        struct drm_device *dev = connector->dev;
+        struct radeon_device *rdev = dev->dev_private;
+        struct drm_display_mode *tv_mode;
+        struct drm_encoder *encoder;
+        encoder = radeon_best_single_encoder(connector);
+        if (!encoder)
+                return 0;
+        /* avivo chips can scale any mode */
+        if (rdev->family >= CHIP_RS600)
+                /* add scaled modes */
+                radeon_add_common_modes(encoder, connector);
+        else {
+                /* only 800x600 is supported right now on pre-avivo chips */
+                tv_mode = drm_cvt_mode(dev, 800, 600, 60, false, false);
+                tv_mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
+                drm_mode_probed_add(connector, tv_mode);
+        }
+        return 1;
+}
+static int radeon_tv_mode_valid(struct drm_connector *connector,
+                                struct drm_display_mode *mode)
+{
+        return MODE_OK;
+}
+static enum drm_connector_status radeon_tv_detect(struct drm_connector *connector)
+{
+        struct drm_encoder *encoder;
+        struct drm_encoder_helper_funcs *encoder_funcs;
+        struct radeon_connector *radeon_connector = to_radeon_connector(connector);
+        enum drm_connector_status ret = connector_status_disconnected;
+        if (!radeon_connector->dac_load_detect)
+                return ret;
+        encoder = radeon_best_single_encoder(connector);
+        if (!encoder)
+                ret = connector_status_disconnected;
+        else {
+                encoder_funcs = encoder->helper_private;
+                ret = encoder_funcs->detect(encoder, connector);
+        }
+        if (ret == connector_status_connected)
+                ret = radeon_connector_analog_encoder_conflict_solve(connector, encoder, ret, false);
+        radeon_connector_update_scratch_regs(connector, ret);
+        return ret;
+}
+struct drm_connector_helper_funcs radeon_tv_connector_helper_funcs = {
+        .get_modes = radeon_tv_get_modes,
+        .mode_valid = radeon_tv_mode_valid,
+        .best_encoder = radeon_best_single_encoder,
+};
+struct drm_connector_funcs radeon_tv_connector_funcs = {
+        .dpms = drm_helper_connector_dpms,
+        .detect = radeon_tv_detect,
+        .fill_modes = drm_helper_probe_single_connector_modes,
+        .destroy = radeon_connector_destroy,
+        .set_property = radeon_connector_set_property,
+};
 static int radeon_dvi_get_modes(struct drm_connector *connector)
 {
        struct radeon_connector *radeon_connector = to_radeon_connector(connector);
        int ret;
        ret = radeon_ddc_get_modes(radeon_connector);
-        /* reset scratch regs here since radeon_dvi_detect doesn't check digital bit */
-        radeon_connector_update_scratch_regs(connector, connector_status_connected);
        return ret;
 }
+/*
+ * DVI is complicated
+ * Do a DDC probe, if DDC probe passes, get the full EDID so
+ * we can do analog/digital monitor detection at this point.
+ * If the monitor is an analog monitor or we got no DDC,
+ * we need to find the DAC encoder object for this connector.
+ * If we got no DDC, we do load detection on the DAC encoder object.
+ * If we got analog DDC or load detection passes on the DAC encoder
+ * we have to check if this analog encoder is shared with anyone else (TV)
+ * if its shared we have to set the other connector to disconnected.
+ */
 static enum drm_connector_status radeon_dvi_detect(struct drm_connector *connector)
 {
        struct radeon_connector *radeon_connector = to_radeon_connector(connector);
-        struct drm_encoder *encoder;
+        struct drm_encoder *encoder = NULL;
        struct drm_encoder_helper_funcs *encoder_funcs;
        struct drm_mode_object *obj;
        int i;
@@ -283,9 +642,29 @@ static enum drm_connector_status radeon_dvi_detect(struct drm_connector *connect
        radeon_i2c_do_lock(radeon_connector, 1);
        dret = radeon_ddc_probe(radeon_connector);
        radeon_i2c_do_lock(radeon_connector, 0);
-        if (dret)
+        if (dret) {
-                ret = connector_status_connected;
+                radeon_i2c_do_lock(radeon_connector, 1);
-        else {
+                radeon_connector->edid = drm_get_edid(&radeon_connector->base, &radeon_connector->ddc_bus->adapter);
+                radeon_i2c_do_lock(radeon_connector, 0);
+                if (!radeon_connector->edid) {
+                        DRM_ERROR("DDC responded but not EDID found for %s\n",
+                                  drm_get_connector_name(connector));
+                } else {
+                        radeon_connector->use_digital = !!(radeon_connector->edid->input & DRM_EDID_INPUT_DIGITAL);
+                        /* if this isn't a digital monitor
+                           then we need to make sure we don't have any
+                           TV conflicts */
+                        ret = connector_status_connected;
+                }
+        }
+        if ((ret == connector_status_connected) && (radeon_connector->use_digital == true))
+                goto out;
+        /* find analog encoder */
+        if (radeon_connector->dac_load_detect) {
                for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
                        if (connector->encoder_ids[i] == 0)
                                break;
@@ -300,15 +679,23 @@ static enum drm_connector_status radeon_dvi_detect(struct drm_connector *connect
                        encoder_funcs = encoder->helper_private;
                        if (encoder_funcs->detect) {
-                                ret = encoder_funcs->detect(encoder, connector);
+                                if (ret != connector_status_connected) {
-                                if (ret == connector_status_connected) {
+                                        ret = encoder_funcs->detect(encoder, connector);
-                                        radeon_connector->use_digital = 0;
+                                        if (ret == connector_status_connected) {
-                                        break;
+                                                radeon_connector->use_digital = false;
+                                        }
                                }
+                                break;
                        }
                }
        }
+        if ((ret == connector_status_connected) && (radeon_connector->use_digital == false) &&
+            encoder) {
+                ret = radeon_connector_analog_encoder_conflict_solve(connector, encoder, ret, true);
+        }
+out:
        /* updated in get modes as well since we need to know if it's analog or digital */
        radeon_connector_update_scratch_regs(connector, ret);
        return ret;
@@ -332,7 +719,7 @@ struct drm_encoder *radeon_dvi_encoder(struct drm_connector *connector)
                encoder = obj_to_encoder(obj);
-                if (radeon_connector->use_digital) {
+                if (radeon_connector->use_digital == true) {
                        if (encoder->encoder_type == DRM_MODE_ENCODER_TMDS)
                                return encoder;
                } else {
@@ -379,16 +766,14 @@ radeon_add_atom_connector(struct drm_device *dev,
                          bool linkb,
                          uint32_t igp_lane_info)
 {
+        struct radeon_device *rdev = dev->dev_private;
        struct drm_connector *connector;
        struct radeon_connector *radeon_connector;
        struct radeon_connector_atom_dig *radeon_dig_connector;
        uint32_t subpixel_order = SubPixelNone;
        /* fixme - tv/cv/din */
-        if ((connector_type == DRM_MODE_CONNECTOR_Unknown) ||
+        if (connector_type == DRM_MODE_CONNECTOR_Unknown)
-            (connector_type == DRM_MODE_CONNECTOR_SVIDEO) ||
-            (connector_type == DRM_MODE_CONNECTOR_Composite) ||
-            (connector_type == DRM_MODE_CONNECTOR_9PinDIN))
                return;
        /* see if we already added it */
@@ -417,6 +802,9 @@ radeon_add_atom_connector(struct drm_device *dev,
                        if (!radeon_connector->ddc_bus)
                                goto failed;
                }
+                drm_connector_attach_property(&radeon_connector->base,
+                                              rdev->mode_info.load_detect_property,
+                                              1);
                break;
        case DRM_MODE_CONNECTOR_DVIA:
                drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type);
@@ -426,6 +814,9 @@ radeon_add_atom_connector(struct drm_device *dev,
                        if (!radeon_connector->ddc_bus)
                                goto failed;
                }
+                drm_connector_attach_property(&radeon_connector->base,
+                                              rdev->mode_info.load_detect_property,
+                                              1);
                break;
        case DRM_MODE_CONNECTOR_DVII:
        case DRM_MODE_CONNECTOR_DVID:
@@ -443,6 +834,12 @@ radeon_add_atom_connector(struct drm_device *dev,
                                goto failed;
                }
                subpixel_order = SubPixelHorizontalRGB;
+                drm_connector_attach_property(&radeon_connector->base,
+                                              rdev->mode_info.coherent_mode_property,
+                                              1);
+                drm_connector_attach_property(&radeon_connector->base,
+                                              rdev->mode_info.load_detect_property,
+                                              1);
                break;
        case DRM_MODE_CONNECTOR_HDMIA:
        case DRM_MODE_CONNECTOR_HDMIB:
@@ -459,6 +856,9 @@ radeon_add_atom_connector(struct drm_device *dev,
                        if (!radeon_connector->ddc_bus)
                                goto failed;
                }
+                drm_connector_attach_property(&radeon_connector->base,
+                                              rdev->mode_info.coherent_mode_property,
+                                              1);
                subpixel_order = SubPixelHorizontalRGB;
                break;
        case DRM_MODE_CONNECTOR_DisplayPort:
@@ -480,6 +880,13 @@ radeon_add_atom_connector(struct drm_device *dev,
        case DRM_MODE_CONNECTOR_SVIDEO:
        case DRM_MODE_CONNECTOR_Composite:
        case DRM_MODE_CONNECTOR_9PinDIN:
+                if (radeon_tv == 1) {
+                        drm_connector_init(dev, &radeon_connector->base, &radeon_tv_connector_funcs, connector_type);
+                        drm_connector_helper_add(&radeon_connector->base, &radeon_tv_connector_helper_funcs);
+                }
+                drm_connector_attach_property(&radeon_connector->base,
+                                              rdev->mode_info.load_detect_property,
+                                              1);
                break;
        case DRM_MODE_CONNECTOR_LVDS:
                radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL);
@@ -495,6 +902,10 @@ radeon_add_atom_connector(struct drm_device *dev,
                        if (!radeon_connector->ddc_bus)
                                goto failed;
                }
+                drm_mode_create_scaling_mode_property(dev);
+                drm_connector_attach_property(&radeon_connector->base,
+                                              dev->mode_config.scaling_mode_property,
+                                              DRM_MODE_SCALE_FULLSCREEN);
                subpixel_order = SubPixelHorizontalRGB;
                break;
        }
@@ -517,15 +928,13 @@ radeon_add_legacy_connector(struct drm_device *dev,
                            int connector_type,
                            struct radeon_i2c_bus_rec *i2c_bus)
 {
+        struct radeon_device *rdev = dev->dev_private;
        struct drm_connector *connector;
        struct radeon_connector *radeon_connector;
        uint32_t subpixel_order = SubPixelNone;
        /* fixme - tv/cv/din */
-        if ((connector_type == DRM_MODE_CONNECTOR_Unknown) ||
+        if (connector_type == DRM_MODE_CONNECTOR_Unknown)
-            (connector_type == DRM_MODE_CONNECTOR_SVIDEO) ||
-            (connector_type == DRM_MODE_CONNECTOR_Composite) ||
-            (connector_type == DRM_MODE_CONNECTOR_9PinDIN))
                return;
        /* see if we already added it */
@@ -554,6 +963,9 @@ radeon_add_legacy_connector(struct drm_device *dev,
                        if (!radeon_connector->ddc_bus)
                                goto failed;
                }
+                drm_connector_attach_property(&radeon_connector->base,
+                                              rdev->mode_info.load_detect_property,
+                                              1);
                break;
        case DRM_MODE_CONNECTOR_DVIA:
                drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type);
@@ -563,6 +975,9 @@ radeon_add_legacy_connector(struct drm_device *dev,
                        if (!radeon_connector->ddc_bus)
                                goto failed;
                }
+                drm_connector_attach_property(&radeon_connector->base,
+                                              rdev->mode_info.load_detect_property,
+                                              1);
                break;
        case DRM_MODE_CONNECTOR_DVII:
        case DRM_MODE_CONNECTOR_DVID:
@@ -572,12 +987,22 @@ radeon_add_legacy_connector(struct drm_device *dev,
                        radeon_connector->ddc_bus = radeon_i2c_create(dev, i2c_bus, "DVI");
                        if (!radeon_connector->ddc_bus)
                                goto failed;
+                        drm_connector_attach_property(&radeon_connector->base,
+                                                      rdev->mode_info.load_detect_property,
+                                                      1);
                }
                subpixel_order = SubPixelHorizontalRGB;
                break;
        case DRM_MODE_CONNECTOR_SVIDEO:
        case DRM_MODE_CONNECTOR_Composite:
        case DRM_MODE_CONNECTOR_9PinDIN:
+                if (radeon_tv == 1) {
+                        drm_connector_init(dev, &radeon_connector->base, &radeon_tv_connector_funcs, connector_type);
+                        drm_connector_helper_add(&radeon_connector->base, &radeon_tv_connector_helper_funcs);
+                        drm_connector_attach_property(&radeon_connector->base,
+                                                      rdev->mode_info.load_detect_property,
+                                                      1);
+                }
                break;
        case DRM_MODE_CONNECTOR_LVDS:
                drm_connector_init(dev, &radeon_connector->base, &radeon_lvds_connector_funcs, connector_type);
@@ -587,6 +1012,9 @@ radeon_add_legacy_connector(struct drm_device *dev,
                        if (!radeon_connector->ddc_bus)
                                goto failed;
                }
+                drm_connector_attach_property(&radeon_connector->base,
+                                              dev->mode_config.scaling_mode_property,
+                                              DRM_MODE_SCALE_FULLSCREEN);
                subpixel_order = SubPixelHorizontalRGB;
                break;
        }
diff --git a/drivers/gpu/drm/radeon/radeon_cp.c b/drivers/gpu/drm/radeon/radeon_cp.c
index 7a52c461145c..4f7afc79dd82 100644
--- a/drivers/gpu/drm/radeon/radeon_cp.c
+++ b/drivers/gpu/drm/radeon/radeon_cp.c
@@ -36,10 +36,25 @@
 #include "radeon_drv.h"
 #include "r300_reg.h"
-#include "radeon_microcode.h"
 #define RADEON_FIFO_DEBUG       0
+/* Firmware Names */
+#define FIRMWARE_R100           "radeon/R100_cp.bin"
+#define FIRMWARE_R200           "radeon/R200_cp.bin"
+#define FIRMWARE_R300           "radeon/R300_cp.bin"
+#define FIRMWARE_R420           "radeon/R420_cp.bin"
+#define FIRMWARE_RS690          "radeon/RS690_cp.bin"
+#define FIRMWARE_RS600          "radeon/RS600_cp.bin"
+#define FIRMWARE_R520           "radeon/R520_cp.bin"
+MODULE_FIRMWARE(FIRMWARE_R100);
+MODULE_FIRMWARE(FIRMWARE_R200);
+MODULE_FIRMWARE(FIRMWARE_R300);
+MODULE_FIRMWARE(FIRMWARE_R420);
+MODULE_FIRMWARE(FIRMWARE_RS690);
+MODULE_FIRMWARE(FIRMWARE_RS600);
+MODULE_FIRMWARE(FIRMWARE_R520);
 static int radeon_do_cleanup_cp(struct drm_device * dev);
 static void radeon_do_cp_start(drm_radeon_private_t * dev_priv);
@@ -460,37 +475,34 @@ static void radeon_init_pipes(drm_radeon_private_t *dev_priv)
 */
 /* Load the microcode for the CP */
-static void radeon_cp_load_microcode(drm_radeon_private_t * dev_priv)
+static int radeon_cp_init_microcode(drm_radeon_private_t *dev_priv)
 {
-        int i;
+        struct platform_device *pdev;
+        const char *fw_name = NULL;
+        int err;
        DRM_DEBUG("\n");
-        radeon_do_wait_for_idle(dev_priv);
+        pdev = platform_device_register_simple("radeon_cp", 0, NULL, 0);
+        err = IS_ERR(pdev);
+        if (err) {
+                printk(KERN_ERR "radeon_cp: Failed to register firmware\n");
+                return -EINVAL;
+        }
-        RADEON_WRITE(RADEON_CP_ME_RAM_ADDR, 0);
        if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_R100) ||
            ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV100) ||
            ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV200) ||
            ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS100) ||
            ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS200)) {
                DRM_INFO("Loading R100 Microcode\n");
-                for (i = 0; i < 256; i++) {
+                fw_name = FIRMWARE_R100;
-                        RADEON_WRITE(RADEON_CP_ME_RAM_DATAH,
-                                     R100_cp_microcode[i][1]);
-                        RADEON_WRITE(RADEON_CP_ME_RAM_DATAL,
-                                     R100_cp_microcode[i][0]);
-                }
        } else if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_R200) ||
                   ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV250) ||
                   ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV280) ||
                   ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS300)) {
                DRM_INFO("Loading R200 Microcode\n");
-                for (i = 0; i < 256; i++) {
+                fw_name = FIRMWARE_R200;
-                        RADEON_WRITE(RADEON_CP_ME_RAM_DATAH,
-                                     R200_cp_microcode[i][1]);
-                        RADEON_WRITE(RADEON_CP_ME_RAM_DATAL,
-                                     R200_cp_microcode[i][0]);
-                }
        } else if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_R300) ||
                   ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_R350) ||
                   ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV350) ||
@@ -498,39 +510,19 @@ static void radeon_cp_load_microcode(drm_radeon_private_t * dev_priv)
                   ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS400) ||
                   ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS480)) {
                DRM_INFO("Loading R300 Microcode\n");
-                for (i = 0; i < 256; i++) {
+                fw_name = FIRMWARE_R300;
-                        RADEON_WRITE(RADEON_CP_ME_RAM_DATAH,
-                                     R300_cp_microcode[i][1]);
-                        RADEON_WRITE(RADEON_CP_ME_RAM_DATAL,
-                                     R300_cp_microcode[i][0]);
-                }
        } else if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_R420) ||
                   ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_R423) ||
                   ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV410)) {
                DRM_INFO("Loading R400 Microcode\n");
-                for (i = 0; i < 256; i++) {
+                fw_name = FIRMWARE_R420;
-                        RADEON_WRITE(RADEON_CP_ME_RAM_DATAH,
-                                     R420_cp_microcode[i][1]);
-                        RADEON_WRITE(RADEON_CP_ME_RAM_DATAL,
-                                     R420_cp_microcode[i][0]);
-                }
        } else if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690) ||
                   ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS740)) {
                DRM_INFO("Loading RS690/RS740 Microcode\n");
-                for (i = 0; i < 256; i++) {
+                fw_name = FIRMWARE_RS690;
-                        RADEON_WRITE(RADEON_CP_ME_RAM_DATAH,
-                                     RS690_cp_microcode[i][1]);
-                        RADEON_WRITE(RADEON_CP_ME_RAM_DATAL,
-                                     RS690_cp_microcode[i][0]);
-                }
        } else if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS600) {
                DRM_INFO("Loading RS600 Microcode\n");
-                for (i = 0; i < 256; i++) {
+                fw_name = FIRMWARE_RS600;
-                        RADEON_WRITE(RADEON_CP_ME_RAM_DATAH,
-                                     RS600_cp_microcode[i][1]);
-                        RADEON_WRITE(RADEON_CP_ME_RAM_DATAL,
-                                     RS600_cp_microcode[i][0]);
-                }
        } else if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV515) ||
                   ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_R520) ||
                   ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV530) ||
@@ -538,11 +530,41 @@ static void radeon_cp_load_microcode(drm_radeon_private_t * dev_priv)
                   ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV560) ||
                   ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV570)) {
                DRM_INFO("Loading R500 Microcode\n");
-                for (i = 0; i < 256; i++) {
+                fw_name = FIRMWARE_R520;
+        }
+        err = request_firmware(&dev_priv->me_fw, fw_name, &pdev->dev);
+        platform_device_unregister(pdev);
+        if (err) {
+                printk(KERN_ERR "radeon_cp: Failed to load firmware \"%s\"\n",
+                       fw_name);
+        } else if (dev_priv->me_fw->size % 8) {
+                printk(KERN_ERR
+                       "radeon_cp: Bogus length %zu in firmware \"%s\"\n",
+                       dev_priv->me_fw->size, fw_name);
+                err = -EINVAL;
+                release_firmware(dev_priv->me_fw);
+                dev_priv->me_fw = NULL;
+        }
+        return err;
+}
+static void radeon_cp_load_microcode(drm_radeon_private_t *dev_priv)
+{
+        const __be32 *fw_data;
+        int i, size;
+        radeon_do_wait_for_idle(dev_priv);
+        if (dev_priv->me_fw) {
+                size = dev_priv->me_fw->size / 4;
+                fw_data = (const __be32 *)&dev_priv->me_fw->data[0];
+                RADEON_WRITE(RADEON_CP_ME_RAM_ADDR, 0);
+                for (i = 0; i < size; i += 2) {
                        RADEON_WRITE(RADEON_CP_ME_RAM_DATAH,
-                                     R520_cp_microcode[i][1]);
+                                     be32_to_cpup(&fw_data[i]));
                        RADEON_WRITE(RADEON_CP_ME_RAM_DATAL,
-                                     R520_cp_microcode[i][0]);
+                                     be32_to_cpup(&fw_data[i + 1]));
                }
        }
 }
@@ -594,6 +616,18 @@ static void radeon_do_cp_start(drm_radeon_private_t * dev_priv)
        dev_priv->cp_running = 1;
+        /* on r420, any DMA from CP to system memory while 2D is active
+         * can cause a hang.  workaround is to queue a CP RESYNC token
+         */
+        if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_R420) {
+                BEGIN_RING(3);
+                OUT_RING(CP_PACKET0(R300_CP_RESYNC_ADDR, 1));
+                OUT_RING(5); /* scratch reg 5 */
+                OUT_RING(0xdeadbeef);
+                ADVANCE_RING();
+                COMMIT_RING();
+        }
        BEGIN_RING(8);
        /* isync can only be written through cp on r5xx write it here */
        OUT_RING(CP_PACKET0(RADEON_ISYNC_CNTL, 0));
@@ -631,8 +665,19 @@ static void radeon_do_cp_reset(drm_radeon_private_t * dev_priv)
 */
 static void radeon_do_cp_stop(drm_radeon_private_t * dev_priv)
 {
+        RING_LOCALS;
        DRM_DEBUG("\n");
+        /* finish the pending CP_RESYNC token */
+        if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_R420) {
+                BEGIN_RING(2);
+                OUT_RING(CP_PACKET0(R300_RB3D_DSTCACHE_CTLSTAT, 0));
+                OUT_RING(R300_RB3D_DC_FINISH);
+                ADVANCE_RING();
+                COMMIT_RING();
+                radeon_do_wait_for_idle(dev_priv);
+        }
        RADEON_WRITE(RADEON_CP_CSQ_CNTL, RADEON_CSQ_PRIDIS_INDDIS);
        dev_priv->cp_running = 0;
@@ -1495,6 +1540,14 @@ static int radeon_do_init_cp(struct drm_device *dev, drm_radeon_init_t *init,
                radeon_set_pcigart(dev_priv, 1);
        }
+        if (!dev_priv->me_fw) {
+                int err = radeon_cp_init_microcode(dev_priv);
+                if (err) {
+                        DRM_ERROR("Failed to load firmware!\n");
+                        radeon_do_cleanup_cp(dev);
+                        return err;
+                }
+        }
        radeon_cp_load_microcode(dev_priv);
        radeon_cp_init_ring_buffer(dev, dev_priv, file_priv);
@@ -1764,6 +1817,14 @@ void radeon_do_release(struct drm_device * dev)
                        r600_do_cleanup_cp(dev);
                else
                        radeon_do_cleanup_cp(dev);
+                if (dev_priv->me_fw) {
+                        release_firmware(dev_priv->me_fw);
+                        dev_priv->me_fw = NULL;
+                }
+                if (dev_priv->pfp_fw) {
+                        release_firmware(dev_priv->pfp_fw);
+                        dev_priv->pfp_fw = NULL;
+                }
        }
 }
diff --git a/drivers/gpu/drm/radeon/radeon_cs.c b/drivers/gpu/drm/radeon/radeon_cs.c
index a169067efc4e..12f5990c2d2a 100644
--- a/drivers/gpu/drm/radeon/radeon_cs.c
+++ b/drivers/gpu/drm/radeon/radeon_cs.c
@@ -145,7 +145,7 @@ int radeon_cs_parser_init(struct radeon_cs_parser *p, void *data)
                cdata = (uint32_t *)(unsigned long)user_chunk.chunk_data;
                size = p->chunks[i].length_dw * sizeof(uint32_t);
-                p->chunks[i].kdata = kzalloc(size, GFP_KERNEL);
+                p->chunks[i].kdata = kmalloc(size, GFP_KERNEL);
                if (p->chunks[i].kdata == NULL) {
                        return -ENOMEM;
                }
@@ -185,6 +185,7 @@ static void radeon_cs_parser_fini(struct radeon_cs_parser *parser, int error)
                        mutex_unlock(&parser->rdev->ddev->struct_mutex);
                }
        }
+        kfree(parser->track);
        kfree(parser->relocs);
        kfree(parser->relocs_ptr);
        for (i = 0; i < parser->nchunks; i++) {
diff --git a/drivers/gpu/drm/radeon/radeon_device.c b/drivers/gpu/drm/radeon/radeon_device.c
index 7693f7c67bd3..daf5db780956 100644
--- a/drivers/gpu/drm/radeon/radeon_device.c
+++ b/drivers/gpu/drm/radeon/radeon_device.c
@@ -29,6 +29,7 @@
 #include <drm/drmP.h>
 #include <drm/drm_crtc_helper.h>
 #include <drm/radeon_drm.h>
+#include <linux/vgaarb.h>
 #include "radeon_reg.h"
 #include "radeon.h"
 #include "radeon_asic.h"
@@ -37,7 +38,7 @@
 /*
 * Clear GPU surface registers.
 */
-static void radeon_surface_init(struct radeon_device *rdev)
+void radeon_surface_init(struct radeon_device *rdev)
 {
        /* FIXME: check this out */
        if (rdev->family < CHIP_R600) {
@@ -56,7 +57,7 @@ static void radeon_surface_init(struct radeon_device *rdev)
 /*
 * GPU scratch registers helpers function.
 */
-static void radeon_scratch_init(struct radeon_device *rdev)
+void radeon_scratch_init(struct radeon_device *rdev)
 {
        int i;
@@ -156,16 +157,18 @@ int radeon_mc_setup(struct radeon_device *rdev)
                tmp = (tmp + rdev->mc.gtt_size - 1) & ~(rdev->mc.gtt_size - 1);
                rdev->mc.gtt_location = tmp;
        }
-        DRM_INFO("radeon: VRAM %uM\n", rdev->mc.real_vram_size >> 20);
+        rdev->mc.vram_start = rdev->mc.vram_location;
+        rdev->mc.vram_end = rdev->mc.vram_location + rdev->mc.mc_vram_size - 1;
+        rdev->mc.gtt_start = rdev->mc.gtt_location;
+        rdev->mc.gtt_end = rdev->mc.gtt_location + rdev->mc.gtt_size - 1;
+        DRM_INFO("radeon: VRAM %uM\n", (unsigned)(rdev->mc.mc_vram_size >> 20));
        DRM_INFO("radeon: VRAM from 0x%08X to 0x%08X\n",
-                 rdev->mc.vram_location,
+                 (unsigned)rdev->mc.vram_location,
-                 rdev->mc.vram_location + rdev->mc.mc_vram_size - 1);
+                 (unsigned)(rdev->mc.vram_location + rdev->mc.mc_vram_size - 1));
-        if (rdev->mc.real_vram_size != rdev->mc.mc_vram_size)
+        DRM_INFO("radeon: GTT %uM\n", (unsigned)(rdev->mc.gtt_size >> 20));
-                DRM_INFO("radeon: VRAM less than aperture workaround enabled\n");
-        DRM_INFO("radeon: GTT %uM\n", rdev->mc.gtt_size >> 20);
        DRM_INFO("radeon: GTT from 0x%08X to 0x%08X\n",
-                 rdev->mc.gtt_location,
+                 (unsigned)rdev->mc.gtt_location,
-                 rdev->mc.gtt_location + rdev->mc.gtt_size - 1);
+                 (unsigned)(rdev->mc.gtt_location + rdev->mc.gtt_size - 1));
        return 0;
 }
@@ -173,7 +176,7 @@ int radeon_mc_setup(struct radeon_device *rdev)
 /*
 * GPU helpers function.
 */
-static bool radeon_card_posted(struct radeon_device *rdev)
+bool radeon_card_posted(struct radeon_device *rdev)
 {
        uint32_t reg;
@@ -205,6 +208,31 @@ static bool radeon_card_posted(struct radeon_device *rdev)
 }
+int radeon_dummy_page_init(struct radeon_device *rdev)
+{
+        rdev->dummy_page.page = alloc_page(GFP_DMA32 | GFP_KERNEL | __GFP_ZERO);
+        if (rdev->dummy_page.page == NULL)
+                return -ENOMEM;
+        rdev->dummy_page.addr = pci_map_page(rdev->pdev, rdev->dummy_page.page,
+                                        0, PAGE_SIZE, PCI_DMA_BIDIRECTIONAL);
+        if (!rdev->dummy_page.addr) {
+                __free_page(rdev->dummy_page.page);
+                rdev->dummy_page.page = NULL;
+                return -ENOMEM;
+        }
+        return 0;
+}
+void radeon_dummy_page_fini(struct radeon_device *rdev)
+{
+        if (rdev->dummy_page.page == NULL)
+                return;
+        pci_unmap_page(rdev->pdev, rdev->dummy_page.addr,
+                        PAGE_SIZE, PCI_DMA_BIDIRECTIONAL);
+        __free_page(rdev->dummy_page.page);
+        rdev->dummy_page.page = NULL;
+}
 /*
 * Registers accessors functions.
@@ -243,6 +271,10 @@ void radeon_register_accessor_init(struct radeon_device *rdev)
                rdev->pll_rreg = &r100_pll_rreg;
                rdev->pll_wreg = &r100_pll_wreg;
        }
+        if (rdev->family >= CHIP_R420) {
+                rdev->mc_rreg = &r420_mc_rreg;
+                rdev->mc_wreg = &r420_mc_wreg;
+        }
        if (rdev->family >= CHIP_RV515) {
                rdev->mc_rreg = &rv515_mc_rreg;
                rdev->mc_wreg = &rv515_mc_wreg;
@@ -289,6 +321,14 @@ int radeon_asic_init(struct radeon_device *rdev)
        case CHIP_RV350:
        case CHIP_RV380:
                rdev->asic = &r300_asic;
+                if (rdev->flags & RADEON_IS_PCIE) {
+                        rdev->asic->gart_init = &rv370_pcie_gart_init;
+                        rdev->asic->gart_fini = &rv370_pcie_gart_fini;
+                        rdev->asic->gart_enable = &rv370_pcie_gart_enable;
+                        rdev->asic->gart_disable = &rv370_pcie_gart_disable;
+                        rdev->asic->gart_tlb_flush = &rv370_pcie_gart_tlb_flush;
+                        rdev->asic->gart_set_page = &rv370_pcie_gart_set_page;
+                }
                break;
        case CHIP_R420:
        case CHIP_R423:
@@ -323,9 +363,15 @@ int radeon_asic_init(struct radeon_device *rdev)
        case CHIP_RV635:
        case CHIP_RV670:
        case CHIP_RS780:
+        case CHIP_RS880:
+                rdev->asic = &r600_asic;
+                break;
        case CHIP_RV770:
        case CHIP_RV730:
        case CHIP_RV710:
+        case CHIP_RV740:
+                rdev->asic = &rv770_asic;
+                break;
        default:
                /* FIXME: not supported yet */
                return -EINVAL;
@@ -341,7 +387,6 @@ int radeon_clocks_init(struct radeon_device *rdev)
 {
        int r;
-        radeon_get_clock_info(rdev->ddev);
        r = radeon_static_clocks_init(rdev->ddev);
        if (r) {
                return r;
@@ -436,10 +481,18 @@ void radeon_combios_fini(struct radeon_device *rdev)
 {
 }
-int radeon_modeset_init(struct radeon_device *rdev);
+/* if we get transitioned to only one device, tak VGA back */
-void radeon_modeset_fini(struct radeon_device *rdev);
+static unsigned int radeon_vga_set_decode(void *cookie, bool state)
+{
+        struct radeon_device *rdev = cookie;
+        radeon_vga_set_state(rdev, state);
+        if (state)
+                return VGA_RSRC_LEGACY_IO | VGA_RSRC_LEGACY_MEM |
+                       VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM;
+        else
+                return VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM;
+}
 /*
 * Radeon device.
 */
@@ -448,11 +501,12 @@ int radeon_device_init(struct radeon_device *rdev,
                       struct pci_dev *pdev,
                       uint32_t flags)
 {
-        int r, ret;
+        int r;
        int dma_bits;
        DRM_INFO("radeon: Initializing kernel modesetting.\n");
        rdev->shutdown = false;
+        rdev->dev = &pdev->dev;
        rdev->ddev = ddev;
        rdev->pdev = pdev;
        rdev->flags = flags;
@@ -461,37 +515,47 @@ int radeon_device_init(struct radeon_device *rdev,
        rdev->usec_timeout = RADEON_MAX_USEC_TIMEOUT;
        rdev->mc.gtt_size = radeon_gart_size * 1024 * 1024;
        rdev->gpu_lockup = false;
+        rdev->accel_working = false;
        /* mutex initialization are all done here so we
         * can recall function without having locking issues */
        mutex_init(&rdev->cs_mutex);
        mutex_init(&rdev->ib_pool.mutex);
        mutex_init(&rdev->cp.mutex);
        rwlock_init(&rdev->fence_drv.lock);
+        INIT_LIST_HEAD(&rdev->gem.objects);
+        /* Set asic functions */
+        r = radeon_asic_init(rdev);
+        if (r) {
+                return r;
+        }
        if (radeon_agpmode == -1) {
                rdev->flags &= ~RADEON_IS_AGP;
-                if (rdev->family > CHIP_RV515 ||
+                if (rdev->family >= CHIP_RV515 ||
                    rdev->family == CHIP_RV380 ||
                    rdev->family == CHIP_RV410 ||
                    rdev->family == CHIP_R423) {
                        DRM_INFO("Forcing AGP to PCIE mode\n");
                        rdev->flags |= RADEON_IS_PCIE;
+                        rdev->asic->gart_init = &rv370_pcie_gart_init;
+                        rdev->asic->gart_fini = &rv370_pcie_gart_fini;
+                        rdev->asic->gart_enable = &rv370_pcie_gart_enable;
+                        rdev->asic->gart_disable = &rv370_pcie_gart_disable;
+                        rdev->asic->gart_tlb_flush = &rv370_pcie_gart_tlb_flush;
+                        rdev->asic->gart_set_page = &rv370_pcie_gart_set_page;
                } else {
                        DRM_INFO("Forcing AGP to PCI mode\n");
                        rdev->flags |= RADEON_IS_PCI;
+                        rdev->asic->gart_init = &r100_pci_gart_init;
+                        rdev->asic->gart_fini = &r100_pci_gart_fini;
+                        rdev->asic->gart_enable = &r100_pci_gart_enable;
+                        rdev->asic->gart_disable = &r100_pci_gart_disable;
+                        rdev->asic->gart_tlb_flush = &r100_pci_gart_tlb_flush;
+                        rdev->asic->gart_set_page = &r100_pci_gart_set_page;
                }
        }
-        /* Set asic functions */
-        r = radeon_asic_init(rdev);
-        if (r) {
-                return r;
-        }
-        r = radeon_init(rdev);
-        if (r) {
-                return r;
-        }
        /* set DMA mask + need_dma32 flags.
         * PCIE - can handle 40-bits.
         * IGP - can handle 40-bits (in theory)
@@ -521,156 +585,150 @@ int radeon_device_init(struct radeon_device *rdev,
        DRM_INFO("register mmio base: 0x%08X\n", (uint32_t)rdev->rmmio_base);
        DRM_INFO("register mmio size: %u\n", (unsigned)rdev->rmmio_size);
-        /* Setup errata flags */
+        rdev->new_init_path = false;
-        radeon_errata(rdev);
+        r = radeon_init(rdev);
-        /* Initialize scratch registers */
-        radeon_scratch_init(rdev);
-        /* Initialize surface registers */
-        radeon_surface_init(rdev);
-        /* TODO: disable VGA need to use VGA request */
-        /* BIOS*/
-        if (!radeon_get_bios(rdev)) {
-                if (ASIC_IS_AVIVO(rdev))
-                        return -EINVAL;
-        }
-        if (rdev->is_atom_bios) {
-                r = radeon_atombios_init(rdev);
-                if (r) {
-                        return r;
-                }
-        } else {
-                r = radeon_combios_init(rdev);
-                if (r) {
-                        return r;
-                }
-        }
-        /* Reset gpu before posting otherwise ATOM will enter infinite loop */
-        if (radeon_gpu_reset(rdev)) {
-                /* FIXME: what do we want to do here ? */
-        }
-        /* check if cards are posted or not */
-        if (!radeon_card_posted(rdev) && rdev->bios) {
-                DRM_INFO("GPU not posted. posting now...\n");
-                if (rdev->is_atom_bios) {
-                        atom_asic_init(rdev->mode_info.atom_context);
-                } else {
-                        radeon_combios_asic_init(rdev->ddev);
-                }
-        }
-        /* Initialize clocks */
-        r = radeon_clocks_init(rdev);
-        if (r) {
-                return r;
-        }
-        /* Get vram informations */
-        radeon_vram_info(rdev);
-        /* Add an MTRR for the VRAM */
-        rdev->mc.vram_mtrr = mtrr_add(rdev->mc.aper_base, rdev->mc.aper_size,
-                                      MTRR_TYPE_WRCOMB, 1);
-        DRM_INFO("Detected VRAM RAM=%uM, BAR=%uM\n",
-                 rdev->mc.real_vram_size >> 20,
-                 (unsigned)rdev->mc.aper_size >> 20);
-        DRM_INFO("RAM width %dbits %cDR\n",
-                 rdev->mc.vram_width, rdev->mc.vram_is_ddr ? 'D' : 'S');
-        /* Initialize memory controller (also test AGP) */
-        r = radeon_mc_init(rdev);
-        if (r) {
-                return r;
-        }
-        /* Fence driver */
-        r = radeon_fence_driver_init(rdev);
-        if (r) {
-                return r;
-        }
-        r = radeon_irq_kms_init(rdev);
        if (r) {
                return r;
        }
-        /* Memory manager */
-        r = radeon_object_init(rdev);
+        /* if we have > 1 VGA cards, then disable the radeon VGA resources */
+        r = vga_client_register(rdev->pdev, rdev, NULL, radeon_vga_set_decode);
        if (r) {
-                return r;
+                return -EINVAL;
-        }
-        /* Initialize GART (initialize after TTM so we can allocate
-         * memory through TTM but finalize after TTM) */
-        r = radeon_gart_enable(rdev);
-        if (!r) {
-                r = radeon_gem_init(rdev);
        }
-        /* 1M ring buffer */
+        if (!rdev->new_init_path) {
-        if (!r) {
+                /* Setup errata flags */
-                r = radeon_cp_init(rdev, 1024 * 1024);
+                radeon_errata(rdev);
-        }
+                /* Initialize scratch registers */
-        if (!r) {
+                radeon_scratch_init(rdev);
-                r = radeon_wb_init(rdev);
+                /* Initialize surface registers */
+                radeon_surface_init(rdev);
+                /* BIOS*/
+                if (!radeon_get_bios(rdev)) {
+                        if (ASIC_IS_AVIVO(rdev))
+                                return -EINVAL;
+                }
+                if (rdev->is_atom_bios) {
+                        r = radeon_atombios_init(rdev);
+                        if (r) {
+                                return r;
+                        }
+                } else {
+                        r = radeon_combios_init(rdev);
+                        if (r) {
+                                return r;
+                        }
+                }
+                /* Reset gpu before posting otherwise ATOM will enter infinite loop */
+                if (radeon_gpu_reset(rdev)) {
+                        /* FIXME: what do we want to do here ? */
+                }
+                /* check if cards are posted or not */
+                if (!radeon_card_posted(rdev) && rdev->bios) {
+                        DRM_INFO("GPU not posted. posting now...\n");
+                        if (rdev->is_atom_bios) {
+                                atom_asic_init(rdev->mode_info.atom_context);
+                        } else {
+                                radeon_combios_asic_init(rdev->ddev);
+                        }
+                }
+                /* Get clock & vram information */
+                radeon_get_clock_info(rdev->ddev);
+                radeon_vram_info(rdev);
+                /* Initialize clocks */
+                r = radeon_clocks_init(rdev);
                if (r) {
-                        DRM_ERROR("radeon: failled initializing WB (%d).\n", r);
                        return r;
                }
-        }
-        if (!r) {
+                /* Initialize memory controller (also test AGP) */
-                r = radeon_ib_pool_init(rdev);
+                r = radeon_mc_init(rdev);
                if (r) {
-                        DRM_ERROR("radeon: failled initializing IB pool (%d).\n", r);
                        return r;
                }
-        }
+                /* Fence driver */
-        if (!r) {
+                r = radeon_fence_driver_init(rdev);
-                r = radeon_ib_test(rdev);
                if (r) {
-                        DRM_ERROR("radeon: failled testing IB (%d).\n", r);
                        return r;
                }
+                r = radeon_irq_kms_init(rdev);
+                if (r) {
+                        return r;
+                }
+                /* Memory manager */
+                r = radeon_object_init(rdev);
+                if (r) {
+                        return r;
+                }
+                r = radeon_gpu_gart_init(rdev);
+                if (r)
+                        return r;
+                /* Initialize GART (initialize after TTM so we can allocate
+                 * memory through TTM but finalize after TTM) */
+                r = radeon_gart_enable(rdev);
+                if (r)
+                        return 0;
+                        r = radeon_gem_init(rdev);
+                if (r)
+                        return 0;
+                /* 1M ring buffer */
+                r = radeon_cp_init(rdev, 1024 * 1024);
+                if (r)
+                        return 0;
+                r = radeon_wb_init(rdev);
+                if (r)
+                        DRM_ERROR("radeon: failled initializing WB (%d).\n", r);
+                r = radeon_ib_pool_init(rdev);
+                if (r)
+                        return 0;
+                r = radeon_ib_test(rdev);
+                if (r)
+                        return 0;
+                rdev->accel_working = true;
        }
-        ret = r;
+        DRM_INFO("radeon: kernel modesetting successfully initialized.\n");
-        r = radeon_modeset_init(rdev);
-        if (r) {
-                return r;
-        }
-        if (!ret) {
-                DRM_INFO("radeon: kernel modesetting successfully initialized.\n");
-        }
        if (radeon_testing) {
                radeon_test_moves(rdev);
        }
        if (radeon_benchmarking) {
                radeon_benchmark(rdev);
        }
-        return ret;
+        return 0;
 }
 void radeon_device_fini(struct radeon_device *rdev)
 {
-        if (rdev == NULL || rdev->rmmio == NULL) {
-                return;
-        }
        DRM_INFO("radeon: finishing device.\n");
        rdev->shutdown = true;
        /* Order matter so becarefull if you rearrange anythings */
-        radeon_modeset_fini(rdev);
+        if (!rdev->new_init_path) {
-        radeon_ib_pool_fini(rdev);
+                radeon_ib_pool_fini(rdev);
-        radeon_cp_fini(rdev);
+                radeon_cp_fini(rdev);
-        radeon_wb_fini(rdev);
+                radeon_wb_fini(rdev);
-        radeon_gem_fini(rdev);
+                radeon_gpu_gart_fini(rdev);
-        radeon_object_fini(rdev);
+                radeon_gem_fini(rdev);
-        /* mc_fini must be after object_fini */
+                radeon_mc_fini(rdev);
-        radeon_mc_fini(rdev);
 #if __OS_HAS_AGP
-        radeon_agp_fini(rdev);
+                radeon_agp_fini(rdev);
 #endif
-        radeon_irq_kms_fini(rdev);
+                radeon_irq_kms_fini(rdev);
-        radeon_fence_driver_fini(rdev);
+                vga_client_register(rdev->pdev, NULL, NULL, NULL);
-        radeon_clocks_fini(rdev);
+                radeon_fence_driver_fini(rdev);
-        if (rdev->is_atom_bios) {
+                radeon_clocks_fini(rdev);
-                radeon_atombios_fini(rdev);
+                radeon_object_fini(rdev);
+                if (rdev->is_atom_bios) {
+                        radeon_atombios_fini(rdev);
+                } else {
+                        radeon_combios_fini(rdev);
+                }
+                kfree(rdev->bios);
+                rdev->bios = NULL;
        } else {
-                radeon_combios_fini(rdev);
+                radeon_fini(rdev);
        }
-        kfree(rdev->bios);
-        rdev->bios = NULL;
        iounmap(rdev->rmmio);
        rdev->rmmio = NULL;
 }
@@ -708,15 +766,19 @@ int radeon_suspend_kms(struct drm_device *dev, pm_message_t state)
        /* wait for gpu to finish processing current batch */
        radeon_fence_wait_last(rdev);
-        radeon_cp_disable(rdev);
+        radeon_save_bios_scratch_regs(rdev);
-        radeon_gart_disable(rdev);
+        if (!rdev->new_init_path) {
+                radeon_cp_disable(rdev);
+                radeon_gart_disable(rdev);
+                rdev->irq.sw_int = false;
+                radeon_irq_set(rdev);
+        } else {
+                radeon_suspend(rdev);
+        }
        /* evict remaining vram memory */
        radeon_object_evict_vram(rdev);
-        rdev->irq.sw_int = false;
-        radeon_irq_set(rdev);
        pci_save_state(dev->pdev);
        if (state.event == PM_EVENT_SUSPEND) {
                /* Shut down the device */
@@ -743,38 +805,43 @@ int radeon_resume_kms(struct drm_device *dev)
        }
        pci_set_master(dev->pdev);
        /* Reset gpu before posting otherwise ATOM will enter infinite loop */
-        if (radeon_gpu_reset(rdev)) {
+        if (!rdev->new_init_path) {
-                /* FIXME: what do we want to do here ? */
+                if (radeon_gpu_reset(rdev)) {
-        }
+                        /* FIXME: what do we want to do here ? */
-        /* post card */
+                }
-        if (rdev->is_atom_bios) {
+                /* post card */
-                atom_asic_init(rdev->mode_info.atom_context);
+                if (rdev->is_atom_bios) {
+                        atom_asic_init(rdev->mode_info.atom_context);
+                } else {
+                        radeon_combios_asic_init(rdev->ddev);
+                }
+                /* Initialize clocks */
+                r = radeon_clocks_init(rdev);
+                if (r) {
+                        release_console_sem();
+                        return r;
+                }
+                /* Enable IRQ */
+                rdev->irq.sw_int = true;
+                radeon_irq_set(rdev);
+                /* Initialize GPU Memory Controller */
+                r = radeon_mc_init(rdev);
+                if (r) {
+                        goto out;
+                }
+                r = radeon_gart_enable(rdev);
+                if (r) {
+                        goto out;
+                }
+                r = radeon_cp_init(rdev, rdev->cp.ring_size);
+                if (r) {
+                        goto out;
+                }
        } else {
-                radeon_combios_asic_init(rdev->ddev);
+                radeon_resume(rdev);
-        }
-        /* Initialize clocks */
-        r = radeon_clocks_init(rdev);
-        if (r) {
-                release_console_sem();
-                return r;
-        }
-        /* Enable IRQ */
-        rdev->irq.sw_int = true;
-        radeon_irq_set(rdev);
-        /* Initialize GPU Memory Controller */
-        r = radeon_mc_init(rdev);
-        if (r) {
-                goto out;
-        }
-        r = radeon_gart_enable(rdev);
-        if (r) {
-                goto out;
-        }
-        r = radeon_cp_init(rdev, rdev->cp.ring_size);
-        if (r) {
-                goto out;
        }
 out:
+        radeon_restore_bios_scratch_regs(rdev);
        fb_set_suspend(rdev->fbdev_info, 0);
        release_console_sem();
diff --git a/drivers/gpu/drm/radeon/radeon_display.c b/drivers/gpu/drm/radeon/radeon_display.c
index a8fa1bb84cf7..5d8141b13765 100644
--- a/drivers/gpu/drm/radeon/radeon_display.c
+++ b/drivers/gpu/drm/radeon/radeon_display.c
@@ -158,9 +158,6 @@ static void radeon_crtc_destroy(struct drm_crtc *crtc)
 {
        struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
-        if (radeon_crtc->mode_set.mode) {
-                drm_mode_destroy(crtc->dev, radeon_crtc->mode_set.mode);
-        }
        drm_crtc_cleanup(crtc);
        kfree(radeon_crtc);
 }
@@ -189,9 +186,11 @@ static void radeon_crtc_init(struct drm_device *dev, int index)
        radeon_crtc->crtc_id = index;
        rdev->mode_info.crtcs[index] = radeon_crtc;
+#if 0
        radeon_crtc->mode_set.crtc = &radeon_crtc->base;
        radeon_crtc->mode_set.connectors = (struct drm_connector **)(radeon_crtc + 1);
        radeon_crtc->mode_set.num_connectors = 0;
+#endif
        for (i = 0; i < 256; i++) {
                radeon_crtc->lut_r[i] = i << 2;
@@ -313,7 +312,7 @@ static void radeon_print_display_setup(struct drm_device *dev)
        }
 }
-bool radeon_setup_enc_conn(struct drm_device *dev)
+static bool radeon_setup_enc_conn(struct drm_device *dev)
 {
        struct radeon_device *rdev = dev->dev_private;
        struct drm_connector *drm_connector;
@@ -347,9 +346,13 @@ int radeon_ddc_get_modes(struct radeon_connector *radeon_connector)
        if (!radeon_connector->ddc_bus)
                return -1;
-        radeon_i2c_do_lock(radeon_connector, 1);
+        if (!radeon_connector->edid) {
-        edid = drm_get_edid(&radeon_connector->base, &radeon_connector->ddc_bus->adapter);
+                radeon_i2c_do_lock(radeon_connector, 1);
-        radeon_i2c_do_lock(radeon_connector, 0);
+                edid = drm_get_edid(&radeon_connector->base, &radeon_connector->ddc_bus->adapter);
+                radeon_i2c_do_lock(radeon_connector, 0);
+        } else
+                edid = radeon_connector->edid;
        if (edid) {
                /* update digital bits here */
                if (edid->input & DRM_EDID_INPUT_DIGITAL)
@@ -362,7 +365,7 @@ int radeon_ddc_get_modes(struct radeon_connector *radeon_connector)
                return ret;
        }
        drm_mode_connector_update_edid_property(&radeon_connector->base, NULL);
-        return -1;
+        return 0;
 }
 static int radeon_ddc_dump(struct drm_connector *connector)
@@ -620,6 +623,83 @@ static const struct drm_mode_config_funcs radeon_mode_funcs = {
        .fb_changed = radeonfb_probe,
 };
+struct drm_prop_enum_list {
+        int type;
+        char *name;
+};
+static struct drm_prop_enum_list radeon_tmds_pll_enum_list[] =
+{       { 0, "driver" },
+        { 1, "bios" },
+};
+static struct drm_prop_enum_list radeon_tv_std_enum_list[] =
+{       { TV_STD_NTSC, "ntsc" },
+        { TV_STD_PAL, "pal" },
+        { TV_STD_PAL_M, "pal-m" },
+        { TV_STD_PAL_60, "pal-60" },
+        { TV_STD_NTSC_J, "ntsc-j" },
+        { TV_STD_SCART_PAL, "scart-pal" },
+        { TV_STD_PAL_CN, "pal-cn" },
+        { TV_STD_SECAM, "secam" },
+};
+int radeon_modeset_create_props(struct radeon_device *rdev)
+{
+        int i, sz;
+        if (rdev->is_atom_bios) {
+                rdev->mode_info.coherent_mode_property =
+                        drm_property_create(rdev->ddev,
+                                            DRM_MODE_PROP_RANGE,
+                                            "coherent", 2);
+                if (!rdev->mode_info.coherent_mode_property)
+                        return -ENOMEM;
+                rdev->mode_info.coherent_mode_property->values[0] = 0;
+                rdev->mode_info.coherent_mode_property->values[0] = 1;
+        }
+        if (!ASIC_IS_AVIVO(rdev)) {
+                sz = ARRAY_SIZE(radeon_tmds_pll_enum_list);
+                rdev->mode_info.tmds_pll_property =
+                        drm_property_create(rdev->ddev,
+                                            DRM_MODE_PROP_ENUM,
+                                            "tmds_pll", sz);
+                for (i = 0; i < sz; i++) {
+                        drm_property_add_enum(rdev->mode_info.tmds_pll_property,
+                                              i,
+                                              radeon_tmds_pll_enum_list[i].type,
+                                              radeon_tmds_pll_enum_list[i].name);
+                }
+        }
+        rdev->mode_info.load_detect_property =
+                drm_property_create(rdev->ddev,
+                                    DRM_MODE_PROP_RANGE,
+                                    "load detection", 2);
+        if (!rdev->mode_info.load_detect_property)
+                return -ENOMEM;
+        rdev->mode_info.load_detect_property->values[0] = 0;
+        rdev->mode_info.load_detect_property->values[0] = 1;
+        drm_mode_create_scaling_mode_property(rdev->ddev);
+        sz = ARRAY_SIZE(radeon_tv_std_enum_list);
+        rdev->mode_info.tv_std_property =
+                drm_property_create(rdev->ddev,
+                                    DRM_MODE_PROP_ENUM,
+                                    "tv standard", sz);
+        for (i = 0; i < sz; i++) {
+                drm_property_add_enum(rdev->mode_info.tv_std_property,
+                                      i,
+                                      radeon_tv_std_enum_list[i].type,
+                                      radeon_tv_std_enum_list[i].name);
+        }
+        return 0;
+}
 int radeon_modeset_init(struct radeon_device *rdev)
 {
        int num_crtc = 2, i;
@@ -640,6 +720,10 @@ int radeon_modeset_init(struct radeon_device *rdev)
        rdev->ddev->mode_config.fb_base = rdev->mc.aper_base;
+        ret = radeon_modeset_create_props(rdev);
+        if (ret) {
+                return ret;
+        }
        /* allocate crtcs - TODO single crtc */
        for (i = 0; i < num_crtc; i++) {
                radeon_crtc_init(rdev->ddev, i);
@@ -678,7 +762,6 @@ bool radeon_crtc_scaling_mode_fixup(struct drm_crtc *crtc,
                        continue;
                if (first) {
                        radeon_crtc->rmx_type = radeon_encoder->rmx_type;
-                        radeon_crtc->devices = radeon_encoder->devices;
                        memcpy(&radeon_crtc->native_mode,
                                &radeon_encoder->native_mode,
                                sizeof(struct radeon_native_mode));
diff --git a/drivers/gpu/drm/radeon/radeon_drv.c b/drivers/gpu/drm/radeon/radeon_drv.c
index 0bd5879a4957..50fce498910c 100644
--- a/drivers/gpu/drm/radeon/radeon_drv.c
+++ b/drivers/gpu/drm/radeon/radeon_drv.c
@@ -38,7 +38,6 @@
 #include <linux/console.h>
-#if defined(CONFIG_DRM_RADEON_KMS)
 /*
 * KMS wrapper.
 */
@@ -77,11 +76,9 @@ int radeon_mmap(struct file *filp, struct vm_area_struct *vma);
 int radeon_debugfs_init(struct drm_minor *minor);
 void radeon_debugfs_cleanup(struct drm_minor *minor);
 #endif
-#endif
 int radeon_no_wb;
-#if defined(CONFIG_DRM_RADEON_KMS)
 int radeon_modeset = -1;
 int radeon_dynclks = -1;
 int radeon_r4xx_atom = 0;
@@ -91,12 +88,11 @@ int radeon_gart_size = 512; /* default gart size */
 int radeon_benchmarking = 0;
 int radeon_testing = 0;
 int radeon_connector_table = 0;
-#endif
+int radeon_tv = 1;
 MODULE_PARM_DESC(no_wb, "Disable AGP writeback for scratch registers");
 module_param_named(no_wb, radeon_no_wb, int, 0444);
-#if defined(CONFIG_DRM_RADEON_KMS)
 MODULE_PARM_DESC(modeset, "Disable/Enable modesetting");
 module_param_named(modeset, radeon_modeset, int, 0400);
@@ -123,7 +119,9 @@ module_param_named(test, radeon_testing, int, 0444);
 MODULE_PARM_DESC(connector_table, "Force connector table");
 module_param_named(connector_table, radeon_connector_table, int, 0444);
-#endif
+MODULE_PARM_DESC(tv, "TV enable (0 = disable)");
+module_param_named(tv, radeon_tv, int, 0444);
 static int radeon_suspend(struct drm_device *dev, pm_message_t state)
 {
@@ -215,7 +213,6 @@ static struct drm_driver driver_old = {
        .patchlevel = DRIVER_PATCHLEVEL,
 };
-#if defined(CONFIG_DRM_RADEON_KMS)
 static struct drm_driver kms_driver;
 static int __devinit
@@ -289,7 +286,7 @@ static struct drm_driver kms_driver = {
                 .poll = drm_poll,
                 .fasync = drm_fasync,
 #ifdef CONFIG_COMPAT
-                 .compat_ioctl = NULL,
+                 .compat_ioctl = radeon_kms_compat_ioctl,
 #endif
        },
@@ -309,7 +306,6 @@ static struct drm_driver kms_driver = {
        .minor = KMS_DRIVER_MINOR,
        .patchlevel = KMS_DRIVER_PATCHLEVEL,
 };
-#endif
 static struct drm_driver *driver;
@@ -317,7 +313,6 @@ static int __init radeon_init(void)
 {
        driver = &driver_old;
        driver->num_ioctls = radeon_max_ioctl;
-#if defined(CONFIG_DRM_RADEON_KMS)
 #ifdef CONFIG_VGA_CONSOLE
        if (vgacon_text_force() && radeon_modeset == -1) {
                DRM_INFO("VGACON disable radeon kernel modesetting.\n");
@@ -328,8 +323,13 @@ static int __init radeon_init(void)
 #endif
        /* if enabled by default */
        if (radeon_modeset == -1) {
-                DRM_INFO("radeon default to kernel modesetting.\n");
+#ifdef CONFIG_DRM_RADEON_KMS
+                DRM_INFO("radeon defaulting to kernel modesetting.\n");
                radeon_modeset = 1;
+#else
+                DRM_INFO("radeon defaulting to userspace modesetting.\n");
+                radeon_modeset = 0;
+#endif
        }
        if (radeon_modeset == 1) {
                DRM_INFO("radeon kernel modesetting enabled.\n");
@@ -339,7 +339,6 @@ static int __init radeon_init(void)
        }
        /* if the vga console setting is enabled still
         * let modprobe override it */
-#endif
        return drm_init(driver);
 }
diff --git a/drivers/gpu/drm/radeon/radeon_drv.h b/drivers/gpu/drm/radeon/radeon_drv.h
index 6fa32dac4e97..cb0cfe4b3082 100644
--- a/drivers/gpu/drm/radeon/radeon_drv.h
+++ b/drivers/gpu/drm/radeon/radeon_drv.h
@@ -31,6 +31,9 @@
 #ifndef __RADEON_DRV_H__
 #define __RADEON_DRV_H__
+#include <linux/firmware.h>
+#include <linux/platform_device.h>
 /* General customization:
 */
@@ -353,6 +356,14 @@ typedef struct drm_radeon_private {
        int r700_sc_hiz_tile_fifo_size;
        int r700_sc_earlyz_tile_fifo_fize;
+        struct mutex cs_mutex;
+        u32 cs_id_scnt;
+        u32 cs_id_wcnt;
+        /* r6xx/r7xx drm blit vertex buffer */
+        struct drm_buf *blit_vb;
+        /* firmware */
+        const struct firmware *me_fw, *pfp_fw;
 } drm_radeon_private_t;
 typedef struct drm_radeon_buf_priv {
@@ -391,6 +402,9 @@ static __inline__ int radeon_check_offset(drm_radeon_private_t *dev_priv,
                (off >= gart_start && off <= gart_end));
 }
+/* radeon_state.c */
+extern void radeon_cp_discard_buffer(struct drm_device *dev, struct drm_master *master, struct drm_buf *buf);
                                /* radeon_cp.c */
 extern int radeon_cp_init(struct drm_device *dev, void *data, struct drm_file *file_priv);
 extern int radeon_cp_start(struct drm_device *dev, void *data, struct drm_file *file_priv);
@@ -457,6 +471,8 @@ extern int radeon_driver_open(struct drm_device *dev,
                              struct drm_file *file_priv);
 extern long radeon_compat_ioctl(struct file *filp, unsigned int cmd,
                                unsigned long arg);
+extern long radeon_kms_compat_ioctl(struct file *filp, unsigned int cmd,
+                                    unsigned long arg);
 extern int radeon_master_create(struct drm_device *dev, struct drm_master *master);
 extern void radeon_master_destroy(struct drm_device *dev, struct drm_master *master);
@@ -482,6 +498,22 @@ extern int r600_cp_dispatch_indirect(struct drm_device *dev,
                                     struct drm_buf *buf, int start, int end);
 extern int r600_page_table_init(struct drm_device *dev);
 extern void r600_page_table_cleanup(struct drm_device *dev, struct drm_ati_pcigart_info *gart_info);
+extern int r600_cs_legacy_ioctl(struct drm_device *dev, void *data, struct drm_file *fpriv);
+extern void r600_cp_dispatch_swap(struct drm_device *dev, struct drm_file *file_priv);
+extern int r600_cp_dispatch_texture(struct drm_device *dev,
+                                    struct drm_file *file_priv,
+                                    drm_radeon_texture_t *tex,
+                                    drm_radeon_tex_image_t *image);
+/* r600_blit.c */
+extern int r600_prepare_blit_copy(struct drm_device *dev, struct drm_file *file_priv);
+extern void r600_done_blit_copy(struct drm_device *dev);
+extern void r600_blit_copy(struct drm_device *dev,
+                           uint64_t src_gpu_addr, uint64_t dst_gpu_addr,
+                           int size_bytes);
+extern void r600_blit_swap(struct drm_device *dev,
+                           uint64_t src_gpu_addr, uint64_t dst_gpu_addr,
+                           int sx, int sy, int dx, int dy,
+                           int w, int h, int src_pitch, int dst_pitch, int cpp);
 /* Flags for stats.boxes
 */
@@ -1067,6 +1099,9 @@ extern u32 radeon_get_scratch(drm_radeon_private_t *dev_priv, int index);
 #       define RADEON_CSQ_PRIBM_INDBM           (4 << 28)
 #       define RADEON_CSQ_PRIPIO_INDPIO         (15 << 28)
+#define R300_CP_RESYNC_ADDR             0x0778
+#define R300_CP_RESYNC_DATA             0x077c
 #define RADEON_AIC_CNTL                 0x01d0
 #       define RADEON_PCIGART_TRANSLATE_EN      (1 << 0)
 #       define RS400_MSI_REARM                  (1 << 3)
@@ -1109,13 +1144,71 @@ extern u32 radeon_get_scratch(drm_radeon_private_t *dev_priv, int index);
 #       define RADEON_CNTL_BITBLT_MULTI         0x00009B00
 #       define RADEON_CNTL_SET_SCISSORS         0xC0001E00
-#       define R600_IT_INDIRECT_BUFFER          0x00003200
+#       define R600_IT_INDIRECT_BUFFER_END      0x00001700
-#       define R600_IT_ME_INITIALIZE            0x00004400
+#       define R600_IT_SET_PREDICATION          0x00002000
+#       define R600_IT_REG_RMW                  0x00002100
+#       define R600_IT_COND_EXEC                0x00002200
+#       define R600_IT_PRED_EXEC                0x00002300
+#       define R600_IT_START_3D_CMDBUF          0x00002400
+#       define R600_IT_DRAW_INDEX_2             0x00002700
+#       define R600_IT_CONTEXT_CONTROL          0x00002800
+#       define R600_IT_DRAW_INDEX_IMMD_BE       0x00002900
+#       define R600_IT_INDEX_TYPE               0x00002A00
+#       define R600_IT_DRAW_INDEX               0x00002B00
+#       define R600_IT_DRAW_INDEX_AUTO          0x00002D00
+#       define R600_IT_DRAW_INDEX_IMMD          0x00002E00
+#       define R600_IT_NUM_INSTANCES            0x00002F00
+#       define R600_IT_STRMOUT_BUFFER_UPDATE    0x00003400
+#       define R600_IT_INDIRECT_BUFFER_MP       0x00003800
+#       define R600_IT_MEM_SEMAPHORE            0x00003900
+#       define R600_IT_MPEG_INDEX               0x00003A00
+#       define R600_IT_WAIT_REG_MEM             0x00003C00
+#       define R600_IT_MEM_WRITE                0x00003D00
+#       define R600_IT_INDIRECT_BUFFER          0x00003200
+#       define R600_IT_CP_INTERRUPT             0x00004000
+#       define R600_IT_SURFACE_SYNC             0x00004300
+#              define R600_CB0_DEST_BASE_ENA    (1 << 6)
+#              define R600_TC_ACTION_ENA        (1 << 23)
+#              define R600_VC_ACTION_ENA        (1 << 24)
+#              define R600_CB_ACTION_ENA        (1 << 25)
+#              define R600_DB_ACTION_ENA        (1 << 26)
+#              define R600_SH_ACTION_ENA        (1 << 27)
+#              define R600_SMX_ACTION_ENA       (1 << 28)
+#       define R600_IT_ME_INITIALIZE            0x00004400
 #              define R600_ME_INITIALIZE_DEVICE_ID(x) ((x) << 16)
-#       define R600_IT_EVENT_WRITE              0x00004600
+#       define R600_IT_COND_WRITE               0x00004500
-#       define R600_IT_SET_CONFIG_REG           0x00006800
+#       define R600_IT_EVENT_WRITE              0x00004600
-#       define R600_SET_CONFIG_REG_OFFSET       0x00008000
+#       define R600_IT_EVENT_WRITE_EOP          0x00004700
-#       define R600_SET_CONFIG_REG_END          0x0000ac00
+#       define R600_IT_ONE_REG_WRITE            0x00005700
+#       define R600_IT_SET_CONFIG_REG           0x00006800
+#              define R600_SET_CONFIG_REG_OFFSET 0x00008000
+#              define R600_SET_CONFIG_REG_END   0x0000ac00
+#       define R600_IT_SET_CONTEXT_REG          0x00006900
+#              define R600_SET_CONTEXT_REG_OFFSET 0x00028000
+#              define R600_SET_CONTEXT_REG_END  0x00029000
+#       define R600_IT_SET_ALU_CONST            0x00006A00
+#              define R600_SET_ALU_CONST_OFFSET 0x00030000
+#              define R600_SET_ALU_CONST_END    0x00032000
+#       define R600_IT_SET_BOOL_CONST           0x00006B00
+#              define R600_SET_BOOL_CONST_OFFSET 0x0003e380
+#              define R600_SET_BOOL_CONST_END   0x00040000
+#       define R600_IT_SET_LOOP_CONST           0x00006C00
+#              define R600_SET_LOOP_CONST_OFFSET 0x0003e200
+#              define R600_SET_LOOP_CONST_END   0x0003e380
+#       define R600_IT_SET_RESOURCE             0x00006D00
+#              define R600_SET_RESOURCE_OFFSET  0x00038000
+#              define R600_SET_RESOURCE_END     0x0003c000
+#              define R600_SQ_TEX_VTX_INVALID_TEXTURE  0x0
+#              define R600_SQ_TEX_VTX_INVALID_BUFFER   0x1
+#              define R600_SQ_TEX_VTX_VALID_TEXTURE    0x2
+#              define R600_SQ_TEX_VTX_VALID_BUFFER     0x3
+#       define R600_IT_SET_SAMPLER              0x00006E00
+#              define R600_SET_SAMPLER_OFFSET   0x0003c000
+#              define R600_SET_SAMPLER_END      0x0003cff0
+#       define R600_IT_SET_CTL_CONST            0x00006F00
+#              define R600_SET_CTL_CONST_OFFSET 0x0003cff0
+#              define R600_SET_CTL_CONST_END    0x0003e200
+#       define R600_IT_SURFACE_BASE_UPDATE      0x00007300
 #define RADEON_CP_PACKET_MASK           0xC0000000
 #define RADEON_CP_PACKET_COUNT_MASK     0x3fff0000
@@ -1593,6 +1686,52 @@ extern u32 radeon_get_scratch(drm_radeon_private_t *dev_priv, int index);
 #define R600_CB_COLOR7_BASE                                    0x2805c
 #define R600_CB_COLOR7_FRAG                                    0x280fc
+#define R600_CB_COLOR0_SIZE                                    0x28060
+#define R600_CB_COLOR0_VIEW                                    0x28080
+#define R600_CB_COLOR0_INFO                                    0x280a0
+#define R600_CB_COLOR0_TILE                                    0x280c0
+#define R600_CB_COLOR0_FRAG                                    0x280e0
+#define R600_CB_COLOR0_MASK                                    0x28100
+#define AVIVO_D1MODE_VLINE_START_END                           0x6538
+#define AVIVO_D2MODE_VLINE_START_END                           0x6d38
+#define R600_CP_COHER_BASE                                     0x85f8
+#define R600_DB_DEPTH_BASE                                     0x2800c
+#define R600_SQ_PGM_START_FS                                   0x28894
+#define R600_SQ_PGM_START_ES                                   0x28880
+#define R600_SQ_PGM_START_VS                                   0x28858
+#define R600_SQ_PGM_RESOURCES_VS                               0x28868
+#define R600_SQ_PGM_CF_OFFSET_VS                               0x288d0
+#define R600_SQ_PGM_START_GS                                   0x2886c
+#define R600_SQ_PGM_START_PS                                   0x28840
+#define R600_SQ_PGM_RESOURCES_PS                               0x28850
+#define R600_SQ_PGM_EXPORTS_PS                                 0x28854
+#define R600_SQ_PGM_CF_OFFSET_PS                               0x288cc
+#define R600_VGT_DMA_BASE                                      0x287e8
+#define R600_VGT_DMA_BASE_HI                                   0x287e4
+#define R600_VGT_STRMOUT_BASE_OFFSET_0                         0x28b10
+#define R600_VGT_STRMOUT_BASE_OFFSET_1                         0x28b14
+#define R600_VGT_STRMOUT_BASE_OFFSET_2                         0x28b18
+#define R600_VGT_STRMOUT_BASE_OFFSET_3                         0x28b1c
+#define R600_VGT_STRMOUT_BASE_OFFSET_HI_0                      0x28b44
+#define R600_VGT_STRMOUT_BASE_OFFSET_HI_1                      0x28b48
+#define R600_VGT_STRMOUT_BASE_OFFSET_HI_2                      0x28b4c
+#define R600_VGT_STRMOUT_BASE_OFFSET_HI_3                      0x28b50
+#define R600_VGT_STRMOUT_BUFFER_BASE_0                         0x28ad8
+#define R600_VGT_STRMOUT_BUFFER_BASE_1                         0x28ae8
+#define R600_VGT_STRMOUT_BUFFER_BASE_2                         0x28af8
+#define R600_VGT_STRMOUT_BUFFER_BASE_3                         0x28b08
+#define R600_VGT_STRMOUT_BUFFER_OFFSET_0                       0x28adc
+#define R600_VGT_STRMOUT_BUFFER_OFFSET_1                       0x28aec
+#define R600_VGT_STRMOUT_BUFFER_OFFSET_2                       0x28afc
+#define R600_VGT_STRMOUT_BUFFER_OFFSET_3                       0x28b0c
+#define R600_VGT_PRIMITIVE_TYPE                                0x8958
+#define R600_PA_SC_SCREEN_SCISSOR_TL                           0x28030
+#define R600_PA_SC_GENERIC_SCISSOR_TL                          0x28240
+#define R600_PA_SC_WINDOW_SCISSOR_TL                           0x28204
 #define R600_TC_CNTL                                           0x9608
 #       define R600_TC_L2_SIZE(x)                              ((x) << 5)
 #       define R600_L2_DISABLE_LATE_HIT                        (1 << 9)
diff --git a/drivers/gpu/drm/radeon/radeon_encoders.c b/drivers/gpu/drm/radeon/radeon_encoders.c
index 0a92706eac19..621646752cd2 100644
--- a/drivers/gpu/drm/radeon/radeon_encoders.c
+++ b/drivers/gpu/drm/radeon/radeon_encoders.c
@@ -126,6 +126,23 @@ radeon_link_encoder_connector(struct drm_device *dev)
        }
 }
+void radeon_encoder_set_active_device(struct drm_encoder *encoder)
+{
+        struct drm_device *dev = encoder->dev;
+        struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
+        struct drm_connector *connector;
+        list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
+                if (connector->encoder == encoder) {
+                        struct radeon_connector *radeon_connector = to_radeon_connector(connector);
+                        radeon_encoder->active_device = radeon_encoder->devices & radeon_connector->devices;
+                        DRM_DEBUG("setting active device to %08x from %08x %08x for encoder %d\n",
+                                  radeon_encoder->active_device, radeon_encoder->devices,
+                                  radeon_connector->devices, encoder->encoder_type);
+                }
+        }
+}
 static struct drm_connector *
 radeon_get_connector_for_encoder(struct drm_encoder *encoder)
 {
@@ -224,9 +241,12 @@ atombios_dac_setup(struct drm_encoder *encoder, int action)
        struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
        DAC_ENCODER_CONTROL_PS_ALLOCATION args;
        int index = 0, num = 0;
-        /* fixme - fill in enc_priv for atom dac */
+        struct radeon_encoder_atom_dac *dac_info = radeon_encoder->enc_priv;
        enum radeon_tv_std tv_std = TV_STD_NTSC;
+        if (dac_info->tv_std)
+                tv_std = dac_info->tv_std;
        memset(&args, 0, sizeof(args));
        switch (radeon_encoder->encoder_id) {
@@ -244,9 +264,9 @@ atombios_dac_setup(struct drm_encoder *encoder, int action)
        args.ucAction = action;
-        if (radeon_encoder->devices & (ATOM_DEVICE_CRT_SUPPORT))
+        if (radeon_encoder->active_device & (ATOM_DEVICE_CRT_SUPPORT))
                args.ucDacStandard = ATOM_DAC1_PS2;
-        else if (radeon_encoder->devices & (ATOM_DEVICE_CV_SUPPORT))
+        else if (radeon_encoder->active_device & (ATOM_DEVICE_CV_SUPPORT))
                args.ucDacStandard = ATOM_DAC1_CV;
        else {
                switch (tv_std) {
@@ -279,16 +299,19 @@ atombios_tv_setup(struct drm_encoder *encoder, int action)
        struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
        TV_ENCODER_CONTROL_PS_ALLOCATION args;
        int index = 0;
-        /* fixme - fill in enc_priv for atom dac */
+        struct radeon_encoder_atom_dac *dac_info = radeon_encoder->enc_priv;
        enum radeon_tv_std tv_std = TV_STD_NTSC;
+        if (dac_info->tv_std)
+                tv_std = dac_info->tv_std;
        memset(&args, 0, sizeof(args));
        index = GetIndexIntoMasterTable(COMMAND, TVEncoderControl);
        args.sTVEncoder.ucAction = action;
-        if (radeon_encoder->devices & (ATOM_DEVICE_CV_SUPPORT))
+        if (radeon_encoder->active_device & (ATOM_DEVICE_CV_SUPPORT))
                args.sTVEncoder.ucTvStandard = ATOM_TV_CV;
        else {
                switch (tv_std) {
@@ -520,6 +543,7 @@ atombios_get_encoder_mode(struct drm_encoder *encoder)
        switch (connector->connector_type) {
        case DRM_MODE_CONNECTOR_DVII:
+        case DRM_MODE_CONNECTOR_HDMIB: /* HDMI-B is basically DL-DVI; analog works fine */
                if (drm_detect_hdmi_monitor((struct edid *)connector->edid_blob_ptr))
                        return ATOM_ENCODER_MODE_HDMI;
                else if (radeon_connector->use_digital)
@@ -529,7 +553,6 @@ atombios_get_encoder_mode(struct drm_encoder *encoder)
                break;
        case DRM_MODE_CONNECTOR_DVID:
        case DRM_MODE_CONNECTOR_HDMIA:
-        case DRM_MODE_CONNECTOR_HDMIB:
        default:
                if (drm_detect_hdmi_monitor((struct edid *)connector->edid_blob_ptr))
                        return ATOM_ENCODER_MODE_HDMI;
@@ -825,10 +848,10 @@ atombios_yuv_setup(struct drm_encoder *encoder, bool enable)
        /* XXX: fix up scratch reg handling */
        temp = RREG32(reg);
-        if (radeon_encoder->devices & (ATOM_DEVICE_TV_SUPPORT))
+        if (radeon_encoder->active_device & (ATOM_DEVICE_TV_SUPPORT))
                WREG32(reg, (ATOM_S3_TV1_ACTIVE |
                             (radeon_crtc->crtc_id << 18)));
-        else if (radeon_encoder->devices & (ATOM_DEVICE_CV_SUPPORT))
+        else if (radeon_encoder->active_device & (ATOM_DEVICE_CV_SUPPORT))
                WREG32(reg, (ATOM_S3_CV_ACTIVE | (radeon_crtc->crtc_id << 24)));
        else
                WREG32(reg, 0);
@@ -851,9 +874,19 @@ radeon_atom_encoder_dpms(struct drm_encoder *encoder, int mode)
        DISPLAY_DEVICE_OUTPUT_CONTROL_PS_ALLOCATION args;
        int index = 0;
        bool is_dig = false;
+        int devices;
        memset(&args, 0, sizeof(args));
+        /* on DPMS off we have no idea if active device is meaningful */
+        if (mode != DRM_MODE_DPMS_ON && !radeon_encoder->active_device)
+                devices = radeon_encoder->devices;
+        else
+                devices = radeon_encoder->active_device;
+        DRM_DEBUG("encoder dpms %d to mode %d, devices %08x, active_devices %08x\n",
+                  radeon_encoder->encoder_id, mode, radeon_encoder->devices,
+                  radeon_encoder->active_device);
        switch (radeon_encoder->encoder_id) {
        case ENCODER_OBJECT_ID_INTERNAL_TMDS1:
        case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1:
@@ -881,18 +914,18 @@ radeon_atom_encoder_dpms(struct drm_encoder *encoder, int mode)
                break;
        case ENCODER_OBJECT_ID_INTERNAL_DAC1:
        case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC1:
-                if (radeon_encoder->devices & (ATOM_DEVICE_TV_SUPPORT))
+                if (devices & (ATOM_DEVICE_TV_SUPPORT))
                        index = GetIndexIntoMasterTable(COMMAND, TV1OutputControl);
-                else if (radeon_encoder->devices & (ATOM_DEVICE_CV_SUPPORT))
+                else if (devices & (ATOM_DEVICE_CV_SUPPORT))
                        index = GetIndexIntoMasterTable(COMMAND, CV1OutputControl);
                else
                        index = GetIndexIntoMasterTable(COMMAND, DAC1OutputControl);
                break;
        case ENCODER_OBJECT_ID_INTERNAL_DAC2:
        case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC2:
-                if (radeon_encoder->devices & (ATOM_DEVICE_TV_SUPPORT))
+                if (devices & (ATOM_DEVICE_TV_SUPPORT))
                        index = GetIndexIntoMasterTable(COMMAND, TV1OutputControl);
-                else if (radeon_encoder->devices & (ATOM_DEVICE_CV_SUPPORT))
+                else if (devices & (ATOM_DEVICE_CV_SUPPORT))
                        index = GetIndexIntoMasterTable(COMMAND, CV1OutputControl);
                else
                        index = GetIndexIntoMasterTable(COMMAND, DAC2OutputControl);
@@ -979,18 +1012,18 @@ atombios_set_encoder_crtc_source(struct drm_encoder *encoder)
                                break;
                        case ENCODER_OBJECT_ID_INTERNAL_DAC1:
                        case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC1:
-                                if (radeon_encoder->devices & (ATOM_DEVICE_TV_SUPPORT))
+                                if (radeon_encoder->active_device & (ATOM_DEVICE_TV_SUPPORT))
                                        args.v1.ucDevice = ATOM_DEVICE_TV1_INDEX;
-                                else if (radeon_encoder->devices & (ATOM_DEVICE_CV_SUPPORT))
+                                else if (radeon_encoder->active_device & (ATOM_DEVICE_CV_SUPPORT))
                                        args.v1.ucDevice = ATOM_DEVICE_CV_INDEX;
                                else
                                        args.v1.ucDevice = ATOM_DEVICE_CRT1_INDEX;
                                break;
                        case ENCODER_OBJECT_ID_INTERNAL_DAC2:
                        case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC2:
-                                if (radeon_encoder->devices & (ATOM_DEVICE_TV_SUPPORT))
+                                if (radeon_encoder->active_device & (ATOM_DEVICE_TV_SUPPORT))
                                        args.v1.ucDevice = ATOM_DEVICE_TV1_INDEX;
-                                else if (radeon_encoder->devices & (ATOM_DEVICE_CV_SUPPORT))
+                                else if (radeon_encoder->active_device & (ATOM_DEVICE_CV_SUPPORT))
                                        args.v1.ucDevice = ATOM_DEVICE_CV_INDEX;
                                else
                                        args.v1.ucDevice = ATOM_DEVICE_CRT2_INDEX;
@@ -1019,17 +1052,17 @@ atombios_set_encoder_crtc_source(struct drm_encoder *encoder)
                                args.v2.ucEncoderID = ASIC_INT_DIG2_ENCODER_ID;
                                break;
                        case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC1:
-                                if (radeon_encoder->devices & (ATOM_DEVICE_TV_SUPPORT))
+                                if (radeon_encoder->active_device & (ATOM_DEVICE_TV_SUPPORT))
                                        args.v2.ucEncoderID = ASIC_INT_TV_ENCODER_ID;
-                                else if (radeon_encoder->devices & (ATOM_DEVICE_CV_SUPPORT))
+                                else if (radeon_encoder->active_device & (ATOM_DEVICE_CV_SUPPORT))
                                        args.v2.ucEncoderID = ASIC_INT_TV_ENCODER_ID;
                                else
                                        args.v2.ucEncoderID = ASIC_INT_DAC1_ENCODER_ID;
                                break;
                        case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC2:
-                                if (radeon_encoder->devices & (ATOM_DEVICE_TV_SUPPORT))
+                                if (radeon_encoder->active_device & (ATOM_DEVICE_TV_SUPPORT))
                                        args.v2.ucEncoderID = ASIC_INT_TV_ENCODER_ID;
-                                else if (radeon_encoder->devices & (ATOM_DEVICE_CV_SUPPORT))
+                                else if (radeon_encoder->active_device & (ATOM_DEVICE_CV_SUPPORT))
                                        args.v2.ucEncoderID = ASIC_INT_TV_ENCODER_ID;
                                else
                                        args.v2.ucEncoderID = ASIC_INT_DAC2_ENCODER_ID;
@@ -1097,7 +1130,7 @@ radeon_atom_encoder_mode_set(struct drm_encoder *encoder,
        atombios_set_encoder_crtc_source(encoder);
        if (ASIC_IS_AVIVO(rdev)) {
-                if (radeon_encoder->devices & (ATOM_DEVICE_CV_SUPPORT | ATOM_DEVICE_TV_SUPPORT))
+                if (radeon_encoder->active_device & (ATOM_DEVICE_CV_SUPPORT | ATOM_DEVICE_TV_SUPPORT))
                        atombios_yuv_setup(encoder, true);
                else
                        atombios_yuv_setup(encoder, false);
@@ -1135,7 +1168,7 @@ radeon_atom_encoder_mode_set(struct drm_encoder *encoder,
        case ENCODER_OBJECT_ID_INTERNAL_DAC2:
        case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC2:
                atombios_dac_setup(encoder, ATOM_ENABLE);
-                if (radeon_encoder->devices & (ATOM_DEVICE_TV_SUPPORT | ATOM_DEVICE_CV_SUPPORT))
+                if (radeon_encoder->active_device & (ATOM_DEVICE_TV_SUPPORT | ATOM_DEVICE_CV_SUPPORT))
                        atombios_tv_setup(encoder, ATOM_ENABLE);
                break;
        }
@@ -1143,11 +1176,12 @@ radeon_atom_encoder_mode_set(struct drm_encoder *encoder,
 }
 static bool
-atombios_dac_load_detect(struct drm_encoder *encoder)
+atombios_dac_load_detect(struct drm_encoder *encoder, struct drm_connector *connector)
 {
        struct drm_device *dev = encoder->dev;
        struct radeon_device *rdev = dev->dev_private;
        struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
+        struct radeon_connector *radeon_connector = to_radeon_connector(connector);
        if (radeon_encoder->devices & (ATOM_DEVICE_TV_SUPPORT |
                                       ATOM_DEVICE_CV_SUPPORT |
@@ -1168,15 +1202,15 @@ atombios_dac_load_detect(struct drm_encoder *encoder)
                else
                        args.sDacload.ucDacType = ATOM_DAC_B;
-                if (radeon_encoder->devices & ATOM_DEVICE_CRT1_SUPPORT)
+                if (radeon_connector->devices & ATOM_DEVICE_CRT1_SUPPORT)
                        args.sDacload.usDeviceID = cpu_to_le16(ATOM_DEVICE_CRT1_SUPPORT);
-                else if (radeon_encoder->devices & ATOM_DEVICE_CRT2_SUPPORT)
+                else if (radeon_connector->devices & ATOM_DEVICE_CRT2_SUPPORT)
                        args.sDacload.usDeviceID = cpu_to_le16(ATOM_DEVICE_CRT2_SUPPORT);
-                else if (radeon_encoder->devices & ATOM_DEVICE_CV_SUPPORT) {
+                else if (radeon_connector->devices & ATOM_DEVICE_CV_SUPPORT) {
                        args.sDacload.usDeviceID = cpu_to_le16(ATOM_DEVICE_CV_SUPPORT);
                        if (crev >= 3)
                                args.sDacload.ucMisc = DAC_LOAD_MISC_YPrPb;
-                } else if (radeon_encoder->devices & ATOM_DEVICE_TV1_SUPPORT) {
+                } else if (radeon_connector->devices & ATOM_DEVICE_TV1_SUPPORT) {
                        args.sDacload.usDeviceID = cpu_to_le16(ATOM_DEVICE_TV1_SUPPORT);
                        if (crev >= 3)
                                args.sDacload.ucMisc = DAC_LOAD_MISC_YPrPb;
@@ -1195,9 +1229,10 @@ radeon_atom_dac_detect(struct drm_encoder *encoder, struct drm_connector *connec
        struct drm_device *dev = encoder->dev;
        struct radeon_device *rdev = dev->dev_private;
        struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
+        struct radeon_connector *radeon_connector = to_radeon_connector(connector);
        uint32_t bios_0_scratch;
-        if (!atombios_dac_load_detect(encoder)) {
+        if (!atombios_dac_load_detect(encoder, connector)) {
                DRM_DEBUG("detect returned false \n");
                return connector_status_unknown;
        }
@@ -1207,17 +1242,20 @@ radeon_atom_dac_detect(struct drm_encoder *encoder, struct drm_connector *connec
        else
                bios_0_scratch = RREG32(RADEON_BIOS_0_SCRATCH);
-        DRM_DEBUG("Bios 0 scratch %x\n", bios_0_scratch);
+        DRM_DEBUG("Bios 0 scratch %x %08x\n", bios_0_scratch, radeon_encoder->devices);
-        if (radeon_encoder->devices & ATOM_DEVICE_CRT1_SUPPORT) {
+        if (radeon_connector->devices & ATOM_DEVICE_CRT1_SUPPORT) {
                if (bios_0_scratch & ATOM_S0_CRT1_MASK)
                        return connector_status_connected;
-        } else if (radeon_encoder->devices & ATOM_DEVICE_CRT2_SUPPORT) {
+        }
+        if (radeon_connector->devices & ATOM_DEVICE_CRT2_SUPPORT) {
                if (bios_0_scratch & ATOM_S0_CRT2_MASK)
                        return connector_status_connected;
-        } else if (radeon_encoder->devices & ATOM_DEVICE_CV_SUPPORT) {
+        }
+        if (radeon_connector->devices & ATOM_DEVICE_CV_SUPPORT) {
                if (bios_0_scratch & (ATOM_S0_CV_MASK|ATOM_S0_CV_MASK_A))
                        return connector_status_connected;
-        } else if (radeon_encoder->devices & ATOM_DEVICE_TV1_SUPPORT) {
+        }
+        if (radeon_connector->devices & ATOM_DEVICE_TV1_SUPPORT) {
                if (bios_0_scratch & (ATOM_S0_TV1_COMPOSITE | ATOM_S0_TV1_COMPOSITE_A))
                        return connector_status_connected; /* CTV */
                else if (bios_0_scratch & (ATOM_S0_TV1_SVIDEO | ATOM_S0_TV1_SVIDEO_A))
@@ -1230,6 +1268,8 @@ static void radeon_atom_encoder_prepare(struct drm_encoder *encoder)
 {
        radeon_atom_output_lock(encoder, true);
        radeon_atom_encoder_dpms(encoder, DRM_MODE_DPMS_OFF);
+        radeon_encoder_set_active_device(encoder);
 }
 static void radeon_atom_encoder_commit(struct drm_encoder *encoder)
@@ -1238,12 +1278,20 @@ static void radeon_atom_encoder_commit(struct drm_encoder *encoder)
        radeon_atom_output_lock(encoder, false);
 }
+static void radeon_atom_encoder_disable(struct drm_encoder *encoder)
+{
+        struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
+        radeon_atom_encoder_dpms(encoder, DRM_MODE_DPMS_OFF);
+        radeon_encoder->active_device = 0;
+}
 static const struct drm_encoder_helper_funcs radeon_atom_dig_helper_funcs = {
        .dpms = radeon_atom_encoder_dpms,
        .mode_fixup = radeon_atom_mode_fixup,
        .prepare = radeon_atom_encoder_prepare,
        .mode_set = radeon_atom_encoder_mode_set,
        .commit = radeon_atom_encoder_commit,
+        .disable = radeon_atom_encoder_disable,
        /* no detect for TMDS/LVDS yet */
 };
@@ -1268,6 +1316,18 @@ static const struct drm_encoder_funcs radeon_atom_enc_funcs = {
        .destroy = radeon_enc_destroy,
 };
+struct radeon_encoder_atom_dac *
+radeon_atombios_set_dac_info(struct radeon_encoder *radeon_encoder)
+{
+        struct radeon_encoder_atom_dac *dac = kzalloc(sizeof(struct radeon_encoder_atom_dac), GFP_KERNEL);
+        if (!dac)
+                return NULL;
+        dac->tv_std = TV_STD_NTSC;
+        return dac;
+}
 struct radeon_encoder_atom_dig *
 radeon_atombios_set_dig_info(struct radeon_encoder *radeon_encoder)
 {
@@ -1336,6 +1396,7 @@ radeon_add_atom_encoder(struct drm_device *dev, uint32_t encoder_id, uint32_t su
        case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC1:
        case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC2:
                drm_encoder_init(dev, encoder, &radeon_atom_enc_funcs, DRM_MODE_ENCODER_TVDAC);
+                radeon_encoder->enc_priv = radeon_atombios_set_dac_info(radeon_encoder);
                drm_encoder_helper_add(encoder, &radeon_atom_dac_helper_funcs);
                break;
        case ENCODER_OBJECT_ID_INTERNAL_DVO1:
@@ -1345,8 +1406,14 @@ radeon_add_atom_encoder(struct drm_device *dev, uint32_t encoder_id, uint32_t su
        case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA:
        case ENCODER_OBJECT_ID_INTERNAL_UNIPHY1:
        case ENCODER_OBJECT_ID_INTERNAL_UNIPHY2:
-                drm_encoder_init(dev, encoder, &radeon_atom_enc_funcs, DRM_MODE_ENCODER_TMDS);
+                if (radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT)) {
-                radeon_encoder->enc_priv = radeon_atombios_set_dig_info(radeon_encoder);
+                        radeon_encoder->rmx_type = RMX_FULL;
+                        drm_encoder_init(dev, encoder, &radeon_atom_enc_funcs, DRM_MODE_ENCODER_LVDS);
+                        radeon_encoder->enc_priv = radeon_atombios_get_lvds_info(radeon_encoder);
+                } else {
+                        drm_encoder_init(dev, encoder, &radeon_atom_enc_funcs, DRM_MODE_ENCODER_TMDS);
+                        radeon_encoder->enc_priv = radeon_atombios_set_dig_info(radeon_encoder);
+                }
                drm_encoder_helper_add(encoder, &radeon_atom_dig_helper_funcs);
                break;
        }
diff --git a/drivers/gpu/drm/radeon/radeon_fb.c b/drivers/gpu/drm/radeon/radeon_fb.c
index ec383edf5f38..944e4fa78db5 100644
--- a/drivers/gpu/drm/radeon/radeon_fb.c
+++ b/drivers/gpu/drm/radeon/radeon_fb.c
@@ -28,15 +28,7 @@
     */
 #include <linux/module.h>
-#include <linux/kernel.h>
-#include <linux/errno.h>
-#include <linux/string.h>
-#include <linux/mm.h>
-#include <linux/tty.h>
-#include <linux/slab.h>
-#include <linux/delay.h>
 #include <linux/fb.h>
-#include <linux/init.h>
 #include "drmP.h"
 #include "drm.h"
@@ -45,375 +37,24 @@
 #include "radeon_drm.h"
 #include "radeon.h"
+#include "drm_fb_helper.h"
 struct radeon_fb_device {
-        struct radeon_device            *rdev;
+        struct drm_fb_helper helper;
-        struct drm_display_mode         *mode;
        struct radeon_framebuffer       *rfb;
-        int                             crtc_count;
+        struct radeon_device            *rdev;
-        /* crtc currently bound to this */
-        uint32_t                        crtc_ids[2];
 };
-static int radeonfb_setcolreg(unsigned regno,
-                              unsigned red,
-                              unsigned green,
-                              unsigned blue,
-                              unsigned transp,
-                              struct fb_info *info)
-{
-        struct radeon_fb_device *rfbdev = info->par;
-        struct drm_device *dev = rfbdev->rdev->ddev;
-        struct drm_crtc *crtc;
-        int i;
-        list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
-                struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
-                struct drm_mode_set *modeset = &radeon_crtc->mode_set;
-                struct drm_framebuffer *fb = modeset->fb;
-                for (i = 0; i < rfbdev->crtc_count; i++) {
-                        if (crtc->base.id == rfbdev->crtc_ids[i]) {
-                                break;
-                        }
-                }
-                if (i == rfbdev->crtc_count) {
-                        continue;
-                }
-                if (regno > 255) {
-                        return 1;
-                }
-                if (fb->depth == 8) {
-                        radeon_crtc_fb_gamma_set(crtc, red, green, blue, regno);
-                        return 0;
-                }
-                if (regno < 16) {
-                        switch (fb->depth) {
-                        case 15:
-                                fb->pseudo_palette[regno] = ((red & 0xf800) >> 1) |
-                                        ((green & 0xf800) >>  6) |
-                                        ((blue & 0xf800) >> 11);
-                                break;
-                        case 16:
-                                fb->pseudo_palette[regno] = (red & 0xf800) |
-                                        ((green & 0xfc00) >>  5) |
-                                        ((blue  & 0xf800) >> 11);
-                                break;
-                        case 24:
-                        case 32:
-                                fb->pseudo_palette[regno] =
-                                        (((red >> 8) & 0xff) << info->var.red.offset) |
-                                        (((green >> 8) & 0xff) << info->var.green.offset) |
-                                        (((blue >> 8) & 0xff) << info->var.blue.offset);
-                                break;
-                        }
-                }
-        }
-        return 0;
-}
-static int radeonfb_check_var(struct fb_var_screeninfo *var,
-                              struct fb_info *info)
-{
-        struct radeon_fb_device *rfbdev = info->par;
-        struct radeon_framebuffer *rfb = rfbdev->rfb;
-        struct drm_framebuffer *fb = &rfb->base;
-        int depth;
-        if (var->pixclock == -1 || !var->pixclock) {
-                return -EINVAL;
-        }
-        /* Need to resize the fb object !!! */
-        if (var->xres > fb->width || var->yres > fb->height) {
-                DRM_ERROR("Requested width/height is greater than current fb "
-                           "object %dx%d > %dx%d\n", var->xres, var->yres,
-                           fb->width, fb->height);
-                DRM_ERROR("Need resizing code.\n");
-                return -EINVAL;
-        }
-        switch (var->bits_per_pixel) {
-        case 16:
-                depth = (var->green.length == 6) ? 16 : 15;
-                break;
-        case 32:
-                depth = (var->transp.length > 0) ? 32 : 24;
-                break;
-        default:
-                depth = var->bits_per_pixel;
-                break;
-        }
-        switch (depth) {
-        case 8:
-                var->red.offset = 0;
-                var->green.offset = 0;
-                var->blue.offset = 0;
-                var->red.length = 8;
-                var->green.length = 8;
-                var->blue.length = 8;
-                var->transp.length = 0;
-                var->transp.offset = 0;
-                break;
-#ifdef __LITTLE_ENDIAN
-        case 15:
-                var->red.offset = 10;
-                var->green.offset = 5;
-                var->blue.offset = 0;
-                var->red.length = 5;
-                var->green.length = 5;
-                var->blue.length = 5;
-                var->transp.length = 1;
-                var->transp.offset = 15;
-                break;
-        case 16:
-                var->red.offset = 11;
-                var->green.offset = 5;
-                var->blue.offset = 0;
-                var->red.length = 5;
-                var->green.length = 6;
-                var->blue.length = 5;
-                var->transp.length = 0;
-                var->transp.offset = 0;
-                break;
-        case 24:
-                var->red.offset = 16;
-                var->green.offset = 8;
-                var->blue.offset = 0;
-                var->red.length = 8;
-                var->green.length = 8;
-                var->blue.length = 8;
-                var->transp.length = 0;
-                var->transp.offset = 0;
-                break;
-        case 32:
-                var->red.offset = 16;
-                var->green.offset = 8;
-                var->blue.offset = 0;
-                var->red.length = 8;
-                var->green.length = 8;
-                var->blue.length = 8;
-                var->transp.length = 8;
-                var->transp.offset = 24;
-                break;
-#else
-        case 24:
-                var->red.offset = 8;
-                var->green.offset = 16;
-                var->blue.offset = 24;
-                var->red.length = 8;
-                var->green.length = 8;
-                var->blue.length = 8;
-                var->transp.length = 0;
-                var->transp.offset = 0;
-                break;
-        case 32:
-                var->red.offset = 8;
-                var->green.offset = 16;
-                var->blue.offset = 24;
-                var->red.length = 8;
-                var->green.length = 8;
-                var->blue.length = 8;
-                var->transp.length = 8;
-                var->transp.offset = 0;
-                break;
-#endif
-        default:
-                return -EINVAL;
-        }
-        return 0;
-}
-/* this will let fbcon do the mode init */
-static int radeonfb_set_par(struct fb_info *info)
-{
-        struct radeon_fb_device *rfbdev = info->par;
-        struct drm_device *dev = rfbdev->rdev->ddev;
-        struct fb_var_screeninfo *var = &info->var;
-        struct drm_crtc *crtc;
-        int ret;
-        int i;
-        if (var->pixclock != -1) {
-                DRM_ERROR("PIXEL CLCOK SET\n");
-                return -EINVAL;
-        }
-        list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
-                struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
-                for (i = 0; i < rfbdev->crtc_count; i++) {
-                        if (crtc->base.id == rfbdev->crtc_ids[i]) {
-                                break;
-                        }
-                }
-                if (i == rfbdev->crtc_count) {
-                        continue;
-                }
-                if (crtc->fb == radeon_crtc->mode_set.fb) {
-                        mutex_lock(&dev->mode_config.mutex);
-                        ret = crtc->funcs->set_config(&radeon_crtc->mode_set);
-                        mutex_unlock(&dev->mode_config.mutex);
-                        if (ret) {
-                                return ret;
-                        }
-                }
-        }
-        return 0;
-}
-static int radeonfb_pan_display(struct fb_var_screeninfo *var,
-                                struct fb_info *info)
-{
-        struct radeon_fb_device *rfbdev = info->par;
-        struct drm_device *dev = rfbdev->rdev->ddev;
-        struct drm_mode_set *modeset;
-        struct drm_crtc *crtc;
-        struct radeon_crtc *radeon_crtc;
-        int ret = 0;
-        int i;
-        list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
-                for (i = 0; i < rfbdev->crtc_count; i++) {
-                        if (crtc->base.id == rfbdev->crtc_ids[i]) {
-                                break;
-                        }
-                }
-                if (i == rfbdev->crtc_count) {
-                        continue;
-                }
-                radeon_crtc = to_radeon_crtc(crtc);
-                modeset = &radeon_crtc->mode_set;
-                modeset->x = var->xoffset;
-                modeset->y = var->yoffset;
-                if (modeset->num_connectors) {
-                        mutex_lock(&dev->mode_config.mutex);
-                        ret = crtc->funcs->set_config(modeset);
-                        mutex_unlock(&dev->mode_config.mutex);
-                        if (!ret) {
-                                info->var.xoffset = var->xoffset;
-                                info->var.yoffset = var->yoffset;
-                        }
-                }
-        }
-        return ret;
-}
-static void radeonfb_on(struct fb_info *info)
-{
-        struct radeon_fb_device *rfbdev = info->par;
-        struct drm_device *dev = rfbdev->rdev->ddev;
-        struct drm_crtc *crtc;
-        struct drm_encoder *encoder;
-        int i;
-        /*
-         * For each CRTC in this fb, find all associated encoders
-         * and turn them off, then turn off the CRTC.
-         */
-        list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
-                struct drm_crtc_helper_funcs *crtc_funcs = crtc->helper_private;
-                for (i = 0; i < rfbdev->crtc_count; i++) {
-                        if (crtc->base.id == rfbdev->crtc_ids[i]) {
-                                break;
-                        }
-                }
-                mutex_lock(&dev->mode_config.mutex);
-                crtc_funcs->dpms(crtc, DRM_MODE_DPMS_ON);
-                mutex_unlock(&dev->mode_config.mutex);
-                /* Found a CRTC on this fb, now find encoders */
-                list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
-                        if (encoder->crtc == crtc) {
-                                struct drm_encoder_helper_funcs *encoder_funcs;
-                                encoder_funcs = encoder->helper_private;
-                                mutex_lock(&dev->mode_config.mutex);
-                                encoder_funcs->dpms(encoder, DRM_MODE_DPMS_ON);
-                                mutex_unlock(&dev->mode_config.mutex);
-                        }
-                }
-        }
-}
-static void radeonfb_off(struct fb_info *info, int dpms_mode)
-{
-        struct radeon_fb_device *rfbdev = info->par;
-        struct drm_device *dev = rfbdev->rdev->ddev;
-        struct drm_crtc *crtc;
-        struct drm_encoder *encoder;
-        int i;
-        /*
-         * For each CRTC in this fb, find all associated encoders
-         * and turn them off, then turn off the CRTC.
-         */
-        list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
-                struct drm_crtc_helper_funcs *crtc_funcs = crtc->helper_private;
-                for (i = 0; i < rfbdev->crtc_count; i++) {
-                        if (crtc->base.id == rfbdev->crtc_ids[i]) {
-                                break;
-                        }
-                }
-                /* Found a CRTC on this fb, now find encoders */
-                list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
-                        if (encoder->crtc == crtc) {
-                                struct drm_encoder_helper_funcs *encoder_funcs;
-                                encoder_funcs = encoder->helper_private;
-                                mutex_lock(&dev->mode_config.mutex);
-                                encoder_funcs->dpms(encoder, dpms_mode);
-                                mutex_unlock(&dev->mode_config.mutex);
-                        }
-                }
-                if (dpms_mode == DRM_MODE_DPMS_OFF) {
-                        mutex_lock(&dev->mode_config.mutex);
-                        crtc_funcs->dpms(crtc, dpms_mode);
-                        mutex_unlock(&dev->mode_config.mutex);
-                }
-        }
-}
-int radeonfb_blank(int blank, struct fb_info *info)
-{
-        switch (blank) {
-        case FB_BLANK_UNBLANK:
-                radeonfb_on(info);
-                break;
-        case FB_BLANK_NORMAL:
-                radeonfb_off(info, DRM_MODE_DPMS_STANDBY);
-                break;
-        case FB_BLANK_HSYNC_SUSPEND:
-                radeonfb_off(info, DRM_MODE_DPMS_STANDBY);
-                break;
-        case FB_BLANK_VSYNC_SUSPEND:
-                radeonfb_off(info, DRM_MODE_DPMS_SUSPEND);
-                break;
-        case FB_BLANK_POWERDOWN:
-                radeonfb_off(info, DRM_MODE_DPMS_OFF);
-                break;
-        }
-        return 0;
-}
 static struct fb_ops radeonfb_ops = {
        .owner = THIS_MODULE,
-        .fb_check_var = radeonfb_check_var,
+        .fb_check_var = drm_fb_helper_check_var,
-        .fb_set_par = radeonfb_set_par,
+        .fb_set_par = drm_fb_helper_set_par,
-        .fb_setcolreg = radeonfb_setcolreg,
+        .fb_setcolreg = drm_fb_helper_setcolreg,
        .fb_fillrect = cfb_fillrect,
        .fb_copyarea = cfb_copyarea,
        .fb_imageblit = cfb_imageblit,
-        .fb_pan_display = radeonfb_pan_display,
+        .fb_pan_display = drm_fb_helper_pan_display,
-        .fb_blank = radeonfb_blank,
+        .fb_blank = drm_fb_helper_blank,
 };
 /**
@@ -456,21 +97,6 @@ int radeonfb_resize(struct drm_device *dev, struct drm_crtc *crtc)
 }
 EXPORT_SYMBOL(radeonfb_resize);
-static struct drm_mode_set panic_mode;
-int radeonfb_panic(struct notifier_block *n, unsigned long ununsed,
-                  void *panic_str)
-{
-        DRM_ERROR("panic occurred, switching back to text console\n");
-        drm_crtc_helper_set_config(&panic_mode);
-        return 0;
-}
-EXPORT_SYMBOL(radeonfb_panic);
-static struct notifier_block paniced = {
-        .notifier_call = radeonfb_panic,
-};
 static int radeon_align_pitch(struct radeon_device *rdev, int width, int bpp, bool tiled)
 {
        int aligned = width;
@@ -495,11 +121,16 @@ static int radeon_align_pitch(struct radeon_device *rdev, int width, int bpp, bo
        return aligned;
 }
-int radeonfb_create(struct radeon_device *rdev,
+static struct drm_fb_helper_funcs radeon_fb_helper_funcs = {
+        .gamma_set = radeon_crtc_fb_gamma_set,
+};
+int radeonfb_create(struct drm_device *dev,
                    uint32_t fb_width, uint32_t fb_height,
                    uint32_t surface_width, uint32_t surface_height,
-                    struct radeon_framebuffer **rfb_p)
+                    struct drm_framebuffer **fb_p)
 {
+        struct radeon_device *rdev = dev->dev_private;
        struct fb_info *info;
        struct radeon_fb_device *rfbdev;
        struct drm_framebuffer *fb = NULL;
@@ -513,6 +144,7 @@ int radeonfb_create(struct radeon_device *rdev,
        void *fbptr = NULL;
        unsigned long tmp;
        bool fb_tiled = false; /* useful for testing */
+        u32 tiling_flags = 0;
        mode_cmd.width = surface_width;
        mode_cmd.height = surface_height;
@@ -537,7 +169,22 @@ int radeonfb_create(struct radeon_device *rdev,
        robj = gobj->driver_private;
        if (fb_tiled)
-                radeon_object_set_tiling_flags(robj, RADEON_TILING_MACRO|RADEON_TILING_SURFACE, mode_cmd.pitch);
+                tiling_flags = RADEON_TILING_MACRO;
+#ifdef __BIG_ENDIAN
+        switch (mode_cmd.bpp) {
+        case 32:
+                tiling_flags |= RADEON_TILING_SWAP_32BIT;
+                break;
+        case 16:
+                tiling_flags |= RADEON_TILING_SWAP_16BIT;
+        default:
+                break;
+        }
+#endif
+        if (tiling_flags)
+                radeon_object_set_tiling_flags(robj, tiling_flags | RADEON_TILING_SURFACE, mode_cmd.pitch);
        mutex_lock(&rdev->ddev->struct_mutex);
        fb = radeon_framebuffer_create(rdev->ddev, &mode_cmd, gobj);
        if (fb == NULL) {
@@ -554,8 +201,8 @@ int radeonfb_create(struct radeon_device *rdev,
        list_add(&fb->filp_head, &rdev->ddev->mode_config.fb_kernel_list);
+        *fb_p = fb;
        rfb = to_radeon_framebuffer(fb);
-        *rfb_p = rfb;
        rdev->fbdev_rfb = rfb;
        rdev->fbdev_robj = robj;
@@ -564,7 +211,15 @@ int radeonfb_create(struct radeon_device *rdev,
                ret = -ENOMEM;
                goto out_unref;
        }
+        rdev->fbdev_info = info;
        rfbdev = info->par;
+        rfbdev->helper.funcs = &radeon_fb_helper_funcs;
+        rfbdev->helper.dev = dev;
+        ret = drm_fb_helper_init_crtc_count(&rfbdev->helper, 2,
+                                            RADEONFB_CONN_LIMIT);
+        if (ret)
+                goto out_unref;
        if (fb_tiled)
                radeon_object_check_tiling(robj, 0, 0);
@@ -577,33 +232,19 @@ int radeonfb_create(struct radeon_device *rdev,
        memset_io(fbptr, 0, aligned_size);
        strcpy(info->fix.id, "radeondrmfb");
-        info->fix.type = FB_TYPE_PACKED_PIXELS;
-        info->fix.visual = FB_VISUAL_TRUECOLOR;
+        drm_fb_helper_fill_fix(info, fb->pitch);
-        info->fix.type_aux = 0;
-        info->fix.xpanstep = 1; /* doing it in hw */
-        info->fix.ypanstep = 1; /* doing it in hw */
-        info->fix.ywrapstep = 0;
-        info->fix.accel = FB_ACCEL_NONE;
-        info->fix.type_aux = 0;
        info->flags = FBINFO_DEFAULT;
        info->fbops = &radeonfb_ops;
-        info->fix.line_length = fb->pitch;
        tmp = fb_gpuaddr - rdev->mc.vram_location;
        info->fix.smem_start = rdev->mc.aper_base + tmp;
        info->fix.smem_len = size;
        info->screen_base = fbptr;
        info->screen_size = size;
-        info->pseudo_palette = fb->pseudo_palette;
-        info->var.xres_virtual = fb->width;
+        drm_fb_helper_fill_var(info, fb, fb_width, fb_height);
-        info->var.yres_virtual = fb->height;
-        info->var.bits_per_pixel = fb->bits_per_pixel;
-        info->var.xoffset = 0;
-        info->var.yoffset = 0;
-        info->var.activate = FB_ACTIVATE_NOW;
-        info->var.height = -1;
-        info->var.width = -1;
-        info->var.xres = fb_width;
-        info->var.yres = fb_height;
        /* setup aperture base/size for vesafb takeover */
        info->aperture_base = rdev->ddev->mode_config.fb_base;
@@ -626,83 +267,6 @@ int radeonfb_create(struct radeon_device *rdev,
        DRM_INFO("fb depth is %d\n", fb->depth);
        DRM_INFO("   pitch is %d\n", fb->pitch);
-        switch (fb->depth) {
-        case 8:
-                info->var.red.offset = 0;
-                info->var.green.offset = 0;
-                info->var.blue.offset = 0;
-                info->var.red.length = 8; /* 8bit DAC */
-                info->var.green.length = 8;
-                info->var.blue.length = 8;
-                info->var.transp.offset = 0;
-                info->var.transp.length = 0;
-                break;
-#ifdef __LITTLE_ENDIAN
-        case 15:
-                info->var.red.offset = 10;
-                info->var.green.offset = 5;
-                info->var.blue.offset = 0;
-                info->var.red.length = 5;
-                info->var.green.length = 5;
-                info->var.blue.length = 5;
-                info->var.transp.offset = 15;
-                info->var.transp.length = 1;
-                break;
-        case 16:
-                info->var.red.offset = 11;
-                info->var.green.offset = 5;
-                info->var.blue.offset = 0;
-                info->var.red.length = 5;
-                info->var.green.length = 6;
-                info->var.blue.length = 5;
-                info->var.transp.offset = 0;
-                break;
-        case 24:
-                info->var.red.offset = 16;
-                info->var.green.offset = 8;
-                info->var.blue.offset = 0;
-                info->var.red.length = 8;
-                info->var.green.length = 8;
-                info->var.blue.length = 8;
-                info->var.transp.offset = 0;
-                info->var.transp.length = 0;
-                break;
-        case 32:
-                info->var.red.offset = 16;
-                info->var.green.offset = 8;
-                info->var.blue.offset = 0;
-                info->var.red.length = 8;
-                info->var.green.length = 8;
-                info->var.blue.length = 8;
-                info->var.transp.offset = 24;
-                info->var.transp.length = 8;
-                break;
-#else
-        case 24:
-                info->var.red.offset = 8;
-                info->var.green.offset = 16;
-                info->var.blue.offset = 24;
-                info->var.red.length = 8;
-                info->var.green.length = 8;
-                info->var.blue.length = 8;
-                info->var.transp.offset = 0;
-                info->var.transp.length = 0;
-                break;
-        case 32:
-                info->var.red.offset = 8;
-                info->var.green.offset = 16;
-                info->var.blue.offset = 24;
-                info->var.red.length = 8;
-                info->var.green.length = 8;
-                info->var.blue.length = 8;
-                info->var.transp.offset = 0;
-                info->var.transp.length = 8;
-                break;
-        default:
-#endif
-                break;
-        }
        fb->fbdev = info;
        rfbdev->rfb = rfb;
        rfbdev->rdev = rdev;
@@ -726,145 +290,10 @@ out:
        return ret;
 }
-static int radeonfb_single_fb_probe(struct radeon_device *rdev)
-{
-        struct drm_crtc *crtc;
-        struct drm_connector *connector;
-        unsigned int fb_width = (unsigned)-1, fb_height = (unsigned)-1;
-        unsigned int surface_width = 0, surface_height = 0;
-        int new_fb = 0;
-        int crtc_count = 0;
-        int ret, i, conn_count = 0;
-        struct radeon_framebuffer *rfb;
-        struct fb_info *info;
-        struct radeon_fb_device *rfbdev;
-        struct drm_mode_set *modeset = NULL;
-        /* first up get a count of crtcs now in use and new min/maxes width/heights */
-        list_for_each_entry(crtc, &rdev->ddev->mode_config.crtc_list, head) {
-                if (drm_helper_crtc_in_use(crtc)) {
-                        if (crtc->desired_mode) {
-                                if (crtc->desired_mode->hdisplay < fb_width)
-                                        fb_width = crtc->desired_mode->hdisplay;
-                                if (crtc->desired_mode->vdisplay < fb_height)
-                                        fb_height = crtc->desired_mode->vdisplay;
-                                if (crtc->desired_mode->hdisplay > surface_width)
-                                        surface_width = crtc->desired_mode->hdisplay;
-                                if (crtc->desired_mode->vdisplay > surface_height)
-                                        surface_height = crtc->desired_mode->vdisplay;
-                        }
-                        crtc_count++;
-                }
-        }
-        if (crtc_count == 0 || fb_width == -1 || fb_height == -1) {
-                /* hmm everyone went away - assume VGA cable just fell out
-                   and will come back later. */
-                return 0;
-        }
-        /* do we have an fb already? */
-        if (list_empty(&rdev->ddev->mode_config.fb_kernel_list)) {
-                /* create an fb if we don't have one */
-                ret = radeonfb_create(rdev, fb_width, fb_height, surface_width, surface_height, &rfb);
-                if (ret) {
-                        return -EINVAL;
-                }
-                new_fb = 1;
-        } else {
-                struct drm_framebuffer *fb;
-                fb = list_first_entry(&rdev->ddev->mode_config.fb_kernel_list, struct drm_framebuffer, filp_head);
-                rfb = to_radeon_framebuffer(fb);
-                /* if someone hotplugs something bigger than we have already allocated, we are pwned.
-                   As really we can't resize an fbdev that is in the wild currently due to fbdev
-                   not really being designed for the lower layers moving stuff around under it.
-                   - so in the grand style of things - punt. */
-                if ((fb->width < surface_width) || (fb->height < surface_height)) {
-                        DRM_ERROR("Framebuffer not large enough to scale console onto.\n");
-                        return -EINVAL;
-                }
-        }
-        info = rfb->base.fbdev;
-        rdev->fbdev_info = info;
-        rfbdev = info->par;
-        crtc_count = 0;
-        /* okay we need to setup new connector sets in the crtcs */
-        list_for_each_entry(crtc, &rdev->ddev->mode_config.crtc_list, head) {
-                struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
-                modeset = &radeon_crtc->mode_set;
-                modeset->fb = &rfb->base;
-                conn_count = 0;
-                list_for_each_entry(connector, &rdev->ddev->mode_config.connector_list, head) {
-                        if (connector->encoder)
-                                if (connector->encoder->crtc == modeset->crtc) {
-                                        modeset->connectors[conn_count] = connector;
-                                        conn_count++;
-                                        if (conn_count > RADEONFB_CONN_LIMIT)
-                                                BUG();
-                                }
-                }
-                for (i = conn_count; i < RADEONFB_CONN_LIMIT; i++)
-                        modeset->connectors[i] = NULL;
-                rfbdev->crtc_ids[crtc_count++] = crtc->base.id;
-                modeset->num_connectors = conn_count;
-                if (modeset->crtc->desired_mode) {
-                        if (modeset->mode) {
-                                drm_mode_destroy(rdev->ddev, modeset->mode);
-                        }
-                        modeset->mode = drm_mode_duplicate(rdev->ddev,
-                                                           modeset->crtc->desired_mode);
-                }
-        }
-        rfbdev->crtc_count = crtc_count;
-        if (new_fb) {
-                info->var.pixclock = -1;
-                if (register_framebuffer(info) < 0)
-                        return -EINVAL;
-        } else {
-                radeonfb_set_par(info);
-        }
-        printk(KERN_INFO "fb%d: %s frame buffer device\n", info->node,
-               info->fix.id);
-        /* Switch back to kernel console on panic */
-        panic_mode = *modeset;
-        atomic_notifier_chain_register(&panic_notifier_list, &paniced);
-        printk(KERN_INFO "registered panic notifier\n");
-        return 0;
-}
 int radeonfb_probe(struct drm_device *dev)
 {
        int ret;
+        ret = drm_fb_helper_single_fb_probe(dev, &radeonfb_create);
-        /* something has changed in the lower levels of hell - deal with it
-           here */
-        /* two modes : a) 1 fb to rule all crtcs.
-                       b) one fb per crtc.
-           two actions 1) new connected device
-                       2) device removed.
-           case a/1 : if the fb surface isn't big enough - resize the surface fb.
-                      if the fb size isn't big enough - resize fb into surface.
-                      if everything big enough configure the new crtc/etc.
-           case a/2 : undo the configuration
-                      possibly resize down the fb to fit the new configuration.
-           case b/1 : see if it is on a new crtc - setup a new fb and add it.
-           case b/2 : teardown the new fb.
-        */
-        ret = radeonfb_single_fb_probe(dev->dev_private);
        return ret;
 }
 EXPORT_SYMBOL(radeonfb_probe);
@@ -880,16 +309,17 @@ int radeonfb_remove(struct drm_device *dev, struct drm_framebuffer *fb)
        }
        info = fb->fbdev;
        if (info) {
+                struct radeon_fb_device *rfbdev = info->par;
                robj = rfb->obj->driver_private;
                unregister_framebuffer(info);
                radeon_object_kunmap(robj);
                radeon_object_unpin(robj);
+                drm_fb_helper_free(&rfbdev->helper);
                framebuffer_release(info);
        }
        printk(KERN_INFO "unregistered panic notifier\n");
-        atomic_notifier_chain_unregister(&panic_notifier_list, &paniced);
-        memset(&panic_mode, 0, sizeof(struct drm_mode_set));
        return 0;
 }
 EXPORT_SYMBOL(radeonfb_remove);
diff --git a/drivers/gpu/drm/radeon/radeon_fence.c b/drivers/gpu/drm/radeon/radeon_fence.c
index b4e48dd2e859..3beb26d74719 100644
--- a/drivers/gpu/drm/radeon/radeon_fence.c
+++ b/drivers/gpu/drm/radeon/radeon_fence.c
@@ -53,9 +53,9 @@ int radeon_fence_emit(struct radeon_device *rdev, struct radeon_fence *fence)
                 * away
                 */
                WREG32(rdev->fence_drv.scratch_reg, fence->seq);
-        } else {
+        } else
                radeon_fence_ring_emit(rdev, fence);
-        }
        fence->emited = true;
        fence->timeout = jiffies + ((2000 * HZ) / 1000);
        list_del(&fence->list);
@@ -168,7 +168,38 @@ bool radeon_fence_signaled(struct radeon_fence *fence)
        return signaled;
 }
-int radeon_fence_wait(struct radeon_fence *fence, bool interruptible)
+int r600_fence_wait(struct radeon_fence *fence,  bool intr, bool lazy)
+{
+        struct radeon_device *rdev;
+        int ret = 0;
+        rdev = fence->rdev;
+        __set_current_state(intr ? TASK_INTERRUPTIBLE : TASK_UNINTERRUPTIBLE);
+        while (1) {
+                if (radeon_fence_signaled(fence))
+                        break;
+                if (time_after_eq(jiffies, fence->timeout)) {
+                        ret = -EBUSY;
+                        break;
+                }
+                if (lazy)
+                        schedule_timeout(1);
+                if (intr && signal_pending(current)) {
+                        ret = -ERESTARTSYS;
+                        break;
+                }
+        }
+        __set_current_state(TASK_RUNNING);
+        return ret;
+}
+int radeon_fence_wait(struct radeon_fence *fence, bool intr)
 {
        struct radeon_device *rdev;
        unsigned long cur_jiffies;
@@ -176,7 +207,6 @@ int radeon_fence_wait(struct radeon_fence *fence, bool interruptible)
        bool expired = false;
        int r;
        if (fence == NULL) {
                WARN(1, "Querying an invalid fence : %p !\n", fence);
                return 0;
@@ -185,13 +215,22 @@ int radeon_fence_wait(struct radeon_fence *fence, bool interruptible)
        if (radeon_fence_signaled(fence)) {
                return 0;
        }
+        if (rdev->family >= CHIP_R600) {
+                r = r600_fence_wait(fence, intr, 0);
+                if (r == -ERESTARTSYS)
+                        return -EBUSY;
+                return r;
+        }
 retry:
        cur_jiffies = jiffies;
        timeout = HZ / 100;
        if (time_after(fence->timeout, cur_jiffies)) {
                timeout = fence->timeout - cur_jiffies;
        }
-        if (interruptible) {
+        if (intr) {
                r = wait_event_interruptible_timeout(rdev->fence_drv.queue,
                                radeon_fence_signaled(fence), timeout);
                if (unlikely(r == -ERESTARTSYS)) {
diff --git a/drivers/gpu/drm/radeon/radeon_gart.c b/drivers/gpu/drm/radeon/radeon_gart.c
index 2977539880fb..a931af065dd4 100644
--- a/drivers/gpu/drm/radeon/radeon_gart.c
+++ b/drivers/gpu/drm/radeon/radeon_gart.c
@@ -75,7 +75,6 @@ void radeon_gart_table_ram_free(struct radeon_device *rdev)
 int radeon_gart_table_vram_alloc(struct radeon_device *rdev)
 {
-        uint64_t gpu_addr;
        int r;
        if (rdev->gart.table.vram.robj == NULL) {
@@ -88,6 +87,14 @@ int radeon_gart_table_vram_alloc(struct radeon_device *rdev)
                        return r;
                }
        }
+        return 0;
+}
+int radeon_gart_table_vram_pin(struct radeon_device *rdev)
+{
+        uint64_t gpu_addr;
+        int r;
        r = radeon_object_pin(rdev->gart.table.vram.robj,
                              RADEON_GEM_DOMAIN_VRAM, &gpu_addr);
        if (r) {
diff --git a/drivers/gpu/drm/radeon/radeon_ioc32.c b/drivers/gpu/drm/radeon/radeon_ioc32.c
index 56decda2a71f..a1bf11de308a 100644
--- a/drivers/gpu/drm/radeon/radeon_ioc32.c
+++ b/drivers/gpu/drm/radeon/radeon_ioc32.c
@@ -422,3 +422,18 @@ long radeon_compat_ioctl(struct file *filp, unsigned int cmd, unsigned long arg)
        return ret;
 }
+long radeon_kms_compat_ioctl(struct file *filp, unsigned int cmd, unsigned long arg)
+{
+        unsigned int nr = DRM_IOCTL_NR(cmd);
+        int ret;
+        if (nr < DRM_COMMAND_BASE)
+                return drm_compat_ioctl(filp, cmd, arg);
+        lock_kernel();          /* XXX for now */
+        ret = drm_ioctl(filp->f_path.dentry->d_inode, filp, cmd, arg);
+        unlock_kernel();
+        return ret;
+}
diff --git a/drivers/gpu/drm/radeon/radeon_irq.c b/drivers/gpu/drm/radeon/radeon_irq.c
index 9836c705a952..b79ecc4a7cc4 100644
--- a/drivers/gpu/drm/radeon/radeon_irq.c
+++ b/drivers/gpu/drm/radeon/radeon_irq.c
@@ -188,6 +188,9 @@ irqreturn_t radeon_driver_irq_handler(DRM_IRQ_ARGS)
        u32 stat;
        u32 r500_disp_int;
+        if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
+                return IRQ_NONE;
        /* Only consider the bits we're interested in - others could be used
         * outside the DRM
         */
@@ -286,6 +289,9 @@ int radeon_irq_emit(struct drm_device *dev, void *data, struct drm_file *file_pr
        drm_radeon_irq_emit_t *emit = data;
        int result;
+        if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
+                return -EINVAL;
        LOCK_TEST_WITH_RETURN(dev, file_priv);
        if (!dev_priv) {
@@ -315,6 +321,9 @@ int radeon_irq_wait(struct drm_device *dev, void *data, struct drm_file *file_pr
                return -EINVAL;
        }
+        if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
+                return -EINVAL;
        return radeon_wait_irq(dev, irqwait->irq_seq);
 }
@@ -326,6 +335,9 @@ void radeon_driver_irq_preinstall(struct drm_device * dev)
            (drm_radeon_private_t *) dev->dev_private;
        u32 dummy;
+        if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
+                return;
        /* Disable *all* interrupts */
        if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600)
                RADEON_WRITE(R500_DxMODE_INT_MASK, 0);
@@ -345,6 +357,9 @@ int radeon_driver_irq_postinstall(struct drm_device *dev)
        dev->max_vblank_count = 0x001fffff;
+        if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
+                return 0;
        radeon_irq_set_state(dev, RADEON_SW_INT_ENABLE, 1);
        return 0;
@@ -357,6 +372,9 @@ void radeon_driver_irq_uninstall(struct drm_device * dev)
        if (!dev_priv)
                return;
+        if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
+                return;
        if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600)
                RADEON_WRITE(R500_DxMODE_INT_MASK, 0);
        /* Disable *all* interrupts */
diff --git a/drivers/gpu/drm/radeon/radeon_irq_kms.c b/drivers/gpu/drm/radeon/radeon_irq_kms.c
index 9805e4b6ca1b..1841145a7c4f 100644
--- a/drivers/gpu/drm/radeon/radeon_irq_kms.c
+++ b/drivers/gpu/drm/radeon/radeon_irq_kms.c
@@ -28,7 +28,6 @@
 #include "drmP.h"
 #include "radeon_drm.h"
 #include "radeon_reg.h"
-#include "radeon_microcode.h"
 #include "radeon.h"
 #include "atom.h"
diff --git a/drivers/gpu/drm/radeon/radeon_kms.c b/drivers/gpu/drm/radeon/radeon_kms.c
index dce09ada32bc..709bd892b3a9 100644
--- a/drivers/gpu/drm/radeon/radeon_kms.c
+++ b/drivers/gpu/drm/radeon/radeon_kms.c
@@ -54,12 +54,23 @@ int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags)
                flags |= RADEON_IS_PCI;
        }
+        /* radeon_device_init should report only fatal error
+         * like memory allocation failure or iomapping failure,
+         * or memory manager initialization failure, it must
+         * properly initialize the GPU MC controller and permit
+         * VRAM allocation
+         */
        r = radeon_device_init(rdev, dev, dev->pdev, flags);
        if (r) {
-                DRM_ERROR("Failed to initialize radeon, disabling IOCTL\n");
+                DRM_ERROR("Fatal error while trying to initialize radeon.\n");
-                radeon_device_fini(rdev);
+                return r;
-                kfree(rdev);
+        }
-                dev->dev_private = NULL;
+        /* Again modeset_init should fail only on fatal error
+         * otherwise it should provide enough functionalities
+         * for shadowfb to run
+         */
+        r = radeon_modeset_init(rdev);
+        if (r) {
                return r;
        }
        return 0;
@@ -69,6 +80,9 @@ int radeon_driver_unload_kms(struct drm_device *dev)
 {
        struct radeon_device *rdev = dev->dev_private;
+        if (rdev == NULL)
+                return 0;
+        radeon_modeset_fini(rdev);
        radeon_device_fini(rdev);
        kfree(rdev);
        dev->dev_private = NULL;
@@ -98,6 +112,9 @@ int radeon_info_ioctl(struct drm_device *dev, void *data, struct drm_file *filp)
        case RADEON_INFO_NUM_Z_PIPES:
                value = rdev->num_z_pipes;
                break;
+        case RADEON_INFO_ACCEL_WORKING:
+                value = rdev->accel_working;
+                break;
        default:
                DRM_DEBUG("Invalid request %d\n", info->request);
                return -EINVAL;
diff --git a/drivers/gpu/drm/radeon/radeon_legacy_crtc.c b/drivers/gpu/drm/radeon/radeon_legacy_crtc.c
index 0da72f18fd3a..2b997a15fb1f 100644
--- a/drivers/gpu/drm/radeon/radeon_legacy_crtc.c
+++ b/drivers/gpu/drm/radeon/radeon_legacy_crtc.c
@@ -28,6 +28,7 @@
 #include <drm/radeon_drm.h>
 #include "radeon_fixed.h"
 #include "radeon.h"
+#include "atom.h"
 static void radeon_legacy_rmx_mode_set(struct drm_crtc *crtc,
                                       struct drm_display_mode *mode,
@@ -340,6 +341,9 @@ void radeon_legacy_atom_set_surface(struct drm_crtc *crtc)
        uint32_t crtc_pitch;
        switch (crtc->fb->bits_per_pixel) {
+        case 8:
+                format = 2;
+                break;
        case 15:      /*  555 */
                format = 3;
                break;
@@ -400,11 +404,33 @@ int radeon_crtc_set_base(struct drm_crtc *crtc, int x, int y,
        uint32_t crtc_offset, crtc_offset_cntl, crtc_tile_x0_y0 = 0;
        uint32_t crtc_pitch, pitch_pixels;
        uint32_t tiling_flags;
+        int format;
+        uint32_t gen_cntl_reg, gen_cntl_val;
        DRM_DEBUG("\n");
        radeon_fb = to_radeon_framebuffer(crtc->fb);
+        switch (crtc->fb->bits_per_pixel) {
+        case 8:
+                format = 2;
+                break;
+        case 15:      /*  555 */
+                format = 3;
+                break;
+        case 16:      /*  565 */
+                format = 4;
+                break;
+        case 24:      /*  RGB */
+                format = 5;
+                break;
+        case 32:      /* xRGB */
+                format = 6;
+                break;
+        default:
+                return false;
+        }
        obj = radeon_fb->obj;
        if (radeon_gem_object_pin(obj, RADEON_GEM_DOMAIN_VRAM, &base)) {
                return -EINVAL;
@@ -457,6 +483,9 @@ int radeon_crtc_set_base(struct drm_crtc *crtc, int x, int y,
        } else {
                int offset = y * pitch_pixels + x;
                switch (crtc->fb->bits_per_pixel) {
+                case 8:
+                        offset *= 1;
+                        break;
                case 15:
                case 16:
                        offset *= 2;
@@ -475,6 +504,16 @@ int radeon_crtc_set_base(struct drm_crtc *crtc, int x, int y,
        base &= ~7;
+        if (radeon_crtc->crtc_id == 1)
+                gen_cntl_reg = RADEON_CRTC2_GEN_CNTL;
+        else
+                gen_cntl_reg = RADEON_CRTC_GEN_CNTL;
+        gen_cntl_val = RREG32(gen_cntl_reg);
+        gen_cntl_val &= ~(0xf << 8);
+        gen_cntl_val |= (format << 8);
+        WREG32(gen_cntl_reg, gen_cntl_val);
        crtc_offset = (u32)base;
        WREG32(RADEON_DISPLAY_BASE_ADDR + radeon_crtc->crtc_offset, radeon_crtc->legacy_display_base_addr);
@@ -501,6 +540,7 @@ static bool radeon_set_crtc_timing(struct drm_crtc *crtc, struct drm_display_mod
        struct drm_device *dev = crtc->dev;
        struct radeon_device *rdev = dev->dev_private;
        struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
+        struct drm_encoder *encoder;
        int format;
        int hsync_start;
        int hsync_wid;
@@ -509,10 +549,24 @@ static bool radeon_set_crtc_timing(struct drm_crtc *crtc, struct drm_display_mod
        uint32_t crtc_h_sync_strt_wid;
        uint32_t crtc_v_total_disp;
        uint32_t crtc_v_sync_strt_wid;
+        bool is_tv = false;
        DRM_DEBUG("\n");
+        list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
+                if (encoder->crtc == crtc) {
+                        struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
+                        if (radeon_encoder->active_device & ATOM_DEVICE_TV_SUPPORT) {
+                                is_tv = true;
+                                DRM_INFO("crtc %d is connected to a TV\n", radeon_crtc->crtc_id);
+                                break;
+                        }
+                }
+        }
        switch (crtc->fb->bits_per_pixel) {
+        case 8:
+                format = 2;
+                break;
        case 15:      /*  555 */
                format = 3;
                break;
@@ -642,6 +696,11 @@ static bool radeon_set_crtc_timing(struct drm_crtc *crtc, struct drm_display_mod
                WREG32(RADEON_CRTC_EXT_CNTL, crtc_ext_cntl);
        }
+        if (is_tv)
+                radeon_legacy_tv_adjust_crtc_reg(encoder, &crtc_h_total_disp,
+                                                 &crtc_h_sync_strt_wid, &crtc_v_total_disp,
+                                                 &crtc_v_sync_strt_wid);
        WREG32(RADEON_CRTC_H_TOTAL_DISP + radeon_crtc->crtc_offset, crtc_h_total_disp);
        WREG32(RADEON_CRTC_H_SYNC_STRT_WID + radeon_crtc->crtc_offset, crtc_h_sync_strt_wid);
        WREG32(RADEON_CRTC_V_TOTAL_DISP + radeon_crtc->crtc_offset, crtc_v_total_disp);
@@ -668,7 +727,7 @@ static void radeon_set_pll(struct drm_crtc *crtc, struct drm_display_mode *mode)
        uint32_t pll_ref_div = 0;
        uint32_t pll_fb_post_div = 0;
        uint32_t htotal_cntl = 0;
+        bool is_tv = false;
        struct radeon_pll *pll;
        struct {
@@ -703,6 +762,13 @@ static void radeon_set_pll(struct drm_crtc *crtc, struct drm_display_mode *mode)
        list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
                if (encoder->crtc == crtc) {
+                        struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
+                        if (radeon_encoder->active_device & ATOM_DEVICE_TV_SUPPORT) {
+                                is_tv = true;
+                                break;
+                        }
                        if (encoder->encoder_type != DRM_MODE_ENCODER_DAC)
                                pll_flags |= RADEON_PLL_NO_ODD_POST_DIV;
                        if (encoder->encoder_type == DRM_MODE_ENCODER_LVDS) {
@@ -766,6 +832,12 @@ static void radeon_set_pll(struct drm_crtc *crtc, struct drm_display_mode *mode)
                                          ~(RADEON_PIX2CLK_SRC_SEL_MASK)) |
                                         RADEON_PIX2CLK_SRC_SEL_P2PLLCLK);
+                if (is_tv) {
+                        radeon_legacy_tv_adjust_pll2(encoder, &htotal_cntl,
+                                                     &pll_ref_div, &pll_fb_post_div,
+                                                     &pixclks_cntl);
+                }
                WREG32_PLL_P(RADEON_PIXCLKS_CNTL,
                             RADEON_PIX2CLK_SRC_SEL_CPUCLK,
                             ~(RADEON_PIX2CLK_SRC_SEL_MASK));
@@ -820,6 +892,15 @@ static void radeon_set_pll(struct drm_crtc *crtc, struct drm_display_mode *mode)
                WREG32_PLL(RADEON_PIXCLKS_CNTL, pixclks_cntl);
        } else {
+                uint32_t pixclks_cntl;
+                if (is_tv) {
+                        pixclks_cntl = RREG32_PLL(RADEON_PIXCLKS_CNTL);
+                        radeon_legacy_tv_adjust_pll1(encoder, &htotal_cntl, &pll_ref_div,
+                                                     &pll_fb_post_div, &pixclks_cntl);
+                }
                if (rdev->flags & RADEON_IS_MOBILITY) {
                        /* A temporal workaround for the occational blanking on certain laptop panels.
                           This appears to related to the PLL divider registers (fail to lock?).
@@ -914,6 +995,8 @@ static void radeon_set_pll(struct drm_crtc *crtc, struct drm_display_mode *mode)
                             RADEON_VCLK_SRC_SEL_PPLLCLK,
                             ~(RADEON_VCLK_SRC_SEL_MASK));
+                if (is_tv)
+                        WREG32_PLL(RADEON_PIXCLKS_CNTL, pixclks_cntl);
        }
 }
diff --git a/drivers/gpu/drm/radeon/radeon_legacy_encoders.c b/drivers/gpu/drm/radeon/radeon_legacy_encoders.c
index 9322675ef6d0..b1547f700d73 100644
--- a/drivers/gpu/drm/radeon/radeon_legacy_encoders.c
+++ b/drivers/gpu/drm/radeon/radeon_legacy_encoders.c
@@ -29,6 +29,15 @@
 #include "radeon.h"
 #include "atom.h"
+static void radeon_legacy_encoder_disable(struct drm_encoder *encoder)
+{
+        struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
+        struct drm_encoder_helper_funcs *encoder_funcs;
+        encoder_funcs = encoder->helper_private;
+        encoder_funcs->dpms(encoder, DRM_MODE_DPMS_OFF);
+        radeon_encoder->active_device = 0;
+}
 static void radeon_legacy_lvds_dpms(struct drm_encoder *encoder, int mode)
 {
@@ -98,6 +107,8 @@ static void radeon_legacy_lvds_prepare(struct drm_encoder *encoder)
        else
                radeon_combios_output_lock(encoder, true);
        radeon_legacy_lvds_dpms(encoder, DRM_MODE_DPMS_OFF);
+        radeon_encoder_set_active_device(encoder);
 }
 static void radeon_legacy_lvds_commit(struct drm_encoder *encoder)
@@ -195,6 +206,7 @@ static const struct drm_encoder_helper_funcs radeon_legacy_lvds_helper_funcs = {
        .prepare = radeon_legacy_lvds_prepare,
        .mode_set = radeon_legacy_lvds_mode_set,
        .commit = radeon_legacy_lvds_commit,
+        .disable = radeon_legacy_encoder_disable,
 };
@@ -260,6 +272,7 @@ static void radeon_legacy_primary_dac_prepare(struct drm_encoder *encoder)
        else
                radeon_combios_output_lock(encoder, true);
        radeon_legacy_primary_dac_dpms(encoder, DRM_MODE_DPMS_OFF);
+        radeon_encoder_set_active_device(encoder);
 }
 static void radeon_legacy_primary_dac_commit(struct drm_encoder *encoder)
@@ -402,6 +415,7 @@ static const struct drm_encoder_helper_funcs radeon_legacy_primary_dac_helper_fu
        .mode_set = radeon_legacy_primary_dac_mode_set,
        .commit = radeon_legacy_primary_dac_commit,
        .detect = radeon_legacy_primary_dac_detect,
+        .disable = radeon_legacy_encoder_disable,
 };
@@ -454,6 +468,7 @@ static void radeon_legacy_tmds_int_prepare(struct drm_encoder *encoder)
        else
                radeon_combios_output_lock(encoder, true);
        radeon_legacy_tmds_int_dpms(encoder, DRM_MODE_DPMS_OFF);
+        radeon_encoder_set_active_device(encoder);
 }
 static void radeon_legacy_tmds_int_commit(struct drm_encoder *encoder)
@@ -566,6 +581,7 @@ static const struct drm_encoder_helper_funcs radeon_legacy_tmds_int_helper_funcs
        .prepare = radeon_legacy_tmds_int_prepare,
        .mode_set = radeon_legacy_tmds_int_mode_set,
        .commit = radeon_legacy_tmds_int_commit,
+        .disable = radeon_legacy_encoder_disable,
 };
@@ -620,6 +636,7 @@ static void radeon_legacy_tmds_ext_prepare(struct drm_encoder *encoder)
        else
                radeon_combios_output_lock(encoder, true);
        radeon_legacy_tmds_ext_dpms(encoder, DRM_MODE_DPMS_OFF);
+        radeon_encoder_set_active_device(encoder);
 }
 static void radeon_legacy_tmds_ext_commit(struct drm_encoder *encoder)
@@ -706,6 +723,7 @@ static const struct drm_encoder_helper_funcs radeon_legacy_tmds_ext_helper_funcs
        .prepare = radeon_legacy_tmds_ext_prepare,
        .mode_set = radeon_legacy_tmds_ext_mode_set,
        .commit = radeon_legacy_tmds_ext_commit,
+        .disable = radeon_legacy_encoder_disable,
 };
@@ -727,17 +745,21 @@ static void radeon_legacy_tv_dac_dpms(struct drm_encoder *encoder, int mode)
 {
        struct drm_device *dev = encoder->dev;
        struct radeon_device *rdev = dev->dev_private;
+        struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
        uint32_t fp2_gen_cntl = 0, crtc2_gen_cntl = 0, tv_dac_cntl = 0;
-        /* uint32_t tv_master_cntl = 0; */
+        uint32_t tv_master_cntl = 0;
+        bool is_tv;
        DRM_DEBUG("\n");
+        is_tv = radeon_encoder->active_device & ATOM_DEVICE_TV_SUPPORT ? true : false;
        if (rdev->family == CHIP_R200)
                fp2_gen_cntl = RREG32(RADEON_FP2_GEN_CNTL);
        else {
-                crtc2_gen_cntl = RREG32(RADEON_CRTC2_GEN_CNTL);
+                if (is_tv)
-                /*  FIXME TV */
+                        tv_master_cntl = RREG32(RADEON_TV_MASTER_CNTL);
-                /* tv_master_cntl = RREG32(RADEON_TV_MASTER_CNTL); */
+                else
+                        crtc2_gen_cntl = RREG32(RADEON_CRTC2_GEN_CNTL);
                tv_dac_cntl = RREG32(RADEON_TV_DAC_CNTL);
        }
@@ -746,20 +768,23 @@ static void radeon_legacy_tv_dac_dpms(struct drm_encoder *encoder, int mode)
                if (rdev->family == CHIP_R200) {
                        fp2_gen_cntl |= (RADEON_FP2_ON | RADEON_FP2_DVO_EN);
                } else {
-                        crtc2_gen_cntl |= RADEON_CRTC2_CRT2_ON;
+                        if (is_tv)
-                        /* tv_master_cntl |= RADEON_TV_ON; */
+                                tv_master_cntl |= RADEON_TV_ON;
+                        else
+                                crtc2_gen_cntl |= RADEON_CRTC2_CRT2_ON;
                        if (rdev->family == CHIP_R420 ||
-                                        rdev->family == CHIP_R423 ||
+                            rdev->family == CHIP_R423 ||
-                                        rdev->family == CHIP_RV410)
+                            rdev->family == CHIP_RV410)
                                tv_dac_cntl &= ~(R420_TV_DAC_RDACPD |
-                                                R420_TV_DAC_GDACPD |
+                                                 R420_TV_DAC_GDACPD |
-                                                R420_TV_DAC_BDACPD |
+                                                 R420_TV_DAC_BDACPD |
-                                                RADEON_TV_DAC_BGSLEEP);
+                                                 RADEON_TV_DAC_BGSLEEP);
                        else
                                tv_dac_cntl &= ~(RADEON_TV_DAC_RDACPD |
-                                                RADEON_TV_DAC_GDACPD |
+                                                 RADEON_TV_DAC_GDACPD |
-                                                RADEON_TV_DAC_BDACPD |
+                                                 RADEON_TV_DAC_BDACPD |
-                                                RADEON_TV_DAC_BGSLEEP);
+                                                 RADEON_TV_DAC_BGSLEEP);
                }
                break;
        case DRM_MODE_DPMS_STANDBY:
@@ -768,8 +793,11 @@ static void radeon_legacy_tv_dac_dpms(struct drm_encoder *encoder, int mode)
                if (rdev->family == CHIP_R200)
                        fp2_gen_cntl &= ~(RADEON_FP2_ON | RADEON_FP2_DVO_EN);
                else {
-                        crtc2_gen_cntl &= ~RADEON_CRTC2_CRT2_ON;
+                        if (is_tv)
-                        /* tv_master_cntl &= ~RADEON_TV_ON; */
+                                tv_master_cntl &= ~RADEON_TV_ON;
+                        else
+                                crtc2_gen_cntl &= ~RADEON_CRTC2_CRT2_ON;
                        if (rdev->family == CHIP_R420 ||
                                        rdev->family == CHIP_R423 ||
                                        rdev->family == CHIP_RV410)
@@ -789,8 +817,10 @@ static void radeon_legacy_tv_dac_dpms(struct drm_encoder *encoder, int mode)
        if (rdev->family == CHIP_R200) {
                WREG32(RADEON_FP2_GEN_CNTL, fp2_gen_cntl);
        } else {
-                WREG32(RADEON_CRTC2_GEN_CNTL, crtc2_gen_cntl);
+                if (is_tv)
-                /* WREG32(RADEON_TV_MASTER_CNTL, tv_master_cntl); */
+                        WREG32(RADEON_TV_MASTER_CNTL, tv_master_cntl);
+                else
+                        WREG32(RADEON_CRTC2_GEN_CNTL, crtc2_gen_cntl);
                WREG32(RADEON_TV_DAC_CNTL, tv_dac_cntl);
        }
@@ -809,6 +839,7 @@ static void radeon_legacy_tv_dac_prepare(struct drm_encoder *encoder)
        else
                radeon_combios_output_lock(encoder, true);
        radeon_legacy_tv_dac_dpms(encoder, DRM_MODE_DPMS_OFF);
+        radeon_encoder_set_active_device(encoder);
 }
 static void radeon_legacy_tv_dac_commit(struct drm_encoder *encoder)
@@ -831,11 +862,15 @@ static void radeon_legacy_tv_dac_mode_set(struct drm_encoder *encoder,
        struct radeon_device *rdev = dev->dev_private;
        struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc);
        struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
+        struct radeon_encoder_tv_dac *tv_dac = radeon_encoder->enc_priv;
        uint32_t tv_dac_cntl, gpiopad_a = 0, dac2_cntl, disp_output_cntl = 0;
-        uint32_t disp_hw_debug = 0, fp2_gen_cntl = 0;
+        uint32_t disp_hw_debug = 0, fp2_gen_cntl = 0, disp_tv_out_cntl = 0;
+        bool is_tv = false;
        DRM_DEBUG("\n");
+        is_tv = radeon_encoder->active_device & ATOM_DEVICE_TV_SUPPORT ? true : false;
        if (rdev->family != CHIP_R200) {
                tv_dac_cntl = RREG32(RADEON_TV_DAC_CNTL);
                if (rdev->family == CHIP_R420 ||
@@ -858,7 +893,7 @@ static void radeon_legacy_tv_dac_mode_set(struct drm_encoder *encoder,
                }
                /*  FIXME TV */
-                if (radeon_encoder->enc_priv) {
+                if (tv_dac) {
                        struct radeon_encoder_tv_dac *tv_dac = radeon_encoder->enc_priv;
                        tv_dac_cntl |= (RADEON_TV_DAC_NBLANK |
                                        RADEON_TV_DAC_NHOLD |
@@ -875,44 +910,93 @@ static void radeon_legacy_tv_dac_mode_set(struct drm_encoder *encoder,
        if (ASIC_IS_R300(rdev)) {
                gpiopad_a = RREG32(RADEON_GPIOPAD_A) | 1;
                disp_output_cntl = RREG32(RADEON_DISP_OUTPUT_CNTL);
-        } else if (rdev->family == CHIP_R200)
+        }
-                fp2_gen_cntl = RREG32(RADEON_FP2_GEN_CNTL);
+        if (rdev->family == CHIP_R200 || ASIC_IS_R300(rdev))
+                disp_tv_out_cntl = RREG32(RADEON_DISP_TV_OUT_CNTL);
        else
                disp_hw_debug = RREG32(RADEON_DISP_HW_DEBUG);
-        dac2_cntl = RREG32(RADEON_DAC_CNTL2) | RADEON_DAC2_DAC2_CLK_SEL;
+        if (rdev->family == CHIP_R200)
+                fp2_gen_cntl = RREG32(RADEON_FP2_GEN_CNTL);
-        if (radeon_crtc->crtc_id == 0) {
+        if (is_tv) {
-                if (ASIC_IS_R300(rdev)) {
+                uint32_t dac_cntl;
-                        disp_output_cntl &= ~RADEON_DISP_TVDAC_SOURCE_MASK;
-                        disp_output_cntl |= RADEON_DISP_TVDAC_SOURCE_CRTC;
+                dac_cntl = RREG32(RADEON_DAC_CNTL);
-                } else if (rdev->family == CHIP_R200) {
+                dac_cntl &= ~RADEON_DAC_TVO_EN;
-                        fp2_gen_cntl &= ~(R200_FP2_SOURCE_SEL_MASK |
+                WREG32(RADEON_DAC_CNTL, dac_cntl);
-                                          RADEON_FP2_DVO_RATE_SEL_SDR);
-                } else
+                if (ASIC_IS_R300(rdev))
-                        disp_hw_debug |= RADEON_CRT2_DISP1_SEL;
+                        gpiopad_a = RREG32(RADEON_GPIOPAD_A) & ~1;
+                dac2_cntl = RREG32(RADEON_DAC_CNTL2) & ~RADEON_DAC2_DAC2_CLK_SEL;
+                if (radeon_crtc->crtc_id == 0) {
+                        if (ASIC_IS_R300(rdev)) {
+                                disp_output_cntl &= ~RADEON_DISP_TVDAC_SOURCE_MASK;
+                                disp_output_cntl |= (RADEON_DISP_TVDAC_SOURCE_CRTC |
+                                                     RADEON_DISP_TV_SOURCE_CRTC);
+                        }
+                        if (rdev->family >= CHIP_R200) {
+                                disp_tv_out_cntl &= ~RADEON_DISP_TV_PATH_SRC_CRTC2;
+                        } else {
+                                disp_hw_debug |= RADEON_CRT2_DISP1_SEL;
+                        }
+                } else {
+                        if (ASIC_IS_R300(rdev)) {
+                                disp_output_cntl &= ~RADEON_DISP_TVDAC_SOURCE_MASK;
+                                disp_output_cntl |= RADEON_DISP_TV_SOURCE_CRTC;
+                        }
+                        if (rdev->family >= CHIP_R200) {
+                                disp_tv_out_cntl |= RADEON_DISP_TV_PATH_SRC_CRTC2;
+                        } else {
+                                disp_hw_debug &= ~RADEON_CRT2_DISP1_SEL;
+                        }
+                }
+                WREG32(RADEON_DAC_CNTL2, dac2_cntl);
        } else {
-                if (ASIC_IS_R300(rdev)) {
-                        disp_output_cntl &= ~RADEON_DISP_TVDAC_SOURCE_MASK;
-                        disp_output_cntl |= RADEON_DISP_TVDAC_SOURCE_CRTC2;
-                } else if (rdev->family == CHIP_R200) {
-                        fp2_gen_cntl &= ~(R200_FP2_SOURCE_SEL_MASK |
-                                          RADEON_FP2_DVO_RATE_SEL_SDR);
-                        fp2_gen_cntl |= R200_FP2_SOURCE_SEL_CRTC2;
-                } else
-                        disp_hw_debug &= ~RADEON_CRT2_DISP1_SEL;
-        }
-        WREG32(RADEON_DAC_CNTL2, dac2_cntl);
+                dac2_cntl = RREG32(RADEON_DAC_CNTL2) | RADEON_DAC2_DAC2_CLK_SEL;
+                if (radeon_crtc->crtc_id == 0) {
+                        if (ASIC_IS_R300(rdev)) {
+                                disp_output_cntl &= ~RADEON_DISP_TVDAC_SOURCE_MASK;
+                                disp_output_cntl |= RADEON_DISP_TVDAC_SOURCE_CRTC;
+                        } else if (rdev->family == CHIP_R200) {
+                                fp2_gen_cntl &= ~(R200_FP2_SOURCE_SEL_MASK |
+                                                  RADEON_FP2_DVO_RATE_SEL_SDR);
+                        } else
+                                disp_hw_debug |= RADEON_CRT2_DISP1_SEL;
+                } else {
+                        if (ASIC_IS_R300(rdev)) {
+                                disp_output_cntl &= ~RADEON_DISP_TVDAC_SOURCE_MASK;
+                                disp_output_cntl |= RADEON_DISP_TVDAC_SOURCE_CRTC2;
+                        } else if (rdev->family == CHIP_R200) {
+                                fp2_gen_cntl &= ~(R200_FP2_SOURCE_SEL_MASK |
+                                                  RADEON_FP2_DVO_RATE_SEL_SDR);
+                                fp2_gen_cntl |= R200_FP2_SOURCE_SEL_CRTC2;
+                        } else
+                                disp_hw_debug &= ~RADEON_CRT2_DISP1_SEL;
+                }
+                WREG32(RADEON_DAC_CNTL2, dac2_cntl);
+        }
        if (ASIC_IS_R300(rdev)) {
                WREG32_P(RADEON_GPIOPAD_A, gpiopad_a, ~1);
-                WREG32(RADEON_DISP_TV_OUT_CNTL, disp_output_cntl);
+                WREG32(RADEON_DISP_OUTPUT_CNTL, disp_output_cntl);
-        } else if (rdev->family == CHIP_R200)
+        }
-                WREG32(RADEON_FP2_GEN_CNTL, fp2_gen_cntl);
+        if (rdev->family >= CHIP_R200)
+                WREG32(RADEON_DISP_TV_OUT_CNTL, disp_tv_out_cntl);
        else
                WREG32(RADEON_DISP_HW_DEBUG, disp_hw_debug);
+        if (rdev->family == CHIP_R200)
+                WREG32(RADEON_FP2_GEN_CNTL, fp2_gen_cntl);
+        if (is_tv)
+                radeon_legacy_tv_mode_set(encoder, mode, adjusted_mode);
        if (rdev->is_atom_bios)
                radeon_atombios_encoder_crtc_scratch_regs(encoder, radeon_crtc->crtc_id);
        else
@@ -920,6 +1004,141 @@ static void radeon_legacy_tv_dac_mode_set(struct drm_encoder *encoder,
 }
+static bool r300_legacy_tv_detect(struct drm_encoder *encoder,
+                                  struct drm_connector *connector)
+{
+        struct drm_device *dev = encoder->dev;
+        struct radeon_device *rdev = dev->dev_private;
+        uint32_t crtc2_gen_cntl, tv_dac_cntl, dac_cntl2, dac_ext_cntl;
+        uint32_t disp_output_cntl, gpiopad_a, tmp;
+        bool found = false;
+        /* save regs needed */
+        gpiopad_a = RREG32(RADEON_GPIOPAD_A);
+        dac_cntl2 = RREG32(RADEON_DAC_CNTL2);
+        crtc2_gen_cntl = RREG32(RADEON_CRTC2_GEN_CNTL);
+        dac_ext_cntl = RREG32(RADEON_DAC_EXT_CNTL);
+        tv_dac_cntl = RREG32(RADEON_TV_DAC_CNTL);
+        disp_output_cntl = RREG32(RADEON_DISP_OUTPUT_CNTL);
+        WREG32_P(RADEON_GPIOPAD_A, 0, ~1);
+        WREG32(RADEON_DAC_CNTL2, RADEON_DAC2_DAC2_CLK_SEL);
+        WREG32(RADEON_CRTC2_GEN_CNTL,
+               RADEON_CRTC2_CRT2_ON | RADEON_CRTC2_VSYNC_TRISTAT);
+        tmp = disp_output_cntl & ~RADEON_DISP_TVDAC_SOURCE_MASK;
+        tmp |= RADEON_DISP_TVDAC_SOURCE_CRTC2;
+        WREG32(RADEON_DISP_OUTPUT_CNTL, tmp);
+        WREG32(RADEON_DAC_EXT_CNTL,
+               RADEON_DAC2_FORCE_BLANK_OFF_EN |
+               RADEON_DAC2_FORCE_DATA_EN |
+               RADEON_DAC_FORCE_DATA_SEL_RGB |
+               (0xec << RADEON_DAC_FORCE_DATA_SHIFT));
+        WREG32(RADEON_TV_DAC_CNTL,
+               RADEON_TV_DAC_STD_NTSC |
+               (8 << RADEON_TV_DAC_BGADJ_SHIFT) |
+               (6 << RADEON_TV_DAC_DACADJ_SHIFT));
+        RREG32(RADEON_TV_DAC_CNTL);
+        mdelay(4);
+        WREG32(RADEON_TV_DAC_CNTL,
+               RADEON_TV_DAC_NBLANK |
+               RADEON_TV_DAC_NHOLD |
+               RADEON_TV_MONITOR_DETECT_EN |
+               RADEON_TV_DAC_STD_NTSC |
+               (8 << RADEON_TV_DAC_BGADJ_SHIFT) |
+               (6 << RADEON_TV_DAC_DACADJ_SHIFT));
+        RREG32(RADEON_TV_DAC_CNTL);
+        mdelay(6);
+        tmp = RREG32(RADEON_TV_DAC_CNTL);
+        if ((tmp & RADEON_TV_DAC_GDACDET) != 0) {
+                found = true;
+                DRM_DEBUG("S-video TV connection detected\n");
+        } else if ((tmp & RADEON_TV_DAC_BDACDET) != 0) {
+                found = true;
+                DRM_DEBUG("Composite TV connection detected\n");
+        }
+        WREG32(RADEON_TV_DAC_CNTL, tv_dac_cntl);
+        WREG32(RADEON_DAC_EXT_CNTL, dac_ext_cntl);
+        WREG32(RADEON_CRTC2_GEN_CNTL, crtc2_gen_cntl);
+        WREG32(RADEON_DISP_OUTPUT_CNTL, disp_output_cntl);
+        WREG32(RADEON_DAC_CNTL2, dac_cntl2);
+        WREG32_P(RADEON_GPIOPAD_A, gpiopad_a, ~1);
+        return found;
+}
+static bool radeon_legacy_tv_detect(struct drm_encoder *encoder,
+                                    struct drm_connector *connector)
+{
+        struct drm_device *dev = encoder->dev;
+        struct radeon_device *rdev = dev->dev_private;
+        uint32_t tv_dac_cntl, dac_cntl2;
+        uint32_t config_cntl, tv_pre_dac_mux_cntl, tv_master_cntl, tmp;
+        bool found = false;
+        if (ASIC_IS_R300(rdev))
+                return r300_legacy_tv_detect(encoder, connector);
+        dac_cntl2 = RREG32(RADEON_DAC_CNTL2);
+        tv_master_cntl = RREG32(RADEON_TV_MASTER_CNTL);
+        tv_dac_cntl = RREG32(RADEON_TV_DAC_CNTL);
+        config_cntl = RREG32(RADEON_CONFIG_CNTL);
+        tv_pre_dac_mux_cntl = RREG32(RADEON_TV_PRE_DAC_MUX_CNTL);
+        tmp = dac_cntl2 & ~RADEON_DAC2_DAC2_CLK_SEL;
+        WREG32(RADEON_DAC_CNTL2, tmp);
+        tmp = tv_master_cntl | RADEON_TV_ON;
+        tmp &= ~(RADEON_TV_ASYNC_RST |
+                 RADEON_RESTART_PHASE_FIX |
+                 RADEON_CRT_FIFO_CE_EN |
+                 RADEON_TV_FIFO_CE_EN |
+                 RADEON_RE_SYNC_NOW_SEL_MASK);
+        tmp |= RADEON_TV_FIFO_ASYNC_RST | RADEON_CRT_ASYNC_RST;
+        WREG32(RADEON_TV_MASTER_CNTL, tmp);
+        tmp = RADEON_TV_DAC_NBLANK | RADEON_TV_DAC_NHOLD |
+                RADEON_TV_MONITOR_DETECT_EN | RADEON_TV_DAC_STD_NTSC |
+                (8 << RADEON_TV_DAC_BGADJ_SHIFT);
+        if (config_cntl & RADEON_CFG_ATI_REV_ID_MASK)
+                tmp |= (4 << RADEON_TV_DAC_DACADJ_SHIFT);
+        else
+                tmp |= (8 << RADEON_TV_DAC_DACADJ_SHIFT);
+        WREG32(RADEON_TV_DAC_CNTL, tmp);
+        tmp = RADEON_C_GRN_EN | RADEON_CMP_BLU_EN |
+                RADEON_RED_MX_FORCE_DAC_DATA |
+                RADEON_GRN_MX_FORCE_DAC_DATA |
+                RADEON_BLU_MX_FORCE_DAC_DATA |
+                (0x109 << RADEON_TV_FORCE_DAC_DATA_SHIFT);
+        WREG32(RADEON_TV_PRE_DAC_MUX_CNTL, tmp);
+        mdelay(3);
+        tmp = RREG32(RADEON_TV_DAC_CNTL);
+        if (tmp & RADEON_TV_DAC_GDACDET) {
+                found = true;
+                DRM_DEBUG("S-video TV connection detected\n");
+        } else if ((tmp & RADEON_TV_DAC_BDACDET) != 0) {
+                found = true;
+                DRM_DEBUG("Composite TV connection detected\n");
+        }
+        WREG32(RADEON_TV_PRE_DAC_MUX_CNTL, tv_pre_dac_mux_cntl);
+        WREG32(RADEON_TV_DAC_CNTL, tv_dac_cntl);
+        WREG32(RADEON_TV_MASTER_CNTL, tv_master_cntl);
+        WREG32(RADEON_DAC_CNTL2, dac_cntl2);
+        return found;
+}
 static enum drm_connector_status radeon_legacy_tv_dac_detect(struct drm_encoder *encoder,
                                                             struct drm_connector *connector)
 {
@@ -928,9 +1147,29 @@ static enum drm_connector_status radeon_legacy_tv_dac_detect(struct drm_encoder
        uint32_t crtc2_gen_cntl, tv_dac_cntl, dac_cntl2, dac_ext_cntl;
        uint32_t disp_hw_debug, disp_output_cntl, gpiopad_a, pixclks_cntl, tmp;
        enum drm_connector_status found = connector_status_disconnected;
+        struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
+        struct radeon_encoder_tv_dac *tv_dac = radeon_encoder->enc_priv;
        bool color = true;
-        /*  FIXME tv */
+        if (connector->connector_type == DRM_MODE_CONNECTOR_SVIDEO ||
+            connector->connector_type == DRM_MODE_CONNECTOR_Composite ||
+            connector->connector_type == DRM_MODE_CONNECTOR_9PinDIN) {
+                bool tv_detect;
+                if (radeon_encoder->active_device && !(radeon_encoder->active_device & ATOM_DEVICE_TV_SUPPORT))
+                        return connector_status_disconnected;
+                tv_detect = radeon_legacy_tv_detect(encoder, connector);
+                if (tv_detect && tv_dac)
+                        found = connector_status_connected;
+                return found;
+        }
+        /* don't probe if the encoder is being used for something else not CRT related */
+        if (radeon_encoder->active_device && !(radeon_encoder->active_device & ATOM_DEVICE_CRT_SUPPORT)) {
+                DRM_INFO("not detecting due to %08x\n", radeon_encoder->active_device);
+                return connector_status_disconnected;
+        }
        /* save the regs we need */
        pixclks_cntl = RREG32_PLL(RADEON_PIXCLKS_CNTL);
@@ -1013,8 +1252,7 @@ static enum drm_connector_status radeon_legacy_tv_dac_detect(struct drm_encoder
        }
        WREG32_PLL(RADEON_PIXCLKS_CNTL, pixclks_cntl);
-        /* return found; */
+        return found;
-        return connector_status_disconnected;
 }
@@ -1025,6 +1263,7 @@ static const struct drm_encoder_helper_funcs radeon_legacy_tv_dac_helper_funcs =
        .mode_set = radeon_legacy_tv_dac_mode_set,
        .commit = radeon_legacy_tv_dac_commit,
        .detect = radeon_legacy_tv_dac_detect,
+        .disable = radeon_legacy_encoder_disable,
 };
@@ -1032,6 +1271,30 @@ static const struct drm_encoder_funcs radeon_legacy_tv_dac_enc_funcs = {
        .destroy = radeon_enc_destroy,
 };
+static struct radeon_encoder_int_tmds *radeon_legacy_get_tmds_info(struct radeon_encoder *encoder)
+{
+        struct drm_device *dev = encoder->base.dev;
+        struct radeon_device *rdev = dev->dev_private;
+        struct radeon_encoder_int_tmds *tmds = NULL;
+        bool ret;
+        tmds = kzalloc(sizeof(struct radeon_encoder_int_tmds), GFP_KERNEL);
+        if (!tmds)
+                return NULL;
+        if (rdev->is_atom_bios)
+                ret = radeon_atombios_get_tmds_info(encoder, tmds);
+        else
+                ret = radeon_legacy_get_tmds_info_from_combios(encoder, tmds);
+        if (ret == false)
+                radeon_legacy_get_tmds_info_from_table(encoder, tmds);
+        return tmds;
+}
 void
 radeon_add_legacy_encoder(struct drm_device *dev, uint32_t encoder_id, uint32_t supported_device)
 {
@@ -1078,10 +1341,7 @@ radeon_add_legacy_encoder(struct drm_device *dev, uint32_t encoder_id, uint32_t
        case ENCODER_OBJECT_ID_INTERNAL_TMDS1:
                drm_encoder_init(dev, encoder, &radeon_legacy_tmds_int_enc_funcs, DRM_MODE_ENCODER_TMDS);
                drm_encoder_helper_add(encoder, &radeon_legacy_tmds_int_helper_funcs);
-                if (rdev->is_atom_bios)
+                radeon_encoder->enc_priv = radeon_legacy_get_tmds_info(radeon_encoder);
-                        radeon_encoder->enc_priv = radeon_atombios_get_tmds_info(radeon_encoder);
-                else
-                        radeon_encoder->enc_priv = radeon_combios_get_tmds_info(radeon_encoder);
                break;
        case ENCODER_OBJECT_ID_INTERNAL_DAC1:
                drm_encoder_init(dev, encoder, &radeon_legacy_primary_dac_enc_funcs, DRM_MODE_ENCODER_DAC);
diff --git a/drivers/gpu/drm/radeon/radeon_legacy_tv.c b/drivers/gpu/drm/radeon/radeon_legacy_tv.c
new file mode 100644
index 000000000000..3a12bb0c0563
--- /dev/null
+++ b/drivers/gpu/drm/radeon/radeon_legacy_tv.c
@@ -0,0 +1,904 @@
+#include "drmP.h"
+#include "drm_crtc_helper.h"
+#include "radeon.h"
+/*
+ * Integrated TV out support based on the GATOS code by
+ * Federico Ulivi <fulivi@lycos.com>
+ */
+/*
+ * Limits of h/v positions (hPos & vPos)
+ */
+#define MAX_H_POSITION 5 /* Range: [-5..5], negative is on the left, 0 is default, positive is on the right */
+#define MAX_V_POSITION 5 /* Range: [-5..5], negative is up, 0 is default, positive is down */
+/*
+ * Unit for hPos (in TV clock periods)
+ */
+#define H_POS_UNIT 10
+/*
+ * Indexes in h. code timing table for horizontal line position adjustment
+ */
+#define H_TABLE_POS1 6
+#define H_TABLE_POS2 8
+/*
+ * Limits of hor. size (hSize)
+ */
+#define MAX_H_SIZE 5 /* Range: [-5..5], negative is smaller, positive is larger */
+/* tv standard constants */
+#define NTSC_TV_CLOCK_T 233
+#define NTSC_TV_VFTOTAL 1
+#define NTSC_TV_LINES_PER_FRAME 525
+#define NTSC_TV_ZERO_H_SIZE 479166
+#define NTSC_TV_H_SIZE_UNIT 9478
+#define PAL_TV_CLOCK_T 188
+#define PAL_TV_VFTOTAL 3
+#define PAL_TV_LINES_PER_FRAME 625
+#define PAL_TV_ZERO_H_SIZE 473200
+#define PAL_TV_H_SIZE_UNIT 9360
+/* tv pll setting for 27 mhz ref clk */
+#define NTSC_TV_PLL_M_27 22
+#define NTSC_TV_PLL_N_27 175
+#define NTSC_TV_PLL_P_27 5
+#define PAL_TV_PLL_M_27 113
+#define PAL_TV_PLL_N_27 668
+#define PAL_TV_PLL_P_27 3
+/* tv pll setting for 14 mhz ref clk */
+#define NTSC_TV_PLL_M_14 33
+#define NTSC_TV_PLL_N_14 693
+#define NTSC_TV_PLL_P_14 7
+#define VERT_LEAD_IN_LINES 2
+#define FRAC_BITS 0xe
+#define FRAC_MASK 0x3fff
+struct radeon_tv_mode_constants {
+        uint16_t hor_resolution;
+        uint16_t ver_resolution;
+        enum radeon_tv_std standard;
+        uint16_t hor_total;
+        uint16_t ver_total;
+        uint16_t hor_start;
+        uint16_t hor_syncstart;
+        uint16_t ver_syncstart;
+        unsigned def_restart;
+        uint16_t crtcPLL_N;
+        uint8_t  crtcPLL_M;
+        uint8_t  crtcPLL_post_div;
+        unsigned pix_to_tv;
+};
+static const uint16_t hor_timing_NTSC[] = {
+        0x0007,
+        0x003f,
+        0x0263,
+        0x0a24,
+        0x2a6b,
+        0x0a36,
+        0x126d, /* H_TABLE_POS1 */
+        0x1bfe,
+        0x1a8f, /* H_TABLE_POS2 */
+        0x1ec7,
+        0x3863,
+        0x1bfe,
+        0x1bfe,
+        0x1a2a,
+        0x1e95,
+        0x0e31,
+        0x201b,
+        0
+};
+static const uint16_t vert_timing_NTSC[] = {
+        0x2001,
+        0x200d,
+        0x1006,
+        0x0c06,
+        0x1006,
+        0x1818,
+        0x21e3,
+        0x1006,
+        0x0c06,
+        0x1006,
+        0x1817,
+        0x21d4,
+        0x0002,
+        0
+};
+static const uint16_t hor_timing_PAL[] = {
+        0x0007,
+        0x0058,
+        0x027c,
+        0x0a31,
+        0x2a77,
+        0x0a95,
+        0x124f, /* H_TABLE_POS1 */
+        0x1bfe,
+        0x1b22, /* H_TABLE_POS2 */
+        0x1ef9,
+        0x387c,
+        0x1bfe,
+        0x1bfe,
+        0x1b31,
+        0x1eb5,
+        0x0e43,
+        0x201b,
+        0
+};
+static const uint16_t vert_timing_PAL[] =       {
+        0x2001,
+        0x200c,
+        0x1005,
+        0x0c05,
+        0x1005,
+        0x1401,
+        0x1821,
+        0x2240,
+        0x1005,
+        0x0c05,
+        0x1005,
+        0x1401,
+        0x1822,
+        0x2230,
+        0x0002,
+        0
+};
+/**********************************************************************
+ *
+ * availableModes
+ *
+ * Table of all allowed modes for tv output
+ *
+ **********************************************************************/
+static const struct radeon_tv_mode_constants available_tv_modes[] = {
+        {   /* NTSC timing for 27 Mhz ref clk */
+                800,                /* horResolution */
+                600,                /* verResolution */
+                TV_STD_NTSC,        /* standard */
+                990,                /* horTotal */
+                740,                /* verTotal */
+                813,                /* horStart */
+                824,                /* horSyncStart */
+                632,                /* verSyncStart */
+                625592,             /* defRestart */
+                592,                /* crtcPLL_N */
+                91,                 /* crtcPLL_M */
+                4,                  /* crtcPLL_postDiv */
+                1022,               /* pixToTV */
+        },
+        {   /* PAL timing for 27 Mhz ref clk */
+                800,               /* horResolution */
+                600,               /* verResolution */
+                TV_STD_PAL,        /* standard */
+                1144,              /* horTotal */
+                706,               /* verTotal */
+                812,               /* horStart */
+                824,               /* horSyncStart */
+                669,               /* verSyncStart */
+                696700,            /* defRestart */
+                1382,              /* crtcPLL_N */
+                231,               /* crtcPLL_M */
+                4,                 /* crtcPLL_postDiv */
+                759,               /* pixToTV */
+        },
+        {   /* NTSC timing for 14 Mhz ref clk */
+                800,                /* horResolution */
+                600,                /* verResolution */
+                TV_STD_NTSC,        /* standard */
+                1018,               /* horTotal */
+                727,                /* verTotal */
+                813,                /* horStart */
+                840,                /* horSyncStart */
+                633,                /* verSyncStart */
+                630627,             /* defRestart */
+                347,                /* crtcPLL_N */
+                14,                 /* crtcPLL_M */
+                        8,                  /* crtcPLL_postDiv */
+                1022,               /* pixToTV */
+        },
+};
+#define N_AVAILABLE_MODES ARRAY_SIZE(available_tv_modes)
+static const struct radeon_tv_mode_constants *radeon_legacy_tv_get_std_mode(struct radeon_encoder *radeon_encoder,
+                                                                            uint16_t *pll_ref_freq)
+{
+        struct drm_device *dev = radeon_encoder->base.dev;
+        struct radeon_device *rdev = dev->dev_private;
+        struct radeon_crtc *radeon_crtc;
+        struct radeon_encoder_tv_dac *tv_dac = radeon_encoder->enc_priv;
+        const struct radeon_tv_mode_constants *const_ptr;
+        struct radeon_pll *pll;
+        radeon_crtc = to_radeon_crtc(radeon_encoder->base.crtc);
+        if (radeon_crtc->crtc_id == 1)
+                pll = &rdev->clock.p2pll;
+        else
+                pll = &rdev->clock.p1pll;
+        if (pll_ref_freq)
+                *pll_ref_freq = pll->reference_freq;
+        if (tv_dac->tv_std == TV_STD_NTSC ||
+            tv_dac->tv_std == TV_STD_NTSC_J ||
+            tv_dac->tv_std == TV_STD_PAL_M) {
+                if (pll->reference_freq == 2700)
+                        const_ptr = &available_tv_modes[0];
+                else
+                        const_ptr = &available_tv_modes[2];
+        } else {
+                if (pll->reference_freq == 2700)
+                        const_ptr = &available_tv_modes[1];
+                else
+                        const_ptr = &available_tv_modes[1]; /* FIX ME */
+        }
+        return const_ptr;
+}
+static long YCOEF_value[5] = { 2, 2, 0, 4, 0 };
+static long YCOEF_EN_value[5] = { 1, 1, 0, 1, 0 };
+static long SLOPE_value[5] = { 1, 2, 2, 4, 8 };
+static long SLOPE_limit[5] = { 6, 5, 4, 3, 2 };
+static void radeon_wait_pll_lock(struct drm_encoder *encoder, unsigned n_tests,
+                                 unsigned n_wait_loops, unsigned cnt_threshold)
+{
+        struct drm_device *dev = encoder->dev;
+        struct radeon_device *rdev = dev->dev_private;
+        uint32_t save_pll_test;
+        unsigned int i, j;
+        WREG32(RADEON_TEST_DEBUG_MUX, (RREG32(RADEON_TEST_DEBUG_MUX) & 0xffff60ff) | 0x100);
+        save_pll_test = RREG32_PLL(RADEON_PLL_TEST_CNTL);
+        WREG32_PLL(RADEON_PLL_TEST_CNTL, save_pll_test & ~RADEON_PLL_MASK_READ_B);
+        WREG8(RADEON_CLOCK_CNTL_INDEX, RADEON_PLL_TEST_CNTL);
+        for (i = 0; i < n_tests; i++) {
+                WREG8(RADEON_CLOCK_CNTL_DATA + 3, 0);
+                for (j = 0; j < n_wait_loops; j++)
+                        if (RREG8(RADEON_CLOCK_CNTL_DATA + 3) >= cnt_threshold)
+                                break;
+        }
+        WREG32_PLL(RADEON_PLL_TEST_CNTL, save_pll_test);
+        WREG32(RADEON_TEST_DEBUG_MUX, RREG32(RADEON_TEST_DEBUG_MUX) & 0xffffe0ff);
+}
+static void radeon_legacy_tv_write_fifo(struct radeon_encoder *radeon_encoder,
+                                        uint16_t addr, uint32_t value)
+{
+        struct drm_device *dev = radeon_encoder->base.dev;
+        struct radeon_device *rdev = dev->dev_private;
+        uint32_t tmp;
+        int i = 0;
+        WREG32(RADEON_TV_HOST_WRITE_DATA, value);
+        WREG32(RADEON_TV_HOST_RD_WT_CNTL, addr);
+        WREG32(RADEON_TV_HOST_RD_WT_CNTL, addr | RADEON_HOST_FIFO_WT);
+        do {
+                tmp = RREG32(RADEON_TV_HOST_RD_WT_CNTL);
+                if ((tmp & RADEON_HOST_FIFO_WT_ACK) == 0)
+                        break;
+                i++;
+        } while (i < 10000);
+        WREG32(RADEON_TV_HOST_RD_WT_CNTL, 0);
+}
+#if 0 /* included for completeness */
+static uint32_t radeon_legacy_tv_read_fifo(struct radeon_encoder *radeon_encoder, uint16_t addr)
+{
+        struct drm_device *dev = radeon_encoder->base.dev;
+        struct radeon_device *rdev = dev->dev_private;
+        uint32_t tmp;
+        int i = 0;
+        WREG32(RADEON_TV_HOST_RD_WT_CNTL, addr);
+        WREG32(RADEON_TV_HOST_RD_WT_CNTL, addr | RADEON_HOST_FIFO_RD);
+        do {
+                tmp = RREG32(RADEON_TV_HOST_RD_WT_CNTL);
+                if ((tmp & RADEON_HOST_FIFO_RD_ACK) == 0)
+                        break;
+                i++;
+        } while (i < 10000);
+        WREG32(RADEON_TV_HOST_RD_WT_CNTL, 0);
+        return RREG32(RADEON_TV_HOST_READ_DATA);
+}
+#endif
+static uint16_t radeon_get_htiming_tables_addr(uint32_t tv_uv_adr)
+{
+        uint16_t h_table;
+        switch ((tv_uv_adr & RADEON_HCODE_TABLE_SEL_MASK) >> RADEON_HCODE_TABLE_SEL_SHIFT) {
+        case 0:
+                h_table = RADEON_TV_MAX_FIFO_ADDR_INTERNAL;
+                break;
+        case 1:
+                h_table = ((tv_uv_adr & RADEON_TABLE1_BOT_ADR_MASK) >> RADEON_TABLE1_BOT_ADR_SHIFT) * 2;
+                break;
+        case 2:
+                h_table = ((tv_uv_adr & RADEON_TABLE3_TOP_ADR_MASK) >> RADEON_TABLE3_TOP_ADR_SHIFT) * 2;
+                break;
+        default:
+                h_table = 0;
+                break;
+        }
+        return h_table;
+}
+static uint16_t radeon_get_vtiming_tables_addr(uint32_t tv_uv_adr)
+{
+        uint16_t v_table;
+        switch ((tv_uv_adr & RADEON_VCODE_TABLE_SEL_MASK) >> RADEON_VCODE_TABLE_SEL_SHIFT) {
+        case 0:
+                v_table = ((tv_uv_adr & RADEON_MAX_UV_ADR_MASK) >> RADEON_MAX_UV_ADR_SHIFT) * 2 + 1;
+                break;
+        case 1:
+                v_table = ((tv_uv_adr & RADEON_TABLE1_BOT_ADR_MASK) >> RADEON_TABLE1_BOT_ADR_SHIFT) * 2 + 1;
+                break;
+        case 2:
+                v_table = ((tv_uv_adr & RADEON_TABLE3_TOP_ADR_MASK) >> RADEON_TABLE3_TOP_ADR_SHIFT) * 2 + 1;
+                break;
+        default:
+                v_table = 0;
+                break;
+        }
+        return v_table;
+}
+static void radeon_restore_tv_timing_tables(struct radeon_encoder *radeon_encoder)
+{
+        struct drm_device *dev = radeon_encoder->base.dev;
+        struct radeon_device *rdev = dev->dev_private;
+        struct radeon_encoder_tv_dac *tv_dac = radeon_encoder->enc_priv;
+        uint16_t h_table, v_table;
+        uint32_t tmp;
+        int i;
+        WREG32(RADEON_TV_UV_ADR, tv_dac->tv.tv_uv_adr);
+        h_table = radeon_get_htiming_tables_addr(tv_dac->tv.tv_uv_adr);
+        v_table = radeon_get_vtiming_tables_addr(tv_dac->tv.tv_uv_adr);
+        for (i = 0; i < MAX_H_CODE_TIMING_LEN; i += 2, h_table--) {
+                tmp = ((uint32_t)tv_dac->tv.h_code_timing[i] << 14) | ((uint32_t)tv_dac->tv.h_code_timing[i+1]);
+                radeon_legacy_tv_write_fifo(radeon_encoder, h_table, tmp);
+                if (tv_dac->tv.h_code_timing[i] == 0 || tv_dac->tv.h_code_timing[i + 1] == 0)
+                        break;
+        }
+        for (i = 0; i < MAX_V_CODE_TIMING_LEN; i += 2, v_table++) {
+                tmp = ((uint32_t)tv_dac->tv.v_code_timing[i+1] << 14) | ((uint32_t)tv_dac->tv.v_code_timing[i]);
+                radeon_legacy_tv_write_fifo(radeon_encoder, v_table, tmp);
+                if (tv_dac->tv.v_code_timing[i] == 0 || tv_dac->tv.v_code_timing[i + 1] == 0)
+                        break;
+        }
+}
+static void radeon_legacy_write_tv_restarts(struct radeon_encoder *radeon_encoder)
+{
+        struct drm_device *dev = radeon_encoder->base.dev;
+        struct radeon_device *rdev = dev->dev_private;
+        struct radeon_encoder_tv_dac *tv_dac = radeon_encoder->enc_priv;
+        WREG32(RADEON_TV_FRESTART, tv_dac->tv.frestart);
+        WREG32(RADEON_TV_HRESTART, tv_dac->tv.hrestart);
+        WREG32(RADEON_TV_VRESTART, tv_dac->tv.vrestart);
+}
+static bool radeon_legacy_tv_init_restarts(struct drm_encoder *encoder)
+{
+        struct drm_device *dev = encoder->dev;
+        struct radeon_device *rdev = dev->dev_private;
+        struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
+        struct radeon_encoder_tv_dac *tv_dac = radeon_encoder->enc_priv;
+        struct radeon_crtc *radeon_crtc;
+        int restart;
+        unsigned int h_total, v_total, f_total;
+        int v_offset, h_offset;
+        u16 p1, p2, h_inc;
+        bool h_changed;
+        const struct radeon_tv_mode_constants *const_ptr;
+        struct radeon_pll *pll;
+        radeon_crtc = to_radeon_crtc(radeon_encoder->base.crtc);
+        if (radeon_crtc->crtc_id == 1)
+                pll = &rdev->clock.p2pll;
+        else
+                pll = &rdev->clock.p1pll;
+        const_ptr = radeon_legacy_tv_get_std_mode(radeon_encoder, NULL);
+        if (!const_ptr)
+                return false;
+        h_total = const_ptr->hor_total;
+        v_total = const_ptr->ver_total;
+        if (tv_dac->tv_std == TV_STD_NTSC ||
+            tv_dac->tv_std == TV_STD_NTSC_J ||
+            tv_dac->tv_std == TV_STD_PAL_M ||
+            tv_dac->tv_std == TV_STD_PAL_60)
+                f_total = NTSC_TV_VFTOTAL + 1;
+        else
+                f_total = PAL_TV_VFTOTAL + 1;
+        /* adjust positions 1&2 in hor. cod timing table */
+        h_offset = tv_dac->h_pos * H_POS_UNIT;
+        if (tv_dac->tv_std == TV_STD_NTSC ||
+            tv_dac->tv_std == TV_STD_NTSC_J ||
+            tv_dac->tv_std == TV_STD_PAL_M) {
+                h_offset -= 50;
+                p1 = hor_timing_NTSC[H_TABLE_POS1];
+                p2 = hor_timing_NTSC[H_TABLE_POS2];
+        } else {
+                p1 = hor_timing_PAL[H_TABLE_POS1];
+                p2 = hor_timing_PAL[H_TABLE_POS2];
+        }
+        p1 = (u16)((int)p1 + h_offset);
+        p2 = (u16)((int)p2 - h_offset);
+        h_changed = (p1 != tv_dac->tv.h_code_timing[H_TABLE_POS1] ||
+                     p2 != tv_dac->tv.h_code_timing[H_TABLE_POS2]);
+        tv_dac->tv.h_code_timing[H_TABLE_POS1] = p1;
+        tv_dac->tv.h_code_timing[H_TABLE_POS2] = p2;
+        /* Convert hOffset from n. of TV clock periods to n. of CRTC clock periods (CRTC pixels) */
+        h_offset = (h_offset * (int)(const_ptr->pix_to_tv)) / 1000;
+        /* adjust restart */
+        restart = const_ptr->def_restart;
+        /*
+         * convert v_pos TV lines to n. of CRTC pixels
+         */
+        if (tv_dac->tv_std == TV_STD_NTSC ||
+            tv_dac->tv_std == TV_STD_NTSC_J ||
+            tv_dac->tv_std == TV_STD_PAL_M ||
+            tv_dac->tv_std == TV_STD_PAL_60)
+                v_offset = ((int)(v_total * h_total) * 2 * tv_dac->v_pos) / (int)(NTSC_TV_LINES_PER_FRAME);
+        else
+                v_offset = ((int)(v_total * h_total) * 2 * tv_dac->v_pos) / (int)(PAL_TV_LINES_PER_FRAME);
+        restart -= v_offset + h_offset;
+        DRM_DEBUG("compute_restarts: def = %u h = %d v = %d, p1 = %04x, p2 = %04x, restart = %d\n",
+                  const_ptr->def_restart, tv_dac->h_pos, tv_dac->v_pos, p1, p2, restart);
+        tv_dac->tv.hrestart = restart % h_total;
+        restart /= h_total;
+        tv_dac->tv.vrestart = restart % v_total;
+        restart /= v_total;
+        tv_dac->tv.frestart = restart % f_total;
+        DRM_DEBUG("compute_restart: F/H/V=%u,%u,%u\n",
+                  (unsigned)tv_dac->tv.frestart,
+                  (unsigned)tv_dac->tv.vrestart,
+                  (unsigned)tv_dac->tv.hrestart);
+        /* compute h_inc from hsize */
+        if (tv_dac->tv_std == TV_STD_NTSC ||
+            tv_dac->tv_std == TV_STD_NTSC_J ||
+            tv_dac->tv_std == TV_STD_PAL_M)
+                h_inc = (u16)((int)(const_ptr->hor_resolution * 4096 * NTSC_TV_CLOCK_T) /
+                              (tv_dac->h_size * (int)(NTSC_TV_H_SIZE_UNIT) + (int)(NTSC_TV_ZERO_H_SIZE)));
+        else
+                h_inc = (u16)((int)(const_ptr->hor_resolution * 4096 * PAL_TV_CLOCK_T) /
+                              (tv_dac->h_size * (int)(PAL_TV_H_SIZE_UNIT) + (int)(PAL_TV_ZERO_H_SIZE)));
+        tv_dac->tv.timing_cntl = (tv_dac->tv.timing_cntl & ~RADEON_H_INC_MASK) |
+                ((u32)h_inc << RADEON_H_INC_SHIFT);
+        DRM_DEBUG("compute_restart: h_size = %d h_inc = %d\n", tv_dac->h_size, h_inc);
+        return h_changed;
+}
+void radeon_legacy_tv_mode_set(struct drm_encoder *encoder,
+                               struct drm_display_mode *mode,
+                               struct drm_display_mode *adjusted_mode)
+{
+        struct drm_device *dev = encoder->dev;
+        struct radeon_device *rdev = dev->dev_private;
+        struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
+        struct radeon_encoder_tv_dac *tv_dac = radeon_encoder->enc_priv;
+        const struct radeon_tv_mode_constants *const_ptr;
+        struct radeon_crtc *radeon_crtc;
+        int i;
+        uint16_t pll_ref_freq;
+        uint32_t vert_space, flicker_removal, tmp;
+        uint32_t tv_master_cntl, tv_rgb_cntl, tv_dac_cntl;
+        uint32_t tv_modulator_cntl1, tv_modulator_cntl2;
+        uint32_t tv_vscaler_cntl1, tv_vscaler_cntl2;
+        uint32_t tv_pll_cntl, tv_pll_cntl1, tv_ftotal;
+        uint32_t tv_y_fall_cntl, tv_y_rise_cntl, tv_y_saw_tooth_cntl;
+        uint32_t m, n, p;
+        const uint16_t *hor_timing;
+        const uint16_t *vert_timing;
+        const_ptr = radeon_legacy_tv_get_std_mode(radeon_encoder, &pll_ref_freq);
+        if (!const_ptr)
+                return;
+        radeon_crtc = to_radeon_crtc(encoder->crtc);
+        tv_master_cntl = (RADEON_VIN_ASYNC_RST |
+                          RADEON_CRT_FIFO_CE_EN |
+                          RADEON_TV_FIFO_CE_EN |
+                          RADEON_TV_ON);
+        if (!ASIC_IS_R300(rdev))
+                tv_master_cntl |= RADEON_TVCLK_ALWAYS_ONb;
+        if (tv_dac->tv_std == TV_STD_NTSC ||
+            tv_dac->tv_std == TV_STD_NTSC_J)
+                tv_master_cntl |= RADEON_RESTART_PHASE_FIX;
+        tv_modulator_cntl1 = (RADEON_SLEW_RATE_LIMIT |
+                              RADEON_SYNC_TIP_LEVEL |
+                              RADEON_YFLT_EN |
+                              RADEON_UVFLT_EN |
+                              (6 << RADEON_CY_FILT_BLEND_SHIFT));
+        if (tv_dac->tv_std == TV_STD_NTSC ||
+            tv_dac->tv_std == TV_STD_NTSC_J) {
+                tv_modulator_cntl1 |= (0x46 << RADEON_SET_UP_LEVEL_SHIFT) |
+                        (0x3b << RADEON_BLANK_LEVEL_SHIFT);
+                tv_modulator_cntl2 = (-111 & RADEON_TV_U_BURST_LEVEL_MASK) |
+                        ((0 & RADEON_TV_V_BURST_LEVEL_MASK) << RADEON_TV_V_BURST_LEVEL_SHIFT);
+        } else if (tv_dac->tv_std == TV_STD_SCART_PAL) {
+                tv_modulator_cntl1 |= RADEON_ALT_PHASE_EN;
+                tv_modulator_cntl2 = (0 & RADEON_TV_U_BURST_LEVEL_MASK) |
+                        ((0 & RADEON_TV_V_BURST_LEVEL_MASK) << RADEON_TV_V_BURST_LEVEL_SHIFT);
+        } else {
+                tv_modulator_cntl1 |= RADEON_ALT_PHASE_EN |
+                        (0x3b << RADEON_SET_UP_LEVEL_SHIFT) |
+                        (0x3b << RADEON_BLANK_LEVEL_SHIFT);
+                tv_modulator_cntl2 = (-78 & RADEON_TV_U_BURST_LEVEL_MASK) |
+                        ((62 & RADEON_TV_V_BURST_LEVEL_MASK) << RADEON_TV_V_BURST_LEVEL_SHIFT);
+        }
+        tv_rgb_cntl = (RADEON_RGB_DITHER_EN
+                       | RADEON_TVOUT_SCALE_EN
+                       | (0x0b << RADEON_UVRAM_READ_MARGIN_SHIFT)
+                       | (0x07 << RADEON_FIFORAM_FFMACRO_READ_MARGIN_SHIFT)
+                       | RADEON_RGB_ATTEN_SEL(0x3)
+                       | RADEON_RGB_ATTEN_VAL(0xc));
+        if (radeon_crtc->crtc_id == 1)
+                tv_rgb_cntl |= RADEON_RGB_SRC_SEL_CRTC2;
+        else {
+                if (radeon_crtc->rmx_type != RMX_OFF)
+                        tv_rgb_cntl |= RADEON_RGB_SRC_SEL_RMX;
+                else
+                        tv_rgb_cntl |= RADEON_RGB_SRC_SEL_CRTC1;
+        }
+        if (tv_dac->tv_std == TV_STD_NTSC ||
+            tv_dac->tv_std == TV_STD_NTSC_J ||
+            tv_dac->tv_std == TV_STD_PAL_M ||
+            tv_dac->tv_std == TV_STD_PAL_60)
+                vert_space = const_ptr->ver_total * 2 * 10000 / NTSC_TV_LINES_PER_FRAME;
+        else
+                vert_space = const_ptr->ver_total * 2 * 10000 / PAL_TV_LINES_PER_FRAME;
+        tmp = RREG32(RADEON_TV_VSCALER_CNTL1);
+        tmp &= 0xe3ff0000;
+        tmp |= (vert_space * (1 << FRAC_BITS) / 10000);
+        tv_vscaler_cntl1 = tmp;
+        if (pll_ref_freq == 2700)
+                tv_vscaler_cntl1 |= RADEON_RESTART_FIELD;
+        if (const_ptr->hor_resolution == 1024)
+                tv_vscaler_cntl1 |= (4 << RADEON_Y_DEL_W_SIG_SHIFT);
+        else
+                tv_vscaler_cntl1 |= (2 << RADEON_Y_DEL_W_SIG_SHIFT);
+        /* scale up for int divide */
+        tmp = const_ptr->ver_total * 2 * 1000;
+        if (tv_dac->tv_std == TV_STD_NTSC ||
+            tv_dac->tv_std == TV_STD_NTSC_J ||
+            tv_dac->tv_std == TV_STD_PAL_M ||
+            tv_dac->tv_std == TV_STD_PAL_60) {
+                tmp /= NTSC_TV_LINES_PER_FRAME;
+        } else {
+                tmp /= PAL_TV_LINES_PER_FRAME;
+        }
+        flicker_removal = (tmp + 500) / 1000;
+        if (flicker_removal < 3)
+                flicker_removal = 3;
+        for (i = 0; i < 6; ++i) {
+                if (flicker_removal == SLOPE_limit[i])
+                        break;
+        }
+        tv_y_saw_tooth_cntl = (vert_space * SLOPE_value[i] * (1 << (FRAC_BITS - 1)) +
+                                5001) / 10000 / 8 | ((SLOPE_value[i] *
+                                (1 << (FRAC_BITS - 1)) / 8) << 16);
+        tv_y_fall_cntl =
+                (YCOEF_EN_value[i] << 17) | ((YCOEF_value[i] * (1 << 8) / 8) << 24) |
+                RADEON_Y_FALL_PING_PONG | (272 * SLOPE_value[i] / 8) * (1 << (FRAC_BITS - 1)) /
+                1024;
+        tv_y_rise_cntl = RADEON_Y_RISE_PING_PONG|
+                (flicker_removal * 1024 - 272) * SLOPE_value[i] / 8 * (1 << (FRAC_BITS - 1)) / 1024;
+        tv_vscaler_cntl2 = RREG32(RADEON_TV_VSCALER_CNTL2) & 0x00fffff0;
+        tv_vscaler_cntl2 |= (0x10 << 24) |
+                RADEON_DITHER_MODE |
+                RADEON_Y_OUTPUT_DITHER_EN |
+                RADEON_UV_OUTPUT_DITHER_EN |
+                RADEON_UV_TO_BUF_DITHER_EN;
+        tmp = (tv_vscaler_cntl1 >> RADEON_UV_INC_SHIFT) & RADEON_UV_INC_MASK;
+        tmp = ((16384 * 256 * 10) / tmp + 5) / 10;
+        tmp = (tmp << RADEON_UV_OUTPUT_POST_SCALE_SHIFT) | 0x000b0000;
+        tv_dac->tv.timing_cntl = tmp;
+        if (tv_dac->tv_std == TV_STD_NTSC ||
+            tv_dac->tv_std == TV_STD_NTSC_J ||
+            tv_dac->tv_std == TV_STD_PAL_M ||
+            tv_dac->tv_std == TV_STD_PAL_60)
+                tv_dac_cntl = tv_dac->ntsc_tvdac_adj;
+        else
+                tv_dac_cntl = tv_dac->pal_tvdac_adj;
+        tv_dac_cntl |= RADEON_TV_DAC_NBLANK | RADEON_TV_DAC_NHOLD;
+        if (tv_dac->tv_std == TV_STD_NTSC ||
+            tv_dac->tv_std == TV_STD_NTSC_J)
+                tv_dac_cntl |= RADEON_TV_DAC_STD_NTSC;
+        else
+                tv_dac_cntl |= RADEON_TV_DAC_STD_PAL;
+        if (tv_dac->tv_std == TV_STD_NTSC ||
+            tv_dac->tv_std == TV_STD_NTSC_J) {
+                if (pll_ref_freq == 2700) {
+                        m = NTSC_TV_PLL_M_27;
+                        n = NTSC_TV_PLL_N_27;
+                        p = NTSC_TV_PLL_P_27;
+                } else {
+                        m = NTSC_TV_PLL_M_14;
+                        n = NTSC_TV_PLL_N_14;
+                        p = NTSC_TV_PLL_P_14;
+                }
+        } else {
+                if (pll_ref_freq == 2700) {
+                        m = PAL_TV_PLL_M_27;
+                        n = PAL_TV_PLL_N_27;
+                        p = PAL_TV_PLL_P_27;
+                } else {
+                        m = PAL_TV_PLL_M_27;
+                        n = PAL_TV_PLL_N_27;
+                        p = PAL_TV_PLL_P_27;
+                }
+        }
+        tv_pll_cntl = (m & RADEON_TV_M0LO_MASK) |
+                (((m >> 8) & RADEON_TV_M0HI_MASK) << RADEON_TV_M0HI_SHIFT) |
+                ((n & RADEON_TV_N0LO_MASK) << RADEON_TV_N0LO_SHIFT) |
+                (((n >> 9) & RADEON_TV_N0HI_MASK) << RADEON_TV_N0HI_SHIFT) |
+                ((p & RADEON_TV_P_MASK) << RADEON_TV_P_SHIFT);
+        tv_pll_cntl1 = (((4 & RADEON_TVPCP_MASK) << RADEON_TVPCP_SHIFT) |
+                        ((4 & RADEON_TVPVG_MASK) << RADEON_TVPVG_SHIFT) |
+                        ((1 & RADEON_TVPDC_MASK) << RADEON_TVPDC_SHIFT) |
+                        RADEON_TVCLK_SRC_SEL_TVPLL |
+                        RADEON_TVPLL_TEST_DIS);
+        tv_dac->tv.tv_uv_adr = 0xc8;
+        if (tv_dac->tv_std == TV_STD_NTSC ||
+            tv_dac->tv_std == TV_STD_NTSC_J ||
+            tv_dac->tv_std == TV_STD_PAL_M ||
+            tv_dac->tv_std == TV_STD_PAL_60) {
+                tv_ftotal = NTSC_TV_VFTOTAL;
+                hor_timing = hor_timing_NTSC;
+                vert_timing = vert_timing_NTSC;
+        } else {
+                hor_timing = hor_timing_PAL;
+                vert_timing = vert_timing_PAL;
+                tv_ftotal = PAL_TV_VFTOTAL;
+        }
+        for (i = 0; i < MAX_H_CODE_TIMING_LEN; i++) {
+                if ((tv_dac->tv.h_code_timing[i] = hor_timing[i]) == 0)
+                        break;
+        }
+        for (i = 0; i < MAX_V_CODE_TIMING_LEN; i++) {
+                if ((tv_dac->tv.v_code_timing[i] = vert_timing[i]) == 0)
+                        break;
+        }
+        radeon_legacy_tv_init_restarts(encoder);
+        /* play with DAC_CNTL */
+        /* play with GPIOPAD_A */
+        /* DISP_OUTPUT_CNTL */
+        /* use reference freq */
+        /* program the TV registers */
+        WREG32(RADEON_TV_MASTER_CNTL, (tv_master_cntl | RADEON_TV_ASYNC_RST |
+                                       RADEON_CRT_ASYNC_RST | RADEON_TV_FIFO_ASYNC_RST));
+        tmp = RREG32(RADEON_TV_DAC_CNTL);
+        tmp &= ~RADEON_TV_DAC_NBLANK;
+        tmp |= RADEON_TV_DAC_BGSLEEP |
+                RADEON_TV_DAC_RDACPD |
+                RADEON_TV_DAC_GDACPD |
+                RADEON_TV_DAC_BDACPD;
+        WREG32(RADEON_TV_DAC_CNTL, tmp);
+        /* TV PLL */
+        WREG32_PLL_P(RADEON_TV_PLL_CNTL1, 0, ~RADEON_TVCLK_SRC_SEL_TVPLL);
+        WREG32_PLL(RADEON_TV_PLL_CNTL, tv_pll_cntl);
+        WREG32_PLL_P(RADEON_TV_PLL_CNTL1, RADEON_TVPLL_RESET, ~RADEON_TVPLL_RESET);
+        radeon_wait_pll_lock(encoder, 200, 800, 135);
+        WREG32_PLL_P(RADEON_TV_PLL_CNTL1, 0, ~RADEON_TVPLL_RESET);
+        radeon_wait_pll_lock(encoder, 300, 160, 27);
+        radeon_wait_pll_lock(encoder, 200, 800, 135);
+        WREG32_PLL_P(RADEON_TV_PLL_CNTL1, 0, ~0xf);
+        WREG32_PLL_P(RADEON_TV_PLL_CNTL1, RADEON_TVCLK_SRC_SEL_TVPLL, ~RADEON_TVCLK_SRC_SEL_TVPLL);
+        WREG32_PLL_P(RADEON_TV_PLL_CNTL1, (1 << RADEON_TVPDC_SHIFT), ~RADEON_TVPDC_MASK);
+        WREG32_PLL_P(RADEON_TV_PLL_CNTL1, 0, ~RADEON_TVPLL_SLEEP);
+        /* TV HV */
+        WREG32(RADEON_TV_RGB_CNTL, tv_rgb_cntl);
+        WREG32(RADEON_TV_HTOTAL, const_ptr->hor_total - 1);
+        WREG32(RADEON_TV_HDISP, const_ptr->hor_resolution - 1);
+        WREG32(RADEON_TV_HSTART, const_ptr->hor_start);
+        WREG32(RADEON_TV_VTOTAL, const_ptr->ver_total - 1);
+        WREG32(RADEON_TV_VDISP, const_ptr->ver_resolution - 1);
+        WREG32(RADEON_TV_FTOTAL, tv_ftotal);
+        WREG32(RADEON_TV_VSCALER_CNTL1, tv_vscaler_cntl1);
+        WREG32(RADEON_TV_VSCALER_CNTL2, tv_vscaler_cntl2);
+        WREG32(RADEON_TV_Y_FALL_CNTL, tv_y_fall_cntl);
+        WREG32(RADEON_TV_Y_RISE_CNTL, tv_y_rise_cntl);
+        WREG32(RADEON_TV_Y_SAW_TOOTH_CNTL, tv_y_saw_tooth_cntl);
+        WREG32(RADEON_TV_MASTER_CNTL, (tv_master_cntl | RADEON_TV_ASYNC_RST |
+                                       RADEON_CRT_ASYNC_RST));
+        /* TV restarts */
+        radeon_legacy_write_tv_restarts(radeon_encoder);
+        /* tv timings */
+        radeon_restore_tv_timing_tables(radeon_encoder);
+        WREG32(RADEON_TV_MASTER_CNTL, (tv_master_cntl | RADEON_TV_ASYNC_RST));
+        /* tv std */
+        WREG32(RADEON_TV_SYNC_CNTL, (RADEON_SYNC_PUB | RADEON_TV_SYNC_IO_DRIVE));
+        WREG32(RADEON_TV_TIMING_CNTL, tv_dac->tv.timing_cntl);
+        WREG32(RADEON_TV_MODULATOR_CNTL1, tv_modulator_cntl1);
+        WREG32(RADEON_TV_MODULATOR_CNTL2, tv_modulator_cntl2);
+        WREG32(RADEON_TV_PRE_DAC_MUX_CNTL, (RADEON_Y_RED_EN |
+                                            RADEON_C_GRN_EN |
+                                            RADEON_CMP_BLU_EN |
+                                            RADEON_DAC_DITHER_EN));
+        WREG32(RADEON_TV_CRC_CNTL, 0);
+        WREG32(RADEON_TV_MASTER_CNTL, tv_master_cntl);
+        WREG32(RADEON_TV_GAIN_LIMIT_SETTINGS, ((0x17f << RADEON_UV_GAIN_LIMIT_SHIFT) |
+                                               (0x5ff << RADEON_Y_GAIN_LIMIT_SHIFT)));
+        WREG32(RADEON_TV_LINEAR_GAIN_SETTINGS, ((0x100 << RADEON_UV_GAIN_SHIFT) |
+                                                (0x100 << RADEON_Y_GAIN_SHIFT)));
+        WREG32(RADEON_TV_DAC_CNTL, tv_dac_cntl);
+}
+void radeon_legacy_tv_adjust_crtc_reg(struct drm_encoder *encoder,
+                                      uint32_t *h_total_disp, uint32_t *h_sync_strt_wid,
+                                      uint32_t *v_total_disp, uint32_t *v_sync_strt_wid)
+{
+        struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
+        const struct radeon_tv_mode_constants *const_ptr;
+        uint32_t tmp;
+        const_ptr = radeon_legacy_tv_get_std_mode(radeon_encoder, NULL);
+        if (!const_ptr)
+                return;
+        *h_total_disp = (((const_ptr->hor_resolution / 8) - 1) << RADEON_CRTC_H_DISP_SHIFT) |
+                (((const_ptr->hor_total / 8) - 1) << RADEON_CRTC_H_TOTAL_SHIFT);
+        tmp = *h_sync_strt_wid;
+        tmp &= ~(RADEON_CRTC_H_SYNC_STRT_PIX | RADEON_CRTC_H_SYNC_STRT_CHAR);
+        tmp |= (((const_ptr->hor_syncstart / 8) - 1) << RADEON_CRTC_H_SYNC_STRT_CHAR_SHIFT) |
+                (const_ptr->hor_syncstart & 7);
+        *h_sync_strt_wid = tmp;
+        *v_total_disp = ((const_ptr->ver_resolution - 1) << RADEON_CRTC_V_DISP_SHIFT) |
+                ((const_ptr->ver_total - 1) << RADEON_CRTC_V_TOTAL_SHIFT);
+        tmp = *v_sync_strt_wid;
+        tmp &= ~RADEON_CRTC_V_SYNC_STRT;
+        tmp |= ((const_ptr->ver_syncstart - 1) << RADEON_CRTC_V_SYNC_STRT_SHIFT);
+        *v_sync_strt_wid = tmp;
+}
+static inline int get_post_div(int value)
+{
+        int post_div;
+        switch (value) {
+        case 1: post_div = 0; break;
+        case 2: post_div = 1; break;
+        case 3: post_div = 4; break;
+        case 4: post_div = 2; break;
+        case 6: post_div = 6; break;
+        case 8: post_div = 3; break;
+        case 12: post_div = 7; break;
+        case 16:
+        default: post_div = 5; break;
+        }
+        return post_div;
+}
+void radeon_legacy_tv_adjust_pll1(struct drm_encoder *encoder,
+                                  uint32_t *htotal_cntl, uint32_t *ppll_ref_div,
+                                  uint32_t *ppll_div_3, uint32_t *pixclks_cntl)
+{
+        struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
+        const struct radeon_tv_mode_constants *const_ptr;
+        const_ptr = radeon_legacy_tv_get_std_mode(radeon_encoder, NULL);
+        if (!const_ptr)
+                return;
+        *htotal_cntl = (const_ptr->hor_total & 0x7) | RADEON_HTOT_CNTL_VGA_EN;
+        *ppll_ref_div = const_ptr->crtcPLL_M;
+        *ppll_div_3 = (const_ptr->crtcPLL_N & 0x7ff) | (get_post_div(const_ptr->crtcPLL_post_div) << 16);
+        *pixclks_cntl &= ~(RADEON_PIX2CLK_SRC_SEL_MASK | RADEON_PIXCLK_TV_SRC_SEL);
+        *pixclks_cntl |= RADEON_PIX2CLK_SRC_SEL_P2PLLCLK;
+}
+void radeon_legacy_tv_adjust_pll2(struct drm_encoder *encoder,
+                                  uint32_t *htotal2_cntl, uint32_t *p2pll_ref_div,
+                                  uint32_t *p2pll_div_0, uint32_t *pixclks_cntl)
+{
+        struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
+        const struct radeon_tv_mode_constants *const_ptr;
+        const_ptr = radeon_legacy_tv_get_std_mode(radeon_encoder, NULL);
+        if (!const_ptr)
+                return;
+        *htotal2_cntl = (const_ptr->hor_total & 0x7);
+        *p2pll_ref_div = const_ptr->crtcPLL_M;
+        *p2pll_div_0 = (const_ptr->crtcPLL_N & 0x7ff) | (get_post_div(const_ptr->crtcPLL_post_div) << 16);
+        *pixclks_cntl &= ~RADEON_PIX2CLK_SRC_SEL_MASK;
+        *pixclks_cntl |= RADEON_PIX2CLK_SRC_SEL_P2PLLCLK | RADEON_PIXCLK_TV_SRC_SEL;
+}
diff --git a/drivers/gpu/drm/radeon/radeon_microcode.h b/drivers/gpu/drm/radeon/radeon_microcode.h
deleted file mode 100644
index a348c9e7db1c..000000000000
--- a/drivers/gpu/drm/radeon/radeon_microcode.h
+++ /dev/null
@@ -1,1844 +0,0 @@
-/*
- * Copyright 2007 Advanced Micro Devices, Inc.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
- * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
- * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
- * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
- */
-#ifndef RADEON_MICROCODE_H
-#define RADEON_MICROCODE_H
-/* production radeon ucode r1xx-r6xx */
-static const u32 R100_cp_microcode[][2] = {
-    { 0x21007000, 0000000000 },
-    { 0x20007000, 0000000000 },
-    { 0x000000b4, 0x00000004 },
-    { 0x000000b8, 0x00000004 },
-    { 0x6f5b4d4c, 0000000000 },
-    { 0x4c4c427f, 0000000000 },
-    { 0x5b568a92, 0000000000 },
-    { 0x4ca09c6d, 0000000000 },
-    { 0xad4c4c4c, 0000000000 },
-    { 0x4ce1af3d, 0000000000 },
-    { 0xd8afafaf, 0000000000 },
-    { 0xd64c4cdc, 0000000000 },
-    { 0x4cd10d10, 0000000000 },
-    { 0x000f0000, 0x00000016 },
-    { 0x362f242d, 0000000000 },
-    { 0x00000012, 0x00000004 },
-    { 0x000f0000, 0x00000016 },
-    { 0x362f282d, 0000000000 },
-    { 0x000380e7, 0x00000002 },
-    { 0x04002c97, 0x00000002 },
-    { 0x000f0001, 0x00000016 },
-    { 0x333a3730, 0000000000 },
-    { 0x000077ef, 0x00000002 },
-    { 0x00061000, 0x00000002 },
-    { 0x00000021, 0x0000001a },
-    { 0x00004000, 0x0000001e },
-    { 0x00061000, 0x00000002 },
-    { 0x00000021, 0x0000001a },
-    { 0x00004000, 0x0000001e },
-    { 0x00061000, 0x00000002 },
-    { 0x00000021, 0x0000001a },
-    { 0x00004000, 0x0000001e },
-    { 0x00000017, 0x00000004 },
-    { 0x0003802b, 0x00000002 },
-    { 0x040067e0, 0x00000002 },
-    { 0x00000017, 0x00000004 },
-    { 0x000077e0, 0x00000002 },
-    { 0x00065000, 0x00000002 },
-    { 0x000037e1, 0x00000002 },
-    { 0x040067e1, 0x00000006 },
-    { 0x000077e0, 0x00000002 },
-    { 0x000077e1, 0x00000002 },
-    { 0x000077e1, 0x00000006 },
-    { 0xffffffff, 0000000000 },
-    { 0x10000000, 0000000000 },
-    { 0x0003802b, 0x00000002 },
-    { 0x040067e0, 0x00000006 },
-    { 0x00007675, 0x00000002 },
-    { 0x00007676, 0x00000002 },
-    { 0x00007677, 0x00000002 },
-    { 0x00007678, 0x00000006 },
-    { 0x0003802c, 0x00000002 },
-    { 0x04002676, 0x00000002 },
-    { 0x00007677, 0x00000002 },
-    { 0x00007678, 0x00000006 },
-    { 0x0000002f, 0x00000018 },
-    { 0x0000002f, 0x00000018 },
-    { 0000000000, 0x00000006 },
-    { 0x00000030, 0x00000018 },
-    { 0x00000030, 0x00000018 },
-    { 0000000000, 0x00000006 },
-    { 0x01605000, 0x00000002 },
-    { 0x00065000, 0x00000002 },
-    { 0x00098000, 0x00000002 },
-    { 0x00061000, 0x00000002 },
-    { 0x64c0603e, 0x00000004 },
-    { 0x000380e6, 0x00000002 },
-    { 0x040025c5, 0x00000002 },
-    { 0x00080000, 0x00000016 },
-    { 0000000000, 0000000000 },
-    { 0x0400251d, 0x00000002 },
-    { 0x00007580, 0x00000002 },
-    { 0x00067581, 0x00000002 },
-    { 0x04002580, 0x00000002 },
-    { 0x00067581, 0x00000002 },
-    { 0x00000049, 0x00000004 },
-    { 0x00005000, 0000000000 },
-    { 0x000380e6, 0x00000002 },
-    { 0x040025c5, 0x00000002 },
-    { 0x00061000, 0x00000002 },
-    { 0x0000750e, 0x00000002 },
-    { 0x00019000, 0x00000002 },
-    { 0x00011055, 0x00000014 },
-    { 0x00000055, 0x00000012 },
-    { 0x0400250f, 0x00000002 },
-    { 0x0000504f, 0x00000004 },
-    { 0x000380e6, 0x00000002 },
-    { 0x040025c5, 0x00000002 },
-    { 0x00007565, 0x00000002 },
-    { 0x00007566, 0x00000002 },
-    { 0x00000058, 0x00000004 },
-    { 0x000380e6, 0x00000002 },
-    { 0x040025c5, 0x00000002 },
-    { 0x01e655b4, 0x00000002 },
-    { 0x4401b0e4, 0x00000002 },
-    { 0x01c110e4, 0x00000002 },
-    { 0x26667066, 0x00000018 },
-    { 0x040c2565, 0x00000002 },
-    { 0x00000066, 0x00000018 },
-    { 0x04002564, 0x00000002 },
-    { 0x00007566, 0x00000002 },
-    { 0x0000005d, 0x00000004 },
-    { 0x00401069, 0x00000008 },
-    { 0x00101000, 0x00000002 },
-    { 0x000d80ff, 0x00000002 },
-    { 0x0080006c, 0x00000008 },
-    { 0x000f9000, 0x00000002 },
-    { 0x000e00ff, 0x00000002 },
-    { 0000000000, 0x00000006 },
-    { 0x0000008f, 0x00000018 },
-    { 0x0000005b, 0x00000004 },
-    { 0x000380e6, 0x00000002 },
-    { 0x040025c5, 0x00000002 },
-    { 0x00007576, 0x00000002 },
-    { 0x00065000, 0x00000002 },
-    { 0x00009000, 0x00000002 },
-    { 0x00041000, 0x00000002 },
-    { 0x0c00350e, 0x00000002 },
-    { 0x00049000, 0x00000002 },
-    { 0x00051000, 0x00000002 },
-    { 0x01e785f8, 0x00000002 },
-    { 0x00200000, 0x00000002 },
-    { 0x0060007e, 0x0000000c },
-    { 0x00007563, 0x00000002 },
-    { 0x006075f0, 0x00000021 },
-    { 0x20007073, 0x00000004 },
-    { 0x00005073, 0x00000004 },
-    { 0x000380e6, 0x00000002 },
-    { 0x040025c5, 0x00000002 },
-    { 0x00007576, 0x00000002 },
-    { 0x00007577, 0x00000002 },
-    { 0x0000750e, 0x00000002 },
-    { 0x0000750f, 0x00000002 },
-    { 0x00a05000, 0x00000002 },
-    { 0x00600083, 0x0000000c },
-    { 0x006075f0, 0x00000021 },
-    { 0x000075f8, 0x00000002 },
-    { 0x00000083, 0x00000004 },
-    { 0x000a750e, 0x00000002 },
-    { 0x000380e6, 0x00000002 },
-    { 0x040025c5, 0x00000002 },
-    { 0x0020750f, 0x00000002 },
-    { 0x00600086, 0x00000004 },
-    { 0x00007570, 0x00000002 },
-    { 0x00007571, 0x00000002 },
-    { 0x00007572, 0x00000006 },
-    { 0x000380e6, 0x00000002 },
-    { 0x040025c5, 0x00000002 },
-    { 0x00005000, 0x00000002 },
-    { 0x00a05000, 0x00000002 },
-    { 0x00007568, 0x00000002 },
-    { 0x00061000, 0x00000002 },
-    { 0x00000095, 0x0000000c },
-    { 0x00058000, 0x00000002 },
-    { 0x0c607562, 0x00000002 },
-    { 0x00000097, 0x00000004 },
-    { 0x000380e6, 0x00000002 },
-    { 0x040025c5, 0x00000002 },
-    { 0x00600096, 0x00000004 },
-    { 0x400070e5, 0000000000 },
-    { 0x000380e6, 0x00000002 },
-    { 0x040025c5, 0x00000002 },
-    { 0x000380e5, 0x00000002 },
-    { 0x000000a8, 0x0000001c },
-    { 0x000650aa, 0x00000018 },
-    { 0x040025bb, 0x00000002 },
-    { 0x000610ab, 0x00000018 },
-    { 0x040075bc, 0000000000 },
-    { 0x000075bb, 0x00000002 },
-    { 0x000075bc, 0000000000 },
-    { 0x00090000, 0x00000006 },
-    { 0x00090000, 0x00000002 },
-    { 0x000d8002, 0x00000006 },
-    { 0x00007832, 0x00000002 },
-    { 0x00005000, 0x00000002 },
-    { 0x000380e7, 0x00000002 },
-    { 0x04002c97, 0x00000002 },
-    { 0x00007820, 0x00000002 },
-    { 0x00007821, 0x00000002 },
-    { 0x00007800, 0000000000 },
-    { 0x01200000, 0x00000002 },
-    { 0x20077000, 0x00000002 },
-    { 0x01200000, 0x00000002 },
-    { 0x20007000, 0x00000002 },
-    { 0x00061000, 0x00000002 },
-    { 0x0120751b, 0x00000002 },
-    { 0x8040750a, 0x00000002 },
-    { 0x8040750b, 0x00000002 },
-    { 0x00110000, 0x00000002 },
-    { 0x000380e5, 0x00000002 },
-    { 0x000000c6, 0x0000001c },
-    { 0x000610ab, 0x00000018 },
-    { 0x844075bd, 0x00000002 },
-    { 0x000610aa, 0x00000018 },
-    { 0x840075bb, 0x00000002 },
-    { 0x000610ab, 0x00000018 },
-    { 0x844075bc, 0x00000002 },
-    { 0x000000c9, 0x00000004 },
-    { 0x804075bd, 0x00000002 },
-    { 0x800075bb, 0x00000002 },
-    { 0x804075bc, 0x00000002 },
-    { 0x00108000, 0x00000002 },
-    { 0x01400000, 0x00000002 },
-    { 0x006000cd, 0x0000000c },
-    { 0x20c07000, 0x00000020 },
-    { 0x000000cf, 0x00000012 },
-    { 0x00800000, 0x00000006 },
-    { 0x0080751d, 0x00000006 },
-    { 0000000000, 0000000000 },
-    { 0x0000775c, 0x00000002 },
-    { 0x00a05000, 0x00000002 },
-    { 0x00661000, 0x00000002 },
-    { 0x0460275d, 0x00000020 },
-    { 0x00004000, 0000000000 },
-    { 0x01e00830, 0x00000002 },
-    { 0x21007000, 0000000000 },
-    { 0x6464614d, 0000000000 },
-    { 0x69687420, 0000000000 },
-    { 0x00000073, 0000000000 },
-    { 0000000000, 0000000000 },
-    { 0x00005000, 0x00000002 },
-    { 0x000380d0, 0x00000002 },
-    { 0x040025e0, 0x00000002 },
-    { 0x000075e1, 0000000000 },
-    { 0x00000001, 0000000000 },
-    { 0x000380e0, 0x00000002 },
-    { 0x04002394, 0x00000002 },
-    { 0x00005000, 0000000000 },
-    { 0000000000, 0000000000 },
-    { 0000000000, 0000000000 },
-    { 0x00000008, 0000000000 },
-    { 0x00000004, 0000000000 },
-    { 0000000000, 0000000000 },
-    { 0000000000, 0000000000 },
-    { 0000000000, 0000000000 },
-    { 0000000000, 0000000000 },
-    { 0000000000, 0000000000 },
-    { 0000000000, 0000000000 },
-    { 0000000000, 0000000000 },
-    { 0000000000, 0000000000 },
-    { 0000000000, 0000000000 },
-    { 0000000000, 0000000000 },
-    { 0000000000, 0000000000 },
-    { 0000000000, 0000000000 },
-    { 0000000000, 0000000000 },
-    { 0000000000, 0000000000 },
-    { 0000000000, 0000000000 },
-    { 0000000000, 0000000000 },
-    { 0000000000, 0000000000 },
-    { 0000000000, 0000000000 },
-    { 0000000000, 0000000000 },
-    { 0000000000, 0000000000 },
-    { 0000000000, 0000000000 },
-    { 0000000000, 0000000000 },
-    { 0000000000, 0000000000 },
-    { 0000000000, 0000000000 },
-};
-static const u32 R200_cp_microcode[][2] = {
-    { 0x21007000, 0000000000 },
-    { 0x20007000, 0000000000 },
-    { 0x000000bf, 0x00000004 },
-    { 0x000000c3, 0x00000004 },
-    { 0x7a685e5d, 0000000000 },
-    { 0x5d5d5588, 0000000000 },
-    { 0x68659197, 0000000000 },
-    { 0x5da19f78, 0000000000 },
-    { 0x5d5d5d5d, 0000000000 },
-    { 0x5dee5d50, 0000000000 },
-    { 0xf2acacac, 0000000000 },
-    { 0xe75df9e9, 0000000000 },
-    { 0xb1dd0e11, 0000000000 },
-    { 0xe2afafaf, 0000000000 },
-    { 0x000f0000, 0x00000016 },
-    { 0x452f232d, 0000000000 },
-    { 0x00000013, 0x00000004 },
-    { 0x000f0000, 0x00000016 },
-    { 0x452f272d, 0000000000 },
-    { 0x000f0001, 0x00000016 },
-    { 0x3e4d4a37, 0000000000 },
-    { 0x000077ef, 0x00000002 },
-    { 0x00061000, 0x00000002 },
-    { 0x00000020, 0x0000001a },
-    { 0x00004000, 0x0000001e },
-    { 0x00061000, 0x00000002 },
-    { 0x00000020, 0x0000001a },
-    { 0x00004000, 0x0000001e },
-    { 0x00061000, 0x00000002 },
-    { 0x00000020, 0x0000001a },
-    { 0x00004000, 0x0000001e },
-    { 0x00000016, 0x00000004 },
-    { 0x0003802a, 0x00000002 },
-    { 0x040067e0, 0x00000002 },
-    { 0x00000016, 0x00000004 },
-    { 0x000077e0, 0x00000002 },
-    { 0x00065000, 0x00000002 },
-    { 0x000037e1, 0x00000002 },
-    { 0x040067e1, 0x00000006 },
-    { 0x000077e0, 0x00000002 },
-    { 0x000077e1, 0x00000002 },
-    { 0x000077e1, 0x00000006 },
-    { 0xffffffff, 0000000000 },
-    { 0x10000000, 0000000000 },
-    { 0x07f007f0, 0000000000 },
-    { 0x0003802a, 0x00000002 },
-    { 0x040067e0, 0x00000006 },
-    { 0x0003802c, 0x00000002 },
-    { 0x04002741, 0x00000002 },
-    { 0x04002741, 0x00000002 },
-    { 0x04002743, 0x00000002 },
-    { 0x00007675, 0x00000002 },
-    { 0x00007676, 0x00000002 },
-    { 0x00007677, 0x00000002 },
-    { 0x00007678, 0x00000006 },
-    { 0x0003802c, 0x00000002 },
-    { 0x04002741, 0x00000002 },
-    { 0x04002741, 0x00000002 },
-    { 0x04002743, 0x00000002 },
-    { 0x00007676, 0x00000002 },
-    { 0x00007677, 0x00000002 },
-    { 0x00007678, 0x00000006 },
-    { 0x0003802b, 0x00000002 },
-    { 0x04002676, 0x00000002 },
-    { 0x00007677, 0x00000002 },
-    { 0x0003802c, 0x00000002 },
-    { 0x04002741, 0x00000002 },
-    { 0x04002743, 0x00000002 },
-    { 0x00007678, 0x00000006 },
-    { 0x0003802c, 0x00000002 },
-    { 0x04002741, 0x00000002 },
-    { 0x04002741, 0x00000002 },
-    { 0x04002743, 0x00000002 },
-    { 0x00007678, 0x00000006 },
-    { 0x0000002f, 0x00000018 },
-    { 0x0000002f, 0x00000018 },
-    { 0000000000, 0x00000006 },
-    { 0x00000037, 0x00000018 },
-    { 0x00000037, 0x00000018 },
-    { 0000000000, 0x00000006 },
-    { 0x01605000, 0x00000002 },
-    { 0x00065000, 0x00000002 },
-    { 0x00098000, 0x00000002 },
-    { 0x00061000, 0x00000002 },
-    { 0x64c06051, 0x00000004 },
-    { 0x00080000, 0x00000016 },
-    { 0000000000, 0000000000 },
-    { 0x0400251d, 0x00000002 },
-    { 0x00007580, 0x00000002 },
-    { 0x00067581, 0x00000002 },
-    { 0x04002580, 0x00000002 },
-    { 0x00067581, 0x00000002 },
-    { 0x0000005a, 0x00000004 },
-    { 0x00005000, 0000000000 },
-    { 0x00061000, 0x00000002 },
-    { 0x0000750e, 0x00000002 },
-    { 0x00019000, 0x00000002 },
-    { 0x00011064, 0x00000014 },
-    { 0x00000064, 0x00000012 },
-    { 0x0400250f, 0x00000002 },
-    { 0x0000505e, 0x00000004 },
-    { 0x00007565, 0x00000002 },
-    { 0x00007566, 0x00000002 },
-    { 0x00000065, 0x00000004 },
-    { 0x01e655b4, 0x00000002 },
-    { 0x4401b0f0, 0x00000002 },
-    { 0x01c110f0, 0x00000002 },
-    { 0x26667071, 0x00000018 },
-    { 0x040c2565, 0x00000002 },
-    { 0x00000071, 0x00000018 },
-    { 0x04002564, 0x00000002 },
-    { 0x00007566, 0x00000002 },
-    { 0x00000068, 0x00000004 },
-    { 0x00401074, 0x00000008 },
-    { 0x00101000, 0x00000002 },
-    { 0x000d80ff, 0x00000002 },
-    { 0x00800077, 0x00000008 },
-    { 0x000f9000, 0x00000002 },
-    { 0x000e00ff, 0x00000002 },
-    { 0000000000, 0x00000006 },
-    { 0x00000094, 0x00000018 },
-    { 0x00000068, 0x00000004 },
-    { 0x00007576, 0x00000002 },
-    { 0x00065000, 0x00000002 },
-    { 0x00009000, 0x00000002 },
-    { 0x00041000, 0x00000002 },
-    { 0x0c00350e, 0x00000002 },
-    { 0x00049000, 0x00000002 },
-    { 0x00051000, 0x00000002 },
-    { 0x01e785f8, 0x00000002 },
-    { 0x00200000, 0x00000002 },
-    { 0x00600087, 0x0000000c },
-    { 0x00007563, 0x00000002 },
-    { 0x006075f0, 0x00000021 },
-    { 0x2000707c, 0x00000004 },
-    { 0x0000507c, 0x00000004 },
-    { 0x00007576, 0x00000002 },
-    { 0x00007577, 0x00000002 },
-    { 0x0000750e, 0x00000002 },
-    { 0x0000750f, 0x00000002 },
-    { 0x00a05000, 0x00000002 },
-    { 0x0060008a, 0x0000000c },
-    { 0x006075f0, 0x00000021 },
-    { 0x000075f8, 0x00000002 },
-    { 0x0000008a, 0x00000004 },
-    { 0x000a750e, 0x00000002 },
-    { 0x0020750f, 0x00000002 },
-    { 0x0060008d, 0x00000004 },
-    { 0x00007570, 0x00000002 },
-    { 0x00007571, 0x00000002 },
-    { 0x00007572, 0x00000006 },
-    { 0x00005000, 0x00000002 },
-    { 0x00a05000, 0x00000002 },
-    { 0x00007568, 0x00000002 },
-    { 0x00061000, 0x00000002 },
-    { 0x00000098, 0x0000000c },
-    { 0x00058000, 0x00000002 },
-    { 0x0c607562, 0x00000002 },
-    { 0x0000009a, 0x00000004 },
-    { 0x00600099, 0x00000004 },
-    { 0x400070f1, 0000000000 },
-    { 0x000380f1, 0x00000002 },
-    { 0x000000a7, 0x0000001c },
-    { 0x000650a9, 0x00000018 },
-    { 0x040025bb, 0x00000002 },
-    { 0x000610aa, 0x00000018 },
-    { 0x040075bc, 0000000000 },
-    { 0x000075bb, 0x00000002 },
-    { 0x000075bc, 0000000000 },
-    { 0x00090000, 0x00000006 },
-    { 0x00090000, 0x00000002 },
-    { 0x000d8002, 0x00000006 },
-    { 0x00005000, 0x00000002 },
-    { 0x00007821, 0x00000002 },
-    { 0x00007800, 0000000000 },
-    { 0x00007821, 0x00000002 },
-    { 0x00007800, 0000000000 },
-    { 0x01665000, 0x00000002 },
-    { 0x000a0000, 0x00000002 },
-    { 0x000671cc, 0x00000002 },
-    { 0x0286f1cd, 0x00000002 },
-    { 0x000000b7, 0x00000010 },
-    { 0x21007000, 0000000000 },
-    { 0x000000be, 0x0000001c },
-    { 0x00065000, 0x00000002 },
-    { 0x000a0000, 0x00000002 },
-    { 0x00061000, 0x00000002 },
-    { 0x000b0000, 0x00000002 },
-    { 0x38067000, 0x00000002 },
-    { 0x000a00ba, 0x00000004 },
-    { 0x20007000, 0000000000 },
-    { 0x01200000, 0x00000002 },
-    { 0x20077000, 0x00000002 },
-    { 0x01200000, 0x00000002 },
-    { 0x20007000, 0000000000 },
-    { 0x00061000, 0x00000002 },
-    { 0x0120751b, 0x00000002 },
-    { 0x8040750a, 0x00000002 },
-    { 0x8040750b, 0x00000002 },
-    { 0x00110000, 0x00000002 },
-    { 0x000380f1, 0x00000002 },
-    { 0x000000d1, 0x0000001c },
-    { 0x000610aa, 0x00000018 },
-    { 0x844075bd, 0x00000002 },
-    { 0x000610a9, 0x00000018 },
-    { 0x840075bb, 0x00000002 },
-    { 0x000610aa, 0x00000018 },
-    { 0x844075bc, 0x00000002 },
-    { 0x000000d4, 0x00000004 },
-    { 0x804075bd, 0x00000002 },
-    { 0x800075bb, 0x00000002 },
-    { 0x804075bc, 0x00000002 },
-    { 0x00108000, 0x00000002 },
-    { 0x01400000, 0x00000002 },
-    { 0x006000d8, 0x0000000c },
-    { 0x20c07000, 0x00000020 },
-    { 0x000000da, 0x00000012 },
-    { 0x00800000, 0x00000006 },
-    { 0x0080751d, 0x00000006 },
-    { 0x000025bb, 0x00000002 },
-    { 0x000040d4, 0x00000004 },
-    { 0x0000775c, 0x00000002 },
-    { 0x00a05000, 0x00000002 },
-    { 0x00661000, 0x00000002 },
-    { 0x0460275d, 0x00000020 },
-    { 0x00004000, 0000000000 },
-    { 0x00007999, 0x00000002 },
-    { 0x00a05000, 0x00000002 },
-    { 0x00661000, 0x00000002 },
-    { 0x0460299b, 0x00000020 },
-    { 0x00004000, 0000000000 },
-    { 0x01e00830, 0x00000002 },
-    { 0x21007000, 0000000000 },
-    { 0x00005000, 0x00000002 },
-    { 0x00038056, 0x00000002 },
-    { 0x040025e0, 0x00000002 },
-    { 0x000075e1, 0000000000 },
-    { 0x00000001, 0000000000 },
-    { 0x000380ed, 0x00000002 },
-    { 0x04007394, 0000000000 },
-    { 0000000000, 0000000000 },
-    { 0000000000, 0000000000 },
-    { 0x000078c4, 0x00000002 },
-    { 0x000078c5, 0x00000002 },
-    { 0x000078c6, 0x00000002 },
-    { 0x00007924, 0x00000002 },
-    { 0x00007925, 0x00000002 },
-    { 0x00007926, 0x00000002 },
-    { 0x000000f2, 0x00000004 },
-    { 0x00007924, 0x00000002 },
-    { 0x00007925, 0x00000002 },
-    { 0x00007926, 0x00000002 },
-    { 0x000000f9, 0x00000004 },
-    { 0000000000, 0000000000 },
-    { 0000000000, 0000000000 },
-    { 0000000000, 0000000000 },
-};
-static const u32 R300_cp_microcode[][2] = {
-    { 0x4200e000, 0000000000 },
-    { 0x4000e000, 0000000000 },
-    { 0x000000ae, 0x00000008 },
-    { 0x000000b2, 0x00000008 },
-    { 0x67554b4a, 0000000000 },
-    { 0x4a4a4475, 0000000000 },
-    { 0x55527d83, 0000000000 },
-    { 0x4a8c8b65, 0000000000 },
-    { 0x4aef4af6, 0000000000 },
-    { 0x4ae14a4a, 0000000000 },
-    { 0xe4979797, 0000000000 },
-    { 0xdb4aebdd, 0000000000 },
-    { 0x9ccc4a4a, 0000000000 },
-    { 0xd1989898, 0000000000 },
-    { 0x4a0f9ad6, 0000000000 },
-    { 0x000ca000, 0x00000004 },
-    { 0x000d0012, 0x00000038 },
-    { 0x0000e8b4, 0x00000004 },
-    { 0x000d0014, 0x00000038 },
-    { 0x0000e8b6, 0x00000004 },
-    { 0x000d0016, 0x00000038 },
-    { 0x0000e854, 0x00000004 },
-    { 0x000d0018, 0x00000038 },
-    { 0x0000e855, 0x00000004 },
-    { 0x000d001a, 0x00000038 },
-    { 0x0000e856, 0x00000004 },
-    { 0x000d001c, 0x00000038 },
-    { 0x0000e857, 0x00000004 },
-    { 0x000d001e, 0x00000038 },
-    { 0x0000e824, 0x00000004 },
-    { 0x000d0020, 0x00000038 },
-    { 0x0000e825, 0x00000004 },
-    { 0x000d0022, 0x00000038 },
-    { 0x0000e830, 0x00000004 },
-    { 0x000d0024, 0x00000038 },
-    { 0x0000f0c0, 0x00000004 },
-    { 0x000d0026, 0x00000038 },
-    { 0x0000f0c1, 0x00000004 },
-    { 0x000d0028, 0x00000038 },
-    { 0x0000f041, 0x00000004 },
-    { 0x000d002a, 0x00000038 },
-    { 0x0000f184, 0x00000004 },
-    { 0x000d002c, 0x00000038 },
-    { 0x0000f185, 0x00000004 },
-    { 0x000d002e, 0x00000038 },
-    { 0x0000f186, 0x00000004 },
-    { 0x000d0030, 0x00000038 },
-    { 0x0000f187, 0x00000004 },
-    { 0x000d0032, 0x00000038 },
-    { 0x0000f180, 0x00000004 },
-    { 0x000d0034, 0x00000038 },
-    { 0x0000f393, 0x00000004 },
-    { 0x000d0036, 0x00000038 },
-    { 0x0000f38a, 0x00000004 },
-    { 0x000d0038, 0x00000038 },
-    { 0x0000f38e, 0x00000004 },
-    { 0x0000e821, 0x00000004 },
-    { 0x0140a000, 0x00000004 },
-    { 0x00000043, 0x00000018 },
-    { 0x00cce800, 0x00000004 },
-    { 0x001b0001, 0x00000004 },
-    { 0x08004800, 0x00000004 },
-    { 0x001b0001, 0x00000004 },
-    { 0x08004800, 0x00000004 },
-    { 0x001b0001, 0x00000004 },
-    { 0x08004800, 0x00000004 },
-    { 0x0000003a, 0x00000008 },
-    { 0x0000a000, 0000000000 },
-    { 0x2000451d, 0x00000004 },
-    { 0x0000e580, 0x00000004 },
-    { 0x000ce581, 0x00000004 },
-    { 0x08004580, 0x00000004 },
-    { 0x000ce581, 0x00000004 },
-    { 0x00000047, 0x00000008 },
-    { 0x0000a000, 0000000000 },
-    { 0x000c2000, 0x00000004 },
-    { 0x0000e50e, 0x00000004 },
-    { 0x00032000, 0x00000004 },
-    { 0x00022051, 0x00000028 },
-    { 0x00000051, 0x00000024 },
-    { 0x0800450f, 0x00000004 },
-    { 0x0000a04b, 0x00000008 },
-    { 0x0000e565, 0x00000004 },
-    { 0x0000e566, 0x00000004 },
-    { 0x00000052, 0x00000008 },
-    { 0x03cca5b4, 0x00000004 },
-    { 0x05432000, 0x00000004 },
-    { 0x00022000, 0x00000004 },
-    { 0x4ccce05e, 0x00000030 },
-    { 0x08274565, 0x00000004 },
-    { 0x0000005e, 0x00000030 },
-    { 0x08004564, 0x00000004 },
-    { 0x0000e566, 0x00000004 },
-    { 0x00000055, 0x00000008 },
-    { 0x00802061, 0x00000010 },
-    { 0x00202000, 0x00000004 },
-    { 0x001b00ff, 0x00000004 },
-    { 0x01000064, 0x00000010 },
-    { 0x001f2000, 0x00000004 },
-    { 0x001c00ff, 0x00000004 },
-    { 0000000000, 0x0000000c },
-    { 0x00000080, 0x00000030 },
-    { 0x00000055, 0x00000008 },
-    { 0x0000e576, 0x00000004 },
-    { 0x000ca000, 0x00000004 },
-    { 0x00012000, 0x00000004 },
-    { 0x00082000, 0x00000004 },
-    { 0x1800650e, 0x00000004 },
-    { 0x00092000, 0x00000004 },
-    { 0x000a2000, 0x00000004 },
-    { 0x000f0000, 0x00000004 },
-    { 0x00400000, 0x00000004 },
-    { 0x00000074, 0x00000018 },
-    { 0x0000e563, 0x00000004 },
-    { 0x00c0e5f9, 0x000000c2 },
-    { 0x00000069, 0x00000008 },
-    { 0x0000a069, 0x00000008 },
-    { 0x0000e576, 0x00000004 },
-    { 0x0000e577, 0x00000004 },
-    { 0x0000e50e, 0x00000004 },
-    { 0x0000e50f, 0x00000004 },
-    { 0x0140a000, 0x00000004 },
-    { 0x00000077, 0x00000018 },
-    { 0x00c0e5f9, 0x000000c2 },
-    { 0x00000077, 0x00000008 },
-    { 0x0014e50e, 0x00000004 },
-    { 0x0040e50f, 0x00000004 },
-    { 0x00c0007a, 0x00000008 },
-    { 0x0000e570, 0x00000004 },
-    { 0x0000e571, 0x00000004 },
-    { 0x0000e572, 0x0000000c },
-    { 0x0000a000, 0x00000004 },
-    { 0x0140a000, 0x00000004 },
-    { 0x0000e568, 0x00000004 },
-    { 0x000c2000, 0x00000004 },
-    { 0x00000084, 0x00000018 },
-    { 0x000b0000, 0x00000004 },
-    { 0x18c0e562, 0x00000004 },
-    { 0x00000086, 0x00000008 },
-    { 0x00c00085, 0x00000008 },
-    { 0x000700e3, 0x00000004 },
-    { 0x00000092, 0x00000038 },
-    { 0x000ca094, 0x00000030 },
-    { 0x080045bb, 0x00000004 },
-    { 0x000c2095, 0x00000030 },
-    { 0x0800e5bc, 0000000000 },
-    { 0x0000e5bb, 0x00000004 },
-    { 0x0000e5bc, 0000000000 },
-    { 0x00120000, 0x0000000c },
-    { 0x00120000, 0x00000004 },
-    { 0x001b0002, 0x0000000c },
-    { 0x0000a000, 0x00000004 },
-    { 0x0000e821, 0x00000004 },
-    { 0x0000e800, 0000000000 },
-    { 0x0000e821, 0x00000004 },
-    { 0x0000e82e, 0000000000 },
-    { 0x02cca000, 0x00000004 },
-    { 0x00140000, 0x00000004 },
-    { 0x000ce1cc, 0x00000004 },
-    { 0x050de1cd, 0x00000004 },
-    { 0x00400000, 0x00000004 },
-    { 0x000000a4, 0x00000018 },
-    { 0x00c0a000, 0x00000004 },
-    { 0x000000a1, 0x00000008 },
-    { 0x000000a6, 0x00000020 },
-    { 0x4200e000, 0000000000 },
-    { 0x000000ad, 0x00000038 },
-    { 0x000ca000, 0x00000004 },
-    { 0x00140000, 0x00000004 },
-    { 0x000c2000, 0x00000004 },
-    { 0x00160000, 0x00000004 },
-    { 0x700ce000, 0x00000004 },
-    { 0x001400a9, 0x00000008 },
-    { 0x4000e000, 0000000000 },
-    { 0x02400000, 0x00000004 },
-    { 0x400ee000, 0x00000004 },
-    { 0x02400000, 0x00000004 },
-    { 0x4000e000, 0000000000 },
-    { 0x000c2000, 0x00000004 },
-    { 0x0240e51b, 0x00000004 },
-    { 0x0080e50a, 0x00000005 },
-    { 0x0080e50b, 0x00000005 },
-    { 0x00220000, 0x00000004 },
-    { 0x000700e3, 0x00000004 },
-    { 0x000000c0, 0x00000038 },
-    { 0x000c2095, 0x00000030 },
-    { 0x0880e5bd, 0x00000005 },
-    { 0x000c2094, 0x00000030 },
-    { 0x0800e5bb, 0x00000005 },
-    { 0x000c2095, 0x00000030 },
-    { 0x0880e5bc, 0x00000005 },
-    { 0x000000c3, 0x00000008 },
-    { 0x0080e5bd, 0x00000005 },
-    { 0x0000e5bb, 0x00000005 },
-    { 0x0080e5bc, 0x00000005 },
-    { 0x00210000, 0x00000004 },
-    { 0x02800000, 0x00000004 },
-    { 0x00c000c7, 0x00000018 },
-    { 0x4180e000, 0x00000040 },
-    { 0x000000c9, 0x00000024 },
-    { 0x01000000, 0x0000000c },
-    { 0x0100e51d, 0x0000000c },
-    { 0x000045bb, 0x00000004 },
-    { 0x000080c3, 0x00000008 },
-    { 0x0000f3ce, 0x00000004 },
-    { 0x0140a000, 0x00000004 },
-    { 0x00cc2000, 0x00000004 },
-    { 0x08c053cf, 0x00000040 },
-    { 0x00008000, 0000000000 },
-    { 0x0000f3d2, 0x00000004 },
-    { 0x0140a000, 0x00000004 },
-    { 0x00cc2000, 0x00000004 },
-    { 0x08c053d3, 0x00000040 },
-    { 0x00008000, 0000000000 },
-    { 0x0000f39d, 0x00000004 },
-    { 0x0140a000, 0x00000004 },
-    { 0x00cc2000, 0x00000004 },
-    { 0x08c0539e, 0x00000040 },
-    { 0x00008000, 0000000000 },
-    { 0x03c00830, 0x00000004 },
-    { 0x4200e000, 0000000000 },
-    { 0x0000a000, 0x00000004 },
-    { 0x200045e0, 0x00000004 },
-    { 0x0000e5e1, 0000000000 },
-    { 0x00000001, 0000000000 },
-    { 0x000700e0, 0x00000004 },
-    { 0x0800e394, 0000000000 },
-    { 0000000000, 0000000000 },
-    { 0x0000e8c4, 0x00000004 },
-    { 0x0000e8c5, 0x00000004 },
-    { 0x0000e8c6, 0x00000004 },
-    { 0x0000e928, 0x00000004 },
-    { 0x0000e929, 0x00000004 },
-    { 0x0000e92a, 0x00000004 },
-    { 0x000000e4, 0x00000008 },
-    { 0x0000e928, 0x00000004 },
-    { 0x0000e929, 0x00000004 },
-    { 0x0000e92a, 0x00000004 },
-    { 0x000000eb, 0x00000008 },
-    { 0x02c02000, 0x00000004 },
-    { 0x00060000, 0x00000004 },
-    { 0x000000f3, 0x00000034 },
-    { 0x000000f0, 0x00000008 },
-    { 0x00008000, 0x00000004 },
-    { 0xc000e000, 0000000000 },
-    { 0000000000, 0000000000 },
-    { 0x000c2000, 0x00000004 },
-    { 0x001d0018, 0x00000004 },
-    { 0x001a0001, 0x00000004 },
-    { 0x000000fb, 0x00000034 },
-    { 0x0000004a, 0x00000008 },
-    { 0x0500a04a, 0x00000008 },
-    { 0000000000, 0000000000 },
-    { 0000000000, 0000000000 },
-    { 0000000000, 0000000000 },
-    { 0000000000, 0000000000 },
-};
-static const u32 R420_cp_microcode[][2] = {
-    { 0x4200e000, 0000000000 },
-    { 0x4000e000, 0000000000 },
-    { 0x00000099, 0x00000008 },
-    { 0x0000009d, 0x00000008 },
-    { 0x4a554b4a, 0000000000 },
-    { 0x4a4a4467, 0000000000 },
-    { 0x55526f75, 0000000000 },
-    { 0x4a7e7d65, 0000000000 },
-    { 0xd9d3dff6, 0000000000 },
-    { 0x4ac54a4a, 0000000000 },
-    { 0xc8828282, 0000000000 },
-    { 0xbf4acfc1, 0000000000 },
-    { 0x87b04a4a, 0000000000 },
-    { 0xb5838383, 0000000000 },
-    { 0x4a0f85ba, 0000000000 },
-    { 0x000ca000, 0x00000004 },
-    { 0x000d0012, 0x00000038 },
-    { 0x0000e8b4, 0x00000004 },
-    { 0x000d0014, 0x00000038 },
-    { 0x0000e8b6, 0x00000004 },
-    { 0x000d0016, 0x00000038 },
-    { 0x0000e854, 0x00000004 },
-    { 0x000d0018, 0x00000038 },
-    { 0x0000e855, 0x00000004 },
-    { 0x000d001a, 0x00000038 },
-    { 0x0000e856, 0x00000004 },
-    { 0x000d001c, 0x00000038 },
-    { 0x0000e857, 0x00000004 },
-    { 0x000d001e, 0x00000038 },
-    { 0x0000e824, 0x00000004 },
-    { 0x000d0020, 0x00000038 },
-    { 0x0000e825, 0x00000004 },
-    { 0x000d0022, 0x00000038 },
-    { 0x0000e830, 0x00000004 },
-    { 0x000d0024, 0x00000038 },
-    { 0x0000f0c0, 0x00000004 },
-    { 0x000d0026, 0x00000038 },
-    { 0x0000f0c1, 0x00000004 },
-    { 0x000d0028, 0x00000038 },
-    { 0x0000f041, 0x00000004 },
-    { 0x000d002a, 0x00000038 },
-    { 0x0000f184, 0x00000004 },
-    { 0x000d002c, 0x00000038 },
-    { 0x0000f185, 0x00000004 },
-    { 0x000d002e, 0x00000038 },
-    { 0x0000f186, 0x00000004 },
-    { 0x000d0030, 0x00000038 },
-    { 0x0000f187, 0x00000004 },
-    { 0x000d0032, 0x00000038 },
-    { 0x0000f180, 0x00000004 },
-    { 0x000d0034, 0x00000038 },
-    { 0x0000f393, 0x00000004 },
-    { 0x000d0036, 0x00000038 },
-    { 0x0000f38a, 0x00000004 },
-    { 0x000d0038, 0x00000038 },
-    { 0x0000f38e, 0x00000004 },
-    { 0x0000e821, 0x00000004 },
-    { 0x0140a000, 0x00000004 },
-    { 0x00000043, 0x00000018 },
-    { 0x00cce800, 0x00000004 },
-    { 0x001b0001, 0x00000004 },
-    { 0x08004800, 0x00000004 },
-    { 0x001b0001, 0x00000004 },
-    { 0x08004800, 0x00000004 },
-    { 0x001b0001, 0x00000004 },
-    { 0x08004800, 0x00000004 },
-    { 0x0000003a, 0x00000008 },
-    { 0x0000a000, 0000000000 },
-    { 0x2000451d, 0x00000004 },
-    { 0x0000e580, 0x00000004 },
-    { 0x000ce581, 0x00000004 },
-    { 0x08004580, 0x00000004 },
-    { 0x000ce581, 0x00000004 },
-    { 0x00000047, 0x00000008 },
-    { 0x0000a000, 0000000000 },
-    { 0x000c2000, 0x00000004 },
-    { 0x0000e50e, 0x00000004 },
-    { 0x00032000, 0x00000004 },
-    { 0x00022051, 0x00000028 },
-    { 0x00000051, 0x00000024 },
-    { 0x0800450f, 0x00000004 },
-    { 0x0000a04b, 0x00000008 },
-    { 0x0000e565, 0x00000004 },
-    { 0x0000e566, 0x00000004 },
-    { 0x00000052, 0x00000008 },
-    { 0x03cca5b4, 0x00000004 },
-    { 0x05432000, 0x00000004 },
-    { 0x00022000, 0x00000004 },
-    { 0x4ccce05e, 0x00000030 },
-    { 0x08274565, 0x00000004 },
-    { 0x0000005e, 0x00000030 },
-    { 0x08004564, 0x00000004 },
-    { 0x0000e566, 0x00000004 },
-    { 0x00000055, 0x00000008 },
-    { 0x00802061, 0x00000010 },
-    { 0x00202000, 0x00000004 },
-    { 0x001b00ff, 0x00000004 },
-    { 0x01000064, 0x00000010 },
-    { 0x001f2000, 0x00000004 },
-    { 0x001c00ff, 0x00000004 },
-    { 0000000000, 0x0000000c },
-    { 0x00000072, 0x00000030 },
-    { 0x00000055, 0x00000008 },
-    { 0x0000e576, 0x00000004 },
-    { 0x0000e577, 0x00000004 },
-    { 0x0000e50e, 0x00000004 },
-    { 0x0000e50f, 0x00000004 },
-    { 0x0140a000, 0x00000004 },
-    { 0x00000069, 0x00000018 },
-    { 0x00c0e5f9, 0x000000c2 },
-    { 0x00000069, 0x00000008 },
-    { 0x0014e50e, 0x00000004 },
-    { 0x0040e50f, 0x00000004 },
-    { 0x00c0006c, 0x00000008 },
-    { 0x0000e570, 0x00000004 },
-    { 0x0000e571, 0x00000004 },
-    { 0x0000e572, 0x0000000c },
-    { 0x0000a000, 0x00000004 },
-    { 0x0140a000, 0x00000004 },
-    { 0x0000e568, 0x00000004 },
-    { 0x000c2000, 0x00000004 },
-    { 0x00000076, 0x00000018 },
-    { 0x000b0000, 0x00000004 },
-    { 0x18c0e562, 0x00000004 },
-    { 0x00000078, 0x00000008 },
-    { 0x00c00077, 0x00000008 },
-    { 0x000700c7, 0x00000004 },
-    { 0x00000080, 0x00000038 },
-    { 0x0000e5bb, 0x00000004 },
-    { 0x0000e5bc, 0000000000 },
-    { 0x0000a000, 0x00000004 },
-    { 0x0000e821, 0x00000004 },
-    { 0x0000e800, 0000000000 },
-    { 0x0000e821, 0x00000004 },
-    { 0x0000e82e, 0000000000 },
-    { 0x02cca000, 0x00000004 },
-    { 0x00140000, 0x00000004 },
-    { 0x000ce1cc, 0x00000004 },
-    { 0x050de1cd, 0x00000004 },
-    { 0x00400000, 0x00000004 },
-    { 0x0000008f, 0x00000018 },
-    { 0x00c0a000, 0x00000004 },
-    { 0x0000008c, 0x00000008 },
-    { 0x00000091, 0x00000020 },
-    { 0x4200e000, 0000000000 },
-    { 0x00000098, 0x00000038 },
-    { 0x000ca000, 0x00000004 },
-    { 0x00140000, 0x00000004 },
-    { 0x000c2000, 0x00000004 },
-    { 0x00160000, 0x00000004 },
-    { 0x700ce000, 0x00000004 },
-    { 0x00140094, 0x00000008 },
-    { 0x4000e000, 0000000000 },
-    { 0x02400000, 0x00000004 },
-    { 0x400ee000, 0x00000004 },
-    { 0x02400000, 0x00000004 },
-    { 0x4000e000, 0000000000 },
-    { 0x000c2000, 0x00000004 },
-    { 0x0240e51b, 0x00000004 },
-    { 0x0080e50a, 0x00000005 },
-    { 0x0080e50b, 0x00000005 },
-    { 0x00220000, 0x00000004 },
-    { 0x000700c7, 0x00000004 },
-    { 0x000000a4, 0x00000038 },
-    { 0x0080e5bd, 0x00000005 },
-    { 0x0000e5bb, 0x00000005 },
-    { 0x0080e5bc, 0x00000005 },
-    { 0x00210000, 0x00000004 },
-    { 0x02800000, 0x00000004 },
-    { 0x00c000ab, 0x00000018 },
-    { 0x4180e000, 0x00000040 },
-    { 0x000000ad, 0x00000024 },
-    { 0x01000000, 0x0000000c },
-    { 0x0100e51d, 0x0000000c },
-    { 0x000045bb, 0x00000004 },
-    { 0x000080a7, 0x00000008 },
-    { 0x0000f3ce, 0x00000004 },
-    { 0x0140a000, 0x00000004 },
-    { 0x00cc2000, 0x00000004 },
-    { 0x08c053cf, 0x00000040 },
-    { 0x00008000, 0000000000 },
-    { 0x0000f3d2, 0x00000004 },
-    { 0x0140a000, 0x00000004 },
-    { 0x00cc2000, 0x00000004 },
-    { 0x08c053d3, 0x00000040 },
-    { 0x00008000, 0000000000 },
-    { 0x0000f39d, 0x00000004 },
-    { 0x0140a000, 0x00000004 },
-    { 0x00cc2000, 0x00000004 },
-    { 0x08c0539e, 0x00000040 },
-    { 0x00008000, 0000000000 },
-    { 0x03c00830, 0x00000004 },
-    { 0x4200e000, 0000000000 },
-    { 0x0000a000, 0x00000004 },
-    { 0x200045e0, 0x00000004 },
-    { 0x0000e5e1, 0000000000 },
-    { 0x00000001, 0000000000 },
-    { 0x000700c4, 0x00000004 },
-    { 0x0800e394, 0000000000 },
-    { 0000000000, 0000000000 },
-    { 0x0000e8c4, 0x00000004 },
-    { 0x0000e8c5, 0x00000004 },
-    { 0x0000e8c6, 0x00000004 },
-    { 0x0000e928, 0x00000004 },
-    { 0x0000e929, 0x00000004 },
-    { 0x0000e92a, 0x00000004 },
-    { 0x000000c8, 0x00000008 },
-    { 0x0000e928, 0x00000004 },
-    { 0x0000e929, 0x00000004 },
-    { 0x0000e92a, 0x00000004 },
-    { 0x000000cf, 0x00000008 },
-    { 0x02c02000, 0x00000004 },
-    { 0x00060000, 0x00000004 },
-    { 0x000000d7, 0x00000034 },
-    { 0x000000d4, 0x00000008 },
-    { 0x00008000, 0x00000004 },
-    { 0xc000e000, 0000000000 },
-    { 0x0000e1cc, 0x00000004 },
-    { 0x0500e1cd, 0x00000004 },
-    { 0x000ca000, 0x00000004 },
-    { 0x000000de, 0x00000034 },
-    { 0x000000da, 0x00000008 },
-    { 0x0000a000, 0000000000 },
-    { 0x0019e1cc, 0x00000004 },
-    { 0x001b0001, 0x00000004 },
-    { 0x0500a000, 0x00000004 },
-    { 0x080041cd, 0x00000004 },
-    { 0x000ca000, 0x00000004 },
-    { 0x000000fb, 0x00000034 },
-    { 0x0000004a, 0x00000008 },
-    { 0000000000, 0000000000 },
-    { 0000000000, 0000000000 },
-    { 0000000000, 0000000000 },
-    { 0000000000, 0000000000 },
-    { 0000000000, 0000000000 },
-    { 0000000000, 0000000000 },
-    { 0000000000, 0000000000 },
-    { 0000000000, 0000000000 },
-    { 0000000000, 0000000000 },
-    { 0000000000, 0000000000 },
-    { 0000000000, 0000000000 },
-    { 0000000000, 0000000000 },
-    { 0000000000, 0000000000 },
-    { 0000000000, 0000000000 },
-    { 0000000000, 0000000000 },
-    { 0000000000, 0000000000 },
-    { 0x000c2000, 0x00000004 },
-    { 0x001d0018, 0x00000004 },
-    { 0x001a0001, 0x00000004 },
-    { 0x000000fb, 0x00000034 },
-    { 0x0000004a, 0x00000008 },
-    { 0x0500a04a, 0x00000008 },
-    { 0000000000, 0000000000 },
-    { 0000000000, 0000000000 },
-    { 0000000000, 0000000000 },
-    { 0000000000, 0000000000 },
-};
-static const u32 RS600_cp_microcode[][2] = {
-    { 0x4200e000, 0000000000 },
-    { 0x4000e000, 0000000000 },
-    { 0x000000a0, 0x00000008 },
-    { 0x000000a4, 0x00000008 },
-    { 0x4a554b4a, 0000000000 },
-    { 0x4a4a4467, 0000000000 },
-    { 0x55526f75, 0000000000 },
-    { 0x4a7e7d65, 0000000000 },
-    { 0x4ae74af6, 0000000000 },
-    { 0x4ad34a4a, 0000000000 },
-    { 0xd6898989, 0000000000 },
-    { 0xcd4addcf, 0000000000 },
-    { 0x8ebe4ae2, 0000000000 },
-    { 0xc38a8a8a, 0000000000 },
-    { 0x4a0f8cc8, 0000000000 },
-    { 0x000ca000, 0x00000004 },
-    { 0x000d0012, 0x00000038 },
-    { 0x0000e8b4, 0x00000004 },
-    { 0x000d0014, 0x00000038 },
-    { 0x0000e8b6, 0x00000004 },
-    { 0x000d0016, 0x00000038 },
-    { 0x0000e854, 0x00000004 },
-    { 0x000d0018, 0x00000038 },
-    { 0x0000e855, 0x00000004 },
-    { 0x000d001a, 0x00000038 },
-    { 0x0000e856, 0x00000004 },
-    { 0x000d001c, 0x00000038 },
-    { 0x0000e857, 0x00000004 },
-    { 0x000d001e, 0x00000038 },
-    { 0x0000e824, 0x00000004 },
-    { 0x000d0020, 0x00000038 },
-    { 0x0000e825, 0x00000004 },
-    { 0x000d0022, 0x00000038 },
-    { 0x0000e830, 0x00000004 },
-    { 0x000d0024, 0x00000038 },
-    { 0x0000f0c0, 0x00000004 },
-    { 0x000d0026, 0x00000038 },
-    { 0x0000f0c1, 0x00000004 },
-    { 0x000d0028, 0x00000038 },
-    { 0x0000f041, 0x00000004 },
-    { 0x000d002a, 0x00000038 },
-    { 0x0000f184, 0x00000004 },
-    { 0x000d002c, 0x00000038 },
-    { 0x0000f185, 0x00000004 },
-    { 0x000d002e, 0x00000038 },
-    { 0x0000f186, 0x00000004 },
-    { 0x000d0030, 0x00000038 },
-    { 0x0000f187, 0x00000004 },
-    { 0x000d0032, 0x00000038 },
-    { 0x0000f180, 0x00000004 },
-    { 0x000d0034, 0x00000038 },
-    { 0x0000f393, 0x00000004 },
-    { 0x000d0036, 0x00000038 },
-    { 0x0000f38a, 0x00000004 },
-    { 0x000d0038, 0x00000038 },
-    { 0x0000f38e, 0x00000004 },
-    { 0x0000e821, 0x00000004 },
-    { 0x0140a000, 0x00000004 },
-    { 0x00000043, 0x00000018 },
-    { 0x00cce800, 0x00000004 },
-    { 0x001b0001, 0x00000004 },
-    { 0x08004800, 0x00000004 },
-    { 0x001b0001, 0x00000004 },
-    { 0x08004800, 0x00000004 },
-    { 0x001b0001, 0x00000004 },
-    { 0x08004800, 0x00000004 },
-    { 0x0000003a, 0x00000008 },
-    { 0x0000a000, 0000000000 },
-    { 0x2000451d, 0x00000004 },
-    { 0x0000e580, 0x00000004 },
-    { 0x000ce581, 0x00000004 },
-    { 0x08004580, 0x00000004 },
-    { 0x000ce581, 0x00000004 },
-    { 0x00000047, 0x00000008 },
-    { 0x0000a000, 0000000000 },
-    { 0x000c2000, 0x00000004 },
-    { 0x0000e50e, 0x00000004 },
-    { 0x00032000, 0x00000004 },
-    { 0x00022051, 0x00000028 },
-    { 0x00000051, 0x00000024 },
-    { 0x0800450f, 0x00000004 },
-    { 0x0000a04b, 0x00000008 },
-    { 0x0000e565, 0x00000004 },
-    { 0x0000e566, 0x00000004 },
-    { 0x00000052, 0x00000008 },
-    { 0x03cca5b4, 0x00000004 },
-    { 0x05432000, 0x00000004 },
-    { 0x00022000, 0x00000004 },
-    { 0x4ccce05e, 0x00000030 },
-    { 0x08274565, 0x00000004 },
-    { 0x0000005e, 0x00000030 },
-    { 0x08004564, 0x00000004 },
-    { 0x0000e566, 0x00000004 },
-    { 0x00000055, 0x00000008 },
-    { 0x00802061, 0x00000010 },
-    { 0x00202000, 0x00000004 },
-    { 0x001b00ff, 0x00000004 },
-    { 0x01000064, 0x00000010 },
-    { 0x001f2000, 0x00000004 },
-    { 0x001c00ff, 0x00000004 },
-    { 0000000000, 0x0000000c },
-    { 0x00000072, 0x00000030 },
-    { 0x00000055, 0x00000008 },
-    { 0x0000e576, 0x00000004 },
-    { 0x0000e577, 0x00000004 },
-    { 0x0000e50e, 0x00000004 },
-    { 0x0000e50f, 0x00000004 },
-    { 0x0140a000, 0x00000004 },
-    { 0x00000069, 0x00000018 },
-    { 0x00c0e5f9, 0x000000c2 },
-    { 0x00000069, 0x00000008 },
-    { 0x0014e50e, 0x00000004 },
-    { 0x0040e50f, 0x00000004 },
-    { 0x00c0006c, 0x00000008 },
-    { 0x0000e570, 0x00000004 },
-    { 0x0000e571, 0x00000004 },
-    { 0x0000e572, 0x0000000c },
-    { 0x0000a000, 0x00000004 },
-    { 0x0140a000, 0x00000004 },
-    { 0x0000e568, 0x00000004 },
-    { 0x000c2000, 0x00000004 },
-    { 0x00000076, 0x00000018 },
-    { 0x000b0000, 0x00000004 },
-    { 0x18c0e562, 0x00000004 },
-    { 0x00000078, 0x00000008 },
-    { 0x00c00077, 0x00000008 },
-    { 0x000700d5, 0x00000004 },
-    { 0x00000084, 0x00000038 },
-    { 0x000ca086, 0x00000030 },
-    { 0x080045bb, 0x00000004 },
-    { 0x000c2087, 0x00000030 },
-    { 0x0800e5bc, 0000000000 },
-    { 0x0000e5bb, 0x00000004 },
-    { 0x0000e5bc, 0000000000 },
-    { 0x00120000, 0x0000000c },
-    { 0x00120000, 0x00000004 },
-    { 0x001b0002, 0x0000000c },
-    { 0x0000a000, 0x00000004 },
-    { 0x0000e821, 0x00000004 },
-    { 0x0000e800, 0000000000 },
-    { 0x0000e821, 0x00000004 },
-    { 0x0000e82e, 0000000000 },
-    { 0x02cca000, 0x00000004 },
-    { 0x00140000, 0x00000004 },
-    { 0x000ce1cc, 0x00000004 },
-    { 0x050de1cd, 0x00000004 },
-    { 0x00400000, 0x00000004 },
-    { 0x00000096, 0x00000018 },
-    { 0x00c0a000, 0x00000004 },
-    { 0x00000093, 0x00000008 },
-    { 0x00000098, 0x00000020 },
-    { 0x4200e000, 0000000000 },
-    { 0x0000009f, 0x00000038 },
-    { 0x000ca000, 0x00000004 },
-    { 0x00140000, 0x00000004 },
-    { 0x000c2000, 0x00000004 },
-    { 0x00160000, 0x00000004 },
-    { 0x700ce000, 0x00000004 },
-    { 0x0014009b, 0x00000008 },
-    { 0x4000e000, 0000000000 },
-    { 0x02400000, 0x00000004 },
-    { 0x400ee000, 0x00000004 },
-    { 0x02400000, 0x00000004 },
-    { 0x4000e000, 0000000000 },
-    { 0x000c2000, 0x00000004 },
-    { 0x0240e51b, 0x00000004 },
-    { 0x0080e50a, 0x00000005 },
-    { 0x0080e50b, 0x00000005 },
-    { 0x00220000, 0x00000004 },
-    { 0x000700d5, 0x00000004 },
-    { 0x000000b2, 0x00000038 },
-    { 0x000c2087, 0x00000030 },
-    { 0x0880e5bd, 0x00000005 },
-    { 0x000c2086, 0x00000030 },
-    { 0x0800e5bb, 0x00000005 },
-    { 0x000c2087, 0x00000030 },
-    { 0x0880e5bc, 0x00000005 },
-    { 0x000000b5, 0x00000008 },
-    { 0x0080e5bd, 0x00000005 },
-    { 0x0000e5bb, 0x00000005 },
-    { 0x0080e5bc, 0x00000005 },
-    { 0x00210000, 0x00000004 },
-    { 0x02800000, 0x00000004 },
-    { 0x00c000b9, 0x00000018 },
-    { 0x4180e000, 0x00000040 },
-    { 0x000000bb, 0x00000024 },
-    { 0x01000000, 0x0000000c },
-    { 0x0100e51d, 0x0000000c },
-    { 0x000045bb, 0x00000004 },
-    { 0x000080b5, 0x00000008 },
-    { 0x0000f3ce, 0x00000004 },
-    { 0x0140a000, 0x00000004 },
-    { 0x00cc2000, 0x00000004 },
-    { 0x08c053cf, 0x00000040 },
-    { 0x00008000, 0000000000 },
-    { 0x0000f3d2, 0x00000004 },
-    { 0x0140a000, 0x00000004 },
-    { 0x00cc2000, 0x00000004 },
-    { 0x08c053d3, 0x00000040 },
-    { 0x00008000, 0000000000 },
-    { 0x0000f39d, 0x00000004 },
-    { 0x0140a000, 0x00000004 },
-    { 0x00cc2000, 0x00000004 },
-    { 0x08c0539e, 0x00000040 },
-    { 0x00008000, 0000000000 },
-    { 0x03c00830, 0x00000004 },
-    { 0x4200e000, 0000000000 },
-    { 0x0000a000, 0x00000004 },
-    { 0x200045e0, 0x00000004 },
-    { 0x0000e5e1, 0000000000 },
-    { 0x00000001, 0000000000 },
-    { 0x000700d2, 0x00000004 },
-    { 0x0800e394, 0000000000 },
-    { 0000000000, 0000000000 },
-    { 0x0000e8c4, 0x00000004 },
-    { 0x0000e8c5, 0x00000004 },
-    { 0x0000e8c6, 0x00000004 },
-    { 0x0000e928, 0x00000004 },
-    { 0x0000e929, 0x00000004 },
-    { 0x0000e92a, 0x00000004 },
-    { 0x000000d6, 0x00000008 },
-    { 0x0000e928, 0x00000004 },
-    { 0x0000e929, 0x00000004 },
-    { 0x0000e92a, 0x00000004 },
-    { 0x000000dd, 0x00000008 },
-    { 0x00e00116, 0000000000 },
-    { 0x000700e1, 0x00000004 },
-    { 0x0800401c, 0x00000004 },
-    { 0x200050e7, 0x00000004 },
-    { 0x0000e01d, 0x00000004 },
-    { 0x000000e4, 0x00000008 },
-    { 0x02c02000, 0x00000004 },
-    { 0x00060000, 0x00000004 },
-    { 0x000000eb, 0x00000034 },
-    { 0x000000e8, 0x00000008 },
-    { 0x00008000, 0x00000004 },
-    { 0xc000e000, 0000000000 },
-    { 0000000000, 0000000000 },
-    { 0000000000, 0000000000 },
-    { 0000000000, 0000000000 },
-    { 0000000000, 0000000000 },
-    { 0000000000, 0000000000 },
-    { 0000000000, 0000000000 },
-    { 0000000000, 0000000000 },
-    { 0000000000, 0000000000 },
-    { 0000000000, 0000000000 },
-    { 0x000c2000, 0x00000004 },
-    { 0x001d0018, 0x00000004 },
-    { 0x001a0001, 0x00000004 },
-    { 0x000000fb, 0x00000034 },
-    { 0x0000004a, 0x00000008 },
-    { 0x0500a04a, 0x00000008 },
-    { 0000000000, 0000000000 },
-    { 0000000000, 0000000000 },
-    { 0000000000, 0000000000 },
-    { 0000000000, 0000000000 },
-};
-static const u32 RS690_cp_microcode[][2] = {
-    { 0x000000dd, 0x00000008 },
-    { 0x000000df, 0x00000008 },
-    { 0x000000a0, 0x00000008 },
-    { 0x000000a4, 0x00000008 },
-    { 0x4a554b4a, 0000000000 },
-    { 0x4a4a4467, 0000000000 },
-    { 0x55526f75, 0000000000 },
-    { 0x4a7e7d65, 0000000000 },
-    { 0x4ad74af6, 0000000000 },
-    { 0x4ac94a4a, 0000000000 },
-    { 0xcc898989, 0000000000 },
-    { 0xc34ad3c5, 0000000000 },
-    { 0x8e4a4a4a, 0000000000 },
-    { 0x4a8a8a8a, 0000000000 },
-    { 0x4a0f8c4a, 0000000000 },
-    { 0x000ca000, 0x00000004 },
-    { 0x000d0012, 0x00000038 },
-    { 0x0000e8b4, 0x00000004 },
-    { 0x000d0014, 0x00000038 },
-    { 0x0000e8b6, 0x00000004 },
-    { 0x000d0016, 0x00000038 },
-    { 0x0000e854, 0x00000004 },
-    { 0x000d0018, 0x00000038 },
-    { 0x0000e855, 0x00000004 },
-    { 0x000d001a, 0x00000038 },
-    { 0x0000e856, 0x00000004 },
-    { 0x000d001c, 0x00000038 },
-    { 0x0000e857, 0x00000004 },
-    { 0x000d001e, 0x00000038 },
-    { 0x0000e824, 0x00000004 },
-    { 0x000d0020, 0x00000038 },
-    { 0x0000e825, 0x00000004 },
-    { 0x000d0022, 0x00000038 },
-    { 0x0000e830, 0x00000004 },
-    { 0x000d0024, 0x00000038 },
-    { 0x0000f0c0, 0x00000004 },
-    { 0x000d0026, 0x00000038 },
-    { 0x0000f0c1, 0x00000004 },
-    { 0x000d0028, 0x00000038 },
-    { 0x0000f041, 0x00000004 },
-    { 0x000d002a, 0x00000038 },
-    { 0x0000f184, 0x00000004 },
-    { 0x000d002c, 0x00000038 },
-    { 0x0000f185, 0x00000004 },
-    { 0x000d002e, 0x00000038 },
-    { 0x0000f186, 0x00000004 },
-    { 0x000d0030, 0x00000038 },
-    { 0x0000f187, 0x00000004 },
-    { 0x000d0032, 0x00000038 },
-    { 0x0000f180, 0x00000004 },
-    { 0x000d0034, 0x00000038 },
-    { 0x0000f393, 0x00000004 },
-    { 0x000d0036, 0x00000038 },
-    { 0x0000f38a, 0x00000004 },
-    { 0x000d0038, 0x00000038 },
-    { 0x0000f38e, 0x00000004 },
-    { 0x0000e821, 0x00000004 },
-    { 0x0140a000, 0x00000004 },
-    { 0x00000043, 0x00000018 },
-    { 0x00cce800, 0x00000004 },
-    { 0x001b0001, 0x00000004 },
-    { 0x08004800, 0x00000004 },
-    { 0x001b0001, 0x00000004 },
-    { 0x08004800, 0x00000004 },
-    { 0x001b0001, 0x00000004 },
-    { 0x08004800, 0x00000004 },
-    { 0x0000003a, 0x00000008 },
-    { 0x0000a000, 0000000000 },
-    { 0x2000451d, 0x00000004 },
-    { 0x0000e580, 0x00000004 },
-    { 0x000ce581, 0x00000004 },
-    { 0x08004580, 0x00000004 },
-    { 0x000ce581, 0x00000004 },
-    { 0x00000047, 0x00000008 },
-    { 0x0000a000, 0000000000 },
-    { 0x000c2000, 0x00000004 },
-    { 0x0000e50e, 0x00000004 },
-    { 0x00032000, 0x00000004 },
-    { 0x00022051, 0x00000028 },
-    { 0x00000051, 0x00000024 },
-    { 0x0800450f, 0x00000004 },
-    { 0x0000a04b, 0x00000008 },
-    { 0x0000e565, 0x00000004 },
-    { 0x0000e566, 0x00000004 },
-    { 0x00000052, 0x00000008 },
-    { 0x03cca5b4, 0x00000004 },
-    { 0x05432000, 0x00000004 },
-    { 0x00022000, 0x00000004 },
-    { 0x4ccce05e, 0x00000030 },
-    { 0x08274565, 0x00000004 },
-    { 0x0000005e, 0x00000030 },
-    { 0x08004564, 0x00000004 },
-    { 0x0000e566, 0x00000004 },
-    { 0x00000055, 0x00000008 },
-    { 0x00802061, 0x00000010 },
-    { 0x00202000, 0x00000004 },
-    { 0x001b00ff, 0x00000004 },
-    { 0x01000064, 0x00000010 },
-    { 0x001f2000, 0x00000004 },
-    { 0x001c00ff, 0x00000004 },
-    { 0000000000, 0x0000000c },
-    { 0x00000072, 0x00000030 },
-    { 0x00000055, 0x00000008 },
-    { 0x0000e576, 0x00000004 },
-    { 0x0000e577, 0x00000004 },
-    { 0x0000e50e, 0x00000004 },
-    { 0x0000e50f, 0x00000004 },
-    { 0x0140a000, 0x00000004 },
-    { 0x00000069, 0x00000018 },
-    { 0x00c0e5f9, 0x000000c2 },
-    { 0x00000069, 0x00000008 },
-    { 0x0014e50e, 0x00000004 },
-    { 0x0040e50f, 0x00000004 },
-    { 0x00c0006c, 0x00000008 },
-    { 0x0000e570, 0x00000004 },
-    { 0x0000e571, 0x00000004 },
-    { 0x0000e572, 0x0000000c },
-    { 0x0000a000, 0x00000004 },
-    { 0x0140a000, 0x00000004 },
-    { 0x0000e568, 0x00000004 },
-    { 0x000c2000, 0x00000004 },
-    { 0x00000076, 0x00000018 },
-    { 0x000b0000, 0x00000004 },
-    { 0x18c0e562, 0x00000004 },
-    { 0x00000078, 0x00000008 },
-    { 0x00c00077, 0x00000008 },
-    { 0x000700cb, 0x00000004 },
-    { 0x00000084, 0x00000038 },
-    { 0x000ca086, 0x00000030 },
-    { 0x080045bb, 0x00000004 },
-    { 0x000c2087, 0x00000030 },
-    { 0x0800e5bc, 0000000000 },
-    { 0x0000e5bb, 0x00000004 },
-    { 0x0000e5bc, 0000000000 },
-    { 0x00120000, 0x0000000c },
-    { 0x00120000, 0x00000004 },
-    { 0x001b0002, 0x0000000c },
-    { 0x0000a000, 0x00000004 },
-    { 0x0000e821, 0x00000004 },
-    { 0x0000e800, 0000000000 },
-    { 0x0000e821, 0x00000004 },
-    { 0x0000e82e, 0000000000 },
-    { 0x02cca000, 0x00000004 },
-    { 0x00140000, 0x00000004 },
-    { 0x000ce1cc, 0x00000004 },
-    { 0x050de1cd, 0x00000004 },
-    { 0x00400000, 0x00000004 },
-    { 0x00000096, 0x00000018 },
-    { 0x00c0a000, 0x00000004 },
-    { 0x00000093, 0x00000008 },
-    { 0x00000098, 0x00000020 },
-    { 0x4200e000, 0000000000 },
-    { 0x0000009f, 0x00000038 },
-    { 0x000ca000, 0x00000004 },
-    { 0x00140000, 0x00000004 },
-    { 0x000c2000, 0x00000004 },
-    { 0x00160000, 0x00000004 },
-    { 0x700ce000, 0x00000004 },
-    { 0x0014009b, 0x00000008 },
-    { 0x4000e000, 0000000000 },
-    { 0x02400000, 0x00000004 },
-    { 0x400ee000, 0x00000004 },
-    { 0x02400000, 0x00000004 },
-    { 0x4000e000, 0000000000 },
-    { 0x00100000, 0x0000002c },
-    { 0x00004000, 0000000000 },
-    { 0x080045c8, 0x00000004 },
-    { 0x00240005, 0x00000004 },
-    { 0x08004d0b, 0x00000004 },
-    { 0x000c2000, 0x00000004 },
-    { 0x0240e51b, 0x00000004 },
-    { 0x0080e50a, 0x00000005 },
-    { 0x0080e50b, 0x00000005 },
-    { 0x00220000, 0x00000004 },
-    { 0x000700cb, 0x00000004 },
-    { 0x000000b7, 0x00000038 },
-    { 0x000c2087, 0x00000030 },
-    { 0x0880e5bd, 0x00000005 },
-    { 0x000c2086, 0x00000030 },
-    { 0x0800e5bb, 0x00000005 },
-    { 0x000c2087, 0x00000030 },
-    { 0x0880e5bc, 0x00000005 },
-    { 0x000000ba, 0x00000008 },
-    { 0x0080e5bd, 0x00000005 },
-    { 0x0000e5bb, 0x00000005 },
-    { 0x0080e5bc, 0x00000005 },
-    { 0x00210000, 0x00000004 },
-    { 0x02800000, 0x00000004 },
-    { 0x00c000be, 0x00000018 },
-    { 0x4180e000, 0x00000040 },
-    { 0x000000c0, 0x00000024 },
-    { 0x01000000, 0x0000000c },
-    { 0x0100e51d, 0x0000000c },
-    { 0x000045bb, 0x00000004 },
-    { 0x000080ba, 0x00000008 },
-    { 0x03c00830, 0x00000004 },
-    { 0x4200e000, 0000000000 },
-    { 0x0000a000, 0x00000004 },
-    { 0x200045e0, 0x00000004 },
-    { 0x0000e5e1, 0000000000 },
-    { 0x00000001, 0000000000 },
-    { 0x000700c8, 0x00000004 },
-    { 0x0800e394, 0000000000 },
-    { 0000000000, 0000000000 },
-    { 0x0000e8c4, 0x00000004 },
-    { 0x0000e8c5, 0x00000004 },
-    { 0x0000e8c6, 0x00000004 },
-    { 0x0000e928, 0x00000004 },
-    { 0x0000e929, 0x00000004 },
-    { 0x0000e92a, 0x00000004 },
-    { 0x000000cc, 0x00000008 },
-    { 0x0000e928, 0x00000004 },
-    { 0x0000e929, 0x00000004 },
-    { 0x0000e92a, 0x00000004 },
-    { 0x000000d3, 0x00000008 },
-    { 0x02c02000, 0x00000004 },
-    { 0x00060000, 0x00000004 },
-    { 0x000000db, 0x00000034 },
-    { 0x000000d8, 0x00000008 },
-    { 0x00008000, 0x00000004 },
-    { 0xc000e000, 0000000000 },
-    { 0x000000e1, 0x00000030 },
-    { 0x4200e000, 0000000000 },
-    { 0x000000e1, 0x00000030 },
-    { 0x4000e000, 0000000000 },
-    { 0x0025001b, 0x00000004 },
-    { 0x00230000, 0x00000004 },
-    { 0x00250005, 0x00000004 },
-    { 0x000000e6, 0x00000034 },
-    { 0000000000, 0x0000000c },
-    { 0x00244000, 0x00000004 },
-    { 0x080045c8, 0x00000004 },
-    { 0x00240005, 0x00000004 },
-    { 0x08004d0b, 0x0000000c },
-    { 0000000000, 0000000000 },
-    { 0000000000, 0000000000 },
-    { 0000000000, 0000000000 },
-    { 0000000000, 0000000000 },
-    { 0000000000, 0000000000 },
-    { 0000000000, 0000000000 },
-    { 0000000000, 0000000000 },
-    { 0000000000, 0000000000 },
-    { 0000000000, 0000000000 },
-    { 0000000000, 0000000000 },
-    { 0000000000, 0000000000 },
-    { 0000000000, 0000000000 },
-    { 0x000c2000, 0x00000004 },
-    { 0x001d0018, 0x00000004 },
-    { 0x001a0001, 0x00000004 },
-    { 0x000000fb, 0x00000034 },
-    { 0x0000004a, 0x00000008 },
-    { 0x0500a04a, 0x00000008 },
-    { 0000000000, 0000000000 },
-    { 0000000000, 0000000000 },
-    { 0000000000, 0000000000 },
-    { 0000000000, 0000000000 },
-};
-static const u32 R520_cp_microcode[][2] = {
-    { 0x4200e000, 0000000000 },
-    { 0x4000e000, 0000000000 },
-    { 0x00000099, 0x00000008 },
-    { 0x0000009d, 0x00000008 },
-    { 0x4a554b4a, 0000000000 },
-    { 0x4a4a4467, 0000000000 },
-    { 0x55526f75, 0000000000 },
-    { 0x4a7e7d65, 0000000000 },
-    { 0xe0dae6f6, 0000000000 },
-    { 0x4ac54a4a, 0000000000 },
-    { 0xc8828282, 0000000000 },
-    { 0xbf4acfc1, 0000000000 },
-    { 0x87b04ad5, 0000000000 },
-    { 0xb5838383, 0000000000 },
-    { 0x4a0f85ba, 0000000000 },
-    { 0x000ca000, 0x00000004 },
-    { 0x000d0012, 0x00000038 },
-    { 0x0000e8b4, 0x00000004 },
-    { 0x000d0014, 0x00000038 },
-    { 0x0000e8b6, 0x00000004 },
-    { 0x000d0016, 0x00000038 },
-    { 0x0000e854, 0x00000004 },
-    { 0x000d0018, 0x00000038 },
-    { 0x0000e855, 0x00000004 },
-    { 0x000d001a, 0x00000038 },
-    { 0x0000e856, 0x00000004 },
-    { 0x000d001c, 0x00000038 },
-    { 0x0000e857, 0x00000004 },
-    { 0x000d001e, 0x00000038 },
-    { 0x0000e824, 0x00000004 },
-    { 0x000d0020, 0x00000038 },
-    { 0x0000e825, 0x00000004 },
-    { 0x000d0022, 0x00000038 },
-    { 0x0000e830, 0x00000004 },
-    { 0x000d0024, 0x00000038 },
-    { 0x0000f0c0, 0x00000004 },
-    { 0x000d0026, 0x00000038 },
-    { 0x0000f0c1, 0x00000004 },
-    { 0x000d0028, 0x00000038 },
-    { 0x0000e000, 0x00000004 },
-    { 0x000d002a, 0x00000038 },
-    { 0x0000e000, 0x00000004 },
-    { 0x000d002c, 0x00000038 },
-    { 0x0000e000, 0x00000004 },
-    { 0x000d002e, 0x00000038 },
-    { 0x0000e000, 0x00000004 },
-    { 0x000d0030, 0x00000038 },
-    { 0x0000e000, 0x00000004 },
-    { 0x000d0032, 0x00000038 },
-    { 0x0000f180, 0x00000004 },
-    { 0x000d0034, 0x00000038 },
-    { 0x0000f393, 0x00000004 },
-    { 0x000d0036, 0x00000038 },
-    { 0x0000f38a, 0x00000004 },
-    { 0x000d0038, 0x00000038 },
-    { 0x0000f38e, 0x00000004 },
-    { 0x0000e821, 0x00000004 },
-    { 0x0140a000, 0x00000004 },
-    { 0x00000043, 0x00000018 },
-    { 0x00cce800, 0x00000004 },
-    { 0x001b0001, 0x00000004 },
-    { 0x08004800, 0x00000004 },
-    { 0x001b0001, 0x00000004 },
-    { 0x08004800, 0x00000004 },
-    { 0x001b0001, 0x00000004 },
-    { 0x08004800, 0x00000004 },
-    { 0x0000003a, 0x00000008 },
-    { 0x0000a000, 0000000000 },
-    { 0x2000451d, 0x00000004 },
-    { 0x0000e580, 0x00000004 },
-    { 0x000ce581, 0x00000004 },
-    { 0x08004580, 0x00000004 },
-    { 0x000ce581, 0x00000004 },
-    { 0x00000047, 0x00000008 },
-    { 0x0000a000, 0000000000 },
-    { 0x000c2000, 0x00000004 },
-    { 0x0000e50e, 0x00000004 },
-    { 0x00032000, 0x00000004 },
-    { 0x00022051, 0x00000028 },
-    { 0x00000051, 0x00000024 },
-    { 0x0800450f, 0x00000004 },
-    { 0x0000a04b, 0x00000008 },
-    { 0x0000e565, 0x00000004 },
-    { 0x0000e566, 0x00000004 },
-    { 0x00000052, 0x00000008 },
-    { 0x03cca5b4, 0x00000004 },
-    { 0x05432000, 0x00000004 },
-    { 0x00022000, 0x00000004 },
-    { 0x4ccce05e, 0x00000030 },
-    { 0x08274565, 0x00000004 },
-    { 0x0000005e, 0x00000030 },
-    { 0x08004564, 0x00000004 },
-    { 0x0000e566, 0x00000004 },
-    { 0x00000055, 0x00000008 },
-    { 0x00802061, 0x00000010 },
-    { 0x00202000, 0x00000004 },
-    { 0x001b00ff, 0x00000004 },
-    { 0x01000064, 0x00000010 },
-    { 0x001f2000, 0x00000004 },
-    { 0x001c00ff, 0x00000004 },
-    { 0000000000, 0x0000000c },
-    { 0x00000072, 0x00000030 },
-    { 0x00000055, 0x00000008 },
-    { 0x0000e576, 0x00000004 },
-    { 0x0000e577, 0x00000004 },
-    { 0x0000e50e, 0x00000004 },
-    { 0x0000e50f, 0x00000004 },
-    { 0x0140a000, 0x00000004 },
-    { 0x00000069, 0x00000018 },
-    { 0x00c0e5f9, 0x000000c2 },
-    { 0x00000069, 0x00000008 },
-    { 0x0014e50e, 0x00000004 },
-    { 0x0040e50f, 0x00000004 },
-    { 0x00c0006c, 0x00000008 },
-    { 0x0000e570, 0x00000004 },
-    { 0x0000e571, 0x00000004 },
-    { 0x0000e572, 0x0000000c },
-    { 0x0000a000, 0x00000004 },
-    { 0x0140a000, 0x00000004 },
-    { 0x0000e568, 0x00000004 },
-    { 0x000c2000, 0x00000004 },
-    { 0x00000076, 0x00000018 },
-    { 0x000b0000, 0x00000004 },
-    { 0x18c0e562, 0x00000004 },
-    { 0x00000078, 0x00000008 },
-    { 0x00c00077, 0x00000008 },
-    { 0x000700c7, 0x00000004 },
-    { 0x00000080, 0x00000038 },
-    { 0x0000e5bb, 0x00000004 },
-    { 0x0000e5bc, 0000000000 },
-    { 0x0000a000, 0x00000004 },
-    { 0x0000e821, 0x00000004 },
-    { 0x0000e800, 0000000000 },
-    { 0x0000e821, 0x00000004 },
-    { 0x0000e82e, 0000000000 },
-    { 0x02cca000, 0x00000004 },
-    { 0x00140000, 0x00000004 },
-    { 0x000ce1cc, 0x00000004 },
-    { 0x050de1cd, 0x00000004 },
-    { 0x00400000, 0x00000004 },
-    { 0x0000008f, 0x00000018 },
-    { 0x00c0a000, 0x00000004 },
-    { 0x0000008c, 0x00000008 },
-    { 0x00000091, 0x00000020 },
-    { 0x4200e000, 0000000000 },
-    { 0x00000098, 0x00000038 },
-    { 0x000ca000, 0x00000004 },
-    { 0x00140000, 0x00000004 },
-    { 0x000c2000, 0x00000004 },
-    { 0x00160000, 0x00000004 },
-    { 0x700ce000, 0x00000004 },
-    { 0x00140094, 0x00000008 },
-    { 0x4000e000, 0000000000 },
-    { 0x02400000, 0x00000004 },
-    { 0x400ee000, 0x00000004 },
-    { 0x02400000, 0x00000004 },
-    { 0x4000e000, 0000000000 },
-    { 0x000c2000, 0x00000004 },
-    { 0x0240e51b, 0x00000004 },
-    { 0x0080e50a, 0x00000005 },
-    { 0x0080e50b, 0x00000005 },
-    { 0x00220000, 0x00000004 },
-    { 0x000700c7, 0x00000004 },
-    { 0x000000a4, 0x00000038 },
-    { 0x0080e5bd, 0x00000005 },
-    { 0x0000e5bb, 0x00000005 },
-    { 0x0080e5bc, 0x00000005 },
-    { 0x00210000, 0x00000004 },
-    { 0x02800000, 0x00000004 },
-    { 0x00c000ab, 0x00000018 },
-    { 0x4180e000, 0x00000040 },
-    { 0x000000ad, 0x00000024 },
-    { 0x01000000, 0x0000000c },
-    { 0x0100e51d, 0x0000000c },
-    { 0x000045bb, 0x00000004 },
-    { 0x000080a7, 0x00000008 },
-    { 0x0000f3ce, 0x00000004 },
-    { 0x0140a000, 0x00000004 },
-    { 0x00cc2000, 0x00000004 },
-    { 0x08c053cf, 0x00000040 },
-    { 0x00008000, 0000000000 },
-    { 0x0000f3d2, 0x00000004 },
-    { 0x0140a000, 0x00000004 },
-    { 0x00cc2000, 0x00000004 },
-    { 0x08c053d3, 0x00000040 },
-    { 0x00008000, 0000000000 },
-    { 0x0000f39d, 0x00000004 },
-    { 0x0140a000, 0x00000004 },
-    { 0x00cc2000, 0x00000004 },
-    { 0x08c0539e, 0x00000040 },
-    { 0x00008000, 0000000000 },
-    { 0x03c00830, 0x00000004 },
-    { 0x4200e000, 0000000000 },
-    { 0x0000a000, 0x00000004 },
-    { 0x200045e0, 0x00000004 },
-    { 0x0000e5e1, 0000000000 },
-    { 0x00000001, 0000000000 },
-    { 0x000700c4, 0x00000004 },
-    { 0x0800e394, 0000000000 },
-    { 0000000000, 0000000000 },
-    { 0x0000e8c4, 0x00000004 },
-    { 0x0000e8c5, 0x00000004 },
-    { 0x0000e8c6, 0x00000004 },
-    { 0x0000e928, 0x00000004 },
-    { 0x0000e929, 0x00000004 },
-    { 0x0000e92a, 0x00000004 },
-    { 0x000000c8, 0x00000008 },
-    { 0x0000e928, 0x00000004 },
-    { 0x0000e929, 0x00000004 },
-    { 0x0000e92a, 0x00000004 },
-    { 0x000000cf, 0x00000008 },
-    { 0xdeadbeef, 0000000000 },
-    { 0x00000116, 0000000000 },
-    { 0x000700d3, 0x00000004 },
-    { 0x080050e7, 0x00000004 },
-    { 0x000700d4, 0x00000004 },
-    { 0x0800401c, 0x00000004 },
-    { 0x0000e01d, 0000000000 },
-    { 0x02c02000, 0x00000004 },
-    { 0x00060000, 0x00000004 },
-    { 0x000000de, 0x00000034 },
-    { 0x000000db, 0x00000008 },
-    { 0x00008000, 0x00000004 },
-    { 0xc000e000, 0000000000 },
-    { 0x0000e1cc, 0x00000004 },
-    { 0x0500e1cd, 0x00000004 },
-    { 0x000ca000, 0x00000004 },
-    { 0x000000e5, 0x00000034 },
-    { 0x000000e1, 0x00000008 },
-    { 0x0000a000, 0000000000 },
-    { 0x0019e1cc, 0x00000004 },
-    { 0x001b0001, 0x00000004 },
-    { 0x0500a000, 0x00000004 },
-    { 0x080041cd, 0x00000004 },
-    { 0x000ca000, 0x00000004 },
-    { 0x000000fb, 0x00000034 },
-    { 0x0000004a, 0x00000008 },
-    { 0000000000, 0000000000 },
-    { 0000000000, 0000000000 },
-    { 0000000000, 0000000000 },
-    { 0000000000, 0000000000 },
-    { 0000000000, 0000000000 },
-    { 0000000000, 0000000000 },
-    { 0000000000, 0000000000 },
-    { 0000000000, 0000000000 },
-    { 0000000000, 0000000000 },
-    { 0x000c2000, 0x00000004 },
-    { 0x001d0018, 0x00000004 },
-    { 0x001a0001, 0x00000004 },
-    { 0x000000fb, 0x00000034 },
-    { 0x0000004a, 0x00000008 },
-    { 0x0500a04a, 0x00000008 },
-    { 0000000000, 0000000000 },
-    { 0000000000, 0000000000 },
-    { 0000000000, 0000000000 },
-    { 0000000000, 0000000000 },
-};
-#endif
diff --git a/drivers/gpu/drm/radeon/radeon_mode.h b/drivers/gpu/drm/radeon/radeon_mode.h
index 3b09a1f2d8f9..570a58729daf 100644
--- a/drivers/gpu/drm/radeon/radeon_mode.h
+++ b/drivers/gpu/drm/radeon/radeon_mode.h
@@ -175,6 +175,15 @@ struct radeon_mode_info {
        enum radeon_connector_table connector_table;
        bool mode_config_initialized;
        struct radeon_crtc *crtcs[2];
+        /* DVI-I properties */
+        struct drm_property *coherent_mode_property;
+        /* DAC enable load detect */
+        struct drm_property *load_detect_property;
+        /* TV standard load detect */
+        struct drm_property *tv_std_property;
+        /* legacy TMDS PLL detect */
+        struct drm_property *tmds_pll_property;
 };
 struct radeon_native_mode {
@@ -188,6 +197,21 @@ struct radeon_native_mode {
        uint32_t flags;
 };
+#define MAX_H_CODE_TIMING_LEN 32
+#define MAX_V_CODE_TIMING_LEN 32
+/* need to store these as reading
+   back code tables is excessive */
+struct radeon_tv_regs {
+        uint32_t tv_uv_adr;
+        uint32_t timing_cntl;
+        uint32_t hrestart;
+        uint32_t vrestart;
+        uint32_t frestart;
+        uint16_t h_code_timing[MAX_H_CODE_TIMING_LEN];
+        uint16_t v_code_timing[MAX_V_CODE_TIMING_LEN];
+};
 struct radeon_crtc {
        struct drm_crtc base;
        int crtc_id;
@@ -195,8 +219,6 @@ struct radeon_crtc {
        bool enabled;
        bool can_tile;
        uint32_t crtc_offset;
-        struct radeon_framebuffer *fbdev_fb;
-        struct drm_mode_set mode_set;
        struct drm_gem_object *cursor_bo;
        uint64_t cursor_addr;
        int cursor_width;
@@ -204,7 +226,6 @@ struct radeon_crtc {
        uint32_t legacy_display_base_addr;
        uint32_t legacy_cursor_offset;
        enum radeon_rmx_type rmx_type;
-        uint32_t devices;
        fixed20_12 vsc;
        fixed20_12 hsc;
        struct radeon_native_mode native_mode;
@@ -236,7 +257,13 @@ struct radeon_encoder_tv_dac {
        uint32_t ntsc_tvdac_adj;
        uint32_t pal_tvdac_adj;
+        int               h_pos;
+        int               v_pos;
+        int               h_size;
+        int               supported_tv_stds;
+        bool              tv_on;
        enum radeon_tv_std tv_std;
+        struct radeon_tv_regs tv;
 };
 struct radeon_encoder_int_tmds {
@@ -255,10 +282,15 @@ struct radeon_encoder_atom_dig {
        struct radeon_native_mode native_mode;
 };
+struct radeon_encoder_atom_dac {
+        enum radeon_tv_std tv_std;
+};
 struct radeon_encoder {
        struct drm_encoder base;
        uint32_t encoder_id;
        uint32_t devices;
+        uint32_t active_device;
        uint32_t flags;
        uint32_t pixel_clock;
        enum radeon_rmx_type rmx_type;
@@ -276,8 +308,12 @@ struct radeon_connector {
        uint32_t connector_id;
        uint32_t devices;
        struct radeon_i2c_chan *ddc_bus;
-        int use_digital;
+        bool use_digital;
+        /* we need to mind the EDID between detect
+           and get modes due to analog/digital/tvencoder */
+        struct edid *edid;
        void *con_priv;
+        bool dac_load_detect;
 };
 struct radeon_framebuffer {
@@ -310,6 +346,7 @@ struct drm_encoder *radeon_encoder_legacy_tmds_int_add(struct drm_device *dev, i
 struct drm_encoder *radeon_encoder_legacy_tmds_ext_add(struct drm_device *dev, int bios_index);
 extern void atombios_external_tmds_setup(struct drm_encoder *encoder, int action);
 extern int atombios_get_encoder_mode(struct drm_encoder *encoder);
+extern void radeon_encoder_set_active_device(struct drm_encoder *encoder);
 extern void radeon_crtc_load_lut(struct drm_crtc *crtc);
 extern int atombios_crtc_set_base(struct drm_crtc *crtc, int x, int y,
@@ -337,16 +374,18 @@ extern bool radeon_atom_get_clock_info(struct drm_device *dev);
 extern bool radeon_combios_get_clock_info(struct drm_device *dev);
 extern struct radeon_encoder_atom_dig *
 radeon_atombios_get_lvds_info(struct radeon_encoder *encoder);
-extern struct radeon_encoder_int_tmds *
+bool radeon_atombios_get_tmds_info(struct radeon_encoder *encoder,
-radeon_atombios_get_tmds_info(struct radeon_encoder *encoder);
+                                   struct radeon_encoder_int_tmds *tmds);
+bool radeon_legacy_get_tmds_info_from_combios(struct radeon_encoder *encoder,
+                                           struct radeon_encoder_int_tmds *tmds);
+bool radeon_legacy_get_tmds_info_from_table(struct radeon_encoder *encoder,
+                                            struct radeon_encoder_int_tmds *tmds);
 extern struct radeon_encoder_primary_dac *
 radeon_atombios_get_primary_dac_info(struct radeon_encoder *encoder);
 extern struct radeon_encoder_tv_dac *
 radeon_atombios_get_tv_dac_info(struct radeon_encoder *encoder);
 extern struct radeon_encoder_lvds *
 radeon_combios_get_lvds_info(struct radeon_encoder *encoder);
-extern struct radeon_encoder_int_tmds *
-radeon_combios_get_tmds_info(struct radeon_encoder *encoder);
 extern void radeon_combios_get_ext_tmds_info(struct radeon_encoder *encoder);
 extern struct radeon_encoder_tv_dac *
 radeon_combios_get_tv_dac_info(struct radeon_encoder *encoder);
@@ -356,6 +395,8 @@ extern void radeon_combios_output_lock(struct drm_encoder *encoder, bool lock);
 extern void radeon_combios_initialize_bios_scratch_regs(struct drm_device *dev);
 extern void radeon_atom_output_lock(struct drm_encoder *encoder, bool lock);
 extern void radeon_atom_initialize_bios_scratch_regs(struct drm_device *dev);
+extern void radeon_save_bios_scratch_regs(struct radeon_device *rdev);
+extern void radeon_restore_bios_scratch_regs(struct radeon_device *rdev);
 extern void
 radeon_atombios_encoder_crtc_scratch_regs(struct drm_encoder *encoder, int crtc);
 extern void
@@ -396,6 +437,19 @@ extern int radeon_static_clocks_init(struct drm_device *dev);
 bool radeon_crtc_scaling_mode_fixup(struct drm_crtc *crtc,
                                        struct drm_display_mode *mode,
                                        struct drm_display_mode *adjusted_mode);
-void atom_rv515_force_tv_scaler(struct radeon_device *rdev);
+void atom_rv515_force_tv_scaler(struct radeon_device *rdev, struct radeon_crtc *radeon_crtc);
+/* legacy tv */
+void radeon_legacy_tv_adjust_crtc_reg(struct drm_encoder *encoder,
+                                      uint32_t *h_total_disp, uint32_t *h_sync_strt_wid,
+                                      uint32_t *v_total_disp, uint32_t *v_sync_strt_wid);
+void radeon_legacy_tv_adjust_pll1(struct drm_encoder *encoder,
+                                  uint32_t *htotal_cntl, uint32_t *ppll_ref_div,
+                                  uint32_t *ppll_div_3, uint32_t *pixclks_cntl);
+void radeon_legacy_tv_adjust_pll2(struct drm_encoder *encoder,
+                                  uint32_t *htotal2_cntl, uint32_t *p2pll_ref_div,
+                                  uint32_t *p2pll_div_0, uint32_t *pixclks_cntl);
+void radeon_legacy_tv_mode_set(struct drm_encoder *encoder,
+                               struct drm_display_mode *mode,
+                               struct drm_display_mode *adjusted_mode);
 #endif
diff --git a/drivers/gpu/drm/radeon/radeon_object.c b/drivers/gpu/drm/radeon/radeon_object.c
index b85fb83d7ae8..73af463b7a59 100644
--- a/drivers/gpu/drm/radeon/radeon_object.c
+++ b/drivers/gpu/drm/radeon/radeon_object.c
@@ -188,6 +188,7 @@ int radeon_object_kmap(struct radeon_object *robj, void **ptr)
        if (ptr) {
                *ptr = robj->kptr;
        }
+        radeon_object_check_tiling(robj, 0, 0);
        return 0;
 }
@@ -200,6 +201,7 @@ void radeon_object_kunmap(struct radeon_object *robj)
        }
        robj->kptr = NULL;
        spin_unlock(&robj->tobj.lock);
+        radeon_object_check_tiling(robj, 0, 0);
        ttm_bo_kunmap(&robj->kmap);
 }
@@ -369,6 +371,14 @@ void radeon_object_force_delete(struct radeon_device *rdev)
 int radeon_object_init(struct radeon_device *rdev)
 {
+        /* Add an MTRR for the VRAM */
+        rdev->mc.vram_mtrr = mtrr_add(rdev->mc.aper_base, rdev->mc.aper_size,
+                        MTRR_TYPE_WRCOMB, 1);
+        DRM_INFO("Detected VRAM RAM=%lluM, BAR=%lluM\n",
+                rdev->mc.mc_vram_size >> 20,
+                (unsigned long long)rdev->mc.aper_size >> 20);
+        DRM_INFO("RAM width %dbits %cDR\n",
+                        rdev->mc.vram_width, rdev->mc.vram_is_ddr ? 'D' : 'S');
        return radeon_ttm_init(rdev);
 }
diff --git a/drivers/gpu/drm/radeon/radeon_object.h b/drivers/gpu/drm/radeon/radeon_object.h
index 473e4775dc5a..10e8af6bb456 100644
--- a/drivers/gpu/drm/radeon/radeon_object.h
+++ b/drivers/gpu/drm/radeon/radeon_object.h
@@ -37,6 +37,7 @@
 * TTM.
 */
 struct radeon_mman {
+        struct ttm_bo_global_ref        bo_global_ref;
        struct ttm_global_reference     mem_global_ref;
        bool                            mem_global_referenced;
        struct ttm_bo_device            bdev;
diff --git a/drivers/gpu/drm/radeon/radeon_reg.h b/drivers/gpu/drm/radeon/radeon_reg.h
index 4df43f62c678..21da871a793c 100644
--- a/drivers/gpu/drm/radeon/radeon_reg.h
+++ b/drivers/gpu/drm/radeon/radeon_reg.h
@@ -1945,6 +1945,11 @@
 #       define RADEON_TXFORMAT_DXT1               (12 <<  0)
 #       define RADEON_TXFORMAT_DXT23              (14 <<  0)
 #       define RADEON_TXFORMAT_DXT45              (15 <<  0)
+#       define RADEON_TXFORMAT_SHADOW16           (16 <<  0)
+#       define RADEON_TXFORMAT_SHADOW32           (17 <<  0)
+#       define RADEON_TXFORMAT_DUDV88             (18 <<  0)
+#       define RADEON_TXFORMAT_LDUDV655           (19 <<  0)
+#       define RADEON_TXFORMAT_LDUDUV8888         (20 <<  0)
 #       define RADEON_TXFORMAT_FORMAT_MASK        (31 <<  0)
 #       define RADEON_TXFORMAT_FORMAT_SHIFT       0
 #       define RADEON_TXFORMAT_APPLE_YUV_MODE     (1  <<  5)
@@ -2203,7 +2208,7 @@
 #       define RADEON_ROP_ENABLE               (1  <<  6)
 #       define RADEON_STENCIL_ENABLE           (1  <<  7)
 #       define RADEON_Z_ENABLE                 (1  <<  8)
-#       define RADEON_DEPTH_XZ_OFFEST_ENABLE   (1  <<  9)
+#       define RADEON_DEPTHXY_OFFSET_ENABLE    (1  <<  9)
 #       define RADEON_RB3D_COLOR_FORMAT_SHIFT  10
 #       define RADEON_COLOR_FORMAT_ARGB1555    3
@@ -2773,7 +2778,12 @@
 #       define R200_TXFORMAT_DXT1               (12 << 0)
 #       define R200_TXFORMAT_DXT23              (14 << 0)
 #       define R200_TXFORMAT_DXT45              (15 << 0)
+#       define R200_TXFORMAT_DVDU88             (18 << 0)
+#       define R200_TXFORMAT_LDVDU655           (19 << 0)
+#       define R200_TXFORMAT_LDVDU8888          (20 << 0)
+#       define R200_TXFORMAT_GR1616             (21 << 0)
 #       define R200_TXFORMAT_ABGR8888           (22 << 0)
+#       define R200_TXFORMAT_BGR111110          (23 << 0)
 #       define R200_TXFORMAT_FORMAT_MASK        (31 <<  0)
 #       define R200_TXFORMAT_FORMAT_SHIFT       0
 #       define R200_TXFORMAT_ALPHA_IN_MAP       (1 << 6)
@@ -2818,6 +2828,13 @@
 #define R200_PP_TXPITCH_4                       0x2c90 /* NPOT only */
 #define R200_PP_TXPITCH_5                       0x2cb0 /* NPOT only */
+#define R200_PP_CUBIC_FACES_0                   0x2c18
+#define R200_PP_CUBIC_FACES_1                   0x2c38
+#define R200_PP_CUBIC_FACES_2                   0x2c58
+#define R200_PP_CUBIC_FACES_3                   0x2c78
+#define R200_PP_CUBIC_FACES_4                   0x2c98
+#define R200_PP_CUBIC_FACES_5                   0x2cb8
 #define R200_PP_TXOFFSET_0                      0x2d00
 #       define R200_TXO_ENDIAN_NO_SWAP          (0 << 0)
 #       define R200_TXO_ENDIAN_BYTE_SWAP        (1 << 0)
@@ -2829,11 +2846,44 @@
 #       define R200_TXO_MICRO_TILE              (1 << 3)
 #       define R200_TXO_OFFSET_MASK             0xffffffe0
 #       define R200_TXO_OFFSET_SHIFT            5
+#define R200_PP_CUBIC_OFFSET_F1_0         0x2d04
+#define R200_PP_CUBIC_OFFSET_F2_0         0x2d08
+#define R200_PP_CUBIC_OFFSET_F3_0         0x2d0c
+#define R200_PP_CUBIC_OFFSET_F4_0         0x2d10
+#define R200_PP_CUBIC_OFFSET_F5_0         0x2d14
 #define R200_PP_TXOFFSET_1                      0x2d18
+#define R200_PP_CUBIC_OFFSET_F1_1         0x2d1c
+#define R200_PP_CUBIC_OFFSET_F2_1         0x2d20
+#define R200_PP_CUBIC_OFFSET_F3_1         0x2d24
+#define R200_PP_CUBIC_OFFSET_F4_1         0x2d28
+#define R200_PP_CUBIC_OFFSET_F5_1         0x2d2c
 #define R200_PP_TXOFFSET_2                      0x2d30
+#define R200_PP_CUBIC_OFFSET_F1_2         0x2d34
+#define R200_PP_CUBIC_OFFSET_F2_2         0x2d38
+#define R200_PP_CUBIC_OFFSET_F3_2         0x2d3c
+#define R200_PP_CUBIC_OFFSET_F4_2         0x2d40
+#define R200_PP_CUBIC_OFFSET_F5_2         0x2d44
 #define R200_PP_TXOFFSET_3                      0x2d48
+#define R200_PP_CUBIC_OFFSET_F1_3         0x2d4c
+#define R200_PP_CUBIC_OFFSET_F2_3         0x2d50
+#define R200_PP_CUBIC_OFFSET_F3_3         0x2d54
+#define R200_PP_CUBIC_OFFSET_F4_3         0x2d58
+#define R200_PP_CUBIC_OFFSET_F5_3         0x2d5c
 #define R200_PP_TXOFFSET_4                      0x2d60
+#define R200_PP_CUBIC_OFFSET_F1_4         0x2d64
+#define R200_PP_CUBIC_OFFSET_F2_4         0x2d68
+#define R200_PP_CUBIC_OFFSET_F3_4         0x2d6c
+#define R200_PP_CUBIC_OFFSET_F4_4         0x2d70
+#define R200_PP_CUBIC_OFFSET_F5_4         0x2d74
 #define R200_PP_TXOFFSET_5                      0x2d78
+#define R200_PP_CUBIC_OFFSET_F1_5         0x2d7c
+#define R200_PP_CUBIC_OFFSET_F2_5         0x2d80
+#define R200_PP_CUBIC_OFFSET_F3_5         0x2d84
+#define R200_PP_CUBIC_OFFSET_F4_5         0x2d88
+#define R200_PP_CUBIC_OFFSET_F5_5         0x2d8c
 #define R200_PP_TFACTOR_0                       0x2ee0
 #define R200_PP_TFACTOR_1                       0x2ee4
@@ -3175,6 +3225,11 @@
 #       define R200_FORCE_INORDER_PROC          (1<<31)
 #define R200_PP_CNTL_X                          0x2cc4
 #define R200_PP_TXMULTI_CTL_0                   0x2c1c
+#define R200_PP_TXMULTI_CTL_1                   0x2c3c
+#define R200_PP_TXMULTI_CTL_2                   0x2c5c
+#define R200_PP_TXMULTI_CTL_3                   0x2c7c
+#define R200_PP_TXMULTI_CTL_4                   0x2c9c
+#define R200_PP_TXMULTI_CTL_5                   0x2cbc
 #define R200_SE_VTX_STATE_CNTL                  0x2180
 #       define R200_UPDATE_USER_COLOR_0_ENA_MASK (1<<16)
@@ -3200,6 +3255,24 @@
 #define RADEON_CP_RB_WPTR                   0x0714
 #define RADEON_CP_RB_RPTR_WR                0x071c
+#define RADEON_SCRATCH_UMSK                 0x0770
+#define RADEON_SCRATCH_ADDR                 0x0774
+#define R600_CP_RB_BASE                     0xc100
+#define R600_CP_RB_CNTL                     0xc104
+#       define R600_RB_BUFSZ(x)             ((x) << 0)
+#       define R600_RB_BLKSZ(x)             ((x) << 8)
+#       define R600_RB_NO_UPDATE            (1 << 27)
+#       define R600_RB_RPTR_WR_ENA          (1 << 31)
+#define R600_CP_RB_RPTR_WR                  0xc108
+#define R600_CP_RB_RPTR_ADDR                0xc10c
+#define R600_CP_RB_RPTR_ADDR_HI             0xc110
+#define R600_CP_RB_WPTR                     0xc114
+#define R600_CP_RB_WPTR_ADDR                0xc118
+#define R600_CP_RB_WPTR_ADDR_HI             0xc11c
+#define R600_CP_RB_RPTR                     0x8700
+#define R600_CP_RB_WPTR_DELAY               0x8704
 #define RADEON_CP_IB_BASE                   0x0738
 #define RADEON_CP_IB_BUFSZ                  0x073c
@@ -3407,7 +3480,9 @@
 #       define RADEON_RGB_CONVERT_BY_PASS         (1 << 10)
 #       define RADEON_UVRAM_READ_MARGIN_SHIFT     16
 #       define RADEON_FIFORAM_FFMACRO_READ_MARGIN_SHIFT   20
-#       define RADEON_TVOUT_SCALE_EN              (1 << 26)
+#       define RADEON_RGB_ATTEN_SEL(x)            ((x) << 24)
+#       define RADEON_TVOUT_SCALE_EN              (1 << 26)
+#       define RADEON_RGB_ATTEN_VAL(x)            ((x) << 28)
 #define RADEON_TV_SYNC_CNTL                          0x0808
 #       define RADEON_SYNC_OE                     (1 <<  0)
 #       define RADEON_SYNC_OUT                    (1 <<  1)
diff --git a/drivers/gpu/drm/radeon/radeon_ring.c b/drivers/gpu/drm/radeon/radeon_ring.c
index 60d159308b88..747b4bffb84b 100644
--- a/drivers/gpu/drm/radeon/radeon_ring.c
+++ b/drivers/gpu/drm/radeon/radeon_ring.c
@@ -56,10 +56,12 @@ int radeon_ib_get(struct radeon_device *rdev, struct radeon_ib **ib)
                set_bit(i, rdev->ib_pool.alloc_bm);
                rdev->ib_pool.ibs[i].length_dw = 0;
                *ib = &rdev->ib_pool.ibs[i];
+                mutex_unlock(&rdev->ib_pool.mutex);
                goto out;
        }
        if (list_empty(&rdev->ib_pool.scheduled_ibs)) {
                /* we go do nothings here */
+                mutex_unlock(&rdev->ib_pool.mutex);
                DRM_ERROR("all IB allocated none scheduled.\n");
                r = -EINVAL;
                goto out;
@@ -69,10 +71,13 @@ int radeon_ib_get(struct radeon_device *rdev, struct radeon_ib **ib)
                         struct radeon_ib, list);
        if (nib->fence == NULL) {
                /* we go do nothings here */
+                mutex_unlock(&rdev->ib_pool.mutex);
                DRM_ERROR("IB %lu scheduled without a fence.\n", nib->idx);
                r = -EINVAL;
                goto out;
        }
+        mutex_unlock(&rdev->ib_pool.mutex);
        r = radeon_fence_wait(nib->fence, false);
        if (r) {
                DRM_ERROR("radeon: IB(%lu:0x%016lX:%u)\n", nib->idx,
@@ -81,12 +86,17 @@ int radeon_ib_get(struct radeon_device *rdev, struct radeon_ib **ib)
                goto out;
        }
        radeon_fence_unref(&nib->fence);
        nib->length_dw = 0;
+        /* scheduled list is accessed here */
+        mutex_lock(&rdev->ib_pool.mutex);
        list_del(&nib->list);
        INIT_LIST_HEAD(&nib->list);
+        mutex_unlock(&rdev->ib_pool.mutex);
        *ib = nib;
 out:
-        mutex_unlock(&rdev->ib_pool.mutex);
        if (r) {
                radeon_fence_unref(&fence);
        } else {
@@ -111,47 +121,36 @@ void radeon_ib_free(struct radeon_device *rdev, struct radeon_ib **ib)
        }
        list_del(&tmp->list);
        INIT_LIST_HEAD(&tmp->list);
-        if (tmp->fence) {
+        if (tmp->fence)
                radeon_fence_unref(&tmp->fence);
-        }
        tmp->length_dw = 0;
        clear_bit(tmp->idx, rdev->ib_pool.alloc_bm);
        mutex_unlock(&rdev->ib_pool.mutex);
 }
-static void radeon_ib_align(struct radeon_device *rdev, struct radeon_ib *ib)
-{
-        while ((ib->length_dw & rdev->cp.align_mask)) {
-                ib->ptr[ib->length_dw++] = PACKET2(0);
-        }
-}
 int radeon_ib_schedule(struct radeon_device *rdev, struct radeon_ib *ib)
 {
        int r = 0;
-        mutex_lock(&rdev->ib_pool.mutex);
-        radeon_ib_align(rdev, ib);
        if (!ib->length_dw || !rdev->cp.ready) {
                /* TODO: Nothings in the ib we should report. */
-                mutex_unlock(&rdev->ib_pool.mutex);
                DRM_ERROR("radeon: couldn't schedule IB(%lu).\n", ib->idx);
                return -EINVAL;
        }
        /* 64 dwords should be enough for fence too */
        r = radeon_ring_lock(rdev, 64);
        if (r) {
                DRM_ERROR("radeon: scheduling IB failled (%d).\n", r);
-                mutex_unlock(&rdev->ib_pool.mutex);
                return r;
        }
-        radeon_ring_write(rdev, PACKET0(RADEON_CP_IB_BASE, 1));
+        radeon_ring_ib_execute(rdev, ib);
-        radeon_ring_write(rdev, ib->gpu_addr);
-        radeon_ring_write(rdev, ib->length_dw);
        radeon_fence_emit(rdev, ib->fence);
-        radeon_ring_unlock_commit(rdev);
+        mutex_lock(&rdev->ib_pool.mutex);
        list_add_tail(&ib->list, &rdev->ib_pool.scheduled_ibs);
        mutex_unlock(&rdev->ib_pool.mutex);
+        radeon_ring_unlock_commit(rdev);
        return 0;
 }
@@ -162,6 +161,8 @@ int radeon_ib_pool_init(struct radeon_device *rdev)
        int i;
        int r = 0;
+        if (rdev->ib_pool.robj)
+                return 0;
        /* Allocate 1M object buffer */
        INIT_LIST_HEAD(&rdev->ib_pool.scheduled_ibs);
        r = radeon_object_create(rdev, NULL,  RADEON_IB_POOL_SIZE*64*1024,
@@ -215,69 +216,16 @@ void radeon_ib_pool_fini(struct radeon_device *rdev)
        mutex_unlock(&rdev->ib_pool.mutex);
 }
-int radeon_ib_test(struct radeon_device *rdev)
-{
-        struct radeon_ib *ib;
-        uint32_t scratch;
-        uint32_t tmp = 0;
-        unsigned i;
-        int r;
-        r = radeon_scratch_get(rdev, &scratch);
-        if (r) {
-                DRM_ERROR("radeon: failed to get scratch reg (%d).\n", r);
-                return r;
-        }
-        WREG32(scratch, 0xCAFEDEAD);
-        r = radeon_ib_get(rdev, &ib);
-        if (r) {
-                return r;
-        }
-        ib->ptr[0] = PACKET0(scratch, 0);
-        ib->ptr[1] = 0xDEADBEEF;
-        ib->ptr[2] = PACKET2(0);
-        ib->ptr[3] = PACKET2(0);
-        ib->ptr[4] = PACKET2(0);
-        ib->ptr[5] = PACKET2(0);
-        ib->ptr[6] = PACKET2(0);
-        ib->ptr[7] = PACKET2(0);
-        ib->length_dw = 8;
-        r = radeon_ib_schedule(rdev, ib);
-        if (r) {
-                radeon_scratch_free(rdev, scratch);
-                radeon_ib_free(rdev, &ib);
-                return r;
-        }
-        r = radeon_fence_wait(ib->fence, false);
-        if (r) {
-                return r;
-        }
-        for (i = 0; i < rdev->usec_timeout; i++) {
-                tmp = RREG32(scratch);
-                if (tmp == 0xDEADBEEF) {
-                        break;
-                }
-                DRM_UDELAY(1);
-        }
-        if (i < rdev->usec_timeout) {
-                DRM_INFO("ib test succeeded in %u usecs\n", i);
-        } else {
-                DRM_ERROR("radeon: ib test failed (sracth(0x%04X)=0x%08X)\n",
-                          scratch, tmp);
-                r = -EINVAL;
-        }
-        radeon_scratch_free(rdev, scratch);
-        radeon_ib_free(rdev, &ib);
-        return r;
-}
 /*
 * Ring.
 */
 void radeon_ring_free_size(struct radeon_device *rdev)
 {
-        rdev->cp.rptr = RREG32(RADEON_CP_RB_RPTR);
+        if (rdev->family >= CHIP_R600)
+                rdev->cp.rptr = RREG32(R600_CP_RB_RPTR);
+        else
+                rdev->cp.rptr = RREG32(RADEON_CP_RB_RPTR);
        /* This works because ring_size is a power of 2 */
        rdev->cp.ring_free_dw = (rdev->cp.rptr + (rdev->cp.ring_size / 4));
        rdev->cp.ring_free_dw -= rdev->cp.wptr;
@@ -320,11 +268,10 @@ void radeon_ring_unlock_commit(struct radeon_device *rdev)
        count_dw_pad = (rdev->cp.align_mask + 1) -
                       (rdev->cp.wptr & rdev->cp.align_mask);
        for (i = 0; i < count_dw_pad; i++) {
-                radeon_ring_write(rdev, PACKET2(0));
+                radeon_ring_write(rdev, 2 << 30);
        }
        DRM_MEMORYBARRIER();
-        WREG32(RADEON_CP_RB_WPTR, rdev->cp.wptr);
+        radeon_cp_commit(rdev);
-        (void)RREG32(RADEON_CP_RB_WPTR);
        mutex_unlock(&rdev->cp.mutex);
 }
@@ -334,46 +281,6 @@ void radeon_ring_unlock_undo(struct radeon_device *rdev)
        mutex_unlock(&rdev->cp.mutex);
 }
-int radeon_ring_test(struct radeon_device *rdev)
-{
-        uint32_t scratch;
-        uint32_t tmp = 0;
-        unsigned i;
-        int r;
-        r = radeon_scratch_get(rdev, &scratch);
-        if (r) {
-                DRM_ERROR("radeon: cp failed to get scratch reg (%d).\n", r);
-                return r;
-        }
-        WREG32(scratch, 0xCAFEDEAD);
-        r = radeon_ring_lock(rdev, 2);
-        if (r) {
-                DRM_ERROR("radeon: cp failed to lock ring (%d).\n", r);
-                radeon_scratch_free(rdev, scratch);
-                return r;
-        }
-        radeon_ring_write(rdev, PACKET0(scratch, 0));
-        radeon_ring_write(rdev, 0xDEADBEEF);
-        radeon_ring_unlock_commit(rdev);
-        for (i = 0; i < rdev->usec_timeout; i++) {
-                tmp = RREG32(scratch);
-                if (tmp == 0xDEADBEEF) {
-                        break;
-                }
-                DRM_UDELAY(1);
-        }
-        if (i < rdev->usec_timeout) {
-                DRM_INFO("ring test succeeded in %d usecs\n", i);
-        } else {
-                DRM_ERROR("radeon: ring test failed (sracth(0x%04X)=0x%08X)\n",
-                          scratch, tmp);
-                r = -EINVAL;
-        }
-        radeon_scratch_free(rdev, scratch);
-        return r;
-}
 int radeon_ring_init(struct radeon_device *rdev, unsigned ring_size)
 {
        int r;
diff --git a/drivers/gpu/drm/radeon/radeon_share.h b/drivers/gpu/drm/radeon/radeon_share.h
deleted file mode 100644
index 63a773578f17..000000000000
--- a/drivers/gpu/drm/radeon/radeon_share.h
+++ /dev/null
@@ -1,39 +0,0 @@
-/*
- * Copyright 2008 Advanced Micro Devices, Inc.
- * Copyright 2008 Red Hat Inc.
- * Copyright 2009 Jerome Glisse.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- *
- * Authors: Dave Airlie
- *          Alex Deucher
- *          Jerome Glisse
- */
-#ifndef __RADEON_SHARE_H__
-#define __RADEON_SHARE_H__
-void r100_vram_init_sizes(struct radeon_device *rdev);
-void rs690_line_buffer_adjust(struct radeon_device *rdev,
-                              struct drm_display_mode *mode1,
-                              struct drm_display_mode *mode2);
-void rv515_bandwidth_avivo_update(struct radeon_device *rdev);
-#endif
diff --git a/drivers/gpu/drm/radeon/radeon_state.c b/drivers/gpu/drm/radeon/radeon_state.c
index 2882f40d5ec5..38537d971a3e 100644
--- a/drivers/gpu/drm/radeon/radeon_state.c
+++ b/drivers/gpu/drm/radeon/radeon_state.c
@@ -1546,7 +1546,7 @@ static void radeon_cp_dispatch_vertex(struct drm_device * dev,
        } while (i < nbox);
 }
-static void radeon_cp_discard_buffer(struct drm_device *dev, struct drm_master *master, struct drm_buf *buf)
+void radeon_cp_discard_buffer(struct drm_device *dev, struct drm_master *master, struct drm_buf *buf)
 {
        drm_radeon_private_t *dev_priv = dev->dev_private;
        struct drm_radeon_master_private *master_priv = master->driver_priv;
@@ -2213,7 +2213,10 @@ static int radeon_cp_swap(struct drm_device *dev, void *data, struct drm_file *f
        if (sarea_priv->nbox > RADEON_NR_SAREA_CLIPRECTS)
                sarea_priv->nbox = RADEON_NR_SAREA_CLIPRECTS;
-        radeon_cp_dispatch_swap(dev, file_priv->master);
+        if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
+                r600_cp_dispatch_swap(dev, file_priv);
+        else
+                radeon_cp_dispatch_swap(dev, file_priv->master);
        sarea_priv->ctx_owner = 0;
        COMMIT_RING();
@@ -2412,7 +2415,10 @@ static int radeon_cp_texture(struct drm_device *dev, void *data, struct drm_file
        RING_SPACE_TEST_WITH_RETURN(dev_priv);
        VB_AGE_TEST_WITH_RETURN(dev_priv);
-        ret = radeon_cp_dispatch_texture(dev, file_priv, tex, &image);
+        if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
+                ret = r600_cp_dispatch_texture(dev, file_priv, tex, &image);
+        else
+                ret = radeon_cp_dispatch_texture(dev, file_priv, tex, &image);
        return ret;
 }
@@ -2495,8 +2501,9 @@ static int radeon_cp_indirect(struct drm_device *dev, void *data, struct drm_fil
                radeon_cp_dispatch_indirect(dev, buf, indirect->start, indirect->end);
        }
-        if (indirect->discard)
+        if (indirect->discard) {
                radeon_cp_discard_buffer(dev, file_priv->master, buf);
+        }
        COMMIT_RING();
        return 0;
@@ -3027,7 +3034,10 @@ static int radeon_cp_getparam(struct drm_device *dev, void *data, struct drm_fil
                value = GET_SCRATCH(dev_priv, 2);
                break;
        case RADEON_PARAM_IRQ_NR:
-                value = drm_dev_to_irq(dev);
+                if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
+                        value = 0;
+                else
+                        value = drm_dev_to_irq(dev);
                break;
        case RADEON_PARAM_GART_BASE:
                value = dev_priv->gart_vm_start;
@@ -3227,7 +3237,8 @@ struct drm_ioctl_desc radeon_ioctls[] = {
        DRM_IOCTL_DEF(DRM_RADEON_IRQ_WAIT, radeon_irq_wait, DRM_AUTH),
        DRM_IOCTL_DEF(DRM_RADEON_SETPARAM, radeon_cp_setparam, DRM_AUTH),
        DRM_IOCTL_DEF(DRM_RADEON_SURF_ALLOC, radeon_surface_alloc, DRM_AUTH),
-        DRM_IOCTL_DEF(DRM_RADEON_SURF_FREE, radeon_surface_free, DRM_AUTH)
+        DRM_IOCTL_DEF(DRM_RADEON_SURF_FREE, radeon_surface_free, DRM_AUTH),
+        DRM_IOCTL_DEF(DRM_RADEON_CS, r600_cs_legacy_ioctl, DRM_AUTH)
 };
 int radeon_max_ioctl = DRM_ARRAY_SIZE(radeon_ioctls);
diff --git a/drivers/gpu/drm/radeon/radeon_ttm.c b/drivers/gpu/drm/radeon/radeon_ttm.c
index 15c3531377ed..acd889c94549 100644
--- a/drivers/gpu/drm/radeon/radeon_ttm.c
+++ b/drivers/gpu/drm/radeon/radeon_ttm.c
@@ -35,11 +35,14 @@
 #include <ttm/ttm_module.h>
 #include <drm/drmP.h>
 #include <drm/radeon_drm.h>
+#include <linux/seq_file.h>
 #include "radeon_reg.h"
 #include "radeon.h"
 #define DRM_FILE_PAGE_OFFSET (0x100000000ULL >> PAGE_SHIFT)
+static int radeon_ttm_debugfs_init(struct radeon_device *rdev);
 static struct radeon_device *radeon_get_rdev(struct ttm_bo_device *bdev)
 {
        struct radeon_mman *mman;
@@ -77,9 +80,25 @@ static int radeon_ttm_global_init(struct radeon_device *rdev)
        global_ref->release = &radeon_ttm_mem_global_release;
        r = ttm_global_item_ref(global_ref);
        if (r != 0) {
-                DRM_ERROR("Failed referencing a global TTM memory object.\n");
+                DRM_ERROR("Failed setting up TTM memory accounting "
+                          "subsystem.\n");
+                return r;
+        }
+        rdev->mman.bo_global_ref.mem_glob =
+                rdev->mman.mem_global_ref.object;
+        global_ref = &rdev->mman.bo_global_ref.ref;
+        global_ref->global_type = TTM_GLOBAL_TTM_BO;
+        global_ref->size = sizeof(struct ttm_bo_global);
+        global_ref->init = &ttm_bo_global_init;
+        global_ref->release = &ttm_bo_global_release;
+        r = ttm_global_item_ref(global_ref);
+        if (r != 0) {
+                DRM_ERROR("Failed setting up TTM BO subsystem.\n");
+                ttm_global_item_unref(&rdev->mman.mem_global_ref);
                return r;
        }
        rdev->mman.mem_global_referenced = true;
        return 0;
 }
@@ -87,6 +106,7 @@ static int radeon_ttm_global_init(struct radeon_device *rdev)
 static void radeon_ttm_global_fini(struct radeon_device *rdev)
 {
        if (rdev->mman.mem_global_referenced) {
+                ttm_global_item_unref(&rdev->mman.bo_global_ref.ref);
                ttm_global_item_unref(&rdev->mman.mem_global_ref);
                rdev->mman.mem_global_referenced = false;
        }
@@ -286,9 +306,11 @@ static int radeon_move_vram_ram(struct ttm_buffer_object *bo,
        r = ttm_bo_move_ttm(bo, true, no_wait, new_mem);
 out_cleanup:
        if (tmp_mem.mm_node) {
-                spin_lock(&rdev->mman.bdev.lru_lock);
+                struct ttm_bo_global *glob = rdev->mman.bdev.glob;
+                spin_lock(&glob->lru_lock);
                drm_mm_put_block(tmp_mem.mm_node);
-                spin_unlock(&rdev->mman.bdev.lru_lock);
+                spin_unlock(&glob->lru_lock);
                return r;
        }
        return r;
@@ -323,9 +345,11 @@ static int radeon_move_ram_vram(struct ttm_buffer_object *bo,
        }
 out_cleanup:
        if (tmp_mem.mm_node) {
-                spin_lock(&rdev->mman.bdev.lru_lock);
+                struct ttm_bo_global *glob = rdev->mman.bdev.glob;
+                spin_lock(&glob->lru_lock);
                drm_mm_put_block(tmp_mem.mm_node);
-                spin_unlock(&rdev->mman.bdev.lru_lock);
+                spin_unlock(&glob->lru_lock);
                return r;
        }
        return r;
@@ -352,9 +376,8 @@ static int radeon_bo_move(struct ttm_buffer_object *bo,
                radeon_move_null(bo, new_mem);
                return 0;
        }
-        if (!rdev->cp.ready) {
+        if (!rdev->cp.ready || rdev->asic->copy == NULL) {
                /* use memcpy */
-                DRM_ERROR("CP is not ready use memcpy.\n");
                goto memcpy;
        }
@@ -446,7 +469,7 @@ int radeon_ttm_init(struct radeon_device *rdev)
        }
        /* No others user of address space so set it to 0 */
        r = ttm_bo_device_init(&rdev->mman.bdev,
-                               rdev->mman.mem_global_ref.object,
+                               rdev->mman.bo_global_ref.ref.object,
                               &radeon_bo_driver, DRM_FILE_PAGE_OFFSET,
                               rdev->need_dma32);
        if (r) {
@@ -471,7 +494,7 @@ int radeon_ttm_init(struct radeon_device *rdev)
                return r;
        }
        DRM_INFO("radeon: %uM of VRAM memory ready\n",
-                 rdev->mc.real_vram_size / (1024 * 1024));
+                 (unsigned)rdev->mc.real_vram_size / (1024 * 1024));
        r = ttm_bo_init_mm(&rdev->mman.bdev, TTM_PL_TT, 0,
                           ((rdev->mc.gtt_size) >> PAGE_SHIFT));
        if (r) {
@@ -479,10 +502,16 @@ int radeon_ttm_init(struct radeon_device *rdev)
                return r;
        }
        DRM_INFO("radeon: %uM of GTT memory ready.\n",
-                 rdev->mc.gtt_size / (1024 * 1024));
+                 (unsigned)(rdev->mc.gtt_size / (1024 * 1024)));
        if (unlikely(rdev->mman.bdev.dev_mapping == NULL)) {
                rdev->mman.bdev.dev_mapping = rdev->ddev->dev_mapping;
        }
+        r = radeon_ttm_debugfs_init(rdev);
+        if (r) {
+                DRM_ERROR("Failed to init debugfs\n");
+                return r;
+        }
        return 0;
 }
@@ -657,3 +686,50 @@ struct ttm_backend *radeon_ttm_backend_create(struct radeon_device *rdev)
        gtt->bound = false;
        return &gtt->backend;
 }
+#define RADEON_DEBUGFS_MEM_TYPES 2
+static struct drm_info_list radeon_mem_types_list[RADEON_DEBUGFS_MEM_TYPES];
+static char radeon_mem_types_names[RADEON_DEBUGFS_MEM_TYPES][32];
+#if defined(CONFIG_DEBUG_FS)
+static int radeon_mm_dump_table(struct seq_file *m, void *data)
+{
+        struct drm_info_node *node = (struct drm_info_node *)m->private;
+        struct drm_mm *mm = (struct drm_mm *)node->info_ent->data;
+        struct drm_device *dev = node->minor->dev;
+        struct radeon_device *rdev = dev->dev_private;
+        int ret;
+        struct ttm_bo_global *glob = rdev->mman.bdev.glob;
+        spin_lock(&glob->lru_lock);
+        ret = drm_mm_dump_table(m, mm);
+        spin_unlock(&glob->lru_lock);
+        return ret;
+}
+#endif
+static int radeon_ttm_debugfs_init(struct radeon_device *rdev)
+{
+        unsigned i;
+#if defined(CONFIG_DEBUG_FS)
+        for (i = 0; i < RADEON_DEBUGFS_MEM_TYPES; i++) {
+                if (i == 0)
+                        sprintf(radeon_mem_types_names[i], "radeon_vram_mm");
+                else
+                        sprintf(radeon_mem_types_names[i], "radeon_gtt_mm");
+                radeon_mem_types_list[i].name = radeon_mem_types_names[i];
+                radeon_mem_types_list[i].show = &radeon_mm_dump_table;
+                radeon_mem_types_list[i].driver_features = 0;
+                if (i == 0)
+                        radeon_mem_types_list[i].data = &rdev->mman.bdev.man[TTM_PL_VRAM].manager;
+                else
+                        radeon_mem_types_list[i].data = &rdev->mman.bdev.man[TTM_PL_TT].manager;
+        }
+        return radeon_debugfs_add_files(rdev, radeon_mem_types_list, RADEON_DEBUGFS_MEM_TYPES);
+#endif
+        return 0;
+}
diff --git a/drivers/gpu/drm/radeon/reg_srcs/r100 b/drivers/gpu/drm/radeon/reg_srcs/r100
new file mode 100644
index 000000000000..f7ee062f1184
--- /dev/null
+++ b/drivers/gpu/drm/radeon/reg_srcs/r100
@@ -0,0 +1,105 @@
+r100 0x3294
+0x1434 SRC_Y_X
+0x1438 DST_Y_X
+0x143C DST_HEIGHT_WIDTH
+0x146C DP_GUI_MASTER_CNTL
+0x1474 BRUSH_Y_X
+0x1478 DP_BRUSH_BKGD_CLR
+0x147C DP_BRUSH_FRGD_CLR
+0x1480 BRUSH_DATA0
+0x1484 BRUSH_DATA1
+0x1598 DST_WIDTH_HEIGHT
+0x15C0 CLR_CMP_CNTL
+0x15C4 CLR_CMP_CLR_SRC
+0x15C8 CLR_CMP_CLR_DST
+0x15CC CLR_CMP_MSK
+0x15D8 DP_SRC_FRGD_CLR
+0x15DC DP_SRC_BKGD_CLR
+0x1600 DST_LINE_START
+0x1604 DST_LINE_END
+0x1608 DST_LINE_PATCOUNT
+0x16C0 DP_CNTL
+0x16CC DP_WRITE_MSK
+0x16D0 DP_CNTL_XDIR_YDIR_YMAJOR
+0x16E8 DEFAULT_SC_BOTTOM_RIGHT
+0x16EC SC_TOP_LEFT
+0x16F0 SC_BOTTOM_RIGHT
+0x16F4 SRC_SC_BOTTOM_RIGHT
+0x1714 DSTCACHE_CTLSTAT
+0x1720 WAIT_UNTIL
+0x172C RBBM_GUICNTL
+0x1810 FOG_3D_TABLE_START
+0x1814 FOG_3D_TABLE_END
+0x1a14 FOG_TABLE_INDEX
+0x1a18 FOG_TABLE_DATA
+0x1c14 PP_MISC
+0x1c18 PP_FOG_COLOR
+0x1c1c RE_SOLID_COLOR
+0x1c20 RB3D_BLENDCNTL
+0x1c4c SE_CNTL
+0x1c50 SE_COORD_FMT
+0x1c60 PP_TXCBLEND_0
+0x1c64 PP_TXABLEND_0
+0x1c68 PP_TFACTOR_0
+0x1c78 PP_TXCBLEND_1
+0x1c7c PP_TXABLEND_1
+0x1c80 PP_TFACTOR_1
+0x1c90 PP_TXCBLEND_2
+0x1c94 PP_TXABLEND_2
+0x1c98 PP_TFACTOR_2
+0x1cc8 RE_STIPPLE_ADDR
+0x1ccc RE_STIPPLE_DATA
+0x1cd0 RE_LINE_PATTERN
+0x1cd4 RE_LINE_STATE
+0x1d40 PP_BORDER_COLOR0
+0x1d44 PP_BORDER_COLOR1
+0x1d48 PP_BORDER_COLOR2
+0x1d7c RB3D_STENCILREFMASK
+0x1d80 RB3D_ROPCNTL
+0x1d84 RB3D_PLANEMASK
+0x1d98 VAP_VPORT_XSCALE
+0x1d9C VAP_VPORT_XOFFSET
+0x1da0 VAP_VPORT_YSCALE
+0x1da4 VAP_VPORT_YOFFSET
+0x1da8 VAP_VPORT_ZSCALE
+0x1dac VAP_VPORT_ZOFFSET
+0x1db0 SE_ZBIAS_FACTOR
+0x1db4 SE_ZBIAS_CONSTANT
+0x1db8 SE_LINE_WIDTH
+0x2140 SE_CNTL_STATUS
+0x2200 SE_TCL_VECTOR_INDX_REG
+0x2204 SE_TCL_VECTOR_DATA_REG
+0x2208 SE_TCL_SCALAR_INDX_REG
+0x220c SE_TCL_SCALAR_DATA_REG
+0x2210 SE_TCL_MATERIAL_EMISSIVE_RED
+0x2214 SE_TCL_MATERIAL_EMISSIVE_GREEN
+0x2218 SE_TCL_MATERIAL_EMISSIVE_BLUE
+0x221c SE_TCL_MATERIAL_EMISSIVE_ALPHA
+0x2220 SE_TCL_MATERIAL_AMBIENT_RED
+0x2224 SE_TCL_MATERIAL_AMBIENT_GREEN
+0x2228 SE_TCL_MATERIAL_AMBIENT_BLUE
+0x222c SE_TCL_MATERIAL_AMBIENT_ALPHA
+0x2230 SE_TCL_MATERIAL_DIFFUSE_RED
+0x2234 SE_TCL_MATERIAL_DIFFUSE_GREEN
+0x2238 SE_TCL_MATERIAL_DIFFUSE_BLUE
+0x223c SE_TCL_MATERIAL_DIFFUSE_ALPHA
+0x2240 SE_TCL_MATERIAL_SPECULAR_RED
+0x2244 SE_TCL_MATERIAL_SPECULAR_GREEN
+0x2248 SE_TCL_MATERIAL_SPECULAR_BLUE
+0x224c SE_TCL_MATERIAL_SPECULAR_ALPHA
+0x2250 SE_TCL_SHININESS
+0x2254 SE_TCL_OUTPUT_VTX_FMT
+0x2258 SE_TCL_OUTPUT_VTX_SEL
+0x225c SE_TCL_MATRIX_SELECT_0
+0x2260 SE_TCL_MATRIX_SELECT_1
+0x2264 SE_TCL_UCP_VERT_BLEND_CNTL
+0x2268 SE_TCL_TEXTURE_PROC_CTL
+0x226c SE_TCL_LIGHT_MODEL_CTL
+0x2270 SE_TCL_PER_LIGHT_CTL_0
+0x2274 SE_TCL_PER_LIGHT_CTL_1
+0x2278 SE_TCL_PER_LIGHT_CTL_2
+0x227c SE_TCL_PER_LIGHT_CTL_3
+0x2284 SE_TCL_STATE_FLUSH
+0x26c0 RE_TOP_LEFT
+0x26c4 RE_MISC
+0x3290 RB3D_ZPASS_DATA
diff --git a/drivers/gpu/drm/radeon/reg_srcs/r200 b/drivers/gpu/drm/radeon/reg_srcs/r200
new file mode 100644
index 000000000000..6021c8849a16
--- /dev/null
+++ b/drivers/gpu/drm/radeon/reg_srcs/r200
@@ -0,0 +1,184 @@
+r200 0x3294
+0x1434 SRC_Y_X
+0x1438 DST_Y_X
+0x143C DST_HEIGHT_WIDTH
+0x146C DP_GUI_MASTER_CNTL
+0x1474 BRUSH_Y_X
+0x1478 DP_BRUSH_BKGD_CLR
+0x147C DP_BRUSH_FRGD_CLR
+0x1480 BRUSH_DATA0
+0x1484 BRUSH_DATA1
+0x1598 DST_WIDTH_HEIGHT
+0x15C0 CLR_CMP_CNTL
+0x15C4 CLR_CMP_CLR_SRC
+0x15C8 CLR_CMP_CLR_DST
+0x15CC CLR_CMP_MSK
+0x15D8 DP_SRC_FRGD_CLR
+0x15DC DP_SRC_BKGD_CLR
+0x1600 DST_LINE_START
+0x1604 DST_LINE_END
+0x1608 DST_LINE_PATCOUNT
+0x16C0 DP_CNTL
+0x16CC DP_WRITE_MSK
+0x16D0 DP_CNTL_XDIR_YDIR_YMAJOR
+0x16E8 DEFAULT_SC_BOTTOM_RIGHT
+0x16EC SC_TOP_LEFT
+0x16F0 SC_BOTTOM_RIGHT
+0x16F4 SRC_SC_BOTTOM_RIGHT
+0x1714 DSTCACHE_CTLSTAT
+0x1720 WAIT_UNTIL
+0x172C RBBM_GUICNTL
+0x1c14 PP_MISC
+0x1c18 PP_FOG_COLOR
+0x1c1c RE_SOLID_COLOR
+0x1c20 RB3D_BLENDCNTL
+0x1c4c SE_CNTL
+0x1c50 RE_CNTL
+0x1cc8 RE_STIPPLE_ADDR
+0x1ccc RE_STIPPLE_DATA
+0x1cd0 RE_LINE_PATTERN
+0x1cd4 RE_LINE_STATE
+0x1cd8 RE_SCISSOR_TL_0
+0x1cdc RE_SCISSOR_BR_0
+0x1ce0 RE_SCISSOR_TL_1
+0x1ce4 RE_SCISSOR_BR_1
+0x1ce8 RE_SCISSOR_TL_2
+0x1cec RE_SCISSOR_BR_2
+0x1d60 RB3D_DEPTHXY_OFFSET
+0x1d7c RB3D_STENCILREFMASK
+0x1d80 RB3D_ROPCNTL
+0x1d84 RB3D_PLANEMASK
+0x1d98 VAP_VPORT_XSCALE
+0x1d9c VAP_VPORT_XOFFSET
+0x1da0 VAP_VPORT_YSCALE
+0x1da4 VAP_VPORT_YOFFSET
+0x1da8 VAP_VPORT_ZSCALE
+0x1dac VAP_VPORT_ZOFFSET
+0x1db0 SE_ZBIAS_FACTOR
+0x1db4 SE_ZBIAS_CONSTANT
+0x1db8 SE_LINE_WIDTH
+0x2080 SE_VAP_CNTL
+0x2090 SE_TCL_OUTPUT_VTX_FMT_0
+0x2094 SE_TCL_OUTPUT_VTX_FMT_1
+0x20b0 SE_VTE_CNTL
+0x2140 SE_CNTL_STATUS
+0x2180 SE_VTX_STATE_CNTL
+0x2200 SE_TCL_VECTOR_INDX_REG
+0x2204 SE_TCL_VECTOR_DATA_REG
+0x2208 SE_TCL_SCALAR_INDX_REG
+0x220c SE_TCL_SCALAR_DATA_REG
+0x2230 SE_TCL_MATRIX_SEL_0
+0x2234 SE_TCL_MATRIX_SEL_1
+0x2238 SE_TCL_MATRIX_SEL_2
+0x223c SE_TCL_MATRIX_SEL_3
+0x2240 SE_TCL_MATRIX_SEL_4
+0x2250 SE_TCL_OUTPUT_VTX_COMP_SEL
+0x2254 SE_TCL_INPUT_VTX_VECTOR_ADDR_0
+0x2258 SE_TCL_INPUT_VTX_VECTOR_ADDR_1
+0x225c SE_TCL_INPUT_VTX_VECTOR_ADDR_2
+0x2260 SE_TCL_INPUT_VTX_VECTOR_ADDR_3
+0x2268 SE_TCL_LIGHT_MODEL_CTL_0
+0x226c SE_TCL_LIGHT_MODEL_CTL_1
+0x2270 SE_TCL_PER_LIGHT_CTL_0
+0x2274 SE_TCL_PER_LIGHT_CTL_1
+0x2278 SE_TCL_PER_LIGHT_CTL_2
+0x227c SE_TCL_PER_LIGHT_CTL_3
+0x2284 VAP_PVS_STATE_FLUSH_REG
+0x22a8 SE_TCL_TEX_PROC_CTL_2
+0x22ac SE_TCL_TEX_PROC_CTL_3
+0x22b0 SE_TCL_TEX_PROC_CTL_0
+0x22b4 SE_TCL_TEX_PROC_CTL_1
+0x22b8 SE_TCL_TEX_CYL_WRAP_CTL
+0x22c0 SE_TCL_UCP_VERT_BLEND_CNTL
+0x22c4 SE_TCL_POINT_SPRITE_CNTL
+0x2648 RE_POINTSIZE
+0x26c0 RE_TOP_LEFT
+0x26c4 RE_MISC
+0x26f0 RE_AUX_SCISSOR_CNTL
+0x2c14 PP_BORDER_COLOR_0
+0x2c34 PP_BORDER_COLOR_1
+0x2c54 PP_BORDER_COLOR_2
+0x2c74 PP_BORDER_COLOR_3
+0x2c94 PP_BORDER_COLOR_4
+0x2cb4 PP_BORDER_COLOR_5
+0x2cc4 PP_CNTL_X
+0x2cf8 PP_TRI_PERF
+0x2cfc PP_PERF_CNTL
+0x2d9c PP_TAM_DEBUG3
+0x2ee0 PP_TFACTOR_0
+0x2ee4 PP_TFACTOR_1
+0x2ee8 PP_TFACTOR_2
+0x2eec PP_TFACTOR_3
+0x2ef0 PP_TFACTOR_4
+0x2ef4 PP_TFACTOR_5
+0x2ef8 PP_TFACTOR_6
+0x2efc PP_TFACTOR_7
+0x2f00 PP_TXCBLEND_0
+0x2f04 PP_TXCBLEND2_0
+0x2f08 PP_TXABLEND_0
+0x2f0c PP_TXABLEND2_0
+0x2f10 PP_TXCBLEND_1
+0x2f14 PP_TXCBLEND2_1
+0x2f18 PP_TXABLEND_1
+0x2f1c PP_TXABLEND2_1
+0x2f20 PP_TXCBLEND_2
+0x2f24 PP_TXCBLEND2_2
+0x2f28 PP_TXABLEND_2
+0x2f2c PP_TXABLEND2_2
+0x2f30 PP_TXCBLEND_3
+0x2f34 PP_TXCBLEND2_3
+0x2f38 PP_TXABLEND_3
+0x2f3c PP_TXABLEND2_3
+0x2f40 PP_TXCBLEND_4
+0x2f44 PP_TXCBLEND2_4
+0x2f48 PP_TXABLEND_4
+0x2f4c PP_TXABLEND2_4
+0x2f50 PP_TXCBLEND_5
+0x2f54 PP_TXCBLEND2_5
+0x2f58 PP_TXABLEND_5
+0x2f5c PP_TXABLEND2_5
+0x2f60 PP_TXCBLEND_6
+0x2f64 PP_TXCBLEND2_6
+0x2f68 PP_TXABLEND_6
+0x2f6c PP_TXABLEND2_6
+0x2f70 PP_TXCBLEND_7
+0x2f74 PP_TXCBLEND2_7
+0x2f78 PP_TXABLEND_7
+0x2f7c PP_TXABLEND2_7
+0x2f80 PP_TXCBLEND_8
+0x2f84 PP_TXCBLEND2_8
+0x2f88 PP_TXABLEND_8
+0x2f8c PP_TXABLEND2_8
+0x2f90 PP_TXCBLEND_9
+0x2f94 PP_TXCBLEND2_9
+0x2f98 PP_TXABLEND_9
+0x2f9c PP_TXABLEND2_9
+0x2fa0 PP_TXCBLEND_10
+0x2fa4 PP_TXCBLEND2_10
+0x2fa8 PP_TXABLEND_10
+0x2fac PP_TXABLEND2_10
+0x2fb0 PP_TXCBLEND_11
+0x2fb4 PP_TXCBLEND2_11
+0x2fb8 PP_TXABLEND_11
+0x2fbc PP_TXABLEND2_11
+0x2fc0 PP_TXCBLEND_12
+0x2fc4 PP_TXCBLEND2_12
+0x2fc8 PP_TXABLEND_12
+0x2fcc PP_TXABLEND2_12
+0x2fd0 PP_TXCBLEND_13
+0x2fd4 PP_TXCBLEND2_13
+0x2fd8 PP_TXABLEND_13
+0x2fdc PP_TXABLEND2_13
+0x2fe0 PP_TXCBLEND_14
+0x2fe4 PP_TXCBLEND2_14
+0x2fe8 PP_TXABLEND_14
+0x2fec PP_TXABLEND2_14
+0x2ff0 PP_TXCBLEND_15
+0x2ff4 PP_TXCBLEND2_15
+0x2ff8 PP_TXABLEND_15
+0x2ffc PP_TXABLEND2_15
+0x3218 RB3D_BLENCOLOR
+0x321c RB3D_ABLENDCNTL
+0x3220 RB3D_CBLENDCNTL
+0x3290 RB3D_ZPASS_DATA
diff --git a/drivers/gpu/drm/radeon/reg_srcs/r300 b/drivers/gpu/drm/radeon/reg_srcs/r300
new file mode 100644
index 000000000000..19c4663fa9c6
--- /dev/null
+++ b/drivers/gpu/drm/radeon/reg_srcs/r300
@@ -0,0 +1,729 @@
+r300 0x4f60
+0x1434 SRC_Y_X
+0x1438 DST_Y_X
+0x143C DST_HEIGHT_WIDTH
+0x146C DP_GUI_MASTER_CNTL
+0x1474 BRUSH_Y_X
+0x1478 DP_BRUSH_BKGD_CLR
+0x147C DP_BRUSH_FRGD_CLR
+0x1480 BRUSH_DATA0
+0x1484 BRUSH_DATA1
+0x1598 DST_WIDTH_HEIGHT
+0x15C0 CLR_CMP_CNTL
+0x15C4 CLR_CMP_CLR_SRC
+0x15C8 CLR_CMP_CLR_DST
+0x15CC CLR_CMP_MSK
+0x15D8 DP_SRC_FRGD_CLR
+0x15DC DP_SRC_BKGD_CLR
+0x1600 DST_LINE_START
+0x1604 DST_LINE_END
+0x1608 DST_LINE_PATCOUNT
+0x16C0 DP_CNTL
+0x16CC DP_WRITE_MSK
+0x16D0 DP_CNTL_XDIR_YDIR_YMAJOR
+0x16E8 DEFAULT_SC_BOTTOM_RIGHT
+0x16EC SC_TOP_LEFT
+0x16F0 SC_BOTTOM_RIGHT
+0x16F4 SRC_SC_BOTTOM_RIGHT
+0x1714 DSTCACHE_CTLSTAT
+0x1720 WAIT_UNTIL
+0x172C RBBM_GUICNTL
+0x1D98 VAP_VPORT_XSCALE
+0x1D9C VAP_VPORT_XOFFSET
+0x1DA0 VAP_VPORT_YSCALE
+0x1DA4 VAP_VPORT_YOFFSET
+0x1DA8 VAP_VPORT_ZSCALE
+0x1DAC VAP_VPORT_ZOFFSET
+0x2080 VAP_CNTL
+0x2090 VAP_OUT_VTX_FMT_0
+0x2094 VAP_OUT_VTX_FMT_1
+0x20B0 VAP_VTE_CNTL
+0x2138 VAP_VF_MIN_VTX_INDX
+0x2140 VAP_CNTL_STATUS
+0x2150 VAP_PROG_STREAM_CNTL_0
+0x2154 VAP_PROG_STREAM_CNTL_1
+0x2158 VAP_PROG_STREAM_CNTL_2
+0x215C VAP_PROG_STREAM_CNTL_3
+0x2160 VAP_PROG_STREAM_CNTL_4
+0x2164 VAP_PROG_STREAM_CNTL_5
+0x2168 VAP_PROG_STREAM_CNTL_6
+0x216C VAP_PROG_STREAM_CNTL_7
+0x2180 VAP_VTX_STATE_CNTL
+0x2184 VAP_VSM_VTX_ASSM
+0x2188 VAP_VTX_STATE_IND_REG_0
+0x218C VAP_VTX_STATE_IND_REG_1
+0x2190 VAP_VTX_STATE_IND_REG_2
+0x2194 VAP_VTX_STATE_IND_REG_3
+0x2198 VAP_VTX_STATE_IND_REG_4
+0x219C VAP_VTX_STATE_IND_REG_5
+0x21A0 VAP_VTX_STATE_IND_REG_6
+0x21A4 VAP_VTX_STATE_IND_REG_7
+0x21A8 VAP_VTX_STATE_IND_REG_8
+0x21AC VAP_VTX_STATE_IND_REG_9
+0x21B0 VAP_VTX_STATE_IND_REG_10
+0x21B4 VAP_VTX_STATE_IND_REG_11
+0x21B8 VAP_VTX_STATE_IND_REG_12
+0x21BC VAP_VTX_STATE_IND_REG_13
+0x21C0 VAP_VTX_STATE_IND_REG_14
+0x21C4 VAP_VTX_STATE_IND_REG_15
+0x21DC VAP_PSC_SGN_NORM_CNTL
+0x21E0 VAP_PROG_STREAM_CNTL_EXT_0
+0x21E4 VAP_PROG_STREAM_CNTL_EXT_1
+0x21E8 VAP_PROG_STREAM_CNTL_EXT_2
+0x21EC VAP_PROG_STREAM_CNTL_EXT_3
+0x21F0 VAP_PROG_STREAM_CNTL_EXT_4
+0x21F4 VAP_PROG_STREAM_CNTL_EXT_5
+0x21F8 VAP_PROG_STREAM_CNTL_EXT_6
+0x21FC VAP_PROG_STREAM_CNTL_EXT_7
+0x2200 VAP_PVS_VECTOR_INDX_REG
+0x2204 VAP_PVS_VECTOR_DATA_REG
+0x2208 VAP_PVS_VECTOR_DATA_REG_128
+0x221C VAP_CLIP_CNTL
+0x2220 VAP_GB_VERT_CLIP_ADJ
+0x2224 VAP_GB_VERT_DISC_ADJ
+0x2228 VAP_GB_HORZ_CLIP_ADJ
+0x222C VAP_GB_HORZ_DISC_ADJ
+0x2230 VAP_PVS_FLOW_CNTL_ADDRS_0
+0x2234 VAP_PVS_FLOW_CNTL_ADDRS_1
+0x2238 VAP_PVS_FLOW_CNTL_ADDRS_2
+0x223C VAP_PVS_FLOW_CNTL_ADDRS_3
+0x2240 VAP_PVS_FLOW_CNTL_ADDRS_4
+0x2244 VAP_PVS_FLOW_CNTL_ADDRS_5
+0x2248 VAP_PVS_FLOW_CNTL_ADDRS_6
+0x224C VAP_PVS_FLOW_CNTL_ADDRS_7
+0x2250 VAP_PVS_FLOW_CNTL_ADDRS_8
+0x2254 VAP_PVS_FLOW_CNTL_ADDRS_9
+0x2258 VAP_PVS_FLOW_CNTL_ADDRS_10
+0x225C VAP_PVS_FLOW_CNTL_ADDRS_11
+0x2260 VAP_PVS_FLOW_CNTL_ADDRS_12
+0x2264 VAP_PVS_FLOW_CNTL_ADDRS_13
+0x2268 VAP_PVS_FLOW_CNTL_ADDRS_14
+0x226C VAP_PVS_FLOW_CNTL_ADDRS_15
+0x2284 VAP_PVS_STATE_FLUSH_REG
+0x2288 VAP_PVS_VTX_TIMEOUT_REG
+0x2290 VAP_PVS_FLOW_CNTL_LOOP_INDEX_0
+0x2294 VAP_PVS_FLOW_CNTL_LOOP_INDEX_1
+0x2298 VAP_PVS_FLOW_CNTL_LOOP_INDEX_2
+0x229C VAP_PVS_FLOW_CNTL_LOOP_INDEX_3
+0x22A0 VAP_PVS_FLOW_CNTL_LOOP_INDEX_4
+0x22A4 VAP_PVS_FLOW_CNTL_LOOP_INDEX_5
+0x22A8 VAP_PVS_FLOW_CNTL_LOOP_INDEX_6
+0x22AC VAP_PVS_FLOW_CNTL_LOOP_INDEX_7
+0x22B0 VAP_PVS_FLOW_CNTL_LOOP_INDEX_8
+0x22B4 VAP_PVS_FLOW_CNTL_LOOP_INDEX_9
+0x22B8 VAP_PVS_FLOW_CNTL_LOOP_INDEX_10
+0x22BC VAP_PVS_FLOW_CNTL_LOOP_INDEX_11
+0x22C0 VAP_PVS_FLOW_CNTL_LOOP_INDEX_12
+0x22C4 VAP_PVS_FLOW_CNTL_LOOP_INDEX_13
+0x22C8 VAP_PVS_FLOW_CNTL_LOOP_INDEX_14
+0x22CC VAP_PVS_FLOW_CNTL_LOOP_INDEX_15
+0x22D0 VAP_PVS_CODE_CNTL_0
+0x22D4 VAP_PVS_CONST_CNTL
+0x22D8 VAP_PVS_CODE_CNTL_1
+0x22DC VAP_PVS_FLOW_CNTL_OPC
+0x342C RB2D_DSTCACHE_CTLSTAT
+0x4000 GB_VAP_RASTER_VTX_FMT_0
+0x4004 GB_VAP_RASTER_VTX_FMT_1
+0x4008 GB_ENABLE
+0x401C GB_SELECT
+0x4020 GB_AA_CONFIG
+0x4024 GB_FIFO_SIZE
+0x4100 TX_INVALTAGS
+0x4200 GA_POINT_S0
+0x4204 GA_POINT_T0
+0x4208 GA_POINT_S1
+0x420C GA_POINT_T1
+0x4214 GA_TRIANGLE_STIPPLE
+0x421C GA_POINT_SIZE
+0x4230 GA_POINT_MINMAX
+0x4234 GA_LINE_CNTL
+0x4238 GA_LINE_STIPPLE_CONFIG
+0x4260 GA_LINE_STIPPLE_VALUE
+0x4264 GA_LINE_S0
+0x4268 GA_LINE_S1
+0x4278 GA_COLOR_CONTROL
+0x427C GA_SOLID_RG
+0x4280 GA_SOLID_BA
+0x4288 GA_POLY_MODE
+0x428C GA_ROUND_MODE
+0x4290 GA_OFFSET
+0x4294 GA_FOG_SCALE
+0x4298 GA_FOG_OFFSET
+0x42A0 SU_TEX_WRAP
+0x42A4 SU_POLY_OFFSET_FRONT_SCALE
+0x42A8 SU_POLY_OFFSET_FRONT_OFFSET
+0x42AC SU_POLY_OFFSET_BACK_SCALE
+0x42B0 SU_POLY_OFFSET_BACK_OFFSET
+0x42B4 SU_POLY_OFFSET_ENABLE
+0x42B8 SU_CULL_MODE
+0x42C0 SU_DEPTH_SCALE
+0x42C4 SU_DEPTH_OFFSET
+0x42C8 SU_REG_DEST
+0x4300 RS_COUNT
+0x4304 RS_INST_COUNT
+0x4310 RS_IP_0
+0x4314 RS_IP_1
+0x4318 RS_IP_2
+0x431C RS_IP_3
+0x4320 RS_IP_4
+0x4324 RS_IP_5
+0x4328 RS_IP_6
+0x432C RS_IP_7
+0x4330 RS_INST_0
+0x4334 RS_INST_1
+0x4338 RS_INST_2
+0x433C RS_INST_3
+0x4340 RS_INST_4
+0x4344 RS_INST_5
+0x4348 RS_INST_6
+0x434C RS_INST_7
+0x4350 RS_INST_8
+0x4354 RS_INST_9
+0x4358 RS_INST_10
+0x435C RS_INST_11
+0x4360 RS_INST_12
+0x4364 RS_INST_13
+0x4368 RS_INST_14
+0x436C RS_INST_15
+0x43A4 SC_HYPERZ_EN
+0x43A8 SC_EDGERULE
+0x43B0 SC_CLIP_0_A
+0x43B4 SC_CLIP_0_B
+0x43B8 SC_CLIP_1_A
+0x43BC SC_CLIP_1_B
+0x43C0 SC_CLIP_2_A
+0x43C4 SC_CLIP_2_B
+0x43C8 SC_CLIP_3_A
+0x43CC SC_CLIP_3_B
+0x43D0 SC_CLIP_RULE
+0x43E0 SC_SCISSOR0
+0x43E8 SC_SCREENDOOR
+0x4440 TX_FILTER1_0
+0x4444 TX_FILTER1_1
+0x4448 TX_FILTER1_2
+0x444C TX_FILTER1_3
+0x4450 TX_FILTER1_4
+0x4454 TX_FILTER1_5
+0x4458 TX_FILTER1_6
+0x445C TX_FILTER1_7
+0x4460 TX_FILTER1_8
+0x4464 TX_FILTER1_9
+0x4468 TX_FILTER1_10
+0x446C TX_FILTER1_11
+0x4470 TX_FILTER1_12
+0x4474 TX_FILTER1_13
+0x4478 TX_FILTER1_14
+0x447C TX_FILTER1_15
+0x4580 TX_CHROMA_KEY_0
+0x4584 TX_CHROMA_KEY_1
+0x4588 TX_CHROMA_KEY_2
+0x458C TX_CHROMA_KEY_3
+0x4590 TX_CHROMA_KEY_4
+0x4594 TX_CHROMA_KEY_5
+0x4598 TX_CHROMA_KEY_6
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+0x4E08 RB3D_ABLENDCNTL_R3
+0x4E0C RB3D_COLOR_CHANNEL_MASK
+0x4E10 RB3D_CONSTANT_COLOR
+0x4E14 RB3D_COLOR_CLEAR_VALUE
+0x4E18 RB3D_ROPCNTL_R3
+0x4E1C RB3D_CLRCMP_FLIPE_R3
+0x4E20 RB3D_CLRCMP_CLR_R3
+0x4E24 RB3D_CLRCMP_MSK_R3
+0x4E48 RB3D_DEBUG_CTL
+0x4E4C RB3D_DSTCACHE_CTLSTAT_R3
+0x4E50 RB3D_DITHER_CTL
+0x4E54 RB3D_CMASK_OFFSET0
+0x4E58 RB3D_CMASK_OFFSET1
+0x4E5C RB3D_CMASK_OFFSET2
+0x4E60 RB3D_CMASK_OFFSET3
+0x4E64 RB3D_CMASK_PITCH0
+0x4E68 RB3D_CMASK_PITCH1
+0x4E6C RB3D_CMASK_PITCH2
+0x4E70 RB3D_CMASK_PITCH3
+0x4E74 RB3D_CMASK_WRINDEX
+0x4E78 RB3D_CMASK_DWORD
+0x4E7C RB3D_CMASK_RDINDEX
+0x4E80 RB3D_AARESOLVE_OFFSET
+0x4E84 RB3D_AARESOLVE_PITCH
+0x4E88 RB3D_AARESOLVE_CTL
+0x4EA0 RB3D_DISCARD_SRC_PIXEL_LTE_THRESHOLD
+0x4EA4 RB3D_DISCARD_SRC_PIXEL_GTE_THRESHOLD
+0x4F04 ZB_ZSTENCILCNTL
+0x4F08 ZB_STENCILREFMASK
+0x4F14 ZB_ZTOP
+0x4F18 ZB_ZCACHE_CTLSTAT
+0x4F1C ZB_BW_CNTL
+0x4F28 ZB_DEPTHCLEARVALUE
+0x4F30 ZB_ZMASK_OFFSET
+0x4F34 ZB_ZMASK_PITCH
+0x4F38 ZB_ZMASK_WRINDEX
+0x4F3C ZB_ZMASK_DWORD
+0x4F40 ZB_ZMASK_RDINDEX
+0x4F44 ZB_HIZ_OFFSET
+0x4F48 ZB_HIZ_WRINDEX
+0x4F4C ZB_HIZ_DWORD
+0x4F50 ZB_HIZ_RDINDEX
+0x4F54 ZB_HIZ_PITCH
+0x4F58 ZB_ZPASS_DATA
diff --git a/drivers/gpu/drm/radeon/reg_srcs/rn50 b/drivers/gpu/drm/radeon/reg_srcs/rn50
new file mode 100644
index 000000000000..2687b6307260
--- /dev/null
+++ b/drivers/gpu/drm/radeon/reg_srcs/rn50
@@ -0,0 +1,30 @@
+rn50 0x3294
+0x1434 SRC_Y_X
+0x1438 DST_Y_X
+0x143C DST_HEIGHT_WIDTH
+0x146C DP_GUI_MASTER_CNTL
+0x1474 BRUSH_Y_X
+0x1478 DP_BRUSH_BKGD_CLR
+0x147C DP_BRUSH_FRGD_CLR
+0x1480 BRUSH_DATA0
+0x1484 BRUSH_DATA1
+0x1598 DST_WIDTH_HEIGHT
+0x15C0 CLR_CMP_CNTL
+0x15C4 CLR_CMP_CLR_SRC
+0x15C8 CLR_CMP_CLR_DST
+0x15CC CLR_CMP_MSK
+0x15D8 DP_SRC_FRGD_CLR
+0x15DC DP_SRC_BKGD_CLR
+0x1600 DST_LINE_START
+0x1604 DST_LINE_END
+0x1608 DST_LINE_PATCOUNT
+0x16C0 DP_CNTL
+0x16CC DP_WRITE_MSK
+0x16D0 DP_CNTL_XDIR_YDIR_YMAJOR
+0x16E8 DEFAULT_SC_BOTTOM_RIGHT
+0x16EC SC_TOP_LEFT
+0x16F0 SC_BOTTOM_RIGHT
+0x16F4 SRC_SC_BOTTOM_RIGHT
+0x1714 DSTCACHE_CTLSTAT
+0x1720 WAIT_UNTIL
+0x172C RBBM_GUICNTL
diff --git a/drivers/gpu/drm/radeon/reg_srcs/rs600 b/drivers/gpu/drm/radeon/reg_srcs/rs600
new file mode 100644
index 000000000000..8e3c0b807add
--- /dev/null
+++ b/drivers/gpu/drm/radeon/reg_srcs/rs600
@@ -0,0 +1,729 @@
+rs600 0x6d40
+0x1434 SRC_Y_X
+0x1438 DST_Y_X
+0x143C DST_HEIGHT_WIDTH
+0x146C DP_GUI_MASTER_CNTL
+0x1474 BRUSH_Y_X
+0x1478 DP_BRUSH_BKGD_CLR
+0x147C DP_BRUSH_FRGD_CLR
+0x1480 BRUSH_DATA0
+0x1484 BRUSH_DATA1
+0x1598 DST_WIDTH_HEIGHT
+0x15C0 CLR_CMP_CNTL
+0x15C4 CLR_CMP_CLR_SRC
+0x15C8 CLR_CMP_CLR_DST
+0x15CC CLR_CMP_MSK
+0x15D8 DP_SRC_FRGD_CLR
+0x15DC DP_SRC_BKGD_CLR
+0x1600 DST_LINE_START
+0x1604 DST_LINE_END
+0x1608 DST_LINE_PATCOUNT
+0x16C0 DP_CNTL
+0x16CC DP_WRITE_MSK
+0x16D0 DP_CNTL_XDIR_YDIR_YMAJOR
+0x16E8 DEFAULT_SC_BOTTOM_RIGHT
+0x16EC SC_TOP_LEFT
+0x16F0 SC_BOTTOM_RIGHT
+0x16F4 SRC_SC_BOTTOM_RIGHT
+0x1714 DSTCACHE_CTLSTAT
+0x1720 WAIT_UNTIL
+0x172C RBBM_GUICNTL
+0x1D98 VAP_VPORT_XSCALE
+0x1D9C VAP_VPORT_XOFFSET
+0x1DA0 VAP_VPORT_YSCALE
+0x1DA4 VAP_VPORT_YOFFSET
+0x1DA8 VAP_VPORT_ZSCALE
+0x1DAC VAP_VPORT_ZOFFSET
+0x2080 VAP_CNTL
+0x2090 VAP_OUT_VTX_FMT_0
+0x2094 VAP_OUT_VTX_FMT_1
+0x20B0 VAP_VTE_CNTL
+0x2138 VAP_VF_MIN_VTX_INDX
+0x2140 VAP_CNTL_STATUS
+0x2150 VAP_PROG_STREAM_CNTL_0
+0x2154 VAP_PROG_STREAM_CNTL_1
+0x2158 VAP_PROG_STREAM_CNTL_2
+0x215C VAP_PROG_STREAM_CNTL_3
+0x2160 VAP_PROG_STREAM_CNTL_4
+0x2164 VAP_PROG_STREAM_CNTL_5
+0x2168 VAP_PROG_STREAM_CNTL_6
+0x216C VAP_PROG_STREAM_CNTL_7
+0x2180 VAP_VTX_STATE_CNTL
+0x2184 VAP_VSM_VTX_ASSM
+0x2188 VAP_VTX_STATE_IND_REG_0
+0x218C VAP_VTX_STATE_IND_REG_1
+0x2190 VAP_VTX_STATE_IND_REG_2
+0x2194 VAP_VTX_STATE_IND_REG_3
+0x2198 VAP_VTX_STATE_IND_REG_4
+0x219C VAP_VTX_STATE_IND_REG_5
+0x21A0 VAP_VTX_STATE_IND_REG_6
+0x21A4 VAP_VTX_STATE_IND_REG_7
+0x21A8 VAP_VTX_STATE_IND_REG_8
+0x21AC VAP_VTX_STATE_IND_REG_9
+0x21B0 VAP_VTX_STATE_IND_REG_10
+0x21B4 VAP_VTX_STATE_IND_REG_11
+0x21B8 VAP_VTX_STATE_IND_REG_12
+0x21BC VAP_VTX_STATE_IND_REG_13
+0x21C0 VAP_VTX_STATE_IND_REG_14
+0x21C4 VAP_VTX_STATE_IND_REG_15
+0x21DC VAP_PSC_SGN_NORM_CNTL
+0x21E0 VAP_PROG_STREAM_CNTL_EXT_0
+0x21E4 VAP_PROG_STREAM_CNTL_EXT_1
+0x21E8 VAP_PROG_STREAM_CNTL_EXT_2
+0x21EC VAP_PROG_STREAM_CNTL_EXT_3
+0x21F0 VAP_PROG_STREAM_CNTL_EXT_4
+0x21F4 VAP_PROG_STREAM_CNTL_EXT_5
+0x21F8 VAP_PROG_STREAM_CNTL_EXT_6
+0x21FC VAP_PROG_STREAM_CNTL_EXT_7
+0x2200 VAP_PVS_VECTOR_INDX_REG
+0x2204 VAP_PVS_VECTOR_DATA_REG
+0x2208 VAP_PVS_VECTOR_DATA_REG_128
+0x221C VAP_CLIP_CNTL
+0x2220 VAP_GB_VERT_CLIP_ADJ
+0x2224 VAP_GB_VERT_DISC_ADJ
+0x2228 VAP_GB_HORZ_CLIP_ADJ
+0x222C VAP_GB_HORZ_DISC_ADJ
+0x2230 VAP_PVS_FLOW_CNTL_ADDRS_0
+0x2234 VAP_PVS_FLOW_CNTL_ADDRS_1
+0x2238 VAP_PVS_FLOW_CNTL_ADDRS_2
+0x223C VAP_PVS_FLOW_CNTL_ADDRS_3
+0x2240 VAP_PVS_FLOW_CNTL_ADDRS_4
+0x2244 VAP_PVS_FLOW_CNTL_ADDRS_5
+0x2248 VAP_PVS_FLOW_CNTL_ADDRS_6
+0x224C VAP_PVS_FLOW_CNTL_ADDRS_7
+0x2250 VAP_PVS_FLOW_CNTL_ADDRS_8
+0x2254 VAP_PVS_FLOW_CNTL_ADDRS_9
+0x2258 VAP_PVS_FLOW_CNTL_ADDRS_10
+0x225C VAP_PVS_FLOW_CNTL_ADDRS_11
+0x2260 VAP_PVS_FLOW_CNTL_ADDRS_12
+0x2264 VAP_PVS_FLOW_CNTL_ADDRS_13
+0x2268 VAP_PVS_FLOW_CNTL_ADDRS_14
+0x226C VAP_PVS_FLOW_CNTL_ADDRS_15
+0x2284 VAP_PVS_STATE_FLUSH_REG
+0x2288 VAP_PVS_VTX_TIMEOUT_REG
+0x2290 VAP_PVS_FLOW_CNTL_LOOP_INDEX_0
+0x2294 VAP_PVS_FLOW_CNTL_LOOP_INDEX_1
+0x2298 VAP_PVS_FLOW_CNTL_LOOP_INDEX_2
+0x229C VAP_PVS_FLOW_CNTL_LOOP_INDEX_3
+0x22A0 VAP_PVS_FLOW_CNTL_LOOP_INDEX_4
+0x22A4 VAP_PVS_FLOW_CNTL_LOOP_INDEX_5
+0x22A8 VAP_PVS_FLOW_CNTL_LOOP_INDEX_6
+0x22AC VAP_PVS_FLOW_CNTL_LOOP_INDEX_7
+0x22B0 VAP_PVS_FLOW_CNTL_LOOP_INDEX_8
+0x22B4 VAP_PVS_FLOW_CNTL_LOOP_INDEX_9
+0x22B8 VAP_PVS_FLOW_CNTL_LOOP_INDEX_10
+0x22BC VAP_PVS_FLOW_CNTL_LOOP_INDEX_11
+0x22C0 VAP_PVS_FLOW_CNTL_LOOP_INDEX_12
+0x22C4 VAP_PVS_FLOW_CNTL_LOOP_INDEX_13
+0x22C8 VAP_PVS_FLOW_CNTL_LOOP_INDEX_14
+0x22CC VAP_PVS_FLOW_CNTL_LOOP_INDEX_15
+0x22D0 VAP_PVS_CODE_CNTL_0
+0x22D4 VAP_PVS_CONST_CNTL
+0x22D8 VAP_PVS_CODE_CNTL_1
+0x22DC VAP_PVS_FLOW_CNTL_OPC
+0x342C RB2D_DSTCACHE_CTLSTAT
+0x4000 GB_VAP_RASTER_VTX_FMT_0
+0x4004 GB_VAP_RASTER_VTX_FMT_1
+0x4008 GB_ENABLE
+0x401C GB_SELECT
+0x4020 GB_AA_CONFIG
+0x4024 GB_FIFO_SIZE
+0x4100 TX_INVALTAGS
+0x4200 GA_POINT_S0
+0x4204 GA_POINT_T0
+0x4208 GA_POINT_S1
+0x420C GA_POINT_T1
+0x4214 GA_TRIANGLE_STIPPLE
+0x421C GA_POINT_SIZE
+0x4230 GA_POINT_MINMAX
+0x4234 GA_LINE_CNTL
+0x4238 GA_LINE_STIPPLE_CONFIG
+0x4260 GA_LINE_STIPPLE_VALUE
+0x4264 GA_LINE_S0
+0x4268 GA_LINE_S1
+0x4278 GA_COLOR_CONTROL
+0x427C GA_SOLID_RG
+0x4280 GA_SOLID_BA
+0x4288 GA_POLY_MODE
+0x428C GA_ROUND_MODE
+0x4290 GA_OFFSET
+0x4294 GA_FOG_SCALE
+0x4298 GA_FOG_OFFSET
+0x42A0 SU_TEX_WRAP
+0x42A4 SU_POLY_OFFSET_FRONT_SCALE
+0x42A8 SU_POLY_OFFSET_FRONT_OFFSET
+0x42AC SU_POLY_OFFSET_BACK_SCALE
+0x42B0 SU_POLY_OFFSET_BACK_OFFSET 
+0x42B4 SU_POLY_OFFSET_ENABLE
+0x42B8 SU_CULL_MODE
+0x42C0 SU_DEPTH_SCALE
+0x42C4 SU_DEPTH_OFFSET
+0x42C8 SU_REG_DEST
+0x4300 RS_COUNT
+0x4304 RS_INST_COUNT
+0x4310 RS_IP_0
+0x4314 RS_IP_1
+0x4318 RS_IP_2
+0x431C RS_IP_3
+0x4320 RS_IP_4
+0x4324 RS_IP_5
+0x4328 RS_IP_6
+0x432C RS_IP_7
+0x4330 RS_INST_0
+0x4334 RS_INST_1
+0x4338 RS_INST_2
+0x433C RS_INST_3
+0x4340 RS_INST_4
+0x4344 RS_INST_5
+0x4348 RS_INST_6
+0x434C RS_INST_7
+0x4350 RS_INST_8
+0x4354 RS_INST_9
+0x4358 RS_INST_10
+0x435C RS_INST_11
+0x4360 RS_INST_12
+0x4364 RS_INST_13
+0x4368 RS_INST_14
+0x436C RS_INST_15
+0x43A4 SC_HYPERZ_EN
+0x43A8 SC_EDGERULE
+0x43B0 SC_CLIP_0_A
+0x43B4 SC_CLIP_0_B
+0x43B8 SC_CLIP_1_A
+0x43BC SC_CLIP_1_B
+0x43C0 SC_CLIP_2_A
+0x43C4 SC_CLIP_2_B
+0x43C8 SC_CLIP_3_A
+0x43CC SC_CLIP_3_B
+0x43D0 SC_CLIP_RULE
+0x43E0 SC_SCISSOR0
+0x43E8 SC_SCREENDOOR
+0x4440 TX_FILTER1_0
+0x4444 TX_FILTER1_1
+0x4448 TX_FILTER1_2
+0x444C TX_FILTER1_3
+0x4450 TX_FILTER1_4
+0x4454 TX_FILTER1_5
+0x4458 TX_FILTER1_6
+0x445C TX_FILTER1_7
+0x4460 TX_FILTER1_8
+0x4464 TX_FILTER1_9
+0x4468 TX_FILTER1_10
+0x446C TX_FILTER1_11
+0x4470 TX_FILTER1_12
+0x4474 TX_FILTER1_13
+0x4478 TX_FILTER1_14
+0x447C TX_FILTER1_15
+0x4580 TX_CHROMA_KEY_0
+0x4584 TX_CHROMA_KEY_1
+0x4588 TX_CHROMA_KEY_2
+0x458C TX_CHROMA_KEY_3
+0x4590 TX_CHROMA_KEY_4
+0x4594 TX_CHROMA_KEY_5
+0x4598 TX_CHROMA_KEY_6
+0x459C TX_CHROMA_KEY_7
+0x45A0 TX_CHROMA_KEY_8
+0x45A4 TX_CHROMA_KEY_9
+0x45A8 TX_CHROMA_KEY_10
+0x45AC TX_CHROMA_KEY_11
+0x45B0 TX_CHROMA_KEY_12
+0x45B4 TX_CHROMA_KEY_13
+0x45B8 TX_CHROMA_KEY_14
+0x45BC TX_CHROMA_KEY_15
+0x45C0 TX_BORDER_COLOR_0
+0x45C4 TX_BORDER_COLOR_1
+0x45C8 TX_BORDER_COLOR_2
+0x45CC TX_BORDER_COLOR_3
+0x45D0 TX_BORDER_COLOR_4
+0x45D4 TX_BORDER_COLOR_5
+0x45D8 TX_BORDER_COLOR_6
+0x45DC TX_BORDER_COLOR_7
+0x45E0 TX_BORDER_COLOR_8
+0x45E4 TX_BORDER_COLOR_9
+0x45E8 TX_BORDER_COLOR_10
+0x45EC TX_BORDER_COLOR_11
+0x45F0 TX_BORDER_COLOR_12
+0x45F4 TX_BORDER_COLOR_13
+0x45F8 TX_BORDER_COLOR_14
+0x45FC TX_BORDER_COLOR_15
+0x4600 US_CONFIG
+0x4604 US_PIXSIZE
+0x4608 US_CODE_OFFSET
+0x460C US_RESET
+0x4610 US_CODE_ADDR_0
+0x4614 US_CODE_ADDR_1
+0x4618 US_CODE_ADDR_2
+0x461C US_CODE_ADDR_3
+0x4620 US_TEX_INST_0
+0x4624 US_TEX_INST_1
+0x4628 US_TEX_INST_2
+0x462C US_TEX_INST_3
+0x4630 US_TEX_INST_4
+0x4634 US_TEX_INST_5
+0x4638 US_TEX_INST_6
+0x463C US_TEX_INST_7
+0x4640 US_TEX_INST_8
+0x4644 US_TEX_INST_9
+0x4648 US_TEX_INST_10
+0x464C US_TEX_INST_11
+0x4650 US_TEX_INST_12
+0x4654 US_TEX_INST_13
+0x4658 US_TEX_INST_14
+0x465C US_TEX_INST_15
+0x4660 US_TEX_INST_16
+0x4664 US_TEX_INST_17
+0x4668 US_TEX_INST_18
+0x466C US_TEX_INST_19
+0x4670 US_TEX_INST_20
+0x4674 US_TEX_INST_21
+0x4678 US_TEX_INST_22
+0x467C US_TEX_INST_23
+0x4680 US_TEX_INST_24
+0x4684 US_TEX_INST_25
+0x4688 US_TEX_INST_26
+0x468C US_TEX_INST_27
+0x4690 US_TEX_INST_28
+0x4694 US_TEX_INST_29
+0x4698 US_TEX_INST_30
+0x469C US_TEX_INST_31
+0x46A4 US_OUT_FMT_0
+0x46A8 US_OUT_FMT_1
+0x46AC US_OUT_FMT_2
+0x46B0 US_OUT_FMT_3
+0x46B4 US_W_FMT
+0x46C0 US_ALU_RGB_ADDR_0
+0x46C4 US_ALU_RGB_ADDR_1
+0x46C8 US_ALU_RGB_ADDR_2
+0x46CC US_ALU_RGB_ADDR_3
+0x46D0 US_ALU_RGB_ADDR_4
+0x46D4 US_ALU_RGB_ADDR_5
+0x46D8 US_ALU_RGB_ADDR_6
+0x46DC US_ALU_RGB_ADDR_7
+0x46E0 US_ALU_RGB_ADDR_8
+0x46E4 US_ALU_RGB_ADDR_9
+0x46E8 US_ALU_RGB_ADDR_10
+0x46EC US_ALU_RGB_ADDR_11
+0x46F0 US_ALU_RGB_ADDR_12
+0x46F4 US_ALU_RGB_ADDR_13
+0x46F8 US_ALU_RGB_ADDR_14
+0x46FC US_ALU_RGB_ADDR_15
+0x4700 US_ALU_RGB_ADDR_16
+0x4704 US_ALU_RGB_ADDR_17
+0x4708 US_ALU_RGB_ADDR_18
+0x470C US_ALU_RGB_ADDR_19
+0x4710 US_ALU_RGB_ADDR_20
+0x4714 US_ALU_RGB_ADDR_21
+0x4718 US_ALU_RGB_ADDR_22
+0x471C US_ALU_RGB_ADDR_23
+0x4720 US_ALU_RGB_ADDR_24
+0x4724 US_ALU_RGB_ADDR_25
+0x4728 US_ALU_RGB_ADDR_26
+0x472C US_ALU_RGB_ADDR_27
+0x4730 US_ALU_RGB_ADDR_28
+0x4734 US_ALU_RGB_ADDR_29
+0x4738 US_ALU_RGB_ADDR_30
+0x473C US_ALU_RGB_ADDR_31
+0x4740 US_ALU_RGB_ADDR_32
+0x4744 US_ALU_RGB_ADDR_33
+0x4748 US_ALU_RGB_ADDR_34
+0x474C US_ALU_RGB_ADDR_35
+0x4750 US_ALU_RGB_ADDR_36
+0x4754 US_ALU_RGB_ADDR_37
+0x4758 US_ALU_RGB_ADDR_38
+0x475C US_ALU_RGB_ADDR_39
+0x4760 US_ALU_RGB_ADDR_40
+0x4764 US_ALU_RGB_ADDR_41
+0x4768 US_ALU_RGB_ADDR_42
+0x476C US_ALU_RGB_ADDR_43
+0x4770 US_ALU_RGB_ADDR_44
+0x4774 US_ALU_RGB_ADDR_45
+0x4778 US_ALU_RGB_ADDR_46
+0x477C US_ALU_RGB_ADDR_47
+0x4780 US_ALU_RGB_ADDR_48
+0x4784 US_ALU_RGB_ADDR_49
+0x4788 US_ALU_RGB_ADDR_50
+0x478C US_ALU_RGB_ADDR_51
+0x4790 US_ALU_RGB_ADDR_52
+0x4794 US_ALU_RGB_ADDR_53
+0x4798 US_ALU_RGB_ADDR_54
+0x479C US_ALU_RGB_ADDR_55
+0x47A0 US_ALU_RGB_ADDR_56
+0x47A4 US_ALU_RGB_ADDR_57
+0x47A8 US_ALU_RGB_ADDR_58
+0x47AC US_ALU_RGB_ADDR_59
+0x47B0 US_ALU_RGB_ADDR_60
+0x47B4 US_ALU_RGB_ADDR_61
+0x47B8 US_ALU_RGB_ADDR_62
+0x47BC US_ALU_RGB_ADDR_63
+0x47C0 US_ALU_ALPHA_ADDR_0
+0x47C4 US_ALU_ALPHA_ADDR_1
+0x47C8 US_ALU_ALPHA_ADDR_2
+0x47CC US_ALU_ALPHA_ADDR_3
+0x47D0 US_ALU_ALPHA_ADDR_4
+0x47D4 US_ALU_ALPHA_ADDR_5
+0x47D8 US_ALU_ALPHA_ADDR_6
+0x47DC US_ALU_ALPHA_ADDR_7
+0x47E0 US_ALU_ALPHA_ADDR_8
+0x47E4 US_ALU_ALPHA_ADDR_9
+0x47E8 US_ALU_ALPHA_ADDR_10
+0x47EC US_ALU_ALPHA_ADDR_11
+0x47F0 US_ALU_ALPHA_ADDR_12
+0x47F4 US_ALU_ALPHA_ADDR_13
+0x47F8 US_ALU_ALPHA_ADDR_14
+0x47FC US_ALU_ALPHA_ADDR_15
+0x4800 US_ALU_ALPHA_ADDR_16
+0x4804 US_ALU_ALPHA_ADDR_17
+0x4808 US_ALU_ALPHA_ADDR_18
+0x480C US_ALU_ALPHA_ADDR_19
+0x4810 US_ALU_ALPHA_ADDR_20
+0x4814 US_ALU_ALPHA_ADDR_21
+0x4818 US_ALU_ALPHA_ADDR_22
+0x481C US_ALU_ALPHA_ADDR_23
+0x4820 US_ALU_ALPHA_ADDR_24
+0x4824 US_ALU_ALPHA_ADDR_25
+0x4828 US_ALU_ALPHA_ADDR_26
+0x482C US_ALU_ALPHA_ADDR_27
+0x4830 US_ALU_ALPHA_ADDR_28
+0x4834 US_ALU_ALPHA_ADDR_29
+0x4838 US_ALU_ALPHA_ADDR_30
+0x483C US_ALU_ALPHA_ADDR_31
+0x4840 US_ALU_ALPHA_ADDR_32
+0x4844 US_ALU_ALPHA_ADDR_33
+0x4848 US_ALU_ALPHA_ADDR_34
+0x484C US_ALU_ALPHA_ADDR_35
+0x4850 US_ALU_ALPHA_ADDR_36
+0x4854 US_ALU_ALPHA_ADDR_37
+0x4858 US_ALU_ALPHA_ADDR_38
+0x485C US_ALU_ALPHA_ADDR_39
+0x4860 US_ALU_ALPHA_ADDR_40
+0x4864 US_ALU_ALPHA_ADDR_41
+0x4868 US_ALU_ALPHA_ADDR_42
+0x486C US_ALU_ALPHA_ADDR_43
+0x4870 US_ALU_ALPHA_ADDR_44
+0x4874 US_ALU_ALPHA_ADDR_45
+0x4878 US_ALU_ALPHA_ADDR_46
+0x487C US_ALU_ALPHA_ADDR_47
+0x4880 US_ALU_ALPHA_ADDR_48
+0x4884 US_ALU_ALPHA_ADDR_49
+0x4888 US_ALU_ALPHA_ADDR_50
+0x488C US_ALU_ALPHA_ADDR_51
+0x4890 US_ALU_ALPHA_ADDR_52
+0x4894 US_ALU_ALPHA_ADDR_53
+0x4898 US_ALU_ALPHA_ADDR_54
+0x489C US_ALU_ALPHA_ADDR_55
+0x48A0 US_ALU_ALPHA_ADDR_56
+0x48A4 US_ALU_ALPHA_ADDR_57
+0x48A8 US_ALU_ALPHA_ADDR_58
+0x48AC US_ALU_ALPHA_ADDR_59
+0x48B0 US_ALU_ALPHA_ADDR_60
+0x48B4 US_ALU_ALPHA_ADDR_61
+0x48B8 US_ALU_ALPHA_ADDR_62
+0x48BC US_ALU_ALPHA_ADDR_63
+0x48C0 US_ALU_RGB_INST_0
+0x48C4 US_ALU_RGB_INST_1
+0x48C8 US_ALU_RGB_INST_2
+0x48CC US_ALU_RGB_INST_3
+0x48D0 US_ALU_RGB_INST_4
+0x48D4 US_ALU_RGB_INST_5
+0x48D8 US_ALU_RGB_INST_6
+0x48DC US_ALU_RGB_INST_7
+0x48E0 US_ALU_RGB_INST_8
+0x48E4 US_ALU_RGB_INST_9
+0x48E8 US_ALU_RGB_INST_10
+0x48EC US_ALU_RGB_INST_11
+0x48F0 US_ALU_RGB_INST_12
+0x48F4 US_ALU_RGB_INST_13
+0x48F8 US_ALU_RGB_INST_14
+0x48FC US_ALU_RGB_INST_15
+0x4900 US_ALU_RGB_INST_16
+0x4904 US_ALU_RGB_INST_17
+0x4908 US_ALU_RGB_INST_18
+0x490C US_ALU_RGB_INST_19
+0x4910 US_ALU_RGB_INST_20
+0x4914 US_ALU_RGB_INST_21
+0x4918 US_ALU_RGB_INST_22
+0x491C US_ALU_RGB_INST_23
+0x4920 US_ALU_RGB_INST_24
+0x4924 US_ALU_RGB_INST_25
+0x4928 US_ALU_RGB_INST_26
+0x492C US_ALU_RGB_INST_27
+0x4930 US_ALU_RGB_INST_28
+0x4934 US_ALU_RGB_INST_29
+0x4938 US_ALU_RGB_INST_30
+0x493C US_ALU_RGB_INST_31
+0x4940 US_ALU_RGB_INST_32
+0x4944 US_ALU_RGB_INST_33
+0x4948 US_ALU_RGB_INST_34
+0x494C US_ALU_RGB_INST_35
+0x4950 US_ALU_RGB_INST_36
+0x4954 US_ALU_RGB_INST_37
+0x4958 US_ALU_RGB_INST_38
+0x495C US_ALU_RGB_INST_39
+0x4960 US_ALU_RGB_INST_40
+0x4964 US_ALU_RGB_INST_41
+0x4968 US_ALU_RGB_INST_42
+0x496C US_ALU_RGB_INST_43
+0x4970 US_ALU_RGB_INST_44
+0x4974 US_ALU_RGB_INST_45
+0x4978 US_ALU_RGB_INST_46
+0x497C US_ALU_RGB_INST_47
+0x4980 US_ALU_RGB_INST_48
+0x4984 US_ALU_RGB_INST_49
+0x4988 US_ALU_RGB_INST_50
+0x498C US_ALU_RGB_INST_51
+0x4990 US_ALU_RGB_INST_52
+0x4994 US_ALU_RGB_INST_53
+0x4998 US_ALU_RGB_INST_54
+0x499C US_ALU_RGB_INST_55
+0x49A0 US_ALU_RGB_INST_56
+0x49A4 US_ALU_RGB_INST_57
+0x49A8 US_ALU_RGB_INST_58
+0x49AC US_ALU_RGB_INST_59
+0x49B0 US_ALU_RGB_INST_60
+0x49B4 US_ALU_RGB_INST_61
+0x49B8 US_ALU_RGB_INST_62
+0x49BC US_ALU_RGB_INST_63
+0x49C0 US_ALU_ALPHA_INST_0
+0x49C4 US_ALU_ALPHA_INST_1
+0x49C8 US_ALU_ALPHA_INST_2
+0x49CC US_ALU_ALPHA_INST_3
+0x49D0 US_ALU_ALPHA_INST_4
+0x49D4 US_ALU_ALPHA_INST_5
+0x49D8 US_ALU_ALPHA_INST_6
+0x49DC US_ALU_ALPHA_INST_7
+0x49E0 US_ALU_ALPHA_INST_8
+0x49E4 US_ALU_ALPHA_INST_9
+0x49E8 US_ALU_ALPHA_INST_10
+0x49EC US_ALU_ALPHA_INST_11
+0x49F0 US_ALU_ALPHA_INST_12
+0x49F4 US_ALU_ALPHA_INST_13
+0x49F8 US_ALU_ALPHA_INST_14
+0x49FC US_ALU_ALPHA_INST_15
+0x4A00 US_ALU_ALPHA_INST_16
+0x4A04 US_ALU_ALPHA_INST_17
+0x4A08 US_ALU_ALPHA_INST_18
+0x4A0C US_ALU_ALPHA_INST_19
+0x4A10 US_ALU_ALPHA_INST_20
+0x4A14 US_ALU_ALPHA_INST_21
+0x4A18 US_ALU_ALPHA_INST_22
+0x4A1C US_ALU_ALPHA_INST_23
+0x4A20 US_ALU_ALPHA_INST_24
+0x4A24 US_ALU_ALPHA_INST_25
+0x4A28 US_ALU_ALPHA_INST_26
+0x4A2C US_ALU_ALPHA_INST_27
+0x4A30 US_ALU_ALPHA_INST_28
+0x4A34 US_ALU_ALPHA_INST_29
+0x4A38 US_ALU_ALPHA_INST_30
+0x4A3C US_ALU_ALPHA_INST_31
+0x4A40 US_ALU_ALPHA_INST_32
+0x4A44 US_ALU_ALPHA_INST_33
+0x4A48 US_ALU_ALPHA_INST_34
+0x4A4C US_ALU_ALPHA_INST_35
+0x4A50 US_ALU_ALPHA_INST_36
+0x4A54 US_ALU_ALPHA_INST_37
+0x4A58 US_ALU_ALPHA_INST_38
+0x4A5C US_ALU_ALPHA_INST_39
+0x4A60 US_ALU_ALPHA_INST_40
+0x4A64 US_ALU_ALPHA_INST_41
+0x4A68 US_ALU_ALPHA_INST_42
+0x4A6C US_ALU_ALPHA_INST_43
+0x4A70 US_ALU_ALPHA_INST_44
+0x4A74 US_ALU_ALPHA_INST_45
+0x4A78 US_ALU_ALPHA_INST_46
+0x4A7C US_ALU_ALPHA_INST_47
+0x4A80 US_ALU_ALPHA_INST_48
+0x4A84 US_ALU_ALPHA_INST_49
+0x4A88 US_ALU_ALPHA_INST_50
+0x4A8C US_ALU_ALPHA_INST_51
+0x4A90 US_ALU_ALPHA_INST_52
+0x4A94 US_ALU_ALPHA_INST_53
+0x4A98 US_ALU_ALPHA_INST_54
+0x4A9C US_ALU_ALPHA_INST_55
+0x4AA0 US_ALU_ALPHA_INST_56
+0x4AA4 US_ALU_ALPHA_INST_57
+0x4AA8 US_ALU_ALPHA_INST_58
+0x4AAC US_ALU_ALPHA_INST_59
+0x4AB0 US_ALU_ALPHA_INST_60
+0x4AB4 US_ALU_ALPHA_INST_61
+0x4AB8 US_ALU_ALPHA_INST_62
+0x4ABC US_ALU_ALPHA_INST_63
+0x4BC0 FG_FOG_BLEND
+0x4BC4 FG_FOG_FACTOR
+0x4BC8 FG_FOG_COLOR_R
+0x4BCC FG_FOG_COLOR_G
+0x4BD0 FG_FOG_COLOR_B
+0x4BD4 FG_ALPHA_FUNC
+0x4BD8 FG_DEPTH_SRC
+0x4C00 US_ALU_CONST_R_0
+0x4C04 US_ALU_CONST_G_0
+0x4C08 US_ALU_CONST_B_0
+0x4C0C US_ALU_CONST_A_0
+0x4C10 US_ALU_CONST_R_1
+0x4C14 US_ALU_CONST_G_1
+0x4C18 US_ALU_CONST_B_1
+0x4C1C US_ALU_CONST_A_1
+0x4C20 US_ALU_CONST_R_2
+0x4C24 US_ALU_CONST_G_2
+0x4C28 US_ALU_CONST_B_2
+0x4C2C US_ALU_CONST_A_2
+0x4C30 US_ALU_CONST_R_3
+0x4C34 US_ALU_CONST_G_3
+0x4C38 US_ALU_CONST_B_3
+0x4C3C US_ALU_CONST_A_3
+0x4C40 US_ALU_CONST_R_4
+0x4C44 US_ALU_CONST_G_4
+0x4C48 US_ALU_CONST_B_4
+0x4C4C US_ALU_CONST_A_4
+0x4C50 US_ALU_CONST_R_5
+0x4C54 US_ALU_CONST_G_5
+0x4C58 US_ALU_CONST_B_5
+0x4C5C US_ALU_CONST_A_5
+0x4C60 US_ALU_CONST_R_6
+0x4C64 US_ALU_CONST_G_6
+0x4C68 US_ALU_CONST_B_6
+0x4C6C US_ALU_CONST_A_6
+0x4C70 US_ALU_CONST_R_7
+0x4C74 US_ALU_CONST_G_7
+0x4C78 US_ALU_CONST_B_7
+0x4C7C US_ALU_CONST_A_7
+0x4C80 US_ALU_CONST_R_8
+0x4C84 US_ALU_CONST_G_8
+0x4C88 US_ALU_CONST_B_8
+0x4C8C US_ALU_CONST_A_8
+0x4C90 US_ALU_CONST_R_9
+0x4C94 US_ALU_CONST_G_9
+0x4C98 US_ALU_CONST_B_9
+0x4C9C US_ALU_CONST_A_9
+0x4CA0 US_ALU_CONST_R_10
+0x4CA4 US_ALU_CONST_G_10
+0x4CA8 US_ALU_CONST_B_10
+0x4CAC US_ALU_CONST_A_10
+0x4CB0 US_ALU_CONST_R_11
+0x4CB4 US_ALU_CONST_G_11
+0x4CB8 US_ALU_CONST_B_11
+0x4CBC US_ALU_CONST_A_11
+0x4CC0 US_ALU_CONST_R_12
+0x4CC4 US_ALU_CONST_G_12
+0x4CC8 US_ALU_CONST_B_12
+0x4CCC US_ALU_CONST_A_12
+0x4CD0 US_ALU_CONST_R_13
+0x4CD4 US_ALU_CONST_G_13
+0x4CD8 US_ALU_CONST_B_13
+0x4CDC US_ALU_CONST_A_13
+0x4CE0 US_ALU_CONST_R_14
+0x4CE4 US_ALU_CONST_G_14
+0x4CE8 US_ALU_CONST_B_14
+0x4CEC US_ALU_CONST_A_14
+0x4CF0 US_ALU_CONST_R_15
+0x4CF4 US_ALU_CONST_G_15
+0x4CF8 US_ALU_CONST_B_15
+0x4CFC US_ALU_CONST_A_15
+0x4D00 US_ALU_CONST_R_16
+0x4D04 US_ALU_CONST_G_16
+0x4D08 US_ALU_CONST_B_16
+0x4D0C US_ALU_CONST_A_16
+0x4D10 US_ALU_CONST_R_17
+0x4D14 US_ALU_CONST_G_17
+0x4D18 US_ALU_CONST_B_17
+0x4D1C US_ALU_CONST_A_17
+0x4D20 US_ALU_CONST_R_18
+0x4D24 US_ALU_CONST_G_18
+0x4D28 US_ALU_CONST_B_18
+0x4D2C US_ALU_CONST_A_18
+0x4D30 US_ALU_CONST_R_19
+0x4D34 US_ALU_CONST_G_19
+0x4D38 US_ALU_CONST_B_19
+0x4D3C US_ALU_CONST_A_19
+0x4D40 US_ALU_CONST_R_20
+0x4D44 US_ALU_CONST_G_20
+0x4D48 US_ALU_CONST_B_20
+0x4D4C US_ALU_CONST_A_20
+0x4D50 US_ALU_CONST_R_21
+0x4D54 US_ALU_CONST_G_21
+0x4D58 US_ALU_CONST_B_21
+0x4D5C US_ALU_CONST_A_21
+0x4D60 US_ALU_CONST_R_22
+0x4D64 US_ALU_CONST_G_22
+0x4D68 US_ALU_CONST_B_22
+0x4D6C US_ALU_CONST_A_22
+0x4D70 US_ALU_CONST_R_23
+0x4D74 US_ALU_CONST_G_23
+0x4D78 US_ALU_CONST_B_23
+0x4D7C US_ALU_CONST_A_23
+0x4D80 US_ALU_CONST_R_24
+0x4D84 US_ALU_CONST_G_24
+0x4D88 US_ALU_CONST_B_24
+0x4D8C US_ALU_CONST_A_24
+0x4D90 US_ALU_CONST_R_25
+0x4D94 US_ALU_CONST_G_25
+0x4D98 US_ALU_CONST_B_25
+0x4D9C US_ALU_CONST_A_25
+0x4DA0 US_ALU_CONST_R_26
+0x4DA4 US_ALU_CONST_G_26
+0x4DA8 US_ALU_CONST_B_26
+0x4DAC US_ALU_CONST_A_26
+0x4DB0 US_ALU_CONST_R_27
+0x4DB4 US_ALU_CONST_G_27
+0x4DB8 US_ALU_CONST_B_27
+0x4DBC US_ALU_CONST_A_27
+0x4DC0 US_ALU_CONST_R_28
+0x4DC4 US_ALU_CONST_G_28
+0x4DC8 US_ALU_CONST_B_28
+0x4DCC US_ALU_CONST_A_28
+0x4DD0 US_ALU_CONST_R_29
+0x4DD4 US_ALU_CONST_G_29
+0x4DD8 US_ALU_CONST_B_29
+0x4DDC US_ALU_CONST_A_29
+0x4DE0 US_ALU_CONST_R_30
+0x4DE4 US_ALU_CONST_G_30
+0x4DE8 US_ALU_CONST_B_30
+0x4DEC US_ALU_CONST_A_30
+0x4DF0 US_ALU_CONST_R_31
+0x4DF4 US_ALU_CONST_G_31
+0x4DF8 US_ALU_CONST_B_31
+0x4DFC US_ALU_CONST_A_31
+0x4E04 RB3D_BLENDCNTL_R3
+0x4E08 RB3D_ABLENDCNTL_R3
+0x4E0C RB3D_COLOR_CHANNEL_MASK
+0x4E10 RB3D_CONSTANT_COLOR
+0x4E14 RB3D_COLOR_CLEAR_VALUE
+0x4E18 RB3D_ROPCNTL_R3
+0x4E1C RB3D_CLRCMP_FLIPE_R3
+0x4E20 RB3D_CLRCMP_CLR_R3
+0x4E24 RB3D_CLRCMP_MSK_R3
+0x4E48 RB3D_DEBUG_CTL
+0x4E4C RB3D_DSTCACHE_CTLSTAT_R3
+0x4E50 RB3D_DITHER_CTL
+0x4E54 RB3D_CMASK_OFFSET0
+0x4E58 RB3D_CMASK_OFFSET1
+0x4E5C RB3D_CMASK_OFFSET2
+0x4E60 RB3D_CMASK_OFFSET3
+0x4E64 RB3D_CMASK_PITCH0
+0x4E68 RB3D_CMASK_PITCH1
+0x4E6C RB3D_CMASK_PITCH2
+0x4E70 RB3D_CMASK_PITCH3
+0x4E74 RB3D_CMASK_WRINDEX
+0x4E78 RB3D_CMASK_DWORD
+0x4E7C RB3D_CMASK_RDINDEX
+0x4E80 RB3D_AARESOLVE_OFFSET
+0x4E84 RB3D_AARESOLVE_PITCH
+0x4E88 RB3D_AARESOLVE_CTL
+0x4EA0 RB3D_DISCARD_SRC_PIXEL_LTE_THRESHOLD
+0x4EA4 RB3D_DISCARD_SRC_PIXEL_GTE_THRESHOLD
+0x4F04 ZB_ZSTENCILCNTL
+0x4F08 ZB_STENCILREFMASK
+0x4F14 ZB_ZTOP
+0x4F18 ZB_ZCACHE_CTLSTAT
+0x4F1C ZB_BW_CNTL
+0x4F28 ZB_DEPTHCLEARVALUE
+0x4F30 ZB_ZMASK_OFFSET
+0x4F34 ZB_ZMASK_PITCH
+0x4F38 ZB_ZMASK_WRINDEX
+0x4F3C ZB_ZMASK_DWORD
+0x4F40 ZB_ZMASK_RDINDEX
+0x4F44 ZB_HIZ_OFFSET
+0x4F48 ZB_HIZ_WRINDEX
+0x4F4C ZB_HIZ_DWORD
+0x4F50 ZB_HIZ_RDINDEX
+0x4F54 ZB_HIZ_PITCH
+0x4F58 ZB_ZPASS_DATA
diff --git a/drivers/gpu/drm/radeon/reg_srcs/rv515 b/drivers/gpu/drm/radeon/reg_srcs/rv515
new file mode 100644
index 000000000000..0102a0d5735c
--- /dev/null
+++ b/drivers/gpu/drm/radeon/reg_srcs/rv515
@@ -0,0 +1,486 @@
+rv515 0x6d40
+0x1434 SRC_Y_X
+0x1438 DST_Y_X
+0x143C DST_HEIGHT_WIDTH
+0x146C DP_GUI_MASTER_CNTL
+0x1474 BRUSH_Y_X
+0x1478 DP_BRUSH_BKGD_CLR
+0x147C DP_BRUSH_FRGD_CLR
+0x1480 BRUSH_DATA0
+0x1484 BRUSH_DATA1
+0x1598 DST_WIDTH_HEIGHT
+0x15C0 CLR_CMP_CNTL
+0x15C4 CLR_CMP_CLR_SRC
+0x15C8 CLR_CMP_CLR_DST
+0x15CC CLR_CMP_MSK
+0x15D8 DP_SRC_FRGD_CLR
+0x15DC DP_SRC_BKGD_CLR
+0x1600 DST_LINE_START
+0x1604 DST_LINE_END
+0x1608 DST_LINE_PATCOUNT
+0x16C0 DP_CNTL
+0x16CC DP_WRITE_MSK
+0x16D0 DP_CNTL_XDIR_YDIR_YMAJOR
+0x16E8 DEFAULT_SC_BOTTOM_RIGHT
+0x16EC SC_TOP_LEFT
+0x16F0 SC_BOTTOM_RIGHT
+0x16F4 SRC_SC_BOTTOM_RIGHT
+0x1714 DSTCACHE_CTLSTAT
+0x1720 WAIT_UNTIL
+0x172C RBBM_GUICNTL
+0x1D98 VAP_VPORT_XSCALE
+0x1D9C VAP_VPORT_XOFFSET
+0x1DA0 VAP_VPORT_YSCALE
+0x1DA4 VAP_VPORT_YOFFSET
+0x1DA8 VAP_VPORT_ZSCALE
+0x1DAC VAP_VPORT_ZOFFSET
+0x2080 VAP_CNTL
+0x2090 VAP_OUT_VTX_FMT_0
+0x2094 VAP_OUT_VTX_FMT_1
+0x20B0 VAP_VTE_CNTL
+0x2138 VAP_VF_MIN_VTX_INDX
+0x2140 VAP_CNTL_STATUS
+0x2150 VAP_PROG_STREAM_CNTL_0
+0x2154 VAP_PROG_STREAM_CNTL_1
+0x2158 VAP_PROG_STREAM_CNTL_2
+0x215C VAP_PROG_STREAM_CNTL_3
+0x2160 VAP_PROG_STREAM_CNTL_4
+0x2164 VAP_PROG_STREAM_CNTL_5
+0x2168 VAP_PROG_STREAM_CNTL_6
+0x216C VAP_PROG_STREAM_CNTL_7
+0x2180 VAP_VTX_STATE_CNTL
+0x2184 VAP_VSM_VTX_ASSM
+0x2188 VAP_VTX_STATE_IND_REG_0
+0x218C VAP_VTX_STATE_IND_REG_1
+0x2190 VAP_VTX_STATE_IND_REG_2
+0x2194 VAP_VTX_STATE_IND_REG_3
+0x2198 VAP_VTX_STATE_IND_REG_4
+0x219C VAP_VTX_STATE_IND_REG_5
+0x21A0 VAP_VTX_STATE_IND_REG_6
+0x21A4 VAP_VTX_STATE_IND_REG_7
+0x21A8 VAP_VTX_STATE_IND_REG_8
+0x21AC VAP_VTX_STATE_IND_REG_9
+0x21B0 VAP_VTX_STATE_IND_REG_10
+0x21B4 VAP_VTX_STATE_IND_REG_11
+0x21B8 VAP_VTX_STATE_IND_REG_12
+0x21BC VAP_VTX_STATE_IND_REG_13
+0x21C0 VAP_VTX_STATE_IND_REG_14
+0x21C4 VAP_VTX_STATE_IND_REG_15
+0x21DC VAP_PSC_SGN_NORM_CNTL
+0x21E0 VAP_PROG_STREAM_CNTL_EXT_0
+0x21E4 VAP_PROG_STREAM_CNTL_EXT_1
+0x21E8 VAP_PROG_STREAM_CNTL_EXT_2
+0x21EC VAP_PROG_STREAM_CNTL_EXT_3
+0x21F0 VAP_PROG_STREAM_CNTL_EXT_4
+0x21F4 VAP_PROG_STREAM_CNTL_EXT_5
+0x21F8 VAP_PROG_STREAM_CNTL_EXT_6
+0x21FC VAP_PROG_STREAM_CNTL_EXT_7
+0x2200 VAP_PVS_VECTOR_INDX_REG
+0x2204 VAP_PVS_VECTOR_DATA_REG
+0x2208 VAP_PVS_VECTOR_DATA_REG_128
+0x2218 VAP_TEX_TO_COLOR_CNTL
+0x221C VAP_CLIP_CNTL
+0x2220 VAP_GB_VERT_CLIP_ADJ
+0x2224 VAP_GB_VERT_DISC_ADJ
+0x2228 VAP_GB_HORZ_CLIP_ADJ
+0x222C VAP_GB_HORZ_DISC_ADJ
+0x2230 VAP_PVS_FLOW_CNTL_ADDRS_0
+0x2234 VAP_PVS_FLOW_CNTL_ADDRS_1
+0x2238 VAP_PVS_FLOW_CNTL_ADDRS_2
+0x223C VAP_PVS_FLOW_CNTL_ADDRS_3
+0x2240 VAP_PVS_FLOW_CNTL_ADDRS_4
+0x2244 VAP_PVS_FLOW_CNTL_ADDRS_5
+0x2248 VAP_PVS_FLOW_CNTL_ADDRS_6
+0x224C VAP_PVS_FLOW_CNTL_ADDRS_7
+0x2250 VAP_PVS_FLOW_CNTL_ADDRS_8
+0x2254 VAP_PVS_FLOW_CNTL_ADDRS_9
+0x2258 VAP_PVS_FLOW_CNTL_ADDRS_10
+0x225C VAP_PVS_FLOW_CNTL_ADDRS_11
+0x2260 VAP_PVS_FLOW_CNTL_ADDRS_12
+0x2264 VAP_PVS_FLOW_CNTL_ADDRS_13
+0x2268 VAP_PVS_FLOW_CNTL_ADDRS_14
+0x226C VAP_PVS_FLOW_CNTL_ADDRS_15
+0x2284 VAP_PVS_STATE_FLUSH_REG
+0x2288 VAP_PVS_VTX_TIMEOUT_REG
+0x2290 VAP_PVS_FLOW_CNTL_LOOP_INDEX_0
+0x2294 VAP_PVS_FLOW_CNTL_LOOP_INDEX_1
+0x2298 VAP_PVS_FLOW_CNTL_LOOP_INDEX_2
+0x229C VAP_PVS_FLOW_CNTL_LOOP_INDEX_3
+0x22A0 VAP_PVS_FLOW_CNTL_LOOP_INDEX_4
+0x22A4 VAP_PVS_FLOW_CNTL_LOOP_INDEX_5
+0x22A8 VAP_PVS_FLOW_CNTL_LOOP_INDEX_6
+0x22AC VAP_PVS_FLOW_CNTL_LOOP_INDEX_7
+0x22B0 VAP_PVS_FLOW_CNTL_LOOP_INDEX_8
+0x22B4 VAP_PVS_FLOW_CNTL_LOOP_INDEX_9
+0x22B8 VAP_PVS_FLOW_CNTL_LOOP_INDEX_10
+0x22BC VAP_PVS_FLOW_CNTL_LOOP_INDEX_11
+0x22C0 VAP_PVS_FLOW_CNTL_LOOP_INDEX_12
+0x22C4 VAP_PVS_FLOW_CNTL_LOOP_INDEX_13
+0x22C8 VAP_PVS_FLOW_CNTL_LOOP_INDEX_14
+0x22CC VAP_PVS_FLOW_CNTL_LOOP_INDEX_15
+0x22D0 VAP_PVS_CODE_CNTL_0
+0x22D4 VAP_PVS_CONST_CNTL
+0x22D8 VAP_PVS_CODE_CNTL_1
+0x22DC VAP_PVS_FLOW_CNTL_OPC
+0x2500 VAP_PVS_FLOW_CNTL_ADDRS_LW_0
+0x2504 VAP_PVS_FLOW_CNTL_ADDRS_UW_0
+0x2508 VAP_PVS_FLOW_CNTL_ADDRS_LW_1
+0x250C VAP_PVS_FLOW_CNTL_ADDRS_UW_1
+0x2510 VAP_PVS_FLOW_CNTL_ADDRS_LW_2
+0x2514 VAP_PVS_FLOW_CNTL_ADDRS_UW_2
+0x2518 VAP_PVS_FLOW_CNTL_ADDRS_LW_3
+0x251C VAP_PVS_FLOW_CNTL_ADDRS_UW_3
+0x2520 VAP_PVS_FLOW_CNTL_ADDRS_LW_4
+0x2524 VAP_PVS_FLOW_CNTL_ADDRS_UW_4
+0x2528 VAP_PVS_FLOW_CNTL_ADDRS_LW_5
+0x252C VAP_PVS_FLOW_CNTL_ADDRS_UW_5
+0x2530 VAP_PVS_FLOW_CNTL_ADDRS_LW_6
+0x2534 VAP_PVS_FLOW_CNTL_ADDRS_UW_6
+0x2538 VAP_PVS_FLOW_CNTL_ADDRS_LW_7
+0x253C VAP_PVS_FLOW_CNTL_ADDRS_UW_7
+0x2540 VAP_PVS_FLOW_CNTL_ADDRS_LW_8
+0x2544 VAP_PVS_FLOW_CNTL_ADDRS_UW_8
+0x2548 VAP_PVS_FLOW_CNTL_ADDRS_LW_9
+0x254C VAP_PVS_FLOW_CNTL_ADDRS_UW_9
+0x2550 VAP_PVS_FLOW_CNTL_ADDRS_LW_10
+0x2554 VAP_PVS_FLOW_CNTL_ADDRS_UW_10
+0x2558 VAP_PVS_FLOW_CNTL_ADDRS_LW_11
+0x255C VAP_PVS_FLOW_CNTL_ADDRS_UW_11
+0x2560 VAP_PVS_FLOW_CNTL_ADDRS_LW_12
+0x2564 VAP_PVS_FLOW_CNTL_ADDRS_UW_12
+0x2568 VAP_PVS_FLOW_CNTL_ADDRS_LW_13
+0x256C VAP_PVS_FLOW_CNTL_ADDRS_UW_13
+0x2570 VAP_PVS_FLOW_CNTL_ADDRS_LW_14
+0x2574 VAP_PVS_FLOW_CNTL_ADDRS_UW_14
+0x2578 VAP_PVS_FLOW_CNTL_ADDRS_LW_15
+0x257C VAP_PVS_FLOW_CNTL_ADDRS_UW_15
+0x342C RB2D_DSTCACHE_CTLSTAT
+0x4000 GB_VAP_RASTER_VTX_FMT_0
+0x4004 GB_VAP_RASTER_VTX_FMT_1
+0x4008 GB_ENABLE
+0x401C GB_SELECT
+0x4020 GB_AA_CONFIG
+0x4024 GB_FIFO_SIZE
+0x4100 TX_INVALTAGS
+0x4200 GA_POINT_S0
+0x4204 GA_POINT_T0
+0x4208 GA_POINT_S1
+0x420C GA_POINT_T1
+0x4214 GA_TRIANGLE_STIPPLE
+0x421C GA_POINT_SIZE
+0x4230 GA_POINT_MINMAX
+0x4234 GA_LINE_CNTL
+0x4238 GA_LINE_STIPPLE_CONFIG
+0x4260 GA_LINE_STIPPLE_VALUE
+0x4264 GA_LINE_S0
+0x4268 GA_LINE_S1
+0x4278 GA_COLOR_CONTROL
+0x427C GA_SOLID_RG
+0x4280 GA_SOLID_BA
+0x4288 GA_POLY_MODE
+0x428C GA_ROUND_MODE
+0x4290 GA_OFFSET
+0x4294 GA_FOG_SCALE
+0x4298 GA_FOG_OFFSET
+0x42A0 SU_TEX_WRAP
+0x42A4 SU_POLY_OFFSET_FRONT_SCALE
+0x42A8 SU_POLY_OFFSET_FRONT_OFFSET
+0x42AC SU_POLY_OFFSET_BACK_SCALE
+0x42B0 SU_POLY_OFFSET_BACK_OFFSET
+0x42B4 SU_POLY_OFFSET_ENABLE
+0x42B8 SU_CULL_MODE
+0x42C0 SU_DEPTH_SCALE
+0x42C4 SU_DEPTH_OFFSET
+0x42C8 SU_REG_DEST
+0x4300 RS_COUNT
+0x4304 RS_INST_COUNT
+0x4074 RS_IP_0
+0x4078 RS_IP_1
+0x407C RS_IP_2
+0x4080 RS_IP_3
+0x4084 RS_IP_4
+0x4088 RS_IP_5
+0x408C RS_IP_6
+0x4090 RS_IP_7
+0x4094 RS_IP_8
+0x4098 RS_IP_9
+0x409C RS_IP_10
+0x40A0 RS_IP_11
+0x40A4 RS_IP_12
+0x40A8 RS_IP_13
+0x40AC RS_IP_14
+0x40B0 RS_IP_15
+0x4320 RS_INST_0
+0x4324 RS_INST_1
+0x4328 RS_INST_2
+0x432C RS_INST_3
+0x4330 RS_INST_4
+0x4334 RS_INST_5
+0x4338 RS_INST_6
+0x433C RS_INST_7
+0x4340 RS_INST_8
+0x4344 RS_INST_9
+0x4348 RS_INST_10
+0x434C RS_INST_11
+0x4350 RS_INST_12
+0x4354 RS_INST_13
+0x4358 RS_INST_14
+0x435C RS_INST_15
+0x43A4 SC_HYPERZ_EN
+0x43A8 SC_EDGERULE
+0x43B0 SC_CLIP_0_A
+0x43B4 SC_CLIP_0_B
+0x43B8 SC_CLIP_1_A
+0x43BC SC_CLIP_1_B
+0x43C0 SC_CLIP_2_A
+0x43C4 SC_CLIP_2_B
+0x43C8 SC_CLIP_3_A
+0x43CC SC_CLIP_3_B
+0x43D0 SC_CLIP_RULE
+0x43E0 SC_SCISSOR0
+0x43E8 SC_SCREENDOOR
+0x4440 TX_FILTER1_0
+0x4444 TX_FILTER1_1
+0x4448 TX_FILTER1_2
+0x444C TX_FILTER1_3
+0x4450 TX_FILTER1_4
+0x4454 TX_FILTER1_5
+0x4458 TX_FILTER1_6
+0x445C TX_FILTER1_7
+0x4460 TX_FILTER1_8
+0x4464 TX_FILTER1_9
+0x4468 TX_FILTER1_10
+0x446C TX_FILTER1_11
+0x4470 TX_FILTER1_12
+0x4474 TX_FILTER1_13
+0x4478 TX_FILTER1_14
+0x447C TX_FILTER1_15
+0x4580 TX_CHROMA_KEY_0
+0x4584 TX_CHROMA_KEY_1
+0x4588 TX_CHROMA_KEY_2
+0x458C TX_CHROMA_KEY_3
+0x4590 TX_CHROMA_KEY_4
+0x4594 TX_CHROMA_KEY_5
+0x4598 TX_CHROMA_KEY_6
+0x459C TX_CHROMA_KEY_7
+0x45A0 TX_CHROMA_KEY_8
+0x45A4 TX_CHROMA_KEY_9
+0x45A8 TX_CHROMA_KEY_10
+0x45AC TX_CHROMA_KEY_11
+0x45B0 TX_CHROMA_KEY_12
+0x45B4 TX_CHROMA_KEY_13
+0x45B8 TX_CHROMA_KEY_14
+0x45BC TX_CHROMA_KEY_15
+0x45C0 TX_BORDER_COLOR_0
+0x45C4 TX_BORDER_COLOR_1
+0x45C8 TX_BORDER_COLOR_2
+0x45CC TX_BORDER_COLOR_3
+0x45D0 TX_BORDER_COLOR_4
+0x45D4 TX_BORDER_COLOR_5
+0x45D8 TX_BORDER_COLOR_6
+0x45DC TX_BORDER_COLOR_7
+0x45E0 TX_BORDER_COLOR_8
+0x45E4 TX_BORDER_COLOR_9
+0x45E8 TX_BORDER_COLOR_10
+0x45EC TX_BORDER_COLOR_11
+0x45F0 TX_BORDER_COLOR_12
+0x45F4 TX_BORDER_COLOR_13
+0x45F8 TX_BORDER_COLOR_14
+0x45FC TX_BORDER_COLOR_15
+0x4250 GA_US_VECTOR_INDEX
+0x4254 GA_US_VECTOR_DATA
+0x4600 US_CONFIG
+0x4604 US_PIXSIZE
+0x4620 US_FC_BOOL_CONST
+0x4624 US_FC_CTRL
+0x4630 US_CODE_ADDR
+0x4634 US_CODE_RANGE
+0x4638 US_CODE_OFFSET
+0x46A4 US_OUT_FMT_0
+0x46A8 US_OUT_FMT_1
+0x46AC US_OUT_FMT_2
+0x46B0 US_OUT_FMT_3
+0x46B4 US_W_FMT
+0x4BC0 FG_FOG_BLEND
+0x4BC4 FG_FOG_FACTOR
+0x4BC8 FG_FOG_COLOR_R
+0x4BCC FG_FOG_COLOR_G
+0x4BD0 FG_FOG_COLOR_B
+0x4BD4 FG_ALPHA_FUNC
+0x4BD8 FG_DEPTH_SRC
+0x4C00 US_ALU_CONST_R_0
+0x4C04 US_ALU_CONST_G_0
+0x4C08 US_ALU_CONST_B_0
+0x4C0C US_ALU_CONST_A_0
+0x4C10 US_ALU_CONST_R_1
+0x4C14 US_ALU_CONST_G_1
+0x4C18 US_ALU_CONST_B_1
+0x4C1C US_ALU_CONST_A_1
+0x4C20 US_ALU_CONST_R_2
+0x4C24 US_ALU_CONST_G_2
+0x4C28 US_ALU_CONST_B_2
+0x4C2C US_ALU_CONST_A_2
+0x4C30 US_ALU_CONST_R_3
+0x4C34 US_ALU_CONST_G_3
+0x4C38 US_ALU_CONST_B_3
+0x4C3C US_ALU_CONST_A_3
+0x4C40 US_ALU_CONST_R_4
+0x4C44 US_ALU_CONST_G_4
+0x4C48 US_ALU_CONST_B_4
+0x4C4C US_ALU_CONST_A_4
+0x4C50 US_ALU_CONST_R_5
+0x4C54 US_ALU_CONST_G_5
+0x4C58 US_ALU_CONST_B_5
+0x4C5C US_ALU_CONST_A_5
+0x4C60 US_ALU_CONST_R_6
+0x4C64 US_ALU_CONST_G_6
+0x4C68 US_ALU_CONST_B_6
+0x4C6C US_ALU_CONST_A_6
+0x4C70 US_ALU_CONST_R_7
+0x4C74 US_ALU_CONST_G_7
+0x4C78 US_ALU_CONST_B_7
+0x4C7C US_ALU_CONST_A_7
+0x4C80 US_ALU_CONST_R_8
+0x4C84 US_ALU_CONST_G_8
+0x4C88 US_ALU_CONST_B_8
+0x4C8C US_ALU_CONST_A_8
+0x4C90 US_ALU_CONST_R_9
+0x4C94 US_ALU_CONST_G_9
+0x4C98 US_ALU_CONST_B_9
+0x4C9C US_ALU_CONST_A_9
+0x4CA0 US_ALU_CONST_R_10
+0x4CA4 US_ALU_CONST_G_10
+0x4CA8 US_ALU_CONST_B_10
+0x4CAC US_ALU_CONST_A_10
+0x4CB0 US_ALU_CONST_R_11
+0x4CB4 US_ALU_CONST_G_11
+0x4CB8 US_ALU_CONST_B_11
+0x4CBC US_ALU_CONST_A_11
+0x4CC0 US_ALU_CONST_R_12
+0x4CC4 US_ALU_CONST_G_12
+0x4CC8 US_ALU_CONST_B_12
+0x4CCC US_ALU_CONST_A_12
+0x4CD0 US_ALU_CONST_R_13
+0x4CD4 US_ALU_CONST_G_13
+0x4CD8 US_ALU_CONST_B_13
+0x4CDC US_ALU_CONST_A_13
+0x4CE0 US_ALU_CONST_R_14
+0x4CE4 US_ALU_CONST_G_14
+0x4CE8 US_ALU_CONST_B_14
+0x4CEC US_ALU_CONST_A_14
+0x4CF0 US_ALU_CONST_R_15
+0x4CF4 US_ALU_CONST_G_15
+0x4CF8 US_ALU_CONST_B_15
+0x4CFC US_ALU_CONST_A_15
+0x4D00 US_ALU_CONST_R_16
+0x4D04 US_ALU_CONST_G_16
+0x4D08 US_ALU_CONST_B_16
+0x4D0C US_ALU_CONST_A_16
+0x4D10 US_ALU_CONST_R_17
+0x4D14 US_ALU_CONST_G_17
+0x4D18 US_ALU_CONST_B_17
+0x4D1C US_ALU_CONST_A_17
+0x4D20 US_ALU_CONST_R_18
+0x4D24 US_ALU_CONST_G_18
+0x4D28 US_ALU_CONST_B_18
+0x4D2C US_ALU_CONST_A_18
+0x4D30 US_ALU_CONST_R_19
+0x4D34 US_ALU_CONST_G_19
+0x4D38 US_ALU_CONST_B_19
+0x4D3C US_ALU_CONST_A_19
+0x4D40 US_ALU_CONST_R_20
+0x4D44 US_ALU_CONST_G_20
+0x4D48 US_ALU_CONST_B_20
+0x4D4C US_ALU_CONST_A_20
+0x4D50 US_ALU_CONST_R_21
+0x4D54 US_ALU_CONST_G_21
+0x4D58 US_ALU_CONST_B_21
+0x4D5C US_ALU_CONST_A_21
+0x4D60 US_ALU_CONST_R_22
+0x4D64 US_ALU_CONST_G_22
+0x4D68 US_ALU_CONST_B_22
+0x4D6C US_ALU_CONST_A_22
+0x4D70 US_ALU_CONST_R_23
+0x4D74 US_ALU_CONST_G_23
+0x4D78 US_ALU_CONST_B_23
+0x4D7C US_ALU_CONST_A_23
+0x4D80 US_ALU_CONST_R_24
+0x4D84 US_ALU_CONST_G_24
+0x4D88 US_ALU_CONST_B_24
+0x4D8C US_ALU_CONST_A_24
+0x4D90 US_ALU_CONST_R_25
+0x4D94 US_ALU_CONST_G_25
+0x4D98 US_ALU_CONST_B_25
+0x4D9C US_ALU_CONST_A_25
+0x4DA0 US_ALU_CONST_R_26
+0x4DA4 US_ALU_CONST_G_26
+0x4DA8 US_ALU_CONST_B_26
+0x4DAC US_ALU_CONST_A_26
+0x4DB0 US_ALU_CONST_R_27
+0x4DB4 US_ALU_CONST_G_27
+0x4DB8 US_ALU_CONST_B_27
+0x4DBC US_ALU_CONST_A_27
+0x4DC0 US_ALU_CONST_R_28
+0x4DC4 US_ALU_CONST_G_28
+0x4DC8 US_ALU_CONST_B_28
+0x4DCC US_ALU_CONST_A_28
+0x4DD0 US_ALU_CONST_R_29
+0x4DD4 US_ALU_CONST_G_29
+0x4DD8 US_ALU_CONST_B_29
+0x4DDC US_ALU_CONST_A_29
+0x4DE0 US_ALU_CONST_R_30
+0x4DE4 US_ALU_CONST_G_30
+0x4DE8 US_ALU_CONST_B_30
+0x4DEC US_ALU_CONST_A_30
+0x4DF0 US_ALU_CONST_R_31
+0x4DF4 US_ALU_CONST_G_31
+0x4DF8 US_ALU_CONST_B_31
+0x4DFC US_ALU_CONST_A_31
+0x4E04 RB3D_BLENDCNTL_R3
+0x4E08 RB3D_ABLENDCNTL_R3
+0x4E0C RB3D_COLOR_CHANNEL_MASK
+0x4E10 RB3D_CONSTANT_COLOR
+0x4E14 RB3D_COLOR_CLEAR_VALUE
+0x4E18 RB3D_ROPCNTL_R3
+0x4E1C RB3D_CLRCMP_FLIPE_R3
+0x4E20 RB3D_CLRCMP_CLR_R3
+0x4E24 RB3D_CLRCMP_MSK_R3
+0x4E48 RB3D_DEBUG_CTL
+0x4E4C RB3D_DSTCACHE_CTLSTAT_R3
+0x4E50 RB3D_DITHER_CTL
+0x4E54 RB3D_CMASK_OFFSET0
+0x4E58 RB3D_CMASK_OFFSET1
+0x4E5C RB3D_CMASK_OFFSET2
+0x4E60 RB3D_CMASK_OFFSET3
+0x4E64 RB3D_CMASK_PITCH0
+0x4E68 RB3D_CMASK_PITCH1
+0x4E6C RB3D_CMASK_PITCH2
+0x4E70 RB3D_CMASK_PITCH3
+0x4E74 RB3D_CMASK_WRINDEX
+0x4E78 RB3D_CMASK_DWORD
+0x4E7C RB3D_CMASK_RDINDEX
+0x4E80 RB3D_AARESOLVE_OFFSET
+0x4E84 RB3D_AARESOLVE_PITCH
+0x4E88 RB3D_AARESOLVE_CTL
+0x4EA0 RB3D_DISCARD_SRC_PIXEL_LTE_THRESHOLD
+0x4EA4 RB3D_DISCARD_SRC_PIXEL_GTE_THRESHOLD
+0x4EF8 RB3D_CONSTANT_COLOR_AR
+0x4EFC RB3D_CONSTANT_COLOR_GB
+0x4F04 ZB_ZSTENCILCNTL
+0x4F08 ZB_STENCILREFMASK
+0x4F14 ZB_ZTOP
+0x4F18 ZB_ZCACHE_CTLSTAT
+0x4F1C ZB_BW_CNTL
+0x4F28 ZB_DEPTHCLEARVALUE
+0x4F30 ZB_ZMASK_OFFSET
+0x4F34 ZB_ZMASK_PITCH
+0x4F38 ZB_ZMASK_WRINDEX
+0x4F3C ZB_ZMASK_DWORD
+0x4F40 ZB_ZMASK_RDINDEX
+0x4F44 ZB_HIZ_OFFSET
+0x4F48 ZB_HIZ_WRINDEX
+0x4F4C ZB_HIZ_DWORD
+0x4F50 ZB_HIZ_RDINDEX
+0x4F54 ZB_HIZ_PITCH
+0x4F58 ZB_ZPASS_DATA
+0x4FD4 ZB_STENCILREFMASK_BF
diff --git a/drivers/gpu/drm/radeon/rs400.c b/drivers/gpu/drm/radeon/rs400.c
index b29affd9c5d8..a3fbdad938c7 100644
--- a/drivers/gpu/drm/radeon/rs400.c
+++ b/drivers/gpu/drm/radeon/rs400.c
@@ -29,7 +29,6 @@
 #include <drm/drmP.h>
 #include "radeon_reg.h"
 #include "radeon.h"
-#include "radeon_share.h"
 /* rs400,rs480 depends on : */
 void r100_hdp_reset(struct radeon_device *rdev);
@@ -63,7 +62,7 @@ void rs400_gart_adjust_size(struct radeon_device *rdev)
                break;
        default:
                DRM_ERROR("Unable to use IGP GART size %uM\n",
-                          rdev->mc.gtt_size >> 20);
+                          (unsigned)(rdev->mc.gtt_size >> 20));
                DRM_ERROR("Valid GART size for IGP are 32M,64M,128M,256M,512M,1G,2G\n");
                DRM_ERROR("Forcing to 32M GART size\n");
                rdev->mc.gtt_size = 32 * 1024 * 1024;
@@ -93,20 +92,41 @@ void rs400_gart_tlb_flush(struct radeon_device *rdev)
        WREG32_MC(RS480_GART_CACHE_CNTRL, 0);
 }
-int rs400_gart_enable(struct radeon_device *rdev)
+int rs400_gart_init(struct radeon_device *rdev)
 {
-        uint32_t size_reg;
-        uint32_t tmp;
        int r;
+        if (rdev->gart.table.ram.ptr) {
+                WARN(1, "RS400 GART already initialized.\n");
+                return 0;
+        }
+        /* Check gart size */
+        switch(rdev->mc.gtt_size / (1024 * 1024)) {
+        case 32:
+        case 64:
+        case 128:
+        case 256:
+        case 512:
+        case 1024:
+        case 2048:
+                break;
+        default:
+                return -EINVAL;
+        }
        /* Initialize common gart structure */
        r = radeon_gart_init(rdev);
-        if (r) {
+        if (r)
                return r;
-        }
+        if (rs400_debugfs_pcie_gart_info_init(rdev))
-        if (rs400_debugfs_pcie_gart_info_init(rdev)) {
                DRM_ERROR("Failed to register debugfs file for RS400 GART !\n");
-        }
+        rdev->gart.table_size = rdev->gart.num_gpu_pages * 4;
+        return radeon_gart_table_ram_alloc(rdev);
+}
+int rs400_gart_enable(struct radeon_device *rdev)
+{
+        uint32_t size_reg;
+        uint32_t tmp;
        tmp = RREG32_MC(RS690_AIC_CTRL_SCRATCH);
        tmp |= RS690_DIS_OUT_OF_PCI_GART_ACCESS;
@@ -137,13 +157,6 @@ int rs400_gart_enable(struct radeon_device *rdev)
        default:
                return -EINVAL;
        }
-        if (rdev->gart.table.ram.ptr == NULL) {
-                rdev->gart.table_size = rdev->gart.num_gpu_pages * 4;
-                r = radeon_gart_table_ram_alloc(rdev);
-                if (r) {
-                        return r;
-                }
-        }
        /* It should be fine to program it to max value */
        if (rdev->family == CHIP_RS690 || (rdev->family == CHIP_RS740)) {
                WREG32_MC(RS690_MCCFG_AGP_BASE, 0xFFFFFFFF);
@@ -202,6 +215,13 @@ void rs400_gart_disable(struct radeon_device *rdev)
        WREG32_MC(RS480_AGP_ADDRESS_SPACE_SIZE, 0);
 }
+void rs400_gart_fini(struct radeon_device *rdev)
+{
+        rs400_gart_disable(rdev);
+        radeon_gart_table_ram_free(rdev);
+        radeon_gart_fini(rdev);
+}
 int rs400_gart_set_page(struct radeon_device *rdev, int i, uint64_t addr)
 {
        uint32_t entry;
@@ -256,14 +276,12 @@ int rs400_mc_init(struct radeon_device *rdev)
        (void)RREG32(RADEON_HOST_PATH_CNTL);
        WREG32(RADEON_HOST_PATH_CNTL, tmp);
        (void)RREG32(RADEON_HOST_PATH_CNTL);
        return 0;
 }
 void rs400_mc_fini(struct radeon_device *rdev)
 {
-        rs400_gart_disable(rdev);
-        radeon_gart_table_ram_free(rdev);
-        radeon_gart_fini(rdev);
 }
diff --git a/drivers/gpu/drm/radeon/rs600.c b/drivers/gpu/drm/radeon/rs600.c
index 02fd11aad6a2..0e791e26def3 100644
--- a/drivers/gpu/drm/radeon/rs600.c
+++ b/drivers/gpu/drm/radeon/rs600.c
@@ -28,6 +28,9 @@
 #include "drmP.h"
 #include "radeon_reg.h"
 #include "radeon.h"
+#include "avivod.h"
+#include "rs600_reg_safe.h"
 /* rs600 depends on : */
 void r100_hdp_reset(struct radeon_device *rdev);
@@ -66,22 +69,35 @@ void rs600_gart_tlb_flush(struct radeon_device *rdev)
        tmp = RREG32_MC(RS600_MC_PT0_CNTL);
 }
-int rs600_gart_enable(struct radeon_device *rdev)
+int rs600_gart_init(struct radeon_device *rdev)
 {
-        uint32_t tmp;
-        int i;
        int r;
+        if (rdev->gart.table.vram.robj) {
+                WARN(1, "RS600 GART already initialized.\n");
+                return 0;
+        }
        /* Initialize common gart structure */
        r = radeon_gart_init(rdev);
        if (r) {
                return r;
        }
        rdev->gart.table_size = rdev->gart.num_gpu_pages * 8;
-        r = radeon_gart_table_vram_alloc(rdev);
+        return radeon_gart_table_vram_alloc(rdev);
-        if (r) {
+}
-                return r;
+int rs600_gart_enable(struct radeon_device *rdev)
+{
+        uint32_t tmp;
+        int r, i;
+        if (rdev->gart.table.vram.robj == NULL) {
+                dev_err(rdev->dev, "No VRAM object for PCIE GART.\n");
+                return -EINVAL;
        }
+        r = radeon_gart_table_vram_pin(rdev);
+        if (r)
+                return r;
        /* FIXME: setup default page */
        WREG32_MC(RS600_MC_PT0_CNTL,
                 (RS600_EFFECTIVE_L2_CACHE_SIZE(6) |
@@ -136,8 +152,17 @@ void rs600_gart_disable(struct radeon_device *rdev)
        tmp = RREG32_MC(RS600_MC_CNTL1);
        tmp &= ~RS600_ENABLE_PAGE_TABLES;
        WREG32_MC(RS600_MC_CNTL1, tmp);
-        radeon_object_kunmap(rdev->gart.table.vram.robj);
+        if (rdev->gart.table.vram.robj) {
-        radeon_object_unpin(rdev->gart.table.vram.robj);
+                radeon_object_kunmap(rdev->gart.table.vram.robj);
+                radeon_object_unpin(rdev->gart.table.vram.robj);
+        }
+}
+void rs600_gart_fini(struct radeon_device *rdev)
+{
+        rs600_gart_disable(rdev);
+        radeon_gart_table_vram_free(rdev);
+        radeon_gart_fini(rdev);
 }
 #define R600_PTE_VALID     (1 << 0)
@@ -173,6 +198,8 @@ void rs600_mc_disable_clients(struct radeon_device *rdev)
                       "programming pipes. Bad things might happen.\n");
        }
+        radeon_avivo_vga_render_disable(rdev);
        tmp = RREG32(AVIVO_D1VGA_CONTROL);
        WREG32(AVIVO_D1VGA_CONTROL, tmp & ~AVIVO_DVGA_CONTROL_MODE_ENABLE);
        tmp = RREG32(AVIVO_D2VGA_CONTROL);
@@ -233,9 +260,6 @@ int rs600_mc_init(struct radeon_device *rdev)
 void rs600_mc_fini(struct radeon_device *rdev)
 {
-        rs600_gart_disable(rdev);
-        radeon_gart_table_vram_free(rdev);
-        radeon_gart_fini(rdev);
 }
@@ -251,11 +275,9 @@ int rs600_irq_set(struct radeon_device *rdev)
                tmp |= RADEON_SW_INT_ENABLE;
        }
        if (rdev->irq.crtc_vblank_int[0]) {
-                tmp |= AVIVO_DISPLAY_INT_STATUS;
                mode_int |= AVIVO_D1MODE_INT_MASK;
        }
        if (rdev->irq.crtc_vblank_int[1]) {
-                tmp |= AVIVO_DISPLAY_INT_STATUS;
                mode_int |= AVIVO_D2MODE_INT_MASK;
        }
        WREG32(RADEON_GEN_INT_CNTL, tmp);
@@ -410,64 +432,6 @@ void rs600_mc_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v)
        WREG32(RS600_MC_DATA, v);
 }
-static const unsigned rs600_reg_safe_bm[219] = {
-        0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-        0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-        0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-        0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-        0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-        0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-        0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-        0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-        0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-        0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-        0x17FF1FFF, 0xFFFFFFFC, 0xFFFFFFFF, 0xFF30FFBF,
-        0xFFFFFFF8, 0xC3E6FFFF, 0xFFFFF6DF, 0xFFFFFFFF,
-        0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-        0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-        0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFF03F,
-        0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-        0xFFFFFFFF, 0xFFFFEFCE, 0xF00EBFFF, 0x007C0000,
-        0xF0000078, 0xFF000009, 0xFFFFFFFF, 0xFFFFFFFF,
-        0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-        0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-        0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-        0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-        0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-        0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-        0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-        0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-        0xFFFFF7FF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-        0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-        0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-        0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-        0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-        0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-        0xFFFFFC78, 0xFFFFFFFF, 0xFFFFFFFE, 0xFFFFFFFF,
-        0x38FF8F50, 0xFFF88082, 0xF000000C, 0xFAE009FF,
-        0x0000FFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0x00000000,
-        0x00000000, 0x0000C100, 0x00000000, 0x00000000,
-        0x00000000, 0x00000000, 0x00000000, 0x00000000,
-        0x00000000, 0xFFFF0000, 0xFFFFFFFF, 0xFF80FFFF,
-        0x00000000, 0x00000000, 0x00000000, 0x00000000,
-        0x0003FC01, 0xFFFFFCF8, 0xFF800B19, 0xFFFFFFFF,
-        0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-        0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-        0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-        0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-        0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-        0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-        0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-        0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-        0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-        0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-        0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-        0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-        0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-        0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-        0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-};
 int rs600_init(struct radeon_device *rdev)
 {
        rdev->config.r300.reg_safe_bm = rs600_reg_safe_bm;
diff --git a/drivers/gpu/drm/radeon/rs690.c b/drivers/gpu/drm/radeon/rs690.c
index 879882533e45..0f585ca8276d 100644
--- a/drivers/gpu/drm/radeon/rs690.c
+++ b/drivers/gpu/drm/radeon/rs690.c
@@ -94,9 +94,6 @@ int rs690_mc_init(struct radeon_device *rdev)
 void rs690_mc_fini(struct radeon_device *rdev)
 {
-        rs400_gart_disable(rdev);
-        radeon_gart_table_ram_free(rdev);
-        radeon_gart_fini(rdev);
 }
@@ -652,4 +649,3 @@ void rs690_mc_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v)
        WREG32(RS690_MC_DATA, v);
        WREG32(RS690_MC_INDEX, RS690_MC_INDEX_WR_ACK);
 }
diff --git a/drivers/gpu/drm/radeon/rs780.c b/drivers/gpu/drm/radeon/rs780.c
deleted file mode 100644
index 0affcff81825..000000000000
--- a/drivers/gpu/drm/radeon/rs780.c
+++ /dev/null
@@ -1,102 +0,0 @@
-/*
- * Copyright 2008 Advanced Micro Devices, Inc.
- * Copyright 2008 Red Hat Inc.
- * Copyright 2009 Jerome Glisse.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- *
- * Authors: Dave Airlie
- *          Alex Deucher
- *          Jerome Glisse
- */
-#include "drmP.h"
-#include "radeon_reg.h"
-#include "radeon.h"
-/* rs780  depends on : */
-void rs600_mc_disable_clients(struct radeon_device *rdev);
-/* This files gather functions specifics to:
- * rs780
- *
- * Some of these functions might be used by newer ASICs.
- */
-int rs780_mc_wait_for_idle(struct radeon_device *rdev);
-void rs780_gpu_init(struct radeon_device *rdev);
-/*
- * MC
- */
-int rs780_mc_init(struct radeon_device *rdev)
-{
-        rs780_gpu_init(rdev);
-        /* FIXME: implement */
-        rs600_mc_disable_clients(rdev);
-        if (rs780_mc_wait_for_idle(rdev)) {
-                printk(KERN_WARNING "Failed to wait MC idle while "
-                       "programming pipes. Bad things might happen.\n");
-        }
-        return 0;
-}
-void rs780_mc_fini(struct radeon_device *rdev)
-{
-        /* FIXME: implement */
-}
-/*
- * Global GPU functions
- */
-void rs780_errata(struct radeon_device *rdev)
-{
-        rdev->pll_errata = 0;
-}
-int rs780_mc_wait_for_idle(struct radeon_device *rdev)
-{
-        /* FIXME: implement */
-        return 0;
-}
-void rs780_gpu_init(struct radeon_device *rdev)
-{
-        /* FIXME: implement */
-}
-/*
- * VRAM info
- */
-void rs780_vram_get_type(struct radeon_device *rdev)
-{
-        /* FIXME: implement */
-}
-void rs780_vram_info(struct radeon_device *rdev)
-{
-        rs780_vram_get_type(rdev);
-        /* FIXME: implement */
-        /* Could aper size report 0 ? */
-        rdev->mc.aper_base = drm_get_resource_start(rdev->ddev, 0);
-        rdev->mc.aper_size = drm_get_resource_len(rdev->ddev, 0);
-}
diff --git a/drivers/gpu/drm/radeon/rv515.c b/drivers/gpu/drm/radeon/rv515.c
index 0566fb67e460..fd799748e7d8 100644
--- a/drivers/gpu/drm/radeon/rv515.c
+++ b/drivers/gpu/drm/radeon/rv515.c
@@ -27,18 +27,16 @@
 */
 #include <linux/seq_file.h>
 #include "drmP.h"
-#include "rv515r.h"
+#include "rv515d.h"
 #include "radeon.h"
-#include "radeon_share.h"
+#include "rv515_reg_safe.h"
 /* rv515 depends on : */
 void r100_hdp_reset(struct radeon_device *rdev);
 int r100_cp_reset(struct radeon_device *rdev);
 int r100_rb2d_reset(struct radeon_device *rdev);
 int r100_gui_wait_for_idle(struct radeon_device *rdev);
 int r100_cp_init(struct radeon_device *rdev, unsigned ring_size);
-int rv370_pcie_gart_enable(struct radeon_device *rdev);
-void rv370_pcie_gart_disable(struct radeon_device *rdev);
 void r420_pipes_init(struct radeon_device *rdev);
 void rs600_mc_disable_clients(struct radeon_device *rdev);
 void rs600_disable_vga(struct radeon_device *rdev);
@@ -126,9 +124,6 @@ int rv515_mc_init(struct radeon_device *rdev)
 void rv515_mc_fini(struct radeon_device *rdev)
 {
-        rv370_pcie_gart_disable(rdev);
-        radeon_gart_table_vram_free(rdev);
-        radeon_gart_fini(rdev);
 }
@@ -464,301 +459,244 @@ int rv515_debugfs_ga_info_init(struct radeon_device *rdev)
 #endif
 }
 /*
 * Asic initialization
 */
-static const unsigned r500_reg_safe_bm[219] = {
-        0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-        0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-        0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-        0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-        0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-        0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-        0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-        0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-        0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-        0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-        0x17FF1FFF, 0xFFFFFFFC, 0xFFFFFFFF, 0xFF30FFBF,
-        0xFFFFFFF8, 0xC3E6FFFF, 0xFFFFF6DF, 0xFFFFFFFF,
-        0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-        0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-        0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFF03F,
-        0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-        0xFFFFFFFF, 0xFFFFEFCE, 0xF00EBFFF, 0x007C0000,
-        0xF0000038, 0xFF000009, 0xFFFFFFFF, 0xFFFFFFFF,
-        0xFFFFFFFF, 0xFFFFFFFF, 0x00000000, 0xFFFFFFFF,
-        0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-        0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-        0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-        0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-        0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-        0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-        0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-        0xFFFFF7FF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-        0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-        0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-        0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-        0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-        0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-        0x1FFFFC78, 0xFFFFE000, 0xFFFFFFFE, 0xFFFFFFFF,
-        0x38CF8F50, 0xFFF88082, 0xFF0000FC, 0xFAE009FF,
-        0x0000FFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0x00000000,
-        0xFFFF8CFC, 0xFFFFC1FF, 0xFFFFFFFF, 0xFFFFFFFF,
-        0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-        0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFF80FFFF,
-        0x00000000, 0x00000000, 0x00000000, 0x00000000,
-        0x0003FC01, 0x3FFFFCF8, 0xFF800B19, 0xFFDFFFFF,
-        0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-        0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-        0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-        0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-        0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-        0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-        0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-        0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-        0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-        0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-        0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-        0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-        0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-        0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-        0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-};
 int rv515_init(struct radeon_device *rdev)
 {
-        rdev->config.r300.reg_safe_bm = r500_reg_safe_bm;
+        rdev->config.r300.reg_safe_bm = rv515_reg_safe_bm;
-        rdev->config.r300.reg_safe_bm_size = ARRAY_SIZE(r500_reg_safe_bm);
+        rdev->config.r300.reg_safe_bm_size = ARRAY_SIZE(rv515_reg_safe_bm);
        return 0;
 }
-void atom_rv515_force_tv_scaler(struct radeon_device *rdev)
+void atom_rv515_force_tv_scaler(struct radeon_device *rdev, struct radeon_crtc *crtc)
 {
+        int index_reg = 0x6578 + crtc->crtc_offset;
-        WREG32(0x659C, 0x0);
+        int data_reg = 0x657c + crtc->crtc_offset;
-        WREG32(0x6594, 0x705);
-        WREG32(0x65A4, 0x10001);
+        WREG32(0x659C + crtc->crtc_offset, 0x0);
-        WREG32(0x65D8, 0x0);
+        WREG32(0x6594 + crtc->crtc_offset, 0x705);
-        WREG32(0x65B0, 0x0);
+        WREG32(0x65A4 + crtc->crtc_offset, 0x10001);
-        WREG32(0x65C0, 0x0);
+        WREG32(0x65D8 + crtc->crtc_offset, 0x0);
-        WREG32(0x65D4, 0x0);
+        WREG32(0x65B0 + crtc->crtc_offset, 0x0);
-        WREG32(0x6578, 0x0);
+        WREG32(0x65C0 + crtc->crtc_offset, 0x0);
-        WREG32(0x657C, 0x841880A8);
+        WREG32(0x65D4 + crtc->crtc_offset, 0x0);
-        WREG32(0x6578, 0x1);
+        WREG32(index_reg, 0x0);
-        WREG32(0x657C, 0x84208680);
+        WREG32(data_reg, 0x841880A8);
-        WREG32(0x6578, 0x2);
+        WREG32(index_reg, 0x1);
-        WREG32(0x657C, 0xBFF880B0);
+        WREG32(data_reg, 0x84208680);
-        WREG32(0x6578, 0x100);
+        WREG32(index_reg, 0x2);
-        WREG32(0x657C, 0x83D88088);
+        WREG32(data_reg, 0xBFF880B0);
-        WREG32(0x6578, 0x101);
+        WREG32(index_reg, 0x100);
-        WREG32(0x657C, 0x84608680);
+        WREG32(data_reg, 0x83D88088);
-        WREG32(0x6578, 0x102);
+        WREG32(index_reg, 0x101);
-        WREG32(0x657C, 0xBFF080D0);
+        WREG32(data_reg, 0x84608680);
-        WREG32(0x6578, 0x200);
+        WREG32(index_reg, 0x102);
-        WREG32(0x657C, 0x83988068);
+        WREG32(data_reg, 0xBFF080D0);
-        WREG32(0x6578, 0x201);
+        WREG32(index_reg, 0x200);
-        WREG32(0x657C, 0x84A08680);
+        WREG32(data_reg, 0x83988068);
-        WREG32(0x6578, 0x202);
+        WREG32(index_reg, 0x201);
-        WREG32(0x657C, 0xBFF080F8);
+        WREG32(data_reg, 0x84A08680);
-        WREG32(0x6578, 0x300);
+        WREG32(index_reg, 0x202);
-        WREG32(0x657C, 0x83588058);
+        WREG32(data_reg, 0xBFF080F8);
-        WREG32(0x6578, 0x301);
+        WREG32(index_reg, 0x300);
-        WREG32(0x657C, 0x84E08660);
+        WREG32(data_reg, 0x83588058);
-        WREG32(0x6578, 0x302);
+        WREG32(index_reg, 0x301);
-        WREG32(0x657C, 0xBFF88120);
+        WREG32(data_reg, 0x84E08660);
-        WREG32(0x6578, 0x400);
+        WREG32(index_reg, 0x302);
-        WREG32(0x657C, 0x83188040);
+        WREG32(data_reg, 0xBFF88120);
-        WREG32(0x6578, 0x401);
+        WREG32(index_reg, 0x400);
-        WREG32(0x657C, 0x85008660);
+        WREG32(data_reg, 0x83188040);
-        WREG32(0x6578, 0x402);
+        WREG32(index_reg, 0x401);
-        WREG32(0x657C, 0xBFF88150);
+        WREG32(data_reg, 0x85008660);
-        WREG32(0x6578, 0x500);
+        WREG32(index_reg, 0x402);
-        WREG32(0x657C, 0x82D88030);
+        WREG32(data_reg, 0xBFF88150);
-        WREG32(0x6578, 0x501);
+        WREG32(index_reg, 0x500);
-        WREG32(0x657C, 0x85408640);
+        WREG32(data_reg, 0x82D88030);
-        WREG32(0x6578, 0x502);
+        WREG32(index_reg, 0x501);
-        WREG32(0x657C, 0xBFF88180);
+        WREG32(data_reg, 0x85408640);
-        WREG32(0x6578, 0x600);
+        WREG32(index_reg, 0x502);
-        WREG32(0x657C, 0x82A08018);
+        WREG32(data_reg, 0xBFF88180);
-        WREG32(0x6578, 0x601);
+        WREG32(index_reg, 0x600);
-        WREG32(0x657C, 0x85808620);
+        WREG32(data_reg, 0x82A08018);
-        WREG32(0x6578, 0x602);
+        WREG32(index_reg, 0x601);
-        WREG32(0x657C, 0xBFF081B8);
+        WREG32(data_reg, 0x85808620);
-        WREG32(0x6578, 0x700);
+        WREG32(index_reg, 0x602);
-        WREG32(0x657C, 0x82608010);
+        WREG32(data_reg, 0xBFF081B8);
-        WREG32(0x6578, 0x701);
+        WREG32(index_reg, 0x700);
-        WREG32(0x657C, 0x85A08600);
+        WREG32(data_reg, 0x82608010);
-        WREG32(0x6578, 0x702);
+        WREG32(index_reg, 0x701);
-        WREG32(0x657C, 0x800081F0);
+        WREG32(data_reg, 0x85A08600);
-        WREG32(0x6578, 0x800);
+        WREG32(index_reg, 0x702);
-        WREG32(0x657C, 0x8228BFF8);
+        WREG32(data_reg, 0x800081F0);
-        WREG32(0x6578, 0x801);
+        WREG32(index_reg, 0x800);
-        WREG32(0x657C, 0x85E085E0);
+        WREG32(data_reg, 0x8228BFF8);
-        WREG32(0x6578, 0x802);
+        WREG32(index_reg, 0x801);
-        WREG32(0x657C, 0xBFF88228);
+        WREG32(data_reg, 0x85E085E0);
-        WREG32(0x6578, 0x10000);
+        WREG32(index_reg, 0x802);
-        WREG32(0x657C, 0x82A8BF00);
+        WREG32(data_reg, 0xBFF88228);
-        WREG32(0x6578, 0x10001);
+        WREG32(index_reg, 0x10000);
-        WREG32(0x657C, 0x82A08CC0);
+        WREG32(data_reg, 0x82A8BF00);
-        WREG32(0x6578, 0x10002);
+        WREG32(index_reg, 0x10001);
-        WREG32(0x657C, 0x8008BEF8);
+        WREG32(data_reg, 0x82A08CC0);
-        WREG32(0x6578, 0x10100);
+        WREG32(index_reg, 0x10002);
-        WREG32(0x657C, 0x81F0BF28);
+        WREG32(data_reg, 0x8008BEF8);
-        WREG32(0x6578, 0x10101);
+        WREG32(index_reg, 0x10100);
-        WREG32(0x657C, 0x83608CA0);
+        WREG32(data_reg, 0x81F0BF28);
-        WREG32(0x6578, 0x10102);
+        WREG32(index_reg, 0x10101);
-        WREG32(0x657C, 0x8018BED0);
+        WREG32(data_reg, 0x83608CA0);
-        WREG32(0x6578, 0x10200);
+        WREG32(index_reg, 0x10102);
-        WREG32(0x657C, 0x8148BF38);
+        WREG32(data_reg, 0x8018BED0);
-        WREG32(0x6578, 0x10201);
+        WREG32(index_reg, 0x10200);
-        WREG32(0x657C, 0x84408C80);
+        WREG32(data_reg, 0x8148BF38);
-        WREG32(0x6578, 0x10202);
+        WREG32(index_reg, 0x10201);
-        WREG32(0x657C, 0x8008BEB8);
+        WREG32(data_reg, 0x84408C80);
-        WREG32(0x6578, 0x10300);
+        WREG32(index_reg, 0x10202);
-        WREG32(0x657C, 0x80B0BF78);
+        WREG32(data_reg, 0x8008BEB8);
-        WREG32(0x6578, 0x10301);
+        WREG32(index_reg, 0x10300);
-        WREG32(0x657C, 0x85008C20);
+        WREG32(data_reg, 0x80B0BF78);
-        WREG32(0x6578, 0x10302);
+        WREG32(index_reg, 0x10301);
-        WREG32(0x657C, 0x8020BEA0);
+        WREG32(data_reg, 0x85008C20);
-        WREG32(0x6578, 0x10400);
+        WREG32(index_reg, 0x10302);
-        WREG32(0x657C, 0x8028BF90);
+        WREG32(data_reg, 0x8020BEA0);
-        WREG32(0x6578, 0x10401);
+        WREG32(index_reg, 0x10400);
-        WREG32(0x657C, 0x85E08BC0);
+        WREG32(data_reg, 0x8028BF90);
-        WREG32(0x6578, 0x10402);
+        WREG32(index_reg, 0x10401);
-        WREG32(0x657C, 0x8018BE90);
+        WREG32(data_reg, 0x85E08BC0);
-        WREG32(0x6578, 0x10500);
+        WREG32(index_reg, 0x10402);
-        WREG32(0x657C, 0xBFB8BFB0);
+        WREG32(data_reg, 0x8018BE90);
-        WREG32(0x6578, 0x10501);
+        WREG32(index_reg, 0x10500);
-        WREG32(0x657C, 0x86C08B40);
+        WREG32(data_reg, 0xBFB8BFB0);
-        WREG32(0x6578, 0x10502);
+        WREG32(index_reg, 0x10501);
-        WREG32(0x657C, 0x8010BE90);
+        WREG32(data_reg, 0x86C08B40);
-        WREG32(0x6578, 0x10600);
+        WREG32(index_reg, 0x10502);
-        WREG32(0x657C, 0xBF58BFC8);
+        WREG32(data_reg, 0x8010BE90);
-        WREG32(0x6578, 0x10601);
+        WREG32(index_reg, 0x10600);
-        WREG32(0x657C, 0x87A08AA0);
+        WREG32(data_reg, 0xBF58BFC8);
-        WREG32(0x6578, 0x10602);
+        WREG32(index_reg, 0x10601);
-        WREG32(0x657C, 0x8010BE98);
+        WREG32(data_reg, 0x87A08AA0);
-        WREG32(0x6578, 0x10700);
+        WREG32(index_reg, 0x10602);
-        WREG32(0x657C, 0xBF10BFF0);
+        WREG32(data_reg, 0x8010BE98);
-        WREG32(0x6578, 0x10701);
+        WREG32(index_reg, 0x10700);
-        WREG32(0x657C, 0x886089E0);
+        WREG32(data_reg, 0xBF10BFF0);
-        WREG32(0x6578, 0x10702);
+        WREG32(index_reg, 0x10701);
-        WREG32(0x657C, 0x8018BEB0);
+        WREG32(data_reg, 0x886089E0);
-        WREG32(0x6578, 0x10800);
+        WREG32(index_reg, 0x10702);
-        WREG32(0x657C, 0xBED8BFE8);
+        WREG32(data_reg, 0x8018BEB0);
-        WREG32(0x6578, 0x10801);
+        WREG32(index_reg, 0x10800);
-        WREG32(0x657C, 0x89408940);
+        WREG32(data_reg, 0xBED8BFE8);
-        WREG32(0x6578, 0x10802);
+        WREG32(index_reg, 0x10801);
-        WREG32(0x657C, 0xBFE8BED8);
+        WREG32(data_reg, 0x89408940);
-        WREG32(0x6578, 0x20000);
+        WREG32(index_reg, 0x10802);
-        WREG32(0x657C, 0x80008000);
+        WREG32(data_reg, 0xBFE8BED8);
-        WREG32(0x6578, 0x20001);
+        WREG32(index_reg, 0x20000);
-        WREG32(0x657C, 0x90008000);
+        WREG32(data_reg, 0x80008000);
-        WREG32(0x6578, 0x20002);
+        WREG32(index_reg, 0x20001);
-        WREG32(0x657C, 0x80008000);
+        WREG32(data_reg, 0x90008000);
-        WREG32(0x6578, 0x20003);
+        WREG32(index_reg, 0x20002);
-        WREG32(0x657C, 0x80008000);
+        WREG32(data_reg, 0x80008000);
-        WREG32(0x6578, 0x20100);
+        WREG32(index_reg, 0x20003);
-        WREG32(0x657C, 0x80108000);
+        WREG32(data_reg, 0x80008000);
-        WREG32(0x6578, 0x20101);
+        WREG32(index_reg, 0x20100);
-        WREG32(0x657C, 0x8FE0BF70);
+        WREG32(data_reg, 0x80108000);
-        WREG32(0x6578, 0x20102);
+        WREG32(index_reg, 0x20101);
-        WREG32(0x657C, 0xBFE880C0);
+        WREG32(data_reg, 0x8FE0BF70);
-        WREG32(0x6578, 0x20103);
+        WREG32(index_reg, 0x20102);
-        WREG32(0x657C, 0x80008000);
+        WREG32(data_reg, 0xBFE880C0);
-        WREG32(0x6578, 0x20200);
+        WREG32(index_reg, 0x20103);
-        WREG32(0x657C, 0x8018BFF8);
+        WREG32(data_reg, 0x80008000);
-        WREG32(0x6578, 0x20201);
+        WREG32(index_reg, 0x20200);
-        WREG32(0x657C, 0x8F80BF08);
+        WREG32(data_reg, 0x8018BFF8);
-        WREG32(0x6578, 0x20202);
+        WREG32(index_reg, 0x20201);
-        WREG32(0x657C, 0xBFD081A0);
+        WREG32(data_reg, 0x8F80BF08);
-        WREG32(0x6578, 0x20203);
+        WREG32(index_reg, 0x20202);
-        WREG32(0x657C, 0xBFF88000);
+        WREG32(data_reg, 0xBFD081A0);
-        WREG32(0x6578, 0x20300);
+        WREG32(index_reg, 0x20203);
-        WREG32(0x657C, 0x80188000);
+        WREG32(data_reg, 0xBFF88000);
-        WREG32(0x6578, 0x20301);
+        WREG32(index_reg, 0x20300);
-        WREG32(0x657C, 0x8EE0BEC0);
+        WREG32(data_reg, 0x80188000);
-        WREG32(0x6578, 0x20302);
+        WREG32(index_reg, 0x20301);
-        WREG32(0x657C, 0xBFB082A0);
+        WREG32(data_reg, 0x8EE0BEC0);
-        WREG32(0x6578, 0x20303);
+        WREG32(index_reg, 0x20302);
-        WREG32(0x657C, 0x80008000);
+        WREG32(data_reg, 0xBFB082A0);
-        WREG32(0x6578, 0x20400);
+        WREG32(index_reg, 0x20303);
-        WREG32(0x657C, 0x80188000);
+        WREG32(data_reg, 0x80008000);
-        WREG32(0x6578, 0x20401);
+        WREG32(index_reg, 0x20400);
-        WREG32(0x657C, 0x8E00BEA0);
+        WREG32(data_reg, 0x80188000);
-        WREG32(0x6578, 0x20402);
+        WREG32(index_reg, 0x20401);
-        WREG32(0x657C, 0xBF8883C0);
+        WREG32(data_reg, 0x8E00BEA0);
-        WREG32(0x6578, 0x20403);
+        WREG32(index_reg, 0x20402);
-        WREG32(0x657C, 0x80008000);
+        WREG32(data_reg, 0xBF8883C0);
-        WREG32(0x6578, 0x20500);
+        WREG32(index_reg, 0x20403);
-        WREG32(0x657C, 0x80188000);
+        WREG32(data_reg, 0x80008000);
-        WREG32(0x6578, 0x20501);
+        WREG32(index_reg, 0x20500);
-        WREG32(0x657C, 0x8D00BE90);
+        WREG32(data_reg, 0x80188000);
-        WREG32(0x6578, 0x20502);
+        WREG32(index_reg, 0x20501);
-        WREG32(0x657C, 0xBF588500);
+        WREG32(data_reg, 0x8D00BE90);
-        WREG32(0x6578, 0x20503);
+        WREG32(index_reg, 0x20502);
-        WREG32(0x657C, 0x80008008);
+        WREG32(data_reg, 0xBF588500);
-        WREG32(0x6578, 0x20600);
+        WREG32(index_reg, 0x20503);
-        WREG32(0x657C, 0x80188000);
+        WREG32(data_reg, 0x80008008);
-        WREG32(0x6578, 0x20601);
+        WREG32(index_reg, 0x20600);
-        WREG32(0x657C, 0x8BC0BE98);
+        WREG32(data_reg, 0x80188000);
-        WREG32(0x6578, 0x20602);
+        WREG32(index_reg, 0x20601);
-        WREG32(0x657C, 0xBF308660);
+        WREG32(data_reg, 0x8BC0BE98);
-        WREG32(0x6578, 0x20603);
+        WREG32(index_reg, 0x20602);
-        WREG32(0x657C, 0x80008008);
+        WREG32(data_reg, 0xBF308660);
-        WREG32(0x6578, 0x20700);
+        WREG32(index_reg, 0x20603);
-        WREG32(0x657C, 0x80108000);
+        WREG32(data_reg, 0x80008008);
-        WREG32(0x6578, 0x20701);
+        WREG32(index_reg, 0x20700);
-        WREG32(0x657C, 0x8A80BEB0);
+        WREG32(data_reg, 0x80108000);
-        WREG32(0x6578, 0x20702);
+        WREG32(index_reg, 0x20701);
-        WREG32(0x657C, 0xBF0087C0);
+        WREG32(data_reg, 0x8A80BEB0);
-        WREG32(0x6578, 0x20703);
+        WREG32(index_reg, 0x20702);
-        WREG32(0x657C, 0x80008008);
+        WREG32(data_reg, 0xBF0087C0);
-        WREG32(0x6578, 0x20800);
+        WREG32(index_reg, 0x20703);
-        WREG32(0x657C, 0x80108000);
+        WREG32(data_reg, 0x80008008);
-        WREG32(0x6578, 0x20801);
+        WREG32(index_reg, 0x20800);
-        WREG32(0x657C, 0x8920BED0);
+        WREG32(data_reg, 0x80108000);
-        WREG32(0x6578, 0x20802);
+        WREG32(index_reg, 0x20801);
-        WREG32(0x657C, 0xBED08920);
+        WREG32(data_reg, 0x8920BED0);
-        WREG32(0x6578, 0x20803);
+        WREG32(index_reg, 0x20802);
-        WREG32(0x657C, 0x80008010);
+        WREG32(data_reg, 0xBED08920);
-        WREG32(0x6578, 0x30000);
+        WREG32(index_reg, 0x20803);
-        WREG32(0x657C, 0x90008000);
+        WREG32(data_reg, 0x80008010);
-        WREG32(0x6578, 0x30001);
+        WREG32(index_reg, 0x30000);
-        WREG32(0x657C, 0x80008000);
+        WREG32(data_reg, 0x90008000);
-        WREG32(0x6578, 0x30100);
+        WREG32(index_reg, 0x30001);
-        WREG32(0x657C, 0x8FE0BF90);
+        WREG32(data_reg, 0x80008000);
-        WREG32(0x6578, 0x30101);
+        WREG32(index_reg, 0x30100);
-        WREG32(0x657C, 0xBFF880A0);
+        WREG32(data_reg, 0x8FE0BF90);
-        WREG32(0x6578, 0x30200);
+        WREG32(index_reg, 0x30101);
-        WREG32(0x657C, 0x8F60BF40);
+        WREG32(data_reg, 0xBFF880A0);
-        WREG32(0x6578, 0x30201);
+        WREG32(index_reg, 0x30200);
-        WREG32(0x657C, 0xBFE88180);
+        WREG32(data_reg, 0x8F60BF40);
-        WREG32(0x6578, 0x30300);
+        WREG32(index_reg, 0x30201);
-        WREG32(0x657C, 0x8EC0BF00);
+        WREG32(data_reg, 0xBFE88180);
-        WREG32(0x6578, 0x30301);
+        WREG32(index_reg, 0x30300);
-        WREG32(0x657C, 0xBFC88280);
+        WREG32(data_reg, 0x8EC0BF00);
-        WREG32(0x6578, 0x30400);
+        WREG32(index_reg, 0x30301);
-        WREG32(0x657C, 0x8DE0BEE0);
+        WREG32(data_reg, 0xBFC88280);
-        WREG32(0x6578, 0x30401);
+        WREG32(index_reg, 0x30400);
-        WREG32(0x657C, 0xBFA083A0);
+        WREG32(data_reg, 0x8DE0BEE0);
-        WREG32(0x6578, 0x30500);
+        WREG32(index_reg, 0x30401);
-        WREG32(0x657C, 0x8CE0BED0);
+        WREG32(data_reg, 0xBFA083A0);
-        WREG32(0x6578, 0x30501);
+        WREG32(index_reg, 0x30500);
-        WREG32(0x657C, 0xBF7884E0);
+        WREG32(data_reg, 0x8CE0BED0);
-        WREG32(0x6578, 0x30600);
+        WREG32(index_reg, 0x30501);
-        WREG32(0x657C, 0x8BA0BED8);
+        WREG32(data_reg, 0xBF7884E0);
-        WREG32(0x6578, 0x30601);
+        WREG32(index_reg, 0x30600);
-        WREG32(0x657C, 0xBF508640);
+        WREG32(data_reg, 0x8BA0BED8);
-        WREG32(0x6578, 0x30700);
+        WREG32(index_reg, 0x30601);
-        WREG32(0x657C, 0x8A60BEE8);
+        WREG32(data_reg, 0xBF508640);
-        WREG32(0x6578, 0x30701);
+        WREG32(index_reg, 0x30700);
-        WREG32(0x657C, 0xBF2087A0);
+        WREG32(data_reg, 0x8A60BEE8);
-        WREG32(0x6578, 0x30800);
+        WREG32(index_reg, 0x30701);
-        WREG32(0x657C, 0x8900BF00);
+        WREG32(data_reg, 0xBF2087A0);
-        WREG32(0x6578, 0x30801);
+        WREG32(index_reg, 0x30800);
-        WREG32(0x657C, 0xBF008900);
+        WREG32(data_reg, 0x8900BF00);
+        WREG32(index_reg, 0x30801);
+        WREG32(data_reg, 0xBF008900);
 }
 struct rv515_watermark {
diff --git a/drivers/gpu/drm/radeon/rv515r.h b/drivers/gpu/drm/radeon/rv515d.h
index f3cf84039906..a65e17ec1c08 100644
--- a/drivers/gpu/drm/radeon/rv515r.h
+++ b/drivers/gpu/drm/radeon/rv515d.h
@@ -25,10 +25,12 @@
 *          Alex Deucher
 *          Jerome Glisse
 */
-#ifndef RV515R_H
+#ifndef __RV515D_H__
-#define RV515R_H
+#define __RV515D_H__
-/* RV515 registers */
+/*
+ * RV515 registers
+ */
 #define PCIE_INDEX                      0x0030
 #define PCIE_DATA                       0x0034
 #define MC_IND_INDEX                    0x0070
@@ -166,5 +168,53 @@
 #define         MC_GLOBW_INIT_LAT_MASK                  0xF0000000
+/*
+ * PM4 packet
+ */
+#define CP_PACKET0                      0x00000000
+#define         PACKET0_BASE_INDEX_SHIFT        0
+#define         PACKET0_BASE_INDEX_MASK         (0x1ffff << 0)
+#define         PACKET0_COUNT_SHIFT             16
+#define         PACKET0_COUNT_MASK              (0x3fff << 16)
+#define CP_PACKET1                      0x40000000
+#define CP_PACKET2                      0x80000000
+#define         PACKET2_PAD_SHIFT               0
+#define         PACKET2_PAD_MASK                (0x3fffffff << 0)
+#define CP_PACKET3                      0xC0000000
+#define         PACKET3_IT_OPCODE_SHIFT         8
+#define         PACKET3_IT_OPCODE_MASK          (0xff << 8)
+#define         PACKET3_COUNT_SHIFT             16
+#define         PACKET3_COUNT_MASK              (0x3fff << 16)
+/* PACKET3 op code */
+#define         PACKET3_NOP                     0x10
+#define         PACKET3_3D_DRAW_VBUF            0x28
+#define         PACKET3_3D_DRAW_IMMD            0x29
+#define         PACKET3_3D_DRAW_INDX            0x2A
+#define         PACKET3_3D_LOAD_VBPNTR          0x2F
+#define         PACKET3_INDX_BUFFER             0x33
+#define         PACKET3_3D_DRAW_VBUF_2          0x34
+#define         PACKET3_3D_DRAW_IMMD_2          0x35
+#define         PACKET3_3D_DRAW_INDX_2          0x36
+#define         PACKET3_BITBLT_MULTI            0x9B
+#define PACKET0(reg, n) (CP_PACKET0 |                                   \
+                         REG_SET(PACKET0_BASE_INDEX, (reg) >> 2) |      \
+                         REG_SET(PACKET0_COUNT, (n)))
+#define PACKET2(v)      (CP_PACKET2 | REG_SET(PACKET2_PAD, (v)))
+#define PACKET3(op, n)  (CP_PACKET3 |                                   \
+                         REG_SET(PACKET3_IT_OPCODE, (op)) |             \
+                         REG_SET(PACKET3_COUNT, (n)))
+#define PACKET_TYPE0    0
+#define PACKET_TYPE1    1
+#define PACKET_TYPE2    2
+#define PACKET_TYPE3    3
+#define CP_PACKET_GET_TYPE(h) (((h) >> 30) & 3)
+#define CP_PACKET_GET_COUNT(h) (((h) >> 16) & 0x3FFF)
+#define CP_PACKET0_GET_REG(h) (((h) & 0x1FFF) << 2)
+#define CP_PACKET0_GET_ONE_REG_WR(h) (((h) >> 15) & 1)
+#define CP_PACKET3_GET_OPCODE(h) (((h) >> 8) & 0xFF)
 #endif
diff --git a/drivers/gpu/drm/radeon/rv770.c b/drivers/gpu/drm/radeon/rv770.c
index 21d8ffd57308..b574c73a5109 100644
--- a/drivers/gpu/drm/radeon/rv770.c
+++ b/drivers/gpu/drm/radeon/rv770.c
@@ -25,100 +25,1038 @@
 *          Alex Deucher
 *          Jerome Glisse
 */
+#include <linux/firmware.h>
+#include <linux/platform_device.h>
 #include "drmP.h"
-#include "radeon_reg.h"
 #include "radeon.h"
+#include "radeon_drm.h"
+#include "rv770d.h"
+#include "avivod.h"
+#include "atom.h"
-/* rv770,rv730,rv710  depends on : */
+#define R700_PFP_UCODE_SIZE 848
-void rs600_mc_disable_clients(struct radeon_device *rdev);
+#define R700_PM4_UCODE_SIZE 1360
-/* This files gather functions specifics to:
+static void rv770_gpu_init(struct radeon_device *rdev);
- * rv770,rv730,rv710
+void rv770_fini(struct radeon_device *rdev);
- *
- * Some of these functions might be used by newer ASICs.
- */
-int rv770_mc_wait_for_idle(struct radeon_device *rdev);
-void rv770_gpu_init(struct radeon_device *rdev);
 /*
- * MC
+ * GART
 */
-int rv770_mc_init(struct radeon_device *rdev)
+int rv770_pcie_gart_enable(struct radeon_device *rdev)
 {
-        uint32_t tmp;
+        u32 tmp;
+        int r, i;
-        rv770_gpu_init(rdev);
+        if (rdev->gart.table.vram.robj == NULL) {
+                dev_err(rdev->dev, "No VRAM object for PCIE GART.\n");
+                return -EINVAL;
+        }
+        r = radeon_gart_table_vram_pin(rdev);
+        if (r)
+                return r;
+        /* Setup L2 cache */
+        WREG32(VM_L2_CNTL, ENABLE_L2_CACHE | ENABLE_L2_FRAGMENT_PROCESSING |
+                                ENABLE_L2_PTE_CACHE_LRU_UPDATE_BY_WRITE |
+                                EFFECTIVE_L2_QUEUE_SIZE(7));
+        WREG32(VM_L2_CNTL2, 0);
+        WREG32(VM_L2_CNTL3, BANK_SELECT(0) | CACHE_UPDATE_MODE(2));
+        /* Setup TLB control */
+        tmp = ENABLE_L1_TLB | ENABLE_L1_FRAGMENT_PROCESSING |
+                SYSTEM_ACCESS_MODE_NOT_IN_SYS |
+                SYSTEM_APERTURE_UNMAPPED_ACCESS_PASS_THRU |
+                EFFECTIVE_L1_TLB_SIZE(5) | EFFECTIVE_L1_QUEUE_SIZE(5);
+        WREG32(MC_VM_MD_L1_TLB0_CNTL, tmp);
+        WREG32(MC_VM_MD_L1_TLB1_CNTL, tmp);
+        WREG32(MC_VM_MD_L1_TLB2_CNTL, tmp);
+        WREG32(MC_VM_MB_L1_TLB0_CNTL, tmp);
+        WREG32(MC_VM_MB_L1_TLB1_CNTL, tmp);
+        WREG32(MC_VM_MB_L1_TLB2_CNTL, tmp);
+        WREG32(MC_VM_MB_L1_TLB3_CNTL, tmp);
+        WREG32(VM_CONTEXT0_PAGE_TABLE_START_ADDR, rdev->mc.gtt_start >> 12);
+        WREG32(VM_CONTEXT0_PAGE_TABLE_END_ADDR, (rdev->mc.gtt_end - 1) >> 12);
+        WREG32(VM_CONTEXT0_PAGE_TABLE_BASE_ADDR, rdev->gart.table_addr >> 12);
+        WREG32(VM_CONTEXT0_CNTL, ENABLE_CONTEXT | PAGE_TABLE_DEPTH(0) |
+                                RANGE_PROTECTION_FAULT_ENABLE_DEFAULT);
+        WREG32(VM_CONTEXT0_PROTECTION_FAULT_DEFAULT_ADDR,
+                        (u32)(rdev->dummy_page.addr >> 12));
+        for (i = 1; i < 7; i++)
+                WREG32(VM_CONTEXT0_CNTL + (i * 4), 0);
-        /* setup the gart before changing location so we can ask to
+        r600_pcie_gart_tlb_flush(rdev);
-         * discard unmapped mc request
+        rdev->gart.ready = true;
-         */
-        /* FIXME: disable out of gart access */
-        tmp = rdev->mc.gtt_location / 4096;
-        tmp = REG_SET(R700_LOGICAL_PAGE_NUMBER, tmp);
-        WREG32(R700_MC_VM_SYSTEM_APERTURE_LOW_ADDR, tmp);
-        tmp = (rdev->mc.gtt_location + rdev->mc.gtt_size) / 4096;
-        tmp = REG_SET(R700_LOGICAL_PAGE_NUMBER, tmp);
-        WREG32(R700_MC_VM_SYSTEM_APERTURE_HIGH_ADDR, tmp);
-        rs600_mc_disable_clients(rdev);
-        if (rv770_mc_wait_for_idle(rdev)) {
-                printk(KERN_WARNING "Failed to wait MC idle while "
-                       "programming pipes. Bad things might happen.\n");
-        }
-        tmp = rdev->mc.vram_location + rdev->mc.mc_vram_size - 1;
-        tmp = REG_SET(R700_MC_FB_TOP, tmp >> 24);
-        tmp |= REG_SET(R700_MC_FB_BASE, rdev->mc.vram_location >> 24);
-        WREG32(R700_MC_VM_FB_LOCATION, tmp);
-        tmp = rdev->mc.gtt_location + rdev->mc.gtt_size - 1;
-        tmp = REG_SET(R700_MC_AGP_TOP, tmp >> 22);
-        WREG32(R700_MC_VM_AGP_TOP, tmp);
-        tmp = REG_SET(R700_MC_AGP_BOT, rdev->mc.gtt_location >> 22);
-        WREG32(R700_MC_VM_AGP_BOT, tmp);
        return 0;
 }
-void rv770_mc_fini(struct radeon_device *rdev)
+void rv770_pcie_gart_disable(struct radeon_device *rdev)
+{
+        u32 tmp;
+        int i;
+        /* Disable all tables */
+        for (i = 0; i < 7; i++)
+                WREG32(VM_CONTEXT0_CNTL + (i * 4), 0);
+        /* Setup L2 cache */
+        WREG32(VM_L2_CNTL, ENABLE_L2_FRAGMENT_PROCESSING |
+                                EFFECTIVE_L2_QUEUE_SIZE(7));
+        WREG32(VM_L2_CNTL2, 0);
+        WREG32(VM_L2_CNTL3, BANK_SELECT(0) | CACHE_UPDATE_MODE(2));
+        /* Setup TLB control */
+        tmp = EFFECTIVE_L1_TLB_SIZE(5) | EFFECTIVE_L1_QUEUE_SIZE(5);
+        WREG32(MC_VM_MD_L1_TLB0_CNTL, tmp);
+        WREG32(MC_VM_MD_L1_TLB1_CNTL, tmp);
+        WREG32(MC_VM_MD_L1_TLB2_CNTL, tmp);
+        WREG32(MC_VM_MB_L1_TLB0_CNTL, tmp);
+        WREG32(MC_VM_MB_L1_TLB1_CNTL, tmp);
+        WREG32(MC_VM_MB_L1_TLB2_CNTL, tmp);
+        WREG32(MC_VM_MB_L1_TLB3_CNTL, tmp);
+        if (rdev->gart.table.vram.robj) {
+                radeon_object_kunmap(rdev->gart.table.vram.robj);
+                radeon_object_unpin(rdev->gart.table.vram.robj);
+        }
+}
+void rv770_pcie_gart_fini(struct radeon_device *rdev)
 {
-        /* FIXME: implement */
+        rv770_pcie_gart_disable(rdev);
+        radeon_gart_table_vram_free(rdev);
+        radeon_gart_fini(rdev);
 }
 /*
- * Global GPU functions
+ * MC
 */
-void rv770_errata(struct radeon_device *rdev)
+static void rv770_mc_resume(struct radeon_device *rdev)
 {
-        rdev->pll_errata = 0;
+        u32 d1vga_control, d2vga_control;
+        u32 vga_render_control, vga_hdp_control;
+        u32 d1crtc_control, d2crtc_control;
+        u32 new_d1grph_primary, new_d1grph_secondary;
+        u32 new_d2grph_primary, new_d2grph_secondary;
+        u64 old_vram_start;
+        u32 tmp;
+        int i, j;
+        /* Initialize HDP */
+        for (i = 0, j = 0; i < 32; i++, j += 0x18) {
+                WREG32((0x2c14 + j), 0x00000000);
+                WREG32((0x2c18 + j), 0x00000000);
+                WREG32((0x2c1c + j), 0x00000000);
+                WREG32((0x2c20 + j), 0x00000000);
+                WREG32((0x2c24 + j), 0x00000000);
+        }
+        WREG32(HDP_REG_COHERENCY_FLUSH_CNTL, 0);
+        d1vga_control = RREG32(D1VGA_CONTROL);
+        d2vga_control = RREG32(D2VGA_CONTROL);
+        vga_render_control = RREG32(VGA_RENDER_CONTROL);
+        vga_hdp_control = RREG32(VGA_HDP_CONTROL);
+        d1crtc_control = RREG32(D1CRTC_CONTROL);
+        d2crtc_control = RREG32(D2CRTC_CONTROL);
+        old_vram_start = (u64)(RREG32(MC_VM_FB_LOCATION) & 0xFFFF) << 24;
+        new_d1grph_primary = RREG32(D1GRPH_PRIMARY_SURFACE_ADDRESS);
+        new_d1grph_secondary = RREG32(D1GRPH_SECONDARY_SURFACE_ADDRESS);
+        new_d1grph_primary += rdev->mc.vram_start - old_vram_start;
+        new_d1grph_secondary += rdev->mc.vram_start - old_vram_start;
+        new_d2grph_primary = RREG32(D2GRPH_PRIMARY_SURFACE_ADDRESS);
+        new_d2grph_secondary = RREG32(D2GRPH_SECONDARY_SURFACE_ADDRESS);
+        new_d2grph_primary += rdev->mc.vram_start - old_vram_start;
+        new_d2grph_secondary += rdev->mc.vram_start - old_vram_start;
+        /* Stop all video */
+        WREG32(D1VGA_CONTROL, 0);
+        WREG32(D2VGA_CONTROL, 0);
+        WREG32(VGA_RENDER_CONTROL, 0);
+        WREG32(D1CRTC_UPDATE_LOCK, 1);
+        WREG32(D2CRTC_UPDATE_LOCK, 1);
+        WREG32(D1CRTC_CONTROL, 0);
+        WREG32(D2CRTC_CONTROL, 0);
+        WREG32(D1CRTC_UPDATE_LOCK, 0);
+        WREG32(D2CRTC_UPDATE_LOCK, 0);
+        mdelay(1);
+        if (r600_mc_wait_for_idle(rdev)) {
+                printk(KERN_WARNING "[drm] MC not idle !\n");
+        }
+        /* Lockout access through VGA aperture*/
+        WREG32(VGA_HDP_CONTROL, VGA_MEMORY_DISABLE);
+        /* Update configuration */
+        WREG32(MC_VM_SYSTEM_APERTURE_LOW_ADDR, rdev->mc.vram_start >> 12);
+        WREG32(MC_VM_SYSTEM_APERTURE_HIGH_ADDR, (rdev->mc.vram_end - 1) >> 12);
+        WREG32(MC_VM_SYSTEM_APERTURE_DEFAULT_ADDR, 0);
+        tmp = (((rdev->mc.vram_end - 1) >> 24) & 0xFFFF) << 16;
+        tmp |= ((rdev->mc.vram_start >> 24) & 0xFFFF);
+        WREG32(MC_VM_FB_LOCATION, tmp);
+        WREG32(HDP_NONSURFACE_BASE, (rdev->mc.vram_start >> 8));
+        WREG32(HDP_NONSURFACE_INFO, (2 << 7));
+        WREG32(HDP_NONSURFACE_SIZE, (rdev->mc.mc_vram_size - 1) | 0x3FF);
+        if (rdev->flags & RADEON_IS_AGP) {
+                WREG32(MC_VM_AGP_TOP, (rdev->mc.gtt_end - 1) >> 16);
+                WREG32(MC_VM_AGP_BOT, rdev->mc.gtt_start >> 16);
+                WREG32(MC_VM_AGP_BASE, rdev->mc.agp_base >> 22);
+        } else {
+                WREG32(MC_VM_AGP_BASE, 0);
+                WREG32(MC_VM_AGP_TOP, 0x0FFFFFFF);
+                WREG32(MC_VM_AGP_BOT, 0x0FFFFFFF);
+        }
+        WREG32(D1GRPH_PRIMARY_SURFACE_ADDRESS, new_d1grph_primary);
+        WREG32(D1GRPH_SECONDARY_SURFACE_ADDRESS, new_d1grph_secondary);
+        WREG32(D2GRPH_PRIMARY_SURFACE_ADDRESS, new_d2grph_primary);
+        WREG32(D2GRPH_SECONDARY_SURFACE_ADDRESS, new_d2grph_secondary);
+        WREG32(VGA_MEMORY_BASE_ADDRESS, rdev->mc.vram_start);
+        /* Unlock host access */
+        WREG32(VGA_HDP_CONTROL, vga_hdp_control);
+        mdelay(1);
+        if (r600_mc_wait_for_idle(rdev)) {
+                printk(KERN_WARNING "[drm] MC not idle !\n");
+        }
+        /* Restore video state */
+        WREG32(D1CRTC_UPDATE_LOCK, 1);
+        WREG32(D2CRTC_UPDATE_LOCK, 1);
+        WREG32(D1CRTC_CONTROL, d1crtc_control);
+        WREG32(D2CRTC_CONTROL, d2crtc_control);
+        WREG32(D1CRTC_UPDATE_LOCK, 0);
+        WREG32(D2CRTC_UPDATE_LOCK, 0);
+        WREG32(D1VGA_CONTROL, d1vga_control);
+        WREG32(D2VGA_CONTROL, d2vga_control);
+        WREG32(VGA_RENDER_CONTROL, vga_render_control);
+        /* we need to own VRAM, so turn off the VGA renderer here
+         * to stop it overwriting our objects */
+        radeon_avivo_vga_render_disable(rdev);
 }
-int rv770_mc_wait_for_idle(struct radeon_device *rdev)
+/*
+ * CP.
+ */
+void r700_cp_stop(struct radeon_device *rdev)
 {
-        /* FIXME: implement */
+        WREG32(CP_ME_CNTL, (CP_ME_HALT | CP_PFP_HALT));
-        return 0;
 }
-void rv770_gpu_init(struct radeon_device *rdev)
+static int rv770_cp_load_microcode(struct radeon_device *rdev)
 {
-        /* FIXME: implement */
+        const __be32 *fw_data;
+        int i;
+        if (!rdev->me_fw || !rdev->pfp_fw)
+                return -EINVAL;
+        r700_cp_stop(rdev);
+        WREG32(CP_RB_CNTL, RB_NO_UPDATE | (15 << 8) | (3 << 0));
+        /* Reset cp */
+        WREG32(GRBM_SOFT_RESET, SOFT_RESET_CP);
+        RREG32(GRBM_SOFT_RESET);
+        mdelay(15);
+        WREG32(GRBM_SOFT_RESET, 0);
+        fw_data = (const __be32 *)rdev->pfp_fw->data;
+        WREG32(CP_PFP_UCODE_ADDR, 0);
+        for (i = 0; i < R700_PFP_UCODE_SIZE; i++)
+                WREG32(CP_PFP_UCODE_DATA, be32_to_cpup(fw_data++));
+        WREG32(CP_PFP_UCODE_ADDR, 0);
+        fw_data = (const __be32 *)rdev->me_fw->data;
+        WREG32(CP_ME_RAM_WADDR, 0);
+        for (i = 0; i < R700_PM4_UCODE_SIZE; i++)
+                WREG32(CP_ME_RAM_DATA, be32_to_cpup(fw_data++));
+        WREG32(CP_PFP_UCODE_ADDR, 0);
+        WREG32(CP_ME_RAM_WADDR, 0);
+        WREG32(CP_ME_RAM_RADDR, 0);
+        return 0;
 }
 /*
- * VRAM info
+ * Core functions
 */
-void rv770_vram_get_type(struct radeon_device *rdev)
+static u32 r700_get_tile_pipe_to_backend_map(u32 num_tile_pipes,
+                                                u32 num_backends,
+                                                u32 backend_disable_mask)
+{
+        u32 backend_map = 0;
+        u32 enabled_backends_mask;
+        u32 enabled_backends_count;
+        u32 cur_pipe;
+        u32 swizzle_pipe[R7XX_MAX_PIPES];
+        u32 cur_backend;
+        u32 i;
+        if (num_tile_pipes > R7XX_MAX_PIPES)
+                num_tile_pipes = R7XX_MAX_PIPES;
+        if (num_tile_pipes < 1)
+                num_tile_pipes = 1;
+        if (num_backends > R7XX_MAX_BACKENDS)
+                num_backends = R7XX_MAX_BACKENDS;
+        if (num_backends < 1)
+                num_backends = 1;
+        enabled_backends_mask = 0;
+        enabled_backends_count = 0;
+        for (i = 0; i < R7XX_MAX_BACKENDS; ++i) {
+                if (((backend_disable_mask >> i) & 1) == 0) {
+                        enabled_backends_mask |= (1 << i);
+                        ++enabled_backends_count;
+                }
+                if (enabled_backends_count == num_backends)
+                        break;
+        }
+        if (enabled_backends_count == 0) {
+                enabled_backends_mask = 1;
+                enabled_backends_count = 1;
+        }
+        if (enabled_backends_count != num_backends)
+                num_backends = enabled_backends_count;
+        memset((uint8_t *)&swizzle_pipe[0], 0, sizeof(u32) * R7XX_MAX_PIPES);
+        switch (num_tile_pipes) {
+        case 1:
+                swizzle_pipe[0] = 0;
+                break;
+        case 2:
+                swizzle_pipe[0] = 0;
+                swizzle_pipe[1] = 1;
+                break;
+        case 3:
+                swizzle_pipe[0] = 0;
+                swizzle_pipe[1] = 2;
+                swizzle_pipe[2] = 1;
+                break;
+        case 4:
+                swizzle_pipe[0] = 0;
+                swizzle_pipe[1] = 2;
+                swizzle_pipe[2] = 3;
+                swizzle_pipe[3] = 1;
+                break;
+        case 5:
+                swizzle_pipe[0] = 0;
+                swizzle_pipe[1] = 2;
+                swizzle_pipe[2] = 4;
+                swizzle_pipe[3] = 1;
+                swizzle_pipe[4] = 3;
+                break;
+        case 6:
+                swizzle_pipe[0] = 0;
+                swizzle_pipe[1] = 2;
+                swizzle_pipe[2] = 4;
+                swizzle_pipe[3] = 5;
+                swizzle_pipe[4] = 3;
+                swizzle_pipe[5] = 1;
+                break;
+        case 7:
+                swizzle_pipe[0] = 0;
+                swizzle_pipe[1] = 2;
+                swizzle_pipe[2] = 4;
+                swizzle_pipe[3] = 6;
+                swizzle_pipe[4] = 3;
+                swizzle_pipe[5] = 1;
+                swizzle_pipe[6] = 5;
+                break;
+        case 8:
+                swizzle_pipe[0] = 0;
+                swizzle_pipe[1] = 2;
+                swizzle_pipe[2] = 4;
+                swizzle_pipe[3] = 6;
+                swizzle_pipe[4] = 3;
+                swizzle_pipe[5] = 1;
+                swizzle_pipe[6] = 7;
+                swizzle_pipe[7] = 5;
+                break;
+        }
+        cur_backend = 0;
+        for (cur_pipe = 0; cur_pipe < num_tile_pipes; ++cur_pipe) {
+                while (((1 << cur_backend) & enabled_backends_mask) == 0)
+                        cur_backend = (cur_backend + 1) % R7XX_MAX_BACKENDS;
+                backend_map |= (u32)(((cur_backend & 3) << (swizzle_pipe[cur_pipe] * 2)));
+                cur_backend = (cur_backend + 1) % R7XX_MAX_BACKENDS;
+        }
+        return backend_map;
+}
+static void rv770_gpu_init(struct radeon_device *rdev)
 {
-        /* FIXME: implement */
+        int i, j, num_qd_pipes;
+        u32 sx_debug_1;
+        u32 smx_dc_ctl0;
+        u32 num_gs_verts_per_thread;
+        u32 vgt_gs_per_es;
+        u32 gs_prim_buffer_depth = 0;
+        u32 sq_ms_fifo_sizes;
+        u32 sq_config;
+        u32 sq_thread_resource_mgmt;
+        u32 hdp_host_path_cntl;
+        u32 sq_dyn_gpr_size_simd_ab_0;
+        u32 backend_map;
+        u32 gb_tiling_config = 0;
+        u32 cc_rb_backend_disable = 0;
+        u32 cc_gc_shader_pipe_config = 0;
+        u32 mc_arb_ramcfg;
+        u32 db_debug4;
+        /* setup chip specs */
+        switch (rdev->family) {
+        case CHIP_RV770:
+                rdev->config.rv770.max_pipes = 4;
+                rdev->config.rv770.max_tile_pipes = 8;
+                rdev->config.rv770.max_simds = 10;
+                rdev->config.rv770.max_backends = 4;
+                rdev->config.rv770.max_gprs = 256;
+                rdev->config.rv770.max_threads = 248;
+                rdev->config.rv770.max_stack_entries = 512;
+                rdev->config.rv770.max_hw_contexts = 8;
+                rdev->config.rv770.max_gs_threads = 16 * 2;
+                rdev->config.rv770.sx_max_export_size = 128;
+                rdev->config.rv770.sx_max_export_pos_size = 16;
+                rdev->config.rv770.sx_max_export_smx_size = 112;
+                rdev->config.rv770.sq_num_cf_insts = 2;
+                rdev->config.rv770.sx_num_of_sets = 7;
+                rdev->config.rv770.sc_prim_fifo_size = 0xF9;
+                rdev->config.rv770.sc_hiz_tile_fifo_size = 0x30;
+                rdev->config.rv770.sc_earlyz_tile_fifo_fize = 0x130;
+                break;
+        case CHIP_RV730:
+                rdev->config.rv770.max_pipes = 2;
+                rdev->config.rv770.max_tile_pipes = 4;
+                rdev->config.rv770.max_simds = 8;
+                rdev->config.rv770.max_backends = 2;
+                rdev->config.rv770.max_gprs = 128;
+                rdev->config.rv770.max_threads = 248;
+                rdev->config.rv770.max_stack_entries = 256;
+                rdev->config.rv770.max_hw_contexts = 8;
+                rdev->config.rv770.max_gs_threads = 16 * 2;
+                rdev->config.rv770.sx_max_export_size = 256;
+                rdev->config.rv770.sx_max_export_pos_size = 32;
+                rdev->config.rv770.sx_max_export_smx_size = 224;
+                rdev->config.rv770.sq_num_cf_insts = 2;
+                rdev->config.rv770.sx_num_of_sets = 7;
+                rdev->config.rv770.sc_prim_fifo_size = 0xf9;
+                rdev->config.rv770.sc_hiz_tile_fifo_size = 0x30;
+                rdev->config.rv770.sc_earlyz_tile_fifo_fize = 0x130;
+                if (rdev->config.rv770.sx_max_export_pos_size > 16) {
+                        rdev->config.rv770.sx_max_export_pos_size -= 16;
+                        rdev->config.rv770.sx_max_export_smx_size += 16;
+                }
+                break;
+        case CHIP_RV710:
+                rdev->config.rv770.max_pipes = 2;
+                rdev->config.rv770.max_tile_pipes = 2;
+                rdev->config.rv770.max_simds = 2;
+                rdev->config.rv770.max_backends = 1;
+                rdev->config.rv770.max_gprs = 256;
+                rdev->config.rv770.max_threads = 192;
+                rdev->config.rv770.max_stack_entries = 256;
+                rdev->config.rv770.max_hw_contexts = 4;
+                rdev->config.rv770.max_gs_threads = 8 * 2;
+                rdev->config.rv770.sx_max_export_size = 128;
+                rdev->config.rv770.sx_max_export_pos_size = 16;
+                rdev->config.rv770.sx_max_export_smx_size = 112;
+                rdev->config.rv770.sq_num_cf_insts = 1;
+                rdev->config.rv770.sx_num_of_sets = 7;
+                rdev->config.rv770.sc_prim_fifo_size = 0x40;
+                rdev->config.rv770.sc_hiz_tile_fifo_size = 0x30;
+                rdev->config.rv770.sc_earlyz_tile_fifo_fize = 0x130;
+                break;
+        case CHIP_RV740:
+                rdev->config.rv770.max_pipes = 4;
+                rdev->config.rv770.max_tile_pipes = 4;
+                rdev->config.rv770.max_simds = 8;
+                rdev->config.rv770.max_backends = 4;
+                rdev->config.rv770.max_gprs = 256;
+                rdev->config.rv770.max_threads = 248;
+                rdev->config.rv770.max_stack_entries = 512;
+                rdev->config.rv770.max_hw_contexts = 8;
+                rdev->config.rv770.max_gs_threads = 16 * 2;
+                rdev->config.rv770.sx_max_export_size = 256;
+                rdev->config.rv770.sx_max_export_pos_size = 32;
+                rdev->config.rv770.sx_max_export_smx_size = 224;
+                rdev->config.rv770.sq_num_cf_insts = 2;
+                rdev->config.rv770.sx_num_of_sets = 7;
+                rdev->config.rv770.sc_prim_fifo_size = 0x100;
+                rdev->config.rv770.sc_hiz_tile_fifo_size = 0x30;
+                rdev->config.rv770.sc_earlyz_tile_fifo_fize = 0x130;
+                if (rdev->config.rv770.sx_max_export_pos_size > 16) {
+                        rdev->config.rv770.sx_max_export_pos_size -= 16;
+                        rdev->config.rv770.sx_max_export_smx_size += 16;
+                }
+                break;
+        default:
+                break;
+        }
+        /* Initialize HDP */
+        j = 0;
+        for (i = 0; i < 32; i++) {
+                WREG32((0x2c14 + j), 0x00000000);
+                WREG32((0x2c18 + j), 0x00000000);
+                WREG32((0x2c1c + j), 0x00000000);
+                WREG32((0x2c20 + j), 0x00000000);
+                WREG32((0x2c24 + j), 0x00000000);
+                j += 0x18;
+        }
+        WREG32(GRBM_CNTL, GRBM_READ_TIMEOUT(0xff));
+        /* setup tiling, simd, pipe config */
+        mc_arb_ramcfg = RREG32(MC_ARB_RAMCFG);
+        switch (rdev->config.rv770.max_tile_pipes) {
+        case 1:
+                gb_tiling_config |= PIPE_TILING(0);
+                break;
+        case 2:
+                gb_tiling_config |= PIPE_TILING(1);
+                break;
+        case 4:
+                gb_tiling_config |= PIPE_TILING(2);
+                break;
+        case 8:
+                gb_tiling_config |= PIPE_TILING(3);
+                break;
+        default:
+                break;
+        }
+        if (rdev->family == CHIP_RV770)
+                gb_tiling_config |= BANK_TILING(1);
+        else
+                gb_tiling_config |= BANK_TILING((mc_arb_ramcfg & NOOFBANK_SHIFT) >> NOOFBANK_MASK);
+        gb_tiling_config |= GROUP_SIZE(0);
+        if (((mc_arb_ramcfg & NOOFROWS_MASK) & NOOFROWS_SHIFT) > 3) {
+                gb_tiling_config |= ROW_TILING(3);
+                gb_tiling_config |= SAMPLE_SPLIT(3);
+        } else {
+                gb_tiling_config |=
+                        ROW_TILING(((mc_arb_ramcfg & NOOFROWS_MASK) >> NOOFROWS_SHIFT));
+                gb_tiling_config |=
+                        SAMPLE_SPLIT(((mc_arb_ramcfg & NOOFROWS_MASK) >> NOOFROWS_SHIFT));
+        }
+        gb_tiling_config |= BANK_SWAPS(1);
+        backend_map = r700_get_tile_pipe_to_backend_map(rdev->config.rv770.max_tile_pipes,
+                                                        rdev->config.rv770.max_backends,
+                                                        (0xff << rdev->config.rv770.max_backends) & 0xff);
+        gb_tiling_config |= BACKEND_MAP(backend_map);
+        cc_gc_shader_pipe_config =
+                INACTIVE_QD_PIPES((R7XX_MAX_PIPES_MASK << rdev->config.rv770.max_pipes) & R7XX_MAX_PIPES_MASK);
+        cc_gc_shader_pipe_config |=
+                INACTIVE_SIMDS((R7XX_MAX_SIMDS_MASK << rdev->config.rv770.max_simds) & R7XX_MAX_SIMDS_MASK);
+        cc_rb_backend_disable =
+                BACKEND_DISABLE((R7XX_MAX_BACKENDS_MASK << rdev->config.rv770.max_backends) & R7XX_MAX_BACKENDS_MASK);
+        WREG32(GB_TILING_CONFIG, gb_tiling_config);
+        WREG32(DCP_TILING_CONFIG, (gb_tiling_config & 0xffff));
+        WREG32(HDP_TILING_CONFIG, (gb_tiling_config & 0xffff));
+        WREG32(CC_RB_BACKEND_DISABLE,      cc_rb_backend_disable);
+        WREG32(CC_GC_SHADER_PIPE_CONFIG,   cc_gc_shader_pipe_config);
+        WREG32(GC_USER_SHADER_PIPE_CONFIG, cc_gc_shader_pipe_config);
+        WREG32(CC_SYS_RB_BACKEND_DISABLE, cc_rb_backend_disable);
+        WREG32(CGTS_SYS_TCC_DISABLE, 0);
+        WREG32(CGTS_TCC_DISABLE, 0);
+        WREG32(CGTS_USER_SYS_TCC_DISABLE, 0);
+        WREG32(CGTS_USER_TCC_DISABLE, 0);
+        num_qd_pipes =
+                R7XX_MAX_BACKENDS - r600_count_pipe_bits(cc_gc_shader_pipe_config & INACTIVE_QD_PIPES_MASK);
+        WREG32(VGT_OUT_DEALLOC_CNTL, (num_qd_pipes * 4) & DEALLOC_DIST_MASK);
+        WREG32(VGT_VERTEX_REUSE_BLOCK_CNTL, ((num_qd_pipes * 4) - 2) & VTX_REUSE_DEPTH_MASK);
+        /* set HW defaults for 3D engine */
+        WREG32(CP_QUEUE_THRESHOLDS, (ROQ_IB1_START(0x16) |
+                                                ROQ_IB2_START(0x2b)));
+        WREG32(CP_MEQ_THRESHOLDS, STQ_SPLIT(0x30));
+        WREG32(TA_CNTL_AUX, (DISABLE_CUBE_ANISO |
+                                        SYNC_GRADIENT |
+                                        SYNC_WALKER |
+                                        SYNC_ALIGNER));
+        sx_debug_1 = RREG32(SX_DEBUG_1);
+        sx_debug_1 |= ENABLE_NEW_SMX_ADDRESS;
+        WREG32(SX_DEBUG_1, sx_debug_1);
+        smx_dc_ctl0 = RREG32(SMX_DC_CTL0);
+        smx_dc_ctl0 &= ~CACHE_DEPTH(0x1ff);
+        smx_dc_ctl0 |= CACHE_DEPTH((rdev->config.rv770.sx_num_of_sets * 64) - 1);
+        WREG32(SMX_DC_CTL0, smx_dc_ctl0);
+        WREG32(SMX_EVENT_CTL, (ES_FLUSH_CTL(4) |
+                                          GS_FLUSH_CTL(4) |
+                                          ACK_FLUSH_CTL(3) |
+                                          SYNC_FLUSH_CTL));
+        if (rdev->family == CHIP_RV770)
+                WREG32(DB_DEBUG3, DB_CLK_OFF_DELAY(0x1f));
+        else {
+                db_debug4 = RREG32(DB_DEBUG4);
+                db_debug4 |= DISABLE_TILE_COVERED_FOR_PS_ITER;
+                WREG32(DB_DEBUG4, db_debug4);
+        }
+        WREG32(SX_EXPORT_BUFFER_SIZES, (COLOR_BUFFER_SIZE((rdev->config.rv770.sx_max_export_size / 4) - 1) |
+                                                   POSITION_BUFFER_SIZE((rdev->config.rv770.sx_max_export_pos_size / 4) - 1) |
+                                                   SMX_BUFFER_SIZE((rdev->config.rv770.sx_max_export_smx_size / 4) - 1)));
+        WREG32(PA_SC_FIFO_SIZE, (SC_PRIM_FIFO_SIZE(rdev->config.rv770.sc_prim_fifo_size) |
+                                                 SC_HIZ_TILE_FIFO_SIZE(rdev->config.rv770.sc_hiz_tile_fifo_size) |
+                                                 SC_EARLYZ_TILE_FIFO_SIZE(rdev->config.rv770.sc_earlyz_tile_fifo_fize)));
+        WREG32(PA_SC_MULTI_CHIP_CNTL, 0);
+        WREG32(VGT_NUM_INSTANCES, 1);
+        WREG32(SPI_CONFIG_CNTL, GPR_WRITE_PRIORITY(0));
+        WREG32(SPI_CONFIG_CNTL_1, VTX_DONE_DELAY(4));
+        WREG32(CP_PERFMON_CNTL, 0);
+        sq_ms_fifo_sizes = (CACHE_FIFO_SIZE(16 * rdev->config.rv770.sq_num_cf_insts) |
+                            DONE_FIFO_HIWATER(0xe0) |
+                            ALU_UPDATE_FIFO_HIWATER(0x8));
+        switch (rdev->family) {
+        case CHIP_RV770:
+                sq_ms_fifo_sizes |= FETCH_FIFO_HIWATER(0x1);
+                break;
+        case CHIP_RV730:
+        case CHIP_RV710:
+        case CHIP_RV740:
+        default:
+                sq_ms_fifo_sizes |= FETCH_FIFO_HIWATER(0x4);
+                break;
+        }
+        WREG32(SQ_MS_FIFO_SIZES, sq_ms_fifo_sizes);
+        /* SQ_CONFIG, SQ_GPR_RESOURCE_MGMT, SQ_THREAD_RESOURCE_MGMT, SQ_STACK_RESOURCE_MGMT
+         * should be adjusted as needed by the 2D/3D drivers.  This just sets default values
+         */
+        sq_config = RREG32(SQ_CONFIG);
+        sq_config &= ~(PS_PRIO(3) |
+                       VS_PRIO(3) |
+                       GS_PRIO(3) |
+                       ES_PRIO(3));
+        sq_config |= (DX9_CONSTS |
+                      VC_ENABLE |
+                      EXPORT_SRC_C |
+                      PS_PRIO(0) |
+                      VS_PRIO(1) |
+                      GS_PRIO(2) |
+                      ES_PRIO(3));
+        if (rdev->family == CHIP_RV710)
+                /* no vertex cache */
+                sq_config &= ~VC_ENABLE;
+        WREG32(SQ_CONFIG, sq_config);
+        WREG32(SQ_GPR_RESOURCE_MGMT_1,  (NUM_PS_GPRS((rdev->config.rv770.max_gprs * 24)/64) |
+                                         NUM_VS_GPRS((rdev->config.rv770.max_gprs * 24)/64) |
+                                         NUM_CLAUSE_TEMP_GPRS(((rdev->config.rv770.max_gprs * 24)/64)/2)));
+        WREG32(SQ_GPR_RESOURCE_MGMT_2,  (NUM_GS_GPRS((rdev->config.rv770.max_gprs * 7)/64) |
+                                         NUM_ES_GPRS((rdev->config.rv770.max_gprs * 7)/64)));
+        sq_thread_resource_mgmt = (NUM_PS_THREADS((rdev->config.rv770.max_threads * 4)/8) |
+                                   NUM_VS_THREADS((rdev->config.rv770.max_threads * 2)/8) |
+                                   NUM_ES_THREADS((rdev->config.rv770.max_threads * 1)/8));
+        if (((rdev->config.rv770.max_threads * 1) / 8) > rdev->config.rv770.max_gs_threads)
+                sq_thread_resource_mgmt |= NUM_GS_THREADS(rdev->config.rv770.max_gs_threads);
+        else
+                sq_thread_resource_mgmt |= NUM_GS_THREADS((rdev->config.rv770.max_gs_threads * 1)/8);
+        WREG32(SQ_THREAD_RESOURCE_MGMT, sq_thread_resource_mgmt);
+        WREG32(SQ_STACK_RESOURCE_MGMT_1, (NUM_PS_STACK_ENTRIES((rdev->config.rv770.max_stack_entries * 1)/4) |
+                                                     NUM_VS_STACK_ENTRIES((rdev->config.rv770.max_stack_entries * 1)/4)));
+        WREG32(SQ_STACK_RESOURCE_MGMT_2, (NUM_GS_STACK_ENTRIES((rdev->config.rv770.max_stack_entries * 1)/4) |
+                                                     NUM_ES_STACK_ENTRIES((rdev->config.rv770.max_stack_entries * 1)/4)));
+        sq_dyn_gpr_size_simd_ab_0 = (SIMDA_RING0((rdev->config.rv770.max_gprs * 38)/64) |
+                                     SIMDA_RING1((rdev->config.rv770.max_gprs * 38)/64) |
+                                     SIMDB_RING0((rdev->config.rv770.max_gprs * 38)/64) |
+                                     SIMDB_RING1((rdev->config.rv770.max_gprs * 38)/64));
+        WREG32(SQ_DYN_GPR_SIZE_SIMD_AB_0, sq_dyn_gpr_size_simd_ab_0);
+        WREG32(SQ_DYN_GPR_SIZE_SIMD_AB_1, sq_dyn_gpr_size_simd_ab_0);
+        WREG32(SQ_DYN_GPR_SIZE_SIMD_AB_2, sq_dyn_gpr_size_simd_ab_0);
+        WREG32(SQ_DYN_GPR_SIZE_SIMD_AB_3, sq_dyn_gpr_size_simd_ab_0);
+        WREG32(SQ_DYN_GPR_SIZE_SIMD_AB_4, sq_dyn_gpr_size_simd_ab_0);
+        WREG32(SQ_DYN_GPR_SIZE_SIMD_AB_5, sq_dyn_gpr_size_simd_ab_0);
+        WREG32(SQ_DYN_GPR_SIZE_SIMD_AB_6, sq_dyn_gpr_size_simd_ab_0);
+        WREG32(SQ_DYN_GPR_SIZE_SIMD_AB_7, sq_dyn_gpr_size_simd_ab_0);
+        WREG32(PA_SC_FORCE_EOV_MAX_CNTS, (FORCE_EOV_MAX_CLK_CNT(4095) |
+                                          FORCE_EOV_MAX_REZ_CNT(255)));
+        if (rdev->family == CHIP_RV710)
+                WREG32(VGT_CACHE_INVALIDATION, (CACHE_INVALIDATION(TC_ONLY) |
+                                                AUTO_INVLD_EN(ES_AND_GS_AUTO)));
+        else
+                WREG32(VGT_CACHE_INVALIDATION, (CACHE_INVALIDATION(VC_AND_TC) |
+                                                AUTO_INVLD_EN(ES_AND_GS_AUTO)));
+        switch (rdev->family) {
+        case CHIP_RV770:
+        case CHIP_RV730:
+        case CHIP_RV740:
+                gs_prim_buffer_depth = 384;
+                break;
+        case CHIP_RV710:
+                gs_prim_buffer_depth = 128;
+                break;
+        default:
+                break;
+        }
+        num_gs_verts_per_thread = rdev->config.rv770.max_pipes * 16;
+        vgt_gs_per_es = gs_prim_buffer_depth + num_gs_verts_per_thread;
+        /* Max value for this is 256 */
+        if (vgt_gs_per_es > 256)
+                vgt_gs_per_es = 256;
+        WREG32(VGT_ES_PER_GS, 128);
+        WREG32(VGT_GS_PER_ES, vgt_gs_per_es);
+        WREG32(VGT_GS_PER_VS, 2);
+        /* more default values. 2D/3D driver should adjust as needed */
+        WREG32(VGT_GS_VERTEX_REUSE, 16);
+        WREG32(PA_SC_LINE_STIPPLE_STATE, 0);
+        WREG32(VGT_STRMOUT_EN, 0);
+        WREG32(SX_MISC, 0);
+        WREG32(PA_SC_MODE_CNTL, 0);
+        WREG32(PA_SC_EDGERULE, 0xaaaaaaaa);
+        WREG32(PA_SC_AA_CONFIG, 0);
+        WREG32(PA_SC_CLIPRECT_RULE, 0xffff);
+        WREG32(PA_SC_LINE_STIPPLE, 0);
+        WREG32(SPI_INPUT_Z, 0);
+        WREG32(SPI_PS_IN_CONTROL_0, NUM_INTERP(2));
+        WREG32(CB_COLOR7_FRAG, 0);
+        /* clear render buffer base addresses */
+        WREG32(CB_COLOR0_BASE, 0);
+        WREG32(CB_COLOR1_BASE, 0);
+        WREG32(CB_COLOR2_BASE, 0);
+        WREG32(CB_COLOR3_BASE, 0);
+        WREG32(CB_COLOR4_BASE, 0);
+        WREG32(CB_COLOR5_BASE, 0);
+        WREG32(CB_COLOR6_BASE, 0);
+        WREG32(CB_COLOR7_BASE, 0);
+        WREG32(TCP_CNTL, 0);
+        hdp_host_path_cntl = RREG32(HDP_HOST_PATH_CNTL);
+        WREG32(HDP_HOST_PATH_CNTL, hdp_host_path_cntl);
+        WREG32(PA_SC_MULTI_CHIP_CNTL, 0);
+        WREG32(PA_CL_ENHANCE, (CLIP_VTX_REORDER_ENA |
+                                          NUM_CLIP_SEQ(3)));
 }
-void rv770_vram_info(struct radeon_device *rdev)
+int rv770_mc_init(struct radeon_device *rdev)
 {
-        rv770_vram_get_type(rdev);
+        fixed20_12 a;
+        u32 tmp;
+        int r;
-        /* FIXME: implement */
+        /* Get VRAM informations */
+        /* FIXME: Don't know how to determine vram width, need to check
+         * vram_width usage
+         */
+        rdev->mc.vram_width = 128;
+        rdev->mc.vram_is_ddr = true;
        /* Could aper size report 0 ? */
        rdev->mc.aper_base = drm_get_resource_start(rdev->ddev, 0);
        rdev->mc.aper_size = drm_get_resource_len(rdev->ddev, 0);
+        /* Setup GPU memory space */
+        rdev->mc.mc_vram_size = RREG32(CONFIG_MEMSIZE);
+        rdev->mc.real_vram_size = RREG32(CONFIG_MEMSIZE);
+        if (rdev->flags & RADEON_IS_AGP) {
+                r = radeon_agp_init(rdev);
+                if (r)
+                        return r;
+                /* gtt_size is setup by radeon_agp_init */
+                rdev->mc.gtt_location = rdev->mc.agp_base;
+                tmp = 0xFFFFFFFFUL - rdev->mc.agp_base - rdev->mc.gtt_size;
+                /* Try to put vram before or after AGP because we
+                 * we want SYSTEM_APERTURE to cover both VRAM and
+                 * AGP so that GPU can catch out of VRAM/AGP access
+                 */
+                if (rdev->mc.gtt_location > rdev->mc.mc_vram_size) {
+                        /* Enought place before */
+                        rdev->mc.vram_location = rdev->mc.gtt_location -
+                                                        rdev->mc.mc_vram_size;
+                } else if (tmp > rdev->mc.mc_vram_size) {
+                        /* Enought place after */
+                        rdev->mc.vram_location = rdev->mc.gtt_location +
+                                                        rdev->mc.gtt_size;
+                } else {
+                        /* Try to setup VRAM then AGP might not
+                         * not work on some card
+                         */
+                        rdev->mc.vram_location = 0x00000000UL;
+                        rdev->mc.gtt_location = rdev->mc.mc_vram_size;
+                }
+        } else {
+                rdev->mc.vram_location = 0x00000000UL;
+                rdev->mc.gtt_location = rdev->mc.mc_vram_size;
+                rdev->mc.gtt_size = radeon_gart_size * 1024 * 1024;
+        }
+        rdev->mc.vram_start = rdev->mc.vram_location;
+        rdev->mc.vram_end = rdev->mc.vram_location + rdev->mc.mc_vram_size;
+        rdev->mc.gtt_start = rdev->mc.gtt_location;
+        rdev->mc.gtt_end = rdev->mc.gtt_location + rdev->mc.gtt_size;
+        /* FIXME: we should enforce default clock in case GPU is not in
+         * default setup
+         */
+        a.full = rfixed_const(100);
+        rdev->pm.sclk.full = rfixed_const(rdev->clock.default_sclk);
+        rdev->pm.sclk.full = rfixed_div(rdev->pm.sclk, a);
+        return 0;
+}
+int rv770_gpu_reset(struct radeon_device *rdev)
+{
+        /* FIXME: implement any rv770 specific bits */
+        return r600_gpu_reset(rdev);
+}
+static int rv770_startup(struct radeon_device *rdev)
+{
+        int r;
+        radeon_gpu_reset(rdev);
+        rv770_mc_resume(rdev);
+        r = rv770_pcie_gart_enable(rdev);
+        if (r)
+                return r;
+        rv770_gpu_init(rdev);
+        r = radeon_object_pin(rdev->r600_blit.shader_obj, RADEON_GEM_DOMAIN_VRAM,
+                              &rdev->r600_blit.shader_gpu_addr);
+        if (r) {
+                DRM_ERROR("failed to pin blit object %d\n", r);
+                return r;
+        }
+        r = radeon_ring_init(rdev, rdev->cp.ring_size);
+        if (r)
+                return r;
+        r = rv770_cp_load_microcode(rdev);
+        if (r)
+                return r;
+        r = r600_cp_resume(rdev);
+        if (r)
+                return r;
+        r = r600_wb_init(rdev);
+        if (r)
+                return r;
+        return 0;
+}
+int rv770_resume(struct radeon_device *rdev)
+{
+        int r;
+        if (radeon_gpu_reset(rdev)) {
+                /* FIXME: what do we want to do here ? */
+        }
+        /* post card */
+        if (rdev->is_atom_bios) {
+                atom_asic_init(rdev->mode_info.atom_context);
+        } else {
+                radeon_combios_asic_init(rdev->ddev);
+        }
+        /* Initialize clocks */
+        r = radeon_clocks_init(rdev);
+        if (r) {
+                return r;
+        }
+        r = rv770_startup(rdev);
+        if (r) {
+                DRM_ERROR("r600 startup failed on resume\n");
+                return r;
+        }
+        r = radeon_ib_test(rdev);
+        if (r) {
+                DRM_ERROR("radeon: failled testing IB (%d).\n", r);
+                return r;
+        }
+        return r;
+}
+int rv770_suspend(struct radeon_device *rdev)
+{
+        /* FIXME: we should wait for ring to be empty */
+        r700_cp_stop(rdev);
+        rdev->cp.ready = false;
+        rv770_pcie_gart_disable(rdev);
+        /* unpin shaders bo */
+        radeon_object_unpin(rdev->r600_blit.shader_obj);
+        return 0;
+}
+/* Plan is to move initialization in that function and use
+ * helper function so that radeon_device_init pretty much
+ * do nothing more than calling asic specific function. This
+ * should also allow to remove a bunch of callback function
+ * like vram_info.
+ */
+int rv770_init(struct radeon_device *rdev)
+{
+        int r;
+        rdev->new_init_path = true;
+        r = radeon_dummy_page_init(rdev);
+        if (r)
+                return r;
+        /* This don't do much */
+        r = radeon_gem_init(rdev);
+        if (r)
+                return r;
+        /* Read BIOS */
+        if (!radeon_get_bios(rdev)) {
+                if (ASIC_IS_AVIVO(rdev))
+                        return -EINVAL;
+        }
+        /* Must be an ATOMBIOS */
+        if (!rdev->is_atom_bios)
+                return -EINVAL;
+        r = radeon_atombios_init(rdev);
+        if (r)
+                return r;
+        /* Post card if necessary */
+        if (!r600_card_posted(rdev) && rdev->bios) {
+                DRM_INFO("GPU not posted. posting now...\n");
+                atom_asic_init(rdev->mode_info.atom_context);
+        }
+        /* Initialize scratch registers */
+        r600_scratch_init(rdev);
+        /* Initialize surface registers */
+        radeon_surface_init(rdev);
+        radeon_get_clock_info(rdev->ddev);
+        r = radeon_clocks_init(rdev);
+        if (r)
+                return r;
+        /* Fence driver */
+        r = radeon_fence_driver_init(rdev);
+        if (r)
+                return r;
+        r = rv770_mc_init(rdev);
+        if (r) {
+                if (rdev->flags & RADEON_IS_AGP) {
+                        /* Retry with disabling AGP */
+                        rv770_fini(rdev);
+                        rdev->flags &= ~RADEON_IS_AGP;
+                        return rv770_init(rdev);
+                }
+                return r;
+        }
+        /* Memory manager */
+        r = radeon_object_init(rdev);
+        if (r)
+                return r;
+        rdev->cp.ring_obj = NULL;
+        r600_ring_init(rdev, 1024 * 1024);
+        if (!rdev->me_fw || !rdev->pfp_fw) {
+                r = r600_cp_init_microcode(rdev);
+                if (r) {
+                        DRM_ERROR("Failed to load firmware!\n");
+                        return r;
+                }
+        }
+        r = r600_pcie_gart_init(rdev);
+        if (r)
+                return r;
+        rdev->accel_working = true;
+        r = r600_blit_init(rdev);
+        if (r) {
+                DRM_ERROR("radeon: failled blitter (%d).\n", r);
+                rdev->accel_working = false;
+        }
+        r = rv770_startup(rdev);
+        if (r) {
+                if (rdev->flags & RADEON_IS_AGP) {
+                        /* Retry with disabling AGP */
+                        rv770_fini(rdev);
+                        rdev->flags &= ~RADEON_IS_AGP;
+                        return rv770_init(rdev);
+                }
+                rdev->accel_working = false;
+        }
+        if (rdev->accel_working) {
+                r = radeon_ib_pool_init(rdev);
+                if (r) {
+                        DRM_ERROR("radeon: failled initializing IB pool (%d).\n", r);
+                        rdev->accel_working = false;
+                }
+                r = radeon_ib_test(rdev);
+                if (r) {
+                        DRM_ERROR("radeon: failled testing IB (%d).\n", r);
+                        rdev->accel_working = false;
+                }
+        }
+        return 0;
+}
+void rv770_fini(struct radeon_device *rdev)
+{
+        rv770_suspend(rdev);
+        r600_blit_fini(rdev);
+        radeon_ring_fini(rdev);
+        rv770_pcie_gart_fini(rdev);
+        radeon_gem_fini(rdev);
+        radeon_fence_driver_fini(rdev);
+        radeon_clocks_fini(rdev);
+#if __OS_HAS_AGP
+        if (rdev->flags & RADEON_IS_AGP)
+                radeon_agp_fini(rdev);
+#endif
+        radeon_object_fini(rdev);
+        if (rdev->is_atom_bios) {
+                radeon_atombios_fini(rdev);
+        } else {
+                radeon_combios_fini(rdev);
+        }
+        kfree(rdev->bios);
+        rdev->bios = NULL;
+        radeon_dummy_page_fini(rdev);
 }
diff --git a/drivers/gpu/drm/radeon/rv770d.h b/drivers/gpu/drm/radeon/rv770d.h
new file mode 100644
index 000000000000..4b9c3d6396ff
--- /dev/null
+++ b/drivers/gpu/drm/radeon/rv770d.h
@@ -0,0 +1,341 @@
+/*
+ * Copyright 2009 Advanced Micro Devices, Inc.
+ * Copyright 2009 Red Hat Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors: Dave Airlie
+ *          Alex Deucher
+ *          Jerome Glisse
+ */
+#ifndef RV770_H
+#define RV770_H
+#define R7XX_MAX_SH_GPRS           256
+#define R7XX_MAX_TEMP_GPRS         16
+#define R7XX_MAX_SH_THREADS        256
+#define R7XX_MAX_SH_STACK_ENTRIES  4096
+#define R7XX_MAX_BACKENDS          8
+#define R7XX_MAX_BACKENDS_MASK     0xff
+#define R7XX_MAX_SIMDS             16
+#define R7XX_MAX_SIMDS_MASK        0xffff
+#define R7XX_MAX_PIPES             8
+#define R7XX_MAX_PIPES_MASK        0xff
+/* Registers */
+#define CB_COLOR0_BASE                                  0x28040
+#define CB_COLOR1_BASE                                  0x28044
+#define CB_COLOR2_BASE                                  0x28048
+#define CB_COLOR3_BASE                                  0x2804C
+#define CB_COLOR4_BASE                                  0x28050
+#define CB_COLOR5_BASE                                  0x28054
+#define CB_COLOR6_BASE                                  0x28058
+#define CB_COLOR7_BASE                                  0x2805C
+#define CB_COLOR7_FRAG                                  0x280FC
+#define CC_GC_SHADER_PIPE_CONFIG                        0x8950
+#define CC_RB_BACKEND_DISABLE                           0x98F4
+#define         BACKEND_DISABLE(x)                              ((x) << 16)
+#define CC_SYS_RB_BACKEND_DISABLE                       0x3F88
+#define CGTS_SYS_TCC_DISABLE                            0x3F90
+#define CGTS_TCC_DISABLE                                0x9148
+#define CGTS_USER_SYS_TCC_DISABLE                       0x3F94
+#define CGTS_USER_TCC_DISABLE                           0x914C
+#define CONFIG_MEMSIZE                                  0x5428
+#define CP_ME_CNTL                                      0x86D8
+#define         CP_ME_HALT                                      (1<<28)
+#define         CP_PFP_HALT                                     (1<<26)
+#define CP_ME_RAM_DATA                                  0xC160
+#define CP_ME_RAM_RADDR                                 0xC158
+#define CP_ME_RAM_WADDR                                 0xC15C
+#define CP_MEQ_THRESHOLDS                               0x8764
+#define         STQ_SPLIT(x)                                    ((x) << 0)
+#define CP_PERFMON_CNTL                                 0x87FC
+#define CP_PFP_UCODE_ADDR                               0xC150
+#define CP_PFP_UCODE_DATA                               0xC154
+#define CP_QUEUE_THRESHOLDS                             0x8760
+#define         ROQ_IB1_START(x)                                ((x) << 0)
+#define         ROQ_IB2_START(x)                                ((x) << 8)
+#define CP_RB_CNTL                                      0xC104
+#define         RB_BUFSZ(x)                                     ((x)<<0)
+#define         RB_BLKSZ(x)                                     ((x)<<8)
+#define         RB_NO_UPDATE                                    (1<<27)
+#define         RB_RPTR_WR_ENA                                  (1<<31)
+#define         BUF_SWAP_32BIT                                  (2 << 16)
+#define CP_RB_RPTR                                      0x8700
+#define CP_RB_RPTR_ADDR                                 0xC10C
+#define CP_RB_RPTR_ADDR_HI                              0xC110
+#define CP_RB_RPTR_WR                                   0xC108
+#define CP_RB_WPTR                                      0xC114
+#define CP_RB_WPTR_ADDR                                 0xC118
+#define CP_RB_WPTR_ADDR_HI                              0xC11C
+#define CP_RB_WPTR_DELAY                                0x8704
+#define CP_SEM_WAIT_TIMER                               0x85BC
+#define DB_DEBUG3                                       0x98B0
+#define         DB_CLK_OFF_DELAY(x)                             ((x) << 11)
+#define DB_DEBUG4                                       0x9B8C
+#define         DISABLE_TILE_COVERED_FOR_PS_ITER                (1 << 6)
+#define DCP_TILING_CONFIG                               0x6CA0
+#define         PIPE_TILING(x)                                  ((x) << 1)
+#define         BANK_TILING(x)                                  ((x) << 4)
+#define         GROUP_SIZE(x)                                   ((x) << 6)
+#define         ROW_TILING(x)                                   ((x) << 8)
+#define         BANK_SWAPS(x)                                   ((x) << 11)
+#define         SAMPLE_SPLIT(x)                                 ((x) << 14)
+#define         BACKEND_MAP(x)                                  ((x) << 16)
+#define GB_TILING_CONFIG                                0x98F0
+#define GC_USER_SHADER_PIPE_CONFIG                      0x8954
+#define         INACTIVE_QD_PIPES(x)                            ((x) << 8)
+#define         INACTIVE_QD_PIPES_MASK                          0x0000FF00
+#define         INACTIVE_SIMDS(x)                               ((x) << 16)
+#define         INACTIVE_SIMDS_MASK                             0x00FF0000
+#define GRBM_CNTL                                       0x8000
+#define         GRBM_READ_TIMEOUT(x)                            ((x) << 0)
+#define GRBM_SOFT_RESET                                 0x8020
+#define         SOFT_RESET_CP                                   (1<<0)
+#define GRBM_STATUS                                     0x8010
+#define         CMDFIFO_AVAIL_MASK                              0x0000000F
+#define         GUI_ACTIVE                                      (1<<31)
+#define GRBM_STATUS2                                    0x8014
+#define HDP_HOST_PATH_CNTL                              0x2C00
+#define HDP_NONSURFACE_BASE                             0x2C04
+#define HDP_NONSURFACE_INFO                             0x2C08
+#define HDP_NONSURFACE_SIZE                             0x2C0C
+#define HDP_REG_COHERENCY_FLUSH_CNTL                    0x54A0
+#define HDP_TILING_CONFIG                               0x2F3C
+#define MC_ARB_RAMCFG                                   0x2760
+#define         NOOFBANK_SHIFT                                  0
+#define         NOOFBANK_MASK                                   0x00000003
+#define         NOOFRANK_SHIFT                                  2
+#define         NOOFRANK_MASK                                   0x00000004
+#define         NOOFROWS_SHIFT                                  3
+#define         NOOFROWS_MASK                                   0x00000038
+#define         NOOFCOLS_SHIFT                                  6
+#define         NOOFCOLS_MASK                                   0x000000C0
+#define         CHANSIZE_SHIFT                                  8
+#define         CHANSIZE_MASK                                   0x00000100
+#define         BURSTLENGTH_SHIFT                               9
+#define         BURSTLENGTH_MASK                                0x00000200
+#define MC_VM_AGP_TOP                                   0x2028
+#define MC_VM_AGP_BOT                                   0x202C
+#define MC_VM_AGP_BASE                                  0x2030
+#define MC_VM_FB_LOCATION                               0x2024
+#define MC_VM_MB_L1_TLB0_CNTL                           0x2234
+#define MC_VM_MB_L1_TLB1_CNTL                           0x2238
+#define MC_VM_MB_L1_TLB2_CNTL                           0x223C
+#define MC_VM_MB_L1_TLB3_CNTL                           0x2240
+#define         ENABLE_L1_TLB                                   (1 << 0)
+#define         ENABLE_L1_FRAGMENT_PROCESSING                   (1 << 1)
+#define         SYSTEM_ACCESS_MODE_PA_ONLY                      (0 << 3)
+#define         SYSTEM_ACCESS_MODE_USE_SYS_MAP                  (1 << 3)
+#define         SYSTEM_ACCESS_MODE_IN_SYS                       (2 << 3)
+#define         SYSTEM_ACCESS_MODE_NOT_IN_SYS                   (3 << 3)
+#define         SYSTEM_APERTURE_UNMAPPED_ACCESS_PASS_THRU       (0 << 5)
+#define         EFFECTIVE_L1_TLB_SIZE(x)                        ((x)<<15)
+#define         EFFECTIVE_L1_QUEUE_SIZE(x)                      ((x)<<18)
+#define MC_VM_MD_L1_TLB0_CNTL                           0x2654
+#define MC_VM_MD_L1_TLB1_CNTL                           0x2658
+#define MC_VM_MD_L1_TLB2_CNTL                           0x265C
+#define MC_VM_SYSTEM_APERTURE_DEFAULT_ADDR              0x203C
+#define MC_VM_SYSTEM_APERTURE_HIGH_ADDR                 0x2038
+#define MC_VM_SYSTEM_APERTURE_LOW_ADDR                  0x2034
+#define PA_CL_ENHANCE                                   0x8A14
+#define         CLIP_VTX_REORDER_ENA                            (1 << 0)
+#define         NUM_CLIP_SEQ(x)                                 ((x) << 1)
+#define PA_SC_AA_CONFIG                                 0x28C04
+#define PA_SC_CLIPRECT_RULE                             0x2820C
+#define PA_SC_EDGERULE                                  0x28230
+#define PA_SC_FIFO_SIZE                                 0x8BCC
+#define         SC_PRIM_FIFO_SIZE(x)                            ((x) << 0)
+#define         SC_HIZ_TILE_FIFO_SIZE(x)                        ((x) << 12)
+#define PA_SC_FORCE_EOV_MAX_CNTS                        0x8B24
+#define         FORCE_EOV_MAX_CLK_CNT(x)                        ((x)<<0)
+#define         FORCE_EOV_MAX_REZ_CNT(x)                        ((x)<<16)
+#define PA_SC_LINE_STIPPLE                              0x28A0C
+#define PA_SC_LINE_STIPPLE_STATE                        0x8B10
+#define PA_SC_MODE_CNTL                                 0x28A4C
+#define PA_SC_MULTI_CHIP_CNTL                           0x8B20
+#define         SC_EARLYZ_TILE_FIFO_SIZE(x)                     ((x) << 20)
+#define SCRATCH_REG0                                    0x8500
+#define SCRATCH_REG1                                    0x8504
+#define SCRATCH_REG2                                    0x8508
+#define SCRATCH_REG3                                    0x850C
+#define SCRATCH_REG4                                    0x8510
+#define SCRATCH_REG5                                    0x8514
+#define SCRATCH_REG6                                    0x8518
+#define SCRATCH_REG7                                    0x851C
+#define SCRATCH_UMSK                                    0x8540
+#define SCRATCH_ADDR                                    0x8544
+#define SMX_DC_CTL0                                     0xA020
+#define         USE_HASH_FUNCTION                               (1 << 0)
+#define         CACHE_DEPTH(x)                                  ((x) << 1)
+#define         FLUSH_ALL_ON_EVENT                              (1 << 10)
+#define         STALL_ON_EVENT                                  (1 << 11)
+#define SMX_EVENT_CTL                                   0xA02C
+#define         ES_FLUSH_CTL(x)                                 ((x) << 0)
+#define         GS_FLUSH_CTL(x)                                 ((x) << 3)
+#define         ACK_FLUSH_CTL(x)                                ((x) << 6)
+#define         SYNC_FLUSH_CTL                                  (1 << 8)
+#define SPI_CONFIG_CNTL                                 0x9100
+#define         GPR_WRITE_PRIORITY(x)                           ((x) << 0)
+#define         DISABLE_INTERP_1                                (1 << 5)
+#define SPI_CONFIG_CNTL_1                               0x913C
+#define         VTX_DONE_DELAY(x)                               ((x) << 0)
+#define         INTERP_ONE_PRIM_PER_ROW                         (1 << 4)
+#define SPI_INPUT_Z                                     0x286D8
+#define SPI_PS_IN_CONTROL_0                             0x286CC
+#define         NUM_INTERP(x)                                   ((x)<<0)
+#define         POSITION_ENA                                    (1<<8)
+#define         POSITION_CENTROID                               (1<<9)
+#define         POSITION_ADDR(x)                                ((x)<<10)
+#define         PARAM_GEN(x)                                    ((x)<<15)
+#define         PARAM_GEN_ADDR(x)                               ((x)<<19)
+#define         BARYC_SAMPLE_CNTL(x)                            ((x)<<26)
+#define         PERSP_GRADIENT_ENA                              (1<<28)
+#define         LINEAR_GRADIENT_ENA                             (1<<29)
+#define         POSITION_SAMPLE                                 (1<<30)
+#define         BARYC_AT_SAMPLE_ENA                             (1<<31)
+#define SQ_CONFIG                                       0x8C00
+#define         VC_ENABLE                                       (1 << 0)
+#define         EXPORT_SRC_C                                    (1 << 1)
+#define         DX9_CONSTS                                      (1 << 2)
+#define         ALU_INST_PREFER_VECTOR                          (1 << 3)
+#define         DX10_CLAMP                                      (1 << 4)
+#define         CLAUSE_SEQ_PRIO(x)                              ((x) << 8)
+#define         PS_PRIO(x)                                      ((x) << 24)
+#define         VS_PRIO(x)                                      ((x) << 26)
+#define         GS_PRIO(x)                                      ((x) << 28)
+#define SQ_DYN_GPR_SIZE_SIMD_AB_0                       0x8DB0
+#define         SIMDA_RING0(x)                                  ((x)<<0)
+#define         SIMDA_RING1(x)                                  ((x)<<8)
+#define         SIMDB_RING0(x)                                  ((x)<<16)
+#define         SIMDB_RING1(x)                                  ((x)<<24)
+#define SQ_DYN_GPR_SIZE_SIMD_AB_1                       0x8DB4
+#define SQ_DYN_GPR_SIZE_SIMD_AB_2                       0x8DB8
+#define SQ_DYN_GPR_SIZE_SIMD_AB_3                       0x8DBC
+#define SQ_DYN_GPR_SIZE_SIMD_AB_4                       0x8DC0
+#define SQ_DYN_GPR_SIZE_SIMD_AB_5                       0x8DC4
+#define SQ_DYN_GPR_SIZE_SIMD_AB_6                       0x8DC8
+#define SQ_DYN_GPR_SIZE_SIMD_AB_7                       0x8DCC
+#define         ES_PRIO(x)                                      ((x) << 30)
+#define SQ_GPR_RESOURCE_MGMT_1                          0x8C04
+#define         NUM_PS_GPRS(x)                                  ((x) << 0)
+#define         NUM_VS_GPRS(x)                                  ((x) << 16)
+#define         DYN_GPR_ENABLE                                  (1 << 27)
+#define         NUM_CLAUSE_TEMP_GPRS(x)                         ((x) << 28)
+#define SQ_GPR_RESOURCE_MGMT_2                          0x8C08
+#define         NUM_GS_GPRS(x)                                  ((x) << 0)
+#define         NUM_ES_GPRS(x)                                  ((x) << 16)
+#define SQ_MS_FIFO_SIZES                                0x8CF0
+#define         CACHE_FIFO_SIZE(x)                              ((x) << 0)
+#define         FETCH_FIFO_HIWATER(x)                           ((x) << 8)
+#define         DONE_FIFO_HIWATER(x)                            ((x) << 16)
+#define         ALU_UPDATE_FIFO_HIWATER(x)                      ((x) << 24)
+#define SQ_STACK_RESOURCE_MGMT_1                        0x8C10
+#define         NUM_PS_STACK_ENTRIES(x)                         ((x) << 0)
+#define         NUM_VS_STACK_ENTRIES(x)                         ((x) << 16)
+#define SQ_STACK_RESOURCE_MGMT_2                        0x8C14
+#define         NUM_GS_STACK_ENTRIES(x)                         ((x) << 0)
+#define         NUM_ES_STACK_ENTRIES(x)                         ((x) << 16)
+#define SQ_THREAD_RESOURCE_MGMT                         0x8C0C
+#define         NUM_PS_THREADS(x)                               ((x) << 0)
+#define         NUM_VS_THREADS(x)                               ((x) << 8)
+#define         NUM_GS_THREADS(x)                               ((x) << 16)
+#define         NUM_ES_THREADS(x)                               ((x) << 24)
+#define SX_DEBUG_1                                      0x9058
+#define         ENABLE_NEW_SMX_ADDRESS                          (1 << 16)
+#define SX_EXPORT_BUFFER_SIZES                          0x900C
+#define         COLOR_BUFFER_SIZE(x)                            ((x) << 0)
+#define         POSITION_BUFFER_SIZE(x)                         ((x) << 8)
+#define         SMX_BUFFER_SIZE(x)                              ((x) << 16)
+#define SX_MISC                                         0x28350
+#define TA_CNTL_AUX                                     0x9508
+#define         DISABLE_CUBE_WRAP                               (1 << 0)
+#define         DISABLE_CUBE_ANISO                              (1 << 1)
+#define         SYNC_GRADIENT                                   (1 << 24)
+#define         SYNC_WALKER                                     (1 << 25)
+#define         SYNC_ALIGNER                                    (1 << 26)
+#define         BILINEAR_PRECISION_6_BIT                        (0 << 31)
+#define         BILINEAR_PRECISION_8_BIT                        (1 << 31)
+#define TCP_CNTL                                        0x9610
+#define VGT_CACHE_INVALIDATION                          0x88C4
+#define         CACHE_INVALIDATION(x)                           ((x)<<0)
+#define                 VC_ONLY                                         0
+#define                 TC_ONLY                                         1
+#define                 VC_AND_TC                                       2
+#define         AUTO_INVLD_EN(x)                                ((x) << 6)
+#define                 NO_AUTO                                         0
+#define                 ES_AUTO                                         1
+#define                 GS_AUTO                                         2
+#define                 ES_AND_GS_AUTO                                  3
+#define VGT_ES_PER_GS                                   0x88CC
+#define VGT_GS_PER_ES                                   0x88C8
+#define VGT_GS_PER_VS                                   0x88E8
+#define VGT_GS_VERTEX_REUSE                             0x88D4
+#define VGT_NUM_INSTANCES                               0x8974
+#define VGT_OUT_DEALLOC_CNTL                            0x28C5C
+#define         DEALLOC_DIST_MASK                               0x0000007F
+#define VGT_STRMOUT_EN                                  0x28AB0
+#define VGT_VERTEX_REUSE_BLOCK_CNTL                     0x28C58
+#define         VTX_REUSE_DEPTH_MASK                            0x000000FF
+#define VM_CONTEXT0_CNTL                                0x1410
+#define         ENABLE_CONTEXT                                  (1 << 0)
+#define         PAGE_TABLE_DEPTH(x)                             (((x) & 3) << 1)
+#define         RANGE_PROTECTION_FAULT_ENABLE_DEFAULT           (1 << 4)
+#define VM_CONTEXT0_PAGE_TABLE_BASE_ADDR                0x153C
+#define VM_CONTEXT0_PAGE_TABLE_END_ADDR                 0x157C
+#define VM_CONTEXT0_PAGE_TABLE_START_ADDR               0x155C
+#define VM_CONTEXT0_PROTECTION_FAULT_DEFAULT_ADDR       0x1518
+#define VM_L2_CNTL                                      0x1400
+#define         ENABLE_L2_CACHE                                 (1 << 0)
+#define         ENABLE_L2_FRAGMENT_PROCESSING                   (1 << 1)
+#define         ENABLE_L2_PTE_CACHE_LRU_UPDATE_BY_WRITE         (1 << 9)
+#define         EFFECTIVE_L2_QUEUE_SIZE(x)                      (((x) & 7) << 14)
+#define VM_L2_CNTL2                                     0x1404
+#define         INVALIDATE_ALL_L1_TLBS                          (1 << 0)
+#define         INVALIDATE_L2_CACHE                             (1 << 1)
+#define VM_L2_CNTL3                                     0x1408
+#define         BANK_SELECT(x)                                  ((x) << 0)
+#define         CACHE_UPDATE_MODE(x)                            ((x) << 6)
+#define VM_L2_STATUS                                    0x140C
+#define         L2_BUSY                                         (1 << 0)
+#define WAIT_UNTIL                                      0x8040
+#endif
diff --git a/drivers/gpu/drm/ttm/ttm_bo.c b/drivers/gpu/drm/ttm/ttm_bo.c
index c2b0d710d10f..87c06252d464 100644
--- a/drivers/gpu/drm/ttm/ttm_bo.c
+++ b/drivers/gpu/drm/ttm/ttm_bo.c
@@ -44,6 +44,39 @@
 static int ttm_bo_setup_vm(struct ttm_buffer_object *bo);
 static int ttm_bo_swapout(struct ttm_mem_shrink *shrink);
+static void ttm_bo_global_kobj_release(struct kobject *kobj);
+static struct attribute ttm_bo_count = {
+        .name = "bo_count",
+        .mode = S_IRUGO
+};
+static ssize_t ttm_bo_global_show(struct kobject *kobj,
+                                  struct attribute *attr,
+                                  char *buffer)
+{
+        struct ttm_bo_global *glob =
+                container_of(kobj, struct ttm_bo_global, kobj);
+        return snprintf(buffer, PAGE_SIZE, "%lu\n",
+                        (unsigned long) atomic_read(&glob->bo_count));
+}
+static struct attribute *ttm_bo_global_attrs[] = {
+        &ttm_bo_count,
+        NULL
+};
+static struct sysfs_ops ttm_bo_global_ops = {
+        .show = &ttm_bo_global_show
+};
+static struct kobj_type ttm_bo_glob_kobj_type  = {
+        .release = &ttm_bo_global_kobj_release,
+        .sysfs_ops = &ttm_bo_global_ops,
+        .default_attrs = ttm_bo_global_attrs
+};
 static inline uint32_t ttm_bo_type_flags(unsigned type)
 {
@@ -66,10 +99,11 @@ static void ttm_bo_release_list(struct kref *list_kref)
        if (bo->ttm)
                ttm_tt_destroy(bo->ttm);
+        atomic_dec(&bo->glob->bo_count);
        if (bo->destroy)
                bo->destroy(bo);
        else {
-                ttm_mem_global_free(bdev->mem_glob, bo->acc_size, false);
+                ttm_mem_global_free(bdev->glob->mem_glob, bo->acc_size);
                kfree(bo);
        }
 }
@@ -106,7 +140,7 @@ static void ttm_bo_add_to_lru(struct ttm_buffer_object *bo)
                kref_get(&bo->list_kref);
                if (bo->ttm != NULL) {
-                        list_add_tail(&bo->swap, &bdev->swap_lru);
+                        list_add_tail(&bo->swap, &bo->glob->swap_lru);
                        kref_get(&bo->list_kref);
                }
        }
@@ -141,7 +175,7 @@ int ttm_bo_reserve_locked(struct ttm_buffer_object *bo,
                          bool interruptible,
                          bool no_wait, bool use_sequence, uint32_t sequence)
 {
-        struct ttm_bo_device *bdev = bo->bdev;
+        struct ttm_bo_global *glob = bo->glob;
        int ret;
        while (unlikely(atomic_cmpxchg(&bo->reserved, 0, 1) != 0)) {
@@ -153,9 +187,9 @@ int ttm_bo_reserve_locked(struct ttm_buffer_object *bo,
                if (no_wait)
                        return -EBUSY;
-                spin_unlock(&bdev->lru_lock);
+                spin_unlock(&glob->lru_lock);
                ret = ttm_bo_wait_unreserved(bo, interruptible);
-                spin_lock(&bdev->lru_lock);
+                spin_lock(&glob->lru_lock);
                if (unlikely(ret))
                        return ret;
@@ -181,16 +215,16 @@ int ttm_bo_reserve(struct ttm_buffer_object *bo,
                   bool interruptible,
                   bool no_wait, bool use_sequence, uint32_t sequence)
 {
-        struct ttm_bo_device *bdev = bo->bdev;
+        struct ttm_bo_global *glob = bo->glob;
        int put_count = 0;
        int ret;
-        spin_lock(&bdev->lru_lock);
+        spin_lock(&glob->lru_lock);
        ret = ttm_bo_reserve_locked(bo, interruptible, no_wait, use_sequence,
                                    sequence);
        if (likely(ret == 0))
                put_count = ttm_bo_del_from_lru(bo);
-        spin_unlock(&bdev->lru_lock);
+        spin_unlock(&glob->lru_lock);
        while (put_count--)
                kref_put(&bo->list_kref, ttm_bo_ref_bug);
@@ -200,13 +234,13 @@ int ttm_bo_reserve(struct ttm_buffer_object *bo,
 void ttm_bo_unreserve(struct ttm_buffer_object *bo)
 {
-        struct ttm_bo_device *bdev = bo->bdev;
+        struct ttm_bo_global *glob = bo->glob;
-        spin_lock(&bdev->lru_lock);
+        spin_lock(&glob->lru_lock);
        ttm_bo_add_to_lru(bo);
        atomic_set(&bo->reserved, 0);
        wake_up_all(&bo->event_queue);
-        spin_unlock(&bdev->lru_lock);
+        spin_unlock(&glob->lru_lock);
 }
 EXPORT_SYMBOL(ttm_bo_unreserve);
@@ -217,6 +251,7 @@ EXPORT_SYMBOL(ttm_bo_unreserve);
 static int ttm_bo_add_ttm(struct ttm_buffer_object *bo, bool zero_alloc)
 {
        struct ttm_bo_device *bdev = bo->bdev;
+        struct ttm_bo_global *glob = bo->glob;
        int ret = 0;
        uint32_t page_flags = 0;
@@ -232,14 +267,14 @@ static int ttm_bo_add_ttm(struct ttm_buffer_object *bo, bool zero_alloc)
                        page_flags |= TTM_PAGE_FLAG_ZERO_ALLOC;
        case ttm_bo_type_kernel:
                bo->ttm = ttm_tt_create(bdev, bo->num_pages << PAGE_SHIFT,
-                                        page_flags, bdev->dummy_read_page);
+                                        page_flags, glob->dummy_read_page);
                if (unlikely(bo->ttm == NULL))
                        ret = -ENOMEM;
                break;
        case ttm_bo_type_user:
                bo->ttm = ttm_tt_create(bdev, bo->num_pages << PAGE_SHIFT,
                                        page_flags | TTM_PAGE_FLAG_USER,
-                                        bdev->dummy_read_page);
+                                        glob->dummy_read_page);
                if (unlikely(bo->ttm == NULL))
                        ret = -ENOMEM;
                break;
@@ -360,6 +395,7 @@ out_err:
 static int ttm_bo_cleanup_refs(struct ttm_buffer_object *bo, bool remove_all)
 {
        struct ttm_bo_device *bdev = bo->bdev;
+        struct ttm_bo_global *glob = bo->glob;
        struct ttm_bo_driver *driver = bdev->driver;
        int ret;
@@ -371,7 +407,7 @@ static int ttm_bo_cleanup_refs(struct ttm_buffer_object *bo, bool remove_all)
                spin_unlock(&bo->lock);
-                spin_lock(&bdev->lru_lock);
+                spin_lock(&glob->lru_lock);
                ret = ttm_bo_reserve_locked(bo, false, false, false, 0);
                BUG_ON(ret);
                if (bo->ttm)
@@ -386,7 +422,7 @@ static int ttm_bo_cleanup_refs(struct ttm_buffer_object *bo, bool remove_all)
                        bo->mem.mm_node = NULL;
                }
                put_count = ttm_bo_del_from_lru(bo);
-                spin_unlock(&bdev->lru_lock);
+                spin_unlock(&glob->lru_lock);
                atomic_set(&bo->reserved, 0);
@@ -396,14 +432,14 @@ static int ttm_bo_cleanup_refs(struct ttm_buffer_object *bo, bool remove_all)
                return 0;
        }
-        spin_lock(&bdev->lru_lock);
+        spin_lock(&glob->lru_lock);
        if (list_empty(&bo->ddestroy)) {
                void *sync_obj = bo->sync_obj;
                void *sync_obj_arg = bo->sync_obj_arg;
                kref_get(&bo->list_kref);
                list_add_tail(&bo->ddestroy, &bdev->ddestroy);
-                spin_unlock(&bdev->lru_lock);
+                spin_unlock(&glob->lru_lock);
                spin_unlock(&bo->lock);
                if (sync_obj)
@@ -413,7 +449,7 @@ static int ttm_bo_cleanup_refs(struct ttm_buffer_object *bo, bool remove_all)
                ret = 0;
        } else {
-                spin_unlock(&bdev->lru_lock);
+                spin_unlock(&glob->lru_lock);
                spin_unlock(&bo->lock);
                ret = -EBUSY;
        }
@@ -428,11 +464,12 @@ static int ttm_bo_cleanup_refs(struct ttm_buffer_object *bo, bool remove_all)
 static int ttm_bo_delayed_delete(struct ttm_bo_device *bdev, bool remove_all)
 {
+        struct ttm_bo_global *glob = bdev->glob;
        struct ttm_buffer_object *entry, *nentry;
        struct list_head *list, *next;
        int ret;
-        spin_lock(&bdev->lru_lock);
+        spin_lock(&glob->lru_lock);
        list_for_each_safe(list, next, &bdev->ddestroy) {
                entry = list_entry(list, struct ttm_buffer_object, ddestroy);
                nentry = NULL;
@@ -449,16 +486,16 @@ static int ttm_bo_delayed_delete(struct ttm_bo_device *bdev, bool remove_all)
                }
                kref_get(&entry->list_kref);
-                spin_unlock(&bdev->lru_lock);
+                spin_unlock(&glob->lru_lock);
                ret = ttm_bo_cleanup_refs(entry, remove_all);
                kref_put(&entry->list_kref, ttm_bo_release_list);
-                spin_lock(&bdev->lru_lock);
+                spin_lock(&glob->lru_lock);
                if (nentry) {
                        bool next_onlist = !list_empty(next);
-                        spin_unlock(&bdev->lru_lock);
+                        spin_unlock(&glob->lru_lock);
                        kref_put(&nentry->list_kref, ttm_bo_release_list);
-                        spin_lock(&bdev->lru_lock);
+                        spin_lock(&glob->lru_lock);
                        /*
                         * Someone might have raced us and removed the
                         * next entry from the list. We don't bother restarting
@@ -472,7 +509,7 @@ static int ttm_bo_delayed_delete(struct ttm_bo_device *bdev, bool remove_all)
                        break;
        }
        ret = !list_empty(&bdev->ddestroy);
-        spin_unlock(&bdev->lru_lock);
+        spin_unlock(&glob->lru_lock);
        return ret;
 }
@@ -522,6 +559,7 @@ static int ttm_bo_evict(struct ttm_buffer_object *bo, unsigned mem_type,
 {
        int ret = 0;
        struct ttm_bo_device *bdev = bo->bdev;
+        struct ttm_bo_global *glob = bo->glob;
        struct ttm_mem_reg evict_mem;
        uint32_t proposed_placement;
@@ -570,12 +608,12 @@ static int ttm_bo_evict(struct ttm_buffer_object *bo, unsigned mem_type,
                goto out;
        }
-        spin_lock(&bdev->lru_lock);
+        spin_lock(&glob->lru_lock);
        if (evict_mem.mm_node) {
                drm_mm_put_block(evict_mem.mm_node);
                evict_mem.mm_node = NULL;
        }
-        spin_unlock(&bdev->lru_lock);
+        spin_unlock(&glob->lru_lock);
        bo->evicted = true;
 out:
        return ret;
@@ -590,6 +628,7 @@ static int ttm_bo_mem_force_space(struct ttm_bo_device *bdev,
                                  uint32_t mem_type,
                                  bool interruptible, bool no_wait)
 {
+        struct ttm_bo_global *glob = bdev->glob;
        struct drm_mm_node *node;
        struct ttm_buffer_object *entry;
        struct ttm_mem_type_manager *man = &bdev->man[mem_type];
@@ -603,7 +642,7 @@ retry_pre_get:
        if (unlikely(ret != 0))
                return ret;
-        spin_lock(&bdev->lru_lock);
+        spin_lock(&glob->lru_lock);
        do {
                node = drm_mm_search_free(&man->manager, num_pages,
                                          mem->page_alignment, 1);
@@ -624,7 +663,7 @@ retry_pre_get:
                if (likely(ret == 0))
                        put_count = ttm_bo_del_from_lru(entry);
-                spin_unlock(&bdev->lru_lock);
+                spin_unlock(&glob->lru_lock);
                if (unlikely(ret != 0))
                        return ret;
@@ -640,21 +679,21 @@ retry_pre_get:
                if (ret)
                        return ret;
-                spin_lock(&bdev->lru_lock);
+                spin_lock(&glob->lru_lock);
        } while (1);
        if (!node) {
-                spin_unlock(&bdev->lru_lock);
+                spin_unlock(&glob->lru_lock);
                return -ENOMEM;
        }
        node = drm_mm_get_block_atomic(node, num_pages, mem->page_alignment);
        if (unlikely(!node)) {
-                spin_unlock(&bdev->lru_lock);
+                spin_unlock(&glob->lru_lock);
                goto retry_pre_get;
        }
-        spin_unlock(&bdev->lru_lock);
+        spin_unlock(&glob->lru_lock);
        mem->mm_node = node;
        mem->mem_type = mem_type;
        return 0;
@@ -723,6 +762,7 @@ int ttm_bo_mem_space(struct ttm_buffer_object *bo,
                     bool interruptible, bool no_wait)
 {
        struct ttm_bo_device *bdev = bo->bdev;
+        struct ttm_bo_global *glob = bo->glob;
        struct ttm_mem_type_manager *man;
        uint32_t num_prios = bdev->driver->num_mem_type_prio;
@@ -762,20 +802,20 @@ int ttm_bo_mem_space(struct ttm_buffer_object *bo,
                                if (unlikely(ret))
                                        return ret;
-                                spin_lock(&bdev->lru_lock);
+                                spin_lock(&glob->lru_lock);
                                node = drm_mm_search_free(&man->manager,
                                                          mem->num_pages,
                                                          mem->page_alignment,
                                                          1);
                                if (unlikely(!node)) {
-                                        spin_unlock(&bdev->lru_lock);
+                                        spin_unlock(&glob->lru_lock);
                                        break;
                                }
                                node = drm_mm_get_block_atomic(node,
                                                               mem->num_pages,
                                                               mem->
                                                               page_alignment);
-                                spin_unlock(&bdev->lru_lock);
+                                spin_unlock(&glob->lru_lock);
                        } while (!node);
                }
                if (node)
@@ -848,7 +888,7 @@ int ttm_bo_move_buffer(struct ttm_buffer_object *bo,
                       uint32_t proposed_placement,
                       bool interruptible, bool no_wait)
 {
-        struct ttm_bo_device *bdev = bo->bdev;
+        struct ttm_bo_global *glob = bo->glob;
        int ret = 0;
        struct ttm_mem_reg mem;
@@ -884,9 +924,9 @@ int ttm_bo_move_buffer(struct ttm_buffer_object *bo,
 out_unlock:
        if (ret && mem.mm_node) {
-                spin_lock(&bdev->lru_lock);
+                spin_lock(&glob->lru_lock);
                drm_mm_put_block(mem.mm_node);
-                spin_unlock(&bdev->lru_lock);
+                spin_unlock(&glob->lru_lock);
        }
        return ret;
 }
@@ -1022,6 +1062,7 @@ int ttm_buffer_object_init(struct ttm_bo_device *bdev,
        INIT_LIST_HEAD(&bo->ddestroy);
        INIT_LIST_HEAD(&bo->swap);
        bo->bdev = bdev;
+        bo->glob = bdev->glob;
        bo->type = type;
        bo->num_pages = num_pages;
        bo->mem.mem_type = TTM_PL_SYSTEM;
@@ -1034,6 +1075,7 @@ int ttm_buffer_object_init(struct ttm_bo_device *bdev,
        bo->seq_valid = false;
        bo->persistant_swap_storage = persistant_swap_storage;
        bo->acc_size = acc_size;
+        atomic_inc(&bo->glob->bo_count);
        ret = ttm_bo_check_placement(bo, flags, 0ULL);
        if (unlikely(ret != 0))
@@ -1072,13 +1114,13 @@ out_err:
 }
 EXPORT_SYMBOL(ttm_buffer_object_init);
-static inline size_t ttm_bo_size(struct ttm_bo_device *bdev,
+static inline size_t ttm_bo_size(struct ttm_bo_global *glob,
                                 unsigned long num_pages)
 {
        size_t page_array_size = (num_pages * sizeof(void *) + PAGE_SIZE - 1) &
            PAGE_MASK;
-        return bdev->ttm_bo_size + 2 * page_array_size;
+        return glob->ttm_bo_size + 2 * page_array_size;
 }
 int ttm_buffer_object_create(struct ttm_bo_device *bdev,
@@ -1093,18 +1135,18 @@ int ttm_buffer_object_create(struct ttm_bo_device *bdev,
 {
        struct ttm_buffer_object *bo;
        int ret;
-        struct ttm_mem_global *mem_glob = bdev->mem_glob;
+        struct ttm_mem_global *mem_glob = bdev->glob->mem_glob;
        size_t acc_size =
-            ttm_bo_size(bdev, (size + PAGE_SIZE - 1) >> PAGE_SHIFT);
+            ttm_bo_size(bdev->glob, (size + PAGE_SIZE - 1) >> PAGE_SHIFT);
-        ret = ttm_mem_global_alloc(mem_glob, acc_size, false, false, false);
+        ret = ttm_mem_global_alloc(mem_glob, acc_size, false, false);
        if (unlikely(ret != 0))
                return ret;
        bo = kzalloc(sizeof(*bo), GFP_KERNEL);
        if (unlikely(bo == NULL)) {
-                ttm_mem_global_free(mem_glob, acc_size, false);
+                ttm_mem_global_free(mem_glob, acc_size);
                return -ENOMEM;
        }
@@ -1150,6 +1192,7 @@ static int ttm_bo_force_list_clean(struct ttm_bo_device *bdev,
                                   struct list_head *head,
                                   unsigned mem_type, bool allow_errors)
 {
+        struct ttm_bo_global *glob = bdev->glob;
        struct ttm_buffer_object *entry;
        int ret;
        int put_count;
@@ -1158,30 +1201,31 @@ static int ttm_bo_force_list_clean(struct ttm_bo_device *bdev,
         * Can't use standard list traversal since we're unlocking.
         */
-        spin_lock(&bdev->lru_lock);
+        spin_lock(&glob->lru_lock);
        while (!list_empty(head)) {
                entry = list_first_entry(head, struct ttm_buffer_object, lru);
                kref_get(&entry->list_kref);
                ret = ttm_bo_reserve_locked(entry, false, false, false, 0);
                put_count = ttm_bo_del_from_lru(entry);
-                spin_unlock(&bdev->lru_lock);
+                spin_unlock(&glob->lru_lock);
                while (put_count--)
                        kref_put(&entry->list_kref, ttm_bo_ref_bug);
                BUG_ON(ret);
                ret = ttm_bo_leave_list(entry, mem_type, allow_errors);
                ttm_bo_unreserve(entry);
                kref_put(&entry->list_kref, ttm_bo_release_list);
-                spin_lock(&bdev->lru_lock);
+                spin_lock(&glob->lru_lock);
        }
-        spin_unlock(&bdev->lru_lock);
+        spin_unlock(&glob->lru_lock);
        return 0;
 }
 int ttm_bo_clean_mm(struct ttm_bo_device *bdev, unsigned mem_type)
 {
+        struct ttm_bo_global *glob = bdev->glob;
        struct ttm_mem_type_manager *man;
        int ret = -EINVAL;
@@ -1204,13 +1248,13 @@ int ttm_bo_clean_mm(struct ttm_bo_device *bdev, unsigned mem_type)
        if (mem_type > 0) {
                ttm_bo_force_list_clean(bdev, &man->lru, mem_type, false);
-                spin_lock(&bdev->lru_lock);
+                spin_lock(&glob->lru_lock);
                if (drm_mm_clean(&man->manager))
                        drm_mm_takedown(&man->manager);
                else
                        ret = -EBUSY;
-                spin_unlock(&bdev->lru_lock);
+                spin_unlock(&glob->lru_lock);
        }
        return ret;
@@ -1284,11 +1328,82 @@ int ttm_bo_init_mm(struct ttm_bo_device *bdev, unsigned type,
 }
 EXPORT_SYMBOL(ttm_bo_init_mm);
+static void ttm_bo_global_kobj_release(struct kobject *kobj)
+{
+        struct ttm_bo_global *glob =
+                container_of(kobj, struct ttm_bo_global, kobj);
+        ttm_mem_unregister_shrink(glob->mem_glob, &glob->shrink);
+        __free_page(glob->dummy_read_page);
+        kfree(glob);
+}
+void ttm_bo_global_release(struct ttm_global_reference *ref)
+{
+        struct ttm_bo_global *glob = ref->object;
+        kobject_del(&glob->kobj);
+        kobject_put(&glob->kobj);
+}
+EXPORT_SYMBOL(ttm_bo_global_release);
+int ttm_bo_global_init(struct ttm_global_reference *ref)
+{
+        struct ttm_bo_global_ref *bo_ref =
+                container_of(ref, struct ttm_bo_global_ref, ref);
+        struct ttm_bo_global *glob = ref->object;
+        int ret;
+        mutex_init(&glob->device_list_mutex);
+        spin_lock_init(&glob->lru_lock);
+        glob->mem_glob = bo_ref->mem_glob;
+        glob->dummy_read_page = alloc_page(__GFP_ZERO | GFP_DMA32);
+        if (unlikely(glob->dummy_read_page == NULL)) {
+                ret = -ENOMEM;
+                goto out_no_drp;
+        }
+        INIT_LIST_HEAD(&glob->swap_lru);
+        INIT_LIST_HEAD(&glob->device_list);
+        ttm_mem_init_shrink(&glob->shrink, ttm_bo_swapout);
+        ret = ttm_mem_register_shrink(glob->mem_glob, &glob->shrink);
+        if (unlikely(ret != 0)) {
+                printk(KERN_ERR TTM_PFX
+                       "Could not register buffer object swapout.\n");
+                goto out_no_shrink;
+        }
+        glob->ttm_bo_extra_size =
+                ttm_round_pot(sizeof(struct ttm_tt)) +
+                ttm_round_pot(sizeof(struct ttm_backend));
+        glob->ttm_bo_size = glob->ttm_bo_extra_size +
+                ttm_round_pot(sizeof(struct ttm_buffer_object));
+        atomic_set(&glob->bo_count, 0);
+        kobject_init(&glob->kobj, &ttm_bo_glob_kobj_type);
+        ret = kobject_add(&glob->kobj, ttm_get_kobj(), "buffer_objects");
+        if (unlikely(ret != 0))
+                kobject_put(&glob->kobj);
+        return ret;
+out_no_shrink:
+        __free_page(glob->dummy_read_page);
+out_no_drp:
+        kfree(glob);
+        return ret;
+}
+EXPORT_SYMBOL(ttm_bo_global_init);
 int ttm_bo_device_release(struct ttm_bo_device *bdev)
 {
        int ret = 0;
        unsigned i = TTM_NUM_MEM_TYPES;
        struct ttm_mem_type_manager *man;
+        struct ttm_bo_global *glob = bdev->glob;
        while (i--) {
                man = &bdev->man[i];
@@ -1304,100 +1419,74 @@ int ttm_bo_device_release(struct ttm_bo_device *bdev)
                }
        }
+        mutex_lock(&glob->device_list_mutex);
+        list_del(&bdev->device_list);
+        mutex_unlock(&glob->device_list_mutex);
        if (!cancel_delayed_work(&bdev->wq))
                flush_scheduled_work();
        while (ttm_bo_delayed_delete(bdev, true))
                ;
-        spin_lock(&bdev->lru_lock);
+        spin_lock(&glob->lru_lock);
        if (list_empty(&bdev->ddestroy))
                TTM_DEBUG("Delayed destroy list was clean\n");
        if (list_empty(&bdev->man[0].lru))
                TTM_DEBUG("Swap list was clean\n");
-        spin_unlock(&bdev->lru_lock);
+        spin_unlock(&glob->lru_lock);
-        ttm_mem_unregister_shrink(bdev->mem_glob, &bdev->shrink);
        BUG_ON(!drm_mm_clean(&bdev->addr_space_mm));
        write_lock(&bdev->vm_lock);
        drm_mm_takedown(&bdev->addr_space_mm);
        write_unlock(&bdev->vm_lock);
-        __free_page(bdev->dummy_read_page);
        return ret;
 }
 EXPORT_SYMBOL(ttm_bo_device_release);
-/*
- * This function is intended to be called on drm driver load.
- * If you decide to call it from firstopen, you must protect the call
- * from a potentially racing ttm_bo_driver_finish in lastclose.
- * (This may happen on X server restart).
- */
 int ttm_bo_device_init(struct ttm_bo_device *bdev,
-                       struct ttm_mem_global *mem_glob,
+                       struct ttm_bo_global *glob,
-                       struct ttm_bo_driver *driver, uint64_t file_page_offset,
+                       struct ttm_bo_driver *driver,
+                       uint64_t file_page_offset,
                       bool need_dma32)
 {
        int ret = -EINVAL;
-        bdev->dummy_read_page = NULL;
        rwlock_init(&bdev->vm_lock);
-        spin_lock_init(&bdev->lru_lock);
        bdev->driver = driver;
-        bdev->mem_glob = mem_glob;
        memset(bdev->man, 0, sizeof(bdev->man));
-        bdev->dummy_read_page = alloc_page(__GFP_ZERO | GFP_DMA32);
-        if (unlikely(bdev->dummy_read_page == NULL)) {
-                ret = -ENOMEM;
-                goto out_err0;
-        }
        /*
         * Initialize the system memory buffer type.
         * Other types need to be driver / IOCTL initialized.
         */
        ret = ttm_bo_init_mm(bdev, TTM_PL_SYSTEM, 0, 0);
        if (unlikely(ret != 0))
-                goto out_err1;
+                goto out_no_sys;
        bdev->addr_space_rb = RB_ROOT;
        ret = drm_mm_init(&bdev->addr_space_mm, file_page_offset, 0x10000000);
        if (unlikely(ret != 0))
-                goto out_err2;
+                goto out_no_addr_mm;
        INIT_DELAYED_WORK(&bdev->wq, ttm_bo_delayed_workqueue);
        bdev->nice_mode = true;
        INIT_LIST_HEAD(&bdev->ddestroy);
-        INIT_LIST_HEAD(&bdev->swap_lru);
        bdev->dev_mapping = NULL;
+        bdev->glob = glob;
        bdev->need_dma32 = need_dma32;
-        ttm_mem_init_shrink(&bdev->shrink, ttm_bo_swapout);
-        ret = ttm_mem_register_shrink(mem_glob, &bdev->shrink);
-        if (unlikely(ret != 0)) {
-                printk(KERN_ERR TTM_PFX
-                       "Could not register buffer object swapout.\n");
-                goto out_err2;
-        }
-        bdev->ttm_bo_extra_size =
+        mutex_lock(&glob->device_list_mutex);
-                ttm_round_pot(sizeof(struct ttm_tt)) +
+        list_add_tail(&bdev->device_list, &glob->device_list);
-                ttm_round_pot(sizeof(struct ttm_backend));
+        mutex_unlock(&glob->device_list_mutex);
-        bdev->ttm_bo_size = bdev->ttm_bo_extra_size +
-                ttm_round_pot(sizeof(struct ttm_buffer_object));
        return 0;
-out_err2:
+out_no_addr_mm:
        ttm_bo_clean_mm(bdev, 0);
-out_err1:
+out_no_sys:
-        __free_page(bdev->dummy_read_page);
-out_err0:
        return ret;
 }
 EXPORT_SYMBOL(ttm_bo_device_init);
@@ -1647,21 +1736,21 @@ void ttm_bo_synccpu_write_release(struct ttm_buffer_object *bo)
 static int ttm_bo_swapout(struct ttm_mem_shrink *shrink)
 {
-        struct ttm_bo_device *bdev =
+        struct ttm_bo_global *glob =
-            container_of(shrink, struct ttm_bo_device, shrink);
+            container_of(shrink, struct ttm_bo_global, shrink);
        struct ttm_buffer_object *bo;
        int ret = -EBUSY;
        int put_count;
        uint32_t swap_placement = (TTM_PL_FLAG_CACHED | TTM_PL_FLAG_SYSTEM);
-        spin_lock(&bdev->lru_lock);
+        spin_lock(&glob->lru_lock);
        while (ret == -EBUSY) {
-                if (unlikely(list_empty(&bdev->swap_lru))) {
+                if (unlikely(list_empty(&glob->swap_lru))) {
-                        spin_unlock(&bdev->lru_lock);
+                        spin_unlock(&glob->lru_lock);
                        return -EBUSY;
                }
-                bo = list_first_entry(&bdev->swap_lru,
+                bo = list_first_entry(&glob->swap_lru,
                                      struct ttm_buffer_object, swap);
                kref_get(&bo->list_kref);
@@ -1673,16 +1762,16 @@ static int ttm_bo_swapout(struct ttm_mem_shrink *shrink)
                ret = ttm_bo_reserve_locked(bo, false, true, false, 0);
                if (unlikely(ret == -EBUSY)) {
-                        spin_unlock(&bdev->lru_lock);
+                        spin_unlock(&glob->lru_lock);
                        ttm_bo_wait_unreserved(bo, false);
                        kref_put(&bo->list_kref, ttm_bo_release_list);
-                        spin_lock(&bdev->lru_lock);
+                        spin_lock(&glob->lru_lock);
                }
        }
        BUG_ON(ret != 0);
        put_count = ttm_bo_del_from_lru(bo);
-        spin_unlock(&bdev->lru_lock);
+        spin_unlock(&glob->lru_lock);
        while (put_count--)
                kref_put(&bo->list_kref, ttm_bo_ref_bug);
@@ -1736,6 +1825,6 @@ out:
 void ttm_bo_swapout_all(struct ttm_bo_device *bdev)
 {
-        while (ttm_bo_swapout(&bdev->shrink) == 0)
+        while (ttm_bo_swapout(&bdev->glob->shrink) == 0)
                ;
 }
diff --git a/drivers/gpu/drm/ttm/ttm_bo_util.c b/drivers/gpu/drm/ttm/ttm_bo_util.c
index ad4ada07c6cf..c70927ecda21 100644
--- a/drivers/gpu/drm/ttm/ttm_bo_util.c
+++ b/drivers/gpu/drm/ttm/ttm_bo_util.c
@@ -41,9 +41,9 @@ void ttm_bo_free_old_node(struct ttm_buffer_object *bo)
        struct ttm_mem_reg *old_mem = &bo->mem;
        if (old_mem->mm_node) {
-                spin_lock(&bo->bdev->lru_lock);
+                spin_lock(&bo->glob->lru_lock);
                drm_mm_put_block(old_mem->mm_node);
-                spin_unlock(&bo->bdev->lru_lock);
+                spin_unlock(&bo->glob->lru_lock);
        }
        old_mem->mm_node = NULL;
 }
diff --git a/drivers/gpu/drm/ttm/ttm_global.c b/drivers/gpu/drm/ttm/ttm_global.c
index 0b14eb1972b8..541744d00d3e 100644
--- a/drivers/gpu/drm/ttm/ttm_global.c
+++ b/drivers/gpu/drm/ttm/ttm_global.c
@@ -71,7 +71,7 @@ int ttm_global_item_ref(struct ttm_global_reference *ref)
        mutex_lock(&item->mutex);
        if (item->refcount == 0) {
-                item->object = kmalloc(ref->size, GFP_KERNEL);
+                item->object = kzalloc(ref->size, GFP_KERNEL);
                if (unlikely(item->object == NULL)) {
                        ret = -ENOMEM;
                        goto out_err;
@@ -89,7 +89,6 @@ int ttm_global_item_ref(struct ttm_global_reference *ref)
        mutex_unlock(&item->mutex);
        return 0;
 out_err:
-        kfree(item->object);
        mutex_unlock(&item->mutex);
        item->object = NULL;
        return ret;
@@ -105,7 +104,6 @@ void ttm_global_item_unref(struct ttm_global_reference *ref)
        BUG_ON(ref->object != item->object);
        if (--item->refcount == 0) {
                ref->release(ref);
-                kfree(item->object);
                item->object = NULL;
        }
        mutex_unlock(&item->mutex);
diff --git a/drivers/gpu/drm/ttm/ttm_memory.c b/drivers/gpu/drm/ttm/ttm_memory.c
index 87323d4ff68d..072c281a6bb5 100644
--- a/drivers/gpu/drm/ttm/ttm_memory.c
+++ b/drivers/gpu/drm/ttm/ttm_memory.c
@@ -26,15 +26,180 @@
 **************************************************************************/
 #include "ttm/ttm_memory.h"
+#include "ttm/ttm_module.h"
 #include <linux/spinlock.h>
 #include <linux/sched.h>
 #include <linux/wait.h>
 #include <linux/mm.h>
 #include <linux/module.h>
-#define TTM_PFX "[TTM] "
 #define TTM_MEMORY_ALLOC_RETRIES 4
+struct ttm_mem_zone {
+        struct kobject kobj;
+        struct ttm_mem_global *glob;
+        const char *name;
+        uint64_t zone_mem;
+        uint64_t emer_mem;
+        uint64_t max_mem;
+        uint64_t swap_limit;
+        uint64_t used_mem;
+};
+static struct attribute ttm_mem_sys = {
+        .name = "zone_memory",
+        .mode = S_IRUGO
+};
+static struct attribute ttm_mem_emer = {
+        .name = "emergency_memory",
+        .mode = S_IRUGO | S_IWUSR
+};
+static struct attribute ttm_mem_max = {
+        .name = "available_memory",
+        .mode = S_IRUGO | S_IWUSR
+};
+static struct attribute ttm_mem_swap = {
+        .name = "swap_limit",
+        .mode = S_IRUGO | S_IWUSR
+};
+static struct attribute ttm_mem_used = {
+        .name = "used_memory",
+        .mode = S_IRUGO
+};
+static void ttm_mem_zone_kobj_release(struct kobject *kobj)
+{
+        struct ttm_mem_zone *zone =
+                container_of(kobj, struct ttm_mem_zone, kobj);
+        printk(KERN_INFO TTM_PFX
+               "Zone %7s: Used memory at exit: %llu kiB.\n",
+               zone->name, (unsigned long long) zone->used_mem >> 10);
+        kfree(zone);
+}
+static ssize_t ttm_mem_zone_show(struct kobject *kobj,
+                                 struct attribute *attr,
+                                 char *buffer)
+{
+        struct ttm_mem_zone *zone =
+                container_of(kobj, struct ttm_mem_zone, kobj);
+        uint64_t val = 0;
+        spin_lock(&zone->glob->lock);
+        if (attr == &ttm_mem_sys)
+                val = zone->zone_mem;
+        else if (attr == &ttm_mem_emer)
+                val = zone->emer_mem;
+        else if (attr == &ttm_mem_max)
+                val = zone->max_mem;
+        else if (attr == &ttm_mem_swap)
+                val = zone->swap_limit;
+        else if (attr == &ttm_mem_used)
+                val = zone->used_mem;
+        spin_unlock(&zone->glob->lock);
+        return snprintf(buffer, PAGE_SIZE, "%llu\n",
+                        (unsigned long long) val >> 10);
+}
+static void ttm_check_swapping(struct ttm_mem_global *glob);
+static ssize_t ttm_mem_zone_store(struct kobject *kobj,
+                                  struct attribute *attr,
+                                  const char *buffer,
+                                  size_t size)
+{
+        struct ttm_mem_zone *zone =
+                container_of(kobj, struct ttm_mem_zone, kobj);
+        int chars;
+        unsigned long val;
+        uint64_t val64;
+        chars = sscanf(buffer, "%lu", &val);
+        if (chars == 0)
+                return size;
+        val64 = val;
+        val64 <<= 10;
+        spin_lock(&zone->glob->lock);
+        if (val64 > zone->zone_mem)
+                val64 = zone->zone_mem;
+        if (attr == &ttm_mem_emer) {
+                zone->emer_mem = val64;
+                if (zone->max_mem > val64)
+                        zone->max_mem = val64;
+        } else if (attr == &ttm_mem_max) {
+                zone->max_mem = val64;
+                if (zone->emer_mem < val64)
+                        zone->emer_mem = val64;
+        } else if (attr == &ttm_mem_swap)
+                zone->swap_limit = val64;
+        spin_unlock(&zone->glob->lock);
+        ttm_check_swapping(zone->glob);
+        return size;
+}
+static struct attribute *ttm_mem_zone_attrs[] = {
+        &ttm_mem_sys,
+        &ttm_mem_emer,
+        &ttm_mem_max,
+        &ttm_mem_swap,
+        &ttm_mem_used,
+        NULL
+};
+static struct sysfs_ops ttm_mem_zone_ops = {
+        .show = &ttm_mem_zone_show,
+        .store = &ttm_mem_zone_store
+};
+static struct kobj_type ttm_mem_zone_kobj_type = {
+        .release = &ttm_mem_zone_kobj_release,
+        .sysfs_ops = &ttm_mem_zone_ops,
+        .default_attrs = ttm_mem_zone_attrs,
+};
+static void ttm_mem_global_kobj_release(struct kobject *kobj)
+{
+        struct ttm_mem_global *glob =
+                container_of(kobj, struct ttm_mem_global, kobj);
+        kfree(glob);
+}
+static struct kobj_type ttm_mem_glob_kobj_type = {
+        .release = &ttm_mem_global_kobj_release,
+};
+static bool ttm_zones_above_swap_target(struct ttm_mem_global *glob,
+                                        bool from_wq, uint64_t extra)
+{
+        unsigned int i;
+        struct ttm_mem_zone *zone;
+        uint64_t target;
+        for (i = 0; i < glob->num_zones; ++i) {
+                zone = glob->zones[i];
+                if (from_wq)
+                        target = zone->swap_limit;
+                else if (capable(CAP_SYS_ADMIN))
+                        target = zone->emer_mem;
+                else
+                        target = zone->max_mem;
+                target = (extra > target) ? 0ULL : target;
+                if (zone->used_mem > target)
+                        return true;
+        }
+        return false;
+}
 /**
 * At this point we only support a single shrink callback.
 * Extend this if needed, perhaps using a linked list of callbacks.
@@ -42,34 +207,17 @@
 * many threads may try to swap out at any given time.
 */
-static void ttm_shrink(struct ttm_mem_global *glob, bool from_workqueue,
+static void ttm_shrink(struct ttm_mem_global *glob, bool from_wq,
                       uint64_t extra)
 {
        int ret;
        struct ttm_mem_shrink *shrink;
-        uint64_t target;
-        uint64_t total_target;
        spin_lock(&glob->lock);
        if (glob->shrink == NULL)
                goto out;
-        if (from_workqueue) {
+        while (ttm_zones_above_swap_target(glob, from_wq, extra)) {
-                target = glob->swap_limit;
-                total_target = glob->total_memory_swap_limit;
-        } else if (capable(CAP_SYS_ADMIN)) {
-                total_target = glob->emer_total_memory;
-                target = glob->emer_memory;
-        } else {
-                total_target = glob->max_total_memory;
-                target = glob->max_memory;
-        }
-        total_target = (extra >= total_target) ? 0 : total_target - extra;
-        target = (extra >= target) ? 0 : target - extra;
-        while (glob->used_memory > target ||
-               glob->used_total_memory > total_target) {
                shrink = glob->shrink;
                spin_unlock(&glob->lock);
                ret = shrink->do_shrink(shrink);
@@ -81,6 +229,8 @@ out:
        spin_unlock(&glob->lock);
 }
 static void ttm_shrink_work(struct work_struct *work)
 {
        struct ttm_mem_global *glob =
@@ -89,63 +239,198 @@ static void ttm_shrink_work(struct work_struct *work)
        ttm_shrink(glob, true, 0ULL);
 }
+static int ttm_mem_init_kernel_zone(struct ttm_mem_global *glob,
+                                    const struct sysinfo *si)
+{
+        struct ttm_mem_zone *zone = kzalloc(sizeof(*zone), GFP_KERNEL);
+        uint64_t mem;
+        int ret;
+        if (unlikely(!zone))
+                return -ENOMEM;
+        mem = si->totalram - si->totalhigh;
+        mem *= si->mem_unit;
+        zone->name = "kernel";
+        zone->zone_mem = mem;
+        zone->max_mem = mem >> 1;
+        zone->emer_mem = (mem >> 1) + (mem >> 2);
+        zone->swap_limit = zone->max_mem - (mem >> 3);
+        zone->used_mem = 0;
+        zone->glob = glob;
+        glob->zone_kernel = zone;
+        kobject_init(&zone->kobj, &ttm_mem_zone_kobj_type);
+        ret = kobject_add(&zone->kobj, &glob->kobj, zone->name);
+        if (unlikely(ret != 0)) {
+                kobject_put(&zone->kobj);
+                return ret;
+        }
+        glob->zones[glob->num_zones++] = zone;
+        return 0;
+}
+#ifdef CONFIG_HIGHMEM
+static int ttm_mem_init_highmem_zone(struct ttm_mem_global *glob,
+                                     const struct sysinfo *si)
+{
+        struct ttm_mem_zone *zone = kzalloc(sizeof(*zone), GFP_KERNEL);
+        uint64_t mem;
+        int ret;
+        if (unlikely(!zone))
+                return -ENOMEM;
+        if (si->totalhigh == 0)
+                return 0;
+        mem = si->totalram;
+        mem *= si->mem_unit;
+        zone->name = "highmem";
+        zone->zone_mem = mem;
+        zone->max_mem = mem >> 1;
+        zone->emer_mem = (mem >> 1) + (mem >> 2);
+        zone->swap_limit = zone->max_mem - (mem >> 3);
+        zone->used_mem = 0;
+        zone->glob = glob;
+        glob->zone_highmem = zone;
+        kobject_init(&zone->kobj, &ttm_mem_zone_kobj_type);
+        ret = kobject_add(&zone->kobj, &glob->kobj, zone->name);
+        if (unlikely(ret != 0)) {
+                kobject_put(&zone->kobj);
+                return ret;
+        }
+        glob->zones[glob->num_zones++] = zone;
+        return 0;
+}
+#else
+static int ttm_mem_init_dma32_zone(struct ttm_mem_global *glob,
+                                   const struct sysinfo *si)
+{
+        struct ttm_mem_zone *zone = kzalloc(sizeof(*zone), GFP_KERNEL);
+        uint64_t mem;
+        int ret;
+        if (unlikely(!zone))
+                return -ENOMEM;
+        mem = si->totalram;
+        mem *= si->mem_unit;
+        /**
+         * No special dma32 zone needed.
+         */
+        if (mem <= ((uint64_t) 1ULL << 32))
+                return 0;
+        /*
+         * Limit max dma32 memory to 4GB for now
+         * until we can figure out how big this
+         * zone really is.
+         */
+        mem = ((uint64_t) 1ULL << 32);
+        zone->name = "dma32";
+        zone->zone_mem = mem;
+        zone->max_mem = mem >> 1;
+        zone->emer_mem = (mem >> 1) + (mem >> 2);
+        zone->swap_limit = zone->max_mem - (mem >> 3);
+        zone->used_mem = 0;
+        zone->glob = glob;
+        glob->zone_dma32 = zone;
+        kobject_init(&zone->kobj, &ttm_mem_zone_kobj_type);
+        ret = kobject_add(&zone->kobj, &glob->kobj, zone->name);
+        if (unlikely(ret != 0)) {
+                kobject_put(&zone->kobj);
+                return ret;
+        }
+        glob->zones[glob->num_zones++] = zone;
+        return 0;
+}
+#endif
 int ttm_mem_global_init(struct ttm_mem_global *glob)
 {
        struct sysinfo si;
-        uint64_t mem;
+        int ret;
+        int i;
+        struct ttm_mem_zone *zone;
        spin_lock_init(&glob->lock);
        glob->swap_queue = create_singlethread_workqueue("ttm_swap");
        INIT_WORK(&glob->work, ttm_shrink_work);
        init_waitqueue_head(&glob->queue);
+        kobject_init(&glob->kobj, &ttm_mem_glob_kobj_type);
+        ret = kobject_add(&glob->kobj,
+                          ttm_get_kobj(),
+                          "memory_accounting");
+        if (unlikely(ret != 0)) {
+                kobject_put(&glob->kobj);
+                return ret;
+        }
        si_meminfo(&si);
-        mem = si.totalram - si.totalhigh;
+        ret = ttm_mem_init_kernel_zone(glob, &si);
-        mem *= si.mem_unit;
+        if (unlikely(ret != 0))
+                goto out_no_zone;
-        glob->max_memory = mem >> 1;
+#ifdef CONFIG_HIGHMEM
-        glob->emer_memory = (mem >> 1) + (mem >> 2);
+        ret = ttm_mem_init_highmem_zone(glob, &si);
-        glob->swap_limit = glob->max_memory - (mem >> 3);
+        if (unlikely(ret != 0))
-        glob->used_memory = 0;
+                goto out_no_zone;
-        glob->used_total_memory = 0;
+#else
-        glob->shrink = NULL;
+        ret = ttm_mem_init_dma32_zone(glob, &si);
+        if (unlikely(ret != 0))
-        mem = si.totalram;
+                goto out_no_zone;
-        mem *= si.mem_unit;
+#endif
+        for (i = 0; i < glob->num_zones; ++i) {
-        glob->max_total_memory = mem >> 1;
+                zone = glob->zones[i];
-        glob->emer_total_memory = (mem >> 1) + (mem >> 2);
+                printk(KERN_INFO TTM_PFX
+                       "Zone %7s: Available graphics memory: %llu kiB.\n",
-        glob->total_memory_swap_limit = glob->max_total_memory - (mem >> 3);
+                       zone->name, (unsigned long long) zone->max_mem >> 10);
+        }
-        printk(KERN_INFO TTM_PFX "TTM available graphics memory: %llu MiB\n",
-               glob->max_total_memory >> 20);
-        printk(KERN_INFO TTM_PFX "TTM available object memory: %llu MiB\n",
-               glob->max_memory >> 20);
        return 0;
+out_no_zone:
+        ttm_mem_global_release(glob);
+        return ret;
 }
 EXPORT_SYMBOL(ttm_mem_global_init);
 void ttm_mem_global_release(struct ttm_mem_global *glob)
 {
-        printk(KERN_INFO TTM_PFX "Used total memory is %llu bytes.\n",
+        unsigned int i;
-               (unsigned long long)glob->used_total_memory);
+        struct ttm_mem_zone *zone;
        flush_workqueue(glob->swap_queue);
        destroy_workqueue(glob->swap_queue);
        glob->swap_queue = NULL;
+        for (i = 0; i < glob->num_zones; ++i) {
+                zone = glob->zones[i];
+                kobject_del(&zone->kobj);
+                kobject_put(&zone->kobj);
+        }
+        kobject_del(&glob->kobj);
+        kobject_put(&glob->kobj);
 }
 EXPORT_SYMBOL(ttm_mem_global_release);
-static inline void ttm_check_swapping(struct ttm_mem_global *glob)
+static void ttm_check_swapping(struct ttm_mem_global *glob)
 {
-        bool needs_swapping;
+        bool needs_swapping = false;
+        unsigned int i;
+        struct ttm_mem_zone *zone;
        spin_lock(&glob->lock);
-        needs_swapping = (glob->used_memory > glob->swap_limit ||
+        for (i = 0; i < glob->num_zones; ++i) {
-                          glob->used_total_memory >
+                zone = glob->zones[i];
-                          glob->total_memory_swap_limit);
+                if (zone->used_mem > zone->swap_limit) {
+                        needs_swapping = true;
+                        break;
+                }
+        }
        spin_unlock(&glob->lock);
        if (unlikely(needs_swapping))
@@ -153,44 +438,60 @@ static inline void ttm_check_swapping(struct ttm_mem_global *glob)
 }
-void ttm_mem_global_free(struct ttm_mem_global *glob,
+static void ttm_mem_global_free_zone(struct ttm_mem_global *glob,
-                         uint64_t amount, bool himem)
+                                     struct ttm_mem_zone *single_zone,
+                                     uint64_t amount)
 {
+        unsigned int i;
+        struct ttm_mem_zone *zone;
        spin_lock(&glob->lock);
-        glob->used_total_memory -= amount;
+        for (i = 0; i < glob->num_zones; ++i) {
-        if (!himem)
+                zone = glob->zones[i];
-                glob->used_memory -= amount;
+                if (single_zone && zone != single_zone)
-        wake_up_all(&glob->queue);
+                        continue;
+                zone->used_mem -= amount;
+        }
        spin_unlock(&glob->lock);
 }
+void ttm_mem_global_free(struct ttm_mem_global *glob,
+                         uint64_t amount)
+{
+        return ttm_mem_global_free_zone(glob, NULL, amount);
+}
 static int ttm_mem_global_reserve(struct ttm_mem_global *glob,
-                                  uint64_t amount, bool himem, bool reserve)
+                                  struct ttm_mem_zone *single_zone,
+                                  uint64_t amount, bool reserve)
 {
        uint64_t limit;
-        uint64_t lomem_limit;
        int ret = -ENOMEM;
+        unsigned int i;
+        struct ttm_mem_zone *zone;
        spin_lock(&glob->lock);
+        for (i = 0; i < glob->num_zones; ++i) {
+                zone = glob->zones[i];
+                if (single_zone && zone != single_zone)
+                        continue;
-        if (capable(CAP_SYS_ADMIN)) {
+                limit = (capable(CAP_SYS_ADMIN)) ?
-                limit = glob->emer_total_memory;
+                        zone->emer_mem : zone->max_mem;
-                lomem_limit = glob->emer_memory;
-        } else {
-                limit = glob->max_total_memory;
-                lomem_limit = glob->max_memory;
-        }
-        if (unlikely(glob->used_total_memory + amount > limit))
+                if (zone->used_mem > limit)
-                goto out_unlock;
+                        goto out_unlock;
-        if (unlikely(!himem && glob->used_memory + amount > lomem_limit))
+        }
-                goto out_unlock;
        if (reserve) {
-                glob->used_total_memory += amount;
+                for (i = 0; i < glob->num_zones; ++i) {
-                if (!himem)
+                        zone = glob->zones[i];
-                        glob->used_memory += amount;
+                        if (single_zone && zone != single_zone)
+                                continue;
+                        zone->used_mem += amount;
+                }
        }
        ret = 0;
 out_unlock:
        spin_unlock(&glob->lock);
@@ -199,12 +500,17 @@ out_unlock:
        return ret;
 }
-int ttm_mem_global_alloc(struct ttm_mem_global *glob, uint64_t memory,
-                         bool no_wait, bool interruptible, bool himem)
+static int ttm_mem_global_alloc_zone(struct ttm_mem_global *glob,
+                                     struct ttm_mem_zone *single_zone,
+                                     uint64_t memory,
+                                     bool no_wait, bool interruptible)
 {
        int count = TTM_MEMORY_ALLOC_RETRIES;
-        while (unlikely(ttm_mem_global_reserve(glob, memory, himem, true)
+        while (unlikely(ttm_mem_global_reserve(glob,
+                                               single_zone,
+                                               memory, true)
                        != 0)) {
                if (no_wait)
                        return -ENOMEM;
@@ -216,6 +522,56 @@ int ttm_mem_global_alloc(struct ttm_mem_global *glob, uint64_t memory,
        return 0;
 }
+int ttm_mem_global_alloc(struct ttm_mem_global *glob, uint64_t memory,
+                         bool no_wait, bool interruptible)
+{
+        /**
+         * Normal allocations of kernel memory are registered in
+         * all zones.
+         */
+        return ttm_mem_global_alloc_zone(glob, NULL, memory, no_wait,
+                                         interruptible);
+}
+int ttm_mem_global_alloc_page(struct ttm_mem_global *glob,
+                              struct page *page,
+                              bool no_wait, bool interruptible)
+{
+        struct ttm_mem_zone *zone = NULL;
+        /**
+         * Page allocations may be registed in a single zone
+         * only if highmem or !dma32.
+         */
+#ifdef CONFIG_HIGHMEM
+        if (PageHighMem(page) && glob->zone_highmem != NULL)
+                zone = glob->zone_highmem;
+#else
+        if (glob->zone_dma32 && page_to_pfn(page) > 0x00100000UL)
+                zone = glob->zone_kernel;
+#endif
+        return ttm_mem_global_alloc_zone(glob, zone, PAGE_SIZE, no_wait,
+                                         interruptible);
+}
+void ttm_mem_global_free_page(struct ttm_mem_global *glob, struct page *page)
+{
+        struct ttm_mem_zone *zone = NULL;
+#ifdef CONFIG_HIGHMEM
+        if (PageHighMem(page) && glob->zone_highmem != NULL)
+                zone = glob->zone_highmem;
+#else
+        if (glob->zone_dma32 && page_to_pfn(page) > 0x00100000UL)
+                zone = glob->zone_kernel;
+#endif
+        ttm_mem_global_free_zone(glob, zone, PAGE_SIZE);
+}
 size_t ttm_round_pot(size_t size)
 {
        if ((size & (size - 1)) == 0)
diff --git a/drivers/gpu/drm/ttm/ttm_module.c b/drivers/gpu/drm/ttm/ttm_module.c
index 59ce8191d584..9a6edbfeaa9e 100644
--- a/drivers/gpu/drm/ttm/ttm_module.c
+++ b/drivers/gpu/drm/ttm/ttm_module.c
@@ -29,16 +29,72 @@
 *          Jerome Glisse
 */
 #include <linux/module.h>
-#include <ttm/ttm_module.h>
+#include <linux/device.h>
+#include <linux/sched.h>
+#include "ttm/ttm_module.h"
+#include "drm_sysfs.h"
+static DECLARE_WAIT_QUEUE_HEAD(exit_q);
+atomic_t device_released;
+static struct device_type ttm_drm_class_type = {
+        .name = "ttm",
+        /**
+         * Add pm ops here.
+         */
+};
+static void ttm_drm_class_device_release(struct device *dev)
+{
+        atomic_set(&device_released, 1);
+        wake_up_all(&exit_q);
+}
+static struct device ttm_drm_class_device = {
+        .type = &ttm_drm_class_type,
+        .release = &ttm_drm_class_device_release
+};
+struct kobject *ttm_get_kobj(void)
+{
+        struct kobject *kobj = &ttm_drm_class_device.kobj;
+        BUG_ON(kobj == NULL);
+        return kobj;
+}
 static int __init ttm_init(void)
 {
+        int ret;
+        ret = dev_set_name(&ttm_drm_class_device, "ttm");
+        if (unlikely(ret != 0))
+                return ret;
        ttm_global_init();
+        atomic_set(&device_released, 0);
+        ret = drm_class_device_register(&ttm_drm_class_device);
+        if (unlikely(ret != 0))
+                goto out_no_dev_reg;
        return 0;
+out_no_dev_reg:
+        atomic_set(&device_released, 1);
+        wake_up_all(&exit_q);
+        ttm_global_release();
+        return ret;
 }
 static void __exit ttm_exit(void)
 {
+        drm_class_device_unregister(&ttm_drm_class_device);
+        /**
+         * Refuse to unload until the TTM device is released.
+         * Not sure this is 100% needed.
+         */
+        wait_event(exit_q, atomic_read(&device_released) == 1);
        ttm_global_release();
 }
diff --git a/drivers/gpu/drm/ttm/ttm_tt.c b/drivers/gpu/drm/ttm/ttm_tt.c
index b8b6c4a5f983..a55ee1a56c16 100644
--- a/drivers/gpu/drm/ttm/ttm_tt.c
+++ b/drivers/gpu/drm/ttm/ttm_tt.c
@@ -34,76 +34,13 @@
 #include <linux/pagemap.h>
 #include <linux/file.h>
 #include <linux/swap.h>
+#include "drm_cache.h"
 #include "ttm/ttm_module.h"
 #include "ttm/ttm_bo_driver.h"
 #include "ttm/ttm_placement.h"
 static int ttm_tt_swapin(struct ttm_tt *ttm);
-#if defined(CONFIG_X86)
-static void ttm_tt_clflush_page(struct page *page)
-{
-        uint8_t *page_virtual;
-        unsigned int i;
-        if (unlikely(page == NULL))
-                return;
-        page_virtual = kmap_atomic(page, KM_USER0);
-        for (i = 0; i < PAGE_SIZE; i += boot_cpu_data.x86_clflush_size)
-                clflush(page_virtual + i);
-        kunmap_atomic(page_virtual, KM_USER0);
-}
-static void ttm_tt_cache_flush_clflush(struct page *pages[],
-                                       unsigned long num_pages)
-{
-        unsigned long i;
-        mb();
-        for (i = 0; i < num_pages; ++i)
-                ttm_tt_clflush_page(*pages++);
-        mb();
-}
-#elif !defined(__powerpc__)
-static void ttm_tt_ipi_handler(void *null)
-{
-        ;
-}
-#endif
-void ttm_tt_cache_flush(struct page *pages[], unsigned long num_pages)
-{
-#if defined(CONFIG_X86)
-        if (cpu_has_clflush) {
-                ttm_tt_cache_flush_clflush(pages, num_pages);
-                return;
-        }
-#elif defined(__powerpc__)
-        unsigned long i;
-        for (i = 0; i < num_pages; ++i) {
-                struct page *page = pages[i];
-                void *page_virtual;
-                if (unlikely(page == NULL))
-                        continue;
-                page_virtual = kmap_atomic(page, KM_USER0);
-                flush_dcache_range((unsigned long) page_virtual,
-                                   (unsigned long) page_virtual + PAGE_SIZE);
-                kunmap_atomic(page_virtual, KM_USER0);
-        }
-#else
-        if (on_each_cpu(ttm_tt_ipi_handler, NULL, 1) != 0)
-                printk(KERN_ERR TTM_PFX
-                       "Timed out waiting for drm cache flush.\n");
-#endif
-}
 /**
 * Allocates storage for pointers to the pages that back the ttm.
 *
@@ -179,7 +116,7 @@ static void ttm_tt_free_user_pages(struct ttm_tt *ttm)
                        set_page_dirty_lock(page);
                ttm->pages[i] = NULL;
-                ttm_mem_global_free(ttm->bdev->mem_glob, PAGE_SIZE, false);
+                ttm_mem_global_free(ttm->glob->mem_glob, PAGE_SIZE);
                put_page(page);
        }
        ttm->state = tt_unpopulated;
@@ -190,8 +127,7 @@ static void ttm_tt_free_user_pages(struct ttm_tt *ttm)
 static struct page *__ttm_tt_get_page(struct ttm_tt *ttm, int index)
 {
        struct page *p;
-        struct ttm_bo_device *bdev = ttm->bdev;
+        struct ttm_mem_global *mem_glob = ttm->glob->mem_glob;
-        struct ttm_mem_global *mem_glob = bdev->mem_glob;
        int ret;
        while (NULL == (p = ttm->pages[index])) {
@@ -200,21 +136,14 @@ static struct page *__ttm_tt_get_page(struct ttm_tt *ttm, int index)
                if (!p)
                        return NULL;
-                if (PageHighMem(p)) {
+                ret = ttm_mem_global_alloc_page(mem_glob, p, false, false);
-                        ret =
+                if (unlikely(ret != 0))
-                            ttm_mem_global_alloc(mem_glob, PAGE_SIZE,
+                        goto out_err;
-                                                 false, false, true);
-                        if (unlikely(ret != 0))
+                if (PageHighMem(p))
-                                goto out_err;
                        ttm->pages[--ttm->first_himem_page] = p;
-                } else {
+                else
-                        ret =
-                            ttm_mem_global_alloc(mem_glob, PAGE_SIZE,
-                                                 false, false, false);
-                        if (unlikely(ret != 0))
-                                goto out_err;
                        ttm->pages[++ttm->last_lomem_page] = p;
-                }
        }
        return p;
 out_err:
@@ -310,7 +239,7 @@ static int ttm_tt_set_caching(struct ttm_tt *ttm,
        }
        if (ttm->caching_state == tt_cached)
-                ttm_tt_cache_flush(ttm->pages, ttm->num_pages);
+                drm_clflush_pages(ttm->pages, ttm->num_pages);
        for (i = 0; i < ttm->num_pages; ++i) {
                cur_page = ttm->pages[i];
@@ -368,8 +297,8 @@ static void ttm_tt_free_alloced_pages(struct ttm_tt *ttm)
                                printk(KERN_ERR TTM_PFX
                                       "Erroneous page count. "
                                       "Leaking pages.\n");
-                        ttm_mem_global_free(ttm->bdev->mem_glob, PAGE_SIZE,
+                        ttm_mem_global_free_page(ttm->glob->mem_glob,
-                                            PageHighMem(cur_page));
+                                                 cur_page);
                        __free_page(cur_page);
                }
        }
@@ -414,7 +343,7 @@ int ttm_tt_set_user(struct ttm_tt *ttm,
        struct mm_struct *mm = tsk->mm;
        int ret;
        int write = (ttm->page_flags & TTM_PAGE_FLAG_WRITE) != 0;
-        struct ttm_mem_global *mem_glob = ttm->bdev->mem_glob;
+        struct ttm_mem_global *mem_glob = ttm->glob->mem_glob;
        BUG_ON(num_pages != ttm->num_pages);
        BUG_ON((ttm->page_flags & TTM_PAGE_FLAG_USER) == 0);
@@ -424,7 +353,7 @@ int ttm_tt_set_user(struct ttm_tt *ttm,
         */
        ret = ttm_mem_global_alloc(mem_glob, num_pages * PAGE_SIZE,
-                                   false, false, false);
+                                   false, false);
        if (unlikely(ret != 0))
                return ret;
@@ -435,7 +364,7 @@ int ttm_tt_set_user(struct ttm_tt *ttm,
        if (ret != num_pages && write) {
                ttm_tt_free_user_pages(ttm);
-                ttm_mem_global_free(mem_glob, num_pages * PAGE_SIZE, false);
+                ttm_mem_global_free(mem_glob, num_pages * PAGE_SIZE);
                return -ENOMEM;
        }
@@ -459,8 +388,7 @@ struct ttm_tt *ttm_tt_create(struct ttm_bo_device *bdev, unsigned long size,
        if (!ttm)
                return NULL;
-        ttm->bdev = bdev;
+        ttm->glob = bdev->glob;
        ttm->num_pages = (size + PAGE_SIZE - 1) >> PAGE_SHIFT;
        ttm->first_himem_page = ttm->num_pages;
        ttm->last_lomem_page = -1;
diff --git a/drivers/hid/usbhid/hiddev.c b/drivers/hid/usbhid/hiddev.c
index 4d1dc0cf1401..8b6ee247bfe4 100644
--- a/drivers/hid/usbhid/hiddev.c
+++ b/drivers/hid/usbhid/hiddev.c
@@ -852,14 +852,14 @@ static const struct file_operations hiddev_fops = {
 #endif
 };
-static char *hiddev_nodename(struct device *dev)
+static char *hiddev_devnode(struct device *dev, mode_t *mode)
 {
        return kasprintf(GFP_KERNEL, "usb/%s", dev_name(dev));
 }
 static struct usb_class_driver hiddev_class = {
        .name =         "hiddev%d",
-        .nodename =     hiddev_nodename,
+        .devnode =      hiddev_devnode,
        .fops =         &hiddev_fops,
        .minor_base =   HIDDEV_MINOR_BASE,
 };
diff --git a/drivers/i2c/busses/i2c-imx.c b/drivers/i2c/busses/i2c-imx.c
index 0b486a63460d..4afba3ec2a61 100644
--- a/drivers/i2c/busses/i2c-imx.c
+++ b/drivers/i2c/busses/i2c-imx.c
@@ -609,13 +609,12 @@ static int __init i2c_adap_imx_init(void)
 {
        return platform_driver_probe(&i2c_imx_driver, i2c_imx_probe);
 }
+subsys_initcall(i2c_adap_imx_init);
 static void __exit i2c_adap_imx_exit(void)
 {
        platform_driver_unregister(&i2c_imx_driver);
 }
-module_init(i2c_adap_imx_init);
 module_exit(i2c_adap_imx_exit);
 MODULE_LICENSE("GPL");
diff --git a/drivers/i2c/busses/i2c-mv64xxx.c b/drivers/i2c/busses/i2c-mv64xxx.c
index c3869d94ad42..bbab0e166630 100644
--- a/drivers/i2c/busses/i2c-mv64xxx.c
+++ b/drivers/i2c/busses/i2c-mv64xxx.c
@@ -293,13 +293,13 @@ mv64xxx_i2c_do_action(struct mv64xxx_i2c_data *drv_data)
        }
 }
-static int
+static irqreturn_t
 mv64xxx_i2c_intr(int irq, void *dev_id)
 {
        struct mv64xxx_i2c_data *drv_data = dev_id;
        unsigned long   flags;
        u32             status;
-        int             rc = IRQ_NONE;
+        irqreturn_t     rc = IRQ_NONE;
        spin_lock_irqsave(&drv_data->lock, flags);
        while (readl(drv_data->reg_base + MV64XXX_I2C_REG_CONTROL) &
diff --git a/drivers/input/input.c b/drivers/input/input.c
index 851791d955f3..556539d617a4 100644
--- a/drivers/input/input.c
+++ b/drivers/input/input.c
@@ -1265,14 +1265,14 @@ static struct device_type input_dev_type = {
        .uevent         = input_dev_uevent,
 };
-static char *input_nodename(struct device *dev)
+static char *input_devnode(struct device *dev, mode_t *mode)
 {
        return kasprintf(GFP_KERNEL, "input/%s", dev_name(dev));
 }
 struct class input_class = {
        .name           = "input",
-        .nodename       = input_nodename,
+        .devnode        = input_devnode,
 };
 EXPORT_SYMBOL_GPL(input_class);
diff --git a/drivers/isdn/gigaset/interface.c b/drivers/isdn/gigaset/interface.c
index 8ff7e35c7069..f33ac27de643 100644
--- a/drivers/isdn/gigaset/interface.c
+++ b/drivers/isdn/gigaset/interface.c
@@ -408,33 +408,28 @@ static int if_write_room(struct tty_struct *tty)
        return retval;
 }
-/* FIXME: This function does not have error returns */
 static int if_chars_in_buffer(struct tty_struct *tty)
 {
        struct cardstate *cs;
-        int retval = -ENODEV;
+        int retval = 0;
        cs = (struct cardstate *) tty->driver_data;
        if (!cs) {
                pr_err("%s: no cardstate\n", __func__);
-                return -ENODEV;
+                return 0;
        }
        gig_dbg(DEBUG_IF, "%u: %s()", cs->minor_index, __func__);
-        if (mutex_lock_interruptible(&cs->mutex))
+        mutex_lock(&cs->mutex);
-                return -ERESTARTSYS; // FIXME -EINTR?
-        if (!cs->connected) {
+        if (!cs->connected)
                gig_dbg(DEBUG_IF, "not connected");
-                retval = -ENODEV;
+        else if (!cs->open_count)
-        } else if (!cs->open_count)
                dev_warn(cs->dev, "%s: device not opened\n", __func__);
-        else if (cs->mstate != MS_LOCKED) {
+        else if (cs->mstate != MS_LOCKED)
                dev_warn(cs->dev, "can't write to unlocked device\n");
-                retval = -EBUSY;
+        else
-        } else
                retval = cs->ops->chars_in_buffer(cs);
        mutex_unlock(&cs->mutex);
diff --git a/drivers/md/dm-ioctl.c b/drivers/md/dm-ioctl.c
index 7f77f18fcafa..a67942931582 100644
--- a/drivers/md/dm-ioctl.c
+++ b/drivers/md/dm-ioctl.c
@@ -1532,7 +1532,7 @@ static const struct file_operations _ctl_fops = {
 static struct miscdevice _dm_misc = {
        .minor          = MISC_DYNAMIC_MINOR,
        .name           = DM_NAME,
-        .devnode        = "mapper/control",
+        .nodename       = "mapper/control",
        .fops           = &_ctl_fops
 };
diff --git a/drivers/media/dvb/dvb-core/dvbdev.c b/drivers/media/dvb/dvb-core/dvbdev.c
index 479dd05762a5..94159b90f733 100644
--- a/drivers/media/dvb/dvb-core/dvbdev.c
+++ b/drivers/media/dvb/dvb-core/dvbdev.c
@@ -447,7 +447,7 @@ static int dvb_uevent(struct device *dev, struct kobj_uevent_env *env)
        return 0;
 }
-static char *dvb_nodename(struct device *dev)
+static char *dvb_devnode(struct device *dev, mode_t *mode)
 {
        struct dvb_device *dvbdev = dev_get_drvdata(dev);
@@ -478,7 +478,7 @@ static int __init init_dvbdev(void)
                goto error;
        }
        dvb_class->dev_uevent = dvb_uevent;
-        dvb_class->nodename = dvb_nodename;
+        dvb_class->devnode = dvb_devnode;
        return 0;
 error:
diff --git a/drivers/media/video/dabusb.c b/drivers/media/video/dabusb.c
index 0664d111085f..ee43876adb06 100644
--- a/drivers/media/video/dabusb.c
+++ b/drivers/media/video/dabusb.c
@@ -748,14 +748,14 @@ static const struct file_operations dabusb_fops =
        .release =      dabusb_release,
 };
-static char *dabusb_nodename(struct device *dev)
+static char *dabusb_devnode(struct device *dev, mode_t *mode)
 {
        return kasprintf(GFP_KERNEL, "usb/%s", dev_name(dev));
 }
 static struct usb_class_driver dabusb_class = {
        .name =         "dabusb%d",
-        .nodename =     dabusb_nodename,
+        .devnode =      dabusb_devnode,
        .fops =         &dabusb_fops,
        .minor_base =   DABUSB_MINOR,
 };
diff --git a/drivers/mtd/ubi/debug.c b/drivers/mtd/ubi/debug.c
index 54b0186915fb..4876977e52cb 100644
--- a/drivers/mtd/ubi/debug.c
+++ b/drivers/mtd/ubi/debug.c
@@ -196,4 +196,36 @@ void ubi_dbg_dump_mkvol_req(const struct ubi_mkvol_req *req)
        printk(KERN_DEBUG "\t1st 16 characters of name: %s\n", nm);
 }
+/**
+ * ubi_dbg_dump_flash - dump a region of flash.
+ * @ubi: UBI device description object
+ * @pnum: the physical eraseblock number to dump
+ * @offset: the starting offset within the physical eraseblock to dump
+ * @len: the length of the region to dump
+ */
+void ubi_dbg_dump_flash(struct ubi_device *ubi, int pnum, int offset, int len)
+{
+        int err;
+        size_t read;
+        void *buf;
+        loff_t addr = (loff_t)pnum * ubi->peb_size + offset;
+        buf = vmalloc(len);
+        if (!buf)
+                return;
+        err = ubi->mtd->read(ubi->mtd, addr, len, &read, buf);
+        if (err && err != -EUCLEAN) {
+                ubi_err("error %d while reading %d bytes from PEB %d:%d, "
+                        "read %zd bytes", err, len, pnum, offset, read);
+                goto out;
+        }
+        dbg_msg("dumping %d bytes of data from PEB %d, offset %d",
+                len, pnum, offset);
+        print_hex_dump(KERN_DEBUG, "", DUMP_PREFIX_OFFSET, 32, 1, buf, len, 1);
+out:
+        vfree(buf);
+        return;
+}
 #endif /* CONFIG_MTD_UBI_DEBUG */
diff --git a/drivers/mtd/ubi/debug.h b/drivers/mtd/ubi/debug.h
index a4da7a09b949..f30bcb372c05 100644
--- a/drivers/mtd/ubi/debug.h
+++ b/drivers/mtd/ubi/debug.h
@@ -55,6 +55,7 @@ void ubi_dbg_dump_vtbl_record(const struct ubi_vtbl_record *r, int idx);
 void ubi_dbg_dump_sv(const struct ubi_scan_volume *sv);
 void ubi_dbg_dump_seb(const struct ubi_scan_leb *seb, int type);
 void ubi_dbg_dump_mkvol_req(const struct ubi_mkvol_req *req);
+void ubi_dbg_dump_flash(struct ubi_device *ubi, int pnum, int offset, int len);
 #ifdef CONFIG_MTD_UBI_DEBUG_MSG
 /* General debugging messages */
@@ -167,6 +168,7 @@ static inline int ubi_dbg_is_erase_failure(void)
 #define ubi_dbg_dump_sv(sv)              ({})
 #define ubi_dbg_dump_seb(seb, type)      ({})
 #define ubi_dbg_dump_mkvol_req(req)      ({})
+#define ubi_dbg_dump_flash(ubi, pnum, offset, len) ({})
 #define UBI_IO_DEBUG               0
 #define DBG_DISABLE_BGT            0
diff --git a/drivers/mtd/ubi/io.c b/drivers/mtd/ubi/io.c
index 4cb69925d8d9..8aa51e7a6a7d 100644
--- a/drivers/mtd/ubi/io.c
+++ b/drivers/mtd/ubi/io.c
@@ -269,6 +269,7 @@ int ubi_io_write(struct ubi_device *ubi, const void *buf, int pnum, int offset,
                ubi_err("error %d while writing %d bytes to PEB %d:%d, written "
                        "%zd bytes", err, len, pnum, offset, written);
                ubi_dbg_dump_stack();
+                ubi_dbg_dump_flash(ubi, pnum, offset, len);
        } else
                ubi_assert(written == len);
@@ -475,30 +476,46 @@ out:
 */
 static int nor_erase_prepare(struct ubi_device *ubi, int pnum)
 {
-        int err;
+        int err, err1;
        size_t written;
        loff_t addr;
        uint32_t data = 0;
+        struct ubi_vid_hdr vid_hdr;
-        addr = (loff_t)pnum * ubi->peb_size;
+        addr = (loff_t)pnum * ubi->peb_size + ubi->vid_hdr_aloffset;
        err = ubi->mtd->write(ubi->mtd, addr, 4, &written, (void *)&data);
-        if (err) {
+        if (!err) {
-                ubi_err("error %d while writing 4 bytes to PEB %d:%d, written "
+                addr -= ubi->vid_hdr_aloffset;
-                        "%zd bytes", err, pnum, 0, written);
+                err = ubi->mtd->write(ubi->mtd, addr, 4, &written,
-                ubi_dbg_dump_stack();
+                                      (void *)&data);
-                return err;
+                if (!err)
+                        return 0;
        }
-        addr += ubi->vid_hdr_aloffset;
+        /*
-        err = ubi->mtd->write(ubi->mtd, addr, 4, &written, (void *)&data);
+         * We failed to write to the media. This was observed with Spansion
-        if (err) {
+         * S29GL512N NOR flash. Most probably the eraseblock erasure was
-                ubi_err("error %d while writing 4 bytes to PEB %d:%d, written "
+         * interrupted at a very inappropriate moment, so it became unwritable.
-                        "%zd bytes", err, pnum, ubi->vid_hdr_aloffset, written);
+         * In this case we probably anyway have garbage in this PEB.
-                ubi_dbg_dump_stack();
+         */
-                return err;
+        err1 = ubi_io_read_vid_hdr(ubi, pnum, &vid_hdr, 0);
-        }
+        if (err1 == UBI_IO_BAD_VID_HDR)
+                /*
+                 * The VID header is corrupted, so we can safely erase this
+                 * PEB and not afraid that it will be treated as a valid PEB in
+                 * case of an unclean reboot.
+                 */
+                return 0;
-        return 0;
+        /*
+         * The PEB contains a valid VID header, but we cannot invalidate it.
+         * Supposedly the flash media or the driver is screwed up, so return an
+         * error.
+         */
+        ubi_err("cannot invalidate PEB %d, write returned %d read returned %d",
+                pnum, err, err1);
+        ubi_dbg_dump_flash(ubi, pnum, 0, ubi->peb_size);
+        return -EIO;
 }
 /**
diff --git a/drivers/mtd/ubi/scan.c b/drivers/mtd/ubi/scan.c
index b847745394b4..e7161adc419d 100644
--- a/drivers/mtd/ubi/scan.c
+++ b/drivers/mtd/ubi/scan.c
@@ -75,9 +75,10 @@ static int add_to_list(struct ubi_scan_info *si, int pnum, int ec,
                dbg_bld("add to free: PEB %d, EC %d", pnum, ec);
        else if (list == &si->erase)
                dbg_bld("add to erase: PEB %d, EC %d", pnum, ec);
-        else if (list == &si->corr)
+        else if (list == &si->corr) {
                dbg_bld("add to corrupted: PEB %d, EC %d", pnum, ec);
-        else if (list == &si->alien)
+                si->corr_count += 1;
+        } else if (list == &si->alien)
                dbg_bld("add to alien: PEB %d, EC %d", pnum, ec);
        else
                BUG();
@@ -864,7 +865,9 @@ static int process_eb(struct ubi_device *ubi, struct ubi_scan_info *si,
                }
        }
-        /* Both UBI headers seem to be fine */
+        if (ec_corr)
+                ubi_warn("valid VID header but corrupted EC header at PEB %d",
+                         pnum);
        err = ubi_scan_add_used(ubi, si, pnum, ec, vidh, bitflips);
        if (err)
                return err;
@@ -936,6 +939,19 @@ struct ubi_scan_info *ubi_scan(struct ubi_device *ubi)
                ubi_msg("empty MTD device detected");
        /*
+         * Few corrupted PEBs are not a problem and may be just a result of
+         * unclean reboots. However, many of them may indicate some problems
+         * with the flash HW or driver. Print a warning in this case.
+         */
+        if (si->corr_count >= 8 || si->corr_count >= ubi->peb_count / 4) {
+                ubi_warn("%d PEBs are corrupted", si->corr_count);
+                printk(KERN_WARNING "corrupted PEBs are:");
+                list_for_each_entry(seb, &si->corr, u.list)
+                        printk(KERN_CONT " %d", seb->pnum);
+                printk(KERN_CONT "\n");
+        }
+        /*
         * In case of unknown erase counter we use the mean erase counter
         * value.
         */
diff --git a/drivers/mtd/ubi/scan.h b/drivers/mtd/ubi/scan.h
index 1017cf12def5..bab31695dace 100644
--- a/drivers/mtd/ubi/scan.h
+++ b/drivers/mtd/ubi/scan.h
@@ -102,6 +102,7 @@ struct ubi_scan_volume {
 * @mean_ec: mean erase counter value
 * @ec_sum: a temporary variable used when calculating @mean_ec
 * @ec_count: a temporary variable used when calculating @mean_ec
+ * @corr_count: count of corrupted PEBs
 * @image_seq_set: indicates @ubi->image_seq is known
 *
 * This data structure contains the result of scanning and may be used by other
@@ -125,6 +126,7 @@ struct ubi_scan_info {
        int mean_ec;
        uint64_t ec_sum;
        int ec_count;
+        int corr_count;
        int image_seq_set;
 };
diff --git a/drivers/mtd/ubi/ubi.h b/drivers/mtd/ubi/ubi.h
index 6a5fe9633783..c290f51dd178 100644
--- a/drivers/mtd/ubi/ubi.h
+++ b/drivers/mtd/ubi/ubi.h
@@ -579,7 +579,8 @@ void ubi_do_get_volume_info(struct ubi_device *ubi, struct ubi_volume *vol,
        for (rb = rb_first(root),                                            \
             pos = (rb ? container_of(rb, typeof(*pos), member) : NULL);     \
             rb;                                                             \
-             rb = rb_next(rb), pos = container_of(rb, typeof(*pos), member))
+             rb = rb_next(rb),                                               \
+             pos = (rb ? container_of(rb, typeof(*pos), member) : NULL))
 /**
 * ubi_zalloc_vid_hdr - allocate a volume identifier header object.
diff --git a/drivers/net/slip.c b/drivers/net/slip.c
index 26f6ee93a064..e17c535a577e 100644
--- a/drivers/net/slip.c
+++ b/drivers/net/slip.c
@@ -616,6 +616,14 @@ static void sl_uninit(struct net_device *dev)
        sl_free_bufs(sl);
 }
+/* Hook the destructor so we can free slip devices at the right point in time */
+static void sl_free_netdev(struct net_device *dev)
+{
+        int i = dev->base_addr;
+        free_netdev(dev);
+        slip_devs[i] = NULL;
+}
 static const struct net_device_ops sl_netdev_ops = {
        .ndo_init               = sl_init,
        .ndo_uninit             = sl_uninit,
@@ -634,7 +642,7 @@ static const struct net_device_ops sl_netdev_ops = {
 static void sl_setup(struct net_device *dev)
 {
        dev->netdev_ops         = &sl_netdev_ops;
-        dev->destructor         = free_netdev;
+        dev->destructor         = sl_free_netdev;
        dev->hard_header_len    = 0;
        dev->addr_len           = 0;
@@ -712,8 +720,6 @@ static void sl_sync(void)
 static struct slip *sl_alloc(dev_t line)
 {
        int i;
-        int sel = -1;
-        int score = -1;
        struct net_device *dev = NULL;
        struct slip       *sl;
@@ -724,55 +730,7 @@ static struct slip *sl_alloc(dev_t line)
                dev = slip_devs[i];
                if (dev == NULL)
                        break;
-                sl = netdev_priv(dev);
-                if (sl->leased) {
-                        if (sl->line != line)
-                                continue;
-                        if (sl->tty)
-                                return NULL;
-                        /* Clear ESCAPE & ERROR flags */
-                        sl->flags &= (1 << SLF_INUSE);
-                        return sl;
-                }
-                if (sl->tty)
-                        continue;
-                if (current->pid == sl->pid) {
-                        if (sl->line == line && score < 3) {
-                                sel = i;
-                                score = 3;
-                                continue;
-                        }
-                        if (score < 2) {
-                                sel = i;
-                                score = 2;
-                        }
-                        continue;
-                }
-                if (sl->line == line && score < 1) {
-                        sel = i;
-                        score = 1;
-                        continue;
-                }
-                if (score < 0) {
-                        sel = i;
-                        score = 0;
-                }
-        }
-        if (sel >= 0) {
-                i = sel;
-                dev = slip_devs[i];
-                if (score > 1) {
-                        sl = netdev_priv(dev);
-                        sl->flags &= (1 << SLF_INUSE);
-                        return sl;
-                }
        }
        /* Sorry, too many, all slots in use */
        if (i >= slip_maxdev)
                return NULL;
@@ -909,30 +867,13 @@ err_exit:
 }
 /*
-  FIXME: 1,2 are fixed 3 was never true anyway.
-   Let me to blame a bit.
-   1. TTY module calls this funstion on soft interrupt.
-   2. TTY module calls this function WITH MASKED INTERRUPTS!
-   3. TTY module does not notify us about line discipline
-      shutdown,
-   Seems, now it is clean. The solution is to consider netdevice and
-   line discipline sides as two independent threads.
-   By-product (not desired): sl? does not feel hangups and remains open.
-   It is supposed, that user level program (dip, diald, slattach...)
-   will catch SIGHUP and make the rest of work.
-   I see no way to make more with current tty code. --ANK
- */
-/*
 * Close down a SLIP channel.
 * This means flushing out any pending queues, and then returning. This
 * call is serialized against other ldisc functions.
+ *
+ * We also use this method fo a hangup event
 */
 static void slip_close(struct tty_struct *tty)
 {
        struct slip *sl = tty->disc_data;
@@ -951,10 +892,16 @@ static void slip_close(struct tty_struct *tty)
        del_timer_sync(&sl->keepalive_timer);
        del_timer_sync(&sl->outfill_timer);
 #endif
+        /* Flush network side */
-        /* Count references from TTY module */
+        unregister_netdev(sl->dev);
+        /* This will complete via sl_free_netdev */
 }
+static int slip_hangup(struct tty_struct *tty)
+{
+        slip_close(tty);
+        return 0;
+}
 /************************************************************************
  *                     STANDARD SLIP ENCAPSULATION                      *
  ************************************************************************/
@@ -1311,6 +1258,7 @@ static struct tty_ldisc_ops sl_ldisc = {
        .name           = "slip",
        .open           = slip_open,
        .close          = slip_close,
+        .hangup         = slip_hangup,
        .ioctl          = slip_ioctl,
        .receive_buf    = slip_receive_buf,
        .write_wakeup   = slip_write_wakeup,
@@ -1384,6 +1332,8 @@ static void __exit slip_exit(void)
                }
        } while (busy && time_before(jiffies, timeout));
+        /* FIXME: hangup is async so we should wait when doing this second
+           phase */
        for (i = 0; i < slip_maxdev; i++) {
                dev = slip_devs[i];
diff --git a/drivers/net/tun.c b/drivers/net/tun.c
index 3f5d28851aa2..d3ee1994b02f 100644
--- a/drivers/net/tun.c
+++ b/drivers/net/tun.c
@@ -1370,7 +1370,7 @@ static const struct file_operations tun_fops = {
 static struct miscdevice tun_miscdev = {
        .minor = TUN_MINOR,
        .name = "tun",
-        .devnode = "net/tun",
+        .nodename = "net/tun",
        .fops = &tun_fops,
 };
diff --git a/drivers/scsi/fcoe/libfcoe.c b/drivers/scsi/fcoe/libfcoe.c
index 62a4c2026072..11ae5c94608b 100644
--- a/drivers/scsi/fcoe/libfcoe.c
+++ b/drivers/scsi/fcoe/libfcoe.c
@@ -29,7 +29,6 @@
 #include <linux/ethtool.h>
 #include <linux/if_ether.h>
 #include <linux/if_vlan.h>
-#include <linux/netdevice.h>
 #include <linux/errno.h>
 #include <linux/bitops.h>
 #include <net/rtnetlink.h>
diff --git a/drivers/scsi/ibmvscsi/ibmvscsi.c b/drivers/scsi/ibmvscsi/ibmvscsi.c
index 9928704e235f..d9b0e9d31983 100644
--- a/drivers/scsi/ibmvscsi/ibmvscsi.c
+++ b/drivers/scsi/ibmvscsi/ibmvscsi.c
@@ -73,7 +73,6 @@
 #include <linux/of.h>
 #include <asm/firmware.h>
 #include <asm/vio.h>
-#include <asm/firmware.h>
 #include <scsi/scsi.h>
 #include <scsi/scsi_cmnd.h>
 #include <scsi/scsi_host.h>
diff --git a/drivers/serial/21285.c b/drivers/serial/21285.c
index cb6d85d7ff43..1e3d19397a59 100644
--- a/drivers/serial/21285.c
+++ b/drivers/serial/21285.c
@@ -86,7 +86,7 @@ static void serial21285_enable_ms(struct uart_port *port)
 static irqreturn_t serial21285_rx_chars(int irq, void *dev_id)
 {
        struct uart_port *port = dev_id;
-        struct tty_struct *tty = port->info->port.tty;
+        struct tty_struct *tty = port->state->port.tty;
        unsigned int status, ch, flag, rxs, max_count = 256;
        status = *CSR_UARTFLG;
@@ -124,7 +124,7 @@ static irqreturn_t serial21285_rx_chars(int irq, void *dev_id)
 static irqreturn_t serial21285_tx_chars(int irq, void *dev_id)
 {
        struct uart_port *port = dev_id;
-        struct circ_buf *xmit = &port->info->xmit;
+        struct circ_buf *xmit = &port->state->xmit;
        int count = 256;
        if (port->x_char) {
@@ -235,8 +235,8 @@ serial21285_set_termios(struct uart_port *port, struct ktermios *termios,
        baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16); 
        quot = uart_get_divisor(port, baud);
-        if (port->info && port->info->port.tty) {
+        if (port->state && port->state->port.tty) {
-                struct tty_struct *tty = port->info->port.tty;
+                struct tty_struct *tty = port->state->port.tty;
                unsigned int b = port->uartclk / (16 * quot);
                tty_encode_baud_rate(tty, b, b);
        }
diff --git a/drivers/serial/8250.c b/drivers/serial/8250.c
index fb867a9f55e9..2209620d2349 100644
--- a/drivers/serial/8250.c
+++ b/drivers/serial/8250.c
@@ -1382,7 +1382,7 @@ static void serial8250_enable_ms(struct uart_port *port)
 static void
 receive_chars(struct uart_8250_port *up, unsigned int *status)
 {
-        struct tty_struct *tty = up->port.info->port.tty;
+        struct tty_struct *tty = up->port.state->port.tty;
        unsigned char ch, lsr = *status;
        int max_count = 256;
        char flag;
@@ -1457,7 +1457,7 @@ ignore_char:
 static void transmit_chars(struct uart_8250_port *up)
 {
-        struct circ_buf *xmit = &up->port.info->xmit;
+        struct circ_buf *xmit = &up->port.state->xmit;
        int count;
        if (up->port.x_char) {
@@ -1500,7 +1500,7 @@ static unsigned int check_modem_status(struct uart_8250_port *up)
        status |= up->msr_saved_flags;
        up->msr_saved_flags = 0;
        if (status & UART_MSR_ANY_DELTA && up->ier & UART_IER_MSI &&
-            up->port.info != NULL) {
+            up->port.state != NULL) {
                if (status & UART_MSR_TERI)
                        up->port.icount.rng++;
                if (status & UART_MSR_DDSR)
@@ -1510,7 +1510,7 @@ static unsigned int check_modem_status(struct uart_8250_port *up)
                if (status & UART_MSR_DCTS)
                        uart_handle_cts_change(&up->port, status & UART_MSR_CTS);
-                wake_up_interruptible(&up->port.info->delta_msr_wait);
+                wake_up_interruptible(&up->port.state->port.delta_msr_wait);
        }
        return status;
@@ -1677,7 +1677,7 @@ static int serial_link_irq_chain(struct uart_8250_port *up)
                INIT_LIST_HEAD(&up->list);
                i->head = &up->list;
                spin_unlock_irq(&i->lock);
+                irq_flags |= up->port.irqflags;
                ret = request_irq(up->port.irq, serial8250_interrupt,
                                  irq_flags, "serial", i);
                if (ret < 0)
@@ -1764,7 +1764,7 @@ static void serial8250_backup_timeout(unsigned long data)
        up->lsr_saved_flags |= lsr & LSR_SAVE_FLAGS;
        spin_unlock_irqrestore(&up->port.lock, flags);
        if ((iir & UART_IIR_NO_INT) && (up->ier & UART_IER_THRI) &&
-            (!uart_circ_empty(&up->port.info->xmit) || up->port.x_char) &&
+            (!uart_circ_empty(&up->port.state->xmit) || up->port.x_char) &&
            (lsr & UART_LSR_THRE)) {
                iir &= ~(UART_IIR_ID | UART_IIR_NO_INT);
                iir |= UART_IIR_THRI;
@@ -2026,7 +2026,7 @@ static int serial8250_startup(struct uart_port *port)
                 * allow register changes to become visible.
                 */
                spin_lock_irqsave(&up->port.lock, flags);
-                if (up->port.flags & UPF_SHARE_IRQ)
+                if (up->port.irqflags & IRQF_SHARED)
                        disable_irq_nosync(up->port.irq);
                wait_for_xmitr(up, UART_LSR_THRE);
@@ -2039,7 +2039,7 @@ static int serial8250_startup(struct uart_port *port)
                iir = serial_in(up, UART_IIR);
                serial_out(up, UART_IER, 0);
-                if (up->port.flags & UPF_SHARE_IRQ)
+                if (up->port.irqflags & IRQF_SHARED)
                        enable_irq(up->port.irq);
                spin_unlock_irqrestore(&up->port.lock, flags);
@@ -2272,7 +2272,9 @@ serial8250_set_termios(struct uart_port *port, struct ktermios *termios,
        /*
         * Ask the core to calculate the divisor for us.
         */
-        baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
+        baud = uart_get_baud_rate(port, termios, old,
+                                  port->uartclk / 16 / 0xffff,
+                                  port->uartclk / 16);
        quot = serial8250_get_divisor(port, baud);
        /*
@@ -2671,6 +2673,7 @@ static void __init serial8250_isa_init_ports(void)
             i++, up++) {
                up->port.iobase   = old_serial_port[i].port;
                up->port.irq      = irq_canonicalize(old_serial_port[i].irq);
+                up->port.irqflags = old_serial_port[i].irqflags;
                up->port.uartclk  = old_serial_port[i].baud_base * 16;
                up->port.flags    = old_serial_port[i].flags;
                up->port.hub6     = old_serial_port[i].hub6;
@@ -2679,7 +2682,7 @@ static void __init serial8250_isa_init_ports(void)
                up->port.regshift = old_serial_port[i].iomem_reg_shift;
                set_io_from_upio(&up->port);
                if (share_irqs)
-                        up->port.flags |= UPF_SHARE_IRQ;
+                        up->port.irqflags |= IRQF_SHARED;
        }
 }
@@ -2869,6 +2872,7 @@ int __init early_serial_setup(struct uart_port *port)
        p->iobase       = port->iobase;
        p->membase      = port->membase;
        p->irq          = port->irq;
+        p->irqflags     = port->irqflags;
        p->uartclk      = port->uartclk;
        p->fifosize     = port->fifosize;
        p->regshift     = port->regshift;
@@ -2942,6 +2946,7 @@ static int __devinit serial8250_probe(struct platform_device *dev)
                port.iobase             = p->iobase;
                port.membase            = p->membase;
                port.irq                = p->irq;
+                port.irqflags           = p->irqflags;
                port.uartclk            = p->uartclk;
                port.regshift           = p->regshift;
                port.iotype             = p->iotype;
@@ -2954,7 +2959,7 @@ static int __devinit serial8250_probe(struct platform_device *dev)
                port.serial_out         = p->serial_out;
                port.dev                = &dev->dev;
                if (share_irqs)
-                        port.flags |= UPF_SHARE_IRQ;
+                        port.irqflags |= IRQF_SHARED;
                ret = serial8250_register_port(&port);
                if (ret < 0) {
                        dev_err(&dev->dev, "unable to register port at index %d "
@@ -3096,6 +3101,7 @@ int serial8250_register_port(struct uart_port *port)
                uart->port.iobase       = port->iobase;
                uart->port.membase      = port->membase;
                uart->port.irq          = port->irq;
+                uart->port.irqflags     = port->irqflags;
                uart->port.uartclk      = port->uartclk;
                uart->port.fifosize     = port->fifosize;
                uart->port.regshift     = port->regshift;
diff --git a/drivers/serial/8250.h b/drivers/serial/8250.h
index 520260326f3d..6e19ea3e48d5 100644
--- a/drivers/serial/8250.h
+++ b/drivers/serial/8250.h
@@ -25,6 +25,7 @@ struct old_serial_port {
        unsigned char io_type;
        unsigned char *iomem_base;
        unsigned short iomem_reg_shift;
+        unsigned long irqflags;
 };
 /*
diff --git a/drivers/serial/amba-pl010.c b/drivers/serial/amba-pl010.c
index 58a4879c7e48..429a8ae86933 100644
--- a/drivers/serial/amba-pl010.c
+++ b/drivers/serial/amba-pl010.c
@@ -117,7 +117,7 @@ static void pl010_enable_ms(struct uart_port *port)
 static void pl010_rx_chars(struct uart_amba_port *uap)
 {
-        struct tty_struct *tty = uap->port.info->port.tty;
+        struct tty_struct *tty = uap->port.state->port.tty;
        unsigned int status, ch, flag, rsr, max_count = 256;
        status = readb(uap->port.membase + UART01x_FR);
@@ -172,7 +172,7 @@ static void pl010_rx_chars(struct uart_amba_port *uap)
 static void pl010_tx_chars(struct uart_amba_port *uap)
 {
-        struct circ_buf *xmit = &uap->port.info->xmit;
+        struct circ_buf *xmit = &uap->port.state->xmit;
        int count;
        if (uap->port.x_char) {
@@ -225,7 +225,7 @@ static void pl010_modem_status(struct uart_amba_port *uap)
        if (delta & UART01x_FR_CTS)
                uart_handle_cts_change(&uap->port, status & UART01x_FR_CTS);
-        wake_up_interruptible(&uap->port.info->delta_msr_wait);
+        wake_up_interruptible(&uap->port.state->port.delta_msr_wait);
 }
 static irqreturn_t pl010_int(int irq, void *dev_id)
diff --git a/drivers/serial/amba-pl011.c b/drivers/serial/amba-pl011.c
index 72ba0c6d3551..ef7adc8135dd 100644
--- a/drivers/serial/amba-pl011.c
+++ b/drivers/serial/amba-pl011.c
@@ -124,7 +124,7 @@ static void pl011_enable_ms(struct uart_port *port)
 static void pl011_rx_chars(struct uart_amba_port *uap)
 {
-        struct tty_struct *tty = uap->port.info->port.tty;
+        struct tty_struct *tty = uap->port.state->port.tty;
        unsigned int status, ch, flag, max_count = 256;
        status = readw(uap->port.membase + UART01x_FR);
@@ -175,7 +175,7 @@ static void pl011_rx_chars(struct uart_amba_port *uap)
 static void pl011_tx_chars(struct uart_amba_port *uap)
 {
-        struct circ_buf *xmit = &uap->port.info->xmit;
+        struct circ_buf *xmit = &uap->port.state->xmit;
        int count;
        if (uap->port.x_char) {
@@ -226,7 +226,7 @@ static void pl011_modem_status(struct uart_amba_port *uap)
        if (delta & UART01x_FR_CTS)
                uart_handle_cts_change(&uap->port, status & UART01x_FR_CTS);
-        wake_up_interruptible(&uap->port.info->delta_msr_wait);
+        wake_up_interruptible(&uap->port.state->port.delta_msr_wait);
 }
 static irqreturn_t pl011_int(int irq, void *dev_id)
diff --git a/drivers/serial/atmel_serial.c b/drivers/serial/atmel_serial.c
index 607d43a31048..3551c5cb7094 100644
--- a/drivers/serial/atmel_serial.c
+++ b/drivers/serial/atmel_serial.c
@@ -427,7 +427,7 @@ static void atmel_rx_chars(struct uart_port *port)
 */
 static void atmel_tx_chars(struct uart_port *port)
 {
-        struct circ_buf *xmit = &port->info->xmit;
+        struct circ_buf *xmit = &port->state->xmit;
        if (port->x_char && UART_GET_CSR(port) & ATMEL_US_TXRDY) {
                UART_PUT_CHAR(port, port->x_char);
@@ -560,7 +560,7 @@ static irqreturn_t atmel_interrupt(int irq, void *dev_id)
 static void atmel_tx_dma(struct uart_port *port)
 {
        struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
-        struct circ_buf *xmit = &port->info->xmit;
+        struct circ_buf *xmit = &port->state->xmit;
        struct atmel_dma_buffer *pdc = &atmel_port->pdc_tx;
        int count;
@@ -663,14 +663,14 @@ static void atmel_rx_from_ring(struct uart_port *port)
         * uart_start(), which takes the lock.
         */
        spin_unlock(&port->lock);
-        tty_flip_buffer_push(port->info->port.tty);
+        tty_flip_buffer_push(port->state->port.tty);
        spin_lock(&port->lock);
 }
 static void atmel_rx_from_dma(struct uart_port *port)
 {
        struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
-        struct tty_struct *tty = port->info->port.tty;
+        struct tty_struct *tty = port->state->port.tty;
        struct atmel_dma_buffer *pdc;
        int rx_idx = atmel_port->pdc_rx_idx;
        unsigned int head;
@@ -776,7 +776,7 @@ static void atmel_tasklet_func(unsigned long data)
                if (status_change & ATMEL_US_CTS)
                        uart_handle_cts_change(port, !(status & ATMEL_US_CTS));
-                wake_up_interruptible(&port->info->delta_msr_wait);
+                wake_up_interruptible(&port->state->port.delta_msr_wait);
                atmel_port->irq_status_prev = status;
        }
@@ -795,7 +795,7 @@ static void atmel_tasklet_func(unsigned long data)
 static int atmel_startup(struct uart_port *port)
 {
        struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
-        struct tty_struct *tty = port->info->port.tty;
+        struct tty_struct *tty = port->state->port.tty;
        int retval;
        /*
@@ -854,7 +854,7 @@ static int atmel_startup(struct uart_port *port)
        }
        if (atmel_use_dma_tx(port)) {
                struct atmel_dma_buffer *pdc = &atmel_port->pdc_tx;
-                struct circ_buf *xmit = &port->info->xmit;
+                struct circ_buf *xmit = &port->state->xmit;
                pdc->buf = xmit->buf;
                pdc->dma_addr = dma_map_single(port->dev,
diff --git a/drivers/serial/bfin_5xx.c b/drivers/serial/bfin_5xx.c
index b4a7650af696..50abb7e557f4 100644
--- a/drivers/serial/bfin_5xx.c
+++ b/drivers/serial/bfin_5xx.c
@@ -42,6 +42,10 @@
 # undef CONFIG_EARLY_PRINTK
 #endif
+#ifdef CONFIG_SERIAL_BFIN_MODULE
+# undef CONFIG_EARLY_PRINTK
+#endif
 /* UART name and device definitions */
 #define BFIN_SERIAL_NAME        "ttyBF"
 #define BFIN_SERIAL_MAJOR       204
@@ -140,7 +144,7 @@ static void bfin_serial_stop_tx(struct uart_port *port)
 {
        struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
 #ifdef CONFIG_SERIAL_BFIN_DMA
-        struct circ_buf *xmit = &uart->port.info->xmit;
+        struct circ_buf *xmit = &uart->port.state->xmit;
 #endif
        while (!(UART_GET_LSR(uart) & TEMT))
@@ -167,7 +171,7 @@ static void bfin_serial_stop_tx(struct uart_port *port)
 static void bfin_serial_start_tx(struct uart_port *port)
 {
        struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
-        struct tty_struct *tty = uart->port.info->port.tty;
+        struct tty_struct *tty = uart->port.state->port.tty;
 #ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
        if (uart->scts && !(bfin_serial_get_mctrl(&uart->port) & TIOCM_CTS)) {
@@ -239,10 +243,10 @@ static void bfin_serial_rx_chars(struct bfin_serial_port *uart)
                        return;
                }
-        if (!uart->port.info || !uart->port.info->port.tty)
+        if (!uart->port.state || !uart->port.state->port.tty)
                return;
 #endif
-        tty = uart->port.info->port.tty;
+        tty = uart->port.state->port.tty;
        if (ANOMALY_05000363) {
                /* The BF533 (and BF561) family of processors have a nice anomaly
@@ -327,7 +331,7 @@ static void bfin_serial_rx_chars(struct bfin_serial_port *uart)
 static void bfin_serial_tx_chars(struct bfin_serial_port *uart)
 {
-        struct circ_buf *xmit = &uart->port.info->xmit;
+        struct circ_buf *xmit = &uart->port.state->xmit;
        if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) {
 #ifdef CONFIG_BF54x
@@ -394,7 +398,7 @@ static irqreturn_t bfin_serial_tx_int(int irq, void *dev_id)
 #ifdef CONFIG_SERIAL_BFIN_DMA
 static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart)
 {
-        struct circ_buf *xmit = &uart->port.info->xmit;
+        struct circ_buf *xmit = &uart->port.state->xmit;
        uart->tx_done = 0;
@@ -432,7 +436,7 @@ static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart)
 static void bfin_serial_dma_rx_chars(struct bfin_serial_port *uart)
 {
-        struct tty_struct *tty = uart->port.info->port.tty;
+        struct tty_struct *tty = uart->port.state->port.tty;
        int i, flg, status;
        status = UART_GET_LSR(uart);
@@ -525,7 +529,7 @@ void bfin_serial_rx_dma_timeout(struct bfin_serial_port *uart)
 static irqreturn_t bfin_serial_dma_tx_int(int irq, void *dev_id)
 {
        struct bfin_serial_port *uart = dev_id;
-        struct circ_buf *xmit = &uart->port.info->xmit;
+        struct circ_buf *xmit = &uart->port.state->xmit;
 #ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
        if (uart->scts && !(bfin_serial_get_mctrl(&uart->port)&TIOCM_CTS)) {
@@ -961,10 +965,10 @@ static void bfin_serial_set_ldisc(struct uart_port *port)
        int line = port->line;
        unsigned short val;
-        if (line >= port->info->port.tty->driver->num)
+        if (line >= port->state->port.tty->driver->num)
                return;
-        switch (port->info->port.tty->termios->c_line) {
+        switch (port->state->port.tty->termios->c_line) {
        case N_IRDA:
                val = UART_GET_GCTL(&bfin_serial_ports[line]);
                val |= (IREN | RPOLC);
diff --git a/drivers/serial/bfin_sport_uart.c b/drivers/serial/bfin_sport_uart.c
index c108b1a0ce98..088bb35475f1 100644
--- a/drivers/serial/bfin_sport_uart.c
+++ b/drivers/serial/bfin_sport_uart.c
@@ -178,7 +178,7 @@ static int sport_uart_setup(struct sport_uart_port *up, int sclk, int baud_rate)
 static irqreturn_t sport_uart_rx_irq(int irq, void *dev_id)
 {
        struct sport_uart_port *up = dev_id;
-        struct tty_struct *tty = up->port.info->port.tty;
+        struct tty_struct *tty = up->port.state->port.tty;
        unsigned int ch;
        do {
@@ -205,7 +205,7 @@ static irqreturn_t sport_uart_tx_irq(int irq, void *dev_id)
 static irqreturn_t sport_uart_err_irq(int irq, void *dev_id)
 {
        struct sport_uart_port *up = dev_id;
-        struct tty_struct *tty = up->port.info->port.tty;
+        struct tty_struct *tty = up->port.state->port.tty;
        unsigned int stat = SPORT_GET_STAT(up);
        /* Overflow in RX FIFO */
@@ -290,7 +290,7 @@ fail1:
 static void sport_uart_tx_chars(struct sport_uart_port *up)
 {
-        struct circ_buf *xmit = &up->port.info->xmit;
+        struct circ_buf *xmit = &up->port.state->xmit;
        if (SPORT_GET_STAT(up) & TXF)
                return;
diff --git a/drivers/serial/clps711x.c b/drivers/serial/clps711x.c
index 80e76426131d..b6acd19b458e 100644
--- a/drivers/serial/clps711x.c
+++ b/drivers/serial/clps711x.c
@@ -93,7 +93,7 @@ static void clps711xuart_enable_ms(struct uart_port *port)
 static irqreturn_t clps711xuart_int_rx(int irq, void *dev_id)
 {
        struct uart_port *port = dev_id;
-        struct tty_struct *tty = port->info->port.tty;
+        struct tty_struct *tty = port->state->port.tty;
        unsigned int status, ch, flg;
        status = clps_readl(SYSFLG(port));
@@ -147,7 +147,7 @@ static irqreturn_t clps711xuart_int_rx(int irq, void *dev_id)
 static irqreturn_t clps711xuart_int_tx(int irq, void *dev_id)
 {
        struct uart_port *port = dev_id;
-        struct circ_buf *xmit = &port->info->xmit;
+        struct circ_buf *xmit = &port->state->xmit;
        int count;
        if (port->x_char) {
diff --git a/drivers/serial/cpm_uart/cpm_uart_core.c b/drivers/serial/cpm_uart/cpm_uart_core.c
index f8df0681e160..8d349b23249a 100644
--- a/drivers/serial/cpm_uart/cpm_uart_core.c
+++ b/drivers/serial/cpm_uart/cpm_uart_core.c
@@ -244,7 +244,7 @@ static void cpm_uart_int_rx(struct uart_port *port)
        int i;
        unsigned char ch;
        u8 *cp;
-        struct tty_struct *tty = port->info->port.tty;
+        struct tty_struct *tty = port->state->port.tty;
        struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
        cbd_t __iomem *bdp;
        u16 status;
diff --git a/drivers/serial/dz.c b/drivers/serial/dz.c
index 6042b87797a1..57421d776329 100644
--- a/drivers/serial/dz.c
+++ b/drivers/serial/dz.c
@@ -197,7 +197,7 @@ static inline void dz_receive_chars(struct dz_mux *mux)
        while ((status = dz_in(dport, DZ_RBUF)) & DZ_DVAL) {
                dport = &mux->dport[LINE(status)];
                uport = &dport->port;
-                tty = uport->info->port.tty;    /* point to the proper dev */
+                tty = uport->state->port.tty;   /* point to the proper dev */
                ch = UCHAR(status);             /* grab the char */
                flag = TTY_NORMAL;
@@ -249,7 +249,7 @@ static inline void dz_receive_chars(struct dz_mux *mux)
        }
        for (i = 0; i < DZ_NB_PORT; i++)
                if (lines_rx[i])
-                        tty_flip_buffer_push(mux->dport[i].port.info->port.tty);
+                        tty_flip_buffer_push(mux->dport[i].port.state->port.tty);
 }
 /*
@@ -268,7 +268,7 @@ static inline void dz_transmit_chars(struct dz_mux *mux)
        status = dz_in(dport, DZ_CSR);
        dport = &mux->dport[LINE(status)];
-        xmit = &dport->port.info->xmit;
+        xmit = &dport->port.state->xmit;
        if (dport->port.x_char) {               /* XON/XOFF chars */
                dz_out(dport, DZ_TDR, dport->port.x_char);
diff --git a/drivers/serial/icom.c b/drivers/serial/icom.c
index cd1b6a45bb82..2d7feecaf492 100644
--- a/drivers/serial/icom.c
+++ b/drivers/serial/icom.c
@@ -617,7 +617,7 @@ static void shutdown(struct icom_port *icom_port)
         * disable break condition
         */
        cmdReg = readb(&icom_port->dram->CmdReg);
-        if ((cmdReg | CMD_SND_BREAK) == CMD_SND_BREAK) {
+        if (cmdReg & CMD_SND_BREAK) {
                writeb(cmdReg & ~CMD_SND_BREAK, &icom_port->dram->CmdReg);
        }
 }
@@ -627,7 +627,7 @@ static int icom_write(struct uart_port *port)
        unsigned long data_count;
        unsigned char cmdReg;
        unsigned long offset;
-        int temp_tail = port->info->xmit.tail;
+        int temp_tail = port->state->xmit.tail;
        trace(ICOM_PORT, "WRITE", 0);
@@ -638,11 +638,11 @@ static int icom_write(struct uart_port *port)
        }
        data_count = 0;
-        while ((port->info->xmit.head != temp_tail) &&
+        while ((port->state->xmit.head != temp_tail) &&
               (data_count <= XMIT_BUFF_SZ)) {
                ICOM_PORT->xmit_buf[data_count++] =
-                    port->info->xmit.buf[temp_tail];
+                    port->state->xmit.buf[temp_tail];
                temp_tail++;
                temp_tail &= (UART_XMIT_SIZE - 1);
@@ -694,8 +694,8 @@ static inline void check_modem_status(struct icom_port *icom_port)
                        uart_handle_cts_change(&icom_port->uart_port,
                                               delta_status & ICOM_CTS);
-                wake_up_interruptible(&icom_port->uart_port.info->
+                wake_up_interruptible(&icom_port->uart_port.state->
-                                      delta_msr_wait);
+                                      port.delta_msr_wait);
                old_status = status;
        }
        spin_unlock(&icom_port->uart_port.lock);
@@ -718,10 +718,10 @@ static void xmit_interrupt(u16 port_int_reg, struct icom_port *icom_port)
                icom_port->uart_port.icount.tx += count;
                for (i=0; i<count &&
-                        !uart_circ_empty(&icom_port->uart_port.info->xmit); i++) {
+                        !uart_circ_empty(&icom_port->uart_port.state->xmit); i++) {
-                        icom_port->uart_port.info->xmit.tail++;
+                        icom_port->uart_port.state->xmit.tail++;
-                        icom_port->uart_port.info->xmit.tail &=
+                        icom_port->uart_port.state->xmit.tail &=
                                (UART_XMIT_SIZE - 1);
                }
@@ -735,7 +735,7 @@ static void xmit_interrupt(u16 port_int_reg, struct icom_port *icom_port)
 static void recv_interrupt(u16 port_int_reg, struct icom_port *icom_port)
 {
        short int count, rcv_buff;
-        struct tty_struct *tty = icom_port->uart_port.info->port.tty;
+        struct tty_struct *tty = icom_port->uart_port.state->port.tty;
        unsigned short int status;
        struct uart_icount *icount;
        unsigned long offset;
diff --git a/drivers/serial/imx.c b/drivers/serial/imx.c
index 7485afd0df4c..18130f11238e 100644
--- a/drivers/serial/imx.c
+++ b/drivers/serial/imx.c
@@ -224,7 +224,7 @@ static void imx_mctrl_check(struct imx_port *sport)
        if (changed & TIOCM_CTS)
                uart_handle_cts_change(&sport->port, status & TIOCM_CTS);
-        wake_up_interruptible(&sport->port.info->delta_msr_wait);
+        wake_up_interruptible(&sport->port.state->port.delta_msr_wait);
 }
 /*
@@ -236,7 +236,7 @@ static void imx_timeout(unsigned long data)
        struct imx_port *sport = (struct imx_port *)data;
        unsigned long flags;
-        if (sport->port.info) {
+        if (sport->port.state) {
                spin_lock_irqsave(&sport->port.lock, flags);
                imx_mctrl_check(sport);
                spin_unlock_irqrestore(&sport->port.lock, flags);
@@ -323,7 +323,7 @@ static void imx_enable_ms(struct uart_port *port)
 static inline void imx_transmit_buffer(struct imx_port *sport)
 {
-        struct circ_buf *xmit = &sport->port.info->xmit;
+        struct circ_buf *xmit = &sport->port.state->xmit;
        while (!(readl(sport->port.membase + UTS) & UTS_TXFULL)) {
                /* send xmit->buf[xmit->tail]
@@ -388,7 +388,7 @@ static irqreturn_t imx_rtsint(int irq, void *dev_id)
        writel(USR1_RTSD, sport->port.membase + USR1);
        uart_handle_cts_change(&sport->port, !!val);
-        wake_up_interruptible(&sport->port.info->delta_msr_wait);
+        wake_up_interruptible(&sport->port.state->port.delta_msr_wait);
        spin_unlock_irqrestore(&sport->port.lock, flags);
        return IRQ_HANDLED;
@@ -397,7 +397,7 @@ static irqreturn_t imx_rtsint(int irq, void *dev_id)
 static irqreturn_t imx_txint(int irq, void *dev_id)
 {
        struct imx_port *sport = dev_id;
-        struct circ_buf *xmit = &sport->port.info->xmit;
+        struct circ_buf *xmit = &sport->port.state->xmit;
        unsigned long flags;
        spin_lock_irqsave(&sport->port.lock,flags);
@@ -427,7 +427,7 @@ static irqreturn_t imx_rxint(int irq, void *dev_id)
 {
        struct imx_port *sport = dev_id;
        unsigned int rx,flg,ignored = 0;
-        struct tty_struct *tty = sport->port.info->port.tty;
+        struct tty_struct *tty = sport->port.state->port.tty;
        unsigned long flags, temp;
        spin_lock_irqsave(&sport->port.lock,flags);
@@ -900,11 +900,11 @@ imx_set_termios(struct uart_port *port, struct ktermios *termios,
        rational_best_approximation(16 * div * baud, sport->port.uartclk,
                1 << 16, 1 << 16, &num, &denom);
-        if (port->info && port->info->port.tty) {
+        if (port->state && port->state->port.tty) {
                tdiv64 = sport->port.uartclk;
                tdiv64 *= num;
                do_div(tdiv64, denom * 16 * div);
-                tty_encode_baud_rate(sport->port.info->port.tty,
+                tty_encode_baud_rate(sport->port.state->port.tty,
                                (speed_t)tdiv64, (speed_t)tdiv64);
        }
diff --git a/drivers/serial/ioc3_serial.c b/drivers/serial/ioc3_serial.c
index ae3699d77dd0..d8983dd5c4b2 100644
--- a/drivers/serial/ioc3_serial.c
+++ b/drivers/serial/ioc3_serial.c
@@ -897,25 +897,25 @@ static void transmit_chars(struct uart_port *the_port)
        char *start;
        struct tty_struct *tty;
        struct ioc3_port *port = get_ioc3_port(the_port);
-        struct uart_info *info;
+        struct uart_state *state;
        if (!the_port)
                return;
        if (!port)
                return;
-        info = the_port->info;
+        state = the_port->state;
-        tty = info->port.tty;
+        tty = state->port.tty;
-        if (uart_circ_empty(&info->xmit) || uart_tx_stopped(the_port)) {
+        if (uart_circ_empty(&state->xmit) || uart_tx_stopped(the_port)) {
                /* Nothing to do or hw stopped */
                set_notification(port, N_ALL_OUTPUT, 0);
                return;
        }
-        head = info->xmit.head;
+        head = state->xmit.head;
-        tail = info->xmit.tail;
+        tail = state->xmit.tail;
-        start = (char *)&info->xmit.buf[tail];
+        start = (char *)&state->xmit.buf[tail];
        /* write out all the data or until the end of the buffer */
        xmit_count = (head < tail) ? (UART_XMIT_SIZE - tail) : (head - tail);
@@ -928,14 +928,14 @@ static void transmit_chars(struct uart_port *the_port)
                        /* advance the pointers */
                        tail += result;
                        tail &= UART_XMIT_SIZE - 1;
-                        info->xmit.tail = tail;
+                        state->xmit.tail = tail;
-                        start = (char *)&info->xmit.buf[tail];
+                        start = (char *)&state->xmit.buf[tail];
                }
        }
-        if (uart_circ_chars_pending(&info->xmit) < WAKEUP_CHARS)
+        if (uart_circ_chars_pending(&state->xmit) < WAKEUP_CHARS)
                uart_write_wakeup(the_port);
-        if (uart_circ_empty(&info->xmit)) {
+        if (uart_circ_empty(&state->xmit)) {
                set_notification(port, N_OUTPUT_LOWAT, 0);
        } else {
                set_notification(port, N_OUTPUT_LOWAT, 1);
@@ -956,7 +956,7 @@ ioc3_change_speed(struct uart_port *the_port,
        unsigned int cflag;
        int baud;
        int new_parity = 0, new_parity_enable = 0, new_stop = 0, new_data = 8;
-        struct uart_info *info = the_port->info;
+        struct uart_state *state = the_port->state;
        cflag = new_termios->c_cflag;
@@ -997,14 +997,14 @@ ioc3_change_speed(struct uart_port *the_port,
        the_port->ignore_status_mask = N_ALL_INPUT;
-        info->port.tty->low_latency = 1;
+        state->port.tty->low_latency = 1;
-        if (I_IGNPAR(info->port.tty))
+        if (I_IGNPAR(state->port.tty))
                the_port->ignore_status_mask &= ~(N_PARITY_ERROR
                                                  | N_FRAMING_ERROR);
-        if (I_IGNBRK(info->port.tty)) {
+        if (I_IGNBRK(state->port.tty)) {
                the_port->ignore_status_mask &= ~N_BREAK;
-                if (I_IGNPAR(info->port.tty))
+                if (I_IGNPAR(state->port.tty))
                        the_port->ignore_status_mask &= ~N_OVERRUN_ERROR;
        }
        if (!(cflag & CREAD)) {
@@ -1286,8 +1286,8 @@ static inline int do_read(struct uart_port *the_port, char *buf, int len)
                                                uart_handle_dcd_change
                                                        (port->ip_port, 0);
                                                wake_up_interruptible
-                                                    (&the_port->info->
+                                                    (&the_port->state->
-                                                     delta_msr_wait);
+                                                     port.delta_msr_wait);
                                        }
                                        /* If we had any data to return, we
@@ -1392,21 +1392,21 @@ static int receive_chars(struct uart_port *the_port)
        struct tty_struct *tty;
        unsigned char ch[MAX_CHARS];
        int read_count = 0, read_room, flip = 0;
-        struct uart_info *info = the_port->info;
+        struct uart_state *state = the_port->state;
        struct ioc3_port *port = get_ioc3_port(the_port);
        unsigned long pflags;
        /* Make sure all the pointers are "good" ones */
-        if (!info)
+        if (!state)
                return 0;
-        if (!info->port.tty)
+        if (!state->port.tty)
                return 0;
        if (!(port->ip_flags & INPUT_ENABLE))
                return 0;
        spin_lock_irqsave(&the_port->lock, pflags);
-        tty = info->port.tty;
+        tty = state->port.tty;
        read_count = do_read(the_port, ch, MAX_CHARS);
        if (read_count > 0) {
@@ -1491,7 +1491,7 @@ ioc3uart_intr_one(struct ioc3_submodule *is,
                                uart_handle_dcd_change(the_port,
                                                shadow & SHADOW_DCD);
                                wake_up_interruptible
-                                    (&the_port->info->delta_msr_wait);
+                                    (&the_port->state->port.delta_msr_wait);
                        } else if ((port->ip_notify & N_DDCD)
                                   && !(shadow & SHADOW_DCD)) {
                                /* Flag delta DCD/no DCD */
@@ -1511,7 +1511,7 @@ ioc3uart_intr_one(struct ioc3_submodule *is,
                                uart_handle_cts_change(the_port, shadow
                                                & SHADOW_CTS);
                                wake_up_interruptible
-                                    (&the_port->info->delta_msr_wait);
+                                    (&the_port->state->port.delta_msr_wait);
                        }
                }
@@ -1721,14 +1721,14 @@ static void ic3_shutdown(struct uart_port *the_port)
 {
        unsigned long port_flags;
        struct ioc3_port *port;
-        struct uart_info *info;
+        struct uart_state *state;
        port = get_ioc3_port(the_port);
        if (!port)
                return;
-        info = the_port->info;
+        state = the_port->state;
-        wake_up_interruptible(&info->delta_msr_wait);
+        wake_up_interruptible(&state->port.delta_msr_wait);
        spin_lock_irqsave(&the_port->lock, port_flags);
        set_notification(port, N_ALL, 0);
diff --git a/drivers/serial/ioc4_serial.c b/drivers/serial/ioc4_serial.c
index e5c58fe7e745..2e02c3026d24 100644
--- a/drivers/serial/ioc4_serial.c
+++ b/drivers/serial/ioc4_serial.c
@@ -1627,25 +1627,25 @@ static void transmit_chars(struct uart_port *the_port)
        char *start;
        struct tty_struct *tty;
        struct ioc4_port *port = get_ioc4_port(the_port, 0);
-        struct uart_info *info;
+        struct uart_state *state;
        if (!the_port)
                return;
        if (!port)
                return;
-        info = the_port->info;
+        state = the_port->state;
-        tty = info->port.tty;
+        tty = state->port.tty;
-        if (uart_circ_empty(&info->xmit) || uart_tx_stopped(the_port)) {
+        if (uart_circ_empty(&state->xmit) || uart_tx_stopped(the_port)) {
                /* Nothing to do or hw stopped */
                set_notification(port, N_ALL_OUTPUT, 0);
                return;
        }
-        head = info->xmit.head;
+        head = state->xmit.head;
-        tail = info->xmit.tail;
+        tail = state->xmit.tail;
-        start = (char *)&info->xmit.buf[tail];
+        start = (char *)&state->xmit.buf[tail];
        /* write out all the data or until the end of the buffer */
        xmit_count = (head < tail) ? (UART_XMIT_SIZE - tail) : (head - tail);
@@ -1658,14 +1658,14 @@ static void transmit_chars(struct uart_port *the_port)
                        /* advance the pointers */
                        tail += result;
                        tail &= UART_XMIT_SIZE - 1;
-                        info->xmit.tail = tail;
+                        state->xmit.tail = tail;
-                        start = (char *)&info->xmit.buf[tail];
+                        start = (char *)&state->xmit.buf[tail];
                }
        }
-        if (uart_circ_chars_pending(&info->xmit) < WAKEUP_CHARS)
+        if (uart_circ_chars_pending(&state->xmit) < WAKEUP_CHARS)
                uart_write_wakeup(the_port);
-        if (uart_circ_empty(&info->xmit)) {
+        if (uart_circ_empty(&state->xmit)) {
                set_notification(port, N_OUTPUT_LOWAT, 0);
        } else {
                set_notification(port, N_OUTPUT_LOWAT, 1);
@@ -1686,7 +1686,7 @@ ioc4_change_speed(struct uart_port *the_port,
        int baud, bits;
        unsigned cflag;
        int new_parity = 0, new_parity_enable = 0, new_stop = 0, new_data = 8;
-        struct uart_info *info = the_port->info;
+        struct uart_state *state = the_port->state;
        cflag = new_termios->c_cflag;
@@ -1738,14 +1738,14 @@ ioc4_change_speed(struct uart_port *the_port,
        the_port->ignore_status_mask = N_ALL_INPUT;
-        info->port.tty->low_latency = 1;
+        state->port.tty->low_latency = 1;
-        if (I_IGNPAR(info->port.tty))
+        if (I_IGNPAR(state->port.tty))
                the_port->ignore_status_mask &= ~(N_PARITY_ERROR
                                                | N_FRAMING_ERROR);
-        if (I_IGNBRK(info->port.tty)) {
+        if (I_IGNBRK(state->port.tty)) {
                the_port->ignore_status_mask &= ~N_BREAK;
-                if (I_IGNPAR(info->port.tty))
+                if (I_IGNPAR(state->port.tty))
                        the_port->ignore_status_mask &= ~N_OVERRUN_ERROR;
        }
        if (!(cflag & CREAD)) {
@@ -1784,7 +1784,7 @@ ioc4_change_speed(struct uart_port *the_port,
 static inline int ic4_startup_local(struct uart_port *the_port)
 {
        struct ioc4_port *port;
-        struct uart_info *info;
+        struct uart_state *state;
        if (!the_port)
                return -1;
@@ -1793,7 +1793,7 @@ static inline int ic4_startup_local(struct uart_port *the_port)
        if (!port)
                return -1;
-        info = the_port->info;
+        state = the_port->state;
        local_open(port);
@@ -1801,7 +1801,7 @@ static inline int ic4_startup_local(struct uart_port *the_port)
        ioc4_set_proto(port, the_port->mapbase);
        /* set the speed of the serial port */
-        ioc4_change_speed(the_port, info->port.tty->termios,
+        ioc4_change_speed(the_port, state->port.tty->termios,
                          (struct ktermios *)0);
        return 0;
@@ -1882,7 +1882,7 @@ static void handle_intr(void *arg, uint32_t sio_ir)
                                the_port = port->ip_port;
                                the_port->icount.dcd = 1;
                                wake_up_interruptible
-                                            (&the_port-> info->delta_msr_wait);
+                                            (&the_port->state->port.delta_msr_wait);
                        } else if ((port->ip_notify & N_DDCD)
                                        && !(shadow & IOC4_SHADOW_DCD)) {
                                /* Flag delta DCD/no DCD */
@@ -1904,7 +1904,7 @@ static void handle_intr(void *arg, uint32_t sio_ir)
                                the_port->icount.cts =
                                        (shadow & IOC4_SHADOW_CTS) ? 1 : 0;
                                wake_up_interruptible
-                                        (&the_port->info->delta_msr_wait);
+                                        (&the_port->state->port.delta_msr_wait);
                        }
                }
@@ -2236,8 +2236,8 @@ static inline int do_read(struct uart_port *the_port, unsigned char *buf,
                                                   && port->ip_port) {
                                                the_port->icount.dcd = 0;
                                                wake_up_interruptible
-                                                    (&the_port->info->
+                                                    (&the_port->state->
-                                                        delta_msr_wait);
+                                                        port.delta_msr_wait);
                                        }
                                        /* If we had any data to return, we
@@ -2341,17 +2341,17 @@ static void receive_chars(struct uart_port *the_port)
        unsigned char ch[IOC4_MAX_CHARS];
        int read_count, request_count = IOC4_MAX_CHARS;
        struct uart_icount *icount;
-        struct uart_info *info = the_port->info;
+        struct uart_state *state = the_port->state;
        unsigned long pflags;
        /* Make sure all the pointers are "good" ones */
-        if (!info)
+        if (!state)
                return;
-        if (!info->port.tty)
+        if (!state->port.tty)
                return;
        spin_lock_irqsave(&the_port->lock, pflags);
-        tty = info->port.tty;
+        tty = state->port.tty;
        request_count = tty_buffer_request_room(tty, IOC4_MAX_CHARS);
@@ -2430,19 +2430,19 @@ static void ic4_shutdown(struct uart_port *the_port)
 {
        unsigned long port_flags;
        struct ioc4_port *port;
-        struct uart_info *info;
+        struct uart_state *state;
        port = get_ioc4_port(the_port, 0);
        if (!port)
                return;
-        info = the_port->info;
+        state = the_port->state;
        port->ip_port = NULL;
-        wake_up_interruptible(&info->delta_msr_wait);
+        wake_up_interruptible(&state->port.delta_msr_wait);
-        if (info->port.tty)
+        if (state->port.tty)
-                set_bit(TTY_IO_ERROR, &info->port.tty->flags);
+                set_bit(TTY_IO_ERROR, &state->port.tty->flags);
        spin_lock_irqsave(&the_port->lock, port_flags);
        set_notification(port, N_ALL, 0);
@@ -2538,7 +2538,7 @@ static int ic4_startup(struct uart_port *the_port)
        int retval;
        struct ioc4_port *port;
        struct ioc4_control *control;
-        struct uart_info *info;
+        struct uart_state *state;
        unsigned long port_flags;
        if (!the_port)
@@ -2546,7 +2546,7 @@ static int ic4_startup(struct uart_port *the_port)
        port = get_ioc4_port(the_port, 1);
        if (!port)
                return -ENODEV;
-        info = the_port->info;
+        state = the_port->state;
        control = port->ip_control;
        if (!control) {
diff --git a/drivers/serial/ip22zilog.c b/drivers/serial/ip22zilog.c
index 0d9acbd0bb70..ebff4a1d4bcc 100644
--- a/drivers/serial/ip22zilog.c
+++ b/drivers/serial/ip22zilog.c
@@ -256,9 +256,9 @@ static struct tty_struct *ip22zilog_receive_chars(struct uart_ip22zilog_port *up
        unsigned int r1;
        tty = NULL;
-        if (up->port.info != NULL &&
+        if (up->port.state != NULL &&
-            up->port.info->port.tty != NULL)
+            up->port.state->port.tty != NULL)
-                tty = up->port.info->port.tty;
+                tty = up->port.state->port.tty;
        for (;;) {
                ch = readb(&channel->control);
@@ -354,7 +354,7 @@ static void ip22zilog_status_handle(struct uart_ip22zilog_port *up,
                        uart_handle_cts_change(&up->port,
                                               (status & CTS));
-                wake_up_interruptible(&up->port.info->delta_msr_wait);
+                wake_up_interruptible(&up->port.state->port.delta_msr_wait);
        }
        up->prev_status = status;
@@ -404,9 +404,9 @@ static void ip22zilog_transmit_chars(struct uart_ip22zilog_port *up,
                return;
        }
-        if (up->port.info == NULL)
+        if (up->port.state == NULL)
                goto ack_tx_int;
-        xmit = &up->port.info->xmit;
+        xmit = &up->port.state->xmit;
        if (uart_circ_empty(xmit))
                goto ack_tx_int;
        if (uart_tx_stopped(&up->port))
@@ -607,7 +607,7 @@ static void ip22zilog_start_tx(struct uart_port *port)
                port->icount.tx++;
                port->x_char = 0;
        } else {
-                struct circ_buf *xmit = &port->info->xmit;
+                struct circ_buf *xmit = &port->state->xmit;
                writeb(xmit->buf[xmit->tail], &channel->data);
                ZSDELAY();
diff --git a/drivers/serial/jsm/jsm_neo.c b/drivers/serial/jsm/jsm_neo.c
index 9dadaa11d266..b4b124e4828f 100644
--- a/drivers/serial/jsm/jsm_neo.c
+++ b/drivers/serial/jsm/jsm_neo.c
@@ -989,7 +989,7 @@ static void neo_param(struct jsm_channel *ch)
                        {     50, B50     },
                };
-                cflag = C_BAUD(ch->uart_port.info->port.tty);
+                cflag = C_BAUD(ch->uart_port.state->port.tty);
                baud = 9600;
                for (i = 0; i < ARRAY_SIZE(baud_rates); i++) {
                        if (baud_rates[i].cflag == cflag) {
diff --git a/drivers/serial/jsm/jsm_tty.c b/drivers/serial/jsm/jsm_tty.c
index 00f4577d2f7f..7439c0373620 100644
--- a/drivers/serial/jsm/jsm_tty.c
+++ b/drivers/serial/jsm/jsm_tty.c
@@ -147,7 +147,7 @@ static void jsm_tty_send_xchar(struct uart_port *port, char ch)
        struct ktermios *termios;
        spin_lock_irqsave(&port->lock, lock_flags);
-        termios = port->info->port.tty->termios;
+        termios = port->state->port.tty->termios;
        if (ch == termios->c_cc[VSTART])
                channel->ch_bd->bd_ops->send_start_character(channel);
@@ -245,7 +245,7 @@ static int jsm_tty_open(struct uart_port *port)
        channel->ch_cached_lsr = 0;
        channel->ch_stops_sent = 0;
-        termios = port->info->port.tty->termios;
+        termios = port->state->port.tty->termios;
        channel->ch_c_cflag     = termios->c_cflag;
        channel->ch_c_iflag     = termios->c_iflag;
        channel->ch_c_oflag     = termios->c_oflag;
@@ -278,7 +278,7 @@ static void jsm_tty_close(struct uart_port *port)
        jsm_printk(CLOSE, INFO, &channel->ch_bd->pci_dev, "start\n");
        bd = channel->ch_bd;
-        ts = port->info->port.tty->termios;
+        ts = port->state->port.tty->termios;
        channel->ch_flags &= ~(CH_STOPI);
@@ -530,7 +530,7 @@ void jsm_input(struct jsm_channel *ch)
        if (!ch)
                return;
-        tp = ch->uart_port.info->port.tty;
+        tp = ch->uart_port.state->port.tty;
        bd = ch->ch_bd;
        if(!bd)
@@ -849,7 +849,7 @@ int jsm_tty_write(struct uart_port *port)
        u16 tail;
        u16 tmask;
        u32 remain;
-        int temp_tail = port->info->xmit.tail;
+        int temp_tail = port->state->xmit.tail;
        struct jsm_channel *channel = (struct jsm_channel *)port;
        tmask = WQUEUEMASK;
@@ -865,10 +865,10 @@ int jsm_tty_write(struct uart_port *port)
        data_count = 0;
        if (bufcount >= remain) {
                bufcount -= remain;
-                while ((port->info->xmit.head != temp_tail) &&
+                while ((port->state->xmit.head != temp_tail) &&
                (data_count < remain)) {
                        channel->ch_wqueue[head++] =
-                        port->info->xmit.buf[temp_tail];
+                        port->state->xmit.buf[temp_tail];
                        temp_tail++;
                        temp_tail &= (UART_XMIT_SIZE - 1);
@@ -880,10 +880,10 @@ int jsm_tty_write(struct uart_port *port)
        data_count1 = 0;
        if (bufcount > 0) {
                remain = bufcount;
-                while ((port->info->xmit.head != temp_tail) &&
+                while ((port->state->xmit.head != temp_tail) &&
                        (data_count1 < remain)) {
                        channel->ch_wqueue[head++] =
-                                port->info->xmit.buf[temp_tail];
+                                port->state->xmit.buf[temp_tail];
                        temp_tail++;
                        temp_tail &= (UART_XMIT_SIZE - 1);
@@ -892,7 +892,7 @@ int jsm_tty_write(struct uart_port *port)
                }
        }
-        port->info->xmit.tail = temp_tail;
+        port->state->xmit.tail = temp_tail;
        data_count += data_count1;
        if (data_count) {
diff --git a/drivers/serial/m32r_sio.c b/drivers/serial/m32r_sio.c
index 611c97a15654..bea5c215460c 100644
--- a/drivers/serial/m32r_sio.c
+++ b/drivers/serial/m32r_sio.c
@@ -286,7 +286,7 @@ static void m32r_sio_start_tx(struct uart_port *port)
 {
 #ifdef CONFIG_SERIAL_M32R_PLDSIO
        struct uart_sio_port *up = (struct uart_sio_port *)port;
-        struct circ_buf *xmit = &up->port.info->xmit;
+        struct circ_buf *xmit = &up->port.state->xmit;
        if (!(up->ier & UART_IER_THRI)) {
                up->ier |= UART_IER_THRI;
@@ -325,7 +325,7 @@ static void m32r_sio_enable_ms(struct uart_port *port)
 static void receive_chars(struct uart_sio_port *up, int *status)
 {
-        struct tty_struct *tty = up->port.info->port.tty;
+        struct tty_struct *tty = up->port.state->port.tty;
        unsigned char ch;
        unsigned char flag;
        int max_count = 256;
@@ -398,7 +398,7 @@ static void receive_chars(struct uart_sio_port *up, int *status)
 static void transmit_chars(struct uart_sio_port *up)
 {
-        struct circ_buf *xmit = &up->port.info->xmit;
+        struct circ_buf *xmit = &up->port.state->xmit;
        int count;
        if (up->port.x_char) {
diff --git a/drivers/serial/max3100.c b/drivers/serial/max3100.c
index 9fd33e5622bd..75ab00631c41 100644
--- a/drivers/serial/max3100.c
+++ b/drivers/serial/max3100.c
@@ -184,7 +184,7 @@ static void max3100_timeout(unsigned long data)
 {
        struct max3100_port *s = (struct max3100_port *)data;
-        if (s->port.info) {
+        if (s->port.state) {
                max3100_dowork(s);
                mod_timer(&s->timer, jiffies + s->poll_time);
        }
@@ -261,7 +261,7 @@ static void max3100_work(struct work_struct *w)
        int rxchars;
        u16 tx, rx;
        int conf, cconf, rts, crts;
-        struct circ_buf *xmit = &s->port.info->xmit;
+        struct circ_buf *xmit = &s->port.state->xmit;
        dev_dbg(&s->spi->dev, "%s\n", __func__);
@@ -307,8 +307,8 @@ static void max3100_work(struct work_struct *w)
                        }
                }
-                if (rxchars > 16 && s->port.info->port.tty != NULL) {
+                if (rxchars > 16 && s->port.state->port.tty != NULL) {
-                        tty_flip_buffer_push(s->port.info->port.tty);
+                        tty_flip_buffer_push(s->port.state->port.tty);
                        rxchars = 0;
                }
                if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
@@ -320,8 +320,8 @@ static void max3100_work(struct work_struct *w)
                  (!uart_circ_empty(xmit) &&
                   !uart_tx_stopped(&s->port))));
-        if (rxchars > 0 && s->port.info->port.tty != NULL)
+        if (rxchars > 0 && s->port.state->port.tty != NULL)
-                tty_flip_buffer_push(s->port.info->port.tty);
+                tty_flip_buffer_push(s->port.state->port.tty);
 }
 static irqreturn_t max3100_irq(int irqno, void *dev_id)
@@ -429,7 +429,7 @@ max3100_set_termios(struct uart_port *port, struct ktermios *termios,
        int baud = 0;
        unsigned cflag;
        u32 param_new, param_mask, parity = 0;
-        struct tty_struct *tty = s->port.info->port.tty;
+        struct tty_struct *tty = s->port.state->port.tty;
        dev_dbg(&s->spi->dev, "%s\n", __func__);
        if (!tty)
@@ -529,7 +529,7 @@ max3100_set_termios(struct uart_port *port, struct ktermios *termios,
                        MAX3100_STATUS_OE;
        /* we are sending char from a workqueue so enable */
-        s->port.info->port.tty->low_latency = 1;
+        s->port.state->port.tty->low_latency = 1;
        if (s->poll_time > 0)
                del_timer_sync(&s->timer);
diff --git a/drivers/serial/mcf.c b/drivers/serial/mcf.c
index 0eefb07bebaf..b44382442bf1 100644
--- a/drivers/serial/mcf.c
+++ b/drivers/serial/mcf.c
@@ -323,7 +323,7 @@ static void mcf_rx_chars(struct mcf_uart *pp)
                uart_insert_char(port, status, MCFUART_USR_RXOVERRUN, ch, flag);
        }
-        tty_flip_buffer_push(port->info->port.tty);
+        tty_flip_buffer_push(port->state->port.tty);
 }
 /****************************************************************************/
@@ -331,7 +331,7 @@ static void mcf_rx_chars(struct mcf_uart *pp)
 static void mcf_tx_chars(struct mcf_uart *pp)
 {
        struct uart_port *port = &pp->port;
-        struct circ_buf *xmit = &port->info->xmit;
+        struct circ_buf *xmit = &port->state->xmit;
        if (port->x_char) {
                /* Send special char - probably flow control */
diff --git a/drivers/serial/mpc52xx_uart.c b/drivers/serial/mpc52xx_uart.c
index abbd146c50d9..d7bcd074d383 100644
--- a/drivers/serial/mpc52xx_uart.c
+++ b/drivers/serial/mpc52xx_uart.c
@@ -745,7 +745,7 @@ static struct uart_ops mpc52xx_uart_ops = {
 static inline int
 mpc52xx_uart_int_rx_chars(struct uart_port *port)
 {
-        struct tty_struct *tty = port->info->port.tty;
+        struct tty_struct *tty = port->state->port.tty;
        unsigned char ch, flag;
        unsigned short status;
@@ -812,7 +812,7 @@ mpc52xx_uart_int_rx_chars(struct uart_port *port)
 static inline int
 mpc52xx_uart_int_tx_chars(struct uart_port *port)
 {
-        struct circ_buf *xmit = &port->info->xmit;
+        struct circ_buf *xmit = &port->state->xmit;
        /* Process out of band chars */
        if (port->x_char) {
diff --git a/drivers/serial/mpsc.c b/drivers/serial/mpsc.c
index 61d3ade5286c..b5496c28e60b 100644
--- a/drivers/serial/mpsc.c
+++ b/drivers/serial/mpsc.c
@@ -936,7 +936,7 @@ static int serial_polled;
 static int mpsc_rx_intr(struct mpsc_port_info *pi)
 {
        struct mpsc_rx_desc *rxre;
-        struct tty_struct *tty = pi->port.info->port.tty;
+        struct tty_struct *tty = pi->port.state->port.tty;
        u32     cmdstat, bytes_in, i;
        int     rc = 0;
        u8      *bp;
@@ -1109,7 +1109,7 @@ static void mpsc_setup_tx_desc(struct mpsc_port_info *pi, u32 count, u32 intr)
 static void mpsc_copy_tx_data(struct mpsc_port_info *pi)
 {
-        struct circ_buf *xmit = &pi->port.info->xmit;
+        struct circ_buf *xmit = &pi->port.state->xmit;
        u8 *bp;
        u32 i;
diff --git a/drivers/serial/msm_serial.c b/drivers/serial/msm_serial.c
index f7c24baa1416..b05c5aa02cb4 100644
--- a/drivers/serial/msm_serial.c
+++ b/drivers/serial/msm_serial.c
@@ -88,7 +88,7 @@ static void msm_enable_ms(struct uart_port *port)
 static void handle_rx(struct uart_port *port)
 {
-        struct tty_struct *tty = port->info->port.tty;
+        struct tty_struct *tty = port->state->port.tty;
        unsigned int sr;
        /*
@@ -136,7 +136,7 @@ static void handle_rx(struct uart_port *port)
 static void handle_tx(struct uart_port *port)
 {
-        struct circ_buf *xmit = &port->info->xmit;
+        struct circ_buf *xmit = &port->state->xmit;
        struct msm_port *msm_port = UART_TO_MSM(port);
        int sent_tx;
@@ -169,7 +169,7 @@ static void handle_delta_cts(struct uart_port *port)
 {
        msm_write(port, UART_CR_CMD_RESET_CTS, UART_CR);
        port->icount.cts++;
-        wake_up_interruptible(&port->info->delta_msr_wait);
+        wake_up_interruptible(&port->state->port.delta_msr_wait);
 }
 static irqreturn_t msm_irq(int irq, void *dev_id)
diff --git a/drivers/serial/mux.c b/drivers/serial/mux.c
index 953a5ffa9b44..7571aaa138b0 100644
--- a/drivers/serial/mux.c
+++ b/drivers/serial/mux.c
@@ -199,7 +199,7 @@ static void mux_break_ctl(struct uart_port *port, int break_state)
 static void mux_write(struct uart_port *port)
 {
        int count;
-        struct circ_buf *xmit = &port->info->xmit;
+        struct circ_buf *xmit = &port->state->xmit;
        if(port->x_char) {
                UART_PUT_CHAR(port, port->x_char);
@@ -243,7 +243,7 @@ static void mux_write(struct uart_port *port)
 static void mux_read(struct uart_port *port)
 {
        int data;
-        struct tty_struct *tty = port->info->port.tty;
+        struct tty_struct *tty = port->state->port.tty;
        __u32 start_count = port->icount.rx;
        while(1) {
diff --git a/drivers/serial/netx-serial.c b/drivers/serial/netx-serial.c
index 3e5dda8518b7..7735c9f35fa0 100644
--- a/drivers/serial/netx-serial.c
+++ b/drivers/serial/netx-serial.c
@@ -140,7 +140,7 @@ static void netx_enable_ms(struct uart_port *port)
 static inline void netx_transmit_buffer(struct uart_port *port)
 {
-        struct circ_buf *xmit = &port->info->xmit;
+        struct circ_buf *xmit = &port->state->xmit;
        if (port->x_char) {
                writel(port->x_char, port->membase + UART_DR);
@@ -185,7 +185,7 @@ static unsigned int netx_tx_empty(struct uart_port *port)
 static void netx_txint(struct uart_port *port)
 {
-        struct circ_buf *xmit = &port->info->xmit;
+        struct circ_buf *xmit = &port->state->xmit;
        if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
                netx_stop_tx(port);
@@ -201,7 +201,7 @@ static void netx_txint(struct uart_port *port)
 static void netx_rxint(struct uart_port *port)
 {
        unsigned char rx, flg, status;
-        struct tty_struct *tty = port->info->port.tty;
+        struct tty_struct *tty = port->state->port.tty;
        while (!(readl(port->membase + UART_FR) & FR_RXFE)) {
                rx = readl(port->membase + UART_DR);
diff --git a/drivers/serial/nwpserial.c b/drivers/serial/nwpserial.c
index 9e150b19d726..e1ab8ec0a4a6 100644
--- a/drivers/serial/nwpserial.c
+++ b/drivers/serial/nwpserial.c
@@ -126,7 +126,7 @@ static void nwpserial_config_port(struct uart_port *port, int flags)
 static irqreturn_t nwpserial_interrupt(int irq, void *dev_id)
 {
        struct nwpserial_port *up = dev_id;
-        struct tty_struct *tty = up->port.info->port.tty;
+        struct tty_struct *tty = up->port.state->port.tty;
        irqreturn_t ret;
        unsigned int iir;
        unsigned char ch;
@@ -261,7 +261,7 @@ static void nwpserial_start_tx(struct uart_port *port)
        struct nwpserial_port *up;
        struct circ_buf *xmit;
        up = container_of(port, struct nwpserial_port, port);
-        xmit  = &up->port.info->xmit;
+        xmit  = &up->port.state->xmit;
        if (port->x_char) {
                nwpserial_putchar(up, up->port.x_char);
diff --git a/drivers/serial/pmac_zilog.c b/drivers/serial/pmac_zilog.c
index 9c1243fbd512..0700cd10b97c 100644
--- a/drivers/serial/pmac_zilog.c
+++ b/drivers/serial/pmac_zilog.c
@@ -242,12 +242,12 @@ static struct tty_struct *pmz_receive_chars(struct uart_pmac_port *uap)
        }
        /* Sanity check, make sure the old bug is no longer happening */
-        if (uap->port.info == NULL || uap->port.info->port.tty == NULL) {
+        if (uap->port.state == NULL || uap->port.state->port.tty == NULL) {
                WARN_ON(1);
                (void)read_zsdata(uap);
                return NULL;
        }
-        tty = uap->port.info->port.tty;
+        tty = uap->port.state->port.tty;
        while (1) {
                error = 0;
@@ -369,7 +369,7 @@ static void pmz_status_handle(struct uart_pmac_port *uap)
                        uart_handle_cts_change(&uap->port,
                                               !(status & CTS));
-                wake_up_interruptible(&uap->port.info->delta_msr_wait);
+                wake_up_interruptible(&uap->port.state->port.delta_msr_wait);
        }
        if (status & BRK_ABRT)
@@ -420,9 +420,9 @@ static void pmz_transmit_chars(struct uart_pmac_port *uap)
                return;
        }
-        if (uap->port.info == NULL)
+        if (uap->port.state == NULL)
                goto ack_tx_int;
-        xmit = &uap->port.info->xmit;
+        xmit = &uap->port.state->xmit;
        if (uart_circ_empty(xmit)) {
                uart_write_wakeup(&uap->port);
                goto ack_tx_int;
@@ -655,7 +655,7 @@ static void pmz_start_tx(struct uart_port *port)
                port->icount.tx++;
                port->x_char = 0;
        } else {
-                struct circ_buf *xmit = &port->info->xmit;
+                struct circ_buf *xmit = &port->state->xmit;
                write_zsdata(uap, xmit->buf[xmit->tail]);
                zssync(uap);
@@ -1645,7 +1645,7 @@ static int pmz_suspend(struct macio_dev *mdev, pm_message_t pm_state)
        state = pmz_uart_reg.state + uap->port.line;
        mutex_lock(&pmz_irq_mutex);
-        mutex_lock(&state->mutex);
+        mutex_lock(&state->port.mutex);
        spin_lock_irqsave(&uap->port.lock, flags);
@@ -1676,7 +1676,7 @@ static int pmz_suspend(struct macio_dev *mdev, pm_message_t pm_state)
        /* Shut the chip down */
        pmz_set_scc_power(uap, 0);
-        mutex_unlock(&state->mutex);
+        mutex_unlock(&state->port.mutex);
        mutex_unlock(&pmz_irq_mutex);
        pmz_debug("suspend, switching complete\n");
@@ -1705,7 +1705,7 @@ static int pmz_resume(struct macio_dev *mdev)
        state = pmz_uart_reg.state + uap->port.line;
        mutex_lock(&pmz_irq_mutex);
-        mutex_lock(&state->mutex);
+        mutex_lock(&state->port.mutex);
        spin_lock_irqsave(&uap->port.lock, flags);
        if (!ZS_IS_OPEN(uap) && !ZS_IS_CONS(uap)) {
@@ -1737,7 +1737,7 @@ static int pmz_resume(struct macio_dev *mdev)
        }
 bail:
-        mutex_unlock(&state->mutex);
+        mutex_unlock(&state->port.mutex);
        mutex_unlock(&pmz_irq_mutex);
        /* Right now, we deal with delay by blocking here, I'll be
diff --git a/drivers/serial/pnx8xxx_uart.c b/drivers/serial/pnx8xxx_uart.c
index 1bb8f1b45767..0aa75a97531c 100644
--- a/drivers/serial/pnx8xxx_uart.c
+++ b/drivers/serial/pnx8xxx_uart.c
@@ -100,7 +100,7 @@ static void pnx8xxx_mctrl_check(struct pnx8xxx_port *sport)
        if (changed & TIOCM_CTS)
                uart_handle_cts_change(&sport->port, status & TIOCM_CTS);
-        wake_up_interruptible(&sport->port.info->delta_msr_wait);
+        wake_up_interruptible(&sport->port.state->port.delta_msr_wait);
 }
 /*
@@ -112,7 +112,7 @@ static void pnx8xxx_timeout(unsigned long data)
        struct pnx8xxx_port *sport = (struct pnx8xxx_port *)data;
        unsigned long flags;
-        if (sport->port.info) {
+        if (sport->port.state) {
                spin_lock_irqsave(&sport->port.lock, flags);
                pnx8xxx_mctrl_check(sport);
                spin_unlock_irqrestore(&sport->port.lock, flags);
@@ -181,7 +181,7 @@ static void pnx8xxx_enable_ms(struct uart_port *port)
 static void pnx8xxx_rx_chars(struct pnx8xxx_port *sport)
 {
-        struct tty_struct *tty = sport->port.info->port.tty;
+        struct tty_struct *tty = sport->port.state->port.tty;
        unsigned int status, ch, flg;
        status = FIFO_TO_SM(serial_in(sport, PNX8XXX_FIFO)) |
@@ -243,7 +243,7 @@ static void pnx8xxx_rx_chars(struct pnx8xxx_port *sport)
 static void pnx8xxx_tx_chars(struct pnx8xxx_port *sport)
 {
-        struct circ_buf *xmit = &sport->port.info->xmit;
+        struct circ_buf *xmit = &sport->port.state->xmit;
        if (sport->port.x_char) {
                serial_out(sport, PNX8XXX_FIFO, sport->port.x_char);
diff --git a/drivers/serial/pxa.c b/drivers/serial/pxa.c
index a48a8a13d87b..6443b7ff274a 100644
--- a/drivers/serial/pxa.c
+++ b/drivers/serial/pxa.c
@@ -96,7 +96,7 @@ static void serial_pxa_stop_rx(struct uart_port *port)
 static inline void receive_chars(struct uart_pxa_port *up, int *status)
 {
-        struct tty_struct *tty = up->port.info->port.tty;
+        struct tty_struct *tty = up->port.state->port.tty;
        unsigned int ch, flag;
        int max_count = 256;
@@ -161,7 +161,7 @@ static inline void receive_chars(struct uart_pxa_port *up, int *status)
 static void transmit_chars(struct uart_pxa_port *up)
 {
-        struct circ_buf *xmit = &up->port.info->xmit;
+        struct circ_buf *xmit = &up->port.state->xmit;
        int count;
        if (up->port.x_char) {
@@ -220,7 +220,7 @@ static inline void check_modem_status(struct uart_pxa_port *up)
        if (status & UART_MSR_DCTS)
                uart_handle_cts_change(&up->port, status & UART_MSR_CTS);
-        wake_up_interruptible(&up->port.info->delta_msr_wait);
+        wake_up_interruptible(&up->port.state->port.delta_msr_wait);
 }
 /*
diff --git a/drivers/serial/sa1100.c b/drivers/serial/sa1100.c
index 94530f01521e..7f5e26873220 100644
--- a/drivers/serial/sa1100.c
+++ b/drivers/serial/sa1100.c
@@ -117,7 +117,7 @@ static void sa1100_mctrl_check(struct sa1100_port *sport)
        if (changed & TIOCM_CTS)
                uart_handle_cts_change(&sport->port, status & TIOCM_CTS);
-        wake_up_interruptible(&sport->port.info->delta_msr_wait);
+        wake_up_interruptible(&sport->port.state->port.delta_msr_wait);
 }
 /*
@@ -129,7 +129,7 @@ static void sa1100_timeout(unsigned long data)
        struct sa1100_port *sport = (struct sa1100_port *)data;
        unsigned long flags;
-        if (sport->port.info) {
+        if (sport->port.state) {
                spin_lock_irqsave(&sport->port.lock, flags);
                sa1100_mctrl_check(sport);
                spin_unlock_irqrestore(&sport->port.lock, flags);
@@ -189,7 +189,7 @@ static void sa1100_enable_ms(struct uart_port *port)
 static void
 sa1100_rx_chars(struct sa1100_port *sport)
 {
-        struct tty_struct *tty = sport->port.info->port.tty;
+        struct tty_struct *tty = sport->port.state->port.tty;
        unsigned int status, ch, flg;
        status = UTSR1_TO_SM(UART_GET_UTSR1(sport)) |
@@ -239,7 +239,7 @@ sa1100_rx_chars(struct sa1100_port *sport)
 static void sa1100_tx_chars(struct sa1100_port *sport)
 {
-        struct circ_buf *xmit = &sport->port.info->xmit;
+        struct circ_buf *xmit = &sport->port.state->xmit;
        if (sport->port.x_char) {
                UART_PUT_CHAR(sport, sport->port.x_char);
diff --git a/drivers/serial/samsung.c b/drivers/serial/samsung.c
index c8851a0db63a..1523e8d9ae77 100644
--- a/drivers/serial/samsung.c
+++ b/drivers/serial/samsung.c
@@ -196,7 +196,7 @@ s3c24xx_serial_rx_chars(int irq, void *dev_id)
 {
        struct s3c24xx_uart_port *ourport = dev_id;
        struct uart_port *port = &ourport->port;
-        struct tty_struct *tty = port->info->port.tty;
+        struct tty_struct *tty = port->state->port.tty;
        unsigned int ufcon, ch, flag, ufstat, uerstat;
        int max_count = 64;
@@ -281,7 +281,7 @@ static irqreturn_t s3c24xx_serial_tx_chars(int irq, void *id)
 {
        struct s3c24xx_uart_port *ourport = id;
        struct uart_port *port = &ourport->port;
-        struct circ_buf *xmit = &port->info->xmit;
+        struct circ_buf *xmit = &port->state->xmit;
        int count = 256;
        if (port->x_char) {
@@ -992,10 +992,10 @@ static int s3c24xx_serial_cpufreq_transition(struct notifier_block *nb,
                struct ktermios *termios;
                struct tty_struct *tty;
-                if (uport->info == NULL)
+                if (uport->state == NULL)
                        goto exit;
-                tty = uport->info->port.tty;
+                tty = uport->state->port.tty;
                if (tty == NULL)
                        goto exit;
diff --git a/drivers/serial/sb1250-duart.c b/drivers/serial/sb1250-duart.c
index 319e8b83f6be..a2f2b3254499 100644
--- a/drivers/serial/sb1250-duart.c
+++ b/drivers/serial/sb1250-duart.c
@@ -384,13 +384,13 @@ static void sbd_receive_chars(struct sbd_port *sport)
                uart_insert_char(uport, status, M_DUART_OVRUN_ERR, ch, flag);
        }
-        tty_flip_buffer_push(uport->info->port.tty);
+        tty_flip_buffer_push(uport->state->port.tty);
 }
 static void sbd_transmit_chars(struct sbd_port *sport)
 {
        struct uart_port *uport = &sport->port;
-        struct circ_buf *xmit = &sport->port.info->xmit;
+        struct circ_buf *xmit = &sport->port.state->xmit;
        unsigned int mask;
        int stop_tx;
@@ -440,7 +440,7 @@ static void sbd_status_handle(struct sbd_port *sport)
        if (delta & ((M_DUART_IN_PIN2_VAL | M_DUART_IN_PIN0_VAL) <<
                     S_DUART_IN_PIN_CHNG))
-                wake_up_interruptible(&uport->info->delta_msr_wait);
+                wake_up_interruptible(&uport->state->port.delta_msr_wait);
 }
 static irqreturn_t sbd_interrupt(int irq, void *dev_id)
diff --git a/drivers/serial/sc26xx.c b/drivers/serial/sc26xx.c
index e0be11ceaa25..75038ad2b242 100644
--- a/drivers/serial/sc26xx.c
+++ b/drivers/serial/sc26xx.c
@@ -140,8 +140,8 @@ static struct tty_struct *receive_chars(struct uart_port *port)
        char flag;
        u8 status;
-        if (port->info != NULL)         /* Unopened serial console */
+        if (port->state != NULL)                /* Unopened serial console */
-                tty = port->info->port.tty;
+                tty = port->state->port.tty;
        while (limit-- > 0) {
                status = READ_SC_PORT(port, SR);
@@ -190,10 +190,10 @@ static void transmit_chars(struct uart_port *port)
 {
        struct circ_buf *xmit;
-        if (!port->info)
+        if (!port->state)
                return;
-        xmit = &port->info->xmit;
+        xmit = &port->state->xmit;
        if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
                sc26xx_disable_irq(port, IMR_TXRDY);
                return;
@@ -316,7 +316,7 @@ static void sc26xx_stop_tx(struct uart_port *port)
 /* port->lock held by caller.  */
 static void sc26xx_start_tx(struct uart_port *port)
 {
-        struct circ_buf *xmit = &port->info->xmit;
+        struct circ_buf *xmit = &port->state->xmit;
        while (!uart_circ_empty(xmit)) {
                if (!(READ_SC_PORT(port, SR) & SR_TXRDY)) {
diff --git a/drivers/serial/serial_core.c b/drivers/serial/serial_core.c
index b0bb29d804ae..2514d00c0f6f 100644
--- a/drivers/serial/serial_core.c
+++ b/drivers/serial/serial_core.c
@@ -29,10 +29,10 @@
 #include <linux/console.h>
 #include <linux/proc_fs.h>
 #include <linux/seq_file.h>
-#include <linux/serial_core.h>
 #include <linux/smp_lock.h>
 #include <linux/device.h>
 #include <linux/serial.h> /* for serial_state and serial_icounter_struct */
+#include <linux/serial_core.h>
 #include <linux/delay.h>
 #include <linux/mutex.h>
@@ -52,8 +52,6 @@ static struct lock_class_key port_lock_key;
 #define HIGH_BITS_OFFSET        ((sizeof(long)-sizeof(int))*8)
-#define uart_users(state)       ((state)->count + (state)->info.port.blocked_open)
 #ifdef CONFIG_SERIAL_CORE_CONSOLE
 #define uart_console(port)      ((port)->cons && (port)->cons->index == (port)->line)
 #else
@@ -71,19 +69,19 @@ static void uart_change_pm(struct uart_state *state, int pm_state);
 */
 void uart_write_wakeup(struct uart_port *port)
 {
-        struct uart_info *info = port->info;
+        struct uart_state *state = port->state;
        /*
         * This means you called this function _after_ the port was
         * closed.  No cookie for you.
         */
-        BUG_ON(!info);
+        BUG_ON(!state);
-        tasklet_schedule(&info->tlet);
+        tasklet_schedule(&state->tlet);
 }
 static void uart_stop(struct tty_struct *tty)
 {
        struct uart_state *state = tty->driver_data;
-        struct uart_port *port = state->port;
+        struct uart_port *port = state->uart_port;
        unsigned long flags;
        spin_lock_irqsave(&port->lock, flags);
@@ -94,9 +92,9 @@ static void uart_stop(struct tty_struct *tty)
 static void __uart_start(struct tty_struct *tty)
 {
        struct uart_state *state = tty->driver_data;
-        struct uart_port *port = state->port;
+        struct uart_port *port = state->uart_port;
-        if (!uart_circ_empty(&state->info.xmit) && state->info.xmit.buf &&
+        if (!uart_circ_empty(&state->xmit) && state->xmit.buf &&
            !tty->stopped && !tty->hw_stopped)
                port->ops->start_tx(port);
 }
@@ -104,7 +102,7 @@ static void __uart_start(struct tty_struct *tty)
 static void uart_start(struct tty_struct *tty)
 {
        struct uart_state *state = tty->driver_data;
-        struct uart_port *port = state->port;
+        struct uart_port *port = state->uart_port;
        unsigned long flags;
        spin_lock_irqsave(&port->lock, flags);
@@ -115,7 +113,7 @@ static void uart_start(struct tty_struct *tty)
 static void uart_tasklet_action(unsigned long data)
 {
        struct uart_state *state = (struct uart_state *)data;
-        tty_wakeup(state->info.port.tty);
+        tty_wakeup(state->port.tty);
 }
 static inline void
@@ -141,12 +139,12 @@ uart_update_mctrl(struct uart_port *port, unsigned int set, unsigned int clear)
 */
 static int uart_startup(struct uart_state *state, int init_hw)
 {
-        struct uart_info *info = &state->info;
+        struct uart_port *uport = state->uart_port;
-        struct uart_port *port = state->port;
+        struct tty_port *port = &state->port;
        unsigned long page;
        int retval = 0;
-        if (info->flags & UIF_INITIALIZED)
+        if (port->flags & ASYNC_INITIALIZED)
                return 0;
        /*
@@ -154,26 +152,26 @@ static int uart_startup(struct uart_state *state, int init_hw)
         * once we have successfully opened the port.  Also set
         * up the tty->alt_speed kludge
         */
-        set_bit(TTY_IO_ERROR, &info->port.tty->flags);
+        set_bit(TTY_IO_ERROR, &port->tty->flags);
-        if (port->type == PORT_UNKNOWN)
+        if (uport->type == PORT_UNKNOWN)
                return 0;
        /*
         * Initialise and allocate the transmit and temporary
         * buffer.
         */
-        if (!info->xmit.buf) {
+        if (!state->xmit.buf) {
                /* This is protected by the per port mutex */
                page = get_zeroed_page(GFP_KERNEL);
                if (!page)
                        return -ENOMEM;
-                info->xmit.buf = (unsigned char *) page;
+                state->xmit.buf = (unsigned char *) page;
-                uart_circ_clear(&info->xmit);
+                uart_circ_clear(&state->xmit);
        }
-        retval = port->ops->startup(port);
+        retval = uport->ops->startup(uport);
        if (retval == 0) {
                if (init_hw) {
                        /*
@@ -185,20 +183,20 @@ static int uart_startup(struct uart_state *state, int init_hw)
                         * Setup the RTS and DTR signals once the
                         * port is open and ready to respond.
                         */
-                        if (info->port.tty->termios->c_cflag & CBAUD)
+                        if (port->tty->termios->c_cflag & CBAUD)
-                                uart_set_mctrl(port, TIOCM_RTS | TIOCM_DTR);
+                                uart_set_mctrl(uport, TIOCM_RTS | TIOCM_DTR);
                }
-                if (info->flags & UIF_CTS_FLOW) {
+                if (port->flags & ASYNC_CTS_FLOW) {
-                        spin_lock_irq(&port->lock);
+                        spin_lock_irq(&uport->lock);
-                        if (!(port->ops->get_mctrl(port) & TIOCM_CTS))
+                        if (!(uport->ops->get_mctrl(uport) & TIOCM_CTS))
-                                info->port.tty->hw_stopped = 1;
+                                port->tty->hw_stopped = 1;
-                        spin_unlock_irq(&port->lock);
+                        spin_unlock_irq(&uport->lock);
                }
-                info->flags |= UIF_INITIALIZED;
+                set_bit(ASYNCB_INITIALIZED, &port->flags);
-                clear_bit(TTY_IO_ERROR, &info->port.tty->flags);
+                clear_bit(TTY_IO_ERROR, &port->tty->flags);
        }
        if (retval && capable(CAP_SYS_ADMIN))
@@ -214,9 +212,9 @@ static int uart_startup(struct uart_state *state, int init_hw)
 */
 static void uart_shutdown(struct uart_state *state)
 {
-        struct uart_info *info = &state->info;
+        struct uart_port *uport = state->uart_port;
-        struct uart_port *port = state->port;
+        struct tty_port *port = &state->port;
-        struct tty_struct *tty = info->port.tty;
+        struct tty_struct *tty = port->tty;
        /*
         * Set the TTY IO error marker
@@ -224,14 +222,12 @@ static void uart_shutdown(struct uart_state *state)
        if (tty)
                set_bit(TTY_IO_ERROR, &tty->flags);
-        if (info->flags & UIF_INITIALIZED) {
+        if (test_and_clear_bit(ASYNCB_INITIALIZED, &port->flags)) {
-                info->flags &= ~UIF_INITIALIZED;
                /*
                 * Turn off DTR and RTS early.
                 */
                if (!tty || (tty->termios->c_cflag & HUPCL))
-                        uart_clear_mctrl(port, TIOCM_DTR | TIOCM_RTS);
+                        uart_clear_mctrl(uport, TIOCM_DTR | TIOCM_RTS);
                /*
                 * clear delta_msr_wait queue to avoid mem leaks: we may free
@@ -240,30 +236,30 @@ static void uart_shutdown(struct uart_state *state)
                 * any outstanding file descriptors should be pointing at
                 * hung_up_tty_fops now.
                 */
-                wake_up_interruptible(&info->delta_msr_wait);
+                wake_up_interruptible(&port->delta_msr_wait);
                /*
                 * Free the IRQ and disable the port.
                 */
-                port->ops->shutdown(port);
+                uport->ops->shutdown(uport);
                /*
                 * Ensure that the IRQ handler isn't running on another CPU.
                 */
-                synchronize_irq(port->irq);
+                synchronize_irq(uport->irq);
        }
        /*
         * kill off our tasklet
         */
-        tasklet_kill(&info->tlet);
+        tasklet_kill(&state->tlet);
        /*
         * Free the transmit buffer page.
         */
-        if (info->xmit.buf) {
+        if (state->xmit.buf) {
-                free_page((unsigned long)info->xmit.buf);
+                free_page((unsigned long)state->xmit.buf);
-                info->xmit.buf = NULL;
+                state->xmit.buf = NULL;
        }
 }
@@ -430,15 +426,16 @@ EXPORT_SYMBOL(uart_get_divisor);
 static void
 uart_change_speed(struct uart_state *state, struct ktermios *old_termios)
 {
-        struct tty_struct *tty = state->info.port.tty;
+        struct tty_port *port = &state->port;
-        struct uart_port *port = state->port;
+        struct tty_struct *tty = port->tty;
+        struct uart_port *uport = state->uart_port;
        struct ktermios *termios;
        /*
         * If we have no tty, termios, or the port does not exist,
         * then we can't set the parameters for this port.
         */
-        if (!tty || !tty->termios || port->type == PORT_UNKNOWN)
+        if (!tty || !tty->termios || uport->type == PORT_UNKNOWN)
                return;
        termios = tty->termios;
@@ -447,16 +444,16 @@ uart_change_speed(struct uart_state *state, struct ktermios *old_termios)
         * Set flags based on termios cflag
         */
        if (termios->c_cflag & CRTSCTS)
-                state->info.flags |= UIF_CTS_FLOW;
+                set_bit(ASYNCB_CTS_FLOW, &port->flags);
        else
-                state->info.flags &= ~UIF_CTS_FLOW;
+                clear_bit(ASYNCB_CTS_FLOW, &port->flags);
        if (termios->c_cflag & CLOCAL)
-                state->info.flags &= ~UIF_CHECK_CD;
+                clear_bit(ASYNCB_CHECK_CD, &port->flags);
        else
-                state->info.flags |= UIF_CHECK_CD;
+                set_bit(ASYNCB_CHECK_CD, &port->flags);
-        port->ops->set_termios(port, termios, old_termios);
+        uport->ops->set_termios(uport, termios, old_termios);
 }
 static inline int
@@ -482,7 +479,7 @@ static int uart_put_char(struct tty_struct *tty, unsigned char ch)
 {
        struct uart_state *state = tty->driver_data;
-        return __uart_put_char(state->port, &state->info.xmit, ch);
+        return __uart_put_char(state->uart_port, &state->xmit, ch);
 }
 static void uart_flush_chars(struct tty_struct *tty)
@@ -508,8 +505,8 @@ uart_write(struct tty_struct *tty, const unsigned char *buf, int count)
                return -EL3HLT;
        }
-        port = state->port;
+        port = state->uart_port;
-        circ = &state->info.xmit;
+        circ = &state->xmit;
        if (!circ->buf)
                return 0;
@@ -539,9 +536,9 @@ static int uart_write_room(struct tty_struct *tty)
        unsigned long flags;
        int ret;
-        spin_lock_irqsave(&state->port->lock, flags);
+        spin_lock_irqsave(&state->uart_port->lock, flags);
-        ret = uart_circ_chars_free(&state->info.xmit);
+        ret = uart_circ_chars_free(&state->xmit);
-        spin_unlock_irqrestore(&state->port->lock, flags);
+        spin_unlock_irqrestore(&state->uart_port->lock, flags);
        return ret;
 }
@@ -551,9 +548,9 @@ static int uart_chars_in_buffer(struct tty_struct *tty)
        unsigned long flags;
        int ret;
-        spin_lock_irqsave(&state->port->lock, flags);
+        spin_lock_irqsave(&state->uart_port->lock, flags);
-        ret = uart_circ_chars_pending(&state->info.xmit);
+        ret = uart_circ_chars_pending(&state->xmit);
-        spin_unlock_irqrestore(&state->port->lock, flags);
+        spin_unlock_irqrestore(&state->uart_port->lock, flags);
        return ret;
 }
@@ -572,11 +569,11 @@ static void uart_flush_buffer(struct tty_struct *tty)
                return;
        }
-        port = state->port;
+        port = state->uart_port;
        pr_debug("uart_flush_buffer(%d) called\n", tty->index);
        spin_lock_irqsave(&port->lock, flags);
-        uart_circ_clear(&state->info.xmit);
+        uart_circ_clear(&state->xmit);
        if (port->ops->flush_buffer)
                port->ops->flush_buffer(port);
        spin_unlock_irqrestore(&port->lock, flags);
@@ -590,7 +587,7 @@ static void uart_flush_buffer(struct tty_struct *tty)
 static void uart_send_xchar(struct tty_struct *tty, char ch)
 {
        struct uart_state *state = tty->driver_data;
-        struct uart_port *port = state->port;
+        struct uart_port *port = state->uart_port;
        unsigned long flags;
        if (port->ops->send_xchar)
@@ -613,13 +610,13 @@ static void uart_throttle(struct tty_struct *tty)
                uart_send_xchar(tty, STOP_CHAR(tty));
        if (tty->termios->c_cflag & CRTSCTS)
-                uart_clear_mctrl(state->port, TIOCM_RTS);
+                uart_clear_mctrl(state->uart_port, TIOCM_RTS);
 }
 static void uart_unthrottle(struct tty_struct *tty)
 {
        struct uart_state *state = tty->driver_data;
-        struct uart_port *port = state->port;
+        struct uart_port *port = state->uart_port;
        if (I_IXOFF(tty)) {
                if (port->x_char)
@@ -635,35 +632,36 @@ static void uart_unthrottle(struct tty_struct *tty)
 static int uart_get_info(struct uart_state *state,
                         struct serial_struct __user *retinfo)
 {
-        struct uart_port *port = state->port;
+        struct uart_port *uport = state->uart_port;
+        struct tty_port *port = &state->port;
        struct serial_struct tmp;
        memset(&tmp, 0, sizeof(tmp));
        /* Ensure the state we copy is consistent and no hardware changes
           occur as we go */
-        mutex_lock(&state->mutex);
+        mutex_lock(&port->mutex);
-        tmp.type            = port->type;
+        tmp.type            = uport->type;
-        tmp.line            = port->line;
+        tmp.line            = uport->line;
-        tmp.port            = port->iobase;
+        tmp.port            = uport->iobase;
        if (HIGH_BITS_OFFSET)
-                tmp.port_high = (long) port->iobase >> HIGH_BITS_OFFSET;
+                tmp.port_high = (long) uport->iobase >> HIGH_BITS_OFFSET;
-        tmp.irq             = port->irq;
+        tmp.irq             = uport->irq;
-        tmp.flags           = port->flags;
+        tmp.flags           = uport->flags;
-        tmp.xmit_fifo_size  = port->fifosize;
+        tmp.xmit_fifo_size  = uport->fifosize;
-        tmp.baud_base       = port->uartclk / 16;
+        tmp.baud_base       = uport->uartclk / 16;
-        tmp.close_delay     = state->close_delay / 10;
+        tmp.close_delay     = port->close_delay / 10;
-        tmp.closing_wait    = state->closing_wait == USF_CLOSING_WAIT_NONE ?
+        tmp.closing_wait    = port->closing_wait == ASYNC_CLOSING_WAIT_NONE ?
                                ASYNC_CLOSING_WAIT_NONE :
-                                state->closing_wait / 10;
+                                port->closing_wait / 10;
-        tmp.custom_divisor  = port->custom_divisor;
+        tmp.custom_divisor  = uport->custom_divisor;
-        tmp.hub6            = port->hub6;
+        tmp.hub6            = uport->hub6;
-        tmp.io_type         = port->iotype;
+        tmp.io_type         = uport->iotype;
-        tmp.iomem_reg_shift = port->regshift;
+        tmp.iomem_reg_shift = uport->regshift;
-        tmp.iomem_base      = (void *)(unsigned long)port->mapbase;
+        tmp.iomem_base      = (void *)(unsigned long)uport->mapbase;
-        mutex_unlock(&state->mutex);
+        mutex_unlock(&port->mutex);
        if (copy_to_user(retinfo, &tmp, sizeof(*retinfo)))
                return -EFAULT;
@@ -674,7 +672,8 @@ static int uart_set_info(struct uart_state *state,
                         struct serial_struct __user *newinfo)
 {
        struct serial_struct new_serial;
-        struct uart_port *port = state->port;
+        struct uart_port *uport = state->uart_port;
+        struct tty_port *port = &state->port;
        unsigned long new_port;
        unsigned int change_irq, change_port, closing_wait;
        unsigned int old_custom_divisor, close_delay;
@@ -691,58 +690,58 @@ static int uart_set_info(struct uart_state *state,
        new_serial.irq = irq_canonicalize(new_serial.irq);
        close_delay = new_serial.close_delay * 10;
        closing_wait = new_serial.closing_wait == ASYNC_CLOSING_WAIT_NONE ?
-                        USF_CLOSING_WAIT_NONE : new_serial.closing_wait * 10;
+                        ASYNC_CLOSING_WAIT_NONE : new_serial.closing_wait * 10;
        /*
-         * This semaphore protects state->count.  It is also
+         * This semaphore protects port->count.  It is also
         * very useful to prevent opens.  Also, take the
         * port configuration semaphore to make sure that a
         * module insertion/removal doesn't change anything
         * under us.
         */
-        mutex_lock(&state->mutex);
+        mutex_lock(&port->mutex);
-        change_irq  = !(port->flags & UPF_FIXED_PORT)
+        change_irq  = !(uport->flags & UPF_FIXED_PORT)
-                && new_serial.irq != port->irq;
+                && new_serial.irq != uport->irq;
        /*
         * Since changing the 'type' of the port changes its resource
         * allocations, we should treat type changes the same as
         * IO port changes.
         */
-        change_port = !(port->flags & UPF_FIXED_PORT)
+        change_port = !(uport->flags & UPF_FIXED_PORT)
-                && (new_port != port->iobase ||
+                && (new_port != uport->iobase ||
-                    (unsigned long)new_serial.iomem_base != port->mapbase ||
+                    (unsigned long)new_serial.iomem_base != uport->mapbase ||
-                    new_serial.hub6 != port->hub6 ||
+                    new_serial.hub6 != uport->hub6 ||
-                    new_serial.io_type != port->iotype ||
+                    new_serial.io_type != uport->iotype ||
-                    new_serial.iomem_reg_shift != port->regshift ||
+                    new_serial.iomem_reg_shift != uport->regshift ||
-                    new_serial.type != port->type);
+                    new_serial.type != uport->type);
-        old_flags = port->flags;
+        old_flags = uport->flags;
        new_flags = new_serial.flags;
-        old_custom_divisor = port->custom_divisor;
+        old_custom_divisor = uport->custom_divisor;
        if (!capable(CAP_SYS_ADMIN)) {
                retval = -EPERM;
                if (change_irq || change_port ||
-                    (new_serial.baud_base != port->uartclk / 16) ||
+                    (new_serial.baud_base != uport->uartclk / 16) ||
-                    (close_delay != state->close_delay) ||
+                    (close_delay != port->close_delay) ||
-                    (closing_wait != state->closing_wait) ||
+                    (closing_wait != port->closing_wait) ||
                    (new_serial.xmit_fifo_size &&
-                     new_serial.xmit_fifo_size != port->fifosize) ||
+                     new_serial.xmit_fifo_size != uport->fifosize) ||
                    (((new_flags ^ old_flags) & ~UPF_USR_MASK) != 0))
                        goto exit;
-                port->flags = ((port->flags & ~UPF_USR_MASK) |
+                uport->flags = ((uport->flags & ~UPF_USR_MASK) |
                               (new_flags & UPF_USR_MASK));
-                port->custom_divisor = new_serial.custom_divisor;
+                uport->custom_divisor = new_serial.custom_divisor;
                goto check_and_exit;
        }
        /*
         * Ask the low level driver to verify the settings.
         */
-        if (port->ops->verify_port)
+        if (uport->ops->verify_port)
-                retval = port->ops->verify_port(port, &new_serial);
+                retval = uport->ops->verify_port(uport, &new_serial);
        if ((new_serial.irq >= nr_irqs) || (new_serial.irq < 0) ||
            (new_serial.baud_base < 9600))
@@ -757,7 +756,7 @@ static int uart_set_info(struct uart_state *state,
                /*
                 * Make sure that we are the sole user of this port.
                 */
-                if (uart_users(state) > 1)
+                if (tty_port_users(port) > 1)
                        goto exit;
                /*
@@ -771,31 +770,31 @@ static int uart_set_info(struct uart_state *state,
                unsigned long old_iobase, old_mapbase;
                unsigned int old_type, old_iotype, old_hub6, old_shift;
-                old_iobase = port->iobase;
+                old_iobase = uport->iobase;
-                old_mapbase = port->mapbase;
+                old_mapbase = uport->mapbase;
-                old_type = port->type;
+                old_type = uport->type;
-                old_hub6 = port->hub6;
+                old_hub6 = uport->hub6;
-                old_iotype = port->iotype;
+                old_iotype = uport->iotype;
-                old_shift = port->regshift;
+                old_shift = uport->regshift;
                /*
                 * Free and release old regions
                 */
                if (old_type != PORT_UNKNOWN)
-                        port->ops->release_port(port);
+                        uport->ops->release_port(uport);
-                port->iobase = new_port;
+                uport->iobase = new_port;
-                port->type = new_serial.type;
+                uport->type = new_serial.type;
-                port->hub6 = new_serial.hub6;
+                uport->hub6 = new_serial.hub6;
-                port->iotype = new_serial.io_type;
+                uport->iotype = new_serial.io_type;
-                port->regshift = new_serial.iomem_reg_shift;
+                uport->regshift = new_serial.iomem_reg_shift;
-                port->mapbase = (unsigned long)new_serial.iomem_base;
+                uport->mapbase = (unsigned long)new_serial.iomem_base;
                /*
                 * Claim and map the new regions
                 */
-                if (port->type != PORT_UNKNOWN) {
+                if (uport->type != PORT_UNKNOWN) {
-                        retval = port->ops->request_port(port);
+                        retval = uport->ops->request_port(uport);
                } else {
                        /* Always success - Jean II */
                        retval = 0;
@@ -806,19 +805,19 @@ static int uart_set_info(struct uart_state *state,
                 * new port, try to restore the old settings.
                 */
                if (retval && old_type != PORT_UNKNOWN) {
-                        port->iobase = old_iobase;
+                        uport->iobase = old_iobase;
-                        port->type = old_type;
+                        uport->type = old_type;
-                        port->hub6 = old_hub6;
+                        uport->hub6 = old_hub6;
-                        port->iotype = old_iotype;
+                        uport->iotype = old_iotype;
-                        port->regshift = old_shift;
+                        uport->regshift = old_shift;
-                        port->mapbase = old_mapbase;
+                        uport->mapbase = old_mapbase;
-                        retval = port->ops->request_port(port);
+                        retval = uport->ops->request_port(uport);
                        /*
                         * If we failed to restore the old settings,
                         * we fail like this.
                         */
                        if (retval)
-                                port->type = PORT_UNKNOWN;
+                                uport->type = PORT_UNKNOWN;
                        /*
                         * We failed anyway.
@@ -830,45 +829,45 @@ static int uart_set_info(struct uart_state *state,
        }
        if (change_irq)
-                port->irq      = new_serial.irq;
+                uport->irq      = new_serial.irq;
-        if (!(port->flags & UPF_FIXED_PORT))
+        if (!(uport->flags & UPF_FIXED_PORT))
-                port->uartclk  = new_serial.baud_base * 16;
+                uport->uartclk  = new_serial.baud_base * 16;
-        port->flags            = (port->flags & ~UPF_CHANGE_MASK) |
+        uport->flags            = (uport->flags & ~UPF_CHANGE_MASK) |
                                 (new_flags & UPF_CHANGE_MASK);
-        port->custom_divisor   = new_serial.custom_divisor;
+        uport->custom_divisor   = new_serial.custom_divisor;
-        state->close_delay     = close_delay;
+        port->close_delay     = close_delay;
-        state->closing_wait    = closing_wait;
+        port->closing_wait    = closing_wait;
        if (new_serial.xmit_fifo_size)
-                port->fifosize = new_serial.xmit_fifo_size;
+                uport->fifosize = new_serial.xmit_fifo_size;
-        if (state->info.port.tty)
+        if (port->tty)
-                state->info.port.tty->low_latency =
+                port->tty->low_latency =
-                        (port->flags & UPF_LOW_LATENCY) ? 1 : 0;
+                        (uport->flags & UPF_LOW_LATENCY) ? 1 : 0;
 check_and_exit:
        retval = 0;
-        if (port->type == PORT_UNKNOWN)
+        if (uport->type == PORT_UNKNOWN)
                goto exit;
-        if (state->info.flags & UIF_INITIALIZED) {
+        if (port->flags & ASYNC_INITIALIZED) {
-                if (((old_flags ^ port->flags) & UPF_SPD_MASK) ||
+                if (((old_flags ^ uport->flags) & UPF_SPD_MASK) ||
-                    old_custom_divisor != port->custom_divisor) {
+                    old_custom_divisor != uport->custom_divisor) {
                        /*
                         * If they're setting up a custom divisor or speed,
                         * instead of clearing it, then bitch about it. No
                         * need to rate-limit; it's CAP_SYS_ADMIN only.
                         */
-                        if (port->flags & UPF_SPD_MASK) {
+                        if (uport->flags & UPF_SPD_MASK) {
                                char buf[64];
                                printk(KERN_NOTICE
                                       "%s sets custom speed on %s. This "
                                       "is deprecated.\n", current->comm,
-                                       tty_name(state->info.port.tty, buf));
+                                       tty_name(port->tty, buf));
                        }
                        uart_change_speed(state, NULL);
                }
        } else
                retval = uart_startup(state, 1);
 exit:
-        mutex_unlock(&state->mutex);
+        mutex_unlock(&port->mutex);
        return retval;
 }
@@ -880,10 +879,11 @@ static int uart_set_info(struct uart_state *state,
 static int uart_get_lsr_info(struct uart_state *state,
                             unsigned int __user *value)
 {
-        struct uart_port *port = state->port;
+        struct uart_port *uport = state->uart_port;
+        struct tty_port *port = &state->port;
        unsigned int result;
-        result = port->ops->tx_empty(port);
+        result = uport->ops->tx_empty(uport);
        /*
         * If we're about to load something into the transmit
@@ -891,9 +891,9 @@ static int uart_get_lsr_info(struct uart_state *state,
         * avoid a race condition (depending on when the transmit
         * interrupt happens).
         */
-        if (port->x_char ||
+        if (uport->x_char ||
-            ((uart_circ_chars_pending(&state->info.xmit) > 0) &&
+            ((uart_circ_chars_pending(&state->xmit) > 0) &&
-             !state->info.port.tty->stopped && !state->info.port.tty->hw_stopped))
+             !port->tty->stopped && !port->tty->hw_stopped))
                result &= ~TIOCSER_TEMT;
        return put_user(result, value);
@@ -902,19 +902,20 @@ static int uart_get_lsr_info(struct uart_state *state,
 static int uart_tiocmget(struct tty_struct *tty, struct file *file)
 {
        struct uart_state *state = tty->driver_data;
-        struct uart_port *port = state->port;
+        struct tty_port *port = &state->port;
+        struct uart_port *uport = state->uart_port;
        int result = -EIO;
-        mutex_lock(&state->mutex);
+        mutex_lock(&port->mutex);
        if ((!file || !tty_hung_up_p(file)) &&
            !(tty->flags & (1 << TTY_IO_ERROR))) {
-                result = port->mctrl;
+                result = uport->mctrl;
-                spin_lock_irq(&port->lock);
+                spin_lock_irq(&uport->lock);
-                result |= port->ops->get_mctrl(port);
+                result |= uport->ops->get_mctrl(uport);
-                spin_unlock_irq(&port->lock);
+                spin_unlock_irq(&uport->lock);
        }
-        mutex_unlock(&state->mutex);
+        mutex_unlock(&port->mutex);
        return result;
 }
@@ -924,36 +925,39 @@ uart_tiocmset(struct tty_struct *tty, struct file *file,
              unsigned int set, unsigned int clear)
 {
        struct uart_state *state = tty->driver_data;
-        struct uart_port *port = state->port;
+        struct uart_port *uport = state->uart_port;
+        struct tty_port *port = &state->port;
        int ret = -EIO;
-        mutex_lock(&state->mutex);
+        mutex_lock(&port->mutex);
        if ((!file || !tty_hung_up_p(file)) &&
            !(tty->flags & (1 << TTY_IO_ERROR))) {
-                uart_update_mctrl(port, set, clear);
+                uart_update_mctrl(uport, set, clear);
                ret = 0;
        }
-        mutex_unlock(&state->mutex);
+        mutex_unlock(&port->mutex);
        return ret;
 }
 static int uart_break_ctl(struct tty_struct *tty, int break_state)
 {
        struct uart_state *state = tty->driver_data;
-        struct uart_port *port = state->port;
+        struct tty_port *port = &state->port;
+        struct uart_port *uport = state->uart_port;
-        mutex_lock(&state->mutex);
+        mutex_lock(&port->mutex);
-        if (port->type != PORT_UNKNOWN)
+        if (uport->type != PORT_UNKNOWN)
-                port->ops->break_ctl(port, break_state);
+                uport->ops->break_ctl(uport, break_state);
-        mutex_unlock(&state->mutex);
+        mutex_unlock(&port->mutex);
        return 0;
 }
 static int uart_do_autoconfig(struct uart_state *state)
 {
-        struct uart_port *port = state->port;
+        struct uart_port *uport = state->uart_port;
+        struct tty_port *port = &state->port;
        int flags, ret;
        if (!capable(CAP_SYS_ADMIN))
@@ -964,33 +968,33 @@ static int uart_do_autoconfig(struct uart_state *state)
         * changing, and hence any extra opens of the port while
         * we're auto-configuring.
         */
-        if (mutex_lock_interruptible(&state->mutex))
+        if (mutex_lock_interruptible(&port->mutex))
                return -ERESTARTSYS;
        ret = -EBUSY;
-        if (uart_users(state) == 1) {
+        if (tty_port_users(port) == 1) {
                uart_shutdown(state);
                /*
                 * If we already have a port type configured,
                 * we must release its resources.
                 */
-                if (port->type != PORT_UNKNOWN)
+                if (uport->type != PORT_UNKNOWN)
-                        port->ops->release_port(port);
+                        uport->ops->release_port(uport);
                flags = UART_CONFIG_TYPE;
-                if (port->flags & UPF_AUTO_IRQ)
+                if (uport->flags & UPF_AUTO_IRQ)
                        flags |= UART_CONFIG_IRQ;
                /*
                 * This will claim the ports resources if
                 * a port is found.
                 */
-                port->ops->config_port(port, flags);
+                uport->ops->config_port(uport, flags);
                ret = uart_startup(state, 1);
        }
-        mutex_unlock(&state->mutex);
+        mutex_unlock(&port->mutex);
        return ret;
 }
@@ -999,11 +1003,15 @@ static int uart_do_autoconfig(struct uart_state *state)
 * - mask passed in arg for lines of interest
 *   (use |'ed TIOCM_RNG/DSR/CD/CTS for masking)
 * Caller should use TIOCGICOUNT to see which one it was
+ *
+ * FIXME: This wants extracting into a common all driver implementation
+ * of TIOCMWAIT using tty_port.
 */
 static int
 uart_wait_modem_status(struct uart_state *state, unsigned long arg)
 {
-        struct uart_port *port = state->port;
+        struct uart_port *uport = state->uart_port;
+        struct tty_port *port = &state->port;
        DECLARE_WAITQUEUE(wait, current);
        struct uart_icount cprev, cnow;
        int ret;
@@ -1011,20 +1019,20 @@ uart_wait_modem_status(struct uart_state *state, unsigned long arg)
        /*
         * note the counters on entry
         */
-        spin_lock_irq(&port->lock);
+        spin_lock_irq(&uport->lock);
-        memcpy(&cprev, &port->icount, sizeof(struct uart_icount));
+        memcpy(&cprev, &uport->icount, sizeof(struct uart_icount));
        /*
         * Force modem status interrupts on
         */
-        port->ops->enable_ms(port);
+        uport->ops->enable_ms(uport);
-        spin_unlock_irq(&port->lock);
+        spin_unlock_irq(&uport->lock);
-        add_wait_queue(&state->info.delta_msr_wait, &wait);
+        add_wait_queue(&port->delta_msr_wait, &wait);
        for (;;) {
-                spin_lock_irq(&port->lock);
+                spin_lock_irq(&uport->lock);
-                memcpy(&cnow, &port->icount, sizeof(struct uart_icount));
+                memcpy(&cnow, &uport->icount, sizeof(struct uart_icount));
-                spin_unlock_irq(&port->lock);
+                spin_unlock_irq(&uport->lock);
                set_current_state(TASK_INTERRUPTIBLE);
@@ -1048,7 +1056,7 @@ uart_wait_modem_status(struct uart_state *state, unsigned long arg)
        }
        current->state = TASK_RUNNING;
-        remove_wait_queue(&state->info.delta_msr_wait, &wait);
+        remove_wait_queue(&port->delta_msr_wait, &wait);
        return ret;
 }
@@ -1064,11 +1072,11 @@ static int uart_get_count(struct uart_state *state,
 {
        struct serial_icounter_struct icount;
        struct uart_icount cnow;
-        struct uart_port *port = state->port;
+        struct uart_port *uport = state->uart_port;
-        spin_lock_irq(&port->lock);
+        spin_lock_irq(&uport->lock);
-        memcpy(&cnow, &port->icount, sizeof(struct uart_icount));
+        memcpy(&cnow, &uport->icount, sizeof(struct uart_icount));
-        spin_unlock_irq(&port->lock);
+        spin_unlock_irq(&uport->lock);
        icount.cts         = cnow.cts;
        icount.dsr         = cnow.dsr;
@@ -1093,6 +1101,7 @@ uart_ioctl(struct tty_struct *tty, struct file *filp, unsigned int cmd,
           unsigned long arg)
 {
        struct uart_state *state = tty->driver_data;
+        struct tty_port *port = &state->port;
        void __user *uarg = (void __user *)arg;
        int ret = -ENOIOCTLCMD;
@@ -1143,7 +1152,7 @@ uart_ioctl(struct tty_struct *tty, struct file *filp, unsigned int cmd,
        if (ret != -ENOIOCTLCMD)
                goto out;
-        mutex_lock(&state->mutex);
+        mutex_lock(&port->mutex);
        if (tty_hung_up_p(filp)) {
                ret = -EIO;
@@ -1160,14 +1169,14 @@ uart_ioctl(struct tty_struct *tty, struct file *filp, unsigned int cmd,
                break;
        default: {
-                struct uart_port *port = state->port;
+                struct uart_port *uport = state->uart_port;
-                if (port->ops->ioctl)
+                if (uport->ops->ioctl)
-                        ret = port->ops->ioctl(port, cmd, arg);
+                        ret = uport->ops->ioctl(uport, cmd, arg);
                break;
        }
        }
 out_up:
-        mutex_unlock(&state->mutex);
+        mutex_unlock(&port->mutex);
 out:
        return ret;
 }
@@ -1175,10 +1184,10 @@ out:
 static void uart_set_ldisc(struct tty_struct *tty)
 {
        struct uart_state *state = tty->driver_data;
-        struct uart_port *port = state->port;
+        struct uart_port *uport = state->uart_port;
-        if (port->ops->set_ldisc)
+        if (uport->ops->set_ldisc)
-                port->ops->set_ldisc(port);
+                uport->ops->set_ldisc(uport);
 }
 static void uart_set_termios(struct tty_struct *tty,
@@ -1207,7 +1216,7 @@ static void uart_set_termios(struct tty_struct *tty,
        /* Handle transition to B0 status */
        if ((old_termios->c_cflag & CBAUD) && !(cflag & CBAUD))
-                uart_clear_mctrl(state->port, TIOCM_RTS | TIOCM_DTR);
+                uart_clear_mctrl(state->uart_port, TIOCM_RTS | TIOCM_DTR);
        /* Handle transition away from B0 status */
        if (!(old_termios->c_cflag & CBAUD) && (cflag & CBAUD)) {
@@ -1215,25 +1224,25 @@ static void uart_set_termios(struct tty_struct *tty,
                if (!(cflag & CRTSCTS) ||
                    !test_bit(TTY_THROTTLED, &tty->flags))
                        mask |= TIOCM_RTS;
-                uart_set_mctrl(state->port, mask);
+                uart_set_mctrl(state->uart_port, mask);
        }
        /* Handle turning off CRTSCTS */
        if ((old_termios->c_cflag & CRTSCTS) && !(cflag & CRTSCTS)) {
-                spin_lock_irqsave(&state->port->lock, flags);
+                spin_lock_irqsave(&state->uart_port->lock, flags);
                tty->hw_stopped = 0;
                __uart_start(tty);
-                spin_unlock_irqrestore(&state->port->lock, flags);
+                spin_unlock_irqrestore(&state->uart_port->lock, flags);
        }
        /* Handle turning on CRTSCTS */
        if (!(old_termios->c_cflag & CRTSCTS) && (cflag & CRTSCTS)) {
-                spin_lock_irqsave(&state->port->lock, flags);
+                spin_lock_irqsave(&state->uart_port->lock, flags);
-                if (!(state->port->ops->get_mctrl(state->port) & TIOCM_CTS)) {
+                if (!(state->uart_port->ops->get_mctrl(state->uart_port) & TIOCM_CTS)) {
                        tty->hw_stopped = 1;
-                        state->port->ops->stop_tx(state->port);
+                        state->uart_port->ops->stop_tx(state->uart_port);
                }
-                spin_unlock_irqrestore(&state->port->lock, flags);
+                spin_unlock_irqrestore(&state->uart_port->lock, flags);
        }
 #if 0
        /*
@@ -1244,7 +1253,7 @@ static void uart_set_termios(struct tty_struct *tty,
         */
        if (!(old_termios->c_cflag & CLOCAL) &&
            (tty->termios->c_cflag & CLOCAL))
-                wake_up_interruptible(&info->port.open_wait);
+                wake_up_interruptible(&state->uart_port.open_wait);
 #endif
 }
@@ -1256,40 +1265,39 @@ static void uart_set_termios(struct tty_struct *tty,
 static void uart_close(struct tty_struct *tty, struct file *filp)
 {
        struct uart_state *state = tty->driver_data;
-        struct uart_port *port;
+        struct tty_port *port;
+        struct uart_port *uport;
        BUG_ON(!kernel_locked());
-        if (!state || !state->port)
+        uport = state->uart_port;
-                return;
+        port = &state->port;
-        port = state->port;
+        pr_debug("uart_close(%d) called\n", uport->line);
-        pr_debug("uart_close(%d) called\n", port->line);
+        mutex_lock(&port->mutex);
-        mutex_lock(&state->mutex);
        if (tty_hung_up_p(filp))
                goto done;
-        if ((tty->count == 1) && (state->count != 1)) {
+        if ((tty->count == 1) && (port->count != 1)) {
                /*
                 * Uh, oh.  tty->count is 1, which means that the tty
-                 * structure will be freed.  state->count should always
+                 * structure will be freed.  port->count should always
                 * be one in these conditions.  If it's greater than
                 * one, we've got real problems, since it means the
                 * serial port won't be shutdown.
                 */
                printk(KERN_ERR "uart_close: bad serial port count; tty->count is 1, "
-                       "state->count is %d\n", state->count);
+                       "port->count is %d\n", port->count);
-                state->count = 1;
+                port->count = 1;
        }
-        if (--state->count < 0) {
+        if (--port->count < 0) {
                printk(KERN_ERR "uart_close: bad serial port count for %s: %d\n",
-                       tty->name, state->count);
+                       tty->name, port->count);
-                state->count = 0;
+                port->count = 0;
        }
-        if (state->count)
+        if (port->count)
                goto done;
        /*
@@ -1299,24 +1307,24 @@ static void uart_close(struct tty_struct *tty, struct file *filp)
         */
        tty->closing = 1;
-        if (state->closing_wait != USF_CLOSING_WAIT_NONE)
+        if (port->closing_wait != ASYNC_CLOSING_WAIT_NONE)
-                tty_wait_until_sent(tty, msecs_to_jiffies(state->closing_wait));
+                tty_wait_until_sent(tty, msecs_to_jiffies(port->closing_wait));
        /*
         * At this point, we stop accepting input.  To do this, we
         * disable the receive line status interrupts.
         */
-        if (state->info.flags & UIF_INITIALIZED) {
+        if (port->flags & ASYNC_INITIALIZED) {
                unsigned long flags;
                spin_lock_irqsave(&port->lock, flags);
-                port->ops->stop_rx(port);
+                uport->ops->stop_rx(uport);
                spin_unlock_irqrestore(&port->lock, flags);
                /*
                 * Before we drop DTR, make sure the UART transmitter
                 * has completely drained; this is especially
                 * important if there is a transmit FIFO!
                 */
-                uart_wait_until_sent(tty, port->timeout);
+                uart_wait_until_sent(tty, uport->timeout);
        }
        uart_shutdown(state);
@@ -1325,29 +1333,29 @@ static void uart_close(struct tty_struct *tty, struct file *filp)
        tty_ldisc_flush(tty);
        tty->closing = 0;
-        state->info.port.tty = NULL;
+        tty_port_tty_set(port, NULL);
-        if (state->info.port.blocked_open) {
+        if (port->blocked_open) {
-                if (state->close_delay)
+                if (port->close_delay)
-                        msleep_interruptible(state->close_delay);
+                        msleep_interruptible(port->close_delay);
-        } else if (!uart_console(port)) {
+        } else if (!uart_console(uport)) {
                uart_change_pm(state, 3);
        }
        /*
         * Wake up anyone trying to open this port.
         */
-        state->info.flags &= ~UIF_NORMAL_ACTIVE;
+        clear_bit(ASYNCB_NORMAL_ACTIVE, &port->flags);
-        wake_up_interruptible(&state->info.port.open_wait);
+        wake_up_interruptible(&port->open_wait);
- done:
+done:
-        mutex_unlock(&state->mutex);
+        mutex_unlock(&port->mutex);
 }
 static void uart_wait_until_sent(struct tty_struct *tty, int timeout)
 {
        struct uart_state *state = tty->driver_data;
-        struct uart_port *port = state->port;
+        struct uart_port *port = state->uart_port;
        unsigned long char_time, expire;
        if (port->type == PORT_UNKNOWN || port->fifosize == 0)
@@ -1412,22 +1420,22 @@ static void uart_wait_until_sent(struct tty_struct *tty, int timeout)
 static void uart_hangup(struct tty_struct *tty)
 {
        struct uart_state *state = tty->driver_data;
-        struct uart_info *info = &state->info;
+        struct tty_port *port = &state->port;
        BUG_ON(!kernel_locked());
-        pr_debug("uart_hangup(%d)\n", state->port->line);
+        pr_debug("uart_hangup(%d)\n", state->uart_port->line);
-        mutex_lock(&state->mutex);
+        mutex_lock(&port->mutex);
-        if (info->flags & UIF_NORMAL_ACTIVE) {
+        if (port->flags & ASYNC_NORMAL_ACTIVE) {
                uart_flush_buffer(tty);
                uart_shutdown(state);
-                state->count = 0;
+                port->count = 0;
-                info->flags &= ~UIF_NORMAL_ACTIVE;
+                clear_bit(ASYNCB_NORMAL_ACTIVE, &port->flags);
-                info->port.tty = NULL;
+                tty_port_tty_set(port, NULL);
-                wake_up_interruptible(&info->port.open_wait);
+                wake_up_interruptible(&port->open_wait);
-                wake_up_interruptible(&info->delta_msr_wait);
+                wake_up_interruptible(&port->delta_msr_wait);
        }
-        mutex_unlock(&state->mutex);
+        mutex_unlock(&port->mutex);
 }
 /*
@@ -1438,8 +1446,8 @@ static void uart_hangup(struct tty_struct *tty)
 */
 static void uart_update_termios(struct uart_state *state)
 {
-        struct tty_struct *tty = state->info.port.tty;
+        struct tty_struct *tty = state->port.tty;
-        struct uart_port *port = state->port;
+        struct uart_port *port = state->uart_port;
        if (uart_console(port) && port->cons->cflag) {
                tty->termios->c_cflag = port->cons->cflag;
@@ -1473,27 +1481,27 @@ static int
 uart_block_til_ready(struct file *filp, struct uart_state *state)
 {
        DECLARE_WAITQUEUE(wait, current);
-        struct uart_info *info = &state->info;
+        struct uart_port *uport = state->uart_port;
-        struct uart_port *port = state->port;
+        struct tty_port *port = &state->port;
        unsigned int mctrl;
-        info->port.blocked_open++;
+        port->blocked_open++;
-        state->count--;
+        port->count--;
-        add_wait_queue(&info->port.open_wait, &wait);
+        add_wait_queue(&port->open_wait, &wait);
        while (1) {
                set_current_state(TASK_INTERRUPTIBLE);
                /*
                 * If we have been hung up, tell userspace/restart open.
                 */
-                if (tty_hung_up_p(filp) || info->port.tty == NULL)
+                if (tty_hung_up_p(filp) || port->tty == NULL)
                        break;
                /*
                 * If the port has been closed, tell userspace/restart open.
                 */
-                if (!(info->flags & UIF_INITIALIZED))
+                if (!(port->flags & ASYNC_INITIALIZED))
                        break;
                /*
@@ -1506,8 +1514,8 @@ uart_block_til_ready(struct file *filp, struct uart_state *state)
                 * have set TTY_IO_ERROR for a non-existant port.
                 */
                if ((filp->f_flags & O_NONBLOCK) ||
-                    (info->port.tty->termios->c_cflag & CLOCAL) ||
+                    (port->tty->termios->c_cflag & CLOCAL) ||
-                    (info->port.tty->flags & (1 << TTY_IO_ERROR)))
+                    (port->tty->flags & (1 << TTY_IO_ERROR)))
                        break;
                /*
@@ -1515,37 +1523,37 @@ uart_block_til_ready(struct file *filp, struct uart_state *state)
                 * not set RTS here - we want to make sure we catch
                 * the data from the modem.
                 */
-                if (info->port.tty->termios->c_cflag & CBAUD)
+                if (port->tty->termios->c_cflag & CBAUD)
-                        uart_set_mctrl(port, TIOCM_DTR);
+                        uart_set_mctrl(uport, TIOCM_DTR);
                /*
                 * and wait for the carrier to indicate that the
                 * modem is ready for us.
                 */
-                spin_lock_irq(&port->lock);
+                spin_lock_irq(&uport->lock);
-                port->ops->enable_ms(port);
+                uport->ops->enable_ms(uport);
-                mctrl = port->ops->get_mctrl(port);
+                mctrl = uport->ops->get_mctrl(uport);
-                spin_unlock_irq(&port->lock);
+                spin_unlock_irq(&uport->lock);
                if (mctrl & TIOCM_CAR)
                        break;
-                mutex_unlock(&state->mutex);
+                mutex_unlock(&port->mutex);
                schedule();
-                mutex_lock(&state->mutex);
+                mutex_lock(&port->mutex);
                if (signal_pending(current))
                        break;
        }
        set_current_state(TASK_RUNNING);
-        remove_wait_queue(&info->port.open_wait, &wait);
+        remove_wait_queue(&port->open_wait, &wait);
-        state->count++;
+        port->count++;
-        info->port.blocked_open--;
+        port->blocked_open--;
        if (signal_pending(current))
                return -ERESTARTSYS;
-        if (!info->port.tty || tty_hung_up_p(filp))
+        if (!port->tty || tty_hung_up_p(filp))
                return -EAGAIN;
        return 0;
@@ -1554,24 +1562,26 @@ uart_block_til_ready(struct file *filp, struct uart_state *state)
 static struct uart_state *uart_get(struct uart_driver *drv, int line)
 {
        struct uart_state *state;
+        struct tty_port *port;
        int ret = 0;
        state = drv->state + line;
-        if (mutex_lock_interruptible(&state->mutex)) {
+        port = &state->port;
+        if (mutex_lock_interruptible(&port->mutex)) {
                ret = -ERESTARTSYS;
                goto err;
        }
-        state->count++;
+        port->count++;
-        if (!state->port || state->port->flags & UPF_DEAD) {
+        if (!state->uart_port || state->uart_port->flags & UPF_DEAD) {
                ret = -ENXIO;
                goto err_unlock;
        }
        return state;
 err_unlock:
-        state->count--;
+        port->count--;
-        mutex_unlock(&state->mutex);
+        mutex_unlock(&port->mutex);
 err:
        return ERR_PTR(ret);
 }
@@ -1590,6 +1600,7 @@ static int uart_open(struct tty_struct *tty, struct file *filp)
 {
        struct uart_driver *drv = (struct uart_driver *)tty->driver->driver_state;
        struct uart_state *state;
+        struct tty_port *port;
        int retval, line = tty->index;
        BUG_ON(!kernel_locked());
@@ -1606,16 +1617,18 @@ static int uart_open(struct tty_struct *tty, struct file *filp)
        /*
         * We take the semaphore inside uart_get to guarantee that we won't
-         * be re-entered while allocating the info structure, or while we
+         * be re-entered while allocating the state structure, or while we
         * request any IRQs that the driver may need.  This also has the nice
         * side-effect that it delays the action of uart_hangup, so we can
-         * guarantee that info->port.tty will always contain something reasonable.
+         * guarantee that state->port.tty will always contain something
+         * reasonable.
         */
        state = uart_get(drv, line);
        if (IS_ERR(state)) {
                retval = PTR_ERR(state);
                goto fail;
        }
+        port = &state->port;
        /*
         * Once we set tty->driver_data here, we are guaranteed that
@@ -1623,25 +1636,25 @@ static int uart_open(struct tty_struct *tty, struct file *filp)
         * Any failures from here onwards should not touch the count.
         */
        tty->driver_data = state;
-        state->port->info = &state->info;
+        state->uart_port->state = state;
-        tty->low_latency = (state->port->flags & UPF_LOW_LATENCY) ? 1 : 0;
+        tty->low_latency = (state->uart_port->flags & UPF_LOW_LATENCY) ? 1 : 0;
        tty->alt_speed = 0;
-        state->info.port.tty = tty;
+        tty_port_tty_set(port, tty);
        /*
         * If the port is in the middle of closing, bail out now.
         */
        if (tty_hung_up_p(filp)) {
                retval = -EAGAIN;
-                state->count--;
+                port->count--;
-                mutex_unlock(&state->mutex);
+                mutex_unlock(&port->mutex);
                goto fail;
        }
        /*
         * Make sure the device is in D0 state.
         */
-        if (state->count == 1)
+        if (port->count == 1)
                uart_change_pm(state, 0);
        /*
@@ -1654,18 +1667,18 @@ static int uart_open(struct tty_struct *tty, struct file *filp)
         */
        if (retval == 0)
                retval = uart_block_til_ready(filp, state);
-        mutex_unlock(&state->mutex);
+        mutex_unlock(&port->mutex);
        /*
         * If this is the first open to succeed, adjust things to suit.
         */
-        if (retval == 0 && !(state->info.flags & UIF_NORMAL_ACTIVE)) {
+        if (retval == 0 && !(port->flags & ASYNC_NORMAL_ACTIVE)) {
-                state->info.flags |= UIF_NORMAL_ACTIVE;
+                set_bit(ASYNCB_NORMAL_ACTIVE, &port->flags);
                uart_update_termios(state);
        }
- fail:
+fail:
        return retval;
 }
@@ -1687,57 +1700,58 @@ static const char *uart_type(struct uart_port *port)
 static void uart_line_info(struct seq_file *m, struct uart_driver *drv, int i)
 {
        struct uart_state *state = drv->state + i;
+        struct tty_port *port = &state->port;
        int pm_state;
-        struct uart_port *port = state->port;
+        struct uart_port *uport = state->uart_port;
        char stat_buf[32];
        unsigned int status;
        int mmio;
-        if (!port)
+        if (!uport)
                return;
-        mmio = port->iotype >= UPIO_MEM;
+        mmio = uport->iotype >= UPIO_MEM;
        seq_printf(m, "%d: uart:%s %s%08llX irq:%d",
-                        port->line, uart_type(port),
+                        uport->line, uart_type(uport),
                        mmio ? "mmio:0x" : "port:",
-                        mmio ? (unsigned long long)port->mapbase
+                        mmio ? (unsigned long long)uport->mapbase
-                             : (unsigned long long) port->iobase,
+                             : (unsigned long long)uport->iobase,
-                        port->irq);
+                        uport->irq);
-        if (port->type == PORT_UNKNOWN) {
+        if (uport->type == PORT_UNKNOWN) {
                seq_putc(m, '\n');
                return;
        }
        if (capable(CAP_SYS_ADMIN)) {
-                mutex_lock(&state->mutex);
+                mutex_lock(&port->mutex);
                pm_state = state->pm_state;
                if (pm_state)
                        uart_change_pm(state, 0);
-                spin_lock_irq(&port->lock);
+                spin_lock_irq(&uport->lock);
-                status = port->ops->get_mctrl(port);
+                status = uport->ops->get_mctrl(uport);
-                spin_unlock_irq(&port->lock);
+                spin_unlock_irq(&uport->lock);
                if (pm_state)
                        uart_change_pm(state, pm_state);
-                mutex_unlock(&state->mutex);
+                mutex_unlock(&port->mutex);
                seq_printf(m, " tx:%d rx:%d",
-                                port->icount.tx, port->icount.rx);
+                                uport->icount.tx, uport->icount.rx);
-                if (port->icount.frame)
+                if (uport->icount.frame)
                        seq_printf(m, " fe:%d",
-                                port->icount.frame);
+                                uport->icount.frame);
-                if (port->icount.parity)
+                if (uport->icount.parity)
                        seq_printf(m, " pe:%d",
-                                port->icount.parity);
+                                uport->icount.parity);
-                if (port->icount.brk)
+                if (uport->icount.brk)
                        seq_printf(m, " brk:%d",
-                                port->icount.brk);
+                                uport->icount.brk);
-                if (port->icount.overrun)
+                if (uport->icount.overrun)
                        seq_printf(m, " oe:%d",
-                                port->icount.overrun);
+                                uport->icount.overrun);
 #define INFOBIT(bit, str) \
-        if (port->mctrl & (bit)) \
+        if (uport->mctrl & (bit)) \
                strncat(stat_buf, (str), sizeof(stat_buf) - \
                        strlen(stat_buf) - 2)
 #define STATBIT(bit, str) \
@@ -1958,7 +1972,7 @@ EXPORT_SYMBOL_GPL(uart_set_options);
 static void uart_change_pm(struct uart_state *state, int pm_state)
 {
-        struct uart_port *port = state->port;
+        struct uart_port *port = state->uart_port;
        if (state->pm_state != pm_state) {
                if (port->ops->pm)
@@ -1982,132 +1996,138 @@ static int serial_match_port(struct device *dev, void *data)
        return dev->devt == devt; /* Actually, only one tty per port */
 }
-int uart_suspend_port(struct uart_driver *drv, struct uart_port *port)
+int uart_suspend_port(struct uart_driver *drv, struct uart_port *uport)
 {
-        struct uart_state *state = drv->state + port->line;
+        struct uart_state *state = drv->state + uport->line;
+        struct tty_port *port = &state->port;
        struct device *tty_dev;
-        struct uart_match match = {port, drv};
+        struct uart_match match = {uport, drv};
-        mutex_lock(&state->mutex);
+        mutex_lock(&port->mutex);
-        if (!console_suspend_enabled && uart_console(port)) {
+        if (!console_suspend_enabled && uart_console(uport)) {
                /* we're going to avoid suspending serial console */
-                mutex_unlock(&state->mutex);
+                mutex_unlock(&port->mutex);
                return 0;
        }
-        tty_dev = device_find_child(port->dev, &match, serial_match_port);
+        tty_dev = device_find_child(uport->dev, &match, serial_match_port);
        if (device_may_wakeup(tty_dev)) {
-                enable_irq_wake(port->irq);
+                enable_irq_wake(uport->irq);
                put_device(tty_dev);
-                mutex_unlock(&state->mutex);
+                mutex_unlock(&port->mutex);
                return 0;
        }
-        port->suspended = 1;
+        uport->suspended = 1;
-        if (state->info.flags & UIF_INITIALIZED) {
+        if (port->flags & ASYNC_INITIALIZED) {
-                const struct uart_ops *ops = port->ops;
+                const struct uart_ops *ops = uport->ops;
                int tries;
-                state->info.flags = (state->info.flags & ~UIF_INITIALIZED)
+                set_bit(ASYNCB_SUSPENDED, &port->flags);
-                                     | UIF_SUSPENDED;
+                clear_bit(ASYNCB_INITIALIZED, &port->flags);
-                spin_lock_irq(&port->lock);
+                spin_lock_irq(&uport->lock);
-                ops->stop_tx(port);
+                ops->stop_tx(uport);
-                ops->set_mctrl(port, 0);
+                ops->set_mctrl(uport, 0);
-                ops->stop_rx(port);
+                ops->stop_rx(uport);
-                spin_unlock_irq(&port->lock);
+                spin_unlock_irq(&uport->lock);
                /*
                 * Wait for the transmitter to empty.
                 */
-                for (tries = 3; !ops->tx_empty(port) && tries; tries--)
+                for (tries = 3; !ops->tx_empty(uport) && tries; tries--)
                        msleep(10);
                if (!tries)
                        printk(KERN_ERR "%s%s%s%d: Unable to drain "
                                        "transmitter\n",
-                               port->dev ? dev_name(port->dev) : "",
+                               uport->dev ? dev_name(uport->dev) : "",
-                               port->dev ? ": " : "",
+                               uport->dev ? ": " : "",
                               drv->dev_name,
-                               drv->tty_driver->name_base + port->line);
+                               drv->tty_driver->name_base + uport->line);
-                ops->shutdown(port);
+                ops->shutdown(uport);
        }
        /*
         * Disable the console device before suspending.
         */
-        if (uart_console(port))
+        if (uart_console(uport))
-                console_stop(port->cons);
+                console_stop(uport->cons);
        uart_change_pm(state, 3);
-        mutex_unlock(&state->mutex);
+        mutex_unlock(&port->mutex);
        return 0;
 }
-int uart_resume_port(struct uart_driver *drv, struct uart_port *port)
+int uart_resume_port(struct uart_driver *drv, struct uart_port *uport)
 {
-        struct uart_state *state = drv->state + port->line;
+        struct uart_state *state = drv->state + uport->line;
+        struct tty_port *port = &state->port;
        struct device *tty_dev;
-        struct uart_match match = {port, drv};
+        struct uart_match match = {uport, drv};
+        struct ktermios termios;
-        mutex_lock(&state->mutex);
+        mutex_lock(&port->mutex);
-        if (!console_suspend_enabled && uart_console(port)) {
+        if (!console_suspend_enabled && uart_console(uport)) {
                /* no need to resume serial console, it wasn't suspended */
-                mutex_unlock(&state->mutex);
+                /*
+                 * First try to use the console cflag setting.
+                 */
+                memset(&termios, 0, sizeof(struct ktermios));
+                termios.c_cflag = uport->cons->cflag;
+                /*
+                 * If that's unset, use the tty termios setting.
+                 */
+                if (termios.c_cflag == 0)
+                        termios = *state->port.tty->termios;
+                else {
+                        termios.c_ispeed = termios.c_ospeed =
+                                tty_termios_input_baud_rate(&termios);
+                        termios.c_ispeed = termios.c_ospeed =
+                                tty_termios_baud_rate(&termios);
+                }
+                uport->ops->set_termios(uport, &termios, NULL);
+                mutex_unlock(&port->mutex);
                return 0;
        }
-        tty_dev = device_find_child(port->dev, &match, serial_match_port);
+        tty_dev = device_find_child(uport->dev, &match, serial_match_port);
-        if (!port->suspended && device_may_wakeup(tty_dev)) {
+        if (!uport->suspended && device_may_wakeup(tty_dev)) {
-                disable_irq_wake(port->irq);
+                disable_irq_wake(uport->irq);
-                mutex_unlock(&state->mutex);
+                mutex_unlock(&port->mutex);
                return 0;
        }
-        port->suspended = 0;
+        uport->suspended = 0;
        /*
         * Re-enable the console device after suspending.
         */
-        if (uart_console(port)) {
+        if (uart_console(uport)) {
-                struct ktermios termios;
-                /*
-                 * First try to use the console cflag setting.
-                 */
-                memset(&termios, 0, sizeof(struct ktermios));
-                termios.c_cflag = port->cons->cflag;
-                /*
-                 * If that's unset, use the tty termios setting.
-                 */
-                if (state->info.port.tty && termios.c_cflag == 0)
-                        termios = *state->info.port.tty->termios;
                uart_change_pm(state, 0);
-                port->ops->set_termios(port, &termios, NULL);
+                uport->ops->set_termios(uport, &termios, NULL);
-                console_start(port->cons);
+                console_start(uport->cons);
        }
-        if (state->info.flags & UIF_SUSPENDED) {
+        if (port->flags & ASYNC_SUSPENDED) {
-                const struct uart_ops *ops = port->ops;
+                const struct uart_ops *ops = uport->ops;
                int ret;
                uart_change_pm(state, 0);
-                spin_lock_irq(&port->lock);
+                spin_lock_irq(&uport->lock);
-                ops->set_mctrl(port, 0);
+                ops->set_mctrl(uport, 0);
-                spin_unlock_irq(&port->lock);
+                spin_unlock_irq(&uport->lock);
-                ret = ops->startup(port);
+                ret = ops->startup(uport);
                if (ret == 0) {
                        uart_change_speed(state, NULL);
-                        spin_lock_irq(&port->lock);
+                        spin_lock_irq(&uport->lock);
-                        ops->set_mctrl(port, port->mctrl);
+                        ops->set_mctrl(uport, uport->mctrl);
-                        ops->start_tx(port);
+                        ops->start_tx(uport);
-                        spin_unlock_irq(&port->lock);
+                        spin_unlock_irq(&uport->lock);
-                        state->info.flags |= UIF_INITIALIZED;
+                        set_bit(ASYNCB_INITIALIZED, &port->flags);
                } else {
                        /*
                         * Failed to resume - maybe hardware went away?
@@ -2117,10 +2137,10 @@ int uart_resume_port(struct uart_driver *drv, struct uart_port *port)
                        uart_shutdown(state);
                }
-                state->info.flags &= ~UIF_SUSPENDED;
+                clear_bit(ASYNCB_SUSPENDED, &port->flags);
        }
-        mutex_unlock(&state->mutex);
+        mutex_unlock(&port->mutex);
        return 0;
 }
@@ -2232,10 +2252,10 @@ static int uart_poll_init(struct tty_driver *driver, int line, char *options)
        int parity = 'n';
        int flow = 'n';
-        if (!state || !state->port)
+        if (!state || !state->uart_port)
                return -1;
-        port = state->port;
+        port = state->uart_port;
        if (!(port->ops->poll_get_char && port->ops->poll_put_char))
                return -1;
@@ -2253,10 +2273,10 @@ static int uart_poll_get_char(struct tty_driver *driver, int line)
        struct uart_state *state = drv->state + line;
        struct uart_port *port;
-        if (!state || !state->port)
+        if (!state || !state->uart_port)
                return -1;
-        port = state->port;
+        port = state->uart_port;
        return port->ops->poll_get_char(port);
 }
@@ -2266,10 +2286,10 @@ static void uart_poll_put_char(struct tty_driver *driver, int line, char ch)
        struct uart_state *state = drv->state + line;
        struct uart_port *port;
-        if (!state || !state->port)
+        if (!state || !state->uart_port)
                return;
-        port = state->port;
+        port = state->uart_port;
        port->ops->poll_put_char(port, ch);
 }
 #endif
@@ -2360,14 +2380,12 @@ int uart_register_driver(struct uart_driver *drv)
         */
        for (i = 0; i < drv->nr; i++) {
                struct uart_state *state = drv->state + i;
+                struct tty_port *port = &state->port;
-                state->close_delay     = 500;   /* .5 seconds */
+                tty_port_init(port);
-                state->closing_wait    = 30000; /* 30 seconds */
+                port->close_delay     = 500;    /* .5 seconds */
-                mutex_init(&state->mutex);
+                port->closing_wait    = 30000;  /* 30 seconds */
+                tasklet_init(&state->tlet, uart_tasklet_action,
-                tty_port_init(&state->info.port);
-                init_waitqueue_head(&state->info.delta_msr_wait);
-                tasklet_init(&state->info.tlet, uart_tasklet_action,
                             (unsigned long)state);
        }
@@ -2415,62 +2433,64 @@ struct tty_driver *uart_console_device(struct console *co, int *index)
 *      level uart drivers to expand uart_port, rather than having yet
 *      more levels of structures.
 */
-int uart_add_one_port(struct uart_driver *drv, struct uart_port *port)
+int uart_add_one_port(struct uart_driver *drv, struct uart_port *uport)
 {
        struct uart_state *state;
+        struct tty_port *port;
        int ret = 0;
        struct device *tty_dev;
        BUG_ON(in_interrupt());
-        if (port->line >= drv->nr)
+        if (uport->line >= drv->nr)
                return -EINVAL;
-        state = drv->state + port->line;
+        state = drv->state + uport->line;
+        port = &state->port;
        mutex_lock(&port_mutex);
-        mutex_lock(&state->mutex);
+        mutex_lock(&port->mutex);
-        if (state->port) {
+        if (state->uart_port) {
                ret = -EINVAL;
                goto out;
        }
-        state->port = port;
+        state->uart_port = uport;
        state->pm_state = -1;
-        port->cons = drv->cons;
+        uport->cons = drv->cons;
-        port->info = &state->info;
+        uport->state = state;
        /*
         * If this port is a console, then the spinlock is already
         * initialised.
         */
-        if (!(uart_console(port) && (port->cons->flags & CON_ENABLED))) {
+        if (!(uart_console(uport) && (uport->cons->flags & CON_ENABLED))) {
-                spin_lock_init(&port->lock);
+                spin_lock_init(&uport->lock);
-                lockdep_set_class(&port->lock, &port_lock_key);
+                lockdep_set_class(&uport->lock, &port_lock_key);
        }
-        uart_configure_port(drv, state, port);
+        uart_configure_port(drv, state, uport);
        /*
         * Register the port whether it's detected or not.  This allows
         * setserial to be used to alter this ports parameters.
         */
-        tty_dev = tty_register_device(drv->tty_driver, port->line, port->dev);
+        tty_dev = tty_register_device(drv->tty_driver, uport->line, uport->dev);
        if (likely(!IS_ERR(tty_dev))) {
                device_init_wakeup(tty_dev, 1);
                device_set_wakeup_enable(tty_dev, 0);
        } else
                printk(KERN_ERR "Cannot register tty device on line %d\n",
-                       port->line);
+                       uport->line);
        /*
         * Ensure UPF_DEAD is not set.
         */
-        port->flags &= ~UPF_DEAD;
+        uport->flags &= ~UPF_DEAD;
 out:
-        mutex_unlock(&state->mutex);
+        mutex_unlock(&port->mutex);
        mutex_unlock(&port_mutex);
        return ret;
@@ -2485,16 +2505,16 @@ int uart_add_one_port(struct uart_driver *drv, struct uart_port *port)
 *      core driver.  No further calls will be made to the low-level code
 *      for this port.
 */
-int uart_remove_one_port(struct uart_driver *drv, struct uart_port *port)
+int uart_remove_one_port(struct uart_driver *drv, struct uart_port *uport)
 {
-        struct uart_state *state = drv->state + port->line;
+        struct uart_state *state = drv->state + uport->line;
-        struct uart_info *info;
+        struct tty_port *port = &state->port;
        BUG_ON(in_interrupt());
-        if (state->port != port)
+        if (state->uart_port != uport)
                printk(KERN_ALERT "Removing wrong port: %p != %p\n",
-                        state->port, port);
+                        state->uart_port, uport);
        mutex_lock(&port_mutex);
@@ -2502,37 +2522,35 @@ int uart_remove_one_port(struct uart_driver *drv, struct uart_port *port)
         * Mark the port "dead" - this prevents any opens from
         * succeeding while we shut down the port.
         */
-        mutex_lock(&state->mutex);
+        mutex_lock(&port->mutex);
-        port->flags |= UPF_DEAD;
+        uport->flags |= UPF_DEAD;
-        mutex_unlock(&state->mutex);
+        mutex_unlock(&port->mutex);
        /*
         * Remove the devices from the tty layer
         */
-        tty_unregister_device(drv->tty_driver, port->line);
+        tty_unregister_device(drv->tty_driver, uport->line);
-        info = &state->info;
+        if (port->tty)
-        if (info && info->port.tty)
+                tty_vhangup(port->tty);
-                tty_vhangup(info->port.tty);
        /*
         * Free the port IO and memory resources, if any.
         */
-        if (port->type != PORT_UNKNOWN)
+        if (uport->type != PORT_UNKNOWN)
-                port->ops->release_port(port);
+                uport->ops->release_port(uport);
        /*
         * Indicate that there isn't a port here anymore.
         */
-        port->type = PORT_UNKNOWN;
+        uport->type = PORT_UNKNOWN;
        /*
         * Kill the tasklet, and free resources.
         */
-        if (info)
+        tasklet_kill(&state->tlet);
-                tasklet_kill(&info->tlet);
-        state->port = NULL;
+        state->uart_port = NULL;
        mutex_unlock(&port_mutex);
        return 0;
diff --git a/drivers/serial/serial_cs.c b/drivers/serial/serial_cs.c
index ed4648b556c7..a3bb49031a7f 100644
--- a/drivers/serial/serial_cs.c
+++ b/drivers/serial/serial_cs.c
@@ -884,6 +884,7 @@ static struct pcmcia_device_id serial_ids[] = {
        PCMCIA_DEVICE_CIS_MANF_CARD(0x0192, 0xa555, "SW_555_SER.cis"),  /* Sierra Aircard 555 CDMA 1xrtt Modem -- pre update */
        PCMCIA_DEVICE_CIS_MANF_CARD(0x013f, 0xa555, "SW_555_SER.cis"),  /* Sierra Aircard 555 CDMA 1xrtt Modem -- post update */
        PCMCIA_DEVICE_CIS_PROD_ID12("MultiTech", "PCMCIA 56K DataFax", 0x842047ee, 0xc2efcf03, "cis/MT5634ZLX.cis"),
+        PCMCIA_DEVICE_CIS_PROD_ID12("ADVANTECH", "COMpad-32/85B-2", 0x96913a85, 0x27ab5437, "COMpad2.cis"),
        PCMCIA_DEVICE_CIS_PROD_ID12("ADVANTECH", "COMpad-32/85B-4", 0x96913a85, 0xcec8f102, "COMpad4.cis"),
        PCMCIA_DEVICE_CIS_PROD_ID123("ADVANTECH", "COMpad-32/85", "1.0", 0x96913a85, 0x8fbe92ae, 0x0877b627, "COMpad2.cis"),
        PCMCIA_DEVICE_CIS_PROD_ID2("RS-COM 2P", 0xad20b156, "cis/RS-COM-2P.cis"),
diff --git a/drivers/serial/serial_ks8695.c b/drivers/serial/serial_ks8695.c
index 52db5cc3f900..2e71bbc04dac 100644
--- a/drivers/serial/serial_ks8695.c
+++ b/drivers/serial/serial_ks8695.c
@@ -154,7 +154,7 @@ static void ks8695uart_disable_ms(struct uart_port *port)
 static irqreturn_t ks8695uart_rx_chars(int irq, void *dev_id)
 {
        struct uart_port *port = dev_id;
-        struct tty_struct *tty = port->info->port.tty;
+        struct tty_struct *tty = port->state->port.tty;
        unsigned int status, ch, lsr, flg, max_count = 256;
        status = UART_GET_LSR(port);            /* clears pending LSR interrupts */
@@ -210,7 +210,7 @@ ignore_char:
 static irqreturn_t ks8695uart_tx_chars(int irq, void *dev_id)
 {
        struct uart_port *port = dev_id;
-        struct circ_buf *xmit = &port->info->xmit;
+        struct circ_buf *xmit = &port->state->xmit;
        unsigned int count;
        if (port->x_char) {
@@ -266,7 +266,7 @@ static irqreturn_t ks8695uart_modem_status(int irq, void *dev_id)
        if (status & URMS_URTERI)
                port->icount.rng++;
-        wake_up_interruptible(&port->info->delta_msr_wait);
+        wake_up_interruptible(&port->state->port.delta_msr_wait);
        return IRQ_HANDLED;
 }
diff --git a/drivers/serial/serial_lh7a40x.c b/drivers/serial/serial_lh7a40x.c
index a7bf024a8286..ea744707c4d6 100644
--- a/drivers/serial/serial_lh7a40x.c
+++ b/drivers/serial/serial_lh7a40x.c
@@ -138,7 +138,7 @@ static void lh7a40xuart_enable_ms (struct uart_port* port)
 static void lh7a40xuart_rx_chars (struct uart_port* port)
 {
-        struct tty_struct* tty = port->info->port.tty;
+        struct tty_struct* tty = port->state->port.tty;
        int cbRxMax = 256;      /* (Gross) limit on receive */
        unsigned int data;      /* Received data and status */
        unsigned int flag;
@@ -184,7 +184,7 @@ static void lh7a40xuart_rx_chars (struct uart_port* port)
 static void lh7a40xuart_tx_chars (struct uart_port* port)
 {
-        struct circ_buf* xmit = &port->info->xmit;
+        struct circ_buf* xmit = &port->state->xmit;
        int cbTxMax = port->fifosize;
        if (port->x_char) {
@@ -241,7 +241,7 @@ static void lh7a40xuart_modem_status (struct uart_port* port)
        if (delta & CTS)
                uart_handle_cts_change (port, status & CTS);
-        wake_up_interruptible (&port->info->delta_msr_wait);
+        wake_up_interruptible (&port->state->port.delta_msr_wait);
 }
 static irqreturn_t lh7a40xuart_int (int irq, void* dev_id)
diff --git a/drivers/serial/serial_txx9.c b/drivers/serial/serial_txx9.c
index 54dd16d66a4b..0f7cf4c453e6 100644
--- a/drivers/serial/serial_txx9.c
+++ b/drivers/serial/serial_txx9.c
@@ -272,7 +272,7 @@ static void serial_txx9_initialize(struct uart_port *port)
 static inline void
 receive_chars(struct uart_txx9_port *up, unsigned int *status)
 {
-        struct tty_struct *tty = up->port.info->port.tty;
+        struct tty_struct *tty = up->port.state->port.tty;
        unsigned char ch;
        unsigned int disr = *status;
        int max_count = 256;
@@ -348,7 +348,7 @@ receive_chars(struct uart_txx9_port *up, unsigned int *status)
 static inline void transmit_chars(struct uart_txx9_port *up)
 {
-        struct circ_buf *xmit = &up->port.info->xmit;
+        struct circ_buf *xmit = &up->port.state->xmit;
        int count;
        if (up->port.x_char) {
diff --git a/drivers/serial/sh-sci.c b/drivers/serial/sh-sci.c
index 32dc2fc50e6b..85119fb7cb50 100644
--- a/drivers/serial/sh-sci.c
+++ b/drivers/serial/sh-sci.c
@@ -361,7 +361,7 @@ static inline int sci_rxroom(struct uart_port *port)
 static void sci_transmit_chars(struct uart_port *port)
 {
-        struct circ_buf *xmit = &port->info->xmit;
+        struct circ_buf *xmit = &port->state->xmit;
        unsigned int stopped = uart_tx_stopped(port);
        unsigned short status;
        unsigned short ctrl;
@@ -426,7 +426,7 @@ static void sci_transmit_chars(struct uart_port *port)
 static inline void sci_receive_chars(struct uart_port *port)
 {
        struct sci_port *sci_port = to_sci_port(port);
-        struct tty_struct *tty = port->info->port.tty;
+        struct tty_struct *tty = port->state->port.tty;
        int i, count, copied = 0;
        unsigned short status;
        unsigned char flag;
@@ -546,7 +546,7 @@ static inline int sci_handle_errors(struct uart_port *port)
 {
        int copied = 0;
        unsigned short status = sci_in(port, SCxSR);
-        struct tty_struct *tty = port->info->port.tty;
+        struct tty_struct *tty = port->state->port.tty;
        if (status & SCxSR_ORER(port)) {
                /* overrun error */
@@ -600,7 +600,7 @@ static inline int sci_handle_errors(struct uart_port *port)
 static inline int sci_handle_fifo_overrun(struct uart_port *port)
 {
-        struct tty_struct *tty = port->info->port.tty;
+        struct tty_struct *tty = port->state->port.tty;
        int copied = 0;
        if (port->type != PORT_SCIF)
@@ -623,7 +623,7 @@ static inline int sci_handle_breaks(struct uart_port *port)
 {
        int copied = 0;
        unsigned short status = sci_in(port, SCxSR);
-        struct tty_struct *tty = port->info->port.tty;
+        struct tty_struct *tty = port->state->port.tty;
        struct sci_port *s = to_sci_port(port);
        if (uart_handle_break(port))
diff --git a/drivers/serial/sn_console.c b/drivers/serial/sn_console.c
index d5276c012f78..9794e0cd3dcc 100644
--- a/drivers/serial/sn_console.c
+++ b/drivers/serial/sn_console.c
@@ -469,9 +469,9 @@ sn_receive_chars(struct sn_cons_port *port, unsigned long flags)
                return;
        }
-        if (port->sc_port.info) {
+        if (port->sc_port.state) {
                /* The serial_core stuffs are initilized, use them */
-                tty = port->sc_port.info->port.tty;
+                tty = port->sc_port.state->port.tty;
        }
        else {
                /* Not registered yet - can't pass to tty layer.  */
@@ -550,9 +550,9 @@ static void sn_transmit_chars(struct sn_cons_port *port, int raw)
        BUG_ON(!port->sc_is_asynch);
-        if (port->sc_port.info) {
+        if (port->sc_port.state) {
                /* We're initilized, using serial core infrastructure */
-                xmit = &port->sc_port.info->xmit;
+                xmit = &port->sc_port.state->xmit;
        } else {
                /* Probably sn_sal_switch_to_asynch has been run but serial core isn't
                 * initilized yet.  Just return.  Writes are going through
@@ -927,7 +927,7 @@ sn_sal_console_write(struct console *co, const char *s, unsigned count)
        /* We can't look at the xmit buffer if we're not registered with serial core
         *  yet.  So only do the fancy recovery after registering
         */
-        if (!port->sc_port.info) {
+        if (!port->sc_port.state) {
                /* Not yet registered with serial core - simple case */
                puts_raw_fixed(port->sc_ops->sal_puts_raw, s, count);
                return;
@@ -936,8 +936,8 @@ sn_sal_console_write(struct console *co, const char *s, unsigned count)
        /* somebody really wants this output, might be an
         * oops, kdb, panic, etc.  make sure they get it. */
        if (spin_is_locked(&port->sc_port.lock)) {
-                int lhead = port->sc_port.info->xmit.head;
+                int lhead = port->sc_port.state->xmit.head;
-                int ltail = port->sc_port.info->xmit.tail;
+                int ltail = port->sc_port.state->xmit.tail;
                int counter, got_lock = 0;
                /*
@@ -962,13 +962,13 @@ sn_sal_console_write(struct console *co, const char *s, unsigned count)
                                break;
                        } else {
                                /* still locked */
-                                if ((lhead != port->sc_port.info->xmit.head)
+                                if ((lhead != port->sc_port.state->xmit.head)
                                    || (ltail !=
-                                        port->sc_port.info->xmit.tail)) {
+                                        port->sc_port.state->xmit.tail)) {
                                        lhead =
-                                                port->sc_port.info->xmit.head;
+                                                port->sc_port.state->xmit.head;
                                        ltail =
-                                                port->sc_port.info->xmit.tail;
+                                                port->sc_port.state->xmit.tail;
                                        counter = 0;
                                }
                        }
diff --git a/drivers/serial/sunhv.c b/drivers/serial/sunhv.c
index 1df5325faab2..d548652dee50 100644
--- a/drivers/serial/sunhv.c
+++ b/drivers/serial/sunhv.c
@@ -184,8 +184,8 @@ static struct tty_struct *receive_chars(struct uart_port *port)
 {
        struct tty_struct *tty = NULL;
-        if (port->info != NULL)         /* Unopened serial console */
+        if (port->state != NULL)                /* Unopened serial console */
-                tty = port->info->port.tty;
+                tty = port->state->port.tty;
        if (sunhv_ops->receive_chars(port, tty))
                sun_do_break();
@@ -197,10 +197,10 @@ static void transmit_chars(struct uart_port *port)
 {
        struct circ_buf *xmit;
-        if (!port->info)
+        if (!port->state)
                return;
-        xmit = &port->info->xmit;
+        xmit = &port->state->xmit;
        if (uart_circ_empty(xmit) || uart_tx_stopped(port))
                return;
diff --git a/drivers/serial/sunsab.c b/drivers/serial/sunsab.c
index 0355efe115d9..d1ad34128635 100644
--- a/drivers/serial/sunsab.c
+++ b/drivers/serial/sunsab.c
@@ -117,8 +117,8 @@ receive_chars(struct uart_sunsab_port *up,
        int count = 0;
        int i;
-        if (up->port.info != NULL)              /* Unopened serial console */
+        if (up->port.state != NULL)             /* Unopened serial console */
-                tty = up->port.info->port.tty;
+                tty = up->port.state->port.tty;
        /* Read number of BYTES (Character + Status) available. */
        if (stat->sreg.isr0 & SAB82532_ISR0_RPF) {
@@ -229,7 +229,7 @@ static void sunsab_tx_idle(struct uart_sunsab_port *);
 static void transmit_chars(struct uart_sunsab_port *up,
                           union sab82532_irq_status *stat)
 {
-        struct circ_buf *xmit = &up->port.info->xmit;
+        struct circ_buf *xmit = &up->port.state->xmit;
        int i;
        if (stat->sreg.isr1 & SAB82532_ISR1_ALLS) {
@@ -297,7 +297,7 @@ static void check_status(struct uart_sunsab_port *up,
                up->port.icount.dsr++;
        }
-        wake_up_interruptible(&up->port.info->delta_msr_wait);
+        wake_up_interruptible(&up->port.state->port.delta_msr_wait);
 }
 static irqreturn_t sunsab_interrupt(int irq, void *dev_id)
@@ -429,7 +429,7 @@ static void sunsab_tx_idle(struct uart_sunsab_port *up)
 static void sunsab_start_tx(struct uart_port *port)
 {
        struct uart_sunsab_port *up = (struct uart_sunsab_port *) port;
-        struct circ_buf *xmit = &up->port.info->xmit;
+        struct circ_buf *xmit = &up->port.state->xmit;
        int i;
        up->interrupt_mask1 &= ~(SAB82532_IMR1_ALLS|SAB82532_IMR1_XPR);
diff --git a/drivers/serial/sunsu.c b/drivers/serial/sunsu.c
index 47c6837850b1..68d262b15749 100644
--- a/drivers/serial/sunsu.c
+++ b/drivers/serial/sunsu.c
@@ -311,7 +311,7 @@ static void sunsu_enable_ms(struct uart_port *port)
 static struct tty_struct *
 receive_chars(struct uart_sunsu_port *up, unsigned char *status)
 {
-        struct tty_struct *tty = up->port.info->port.tty;
+        struct tty_struct *tty = up->port.state->port.tty;
        unsigned char ch, flag;
        int max_count = 256;
        int saw_console_brk = 0;
@@ -389,7 +389,7 @@ receive_chars(struct uart_sunsu_port *up, unsigned char *status)
 static void transmit_chars(struct uart_sunsu_port *up)
 {
-        struct circ_buf *xmit = &up->port.info->xmit;
+        struct circ_buf *xmit = &up->port.state->xmit;
        int count;
        if (up->port.x_char) {
@@ -441,7 +441,7 @@ static void check_modem_status(struct uart_sunsu_port *up)
        if (status & UART_MSR_DCTS)
                uart_handle_cts_change(&up->port, status & UART_MSR_CTS);
-        wake_up_interruptible(&up->port.info->delta_msr_wait);
+        wake_up_interruptible(&up->port.state->port.delta_msr_wait);
 }
 static irqreturn_t sunsu_serial_interrupt(int irq, void *dev_id)
diff --git a/drivers/serial/sunzilog.c b/drivers/serial/sunzilog.c
index e09d3cebb4fb..ef693ae22e7f 100644
--- a/drivers/serial/sunzilog.c
+++ b/drivers/serial/sunzilog.c
@@ -328,9 +328,9 @@ sunzilog_receive_chars(struct uart_sunzilog_port *up,
        unsigned char ch, r1, flag;
        tty = NULL;
-        if (up->port.info != NULL &&            /* Unopened serial console */
+        if (up->port.state != NULL &&           /* Unopened serial console */
-            up->port.info->port.tty != NULL)    /* Keyboard || mouse */
+            up->port.state->port.tty != NULL)   /* Keyboard || mouse */
-                tty = up->port.info->port.tty;
+                tty = up->port.state->port.tty;
        for (;;) {
@@ -451,7 +451,7 @@ static void sunzilog_status_handle(struct uart_sunzilog_port *up,
                        uart_handle_cts_change(&up->port,
                                               (status & CTS));
-                wake_up_interruptible(&up->port.info->delta_msr_wait);
+                wake_up_interruptible(&up->port.state->port.delta_msr_wait);
        }
        up->prev_status = status;
@@ -501,9 +501,9 @@ static void sunzilog_transmit_chars(struct uart_sunzilog_port *up,
                return;
        }
-        if (up->port.info == NULL)
+        if (up->port.state == NULL)
                goto ack_tx_int;
-        xmit = &up->port.info->xmit;
+        xmit = &up->port.state->xmit;
        if (uart_circ_empty(xmit))
                goto ack_tx_int;
@@ -705,7 +705,7 @@ static void sunzilog_start_tx(struct uart_port *port)
                port->icount.tx++;
                port->x_char = 0;
        } else {
-                struct circ_buf *xmit = &port->info->xmit;
+                struct circ_buf *xmit = &port->state->xmit;
                writeb(xmit->buf[xmit->tail], &channel->data);
                ZSDELAY();
diff --git a/drivers/serial/timbuart.c b/drivers/serial/timbuart.c
index 063a313b755c..34b31da01d09 100644
--- a/drivers/serial/timbuart.c
+++ b/drivers/serial/timbuart.c
@@ -77,7 +77,7 @@ static void timbuart_flush_buffer(struct uart_port *port)
 static void timbuart_rx_chars(struct uart_port *port)
 {
-        struct tty_struct *tty = port->info->port.tty;
+        struct tty_struct *tty = port->state->port.tty;
        while (ioread32(port->membase + TIMBUART_ISR) & RXDP) {
                u8 ch = ioread8(port->membase + TIMBUART_RXFIFO);
@@ -86,7 +86,7 @@ static void timbuart_rx_chars(struct uart_port *port)
        }
        spin_unlock(&port->lock);
-        tty_flip_buffer_push(port->info->port.tty);
+        tty_flip_buffer_push(port->state->port.tty);
        spin_lock(&port->lock);
        dev_dbg(port->dev, "%s - total read %d bytes\n",
@@ -95,7 +95,7 @@ static void timbuart_rx_chars(struct uart_port *port)
 static void timbuart_tx_chars(struct uart_port *port)
 {
-        struct circ_buf *xmit = &port->info->xmit;
+        struct circ_buf *xmit = &port->state->xmit;
        while (!(ioread32(port->membase + TIMBUART_ISR) & TXBF) &&
                !uart_circ_empty(xmit)) {
@@ -118,7 +118,7 @@ static void timbuart_handle_tx_port(struct uart_port *port, u32 isr, u32 *ier)
 {
        struct timbuart_port *uart =
                container_of(port, struct timbuart_port, port);
-        struct circ_buf *xmit = &port->info->xmit;
+        struct circ_buf *xmit = &port->state->xmit;
        if (uart_circ_empty(xmit) || uart_tx_stopped(port))
                return;
@@ -231,7 +231,7 @@ static void timbuart_mctrl_check(struct uart_port *port, u32 isr, u32 *ier)
                iowrite32(CTS_DELTA, port->membase + TIMBUART_ISR);
                cts = timbuart_get_mctrl(port);
                uart_handle_cts_change(port, cts & TIOCM_CTS);
-                wake_up_interruptible(&port->info->delta_msr_wait);
+                wake_up_interruptible(&port->state->port.delta_msr_wait);
        }
        *ier |= CTS_DELTA;
diff --git a/drivers/serial/uartlite.c b/drivers/serial/uartlite.c
index 3317148a4b93..377f2712289e 100644
--- a/drivers/serial/uartlite.c
+++ b/drivers/serial/uartlite.c
@@ -75,7 +75,7 @@ static struct uart_port ulite_ports[ULITE_NR_UARTS];
 static int ulite_receive(struct uart_port *port, int stat)
 {
-        struct tty_struct *tty = port->info->port.tty;
+        struct tty_struct *tty = port->state->port.tty;
        unsigned char ch = 0;
        char flag = TTY_NORMAL;
@@ -125,7 +125,7 @@ static int ulite_receive(struct uart_port *port, int stat)
 static int ulite_transmit(struct uart_port *port, int stat)
 {
-        struct circ_buf *xmit  = &port->info->xmit;
+        struct circ_buf *xmit  = &port->state->xmit;
        if (stat & ULITE_STATUS_TXFULL)
                return 0;
@@ -154,17 +154,22 @@ static int ulite_transmit(struct uart_port *port, int stat)
 static irqreturn_t ulite_isr(int irq, void *dev_id)
 {
        struct uart_port *port = dev_id;
-        int busy;
+        int busy, n = 0;
        do {
                int stat = readb(port->membase + ULITE_STATUS);
                busy  = ulite_receive(port, stat);
                busy |= ulite_transmit(port, stat);
+                n++;
        } while (busy);
-        tty_flip_buffer_push(port->info->port.tty);
+        /* work done? */
+        if (n > 1) {
-        return IRQ_HANDLED;
+                tty_flip_buffer_push(port->state->port.tty);
+                return IRQ_HANDLED;
+        } else {
+                return IRQ_NONE;
+        }
 }
 static unsigned int ulite_tx_empty(struct uart_port *port)
@@ -221,7 +226,7 @@ static int ulite_startup(struct uart_port *port)
        int ret;
        ret = request_irq(port->irq, ulite_isr,
-                          IRQF_DISABLED | IRQF_SAMPLE_RANDOM, "uartlite", port);
+                          IRQF_SHARED | IRQF_SAMPLE_RANDOM, "uartlite", port);
        if (ret)
                return ret;
diff --git a/drivers/serial/ucc_uart.c b/drivers/serial/ucc_uart.c
index e945e780b5c9..0c08f286a2ef 100644
--- a/drivers/serial/ucc_uart.c
+++ b/drivers/serial/ucc_uart.c
@@ -327,7 +327,7 @@ static int qe_uart_tx_pump(struct uart_qe_port *qe_port)
        unsigned char *p;
        unsigned int count;
        struct uart_port *port = &qe_port->port;
-        struct circ_buf *xmit = &port->info->xmit;
+        struct circ_buf *xmit = &port->state->xmit;
        bdp = qe_port->rx_cur;
@@ -466,7 +466,7 @@ static void qe_uart_int_rx(struct uart_qe_port *qe_port)
        int i;
        unsigned char ch, *cp;
        struct uart_port *port = &qe_port->port;
-        struct tty_struct *tty = port->info->port.tty;
+        struct tty_struct *tty = port->state->port.tty;
        struct qe_bd *bdp;
        u16 status;
        unsigned int flg;
diff --git a/drivers/serial/vr41xx_siu.c b/drivers/serial/vr41xx_siu.c
index dac550e57c29..3beb6ab4fa68 100644
--- a/drivers/serial/vr41xx_siu.c
+++ b/drivers/serial/vr41xx_siu.c
@@ -318,7 +318,7 @@ static inline void receive_chars(struct uart_port *port, uint8_t *status)
        char flag;
        int max_count = RX_MAX_COUNT;
-        tty = port->info->port.tty;
+        tty = port->state->port.tty;
        lsr = *status;
        do {
@@ -386,7 +386,7 @@ static inline void check_modem_status(struct uart_port *port)
        if (msr & UART_MSR_DCTS)
                uart_handle_cts_change(port, msr & UART_MSR_CTS);
-        wake_up_interruptible(&port->info->delta_msr_wait);
+        wake_up_interruptible(&port->state->port.delta_msr_wait);
 }
 static inline void transmit_chars(struct uart_port *port)
@@ -394,7 +394,7 @@ static inline void transmit_chars(struct uart_port *port)
        struct circ_buf *xmit;
        int max_count = TX_MAX_COUNT;
-        xmit = &port->info->xmit;
+        xmit = &port->state->xmit;
        if (port->x_char) {
                siu_write(port, UART_TX, port->x_char);
diff --git a/drivers/serial/zs.c b/drivers/serial/zs.c
index d8c2809b1ab6..1a7fd3e70315 100644
--- a/drivers/serial/zs.c
+++ b/drivers/serial/zs.c
@@ -602,12 +602,12 @@ static void zs_receive_chars(struct zs_port *zport)
                uart_insert_char(uport, status, Rx_OVR, ch, flag);
        }
-        tty_flip_buffer_push(uport->info->port.tty);
+        tty_flip_buffer_push(uport->state->port.tty);
 }
 static void zs_raw_transmit_chars(struct zs_port *zport)
 {
-        struct circ_buf *xmit = &zport->port.info->xmit;
+        struct circ_buf *xmit = &zport->port.state->xmit;
        /* XON/XOFF chars.  */
        if (zport->port.x_char) {
@@ -686,7 +686,7 @@ static void zs_status_handle(struct zs_port *zport, struct zs_port *zport_a)
                        uport->icount.rng++;
                if (delta)
-                        wake_up_interruptible(&uport->info->delta_msr_wait);
+                        wake_up_interruptible(&uport->state->port.delta_msr_wait);
                spin_lock(&scc->zlock);
        }
diff --git a/drivers/staging/iio/industrialio-core.c b/drivers/staging/iio/industrialio-core.c
index 660a9c1a1f3f..1fa18f255814 100644
--- a/drivers/staging/iio/industrialio-core.c
+++ b/drivers/staging/iio/industrialio-core.c
@@ -39,14 +39,14 @@ dev_t iio_devt;
 EXPORT_SYMBOL(iio_devt);
 #define IIO_DEV_MAX 256
-static char *iio_nodename(struct device *dev)
+static char *iio_devnode(struct device *dev, mode_t *mode)
 {
        return kasprintf(GFP_KERNEL, "iio/%s", dev_name(dev));
 }
 struct class iio_class = {
        .name = "iio",
-        .nodename = iio_nodename,
+        .devnode = iio_devnode,
 };
 EXPORT_SYMBOL(iio_class);
diff --git a/drivers/usb/class/cdc-acm.c b/drivers/usb/class/cdc-acm.c
index 2bfc41ece0e1..85a1a55815cf 100644
--- a/drivers/usb/class/cdc-acm.c
+++ b/drivers/usb/class/cdc-acm.c
@@ -858,10 +858,7 @@ static void acm_tty_set_termios(struct tty_struct *tty,
        if (!ACM_READY(acm))
                return;
-        /* FIXME: Needs to support the tty_baud interface */
+        newline.dwDTERate = cpu_to_le32(tty_get_baud_rate(tty));
-        /* FIXME: Broken on sparc */
-        newline.dwDTERate = cpu_to_le32p(acm_tty_speed +
-                (termios->c_cflag & CBAUD & ~CBAUDEX) + (termios->c_cflag & CBAUDEX ? 15 : 0));
        newline.bCharFormat = termios->c_cflag & CSTOPB ? 2 : 0;
        newline.bParityType = termios->c_cflag & PARENB ?
                                (termios->c_cflag & PARODD ? 1 : 2) +
diff --git a/drivers/usb/class/usblp.c b/drivers/usb/class/usblp.c
index 26c09f0257db..9bc112ee7803 100644
--- a/drivers/usb/class/usblp.c
+++ b/drivers/usb/class/usblp.c
@@ -1057,14 +1057,14 @@ static const struct file_operations usblp_fops = {
        .release =      usblp_release,
 };
-static char *usblp_nodename(struct device *dev)
+static char *usblp_devnode(struct device *dev, mode_t *mode)
 {
        return kasprintf(GFP_KERNEL, "usb/%s", dev_name(dev));
 }
 static struct usb_class_driver usblp_class = {
        .name =         "lp%d",
-        .nodename =     usblp_nodename,
+        .devnode =      usblp_devnode,
        .fops =         &usblp_fops,
        .minor_base =   USBLP_MINOR_BASE,
 };
diff --git a/drivers/usb/core/file.c b/drivers/usb/core/file.c
index 5cef88929b3e..222ee07ea680 100644
--- a/drivers/usb/core/file.c
+++ b/drivers/usb/core/file.c
@@ -67,14 +67,14 @@ static struct usb_class {
        struct class *class;
 } *usb_class;
-static char *usb_nodename(struct device *dev)
+static char *usb_devnode(struct device *dev, mode_t *mode)
 {
        struct usb_class_driver *drv;
        drv = dev_get_drvdata(dev);
-        if (!drv || !drv->nodename)
+        if (!drv || !drv->devnode)
                return NULL;
-        return drv->nodename(dev);
+        return drv->devnode(dev, mode);
 }
 static int init_usb_class(void)
@@ -100,7 +100,7 @@ static int init_usb_class(void)
                kfree(usb_class);
                usb_class = NULL;
        }
-        usb_class->class->nodename = usb_nodename;
+        usb_class->class->devnode = usb_devnode;
 exit:
        return result;
diff --git a/drivers/usb/core/usb.c b/drivers/usb/core/usb.c
index a26f73880c32..43ee943d757a 100644
--- a/drivers/usb/core/usb.c
+++ b/drivers/usb/core/usb.c
@@ -311,7 +311,7 @@ static struct dev_pm_ops usb_device_pm_ops = {
 #endif  /* CONFIG_PM */
-static char *usb_nodename(struct device *dev)
+static char *usb_devnode(struct device *dev, mode_t *mode)
 {
        struct usb_device *usb_dev;
@@ -324,7 +324,7 @@ struct device_type usb_device_type = {
        .name =         "usb_device",
        .release =      usb_release_dev,
        .uevent =       usb_dev_uevent,
-        .nodename =     usb_nodename,
+        .devnode =      usb_devnode,
        .pm =           &usb_device_pm_ops,
 };
diff --git a/drivers/usb/misc/iowarrior.c b/drivers/usb/misc/iowarrior.c
index 90e1a8dedfa9..e75bb87ee92b 100644
--- a/drivers/usb/misc/iowarrior.c
+++ b/drivers/usb/misc/iowarrior.c
@@ -727,7 +727,7 @@ static const struct file_operations iowarrior_fops = {
        .poll = iowarrior_poll,
 };
-static char *iowarrior_nodename(struct device *dev)
+static char *iowarrior_devnode(struct device *dev, mode_t *mode)
 {
        return kasprintf(GFP_KERNEL, "usb/%s", dev_name(dev));
 }
@@ -738,7 +738,7 @@ static char *iowarrior_nodename(struct device *dev)
 */
 static struct usb_class_driver iowarrior_class = {
        .name = "iowarrior%d",
-        .nodename = iowarrior_nodename,
+        .devnode = iowarrior_devnode,
        .fops = &iowarrior_fops,
        .minor_base = IOWARRIOR_MINOR_BASE,
 };
diff --git a/drivers/usb/misc/legousbtower.c b/drivers/usb/misc/legousbtower.c
index c1e2433f640d..97efeaec4d52 100644
--- a/drivers/usb/misc/legousbtower.c
+++ b/drivers/usb/misc/legousbtower.c
@@ -266,7 +266,7 @@ static const struct file_operations tower_fops = {
        .llseek =       tower_llseek,
 };
-static char *legousbtower_nodename(struct device *dev)
+static char *legousbtower_devnode(struct device *dev, mode_t *mode)
 {
        return kasprintf(GFP_KERNEL, "usb/%s", dev_name(dev));
 }
@@ -277,7 +277,7 @@ static char *legousbtower_nodename(struct device *dev)
 */
 static struct usb_class_driver tower_class = {
        .name =         "legousbtower%d",
-        .nodename =     legousbtower_nodename,
+        .devnode =      legousbtower_devnode,
        .fops =         &tower_fops,
        .minor_base =   LEGO_USB_TOWER_MINOR_BASE,
 };
diff --git a/drivers/usb/serial/ark3116.c b/drivers/usb/serial/ark3116.c
index aec61880f36c..5d25d3e52bf6 100644
--- a/drivers/usb/serial/ark3116.c
+++ b/drivers/usb/serial/ark3116.c
@@ -35,11 +35,6 @@ static struct usb_device_id id_table [] = {
 };
 MODULE_DEVICE_TABLE(usb, id_table);
-struct ark3116_private {
-        spinlock_t lock;
-        u8 termios_initialized;
-};
 static inline void ARK3116_SND(struct usb_serial *serial, int seq,
                               __u8 request, __u8 requesttype,
                               __u16 value, __u16 index)
@@ -82,22 +77,11 @@ static inline void ARK3116_RCV_QUIET(struct usb_serial *serial,
 static int ark3116_attach(struct usb_serial *serial)
 {
        char *buf;
-        struct ark3116_private *priv;
-        int i;
-        for (i = 0; i < serial->num_ports; ++i) {
-                priv = kzalloc(sizeof(struct ark3116_private), GFP_KERNEL);
-                if (!priv)
-                        goto cleanup;
-                spin_lock_init(&priv->lock);
-                usb_set_serial_port_data(serial->port[i], priv);
-        }
        buf = kmalloc(1, GFP_KERNEL);
        if (!buf) {
                dbg("error kmalloc -> out of mem?");
-                goto cleanup;
+                return -ENOMEM;
        }
        /* 3 */
@@ -149,13 +133,16 @@ static int ark3116_attach(struct usb_serial *serial)
        kfree(buf);
        return 0;
+}
-cleanup:
+static void ark3116_init_termios(struct tty_struct *tty)
-        for (--i; i >= 0; --i) {
+{
-                kfree(usb_get_serial_port_data(serial->port[i]));
+        struct ktermios *termios = tty->termios;
-                usb_set_serial_port_data(serial->port[i], NULL);
+        *termios = tty_std_termios;
-        }
+        termios->c_cflag = B9600 | CS8
-        return -ENOMEM;
+                                      | CREAD | HUPCL | CLOCAL;
+        termios->c_ispeed = 9600;
+        termios->c_ospeed = 9600;
 }
 static void ark3116_set_termios(struct tty_struct *tty,
@@ -163,10 +150,8 @@ static void ark3116_set_termios(struct tty_struct *tty,
                                struct ktermios *old_termios)
 {
        struct usb_serial *serial = port->serial;
-        struct ark3116_private *priv = usb_get_serial_port_data(port);
        struct ktermios *termios = tty->termios;
        unsigned int cflag = termios->c_cflag;
-        unsigned long flags;
        int baud;
        int ark3116_baud;
        char *buf;
@@ -176,16 +161,6 @@ static void ark3116_set_termios(struct tty_struct *tty,
        dbg("%s - port %d", __func__, port->number);
-        spin_lock_irqsave(&priv->lock, flags);
-        if (!priv->termios_initialized) {
-                *termios = tty_std_termios;
-                termios->c_cflag = B9600 | CS8
-                                              | CREAD | HUPCL | CLOCAL;
-                termios->c_ispeed = 9600;
-                termios->c_ospeed = 9600;
-                priv->termios_initialized = 1;
-        }
-        spin_unlock_irqrestore(&priv->lock, flags);
        cflag = termios->c_cflag;
        termios->c_cflag &= ~(CMSPAR|CRTSCTS);
@@ -318,8 +293,7 @@ static void ark3116_set_termios(struct tty_struct *tty,
        return;
 }
-static int ark3116_open(struct tty_struct *tty, struct usb_serial_port *port,
+static int ark3116_open(struct tty_struct *tty, struct usb_serial_port *port)
-                                        struct file *filp)
 {
        struct ktermios tmp_termios;
        struct usb_serial *serial = port->serial;
@@ -334,7 +308,7 @@ static int ark3116_open(struct tty_struct *tty, struct usb_serial_port *port,
                return -ENOMEM;
        }
-        result = usb_serial_generic_open(tty, port, filp);
+        result = usb_serial_generic_open(tty, port);
        if (result)
                goto err_out;
@@ -455,6 +429,7 @@ static struct usb_serial_driver ark3116_device = {
        .num_ports =            1,
        .attach =               ark3116_attach,
        .set_termios =          ark3116_set_termios,
+        .init_termios =         ark3116_init_termios,
        .ioctl =                ark3116_ioctl,
        .tiocmget =             ark3116_tiocmget,
        .open =                 ark3116_open,
diff --git a/drivers/usb/serial/belkin_sa.c b/drivers/usb/serial/belkin_sa.c
index 7033b031b443..a0467bc61627 100644
--- a/drivers/usb/serial/belkin_sa.c
+++ b/drivers/usb/serial/belkin_sa.c
@@ -92,7 +92,7 @@ static int debug;
 static int  belkin_sa_startup(struct usb_serial *serial);
 static void belkin_sa_release(struct usb_serial *serial);
 static int  belkin_sa_open(struct tty_struct *tty,
-                        struct usb_serial_port *port, struct file *filp);
+                        struct usb_serial_port *port);
 static void belkin_sa_close(struct usb_serial_port *port);
 static void belkin_sa_read_int_callback(struct urb *urb);
 static void belkin_sa_set_termios(struct tty_struct *tty,
@@ -213,7 +213,7 @@ static void belkin_sa_release(struct usb_serial *serial)
 static int  belkin_sa_open(struct tty_struct *tty,
-                        struct usb_serial_port *port, struct file *filp)
+                                        struct usb_serial_port *port)
 {
        int retval = 0;
diff --git a/drivers/usb/serial/ch341.c b/drivers/usb/serial/ch341.c
index 2830766f5b39..8c894a7d5dcf 100644
--- a/drivers/usb/serial/ch341.c
+++ b/drivers/usb/serial/ch341.c
@@ -300,8 +300,7 @@ static void ch341_close(struct usb_serial_port *port)
 /* open this device, set default parameters */
-static int ch341_open(struct tty_struct *tty, struct usb_serial_port *port,
+static int ch341_open(struct tty_struct *tty, struct usb_serial_port *port)
-                                struct file *filp)
 {
        struct usb_serial *serial = port->serial;
        struct ch341_private *priv = usb_get_serial_port_data(serial->port[0]);
@@ -333,7 +332,7 @@ static int ch341_open(struct tty_struct *tty, struct usb_serial_port *port,
                return -EPROTO;
        }
-        r = usb_serial_generic_open(tty, port, filp);
+        r = usb_serial_generic_open(tty, port);
 out:    return r;
 }
diff --git a/drivers/usb/serial/console.c b/drivers/usb/serial/console.c
index 0e4f2e41ace5..b22ac3258523 100644
--- a/drivers/usb/serial/console.c
+++ b/drivers/usb/serial/console.c
@@ -16,6 +16,7 @@
 #include <linux/slab.h>
 #include <linux/tty.h>
 #include <linux/console.h>
+#include <linux/serial.h>
 #include <linux/usb.h>
 #include <linux/usb/serial.h>
@@ -63,7 +64,7 @@ static int usb_console_setup(struct console *co, char *options)
        char *s;
        struct usb_serial *serial;
        struct usb_serial_port *port;
-        int retval = 0;
+        int retval;
        struct tty_struct *tty = NULL;
        struct ktermios *termios = NULL, dummy;
@@ -116,13 +117,17 @@ static int usb_console_setup(struct console *co, char *options)
                return -ENODEV;
        }
-        port = serial->port[0];
+        retval = usb_autopm_get_interface(serial->interface);
+        if (retval)
+                goto error_get_interface;
+        port = serial->port[co->index - serial->minor];
        tty_port_tty_set(&port->port, NULL);
        info->port = port;
        ++port->port.count;
-        if (port->port.count == 1) {
+        if (!test_bit(ASYNCB_INITIALIZED, &port->port.flags)) {
                if (serial->type->set_termios) {
                        /*
                         * allocate a fake tty so the driver can initialize
@@ -150,9 +155,9 @@ static int usb_console_setup(struct console *co, char *options)
                /* only call the device specific open if this
                 * is the first time the port is opened */
                if (serial->type->open)
-                        retval = serial->type->open(NULL, port, NULL);
+                        retval = serial->type->open(NULL, port);
                else
-                        retval = usb_serial_generic_open(NULL, port, NULL);
+                        retval = usb_serial_generic_open(NULL, port);
                if (retval) {
                        err("could not open USB console port");
@@ -168,6 +173,7 @@ static int usb_console_setup(struct console *co, char *options)
                        kfree(termios);
                        kfree(tty);
                }
+                set_bit(ASYNCB_INITIALIZED, &port->port.flags);
        }
        /* Now that any required fake tty operations are completed restore
         * the tty port count */
@@ -175,18 +181,22 @@ static int usb_console_setup(struct console *co, char *options)
        /* The console is special in terms of closing the device so
         * indicate this port is now acting as a system console. */
        port->console = 1;
-        retval = 0;
-out:
+        mutex_unlock(&serial->disc_mutex);
        return retval;
-free_termios:
+ free_termios:
        kfree(termios);
        tty_port_tty_set(&port->port, NULL);
-free_tty:
+ free_tty:
        kfree(tty);
-reset_open_count:
+ reset_open_count:
        port->port.count = 0;
-        goto out;
+        usb_autopm_put_interface(serial->interface);
+ error_get_interface:
+        usb_serial_put(serial);
+        mutex_unlock(&serial->disc_mutex);
+        return retval;
 }
 static void usb_console_write(struct console *co,
diff --git a/drivers/usb/serial/cp210x.c b/drivers/usb/serial/cp210x.c
index 985cbcf48bda..4a208fe85bc9 100644
--- a/drivers/usb/serial/cp210x.c
+++ b/drivers/usb/serial/cp210x.c
@@ -33,8 +33,7 @@
 /*
 * Function Prototypes
 */
-static int cp210x_open(struct tty_struct *, struct usb_serial_port *,
+static int cp210x_open(struct tty_struct *tty, struct usb_serial_port *);
-                                                        struct file *);
 static void cp210x_cleanup(struct usb_serial_port *);
 static void cp210x_close(struct usb_serial_port *);
 static void cp210x_get_termios(struct tty_struct *,
@@ -368,8 +367,7 @@ static unsigned int cp210x_quantise_baudrate(unsigned int baud) {
        return baud;
 }
-static int cp210x_open(struct tty_struct *tty, struct usb_serial_port *port,
+static int cp210x_open(struct tty_struct *tty, struct usb_serial_port *port)
-                                struct file *filp)
 {
        struct usb_serial *serial = port->serial;
        int result;
@@ -399,12 +397,6 @@ static int cp210x_open(struct tty_struct *tty, struct usb_serial_port *port,
        /* Configure the termios structure */
        cp210x_get_termios(tty, port);
-        /* Set the DTR and RTS pins low */
-        cp210x_tiocmset_port(tty ? (struct usb_serial_port *) tty->driver_data
-                        : port,
-                NULL, TIOCM_DTR | TIOCM_RTS, 0);
        return 0;
 }
diff --git a/drivers/usb/serial/cyberjack.c b/drivers/usb/serial/cyberjack.c
index 336523fd7366..b0f6402a91ca 100644
--- a/drivers/usb/serial/cyberjack.c
+++ b/drivers/usb/serial/cyberjack.c
@@ -61,7 +61,7 @@ static int cyberjack_startup(struct usb_serial *serial);
 static void cyberjack_disconnect(struct usb_serial *serial);
 static void cyberjack_release(struct usb_serial *serial);
 static int  cyberjack_open(struct tty_struct *tty,
-                        struct usb_serial_port *port, struct file *filp);
+        struct usb_serial_port *port);
 static void cyberjack_close(struct usb_serial_port *port);
 static int cyberjack_write(struct tty_struct *tty,
        struct usb_serial_port *port, const unsigned char *buf, int count);
@@ -173,7 +173,7 @@ static void cyberjack_release(struct usb_serial *serial)
 }
 static int  cyberjack_open(struct tty_struct *tty,
-                        struct usb_serial_port *port, struct file *filp)
+                                        struct usb_serial_port *port)
 {
        struct cyberjack_private *priv;
        unsigned long flags;
diff --git a/drivers/usb/serial/cypress_m8.c b/drivers/usb/serial/cypress_m8.c
index 59adfe123110..e0a8b715f2f2 100644
--- a/drivers/usb/serial/cypress_m8.c
+++ b/drivers/usb/serial/cypress_m8.c
@@ -172,8 +172,7 @@ static int  cypress_earthmate_startup(struct usb_serial *serial);
 static int  cypress_hidcom_startup(struct usb_serial *serial);
 static int  cypress_ca42v2_startup(struct usb_serial *serial);
 static void cypress_release(struct usb_serial *serial);
-static int  cypress_open(struct tty_struct *tty,
+static int  cypress_open(struct tty_struct *tty, struct usb_serial_port *port);
-                        struct usb_serial_port *port, struct file *filp);
 static void cypress_close(struct usb_serial_port *port);
 static void cypress_dtr_rts(struct usb_serial_port *port, int on);
 static int  cypress_write(struct tty_struct *tty, struct usb_serial_port *port,
@@ -633,8 +632,7 @@ static void cypress_release(struct usb_serial *serial)
 }
-static int cypress_open(struct tty_struct *tty,
+static int cypress_open(struct tty_struct *tty, struct usb_serial_port *port)
-                        struct usb_serial_port *port, struct file *filp)
 {
        struct cypress_private *priv = usb_get_serial_port_data(port);
        struct usb_serial *serial = port->serial;
@@ -659,15 +657,7 @@ static int cypress_open(struct tty_struct *tty,
        spin_unlock_irqrestore(&priv->lock, flags);
        /* Set termios */
-        result = cypress_write(tty, port, NULL, 0);
+        cypress_send(port);
-        if (result) {
-                dev_err(&port->dev,
-                        "%s - failed setting the control lines - error %d\n",
-                                                        __func__, result);
-                return result;
-        } else
-                dbg("%s - success setting the control lines", __func__);
        if (tty)
                cypress_set_termios(tty, port, &priv->tmp_termios);
@@ -1005,6 +995,8 @@ static void cypress_set_termios(struct tty_struct *tty,
        dbg("%s - port %d", __func__, port->number);
        spin_lock_irqsave(&priv->lock, flags);
+        /* We can't clean this one up as we don't know the device type
+           early enough */
        if (!priv->termios_initialized) {
                if (priv->chiptype == CT_EARTHMATE) {
                        *(tty->termios) = tty_std_termios;
diff --git a/drivers/usb/serial/digi_acceleport.c b/drivers/usb/serial/digi_acceleport.c
index f4808091c47c..ab3dd991586b 100644
--- a/drivers/usb/serial/digi_acceleport.c
+++ b/drivers/usb/serial/digi_acceleport.c
@@ -453,8 +453,7 @@ static int digi_write(struct tty_struct *tty, struct usb_serial_port *port,
 static void digi_write_bulk_callback(struct urb *urb);
 static int digi_write_room(struct tty_struct *tty);
 static int digi_chars_in_buffer(struct tty_struct *tty);
-static int digi_open(struct tty_struct *tty, struct usb_serial_port *port,
+static int digi_open(struct tty_struct *tty, struct usb_serial_port *port);
-        struct file *filp);
 static void digi_close(struct usb_serial_port *port);
 static int digi_carrier_raised(struct usb_serial_port *port);
 static void digi_dtr_rts(struct usb_serial_port *port, int on);
@@ -1347,8 +1346,7 @@ static int digi_carrier_raised(struct usb_serial_port *port)
        return 0;
 }
-static int digi_open(struct tty_struct *tty, struct usb_serial_port *port,
+static int digi_open(struct tty_struct *tty, struct usb_serial_port *port)
-                                struct file *filp)
 {
        int ret;
        unsigned char buf[32];
diff --git a/drivers/usb/serial/empeg.c b/drivers/usb/serial/empeg.c
index 80cb3471adbe..33c9e9cf9eb2 100644
--- a/drivers/usb/serial/empeg.c
+++ b/drivers/usb/serial/empeg.c
@@ -79,8 +79,7 @@ static int debug;
 #define EMPEG_PRODUCT_ID                0x0001
 /* function prototypes for an empeg-car player */
-static int  empeg_open(struct tty_struct *tty, struct usb_serial_port *port,
+static int  empeg_open(struct tty_struct *tty, struct usb_serial_port *port);
-                                                struct file *filp);
 static void empeg_close(struct usb_serial_port *port);
 static int  empeg_write(struct tty_struct *tty, struct usb_serial_port *port,
                                                const unsigned char *buf,
@@ -90,8 +89,7 @@ static int  empeg_chars_in_buffer(struct tty_struct *tty);
 static void empeg_throttle(struct tty_struct *tty);
 static void empeg_unthrottle(struct tty_struct *tty);
 static int  empeg_startup(struct usb_serial *serial);
-static void empeg_set_termios(struct tty_struct *tty,
+static void empeg_init_termios(struct tty_struct *tty);
-                struct usb_serial_port *port, struct ktermios *old_termios);
 static void empeg_write_bulk_callback(struct urb *urb);
 static void empeg_read_bulk_callback(struct urb *urb);
@@ -123,7 +121,7 @@ static struct usb_serial_driver empeg_device = {
        .throttle =             empeg_throttle,
        .unthrottle =           empeg_unthrottle,
        .attach =               empeg_startup,
-        .set_termios =          empeg_set_termios,
+        .init_termios =         empeg_init_termios,
        .write =                empeg_write,
        .write_room =           empeg_write_room,
        .chars_in_buffer =      empeg_chars_in_buffer,
@@ -142,17 +140,13 @@ static int		bytes_out;
 /******************************************************************************
 * Empeg specific driver functions
 ******************************************************************************/
-static int empeg_open(struct tty_struct *tty, struct usb_serial_port *port,
+static int empeg_open(struct tty_struct *tty,struct usb_serial_port *port)
-                                struct file *filp)
 {
        struct usb_serial *serial = port->serial;
        int result = 0;
        dbg("%s - port %d", __func__, port->number);
-        /* Force default termio settings */
-        empeg_set_termios(tty, port, NULL) ;
        bytes_in = 0;
        bytes_out = 0;
@@ -425,11 +419,9 @@ static int  empeg_startup(struct usb_serial *serial)
 }
-static void empeg_set_termios(struct tty_struct *tty,
+static void empeg_init_termios(struct tty_struct *tty)
-                struct usb_serial_port *port, struct ktermios *old_termios)
 {
        struct ktermios *termios = tty->termios;
-        dbg("%s - port %d", __func__, port->number);
        /*
         * The empeg-car player wants these particular tty settings.
diff --git a/drivers/usb/serial/ftdi_sio.c b/drivers/usb/serial/ftdi_sio.c
index 8fec5d4455c9..76a17f915eef 100644
--- a/drivers/usb/serial/ftdi_sio.c
+++ b/drivers/usb/serial/ftdi_sio.c
@@ -747,8 +747,7 @@ static int  ftdi_sio_probe(struct usb_serial *serial,
                                        const struct usb_device_id *id);
 static int  ftdi_sio_port_probe(struct usb_serial_port *port);
 static int  ftdi_sio_port_remove(struct usb_serial_port *port);
-static int  ftdi_open(struct tty_struct *tty,
+static int  ftdi_open(struct tty_struct *tty, struct usb_serial_port *port);
-                        struct usb_serial_port *port, struct file *filp);
 static void ftdi_close(struct usb_serial_port *port);
 static void ftdi_dtr_rts(struct usb_serial_port *port, int on);
 static int  ftdi_write(struct tty_struct *tty, struct usb_serial_port *port,
@@ -1680,8 +1679,7 @@ static int ftdi_sio_port_remove(struct usb_serial_port *port)
        return 0;
 }
-static int ftdi_open(struct tty_struct *tty,
+static int ftdi_open(struct tty_struct *tty, struct usb_serial_port *port)
-                        struct usb_serial_port *port, struct file *filp)
 { /* ftdi_open */
        struct usb_device *dev = port->serial->dev;
        struct ftdi_private *priv = usb_get_serial_port_data(port);
diff --git a/drivers/usb/serial/garmin_gps.c b/drivers/usb/serial/garmin_gps.c
index 8839f1c70b7f..20432d345529 100644
--- a/drivers/usb/serial/garmin_gps.c
+++ b/drivers/usb/serial/garmin_gps.c
@@ -933,8 +933,7 @@ static int garmin_init_session(struct usb_serial_port *port)
-static int garmin_open(struct tty_struct *tty,
+static int garmin_open(struct tty_struct *tty, struct usb_serial_port *port)
-                        struct usb_serial_port *port, struct file *filp)
 {
        unsigned long flags;
        int status = 0;
diff --git a/drivers/usb/serial/generic.c b/drivers/usb/serial/generic.c
index ce57f6a32bdf..d9398e9f30ce 100644
--- a/drivers/usb/serial/generic.c
+++ b/drivers/usb/serial/generic.c
@@ -114,8 +114,7 @@ void usb_serial_generic_deregister(void)
 #endif
 }
-int usb_serial_generic_open(struct tty_struct *tty,
+int usb_serial_generic_open(struct tty_struct *tty, struct usb_serial_port *port)
-                        struct usb_serial_port *port, struct file *filp)
 {
        struct usb_serial *serial = port->serial;
        int result = 0;
diff --git a/drivers/usb/serial/io_edgeport.c b/drivers/usb/serial/io_edgeport.c
index 0191693625d6..dc0f832657e6 100644
--- a/drivers/usb/serial/io_edgeport.c
+++ b/drivers/usb/serial/io_edgeport.c
@@ -205,8 +205,7 @@ static void edge_bulk_out_data_callback(struct urb *urb);
 static void edge_bulk_out_cmd_callback(struct urb *urb);
 /* function prototypes for the usbserial callbacks */
-static int edge_open(struct tty_struct *tty, struct usb_serial_port *port,
+static int edge_open(struct tty_struct *tty, struct usb_serial_port *port);
-                                        struct file *filp);
 static void edge_close(struct usb_serial_port *port);
 static int edge_write(struct tty_struct *tty, struct usb_serial_port *port,
                                        const unsigned char *buf, int count);
@@ -852,8 +851,7 @@ static void edge_bulk_out_cmd_callback(struct urb *urb)
 *      If successful, we return 0
 *      Otherwise we return a negative error number.
 *****************************************************************************/
-static int edge_open(struct tty_struct *tty,
+static int edge_open(struct tty_struct *tty, struct usb_serial_port *port)
-                        struct usb_serial_port *port, struct file *filp)
 {
        struct edgeport_port *edge_port = usb_get_serial_port_data(port);
        struct usb_serial *serial;
diff --git a/drivers/usb/serial/io_ti.c b/drivers/usb/serial/io_ti.c
index e8bc42f92e79..d4cc0f7af400 100644
--- a/drivers/usb/serial/io_ti.c
+++ b/drivers/usb/serial/io_ti.c
@@ -1831,8 +1831,7 @@ static void edge_bulk_out_callback(struct urb *urb)
        tty_kref_put(tty);
 }
-static int edge_open(struct tty_struct *tty,
+static int edge_open(struct tty_struct *tty, struct usb_serial_port *port)
-                        struct usb_serial_port *port, struct file *filp)
 {
        struct edgeport_port *edge_port = usb_get_serial_port_data(port);
        struct edgeport_serial *edge_serial;
diff --git a/drivers/usb/serial/ipaq.c b/drivers/usb/serial/ipaq.c
index 2545d45ce16f..24fcc64b837d 100644
--- a/drivers/usb/serial/ipaq.c
+++ b/drivers/usb/serial/ipaq.c
@@ -75,7 +75,7 @@ static int initial_wait;
 /* Function prototypes for an ipaq */
 static int  ipaq_open(struct tty_struct *tty,
-                        struct usb_serial_port *port, struct file *filp);
+                        struct usb_serial_port *port);
 static void ipaq_close(struct usb_serial_port *port);
 static int  ipaq_calc_num_ports(struct usb_serial *serial);
 static int  ipaq_startup(struct usb_serial *serial);
@@ -587,7 +587,7 @@ static int		bytes_in;
 static int              bytes_out;
 static int ipaq_open(struct tty_struct *tty,
-                        struct usb_serial_port *port, struct file *filp)
+                        struct usb_serial_port *port)
 {
        struct usb_serial       *serial = port->serial;
        struct ipaq_private     *priv;
@@ -628,11 +628,6 @@ static int ipaq_open(struct tty_struct *tty,
                priv->free_len += PACKET_SIZE;
        }
-        if (tty) {
-                /* FIXME: These two are bogus */
-                tty->raw = 1;
-                tty->real_raw = 1;
-        }
        /*
         * Lose the small buffers usbserial provides. Make larger ones.
         */
diff --git a/drivers/usb/serial/ipw.c b/drivers/usb/serial/ipw.c
index 29ad038b9c8d..727d323f092a 100644
--- a/drivers/usb/serial/ipw.c
+++ b/drivers/usb/serial/ipw.c
@@ -193,8 +193,7 @@ static void ipw_read_bulk_callback(struct urb *urb)
        return;
 }
-static int ipw_open(struct tty_struct *tty,
+static int ipw_open(struct tty_struct *tty, struct usb_serial_port *port)
-                        struct usb_serial_port *port, struct file *filp)
 {
        struct usb_device *dev = port->serial->dev;
        u8 buf_flow_static[16] = IPW_BYTES_FLOWINIT;
diff --git a/drivers/usb/serial/ir-usb.c b/drivers/usb/serial/ir-usb.c
index 66009b6b763a..95d8d26b9a44 100644
--- a/drivers/usb/serial/ir-usb.c
+++ b/drivers/usb/serial/ir-usb.c
@@ -86,8 +86,7 @@ static int buffer_size;
 static int xbof = -1;
 static int  ir_startup (struct usb_serial *serial);
-static int  ir_open(struct tty_struct *tty, struct usb_serial_port *port,
+static int  ir_open(struct tty_struct *tty, struct usb_serial_port *port);
-                                        struct file *filep);
 static void ir_close(struct usb_serial_port *port);
 static int  ir_write(struct tty_struct *tty, struct usb_serial_port *port,
                                        const unsigned char *buf, int count);
@@ -296,8 +295,7 @@ static int ir_startup(struct usb_serial *serial)
        return 0;
 }
-static int ir_open(struct tty_struct *tty,
+static int ir_open(struct tty_struct *tty, struct usb_serial_port *port)
-                        struct usb_serial_port *port, struct file *filp)
 {
        char *buffer;
        int result = 0;
diff --git a/drivers/usb/serial/iuu_phoenix.c b/drivers/usb/serial/iuu_phoenix.c
index 96873a7a32b0..6138c1cda35f 100644
--- a/drivers/usb/serial/iuu_phoenix.c
+++ b/drivers/usb/serial/iuu_phoenix.c
@@ -71,7 +71,6 @@ struct iuu_private {
        spinlock_t lock;        /* store irq state */
        wait_queue_head_t delta_msr_wait;
        u8 line_status;
-        u8 termios_initialized;
        int tiostatus;          /* store IUART SIGNAL for tiocmget call */
        u8 reset;               /* if 1 reset is needed */
        int poll;               /* number of poll */
@@ -1018,14 +1017,24 @@ static void iuu_close(struct usb_serial_port *port)
        }
 }
-static int iuu_open(struct tty_struct *tty,
+static void iuu_init_termios(struct tty_struct *tty)
-                        struct usb_serial_port *port, struct file *filp)
+{
+        *(tty->termios) = tty_std_termios;
+        tty->termios->c_cflag = CLOCAL | CREAD | CS8 | B9600
+                                | TIOCM_CTS | CSTOPB | PARENB;
+        tty->termios->c_ispeed = 9600;
+        tty->termios->c_ospeed = 9600;
+        tty->termios->c_lflag = 0;
+        tty->termios->c_oflag = 0;
+        tty->termios->c_iflag = 0;
+}
+static int iuu_open(struct tty_struct *tty, struct usb_serial_port *port)
 {
        struct usb_serial *serial = port->serial;
        u8 *buf;
        int result;
        u32 actual;
-        unsigned long flags;
        struct iuu_private *priv = usb_get_serial_port_data(port);
        dbg("%s -  port %d", __func__, port->number);
@@ -1064,21 +1073,7 @@ static int iuu_open(struct tty_struct *tty,
                          port->bulk_in_buffer, 512,
                          NULL, NULL);
-        /* set the termios structure */
+        priv->poll = 0;
-        spin_lock_irqsave(&priv->lock, flags);
-        if (tty && !priv->termios_initialized) {
-                *(tty->termios) = tty_std_termios;
-                tty->termios->c_cflag = CLOCAL | CREAD | CS8 | B9600
-                                        | TIOCM_CTS | CSTOPB | PARENB;
-                tty->termios->c_ispeed = 9600;
-                tty->termios->c_ospeed = 9600;
-                tty->termios->c_lflag = 0;
-                tty->termios->c_oflag = 0;
-                tty->termios->c_iflag = 0;
-                priv->termios_initialized = 1;
-                priv->poll = 0;
-         }
-        spin_unlock_irqrestore(&priv->lock, flags);
        /* initialize writebuf */
 #define FISH(a, b, c, d) do { \
@@ -1201,6 +1196,7 @@ static struct usb_serial_driver iuu_device = {
        .tiocmget = iuu_tiocmget,
        .tiocmset = iuu_tiocmset,
        .set_termios = iuu_set_termios,
+        .init_termios = iuu_init_termios,
        .attach = iuu_startup,
        .release = iuu_release,
 };
diff --git a/drivers/usb/serial/keyspan.c b/drivers/usb/serial/keyspan.c
index 2594b8743d3f..f8c4b07033ff 100644
--- a/drivers/usb/serial/keyspan.c
+++ b/drivers/usb/serial/keyspan.c
@@ -1209,8 +1209,7 @@ static int keyspan_write_room(struct tty_struct *tty)
 }
-static int keyspan_open(struct tty_struct *tty,
+static int keyspan_open(struct tty_struct *tty, struct usb_serial_port *port)
-                        struct usb_serial_port *port, struct file *filp)
 {
        struct keyspan_port_private     *p_priv;
        struct keyspan_serial_private   *s_priv;
diff --git a/drivers/usb/serial/keyspan.h b/drivers/usb/serial/keyspan.h
index 3107ed15af64..30771e5b3973 100644
--- a/drivers/usb/serial/keyspan.h
+++ b/drivers/usb/serial/keyspan.h
@@ -36,8 +36,7 @@
 /* Function prototypes for Keyspan serial converter */
 static int  keyspan_open                (struct tty_struct *tty,
-                                         struct usb_serial_port *port,
+                                         struct usb_serial_port *port);
-                                         struct file *filp);
 static void keyspan_close               (struct usb_serial_port *port);
 static void keyspan_dtr_rts             (struct usb_serial_port *port, int on);
 static int  keyspan_startup             (struct usb_serial *serial);
diff --git a/drivers/usb/serial/keyspan_pda.c b/drivers/usb/serial/keyspan_pda.c
index d0b12e40c2b1..257c16cc6b2a 100644
--- a/drivers/usb/serial/keyspan_pda.c
+++ b/drivers/usb/serial/keyspan_pda.c
@@ -681,7 +681,7 @@ static int keyspan_pda_carrier_raised(struct usb_serial_port *port)
 static int keyspan_pda_open(struct tty_struct *tty,
-                        struct usb_serial_port *port, struct file *filp)
+                                        struct usb_serial_port *port)
 {
        struct usb_serial *serial = port->serial;
        unsigned char room;
diff --git a/drivers/usb/serial/kl5kusb105.c b/drivers/usb/serial/kl5kusb105.c
index 0f44bb8e8d4f..a61673133d7d 100644
--- a/drivers/usb/serial/kl5kusb105.c
+++ b/drivers/usb/serial/kl5kusb105.c
@@ -75,8 +75,7 @@ static int debug;
 static int  klsi_105_startup(struct usb_serial *serial);
 static void klsi_105_disconnect(struct usb_serial *serial);
 static void klsi_105_release(struct usb_serial *serial);
-static int  klsi_105_open(struct tty_struct *tty,
+static int  klsi_105_open(struct tty_struct *tty, struct usb_serial_port *port);
-                        struct usb_serial_port *port, struct file *filp);
 static void klsi_105_close(struct usb_serial_port *port);
 static int  klsi_105_write(struct tty_struct *tty,
        struct usb_serial_port *port, const unsigned char *buf, int count);
@@ -358,8 +357,7 @@ static void klsi_105_release(struct usb_serial *serial)
        }
 } /* klsi_105_release */
-static int  klsi_105_open(struct tty_struct *tty,
+static int  klsi_105_open(struct tty_struct *tty, struct usb_serial_port *port)
-                        struct usb_serial_port *port, struct file *filp)
 {
        struct klsi_105_private *priv = usb_get_serial_port_data(port);
        int retval = 0;
@@ -371,10 +369,6 @@ static int  klsi_105_open(struct tty_struct *tty,
        dbg("%s port %d", __func__, port->number);
-        /* force low_latency on so that our tty_push actually forces
-         * the data through
-         * tty->low_latency = 1; */
        /* Do a defined restart:
         * Set up sane default baud rate and send the 'READ_ON'
         * vendor command.
diff --git a/drivers/usb/serial/kobil_sct.c b/drivers/usb/serial/kobil_sct.c
index 6db0e561f680..45ea694b3ae6 100644
--- a/drivers/usb/serial/kobil_sct.c
+++ b/drivers/usb/serial/kobil_sct.c
@@ -70,8 +70,7 @@ static int debug;
 /* Function prototypes */
 static int  kobil_startup(struct usb_serial *serial);
 static void kobil_release(struct usb_serial *serial);
-static int  kobil_open(struct tty_struct *tty,
+static int  kobil_open(struct tty_struct *tty, struct usb_serial_port *port);
-                        struct usb_serial_port *port, struct file *filp);
 static void kobil_close(struct usb_serial_port *port);
 static int  kobil_write(struct tty_struct *tty, struct usb_serial_port *port,
                         const unsigned char *buf, int count);
@@ -85,7 +84,7 @@ static void kobil_read_int_callback(struct urb *urb);
 static void kobil_write_callback(struct urb *purb);
 static void kobil_set_termios(struct tty_struct *tty,
                        struct usb_serial_port *port, struct ktermios *old);
+static void kobil_init_termios(struct tty_struct *tty);
 static struct usb_device_id id_table [] = {
        { USB_DEVICE(KOBIL_VENDOR_ID, KOBIL_ADAPTER_B_PRODUCT_ID) },
@@ -120,6 +119,7 @@ static struct usb_serial_driver kobil_device = {
        .release =              kobil_release,
        .ioctl =                kobil_ioctl,
        .set_termios =          kobil_set_termios,
+        .init_termios =         kobil_init_termios,
        .tiocmget =             kobil_tiocmget,
        .tiocmset =             kobil_tiocmset,
        .open =                 kobil_open,
@@ -210,9 +210,17 @@ static void kobil_release(struct usb_serial *serial)
                kfree(usb_get_serial_port_data(serial->port[i]));
 }
+static void kobil_init_termios(struct tty_struct *tty)
+{
+        /* Default to echo off and other sane device settings */
+        tty->termios->c_lflag = 0;
+        tty->termios->c_lflag &= ~(ISIG | ICANON | ECHO | IEXTEN | XCASE);
+        tty->termios->c_iflag = IGNBRK | IGNPAR | IXOFF;
+        /* do NOT translate CR to CR-NL (0x0A -> 0x0A 0x0D) */
+        tty->termios->c_oflag &= ~ONLCR;
+}
-static int kobil_open(struct tty_struct *tty,
+static int kobil_open(struct tty_struct *tty, struct usb_serial_port *port)
-                        struct usb_serial_port *port, struct file *filp)
 {
        int result = 0;
        struct kobil_private *priv;
@@ -226,16 +234,6 @@ static int kobil_open(struct tty_struct *tty,
        /* someone sets the dev to 0 if the close method has been called */
        port->interrupt_in_urb->dev = port->serial->dev;
-        if (tty) {
-                /* Default to echo off and other sane device settings */
-                tty->termios->c_lflag = 0;
-                tty->termios->c_lflag &= ~(ISIG | ICANON | ECHO | IEXTEN |
-                                                                 XCASE);
-                tty->termios->c_iflag = IGNBRK | IGNPAR | IXOFF;
-                /* do NOT translate CR to CR-NL (0x0A -> 0x0A 0x0D) */
-                tty->termios->c_oflag &= ~ONLCR;
-        }
        /* allocate memory for transfer buffer */
        transfer_buffer = kzalloc(transfer_buffer_length, GFP_KERNEL);
        if (!transfer_buffer)
diff --git a/drivers/usb/serial/mct_u232.c b/drivers/usb/serial/mct_u232.c
index d8825e159aa5..ad4998bbf16f 100644
--- a/drivers/usb/serial/mct_u232.c
+++ b/drivers/usb/serial/mct_u232.c
@@ -93,8 +93,7 @@ static int debug;
 */
 static int  mct_u232_startup(struct usb_serial *serial);
 static void mct_u232_release(struct usb_serial *serial);
-static int  mct_u232_open(struct tty_struct *tty,
+static int  mct_u232_open(struct tty_struct *tty, struct usb_serial_port *port);
-                        struct usb_serial_port *port, struct file *filp);
 static void mct_u232_close(struct usb_serial_port *port);
 static void mct_u232_dtr_rts(struct usb_serial_port *port, int on);
 static void mct_u232_read_int_callback(struct urb *urb);
@@ -421,8 +420,7 @@ static void mct_u232_release(struct usb_serial *serial)
        }
 } /* mct_u232_release */
-static int  mct_u232_open(struct tty_struct *tty,
+static int  mct_u232_open(struct tty_struct *tty, struct usb_serial_port *port)
-                        struct usb_serial_port *port, struct file *filp)
 {
        struct usb_serial *serial = port->serial;
        struct mct_u232_private *priv = usb_get_serial_port_data(port);
@@ -568,10 +566,13 @@ static void mct_u232_read_int_callback(struct urb *urb)
         * Work-a-round: handle the 'usual' bulk-in pipe here
         */
        if (urb->transfer_buffer_length > 2) {
-                tty = tty_port_tty_get(&port->port);
                if (urb->actual_length) {
-                        tty_insert_flip_string(tty, data, urb->actual_length);
+                        tty = tty_port_tty_get(&port->port);
-                        tty_flip_buffer_push(tty);
+                        if (tty) {
+                                tty_insert_flip_string(tty, data,
+                                                urb->actual_length);
+                                tty_flip_buffer_push(tty);
+                        }
                        tty_kref_put(tty);
                }
                goto exit;
diff --git a/drivers/usb/serial/mos7720.c b/drivers/usb/serial/mos7720.c
index ccd4dd340d2c..763e32a44be0 100644
--- a/drivers/usb/serial/mos7720.c
+++ b/drivers/usb/serial/mos7720.c
@@ -85,7 +85,7 @@ static int debug;
 #define MOSCHIP_DEVICE_ID_7720          0x7720
 #define MOSCHIP_DEVICE_ID_7715          0x7715
-static struct usb_device_id moschip_port_id_table [] = {
+static struct usb_device_id moschip_port_id_table[] = {
        { USB_DEVICE(USB_VENDOR_ID_MOSCHIP, MOSCHIP_DEVICE_ID_7720) },
        { } /* terminating entry */
 };
@@ -319,8 +319,7 @@ static int send_mos_cmd(struct usb_serial *serial, __u8 request, __u16 value,
        return status;
 }
-static int mos7720_open(struct tty_struct *tty,
+static int mos7720_open(struct tty_struct *tty, struct usb_serial_port *port)
-                        struct usb_serial_port *port, struct file *filp)
 {
        struct usb_serial *serial;
        struct usb_serial_port *port0;
@@ -378,10 +377,14 @@ static int mos7720_open(struct tty_struct *tty,
         /* Initialize MCS7720 -- Write Init values to corresponding Registers
          *
          * Register Index
+          * 0 : THR/RHR
          * 1 : IER
          * 2 : FCR
          * 3 : LCR
          * 4 : MCR
+          * 5 : LSR
+          * 6 : MSR
+          * 7 : SPR
          *
          * 0x08 : SP1/2 Control Reg
          */
@@ -1250,20 +1253,88 @@ static void mos7720_set_termios(struct tty_struct *tty,
 static int get_lsr_info(struct tty_struct *tty,
                struct moschip_port *mos7720_port, unsigned int __user *value)
 {
-        int count;
+        struct usb_serial_port *port = tty->driver_data;
        unsigned int result = 0;
+        unsigned char data = 0;
+        int port_number = port->number - port->serial->minor;
+        int count;
        count = mos7720_chars_in_buffer(tty);
        if (count == 0) {
-                dbg("%s -- Empty", __func__);
+                send_mos_cmd(port->serial, MOS_READ, port_number,
-                result = TIOCSER_TEMT;
+                                                        UART_LSR, &data);
+                if ((data & (UART_LSR_TEMT | UART_LSR_THRE))
+                                        == (UART_LSR_TEMT | UART_LSR_THRE)) {
+                        dbg("%s -- Empty", __func__);
+                        result = TIOCSER_TEMT;
+                }
        }
        if (copy_to_user(value, &result, sizeof(int)))
                return -EFAULT;
        return 0;
 }
+static int mos7720_tiocmget(struct tty_struct *tty, struct file *file)
+{
+        struct usb_serial_port *port = tty->driver_data;
+        struct moschip_port *mos7720_port = usb_get_serial_port_data(port);
+        unsigned int result = 0;
+        unsigned int mcr ;
+        unsigned int msr ;
+        dbg("%s - port %d", __func__, port->number);
+        mcr = mos7720_port->shadowMCR;
+        msr = mos7720_port->shadowMSR;
+        result = ((mcr & UART_MCR_DTR)  ? TIOCM_DTR : 0)   /* 0x002 */
+          | ((mcr & UART_MCR_RTS)   ? TIOCM_RTS : 0)   /* 0x004 */
+          | ((msr & UART_MSR_CTS)   ? TIOCM_CTS : 0)   /* 0x020 */
+          | ((msr & UART_MSR_DCD)   ? TIOCM_CAR : 0)   /* 0x040 */
+          | ((msr & UART_MSR_RI)    ? TIOCM_RI :  0)   /* 0x080 */
+          | ((msr & UART_MSR_DSR)   ? TIOCM_DSR : 0);  /* 0x100 */
+        dbg("%s -- %x", __func__, result);
+        return result;
+}
+static int mos7720_tiocmset(struct tty_struct *tty, struct file *file,
+                                        unsigned int set, unsigned int clear)
+{
+        struct usb_serial_port *port = tty->driver_data;
+        struct moschip_port *mos7720_port = usb_get_serial_port_data(port);
+        unsigned int mcr ;
+        unsigned char lmcr;
+        dbg("%s - port %d", __func__, port->number);
+        dbg("he was at tiocmget");
+        mcr = mos7720_port->shadowMCR;
+        if (set & TIOCM_RTS)
+                mcr |= UART_MCR_RTS;
+        if (set & TIOCM_DTR)
+                mcr |= UART_MCR_DTR;
+        if (set & TIOCM_LOOP)
+                mcr |= UART_MCR_LOOP;
+        if (clear & TIOCM_RTS)
+                mcr &= ~UART_MCR_RTS;
+        if (clear & TIOCM_DTR)
+                mcr &= ~UART_MCR_DTR;
+        if (clear & TIOCM_LOOP)
+                mcr &= ~UART_MCR_LOOP;
+        mos7720_port->shadowMCR = mcr;
+        lmcr = mos7720_port->shadowMCR;
+        send_mos_cmd(port->serial, MOS_WRITE,
+                port->number - port->serial->minor, UART_MCR, &lmcr);
+        return 0;
+}
 static int set_modem_info(struct moschip_port *mos7720_port, unsigned int cmd,
                          unsigned int __user *value)
 {
@@ -1301,14 +1372,6 @@ static int set_modem_info(struct moschip_port *mos7720_port, unsigned int cmd,
                        mcr &= ~UART_MCR_LOOP;
                break;
-        case TIOCMSET:
-                /* turn off the RTS and DTR and LOOPBACK
-                 * and then only turn on what was asked to */
-                mcr &=  ~(UART_MCR_RTS | UART_MCR_DTR | UART_MCR_LOOP);
-                mcr |= ((arg & TIOCM_RTS) ? UART_MCR_RTS : 0);
-                mcr |= ((arg & TIOCM_DTR) ? UART_MCR_DTR : 0);
-                mcr |= ((arg & TIOCM_LOOP) ? UART_MCR_LOOP : 0);
-                break;
        }
        mos7720_port->shadowMCR = mcr;
@@ -1320,28 +1383,6 @@ static int set_modem_info(struct moschip_port *mos7720_port, unsigned int cmd,
        return 0;
 }
-static int get_modem_info(struct moschip_port *mos7720_port,
-                          unsigned int __user *value)
-{
-        unsigned int result = 0;
-        unsigned int msr = mos7720_port->shadowMSR;
-        unsigned int mcr = mos7720_port->shadowMCR;
-        result = ((mcr & UART_MCR_DTR)  ? TIOCM_DTR: 0)   /* 0x002 */
-                  | ((mcr & UART_MCR_RTS)       ? TIOCM_RTS: 0)   /* 0x004 */
-                  | ((msr & UART_MSR_CTS)       ? TIOCM_CTS: 0)   /* 0x020 */
-                  | ((msr & UART_MSR_DCD)       ? TIOCM_CAR: 0)   /* 0x040 */
-                  | ((msr & UART_MSR_RI)        ? TIOCM_RI:  0)   /* 0x080 */
-                  | ((msr & UART_MSR_DSR)       ? TIOCM_DSR: 0);  /* 0x100 */
-        dbg("%s -- %x", __func__, result);
-        if (copy_to_user(value, &result, sizeof(int)))
-                return -EFAULT;
-        return 0;
-}
 static int get_serial_info(struct moschip_port *mos7720_port,
                           struct serial_struct __user *retinfo)
 {
@@ -1392,17 +1433,11 @@ static int mos7720_ioctl(struct tty_struct *tty, struct file *file,
        /* FIXME: These should be using the mode methods */
        case TIOCMBIS:
        case TIOCMBIC:
-        case TIOCMSET:
                dbg("%s (%d) TIOCMSET/TIOCMBIC/TIOCMSET",
                                        __func__, port->number);
                return set_modem_info(mos7720_port, cmd,
                                      (unsigned int __user *)arg);
-        case TIOCMGET:
-                dbg("%s (%d) TIOCMGET", __func__,  port->number);
-                return get_modem_info(mos7720_port,
-                                      (unsigned int __user *)arg);
        case TIOCGSERIAL:
                dbg("%s (%d) TIOCGSERIAL", __func__,  port->number);
                return get_serial_info(mos7720_port,
@@ -1557,6 +1592,8 @@ static struct usb_serial_driver moschip7720_2port_driver = {
        .attach                 = mos7720_startup,
        .release                = mos7720_release,
        .ioctl                  = mos7720_ioctl,
+        .tiocmget               = mos7720_tiocmget,
+        .tiocmset               = mos7720_tiocmset,
        .set_termios            = mos7720_set_termios,
        .write                  = mos7720_write,
        .write_room             = mos7720_write_room,
diff --git a/drivers/usb/serial/mos7840.c b/drivers/usb/serial/mos7840.c
index 270009afdf77..f11abf52be7d 100644
--- a/drivers/usb/serial/mos7840.c
+++ b/drivers/usb/serial/mos7840.c
@@ -824,8 +824,7 @@ static int mos7840_serial_probe(struct usb_serial *serial,
 *      Otherwise we return a negative error number.
 *****************************************************************************/
-static int mos7840_open(struct tty_struct *tty,
+static int mos7840_open(struct tty_struct *tty, struct usb_serial_port *port)
-                        struct usb_serial_port *port, struct file *filp)
 {
        int response;
        int j;
@@ -2134,106 +2133,6 @@ static int mos7840_get_lsr_info(struct tty_struct *tty,
 }
 /*****************************************************************************
- * mos7840_set_modem_info
- *      function to set modem info
- *****************************************************************************/
-/* FIXME: Should be using the model control hooks */
-static int mos7840_set_modem_info(struct moschip_port *mos7840_port,
-                                  unsigned int cmd, unsigned int __user *value)
-{
-        unsigned int mcr;
-        unsigned int arg;
-        __u16 Data;
-        int status;
-        struct usb_serial_port *port;
-        if (mos7840_port == NULL)
-                return -1;
-        port = (struct usb_serial_port *)mos7840_port->port;
-        if (mos7840_port_paranoia_check(port, __func__)) {
-                dbg("%s", "Invalid port");
-                return -1;
-        }
-        mcr = mos7840_port->shadowMCR;
-        if (copy_from_user(&arg, value, sizeof(int)))
-                return -EFAULT;
-        switch (cmd) {
-        case TIOCMBIS:
-                if (arg & TIOCM_RTS)
-                        mcr |= MCR_RTS;
-                if (arg & TIOCM_DTR)
-                        mcr |= MCR_RTS;
-                if (arg & TIOCM_LOOP)
-                        mcr |= MCR_LOOPBACK;
-                break;
-        case TIOCMBIC:
-                if (arg & TIOCM_RTS)
-                        mcr &= ~MCR_RTS;
-                if (arg & TIOCM_DTR)
-                        mcr &= ~MCR_RTS;
-                if (arg & TIOCM_LOOP)
-                        mcr &= ~MCR_LOOPBACK;
-                break;
-        case TIOCMSET:
-                /* turn off the RTS and DTR and LOOPBACK
-                 * and then only turn on what was asked to */
-                mcr &= ~(MCR_RTS | MCR_DTR | MCR_LOOPBACK);
-                mcr |= ((arg & TIOCM_RTS) ? MCR_RTS : 0);
-                mcr |= ((arg & TIOCM_DTR) ? MCR_DTR : 0);
-                mcr |= ((arg & TIOCM_LOOP) ? MCR_LOOPBACK : 0);
-                break;
-        }
-        lock_kernel();
-        mos7840_port->shadowMCR = mcr;
-        Data = mos7840_port->shadowMCR;
-        status = mos7840_set_uart_reg(port, MODEM_CONTROL_REGISTER, Data);
-        unlock_kernel();
-        if (status < 0) {
-                dbg("setting MODEM_CONTROL_REGISTER Failed");
-                return -1;
-        }
-        return 0;
-}
-/*****************************************************************************
- * mos7840_get_modem_info
- *      function to get modem info
- *****************************************************************************/
-static int mos7840_get_modem_info(struct moschip_port *mos7840_port,
-                                  unsigned int __user *value)
-{
-        unsigned int result = 0;
-        __u16 msr;
-        unsigned int mcr = mos7840_port->shadowMCR;
-        mos7840_get_uart_reg(mos7840_port->port,
-                                                MODEM_STATUS_REGISTER, &msr);
-        result = ((mcr & MCR_DTR) ? TIOCM_DTR : 0)      /* 0x002 */
-            |((mcr & MCR_RTS) ? TIOCM_RTS : 0)  /* 0x004 */
-            |((msr & MOS7840_MSR_CTS) ? TIOCM_CTS : 0)  /* 0x020 */
-            |((msr & MOS7840_MSR_CD) ? TIOCM_CAR : 0)   /* 0x040 */
-            |((msr & MOS7840_MSR_RI) ? TIOCM_RI : 0)    /* 0x080 */
-            |((msr & MOS7840_MSR_DSR) ? TIOCM_DSR : 0); /* 0x100 */
-        dbg("%s -- %x", __func__, result);
-        if (copy_to_user(value, &result, sizeof(int)))
-                return -EFAULT;
-        return 0;
-}
-/*****************************************************************************
 * mos7840_get_serial_info
 *      function to get information about serial port
 *****************************************************************************/
@@ -2281,7 +2180,6 @@ static int mos7840_ioctl(struct tty_struct *tty, struct file *file,
        struct async_icount cnow;
        struct async_icount cprev;
        struct serial_icounter_struct icount;
-        int mosret = 0;
        if (mos7840_port_paranoia_check(port, __func__)) {
                dbg("%s", "Invalid port");
@@ -2303,20 +2201,6 @@ static int mos7840_ioctl(struct tty_struct *tty, struct file *file,
                return mos7840_get_lsr_info(tty, argp);
                return 0;
-        /* FIXME: use the modem hooks and remove this */
-        case TIOCMBIS:
-        case TIOCMBIC:
-        case TIOCMSET:
-                dbg("%s (%d) TIOCMSET/TIOCMBIC/TIOCMSET", __func__,
-                    port->number);
-                mosret =
-                    mos7840_set_modem_info(mos7840_port, cmd, argp);
-                return mosret;
-        case TIOCMGET:
-                dbg("%s (%d) TIOCMGET", __func__, port->number);
-                return mos7840_get_modem_info(mos7840_port, argp);
        case TIOCGSERIAL:
                dbg("%s (%d) TIOCGSERIAL", __func__, port->number);
                return mos7840_get_serial_info(mos7840_port, argp);
diff --git a/drivers/usb/serial/navman.c b/drivers/usb/serial/navman.c
index f5f3751a888c..5ceaa4c6be09 100644
--- a/drivers/usb/serial/navman.c
+++ b/drivers/usb/serial/navman.c
@@ -80,8 +80,7 @@ exit:
                        __func__, result);
 }
-static int navman_open(struct tty_struct *tty,
+static int navman_open(struct tty_struct *tty, struct usb_serial_port *port)
-                        struct usb_serial_port *port, struct file *filp)
 {
        int result = 0;
diff --git a/drivers/usb/serial/omninet.c b/drivers/usb/serial/omninet.c
index 56857ddbd70b..062265038bf0 100644
--- a/drivers/usb/serial/omninet.c
+++ b/drivers/usb/serial/omninet.c
@@ -64,8 +64,7 @@ static int debug;
 #define BT_IGNITIONPRO_ID       0x2000
 /* function prototypes */
-static int  omninet_open(struct tty_struct *tty, struct usb_serial_port *port,
+static int  omninet_open(struct tty_struct *tty, struct usb_serial_port *port);
-                                                        struct file *filp);
 static void omninet_close(struct usb_serial_port *port);
 static void omninet_read_bulk_callback(struct urb *urb);
 static void omninet_write_bulk_callback(struct urb *urb);
@@ -163,8 +162,7 @@ static int omninet_attach(struct usb_serial *serial)
        return 0;
 }
-static int omninet_open(struct tty_struct *tty,
+static int omninet_open(struct tty_struct *tty, struct usb_serial_port *port)
-                        struct usb_serial_port *port, struct file *filp)
 {
        struct usb_serial       *serial = port->serial;
        struct usb_serial_port  *wport;
diff --git a/drivers/usb/serial/opticon.c b/drivers/usb/serial/opticon.c
index 336bba79ad32..1085a577c5c1 100644
--- a/drivers/usb/serial/opticon.c
+++ b/drivers/usb/serial/opticon.c
@@ -144,8 +144,7 @@ exit:
        spin_unlock(&priv->lock);
 }
-static int opticon_open(struct tty_struct *tty, struct usb_serial_port *port,
+static int opticon_open(struct tty_struct *tty, struct usb_serial_port *port)
-                        struct file *filp)
 {
        struct opticon_private *priv = usb_get_serial_data(port->serial);
        unsigned long flags;
diff --git a/drivers/usb/serial/option.c b/drivers/usb/serial/option.c
index c784ddbe7b61..fe47051dbef2 100644
--- a/drivers/usb/serial/option.c
+++ b/drivers/usb/serial/option.c
@@ -45,8 +45,7 @@
 /* Function prototypes */
 static int  option_probe(struct usb_serial *serial,
                        const struct usb_device_id *id);
-static int  option_open(struct tty_struct *tty, struct usb_serial_port *port,
+static int  option_open(struct tty_struct *tty, struct usb_serial_port *port);
-                                                        struct file *filp);
 static void option_close(struct usb_serial_port *port);
 static void option_dtr_rts(struct usb_serial_port *port, int on);
@@ -961,8 +960,7 @@ static int option_chars_in_buffer(struct tty_struct *tty)
        return data_len;
 }
-static int option_open(struct tty_struct *tty,
+static int option_open(struct tty_struct *tty, struct usb_serial_port *port)
-                        struct usb_serial_port *port, struct file *filp)
 {
        struct option_port_private *portdata;
        int i, err;
diff --git a/drivers/usb/serial/oti6858.c b/drivers/usb/serial/oti6858.c
index 3cece27325e7..0f4a70ce3823 100644
--- a/drivers/usb/serial/oti6858.c
+++ b/drivers/usb/serial/oti6858.c
@@ -141,11 +141,11 @@ struct oti6858_control_pkt {
          && ((a)->frame_fmt == (priv)->pending_setup.frame_fmt))
 /* function prototypes */
-static int oti6858_open(struct tty_struct *tty,
+static int oti6858_open(struct tty_struct *tty, struct usb_serial_port *port);
-                        struct usb_serial_port *port, struct file *filp);
 static void oti6858_close(struct usb_serial_port *port);
 static void oti6858_set_termios(struct tty_struct *tty,
                        struct usb_serial_port *port, struct ktermios *old);
+static void oti6858_init_termios(struct tty_struct *tty);
 static int oti6858_ioctl(struct tty_struct *tty, struct file *file,
                        unsigned int cmd, unsigned long arg);
 static void oti6858_read_int_callback(struct urb *urb);
@@ -186,6 +186,7 @@ static struct usb_serial_driver oti6858_device = {
        .write =                oti6858_write,
        .ioctl =                oti6858_ioctl,
        .set_termios =          oti6858_set_termios,
+        .init_termios =         oti6858_init_termios,
        .tiocmget =             oti6858_tiocmget,
        .tiocmset =             oti6858_tiocmset,
        .read_bulk_callback =   oti6858_read_bulk_callback,
@@ -206,7 +207,6 @@ struct oti6858_private {
        struct {
                u8 read_urb_in_use;
                u8 write_urb_in_use;
-                u8 termios_initialized;
        } flags;
        struct delayed_work delayed_write_work;
@@ -447,6 +447,14 @@ static int oti6858_chars_in_buffer(struct tty_struct *tty)
        return chars;
 }
+static void oti6858_init_termios(struct tty_struct *tty)
+{
+        *(tty->termios) = tty_std_termios;
+        tty->termios->c_cflag = B38400 | CS8 | CREAD | HUPCL | CLOCAL;
+        tty->termios->c_ispeed = 38400;
+        tty->termios->c_ospeed = 38400;
+}
 static void oti6858_set_termios(struct tty_struct *tty,
                struct usb_serial_port *port, struct ktermios *old_termios)
 {
@@ -464,16 +472,6 @@ static void oti6858_set_termios(struct tty_struct *tty,
                return;
        }
-        spin_lock_irqsave(&priv->lock, flags);
-        if (!priv->flags.termios_initialized) {
-                *(tty->termios) = tty_std_termios;
-                tty->termios->c_cflag = B38400 | CS8 | CREAD | HUPCL | CLOCAL;
-                tty->termios->c_ispeed = 38400;
-                tty->termios->c_ospeed = 38400;
-                priv->flags.termios_initialized = 1;
-        }
-        spin_unlock_irqrestore(&priv->lock, flags);
        cflag = tty->termios->c_cflag;
        spin_lock_irqsave(&priv->lock, flags);
@@ -566,8 +564,7 @@ static void oti6858_set_termios(struct tty_struct *tty,
        spin_unlock_irqrestore(&priv->lock, flags);
 }
-static int oti6858_open(struct tty_struct *tty,
+static int oti6858_open(struct tty_struct *tty, struct usb_serial_port *port)
-                        struct usb_serial_port *port, struct file *filp)
 {
        struct oti6858_private *priv = usb_get_serial_port_data(port);
        struct ktermios tmp_termios;
diff --git a/drivers/usb/serial/pl2303.c b/drivers/usb/serial/pl2303.c
index 3e86815b2705..a63ea99936f7 100644
--- a/drivers/usb/serial/pl2303.c
+++ b/drivers/usb/serial/pl2303.c
@@ -691,8 +691,7 @@ static void pl2303_close(struct usb_serial_port *port)
 }
-static int pl2303_open(struct tty_struct *tty,
+static int pl2303_open(struct tty_struct *tty, struct usb_serial_port *port)
-                        struct usb_serial_port *port, struct file *filp)
 {
        struct ktermios tmp_termios;
        struct usb_serial *serial = port->serial;
@@ -714,8 +713,6 @@ static int pl2303_open(struct tty_struct *tty,
        if (tty)
                pl2303_set_termios(tty, port, &tmp_termios);
-        /* FIXME: need to assert RTS and DTR if CRTSCTS off */
        dbg("%s - submitting read urb", __func__);
        port->read_urb->dev = serial->dev;
        result = usb_submit_urb(port->read_urb, GFP_KERNEL);
diff --git a/drivers/usb/serial/sierra.c b/drivers/usb/serial/sierra.c
index f48d05e0acc1..55391bbe1230 100644
--- a/drivers/usb/serial/sierra.c
+++ b/drivers/usb/serial/sierra.c
@@ -734,8 +734,7 @@ static void sierra_close(struct usb_serial_port *port)
        }
 }
-static int sierra_open(struct tty_struct *tty,
+static int sierra_open(struct tty_struct *tty, struct usb_serial_port *port)
-                        struct usb_serial_port *port, struct file *filp)
 {
        struct sierra_port_private *portdata;
        struct usb_serial *serial = port->serial;
diff --git a/drivers/usb/serial/spcp8x5.c b/drivers/usb/serial/spcp8x5.c
index 3c249d8e8b8e..61e7c40b94fb 100644
--- a/drivers/usb/serial/spcp8x5.c
+++ b/drivers/usb/serial/spcp8x5.c
@@ -299,7 +299,6 @@ struct spcp8x5_private {
        wait_queue_head_t       delta_msr_wait;
        u8                      line_control;
        u8                      line_status;
-        u8                      termios_initialized;
 };
 /* desc : when device plug in,this function would be called.
@@ -498,6 +497,15 @@ static void spcp8x5_close(struct usb_serial_port *port)
                dev_dbg(&port->dev, "usb_unlink_urb(read_urb) = %d\n", result);
 }
+static void spcp8x5_init_termios(struct tty_struct *tty)
+{
+        /* for the 1st time call this function */
+        *(tty->termios) = tty_std_termios;
+        tty->termios->c_cflag = B115200 | CS8 | CREAD | HUPCL | CLOCAL;
+        tty->termios->c_ispeed = 115200;
+        tty->termios->c_ospeed = 115200;
+}
 /* set the serial param for transfer. we should check if we really need to
 * transfer. if we set flow control we should do this too. */
 static void spcp8x5_set_termios(struct tty_struct *tty,
@@ -514,16 +522,6 @@ static void spcp8x5_set_termios(struct tty_struct *tty,
        int i;
        u8 control;
-        /* for the 1st time call this function */
-        spin_lock_irqsave(&priv->lock, flags);
-        if (!priv->termios_initialized) {
-                *(tty->termios) = tty_std_termios;
-                tty->termios->c_cflag = B115200 | CS8 | CREAD | HUPCL | CLOCAL;
-                tty->termios->c_ispeed = 115200;
-                tty->termios->c_ospeed = 115200;
-                priv->termios_initialized = 1;
-        }
-        spin_unlock_irqrestore(&priv->lock, flags);
        /* check that they really want us to change something */
        if (!tty_termios_hw_change(tty->termios, old_termios))
@@ -623,8 +621,7 @@ static void spcp8x5_set_termios(struct tty_struct *tty,
 /* open the serial port. do some usb system call. set termios and get the line
 * status of the device. then submit the read urb */
-static int spcp8x5_open(struct tty_struct *tty,
+static int spcp8x5_open(struct tty_struct *tty, struct usb_serial_port *port)
-                        struct usb_serial_port *port, struct file *filp)
 {
        struct ktermios tmp_termios;
        struct usb_serial *serial = port->serial;
@@ -658,8 +655,6 @@ static int spcp8x5_open(struct tty_struct *tty,
        priv->line_status = status & 0xf0 ;
        spin_unlock_irqrestore(&priv->lock, flags);
-        /* FIXME: need to assert RTS and DTR if CRTSCTS off */
        dbg("%s - submitting read urb", __func__);
        port->read_urb->dev = serial->dev;
        ret = usb_submit_urb(port->read_urb, GFP_KERNEL);
@@ -1011,6 +1006,7 @@ static struct usb_serial_driver spcp8x5_device = {
        .carrier_raised         = spcp8x5_carrier_raised,
        .write                  = spcp8x5_write,
        .set_termios            = spcp8x5_set_termios,
+        .init_termios           = spcp8x5_init_termios,
        .ioctl                  = spcp8x5_ioctl,
        .tiocmget               = spcp8x5_tiocmget,
        .tiocmset               = spcp8x5_tiocmset,
diff --git a/drivers/usb/serial/symbolserial.c b/drivers/usb/serial/symbolserial.c
index 6157fac9366b..cb7e95f9fcbf 100644
--- a/drivers/usb/serial/symbolserial.c
+++ b/drivers/usb/serial/symbolserial.c
@@ -124,8 +124,7 @@ exit:
        spin_unlock(&priv->lock);
 }
-static int symbol_open(struct tty_struct *tty, struct usb_serial_port *port,
+static int symbol_open(struct tty_struct *tty, struct usb_serial_port *port)
-                        struct file *filp)
 {
        struct symbol_private *priv = usb_get_serial_data(port->serial);
        unsigned long flags;
diff --git a/drivers/usb/serial/ti_usb_3410_5052.c b/drivers/usb/serial/ti_usb_3410_5052.c
index 3bc609fe2242..1e9dc8821698 100644
--- a/drivers/usb/serial/ti_usb_3410_5052.c
+++ b/drivers/usb/serial/ti_usb_3410_5052.c
@@ -98,8 +98,7 @@ struct ti_device {
 static int ti_startup(struct usb_serial *serial);
 static void ti_release(struct usb_serial *serial);
-static int ti_open(struct tty_struct *tty, struct usb_serial_port *port,
+static int ti_open(struct tty_struct *tty, struct usb_serial_port *port);
-                struct file *file);
 static void ti_close(struct usb_serial_port *port);
 static int ti_write(struct tty_struct *tty, struct usb_serial_port *port,
                const unsigned char *data, int count);
@@ -492,8 +491,7 @@ static void ti_release(struct usb_serial *serial)
 }
-static int ti_open(struct tty_struct *tty,
+static int ti_open(struct tty_struct *tty, struct usb_serial_port *port)
-                        struct usb_serial_port *port, struct file *file)
 {
        struct ti_port *tport = usb_get_serial_port_data(port);
        struct ti_device *tdev;
diff --git a/drivers/usb/serial/usb-serial.c b/drivers/usb/serial/usb-serial.c
index 99188c92068b..9d7ca4868d37 100644
--- a/drivers/usb/serial/usb-serial.c
+++ b/drivers/usb/serial/usb-serial.c
@@ -43,8 +43,6 @@
 #define DRIVER_AUTHOR "Greg Kroah-Hartman, greg@kroah.com, http://www.kroah.com/linux/"
 #define DRIVER_DESC "USB Serial Driver core"
-static void port_free(struct usb_serial_port *port);
 /* Driver structure we register with the USB core */
 static struct usb_driver usb_serial_driver = {
        .name =         "usbserial",
@@ -68,6 +66,11 @@ static struct usb_serial *serial_table[SERIAL_TTY_MINORS];
 static DEFINE_MUTEX(table_lock);
 static LIST_HEAD(usb_serial_driver_list);
+/*
+ * Look up the serial structure.  If it is found and it hasn't been
+ * disconnected, return with its disc_mutex held and its refcount
+ * incremented.  Otherwise return NULL.
+ */
 struct usb_serial *usb_serial_get_by_index(unsigned index)
 {
        struct usb_serial *serial;
@@ -75,8 +78,15 @@ struct usb_serial *usb_serial_get_by_index(unsigned index)
        mutex_lock(&table_lock);
        serial = serial_table[index];
-        if (serial)
+        if (serial) {
-                kref_get(&serial->kref);
+                mutex_lock(&serial->disc_mutex);
+                if (serial->disconnected) {
+                        mutex_unlock(&serial->disc_mutex);
+                        serial = NULL;
+                } else {
+                        kref_get(&serial->kref);
+                }
+        }
        mutex_unlock(&table_lock);
        return serial;
 }
@@ -125,8 +135,10 @@ static void return_serial(struct usb_serial *serial)
        dbg("%s", __func__);
+        mutex_lock(&table_lock);
        for (i = 0; i < serial->num_ports; ++i)
                serial_table[serial->minor + i] = NULL;
+        mutex_unlock(&table_lock);
 }
 static void destroy_serial(struct kref *kref)
@@ -145,161 +157,157 @@ static void destroy_serial(struct kref *kref)
        serial->type->release(serial);
-        for (i = 0; i < serial->num_ports; ++i) {
+        /* Now that nothing is using the ports, they can be freed */
+        for (i = 0; i < serial->num_port_pointers; ++i) {
                port = serial->port[i];
-                if (port)
+                if (port) {
+                        port->serial = NULL;
                        put_device(&port->dev);
-        }
-        /* If this is a "fake" port, we have to clean it up here, as it will
-         * not get cleaned up in port_release() as it was never registered with
-         * the driver core */
-        if (serial->num_ports < serial->num_port_pointers) {
-                for (i = serial->num_ports;
-                                        i < serial->num_port_pointers; ++i) {
-                        port = serial->port[i];
-                        if (port)
-                                port_free(port);
                }
        }
        usb_put_dev(serial->dev);
-        /* free up any memory that we allocated */
        kfree(serial);
 }
 void usb_serial_put(struct usb_serial *serial)
 {
-        mutex_lock(&table_lock);
        kref_put(&serial->kref, destroy_serial);
-        mutex_unlock(&table_lock);
 }
 /*****************************************************************************
 * Driver tty interface functions
 *****************************************************************************/
-static int serial_open (struct tty_struct *tty, struct file *filp)
+/**
+ * serial_install - install tty
+ * @driver: the driver (USB in our case)
+ * @tty: the tty being created
+ *
+ * Create the termios objects for this tty.  We use the default
+ * USB serial settings but permit them to be overridden by
+ * serial->type->init_termios.
+ *
+ * This is the first place a new tty gets used.  Hence this is where we
+ * acquire references to the usb_serial structure and the driver module,
+ * where we store a pointer to the port, and where we do an autoresume.
+ * All these actions are reversed in serial_release().
+ */
+static int serial_install(struct tty_driver *driver, struct tty_struct *tty)
 {
+        int idx = tty->index;
        struct usb_serial *serial;
        struct usb_serial_port *port;
-        unsigned int portNumber;
+        int retval = -ENODEV;
-        int retval = 0;
-        int first = 0;
        dbg("%s", __func__);
-        /* get the serial object associated with this tty pointer */
+        serial = usb_serial_get_by_index(idx);
-        serial = usb_serial_get_by_index(tty->index);
+        if (!serial)
-        if (!serial) {
+                return retval;
-                tty->driver_data = NULL;
-                return -ENODEV;
-        }
-        mutex_lock(&serial->disc_mutex);
+        port = serial->port[idx - serial->minor];
-        portNumber = tty->index - serial->minor;
+        if (!port)
-        port = serial->port[portNumber];
+                goto error_no_port;
-        if (!port || serial->disconnected)
+        if (!try_module_get(serial->type->driver.owner))
-                retval = -ENODEV;
+                goto error_module_get;
-        else
-                get_device(&port->dev);
+        /* perform the standard setup */
-        /*
+        retval = tty_init_termios(tty);
-         * Note: Our locking order requirement does not allow port->mutex
-         * to be acquired while serial->disc_mutex is held.
-         */
-        mutex_unlock(&serial->disc_mutex);
        if (retval)
-                goto bailout_serial_put;
+                goto error_init_termios;
-        if (mutex_lock_interruptible(&port->mutex)) {
+        retval = usb_autopm_get_interface(serial->interface);
-                retval = -ERESTARTSYS;
+        if (retval)
-                goto bailout_port_put;
+                goto error_get_interface;
-        }
+        mutex_unlock(&serial->disc_mutex);
-        ++port->port.count;
+        /* allow the driver to update the settings */
+        if (serial->type->init_termios)
+                serial->type->init_termios(tty);
-        /* set up our port structure making the tty driver
-         * remember our port object, and us it */
        tty->driver_data = port;
-        tty_port_tty_set(&port->port, tty);
-        /* If the console is attached, the device is already open */
+        /* Final install (we use the default method) */
-        if (port->port.count == 1 && !port->console) {
+        tty_driver_kref_get(driver);
-                first = 1;
+        tty->count++;
-                /* lock this module before we call it
+        driver->ttys[idx] = tty;
-                 * this may fail, which means we must bail out,
+        return retval;
-                 * safe because we are called with BKL held */
-                if (!try_module_get(serial->type->driver.owner)) {
-                        retval = -ENODEV;
-                        goto bailout_mutex_unlock;
-                }
+ error_get_interface:
+ error_init_termios:
+        module_put(serial->type->driver.owner);
+ error_module_get:
+ error_no_port:
+        usb_serial_put(serial);
+        mutex_unlock(&serial->disc_mutex);
+        return retval;
+}
+static int serial_open(struct tty_struct *tty, struct file *filp)
+{
+        struct usb_serial_port *port = tty->driver_data;
+        struct usb_serial *serial = port->serial;
+        int retval;
+        dbg("%s - port %d", __func__, port->number);
+        spin_lock_irq(&port->port.lock);
+        if (!tty_hung_up_p(filp))
+                ++port->port.count;
+        spin_unlock_irq(&port->port.lock);
+        tty_port_tty_set(&port->port, tty);
+        /* Do the device-specific open only if the hardware isn't
+         * already initialized.
+         */
+        if (!test_bit(ASYNCB_INITIALIZED, &port->port.flags)) {
+                if (mutex_lock_interruptible(&port->mutex))
+                        return -ERESTARTSYS;
                mutex_lock(&serial->disc_mutex);
                if (serial->disconnected)
                        retval = -ENODEV;
                else
-                        retval = usb_autopm_get_interface(serial->interface);
+                        retval = port->serial->type->open(tty, port);
-                if (retval)
-                        goto bailout_module_put;
-                /* only call the device specific open if this
-                 * is the first time the port is opened */
-                retval = serial->type->open(tty, port, filp);
-                if (retval)
-                        goto bailout_interface_put;
                mutex_unlock(&serial->disc_mutex);
+                mutex_unlock(&port->mutex);
+                if (retval)
+                        return retval;
                set_bit(ASYNCB_INITIALIZED, &port->port.flags);
        }
-        mutex_unlock(&port->mutex);
        /* Now do the correct tty layer semantics */
        retval = tty_port_block_til_ready(&port->port, tty, filp);
-        if (retval == 0) {
-                if (!first)
-                        usb_serial_put(serial);
-                return 0;
-        }
-        mutex_lock(&port->mutex);
-        if (first == 0)
-                goto bailout_mutex_unlock;
-        /* Undo the initial port actions */
-        mutex_lock(&serial->disc_mutex);
-bailout_interface_put:
-        usb_autopm_put_interface(serial->interface);
-bailout_module_put:
-        mutex_unlock(&serial->disc_mutex);
-        module_put(serial->type->driver.owner);
-bailout_mutex_unlock:
-        port->port.count = 0;
-        tty->driver_data = NULL;
-        tty_port_tty_set(&port->port, NULL);
-        mutex_unlock(&port->mutex);
-bailout_port_put:
-        put_device(&port->dev);
-bailout_serial_put:
-        usb_serial_put(serial);
        return retval;
 }
 /**
- *      serial_do_down          -       shut down hardware
+ * serial_down - shut down hardware
- *      @port: port to shut down
+ * @port: port to shut down
- *
- *      Shut down a USB port unless it is the console. We never shut down the
- *      console hardware as it will always be in use.
 *
- *      Don't free any resources at this point
+ * Shut down a USB serial port unless it is the console.  We never
+ * shut down the console hardware as it will always be in use.
 */
-static void serial_do_down(struct usb_serial_port *port)
+static void serial_down(struct usb_serial_port *port)
 {
        struct usb_serial_driver *drv = port->serial->type;
        struct usb_serial *serial;
        struct module *owner;
-        /* The console is magical, do not hang up the console hardware
+        /*
-           or there will be tears */
+         * The console is magical.  Do not hang up the console hardware
+         * or there will be tears.
+         */
        if (port->console)
                return;
+        /* Don't call the close method if the hardware hasn't been
+         * initialized.
+         */
+        if (!test_and_clear_bit(ASYNCB_INITIALIZED, &port->port.flags))
+                return;
        mutex_lock(&port->mutex);
        serial = port->serial;
        owner = serial->type->driver.owner;
@@ -310,79 +318,69 @@ static void serial_do_down(struct usb_serial_port *port)
        mutex_unlock(&port->mutex);
 }
-/**
+static void serial_hangup(struct tty_struct *tty)
- *      serial_do_free          -       free resources post close/hangup
- *      @port: port to free up
- *
- *      Do the resource freeing and refcount dropping for the port. We must
- *      be careful about ordering and we must avoid freeing up the console.
- */
-static void serial_do_free(struct usb_serial_port *port)
 {
-        struct usb_serial *serial;
+        struct usb_serial_port *port = tty->driver_data;
-        struct module *owner;
-        /* The console is magical, do not hang up the console hardware
+        dbg("%s - port %d", __func__, port->number);
-           or there will be tears */
-        if (port->console)
-                return;
-        serial = port->serial;
+        serial_down(port);
-        owner = serial->type->driver.owner;
+        tty_port_hangup(&port->port);
-        put_device(&port->dev);
-        /* Mustn't dereference port any more */
-        mutex_lock(&serial->disc_mutex);
-        if (!serial->disconnected)
-                usb_autopm_put_interface(serial->interface);
-        mutex_unlock(&serial->disc_mutex);
-        usb_serial_put(serial);
-        /* Mustn't dereference serial any more */
-        module_put(owner);
 }
 static void serial_close(struct tty_struct *tty, struct file *filp)
 {
        struct usb_serial_port *port = tty->driver_data;
-        if (!port)
-                return;
        dbg("%s - port %d", __func__, port->number);
-        /* FIXME:
+        if (tty_hung_up_p(filp))
-           This leaves a very narrow race. Really we should do the
-           serial_do_free() on tty->shutdown(), but tty->shutdown can
-           be called from IRQ context and serial_do_free can sleep.
-           The right fix is probably to make the tty free (which is rare)
-           and thus tty->shutdown() occur via a work queue and simplify all
-           the drivers that use it.
-        */
-        if (tty_hung_up_p(filp)) {
-                /* serial_hangup already called serial_down at this point.
-                   Another user may have already reopened the port but
-                   serial_do_free is refcounted */
-                serial_do_free(port);
                return;
-        }
        if (tty_port_close_start(&port->port, tty, filp) == 0)
                return;
+        serial_down(port);
-        serial_do_down(port);           
        tty_port_close_end(&port->port, tty);
        tty_port_tty_set(&port->port, NULL);
-        serial_do_free(port);
 }
-static void serial_hangup(struct tty_struct *tty)
+/**
+ * serial_release - free resources post close/hangup
+ * @port: port to free up
+ *
+ * Do the resource freeing and refcount dropping for the port.
+ * Avoid freeing the console.
+ *
+ * Called when the last tty kref is dropped.
+ */
+static void serial_release(struct tty_struct *tty)
 {
        struct usb_serial_port *port = tty->driver_data;
-        serial_do_down(port);
+        struct usb_serial *serial;
-        tty_port_hangup(&port->port);
+        struct module *owner;
-        /* We must not free port yet - the USB serial layer depends on it's
-           continued existence */
+        /* The console is magical.  Do not hang up the console hardware
+         * or there will be tears.
+         */
+        if (port->console)
+                return;
+        dbg("%s - port %d", __func__, port->number);
+        /* Standard shutdown processing */
+        tty_shutdown(tty);
+        tty->driver_data = NULL;
+        serial = port->serial;
+        owner = serial->type->driver.owner;
+        mutex_lock(&serial->disc_mutex);
+        if (!serial->disconnected)
+                usb_autopm_put_interface(serial->interface);
+        mutex_unlock(&serial->disc_mutex);
+        usb_serial_put(serial);
+        module_put(owner);
 }
 static int serial_write(struct tty_struct *tty, const unsigned char *buf,
@@ -527,6 +525,7 @@ static int serial_proc_show(struct seq_file *m, void *v)
                seq_putc(m, '\n');
                usb_serial_put(serial);
+                mutex_unlock(&serial->disc_mutex);
        }
        return 0;
 }
@@ -596,14 +595,6 @@ static void usb_serial_port_work(struct work_struct *work)
        tty_kref_put(tty);
 }
-static void port_release(struct device *dev)
-{
-        struct usb_serial_port *port = to_usb_serial_port(dev);
-        dbg ("%s - %s", __func__, dev_name(dev));
-        port_free(port);
-}
 static void kill_traffic(struct usb_serial_port *port)
 {
        usb_kill_urb(port->read_urb);
@@ -623,8 +614,12 @@ static void kill_traffic(struct usb_serial_port *port)
        usb_kill_urb(port->interrupt_out_urb);
 }
-static void port_free(struct usb_serial_port *port)
+static void port_release(struct device *dev)
 {
+        struct usb_serial_port *port = to_usb_serial_port(dev);
+        dbg ("%s - %s", __func__, dev_name(dev));
        /*
         * Stop all the traffic before cancelling the work, so that
         * nobody will restart it by calling usb_serial_port_softint.
@@ -935,6 +930,11 @@ int usb_serial_probe(struct usb_interface *interface,
                mutex_init(&port->mutex);
                INIT_WORK(&port->work, usb_serial_port_work);
                serial->port[i] = port;
+                port->dev.parent = &interface->dev;
+                port->dev.driver = NULL;
+                port->dev.bus = &usb_serial_bus_type;
+                port->dev.release = &port_release;
+                device_initialize(&port->dev);
        }
        /* set up the endpoint information */
@@ -1077,15 +1077,10 @@ int usb_serial_probe(struct usb_interface *interface,
        /* register all of the individual ports with the driver core */
        for (i = 0; i < num_ports; ++i) {
                port = serial->port[i];
-                port->dev.parent = &interface->dev;
-                port->dev.driver = NULL;
-                port->dev.bus = &usb_serial_bus_type;
-                port->dev.release = &port_release;
                dev_set_name(&port->dev, "ttyUSB%d", port->number);
                dbg ("%s - registering %s", __func__, dev_name(&port->dev));
                port->dev_state = PORT_REGISTERING;
-                retval = device_register(&port->dev);
+                retval = device_add(&port->dev);
                if (retval) {
                        dev_err(&port->dev, "Error registering port device, "
                                "continuing\n");
@@ -1103,39 +1098,7 @@ exit:
        return 0;
 probe_error:
-        for (i = 0; i < num_bulk_in; ++i) {
+        usb_serial_put(serial);
-                port = serial->port[i];
-                if (!port)
-                        continue;
-                usb_free_urb(port->read_urb);
-                kfree(port->bulk_in_buffer);
-        }
-        for (i = 0; i < num_bulk_out; ++i) {
-                port = serial->port[i];
-                if (!port)
-                        continue;
-                usb_free_urb(port->write_urb);
-                kfree(port->bulk_out_buffer);
-        }
-        for (i = 0; i < num_interrupt_in; ++i) {
-                port = serial->port[i];
-                if (!port)
-                        continue;
-                usb_free_urb(port->interrupt_in_urb);
-                kfree(port->interrupt_in_buffer);
-        }
-        for (i = 0; i < num_interrupt_out; ++i) {
-                port = serial->port[i];
-                if (!port)
-                        continue;
-                usb_free_urb(port->interrupt_out_urb);
-                kfree(port->interrupt_out_buffer);
-        }
-        /* free up any memory that we allocated */
-        for (i = 0; i < serial->num_port_pointers; ++i)
-                kfree(serial->port[i]);
-        kfree(serial);
        return -EIO;
 }
 EXPORT_SYMBOL_GPL(usb_serial_probe);
@@ -1161,10 +1124,7 @@ void usb_serial_disconnect(struct usb_interface *interface)
                if (port) {
                        struct tty_struct *tty = tty_port_tty_get(&port->port);
                        if (tty) {
-                                /* The hangup will occur asynchronously but
+                                tty_vhangup(tty);
-                                   the object refcounts will sort out all the
-                                   cleanup */
-                                tty_hangup(tty);
                                tty_kref_put(tty);
                        }
                        kill_traffic(port);
@@ -1189,8 +1149,7 @@ void usb_serial_disconnect(struct usb_interface *interface)
        }
        serial->type->disconnect(serial);
-        /* let the last holder of this object
+        /* let the last holder of this object cause it to be cleaned up */
-         * cause it to be cleaned up */
        usb_serial_put(serial);
        dev_info(dev, "device disconnected\n");
 }
@@ -1246,6 +1205,8 @@ static const struct tty_operations serial_ops = {
        .chars_in_buffer =      serial_chars_in_buffer,
        .tiocmget =             serial_tiocmget,
        .tiocmset =             serial_tiocmset,
+        .shutdown =             serial_release,
+        .install =              serial_install,
        .proc_fops =            &serial_proc_fops,
 };
diff --git a/drivers/usb/serial/usb_debug.c b/drivers/usb/serial/usb_debug.c
index 614800972dc3..7b5bfc4edd3d 100644
--- a/drivers/usb/serial/usb_debug.c
+++ b/drivers/usb/serial/usb_debug.c
@@ -43,11 +43,10 @@ static struct usb_driver debug_driver = {
        .no_dynamic_id =        1,
 };
-static int usb_debug_open(struct tty_struct *tty, struct usb_serial_port *port,
+static int usb_debug_open(struct tty_struct *tty, struct usb_serial_port *port)
-                                                        struct file *filp)
 {
        port->bulk_out_size = USB_DEBUG_MAX_PACKET_SIZE;
-        return usb_serial_generic_open(tty, port, filp);
+        return usb_serial_generic_open(tty, port);
 }
 /* This HW really does not support a serial break, so one will be
diff --git a/drivers/usb/serial/visor.c b/drivers/usb/serial/visor.c
index f5d0f64dcc52..1aa5d20a5d99 100644
--- a/drivers/usb/serial/visor.c
+++ b/drivers/usb/serial/visor.c
@@ -36,8 +36,7 @@
 #define DRIVER_DESC "USB HandSpring Visor / Palm OS driver"
 /* function prototypes for a handspring visor */
-static int  visor_open(struct tty_struct *tty, struct usb_serial_port *port,
+static int  visor_open(struct tty_struct *tty, struct usb_serial_port *port);
-                                        struct file *filp);
 static void visor_close(struct usb_serial_port *port);
 static int  visor_write(struct tty_struct *tty, struct usb_serial_port *port,
                                        const unsigned char *buf, int count);
@@ -273,8 +272,7 @@ static int stats;
 /******************************************************************************
 * Handspring Visor specific driver functions
 ******************************************************************************/
-static int visor_open(struct tty_struct *tty, struct usb_serial_port *port,
+static int visor_open(struct tty_struct *tty, struct usb_serial_port *port)
-                                                        struct file *filp)
 {
        struct usb_serial *serial = port->serial;
        struct visor_private *priv = usb_get_serial_port_data(port);
diff --git a/drivers/usb/serial/whiteheat.c b/drivers/usb/serial/whiteheat.c
index 8d126dd7a02e..62424eec33ec 100644
--- a/drivers/usb/serial/whiteheat.c
+++ b/drivers/usb/serial/whiteheat.c
@@ -146,7 +146,7 @@ static int  whiteheat_firmware_attach(struct usb_serial *serial);
 static int  whiteheat_attach(struct usb_serial *serial);
 static void whiteheat_release(struct usb_serial *serial);
 static int  whiteheat_open(struct tty_struct *tty,
-                        struct usb_serial_port *port, struct file *filp);
+                        struct usb_serial_port *port);
 static void whiteheat_close(struct usb_serial_port *port);
 static int  whiteheat_write(struct tty_struct *tty,
                        struct usb_serial_port *port,
@@ -259,7 +259,7 @@ static int firm_send_command(struct usb_serial_port *port, __u8 command,
                                                __u8 *data, __u8 datasize);
 static int firm_open(struct usb_serial_port *port);
 static int firm_close(struct usb_serial_port *port);
-static int firm_setup_port(struct tty_struct *tty);
+static void firm_setup_port(struct tty_struct *tty);
 static int firm_set_rts(struct usb_serial_port *port, __u8 onoff);
 static int firm_set_dtr(struct usb_serial_port *port, __u8 onoff);
 static int firm_set_break(struct usb_serial_port *port, __u8 onoff);
@@ -659,8 +659,7 @@ static void whiteheat_release(struct usb_serial *serial)
        return;
 }
-static int whiteheat_open(struct tty_struct *tty,
+static int whiteheat_open(struct tty_struct *tty, struct usb_serial_port *port)
-                        struct usb_serial_port *port, struct file *filp)
 {
        int             retval = 0;
@@ -1211,7 +1210,7 @@ static int firm_close(struct usb_serial_port *port)
 }
-static int firm_setup_port(struct tty_struct *tty)
+static void firm_setup_port(struct tty_struct *tty)
 {
        struct usb_serial_port *port = tty->driver_data;
        struct whiteheat_port_settings port_settings;
@@ -1286,7 +1285,7 @@ static int firm_setup_port(struct tty_struct *tty)
        port_settings.lloop = 0;
        /* now send the message to the device */
-        return firm_send_command(port, WHITEHEAT_SETUP_PORT,
+        firm_send_command(port, WHITEHEAT_SETUP_PORT,
                        (__u8 *)&port_settings, sizeof(port_settings));
 }
diff --git a/drivers/video/console/vgacon.c b/drivers/video/console/vgacon.c
index 59d7d5ec17a4..74e96cf83b7e 100644
--- a/drivers/video/console/vgacon.c
+++ b/drivers/video/console/vgacon.c
@@ -180,7 +180,6 @@ static inline void vga_set_mem_top(struct vc_data *c)
 }
 #ifdef CONFIG_VGACON_SOFT_SCROLLBACK
-#include <linux/slab.h>
 /* software scrollback */
 static void *vgacon_scrollback;
 static int vgacon_scrollback_tail;
diff --git a/drivers/xen/evtchn.c b/drivers/xen/evtchn.c
index af031950f9b1..79bedba44fee 100644
--- a/drivers/xen/evtchn.c
+++ b/drivers/xen/evtchn.c
@@ -38,7 +38,6 @@
 #include <linux/string.h>
 #include <linux/errno.h>
 #include <linux/fs.h>
-#include <linux/errno.h>
 #include <linux/miscdevice.h>
 #include <linux/major.h>
 #include <linux/proc_fs.h>
diff --git a/firmware/Makefile b/firmware/Makefile
index ffe2663d49f2..5ea80b19785b 100644
--- a/firmware/Makefile
+++ b/firmware/Makefile
@@ -46,6 +46,22 @@ fw-shipped-$(CONFIG_CHELSIO_T3) += cxgb3/t3b_psram-1.1.0.bin \
                                   cxgb3/ael2005_opt_edc.bin \
                                   cxgb3/ael2005_twx_edc.bin \
                                   cxgb3/ael2020_twx_edc.bin
+fw-shipped-$(CONFIG_DRM_MGA) += matrox/g200_warp.fw matrox/g400_warp.fw
+fw-shipped-$(CONFIG_DRM_R128) += r128/r128_cce.bin
+fw-shipped-$(CONFIG_DRM_RADEON) += radeon/R100_cp.bin radeon/R200_cp.bin \
+                                   radeon/R300_cp.bin radeon/R420_cp.bin \
+                                   radeon/RS690_cp.bin radeon/RS600_cp.bin \
+                                   radeon/R520_cp.bin \
+                                   radeon/R600_pfp.bin radeon/R600_me.bin \
+                                   radeon/RV610_pfp.bin radeon/RV610_me.bin \
+                                   radeon/RV630_pfp.bin radeon/RV630_me.bin \
+                                   radeon/RV620_pfp.bin radeon/RV620_me.bin \
+                                   radeon/RV635_pfp.bin radeon/RV635_me.bin \
+                                   radeon/RV670_pfp.bin radeon/RV670_me.bin \
+                                   radeon/RS780_pfp.bin radeon/RS780_me.bin \
+                                   radeon/RV770_pfp.bin radeon/RV770_me.bin \
+                                   radeon/RV730_pfp.bin radeon/RV730_me.bin \
+                                   radeon/RV710_pfp.bin radeon/RV710_me.bin
 fw-shipped-$(CONFIG_DVB_AV7110) += av7110/bootcode.bin
 fw-shipped-$(CONFIG_DVB_TTUSB_BUDGET) += ttusb-budget/dspbootcode.bin
 fw-shipped-$(CONFIG_E100) += e100/d101m_ucode.bin e100/d101s_ucode.bin \
diff --git a/firmware/WHENCE b/firmware/WHENCE
index 82db5256a4e5..3f8c4f6bc43f 100644
--- a/firmware/WHENCE
+++ b/firmware/WHENCE
@@ -727,3 +727,124 @@ Found in hex form in kernel source, with the following comment:
   Copyright (c) 1998-2002 by Paul Davis <pbd@op.net>
 --------------------------------------------------------------------------
+Driver: mga - Matrox G200/G400/G550
+File: matrox/g200_warp.fw
+File: matrox/g400_warp.fw
+Licence:
+Copyright 1999 Matrox Graphics Inc.
+All Rights Reserved.
+Permission is hereby granted, free of charge, to any person obtaining a
+copy of this software and associated documentation files (the "Software"),
+to deal in the Software without restriction, including without limitation
+the rights to use, copy, modify, merge, publish, distribute, sublicense,
+and/or sell copies of the Software, and to permit persons to whom the
+Software is furnished to do so, subject to the following conditions:
+The above copyright notice and this permission notice shall be included
+in all copies or substantial portions of the Software.
+THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+MATROX GRAPHICS INC., OR ANY OTHER CONTRIBUTORS BE LIABLE FOR ANY CLAIM,
+DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
+OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE
+OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+Found in hex form in kernel source.
+--------------------------------------------------------------------------
+Driver: r128 - ATI Rage 128
+File: r128/r128_cce.bin
+Licence:
+Copyright 2000 Advanced Micro Devices, Inc.
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+Found in decimal form in kernel source.
+--------------------------------------------------------------------------
+Driver: radeon - ATI Radeon
+File: radeon/R100_cp.bin
+File: radeon/R200_cp.bin
+File: radeon/R300_cp.bin
+File: radeon/R420_cp.bin
+File: radeon/RS600_cp.bin
+File: radeon/RS690_cp.bin
+File: radeon/R520_cp.bin
+File: radeon/R600_pfp.bin
+File: radeon/R600_me.bin
+File: radeon/RV610_pfp.bin
+File: radeon/RV610_me.bin
+File: radeon/RV630_pfp.bin
+File: radeon/RV630_me.bin
+File: radeon/RV620_pfp.bin
+File: radeon/RV620_me.bin
+File: radeon/RV635_pfp.bin
+File: radeon/RV635_me.bin
+File: radeon/RV670_pfp.bin
+File: radeon/RV670_me.bin
+File: radeon/RS780_pfp.bin
+File: radeon/RS780_me.bin
+File: radeon/RV770_pfp.bin
+File: radeon/RV770_me.bin
+File: radeon/RV730_pfp.bin
+File: radeon/RV730_me.bin
+File: radeon/RV710_pfp.bin
+File: radeon/RV710_me.bin
+Licence:
+ * Copyright 2007-2009 Advanced Micro Devices, Inc.
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+Found in hex form in kernel source.
+--------------------------------------------------------------------------
diff --git a/firmware/matrox/g200_warp.H16 b/firmware/matrox/g200_warp.H16
new file mode 100644
index 000000000000..5064b6f01bb4
--- /dev/null
+++ b/firmware/matrox/g200_warp.H16
@@ -0,0 +1,28 @@
+/*
+ * WARP pipes are named according to the functions they perform, where
+ *
+ *   - T stands for computation of texture stage 0
+ *   - T2 stands for computation of both texture stage 0 and texture stage 1
+ *   - G stands for computation of triangle intensity (Gouraud interpolation)
+ *   - Z stands for computation of Z buffer interpolation
+ *   - S stands for computation of specular highlight
+ *   - A stands for computation of the alpha channel
+ *   - F stands for computation of vertex fog interpolation
+ */
+/* TGZ */
+:04B8000000008000E8008000E8008000E8008000E8008000E8008000E8008000E8008000E8008000E8008000E80098A0E94040D8ECFF80C0E9008000E81FD718BD3FD722BD8104890401040904C941C0EC110400E041CC41CD49CC49CDD141C0EC51CC51CD80041004080400E000CCC0CDD149C0EC8A1F20E98B3F20E9413C41AD493C49AD10CC10CD08CC08CDB94149BB1FF041CD513C51AD009880E9728007EA241F20E9154149BD1D4151BD2E412AB83453A0E815301D3058E300E0B54048BD3D4050BD2443A0E82C4BA0E8157209E300E01D723530B530BD303D309C97579F008000E86C64C8EC98E1B505BD052E3032C0A0E833C0A0E87464C8EC403C40AD326A2A302073336A00E028731C7283E2608015EAB83D28DF303520DF403000E0CCE26472254252BF2D424ABF302E30DF382E38DF181D45E91E1545E92B4951BD00E01F73383840AF303040AF241F24DF1D3220E92C1F2CDF1A3320E9B01008E34010B81026F030CD2FF038CD2B8020E92A8020E9A62088E200E0AF20282A26AF202AC0AF341F34DF462446DF283080BF203880BF472447DF4E2C4EDF4F2C4FDF563456DF281528DF201D20DF573457DF00E01D05048010EA89E22B303FC11DBD008000E8008000E8008000E8A068BF25008000E820C020AF2805977400E02A1016C020E9048010EA8CE2950528C128AD1FC115BD008000E8008000E8A8679F6B008000E828C028AD1D252005283280AD402A40BD1C8020E9203320AD207300E0B64951BB262FB0E8192020E9352035DF3D203DDF152015DF1D201DDF26D026CD29492AB8264080BD3B4850BD3E54579F00E082E11EAF599F008000E826302930483C48AD2B72C2E12CC044C2052434BF0D242CBF2D464EBF254656BF201D6F8F323E5FE93E50569F00E03B301E8F519F331E5FE9054454B20D444CB219C0B0E834C044C4337300E03E62579F1EAF599F00E00D20843E58E9281D6F8F052000E0851E58E99B3B33DF202042AF3042569F803E57E93F8F519F30805FE9282824AF811E57E9054757BF0D474FBF888058E91B291BDF301D6F8F3A304FE91C3026DF09E33B053E50569F3B3F4FE91E8F519F00E0AC202D444CB42C1CC0AF254454B400E0C830304630AF1B1B48AF00E02520382C4FE9868057E9381D6F8F287400E00D444CB0054454B02D209B10823E57E932F01BCD1EBD599F831E57E9384738AF34202A3000E00D2032200520878057E91F54579F1742569F00E03B6A3F8F519F371E4FE937322AAF00E03200008000E827C044C0361F4FE91F1F26DF371B37BF172617DF3E174FE93F3F4FE9341F34AF2B05A720332B37DF2717C0AF34804FE9008000E803800AEA17C12BBD008000E8008000E8B3689725008000E833C033AF3C274FE9573920E9281960EC2B3220E91D3B20E9B30500E0162820E9233B33AD1E2B20E91C8020E9573620E90080A0E94040D8ECFF80C0E990E200E085FF20EA19C8C1CD1FD718BD3FD722BD9F4149BD008000E8254149BD2D4151BD0D8007EA008000E8354048BD3D4050BD008000E825302D303530B530BD303D309CA75B9F008000E8008000E8008000E8008000E8008000E8008000E8008000E8008000E8008000E884FF0AEA008000E8C941C8EC42E100E082FF20EA008000E8008000E8008000E8C840C0EC008000E87FFF20EA008000E8008000E8008000E871
+/* TGZF */
+:0548000000008000E8008000E8008000E8008000E8008000E8008000E8008000E8008000E8008000E8008000E8008000E8008000E8008000E8008000E8008000E8008000E8008000E8008000E8008000E8008000E80098A0E94040D8ECFF80C0E9008000E81FD718BD3FD722BD8104890401040904C941C0EC110400E041CC41CD49CC49CDD141C0EC51CC51CD80041004080400E000CCC0CDD149C0EC8A1F20E98B3F20E9413C41AD493C49AD10CC10CD08CC08CDB94149BB1FF041CD513C51AD009880E97F8007EA241F20E9214580E81A4D80E8315580E8008000E8154149BD1D4151BD2E412AB83453A0E815301D3058E300E0B54048BD3D4050BD2443A0E82C4BA0E8157209E300E01D723530B530BD303D309C97579F008000E86C64C8EC98E1B505BD052E3032C0A0E833C0A0E87464C8EC403C40AD326A2A302073336A00E028731C7283E26B8015EAB83D28DF303520DF403000E0CCE26472254252BF2D424ABF302E30DF382E38DF181D45E91E1545E92B4951BD00E01F73383840AF303040AF241F24DF1D3220E92C1F2CDF1A3320E9B01008E34010B81026F030CD2FF038CD2B8020E92A8020E9A62088E200E0AF20282A26AF202AC0AF341F34DF462446DF283080BF203880BF472447DF4E2C4EDF4F2C4FDF563456DF281528DF201D20DF573457DF00E01D05048010EA89E22B303FC11DBD008000E8008000E8008000E8A068BF25008000E820C020AF2805977400E02A1016C020E9048010EA8CE2950528C128AD1FC115BD008000E8008000E8A8679F6B008000E828C028AD1D252005283280AD402A40BD1C8020E9203320AD207300E0B64951BB262FB0E8192020E9352035DF3D203DDF152015DF1D201DDF26D026CD29492AB8264080BD3B4850BD3E54579F00E082E11EAF599F008000E826302930483C48AD2B72C2E12CC044C2052434BF0D242CBF2D464EBF254656BF201D6F8F323E5FE93E50569F00E03B301E8F519F331E5FE9054454B20D444CB219C0B0E834C044C4337300E03E62579F1EAF599F00E00D20843E58E9281D6F8F052000E0851E58E99B3B33DF202042AF3042569F803E57E93F8F519F30805FE9282824AF811E57E9054757BF0D474FBF888058E91B291BDF301D6F8F3A304FE91C3026DF09E33B053E50569F3B3F4FE91E8F519F00E0AC202D444CB42C1CC0AF254454B400E0C830304630AF1B1B48AF00E02520382C4FE9868057E9381D6F8F287400E00D444CB0054454B02D209B10823E57E932F01BCD1EBD599F831E57E9384738AF34202A3000E00D2032200520878057E91F54579F1742569F00E03B6A3F8F519F371E4FE937322AAF00E03200008000E827C044C0361F4FE91F1F26DF371B37BF172617DF3E174FE93F3F4FE9341F34AF2B05A720332B37DF2717C0AF34804FE9008000E80D211AB6052131B603802AEA17C12BBD0D2005202FC021C6B3689725008000E833C033AF3C274FE91750569F008000E8370F5C9F00E02F20008000E8281960ECB30500E0008000E8233B33AD008000E8172617DF35174FE9008000E8008000E8008000E839374FE92F2F17AF008000E8008000E8008000E831804FE9008000E8008000E8573920E9162820E91D3B20E91E2B20E92B3220E91C2320E9573620E90080A0E94040D8ECFF80C0E990E200E078FF20EA19C8C1CD1FD718BD3FD722BD9F4149BD008000E8254149BD2D4151BD0D8007EA008000E8354048BD3D4050BD008000E825302D303530B530BD303D309CA75B9F008000E8008000E8008000E8008000E8008000E8008000E8008000E8008000E8008000E877FF0AEA008000E8C941C8EC42E100E075FF20EA008000E8008000E8008000E8C840C0EC008000E872FF20EA008000E8008000E8008000E8BB
+/* TGZA */
+:04E80000000098A0E94040D8ECFF80C0E9008000E81FD718BD3FD722BD8104890401040904C941C0EC110400E041CC41CD49CC49CDD141C0EC51CC51CD80041004080400E000CCC0CDD149C0EC8A1F20E98B3F20E9413C41AD493C49AD10CC10CD08CC08CDB94149BB1FF041CD513C51AD009880E97D8007EA241F20E9154149BD1D4151BD2E412AB83453A0E815301D3058E300E0B54048BD3D4050BD2443A0E82C4BA0E8157209E300E01D723530B530BD303D309C97579F008000E86C64C8EC98E1B505BD052E3032C0A0E833C0A0E87464C8EC403C40AD326A2A302073336A00E028731C7283E26B8015EAB83D28DF303520DF403000E0CCE26472254252BF2D424ABF302E30DF382E38DF181D45E91E1545E92B4951BD00E01F73383840AF303040AF241F24DF1D3220E92C1F2CDF1A3320E9B01008E34010B81026F030CD2FF038CD2B8020E92A8020E9A62088E200E0AF20282A26AF202AC0AF341F34DF462446DF283080BF203880BF472447DF4E2C4EDF4F2C4FDF563456DF281528DF201D20DF573457DF00E01D05048010EA89E22B303FC11DBD008000E8008000E8008000E8A068BF25008000E820C020AF2805977400E02A1016C020E9048010EA8CE2950528C128AD1FC115BD008000E8008000E8A8679F6B008000E828C028AD1D252005283280AD402A40BD1C8020E9203320AD207300E0B64951BB262FB0E8192020E9352035DF3D203DDF152015DF1D201DDF26D026CD29492AB8264080BD3B4850BD3E54579F00E082E11EAF599F008000E826302930483C48AD2B72C2E12CC044C2052434BF0D242CBF2D464EBF254656BF201D6F8F323E5FE93E50569F00E03B301E8F519F331E5FE9054454B20D444CB219C0B0E834C044C4337300E03E62579F1EAF599F00E00D20843E58E9281D6F8F052000E0851E58E99B3B33DF202042AF3042569F803E57E93F8F519F30805FE9282824AF811E57E9054757BF0D474FBF888058E91B291BDF301D6F8F3A304FE91C3026DF09E33B053E50569F3B3F4FE91E8F519F00E0AC202D444CB42C1CC0AF254454B400E0C830304630AF1B1B48AF00E02520382C4FE9868057E9381D6F8F287400E00D444CB0054454B02D209B10823E57E932F01BCD1EBD599F831E57E9384738AF34202A3000E00D2032200520878057E91F54579F1742569F00E03B6A3F8F519F371E4FE937322AAF00E03200008000E827C044C0361F4FE91F1F26DF371B37BF172617DF3E174FE93F3F4FE9341F34AF2B05A720332B37DF2717C0AF34804FE9008000E82D444CB6254454B603802AEA17C12BBD2D20252007C044C6B3689725008000E833C033AF3C274FE91F62579F008000E83F3D5D9F00E00720008000E8281960ECB30500E0008000E8233B33AD008000E81F261FDF9D1F4FE9008000E8008000E8008000E89E3F4FE907071FAF008000E8008000E8008000E89C804FE9008000E8008000E8573920E9162820E91D3B20E91E2B20E92B3220E91C2320E9573620E90080A0E94040D8ECFF80C0E990E200E07AFF20EA19C8C1CD1FD718BD3FD722BD9F4149BD008000E8254149BD2D4151BD0D8007EA008000E8354048BD3D4050BD008000E825302D303530B530BD303D309CA75B9F008000E8008000E8008000E8008000E8008000E8008000E8008000E8008000E8008000E879FF0AEA008000E8C941C8EC42E100E077FF20EA008000E8008000E8008000E8C840C0EC008000E874FF20EA008000E8008000E8008000E8D9
+/* TGZAF */
+:0568000000008000E8008000E8008000E8008000E8008000E8008000E8008000E8008000E8008000E8008000E8008000E8008000E8008000E8008000E8008000E8008000E8008000E8008000E8008000E8008000E80098A0E94040D8ECFF80C0E9008000E81FD718BD3FD722BD8104890401040904C941C0EC110400E041CC41CD49CC49CDD141C0EC51CC51CD80041004080400E000CCC0CDD149C0EC8A1F20E98B3F20E9413C41AD493C49AD10CC10CD08CC08CDB94149BB1FF041CD513C51AD009880E9838007EA241F20E9214580E81A4D80E8315580E8008000E8154149BD1D4151BD2E412AB83453A0E815301D3058E300E0B54048BD3D4050BD2443A0E82C4BA0E8157209E300E01D723530B530BD303D309C97579F008000E86C64C8EC98E1B505BD052E3032C0A0E833C0A0E87464C8EC403C40AD326A2A302073336A00E028731C7283E26F8015EAB83D28DF303520DF403000E0CCE26472254252BF2D424ABF302E30DF382E38DF181D45E91E1545E92B4951BD00E01F73383840AF303040AF241F24DF1D3220E92C1F2CDF1A3320E9B01008E34010B81026F030CD2FF038CD2B8020E92A8020E9A62088E200E0AF20282A26AF202AC0AF341F34DF462446DF283080BF203880BF472447DF4E2C4EDF4F2C4FDF563456DF281528DF201D20DF573457DF00E01D05048010EA89E22B303FC11DBD008000E8008000E8008000E8A068BF25008000E820C020AF2805977400E02A1016C020E9048010EA8CE2950528C128AD1FC115BD008000E8008000E8A8679F6B008000E828C028AD1D252005283280AD402A40BD1C8020E9203320AD207300E0B64951BB262FB0E8192020E9352035DF3D203DDF152015DF1D201DDF26D026CD29492AB8264080BD3B4850BD3E54579F00E082E11EAF599F008000E826302930483C48AD2B72C2E12CC044C2052434BF0D242CBF2D464EBF254656BF201D6F8F323E5FE93E50569F00E03B301E8F519F331E5FE9054454B20D444CB219C0B0E834C044C4337300E03E62579F1EAF599F00E00D20843E58E9281D6F8F052000E0851E58E99B3B33DF202042AF3042569F803E57E93F8F519F30805FE9282824AF811E57E9054757BF0D474FBF888058E91B291BDF301D6F8F3A304FE91C3026DF09E33B053E50569F3B3F4FE91E8F519F00E0AC202D444CB42C1CC0AF254454B400E0C830304630AF1B1B48AF00E02520382C4FE9868057E9381D6F8F287400E00D444CB0054454B02D209B10823E57E932F01BCD1EBD599F831E57E9384738AF34202A3000E00D2032200520878057E91F54579F1742569F00E03B6A3F8F519F371E4FE937322AAF00E03200008000E827C044C0361F4FE91F1F26DF371B37BF172617DF3E174FE93F3F4FE9341F34AF2B05A720332B37DF2717C0AF34804FE9008000E80D211AB6052131B62D444CB6254454B603802AEA17C12BBD0D2005202FC021C6B3689725008000E833C033AF3C274FE900E0252007C044C61750569F00E02D20370F5C9F00E02F201F62579F00E007203F3D5D9F008000E8008000E8281960ECB30500E0172617DF233B33AD35174FE91F261FDF9D1F4FE99E3F4FE939374FE92F2F17AF008000E807071FAF008000E831804FE9008000E89C804FE9008000E8008000E8573920E9162820E91D3B20E91E2B20E92B3220E91C2320E9573620E90080A0E94040D8ECFF80C0E990E200E074FF20EA19C8C1CD1FD718BD3FD722BD9F4149BD008000E8254149BD2D4151BD0D8007EA008000E8354048BD3D4050BD008000E825302D303530B530BD303D309CA75B9F008000E8008000E8008000E8008000E8008000E8008000E8008000E8008000E8008000E873FF0AEA008000E8C941C8EC42E100E071FF20EA008000E8008000E8008000E8C840C0EC008000E86EFF20EA008000E8008000E8008000E830
+/* TGZS */
+:05C0000000008000E8008000E8008000E8008000E8008000E8008000E8008000E8008000E8008000E8008000E8008000E8008000E8008000E8008000E8008000E8008000E8008000E8008000E8008000E8008000E8008000E8008000E8008000E8008000E8008000E8008000E80098A0E94040D8ECFF80C0E9008000E81FD718BD3FD722BD8104890401040904C941C0EC110400E041CC41CD49CC49CDD141C0EC51CC51CD80041004080400E000CCC0CDD149C0EC8A1F20E98B3F20E9413C41AD493C49AD10CC10CD08CC08CDB94149BB1FF041CD513C51AD009880E98B8007EA241F20E9214580E81A4D80E8315580E8008000E8154149BD1D4151BD2E412AB83453A0E815301D3058E300E0B54048BD3D4050BD2443A0E82C4BA0E8157209E300E01D723530B530BD303D309C97579F008000E86C64C8EC98E1B505BD052E3032C0A0E833C0A0E87464C8EC403C40AD326A2A302073336A00E028731C7283E2778015EAB83D28DF303520DF403000E0CCE26472254252BF2D424ABF302E30DF382E38DF181D45E91E1545E92B4951BD00E01F73383840AF303040AF241F24DF1D3220E92C1F2CDF1A3320E9B01008E34010B81026F030CD2FF038CD2B8020E92A8020E9A62088E200E0AF20282A26AF202AC0AF341F34DF462446DF283080BF203880BF472447DF4E2C4EDF4F2C4FDF563456DF281528DF201D20DF573457DF00E01D05048010EA89E22B303FC11DBD008000E8008000E8008000E8A068BF25008000E820C020AF2805977400E02A1016C020E9048010EA8CE2950528C128AD1FC115BD008000E8008000E8A8679F6B008000E828C028AD1D252005283280AD402A40BD1C8020E9203320AD207300E0B64951BB262FB0E8192020E9352035DF3D203DDF152015DF1D201DDF26D026CD29492AB8264080BD3B4850BD3E54579F00E082E11EAF599F008000E826302930483C48AD2B72C2E12CC044C2052434BF0D242CBF2D464EBF254656BF201D6F8F323E5FE93E50569F00E03B301E8F519F331E5FE9054454B20D444CB219C0B0E834C044C4337300E03E62579F1EAF599F00E00D20843E58E9281D6F8F052000E0851E58E99B3B33DF202042AF3042569F803E57E93F8F519F30805FE9282824AF811E57E9054757BF0D474FBF888058E91B291BDF301D6F8F3A304FE91C3026DF09E33B053E50569F3B3F4FE91E8F519F00E0AC202D444CB42C1CC0AF254454B400E0C830304630AF1B1B48AF00E02520382C4FE9868057E9381D6F8F287400E00D444CB0054454B02D209B10823E57E932F01BCD1EBD599F831E57E9384738AF34202A3000E00D2032200520878057E91F54579F1742569F00E03B6A3F8F519F371E4FE937322AAF00E03200008000E827C044C0361F4FE91F1F26DF371B37BF172617DF3E174FE93F3F4FE9341F34AF2B05A720332B37DF2717C0AF34804FE9008000E82D211AB0252131B00D211AB2052131B203802AEA17C12BBD2D20252005200D20B3689725008000E833C033AF2FC021C01642569F3C274FE91E62579F008000E8252131B42D211AB43F2F5D9F008000E8330500E0281960EC370F5C9F00E02F20233B33AD1E261EDFA71E4FE9172616DF2D2000E0A83F4FE92F2F1EAF252000E0A4164FE90FC021C2A6804FE91F62579F3F2F5D9F00E08F20A5374FE90F170FAF06C021C4008000E8008000E8A3804FE9062000E01F261FDFA11F4FE9A23F4FE9008000E8008000E806061FAF008000E8008000E8008000E8A0804FE9008000E8008000E8573920E9162820E91D3B20E91E2B20E92B3220E91C2320E9573620E90080A0E94040D8ECFF80C0E990E200E06CFF20EA19C8C1CD1FD718BD3FD722BD9F4149BD008000E8254149BD2D4151BD0D8007EA008000E8354048BD3D4050BD008000E825302D303530B530BD303D309CA75B9F008000E8008000E8008000E8008000E8008000E8008000E8008000E8008000E8008000E86BFF0AEA008000E8C941C8EC42E100E069FF20EA008000E8008000E8008000E8C840C0EC008000E866FF20EA008000E8008000E8008000E85C
+/* TGZSF */
+:05E0000000008000E8008000E8008000E8008000E8008000E8008000E8008000E8008000E8008000E8008000E8008000E8008000E8008000E8008000E8008000E8008000E8008000E8008000E8008000E8008000E8008000E8008000E8008000E8008000E8008000E8008000E80098A0E94040D8ECFF80C0E9008000E81FD718BD3FD722BD8104890401040904C941C0EC110400E041CC41CD49CC49CDD141C0EC51CC51CD80041004080400E000CCC0CDD149C0EC8A1F20E98B3F20E9413C41AD493C49AD10CC10CD08CC08CDB94149BB1FF041CD513C51AD009880E98F8007EA241F20E9214580E81A4D80E8315580E8008000E8154149BD1D4151BD2E412AB83453A0E815301D3058E300E0B54048BD3D4050BD2443A0E82C4BA0E8157209E300E01D723530B530BD303D309C97579F008000E86C64C8EC98E1B505BD052E3032C0A0E833C0A0E87464C8EC403C40AD326A2A302073336A00E028731C7283E27B8015EAB83D28DF303520DF403000E0CCE26472254252BF2D424ABF302E30DF382E38DF181D45E91E1545E92B4951BD00E01F73383840AF303040AF241F24DF1D3220E92C1F2CDF1A3320E9B01008E34010B81026F030CD2FF038CD2B8020E92A8020E9A62088E200E0AF20282A26AF202AC0AF341F34DF462446DF283080BF203880BF472447DF4E2C4EDF4F2C4FDF563456DF281528DF201D20DF573457DF00E01D05048010EA89E22B303FC11DBD008000E8008000E8008000E8A068BF25008000E820C020AF2805977400E02A1016C020E9048010EA8CE2950528C128AD1FC115BD008000E8008000E8A8679F6B008000E828C028AD1D252005283280AD402A40BD1C8020E9203320AD207300E0B64951BB262FB0E8192020E9352035DF3D203DDF152015DF1D201DDF26D026CD29492AB8264080BD3B4850BD3E54579F00E082E11EAF599F008000E826302930483C48AD2B72C2E12CC044C2052434BF0D242CBF2D464EBF254656BF201D6F8F323E5FE93E50569F00E03B301E8F519F331E5FE9054454B20D444CB219C0B0E834C044C4337300E03E62579F1EAF599F00E00D20843E58E9281D6F8F052000E0851E58E99B3B33DF202042AF3042569F803E57E93F8F519F30805FE9282824AF811E57E9054757BF0D474FBF888058E91B291BDF301D6F8F3A304FE91C3026DF09E33B053E50569F3B3F4FE91E8F519F00E0AC202D444CB42C1CC0AF254454B400E0C830304630AF1B1B48AF00E02520382C4FE9868057E9381D6F8F287400E00D444CB0054454B02D209B10823E57E932F01BCD1EBD599F831E57E9384738AF34202A3000E00D2032200520878057E91F54579F1742569F00E03B6A3F8F519F371E4FE937322AAF00E03200008000E827C044C0361F4FE91F1F26DF371B37BF172617DF3E174FE93F3F4FE9341F34AF2B05A720332B37DF2717C0AF34804FE9008000E82D211AB0252131B00D211AB2052131B203802AEA17C12BBD2D20252005200D20B3689725008000E833C033AF2FC021C01642569F3C274FE91E62579F008000E8252131B42D211AB43F2F5D9F008000E8330500E0281960EC0D211AB6052131B6370F5C9F00E02F20233B33AD1E261EDFA71E4FE9172616DF2D2000E0A83F4FE92F2F1EAF252000E0A4164FE90FC021C2A6804FE91F62579F0D2005202FC021C63F2F5D9F00E00F201750569FA5374FE906C021C40F170FAF370F5C9F008000E82F2000E0A3804FE9062000E01F261FDF172617DF35174FE9A11F4FE9A23F4FE906061FAF39374FE92F2F17AF008000E8A0804FE9008000E831804FE9008000E8008000E8573920E9162820E91D3B20E91E2B20E92B3220E91C2320E9573620E90080A0E94040D8ECFF80C0E990E200E068FF20EA19C8C1CD1FD718BD3FD722BD9F4149BD008000E8254149BD2D4151BD0D8007EA008000E8354048BD3D4050BD008000E825302D303530B530BD303D309CA75B9F008000E8008000E8008000E8008000E8008000E8008000E8008000E8008000E8008000E867FF0AEA008000E8C941C8EC42E100E065FF20EA008000E8008000E8008000E8C840C0EC008000E862FF20EA008000E8008000E8008000E8F9
+/* TGZSA */
+:05E0000000008000E8008000E8008000E8008000E8008000E8008000E8008000E8008000E8008000E8008000E8008000E8008000E8008000E8008000E8008000E8008000E8008000E8008000E8008000E8008000E8008000E8008000E8008000E8008000E8008000E8008000E80098A0E94040D8ECFF80C0E9008000E81FD718BD3FD722BD8104890401040904C941C0EC110400E041CC41CD49CC49CDD141C0EC51CC51CD80041004080400E000CCC0CDD149C0EC8A1F20E98B3F20E9413C41AD493C49AD10CC10CD08CC08CDB94149BB1FF041CD513C51AD009880E98F8007EA241F20E9214580E81A4D80E8315580E8008000E8154149BD1D4151BD2E412AB83453A0E815301D3058E300E0B54048BD3D4050BD2443A0E82C4BA0E8157209E300E01D723530B530BD303D309C97579F008000E86C64C8EC98E1B505BD052E3032C0A0E833C0A0E87464C8EC403C40AD326A2A302073336A00E028731C7283E27B8015EAB83D28DF303520DF403000E0CCE26472254252BF2D424ABF302E30DF382E38DF181D45E91E1545E92B4951BD00E01F73383840AF303040AF241F24DF1D3220E92C1F2CDF1A3320E9B01008E34010B81026F030CD2FF038CD2B8020E92A8020E9A62088E200E0AF20282A26AF202AC0AF341F34DF462446DF283080BF203880BF472447DF4E2C4EDF4F2C4FDF563456DF281528DF201D20DF573457DF00E01D05048010EA89E22B303FC11DBD008000E8008000E8008000E8A068BF25008000E820C020AF2805977400E02A1016C020E9048010EA8CE2950528C128AD1FC115BD008000E8008000E8A8679F6B008000E828C028AD1D252005283280AD402A40BD1C8020E9203320AD207300E0B64951BB262FB0E8192020E9352035DF3D203DDF152015DF1D201DDF26D026CD29492AB8264080BD3B4850BD3E54579F00E082E11EAF599F008000E826302930483C48AD2B72C2E12CC044C2052434BF0D242CBF2D464EBF254656BF201D6F8F323E5FE93E50569F00E03B301E8F519F331E5FE9054454B20D444CB219C0B0E834C044C4337300E03E62579F1EAF599F00E00D20843E58E9281D6F8F052000E0851E58E99B3B33DF202042AF3042569F803E57E93F8F519F30805FE9282824AF811E57E9054757BF0D474FBF888058E91B291BDF301D6F8F3A304FE91C3026DF09E33B053E50569F3B3F4FE91E8F519F00E0AC202D444CB42C1CC0AF254454B400E0C830304630AF1B1B48AF00E02520382C4FE9868057E9381D6F8F287400E00D444CB0054454B02D209B10823E57E932F01BCD1EBD599F831E57E9384738AF34202A3000E00D2032200520878057E91F54579F1742569F00E03B6A3F8F519F371E4FE937322AAF00E03200008000E827C044C0361F4FE91F1F26DF371B37BF172617DF3E174FE93F3F4FE9341F34AF2B05A720332B37DF2717C0AF34804FE9008000E82D211AB0252131B00D211AB2052131B203802AEA17C12BBD2D20252005200D20B3689725008000E833C033AF2FC021C01642569F3C274FE91E62579F008000E8252131B42D211AB43F2F5D9F008000E8330500E0281960EC0D444CB6054454B6370F5C9F00E02F20233B33AD1E261EDFA71E4FE9172616DF2D2000E0A83F4FE92F2F1EAF252000E0A4164FE90FC021C2A6804FE91F62579F0D200520008000E83F2F5D9F00E00F201750569FA5374FE906C021C40F170FAF370F5C9F008000E82FC044C6A3804FE9062000E01F261FDF172617DF9D174FE9A11F4FE9A23F4FE906061FAF00E0AF209E374FE92F172FAFA0804FE9008000E8008000E89C804FE9008000E8573920E9162820E91D3B20E91E2B20E92B3220E91C2320E9573620E90080A0E94040D8ECFF80C0E990E200E068FF20EA19C8C1CD1FD718BD3FD722BD9F4149BD008000E8254149BD2D4151BD0D8007EA008000E8354048BD3D4050BD008000E825302D303530B530BD303D309CA75B9F008000E8008000E8008000E8008000E8008000E8008000E8008000E8008000E8008000E867FF0AEA008000E8C941C8EC42E100E065FF20EA008000E8008000E8008000E8C840C0EC008000E862FF20EA008000E8008000E8008000E883
+/* TGZAF */
+:05B8000000008000E8008000E8008000E8008000E8008000E8008000E80098A0E94040D8ECFF80C0E9008000E81FD718BD3FD722BD8104890401040904C941C0EC110400E041CC41CD49CC49CDD141C0EC51CC51CD80041004080400E000CCC0CDD149C0EC8A1F20E98B3F20E9413C41AD493C49AD10CC10CD08CC08CDB94149BB1FF041CD513C51AD009880E9948007EA241F20E9214580E81A4D80E8315580E8008000E8154149BD1D4151BD2E412AB83453A0E815301D3058E300E0B54048BD3D4050BD2443A0E82C4BA0E8157209E300E01D723530B530BD303D309C97579F008000E86C64C8EC98E1B505BD052E3032C0A0E833C0A0E87464C8EC403C40AD326A2A302073336A00E028731C7283E2808015EAB83D28DF303520DF403000E0CCE26472254252BF2D424ABF302E30DF382E38DF181D45E91E1545E92B4951BD00E01F73383840AF303040AF241F24DF1D3220E92C1F2CDF1A3320E9B01008E34010B81026F030CD2FF038CD2B8020E92A8020E9A62088E200E0AF20282A26AF202AC0AF341F34DF462446DF283080BF203880BF472447DF4E2C4EDF4F2C4FDF563456DF281528DF201D20DF573457DF00E01D05048010EA89E22B303FC11DBD008000E8008000E8008000E8A068BF25008000E820C020AF2805977400E02A1016C020E9048010EA8CE2950528C128AD1FC115BD008000E8008000E8A8679F6B008000E828C028AD1D252005283280AD402A40BD1C8020E9203320AD207300E0B64951BB262FB0E8192020E9352035DF3D203DDF152015DF1D201DDF26D026CD29492AB8264080BD3B4850BD3E54579F00E082E11EAF599F008000E826302930483C48AD2B72C2E12CC044C2052434BF0D242CBF2D464EBF254656BF201D6F8F323E5FE93E50569F00E03B301E8F519F331E5FE9054454B20D444CB219C0B0E834C044C4337300E03E62579F1EAF599F00E00D20843E58E9281D6F8F052000E0851E58E99B3B33DF202042AF3042569F803E57E93F8F519F30805FE9282824AF811E57E9054757BF0D474FBF888058E91B291BDF301D6F8F3A304FE91C3026DF09E33B053E50569F3B3F4FE91E8F519F00E0AC202D444CB42C1CC0AF254454B400E0C830304630AF1B1B48AF00E02520382C4FE9868057E9381D6F8F287400E00D444CB0054454B02D209B10823E57E932F01BCD1EBD599F831E57E9384738AF34202A3000E00D2032200520878057E91F54579F1742569F00E03B6A3F8F519F371E4FE937322AAF00E03200008000E827C044C0361F4FE91F1F26DF371B37BF172617DF3E174FE93F3F4FE9341F34AF2B05A720332B37DF2717C0AF34804FE9008000E82D211AB0252131B00D211AB2052131B203802AEA17C12BBD2D20252005200D20B3689725008000E833C033AF2FC021C01642569F3C274FE91E62579F008000E8252131B42D211AB43F2F5D9F008000E8330500E0281960EC0D211AB6052131B6370F5C9F00E02F20233B33AD1E261EDFA71E4FE9172616DF2D2000E0A83F4FE92F2F1EAF252000E0A4164FE90FC021C2A6804FE91F62579F0D2005202FC021C62D444CB6254454B63F2F5D9F00E00F202D20252007C044C61750569FA5374FE906C021C40F170FAF370F5C9F008000E81E62579F008000E83E3D5D9F00E007202F2000E0A30F4FE9062000E01F261FDF172617DFA11F4FE91E261EDF9D1E4FE935174FE9A23F4FE906061FAF39374FE92F2F17AF07071EAFA0804FE99E3E4FE931804FE99C804FE9008000E8573920E9162820E91D3B20E91E2B20E92B3220E91C2320E9573620E90080A0E94040D8ECFF80C0E990E200E063FF20EA19C8C1CD1FD718BD3FD722BD9F4149BD008000E8254149BD2D4151BD0D8007EA008000E8354048BD3D4050BD008000E825302D303530B530BD303D309CA75B9F008000E8008000E8008000E8008000E8008000E8008000E8008000E8008000E8008000E862FF0AEA008000E8C941C8EC42E100E060FF20EA008000E8008000E8008000E8C840C0EC008000E85DFF20EA008000E8008000E8008000E8D8
+:0000000001FF
diff --git a/firmware/matrox/g400_warp.H16 b/firmware/matrox/g400_warp.H16
new file mode 100644
index 000000000000..b432d1074d8d
--- /dev/null
+++ b/firmware/matrox/g400_warp.H16
@@ -0,0 +1,44 @@
+/*
+ * WARP pipes are named according to the functions they perform, where
+ *
+ *   - T stands for computation of texture stage 0
+ *   - T2 stands for computation of both texture stage 0 and texture stage 1
+ *   - G stands for computation of triangle intensity (Gouraud interpolation)
+ *   - Z stands for computation of Z buffer interpolation
+ *   - S stands for computation of specular highlight
+ *   - A stands for computation of the alpha channel
+ *   - F stands for computation of vertex fog interpolation
+ */
+/* TGZ */
+:0338000000008898E9008000E80080A0E90000D8ECFF80C0E9008000E8224048BF2A4050BF324149BF3A4151BFC36BCB6B008898E9737BC8EC96E241047B43A0E8734BA0E8ADEE299F00E0490490E251043146B1E84941C0EC3957B1E8000446E27353A0E85141C0EC31003900588015EA080410045149C0EC2F4160EA312039201F42A0E82A424ABF274AA0E81A4252BF1E4960EA737BC8EC265160EA324048BD224050BD124149BD3A4151BDBF2F26BD00E07B723220222012203A20463146BF4E314EBFB3E22D9F008000E8563156BF473947BF4F394FBF573957BF4A8007EA244120E94273F8EC00E02D7333720CE3A52F1EBD43432DDF4B4B2DDFAE1E26BD58E3336653532DDF008000E8B83833BF00E059E31E1241E91A2241E92B403DE93F4BA0E82D73307605803DEA3743A0E83D53A0E84870F8EC2B483CE91F27BCE8008000E8008000E8008000E815C020E915C020E915C020E915C020E9183A41E91D3241E92A4020E9563D56DF463746DF4E3F4EDF163020E94F3F4FDF32322DDF22222DDF12122DDF3A3A2DDF473747DF573D57DF3DCF74C037CF74C431532F9F348020E939E52C9F3C3D20E90A444CB0024454B02A444CB21A4454B21D803AEA0A2002203DCF74C22A201A2030502E9F32315FE938212C9F33395FE931532F9F008000E82A444CB41A4454B439E52C9F383D20E988735EE92A201A202A464EBF1A4656BF31532F9F3E304FE939E52C9F3F384FE90A474FBF024757BF31532F9F3A314FE939E52C9F3B394FE92A434BBF1A4353BF30502E9F36314FE938212C9F37394FE931532F9F803157E939E52C9F813957E9374850BD8A3620E9867657E98B3E20E9823057E9877757E9833857E9354951BD84315EE9301F5FE985395EE9572520E92B4820E91D37E1EA1E35E1EA00E02677244920E9AFFF20EA162620E9572EBFEA1C46A0E8234EA0E82B56A0E81D47A0E8244FA0E82C57A0E81C0023002B0000E01D0024002C0000E01C6523652B6500E01D6524652C6500E01C2360EC36D736AD2B8060EC1D2460EC3ED73EAD2C8060EC1C2BDEE82380DEE8368036BD3E803EBD33D71CBD3BD723BD468046CF4F804FCF563356CF473B47CFD6FF20EA008000E84E334ECF573B57CF9DFF20EA57C0BFEA0080A0E90000D8EC59
+/* TGZF */
+:0360000000008898E9008000E80080A0E90000D8ECFF80C0E9008000E8224048BF2A4050BF324149BF3A4151BFC36BCB6B008898E9737BC8EC96E241047B43A0E8734BA0E8ADEE299F00E0490490E251043146B1E84941C0EC3957B1E8000446E27353A0E85141C0EC310039005D8015EA080410045149C0EC2F4160EA312039201F42A0E82A424ABF274AA0E81A4252BF1E4960EA737BC8EC265160EA324048BD224050BD124149BD3A4151BDBF2F26BD00E07B723220222012203A20463146BF4E314EBFB3E22D9F008000E8563156BF473947BF4F394FBF573957BF4F8007EA244120E94273F8EC00E02D7333720CE3A52F1EBD43432DDF4B4B2DDFAE1E26BD58E3336653532DDF008000E8B83833BF00E059E31E1241E91A2241E92B403DE93F4BA0E82D73307605803DEA3743A0E83D53A0E84870F8EC2B483CE91F27BCE8008000E8008000E8008000E815C020E915C020E915C020E915C020E9183A41E91D3241E92A4020E9563D56DF463746DF4E3F4EDF163020E94F3F4FDF32322DDF22222DDF12122DDF3A3A2DDF473747DF573D57DF3DCF74C037CF74C439E52C9F348020E931532F9F008000E888735EE9008000E827CF75C63C3D20E90A444CB0024454B02A444CB21A4454B220803AEA0A2002203DCF74C22A201A2030502E9F32315FE938212C9F33395FE931532F9F312720E90A444CB4024454B42A454DB61A4555B639E52C9F383D20E90A2002202A201A200A474FBF024757BF30502E9F3E304FE938212C9F3F384FE92A464EBF1A4656BF31532F9F3A314FE939E52C9F3B394FE931532F9F36304FE939E52C9F37384FE92A434BBF1A4353BF30502E9F35314FE938212C9F39394FE931532F9F803157E939E52C9F813957E9374850BD8A3620E9867657E98B3E20E9823057E9877757E9833857E9354951BD84315EE9301F5FE985395EE9572520E92B4820E91D37E1EA1E35E1EA00E02677244920E9AAFF20EA162620E9572EBFEA1C46A0E8234EA0E82B56A0E81D47A0E8244FA0E82C57A0E81C0023002B0000E01D0024002C0000E01C6523652B6500E01D6524652C6500E01C2360EC36D736AD2B8060EC1D2460EC3ED73EAD2C8060EC1C2BDEE82380DEE8368036BD3E803EBD33D71CBD3BD723BD468046CF4F804FCF563356CF473B47CFD3FF20EA008000E84E334ECF573B57CF98FF20EA57C0BFEA0080A0E90000D8EC90
+/* TGZA */
+:0358000000008898E9008000E80080A0E90000D8ECFF80C0E9008000E8224048BF2A4050BF324149BF3A4151BFC36BCB6B008898E9737BC8EC96E241047B43A0E8734BA0E8ADEE299F00E0490490E251043146B1E84941C0EC3957B1E8000446E27353A0E85141C0EC310039005C8015EA080410045149C0EC2F4160EA312039201F42A0E82A424ABF274AA0E81A4252BF1E4960EA737BC8EC265160EA324048BD224050BD124149BD3A4151BDBF2F26BD00E07B723220222012203A20463146BF4E314EBFB3E22D9F008000E8563156BF473947BF4F394FBF573957BF4E8007EA244120E94273F8EC00E02D7333720CE3A52F1EBD43432DDF4B4B2DDFAE1E26BD58E3336653532DDF008000E8B83833BF00E059E31E1241E91A2241E92B403DE93F4BA0E82D73307605803DEA3743A0E83D53A0E84870F8EC2B483CE91F27BCE8008000E8008000E8008000E815C020E915C020E915C020E915C020E9183A41E91D3241E92A4020E9563D56DF463746DF4E3F4EDF163020E94F3F4FDF32322DDF22222DDF12122DDF3A3A2DDF473747DF573D57DF3DCF74C037CF74C431532F9F348020E939E52C9F3C3D20E927CF74C63DCF74C20A444CB0024454B02A444CB21A4454B220803AEA0A20022088735EE92A201A2030502E9F32315FE938212C9F33395FE931532F9F9C2720E90A444CB4024454B42A444CB61A4454B639E52C9F383D20E90A2002202A201A200A474FBF024757BF30502E9F3E304FE938212C9F3F384FE92A464EBF1A4656BF31532F9F3A314FE939E52C9F3B394FE931532F9F36304FE939E52C9F37384FE92A434BBF1A4353BF30502E9F9D314FE938212C9F9E394FE931532F9F803157E939E52C9F813957E9374850BD8A3620E9867657E98B3E20E9823057E9877757E9833857E9354951BD84315EE9301F5FE985395EE9572520E92B4820E91D37E1EA1E35E1EA00E02677244920E9ABFF20EA162620E9572EBFEA1C46A0E8234EA0E82B56A0E81D47A0E8244FA0E82C57A0E81C0023002B0000E01D0024002C0000E01C6523652B6500E01D6524652C6500E01C2360EC36D736AD2B8060EC1D2460EC3ED73EAD2C8060EC1C2BDEE82380DEE8368036BD3E803EBD33D71CBD3BD723BD468046CF4F804FCF563356CF473B47CFD3FF20EA008000E84E334ECF573B57CF99FF20EA57C0BFEA0080A0E90000D8EC35
+/* TGZAF */
+:0380000000008898E9008000E80080A0E90000D8ECFF80C0E9008000E8224048BF2A4050BF324149BF3A4151BFC36BCB6B008898E9737BC8EC96E241047B43A0E8734BA0E8ADEE299F00E0490490E251043146B1E84941C0EC3957B1E8000446E27353A0E85141C0EC31003900618015EA080410045149C0EC2F4160EA312039201F42A0E82A424ABF274AA0E81A4252BF1E4960EA737BC8EC265160EA324048BD224050BD124149BD3A4151BDBF2F26BD00E07B723220222012203A20463146BF4E314EBFB3E22D9F008000E8563156BF473947BF4F394FBF573957BF538007EA244120E94273F8EC00E02D7333720CE3A52F1EBD43432DDF4B4B2DDFAE1E26BD58E3336653532DDF008000E8B83833BF00E059E31E1241E91A2241E92B403DE93F4BA0E82D73307605803DEA3743A0E83D53A0E84870F8EC2B483CE91F27BCE8008000E8008000E8008000E815C020E915C020E915C020E915C020E9183A41E91D3241E92A4020E9563D56DF463746DF4E3F4EDF163020E94F3F4FDF32322DDF22222DDF12122DDF3A3A2DDF473747DF573D57DF3DCF74C037CF74C40A444CB0024454B031532F9F343720E939E52C9F3C3D20E92A444CB21A4454B226803AEA0A20022088735EE92A201A203DCF74C227CF74C630502E9F32315FE938212C9F33395FE931532F9F9C2720E90A444CB4024454B42A444CB61A4454B639E52C9F383D20E90A2002202A201A203DCF75C6008000E830502E9F3E304FE938212C9F3F384FE90A454DB6024555B631532F9F3A314FE939E52C9F3B394FE9313D20E90A2002202A464EBF1A4656BF0A474FBF024757BF30502E9F36304FE938212C9F37384FE931532F9F9D314FE939E52C9F9E394FE92A434BBF1A4353BF30502E9F35304FE938212C9F39384FE931532F9F803157E939E52C9F813957E9374850BD8A3620E9867657E98B3E20E9823057E9877757E9833857E9354951BD84315EE9301F5FE985395EE9572520E92B4820E91D37E1EA1E35E1EA00E02677244920E9A6FF20EA162620E9572EBFEA1C46A0E8234EA0E82B56A0E81D47A0E8244FA0E82C57A0E81C0023002B0000E01D0024002C0000E01C6523652B6500E01D6524652C6500E01C2360EC36D736AD2B8060EC1D2460EC3ED73EAD2C8060EC1C2BDEE82380DEE8368036BD3E803EBD33D71CBD3BD723BD468046CF4F804FCF563356CF473B47CFCDFF20EA008000E84E334ECF573B57CF94FF20EA57C0BFEA0080A0E90000D8EC89
+/* TGZS */
+:03A0000000008898E9008000E80080A0E90000D8ECFF80C0E9008000E8224048BF2A4050BF324149BF3A4151BFC36BCB6B008898E9737BC8EC96E241047B43A0E8734BA0E8ADEE299F00E0490490E251043146B1E84941C0EC3957B1E8000446E27353A0E85141C0EC31003900658015EA080410045149C0EC2F4160EA312039201F42A0E82A424ABF274AA0E81A4252BF1E4960EA737BC8EC265160EA324048BD224050BD124149BD3A4151BDBF2F26BD00E07B723220222012203A20463146BF4E314EBFB3E22D9F008000E8563156BF473947BF4F394FBF573957BF578007EA244120E94273F8EC00E02D7333720CE3A52F1EBD43432DDF4B4B2DDFAE1E26BD58E3336653532DDF008000E8B83833BF00E059E31E1241E91A2241E92B403DE93F4BA0E82D73307605803DEA3743A0E83D53A0E84870F8EC2B483CE91F27BCE8008000E8008000E8008000E815C020E915C020E915C020E915C020E9183A41E91D3241E92A4020E9563D56DF463746DF4E3F4EDF163020E94F3F4FDF473747DF573D57DF32322DDF22222DDF12122DDF3A3A2DDF27CF74C237CF74C40A444CB0024454B03DCF74C0343720E931532F9F382720E939E52C9F3C3D20E92A444CB21A4454B229803AEA0A20022027CF75C02A201A2030502E9F32315FE938212C9F33395FE93DCF75C237CF75C431532F9FA62720E939E52C9FA33D20E92A444CB41A4454B40A454DB0024555B088735EE92A201A20A03720E90A20022031532F9F3E304FE939E52C9F3F384FE930502E9F3A314FE92A454DB21A4555B20A454DB4024555B438212C9F3B394FE90A2002202A201A202A464EBF1A4656BF31532F9F36314FE939E52C9F37394FE930502E9FA7304FE938212C9FA8384FE90A474FBF024757BF31532F9FA4314FE939E52C9FA5394FE92A434BBF1A4353BF30502E9FA1304FE938212C9FA2384FE931532F9F803157E939E52C9F813957E9374850BD8A3620E9867657E98B3E20E9823057E9877757E9833857E9354951BD84315EE9301F5FE985395EE9572520E92B4820E91D37E1EA1E35E1EA00E02677244920E9A2FF20EA162620E9572EBFEA1C46A0E8234EA0E82B56A0E81D47A0E8244FA0E82C57A0E81C0023002B0000E01D0024002C0000E01C6523652B6500E01D6524652C6500E01C2360EC36D736AD2B8060EC1D2460EC3ED73EAD2C8060EC1C2BDEE82380DEE8368036BD3E803EBD33D71CBD3BD723BD468046CF4F804FCF563356CF473B47CFCAFF20EA008000E84E334ECF573B57CF90FF20EA57C0BFEA0080A0E90000D8ECD8
+/* TGZSF */
+:03C8000000008898E9008000E80080A0E90000D8ECFF80C0E9008000E8224048BF2A4050BF324149BF3A4151BFC36BCB6B008898E9737BC8EC96E241047B43A0E8734BA0E8ADEE299F00E0490490E251043146B1E84941C0EC3957B1E8000446E27353A0E85141C0EC310039006A8015EA080410045149C0EC2F4160EA312039201F42A0E82A424ABF274AA0E81A4252BF1E4960EA737BC8EC265160EA324048BD224050BD124149BD3A4151BDBF2F26BD00E07B723220222012203A20463146BF4E314EBFB3E22D9F008000E8563156BF473947BF4F394FBF573957BF5C8007EA244120E94273F8EC00E02D7333720CE3A52F1EBD43432DDF4B4B2DDFAE1E26BD58E3336653532DDF008000E8B83833BF00E059E31E1241E91A2241E92B403DE93F4BA0E82D73307605803DEA3743A0E83D53A0E84870F8EC2B483CE91F27BCE8008000E8008000E8008000E815C020E915C020E915C020E915C020E9183A41E91D3241E92A4020E9563D56DF463746DF4E3F4EDF163020E94F3F4FDF473747DF573D57DF32322DDF22222DDF12122DDF3A3A2DDF27CF74C237CF74C40A444CB0024454B03DCF74C0343720E931532F9F382720E939E52C9F3C3D20E92A444CB21A4454B22E803AEA0A20022027CF75C02A201A2030502E9F32315FE938212C9F33395FE93DCF75C237CF75C431532F9FA62720E939E52C9FA33D20E92A444CB41A4454B40A454DB0024555B088735EE92A201A20A03720E90A20022031532F9F3E304FE939E52C9F3F384FE930502E9F3A314FE938212C9F3B394FE92A454DB21A4555B20A454DB4024555B427CF75C62A201A20A7304FE90A20022031532F9F312720E939E52C9FA8384FE92A454DB61A4555B630502E9F36314FE938212C9F37394FE9008000E82A201A202A464EBF1A4656BF31532F9FA4314FE939E52C9FA5394FE90A474FBF024757BF31532F9FA1304FE939E52C9FA2384FE92A434BBF1A4353BF30502E9F35314FE938212C9F39394FE931532F9F803157E939E52C9F813957E9374850BD8A3620E9867657E98B3E20E9823057E9877757E9833857E9354951BD84315EE9301F5FE985395EE9572520E92B4820E91D37E1EA1E35E1EA00E02677244920E99DFF20EA162620E9572EBFEA1C46A0E8234EA0E82B56A0E81D47A0E8244FA0E82C57A0E81C0023002B0000E01D0024002C0000E01C6523652B6500E01D6524652C6500E01C2360EC36D736AD2B8060EC1D2460EC3ED73EAD2C8060EC1C2BDEE82380DEE8368036BD3E803EBD33D71CBD3BD723BD468046CF4F804FCF563356CF473B47CFC5FF20EA008000E84E334ECF573B57CF8BFF20EA57C0BFEA0080A0E90000D8ECD3
+/* TGZSA */
+:03C8000000008898E9008000E80080A0E90000D8ECFF80C0E9008000E8224048BF2A4050BF324149BF3A4151BFC36BCB6B008898E9737BC8EC96E241047B43A0E8734BA0E8ADEE299F00E0490490E251043146B1E84941C0EC3957B1E8000446E27353A0E85141C0EC310039006A8015EA080410045149C0EC2F4160EA312039201F42A0E82A424ABF274AA0E81A4252BF1E4960EA737BC8EC265160EA324048BD224050BD124149BD3A4151BDBF2F26BD00E07B723220222012203A20463146BF4E314EBFB3E22D9F008000E8563156BF473947BF4F394FBF573957BF5C8007EA244120E94273F8EC00E02D7333720CE3A52F1EBD43432DDF4B4B2DDFAE1E26BD58E3336653532DDF008000E8B83833BF00E059E31E1241E91A2241E92B403DE93F4BA0E82D73307605803DEA3743A0E83D53A0E84870F8EC2B483CE91F27BCE8008000E8008000E8008000E815C020E915C020E915C020E915C020E9183A41E91D3241E92A4020E9563D56DF463746DF4E3F4EDF163020E94F3F4FDF473747DF573D57DF32322DDF22222DDF12122DDF3A3A2DDF27CF74C237CF74C40A444CB0024454B03DCF74C0343720E931532F9F382720E939E52C9F3C3D20E92A444CB21A4454B22E803AEA0A20022027CF75C02A201A2030502E9F32315FE938212C9F33395FE93DCF75C237CF75C431532F9FA62720E939E52C9FA33D20E92A444CB41A4454B40A454DB0024555B088735EE92A201A20A03720E90A20022031532F9F3E304FE939E52C9F3F384FE930502E9F3A314FE938212C9F3B394FE92A454DB21A4555B20A454DB4024555B427CF74C62A201A20A7304FE90A20022031532F9F9C2720E939E52C9FA8384FE92A444CB61A4454B630502E9F36314FE938212C9F37394FE9008000E82A201A202A464EBF1A4656BF31532F9FA4314FE939E52C9FA5394FE90A474FBF024757BF31532F9FA1304FE939E52C9FA2384FE92A434BBF1A4353BF30502E9F9D314FE938212C9F9E394FE931532F9F803157E939E52C9F813957E9374850BD8A3620E9867657E98B3E20E9823057E9877757E9833857E9354951BD84315EE9301F5FE985395EE9572520E92B4820E91D37E1EA1E35E1EA00E02677244920E99DFF20EA162620E9572EBFEA1C46A0E8234EA0E82B56A0E81D47A0E8244FA0E82C57A0E81C0023002B0000E01D0024002C0000E01C6523652B6500E01D6524652C6500E01C2360EC36D736AD2B8060EC1D2460EC3ED73EAD2C8060EC1C2BDEE82380DEE8368036BD3E803EBD33D71CBD3BD723BD468046CF4F804FCF563356CF473B47CFC5FF20EA008000E84E334ECF573B57CF8BFF20EA57C0BFEA0080A0E90000D8ECA0
+/* TGZSAF */
+:03E8000000008898E9008000E80080A0E90000D8ECFF80C0E9008000E8224048BF2A4050BF324149BF3A4151BFC36BCB6B008898E9737BC8EC96E241047B43A0E8734BA0E8ADEE299F00E0490490E251043146B1E84941C0EC3957B1E8000446E27353A0E85141C0EC310039006E8015EA080410045149C0EC2F4160EA312039201F42A0E82A424ABF274AA0E81A4252BF1E4960EA737BC8EC265160EA324048BD224050BD124149BD3A4151BDBF2F26BD00E07B723220222012203A20463146BF4E314EBFB3E22D9F008000E8563156BF473947BF4F394FBF573957BF608007EA244120E94273F8EC00E02D7333720CE3A52F1EBD43432DDF4B4B2DDFAE1E26BD58E3336653532DDF008000E8B83833BF00E059E31E1241E91A2241E92B403DE93F4BA0E82D73307605803DEA3743A0E83D53A0E84870F8EC2B483CE91F27BCE8008000E8008000E8008000E815C020E915C020E915C020E915C020E9183A41E91D3241E92A4020E9563D56DF463746DF4E3F4EDF163020E94F3F4FDF473747DF573D57DF32322DDF22222DDF12122DDF3A3A2DDF27CF74C237CF74C40A444CB0024454B03DCF74C0343720E931532F9F382720E939E52C9F3C3D20E92A444CB21A4454B232803AEA0A20022027CF75C02A201A2030502E9F32315FE938212C9F33395FE93DCF75C237CF75C431532F9FA62720E939E52C9FA33D20E92A444CB41A4454B40A454DB0024555B088735EE92A201A20A03720E90A20022031532F9F3E304FE939E52C9F3F384FE930502E9F3A314FE938212C9F3B394FE92A454DB21A4555B20A454DB4024555B427CF74C62A201A20A7304FE90A20022031532F9F9C2720E939E52C9FA8384FE92A444CB61A4454B630502E9F36314FE938212C9F37394FE90A454DB6024555B63DCF75C62A201A202A464EBF1A4656BF31532F9FA4314FE939E52C9FA5394FE9313D20E90A2002200A474FBF024757BF30502E9FA1304FE938212C9FA2384FE931532F9F9D314FE939E52C9F9E394FE92A434BBF1A4353BF30502E9F35304FE938212C9F39384FE931532F9F803157E939E52C9F813957E9374850BD8A3620E9867657E98B3E20E9823057E9877757E9833857E9354951BD84315EE9301F5FE985395EE9572520E92B4820E91D37E1EA1E35E1EA00E02677244920E999FF20EA162620E9572EBFEA1C46A0E8234EA0E82B56A0E81D47A0E8244FA0E82C57A0E81C0023002B0000E01D0024002C0000E01C6523652B6500E01D6524652C6500E01C2360EC36D736AD2B8060EC1D2460EC3ED73EAD2C8060EC1C2BDEE82380DEE8368036BD3E803EBD33D71CBD3BD723BD468046CF4F804FCF563356CF473B47CFC1FF20EA008000E84E334ECF573B57CF87FF20EA57C0BFEA0080A0E90000D8EC83
+/* T2GZ */
+:0438000000008A98E9008000E80080A0E90000D8ECFF80C0E9008000E80A4050BF2A4060BF324151BF3A4161BFC36BD36B008A98E9737BC8EC96E241047B43A0E87353A0E8ADEE239F00E0510490E261043146B1E85141E0EC3967B1E8000446E27363A0E86141E0EC31003900788015EA100420046151E0EC2F4160EA312039201F42A0E82A4252BF0F52A0E81A4262BF1E5160EA737BC8EC0E6160EA324050BD224060BD124151BD3A4161BDBF2F0EBD97E27B723220222012203A203548B1E83D59B1E8463146BF563156BFB3E22D9F008000E8663166BF473947BF573957BF673967BF698007EA244120E935003D0000E02D7333720CE38D2F1EBD4375F8EC35203D2043432DDF53532DDFAE1E0EBD58E33366483548BF583558BF683568BF493D49BF593D59BF693D69BF63632DDF4D7DF8EC59E300E0B83833BF2D733076183A41E93F53A0E805803DEA3743A0E83D63A0E85070F8EC2B503CE91F0FBCE8008000E85978F8EC008000E815C020E915C020E915C020E915C020E91E1241E91A2241E9463746DF563F56DF2B403DE9663D66DF1D3241E9673D67DF473747DF573F57DF2A4020E9593F59DF163020E9693D69DF483748DF583F58DF12122DDF22222DDF32322DDF3A3A2DDF683D68DF493749DF3DCF74C037CF74C431532F9F348020E939E52C9F3C3D20E90A4454B0024464B02A4454B21A4464B225803AEA0A2002203DCF74C22A201A2030502E9F32315FE938212C9F33395FE931532F9F008000E82A4454B41A4464B439E52C9F383D20E988735EE92A201A202A4656BF1A4666BF31532F9F3E304FE939E52C9F3F384FE90A4757BF024767BF31532F9F3A314FE939E52C9F3B394FE92A4353BF1A4363BF30502E9F36314FE938212C9F37394FE90A4858BF024868BF31532F9F803157E939E52C9F813957E92A4959BF1A4969BF30502E9F823057E938212C9F833857E931532F9F84315EE939E52C9F85395EE9867657E98A3620E9877757E98B3EBFEA803057E9813857E9823157E9867857E9833957E9877957E9301F5FE98A3420E98B3C20E9375060BD570D20E9355161BD2B5020E91D37E1EA1E35E1EA00E00E77245120E99FFF20EA160E20E9572EBFEA0B46A0E81B56A0E82B66A0E80C47A0E81C57A0E82C67A0E80B001B002B0000E00C001C002C0000E00B651B652B6500E00C651C652C6500E00B1B60EC36D736AD2B8060EC0C1C60EC3ED73EAD2C8060EC0B2BDEE81B80DEE8368036BD3E803EBD33D70BBD3BD71BBD468046CF578057CF663366CF473B47CF563356CF673B67CF0B48A0E81B58A0E82B68A0E80C49A0E81C59A0E82C69A0E80B001B002B0000E00C001C002C0000E00B651B652B6500E00C651C652C6500E00B1B60EC34D734AD2B8060EC0C1C60EC3CD73CAD2C8060EC0B2BDEE81B80DEE8348034BD3C803CBD33D70BBD3BD71BBD488048CF598059CF683368CF493B49CFBEFF20EA008000E8583358CF693B69CF7DFF20EA57C0BFEA0080A0E90000D8ECAC
+/* T2GZF */
+:0460000000008A98E9008000E80080A0E90000D8ECFF80C0E9008000E80A4050BF2A4060BF324151BF3A4161BFC36BD36B008A98E9737BC8EC96E241047B43A0E87353A0E8ADEE239F00E0510490E261043146B1E85141E0EC3967B1E8000446E27363A0E86141E0EC310039007D8015EA100420046151E0EC2F4160EA312039201F42A0E82A4252BF0F52A0E81A4262BF1E5160EA737BC8EC0E6160EA324050BD224060BD124151BD3A4161BDBF2F0EBD97E27B723220222012203A203548B1E83D59B1E8463146BF563156BFB3E22D9F008000E8663166BF473947BF573957BF673967BF6E8007EA244120E935003D0000E02D7333720CE38D2F1EBD4375F8EC35203D2043432DDF53532DDFAE1E0EBD58E33366483548BF583558BF683568BF493D49BF593D59BF693D69BF63632DDF4D7DF8EC59E300E0B83833BF2D733076183A41E93F53A0E805803DEA3743A0E83D63A0E85070F8EC2B503CE91F0FBCE8008000E85978F8EC008000E815C020E915C020E915C020E915C020E91E1241E91A2241E9463746DF563F56DF2B403DE9663D66DF1D3241E9673D67DF473747DF573F57DF2A4020E9593F59DF163020E9693D69DF483748DF583F58DF12122DDF22222DDF32322DDF3A3A2DDF683D68DF493749DF3DCF74C037CF74C439E52C9F348020E931532F9F008000E888735EE9008000E80FCF75C63C3D20E90A4454B0024464B02A4454B21A4464B228803AEA0A2002203DCF74C22A201A2030502E9F32315FE938212C9F33395FE931532F9F310F20E90A4454B4024464B42A4555B61A4565B639E52C9F383D20E90A2002202A201A200A4757BF024767BF30502E9F3E304FE938212C9F3F384FE92A4656BF1A4666BF31532F9F3A314FE939E52C9F3B394FE931532F9F36304FE939E52C9F37384FE92A4353BF1A4363BF30502E9F35314FE938212C9F39394FE90A4858BF024868BF31532F9F803157E939E52C9F813957E92A4959BF1A4969BF30502E9F823057E938212C9F833857E931532F9F84315EE939E52C9F85395EE9867657E98A3620E9877757E98B3EBFEA803057E9813857E9823157E9867857E9833957E9877957E9301F5FE98A3420E98B3C20E9375060BD570D20E9355161BD2B5020E91D37E1EA1E35E1EA00E00E77245120E99AFF20EA160E20E9572EBFEA0B46A0E81B56A0E82B66A0E80C47A0E81C57A0E82C67A0E80B001B002B0000E00C001C002C0000E00B651B652B6500E00C651C652C6500E00B1B60EC36D736AD2B8060EC0C1C60EC3ED73EAD2C8060EC0B2BDEE81B80DEE8368036BD3E803EBD33D70BBD3BD71BBD468046CF578057CF663366CF473B47CF563356CF673B67CF0B48A0E81B58A0E82B68A0E80C49A0E81C59A0E82C69A0E80B001B002B0000E00C001C002C0000E00B651B652B6500E00C651C652C6500E00B1B60EC34D734AD2B8060EC0C1C60EC3CD73CAD2C8060EC0B2BDEE81B80DEE8348034BD3C803CBD33D70BBD3BD71BBD488048CF598059CF683368CF493B49CFBBFF20EA008000E8583358CF693B69CF78FF20EA57C0BFEA0080A0E90000D8ECFB
+/* T2GZA */
+:0458000000008A98E9008000E80080A0E90000D8ECFF80C0E9008000E80A4050BF2A4060BF324151BF3A4161BFC36BD36B008A98E9737BC8EC96E241047B43A0E87353A0E8ADEE239F00E0510490E261043146B1E85141E0EC3967B1E8000446E27363A0E86141E0EC310039007C8015EA100420046151E0EC2F4160EA312039201F42A0E82A4252BF0F52A0E81A4262BF1E5160EA737BC8EC0E6160EA324050BD224060BD124151BD3A4161BDBF2F0EBD97E27B723220222012203A203548B1E83D59B1E8463146BF563156BFB3E22D9F008000E8663166BF473947BF573957BF673967BF6D8007EA244120E935003D0000E02D7333720CE38D2F1EBD4375F8EC35203D2043432DDF53532DDFAE1E0EBD58E33366483548BF583558BF683568BF493D49BF593D59BF693D69BF63632DDF4D7DF8EC59E300E0B83833BF2D733076183A41E93F53A0E805803DEA3743A0E83D63A0E85070F8EC2B503CE91F0FBCE8008000E85978F8EC008000E815C020E915C020E915C020E915C020E91E1241E91A2241E9463746DF563F56DF2B403DE9663D66DF1D3241E9673D67DF473747DF573F57DF2A4020E9593F59DF163020E9693D69DF483748DF583F58DF12122DDF22222DDF32322DDF3A3A2DDF683D68DF493749DF3DCF74C037CF74C431532F9F348020E939E52C9F3C3D20E90A4454B0024464B02A4454B21A4464B229803AEA0A2002200FCF74C63DCF74C288735EE92A201A2030502E9F32315FE938212C9F33395FE931532F9F9C0F20E90A4454B4024464B42A4454B61A4464B639E52C9F383D20E90A2002202A201A200A4757BF024767BF30502E9F3E304FE938212C9F3F384FE92A4656BF1A4666BF31532F9F3A314FE939E52C9F3B394FE931532F9F36304FE939E52C9F37384FE92A4353BF1A4363BF30502E9F9D314FE938212C9F9E394FE90A4858BF024868BF31532F9F803157E939E52C9F813957E92A4959BF1A4969BF30502E9F823057E938212C9F833857E931532F9F84315EE939E52C9F85395EE9867657E98A3620E9877757E98B3EBFEA803057E9813857E9823157E9867857E9833957E9877957E9301F5FE98A3420E98B3C20E9375060BD570D20E9355161BD2B5020E91D37E1EA1E35E1EA00E00E77245120E99BFF20EA160E20E9572EBFEA0B46A0E81B56A0E82B66A0E80C47A0E81C57A0E82C67A0E80B001B002B0000E00C001C002C0000E00B651B652B6500E00C651C652C6500E00B1B60EC36D736AD2B8060EC0C1C60EC3ED73EAD2C8060EC0B2BDEE81B80DEE8368036BD3E803EBD33D70BBD3BD71BBD468046CF578057CF663366CF473B47CF563356CF673B67CF0B48A0E81B58A0E82B68A0E80C49A0E81C59A0E82C69A0E80B001B002B0000E00C001C002C0000E00B651B652B6500E00C651C652C6500E00B1B60EC34D734AD2B8060EC0C1C60EC3CD73CAD2C8060EC0B2BDEE81B80DEE8348034BD3C803CBD33D70BBD3BD71BBD488048CF598059CF683368CF493B49CFBAFF20EA008000E8583358CF693B69CF79FF20EA57C0BFEA0080A0E90000D8ECA0
+/* T2GZAF */
+:0480000000008A98E9008000E80080A0E90000D8ECFF80C0E9008000E80A4050BF2A4060BF324151BF3A4161BFC36BD36B008A98E9737BC8EC96E241047B43A0E87353A0E8ADEE239F00E0510490E261043146B1E85141E0EC3967B1E8000446E27363A0E86141E0EC31003900818015EA100420046151E0EC2F4160EA312039201F42A0E82A4252BF0F52A0E81A4262BF1E5160EA737BC8EC0E6160EA324050BD224060BD124151BD3A4161BDBF2F0EBD97E27B723220222012203A203548B1E83D59B1E8463146BF563156BFB3E22D9F008000E8663166BF473947BF573957BF673967BF728007EA244120E935003D0000E02D7333720CE38D2F1EBD4375F8EC35203D2043432DDF53532DDFAE1E0EBD58E33366483548BF583558BF683568BF493D49BF593D59BF693D69BF63632DDF4D7DF8EC59E300E0B83833BF2D733076183A41E93F53A0E805803DEA3743A0E83D63A0E85070F8EC2B503CE91F0FBCE8008000E85978F8EC008000E815C020E915C020E915C020E915C020E91E1241E91A2241E9463746DF563F56DF2B403DE9663D66DF1D3241E9673D67DF473747DF573F57DF2A4020E9593F59DF163020E9693D69DF483748DF583F58DF12122DDF22222DDF32322DDF3A3A2DDF683D68DF493749DF3DCF74C037CF74C40A4454B0024464B031532F9F343720E939E52C9F3C3D20E92A4454B21A4464B22E803AEA0A20022088735EE92A201A203DCF74C20FCF74C630502E9F32315FE938212C9F33395FE931532F9F9C0F20E90A4454B4024464B42A4454B61A4464B639E52C9F383D20E90A2002202A201A203DCF75C6008000E830502E9F3E304FE938212C9F3F384FE90A4555B6024565B631532F9F3A314FE939E52C9F3B394FE9313D20E90A2002202A4656BF1A4666BF0A4757BF024767BF30502E9F36304FE938212C9F37384FE931532F9F9D314FE939E52C9F9E394FE92A4353BF1A4363BF30502E9F35304FE938212C9F39384FE90A4858BF024868BF31532F9F803157E939E52C9F813957E92A4959BF1A4969BF30502E9F823057E938212C9F833857E931532F9F84315EE939E52C9F85395EE9867657E98A3620E9877757E98B3EBFEA803057E9813857E9823157E9867857E9833957E9877957E9301F5FE98A3420E98B3C20E9375060BD570D20E9355161BD2B5020E91D37E1EA1E35E1EA00E00E77245120E996FF20EA160E20E9572EBFEA0B46A0E81B56A0E82B66A0E80C47A0E81C57A0E82C67A0E80B001B002B0000E00C001C002C0000E00B651B652B6500E00C651C652C6500E00B1B60EC36D736AD2B8060EC0C1C60EC3ED73EAD2C8060EC0B2BDEE81B80DEE8368036BD3E803EBD33D70BBD3BD71BBD468046CF578057CF663366CF473B47CF563356CF673B67CF0B48A0E81B58A0E82B68A0E80C49A0E81C59A0E82C69A0E80B001B002B0000E00C001C002C0000E00B651B652B6500E00C651C652C6500E00B1B60EC34D734AD2B8060EC0C1C60EC3CD73CAD2C8060EC0B2BDEE81B80DEE8348034BD3C803CBD33D70BBD3BD71BBD488048CF598059CF683368CF493B49CFB5FF20EA008000E8583358CF693B69CF74FF20EA57C0BFEA0080A0E90000D8ECDC
+/* T2GZS */
+:04A0000000008A98E9008000E80080A0E90000D8ECFF80C0E9008000E80A4050BF2A4060BF324151BF3A4161BFC36BD36B008A98E9737BC8EC96E241047B43A0E87353A0E8ADEE239F00E0510490E261043146B1E85141E0EC3967B1E8000446E27363A0E86141E0EC31003900858015EA100420046151E0EC2F4160EA312039201F42A0E82A4252BF0F52A0E81A4262BF1E5160EA737BC8EC0E6160EA324050BD224060BD124151BD3A4161BDBF2F0EBD97E27B723220222012203A203548B1E83D59B1E8463146BF563156BFB3E22D9F008000E8663166BF473947BF573957BF673967BF768007EA244120E935003D0000E02D7333720CE38D2F1EBD4375F8EC35203D2043432DDF53532DDFAE1E0EBD58E33366483548BF583558BF683568BF493D49BF593D59BF693D69BF63632DDF4D7DF8EC59E300E0B83833BF2D733076183A41E93F53A0E805803DEA3743A0E83D63A0E85070F8EC2B503CE91F0FBCE8008000E85978F8EC008000E815C020E915C020E915C020E915C020E91E1241E91A2241E9463746DF563F56DF2B403DE9663D66DF1D3241E9673D67DF473747DF573F57DF2A4020E9593F59DF163020E9693D69DF483748DF583F58DF683D68DF493749DF32322DDF22222DDF12122DDF3A3A2DDF0FCF74C237CF74C40A4454B0024464B03DCF74C0343720E931532F9F380F20E939E52C9F3C3D20E92A4454B21A4464B231803AEA0A2002200FCF75C02A201A2030502E9F32315FE938212C9F33395FE93DCF75C237CF75C431532F9FA60F20E939E52C9FA33D20E92A4454B41A4464B40A4555B0024565B088735EE92A201A20A03720E90A20022031532F9F3E304FE939E52C9F3F384FE930502E9F3A314FE92A4555B21A4565B20A4555B4024565B438212C9F3B394FE92A201A200A2002202A4656BF1A4666BF31532F9F36314FE939E52C9F37394FE930502E9FA7304FE938212C9FA8384FE90A4757BF024767BF31532F9FA4314FE939E52C9FA5394FE92A4353BF1A4363BF30502E9FA1304FE938212C9FA2384FE90A4858BF024868BF31532F9F803157E939E52C9F813957E92A4959BF1A4969BF30502E9F823057E938212C9F833857E931532F9F84315EE939E52C9F85395EE9867657E98A3620E9877757E98B3EBFEA803057E9813857E9823157E9867857E9833957E9877957E9301F5FE98A3420E98B3C20E9375060BD570D20E9355161BD2B5020E91D37E1EA1E35E1EA00E00E77245120E992FF20EA160E20E9572EBFEA0B46A0E81B56A0E82B66A0E80C47A0E81C57A0E82C67A0E80B001B002B0000E00C001C002C0000E00B651B652B6500E00C651C652C6500E00B1B60EC36D736AD2B8060EC0C1C60EC3ED73EAD2C8060EC0B2BDEE81B80DEE8368036BD3E803EBD33D70BBD3BD71BBD468046CF578057CF663366CF473B47CF563356CF673B67CF0B48A0E81B58A0E82B68A0E80C49A0E81C59A0E82C69A0E80B001B002B0000E00C001C002C0000E00B651B652B6500E00C651C652C6500E00B1B60EC34D734AD2B8060EC0C1C60EC3CD73CAD2C8060EC0B2BDEE81B80DEE8348034BD3C803CBD33D70BBD3BD71BBD488048CF598059CF683368CF493B49CFB2FF20EA008000E8583358CF693B69CF70FF20EA57C0BFEA0080A0E90000D8EC43
+/* T2GZSF */
+:04C8000000008A98E9008000E80080A0E90000D8ECFF80C0E9008000E80A4050BF2A4060BF324151BF3A4161BFC36BD36B008A98E9737BC8EC96E241047B43A0E87353A0E8ADEE239F00E0510490E261043146B1E85141E0EC3967B1E8000446E27363A0E86141E0EC310039008A8015EA100420046151E0EC2F4160EA312039201F42A0E82A4252BF0F52A0E81A4262BF1E5160EA737BC8EC0E6160EA324050BD224060BD124151BD3A4161BDBF2F0EBD97E27B723220222012203A203548B1E83D59B1E8463146BF563156BFB3E22D9F008000E8663166BF473947BF573957BF673967BF7B8007EA244120E935003D0000E02D7333720CE38D2F1EBD4375F8EC35203D2043432DDF53532DDFAE1E0EBD58E33366483548BF583558BF683568BF493D49BF593D59BF693D69BF63632DDF4D7DF8EC59E300E0B83833BF2D733076183A41E93F53A0E805803DEA3743A0E83D63A0E85070F8EC2B503CE91F0FBCE8008000E85978F8EC008000E815C020E915C020E915C020E915C020E91E1241E91A2241E9463746DF563F56DF2B403DE9663D66DF1D3241E9673D67DF473747DF573F57DF2A4020E9593F59DF163020E9693D69DF483748DF583F58DF683D68DF493749DF32322DDF22222DDF12122DDF3A3A2DDF0FCF74C237CF74C40A4454B0024464B03DCF74C0343720E931532F9F380F20E939E52C9F3C3D20E92A4454B21A4464B236803AEA0A2002200FCF75C02A201A2030502E9F32315FE938212C9F33395FE93DCF75C237CF75C431532F9FA60F20E939E52C9FA33D20E92A4454B41A4464B40A4555B0024565B088735EE92A201A20A03720E90A20022031532F9F3E304FE939E52C9F3F384FE930502E9F3A314FE938212C9F3B394FE92A4555B21A4565B20A4555B4024565B40FCF75C62A201A20A7304FE90A20022031532F9F310F20E939E52C9FA8384FE92A4555B61A4565B630502E9F36314FE938212C9F37394FE9008000E82A201A202A4656BF1A4666BF31532F9FA4314FE939E52C9FA5394FE90A4757BF024767BF31532F9FA1304FE939E52C9FA2384FE92A4353BF1A4363BF30502E9F35314FE938212C9F39394FE90A4858BF024868BF31532F9F803157E939E52C9F813957E92A4959BF1A4969BF30502E9F823057E938212C9F833857E931532F9F84315EE939E52C9F85395EE9867657E98A3620E9877757E98B3EBFEA803057E9813857E9823157E9867857E9833957E9877957E9301F5FE98A3420E98B3C20E9375060BD570D20E9355161BD2B5020E91D37E1EA1E35E1EA00E00E77245120E98DFF20EA160E20E9572EBFEA0B46A0E81B56A0E82B66A0E80C47A0E81C57A0E82C67A0E80B001B002B0000E00C001C002C0000E00B651B652B6500E00C651C652C6500E00B1B60EC36D736AD2B8060EC0C1C60EC3ED73EAD2C8060EC0B2BDEE81B80DEE8368036BD3E803EBD33D70BBD3BD71BBD468046CF578057CF663366CF473B47CF563356CF673B67CF0B48A0E81B58A0E82B68A0E80C49A0E81C59A0E82C69A0E80B001B002B0000E00C001C002C0000E00B651B652B6500E00C651C652C6500E00B1B60EC34D734AD2B8060EC0C1C60EC3CD73CAD2C8060EC0B2BDEE81B80DEE8348034BD3C803CBD33D70BBD3BD71BBD488048CF598059CF683368CF493B49CFADFF20EA008000E8583358CF693B69CF6BFF20EA57C0BFEA0080A0E90000D8EC56
+/* T2GZSA */
+:04C8000000008A98E9008000E80080A0E90000D8ECFF80C0E9008000E80A4050BF2A4060BF324151BF3A4161BFC36BD36B008A98E9737BC8EC96E241047B43A0E87353A0E8ADEE239F00E0510490E261043146B1E85141E0EC3967B1E8000446E27363A0E86141E0EC310039008A8015EA100420046151E0EC2F4160EA312039201F42A0E82A4252BF0F52A0E81A4262BF1E5160EA737BC8EC0E6160EA324050BD224060BD124151BD3A4161BDBF2F0EBD97E27B723220222012203A203548B1E83D59B1E8463146BF563156BFB3E22D9F008000E8663166BF473947BF573957BF673967BF7B8007EA244120E935003D0000E02D7333720CE38D2F1EBD4375F8EC35203D2043432DDF53532DDFAE1E0EBD58E33366483548BF583558BF683568BF493D49BF593D59BF693D69BF63632DDF4D7DF8EC59E300E0B83833BF2D733076183A41E93F53A0E805803DEA3743A0E83D63A0E85070F8EC2B503CE91F0FBCE8008000E85978F8EC008000E815C020E915C020E915C020E915C020E91E1241E91A2241E9463746DF563F56DF2B403DE9663D66DF1D3241E9673D67DF473747DF573F57DF2A4020E9593F59DF163020E9693D69DF483748DF583F58DF683D68DF493749DF32322DDF22222DDF12122DDF3A3A2DDF0FCF74C237CF74C40A4454B0024464B03DCF74C0343720E931532F9F380F20E939E52C9F3C3D20E92A4454B21A4464B236803AEA0A2002200FCF75C02A201A2030502E9F32315FE938212C9F33395FE93DCF75C237CF75C431532F9FA60F20E939E52C9FA33D20E92A4454B41A4464B40A4555B0024565B088735EE92A201A20A03720E90A20022031532F9F3E304FE939E52C9F3F384FE930502E9F3A314FE938212C9F3B394FE92A4555B21A4565B20A4555B4024565B40FCF74C62A201A20A7304FE90A20022031532F9F9C0F20E939E52C9FA8384FE92A4454B61A4464B630502E9F36314FE938212C9F37394FE9008000E82A201A202A4656BF1A4666BF31532F9FA4314FE939E52C9FA5394FE90A4757BF024767BF31532F9FA1304FE939E52C9FA2384FE92A4353BF1A4363BF30502E9F9D314FE938212C9F9E394FE90A4858BF024868BF31532F9F803157E939E52C9F813957E92A4959BF1A4969BF30502E9F823057E938212C9F833857E931532F9F84315EE939E52C9F85395EE9867657E98A3620E9877757E98B3EBFEA803057E9813857E9823157E9867857E9833957E9877957E9301F5FE98A3420E98B3C20E9375060BD570D20E9355161BD2B5020E91D37E1EA1E35E1EA00E00E77245120E98DFF20EA160E20E9572EBFEA0B46A0E81B56A0E82B66A0E80C47A0E81C57A0E82C67A0E80B001B002B0000E00C001C002C0000E00B651B652B6500E00C651C652C6500E00B1B60EC36D736AD2B8060EC0C1C60EC3ED73EAD2C8060EC0B2BDEE81B80DEE8368036BD3E803EBD33D70BBD3BD71BBD468046CF578057CF663366CF473B47CF563356CF673B67CF0B48A0E81B58A0E82B68A0E80C49A0E81C59A0E82C69A0E80B001B002B0000E00C001C002C0000E00B651B652B6500E00C651C652C6500E00B1B60EC34D734AD2B8060EC0C1C60EC3CD73CAD2C8060EC0B2BDEE81B80DEE8348034BD3C803CBD33D70BBD3BD71BBD488048CF598059CF683368CF493B49CFADFF20EA008000E8583358CF693B69CF6BFF20EA57C0BFEA0080A0E90000D8EC23
+/* T2GZSAF */
+:04E8000000008A98E9008000E80080A0E90000D8ECFF80C0E9008000E80A4050BF2A4060BF324151BF3A4161BFC36BD36B008A98E9737BC8EC96E241047B43A0E87353A0E8ADEE239F00E0510490E261043146B1E85141E0EC3967B1E8000446E27363A0E86141E0EC310039008E8015EA100420046151E0EC2F4160EA312039201F42A0E82A4252BF0F52A0E81A4262BF1E5160EA737BC8EC0E6160EA324050BD224060BD124151BD3A4161BDBF2F0EBD97E27B723220222012203A203548B1E83D59B1E8463146BF563156BFB3E22D9F008000E8663166BF473947BF573957BF673967BF7F8007EA244120E935003D0000E02D7333720CE38D2F1EBD4375F8EC35203D2043432DDF53532DDFAE1E0EBD58E33366483548BF583558BF683568BF493D49BF593D59BF693D69BF63632DDF4D7DF8EC59E300E0B83833BF2D733076183A41E93F53A0E805803DEA3743A0E83D63A0E85070F8EC2B503CE91F0FBCE8008000E85978F8EC008000E815C020E915C020E915C020E915C020E91E1241E91A2241E9463746DF563F56DF2B403DE9663D66DF1D3241E9673D67DF473747DF573F57DF2A4020E9593F59DF163020E9693D69DF483748DF583F58DF683D68DF493749DF32322DDF22222DDF12122DDF3A3A2DDF0FCF74C237CF74C40A4454B0024464B03DCF74C0343720E931532F9F380F20E939E52C9F3C3D20E92A4454B21A4464B23A803AEA0A2002200FCF75C02A201A2030502E9F32315FE938212C9F33395FE93DCF75C237CF75C431532F9FA60F20E939E52C9FA33D20E92A4454B41A4464B40A4555B0024565B088735EE92A201A20A03720E90A20022031532F9F3E304FE939E52C9F3F384FE930502E9F3A314FE938212C9F3B394FE92A4555B21A4565B20A4555B4024565B40FCF74C62A201A20A7304FE90A20022031532F9F9C0F20E939E52C9FA8384FE92A4454B61A4464B630502E9F36314FE938212C9F37394FE90A4555B6024565B63DCF75C62A201A202A4656BF1A4666BF31532F9FA4314FE939E52C9FA5394FE9313D20E90A2002200A4757BF024767BF30502E9FA1304FE938212C9FA2384FE931532F9F9D314FE939E52C9F9E394FE92A4353BF1A4363BF30502E9F35304FE938212C9F39384FE90A4858BF024868BF31532F9F803157E939E52C9F813957E92A4959BF1A4969BF30502E9F823057E938212C9F833857E931532F9F84315EE939E52C9F85395EE9867657E98A3620E9877757E98B3EBFEA803057E9813857E9823157E9867857E9833957E9877957E9301F5FE98A3420E98B3C20E9375060BD570D20E9355161BD2B5020E91D37E1EA1E35E1EA00E00E77245120E989FF20EA160E20E9572EBFEA0B46A0E81B56A0E82B66A0E80C47A0E81C57A0E82C67A0E80B001B002B0000E00C001C002C0000E00B651B652B6500E00C651C652C6500E00B1B60EC36D736AD2B8060EC0C1C60EC3ED73EAD2C8060EC0B2BDEE81B80DEE8368036BD3E803EBD33D70BBD3BD71BBD468046CF578057CF663366CF473B47CF563356CF673B67CF0B48A0E81B58A0E82B68A0E80C49A0E81C59A0E82C69A0E80B001B002B0000E00C001C002C0000E00B651B652B6500E00C651C652C6500E00B1B60EC34D734AD2B8060EC0C1C60EC3CD73CAD2C8060EC0B2BDEE81B80DEE8348034BD3C803CBD33D70BBD3BD71BBD488048CF598059CF683368CF493B49CFA9FF20EA008000E8583358CF693B69CF67FF20EA57C0BFEA0080A0E90000D8ECEE
+:0000000001FF
diff --git a/firmware/r128/r128_cce.bin.ihex b/firmware/r128/r128_cce.bin.ihex
new file mode 100644
index 000000000000..4831315d7b99
--- /dev/null
+++ b/firmware/r128/r128_cce.bin.ihex
@@ -0,0 +1,129 @@
+:1000000000000000108038000000000010003800E0
+:10001000000000020000008E0000000200000091BD
+:1000200000000000402E2423000000006062124FF8
+:10003000000000002E2B596D000000007677753E01
+:1000400000000000898984820000000023BC8B0D21
+:10005000000000002323232300000000238DABB405
+:1000600000000000232323230000000100B028002B
+:100070000000000100032800000000010004C0008F
+:100080000000000100030800000000023660300E8E
+:100090000000000B00040000000000000000000051
+:1000A000000000010200151D0000000100001D0EEF
+:1000B00000000001000039D900000001000019D73C
+:1000C0000000000C0000001C00000001000019D618
+:1000D0000000000C0000001C0000000200000017DF
+:1000E0000000000B01200000000000000100358A24
+:1000F0000000000100064000000000090000001E92
+:100100000000000108D015B4000000101910100004
+:100110000000000300002000000000000000280094
+:1001200000000001000308000000000100003D0E77
+:10013000000000010000C8000000000A0000882A3A
+:10014000000000090000002A000000010200150F55
+:1001500000000002000028240000000100003D65AE
+:100160000000000100003D66000000020000002BBE
+:100170000000000100F32DB4000000012200D8BFF0
+:100180000000000100E088BF0000000C1333383786
+:1001900000000001020615650000000C0000003799
+:1001A00000000001020015640000000100003D662F
+:1001B000000000020000002E000000040020083AA9
+:1001C0000000000100080800000000010006C0FF58
+:1001D000000000040040003D000000010007C800CE
+:1001E00000000001000700FF000000030000000005
+:1001F0000000000C0000005C000000020000002E67
+:100200000000000C000000B00000000100003D767E
+:100210000000000100032800000000010000480069
+:1002200000000001000208000000000106001D0E91
+:1002300000000001000248000000000100028800E8
+:100240000000000100F3C5F80000000100100000EC
+:10025000000000060030004E0000000100003D6379
+:100260000000001080303DF0000000021000384314
+:1002700000000002000028430000000C000000B055
+:100280000000000100003D760000000100003D7705
+:100290000000000100003D0E0000000100003D0FC5
+:1002A000000000010050280000000006003000524D
+:1002B0000000001080303DF00000000100003DF81B
+:1002C00000000002000000520000000100053D0E89
+:1002D0000000000100103D0F00000002003000553A
+:1002E0000000000100003D700000000100001E89B8
+:1002F0000000000100003D710000000300003D729D
+:100300000000000C0000005C000000020000006221
+:100310000000000100003F280000000100003F270E
+:100320000000000100003E820000000100003E8845
+:100330000000000100003E660000000100003E6772
+:100340000000000100003E760000000100003E6851
+:100350000000000100003E690000000100003E6C4A
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diff --git a/firmware/radeon/R100_cp.bin.ihex b/firmware/radeon/R100_cp.bin.ihex
new file mode 100644
index 000000000000..151647b04fc4
--- /dev/null
+++ b/firmware/radeon/R100_cp.bin.ihex
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diff --git a/firmware/radeon/R200_cp.bin.ihex b/firmware/radeon/R200_cp.bin.ihex
new file mode 100644
index 000000000000..3a0bd73111c4
--- /dev/null
+++ b/firmware/radeon/R200_cp.bin.ihex
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diff --git a/firmware/radeon/R300_cp.bin.ihex b/firmware/radeon/R300_cp.bin.ihex
new file mode 100644
index 000000000000..d307d56882c9
--- /dev/null
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diff --git a/firmware/radeon/R420_cp.bin.ihex b/firmware/radeon/R420_cp.bin.ihex
new file mode 100644
index 000000000000..3815891275f9
--- /dev/null
+++ b/firmware/radeon/R420_cp.bin.ihex
@@ -0,0 +1,130 @@
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diff --git a/firmware/radeon/RS600_cp.bin.ihex b/firmware/radeon/RS600_cp.bin.ihex
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diff --git a/firmware/radeon/RS780_me.bin.ihex b/firmware/radeon/RS780_me.bin.ihex
new file mode 100644
index 000000000000..6479c106b91f
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diff --git a/firmware/radeon/RS780_pfp.bin.ihex b/firmware/radeon/RS780_pfp.bin.ihex
new file mode 100644
index 000000000000..40880411e785
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index 000000000000..ba19ed892920
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new file mode 100644
index 000000000000..f55292c97b79
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diff --git a/firmware/radeon/RV620_me.bin.ihex b/firmware/radeon/RV620_me.bin.ihex
new file mode 100644
index 000000000000..ba19ed892920
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diff --git a/firmware/radeon/RV710_pfp.bin.ihex b/firmware/radeon/RV710_pfp.bin.ihex
new file mode 100644
index 000000000000..3d811ff0a1a8
--- /dev/null
+++ b/firmware/radeon/RV710_pfp.bin.ihex
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diff --git a/firmware/radeon/RV770_me.bin.ihex b/firmware/radeon/RV770_me.bin.ihex
new file mode 100644
index 000000000000..a0e16990a20a
--- /dev/null
+++ b/firmware/radeon/RV770_me.bin.ihex
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diff --git a/firmware/radeon/RV770_pfp.bin.ihex b/firmware/radeon/RV770_pfp.bin.ihex
new file mode 100644
index 000000000000..a2d1619107de
--- /dev/null
+++ b/firmware/radeon/RV770_pfp.bin.ihex
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diff --git a/fs/ubifs/budget.c b/fs/ubifs/budget.c
index ee1ce68fd98b..076ca50e9933 100644
--- a/fs/ubifs/budget.c
+++ b/fs/ubifs/budget.c
@@ -715,7 +715,7 @@ long long ubifs_get_free_space_nolock(struct ubifs_info *c)
 * ubifs_get_free_space - return amount of free space.
 * @c: UBIFS file-system description object
 *
- * This function calculates and retuns amount of free space to report to
+ * This function calculates and returns amount of free space to report to
 * user-space.
 */
 long long ubifs_get_free_space(struct ubifs_info *c)
diff --git a/fs/ubifs/commit.c b/fs/ubifs/commit.c
index f3a7945527fb..4775af401167 100644
--- a/fs/ubifs/commit.c
+++ b/fs/ubifs/commit.c
@@ -510,7 +510,7 @@ int dbg_check_old_index(struct ubifs_info *c, struct ubifs_zbranch *zroot)
        int lnum, offs, len, err = 0, uninitialized_var(last_level), child_cnt;
        int first = 1, iip;
        struct ubifs_debug_info *d = c->dbg;
-        union ubifs_key lower_key, upper_key, l_key, u_key;
+        union ubifs_key uninitialized_var(lower_key), upper_key, l_key, u_key;
        unsigned long long uninitialized_var(last_sqnum);
        struct ubifs_idx_node *idx;
        struct list_head list;
diff --git a/fs/ubifs/debug.c b/fs/ubifs/debug.c
index ce2cd8343618..dbc093afd946 100644
--- a/fs/ubifs/debug.c
+++ b/fs/ubifs/debug.c
@@ -210,6 +210,20 @@ const char *dbg_cstate(int cmt_state)
        }
 }
+const char *dbg_jhead(int jhead)
+{
+        switch (jhead) {
+        case GCHD:
+                return "0 (GC)";
+        case BASEHD:
+                return "1 (base)";
+        case DATAHD:
+                return "2 (data)";
+        default:
+                return "unknown journal head";
+        }
+}
 static void dump_ch(const struct ubifs_ch *ch)
 {
        printk(KERN_DEBUG "\tmagic          %#x\n", le32_to_cpu(ch->magic));
@@ -623,8 +637,9 @@ void dbg_dump_budg(struct ubifs_info *c)
        /* If we are in R/O mode, journal heads do not exist */
        if (c->jheads)
                for (i = 0; i < c->jhead_cnt; i++)
-                        printk(KERN_DEBUG "\tjhead %d\t LEB %d\n",
+                        printk(KERN_DEBUG "\tjhead %s\t LEB %d\n",
-                               c->jheads[i].wbuf.jhead, c->jheads[i].wbuf.lnum);
+                               dbg_jhead(c->jheads[i].wbuf.jhead),
+                               c->jheads[i].wbuf.lnum);
        for (rb = rb_first(&c->buds); rb; rb = rb_next(rb)) {
                bud = rb_entry(rb, struct ubifs_bud, rb);
                printk(KERN_DEBUG "\tbud LEB %d\n", bud->lnum);
@@ -648,9 +663,90 @@ void dbg_dump_budg(struct ubifs_info *c)
 void dbg_dump_lprop(const struct ubifs_info *c, const struct ubifs_lprops *lp)
 {
-        printk(KERN_DEBUG "LEB %d lprops: free %d, dirty %d (used %d), "
+        int i, spc, dark = 0, dead = 0;
-               "flags %#x\n", lp->lnum, lp->free, lp->dirty,
+        struct rb_node *rb;
-               c->leb_size - lp->free - lp->dirty, lp->flags);
+        struct ubifs_bud *bud;
+        spc = lp->free + lp->dirty;
+        if (spc < c->dead_wm)
+                dead = spc;
+        else
+                dark = ubifs_calc_dark(c, spc);
+        if (lp->flags & LPROPS_INDEX)
+                printk(KERN_DEBUG "LEB %-7d free %-8d dirty %-8d used %-8d "
+                       "free + dirty %-8d flags %#x (", lp->lnum, lp->free,
+                       lp->dirty, c->leb_size - spc, spc, lp->flags);
+        else
+                printk(KERN_DEBUG "LEB %-7d free %-8d dirty %-8d used %-8d "
+                       "free + dirty %-8d dark %-4d dead %-4d nodes fit %-3d "
+                       "flags %#-4x (", lp->lnum, lp->free, lp->dirty,
+                       c->leb_size - spc, spc, dark, dead,
+                       (int)(spc / UBIFS_MAX_NODE_SZ), lp->flags);
+        if (lp->flags & LPROPS_TAKEN) {
+                if (lp->flags & LPROPS_INDEX)
+                        printk(KERN_CONT "index, taken");
+                else
+                        printk(KERN_CONT "taken");
+        } else {
+                const char *s;
+                if (lp->flags & LPROPS_INDEX) {
+                        switch (lp->flags & LPROPS_CAT_MASK) {
+                        case LPROPS_DIRTY_IDX:
+                                s = "dirty index";
+                                break;
+                        case LPROPS_FRDI_IDX:
+                                s = "freeable index";
+                                break;
+                        default:
+                                s = "index";
+                        }
+                } else {
+                        switch (lp->flags & LPROPS_CAT_MASK) {
+                        case LPROPS_UNCAT:
+                                s = "not categorized";
+                                break;
+                        case LPROPS_DIRTY:
+                                s = "dirty";
+                                break;
+                        case LPROPS_FREE:
+                                s = "free";
+                                break;
+                        case LPROPS_EMPTY:
+                                s = "empty";
+                                break;
+                        case LPROPS_FREEABLE:
+                                s = "freeable";
+                                break;
+                        default:
+                                s = NULL;
+                                break;
+                        }
+                }
+                printk(KERN_CONT "%s", s);
+        }
+        for (rb = rb_first((struct rb_root *)&c->buds); rb; rb = rb_next(rb)) {
+                bud = rb_entry(rb, struct ubifs_bud, rb);
+                if (bud->lnum == lp->lnum) {
+                        int head = 0;
+                        for (i = 0; i < c->jhead_cnt; i++) {
+                                if (lp->lnum == c->jheads[i].wbuf.lnum) {
+                                        printk(KERN_CONT ", jhead %s",
+                                               dbg_jhead(i));
+                                        head = 1;
+                                }
+                        }
+                        if (!head)
+                                printk(KERN_CONT ", bud of jhead %s",
+                                       dbg_jhead(bud->jhead));
+                }
+        }
+        if (lp->lnum == c->gc_lnum)
+                printk(KERN_CONT ", GC LEB");
+        printk(KERN_CONT ")\n");
 }
 void dbg_dump_lprops(struct ubifs_info *c)
@@ -724,7 +820,7 @@ void dbg_dump_leb(const struct ubifs_info *c, int lnum)
        printk(KERN_DEBUG "(pid %d) start dumping LEB %d\n",
               current->pid, lnum);
-        sleb = ubifs_scan(c, lnum, 0, c->dbg->buf);
+        sleb = ubifs_scan(c, lnum, 0, c->dbg->buf, 0);
        if (IS_ERR(sleb)) {
                ubifs_err("scan error %d", (int)PTR_ERR(sleb));
                return;
@@ -909,8 +1005,10 @@ out:
        ubifs_msg("saved lprops statistics dump");
        dbg_dump_lstats(&d->saved_lst);
        ubifs_get_lp_stats(c, &lst);
        ubifs_msg("current lprops statistics dump");
-        dbg_dump_lstats(&d->saved_lst);
+        dbg_dump_lstats(&lst);
        spin_lock(&c->space_lock);
        dbg_dump_budg(c);
        spin_unlock(&c->space_lock);
diff --git a/fs/ubifs/debug.h b/fs/ubifs/debug.h
index c1cd73b2e06e..29d960101ea6 100644
--- a/fs/ubifs/debug.h
+++ b/fs/ubifs/debug.h
@@ -271,6 +271,7 @@ void ubifs_debugging_exit(struct ubifs_info *c);
 /* Dump functions */
 const char *dbg_ntype(int type);
 const char *dbg_cstate(int cmt_state);
+const char *dbg_jhead(int jhead);
 const char *dbg_get_key_dump(const struct ubifs_info *c,
                             const union ubifs_key *key);
 void dbg_dump_inode(const struct ubifs_info *c, const struct inode *inode);
@@ -321,6 +322,8 @@ void dbg_check_heap(struct ubifs_info *c, struct ubifs_lpt_heap *heap, int cat,
 int dbg_check_lprops(struct ubifs_info *c);
 int dbg_check_lpt_nodes(struct ubifs_info *c, struct ubifs_cnode *cnode,
                        int row, int col);
+int dbg_check_inode_size(struct ubifs_info *c, const struct inode *inode,
+                         loff_t size);
 /* Force the use of in-the-gaps method for testing */
@@ -425,6 +428,7 @@ void dbg_debugfs_exit_fs(struct ubifs_info *c);
 #define dbg_ntype(type)                        ""
 #define dbg_cstate(cmt_state)                  ""
+#define dbg_jhead(jhead)                       ""
 #define dbg_get_key_dump(c, key)               ({})
 #define dbg_dump_inode(c, inode)               ({})
 #define dbg_dump_node(c, node)                 ({})
@@ -460,6 +464,7 @@ void dbg_debugfs_exit_fs(struct ubifs_info *c);
 #define dbg_check_heap(c, heap, cat, add_pos)      ({})
 #define dbg_check_lprops(c)                        0
 #define dbg_check_lpt_nodes(c, cnode, row, col)    0
+#define dbg_check_inode_size(c, inode, size)       0
 #define dbg_force_in_the_gaps_enabled              0
 #define dbg_force_in_the_gaps()                    0
 #define dbg_failure_mode                           0
diff --git a/fs/ubifs/file.c b/fs/ubifs/file.c
index 6d34dc7e33e1..2e6481a7701c 100644
--- a/fs/ubifs/file.c
+++ b/fs/ubifs/file.c
@@ -21,34 +21,32 @@
 */
 /*
- * This file implements VFS file and inode operations of regular files, device
+ * This file implements VFS file and inode operations for regular files, device
 * nodes and symlinks as well as address space operations.
 *
- * UBIFS uses 2 page flags: PG_private and PG_checked. PG_private is set if the
+ * UBIFS uses 2 page flags: @PG_private and @PG_checked. @PG_private is set if
- * page is dirty and is used for budgeting purposes - dirty pages should not be
+ * the page is dirty and is used for optimization purposes - dirty pages are
- * budgeted. The PG_checked flag is set if full budgeting is required for the
+ * not budgeted so the flag shows that 'ubifs_write_end()' should not release
- * page e.g., when it corresponds to a file hole or it is just beyond the file
+ * the budget for this page. The @PG_checked flag is set if full budgeting is
- * size. The budgeting is done in 'ubifs_write_begin()', because it is OK to
+ * required for the page e.g., when it corresponds to a file hole or it is
- * fail in this function, and the budget is released in 'ubifs_write_end()'. So
+ * beyond the file size. The budgeting is done in 'ubifs_write_begin()', because
- * the PG_private and PG_checked flags carry the information about how the page
+ * it is OK to fail in this function, and the budget is released in
- * was budgeted, to make it possible to release the budget properly.
+ * 'ubifs_write_end()'. So the @PG_private and @PG_checked flags carry
+ * information about how the page was budgeted, to make it possible to release
+ * the budget properly.
 *
- * A thing to keep in mind: inode's 'i_mutex' is locked in most VFS operations
+ * A thing to keep in mind: inode @i_mutex is locked in most VFS operations we
- * we implement. However, this is not true for '->writepage()', which might be
+ * implement. However, this is not true for 'ubifs_writepage()', which may be
- * called with 'i_mutex' unlocked. For example, when pdflush is performing
+ * called with @i_mutex unlocked. For example, when pdflush is doing background
- * write-back, it calls 'writepage()' with unlocked 'i_mutex', although the
+ * write-back, it calls 'ubifs_writepage()' with unlocked @i_mutex. At "normal"
- * inode has 'I_LOCK' flag in this case. At "normal" work-paths 'i_mutex' is
+ * work-paths the @i_mutex is locked in 'ubifs_writepage()', e.g. in the
- * locked in '->writepage', e.g. in "sys_write -> alloc_pages -> direct reclaim
+ * "sys_write -> alloc_pages -> direct reclaim path". So, in 'ubifs_writepage()'
- * path'. So, in '->writepage()' we are only guaranteed that the page is
+ * we are only guaranteed that the page is locked.
- * locked.
 *
- * Similarly, 'i_mutex' does not have to be locked in readpage(), e.g.,
+ * Similarly, @i_mutex is not always locked in 'ubifs_readpage()', e.g., the
- * readahead path does not have it locked ("sys_read -> generic_file_aio_read
+ * read-ahead path does not lock it ("sys_read -> generic_file_aio_read ->
- * -> ondemand_readahead -> readpage"). In case of readahead, 'I_LOCK' flag is
+ * ondemand_readahead -> readpage"). In case of readahead, @I_LOCK flag is not
- * not set as well. However, UBIFS disables readahead.
+ * set as well. However, UBIFS disables readahead.
- *
- * This, for example means that there might be 2 concurrent '->writepage()'
- * calls for the same inode, but different inode dirty pages.
 */
 #include "ubifs.h"
@@ -449,9 +447,9 @@ static int ubifs_write_begin(struct file *file, struct address_space *mapping,
                        /*
                         * We change whole page so no need to load it. But we
                         * have to set the @PG_checked flag to make the further
-                         * code the page is new. This might be not true, but it
+                         * code know that the page is new. This might be not
-                         * is better to budget more that to read the page from
+                         * true, but it is better to budget more than to read
-                         * the media.
+                         * the page from the media.
                         */
                        SetPageChecked(page);
                        skipped_read = 1;
@@ -497,8 +495,8 @@ static int ubifs_write_begin(struct file *file, struct address_space *mapping,
        }
        /*
-         * Whee, we aquired budgeting quickly - without involving
+         * Whee, we acquired budgeting quickly - without involving
-         * garbage-collection, committing or forceing write-back. We return
+         * garbage-collection, committing or forcing write-back. We return
         * with @ui->ui_mutex locked if we are appending pages, and unlocked
         * otherwise. This is an optimization (slightly hacky though).
         */
@@ -562,7 +560,7 @@ static int ubifs_write_end(struct file *file, struct address_space *mapping,
                /*
                 * Return 0 to force VFS to repeat the whole operation, or the
-                 * error code if 'do_readpage()' failes.
+                 * error code if 'do_readpage()' fails.
                 */
                copied = do_readpage(page);
                goto out;
@@ -1175,11 +1173,11 @@ static int do_truncation(struct ubifs_info *c, struct inode *inode,
        ui->ui_size = inode->i_size;
        /* Truncation changes inode [mc]time */
        inode->i_mtime = inode->i_ctime = ubifs_current_time(inode);
-        /* The other attributes may be changed at the same time as well */
+        /* Other attributes may be changed at the same time as well */
        do_attr_changes(inode, attr);
        err = ubifs_jnl_truncate(c, inode, old_size, new_size);
        mutex_unlock(&ui->ui_mutex);
 out_budg:
        if (budgeted)
                ubifs_release_budget(c, &req);
diff --git a/fs/ubifs/gc.c b/fs/ubifs/gc.c
index f0f5f15d384e..618c2701d3a7 100644
--- a/fs/ubifs/gc.c
+++ b/fs/ubifs/gc.c
@@ -529,7 +529,7 @@ int ubifs_garbage_collect_leb(struct ubifs_info *c, struct ubifs_lprops *lp)
         * We scan the entire LEB even though we only really need to scan up to
         * (c->leb_size - lp->free).
         */
-        sleb = ubifs_scan(c, lnum, 0, c->sbuf);
+        sleb = ubifs_scan(c, lnum, 0, c->sbuf, 0);
        if (IS_ERR(sleb))
                return PTR_ERR(sleb);
diff --git a/fs/ubifs/io.c b/fs/ubifs/io.c
index 762a7d6cec73..e589fedaf1ef 100644
--- a/fs/ubifs/io.c
+++ b/fs/ubifs/io.c
@@ -297,7 +297,7 @@ static enum hrtimer_restart wbuf_timer_callback_nolock(struct hrtimer *timer)
 {
        struct ubifs_wbuf *wbuf = container_of(timer, struct ubifs_wbuf, timer);
-        dbg_io("jhead %d", wbuf->jhead);
+        dbg_io("jhead %s", dbg_jhead(wbuf->jhead));
        wbuf->need_sync = 1;
        wbuf->c->need_wbuf_sync = 1;
        ubifs_wake_up_bgt(wbuf->c);
@@ -314,7 +314,8 @@ static void new_wbuf_timer_nolock(struct ubifs_wbuf *wbuf)
        if (wbuf->no_timer)
                return;
-        dbg_io("set timer for jhead %d, %llu-%llu millisecs", wbuf->jhead,
+        dbg_io("set timer for jhead %s, %llu-%llu millisecs",
+               dbg_jhead(wbuf->jhead),
               div_u64(ktime_to_ns(wbuf->softlimit), USEC_PER_SEC),
               div_u64(ktime_to_ns(wbuf->softlimit) + wbuf->delta,
                       USEC_PER_SEC));
@@ -351,8 +352,8 @@ int ubifs_wbuf_sync_nolock(struct ubifs_wbuf *wbuf)
                /* Write-buffer is empty or not seeked */
                return 0;
-        dbg_io("LEB %d:%d, %d bytes, jhead %d",
+        dbg_io("LEB %d:%d, %d bytes, jhead %s",
-               wbuf->lnum, wbuf->offs, wbuf->used, wbuf->jhead);
+               wbuf->lnum, wbuf->offs, wbuf->used, dbg_jhead(wbuf->jhead));
        ubifs_assert(!(c->vfs_sb->s_flags & MS_RDONLY));
        ubifs_assert(!(wbuf->avail & 7));
        ubifs_assert(wbuf->offs + c->min_io_size <= c->leb_size);
@@ -401,7 +402,7 @@ int ubifs_wbuf_seek_nolock(struct ubifs_wbuf *wbuf, int lnum, int offs,
 {
        const struct ubifs_info *c = wbuf->c;
-        dbg_io("LEB %d:%d, jhead %d", lnum, offs, wbuf->jhead);
+        dbg_io("LEB %d:%d, jhead %s", lnum, offs, dbg_jhead(wbuf->jhead));
        ubifs_assert(lnum >= 0 && lnum < c->leb_cnt);
        ubifs_assert(offs >= 0 && offs <= c->leb_size);
        ubifs_assert(offs % c->min_io_size == 0 && !(offs & 7));
@@ -508,9 +509,9 @@ int ubifs_wbuf_write_nolock(struct ubifs_wbuf *wbuf, void *buf, int len)
        struct ubifs_info *c = wbuf->c;
        int err, written, n, aligned_len = ALIGN(len, 8), offs;
-        dbg_io("%d bytes (%s) to jhead %d wbuf at LEB %d:%d", len,
+        dbg_io("%d bytes (%s) to jhead %s wbuf at LEB %d:%d", len,
-               dbg_ntype(((struct ubifs_ch *)buf)->node_type), wbuf->jhead,
+               dbg_ntype(((struct ubifs_ch *)buf)->node_type),
-               wbuf->lnum, wbuf->offs + wbuf->used);
+               dbg_jhead(wbuf->jhead), wbuf->lnum, wbuf->offs + wbuf->used);
        ubifs_assert(len > 0 && wbuf->lnum >= 0 && wbuf->lnum < c->leb_cnt);
        ubifs_assert(wbuf->offs >= 0 && wbuf->offs % c->min_io_size == 0);
        ubifs_assert(!(wbuf->offs & 7) && wbuf->offs <= c->leb_size);
@@ -535,8 +536,8 @@ int ubifs_wbuf_write_nolock(struct ubifs_wbuf *wbuf, void *buf, int len)
                memcpy(wbuf->buf + wbuf->used, buf, len);
                if (aligned_len == wbuf->avail) {
-                        dbg_io("flush jhead %d wbuf to LEB %d:%d",
+                        dbg_io("flush jhead %s wbuf to LEB %d:%d",
-                               wbuf->jhead, wbuf->lnum, wbuf->offs);
+                               dbg_jhead(wbuf->jhead), wbuf->lnum, wbuf->offs);
                        err = ubi_leb_write(c->ubi, wbuf->lnum, wbuf->buf,
                                            wbuf->offs, c->min_io_size,
                                            wbuf->dtype);
@@ -564,8 +565,8 @@ int ubifs_wbuf_write_nolock(struct ubifs_wbuf *wbuf, void *buf, int len)
         * minimal I/O unit. We have to fill and flush write-buffer and switch
         * to the next min. I/O unit.
         */
-        dbg_io("flush jhead %d wbuf to LEB %d:%d",
+        dbg_io("flush jhead %s wbuf to LEB %d:%d",
-               wbuf->jhead, wbuf->lnum, wbuf->offs);
+               dbg_jhead(wbuf->jhead), wbuf->lnum, wbuf->offs);
        memcpy(wbuf->buf + wbuf->used, buf, wbuf->avail);
        err = ubi_leb_write(c->ubi, wbuf->lnum, wbuf->buf, wbuf->offs,
                            c->min_io_size, wbuf->dtype);
@@ -698,8 +699,8 @@ int ubifs_read_node_wbuf(struct ubifs_wbuf *wbuf, void *buf, int type, int len,
        int err, rlen, overlap;
        struct ubifs_ch *ch = buf;
-        dbg_io("LEB %d:%d, %s, length %d, jhead %d", lnum, offs,
+        dbg_io("LEB %d:%d, %s, length %d, jhead %s", lnum, offs,
-               dbg_ntype(type), len, wbuf->jhead);
+               dbg_ntype(type), len, dbg_jhead(wbuf->jhead));
        ubifs_assert(wbuf && lnum >= 0 && lnum < c->leb_cnt && offs >= 0);
        ubifs_assert(!(offs & 7) && offs < c->leb_size);
        ubifs_assert(type >= 0 && type < UBIFS_NODE_TYPES_CNT);
diff --git a/fs/ubifs/journal.c b/fs/ubifs/journal.c
index 64b5f3a309f5..d321baeca68d 100644
--- a/fs/ubifs/journal.c
+++ b/fs/ubifs/journal.c
@@ -158,7 +158,7 @@ again:
         * some. But the write-buffer mutex has to be unlocked because
         * GC also takes it.
         */
-        dbg_jnl("no free space  jhead %d, run GC", jhead);
+        dbg_jnl("no free space in jhead %s, run GC", dbg_jhead(jhead));
        mutex_unlock(&wbuf->io_mutex);
        lnum = ubifs_garbage_collect(c, 0);
@@ -173,7 +173,8 @@ again:
                 * because we dropped @wbuf->io_mutex, so try once
                 * again.
                 */
-                dbg_jnl("GC couldn't make a free LEB for jhead %d", jhead);
+                dbg_jnl("GC couldn't make a free LEB for jhead %s",
+                        dbg_jhead(jhead));
                if (retries++ < 2) {
                        dbg_jnl("retry (%d)", retries);
                        goto again;
@@ -184,7 +185,7 @@ again:
        }
        mutex_lock_nested(&wbuf->io_mutex, wbuf->jhead);
-        dbg_jnl("got LEB %d for jhead %d", lnum, jhead);
+        dbg_jnl("got LEB %d for jhead %s", lnum, dbg_jhead(jhead));
        avail = c->leb_size - wbuf->offs - wbuf->used;
        if (wbuf->lnum != -1 && avail >= len) {
@@ -255,7 +256,8 @@ static int write_node(struct ubifs_info *c, int jhead, void *node, int len,
        *lnum = c->jheads[jhead].wbuf.lnum;
        *offs = c->jheads[jhead].wbuf.offs + c->jheads[jhead].wbuf.used;
-        dbg_jnl("jhead %d, LEB %d:%d, len %d", jhead, *lnum, *offs, len);
+        dbg_jnl("jhead %s, LEB %d:%d, len %d",
+                dbg_jhead(jhead), *lnum, *offs, len);
        ubifs_prepare_node(c, node, len, 0);
        return ubifs_wbuf_write_nolock(wbuf, node, len);
@@ -285,7 +287,8 @@ static int write_head(struct ubifs_info *c, int jhead, void *buf, int len,
        *lnum = c->jheads[jhead].wbuf.lnum;
        *offs = c->jheads[jhead].wbuf.offs + c->jheads[jhead].wbuf.used;
-        dbg_jnl("jhead %d, LEB %d:%d, len %d", jhead, *lnum, *offs, len);
+        dbg_jnl("jhead %s, LEB %d:%d, len %d",
+                dbg_jhead(jhead), *lnum, *offs, len);
        err = ubifs_wbuf_write_nolock(wbuf, buf, len);
        if (err)
diff --git a/fs/ubifs/key.h b/fs/ubifs/key.h
index 5fa27ea031ba..0f530c684f0b 100644
--- a/fs/ubifs/key.h
+++ b/fs/ubifs/key.h
@@ -229,23 +229,6 @@ static inline void xent_key_init(const struct ubifs_info *c,
 }
 /**
- * xent_key_init_hash - initialize extended attribute entry key without
- *                      re-calculating hash function.
- * @c: UBIFS file-system description object
- * @key: key to initialize
- * @inum: host inode number
- * @hash: extended attribute entry name hash
- */
-static inline void xent_key_init_hash(const struct ubifs_info *c,
-                                      union ubifs_key *key, ino_t inum,
-                                      uint32_t hash)
-{
-        ubifs_assert(!(hash & ~UBIFS_S_KEY_HASH_MASK));
-        key->u32[0] = inum;
-        key->u32[1] = hash | (UBIFS_XENT_KEY << UBIFS_S_KEY_HASH_BITS);
-}
-/**
 * xent_key_init_flash - initialize on-flash extended attribute entry key.
 * @c: UBIFS file-system description object
 * @k: key to initialize
@@ -295,22 +278,15 @@ static inline void data_key_init(const struct ubifs_info *c,
 }
 /**
- * data_key_init_flash - initialize on-flash data key.
+ * highest_data_key - get the highest possible data key for an inode.
 * @c: UBIFS file-system description object
- * @k: key to initialize
+ * @key: key to initialize
 * @inum: inode number
- * @block: block number
 */
-static inline void data_key_init_flash(const struct ubifs_info *c, void *k,
+static inline void highest_data_key(const struct ubifs_info *c,
-                                       ino_t inum, unsigned int block)
+                                   union ubifs_key *key, ino_t inum)
 {
-        union ubifs_key *key = k;
+        data_key_init(c, key, inum, UBIFS_S_KEY_BLOCK_MASK);
-        ubifs_assert(!(block & ~UBIFS_S_KEY_BLOCK_MASK));
-        key->j32[0] = cpu_to_le32(inum);
-        key->j32[1] = cpu_to_le32(block |
-                                  (UBIFS_DATA_KEY << UBIFS_S_KEY_BLOCK_BITS));
-        memset(k + 8, 0, UBIFS_MAX_KEY_LEN - 8);
 }
 /**
@@ -554,4 +530,5 @@ static inline unsigned long long key_max_inode_size(const struct ubifs_info *c)
                return 0;
        }
 }
 #endif /* !__UBIFS_KEY_H__ */
diff --git a/fs/ubifs/log.c b/fs/ubifs/log.c
index 56e33772a1ee..c345e125f42c 100644
--- a/fs/ubifs/log.c
+++ b/fs/ubifs/log.c
@@ -169,8 +169,8 @@ void ubifs_add_bud(struct ubifs_info *c, struct ubifs_bud *bud)
         */
        c->bud_bytes += c->leb_size - bud->start;
-        dbg_log("LEB %d:%d, jhead %d, bud_bytes %lld", bud->lnum,
+        dbg_log("LEB %d:%d, jhead %s, bud_bytes %lld", bud->lnum,
-                bud->start, bud->jhead, c->bud_bytes);
+                bud->start, dbg_jhead(bud->jhead), c->bud_bytes);
        spin_unlock(&c->buds_lock);
 }
@@ -355,16 +355,16 @@ static void remove_buds(struct ubifs_info *c)
                         * heads (non-closed buds).
                         */
                        c->cmt_bud_bytes += wbuf->offs - bud->start;
-                        dbg_log("preserve %d:%d, jhead %d, bud bytes %d, "
+                        dbg_log("preserve %d:%d, jhead %s, bud bytes %d, "
                                "cmt_bud_bytes %lld", bud->lnum, bud->start,
-                                bud->jhead, wbuf->offs - bud->start,
+                                dbg_jhead(bud->jhead), wbuf->offs - bud->start,
                                c->cmt_bud_bytes);
                        bud->start = wbuf->offs;
                } else {
                        c->cmt_bud_bytes += c->leb_size - bud->start;
-                        dbg_log("remove %d:%d, jhead %d, bud bytes %d, "
+                        dbg_log("remove %d:%d, jhead %s, bud bytes %d, "
                                "cmt_bud_bytes %lld", bud->lnum, bud->start,
-                                bud->jhead, c->leb_size - bud->start,
+                                dbg_jhead(bud->jhead), c->leb_size - bud->start,
                                c->cmt_bud_bytes);
                        rb_erase(p1, &c->buds);
                        /*
@@ -429,7 +429,8 @@ int ubifs_log_start_commit(struct ubifs_info *c, int *ltail_lnum)
                if (lnum == -1 || offs == c->leb_size)
                        continue;
-                dbg_log("add ref to LEB %d:%d for jhead %d", lnum, offs, i);
+                dbg_log("add ref to LEB %d:%d for jhead %s",
+                        lnum, offs, dbg_jhead(i));
                ref = buf + len;
                ref->ch.node_type = UBIFS_REF_NODE;
                ref->lnum = cpu_to_le32(lnum);
@@ -695,7 +696,7 @@ int ubifs_consolidate_log(struct ubifs_info *c)
        lnum = c->ltail_lnum;
        write_lnum = lnum;
        while (1) {
-                sleb = ubifs_scan(c, lnum, 0, c->sbuf);
+                sleb = ubifs_scan(c, lnum, 0, c->sbuf, 0);
                if (IS_ERR(sleb)) {
                        err = PTR_ERR(sleb);
                        goto out_free;
diff --git a/fs/ubifs/lprops.c b/fs/ubifs/lprops.c
index 4cdd284dea56..4d4ca388889b 100644
--- a/fs/ubifs/lprops.c
+++ b/fs/ubifs/lprops.c
@@ -281,7 +281,7 @@ void ubifs_add_to_cat(struct ubifs_info *c, struct ubifs_lprops *lprops,
        case LPROPS_FREE:
                if (add_to_lpt_heap(c, lprops, cat))
                        break;
-                /* No more room on heap so make it uncategorized */
+                /* No more room on heap so make it un-categorized */
                cat = LPROPS_UNCAT;
                /* Fall through */
        case LPROPS_UNCAT:
@@ -375,8 +375,8 @@ void ubifs_replace_cat(struct ubifs_info *c, struct ubifs_lprops *old_lprops,
 * @lprops: LEB properties
 *
 * A LEB may have fallen off of the bottom of a heap, and ended up as
- * uncategorized even though it has enough space for us now. If that is the case
+ * un-categorized even though it has enough space for us now. If that is the
- * this function will put the LEB back onto a heap.
+ * case this function will put the LEB back onto a heap.
 */
 void ubifs_ensure_cat(struct ubifs_info *c, struct ubifs_lprops *lprops)
 {
@@ -436,10 +436,10 @@ int ubifs_categorize_lprops(const struct ubifs_info *c,
 /**
 * change_category - change LEB properties category.
 * @c: UBIFS file-system description object
- * @lprops: LEB properties to recategorize
+ * @lprops: LEB properties to re-categorize
 *
 * LEB properties are categorized to enable fast find operations. When the LEB
- * properties change they must be recategorized.
+ * properties change they must be re-categorized.
 */
 static void change_category(struct ubifs_info *c, struct ubifs_lprops *lprops)
 {
@@ -461,21 +461,18 @@ static void change_category(struct ubifs_info *c, struct ubifs_lprops *lprops)
 }
 /**
- * calc_dark - calculate LEB dark space size.
+ * ubifs_calc_dark - calculate LEB dark space size.
 * @c: the UBIFS file-system description object
 * @spc: amount of free and dirty space in the LEB
 *
- * This function calculates amount of dark space in an LEB which has @spc bytes
+ * This function calculates and returns amount of dark space in an LEB which
- * of free and dirty space. Returns the calculations result.
+ * has @spc bytes of free and dirty space.
 *
- * Dark space is the space which is not always usable - it depends on which
+ * UBIFS is trying to account the space which might not be usable, and this
- * nodes are written in which order. E.g., if an LEB has only 512 free bytes,
+ * space is called "dark space". For example, if an LEB has only %512 free
- * it is dark space, because it cannot fit a large data node. So UBIFS cannot
+ * bytes, it is dark space, because it cannot fit a large data node.
- * count on this LEB and treat these 512 bytes as usable because it is not true
- * if, for example, only big chunks of uncompressible data will be written to
- * the FS.
 */
-static int calc_dark(struct ubifs_info *c, int spc)
+int ubifs_calc_dark(const struct ubifs_info *c, int spc)
 {
        ubifs_assert(!(spc & 7));
@@ -518,7 +515,7 @@ static int is_lprops_dirty(struct ubifs_info *c, struct ubifs_lprops *lprops)
 * @free: new free space amount
 * @dirty: new dirty space amount
 * @flags: new flags
- * @idx_gc_cnt: change to the count of idx_gc list
+ * @idx_gc_cnt: change to the count of @idx_gc list
 *
 * This function changes LEB properties (@free, @dirty or @flag). However, the
 * property which has the %LPROPS_NC value is not changed. Returns a pointer to
@@ -535,7 +532,7 @@ const struct ubifs_lprops *ubifs_change_lp(struct ubifs_info *c,
 {
        /*
         * This is the only function that is allowed to change lprops, so we
-         * discard the const qualifier.
+         * discard the "const" qualifier.
         */
        struct ubifs_lprops *lprops = (struct ubifs_lprops *)lp;
@@ -575,7 +572,7 @@ const struct ubifs_lprops *ubifs_change_lp(struct ubifs_info *c,
                if (old_spc < c->dead_wm)
                        c->lst.total_dead -= old_spc;
                else
-                        c->lst.total_dark -= calc_dark(c, old_spc);
+                        c->lst.total_dark -= ubifs_calc_dark(c, old_spc);
                c->lst.total_used -= c->leb_size - old_spc;
        }
@@ -616,7 +613,7 @@ const struct ubifs_lprops *ubifs_change_lp(struct ubifs_info *c,
                if (new_spc < c->dead_wm)
                        c->lst.total_dead += new_spc;
                else
-                        c->lst.total_dark += calc_dark(c, new_spc);
+                        c->lst.total_dark += ubifs_calc_dark(c, new_spc);
                c->lst.total_used += c->leb_size - new_spc;
        }
@@ -1096,7 +1093,7 @@ static int scan_check_cb(struct ubifs_info *c,
                }
        }
-        sleb = ubifs_scan(c, lnum, 0, c->dbg->buf);
+        sleb = ubifs_scan(c, lnum, 0, c->dbg->buf, 0);
        if (IS_ERR(sleb)) {
                /*
                 * After an unclean unmount, empty and freeable LEBs
@@ -1107,7 +1104,7 @@ static int scan_check_cb(struct ubifs_info *c,
                                  "- continuing checking");
                        lst->empty_lebs += 1;
                        lst->total_free += c->leb_size;
-                        lst->total_dark += calc_dark(c, c->leb_size);
+                        lst->total_dark += ubifs_calc_dark(c, c->leb_size);
                        return LPT_SCAN_CONTINUE;
                }
@@ -1117,7 +1114,7 @@ static int scan_check_cb(struct ubifs_info *c,
                                  "- continuing checking");
                        lst->total_free  += lp->free;
                        lst->total_dirty += lp->dirty;
-                        lst->total_dark  +=  calc_dark(c, c->leb_size);
+                        lst->total_dark  +=  ubifs_calc_dark(c, c->leb_size);
                        return LPT_SCAN_CONTINUE;
                }
                data->err = PTR_ERR(sleb);
@@ -1235,7 +1232,7 @@ static int scan_check_cb(struct ubifs_info *c,
                if (spc < c->dead_wm)
                        lst->total_dead += spc;
                else
-                        lst->total_dark += calc_dark(c, spc);
+                        lst->total_dark += ubifs_calc_dark(c, spc);
        }
        ubifs_scan_destroy(sleb);
diff --git a/fs/ubifs/master.c b/fs/ubifs/master.c
index a88f33801b98..28beaeedadc0 100644
--- a/fs/ubifs/master.c
+++ b/fs/ubifs/master.c
@@ -29,7 +29,8 @@
 * @c: UBIFS file-system description object
 *
 * This function scans the master node LEBs and search for the latest master
- * node. Returns zero in case of success and a negative error code in case of
+ * node. Returns zero in case of success, %-EUCLEAN if there master area is
+ * corrupted and requires recovery, and a negative error code in case of
 * failure.
 */
 static int scan_for_master(struct ubifs_info *c)
@@ -40,7 +41,7 @@ static int scan_for_master(struct ubifs_info *c)
        lnum = UBIFS_MST_LNUM;
-        sleb = ubifs_scan(c, lnum, 0, c->sbuf);
+        sleb = ubifs_scan(c, lnum, 0, c->sbuf, 1);
        if (IS_ERR(sleb))
                return PTR_ERR(sleb);
        nodes_cnt = sleb->nodes_cnt;
@@ -48,7 +49,7 @@ static int scan_for_master(struct ubifs_info *c)
                snod = list_entry(sleb->nodes.prev, struct ubifs_scan_node,
                                  list);
                if (snod->type != UBIFS_MST_NODE)
-                        goto out;
+                        goto out_dump;
                memcpy(c->mst_node, snod->node, snod->len);
                offs = snod->offs;
        }
@@ -56,7 +57,7 @@ static int scan_for_master(struct ubifs_info *c)
        lnum += 1;
-        sleb = ubifs_scan(c, lnum, 0, c->sbuf);
+        sleb = ubifs_scan(c, lnum, 0, c->sbuf, 1);
        if (IS_ERR(sleb))
                return PTR_ERR(sleb);
        if (sleb->nodes_cnt != nodes_cnt)
@@ -65,7 +66,7 @@ static int scan_for_master(struct ubifs_info *c)
                goto out;
        snod = list_entry(sleb->nodes.prev, struct ubifs_scan_node, list);
        if (snod->type != UBIFS_MST_NODE)
-                goto out;
+                goto out_dump;
        if (snod->offs != offs)
                goto out;
        if (memcmp((void *)c->mst_node + UBIFS_CH_SZ,
@@ -78,6 +79,12 @@ static int scan_for_master(struct ubifs_info *c)
 out:
        ubifs_scan_destroy(sleb);
+        return -EUCLEAN;
+out_dump:
+        ubifs_err("unexpected node type %d master LEB %d:%d",
+                  snod->type, lnum, snod->offs);
+        ubifs_scan_destroy(sleb);
        return -EINVAL;
 }
@@ -256,7 +263,8 @@ int ubifs_read_master(struct ubifs_info *c)
        err = scan_for_master(c);
        if (err) {
-                err = ubifs_recover_master_node(c);
+                if (err == -EUCLEAN)
+                        err = ubifs_recover_master_node(c);
                if (err)
                        /*
                         * Note, we do not free 'c->mst_node' here because the
diff --git a/fs/ubifs/orphan.c b/fs/ubifs/orphan.c
index 152a7b34a141..82009c74b6a3 100644
--- a/fs/ubifs/orphan.c
+++ b/fs/ubifs/orphan.c
@@ -670,9 +670,10 @@ static int kill_orphans(struct ubifs_info *c)
                struct ubifs_scan_leb *sleb;
                dbg_rcvry("LEB %d", lnum);
-                sleb = ubifs_scan(c, lnum, 0, c->sbuf);
+                sleb = ubifs_scan(c, lnum, 0, c->sbuf, 1);
                if (IS_ERR(sleb)) {
-                        sleb = ubifs_recover_leb(c, lnum, 0, c->sbuf, 0);
+                        if (PTR_ERR(sleb) == -EUCLEAN)
+                                sleb = ubifs_recover_leb(c, lnum, 0, c->sbuf, 0);
                        if (IS_ERR(sleb)) {
                                err = PTR_ERR(sleb);
                                break;
@@ -899,7 +900,7 @@ static int dbg_scan_orphans(struct ubifs_info *c, struct check_info *ci)
        for (lnum = c->orph_first; lnum <= c->orph_last; lnum++) {
                struct ubifs_scan_leb *sleb;
-                sleb = ubifs_scan(c, lnum, 0, c->dbg->buf);
+                sleb = ubifs_scan(c, lnum, 0, c->dbg->buf, 0);
                if (IS_ERR(sleb)) {
                        err = PTR_ERR(sleb);
                        break;
diff --git a/fs/ubifs/recovery.c b/fs/ubifs/recovery.c
index e5f6cf8a1155..f94ddf7efba0 100644
--- a/fs/ubifs/recovery.c
+++ b/fs/ubifs/recovery.c
@@ -286,7 +286,7 @@ int ubifs_recover_master_node(struct ubifs_info *c)
                mst = mst2;
        }
-        dbg_rcvry("recovered master node from LEB %d",
+        ubifs_msg("recovered master node from LEB %d",
                  (mst == mst1 ? UBIFS_MST_LNUM : UBIFS_MST_LNUM + 1));
        memcpy(c->mst_node, mst, UBIFS_MST_NODE_SZ);
@@ -790,7 +790,7 @@ struct ubifs_scan_leb *ubifs_recover_log_leb(struct ubifs_info *c, int lnum,
                 * We can only recover at the end of the log, so check that the
                 * next log LEB is empty or out of date.
                 */
-                sleb = ubifs_scan(c, next_lnum, 0, sbuf);
+                sleb = ubifs_scan(c, next_lnum, 0, sbuf, 0);
                if (IS_ERR(sleb))
                        return sleb;
                if (sleb->nodes_cnt) {
diff --git a/fs/ubifs/replay.c b/fs/ubifs/replay.c
index 2970500f32df..5c2d6d759a3e 100644
--- a/fs/ubifs/replay.c
+++ b/fs/ubifs/replay.c
@@ -506,7 +506,7 @@ static int replay_bud(struct ubifs_info *c, int lnum, int offs, int jhead,
        if (c->need_recovery)
                sleb = ubifs_recover_leb(c, lnum, offs, c->sbuf, jhead != GCHD);
        else
-                sleb = ubifs_scan(c, lnum, offs, c->sbuf);
+                sleb = ubifs_scan(c, lnum, offs, c->sbuf, 0);
        if (IS_ERR(sleb))
                return PTR_ERR(sleb);
@@ -836,8 +836,8 @@ static int replay_log_leb(struct ubifs_info *c, int lnum, int offs, void *sbuf)
        const struct ubifs_cs_node *node;
        dbg_mnt("replay log LEB %d:%d", lnum, offs);
-        sleb = ubifs_scan(c, lnum, offs, sbuf);
+        sleb = ubifs_scan(c, lnum, offs, sbuf, c->need_recovery);
-        if (IS_ERR(sleb) ) {
+        if (IS_ERR(sleb)) {
                if (PTR_ERR(sleb) != -EUCLEAN || !c->need_recovery)
                        return PTR_ERR(sleb);
                sleb = ubifs_recover_log_leb(c, lnum, offs, sbuf);
diff --git a/fs/ubifs/scan.c b/fs/ubifs/scan.c
index 892ebfee4fe5..96c525384191 100644
--- a/fs/ubifs/scan.c
+++ b/fs/ubifs/scan.c
@@ -108,10 +108,9 @@ int ubifs_scan_a_node(const struct ubifs_info *c, void *buf, int len, int lnum,
                /* Make the node pads to 8-byte boundary */
                if ((node_len + pad_len) & 7) {
-                        if (!quiet) {
+                        if (!quiet)
                                dbg_err("bad padding length %d - %d",
                                        offs, offs + node_len + pad_len);
-                        }
                        return SCANNED_A_BAD_PAD_NODE;
                }
@@ -253,15 +252,19 @@ void ubifs_scanned_corruption(const struct ubifs_info *c, int lnum, int offs,
 * @c: UBIFS file-system description object
 * @lnum: logical eraseblock number
 * @offs: offset to start at (usually zero)
- * @sbuf: scan buffer (must be c->leb_size)
+ * @sbuf: scan buffer (must be of @c->leb_size bytes in size)
+ * @quiet: print no messages
 *
 * This function scans LEB number @lnum and returns complete information about
 * its contents. Returns the scaned information in case of success and,
 * %-EUCLEAN if the LEB neads recovery, and other negative error codes in case
 * of failure.
+ *
+ * If @quiet is non-zero, this function does not print large and scary
+ * error messages and flash dumps in case of errors.
 */
 struct ubifs_scan_leb *ubifs_scan(const struct ubifs_info *c, int lnum,
-                                  int offs, void *sbuf)
+                                  int offs, void *sbuf, int quiet)
 {
        void *buf = sbuf + offs;
        int err, len = c->leb_size - offs;
@@ -280,7 +283,7 @@ struct ubifs_scan_leb *ubifs_scan(const struct ubifs_info *c, int lnum,
                cond_resched();
-                ret = ubifs_scan_a_node(c, buf, len, lnum, offs, 0);
+                ret = ubifs_scan_a_node(c, buf, len, lnum, offs, quiet);
                if (ret > 0) {
                        /* Padding bytes or a valid padding node */
                        offs += ret;
@@ -320,7 +323,9 @@ struct ubifs_scan_leb *ubifs_scan(const struct ubifs_info *c, int lnum,
        }
        if (offs % c->min_io_size) {
-                ubifs_err("empty space starts at non-aligned offset %d", offs);
+                if (!quiet)
+                        ubifs_err("empty space starts at non-aligned offset %d",
+                                  offs);
                goto corrupted;;
        }
@@ -331,18 +336,25 @@ struct ubifs_scan_leb *ubifs_scan(const struct ubifs_info *c, int lnum,
                        break;
        for (; len; offs++, buf++, len--)
                if (*(uint8_t *)buf != 0xff) {
-                        ubifs_err("corrupt empty space at LEB %d:%d",
+                        if (!quiet)
-                                  lnum, offs);
+                                ubifs_err("corrupt empty space at LEB %d:%d",
+                                          lnum, offs);
                        goto corrupted;
                }
        return sleb;
 corrupted:
-        ubifs_scanned_corruption(c, lnum, offs, buf);
+        if (!quiet) {
+                ubifs_scanned_corruption(c, lnum, offs, buf);
+                ubifs_err("LEB %d scanning failed", lnum);
+        }
        err = -EUCLEAN;
+        ubifs_scan_destroy(sleb);
+        return ERR_PTR(err);
 error:
-        ubifs_err("LEB %d scanning failed", lnum);
+        ubifs_err("LEB %d scanning failed, error %d", lnum, err);
        ubifs_scan_destroy(sleb);
        return ERR_PTR(err);
 }
diff --git a/fs/ubifs/super.c b/fs/ubifs/super.c
index c4af069df1ad..333e181ee987 100644
--- a/fs/ubifs/super.c
+++ b/fs/ubifs/super.c
@@ -36,7 +36,6 @@
 #include <linux/mount.h>
 #include <linux/math64.h>
 #include <linux/writeback.h>
-#include <linux/smp_lock.h>
 #include "ubifs.h"
 /*
@@ -318,6 +317,8 @@ static int ubifs_write_inode(struct inode *inode, int wait)
                if (err)
                        ubifs_err("can't write inode %lu, error %d",
                                  inode->i_ino, err);
+                else
+                        err = dbg_check_inode_size(c, inode, ui->ui_size);
        }
        ui->dirty = 0;
@@ -448,17 +449,6 @@ static int ubifs_sync_fs(struct super_block *sb, int wait)
                return 0;
        /*
-         * VFS calls '->sync_fs()' before synchronizing all dirty inodes and
-         * pages, so synchronize them first, then commit the journal. Strictly
-         * speaking, it is not necessary to commit the journal here,
-         * synchronizing write-buffers would be enough. But committing makes
-         * UBIFS free space predictions much more accurate, so we want to let
-         * the user be able to get more accurate results of 'statfs()' after
-         * they synchronize the file system.
-         */
-        sync_inodes_sb(sb);
-        /*
         * Synchronize write buffers, because 'ubifs_run_commit()' does not
         * do this if it waits for an already running commit.
         */
@@ -468,6 +458,13 @@ static int ubifs_sync_fs(struct super_block *sb, int wait)
                        return err;
        }
+        /*
+         * Strictly speaking, it is not necessary to commit the journal here,
+         * synchronizing write-buffers would be enough. But committing makes
+         * UBIFS free space predictions much more accurate, so we want to let
+         * the user be able to get more accurate results of 'statfs()' after
+         * they synchronize the file system.
+         */
        err = ubifs_run_commit(c);
        if (err)
                return err;
@@ -1720,8 +1717,6 @@ static void ubifs_put_super(struct super_block *sb)
        ubifs_msg("un-mount UBI device %d, volume %d", c->vi.ubi_num,
                  c->vi.vol_id);
-        lock_kernel();
        /*
         * The following asserts are only valid if there has not been a failure
         * of the media. For example, there will be dirty inodes if we failed
@@ -1786,8 +1781,6 @@ static void ubifs_put_super(struct super_block *sb)
        ubi_close_volume(c->ubi);
        mutex_unlock(&c->umount_mutex);
        kfree(c);
-        unlock_kernel();
 }
 static int ubifs_remount_fs(struct super_block *sb, int *flags, char *data)
@@ -1803,22 +1796,17 @@ static int ubifs_remount_fs(struct super_block *sb, int *flags, char *data)
                return err;
        }
-        lock_kernel();
        if ((sb->s_flags & MS_RDONLY) && !(*flags & MS_RDONLY)) {
                if (c->ro_media) {
                        ubifs_msg("cannot re-mount due to prior errors");
-                        unlock_kernel();
                        return -EROFS;
                }
                err = ubifs_remount_rw(c);
-                if (err) {
+                if (err)
-                        unlock_kernel();
                        return err;
-                }
        } else if (!(sb->s_flags & MS_RDONLY) && (*flags & MS_RDONLY)) {
                if (c->ro_media) {
                        ubifs_msg("cannot re-mount due to prior errors");
-                        unlock_kernel();
                        return -EROFS;
                }
                ubifs_remount_ro(c);
@@ -1833,7 +1821,6 @@ static int ubifs_remount_fs(struct super_block *sb, int *flags, char *data)
        }
        ubifs_assert(c->lst.taken_empty_lebs > 0);
-        unlock_kernel();
        return 0;
 }
diff --git a/fs/ubifs/tnc.c b/fs/ubifs/tnc.c
index f249f7b0d656..e5b1a7d00fa0 100644
--- a/fs/ubifs/tnc.c
+++ b/fs/ubifs/tnc.c
@@ -1159,8 +1159,8 @@ static struct ubifs_znode *dirty_cow_bottom_up(struct ubifs_info *c,
 *   o exact match, i.e. the found zero-level znode contains key @key, then %1
 *     is returned and slot number of the matched branch is stored in @n;
 *   o not exact match, which means that zero-level znode does not contain
- *     @key, then %0 is returned and slot number of the closed branch is stored
+ *     @key, then %0 is returned and slot number of the closest branch is stored
- *     in  @n;
+ *     in @n;
 *   o @key is so small that it is even less than the lowest key of the
 *     leftmost zero-level node, then %0 is returned and %0 is stored in @n.
 *
@@ -1433,7 +1433,7 @@ static int maybe_leb_gced(struct ubifs_info *c, int lnum, int gc_seq1)
 * @lnum: LEB number is returned here
 * @offs: offset is returned here
 *
- * This function look up and reads node with key @key. The caller has to make
+ * This function looks up and reads node with key @key. The caller has to make
 * sure the @node buffer is large enough to fit the node. Returns zero in case
 * of success, %-ENOENT if the node was not found, and a negative error code in
 * case of failure. The node location can be returned in @lnum and @offs.
@@ -3268,3 +3268,73 @@ out_unlock:
        mutex_unlock(&c->tnc_mutex);
        return err;
 }
+#ifdef CONFIG_UBIFS_FS_DEBUG
+/**
+ * dbg_check_inode_size - check if inode size is correct.
+ * @c: UBIFS file-system description object
+ * @inum: inode number
+ * @size: inode size
+ *
+ * This function makes sure that the inode size (@size) is correct and it does
+ * not have any pages beyond @size. Returns zero if the inode is OK, %-EINVAL
+ * if it has a data page beyond @size, and other negative error code in case of
+ * other errors.
+ */
+int dbg_check_inode_size(struct ubifs_info *c, const struct inode *inode,
+                         loff_t size)
+{
+        int err, n;
+        union ubifs_key from_key, to_key, *key;
+        struct ubifs_znode *znode;
+        unsigned int block;
+        if (!S_ISREG(inode->i_mode))
+                return 0;
+        if (!(ubifs_chk_flags & UBIFS_CHK_GEN))
+                return 0;
+        block = (size + UBIFS_BLOCK_SIZE - 1) >> UBIFS_BLOCK_SHIFT;
+        data_key_init(c, &from_key, inode->i_ino, block);
+        highest_data_key(c, &to_key, inode->i_ino);
+        mutex_lock(&c->tnc_mutex);
+        err = ubifs_lookup_level0(c, &from_key, &znode, &n);
+        if (err < 0)
+                goto out_unlock;
+        if (err) {
+                err = -EINVAL;
+                key = &from_key;
+                goto out_dump;
+        }
+        err = tnc_next(c, &znode, &n);
+        if (err == -ENOENT) {
+                err = 0;
+                goto out_unlock;
+        }
+        if (err < 0)
+                goto out_unlock;
+        ubifs_assert(err == 0);
+        key = &znode->zbranch[n].key;
+        if (!key_in_range(c, key, &from_key, &to_key))
+                goto out_unlock;
+out_dump:
+        block = key_block(c, key);
+        ubifs_err("inode %lu has size %lld, but there are data at offset %lld "
+                  "(data key %s)", (unsigned long)inode->i_ino, size,
+                  ((loff_t)block) << UBIFS_BLOCK_SHIFT, DBGKEY(key));
+        dbg_dump_inode(c, inode);
+        dbg_dump_stack();
+        err = -EINVAL;
+out_unlock:
+        mutex_unlock(&c->tnc_mutex);
+        return err;
+}
+#endif /* CONFIG_UBIFS_FS_DEBUG */
diff --git a/fs/ubifs/tnc_commit.c b/fs/ubifs/tnc_commit.c
index fde8d127c768..53288e5d604e 100644
--- a/fs/ubifs/tnc_commit.c
+++ b/fs/ubifs/tnc_commit.c
@@ -245,7 +245,7 @@ static int layout_leb_in_gaps(struct ubifs_info *c, int *p)
         * it is more comprehensive and less efficient than is needed for this
         * purpose.
         */
-        sleb = ubifs_scan(c, lnum, 0, c->ileb_buf);
+        sleb = ubifs_scan(c, lnum, 0, c->ileb_buf, 0);
        c->ileb_len = 0;
        if (IS_ERR(sleb))
                return PTR_ERR(sleb);
diff --git a/fs/ubifs/ubifs-media.h b/fs/ubifs/ubifs-media.h
index 3eee07e0c495..191ca7863fe7 100644
--- a/fs/ubifs/ubifs-media.h
+++ b/fs/ubifs/ubifs-media.h
@@ -135,6 +135,13 @@
 /* The key is always at the same position in all keyed nodes */
 #define UBIFS_KEY_OFFSET offsetof(struct ubifs_ino_node, key)
+/* Garbage collector journal head number */
+#define UBIFS_GC_HEAD   0
+/* Base journal head number */
+#define UBIFS_BASE_HEAD 1
+/* Data journal head number */
+#define UBIFS_DATA_HEAD 2
 /*
 * LEB Properties Tree node types.
 *
diff --git a/fs/ubifs/ubifs.h b/fs/ubifs/ubifs.h
index a29349094422..b2d976366a46 100644
--- a/fs/ubifs/ubifs.h
+++ b/fs/ubifs/ubifs.h
@@ -105,12 +105,10 @@
 /* Number of non-data journal heads */
 #define NONDATA_JHEADS_CNT 2
-/* Garbage collector head */
+/* Shorter names for journal head numbers for internal usage */
-#define GCHD   0
+#define GCHD   UBIFS_GC_HEAD
-/* Base journal head number */
+#define BASEHD UBIFS_BASE_HEAD
-#define BASEHD 1
+#define DATAHD UBIFS_DATA_HEAD
-/* First "general purpose" journal head */
-#define DATAHD 2
 /* 'No change' value for 'ubifs_change_lp()' */
 #define LPROPS_NC 0x80000001
@@ -1451,7 +1449,7 @@ int ubifs_sync_wbufs_by_inode(struct ubifs_info *c, struct inode *inode);
 /* scan.c */
 struct ubifs_scan_leb *ubifs_scan(const struct ubifs_info *c, int lnum,
-                                  int offs, void *sbuf);
+                                  int offs, void *sbuf, int quiet);
 void ubifs_scan_destroy(struct ubifs_scan_leb *sleb);
 int ubifs_scan_a_node(const struct ubifs_info *c, void *buf, int len, int lnum,
                      int offs, int quiet);
@@ -1676,6 +1674,7 @@ const struct ubifs_lprops *ubifs_fast_find_free(struct ubifs_info *c);
 const struct ubifs_lprops *ubifs_fast_find_empty(struct ubifs_info *c);
 const struct ubifs_lprops *ubifs_fast_find_freeable(struct ubifs_info *c);
 const struct ubifs_lprops *ubifs_fast_find_frdi_idx(struct ubifs_info *c);
+int ubifs_calc_dark(const struct ubifs_info *c, int spc);
 /* file.c */
 int ubifs_fsync(struct file *file, struct dentry *dentry, int datasync);
diff --git a/fs/ubifs/xattr.c b/fs/ubifs/xattr.c
index adafcf556531..7998cc378250 100644
--- a/fs/ubifs/xattr.c
+++ b/fs/ubifs/xattr.c
@@ -78,9 +78,9 @@ enum {
        SECURITY_XATTR,
 };
-static struct inode_operations none_inode_operations;
+static const struct inode_operations none_inode_operations;
 static struct address_space_operations none_address_operations;
-static struct file_operations none_file_operations;
+static const struct file_operations none_file_operations;
 /**
 * create_xattr - create an extended attribute.
diff --git a/include/acpi/acpi_bus.h b/include/acpi/acpi_bus.h
index 1fa3ffb7c93b..1b3b36068ca5 100644
--- a/include/acpi/acpi_bus.h
+++ b/include/acpi/acpi_bus.h
@@ -356,7 +356,6 @@ void acpi_remove_dir(struct acpi_device *);
 /*
 * Bind physical devices with ACPI devices
 */
-#include <linux/device.h>
 struct acpi_bus_type {
        struct list_head list;
        struct bus_type *bus;
diff --git a/include/drm/drmP.h b/include/drm/drmP.h
index 45b67d9c39c1..c8e64bbadbcf 100644
--- a/include/drm/drmP.h
+++ b/include/drm/drmP.h
@@ -88,7 +88,37 @@ struct drm_device;
 #define DRM_UT_CORE             0x01
 #define DRM_UT_DRIVER           0x02
 #define DRM_UT_KMS              0x04
-#define DRM_UT_MODE             0x08
+/*
+ * Three debug levels are defined.
+ * drm_core, drm_driver, drm_kms
+ * drm_core level can be used in the generic drm code. For example:
+ *      drm_ioctl, drm_mm, drm_memory
+ * The macro definiton of DRM_DEBUG is used.
+ *      DRM_DEBUG(fmt, args...)
+ *      The debug info by using the DRM_DEBUG can be obtained by adding
+ *      the boot option of "drm.debug=1".
+ *
+ * drm_driver level can be used in the specific drm driver. It is used
+ * to add the debug info related with the drm driver. For example:
+ * i915_drv, i915_dma, i915_gem, radeon_drv,
+ *      The macro definition of DRM_DEBUG_DRIVER can be used.
+ *      DRM_DEBUG_DRIVER(fmt, args...)
+ *      The debug info by using the DRM_DEBUG_DRIVER can be obtained by
+ *      adding the boot option of "drm.debug=0x02"
+ *
+ * drm_kms level can be used in the KMS code related with specific drm driver.
+ * It is used to add the debug info related with KMS mode. For example:
+ * the connector/crtc ,
+ *      The macro definition of DRM_DEBUG_KMS can be used.
+ *      DRM_DEBUG_KMS(fmt, args...)
+ *      The debug info by using the DRM_DEBUG_KMS can be obtained by
+ *      adding the boot option of "drm.debug=0x04"
+ *
+ * If we add the boot option of "drm.debug=0x06", we can get the debug info by
+ * using the DRM_DEBUG_KMS and DRM_DEBUG_DRIVER.
+ * If we add the boot option of "drm.debug=0x05", we can get the debug info by
+ * using the DRM_DEBUG_KMS and DRM_DEBUG.
+ */
 extern void drm_ut_debug_printk(unsigned int request_level,
                                const char *prefix,
@@ -174,19 +204,14 @@ extern void drm_ut_debug_printk(unsigned int request_level,
                                        __func__, fmt, ##args);         \
        } while (0)
-#define DRM_DEBUG_DRIVER(prefix, fmt, args...)                          \
+#define DRM_DEBUG_DRIVER(fmt, args...)                                  \
        do {                                                            \
-                drm_ut_debug_printk(DRM_UT_DRIVER, prefix,              \
+                drm_ut_debug_printk(DRM_UT_DRIVER, DRM_NAME,            \
                                        __func__, fmt, ##args);         \
        } while (0)
-#define DRM_DEBUG_KMS(prefix, fmt, args...)                             \
+#define DRM_DEBUG_KMS(fmt, args...)                             \
        do {                                                            \
-                drm_ut_debug_printk(DRM_UT_KMS, prefix,                 \
+                drm_ut_debug_printk(DRM_UT_KMS, DRM_NAME,               \
-                                         __func__, fmt, ##args);        \
-        } while (0)
-#define DRM_DEBUG_MODE(prefix, fmt, args...)                            \
-        do {                                                            \
-                drm_ut_debug_printk(DRM_UT_MODE, prefix,                \
                                         __func__, fmt, ##args);        \
        } while (0)
 #define DRM_LOG(fmt, args...)                                           \
@@ -210,9 +235,8 @@ extern void drm_ut_debug_printk(unsigned int request_level,
                                        NULL, fmt, ##args);             \
        } while (0)
 #else
-#define DRM_DEBUG_DRIVER(prefix, fmt, args...) do { } while (0)
+#define DRM_DEBUG_DRIVER(fmt, args...) do { } while (0)
-#define DRM_DEBUG_KMS(prefix, fmt, args...)     do { } while (0)
+#define DRM_DEBUG_KMS(fmt, args...)     do { } while (0)
-#define DRM_DEBUG_MODE(prefix, fmt, args...)    do { } while (0)
 #define DRM_DEBUG(fmt, arg...)           do { } while (0)
 #define DRM_LOG(fmt, arg...)            do { } while (0)
 #define DRM_LOG_KMS(fmt, args...) do { } while (0)
@@ -786,6 +810,9 @@ struct drm_driver {
        int (*gem_init_object) (struct drm_gem_object *obj);
        void (*gem_free_object) (struct drm_gem_object *obj);
+        /* vga arb irq handler */
+        void (*vgaarb_irq)(struct drm_device *dev, bool state);
        /* Driver private ops for this object */
        struct vm_operations_struct *gem_vm_ops;
@@ -1417,7 +1444,7 @@ drm_gem_object_unreference(struct drm_gem_object *obj)
 int drm_gem_handle_create(struct drm_file *file_priv,
                          struct drm_gem_object *obj,
-                          int *handlep);
+                          u32 *handlep);
 static inline void
 drm_gem_object_handle_reference(struct drm_gem_object *obj)
@@ -1443,7 +1470,7 @@ drm_gem_object_handle_unreference(struct drm_gem_object *obj)
 struct drm_gem_object *drm_gem_object_lookup(struct drm_device *dev,
                                             struct drm_file *filp,
-                                             int handle);
+                                             u32 handle);
 int drm_gem_close_ioctl(struct drm_device *dev, void *data,
                        struct drm_file *file_priv);
 int drm_gem_flink_ioctl(struct drm_device *dev, void *data,
diff --git a/include/drm/drm_cache.h b/include/drm/drm_cache.h
new file mode 100644
index 000000000000..7bfb063029d8
--- /dev/null
+++ b/include/drm/drm_cache.h
@@ -0,0 +1,38 @@
+/**************************************************************************
+ *
+ * Copyright 2009 Red Hat Inc.
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sub license, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial portions
+ * of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
+ * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
+ * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
+ * USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ *
+ **************************************************************************/
+/*
+ * Authors:
+ * Dave Airlie <airlied@redhat.com>
+ */
+#ifndef _DRM_CACHE_H_
+#define _DRM_CACHE_H_
+void drm_clflush_pages(struct page *pages[], unsigned long num_pages);
+#endif
diff --git a/include/drm/drm_crtc.h b/include/drm/drm_crtc.h
index 7300fb866767..ae1e9e166959 100644
--- a/include/drm/drm_crtc.h
+++ b/include/drm/drm_crtc.h
@@ -259,6 +259,8 @@ struct drm_framebuffer {
        void *fbdev;
        u32 pseudo_palette[17];
        struct list_head filp_head;
+        /* if you are using the helper */
+        void *helper_private;
 };
 struct drm_property_blob {
@@ -572,6 +574,12 @@ struct drm_mode_config {
        struct drm_property *tv_right_margin_property;
        struct drm_property *tv_top_margin_property;
        struct drm_property *tv_bottom_margin_property;
+        struct drm_property *tv_brightness_property;
+        struct drm_property *tv_contrast_property;
+        struct drm_property *tv_flicker_reduction_property;
+        struct drm_property *tv_overscan_property;
+        struct drm_property *tv_saturation_property;
+        struct drm_property *tv_hue_property;
        /* Optional properties */
        struct drm_property *scaling_mode_property;
@@ -736,4 +744,12 @@ extern int drm_mode_gamma_get_ioctl(struct drm_device *dev,
 extern int drm_mode_gamma_set_ioctl(struct drm_device *dev,
                                    void *data, struct drm_file *file_priv);
 extern bool drm_detect_hdmi_monitor(struct edid *edid);
+extern struct drm_display_mode *drm_cvt_mode(struct drm_device *dev,
+                                int hdisplay, int vdisplay, int vrefresh,
+                                bool reduced, bool interlaced);
+extern struct drm_display_mode *drm_gtf_mode(struct drm_device *dev,
+                                int hdisplay, int vdisplay, int vrefresh,
+                                bool interlaced, int margins);
+extern int drm_add_modes_noedid(struct drm_connector *connector,
+                                int hdisplay, int vdisplay);
 #endif /* __DRM_CRTC_H__ */
diff --git a/include/drm/drm_crtc_helper.h b/include/drm/drm_crtc_helper.h
index 6769ff6c1bc0..4c8dacaf4f58 100644
--- a/include/drm/drm_crtc_helper.h
+++ b/include/drm/drm_crtc_helper.h
@@ -79,6 +79,8 @@ struct drm_encoder_helper_funcs {
        /* detect for DAC style encoders */
        enum drm_connector_status (*detect)(struct drm_encoder *encoder,
                                            struct drm_connector *connector);
+        /* disable encoder when not in use - more explicit than dpms off */
+        void (*disable)(struct drm_encoder *encoder);
 };
 struct drm_connector_helper_funcs {
@@ -98,6 +100,7 @@ extern bool drm_crtc_helper_set_mode(struct drm_crtc *crtc,
                                     int x, int y,
                                     struct drm_framebuffer *old_fb);
 extern bool drm_helper_crtc_in_use(struct drm_crtc *crtc);
+extern bool drm_helper_encoder_in_use(struct drm_encoder *encoder);
 extern void drm_helper_connector_dpms(struct drm_connector *connector, int mode);
diff --git a/include/drm/drm_encoder_slave.h b/include/drm/drm_encoder_slave.h
new file mode 100644
index 000000000000..2f65633d28a7
--- /dev/null
+++ b/include/drm/drm_encoder_slave.h
@@ -0,0 +1,162 @@
+/*
+ * Copyright (C) 2009 Francisco Jerez.
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial
+ * portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ */
+#ifndef __DRM_ENCODER_SLAVE_H__
+#define __DRM_ENCODER_SLAVE_H__
+#include "drmP.h"
+#include "drm_crtc.h"
+/**
+ * struct drm_encoder_slave_funcs - Entry points exposed by a slave encoder driver
+ * @set_config: Initialize any encoder-specific modesetting parameters.
+ *              The meaning of the @params parameter is implementation
+ *              dependent. It will usually be a structure with DVO port
+ *              data format settings or timings. It's not required for
+ *              the new parameters to take effect until the next mode
+ *              is set.
+ *
+ * Most of its members are analogous to the function pointers in
+ * &drm_encoder_helper_funcs and they can optionally be used to
+ * initialize the latter. Connector-like methods (e.g. @get_modes and
+ * @set_property) will typically be wrapped around and only be called
+ * if the encoder is the currently selected one for the connector.
+ */
+struct drm_encoder_slave_funcs {
+        void (*set_config)(struct drm_encoder *encoder,
+                           void *params);
+        void (*destroy)(struct drm_encoder *encoder);
+        void (*dpms)(struct drm_encoder *encoder, int mode);
+        void (*save)(struct drm_encoder *encoder);
+        void (*restore)(struct drm_encoder *encoder);
+        bool (*mode_fixup)(struct drm_encoder *encoder,
+                           struct drm_display_mode *mode,
+                           struct drm_display_mode *adjusted_mode);
+        int (*mode_valid)(struct drm_encoder *encoder,
+                          struct drm_display_mode *mode);
+        void (*mode_set)(struct drm_encoder *encoder,
+                         struct drm_display_mode *mode,
+                         struct drm_display_mode *adjusted_mode);
+        enum drm_connector_status (*detect)(struct drm_encoder *encoder,
+                                            struct drm_connector *connector);
+        int (*get_modes)(struct drm_encoder *encoder,
+                         struct drm_connector *connector);
+        int (*create_resources)(struct drm_encoder *encoder,
+                                 struct drm_connector *connector);
+        int (*set_property)(struct drm_encoder *encoder,
+                            struct drm_connector *connector,
+                            struct drm_property *property,
+                            uint64_t val);
+};
+/**
+ * struct drm_encoder_slave - Slave encoder struct
+ * @base: DRM encoder object.
+ * @slave_funcs: Slave encoder callbacks.
+ * @slave_priv: Slave encoder private data.
+ * @bus_priv: Bus specific data.
+ *
+ * A &drm_encoder_slave has two sets of callbacks, @slave_funcs and the
+ * ones in @base. The former are never actually called by the common
+ * CRTC code, it's just a convenience for splitting the encoder
+ * functions in an upper, GPU-specific layer and a (hopefully)
+ * GPU-agnostic lower layer: It's the GPU driver responsibility to
+ * call the slave methods when appropriate.
+ *
+ * drm_i2c_encoder_init() provides a way to get an implementation of
+ * this.
+ */
+struct drm_encoder_slave {
+        struct drm_encoder base;
+        struct drm_encoder_slave_funcs *slave_funcs;
+        void *slave_priv;
+        void *bus_priv;
+};
+#define to_encoder_slave(x) container_of((x), struct drm_encoder_slave, base)
+int drm_i2c_encoder_init(struct drm_device *dev,
+                         struct drm_encoder_slave *encoder,
+                         struct i2c_adapter *adap,
+                         const struct i2c_board_info *info);
+/**
+ * struct drm_i2c_encoder_driver
+ *
+ * Describes a device driver for an encoder connected to the GPU
+ * through an I2C bus. In addition to the entry points in @i2c_driver
+ * an @encoder_init function should be provided. It will be called to
+ * give the driver an opportunity to allocate any per-encoder data
+ * structures and to initialize the @slave_funcs and (optionally)
+ * @slave_priv members of @encoder.
+ */
+struct drm_i2c_encoder_driver {
+        struct i2c_driver i2c_driver;
+        int (*encoder_init)(struct i2c_client *client,
+                            struct drm_device *dev,
+                            struct drm_encoder_slave *encoder);
+};
+#define to_drm_i2c_encoder_driver(x) container_of((x),                  \
+                                                  struct drm_i2c_encoder_driver, \
+                                                  i2c_driver)
+/**
+ * drm_i2c_encoder_get_client - Get the I2C client corresponding to an encoder
+ */
+static inline struct i2c_client *drm_i2c_encoder_get_client(struct drm_encoder *encoder)
+{
+        return (struct i2c_client *)to_encoder_slave(encoder)->bus_priv;
+}
+/**
+ * drm_i2c_encoder_register - Register an I2C encoder driver
+ * @owner:      Module containing the driver.
+ * @driver:     Driver to be registered.
+ */
+static inline int drm_i2c_encoder_register(struct module *owner,
+                                           struct drm_i2c_encoder_driver *driver)
+{
+        return i2c_register_driver(owner, &driver->i2c_driver);
+}
+/**
+ * drm_i2c_encoder_unregister - Unregister an I2C encoder driver
+ * @driver:     Driver to be unregistered.
+ */
+static inline void drm_i2c_encoder_unregister(struct drm_i2c_encoder_driver *driver)
+{
+        i2c_del_driver(&driver->i2c_driver);
+}
+void drm_i2c_encoder_destroy(struct drm_encoder *encoder);
+#endif
diff --git a/include/drm/drm_fb_helper.h b/include/drm/drm_fb_helper.h
new file mode 100644
index 000000000000..88fffbdfa26f
--- /dev/null
+++ b/include/drm/drm_fb_helper.h
@@ -0,0 +1,82 @@
+/*
+ * Copyright (c) 2006-2009 Red Hat Inc.
+ * Copyright (c) 2006-2008 Intel Corporation
+ * Copyright (c) 2007 Dave Airlie <airlied@linux.ie>
+ *
+ * DRM framebuffer helper functions
+ *
+ * Permission to use, copy, modify, distribute, and sell this software and its
+ * documentation for any purpose is hereby granted without fee, provided that
+ * the above copyright notice appear in all copies and that both that copyright
+ * notice and this permission notice appear in supporting documentation, and
+ * that the name of the copyright holders not be used in advertising or
+ * publicity pertaining to distribution of the software without specific,
+ * written prior permission.  The copyright holders make no representations
+ * about the suitability of this software for any purpose.  It is provided "as
+ * is" without express or implied warranty.
+ *
+ * THE COPYRIGHT HOLDERS DISCLAIM ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
+ * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
+ * EVENT SHALL THE COPYRIGHT HOLDERS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
+ * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
+ * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
+ * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE
+ * OF THIS SOFTWARE.
+ *
+ * Authors:
+ *      Dave Airlie <airlied@linux.ie>
+ *      Jesse Barnes <jesse.barnes@intel.com>
+ */
+#ifndef DRM_FB_HELPER_H
+#define DRM_FB_HELPER_H
+struct drm_fb_helper_crtc {
+        uint32_t crtc_id;
+        struct drm_mode_set mode_set;
+};
+struct drm_fb_helper_funcs {
+        void (*gamma_set)(struct drm_crtc *crtc, u16 red, u16 green,
+                          u16 blue, int regno);
+};
+struct drm_fb_helper {
+        struct drm_framebuffer *fb;
+        struct drm_device *dev;
+        struct drm_display_mode *mode;
+        int crtc_count;
+        struct drm_fb_helper_crtc *crtc_info;
+        struct drm_fb_helper_funcs *funcs;
+        int conn_limit;
+        struct list_head kernel_fb_list;
+};
+int drm_fb_helper_single_fb_probe(struct drm_device *dev,
+                                  int (*fb_create)(struct drm_device *dev,
+                                                   uint32_t fb_width,
+                                                   uint32_t fb_height,
+                                                   uint32_t surface_width,
+                                                   uint32_t surface_height,
+                                                   struct drm_framebuffer **fb_ptr));
+int drm_fb_helper_init_crtc_count(struct drm_fb_helper *helper, int crtc_count,
+                                  int max_conn);
+void drm_fb_helper_free(struct drm_fb_helper *helper);
+int drm_fb_helper_blank(int blank, struct fb_info *info);
+int drm_fb_helper_pan_display(struct fb_var_screeninfo *var,
+                              struct fb_info *info);
+int drm_fb_helper_set_par(struct fb_info *info);
+int drm_fb_helper_check_var(struct fb_var_screeninfo *var,
+                            struct fb_info *info);
+int drm_fb_helper_setcolreg(unsigned regno,
+                            unsigned red,
+                            unsigned green,
+                            unsigned blue,
+                            unsigned transp,
+                            struct fb_info *info);
+void drm_fb_helper_restore(void);
+void drm_fb_helper_fill_var(struct fb_info *info, struct drm_framebuffer *fb,
+                            uint32_t fb_width, uint32_t fb_height);
+void drm_fb_helper_fill_fix(struct fb_info *info, uint32_t pitch);
+#endif
diff --git a/include/drm/drm_memory.h b/include/drm/drm_memory.h
index 63e425b5ea82..15af9b32ae42 100644
--- a/include/drm/drm_memory.h
+++ b/include/drm/drm_memory.h
@@ -44,8 +44,6 @@
 #if __OS_HAS_AGP
-#include <linux/vmalloc.h>
 #ifdef HAVE_PAGE_AGP
 #include <asm/agp.h>
 #else
diff --git a/include/drm/drm_mm.h b/include/drm/drm_mm.h
index f8332073d277..62329f9a42cb 100644
--- a/include/drm/drm_mm.h
+++ b/include/drm/drm_mm.h
@@ -37,6 +37,9 @@
 * Generic range manager structs
 */
 #include <linux/list.h>
+#ifdef CONFIG_DEBUG_FS
+#include <linux/seq_file.h>
+#endif
 struct drm_mm_node {
        struct list_head fl_entry;
@@ -96,4 +99,8 @@ static inline struct drm_mm *drm_get_mm(struct drm_mm_node *block)
        return block->mm;
 }
+#ifdef CONFIG_DEBUG_FS
+int drm_mm_dump_table(struct seq_file *m, struct drm_mm *mm);
+#endif
 #endif
diff --git a/include/drm/drm_mode.h b/include/drm/drm_mode.h
index ae304cc73c90..1f908416aedb 100644
--- a/include/drm/drm_mode.h
+++ b/include/drm/drm_mode.h
@@ -68,10 +68,11 @@
 #define DRM_MODE_DPMS_OFF       3
 /* Scaling mode options */
-#define DRM_MODE_SCALE_NON_GPU          0
+#define DRM_MODE_SCALE_NONE             0 /* Unmodified timing (display or
-#define DRM_MODE_SCALE_FULLSCREEN       1
+                                             software can still scale) */
-#define DRM_MODE_SCALE_NO_SCALE         2
+#define DRM_MODE_SCALE_FULLSCREEN       1 /* Full screen, ignore aspect */
-#define DRM_MODE_SCALE_ASPECT           3
+#define DRM_MODE_SCALE_CENTER           2 /* Centered, no scaling */
+#define DRM_MODE_SCALE_ASPECT           3 /* Full screen, preserve aspect */
 /* Dithering mode options */
 #define DRM_MODE_DITHERING_OFF  0
@@ -141,6 +142,7 @@ struct drm_mode_get_encoder {
 #define DRM_MODE_SUBCONNECTOR_Composite 5
 #define DRM_MODE_SUBCONNECTOR_SVIDEO    6
 #define DRM_MODE_SUBCONNECTOR_Component 8
+#define DRM_MODE_SUBCONNECTOR_SCART     9
 #define DRM_MODE_CONNECTOR_Unknown      0
 #define DRM_MODE_CONNECTOR_VGA          1
@@ -155,6 +157,7 @@ struct drm_mode_get_encoder {
 #define DRM_MODE_CONNECTOR_DisplayPort  10
 #define DRM_MODE_CONNECTOR_HDMIA        11
 #define DRM_MODE_CONNECTOR_HDMIB        12
+#define DRM_MODE_CONNECTOR_TV           13
 struct drm_mode_get_connector {
diff --git a/include/drm/drm_sysfs.h b/include/drm/drm_sysfs.h
new file mode 100644
index 000000000000..1d8e033fde67
--- /dev/null
+++ b/include/drm/drm_sysfs.h
@@ -0,0 +1,12 @@
+#ifndef _DRM_SYSFS_H_
+#define _DRM_SYSFS_H_
+/**
+ * This minimalistic include file is intended for users (read TTM) that
+ * don't want to include the full drmP.h file.
+ */
+extern int drm_class_device_register(struct device *dev);
+extern void drm_class_device_unregister(struct device *dev);
+#endif
diff --git a/include/drm/radeon_drm.h b/include/drm/radeon_drm.h
index 2ba61e18fc8b..3b9932ab1756 100644
--- a/include/drm/radeon_drm.h
+++ b/include/drm/radeon_drm.h
@@ -802,11 +802,12 @@ struct drm_radeon_gem_create {
        uint32_t        flags;
 };
-#define RADEON_TILING_MACRO 0x1
+#define RADEON_TILING_MACRO       0x1
-#define RADEON_TILING_MICRO 0x2
+#define RADEON_TILING_MICRO       0x2
-#define RADEON_TILING_SWAP  0x4
+#define RADEON_TILING_SWAP_16BIT  0x4
-#define RADEON_TILING_SURFACE  0x8 /* this object requires a surface
+#define RADEON_TILING_SWAP_32BIT  0x8
-                                    * when mapped - i.e. front buffer */
+#define RADEON_TILING_SURFACE     0x10 /* this object requires a surface
+                                        * when mapped - i.e. front buffer */
 struct drm_radeon_gem_set_tiling {
        uint32_t        handle;
@@ -899,6 +900,7 @@ struct drm_radeon_cs {
 #define RADEON_INFO_DEVICE_ID           0x00
 #define RADEON_INFO_NUM_GB_PIPES        0x01
 #define RADEON_INFO_NUM_Z_PIPES         0x02
+#define RADEON_INFO_ACCEL_WORKING       0x03
 struct drm_radeon_info {
        uint32_t                request;
diff --git a/include/drm/ttm/ttm_bo_api.h b/include/drm/ttm/ttm_bo_api.h
index cd22ab4b495c..491146170522 100644
--- a/include/drm/ttm/ttm_bo_api.h
+++ b/include/drm/ttm/ttm_bo_api.h
@@ -155,6 +155,7 @@ struct ttm_buffer_object {
         * Members constant at init.
         */
+        struct ttm_bo_global *glob;
        struct ttm_bo_device *bdev;
        unsigned long buffer_start;
        enum ttm_bo_type type;
@@ -245,14 +246,15 @@ struct ttm_buffer_object {
 * premapped region.
 */
+#define TTM_BO_MAP_IOMEM_MASK 0x80
 struct ttm_bo_kmap_obj {
        void *virtual;
        struct page *page;
        enum {
-                ttm_bo_map_iomap,
+                ttm_bo_map_iomap        = 1 | TTM_BO_MAP_IOMEM_MASK,
-                ttm_bo_map_vmap,
+                ttm_bo_map_vmap         = 2,
-                ttm_bo_map_kmap,
+                ttm_bo_map_kmap         = 3,
-                ttm_bo_map_premapped,
+                ttm_bo_map_premapped    = 4 | TTM_BO_MAP_IOMEM_MASK,
        } bo_kmap_type;
 };
@@ -522,8 +524,7 @@ extern int ttm_bo_evict_mm(struct ttm_bo_device *bdev, unsigned mem_type);
 static inline void *ttm_kmap_obj_virtual(struct ttm_bo_kmap_obj *map,
                                         bool *is_iomem)
 {
-        *is_iomem = (map->bo_kmap_type == ttm_bo_map_iomap ||
+        *is_iomem = !!(map->bo_kmap_type & TTM_BO_MAP_IOMEM_MASK);
-                     map->bo_kmap_type == ttm_bo_map_premapped);
        return map->virtual;
 }
diff --git a/include/drm/ttm/ttm_bo_driver.h b/include/drm/ttm/ttm_bo_driver.h
index a68829db381a..e8cd6d20aed2 100644
--- a/include/drm/ttm/ttm_bo_driver.h
+++ b/include/drm/ttm/ttm_bo_driver.h
@@ -32,6 +32,7 @@
 #include "ttm/ttm_bo_api.h"
 #include "ttm/ttm_memory.h"
+#include "ttm/ttm_module.h"
 #include "drm_mm.h"
 #include "linux/workqueue.h"
 #include "linux/fs.h"
@@ -161,7 +162,7 @@ struct ttm_tt {
        long last_lomem_page;
        uint32_t page_flags;
        unsigned long num_pages;
-        struct ttm_bo_device *bdev;
+        struct ttm_bo_global *glob;
        struct ttm_backend *be;
        struct task_struct *tsk;
        unsigned long start;
@@ -364,24 +365,73 @@ struct ttm_bo_driver {
        void (*fault_reserve_notify)(struct ttm_buffer_object *bo);
 };
-#define TTM_NUM_MEM_TYPES 8
+/**
+ * struct ttm_bo_global_ref - Argument to initialize a struct ttm_bo_global.
+ */
+struct ttm_bo_global_ref {
+        struct ttm_global_reference ref;
+        struct ttm_mem_global *mem_glob;
+};
-#define TTM_BO_PRIV_FLAG_MOVING  0      /* Buffer object is moving and needs
-                                           idling before CPU mapping */
-#define TTM_BO_PRIV_FLAG_MAX 1
 /**
- * struct ttm_bo_device - Buffer object driver device-specific data.
+ * struct ttm_bo_global - Buffer object driver global data.
 *
 * @mem_glob: Pointer to a struct ttm_mem_global object for accounting.
- * @driver: Pointer to a struct ttm_bo_driver struct setup by the driver.
- * @count: Current number of buffer object.
- * @pages: Current number of pinned pages.
 * @dummy_read_page: Pointer to a dummy page used for mapping requests
 * of unpopulated pages.
- * @shrink: A shrink callback object used for buffre object swap.
+ * @shrink: A shrink callback object used for buffer object swap.
 * @ttm_bo_extra_size: Extra size (sizeof(struct ttm_buffer_object) excluded)
 * used by a buffer object. This is excluding page arrays and backing pages.
 * @ttm_bo_size: This is @ttm_bo_extra_size + sizeof(struct ttm_buffer_object).
+ * @device_list_mutex: Mutex protecting the device list.
+ * This mutex is held while traversing the device list for pm options.
+ * @lru_lock: Spinlock protecting the bo subsystem lru lists.
+ * @device_list: List of buffer object devices.
+ * @swap_lru: Lru list of buffer objects used for swapping.
+ */
+struct ttm_bo_global {
+        /**
+         * Constant after init.
+         */
+        struct kobject kobj;
+        struct ttm_mem_global *mem_glob;
+        struct page *dummy_read_page;
+        struct ttm_mem_shrink shrink;
+        size_t ttm_bo_extra_size;
+        size_t ttm_bo_size;
+        struct mutex device_list_mutex;
+        spinlock_t lru_lock;
+        /**
+         * Protected by device_list_mutex.
+         */
+        struct list_head device_list;
+        /**
+         * Protected by the lru_lock.
+         */
+        struct list_head swap_lru;
+        /**
+         * Internal protection.
+         */
+        atomic_t bo_count;
+};
+#define TTM_NUM_MEM_TYPES 8
+#define TTM_BO_PRIV_FLAG_MOVING  0      /* Buffer object is moving and needs
+                                           idling before CPU mapping */
+#define TTM_BO_PRIV_FLAG_MAX 1
+/**
+ * struct ttm_bo_device - Buffer object driver device-specific data.
+ *
+ * @driver: Pointer to a struct ttm_bo_driver struct setup by the driver.
 * @man: An array of mem_type_managers.
 * @addr_space_mm: Range manager for the device address space.
 * lru_lock: Spinlock that protects the buffer+device lru lists and
@@ -399,32 +449,21 @@ struct ttm_bo_device {
        /*
         * Constant after bo device init / atomic.
         */
+        struct list_head device_list;
-        struct ttm_mem_global *mem_glob;
+        struct ttm_bo_global *glob;
        struct ttm_bo_driver *driver;
-        struct page *dummy_read_page;
-        struct ttm_mem_shrink shrink;
-        size_t ttm_bo_extra_size;
-        size_t ttm_bo_size;
        rwlock_t vm_lock;
+        struct ttm_mem_type_manager man[TTM_NUM_MEM_TYPES];
        /*
         * Protected by the vm lock.
         */
-        struct ttm_mem_type_manager man[TTM_NUM_MEM_TYPES];
        struct rb_root addr_space_rb;
        struct drm_mm addr_space_mm;
        /*
-         * Might want to change this to one lock per manager.
+         * Protected by the global:lru lock.
-         */
-        spinlock_t lru_lock;
-        /*
-         * Protected by the lru lock.
         */
        struct list_head ddestroy;
-        struct list_head swap_lru;
        /*
         * Protected by load / firstopen / lastclose /unload sync.
@@ -640,6 +679,9 @@ extern int ttm_bo_pci_offset(struct ttm_bo_device *bdev,
                             unsigned long *bus_offset,
                             unsigned long *bus_size);
+extern void ttm_bo_global_release(struct ttm_global_reference *ref);
+extern int ttm_bo_global_init(struct ttm_global_reference *ref);
 extern int ttm_bo_device_release(struct ttm_bo_device *bdev);
 /**
@@ -657,7 +699,7 @@ extern int ttm_bo_device_release(struct ttm_bo_device *bdev);
 * !0: Failure.
 */
 extern int ttm_bo_device_init(struct ttm_bo_device *bdev,
-                              struct ttm_mem_global *mem_glob,
+                              struct ttm_bo_global *glob,
                              struct ttm_bo_driver *driver,
                              uint64_t file_page_offset, bool need_dma32);
diff --git a/include/drm/ttm/ttm_memory.h b/include/drm/ttm/ttm_memory.h
index d8b8f042c4f1..6983a7cf4da4 100644
--- a/include/drm/ttm/ttm_memory.h
+++ b/include/drm/ttm/ttm_memory.h
@@ -32,6 +32,7 @@
 #include <linux/spinlock.h>
 #include <linux/wait.h>
 #include <linux/errno.h>
+#include <linux/kobject.h>
 /**
 * struct ttm_mem_shrink - callback to shrink TTM memory usage.
@@ -60,34 +61,33 @@ struct ttm_mem_shrink {
 * @queue: Wait queue for processes suspended waiting for memory.
 * @lock: Lock to protect the @shrink - and the memory accounting members,
 * that is, essentially the whole structure with some exceptions.
- * @emer_memory: Lowmem memory limit available for root.
+ * @zones: Array of pointers to accounting zones.
- * @max_memory: Lowmem memory limit available for non-root.
+ * @num_zones: Number of populated entries in the @zones array.
- * @swap_limit: Lowmem memory limit where the shrink workqueue kicks in.
+ * @zone_kernel: Pointer to the kernel zone.
- * @used_memory: Currently used lowmem memory.
+ * @zone_highmem: Pointer to the highmem zone if there is one.
- * @used_total_memory: Currently used total (lowmem + highmem) memory.
+ * @zone_dma32: Pointer to the dma32 zone if there is one.
- * @total_memory_swap_limit: Total memory limit where the shrink workqueue
- * kicks in.
- * @max_total_memory: Total memory available to non-root processes.
- * @emer_total_memory: Total memory available to root processes.
 *
 * Note that this structure is not per device. It should be global for all
 * graphics devices.
 */
+#define TTM_MEM_MAX_ZONES 2
+struct ttm_mem_zone;
 struct ttm_mem_global {
+        struct kobject kobj;
        struct ttm_mem_shrink *shrink;
        struct workqueue_struct *swap_queue;
        struct work_struct work;
        wait_queue_head_t queue;
        spinlock_t lock;
-        uint64_t emer_memory;
+        struct ttm_mem_zone *zones[TTM_MEM_MAX_ZONES];
-        uint64_t max_memory;
+        unsigned int num_zones;
-        uint64_t swap_limit;
+        struct ttm_mem_zone *zone_kernel;
-        uint64_t used_memory;
+#ifdef CONFIG_HIGHMEM
-        uint64_t used_total_memory;
+        struct ttm_mem_zone *zone_highmem;
-        uint64_t total_memory_swap_limit;
+#else
-        uint64_t max_total_memory;
+        struct ttm_mem_zone *zone_dma32;
-        uint64_t emer_total_memory;
+#endif
 };
 /**
@@ -146,8 +146,13 @@ static inline void ttm_mem_unregister_shrink(struct ttm_mem_global *glob,
 extern int ttm_mem_global_init(struct ttm_mem_global *glob);
 extern void ttm_mem_global_release(struct ttm_mem_global *glob);
 extern int ttm_mem_global_alloc(struct ttm_mem_global *glob, uint64_t memory,
-                                bool no_wait, bool interruptible, bool himem);
+                                bool no_wait, bool interruptible);
 extern void ttm_mem_global_free(struct ttm_mem_global *glob,
-                                uint64_t amount, bool himem);
+                                uint64_t amount);
+extern int ttm_mem_global_alloc_page(struct ttm_mem_global *glob,
+                                     struct page *page,
+                                     bool no_wait, bool interruptible);
+extern void ttm_mem_global_free_page(struct ttm_mem_global *glob,
+                                     struct page *page);
 extern size_t ttm_round_pot(size_t size);
 #endif
diff --git a/include/drm/ttm/ttm_module.h b/include/drm/ttm/ttm_module.h
index d1d433834e4f..cf416aee19af 100644
--- a/include/drm/ttm/ttm_module.h
+++ b/include/drm/ttm/ttm_module.h
@@ -32,6 +32,7 @@
 #define _TTM_MODULE_H_
 #include <linux/kernel.h>
+struct kobject;
 #define TTM_PFX "[TTM] "
@@ -54,5 +55,6 @@ extern void ttm_global_init(void);
 extern void ttm_global_release(void);
 extern int ttm_global_item_ref(struct ttm_global_reference *ref);
 extern void ttm_global_item_unref(struct ttm_global_reference *ref);
+extern struct kobject *ttm_get_kobj(void);
 #endif /* _TTM_MODULE_H_ */
diff --git a/include/linux/aio.h b/include/linux/aio.h
index 47f7d932a01d..aea219d7d8d1 100644
--- a/include/linux/aio.h
+++ b/include/linux/aio.h
@@ -225,8 +225,6 @@ static inline void exit_aio(struct mm_struct *mm) { }
 #define io_wait_to_kiocb(wait) container_of(wait, struct kiocb, ki_wait)
-#include <linux/aio_abi.h>
 static inline struct kiocb *list_kiocb(struct list_head *h)
 {
        return list_entry(h, struct kiocb, ki_list);
diff --git a/include/linux/cyclades.h b/include/linux/cyclades.h
index 1fbdea4f08eb..a5049eaf782d 100644
--- a/include/linux/cyclades.h
+++ b/include/linux/cyclades.h
@@ -499,6 +499,7 @@ struct cyclades_card {
                void __iomem *p9050;
                struct RUNTIME_9060 __iomem *p9060;
        } ctl_addr;
+        struct BOARD_CTRL __iomem *board_ctrl;  /* cyz specific */
        int irq;
        unsigned int num_chips; /* 0 if card absent, -1 if Z/PCI, else Y */
        unsigned int first_line;        /* minor number of first channel on card */
@@ -541,6 +542,15 @@ struct cyclades_port {
        int                     magic;
        struct tty_port         port;
        struct cyclades_card    *card;
+        union {
+                struct {
+                        void __iomem *base_addr;
+                } cyy;
+                struct {
+                        struct CH_CTRL __iomem  *ch_ctrl;
+                        struct BUF_CTRL __iomem *buf_ctrl;
+                } cyz;
+        } u;
        int                     line;
        int                     flags;          /* defined in tty.h */
        int                     type;           /* UART type */
@@ -568,7 +578,6 @@ struct cyclades_port {
        struct cyclades_idle_stats      idle_stats;
        struct cyclades_icount  icount;
        struct completion       shutdown_wait;
-        wait_queue_head_t       delta_msr_wait;
        int throttle;
 };
diff --git a/include/linux/device.h b/include/linux/device.h
index 847b763e40e9..aca31bf7d8ed 100644
--- a/include/linux/device.h
+++ b/include/linux/device.h
@@ -193,7 +193,7 @@ struct class {
        struct kobject                  *dev_kobj;
        int (*dev_uevent)(struct device *dev, struct kobj_uevent_env *env);
-        char *(*nodename)(struct device *dev);
+        char *(*devnode)(struct device *dev, mode_t *mode);
        void (*class_release)(struct class *class);
        void (*dev_release)(struct device *dev);
@@ -298,7 +298,7 @@ struct device_type {
        const char *name;
        const struct attribute_group **groups;
        int (*uevent)(struct device *dev, struct kobj_uevent_env *env);
-        char *(*nodename)(struct device *dev);
+        char *(*devnode)(struct device *dev, mode_t *mode);
        void (*release)(struct device *dev);
        const struct dev_pm_ops *pm;
@@ -487,7 +487,8 @@ extern struct device *device_find_child(struct device *dev, void *data,
 extern int device_rename(struct device *dev, char *new_name);
 extern int device_move(struct device *dev, struct device *new_parent,
                       enum dpm_order dpm_order);
-extern const char *device_get_nodename(struct device *dev, const char **tmp);
+extern const char *device_get_devnode(struct device *dev,
+                                      mode_t *mode, const char **tmp);
 extern void *dev_get_drvdata(const struct device *dev);
 extern void dev_set_drvdata(struct device *dev, void *data);
diff --git a/include/linux/ftrace.h b/include/linux/ftrace.h
index dc3b1328aaeb..3c0924a18daf 100644
--- a/include/linux/ftrace.h
+++ b/include/linux/ftrace.h
@@ -446,7 +446,6 @@ static inline void unpause_graph_tracing(void) { }
 #endif /* CONFIG_FUNCTION_GRAPH_TRACER */
 #ifdef CONFIG_TRACING
-#include <linux/sched.h>
 /* flags for current->trace */
 enum {
diff --git a/include/linux/genhd.h b/include/linux/genhd.h
index 44263cb27121..109d179adb93 100644
--- a/include/linux/genhd.h
+++ b/include/linux/genhd.h
@@ -142,7 +142,7 @@ struct gendisk {
                                         * disks that can't be partitioned. */
        char disk_name[DISK_NAME_LEN];  /* name of major driver */
-        char *(*nodename)(struct gendisk *gd);
+        char *(*devnode)(struct gendisk *gd, mode_t *mode);
        /* Array of pointers to partitions indexed by partno.
         * Protected with matching bdev lock but stat and other
         * non-critical accesses use RCU.  Always access through
diff --git a/include/linux/hayesesp.h b/include/linux/hayesesp.h
index 940aeb51d53f..92b08cfe4a75 100644
--- a/include/linux/hayesesp.h
+++ b/include/linux/hayesesp.h
@@ -96,7 +96,6 @@ struct esp_struct {
        int                     xmit_head;
        int                     xmit_tail;
        int                     xmit_cnt;
-        wait_queue_head_t       delta_msr_wait;
        wait_queue_head_t       break_wait;
        struct async_icount     icount; /* kernel counters for the 4 input interrupts */
        struct hayes_esp_config config; /* port configuration */
diff --git a/include/linux/kfifo.h b/include/linux/kfifo.h
index 29f62e1733ff..ad6bdf5a5970 100644
--- a/include/linux/kfifo.h
+++ b/include/linux/kfifo.h
@@ -38,7 +38,7 @@ extern struct kfifo *kfifo_alloc(unsigned int size, gfp_t gfp_mask,
                                 spinlock_t *lock);
 extern void kfifo_free(struct kfifo *fifo);
 extern unsigned int __kfifo_put(struct kfifo *fifo,
-                                unsigned char *buffer, unsigned int len);
+                                const unsigned char *buffer, unsigned int len);
 extern unsigned int __kfifo_get(struct kfifo *fifo,
                                unsigned char *buffer, unsigned int len);
@@ -77,7 +77,7 @@ static inline void kfifo_reset(struct kfifo *fifo)
 * bytes copied.
 */
 static inline unsigned int kfifo_put(struct kfifo *fifo,
-                                     unsigned char *buffer, unsigned int len)
+                                const unsigned char *buffer, unsigned int len)
 {
        unsigned long flags;
        unsigned int ret;
diff --git a/include/linux/miscdevice.h b/include/linux/miscdevice.h
index 052117744629..adaf3c15e449 100644
--- a/include/linux/miscdevice.h
+++ b/include/linux/miscdevice.h
@@ -41,7 +41,8 @@ struct miscdevice  {
        struct list_head list;
        struct device *parent;
        struct device *this_device;
-        const char *devnode;
+        const char *nodename;
+        mode_t mode;
 };
 extern int misc_register(struct miscdevice * misc);
diff --git a/include/linux/page_cgroup.h b/include/linux/page_cgroup.h
index 13f126c89ae8..ada779f24178 100644
--- a/include/linux/page_cgroup.h
+++ b/include/linux/page_cgroup.h
@@ -105,14 +105,14 @@ static inline void __init page_cgroup_init_flatmem(void)
 #endif
-#ifdef CONFIG_CGROUP_MEM_RES_CTLR_SWAP
 #include <linux/swap.h>
+#ifdef CONFIG_CGROUP_MEM_RES_CTLR_SWAP
 extern unsigned short swap_cgroup_record(swp_entry_t ent, unsigned short id);
 extern unsigned short lookup_swap_cgroup(swp_entry_t ent);
 extern int swap_cgroup_swapon(int type, unsigned long max_pages);
 extern void swap_cgroup_swapoff(int type);
 #else
-#include <linux/swap.h>
 static inline
 unsigned short swap_cgroup_record(swp_entry_t ent, unsigned short id)
diff --git a/include/linux/perf_counter.h b/include/linux/perf_counter.h
index 972f90d7a32f..bd341007c4fc 100644
--- a/include/linux/perf_counter.h
+++ b/include/linux/perf_counter.h
@@ -199,10 +199,14 @@ struct perf_counter_attr {
                                inherit_stat   :  1, /* per task counts       */
                                enable_on_exec :  1, /* next exec enables     */
                                task           :  1, /* trace fork/exit       */
+                                watermark      :  1, /* wakeup_watermark      */
-                                __reserved_1   : 50;
+                                __reserved_1   : 49;
-        __u32                   wakeup_events;  /* wakeup every n events */
+        union {
+                __u32           wakeup_events;    /* wakeup every n events */
+                __u32           wakeup_watermark; /* bytes before wakeup   */
+        };
        __u32                   __reserved_2;
        __u64                   __reserved_3;
@@ -332,6 +336,7 @@ enum perf_event_type {
         *      struct perf_event_header        header;
         *      u32                             pid, ppid;
         *      u32                             tid, ptid;
+         *      u64                             time;
         * };
         */
        PERF_EVENT_EXIT                 = 4,
@@ -352,6 +357,7 @@ enum perf_event_type {
         *      struct perf_event_header        header;
         *      u32                             pid, ppid;
         *      u32                             tid, ptid;
+         *      { u64                           time;     } && PERF_SAMPLE_TIME
         * };
         */
        PERF_EVENT_FORK                 = 7,
@@ -521,6 +527,8 @@ struct perf_mmap_data {
        atomic_t                        wakeup;         /* needs a wakeup    */
        atomic_t                        lost;           /* nr records lost   */
+        long                            watermark;      /* wakeup watermark  */
        struct perf_counter_mmap_page   *user_page;
        void                            *data_pages[0];
 };
@@ -685,6 +693,17 @@ struct perf_cpu_context {
        int                             recursion[4];
 };
+struct perf_output_handle {
+        struct perf_counter     *counter;
+        struct perf_mmap_data   *data;
+        unsigned long           head;
+        unsigned long           offset;
+        int                     nmi;
+        int                     sample;
+        int                     locked;
+        unsigned long           flags;
+};
 #ifdef CONFIG_PERF_COUNTERS
 /*
@@ -716,16 +735,38 @@ extern int hw_perf_group_sched_in(struct perf_counter *group_leader,
 extern void perf_counter_update_userpage(struct perf_counter *counter);
 struct perf_sample_data {
-        struct pt_regs                  *regs;
+        u64                             type;
+        u64                             ip;
+        struct {
+                u32     pid;
+                u32     tid;
+        }                               tid_entry;
+        u64                             time;
        u64                             addr;
+        u64                             id;
+        u64                             stream_id;
+        struct {
+                u32     cpu;
+                u32     reserved;
+        }                               cpu_entry;
        u64                             period;
+        struct perf_callchain_entry     *callchain;
        struct perf_raw_record          *raw;
 };
+extern void perf_output_sample(struct perf_output_handle *handle,
+                               struct perf_event_header *header,
+                               struct perf_sample_data *data,
+                               struct perf_counter *counter);
+extern void perf_prepare_sample(struct perf_event_header *header,
+                                struct perf_sample_data *data,
+                                struct perf_counter *counter,
+                                struct pt_regs *regs);
 extern int perf_counter_overflow(struct perf_counter *counter, int nmi,
-                                 struct perf_sample_data *data);
+                                 struct perf_sample_data *data,
-extern void perf_counter_output(struct perf_counter *counter, int nmi,
+                                 struct pt_regs *regs);
-                                struct perf_sample_data *data);
 /*
 * Return 1 for a software counter, 0 for a hardware counter
@@ -775,6 +816,12 @@ extern void perf_tpcounter_event(int event_id, u64 addr, u64 count,
 #define perf_instruction_pointer(regs)  instruction_pointer(regs)
 #endif
+extern int perf_output_begin(struct perf_output_handle *handle,
+                             struct perf_counter *counter, unsigned int size,
+                             int nmi, int sample);
+extern void perf_output_end(struct perf_output_handle *handle);
+extern void perf_output_copy(struct perf_output_handle *handle,
+                             const void *buf, unsigned int len);
 #else
 static inline void
 perf_counter_task_sched_in(struct task_struct *task, int cpu)           { }
@@ -801,7 +848,28 @@ static inline void perf_counter_mmap(struct vm_area_struct *vma)	{ }
 static inline void perf_counter_comm(struct task_struct *tsk)           { }
 static inline void perf_counter_fork(struct task_struct *tsk)           { }
 static inline void perf_counter_init(void)                              { }
+static inline int
+perf_output_begin(struct perf_output_handle *handle, struct perf_counter *c,
+                  unsigned int size, int nmi, int sample)               { }
+static inline void perf_output_end(struct perf_output_handle *handle)   { }
+static inline void
+perf_output_copy(struct perf_output_handle *handle,
+                 const void *buf, unsigned int len)                     { }
+static inline void
+perf_output_sample(struct perf_output_handle *handle,
+                   struct perf_event_header *header,
+                   struct perf_sample_data *data,
+                   struct perf_counter *counter)                        { }
+static inline void
+perf_prepare_sample(struct perf_event_header *header,
+                    struct perf_sample_data *data,
+                    struct perf_counter *counter,
+                    struct pt_regs *regs)                               { }
 #endif
+#define perf_output_put(handle, x) \
+        perf_output_copy((handle), &(x), sizeof(x))
 #endif /* __KERNEL__ */
 #endif /* _LINUX_PERF_COUNTER_H */
diff --git a/include/linux/serial.h b/include/linux/serial.h
index e5bb75a63802..c8613c3ff9d3 100644
--- a/include/linux/serial.h
+++ b/include/linux/serial.h
@@ -122,6 +122,7 @@ struct serial_uart_config {
 /* Internal flags used only by kernel */
 #define ASYNCB_INITIALIZED      31 /* Serial port was initialized */
+#define ASYNCB_SUSPENDED        30 /* Serial port is suspended */
 #define ASYNCB_NORMAL_ACTIVE    29 /* Normal device is active */
 #define ASYNCB_BOOT_AUTOCONF    28 /* Autoconfigure port on bootup */
 #define ASYNCB_CLOSING          27 /* Serial port is closing */
@@ -133,6 +134,7 @@ struct serial_uart_config {
 #define ASYNCB_FIRST_KERNEL     22
 #define ASYNC_HUP_NOTIFY        (1U << ASYNCB_HUP_NOTIFY)
+#define ASYNC_SUSPENDED         (1U << ASYNCB_SUSPENDED)
 #define ASYNC_FOURPORT          (1U << ASYNCB_FOURPORT)
 #define ASYNC_SAK               (1U << ASYNCB_SAK)
 #define ASYNC_SPLIT_TERMIOS     (1U << ASYNCB_SPLIT_TERMIOS)
diff --git a/include/linux/serial_8250.h b/include/linux/serial_8250.h
index d4d2a78ad43e..fb46aba11fb5 100644
--- a/include/linux/serial_8250.h
+++ b/include/linux/serial_8250.h
@@ -22,6 +22,7 @@ struct plat_serial8250_port {
        void __iomem    *membase;       /* ioremap cookie or NULL */
        resource_size_t mapbase;        /* resource base */
        unsigned int    irq;            /* interrupt number */
+        unsigned long   irqflags;       /* request_irq flags */
        unsigned int    uartclk;        /* UART clock rate */
        void            *private_data;
        unsigned char   regshift;       /* register shift */
diff --git a/include/linux/serial_core.h b/include/linux/serial_core.h
index 23d2fb051f97..d58e460844dd 100644
--- a/include/linux/serial_core.h
+++ b/include/linux/serial_core.h
@@ -20,6 +20,8 @@
 #ifndef LINUX_SERIAL_CORE_H
 #define LINUX_SERIAL_CORE_H
+#include <linux/serial.h>
 /*
 * The type definitions.  These are from Ted Ts'o's serial.h
 */
@@ -186,7 +188,6 @@
 #include <linux/sysrq.h>
 struct uart_port;
-struct uart_info;
 struct serial_struct;
 struct device;
@@ -265,6 +266,7 @@ struct uart_port {
        unsigned int            (*serial_in)(struct uart_port *, int);
        void                    (*serial_out)(struct uart_port *, int, int);
        unsigned int            irq;                    /* irq number */
+        unsigned long           irqflags;               /* irq flags  */
        unsigned int            uartclk;                /* base uart clock */
        unsigned int            fifosize;               /* tx fifo size */
        unsigned char           x_char;                 /* xon/xoff char */
@@ -283,7 +285,7 @@ struct uart_port {
        unsigned int            read_status_mask;       /* driver specific */
        unsigned int            ignore_status_mask;     /* driver specific */
-        struct uart_info        *info;                  /* pointer to parent info */
+        struct uart_state       *state;                 /* pointer to parent state */
        struct uart_icount      icount;                 /* statistics */
        struct console          *cons;                  /* struct console, if any */
@@ -335,52 +337,16 @@ struct uart_port {
 };
 /*
- * This is the state information which is only valid when the port
- * is open; it may be cleared the core driver once the device has
- * been closed.  Either the low level driver or the core can modify
- * stuff here.
- */
-typedef unsigned int __bitwise__ uif_t;
-struct uart_info {
-        struct tty_port         port;
-        struct circ_buf         xmit;
-        uif_t                   flags;
-/*
- * Definitions for info->flags.  These are _private_ to serial_core, and
- * are specific to this structure.  They may be queried by low level drivers.
- *
- * FIXME: use the ASY_ definitions
- */
-#define UIF_CHECK_CD            ((__force uif_t) (1 << 25))
-#define UIF_CTS_FLOW            ((__force uif_t) (1 << 26))
-#define UIF_NORMAL_ACTIVE       ((__force uif_t) (1 << 29))
-#define UIF_INITIALIZED         ((__force uif_t) (1 << 31))
-#define UIF_SUSPENDED           ((__force uif_t) (1 << 30))
-        struct tasklet_struct   tlet;
-        wait_queue_head_t       delta_msr_wait;
-};
-/*
 * This is the state information which is persistent across opens.
- * The low level driver must not to touch any elements contained
- * within.
 */
 struct uart_state {
-        unsigned int            close_delay;            /* msec */
+        struct tty_port         port;
-        unsigned int            closing_wait;           /* msec */
-#define USF_CLOSING_WAIT_INF    (0)
-#define USF_CLOSING_WAIT_NONE   (~0U)
-        int                     count;
        int                     pm_state;
-        struct uart_info        info;
+        struct circ_buf         xmit;
-        struct uart_port        *port;
-        struct mutex            mutex;
+        struct tasklet_struct   tlet;
+        struct uart_port        *uart_port;
 };
 #define UART_XMIT_SIZE  PAGE_SIZE
@@ -461,7 +427,7 @@ int uart_resume_port(struct uart_driver *reg, struct uart_port *port);
 static inline int uart_tx_stopped(struct uart_port *port)
 {
-        struct tty_struct *tty = port->info->port.tty;
+        struct tty_struct *tty = port->state->port.tty;
        if(tty->stopped || tty->hw_stopped)
                return 1;
        return 0;
@@ -476,7 +442,7 @@ uart_handle_sysrq_char(struct uart_port *port, unsigned int ch)
 #ifdef SUPPORT_SYSRQ
        if (port->sysrq) {
                if (ch && time_before(jiffies, port->sysrq)) {
-                        handle_sysrq(ch, port->info->port.tty);
+                        handle_sysrq(ch, port->state->port.tty);
                        port->sysrq = 0;
                        return 1;
                }
@@ -494,7 +460,7 @@ uart_handle_sysrq_char(struct uart_port *port, unsigned int ch)
 */
 static inline int uart_handle_break(struct uart_port *port)
 {
-        struct uart_info *info = port->info;
+        struct uart_state *state = port->state;
 #ifdef SUPPORT_SYSRQ
        if (port->cons && port->cons->index == port->line) {
                if (!port->sysrq) {
@@ -505,7 +471,7 @@ static inline int uart_handle_break(struct uart_port *port)
        }
 #endif
        if (port->flags & UPF_SAK)
-                do_SAK(info->port.tty);
+                do_SAK(state->port.tty);
        return 0;
 }
@@ -515,22 +481,23 @@ static inline int uart_handle_break(struct uart_port *port)
 *      @status: new carrier detect status, nonzero if active
 */
 static inline void
-uart_handle_dcd_change(struct uart_port *port, unsigned int status)
+uart_handle_dcd_change(struct uart_port *uport, unsigned int status)
 {
-        struct uart_info *info = port->info;
+        struct uart_state *state = uport->state;
+        struct tty_port *port = &state->port;
-        port->icount.dcd++;
+        uport->icount.dcd++;
 #ifdef CONFIG_HARD_PPS
-        if ((port->flags & UPF_HARDPPS_CD) && status)
+        if ((uport->flags & UPF_HARDPPS_CD) && status)
                hardpps();
 #endif
-        if (info->flags & UIF_CHECK_CD) {
+        if (port->flags & ASYNC_CHECK_CD) {
                if (status)
-                        wake_up_interruptible(&info->port.open_wait);
+                        wake_up_interruptible(&port->open_wait);
-                else if (info->port.tty)
+                else if (port->tty)
-                        tty_hangup(info->port.tty);
+                        tty_hangup(port->tty);
        }
 }
@@ -540,24 +507,24 @@ uart_handle_dcd_change(struct uart_port *port, unsigned int status)
 *      @status: new clear to send status, nonzero if active
 */
 static inline void
-uart_handle_cts_change(struct uart_port *port, unsigned int status)
+uart_handle_cts_change(struct uart_port *uport, unsigned int status)
 {
-        struct uart_info *info = port->info;
+        struct tty_port *port = &uport->state->port;
-        struct tty_struct *tty = info->port.tty;
+        struct tty_struct *tty = port->tty;
-        port->icount.cts++;
+        uport->icount.cts++;
-        if (info->flags & UIF_CTS_FLOW) {
+        if (port->flags & ASYNC_CTS_FLOW) {
                if (tty->hw_stopped) {
                        if (status) {
                                tty->hw_stopped = 0;
-                                port->ops->start_tx(port);
+                                uport->ops->start_tx(uport);
-                                uart_write_wakeup(port);
+                                uart_write_wakeup(uport);
                        }
                } else {
                        if (!status) {
                                tty->hw_stopped = 1;
-                                port->ops->stop_tx(port);
+                                uport->ops->stop_tx(uport);
                        }
                }
        }
@@ -569,7 +536,7 @@ static inline void
 uart_insert_char(struct uart_port *port, unsigned int status,
                 unsigned int overrun, unsigned int ch, unsigned int flag)
 {
-        struct tty_struct *tty = port->info->port.tty;
+        struct tty_struct *tty = port->state->port.tty;
        if ((status & port->ignore_status_mask & ~overrun) == 0)
                tty_insert_flip_char(tty, ch, flag);
diff --git a/include/linux/tty.h b/include/linux/tty.h
index a916a318004e..f0f43d08d8b8 100644
--- a/include/linux/tty.h
+++ b/include/linux/tty.h
@@ -187,7 +187,12 @@ struct tty_port;
 struct tty_port_operations {
        /* Return 1 if the carrier is raised */
        int (*carrier_raised)(struct tty_port *port);
+        /* Control the DTR line */
        void (*dtr_rts)(struct tty_port *port, int raise);
+        /* Called when the last close completes or a hangup finishes
+           IFF the port was initialized. Do not use to free resources */
+        void (*shutdown)(struct tty_port *port);
+        void (*drop)(struct tty_port *port);
 };
        
 struct tty_port {
@@ -198,11 +203,12 @@ struct tty_port {
        int                     count;          /* Usage count */
        wait_queue_head_t       open_wait;      /* Open waiters */
        wait_queue_head_t       close_wait;     /* Close waiters */
+        wait_queue_head_t       delta_msr_wait; /* Modem status change */
        unsigned long           flags;          /* TTY flags ASY_*/
        struct mutex            mutex;          /* Locking */
        unsigned char           *xmit_buf;      /* Optional buffer */
-        int                     close_delay;    /* Close port delay */
+        unsigned int            close_delay;    /* Close port delay */
-        int                     closing_wait;   /* Delay for output */
+        unsigned int            closing_wait;   /* Delay for output */
        int                     drain_delay;    /* Set to zero if no pure time
                                                   based drain is needed else
                                                   set to size of fifo */
@@ -459,6 +465,12 @@ extern int tty_port_block_til_ready(struct tty_port *port,
 extern int tty_port_close_start(struct tty_port *port,
                                struct tty_struct *tty, struct file *filp);
 extern void tty_port_close_end(struct tty_port *port, struct tty_struct *tty);
+extern void tty_port_close(struct tty_port *port,
+                                struct tty_struct *tty, struct file *filp);
+extern inline int tty_port_users(struct tty_port *port)
+{
+        return port->count + port->blocked_open;
+}
 extern int tty_register_ldisc(int disc, struct tty_ldisc_ops *new_ldisc);
 extern int tty_unregister_ldisc(int disc);
@@ -524,5 +536,8 @@ extern int pcxe_open(struct tty_struct *tty, struct file *filp);
 extern int vt_ioctl(struct tty_struct *tty, struct file *file,
                    unsigned int cmd, unsigned long arg);
+extern long vt_compat_ioctl(struct tty_struct *tty, struct file * file,
+                     unsigned int cmd, unsigned long arg);
 #endif /* __KERNEL__ */
 #endif
diff --git a/include/linux/usb.h b/include/linux/usb.h
index b1e3c2fbfe11..a8fe05f224e5 100644
--- a/include/linux/usb.h
+++ b/include/linux/usb.h
@@ -922,7 +922,7 @@ extern struct bus_type usb_bus_type;
 /**
 * struct usb_class_driver - identifies a USB driver that wants to use the USB major number
 * @name: the usb class device name for this driver.  Will show up in sysfs.
- * @nodename: Callback to provide a naming hint for a possible
+ * @devnode: Callback to provide a naming hint for a possible
 *      device node to create.
 * @fops: pointer to the struct file_operations of this driver.
 * @minor_base: the start of the minor range for this driver.
@@ -933,7 +933,7 @@ extern struct bus_type usb_bus_type;
 */
 struct usb_class_driver {
        char *name;
-        char *(*nodename)(struct device *dev);
+        char *(*devnode)(struct device *dev, mode_t *mode);
        const struct file_operations *fops;
        int minor_base;
 };
diff --git a/include/linux/usb/serial.h b/include/linux/usb/serial.h
index 0ec50ba62139..7b85e327af91 100644
--- a/include/linux/usb/serial.h
+++ b/include/linux/usb/serial.h
@@ -238,9 +238,8 @@ struct usb_serial_driver {
        int (*resume)(struct usb_serial *serial);
        /* serial function calls */
-        /* Called by console with tty = NULL and by tty */
+        /* Called by console and by the tty layer */
-        int  (*open)(struct tty_struct *tty,
+        int  (*open)(struct tty_struct *tty, struct usb_serial_port *port);
-                        struct usb_serial_port *port, struct file *filp);
        void (*close)(struct usb_serial_port *port);
        int  (*write)(struct tty_struct *tty, struct usb_serial_port *port,
                        const unsigned char *buf, int count);
@@ -261,6 +260,9 @@ struct usb_serial_driver {
           be an attached tty at this point */
        void (*dtr_rts)(struct usb_serial_port *port, int on);
        int  (*carrier_raised)(struct usb_serial_port *port);
+        /* Called by the usb serial hooks to allow the user to rework the
+           termios state */
+        void (*init_termios)(struct tty_struct *tty);
        /* USB events */
        void (*read_int_callback)(struct urb *urb);
        void (*write_int_callback)(struct urb *urb);
@@ -300,7 +302,7 @@ static inline void usb_serial_console_disconnect(struct usb_serial *serial) {}
 extern struct usb_serial *usb_serial_get_by_index(unsigned int minor);
 extern void usb_serial_put(struct usb_serial *serial);
 extern int usb_serial_generic_open(struct tty_struct *tty,
-                struct usb_serial_port *port, struct file *filp);
+        struct usb_serial_port *port);
 extern int usb_serial_generic_write(struct tty_struct *tty,
        struct usb_serial_port *port, const unsigned char *buf, int count);
 extern void usb_serial_generic_close(struct usb_serial_port *port);
diff --git a/include/linux/vt.h b/include/linux/vt.h
index 02c1c0288770..7afca0d72139 100644
--- a/include/linux/vt.h
+++ b/include/linux/vt.h
@@ -1,17 +1,6 @@
 #ifndef _LINUX_VT_H
 #define _LINUX_VT_H
-#ifdef __KERNEL__
-struct notifier_block;
-struct vt_notifier_param {
-        struct vc_data *vc;     /* VC on which the update happened */
-        unsigned int c;         /* Printed char */
-};
-extern int register_vt_notifier(struct notifier_block *nb);
-extern int unregister_vt_notifier(struct notifier_block *nb);
-#endif
 /*
 * These constants are also useful for user-level apps (e.g., VC
@@ -74,4 +63,25 @@ struct vt_consize {
 #define VT_UNLOCKSWITCH 0x560C  /* allow vt switching */
 #define VT_GETHIFONTMASK 0x560D  /* return hi font mask */
+struct vt_event {
+        unsigned int event;
+#define VT_EVENT_SWITCH         0x0001  /* Console switch */
+#define VT_EVENT_BLANK          0x0002  /* Screen blank */
+#define VT_EVENT_UNBLANK        0x0004  /* Screen unblank */
+#define VT_EVENT_RESIZE         0x0008  /* Resize display */
+#define VT_MAX_EVENT            0x000F
+        unsigned int old;               /* Old console */
+        unsigned int new;               /* New console (if changing) */
+        unsigned int pad[4];            /* Padding for expansion */
+};
+#define VT_WAITEVENT    0x560E  /* Wait for an event */
+struct vt_setactivate {
+        unsigned int console;
+        struct vt_mode mode;
+};
+#define VT_SETACTIVATE  0x560F  /* Activate and set the mode of a console */
 #endif /* _LINUX_VT_H */
diff --git a/include/linux/vt_kern.h b/include/linux/vt_kern.h
index 2f1113467f70..c0c4e1103a73 100644
--- a/include/linux/vt_kern.h
+++ b/include/linux/vt_kern.h
@@ -13,6 +13,7 @@
 #include <linux/console_struct.h>
 #include <linux/mm.h>
 #include <linux/consolemap.h>
+#include <linux/notifier.h>
 /*
 * Presently, a lot of graphics programs do not restore the contents of
@@ -91,7 +92,8 @@ int con_copy_unimap(struct vc_data *dst_vc, struct vc_data *src_vc);
 #endif
 /* vt.c */
-int vt_waitactive(int vt);
+void vt_event_post(unsigned int event, unsigned int old, unsigned int new);
+int vt_waitactive(int n);
 void change_console(struct vc_data *new_vc);
 void reset_vc(struct vc_data *vc);
 extern int unbind_con_driver(const struct consw *csw, int first, int last,
@@ -116,4 +118,16 @@ struct vt_spawn_console {
 };
 extern struct vt_spawn_console vt_spawn_con;
+extern int vt_move_to_console(unsigned int vt, int alloc);
+/* Interfaces for VC notification of character events (for accessibility etc) */
+struct vt_notifier_param {
+        struct vc_data *vc;     /* VC on which the update happened */
+        unsigned int c;         /* Printed char */
+};
+extern int register_vt_notifier(struct notifier_block *nb);
+extern int unregister_vt_notifier(struct notifier_block *nb);
 #endif /* _VT_KERN_H */
diff --git a/include/trace/events/power.h b/include/trace/events/power.h
new file mode 100644
index 000000000000..ea6d579261ad
--- /dev/null
+++ b/include/trace/events/power.h
@@ -0,0 +1,81 @@
+#undef TRACE_SYSTEM
+#define TRACE_SYSTEM power
+#if !defined(_TRACE_POWER_H) || defined(TRACE_HEADER_MULTI_READ)
+#define _TRACE_POWER_H
+#include <linux/ktime.h>
+#include <linux/tracepoint.h>
+#ifndef _TRACE_POWER_ENUM_
+#define _TRACE_POWER_ENUM_
+enum {
+        POWER_NONE = 0,
+        POWER_CSTATE = 1,
+        POWER_PSTATE = 2,
+};
+#endif
+TRACE_EVENT(power_start,
+        TP_PROTO(unsigned int type, unsigned int state),
+        TP_ARGS(type, state),
+        TP_STRUCT__entry(
+                __field(        u64,            type            )
+                __field(        u64,            state           )
+        ),
+        TP_fast_assign(
+                __entry->type = type;
+                __entry->state = state;
+        ),
+        TP_printk("type=%lu state=%lu", (unsigned long)__entry->type, (unsigned long)__entry->state)
+);
+TRACE_EVENT(power_end,
+        TP_PROTO(int dummy),
+        TP_ARGS(dummy),
+        TP_STRUCT__entry(
+                __field(        u64,            dummy           )
+        ),
+        TP_fast_assign(
+                __entry->dummy = 0xffff;
+        ),
+        TP_printk("dummy=%lu", (unsigned long)__entry->dummy)
+);
+TRACE_EVENT(power_frequency,
+        TP_PROTO(unsigned int type, unsigned int state),
+        TP_ARGS(type, state),
+        TP_STRUCT__entry(
+                __field(        u64,            type            )
+                __field(        u64,            state           )
+        ),
+        TP_fast_assign(
+                __entry->type = type;
+                __entry->state = state;
+        ),
+        TP_printk("type=%lu state=%lu", (unsigned long)__entry->type, (unsigned long) __entry->state)
+);
+#endif /* _TRACE_POWER_H */
+/* This part must be outside protection */
+#include <trace/define_trace.h>
diff --git a/include/trace/events/sched.h b/include/trace/events/sched.h
index b48f1ad7c946..4069c43f4187 100644
--- a/include/trace/events/sched.h
+++ b/include/trace/events/sched.h
@@ -380,6 +380,39 @@ TRACE_EVENT(sched_stat_wait,
 );
 /*
+ * Tracepoint for accounting runtime (time the task is executing
+ * on a CPU).
+ */
+TRACE_EVENT(sched_stat_runtime,
+        TP_PROTO(struct task_struct *tsk, u64 runtime, u64 vruntime),
+        TP_ARGS(tsk, runtime, vruntime),
+        TP_STRUCT__entry(
+                __array( char,  comm,   TASK_COMM_LEN   )
+                __field( pid_t, pid                     )
+                __field( u64,   runtime                 )
+                __field( u64,   vruntime                        )
+        ),
+        TP_fast_assign(
+                memcpy(__entry->comm, tsk->comm, TASK_COMM_LEN);
+                __entry->pid            = tsk->pid;
+                __entry->runtime        = runtime;
+                __entry->vruntime       = vruntime;
+        )
+        TP_perf_assign(
+                __perf_count(runtime);
+        ),
+        TP_printk("task: %s:%d runtime: %Lu [ns], vruntime: %Lu [ns]",
+                        __entry->comm, __entry->pid,
+                        (unsigned long long)__entry->runtime,
+                        (unsigned long long)__entry->vruntime)
+);
+/*
 * Tracepoint for accounting sleep time (time the task is not runnable,
 * including iowait, see below).
 */
diff --git a/kernel/kfifo.c b/kernel/kfifo.c
index 26539e3228e5..3765ff3c1bbe 100644
--- a/kernel/kfifo.c
+++ b/kernel/kfifo.c
@@ -117,7 +117,7 @@ EXPORT_SYMBOL(kfifo_free);
 * writer, you don't need extra locking to use these functions.
 */
 unsigned int __kfifo_put(struct kfifo *fifo,
-                         unsigned char *buffer, unsigned int len)
+                        const unsigned char *buffer, unsigned int len)
 {
        unsigned int l;
diff --git a/kernel/perf_counter.c b/kernel/perf_counter.c
index 8cb94a52d1bb..cc768ab81ac8 100644
--- a/kernel/perf_counter.c
+++ b/kernel/perf_counter.c
@@ -2176,6 +2176,13 @@ static int perf_mmap_data_alloc(struct perf_counter *counter, int nr_pages)
        data->nr_pages = nr_pages;
        atomic_set(&data->lock, -1);
+        if (counter->attr.watermark) {
+                data->watermark = min_t(long, PAGE_SIZE * nr_pages,
+                                      counter->attr.wakeup_watermark);
+        }
+        if (!data->watermark)
+                data->watermark = max(PAGE_SIZE, PAGE_SIZE * nr_pages / 4);
        rcu_assign_pointer(counter->data, data);
        return 0;
@@ -2315,7 +2322,8 @@ static int perf_mmap(struct file *file, struct vm_area_struct *vma)
        lock_limit >>= PAGE_SHIFT;
        locked = vma->vm_mm->locked_vm + extra;
-        if ((locked > lock_limit) && !capable(CAP_IPC_LOCK)) {
+        if ((locked > lock_limit) && perf_paranoid_tracepoint_raw() &&
+                !capable(CAP_IPC_LOCK)) {
                ret = -EPERM;
                goto unlock;
        }
@@ -2504,35 +2512,15 @@ __weak struct perf_callchain_entry *perf_callchain(struct pt_regs *regs)
 /*
 * Output
 */
+static bool perf_output_space(struct perf_mmap_data *data, unsigned long tail,
-struct perf_output_handle {
+                              unsigned long offset, unsigned long head)
-        struct perf_counter     *counter;
-        struct perf_mmap_data   *data;
-        unsigned long           head;
-        unsigned long           offset;
-        int                     nmi;
-        int                     sample;
-        int                     locked;
-        unsigned long           flags;
-};
-static bool perf_output_space(struct perf_mmap_data *data,
-                              unsigned int offset, unsigned int head)
 {
-        unsigned long tail;
        unsigned long mask;
        if (!data->writable)
                return true;
        mask = (data->nr_pages << PAGE_SHIFT) - 1;
-        /*
-         * Userspace could choose to issue a mb() before updating the tail
-         * pointer. So that all reads will be completed before the write is
-         * issued.
-         */
-        tail = ACCESS_ONCE(data->user_page->data_tail);
-        smp_rmb();
        offset = (offset - tail) & mask;
        head   = (head   - tail) & mask;
@@ -2633,8 +2621,8 @@ out:
        local_irq_restore(handle->flags);
 }
-static void perf_output_copy(struct perf_output_handle *handle,
+void perf_output_copy(struct perf_output_handle *handle,
-                             const void *buf, unsigned int len)
+                      const void *buf, unsigned int len)
 {
        unsigned int pages_mask;
        unsigned int offset;
@@ -2669,16 +2657,13 @@ static void perf_output_copy(struct perf_output_handle *handle,
        WARN_ON_ONCE(((long)(handle->head - handle->offset)) < 0);
 }
-#define perf_output_put(handle, x) \
+int perf_output_begin(struct perf_output_handle *handle,
-        perf_output_copy((handle), &(x), sizeof(x))
+                      struct perf_counter *counter, unsigned int size,
+                      int nmi, int sample)
-static int perf_output_begin(struct perf_output_handle *handle,
-                             struct perf_counter *counter, unsigned int size,
-                             int nmi, int sample)
 {
        struct perf_counter *output_counter;
        struct perf_mmap_data *data;
-        unsigned int offset, head;
+        unsigned long tail, offset, head;
        int have_lost;
        struct {
                struct perf_event_header header;
@@ -2716,16 +2701,23 @@ static int perf_output_begin(struct perf_output_handle *handle,
        perf_output_lock(handle);
        do {
+                /*
+                 * Userspace could choose to issue a mb() before updating the
+                 * tail pointer. So that all reads will be completed before the
+                 * write is issued.
+                 */
+                tail = ACCESS_ONCE(data->user_page->data_tail);
+                smp_rmb();
                offset = head = atomic_long_read(&data->head);
                head += size;
-                if (unlikely(!perf_output_space(data, offset, head)))
+                if (unlikely(!perf_output_space(data, tail, offset, head)))
                        goto fail;
        } while (atomic_long_cmpxchg(&data->head, offset, head) != offset);
        handle->offset  = offset;
        handle->head    = head;
-        if ((offset >> PAGE_SHIFT) != (head >> PAGE_SHIFT))
+        if (head - tail > data->watermark)
                atomic_set(&data->wakeup, 1);
        if (have_lost) {
@@ -2749,7 +2741,7 @@ out:
        return -ENOSPC;
 }
-static void perf_output_end(struct perf_output_handle *handle)
+void perf_output_end(struct perf_output_handle *handle)
 {
        struct perf_counter *counter = handle->counter;
        struct perf_mmap_data *data = handle->data;
@@ -2863,156 +2855,176 @@ static void perf_output_read(struct perf_output_handle *handle,
                perf_output_read_one(handle, counter);
 }
-void perf_counter_output(struct perf_counter *counter, int nmi,
+void perf_output_sample(struct perf_output_handle *handle,
-                                struct perf_sample_data *data)
+                        struct perf_event_header *header,
+                        struct perf_sample_data *data,
+                        struct perf_counter *counter)
 {
-        int ret;
+        u64 sample_type = data->type;
-        u64 sample_type = counter->attr.sample_type;
-        struct perf_output_handle handle;
-        struct perf_event_header header;
-        u64 ip;
-        struct {
-                u32 pid, tid;
-        } tid_entry;
-        struct perf_callchain_entry *callchain = NULL;
-        int callchain_size = 0;
-        u64 time;
-        struct {
-                u32 cpu, reserved;
-        } cpu_entry;
-        header.type = PERF_EVENT_SAMPLE;
+        perf_output_put(handle, *header);
-        header.size = sizeof(header);
-        header.misc = 0;
+        if (sample_type & PERF_SAMPLE_IP)
-        header.misc |= perf_misc_flags(data->regs);
+                perf_output_put(handle, data->ip);
-        if (sample_type & PERF_SAMPLE_IP) {
-                ip = perf_instruction_pointer(data->regs);
-                header.size += sizeof(ip);
-        }
-        if (sample_type & PERF_SAMPLE_TID) {
-                /* namespace issues */
-                tid_entry.pid = perf_counter_pid(counter, current);
-                tid_entry.tid = perf_counter_tid(counter, current);
-                header.size += sizeof(tid_entry);
-        }
-        if (sample_type & PERF_SAMPLE_TIME) {
+        if (sample_type & PERF_SAMPLE_TID)
-                /*
+                perf_output_put(handle, data->tid_entry);
-                 * Maybe do better on x86 and provide cpu_clock_nmi()
-                 */
-                time = sched_clock();
-                header.size += sizeof(u64);
+        if (sample_type & PERF_SAMPLE_TIME)
-        }
+                perf_output_put(handle, data->time);
        if (sample_type & PERF_SAMPLE_ADDR)
-                header.size += sizeof(u64);
+                perf_output_put(handle, data->addr);
        if (sample_type & PERF_SAMPLE_ID)
-                header.size += sizeof(u64);
+                perf_output_put(handle, data->id);
        if (sample_type & PERF_SAMPLE_STREAM_ID)
-                header.size += sizeof(u64);
+                perf_output_put(handle, data->stream_id);
-        if (sample_type & PERF_SAMPLE_CPU) {
-                header.size += sizeof(cpu_entry);
-                cpu_entry.cpu = raw_smp_processor_id();
+        if (sample_type & PERF_SAMPLE_CPU)
-                cpu_entry.reserved = 0;
+                perf_output_put(handle, data->cpu_entry);
-        }
        if (sample_type & PERF_SAMPLE_PERIOD)
-                header.size += sizeof(u64);
+                perf_output_put(handle, data->period);
        if (sample_type & PERF_SAMPLE_READ)
-                header.size += perf_counter_read_size(counter);
+                perf_output_read(handle, counter);
        if (sample_type & PERF_SAMPLE_CALLCHAIN) {
-                callchain = perf_callchain(data->regs);
+                if (data->callchain) {
+                        int size = 1;
-                if (callchain) {
+                        if (data->callchain)
-                        callchain_size = (1 + callchain->nr) * sizeof(u64);
+                                size += data->callchain->nr;
-                        header.size += callchain_size;
-                } else
+                        size *= sizeof(u64);
-                        header.size += sizeof(u64);
+                        perf_output_copy(handle, data->callchain, size);
+                } else {
+                        u64 nr = 0;
+                        perf_output_put(handle, nr);
+                }
        }
        if (sample_type & PERF_SAMPLE_RAW) {
-                int size = sizeof(u32);
+                if (data->raw) {
+                        perf_output_put(handle, data->raw->size);
+                        perf_output_copy(handle, data->raw->data,
+                                         data->raw->size);
+                } else {
+                        struct {
+                                u32     size;
+                                u32     data;
+                        } raw = {
+                                .size = sizeof(u32),
+                                .data = 0,
+                        };
+                        perf_output_put(handle, raw);
+                }
+        }
+}
-                if (data->raw)
+void perf_prepare_sample(struct perf_event_header *header,
-                        size += data->raw->size;
+                         struct perf_sample_data *data,
-                else
+                         struct perf_counter *counter,
-                        size += sizeof(u32);
+                         struct pt_regs *regs)
+{
+        u64 sample_type = counter->attr.sample_type;
-                WARN_ON_ONCE(size & (sizeof(u64)-1));
+        data->type = sample_type;
-                header.size += size;
-        }
-        ret = perf_output_begin(&handle, counter, header.size, nmi, 1);
+        header->type = PERF_EVENT_SAMPLE;
-        if (ret)
+        header->size = sizeof(*header);
-                return;
-        perf_output_put(&handle, header);
+        header->misc = 0;
+        header->misc |= perf_misc_flags(regs);
-        if (sample_type & PERF_SAMPLE_IP)
+        if (sample_type & PERF_SAMPLE_IP) {
-                perf_output_put(&handle, ip);
+                data->ip = perf_instruction_pointer(regs);
-        if (sample_type & PERF_SAMPLE_TID)
+                header->size += sizeof(data->ip);
-                perf_output_put(&handle, tid_entry);
+        }
-        if (sample_type & PERF_SAMPLE_TIME)
+        if (sample_type & PERF_SAMPLE_TID) {
-                perf_output_put(&handle, time);
+                /* namespace issues */
+                data->tid_entry.pid = perf_counter_pid(counter, current);
+                data->tid_entry.tid = perf_counter_tid(counter, current);
+                header->size += sizeof(data->tid_entry);
+        }
+        if (sample_type & PERF_SAMPLE_TIME) {
+                data->time = perf_clock();
+                header->size += sizeof(data->time);
+        }
        if (sample_type & PERF_SAMPLE_ADDR)
-                perf_output_put(&handle, data->addr);
+                header->size += sizeof(data->addr);
        if (sample_type & PERF_SAMPLE_ID) {
-                u64 id = primary_counter_id(counter);
+                data->id = primary_counter_id(counter);
-                perf_output_put(&handle, id);
+                header->size += sizeof(data->id);
        }
-        if (sample_type & PERF_SAMPLE_STREAM_ID)
+        if (sample_type & PERF_SAMPLE_STREAM_ID) {
-                perf_output_put(&handle, counter->id);
+                data->stream_id = counter->id;
-        if (sample_type & PERF_SAMPLE_CPU)
+                header->size += sizeof(data->stream_id);
-                perf_output_put(&handle, cpu_entry);
+        }
+        if (sample_type & PERF_SAMPLE_CPU) {
+                data->cpu_entry.cpu             = raw_smp_processor_id();
+                data->cpu_entry.reserved        = 0;
+                header->size += sizeof(data->cpu_entry);
+        }
        if (sample_type & PERF_SAMPLE_PERIOD)
-                perf_output_put(&handle, data->period);
+                header->size += sizeof(data->period);
        if (sample_type & PERF_SAMPLE_READ)
-                perf_output_read(&handle, counter);
+                header->size += perf_counter_read_size(counter);
        if (sample_type & PERF_SAMPLE_CALLCHAIN) {
-                if (callchain)
+                int size = 1;
-                        perf_output_copy(&handle, callchain, callchain_size);
-                else {
+                data->callchain = perf_callchain(regs);
-                        u64 nr = 0;
-                        perf_output_put(&handle, nr);
+                if (data->callchain)
-                }
+                        size += data->callchain->nr;
+                header->size += size * sizeof(u64);
        }
        if (sample_type & PERF_SAMPLE_RAW) {
-                if (data->raw) {
+                int size = sizeof(u32);
-                        perf_output_put(&handle, data->raw->size);
-                        perf_output_copy(&handle, data->raw->data, data->raw->size);
+                if (data->raw)
-                } else {
+                        size += data->raw->size;
-                        struct {
+                else
-                                u32     size;
+                        size += sizeof(u32);
-                                u32     data;
-                        } raw = {
+                WARN_ON_ONCE(size & (sizeof(u64)-1));
-                                .size = sizeof(u32),
+                header->size += size;
-                                .data = 0,
-                        };
-                        perf_output_put(&handle, raw);
-                }
        }
+}
+static void perf_counter_output(struct perf_counter *counter, int nmi,
+                                struct perf_sample_data *data,
+                                struct pt_regs *regs)
+{
+        struct perf_output_handle handle;
+        struct perf_event_header header;
+        perf_prepare_sample(&header, data, counter, regs);
+        if (perf_output_begin(&handle, counter, header.size, nmi, 1))
+                return;
+        perf_output_sample(&handle, &header, data, counter);
        perf_output_end(&handle);
 }
@@ -3071,6 +3083,7 @@ struct perf_task_event {
                u32                             ppid;
                u32                             tid;
                u32                             ptid;
+                u64                             time;
        } event;
 };
@@ -3078,9 +3091,12 @@ static void perf_counter_task_output(struct perf_counter *counter,
                                     struct perf_task_event *task_event)
 {
        struct perf_output_handle handle;
-        int size = task_event->event.header.size;
+        int size;
        struct task_struct *task = task_event->task;
-        int ret = perf_output_begin(&handle, counter, size, 0, 0);
+        int ret;
+        size  = task_event->event.header.size;
+        ret = perf_output_begin(&handle, counter, size, 0, 0);
        if (ret)
                return;
@@ -3091,7 +3107,10 @@ static void perf_counter_task_output(struct perf_counter *counter,
        task_event->event.tid = perf_counter_tid(counter, task);
        task_event->event.ptid = perf_counter_tid(counter, current);
+        task_event->event.time = perf_clock();
        perf_output_put(&handle, task_event->event);
        perf_output_end(&handle);
 }
@@ -3473,7 +3492,7 @@ static void perf_log_throttle(struct perf_counter *counter, int enable)
                        .misc = 0,
                        .size = sizeof(throttle_event),
                },
-                .time           = sched_clock(),
+                .time           = perf_clock(),
                .id             = primary_counter_id(counter),
                .stream_id      = counter->id,
        };
@@ -3493,14 +3512,16 @@ static void perf_log_throttle(struct perf_counter *counter, int enable)
 * Generic counter overflow handling, sampling.
 */
-int perf_counter_overflow(struct perf_counter *counter, int nmi,
+static int __perf_counter_overflow(struct perf_counter *counter, int nmi,
-                          struct perf_sample_data *data)
+                                   int throttle, struct perf_sample_data *data,
+                                   struct pt_regs *regs)
 {
        int events = atomic_read(&counter->event_limit);
-        int throttle = counter->pmu->unthrottle != NULL;
        struct hw_perf_counter *hwc = &counter->hw;
        int ret = 0;
+        throttle = (throttle && counter->pmu->unthrottle != NULL);
        if (!throttle) {
                hwc->interrupts++;
        } else {
@@ -3523,7 +3544,7 @@ int perf_counter_overflow(struct perf_counter *counter, int nmi,
        }
        if (counter->attr.freq) {
-                u64 now = sched_clock();
+                u64 now = perf_clock();
                s64 delta = now - hwc->freq_stamp;
                hwc->freq_stamp = now;
@@ -3549,10 +3570,17 @@ int perf_counter_overflow(struct perf_counter *counter, int nmi,
                        perf_counter_disable(counter);
        }
-        perf_counter_output(counter, nmi, data);
+        perf_counter_output(counter, nmi, data, regs);
        return ret;
 }
+int perf_counter_overflow(struct perf_counter *counter, int nmi,
+                          struct perf_sample_data *data,
+                          struct pt_regs *regs)
+{
+        return __perf_counter_overflow(counter, nmi, 1, data, regs);
+}
 /*
 * Generic software counter infrastructure
 */
@@ -3588,9 +3616,11 @@ again:
 }
 static void perf_swcounter_overflow(struct perf_counter *counter,
-                                    int nmi, struct perf_sample_data *data)
+                                    int nmi, struct perf_sample_data *data,
+                                    struct pt_regs *regs)
 {
        struct hw_perf_counter *hwc = &counter->hw;
+        int throttle = 0;
        u64 overflow;
        data->period = counter->hw.last_period;
@@ -3600,13 +3630,15 @@ static void perf_swcounter_overflow(struct perf_counter *counter,
                return;
        for (; overflow; overflow--) {
-                if (perf_counter_overflow(counter, nmi, data)) {
+                if (__perf_counter_overflow(counter, nmi, throttle,
+                                            data, regs)) {
                        /*
                         * We inhibit the overflow from happening when
                         * hwc->interrupts == MAX_INTERRUPTS.
                         */
                        break;
                }
+                throttle = 1;
        }
 }
@@ -3618,7 +3650,8 @@ static void perf_swcounter_unthrottle(struct perf_counter *counter)
 }
 static void perf_swcounter_add(struct perf_counter *counter, u64 nr,
-                               int nmi, struct perf_sample_data *data)
+                               int nmi, struct perf_sample_data *data,
+                               struct pt_regs *regs)
 {
        struct hw_perf_counter *hwc = &counter->hw;
@@ -3627,11 +3660,11 @@ static void perf_swcounter_add(struct perf_counter *counter, u64 nr,
        if (!hwc->sample_period)
                return;
-        if (!data->regs)
+        if (!regs)
                return;
        if (!atomic64_add_negative(nr, &hwc->period_left))
-                perf_swcounter_overflow(counter, nmi, data);
+                perf_swcounter_overflow(counter, nmi, data, regs);
 }
 static int perf_swcounter_is_counting(struct perf_counter *counter)
@@ -3690,7 +3723,8 @@ static int perf_swcounter_match(struct perf_counter *counter,
 static void perf_swcounter_ctx_event(struct perf_counter_context *ctx,
                                     enum perf_type_id type,
                                     u32 event, u64 nr, int nmi,
-                                     struct perf_sample_data *data)
+                                     struct perf_sample_data *data,
+                                     struct pt_regs *regs)
 {
        struct perf_counter *counter;
@@ -3699,8 +3733,8 @@ static void perf_swcounter_ctx_event(struct perf_counter_context *ctx,
        rcu_read_lock();
        list_for_each_entry_rcu(counter, &ctx->event_list, event_entry) {
-                if (perf_swcounter_match(counter, type, event, data->regs))
+                if (perf_swcounter_match(counter, type, event, regs))
-                        perf_swcounter_add(counter, nr, nmi, data);
+                        perf_swcounter_add(counter, nr, nmi, data, regs);
        }
        rcu_read_unlock();
 }
@@ -3721,7 +3755,8 @@ static int *perf_swcounter_recursion_context(struct perf_cpu_context *cpuctx)
 static void do_perf_swcounter_event(enum perf_type_id type, u32 event,
                                    u64 nr, int nmi,
-                                    struct perf_sample_data *data)
+                                    struct perf_sample_data *data,
+                                    struct pt_regs *regs)
 {
        struct perf_cpu_context *cpuctx = &get_cpu_var(perf_cpu_context);
        int *recursion = perf_swcounter_recursion_context(cpuctx);
@@ -3734,7 +3769,7 @@ static void do_perf_swcounter_event(enum perf_type_id type, u32 event,
        barrier();
        perf_swcounter_ctx_event(&cpuctx->ctx, type, event,
-                                 nr, nmi, data);
+                                 nr, nmi, data, regs);
        rcu_read_lock();
        /*
         * doesn't really matter which of the child contexts the
@@ -3742,7 +3777,7 @@ static void do_perf_swcounter_event(enum perf_type_id type, u32 event,
         */
        ctx = rcu_dereference(current->perf_counter_ctxp);
        if (ctx)
-                perf_swcounter_ctx_event(ctx, type, event, nr, nmi, data);
+                perf_swcounter_ctx_event(ctx, type, event, nr, nmi, data, regs);
        rcu_read_unlock();
        barrier();
@@ -3756,11 +3791,11 @@ void __perf_swcounter_event(u32 event, u64 nr, int nmi,
                            struct pt_regs *regs, u64 addr)
 {
        struct perf_sample_data data = {
-                .regs = regs,
                .addr = addr,
        };
-        do_perf_swcounter_event(PERF_TYPE_SOFTWARE, event, nr, nmi, &data);
+        do_perf_swcounter_event(PERF_TYPE_SOFTWARE, event, nr, nmi,
+                                &data, regs);
 }
 static void perf_swcounter_read(struct perf_counter *counter)
@@ -3797,6 +3832,7 @@ static enum hrtimer_restart perf_swcounter_hrtimer(struct hrtimer *hrtimer)
 {
        enum hrtimer_restart ret = HRTIMER_RESTART;
        struct perf_sample_data data;
+        struct pt_regs *regs;
        struct perf_counter *counter;
        u64 period;
@@ -3804,17 +3840,17 @@ static enum hrtimer_restart perf_swcounter_hrtimer(struct hrtimer *hrtimer)
        counter->pmu->read(counter);
        data.addr = 0;
-        data.regs = get_irq_regs();
+        regs = get_irq_regs();
        /*
         * In case we exclude kernel IPs or are somehow not in interrupt
         * context, provide the next best thing, the user IP.
         */
-        if ((counter->attr.exclude_kernel || !data.regs) &&
+        if ((counter->attr.exclude_kernel || !regs) &&
                        !counter->attr.exclude_user)
-                data.regs = task_pt_regs(current);
+                regs = task_pt_regs(current);
-        if (data.regs) {
+        if (regs) {
-                if (perf_counter_overflow(counter, 0, &data))
+                if (perf_counter_overflow(counter, 0, &data, regs))
                        ret = HRTIMER_NORESTART;
        }
@@ -3950,15 +3986,17 @@ void perf_tpcounter_event(int event_id, u64 addr, u64 count, void *record,
        };
        struct perf_sample_data data = {
-                .regs = get_irq_regs(),
                .addr = addr,
                .raw = &raw,
        };
-        if (!data.regs)
+        struct pt_regs *regs = get_irq_regs();
-                data.regs = task_pt_regs(current);
+        if (!regs)
+                regs = task_pt_regs(current);
-        do_perf_swcounter_event(PERF_TYPE_TRACEPOINT, event_id, count, 1, &data);
+        do_perf_swcounter_event(PERF_TYPE_TRACEPOINT, event_id, count, 1,
+                                &data, regs);
 }
 EXPORT_SYMBOL_GPL(perf_tpcounter_event);
@@ -4170,8 +4208,8 @@ done:
 static int perf_copy_attr(struct perf_counter_attr __user *uattr,
                          struct perf_counter_attr *attr)
 {
-        int ret;
        u32 size;
+        int ret;
        if (!access_ok(VERIFY_WRITE, uattr, PERF_ATTR_SIZE_VER0))
                return -EFAULT;
@@ -4196,19 +4234,19 @@ static int perf_copy_attr(struct perf_counter_attr __user *uattr,
        /*
         * If we're handed a bigger struct than we know of,
-         * ensure all the unknown bits are 0.
+         * ensure all the unknown bits are 0 - i.e. new
+         * user-space does not rely on any kernel feature
+         * extensions we dont know about yet.
         */
        if (size > sizeof(*attr)) {
-                unsigned long val;
+                unsigned char __user *addr;
-                unsigned long __user *addr;
+                unsigned char __user *end;
-                unsigned long __user *end;
+                unsigned char val;
-                addr = PTR_ALIGN((void __user *)uattr + sizeof(*attr),
+                addr = (void __user *)uattr + sizeof(*attr);
-                                sizeof(unsigned long));
+                end  = (void __user *)uattr + size;
-                end  = PTR_ALIGN((void __user *)uattr + size,
-                                sizeof(unsigned long));
-                for (; addr < end; addr += sizeof(unsigned long)) {
+                for (; addr < end; addr++) {
                        ret = get_user(val, addr);
                        if (ret)
                                return ret;
diff --git a/kernel/power/console.c b/kernel/power/console.c
index a3961b205de7..5187136fe1de 100644
--- a/kernel/power/console.c
+++ b/kernel/power/console.c
@@ -14,56 +14,13 @@
 #define SUSPEND_CONSOLE (MAX_NR_CONSOLES-1)
 static int orig_fgconsole, orig_kmsg;
-static int disable_vt_switch;
-/*
- * Normally during a suspend, we allocate a new console and switch to it.
- * When we resume, we switch back to the original console.  This switch
- * can be slow, so on systems where the framebuffer can handle restoration
- * of video registers anyways, there's little point in doing the console
- * switch.  This function allows you to disable it by passing it '0'.
- */
-void pm_set_vt_switch(int do_switch)
-{
-        acquire_console_sem();
-        disable_vt_switch = !do_switch;
-        release_console_sem();
-}
-EXPORT_SYMBOL(pm_set_vt_switch);
 int pm_prepare_console(void)
 {
-        acquire_console_sem();
+        orig_fgconsole = vt_move_to_console(SUSPEND_CONSOLE, 1);
+        if (orig_fgconsole < 0)
-        if (disable_vt_switch) {
-                release_console_sem();
-                return 0;
-        }
-        orig_fgconsole = fg_console;
-        if (vc_allocate(SUSPEND_CONSOLE)) {
-          /* we can't have a free VC for now. Too bad,
-           * we don't want to mess the screen for now. */
-                release_console_sem();
                return 1;
-        }
-        if (set_console(SUSPEND_CONSOLE)) {
-                /*
-                 * We're unable to switch to the SUSPEND_CONSOLE.
-                 * Let the calling function know so it can decide
-                 * what to do.
-                 */
-                release_console_sem();
-                return 1;
-        }
-        release_console_sem();
-        if (vt_waitactive(SUSPEND_CONSOLE)) {
-                pr_debug("Suspend: Can't switch VCs.");
-                return 1;
-        }
        orig_kmsg = kmsg_redirect;
        kmsg_redirect = SUSPEND_CONSOLE;
        return 0;
@@ -71,19 +28,9 @@ int pm_prepare_console(void)
 void pm_restore_console(void)
 {
-        acquire_console_sem();
+        if (orig_fgconsole >= 0) {
-        if (disable_vt_switch) {
+                vt_move_to_console(orig_fgconsole, 0);
-                release_console_sem();
+                kmsg_redirect = orig_kmsg;
-                return;
-        }
-        set_console(orig_fgconsole);
-        release_console_sem();
-        if (vt_waitactive(orig_fgconsole)) {
-                pr_debug("Resume: Can't switch VCs.");
-                return;
        }
-        kmsg_redirect = orig_kmsg;
 }
 #endif
diff --git a/kernel/sched_clock.c b/kernel/sched_clock.c
index e1d16c9a7680..ac2e1dc708bd 100644
--- a/kernel/sched_clock.c
+++ b/kernel/sched_clock.c
@@ -48,13 +48,6 @@ static __read_mostly int sched_clock_running;
 __read_mostly int sched_clock_stable;
 struct sched_clock_data {
-        /*
-         * Raw spinlock - this is a special case: this might be called
-         * from within instrumentation code so we dont want to do any
-         * instrumentation ourselves.
-         */
-        raw_spinlock_t          lock;
        u64                     tick_raw;
        u64                     tick_gtod;
        u64                     clock;
@@ -80,7 +73,6 @@ void sched_clock_init(void)
        for_each_possible_cpu(cpu) {
                struct sched_clock_data *scd = cpu_sdc(cpu);
-                scd->lock = (raw_spinlock_t)__RAW_SPIN_LOCK_UNLOCKED;
                scd->tick_raw = 0;
                scd->tick_gtod = ktime_now;
                scd->clock = ktime_now;
@@ -109,14 +101,19 @@ static inline u64 wrap_max(u64 x, u64 y)
 *  - filter out backward motion
 *  - use the GTOD tick value to create a window to filter crazy TSC values
 */
-static u64 __update_sched_clock(struct sched_clock_data *scd, u64 now)
+static u64 sched_clock_local(struct sched_clock_data *scd)
 {
-        s64 delta = now - scd->tick_raw;
+        u64 now, clock, old_clock, min_clock, max_clock;
-        u64 clock, min_clock, max_clock;
+        s64 delta;
+again:
+        now = sched_clock();
+        delta = now - scd->tick_raw;
        if (unlikely(delta < 0))
                delta = 0;
+        old_clock = scd->clock;
        /*
         * scd->clock = clamp(scd->tick_gtod + delta,
         *                    max(scd->tick_gtod, scd->clock),
@@ -124,84 +121,73 @@ static u64 __update_sched_clock(struct sched_clock_data *scd, u64 now)
         */
        clock = scd->tick_gtod + delta;
-        min_clock = wrap_max(scd->tick_gtod, scd->clock);
+        min_clock = wrap_max(scd->tick_gtod, old_clock);
-        max_clock = wrap_max(scd->clock, scd->tick_gtod + TICK_NSEC);
+        max_clock = wrap_max(old_clock, scd->tick_gtod + TICK_NSEC);
        clock = wrap_max(clock, min_clock);
        clock = wrap_min(clock, max_clock);
-        scd->clock = clock;
+        if (cmpxchg(&scd->clock, old_clock, clock) != old_clock)
+                goto again;
-        return scd->clock;
+        return clock;
 }
-static void lock_double_clock(struct sched_clock_data *data1,
+static u64 sched_clock_remote(struct sched_clock_data *scd)
-                                struct sched_clock_data *data2)
 {
-        if (data1 < data2) {
+        struct sched_clock_data *my_scd = this_scd();
-                __raw_spin_lock(&data1->lock);
+        u64 this_clock, remote_clock;
-                __raw_spin_lock(&data2->lock);
+        u64 *ptr, old_val, val;
+        sched_clock_local(my_scd);
+again:
+        this_clock = my_scd->clock;
+        remote_clock = scd->clock;
+        /*
+         * Use the opportunity that we have both locks
+         * taken to couple the two clocks: we take the
+         * larger time as the latest time for both
+         * runqueues. (this creates monotonic movement)
+         */
+        if (likely((s64)(remote_clock - this_clock) < 0)) {
+                ptr = &scd->clock;
+                old_val = remote_clock;
+                val = this_clock;
        } else {
-                __raw_spin_lock(&data2->lock);
+                /*
-                __raw_spin_lock(&data1->lock);
+                 * Should be rare, but possible:
+                 */
+                ptr = &my_scd->clock;
+                old_val = this_clock;
+                val = remote_clock;
        }
+        if (cmpxchg(ptr, old_val, val) != old_val)
+                goto again;
+        return val;
 }
 u64 sched_clock_cpu(int cpu)
 {
-        u64 now, clock, this_clock, remote_clock;
        struct sched_clock_data *scd;
+        u64 clock;
+        WARN_ON_ONCE(!irqs_disabled());
        if (sched_clock_stable)
                return sched_clock();
-        scd = cpu_sdc(cpu);
-        /*
-         * Normally this is not called in NMI context - but if it is,
-         * trying to do any locking here is totally lethal.
-         */
-        if (unlikely(in_nmi()))
-                return scd->clock;
        if (unlikely(!sched_clock_running))
                return 0ull;
-        WARN_ON_ONCE(!irqs_disabled());
+        scd = cpu_sdc(cpu);
-        now = sched_clock();
-        if (cpu != raw_smp_processor_id()) {
-                struct sched_clock_data *my_scd = this_scd();
-                lock_double_clock(scd, my_scd);
-                this_clock = __update_sched_clock(my_scd, now);
-                remote_clock = scd->clock;
-                /*
-                 * Use the opportunity that we have both locks
-                 * taken to couple the two clocks: we take the
-                 * larger time as the latest time for both
-                 * runqueues. (this creates monotonic movement)
-                 */
-                if (likely((s64)(remote_clock - this_clock) < 0)) {
-                        clock = this_clock;
-                        scd->clock = clock;
-                } else {
-                        /*
-                         * Should be rare, but possible:
-                         */
-                        clock = remote_clock;
-                        my_scd->clock = remote_clock;
-                }
-                __raw_spin_unlock(&my_scd->lock);
-        } else {
-                __raw_spin_lock(&scd->lock);
-                clock = __update_sched_clock(scd, now);
-        }
-        __raw_spin_unlock(&scd->lock);
+        if (cpu != smp_processor_id())
+                clock = sched_clock_remote(scd);
+        else
+                clock = sched_clock_local(scd);
        return clock;
 }
@@ -223,11 +209,9 @@ void sched_clock_tick(void)
        now_gtod = ktime_to_ns(ktime_get());
        now = sched_clock();
-        __raw_spin_lock(&scd->lock);
        scd->tick_raw = now;
        scd->tick_gtod = now_gtod;
-        __update_sched_clock(scd, now);
+        sched_clock_local(scd);
-        __raw_spin_unlock(&scd->lock);
 }
 /*
diff --git a/kernel/sched_fair.c b/kernel/sched_fair.c
index 10d218ab69f2..990b188803ce 100644
--- a/kernel/sched_fair.c
+++ b/kernel/sched_fair.c
@@ -513,6 +513,7 @@ static void update_curr(struct cfs_rq *cfs_rq)
        if (entity_is_task(curr)) {
                struct task_struct *curtask = task_of(curr);
+                trace_sched_stat_runtime(curtask, delta_exec, curr->vruntime);
                cpuacct_charge(curtask, delta_exec);
                account_group_exec_runtime(curtask, delta_exec);
        }
diff --git a/kernel/trace/Makefile b/kernel/trace/Makefile
index 844164dca90a..26f03ac07c2b 100644
--- a/kernel/trace/Makefile
+++ b/kernel/trace/Makefile
@@ -42,7 +42,6 @@ obj-$(CONFIG_BOOT_TRACER) += trace_boot.o
 obj-$(CONFIG_FUNCTION_GRAPH_TRACER) += trace_functions_graph.o
 obj-$(CONFIG_TRACE_BRANCH_PROFILING) += trace_branch.o
 obj-$(CONFIG_HW_BRANCH_TRACER) += trace_hw_branches.o
-obj-$(CONFIG_POWER_TRACER) += trace_power.o
 obj-$(CONFIG_KMEMTRACE) += kmemtrace.o
 obj-$(CONFIG_WORKQUEUE_TRACER) += trace_workqueue.o
 obj-$(CONFIG_BLK_DEV_IO_TRACE) += blktrace.o
@@ -54,5 +53,6 @@ obj-$(CONFIG_EVENT_TRACING) += trace_export.o
 obj-$(CONFIG_FTRACE_SYSCALLS) += trace_syscalls.o
 obj-$(CONFIG_EVENT_PROFILE) += trace_event_profile.o
 obj-$(CONFIG_EVENT_TRACING) += trace_events_filter.o
+obj-$(CONFIG_EVENT_TRACING) += power-traces.o
 libftrace-y := ftrace.o
diff --git a/kernel/trace/power-traces.c b/kernel/trace/power-traces.c
new file mode 100644
index 000000000000..e06c6e3d56a3
--- /dev/null
+++ b/kernel/trace/power-traces.c
@@ -0,0 +1,20 @@
+/*
+ * Power trace points
+ *
+ * Copyright (C) 2009 Arjan van de Ven <arjan@linux.intel.com>
+ */
+#include <linux/string.h>
+#include <linux/types.h>
+#include <linux/workqueue.h>
+#include <linux/sched.h>
+#include <linux/module.h>
+#include <linux/slab.h>
+#define CREATE_TRACE_POINTS
+#include <trace/events/power.h>
+EXPORT_TRACEPOINT_SYMBOL_GPL(power_start);
+EXPORT_TRACEPOINT_SYMBOL_GPL(power_end);
+EXPORT_TRACEPOINT_SYMBOL_GPL(power_frequency);
diff --git a/kernel/trace/ring_buffer.c b/kernel/trace/ring_buffer.c
index 6eef38923b07..d4ff01970547 100644
--- a/kernel/trace/ring_buffer.c
+++ b/kernel/trace/ring_buffer.c
@@ -201,8 +201,6 @@ int tracing_is_on(void)
 }
 EXPORT_SYMBOL_GPL(tracing_is_on);
-#include "trace.h"
 #define RB_EVNT_HDR_SIZE (offsetof(struct ring_buffer_event, array))
 #define RB_ALIGNMENT            4U
 #define RB_MAX_SMALL_DATA       (RB_ALIGNMENT * RINGBUF_TYPE_DATA_TYPE_LEN_MAX)
diff --git a/kernel/trace/trace.h b/kernel/trace/trace.h
index 86bcff94791a..405cb850b75d 100644
--- a/kernel/trace/trace.h
+++ b/kernel/trace/trace.h
@@ -11,7 +11,6 @@
 #include <linux/ftrace.h>
 #include <trace/boot.h>
 #include <linux/kmemtrace.h>
-#include <trace/power.h>
 #include <linux/trace_seq.h>
 #include <linux/ftrace_event.h>
@@ -37,7 +36,6 @@ enum trace_type {
        TRACE_HW_BRANCHES,
        TRACE_KMEM_ALLOC,
        TRACE_KMEM_FREE,
-        TRACE_POWER,
        TRACE_BLK,
        __TRACE_LAST_TYPE,
@@ -207,7 +205,6 @@ extern void __ftrace_bad_type(void);
                IF_ASSIGN(var, ent, struct ftrace_graph_ret_entry,      \
                          TRACE_GRAPH_RET);             \
                IF_ASSIGN(var, ent, struct hw_branch_entry, TRACE_HW_BRANCHES);\
-                IF_ASSIGN(var, ent, struct trace_power, TRACE_POWER); \
                IF_ASSIGN(var, ent, struct kmemtrace_alloc_entry,       \
                          TRACE_KMEM_ALLOC);    \
                IF_ASSIGN(var, ent, struct kmemtrace_free_entry,        \
diff --git a/kernel/trace/trace_entries.h b/kernel/trace/trace_entries.h
index a431748ddd6e..ead3d724599d 100644
--- a/kernel/trace/trace_entries.h
+++ b/kernel/trace/trace_entries.h
@@ -330,23 +330,6 @@ FTRACE_ENTRY(hw_branch, hw_branch_entry,
        F_printk("from: %llx to: %llx", __entry->from, __entry->to)
 );
-FTRACE_ENTRY(power, trace_power,
-        TRACE_POWER,
-        F_STRUCT(
-                __field_struct( struct power_trace,     state_data      )
-                __field_desc(   s64,    state_data,     stamp           )
-                __field_desc(   s64,    state_data,     end             )
-                __field_desc(   int,    state_data,     type            )
-                __field_desc(   int,    state_data,     state           )
-        ),
-        F_printk("%llx->%llx type:%u state:%u",
-                 __entry->stamp, __entry->end,
-                 __entry->type, __entry->state)
-);
 FTRACE_ENTRY(kmem_alloc, kmemtrace_alloc_entry,
        TRACE_KMEM_ALLOC,
diff --git a/kernel/trace/trace_power.c b/kernel/trace/trace_power.c
deleted file mode 100644
index fe1a00f1445a..000000000000
--- a/kernel/trace/trace_power.c
+++ /dev/null
@@ -1,218 +0,0 @@
-/*
- * ring buffer based C-state tracer
- *
- * Arjan van de Ven <arjan@linux.intel.com>
- * Copyright (C) 2008 Intel Corporation
- *
- * Much is borrowed from trace_boot.c which is
- * Copyright (C) 2008 Frederic Weisbecker <fweisbec@gmail.com>
- *
- */
-#include <linux/init.h>
-#include <linux/debugfs.h>
-#include <trace/power.h>
-#include <linux/kallsyms.h>
-#include <linux/module.h>
-#include "trace.h"
-#include "trace_output.h"
-static struct trace_array *power_trace;
-static int __read_mostly trace_power_enabled;
-static void probe_power_start(struct power_trace *it, unsigned int type,
-                                unsigned int level)
-{
-        if (!trace_power_enabled)
-                return;
-        memset(it, 0, sizeof(struct power_trace));
-        it->state = level;
-        it->type = type;
-        it->stamp = ktime_get();
-}
-static void probe_power_end(struct power_trace *it)
-{
-        struct ftrace_event_call *call = &event_power;
-        struct ring_buffer_event *event;
-        struct ring_buffer *buffer;
-        struct trace_power *entry;
-        struct trace_array_cpu *data;
-        struct trace_array *tr = power_trace;
-        if (!trace_power_enabled)
-                return;
-        buffer = tr->buffer;
-        preempt_disable();
-        it->end = ktime_get();
-        data = tr->data[smp_processor_id()];
-        event = trace_buffer_lock_reserve(buffer, TRACE_POWER,
-                                          sizeof(*entry), 0, 0);
-        if (!event)
-                goto out;
-        entry   = ring_buffer_event_data(event);
-        entry->state_data = *it;
-        if (!filter_check_discard(call, entry, buffer, event))
-                trace_buffer_unlock_commit(buffer, event, 0, 0);
- out:
-        preempt_enable();
-}
-static void probe_power_mark(struct power_trace *it, unsigned int type,
-                                unsigned int level)
-{
-        struct ftrace_event_call *call = &event_power;
-        struct ring_buffer_event *event;
-        struct ring_buffer *buffer;
-        struct trace_power *entry;
-        struct trace_array_cpu *data;
-        struct trace_array *tr = power_trace;
-        if (!trace_power_enabled)
-                return;
-        buffer = tr->buffer;
-        memset(it, 0, sizeof(struct power_trace));
-        it->state = level;
-        it->type = type;
-        it->stamp = ktime_get();
-        preempt_disable();
-        it->end = it->stamp;
-        data = tr->data[smp_processor_id()];
-        event = trace_buffer_lock_reserve(buffer, TRACE_POWER,
-                                          sizeof(*entry), 0, 0);
-        if (!event)
-                goto out;
-        entry   = ring_buffer_event_data(event);
-        entry->state_data = *it;
-        if (!filter_check_discard(call, entry, buffer, event))
-                trace_buffer_unlock_commit(buffer, event, 0, 0);
- out:
-        preempt_enable();
-}
-static int tracing_power_register(void)
-{
-        int ret;
-        ret = register_trace_power_start(probe_power_start);
-        if (ret) {
-                pr_info("power trace: Couldn't activate tracepoint"
-                        " probe to trace_power_start\n");
-                return ret;
-        }
-        ret = register_trace_power_end(probe_power_end);
-        if (ret) {
-                pr_info("power trace: Couldn't activate tracepoint"
-                        " probe to trace_power_end\n");
-                goto fail_start;
-        }
-        ret = register_trace_power_mark(probe_power_mark);
-        if (ret) {
-                pr_info("power trace: Couldn't activate tracepoint"
-                        " probe to trace_power_mark\n");
-                goto fail_end;
-        }
-        return ret;
-fail_end:
-        unregister_trace_power_end(probe_power_end);
-fail_start:
-        unregister_trace_power_start(probe_power_start);
-        return ret;
-}
-static void start_power_trace(struct trace_array *tr)
-{
-        trace_power_enabled = 1;
-}
-static void stop_power_trace(struct trace_array *tr)
-{
-        trace_power_enabled = 0;
-}
-static void power_trace_reset(struct trace_array *tr)
-{
-        trace_power_enabled = 0;
-        unregister_trace_power_start(probe_power_start);
-        unregister_trace_power_end(probe_power_end);
-        unregister_trace_power_mark(probe_power_mark);
-}
-static int power_trace_init(struct trace_array *tr)
-{
-        power_trace = tr;
-        trace_power_enabled = 1;
-        tracing_power_register();
-        tracing_reset_online_cpus(tr);
-        return 0;
-}
-static enum print_line_t power_print_line(struct trace_iterator *iter)
-{
-        int ret = 0;
-        struct trace_entry *entry = iter->ent;
-        struct trace_power *field ;
-        struct power_trace *it;
-        struct trace_seq *s = &iter->seq;
-        struct timespec stamp;
-        struct timespec duration;
-        trace_assign_type(field, entry);
-        it = &field->state_data;
-        stamp = ktime_to_timespec(it->stamp);
-        duration = ktime_to_timespec(ktime_sub(it->end, it->stamp));
-        if (entry->type == TRACE_POWER) {
-                if (it->type == POWER_CSTATE)
-                        ret = trace_seq_printf(s, "[%5ld.%09ld] CSTATE: Going to C%i on cpu %i for %ld.%09ld\n",
-                                          stamp.tv_sec,
-                                          stamp.tv_nsec,
-                                          it->state, iter->cpu,
-                                          duration.tv_sec,
-                                          duration.tv_nsec);
-                if (it->type == POWER_PSTATE)
-                        ret = trace_seq_printf(s, "[%5ld.%09ld] PSTATE: Going to P%i on cpu %i\n",
-                                          stamp.tv_sec,
-                                          stamp.tv_nsec,
-                                          it->state, iter->cpu);
-                if (!ret)
-                        return TRACE_TYPE_PARTIAL_LINE;
-                return TRACE_TYPE_HANDLED;
-        }
-        return TRACE_TYPE_UNHANDLED;
-}
-static void power_print_header(struct seq_file *s)
-{
-        seq_puts(s, "#   TIMESTAMP      STATE  EVENT\n");
-        seq_puts(s, "#       |            |      |\n");
-}
-static struct tracer power_tracer __read_mostly =
-{
-        .name           = "power",
-        .init           = power_trace_init,
-        .start          = start_power_trace,
-        .stop           = stop_power_trace,
-        .reset          = power_trace_reset,
-        .print_line     = power_print_line,
-        .print_header   = power_print_header,
-};
-static int init_power_trace(void)
-{
-        return register_tracer(&power_tracer);
-}
-device_initcall(init_power_trace);
diff --git a/scripts/tracing/power.pl b/scripts/tracing/power.pl
deleted file mode 100644
index 4f729b3501e0..000000000000
--- a/scripts/tracing/power.pl
+++ /dev/null
@@ -1,108 +0,0 @@
-#!/usr/bin/perl
-# Copyright 2008, Intel Corporation
-#
-# This file is part of the Linux kernel
-#
-# This program file is free software; you can redistribute it and/or modify it
-# under the terms of the GNU General Public License as published by the
-# Free Software Foundation; version 2 of the License.
-#
-# This program is distributed in the hope that it will be useful, but WITHOUT
-# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-# FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
-# for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program in a file named COPYING; if not, write to the
-# Free Software Foundation, Inc.,
-# 51 Franklin Street, Fifth Floor,
-# Boston, MA 02110-1301 USA
-#
-# Authors:
-#       Arjan van de Ven <arjan@linux.intel.com>
-#
-# This script turns a cstate ftrace output into a SVG graphic that shows
-# historic C-state information
-#
-#
-#       cat /sys/kernel/debug/tracing/trace | perl power.pl > out.svg
-#
-my @styles;
-my $base = 0;
-my @pstate_last;
-my @pstate_level;
-$styles[0] = "fill:rgb(0,0,255);fill-opacity:0.5;stroke-width:1;stroke:rgb(0,0,0)";
-$styles[1] = "fill:rgb(0,255,0);fill-opacity:0.5;stroke-width:1;stroke:rgb(0,0,0)";
-$styles[2] = "fill:rgb(255,0,20);fill-opacity:0.5;stroke-width:1;stroke:rgb(0,0,0)";
-$styles[3] = "fill:rgb(255,255,20);fill-opacity:0.5;stroke-width:1;stroke:rgb(0,0,0)";
-$styles[4] = "fill:rgb(255,0,255);fill-opacity:0.5;stroke-width:1;stroke:rgb(0,0,0)";
-$styles[5] = "fill:rgb(0,255,255);fill-opacity:0.5;stroke-width:1;stroke:rgb(0,0,0)";
-$styles[6] = "fill:rgb(0,128,255);fill-opacity:0.5;stroke-width:1;stroke:rgb(0,0,0)";
-$styles[7] = "fill:rgb(0,255,128);fill-opacity:0.5;stroke-width:1;stroke:rgb(0,0,0)";
-$styles[8] = "fill:rgb(0,25,20);fill-opacity:0.5;stroke-width:1;stroke:rgb(0,0,0)";
-print "<?xml version=\"1.0\" standalone=\"no\"?> \n";
-print "<svg width=\"10000\" height=\"100%\" version=\"1.1\" xmlns=\"http://www.w3.org/2000/svg\">\n";
-my $scale = 30000.0;
-while (<>) {
-        my $line = $_;
-        if ($line =~ /([0-9\.]+)\] CSTATE: Going to C([0-9]) on cpu ([0-9]+) for ([0-9\.]+)/) {
-                if ($base == 0) {
-                        $base = $1;
-                }
-                my $time = $1 - $base;
-                $time = $time * $scale;
-                my $C = $2;
-                my $cpu = $3;
-                my $y = 400 * $cpu;
-                my $duration = $4 * $scale;
-                my $msec = int($4 * 100000)/100.0;
-                my $height = $C * 20;
-                $style = $styles[$C];
-                $y = $y + 140 - $height;
-                $x2 = $time + 4;
-                $y2 = $y + 4;
-                print "<rect x=\"$time\" width=\"$duration\" y=\"$y\" height=\"$height\" style=\"$style\"/>\n";
-                print "<text transform=\"translate($x2,$y2) rotate(90)\">C$C $msec</text>\n";
-        }
-        if ($line =~ /([0-9\.]+)\] PSTATE: Going to P([0-9]) on cpu ([0-9]+)/) {
-                my $time = $1 - $base;
-                my $state = $2;
-                my $cpu = $3;
-                if (defined($pstate_last[$cpu])) {
-                        my $from = $pstate_last[$cpu];
-                        my $oldstate = $pstate_state[$cpu];
-                        my $duration = ($time-$from) * $scale;
-                        $from = $from * $scale;
-                        my $to = $from + $duration;
-                        my $height = 140 - ($oldstate * (140/8));
-                        my $y = 400 * $cpu + 200 + $height;
-                        my $y2 = $y+4;
-                        my $style = $styles[8];
-                        print "<rect x=\"$from\" y=\"$y\" width=\"$duration\" height=\"5\" style=\"$style\"/>\n";
-                        print "<text transform=\"translate($from,$y2)\">P$oldstate (cpu $cpu)</text>\n";
-                };
-                $pstate_last[$cpu] = $time;
-                $pstate_state[$cpu] = $state;
-        }
-}
-print "</svg>\n";
diff --git a/sound/sound_core.c b/sound/sound_core.c
index bb4b88e606bb..49c998186592 100644
--- a/sound/sound_core.c
+++ b/sound/sound_core.c
@@ -29,7 +29,7 @@ MODULE_DESCRIPTION("Core sound module");
 MODULE_AUTHOR("Alan Cox");
 MODULE_LICENSE("GPL");
-static char *sound_nodename(struct device *dev)
+static char *sound_devnode(struct device *dev, mode_t *mode)
 {
        if (MAJOR(dev->devt) == SOUND_MAJOR)
                return NULL;
@@ -50,7 +50,7 @@ static int __init init_soundcore(void)
                return PTR_ERR(sound_class);
        }
-        sound_class->nodename = sound_nodename;
+        sound_class->devnode = sound_devnode;
        return 0;
 }
diff --git a/tools/perf/Documentation/perf-sched.txt b/tools/perf/Documentation/perf-sched.txt
new file mode 100644
index 000000000000..1ce79198997b
--- /dev/null
+++ b/tools/perf/Documentation/perf-sched.txt
@@ -0,0 +1,41 @@
+perf-sched(1)
+==============
+NAME
+----
+perf-sched - Tool to trace/measure scheduler properties (latencies)
+SYNOPSIS
+--------
+[verse]
+'perf sched' {record|latency|replay|trace}
+DESCRIPTION
+-----------
+There's four variants of perf sched:
+  'perf sched record <command>' to record the scheduling events
+  of an arbitrary workload.
+  'perf sched latency' to report the per task scheduling latencies
+  and other scheduling properties of the workload.
+  'perf sched trace' to see a detailed trace of the workload that
+  was recorded.
+  'perf sched replay' to simulate the workload that was recorded
+  via perf sched record. (this is done by starting up mockup threads
+  that mimic the workload based on the events in the trace. These
+  threads can then replay the timings (CPU runtime and sleep patterns)
+  of the workload as it occured when it was recorded - and can repeat
+  it a number of times, measuring its performance.)
+OPTIONS
+-------
+-D::
+--dump-raw-trace=::
+        Display verbose dump of the sched data.
+SEE ALSO
+--------
+linkperf:perf-record[1]
diff --git a/tools/perf/Documentation/perf-timechart.txt b/tools/perf/Documentation/perf-timechart.txt
new file mode 100644
index 000000000000..61e0104c6270
--- /dev/null
+++ b/tools/perf/Documentation/perf-timechart.txt
@@ -0,0 +1,35 @@
+perf-timechart(1)
+=================
+NAME
+----
+perf-timechart - Tool to visualize total system behavior during a workload
+SYNOPSIS
+--------
+[verse]
+'perf timechart' {record}
+DESCRIPTION
+-----------
+There are two variants of perf timechart:
+  'perf timechart record <command>' to record the system level events
+  of an arbitrary workload.
+  'perf timechart' to turn a trace into a Scalable Vector Graphics file,
+  that can be viewed with popular SVG viewers such as 'Inkscape'.
+OPTIONS
+-------
+-o::
+--output=::
+        Select the output file (default: output.svg)
+-i::
+--input=::
+        Select the input file (default: perf.data)
+SEE ALSO
+--------
+linkperf:perf-record[1]
diff --git a/tools/perf/Documentation/perf-trace.txt b/tools/perf/Documentation/perf-trace.txt
new file mode 100644
index 000000000000..41ed75398ca9
--- /dev/null
+++ b/tools/perf/Documentation/perf-trace.txt
@@ -0,0 +1,25 @@
+perf-trace(1)
+==============
+NAME
+----
+perf-trace - Read perf.data (created by perf record) and display trace output
+SYNOPSIS
+--------
+[verse]
+'perf trace' [-i <file> | --input=file] symbol_name
+DESCRIPTION
+-----------
+This command reads the input file and displays the trace recorded.
+OPTIONS
+-------
+-D::
+--dump-raw-trace=::
+        Display verbose dump of the trace data.
+SEE ALSO
+--------
+linkperf:perf-record[1]
diff --git a/tools/perf/Makefile b/tools/perf/Makefile
index 9f8d207a91bf..0aba8b6e9c54 100644
--- a/tools/perf/Makefile
+++ b/tools/perf/Makefile
@@ -373,13 +373,16 @@ LIB_OBJS += util/thread.o
 LIB_OBJS += util/trace-event-parse.o
 LIB_OBJS += util/trace-event-read.o
 LIB_OBJS += util/trace-event-info.o
+LIB_OBJS += util/svghelper.o
 BUILTIN_OBJS += builtin-annotate.o
 BUILTIN_OBJS += builtin-help.o
+BUILTIN_OBJS += builtin-sched.o
 BUILTIN_OBJS += builtin-list.o
 BUILTIN_OBJS += builtin-record.o
 BUILTIN_OBJS += builtin-report.o
 BUILTIN_OBJS += builtin-stat.o
+BUILTIN_OBJS += builtin-timechart.o
 BUILTIN_OBJS += builtin-top.o
 BUILTIN_OBJS += builtin-trace.o
@@ -710,6 +713,12 @@ builtin-help.o: builtin-help.c common-cmds.h PERF-CFLAGS
                '-DPERF_MAN_PATH="$(mandir_SQ)"' \
                '-DPERF_INFO_PATH="$(infodir_SQ)"' $<
+builtin-timechart.o: builtin-timechart.c common-cmds.h PERF-CFLAGS
+        $(QUIET_CC)$(CC) -o $*.o -c $(ALL_CFLAGS) \
+                '-DPERF_HTML_PATH="$(htmldir_SQ)"' \
+                '-DPERF_MAN_PATH="$(mandir_SQ)"' \
+                '-DPERF_INFO_PATH="$(infodir_SQ)"' $<
 $(BUILT_INS): perf$X
        $(QUIET_BUILT_IN)$(RM) $@ && \
        ln perf$X $@ 2>/dev/null || \
diff --git a/tools/perf/builtin-record.c b/tools/perf/builtin-record.c
index 99a12fe86e9f..2459e5a22ed8 100644
--- a/tools/perf/builtin-record.c
+++ b/tools/perf/builtin-record.c
@@ -48,6 +48,8 @@ static int			call_graph			= 0;
 static int                      inherit_stat                    = 0;
 static int                      no_samples                      = 0;
 static int                      sample_address                  = 0;
+static int                      multiplex                       = 0;
+static int                      multiplex_fd                    = -1;
 static long                     samples;
 static struct timeval           last_read;
@@ -470,19 +472,28 @@ try_again:
         */
        if (group && group_fd == -1)
                group_fd = fd[nr_cpu][counter];
+        if (multiplex && multiplex_fd == -1)
+                multiplex_fd = fd[nr_cpu][counter];
-        event_array[nr_poll].fd = fd[nr_cpu][counter];
+        if (multiplex && fd[nr_cpu][counter] != multiplex_fd) {
-        event_array[nr_poll].events = POLLIN;
+                int ret;
-        nr_poll++;
+                ret = ioctl(fd[nr_cpu][counter], PERF_COUNTER_IOC_SET_OUTPUT, multiplex_fd);
-        mmap_array[nr_cpu][counter].counter = counter;
+                assert(ret != -1);
-        mmap_array[nr_cpu][counter].prev = 0;
+        } else {
-        mmap_array[nr_cpu][counter].mask = mmap_pages*page_size - 1;
+                event_array[nr_poll].fd = fd[nr_cpu][counter];
-        mmap_array[nr_cpu][counter].base = mmap(NULL, (mmap_pages+1)*page_size,
+                event_array[nr_poll].events = POLLIN;
-                        PROT_READ|PROT_WRITE, MAP_SHARED, fd[nr_cpu][counter], 0);
+                nr_poll++;
-        if (mmap_array[nr_cpu][counter].base == MAP_FAILED) {
-                error("failed to mmap with %d (%s)\n", errno, strerror(errno));
+                mmap_array[nr_cpu][counter].counter = counter;
-                exit(-1);
+                mmap_array[nr_cpu][counter].prev = 0;
+                mmap_array[nr_cpu][counter].mask = mmap_pages*page_size - 1;
+                mmap_array[nr_cpu][counter].base = mmap(NULL, (mmap_pages+1)*page_size,
+                                PROT_READ|PROT_WRITE, MAP_SHARED, fd[nr_cpu][counter], 0);
+                if (mmap_array[nr_cpu][counter].base == MAP_FAILED) {
+                        error("failed to mmap with %d (%s)\n", errno, strerror(errno));
+                        exit(-1);
+                }
        }
        ioctl(fd[nr_cpu][counter], PERF_COUNTER_IOC_ENABLE);
@@ -513,6 +524,7 @@ static int __cmd_record(int argc, const char **argv)
        pid_t pid = 0;
        int flags;
        int ret;
+        unsigned long waking = 0;
        page_size = sysconf(_SC_PAGE_SIZE);
        nr_cpus = sysconf(_SC_NPROCESSORS_ONLN);
@@ -614,17 +626,29 @@ static int __cmd_record(int argc, const char **argv)
                int hits = samples;
                for (i = 0; i < nr_cpu; i++) {
-                        for (counter = 0; counter < nr_counters; counter++)
+                        for (counter = 0; counter < nr_counters; counter++) {
-                                mmap_read(&mmap_array[i][counter]);
+                                if (mmap_array[i][counter].base)
+                                        mmap_read(&mmap_array[i][counter]);
+                        }
                }
                if (hits == samples) {
                        if (done)
                                break;
-                        ret = poll(event_array, nr_poll, 100);
+                        ret = poll(event_array, nr_poll, -1);
+                        waking++;
+                }
+                if (done) {
+                        for (i = 0; i < nr_cpu; i++) {
+                                for (counter = 0; counter < nr_counters; counter++)
+                                        ioctl(fd[i][counter], PERF_COUNTER_IOC_DISABLE);
+                        }
                }
        }
+        fprintf(stderr, "[ perf record: Woken up %ld times to write data ]\n", waking);
        /*
         * Approximate RIP event size: 24 bytes.
         */
@@ -681,6 +705,8 @@ static const struct option options[] = {
                    "Sample addresses"),
        OPT_BOOLEAN('n', "no-samples", &no_samples,
                    "don't sample"),
+        OPT_BOOLEAN('M', "multiplex", &multiplex,
+                    "multiplex counter output in a single channel"),
        OPT_END()
 };
diff --git a/tools/perf/builtin-sched.c b/tools/perf/builtin-sched.c
new file mode 100644
index 000000000000..275d79c6627a
--- /dev/null
+++ b/tools/perf/builtin-sched.c
@@ -0,0 +1,2004 @@
+#include "builtin.h"
+#include "perf.h"
+#include "util/util.h"
+#include "util/cache.h"
+#include "util/symbol.h"
+#include "util/thread.h"
+#include "util/header.h"
+#include "util/parse-options.h"
+#include "util/trace-event.h"
+#include "util/debug.h"
+#include <sys/types.h>
+#include <sys/prctl.h>
+#include <semaphore.h>
+#include <pthread.h>
+#include <math.h>
+static char                     const *input_name = "perf.data";
+static int                      input;
+static unsigned long            page_size;
+static unsigned long            mmap_window = 32;
+static unsigned long            total_comm = 0;
+static struct rb_root           threads;
+static struct thread            *last_match;
+static struct perf_header       *header;
+static u64                      sample_type;
+static char                     default_sort_order[] = "avg, max, switch, runtime";
+static char                     *sort_order = default_sort_order;
+#define PR_SET_NAME             15               /* Set process name */
+#define MAX_CPUS                4096
+#define BUG_ON(x)               assert(!(x))
+static u64                      run_measurement_overhead;
+static u64                      sleep_measurement_overhead;
+#define COMM_LEN                20
+#define SYM_LEN                 129
+#define MAX_PID                 65536
+static unsigned long            nr_tasks;
+struct sched_atom;
+struct task_desc {
+        unsigned long           nr;
+        unsigned long           pid;
+        char                    comm[COMM_LEN];
+        unsigned long           nr_events;
+        unsigned long           curr_event;
+        struct sched_atom       **atoms;
+        pthread_t               thread;
+        sem_t                   sleep_sem;
+        sem_t                   ready_for_work;
+        sem_t                   work_done_sem;
+        u64                     cpu_usage;
+};
+enum sched_event_type {
+        SCHED_EVENT_RUN,
+        SCHED_EVENT_SLEEP,
+        SCHED_EVENT_WAKEUP,
+};
+struct sched_atom {
+        enum sched_event_type   type;
+        u64                     timestamp;
+        u64                     duration;
+        unsigned long           nr;
+        int                     specific_wait;
+        sem_t                   *wait_sem;
+        struct task_desc        *wakee;
+};
+static struct task_desc         *pid_to_task[MAX_PID];
+static struct task_desc         **tasks;
+static pthread_mutex_t          start_work_mutex = PTHREAD_MUTEX_INITIALIZER;
+static u64                      start_time;
+static pthread_mutex_t          work_done_wait_mutex = PTHREAD_MUTEX_INITIALIZER;
+static unsigned long            nr_run_events;
+static unsigned long            nr_sleep_events;
+static unsigned long            nr_wakeup_events;
+static unsigned long            nr_sleep_corrections;
+static unsigned long            nr_run_events_optimized;
+static unsigned long            targetless_wakeups;
+static unsigned long            multitarget_wakeups;
+static u64                      cpu_usage;
+static u64                      runavg_cpu_usage;
+static u64                      parent_cpu_usage;
+static u64                      runavg_parent_cpu_usage;
+static unsigned long            nr_runs;
+static u64                      sum_runtime;
+static u64                      sum_fluct;
+static u64                      run_avg;
+static unsigned long            replay_repeat = 10;
+static unsigned long            nr_timestamps;
+static unsigned long            nr_unordered_timestamps;
+static unsigned long            nr_state_machine_bugs;
+static unsigned long            nr_context_switch_bugs;
+static unsigned long            nr_events;
+static unsigned long            nr_lost_chunks;
+static unsigned long            nr_lost_events;
+#define TASK_STATE_TO_CHAR_STR "RSDTtZX"
+enum thread_state {
+        THREAD_SLEEPING = 0,
+        THREAD_WAIT_CPU,
+        THREAD_SCHED_IN,
+        THREAD_IGNORE
+};
+struct work_atom {
+        struct list_head        list;
+        enum thread_state       state;
+        u64                     sched_out_time;
+        u64                     wake_up_time;
+        u64                     sched_in_time;
+        u64                     runtime;
+};
+struct work_atoms {
+        struct list_head        work_list;
+        struct thread           *thread;
+        struct rb_node          node;
+        u64                     max_lat;
+        u64                     total_lat;
+        u64                     nb_atoms;
+        u64                     total_runtime;
+};
+typedef int (*sort_fn_t)(struct work_atoms *, struct work_atoms *);
+static struct rb_root           atom_root, sorted_atom_root;
+static u64                      all_runtime;
+static u64                      all_count;
+static u64 get_nsecs(void)
+{
+        struct timespec ts;
+        clock_gettime(CLOCK_MONOTONIC, &ts);
+        return ts.tv_sec * 1000000000ULL + ts.tv_nsec;
+}
+static void burn_nsecs(u64 nsecs)
+{
+        u64 T0 = get_nsecs(), T1;
+        do {
+                T1 = get_nsecs();
+        } while (T1 + run_measurement_overhead < T0 + nsecs);
+}
+static void sleep_nsecs(u64 nsecs)
+{
+        struct timespec ts;
+        ts.tv_nsec = nsecs % 999999999;
+        ts.tv_sec = nsecs / 999999999;
+        nanosleep(&ts, NULL);
+}
+static void calibrate_run_measurement_overhead(void)
+{
+        u64 T0, T1, delta, min_delta = 1000000000ULL;
+        int i;
+        for (i = 0; i < 10; i++) {
+                T0 = get_nsecs();
+                burn_nsecs(0);
+                T1 = get_nsecs();
+                delta = T1-T0;
+                min_delta = min(min_delta, delta);
+        }
+        run_measurement_overhead = min_delta;
+        printf("run measurement overhead: %Ld nsecs\n", min_delta);
+}
+static void calibrate_sleep_measurement_overhead(void)
+{
+        u64 T0, T1, delta, min_delta = 1000000000ULL;
+        int i;
+        for (i = 0; i < 10; i++) {
+                T0 = get_nsecs();
+                sleep_nsecs(10000);
+                T1 = get_nsecs();
+                delta = T1-T0;
+                min_delta = min(min_delta, delta);
+        }
+        min_delta -= 10000;
+        sleep_measurement_overhead = min_delta;
+        printf("sleep measurement overhead: %Ld nsecs\n", min_delta);
+}
+static struct sched_atom *
+get_new_event(struct task_desc *task, u64 timestamp)
+{
+        struct sched_atom *event = calloc(1, sizeof(*event));
+        unsigned long idx = task->nr_events;
+        size_t size;
+        event->timestamp = timestamp;
+        event->nr = idx;
+        task->nr_events++;
+        size = sizeof(struct sched_atom *) * task->nr_events;
+        task->atoms = realloc(task->atoms, size);
+        BUG_ON(!task->atoms);
+        task->atoms[idx] = event;
+        return event;
+}
+static struct sched_atom *last_event(struct task_desc *task)
+{
+        if (!task->nr_events)
+                return NULL;
+        return task->atoms[task->nr_events - 1];
+}
+static void
+add_sched_event_run(struct task_desc *task, u64 timestamp, u64 duration)
+{
+        struct sched_atom *event, *curr_event = last_event(task);
+        /*
+         * optimize an existing RUN event by merging this one
+         * to it:
+         */
+        if (curr_event && curr_event->type == SCHED_EVENT_RUN) {
+                nr_run_events_optimized++;
+                curr_event->duration += duration;
+                return;
+        }
+        event = get_new_event(task, timestamp);
+        event->type = SCHED_EVENT_RUN;
+        event->duration = duration;
+        nr_run_events++;
+}
+static void
+add_sched_event_wakeup(struct task_desc *task, u64 timestamp,
+                       struct task_desc *wakee)
+{
+        struct sched_atom *event, *wakee_event;
+        event = get_new_event(task, timestamp);
+        event->type = SCHED_EVENT_WAKEUP;
+        event->wakee = wakee;
+        wakee_event = last_event(wakee);
+        if (!wakee_event || wakee_event->type != SCHED_EVENT_SLEEP) {
+                targetless_wakeups++;
+                return;
+        }
+        if (wakee_event->wait_sem) {
+                multitarget_wakeups++;
+                return;
+        }
+        wakee_event->wait_sem = calloc(1, sizeof(*wakee_event->wait_sem));
+        sem_init(wakee_event->wait_sem, 0, 0);
+        wakee_event->specific_wait = 1;
+        event->wait_sem = wakee_event->wait_sem;
+        nr_wakeup_events++;
+}
+static void
+add_sched_event_sleep(struct task_desc *task, u64 timestamp,
+                      u64 task_state __used)
+{
+        struct sched_atom *event = get_new_event(task, timestamp);
+        event->type = SCHED_EVENT_SLEEP;
+        nr_sleep_events++;
+}
+static struct task_desc *register_pid(unsigned long pid, const char *comm)
+{
+        struct task_desc *task;
+        BUG_ON(pid >= MAX_PID);
+        task = pid_to_task[pid];
+        if (task)
+                return task;
+        task = calloc(1, sizeof(*task));
+        task->pid = pid;
+        task->nr = nr_tasks;
+        strcpy(task->comm, comm);
+        /*
+         * every task starts in sleeping state - this gets ignored
+         * if there's no wakeup pointing to this sleep state:
+         */
+        add_sched_event_sleep(task, 0, 0);
+        pid_to_task[pid] = task;
+        nr_tasks++;
+        tasks = realloc(tasks, nr_tasks*sizeof(struct task_task *));
+        BUG_ON(!tasks);
+        tasks[task->nr] = task;
+        if (verbose)
+                printf("registered task #%ld, PID %ld (%s)\n", nr_tasks, pid, comm);
+        return task;
+}
+static void print_task_traces(void)
+{
+        struct task_desc *task;
+        unsigned long i;
+        for (i = 0; i < nr_tasks; i++) {
+                task = tasks[i];
+                printf("task %6ld (%20s:%10ld), nr_events: %ld\n",
+                        task->nr, task->comm, task->pid, task->nr_events);
+        }
+}
+static void add_cross_task_wakeups(void)
+{
+        struct task_desc *task1, *task2;
+        unsigned long i, j;
+        for (i = 0; i < nr_tasks; i++) {
+                task1 = tasks[i];
+                j = i + 1;
+                if (j == nr_tasks)
+                        j = 0;
+                task2 = tasks[j];
+                add_sched_event_wakeup(task1, 0, task2);
+        }
+}
+static void
+process_sched_event(struct task_desc *this_task __used, struct sched_atom *atom)
+{
+        int ret = 0;
+        u64 now;
+        long long delta;
+        now = get_nsecs();
+        delta = start_time + atom->timestamp - now;
+        switch (atom->type) {
+                case SCHED_EVENT_RUN:
+                        burn_nsecs(atom->duration);
+                        break;
+                case SCHED_EVENT_SLEEP:
+                        if (atom->wait_sem)
+                                ret = sem_wait(atom->wait_sem);
+                        BUG_ON(ret);
+                        break;
+                case SCHED_EVENT_WAKEUP:
+                        if (atom->wait_sem)
+                                ret = sem_post(atom->wait_sem);
+                        BUG_ON(ret);
+                        break;
+                default:
+                        BUG_ON(1);
+        }
+}
+static u64 get_cpu_usage_nsec_parent(void)
+{
+        struct rusage ru;
+        u64 sum;
+        int err;
+        err = getrusage(RUSAGE_SELF, &ru);
+        BUG_ON(err);
+        sum =  ru.ru_utime.tv_sec*1e9 + ru.ru_utime.tv_usec*1e3;
+        sum += ru.ru_stime.tv_sec*1e9 + ru.ru_stime.tv_usec*1e3;
+        return sum;
+}
+static u64 get_cpu_usage_nsec_self(void)
+{
+        char filename [] = "/proc/1234567890/sched";
+        unsigned long msecs, nsecs;
+        char *line = NULL;
+        u64 total = 0;
+        size_t len = 0;
+        ssize_t chars;
+        FILE *file;
+        int ret;
+        sprintf(filename, "/proc/%d/sched", getpid());
+        file = fopen(filename, "r");
+        BUG_ON(!file);
+        while ((chars = getline(&line, &len, file)) != -1) {
+                ret = sscanf(line, "se.sum_exec_runtime : %ld.%06ld\n",
+                        &msecs, &nsecs);
+                if (ret == 2) {
+                        total = msecs*1e6 + nsecs;
+                        break;
+                }
+        }
+        if (line)
+                free(line);
+        fclose(file);
+        return total;
+}
+static void *thread_func(void *ctx)
+{
+        struct task_desc *this_task = ctx;
+        u64 cpu_usage_0, cpu_usage_1;
+        unsigned long i, ret;
+        char comm2[22];
+        sprintf(comm2, ":%s", this_task->comm);
+        prctl(PR_SET_NAME, comm2);
+again:
+        ret = sem_post(&this_task->ready_for_work);
+        BUG_ON(ret);
+        ret = pthread_mutex_lock(&start_work_mutex);
+        BUG_ON(ret);
+        ret = pthread_mutex_unlock(&start_work_mutex);
+        BUG_ON(ret);
+        cpu_usage_0 = get_cpu_usage_nsec_self();
+        for (i = 0; i < this_task->nr_events; i++) {
+                this_task->curr_event = i;
+                process_sched_event(this_task, this_task->atoms[i]);
+        }
+        cpu_usage_1 = get_cpu_usage_nsec_self();
+        this_task->cpu_usage = cpu_usage_1 - cpu_usage_0;
+        ret = sem_post(&this_task->work_done_sem);
+        BUG_ON(ret);
+        ret = pthread_mutex_lock(&work_done_wait_mutex);
+        BUG_ON(ret);
+        ret = pthread_mutex_unlock(&work_done_wait_mutex);
+        BUG_ON(ret);
+        goto again;
+}
+static void create_tasks(void)
+{
+        struct task_desc *task;
+        pthread_attr_t attr;
+        unsigned long i;
+        int err;
+        err = pthread_attr_init(&attr);
+        BUG_ON(err);
+        err = pthread_attr_setstacksize(&attr, (size_t)(16*1024));
+        BUG_ON(err);
+        err = pthread_mutex_lock(&start_work_mutex);
+        BUG_ON(err);
+        err = pthread_mutex_lock(&work_done_wait_mutex);
+        BUG_ON(err);
+        for (i = 0; i < nr_tasks; i++) {
+                task = tasks[i];
+                sem_init(&task->sleep_sem, 0, 0);
+                sem_init(&task->ready_for_work, 0, 0);
+                sem_init(&task->work_done_sem, 0, 0);
+                task->curr_event = 0;
+                err = pthread_create(&task->thread, &attr, thread_func, task);
+                BUG_ON(err);
+        }
+}
+static void wait_for_tasks(void)
+{
+        u64 cpu_usage_0, cpu_usage_1;
+        struct task_desc *task;
+        unsigned long i, ret;
+        start_time = get_nsecs();
+        cpu_usage = 0;
+        pthread_mutex_unlock(&work_done_wait_mutex);
+        for (i = 0; i < nr_tasks; i++) {
+                task = tasks[i];
+                ret = sem_wait(&task->ready_for_work);
+                BUG_ON(ret);
+                sem_init(&task->ready_for_work, 0, 0);
+        }
+        ret = pthread_mutex_lock(&work_done_wait_mutex);
+        BUG_ON(ret);
+        cpu_usage_0 = get_cpu_usage_nsec_parent();
+        pthread_mutex_unlock(&start_work_mutex);
+        for (i = 0; i < nr_tasks; i++) {
+                task = tasks[i];
+                ret = sem_wait(&task->work_done_sem);
+                BUG_ON(ret);
+                sem_init(&task->work_done_sem, 0, 0);
+                cpu_usage += task->cpu_usage;
+                task->cpu_usage = 0;
+        }
+        cpu_usage_1 = get_cpu_usage_nsec_parent();
+        if (!runavg_cpu_usage)
+                runavg_cpu_usage = cpu_usage;
+        runavg_cpu_usage = (runavg_cpu_usage*9 + cpu_usage)/10;
+        parent_cpu_usage = cpu_usage_1 - cpu_usage_0;
+        if (!runavg_parent_cpu_usage)
+                runavg_parent_cpu_usage = parent_cpu_usage;
+        runavg_parent_cpu_usage = (runavg_parent_cpu_usage*9 +
+                                   parent_cpu_usage)/10;
+        ret = pthread_mutex_lock(&start_work_mutex);
+        BUG_ON(ret);
+        for (i = 0; i < nr_tasks; i++) {
+                task = tasks[i];
+                sem_init(&task->sleep_sem, 0, 0);
+                task->curr_event = 0;
+        }
+}
+static void run_one_test(void)
+{
+        u64 T0, T1, delta, avg_delta, fluct, std_dev;
+        T0 = get_nsecs();
+        wait_for_tasks();
+        T1 = get_nsecs();
+        delta = T1 - T0;
+        sum_runtime += delta;
+        nr_runs++;
+        avg_delta = sum_runtime / nr_runs;
+        if (delta < avg_delta)
+                fluct = avg_delta - delta;
+        else
+                fluct = delta - avg_delta;
+        sum_fluct += fluct;
+        std_dev = sum_fluct / nr_runs / sqrt(nr_runs);
+        if (!run_avg)
+                run_avg = delta;
+        run_avg = (run_avg*9 + delta)/10;
+        printf("#%-3ld: %0.3f, ",
+                nr_runs, (double)delta/1000000.0);
+        printf("ravg: %0.2f, ",
+                (double)run_avg/1e6);
+        printf("cpu: %0.2f / %0.2f",
+                (double)cpu_usage/1e6, (double)runavg_cpu_usage/1e6);
+#if 0
+        /*
+         * rusage statistics done by the parent, these are less
+         * accurate than the sum_exec_runtime based statistics:
+         */
+        printf(" [%0.2f / %0.2f]",
+                (double)parent_cpu_usage/1e6,
+                (double)runavg_parent_cpu_usage/1e6);
+#endif
+        printf("\n");
+        if (nr_sleep_corrections)
+                printf(" (%ld sleep corrections)\n", nr_sleep_corrections);
+        nr_sleep_corrections = 0;
+}
+static void test_calibrations(void)
+{
+        u64 T0, T1;
+        T0 = get_nsecs();
+        burn_nsecs(1e6);
+        T1 = get_nsecs();
+        printf("the run test took %Ld nsecs\n", T1-T0);
+        T0 = get_nsecs();
+        sleep_nsecs(1e6);
+        T1 = get_nsecs();
+        printf("the sleep test took %Ld nsecs\n", T1-T0);
+}
+static int
+process_comm_event(event_t *event, unsigned long offset, unsigned long head)
+{
+        struct thread *thread;
+        thread = threads__findnew(event->comm.pid, &threads, &last_match);
+        dump_printf("%p [%p]: perf_event_comm: %s:%d\n",
+                (void *)(offset + head),
+                (void *)(long)(event->header.size),
+                event->comm.comm, event->comm.pid);
+        if (thread == NULL ||
+            thread__set_comm(thread, event->comm.comm)) {
+                dump_printf("problem processing perf_event_comm, skipping event.\n");
+                return -1;
+        }
+        total_comm++;
+        return 0;
+}
+struct raw_event_sample {
+        u32 size;
+        char data[0];
+};
+#define FILL_FIELD(ptr, field, event, data)     \
+        ptr.field = (typeof(ptr.field)) raw_field_value(event, #field, data)
+#define FILL_ARRAY(ptr, array, event, data)                     \
+do {                                                            \
+        void *__array = raw_field_ptr(event, #array, data);     \
+        memcpy(ptr.array, __array, sizeof(ptr.array));  \
+} while(0)
+#define FILL_COMMON_FIELDS(ptr, event, data)                    \
+do {                                                            \
+        FILL_FIELD(ptr, common_type, event, data);              \
+        FILL_FIELD(ptr, common_flags, event, data);             \
+        FILL_FIELD(ptr, common_preempt_count, event, data);     \
+        FILL_FIELD(ptr, common_pid, event, data);               \
+        FILL_FIELD(ptr, common_tgid, event, data);              \
+} while (0)
+struct trace_switch_event {
+        u32 size;
+        u16 common_type;
+        u8 common_flags;
+        u8 common_preempt_count;
+        u32 common_pid;
+        u32 common_tgid;
+        char prev_comm[16];
+        u32 prev_pid;
+        u32 prev_prio;
+        u64 prev_state;
+        char next_comm[16];
+        u32 next_pid;
+        u32 next_prio;
+};
+struct trace_runtime_event {
+        u32 size;
+        u16 common_type;
+        u8 common_flags;
+        u8 common_preempt_count;
+        u32 common_pid;
+        u32 common_tgid;
+        char comm[16];
+        u32 pid;
+        u64 runtime;
+        u64 vruntime;
+};
+struct trace_wakeup_event {
+        u32 size;
+        u16 common_type;
+        u8 common_flags;
+        u8 common_preempt_count;
+        u32 common_pid;
+        u32 common_tgid;
+        char comm[16];
+        u32 pid;
+        u32 prio;
+        u32 success;
+        u32 cpu;
+};
+struct trace_fork_event {
+        u32 size;
+        u16 common_type;
+        u8 common_flags;
+        u8 common_preempt_count;
+        u32 common_pid;
+        u32 common_tgid;
+        char parent_comm[16];
+        u32 parent_pid;
+        char child_comm[16];
+        u32 child_pid;
+};
+struct trace_sched_handler {
+        void (*switch_event)(struct trace_switch_event *,
+                             struct event *,
+                             int cpu,
+                             u64 timestamp,
+                             struct thread *thread);
+        void (*runtime_event)(struct trace_runtime_event *,
+                              struct event *,
+                              int cpu,
+                              u64 timestamp,
+                              struct thread *thread);
+        void (*wakeup_event)(struct trace_wakeup_event *,
+                             struct event *,
+                             int cpu,
+                             u64 timestamp,
+                             struct thread *thread);
+        void (*fork_event)(struct trace_fork_event *,
+                           struct event *,
+                           int cpu,
+                           u64 timestamp,
+                           struct thread *thread);
+};
+static void
+replay_wakeup_event(struct trace_wakeup_event *wakeup_event,
+                    struct event *event,
+                    int cpu __used,
+                    u64 timestamp __used,
+                    struct thread *thread __used)
+{
+        struct task_desc *waker, *wakee;
+        if (verbose) {
+                printf("sched_wakeup event %p\n", event);
+                printf(" ... pid %d woke up %s/%d\n",
+                        wakeup_event->common_pid,
+                        wakeup_event->comm,
+                        wakeup_event->pid);
+        }
+        waker = register_pid(wakeup_event->common_pid, "<unknown>");
+        wakee = register_pid(wakeup_event->pid, wakeup_event->comm);
+        add_sched_event_wakeup(waker, timestamp, wakee);
+}
+static u64 cpu_last_switched[MAX_CPUS];
+static void
+replay_switch_event(struct trace_switch_event *switch_event,
+                    struct event *event,
+                    int cpu,
+                    u64 timestamp,
+                    struct thread *thread __used)
+{
+        struct task_desc *prev, *next;
+        u64 timestamp0;
+        s64 delta;
+        if (verbose)
+                printf("sched_switch event %p\n", event);
+        if (cpu >= MAX_CPUS || cpu < 0)
+                return;
+        timestamp0 = cpu_last_switched[cpu];
+        if (timestamp0)
+                delta = timestamp - timestamp0;
+        else
+                delta = 0;
+        if (delta < 0)
+                die("hm, delta: %Ld < 0 ?\n", delta);
+        if (verbose) {
+                printf(" ... switch from %s/%d to %s/%d [ran %Ld nsecs]\n",
+                        switch_event->prev_comm, switch_event->prev_pid,
+                        switch_event->next_comm, switch_event->next_pid,
+                        delta);
+        }
+        prev = register_pid(switch_event->prev_pid, switch_event->prev_comm);
+        next = register_pid(switch_event->next_pid, switch_event->next_comm);
+        cpu_last_switched[cpu] = timestamp;
+        add_sched_event_run(prev, timestamp, delta);
+        add_sched_event_sleep(prev, timestamp, switch_event->prev_state);
+}
+static void
+replay_fork_event(struct trace_fork_event *fork_event,
+                  struct event *event,
+                  int cpu __used,
+                  u64 timestamp __used,
+                  struct thread *thread __used)
+{
+        if (verbose) {
+                printf("sched_fork event %p\n", event);
+                printf("... parent: %s/%d\n", fork_event->parent_comm, fork_event->parent_pid);
+                printf("...  child: %s/%d\n", fork_event->child_comm, fork_event->child_pid);
+        }
+        register_pid(fork_event->parent_pid, fork_event->parent_comm);
+        register_pid(fork_event->child_pid, fork_event->child_comm);
+}
+static struct trace_sched_handler replay_ops  = {
+        .wakeup_event           = replay_wakeup_event,
+        .switch_event           = replay_switch_event,
+        .fork_event             = replay_fork_event,
+};
+struct sort_dimension {
+        const char              *name;
+        sort_fn_t               cmp;
+        struct list_head        list;
+};
+static LIST_HEAD(cmp_pid);
+static int
+thread_lat_cmp(struct list_head *list, struct work_atoms *l, struct work_atoms *r)
+{
+        struct sort_dimension *sort;
+        int ret = 0;
+        BUG_ON(list_empty(list));
+        list_for_each_entry(sort, list, list) {
+                ret = sort->cmp(l, r);
+                if (ret)
+                        return ret;
+        }
+        return ret;
+}
+static struct work_atoms *
+thread_atoms_search(struct rb_root *root, struct thread *thread,
+                         struct list_head *sort_list)
+{
+        struct rb_node *node = root->rb_node;
+        struct work_atoms key = { .thread = thread };
+        while (node) {
+                struct work_atoms *atoms;
+                int cmp;
+                atoms = container_of(node, struct work_atoms, node);
+                cmp = thread_lat_cmp(sort_list, &key, atoms);
+                if (cmp > 0)
+                        node = node->rb_left;
+                else if (cmp < 0)
+                        node = node->rb_right;
+                else {
+                        BUG_ON(thread != atoms->thread);
+                        return atoms;
+                }
+        }
+        return NULL;
+}
+static void
+__thread_latency_insert(struct rb_root *root, struct work_atoms *data,
+                         struct list_head *sort_list)
+{
+        struct rb_node **new = &(root->rb_node), *parent = NULL;
+        while (*new) {
+                struct work_atoms *this;
+                int cmp;
+                this = container_of(*new, struct work_atoms, node);
+                parent = *new;
+                cmp = thread_lat_cmp(sort_list, data, this);
+                if (cmp > 0)
+                        new = &((*new)->rb_left);
+                else
+                        new = &((*new)->rb_right);
+        }
+        rb_link_node(&data->node, parent, new);
+        rb_insert_color(&data->node, root);
+}
+static void thread_atoms_insert(struct thread *thread)
+{
+        struct work_atoms *atoms;
+        atoms = calloc(sizeof(*atoms), 1);
+        if (!atoms)
+                die("No memory");
+        atoms->thread = thread;
+        INIT_LIST_HEAD(&atoms->work_list);
+        __thread_latency_insert(&atom_root, atoms, &cmp_pid);
+}
+static void
+latency_fork_event(struct trace_fork_event *fork_event __used,
+                   struct event *event __used,
+                   int cpu __used,
+                   u64 timestamp __used,
+                   struct thread *thread __used)
+{
+        /* should insert the newcomer */
+}
+__used
+static char sched_out_state(struct trace_switch_event *switch_event)
+{
+        const char *str = TASK_STATE_TO_CHAR_STR;
+        return str[switch_event->prev_state];
+}
+static void
+add_sched_out_event(struct work_atoms *atoms,
+                    char run_state,
+                    u64 timestamp)
+{
+        struct work_atom *atom;
+        atom = calloc(sizeof(*atom), 1);
+        if (!atom)
+                die("Non memory");
+        atom->sched_out_time = timestamp;
+        if (run_state == 'R') {
+                atom->state = THREAD_WAIT_CPU;
+                atom->wake_up_time = atom->sched_out_time;
+        }
+        list_add_tail(&atom->list, &atoms->work_list);
+}
+static void
+add_runtime_event(struct work_atoms *atoms, u64 delta, u64 timestamp __used)
+{
+        struct work_atom *atom;
+        BUG_ON(list_empty(&atoms->work_list));
+        atom = list_entry(atoms->work_list.prev, struct work_atom, list);
+        atom->runtime += delta;
+        atoms->total_runtime += delta;
+}
+static void
+add_sched_in_event(struct work_atoms *atoms, u64 timestamp)
+{
+        struct work_atom *atom;
+        u64 delta;
+        if (list_empty(&atoms->work_list))
+                return;
+        atom = list_entry(atoms->work_list.prev, struct work_atom, list);
+        if (atom->state != THREAD_WAIT_CPU)
+                return;
+        if (timestamp < atom->wake_up_time) {
+                atom->state = THREAD_IGNORE;
+                return;
+        }
+        atom->state = THREAD_SCHED_IN;
+        atom->sched_in_time = timestamp;
+        delta = atom->sched_in_time - atom->wake_up_time;
+        atoms->total_lat += delta;
+        if (delta > atoms->max_lat)
+                atoms->max_lat = delta;
+        atoms->nb_atoms++;
+}
+static void
+latency_switch_event(struct trace_switch_event *switch_event,
+                     struct event *event __used,
+                     int cpu,
+                     u64 timestamp,
+                     struct thread *thread __used)
+{
+        struct work_atoms *out_events, *in_events;
+        struct thread *sched_out, *sched_in;
+        u64 timestamp0;
+        s64 delta;
+        BUG_ON(cpu >= MAX_CPUS || cpu < 0);
+        timestamp0 = cpu_last_switched[cpu];
+        cpu_last_switched[cpu] = timestamp;
+        if (timestamp0)
+                delta = timestamp - timestamp0;
+        else
+                delta = 0;
+        if (delta < 0)
+                die("hm, delta: %Ld < 0 ?\n", delta);
+        sched_out = threads__findnew(switch_event->prev_pid, &threads, &last_match);
+        sched_in = threads__findnew(switch_event->next_pid, &threads, &last_match);
+        out_events = thread_atoms_search(&atom_root, sched_out, &cmp_pid);
+        if (!out_events) {
+                thread_atoms_insert(sched_out);
+                out_events = thread_atoms_search(&atom_root, sched_out, &cmp_pid);
+                if (!out_events)
+                        die("out-event: Internal tree error");
+        }
+        add_sched_out_event(out_events, sched_out_state(switch_event), timestamp);
+        in_events = thread_atoms_search(&atom_root, sched_in, &cmp_pid);
+        if (!in_events) {
+                thread_atoms_insert(sched_in);
+                in_events = thread_atoms_search(&atom_root, sched_in, &cmp_pid);
+                if (!in_events)
+                        die("in-event: Internal tree error");
+                /*
+                 * Take came in we have not heard about yet,
+                 * add in an initial atom in runnable state:
+                 */
+                add_sched_out_event(in_events, 'R', timestamp);
+        }
+        add_sched_in_event(in_events, timestamp);
+}
+static void
+latency_runtime_event(struct trace_runtime_event *runtime_event,
+                     struct event *event __used,
+                     int cpu,
+                     u64 timestamp,
+                     struct thread *this_thread __used)
+{
+        struct work_atoms *atoms;
+        struct thread *thread;
+        BUG_ON(cpu >= MAX_CPUS || cpu < 0);
+        thread = threads__findnew(runtime_event->pid, &threads, &last_match);
+        atoms = thread_atoms_search(&atom_root, thread, &cmp_pid);
+        if (!atoms) {
+                thread_atoms_insert(thread);
+                atoms = thread_atoms_search(&atom_root, thread, &cmp_pid);
+                if (!atoms)
+                        die("in-event: Internal tree error");
+                add_sched_out_event(atoms, 'R', timestamp);
+        }
+        add_runtime_event(atoms, runtime_event->runtime, timestamp);
+}
+static void
+latency_wakeup_event(struct trace_wakeup_event *wakeup_event,
+                     struct event *__event __used,
+                     int cpu __used,
+                     u64 timestamp,
+                     struct thread *thread __used)
+{
+        struct work_atoms *atoms;
+        struct work_atom *atom;
+        struct thread *wakee;
+        /* Note for later, it may be interesting to observe the failing cases */
+        if (!wakeup_event->success)
+                return;
+        wakee = threads__findnew(wakeup_event->pid, &threads, &last_match);
+        atoms = thread_atoms_search(&atom_root, wakee, &cmp_pid);
+        if (!atoms) {
+                thread_atoms_insert(wakee);
+                atoms = thread_atoms_search(&atom_root, wakee, &cmp_pid);
+                if (!atoms)
+                        die("wakeup-event: Internal tree error");
+                add_sched_out_event(atoms, 'S', timestamp);
+        }
+        BUG_ON(list_empty(&atoms->work_list));
+        atom = list_entry(atoms->work_list.prev, struct work_atom, list);
+        if (atom->state != THREAD_SLEEPING)
+                nr_state_machine_bugs++;
+        nr_timestamps++;
+        if (atom->sched_out_time > timestamp) {
+                nr_unordered_timestamps++;
+                return;
+        }
+        atom->state = THREAD_WAIT_CPU;
+        atom->wake_up_time = timestamp;
+}
+static struct trace_sched_handler lat_ops  = {
+        .wakeup_event           = latency_wakeup_event,
+        .switch_event           = latency_switch_event,
+        .runtime_event          = latency_runtime_event,
+        .fork_event             = latency_fork_event,
+};
+static void output_lat_thread(struct work_atoms *work_list)
+{
+        int i;
+        int ret;
+        u64 avg;
+        if (!work_list->nb_atoms)
+                return;
+        /*
+         * Ignore idle threads:
+         */
+        if (!strcmp(work_list->thread->comm, "swapper"))
+                return;
+        all_runtime += work_list->total_runtime;
+        all_count += work_list->nb_atoms;
+        ret = printf("  %s:%d ", work_list->thread->comm, work_list->thread->pid);
+        for (i = 0; i < 24 - ret; i++)
+                printf(" ");
+        avg = work_list->total_lat / work_list->nb_atoms;
+        printf("|%11.3f ms |%9llu | avg:%9.3f ms | max:%9.3f ms |\n",
+              (double)work_list->total_runtime / 1e6,
+                 work_list->nb_atoms, (double)avg / 1e6,
+                 (double)work_list->max_lat / 1e6);
+}
+static int pid_cmp(struct work_atoms *l, struct work_atoms *r)
+{
+        if (l->thread->pid < r->thread->pid)
+                return -1;
+        if (l->thread->pid > r->thread->pid)
+                return 1;
+        return 0;
+}
+static struct sort_dimension pid_sort_dimension = {
+        .name                   = "pid",
+        .cmp                    = pid_cmp,
+};
+static int avg_cmp(struct work_atoms *l, struct work_atoms *r)
+{
+        u64 avgl, avgr;
+        if (!l->nb_atoms)
+                return -1;
+        if (!r->nb_atoms)
+                return 1;
+        avgl = l->total_lat / l->nb_atoms;
+        avgr = r->total_lat / r->nb_atoms;
+        if (avgl < avgr)
+                return -1;
+        if (avgl > avgr)
+                return 1;
+        return 0;
+}
+static struct sort_dimension avg_sort_dimension = {
+        .name                   = "avg",
+        .cmp                    = avg_cmp,
+};
+static int max_cmp(struct work_atoms *l, struct work_atoms *r)
+{
+        if (l->max_lat < r->max_lat)
+                return -1;
+        if (l->max_lat > r->max_lat)
+                return 1;
+        return 0;
+}
+static struct sort_dimension max_sort_dimension = {
+        .name                   = "max",
+        .cmp                    = max_cmp,
+};
+static int switch_cmp(struct work_atoms *l, struct work_atoms *r)
+{
+        if (l->nb_atoms < r->nb_atoms)
+                return -1;
+        if (l->nb_atoms > r->nb_atoms)
+                return 1;
+        return 0;
+}
+static struct sort_dimension switch_sort_dimension = {
+        .name                   = "switch",
+        .cmp                    = switch_cmp,
+};
+static int runtime_cmp(struct work_atoms *l, struct work_atoms *r)
+{
+        if (l->total_runtime < r->total_runtime)
+                return -1;
+        if (l->total_runtime > r->total_runtime)
+                return 1;
+        return 0;
+}
+static struct sort_dimension runtime_sort_dimension = {
+        .name                   = "runtime",
+        .cmp                    = runtime_cmp,
+};
+static struct sort_dimension *available_sorts[] = {
+        &pid_sort_dimension,
+        &avg_sort_dimension,
+        &max_sort_dimension,
+        &switch_sort_dimension,
+        &runtime_sort_dimension,
+};
+#define NB_AVAILABLE_SORTS      (int)(sizeof(available_sorts) / sizeof(struct sort_dimension *))
+static LIST_HEAD(sort_list);
+static int sort_dimension__add(char *tok, struct list_head *list)
+{
+        int i;
+        for (i = 0; i < NB_AVAILABLE_SORTS; i++) {
+                if (!strcmp(available_sorts[i]->name, tok)) {
+                        list_add_tail(&available_sorts[i]->list, list);
+                        return 0;
+                }
+        }
+        return -1;
+}
+static void setup_sorting(void);
+static void sort_lat(void)
+{
+        struct rb_node *node;
+        for (;;) {
+                struct work_atoms *data;
+                node = rb_first(&atom_root);
+                if (!node)
+                        break;
+                rb_erase(node, &atom_root);
+                data = rb_entry(node, struct work_atoms, node);
+                __thread_latency_insert(&sorted_atom_root, data, &sort_list);
+        }
+}
+static struct trace_sched_handler *trace_handler;
+static void
+process_sched_wakeup_event(struct raw_event_sample *raw,
+                           struct event *event,
+                           int cpu __used,
+                           u64 timestamp __used,
+                           struct thread *thread __used)
+{
+        struct trace_wakeup_event wakeup_event;
+        FILL_COMMON_FIELDS(wakeup_event, event, raw->data);
+        FILL_ARRAY(wakeup_event, comm, event, raw->data);
+        FILL_FIELD(wakeup_event, pid, event, raw->data);
+        FILL_FIELD(wakeup_event, prio, event, raw->data);
+        FILL_FIELD(wakeup_event, success, event, raw->data);
+        FILL_FIELD(wakeup_event, cpu, event, raw->data);
+        if (trace_handler->wakeup_event)
+                trace_handler->wakeup_event(&wakeup_event, event, cpu, timestamp, thread);
+}
+/*
+ * Track the current task - that way we can know whether there's any
+ * weird events, such as a task being switched away that is not current.
+ */
+static int max_cpu;
+static u32 curr_pid[MAX_CPUS] = { [0 ... MAX_CPUS-1] = -1 };
+static struct thread *curr_thread[MAX_CPUS];
+static char next_shortname1 = 'A';
+static char next_shortname2 = '0';
+static void
+map_switch_event(struct trace_switch_event *switch_event,
+                 struct event *event __used,
+                 int this_cpu,
+                 u64 timestamp,
+                 struct thread *thread __used)
+{
+        struct thread *sched_out, *sched_in;
+        int new_shortname;
+        u64 timestamp0;
+        s64 delta;
+        int cpu;
+        BUG_ON(this_cpu >= MAX_CPUS || this_cpu < 0);
+        if (this_cpu > max_cpu)
+                max_cpu = this_cpu;
+        timestamp0 = cpu_last_switched[this_cpu];
+        cpu_last_switched[this_cpu] = timestamp;
+        if (timestamp0)
+                delta = timestamp - timestamp0;
+        else
+                delta = 0;
+        if (delta < 0)
+                die("hm, delta: %Ld < 0 ?\n", delta);
+        sched_out = threads__findnew(switch_event->prev_pid, &threads, &last_match);
+        sched_in = threads__findnew(switch_event->next_pid, &threads, &last_match);
+        curr_thread[this_cpu] = sched_in;
+        printf("  ");
+        new_shortname = 0;
+        if (!sched_in->shortname[0]) {
+                sched_in->shortname[0] = next_shortname1;
+                sched_in->shortname[1] = next_shortname2;
+                if (next_shortname1 < 'Z') {
+                        next_shortname1++;
+                } else {
+                        next_shortname1='A';
+                        if (next_shortname2 < '9') {
+                                next_shortname2++;
+                        } else {
+                                next_shortname2='0';
+                        }
+                }
+                new_shortname = 1;
+        }
+        for (cpu = 0; cpu <= max_cpu; cpu++) {
+                if (cpu != this_cpu)
+                        printf(" ");
+                else
+                        printf("*");
+                if (curr_thread[cpu]) {
+                        if (curr_thread[cpu]->pid)
+                                printf("%2s ", curr_thread[cpu]->shortname);
+                        else
+                                printf(".  ");
+                } else
+                        printf("   ");
+        }
+        printf("  %12.6f secs ", (double)timestamp/1e9);
+        if (new_shortname) {
+                printf("%s => %s:%d\n",
+                        sched_in->shortname, sched_in->comm, sched_in->pid);
+        } else {
+                printf("\n");
+        }
+}
+static void
+process_sched_switch_event(struct raw_event_sample *raw,
+                           struct event *event,
+                           int this_cpu,
+                           u64 timestamp __used,
+                           struct thread *thread __used)
+{
+        struct trace_switch_event switch_event;
+        FILL_COMMON_FIELDS(switch_event, event, raw->data);
+        FILL_ARRAY(switch_event, prev_comm, event, raw->data);
+        FILL_FIELD(switch_event, prev_pid, event, raw->data);
+        FILL_FIELD(switch_event, prev_prio, event, raw->data);
+        FILL_FIELD(switch_event, prev_state, event, raw->data);
+        FILL_ARRAY(switch_event, next_comm, event, raw->data);
+        FILL_FIELD(switch_event, next_pid, event, raw->data);
+        FILL_FIELD(switch_event, next_prio, event, raw->data);
+        if (curr_pid[this_cpu] != (u32)-1) {
+                /*
+                 * Are we trying to switch away a PID that is
+                 * not current?
+                 */
+                if (curr_pid[this_cpu] != switch_event.prev_pid)
+                        nr_context_switch_bugs++;
+        }
+        if (trace_handler->switch_event)
+                trace_handler->switch_event(&switch_event, event, this_cpu, timestamp, thread);
+        curr_pid[this_cpu] = switch_event.next_pid;
+}
+static void
+process_sched_runtime_event(struct raw_event_sample *raw,
+                           struct event *event,
+                           int cpu __used,
+                           u64 timestamp __used,
+                           struct thread *thread __used)
+{
+        struct trace_runtime_event runtime_event;
+        FILL_ARRAY(runtime_event, comm, event, raw->data);
+        FILL_FIELD(runtime_event, pid, event, raw->data);
+        FILL_FIELD(runtime_event, runtime, event, raw->data);
+        FILL_FIELD(runtime_event, vruntime, event, raw->data);
+        if (trace_handler->runtime_event)
+                trace_handler->runtime_event(&runtime_event, event, cpu, timestamp, thread);
+}
+static void
+process_sched_fork_event(struct raw_event_sample *raw,
+                         struct event *event,
+                         int cpu __used,
+                         u64 timestamp __used,
+                         struct thread *thread __used)
+{
+        struct trace_fork_event fork_event;
+        FILL_COMMON_FIELDS(fork_event, event, raw->data);
+        FILL_ARRAY(fork_event, parent_comm, event, raw->data);
+        FILL_FIELD(fork_event, parent_pid, event, raw->data);
+        FILL_ARRAY(fork_event, child_comm, event, raw->data);
+        FILL_FIELD(fork_event, child_pid, event, raw->data);
+        if (trace_handler->fork_event)
+                trace_handler->fork_event(&fork_event, event, cpu, timestamp, thread);
+}
+static void
+process_sched_exit_event(struct event *event,
+                         int cpu __used,
+                         u64 timestamp __used,
+                         struct thread *thread __used)
+{
+        if (verbose)
+                printf("sched_exit event %p\n", event);
+}
+static void
+process_raw_event(event_t *raw_event __used, void *more_data,
+                  int cpu, u64 timestamp, struct thread *thread)
+{
+        struct raw_event_sample *raw = more_data;
+        struct event *event;
+        int type;
+        type = trace_parse_common_type(raw->data);
+        event = trace_find_event(type);
+        if (!strcmp(event->name, "sched_switch"))
+                process_sched_switch_event(raw, event, cpu, timestamp, thread);
+        if (!strcmp(event->name, "sched_stat_runtime"))
+                process_sched_runtime_event(raw, event, cpu, timestamp, thread);
+        if (!strcmp(event->name, "sched_wakeup"))
+                process_sched_wakeup_event(raw, event, cpu, timestamp, thread);
+        if (!strcmp(event->name, "sched_wakeup_new"))
+                process_sched_wakeup_event(raw, event, cpu, timestamp, thread);
+        if (!strcmp(event->name, "sched_process_fork"))
+                process_sched_fork_event(raw, event, cpu, timestamp, thread);
+        if (!strcmp(event->name, "sched_process_exit"))
+                process_sched_exit_event(event, cpu, timestamp, thread);
+}
+static int
+process_sample_event(event_t *event, unsigned long offset, unsigned long head)
+{
+        char level;
+        int show = 0;
+        struct dso *dso = NULL;
+        struct thread *thread;
+        u64 ip = event->ip.ip;
+        u64 timestamp = -1;
+        u32 cpu = -1;
+        u64 period = 1;
+        void *more_data = event->ip.__more_data;
+        int cpumode;
+        thread = threads__findnew(event->ip.pid, &threads, &last_match);
+        if (sample_type & PERF_SAMPLE_TIME) {
+                timestamp = *(u64 *)more_data;
+                more_data += sizeof(u64);
+        }
+        if (sample_type & PERF_SAMPLE_CPU) {
+                cpu = *(u32 *)more_data;
+                more_data += sizeof(u32);
+                more_data += sizeof(u32); /* reserved */
+        }
+        if (sample_type & PERF_SAMPLE_PERIOD) {
+                period = *(u64 *)more_data;
+                more_data += sizeof(u64);
+        }
+        dump_printf("%p [%p]: PERF_EVENT_SAMPLE (IP, %d): %d/%d: %p period: %Ld\n",
+                (void *)(offset + head),
+                (void *)(long)(event->header.size),
+                event->header.misc,
+                event->ip.pid, event->ip.tid,
+                (void *)(long)ip,
+                (long long)period);
+        dump_printf(" ... thread: %s:%d\n", thread->comm, thread->pid);
+        if (thread == NULL) {
+                eprintf("problem processing %d event, skipping it.\n",
+                        event->header.type);
+                return -1;
+        }
+        cpumode = event->header.misc & PERF_EVENT_MISC_CPUMODE_MASK;
+        if (cpumode == PERF_EVENT_MISC_KERNEL) {
+                show = SHOW_KERNEL;
+                level = 'k';
+                dso = kernel_dso;
+                dump_printf(" ...... dso: %s\n", dso->name);
+        } else if (cpumode == PERF_EVENT_MISC_USER) {
+                show = SHOW_USER;
+                level = '.';
+        } else {
+                show = SHOW_HV;
+                level = 'H';
+                dso = hypervisor_dso;
+                dump_printf(" ...... dso: [hypervisor]\n");
+        }
+        if (sample_type & PERF_SAMPLE_RAW)
+                process_raw_event(event, more_data, cpu, timestamp, thread);
+        return 0;
+}
+static int
+process_event(event_t *event, unsigned long offset, unsigned long head)
+{
+        trace_event(event);
+        nr_events++;
+        switch (event->header.type) {
+        case PERF_EVENT_MMAP:
+                return 0;
+        case PERF_EVENT_LOST:
+                nr_lost_chunks++;
+                nr_lost_events += event->lost.lost;
+                return 0;
+        case PERF_EVENT_COMM:
+                return process_comm_event(event, offset, head);
+        case PERF_EVENT_EXIT ... PERF_EVENT_READ:
+                return 0;
+        case PERF_EVENT_SAMPLE:
+                return process_sample_event(event, offset, head);
+        case PERF_EVENT_MAX:
+        default:
+                return -1;
+        }
+        return 0;
+}
+static int read_events(void)
+{
+        int ret, rc = EXIT_FAILURE;
+        unsigned long offset = 0;
+        unsigned long head = 0;
+        struct stat perf_stat;
+        event_t *event;
+        uint32_t size;
+        char *buf;
+        trace_report();
+        register_idle_thread(&threads, &last_match);
+        input = open(input_name, O_RDONLY);
+        if (input < 0) {
+                perror("failed to open file");
+                exit(-1);
+        }
+        ret = fstat(input, &perf_stat);
+        if (ret < 0) {
+                perror("failed to stat file");
+                exit(-1);
+        }
+        if (!perf_stat.st_size) {
+                fprintf(stderr, "zero-sized file, nothing to do!\n");
+                exit(0);
+        }
+        header = perf_header__read(input);
+        head = header->data_offset;
+        sample_type = perf_header__sample_type(header);
+        if (!(sample_type & PERF_SAMPLE_RAW))
+                die("No trace sample to read. Did you call perf record "
+                    "without -R?");
+        if (load_kernel() < 0) {
+                perror("failed to load kernel symbols");
+                return EXIT_FAILURE;
+        }
+remap:
+        buf = (char *)mmap(NULL, page_size * mmap_window, PROT_READ,
+                           MAP_SHARED, input, offset);
+        if (buf == MAP_FAILED) {
+                perror("failed to mmap file");
+                exit(-1);
+        }
+more:
+        event = (event_t *)(buf + head);
+        size = event->header.size;
+        if (!size)
+                size = 8;
+        if (head + event->header.size >= page_size * mmap_window) {
+                unsigned long shift = page_size * (head / page_size);
+                int res;
+                res = munmap(buf, page_size * mmap_window);
+                assert(res == 0);
+                offset += shift;
+                head -= shift;
+                goto remap;
+        }
+        size = event->header.size;
+        if (!size || process_event(event, offset, head) < 0) {
+                /*
+                 * assume we lost track of the stream, check alignment, and
+                 * increment a single u64 in the hope to catch on again 'soon'.
+                 */
+                if (unlikely(head & 7))
+                        head &= ~7ULL;
+                size = 8;
+        }
+        head += size;
+        if (offset + head < (unsigned long)perf_stat.st_size)
+                goto more;
+        rc = EXIT_SUCCESS;
+        close(input);
+        return rc;
+}
+static void print_bad_events(void)
+{
+        if (nr_unordered_timestamps && nr_timestamps) {
+                printf("  INFO: %.3f%% unordered timestamps (%ld out of %ld)\n",
+                        (double)nr_unordered_timestamps/(double)nr_timestamps*100.0,
+                        nr_unordered_timestamps, nr_timestamps);
+        }
+        if (nr_lost_events && nr_events) {
+                printf("  INFO: %.3f%% lost events (%ld out of %ld, in %ld chunks)\n",
+                        (double)nr_lost_events/(double)nr_events*100.0,
+                        nr_lost_events, nr_events, nr_lost_chunks);
+        }
+        if (nr_state_machine_bugs && nr_timestamps) {
+                printf("  INFO: %.3f%% state machine bugs (%ld out of %ld)",
+                        (double)nr_state_machine_bugs/(double)nr_timestamps*100.0,
+                        nr_state_machine_bugs, nr_timestamps);
+                if (nr_lost_events)
+                        printf(" (due to lost events?)");
+                printf("\n");
+        }
+        if (nr_context_switch_bugs && nr_timestamps) {
+                printf("  INFO: %.3f%% context switch bugs (%ld out of %ld)",
+                        (double)nr_context_switch_bugs/(double)nr_timestamps*100.0,
+                        nr_context_switch_bugs, nr_timestamps);
+                if (nr_lost_events)
+                        printf(" (due to lost events?)");
+                printf("\n");
+        }
+}
+static void __cmd_lat(void)
+{
+        struct rb_node *next;
+        setup_pager();
+        read_events();
+        sort_lat();
+        printf("\n -----------------------------------------------------------------------------------------\n");
+        printf("  Task                  |   Runtime ms  | Switches | Average delay ms | Maximum delay ms |\n");
+        printf(" -----------------------------------------------------------------------------------------\n");
+        next = rb_first(&sorted_atom_root);
+        while (next) {
+                struct work_atoms *work_list;
+                work_list = rb_entry(next, struct work_atoms, node);
+                output_lat_thread(work_list);
+                next = rb_next(next);
+        }
+        printf(" -----------------------------------------------------------------------------------------\n");
+        printf("  TOTAL:                |%11.3f ms |%9Ld |\n",
+                (double)all_runtime/1e6, all_count);
+        printf(" ---------------------------------------------------\n");
+        print_bad_events();
+        printf("\n");
+}
+static struct trace_sched_handler map_ops  = {
+        .wakeup_event           = NULL,
+        .switch_event           = map_switch_event,
+        .runtime_event          = NULL,
+        .fork_event             = NULL,
+};
+static void __cmd_map(void)
+{
+        max_cpu = sysconf(_SC_NPROCESSORS_CONF);
+        setup_pager();
+        read_events();
+        print_bad_events();
+}
+static void __cmd_replay(void)
+{
+        unsigned long i;
+        calibrate_run_measurement_overhead();
+        calibrate_sleep_measurement_overhead();
+        test_calibrations();
+        read_events();
+        printf("nr_run_events:        %ld\n", nr_run_events);
+        printf("nr_sleep_events:      %ld\n", nr_sleep_events);
+        printf("nr_wakeup_events:     %ld\n", nr_wakeup_events);
+        if (targetless_wakeups)
+                printf("target-less wakeups:  %ld\n", targetless_wakeups);
+        if (multitarget_wakeups)
+                printf("multi-target wakeups: %ld\n", multitarget_wakeups);
+        if (nr_run_events_optimized)
+                printf("run atoms optimized: %ld\n",
+                        nr_run_events_optimized);
+        print_task_traces();
+        add_cross_task_wakeups();
+        create_tasks();
+        printf("------------------------------------------------------------\n");
+        for (i = 0; i < replay_repeat; i++)
+                run_one_test();
+}
+static const char * const sched_usage[] = {
+        "perf sched [<options>] {record|latency|map|replay|trace}",
+        NULL
+};
+static const struct option sched_options[] = {
+        OPT_STRING('i', "input", &input_name, "file",
+                    "input file name"),
+        OPT_BOOLEAN('v', "verbose", &verbose,
+                    "be more verbose (show symbol address, etc)"),
+        OPT_BOOLEAN('D', "dump-raw-trace", &dump_trace,
+                    "dump raw trace in ASCII"),
+        OPT_END()
+};
+static const char * const latency_usage[] = {
+        "perf sched latency [<options>]",
+        NULL
+};
+static const struct option latency_options[] = {
+        OPT_STRING('s', "sort", &sort_order, "key[,key2...]",
+                   "sort by key(s): runtime, switch, avg, max"),
+        OPT_BOOLEAN('v', "verbose", &verbose,
+                    "be more verbose (show symbol address, etc)"),
+        OPT_BOOLEAN('D', "dump-raw-trace", &dump_trace,
+                    "dump raw trace in ASCII"),
+        OPT_END()
+};
+static const char * const replay_usage[] = {
+        "perf sched replay [<options>]",
+        NULL
+};
+static const struct option replay_options[] = {
+        OPT_INTEGER('r', "repeat", &replay_repeat,
+                    "repeat the workload replay N times (-1: infinite)"),
+        OPT_BOOLEAN('v', "verbose", &verbose,
+                    "be more verbose (show symbol address, etc)"),
+        OPT_BOOLEAN('D', "dump-raw-trace", &dump_trace,
+                    "dump raw trace in ASCII"),
+        OPT_END()
+};
+static void setup_sorting(void)
+{
+        char *tmp, *tok, *str = strdup(sort_order);
+        for (tok = strtok_r(str, ", ", &tmp);
+                        tok; tok = strtok_r(NULL, ", ", &tmp)) {
+                if (sort_dimension__add(tok, &sort_list) < 0) {
+                        error("Unknown --sort key: `%s'", tok);
+                        usage_with_options(latency_usage, latency_options);
+                }
+        }
+        free(str);
+        sort_dimension__add((char *)"pid", &cmp_pid);
+}
+static const char *record_args[] = {
+        "record",
+        "-a",
+        "-R",
+        "-M",
+        "-f",
+        "-m", "1024",
+        "-c", "1",
+        "-e", "sched:sched_switch:r",
+        "-e", "sched:sched_stat_wait:r",
+        "-e", "sched:sched_stat_sleep:r",
+        "-e", "sched:sched_stat_iowait:r",
+        "-e", "sched:sched_stat_runtime:r",
+        "-e", "sched:sched_process_exit:r",
+        "-e", "sched:sched_process_fork:r",
+        "-e", "sched:sched_wakeup:r",
+        "-e", "sched:sched_migrate_task:r",
+};
+static int __cmd_record(int argc, const char **argv)
+{
+        unsigned int rec_argc, i, j;
+        const char **rec_argv;
+        rec_argc = ARRAY_SIZE(record_args) + argc - 1;
+        rec_argv = calloc(rec_argc + 1, sizeof(char *));
+        for (i = 0; i < ARRAY_SIZE(record_args); i++)
+                rec_argv[i] = strdup(record_args[i]);
+        for (j = 1; j < (unsigned int)argc; j++, i++)
+                rec_argv[i] = argv[j];
+        BUG_ON(i != rec_argc);
+        return cmd_record(i, rec_argv, NULL);
+}
+int cmd_sched(int argc, const char **argv, const char *prefix __used)
+{
+        symbol__init();
+        page_size = getpagesize();
+        argc = parse_options(argc, argv, sched_options, sched_usage,
+                             PARSE_OPT_STOP_AT_NON_OPTION);
+        if (!argc)
+                usage_with_options(sched_usage, sched_options);
+        if (!strncmp(argv[0], "rec", 3)) {
+                return __cmd_record(argc, argv);
+        } else if (!strncmp(argv[0], "lat", 3)) {
+                trace_handler = &lat_ops;
+                if (argc > 1) {
+                        argc = parse_options(argc, argv, latency_options, latency_usage, 0);
+                        if (argc)
+                                usage_with_options(latency_usage, latency_options);
+                }
+                setup_sorting();
+                __cmd_lat();
+        } else if (!strcmp(argv[0], "map")) {
+                trace_handler = &map_ops;
+                setup_sorting();
+                __cmd_map();
+        } else if (!strncmp(argv[0], "rep", 3)) {
+                trace_handler = &replay_ops;
+                if (argc) {
+                        argc = parse_options(argc, argv, replay_options, replay_usage, 0);
+                        if (argc)
+                                usage_with_options(replay_usage, replay_options);
+                }
+                __cmd_replay();
+        } else if (!strcmp(argv[0], "trace")) {
+                /*
+                 * Aliased to 'perf trace' for now:
+                 */
+                return cmd_trace(argc, argv, prefix);
+        } else {
+                usage_with_options(sched_usage, sched_options);
+        }
+        return 0;
+}
diff --git a/tools/perf/builtin-timechart.c b/tools/perf/builtin-timechart.c
new file mode 100644
index 000000000000..58d737ec8f5e
--- /dev/null
+++ b/tools/perf/builtin-timechart.c
@@ -0,0 +1,1151 @@
+/*
+ * builtin-timechart.c - make an svg timechart of system activity
+ *
+ * (C) Copyright 2009 Intel Corporation
+ *
+ * Authors:
+ *     Arjan van de Ven <arjan@linux.intel.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; version 2
+ * of the License.
+ */
+#include "builtin.h"
+#include "util/util.h"
+#include "util/color.h"
+#include <linux/list.h>
+#include "util/cache.h"
+#include <linux/rbtree.h>
+#include "util/symbol.h"
+#include "util/string.h"
+#include "util/callchain.h"
+#include "util/strlist.h"
+#include "perf.h"
+#include "util/header.h"
+#include "util/parse-options.h"
+#include "util/parse-events.h"
+#include "util/svghelper.h"
+static char             const *input_name = "perf.data";
+static char             const *output_name = "output.svg";
+static unsigned long    page_size;
+static unsigned long    mmap_window = 32;
+static u64              sample_type;
+static unsigned int     numcpus;
+static u64              min_freq;       /* Lowest CPU frequency seen */
+static u64              max_freq;       /* Highest CPU frequency seen */
+static u64              turbo_frequency;
+static u64              first_time, last_time;
+static struct perf_header       *header;
+struct per_pid;
+struct per_pidcomm;
+struct cpu_sample;
+struct power_event;
+struct wake_event;
+struct sample_wrapper;
+/*
+ * Datastructure layout:
+ * We keep an list of "pid"s, matching the kernels notion of a task struct.
+ * Each "pid" entry, has a list of "comm"s.
+ *      this is because we want to track different programs different, while
+ *      exec will reuse the original pid (by design).
+ * Each comm has a list of samples that will be used to draw
+ * final graph.
+ */
+struct per_pid {
+        struct per_pid *next;
+        int             pid;
+        int             ppid;
+        u64             start_time;
+        u64             end_time;
+        u64             total_time;
+        int             display;
+        struct per_pidcomm *all;
+        struct per_pidcomm *current;
+        int painted;
+};
+struct per_pidcomm {
+        struct per_pidcomm *next;
+        u64             start_time;
+        u64             end_time;
+        u64             total_time;
+        int             Y;
+        int             display;
+        long            state;
+        u64             state_since;
+        char            *comm;
+        struct cpu_sample *samples;
+};
+struct sample_wrapper {
+        struct sample_wrapper *next;
+        u64             timestamp;
+        unsigned char   data[0];
+};
+#define TYPE_NONE       0
+#define TYPE_RUNNING    1
+#define TYPE_WAITING    2
+#define TYPE_BLOCKED    3
+struct cpu_sample {
+        struct cpu_sample *next;
+        u64 start_time;
+        u64 end_time;
+        int type;
+        int cpu;
+};
+static struct per_pid *all_data;
+#define CSTATE 1
+#define PSTATE 2
+struct power_event {
+        struct power_event *next;
+        int type;
+        int state;
+        u64 start_time;
+        u64 end_time;
+        int cpu;
+};
+struct wake_event {
+        struct wake_event *next;
+        int waker;
+        int wakee;
+        u64 time;
+};
+static struct power_event    *power_events;
+static struct wake_event     *wake_events;
+struct sample_wrapper *all_samples;
+static struct per_pid *find_create_pid(int pid)
+{
+        struct per_pid *cursor = all_data;
+        while (cursor) {
+                if (cursor->pid == pid)
+                        return cursor;
+                cursor = cursor->next;
+        }
+        cursor = malloc(sizeof(struct per_pid));
+        assert(cursor != NULL);
+        memset(cursor, 0, sizeof(struct per_pid));
+        cursor->pid = pid;
+        cursor->next = all_data;
+        all_data = cursor;
+        return cursor;
+}
+static void pid_set_comm(int pid, char *comm)
+{
+        struct per_pid *p;
+        struct per_pidcomm *c;
+        p = find_create_pid(pid);
+        c = p->all;
+        while (c) {
+                if (c->comm && strcmp(c->comm, comm) == 0) {
+                        p->current = c;
+                        return;
+                }
+                if (!c->comm) {
+                        c->comm = strdup(comm);
+                        p->current = c;
+                        return;
+                }
+                c = c->next;
+        }
+        c = malloc(sizeof(struct per_pidcomm));
+        assert(c != NULL);
+        memset(c, 0, sizeof(struct per_pidcomm));
+        c->comm = strdup(comm);
+        p->current = c;
+        c->next = p->all;
+        p->all = c;
+}
+static void pid_fork(int pid, int ppid, u64 timestamp)
+{
+        struct per_pid *p, *pp;
+        p = find_create_pid(pid);
+        pp = find_create_pid(ppid);
+        p->ppid = ppid;
+        if (pp->current && pp->current->comm && !p->current)
+                pid_set_comm(pid, pp->current->comm);
+        p->start_time = timestamp;
+        if (p->current) {
+                p->current->start_time = timestamp;
+                p->current->state_since = timestamp;
+        }
+}
+static void pid_exit(int pid, u64 timestamp)
+{
+        struct per_pid *p;
+        p = find_create_pid(pid);
+        p->end_time = timestamp;
+        if (p->current)
+                p->current->end_time = timestamp;
+}
+static void
+pid_put_sample(int pid, int type, unsigned int cpu, u64 start, u64 end)
+{
+        struct per_pid *p;
+        struct per_pidcomm *c;
+        struct cpu_sample *sample;
+        p = find_create_pid(pid);
+        c = p->current;
+        if (!c) {
+                c = malloc(sizeof(struct per_pidcomm));
+                assert(c != NULL);
+                memset(c, 0, sizeof(struct per_pidcomm));
+                p->current = c;
+                c->next = p->all;
+                p->all = c;
+        }
+        sample = malloc(sizeof(struct cpu_sample));
+        assert(sample != NULL);
+        memset(sample, 0, sizeof(struct cpu_sample));
+        sample->start_time = start;
+        sample->end_time = end;
+        sample->type = type;
+        sample->next = c->samples;
+        sample->cpu = cpu;
+        c->samples = sample;
+        if (sample->type == TYPE_RUNNING && end > start && start > 0) {
+                c->total_time += (end-start);
+                p->total_time += (end-start);
+        }
+        if (c->start_time == 0 || c->start_time > start)
+                c->start_time = start;
+        if (p->start_time == 0 || p->start_time > start)
+                p->start_time = start;
+        if (cpu > numcpus)
+                numcpus = cpu;
+}
+#define MAX_CPUS 4096
+static u64 cpus_cstate_start_times[MAX_CPUS];
+static int cpus_cstate_state[MAX_CPUS];
+static u64 cpus_pstate_start_times[MAX_CPUS];
+static u64 cpus_pstate_state[MAX_CPUS];
+static int
+process_comm_event(event_t *event)
+{
+        pid_set_comm(event->comm.pid, event->comm.comm);
+        return 0;
+}
+static int
+process_fork_event(event_t *event)
+{
+        pid_fork(event->fork.pid, event->fork.ppid, event->fork.time);
+        return 0;
+}
+static int
+process_exit_event(event_t *event)
+{
+        pid_exit(event->fork.pid, event->fork.time);
+        return 0;
+}
+struct trace_entry {
+        u32                     size;
+        unsigned short          type;
+        unsigned char           flags;
+        unsigned char           preempt_count;
+        int                     pid;
+        int                     tgid;
+};
+struct power_entry {
+        struct trace_entry te;
+        s64     type;
+        s64     value;
+};
+#define TASK_COMM_LEN 16
+struct wakeup_entry {
+        struct trace_entry te;
+        char comm[TASK_COMM_LEN];
+        int   pid;
+        int   prio;
+        int   success;
+};
+/*
+ * trace_flag_type is an enumeration that holds different
+ * states when a trace occurs. These are:
+ *  IRQS_OFF            - interrupts were disabled
+ *  IRQS_NOSUPPORT      - arch does not support irqs_disabled_flags
+ *  NEED_RESCED         - reschedule is requested
+ *  HARDIRQ             - inside an interrupt handler
+ *  SOFTIRQ             - inside a softirq handler
+ */
+enum trace_flag_type {
+        TRACE_FLAG_IRQS_OFF             = 0x01,
+        TRACE_FLAG_IRQS_NOSUPPORT       = 0x02,
+        TRACE_FLAG_NEED_RESCHED         = 0x04,
+        TRACE_FLAG_HARDIRQ              = 0x08,
+        TRACE_FLAG_SOFTIRQ              = 0x10,
+};
+struct sched_switch {
+        struct trace_entry te;
+        char prev_comm[TASK_COMM_LEN];
+        int  prev_pid;
+        int  prev_prio;
+        long prev_state; /* Arjan weeps. */
+        char next_comm[TASK_COMM_LEN];
+        int  next_pid;
+        int  next_prio;
+};
+static void c_state_start(int cpu, u64 timestamp, int state)
+{
+        cpus_cstate_start_times[cpu] = timestamp;
+        cpus_cstate_state[cpu] = state;
+}
+static void c_state_end(int cpu, u64 timestamp)
+{
+        struct power_event *pwr;
+        pwr = malloc(sizeof(struct power_event));
+        if (!pwr)
+                return;
+        memset(pwr, 0, sizeof(struct power_event));
+        pwr->state = cpus_cstate_state[cpu];
+        pwr->start_time = cpus_cstate_start_times[cpu];
+        pwr->end_time = timestamp;
+        pwr->cpu = cpu;
+        pwr->type = CSTATE;
+        pwr->next = power_events;
+        power_events = pwr;
+}
+static void p_state_change(int cpu, u64 timestamp, u64 new_freq)
+{
+        struct power_event *pwr;
+        pwr = malloc(sizeof(struct power_event));
+        if (new_freq > 8000000) /* detect invalid data */
+                return;
+        if (!pwr)
+                return;
+        memset(pwr, 0, sizeof(struct power_event));
+        pwr->state = cpus_pstate_state[cpu];
+        pwr->start_time = cpus_pstate_start_times[cpu];
+        pwr->end_time = timestamp;
+        pwr->cpu = cpu;
+        pwr->type = PSTATE;
+        pwr->next = power_events;
+        if (!pwr->start_time)
+                pwr->start_time = first_time;
+        power_events = pwr;
+        cpus_pstate_state[cpu] = new_freq;
+        cpus_pstate_start_times[cpu] = timestamp;
+        if ((u64)new_freq > max_freq)
+                max_freq = new_freq;
+        if (new_freq < min_freq || min_freq == 0)
+                min_freq = new_freq;
+        if (new_freq == max_freq - 1000)
+                        turbo_frequency = max_freq;
+}
+static void
+sched_wakeup(int cpu, u64 timestamp, int pid, struct trace_entry *te)
+{
+        struct wake_event *we;
+        struct per_pid *p;
+        struct wakeup_entry *wake = (void *)te;
+        we = malloc(sizeof(struct wake_event));
+        if (!we)
+                return;
+        memset(we, 0, sizeof(struct wake_event));
+        we->time = timestamp;
+        we->waker = pid;
+        if ((te->flags & TRACE_FLAG_HARDIRQ) || (te->flags & TRACE_FLAG_SOFTIRQ))
+                we->waker = -1;
+        we->wakee = wake->pid;
+        we->next = wake_events;
+        wake_events = we;
+        p = find_create_pid(we->wakee);
+        if (p && p->current && p->current->state == TYPE_NONE) {
+                p->current->state_since = timestamp;
+                p->current->state = TYPE_WAITING;
+        }
+        if (p && p->current && p->current->state == TYPE_BLOCKED) {
+                pid_put_sample(p->pid, p->current->state, cpu, p->current->state_since, timestamp);
+                p->current->state_since = timestamp;
+                p->current->state = TYPE_WAITING;
+        }
+}
+static void sched_switch(int cpu, u64 timestamp, struct trace_entry *te)
+{
+        struct per_pid *p = NULL, *prev_p;
+        struct sched_switch *sw = (void *)te;
+        prev_p = find_create_pid(sw->prev_pid);
+        p = find_create_pid(sw->next_pid);
+        if (prev_p->current && prev_p->current->state != TYPE_NONE)
+                pid_put_sample(sw->prev_pid, TYPE_RUNNING, cpu, prev_p->current->state_since, timestamp);
+        if (p && p->current) {
+                if (p->current->state != TYPE_NONE)
+                        pid_put_sample(sw->next_pid, p->current->state, cpu, p->current->state_since, timestamp);
+                        p->current->state_since = timestamp;
+                        p->current->state = TYPE_RUNNING;
+        }
+        if (prev_p->current) {
+                prev_p->current->state = TYPE_NONE;
+                prev_p->current->state_since = timestamp;
+                if (sw->prev_state & 2)
+                        prev_p->current->state = TYPE_BLOCKED;
+                if (sw->prev_state == 0)
+                        prev_p->current->state = TYPE_WAITING;
+        }
+}
+static int
+process_sample_event(event_t *event)
+{
+        int cursor = 0;
+        u64 addr = 0;
+        u64 stamp = 0;
+        u32 cpu = 0;
+        u32 pid = 0;
+        struct trace_entry *te;
+        if (sample_type & PERF_SAMPLE_IP)
+                cursor++;
+        if (sample_type & PERF_SAMPLE_TID) {
+                pid = event->sample.array[cursor]>>32;
+                cursor++;
+        }
+        if (sample_type & PERF_SAMPLE_TIME) {
+                stamp = event->sample.array[cursor++];
+                if (!first_time || first_time > stamp)
+                        first_time = stamp;
+                if (last_time < stamp)
+                        last_time = stamp;
+        }
+        if (sample_type & PERF_SAMPLE_ADDR)
+                addr = event->sample.array[cursor++];
+        if (sample_type & PERF_SAMPLE_ID)
+                cursor++;
+        if (sample_type & PERF_SAMPLE_STREAM_ID)
+                cursor++;
+        if (sample_type & PERF_SAMPLE_CPU)
+                cpu = event->sample.array[cursor++] & 0xFFFFFFFF;
+        if (sample_type & PERF_SAMPLE_PERIOD)
+                cursor++;
+        te = (void *)&event->sample.array[cursor];
+        if (sample_type & PERF_SAMPLE_RAW && te->size > 0) {
+                char *event_str;
+                struct power_entry *pe;
+                pe = (void *)te;
+                event_str = perf_header__find_event(te->type);
+                if (!event_str)
+                        return 0;
+                if (strcmp(event_str, "power:power_start") == 0)
+                        c_state_start(cpu, stamp, pe->value);
+                if (strcmp(event_str, "power:power_end") == 0)
+                        c_state_end(cpu, stamp);
+                if (strcmp(event_str, "power:power_frequency") == 0)
+                        p_state_change(cpu, stamp, pe->value);
+                if (strcmp(event_str, "sched:sched_wakeup") == 0)
+                        sched_wakeup(cpu, stamp, pid, te);
+                if (strcmp(event_str, "sched:sched_switch") == 0)
+                        sched_switch(cpu, stamp, te);
+        }
+        return 0;
+}
+/*
+ * After the last sample we need to wrap up the current C/P state
+ * and close out each CPU for these.
+ */
+static void end_sample_processing(void)
+{
+        u64 cpu;
+        struct power_event *pwr;
+        for (cpu = 0; cpu < numcpus; cpu++) {
+                pwr = malloc(sizeof(struct power_event));
+                if (!pwr)
+                        return;
+                memset(pwr, 0, sizeof(struct power_event));
+                /* C state */
+#if 0
+                pwr->state = cpus_cstate_state[cpu];
+                pwr->start_time = cpus_cstate_start_times[cpu];
+                pwr->end_time = last_time;
+                pwr->cpu = cpu;
+                pwr->type = CSTATE;
+                pwr->next = power_events;
+                power_events = pwr;
+#endif
+                /* P state */
+                pwr = malloc(sizeof(struct power_event));
+                if (!pwr)
+                        return;
+                memset(pwr, 0, sizeof(struct power_event));
+                pwr->state = cpus_pstate_state[cpu];
+                pwr->start_time = cpus_pstate_start_times[cpu];
+                pwr->end_time = last_time;
+                pwr->cpu = cpu;
+                pwr->type = PSTATE;
+                pwr->next = power_events;
+                if (!pwr->start_time)
+                        pwr->start_time = first_time;
+                if (!pwr->state)
+                        pwr->state = min_freq;
+                power_events = pwr;
+        }
+}
+static u64 sample_time(event_t *event)
+{
+        int cursor;
+        cursor = 0;
+        if (sample_type & PERF_SAMPLE_IP)
+                cursor++;
+        if (sample_type & PERF_SAMPLE_TID)
+                cursor++;
+        if (sample_type & PERF_SAMPLE_TIME)
+                return event->sample.array[cursor];
+        return 0;
+}
+/*
+ * We first queue all events, sorted backwards by insertion.
+ * The order will get flipped later.
+ */
+static int
+queue_sample_event(event_t *event)
+{
+        struct sample_wrapper *copy, *prev;
+        int size;
+        size = event->sample.header.size + sizeof(struct sample_wrapper) + 8;
+        copy = malloc(size);
+        if (!copy)
+                return 1;
+        memset(copy, 0, size);
+        copy->next = NULL;
+        copy->timestamp = sample_time(event);
+        memcpy(&copy->data, event, event->sample.header.size);
+        /* insert in the right place in the list */
+        if (!all_samples) {
+                /* first sample ever */
+                all_samples = copy;
+                return 0;
+        }
+        if (all_samples->timestamp < copy->timestamp) {
+                /* insert at the head of the list */
+                copy->next = all_samples;
+                all_samples = copy;
+                return 0;
+        }
+        prev = all_samples;
+        while (prev->next) {
+                if (prev->next->timestamp < copy->timestamp) {
+                        copy->next = prev->next;
+                        prev->next = copy;
+                        return 0;
+                }
+                prev = prev->next;
+        }
+        /* insert at the end of the list */
+        prev->next = copy;
+        return 0;
+}
+static void sort_queued_samples(void)
+{
+        struct sample_wrapper *cursor, *next;
+        cursor = all_samples;
+        all_samples = NULL;
+        while (cursor) {
+                next = cursor->next;
+                cursor->next = all_samples;
+                all_samples = cursor;
+                cursor = next;
+        }
+}
+/*
+ * Sort the pid datastructure
+ */
+static void sort_pids(void)
+{
+        struct per_pid *new_list, *p, *cursor, *prev;
+        /* sort by ppid first, then by pid, lowest to highest */
+        new_list = NULL;
+        while (all_data) {
+                p = all_data;
+                all_data = p->next;
+                p->next = NULL;
+                if (new_list == NULL) {
+                        new_list = p;
+                        p->next = NULL;
+                        continue;
+                }
+                prev = NULL;
+                cursor = new_list;
+                while (cursor) {
+                        if (cursor->ppid > p->ppid ||
+                                (cursor->ppid == p->ppid && cursor->pid > p->pid)) {
+                                /* must insert before */
+                                if (prev) {
+                                        p->next = prev->next;
+                                        prev->next = p;
+                                        cursor = NULL;
+                                        continue;
+                                } else {
+                                        p->next = new_list;
+                                        new_list = p;
+                                        cursor = NULL;
+                                        continue;
+                                }
+                        }
+                        prev = cursor;
+                        cursor = cursor->next;
+                        if (!cursor)
+                                prev->next = p;
+                }
+        }
+        all_data = new_list;
+}
+static void draw_c_p_states(void)
+{
+        struct power_event *pwr;
+        pwr = power_events;
+        /*
+         * two pass drawing so that the P state bars are on top of the C state blocks
+         */
+        while (pwr) {
+                if (pwr->type == CSTATE)
+                        svg_cstate(pwr->cpu, pwr->start_time, pwr->end_time, pwr->state);
+                pwr = pwr->next;
+        }
+        pwr = power_events;
+        while (pwr) {
+                if (pwr->type == PSTATE) {
+                        if (!pwr->state)
+                                pwr->state = min_freq;
+                        svg_pstate(pwr->cpu, pwr->start_time, pwr->end_time, pwr->state);
+                }
+                pwr = pwr->next;
+        }
+}
+static void draw_wakeups(void)
+{
+        struct wake_event *we;
+        struct per_pid *p;
+        struct per_pidcomm *c;
+        we = wake_events;
+        while (we) {
+                int from = 0, to = 0;
+                /* locate the column of the waker and wakee */
+                p = all_data;
+                while (p) {
+                        if (p->pid == we->waker || p->pid == we->wakee) {
+                                c = p->all;
+                                while (c) {
+                                        if (c->Y && c->start_time <= we->time && c->end_time >= we->time) {
+                                                if (p->pid == we->waker)
+                                                        from = c->Y;
+                                                if (p->pid == we->wakee)
+                                                        to = c->Y;
+                                        }
+                                        c = c->next;
+                                }
+                        }
+                        p = p->next;
+                }
+                if (we->waker == -1)
+                        svg_interrupt(we->time, to);
+                else if (from && to && abs(from - to) == 1)
+                        svg_wakeline(we->time, from, to);
+                else
+                        svg_partial_wakeline(we->time, from, to);
+                we = we->next;
+        }
+}
+static void draw_cpu_usage(void)
+{
+        struct per_pid *p;
+        struct per_pidcomm *c;
+        struct cpu_sample *sample;
+        p = all_data;
+        while (p) {
+                c = p->all;
+                while (c) {
+                        sample = c->samples;
+                        while (sample) {
+                                if (sample->type == TYPE_RUNNING)
+                                        svg_process(sample->cpu, sample->start_time, sample->end_time, "sample", c->comm);
+                                sample = sample->next;
+                        }
+                        c = c->next;
+                }
+                p = p->next;
+        }
+}
+static void draw_process_bars(void)
+{
+        struct per_pid *p;
+        struct per_pidcomm *c;
+        struct cpu_sample *sample;
+        int Y = 0;
+        Y = 2 * numcpus + 2;
+        p = all_data;
+        while (p) {
+                c = p->all;
+                while (c) {
+                        if (!c->display) {
+                                c->Y = 0;
+                                c = c->next;
+                                continue;
+                        }
+                        svg_box(Y, p->start_time, p->end_time, "process");
+                        sample = c->samples;
+                        while (sample) {
+                                if (sample->type == TYPE_RUNNING)
+                                        svg_sample(Y, sample->cpu, sample->start_time, sample->end_time, "sample");
+                                if (sample->type == TYPE_BLOCKED)
+                                        svg_box(Y, sample->start_time, sample->end_time, "blocked");
+                                if (sample->type == TYPE_WAITING)
+                                        svg_box(Y, sample->start_time, sample->end_time, "waiting");
+                                sample = sample->next;
+                        }
+                        if (c->comm) {
+                                char comm[256];
+                                if (c->total_time > 5000000000) /* 5 seconds */
+                                        sprintf(comm, "%s:%i (%2.2fs)", c->comm, p->pid, c->total_time / 1000000000.0);
+                                else
+                                        sprintf(comm, "%s:%i (%3.1fms)", c->comm, p->pid, c->total_time / 1000000.0);
+                                svg_text(Y, c->start_time, comm);
+                        }
+                        c->Y = Y;
+                        Y++;
+                        c = c->next;
+                }
+                p = p->next;
+        }
+}
+static int determine_display_tasks(u64 threshold)
+{
+        struct per_pid *p;
+        struct per_pidcomm *c;
+        int count = 0;
+        p = all_data;
+        while (p) {
+                p->display = 0;
+                if (p->start_time == 1)
+                        p->start_time = first_time;
+                /* no exit marker, task kept running to the end */
+                if (p->end_time == 0)
+                        p->end_time = last_time;
+                if (p->total_time >= threshold)
+                        p->display = 1;
+                c = p->all;
+                while (c) {
+                        c->display = 0;
+                        if (c->start_time == 1)
+                                c->start_time = first_time;
+                        if (c->total_time >= threshold) {
+                                c->display = 1;
+                                count++;
+                        }
+                        if (c->end_time == 0)
+                                c->end_time = last_time;
+                        c = c->next;
+                }
+                p = p->next;
+        }
+        return count;
+}
+#define TIME_THRESH 10000000
+static void write_svg_file(const char *filename)
+{
+        u64 i;
+        int count;
+        numcpus++;
+        count = determine_display_tasks(TIME_THRESH);
+        /* We'd like to show at least 15 tasks; be less picky if we have fewer */
+        if (count < 15)
+                count = determine_display_tasks(TIME_THRESH / 10);
+        open_svg(filename, numcpus, count);
+        svg_time_grid(first_time, last_time);
+        svg_legenda();
+        for (i = 0; i < numcpus; i++)
+                svg_cpu_box(i, max_freq, turbo_frequency);
+        draw_cpu_usage();
+        draw_process_bars();
+        draw_c_p_states();
+        draw_wakeups();
+        svg_close();
+}
+static int
+process_event(event_t *event)
+{
+        switch (event->header.type) {
+        case PERF_EVENT_COMM:
+                return process_comm_event(event);
+        case PERF_EVENT_FORK:
+                return process_fork_event(event);
+        case PERF_EVENT_EXIT:
+                return process_exit_event(event);
+        case PERF_EVENT_SAMPLE:
+                return queue_sample_event(event);
+        /*
+         * We dont process them right now but they are fine:
+         */
+        case PERF_EVENT_MMAP:
+        case PERF_EVENT_THROTTLE:
+        case PERF_EVENT_UNTHROTTLE:
+                return 0;
+        default:
+                return -1;
+        }
+        return 0;
+}
+static void process_samples(void)
+{
+        struct sample_wrapper *cursor;
+        event_t *event;
+        sort_queued_samples();
+        cursor = all_samples;
+        while (cursor) {
+                event = (void *)&cursor->data;
+                cursor = cursor->next;
+                process_sample_event(event);
+        }
+}
+static int __cmd_timechart(void)
+{
+        int ret, rc = EXIT_FAILURE;
+        unsigned long offset = 0;
+        unsigned long head, shift;
+        struct stat statbuf;
+        event_t *event;
+        uint32_t size;
+        char *buf;
+        int input;
+        input = open(input_name, O_RDONLY);
+        if (input < 0) {
+                fprintf(stderr, " failed to open file: %s", input_name);
+                if (!strcmp(input_name, "perf.data"))
+                        fprintf(stderr, "  (try 'perf record' first)");
+                fprintf(stderr, "\n");
+                exit(-1);
+        }
+        ret = fstat(input, &statbuf);
+        if (ret < 0) {
+                perror("failed to stat file");
+                exit(-1);
+        }
+        if (!statbuf.st_size) {
+                fprintf(stderr, "zero-sized file, nothing to do!\n");
+                exit(0);
+        }
+        header = perf_header__read(input);
+        head = header->data_offset;
+        sample_type = perf_header__sample_type(header);
+        shift = page_size * (head / page_size);
+        offset += shift;
+        head -= shift;
+remap:
+        buf = (char *)mmap(NULL, page_size * mmap_window, PROT_READ,
+                           MAP_SHARED, input, offset);
+        if (buf == MAP_FAILED) {
+                perror("failed to mmap file");
+                exit(-1);
+        }
+more:
+        event = (event_t *)(buf + head);
+        size = event->header.size;
+        if (!size)
+                size = 8;
+        if (head + event->header.size >= page_size * mmap_window) {
+                int ret2;
+                shift = page_size * (head / page_size);
+                ret2 = munmap(buf, page_size * mmap_window);
+                assert(ret2 == 0);
+                offset += shift;
+                head -= shift;
+                goto remap;
+        }
+        size = event->header.size;
+        if (!size || process_event(event) < 0) {
+                printf("%p [%p]: skipping unknown header type: %d\n",
+                        (void *)(offset + head),
+                        (void *)(long)(event->header.size),
+                        event->header.type);
+                /*
+                 * assume we lost track of the stream, check alignment, and
+                 * increment a single u64 in the hope to catch on again 'soon'.
+                 */
+                if (unlikely(head & 7))
+                        head &= ~7ULL;
+                size = 8;
+        }
+        head += size;
+        if (offset + head >= header->data_offset + header->data_size)
+                goto done;
+        if (offset + head < (unsigned long)statbuf.st_size)
+                goto more;
+done:
+        rc = EXIT_SUCCESS;
+        close(input);
+        process_samples();
+        end_sample_processing();
+        sort_pids();
+        write_svg_file(output_name);
+        printf("Written %2.1f seconds of trace to %s.\n", (last_time - first_time) / 1000000000.0, output_name);
+        return rc;
+}
+static const char * const timechart_usage[] = {
+        "perf timechart [<options>] {record}",
+        NULL
+};
+static const char *record_args[] = {
+        "record",
+        "-a",
+        "-R",
+        "-M",
+        "-f",
+        "-c", "1",
+        "-e", "power:power_start",
+        "-e", "power:power_end",
+        "-e", "power:power_frequency",
+        "-e", "sched:sched_wakeup",
+        "-e", "sched:sched_switch",
+};
+static int __cmd_record(int argc, const char **argv)
+{
+        unsigned int rec_argc, i, j;
+        const char **rec_argv;
+        rec_argc = ARRAY_SIZE(record_args) + argc - 1;
+        rec_argv = calloc(rec_argc + 1, sizeof(char *));
+        for (i = 0; i < ARRAY_SIZE(record_args); i++)
+                rec_argv[i] = strdup(record_args[i]);
+        for (j = 1; j < (unsigned int)argc; j++, i++)
+                rec_argv[i] = argv[j];
+        return cmd_record(i, rec_argv, NULL);
+}
+static const struct option options[] = {
+        OPT_STRING('i', "input", &input_name, "file",
+                    "input file name"),
+        OPT_STRING('o', "output", &output_name, "file",
+                    "output file name"),
+        OPT_END()
+};
+int cmd_timechart(int argc, const char **argv, const char *prefix __used)
+{
+        symbol__init();
+        page_size = getpagesize();
+        argc = parse_options(argc, argv, options, timechart_usage,
+                        PARSE_OPT_STOP_AT_NON_OPTION);
+        if (argc && !strncmp(argv[0], "rec", 3))
+                return __cmd_record(argc, argv);
+        else if (argc)
+                usage_with_options(timechart_usage, options);
+        setup_pager();
+        return __cmd_timechart();
+}
diff --git a/tools/perf/builtin.h b/tools/perf/builtin.h
index 3a63e41fb44e..e11d8d231c3b 100644
--- a/tools/perf/builtin.h
+++ b/tools/perf/builtin.h
@@ -16,12 +16,14 @@ extern int check_pager_config(const char *cmd);
 extern int cmd_annotate(int argc, const char **argv, const char *prefix);
 extern int cmd_help(int argc, const char **argv, const char *prefix);
+extern int cmd_sched(int argc, const char **argv, const char *prefix);
+extern int cmd_list(int argc, const char **argv, const char *prefix);
 extern int cmd_record(int argc, const char **argv, const char *prefix);
 extern int cmd_report(int argc, const char **argv, const char *prefix);
 extern int cmd_stat(int argc, const char **argv, const char *prefix);
+extern int cmd_timechart(int argc, const char **argv, const char *prefix);
 extern int cmd_top(int argc, const char **argv, const char *prefix);
-extern int cmd_version(int argc, const char **argv, const char *prefix);
-extern int cmd_list(int argc, const char **argv, const char *prefix);
 extern int cmd_trace(int argc, const char **argv, const char *prefix);
+extern int cmd_version(int argc, const char **argv, const char *prefix);
 #endif
diff --git a/tools/perf/command-list.txt b/tools/perf/command-list.txt
index eebce30afbc0..00326e230d87 100644
--- a/tools/perf/command-list.txt
+++ b/tools/perf/command-list.txt
@@ -4,7 +4,10 @@
 #
 perf-annotate                   mainporcelain common
 perf-list                       mainporcelain common
+perf-sched                      mainporcelain common
 perf-record                     mainporcelain common
 perf-report                     mainporcelain common
 perf-stat                       mainporcelain common
+perf-timechart                  mainporcelain common
 perf-top                        mainporcelain common
+perf-trace                      mainporcelain common
diff --git a/tools/perf/perf.c b/tools/perf/perf.c
index fe4589dde950..19fc7feb9d59 100644
--- a/tools/perf/perf.c
+++ b/tools/perf/perf.c
@@ -289,10 +289,12 @@ static void handle_internal_command(int argc, const char **argv)
                { "record", cmd_record, 0 },
                { "report", cmd_report, 0 },
                { "stat", cmd_stat, 0 },
+                { "timechart", cmd_timechart, 0 },
                { "top", cmd_top, 0 },
                { "annotate", cmd_annotate, 0 },
                { "version", cmd_version, 0 },
                { "trace", cmd_trace, 0 },
+                { "sched", cmd_sched, 0 },
        };
        unsigned int i;
        static const char ext[] = STRIP_EXTENSION;
diff --git a/tools/perf/util/event.h b/tools/perf/util/event.h
index fa2d4e91d329..018d414a09d1 100644
--- a/tools/perf/util/event.h
+++ b/tools/perf/util/event.h
@@ -39,6 +39,7 @@ struct fork_event {
        struct perf_event_header header;
        u32 pid, ppid;
        u32 tid, ptid;
+        u64 time;
 };
 struct lost_event {
@@ -52,13 +53,19 @@ struct lost_event {
 */
 struct read_event {
        struct perf_event_header header;
-        u32 pid,tid;
+        u32 pid, tid;
        u64 value;
        u64 time_enabled;
        u64 time_running;
        u64 id;
 };
+struct sample_event{
+        struct perf_event_header        header;
+        u64 array[];
+};
 typedef union event_union {
        struct perf_event_header        header;
        struct ip_event                 ip;
@@ -67,6 +74,7 @@ typedef union event_union {
        struct fork_event               fork;
        struct lost_event               lost;
        struct read_event               read;
+        struct sample_event             sample;
 } event_t;
 struct map {
diff --git a/tools/perf/util/header.c b/tools/perf/util/header.c
index ec4d4c2f9522..bb4fca3efcc3 100644
--- a/tools/perf/util/header.c
+++ b/tools/perf/util/header.c
@@ -7,9 +7,8 @@
 #include "header.h"
 /*
- *
+ * Create new perf.data header attribute:
 */
 struct perf_header_attr *perf_header_attr__new(struct perf_counter_attr *attr)
 {
        struct perf_header_attr *self = malloc(sizeof(*self));
@@ -43,9 +42,8 @@ void perf_header_attr__add_id(struct perf_header_attr *self, u64 id)
 }
 /*
- *
+ * Create new perf.data header:
 */
 struct perf_header *perf_header__new(void)
 {
        struct perf_header *self = malloc(sizeof(*self));
@@ -86,6 +84,46 @@ void perf_header__add_attr(struct perf_header *self,
        self->attr[pos] = attr;
 }
+#define MAX_EVENT_NAME 64
+struct perf_trace_event_type {
+        u64     event_id;
+        char    name[MAX_EVENT_NAME];
+};
+static int event_count;
+static struct perf_trace_event_type *events;
+void perf_header__push_event(u64 id, const char *name)
+{
+        if (strlen(name) > MAX_EVENT_NAME)
+                printf("Event %s will be truncated\n", name);
+        if (!events) {
+                events = malloc(sizeof(struct perf_trace_event_type));
+                if (!events)
+                        die("nomem");
+        } else {
+                events = realloc(events, (event_count + 1) * sizeof(struct perf_trace_event_type));
+                if (!events)
+                        die("nomem");
+        }
+        memset(&events[event_count], 0, sizeof(struct perf_trace_event_type));
+        events[event_count].event_id = id;
+        strncpy(events[event_count].name, name, MAX_EVENT_NAME - 1);
+        event_count++;
+}
+char *perf_header__find_event(u64 id)
+{
+        int i;
+        for (i = 0 ; i < event_count; i++) {
+                if (events[i].event_id == id)
+                        return events[i].name;
+        }
+        return NULL;
+}
 static const char *__perf_magic = "PERFFILE";
 #define PERF_MAGIC      (*(u64 *)__perf_magic)
@@ -106,6 +144,7 @@ struct perf_file_header {
        u64                             attr_size;
        struct perf_file_section        attrs;
        struct perf_file_section        data;
+        struct perf_file_section        event_types;
 };
 static void do_write(int fd, void *buf, size_t size)
@@ -154,6 +193,11 @@ void perf_header__write(struct perf_header *self, int fd)
                do_write(fd, &f_attr, sizeof(f_attr));
        }
+        self->event_offset = lseek(fd, 0, SEEK_CUR);
+        self->event_size = event_count * sizeof(struct perf_trace_event_type);
+        if (events)
+                do_write(fd, events, self->event_size);
        self->data_offset = lseek(fd, 0, SEEK_CUR);
@@ -169,6 +213,10 @@ void perf_header__write(struct perf_header *self, int fd)
                        .offset = self->data_offset,
                        .size   = self->data_size,
                },
+                .event_types = {
+                        .offset = self->event_offset,
+                        .size   = self->event_size,
+                },
        };
        lseek(fd, 0, SEEK_SET);
@@ -234,6 +282,17 @@ struct perf_header *perf_header__read(int fd)
                lseek(fd, tmp, SEEK_SET);
        }
+        if (f_header.event_types.size) {
+                lseek(fd, f_header.event_types.offset, SEEK_SET);
+                events = malloc(f_header.event_types.size);
+                if (!events)
+                        die("nomem");
+                do_read(fd, events, f_header.event_types.size);
+                event_count =  f_header.event_types.size / sizeof(struct perf_trace_event_type);
+        }
+        self->event_offset = f_header.event_types.offset;
+        self->event_size   = f_header.event_types.size;
        self->data_offset = f_header.data.offset;
        self->data_size   = f_header.data.size;
diff --git a/tools/perf/util/header.h b/tools/perf/util/header.h
index 5d0a72ecc919..7b0e84a87179 100644
--- a/tools/perf/util/header.h
+++ b/tools/perf/util/header.h
@@ -19,6 +19,8 @@ struct perf_header {
        s64 attr_offset;
        u64 data_offset;
        u64 data_size;
+        u64 event_offset;
+        u64 event_size;
 };
 struct perf_header *perf_header__read(int fd);
@@ -27,6 +29,10 @@ void perf_header__write(struct perf_header *self, int fd);
 void perf_header__add_attr(struct perf_header *self,
                           struct perf_header_attr *attr);
+void perf_header__push_event(u64 id, const char *name);
+char *perf_header__find_event(u64 id);
 struct perf_header_attr *
 perf_header_attr__new(struct perf_counter_attr *attr);
 void perf_header_attr__add_id(struct perf_header_attr *self, u64 id);
diff --git a/tools/perf/util/parse-events.c b/tools/perf/util/parse-events.c
index a587d41ae3c9..89172fd0038b 100644
--- a/tools/perf/util/parse-events.c
+++ b/tools/perf/util/parse-events.c
@@ -6,6 +6,7 @@
 #include "exec_cmd.h"
 #include "string.h"
 #include "cache.h"
+#include "header.h"
 int                                     nr_counters;
@@ -18,6 +19,12 @@ struct event_symbol {
        const char      *alias;
 };
+enum event_result {
+        EVT_FAILED,
+        EVT_HANDLED,
+        EVT_HANDLED_ALL
+};
 char debugfs_path[MAXPATHLEN];
 #define CHW(x) .type = PERF_TYPE_HARDWARE, .config = PERF_COUNT_HW_##x
@@ -139,7 +146,7 @@ static int tp_event_has_id(struct dirent *sys_dir, struct dirent *evt_dir)
           (strcmp(evt_dirent.d_name, "..")) &&                                \
           (!tp_event_has_id(&sys_dirent, &evt_dirent)))
-#define MAX_EVENT_LENGTH 30
+#define MAX_EVENT_LENGTH 512
 int valid_debugfs_mount(const char *debugfs)
 {
@@ -344,7 +351,7 @@ static int parse_aliases(const char **str, const char *names[][MAX_ALIASES], int
        return -1;
 }
-static int
+static enum event_result
 parse_generic_hw_event(const char **str, struct perf_counter_attr *attr)
 {
        const char *s = *str;
@@ -356,7 +363,7 @@ parse_generic_hw_event(const char **str, struct perf_counter_attr *attr)
         * then bail out:
         */
        if (cache_type == -1)
-                return 0;
+                return EVT_FAILED;
        while ((cache_op == -1 || cache_result == -1) && *s == '-') {
                ++s;
@@ -402,27 +409,115 @@ parse_generic_hw_event(const char **str, struct perf_counter_attr *attr)
        attr->type = PERF_TYPE_HW_CACHE;
        *str = s;
-        return 1;
+        return EVT_HANDLED;
+}
+static enum event_result
+parse_single_tracepoint_event(char *sys_name,
+                              const char *evt_name,
+                              unsigned int evt_length,
+                              char *flags,
+                              struct perf_counter_attr *attr,
+                              const char **strp)
+{
+        char evt_path[MAXPATHLEN];
+        char id_buf[4];
+        u64 id;
+        int fd;
+        if (flags) {
+                if (!strncmp(flags, "record", strlen(flags))) {
+                        attr->sample_type |= PERF_SAMPLE_RAW;
+                        attr->sample_type |= PERF_SAMPLE_TIME;
+                        attr->sample_type |= PERF_SAMPLE_CPU;
+                }
+        }
+        snprintf(evt_path, MAXPATHLEN, "%s/%s/%s/id", debugfs_path,
+                 sys_name, evt_name);
+        fd = open(evt_path, O_RDONLY);
+        if (fd < 0)
+                return EVT_FAILED;
+        if (read(fd, id_buf, sizeof(id_buf)) < 0) {
+                close(fd);
+                return EVT_FAILED;
+        }
+        close(fd);
+        id = atoll(id_buf);
+        attr->config = id;
+        attr->type = PERF_TYPE_TRACEPOINT;
+        *strp = evt_name + evt_length;
+        return EVT_HANDLED;
+}
+/* sys + ':' + event + ':' + flags*/
+#define MAX_EVOPT_LEN   (MAX_EVENT_LENGTH * 2 + 2 + 128)
+static enum event_result
+parse_subsystem_tracepoint_event(char *sys_name, char *flags)
+{
+        char evt_path[MAXPATHLEN];
+        struct dirent *evt_ent;
+        DIR *evt_dir;
+        snprintf(evt_path, MAXPATHLEN, "%s/%s", debugfs_path, sys_name);
+        evt_dir = opendir(evt_path);
+        if (!evt_dir) {
+                perror("Can't open event dir");
+                return EVT_FAILED;
+        }
+        while ((evt_ent = readdir(evt_dir))) {
+                char event_opt[MAX_EVOPT_LEN + 1];
+                int len;
+                unsigned int rem = MAX_EVOPT_LEN;
+                if (!strcmp(evt_ent->d_name, ".")
+                    || !strcmp(evt_ent->d_name, "..")
+                    || !strcmp(evt_ent->d_name, "enable")
+                    || !strcmp(evt_ent->d_name, "filter"))
+                        continue;
+                len = snprintf(event_opt, MAX_EVOPT_LEN, "%s:%s", sys_name,
+                               evt_ent->d_name);
+                if (len < 0)
+                        return EVT_FAILED;
+                rem -= len;
+                if (flags) {
+                        if (rem < strlen(flags) + 1)
+                                return EVT_FAILED;
+                        strcat(event_opt, ":");
+                        strcat(event_opt, flags);
+                }
+                if (parse_events(NULL, event_opt, 0))
+                        return EVT_FAILED;
+        }
+        return EVT_HANDLED_ALL;
 }
-static int parse_tracepoint_event(const char **strp,
+static enum event_result parse_tracepoint_event(const char **strp,
                                    struct perf_counter_attr *attr)
 {
        const char *evt_name;
        char *flags;
        char sys_name[MAX_EVENT_LENGTH];
-        char id_buf[4];
-        int fd;
        unsigned int sys_length, evt_length;
-        u64 id;
-        char evt_path[MAXPATHLEN];
        if (valid_debugfs_mount(debugfs_path))
                return 0;
        evt_name = strchr(*strp, ':');
        if (!evt_name)
-                return 0;
+                return EVT_FAILED;
        sys_length = evt_name - *strp;
        if (sys_length >= MAX_EVENT_LENGTH)
@@ -434,32 +529,22 @@ static int parse_tracepoint_event(const char **strp,
        flags = strchr(evt_name, ':');
        if (flags) {
-                *flags = '\0';
+                /* split it out: */
+                evt_name = strndup(evt_name, flags - evt_name);
                flags++;
-                if (!strncmp(flags, "record", strlen(flags)))
-                        attr->sample_type |= PERF_SAMPLE_RAW;
        }
        evt_length = strlen(evt_name);
        if (evt_length >= MAX_EVENT_LENGTH)
-                return 0;
+                return EVT_FAILED;
-        snprintf(evt_path, MAXPATHLEN, "%s/%s/%s/id", debugfs_path,
-                 sys_name, evt_name);
-        fd = open(evt_path, O_RDONLY);
-        if (fd < 0)
-                return 0;
-        if (read(fd, id_buf, sizeof(id_buf)) < 0) {
+        if (!strcmp(evt_name, "*")) {
-                close(fd);
+                *strp = evt_name + evt_length;
-                return 0;
+                return parse_subsystem_tracepoint_event(sys_name, flags);
-        }
+        } else
-        close(fd);
+                return parse_single_tracepoint_event(sys_name, evt_name,
-        id = atoll(id_buf);
+                                                     evt_length, flags,
-        attr->config = id;
+                                                     attr, strp);
-        attr->type = PERF_TYPE_TRACEPOINT;
-        *strp = evt_name + evt_length;
-        return 1;
 }
 static int check_events(const char *str, unsigned int i)
@@ -477,7 +562,7 @@ static int check_events(const char *str, unsigned int i)
        return 0;
 }
-static int
+static enum event_result
 parse_symbolic_event(const char **strp, struct perf_counter_attr *attr)
 {
        const char *str = *strp;
@@ -490,31 +575,32 @@ parse_symbolic_event(const char **strp, struct perf_counter_attr *attr)
                        attr->type = event_symbols[i].type;
                        attr->config = event_symbols[i].config;
                        *strp = str + n;
-                        return 1;
+                        return EVT_HANDLED;
                }
        }
-        return 0;
+        return EVT_FAILED;
 }
-static int parse_raw_event(const char **strp, struct perf_counter_attr *attr)
+static enum event_result
+parse_raw_event(const char **strp, struct perf_counter_attr *attr)
 {
        const char *str = *strp;
        u64 config;
        int n;
        if (*str != 'r')
-                return 0;
+                return EVT_FAILED;
        n = hex2u64(str + 1, &config);
        if (n > 0) {
                *strp = str + n + 1;
                attr->type = PERF_TYPE_RAW;
                attr->config = config;
-                return 1;
+                return EVT_HANDLED;
        }
-        return 0;
+        return EVT_FAILED;
 }
-static int
+static enum event_result
 parse_numeric_event(const char **strp, struct perf_counter_attr *attr)
 {
        const char *str = *strp;
@@ -530,13 +616,13 @@ parse_numeric_event(const char **strp, struct perf_counter_attr *attr)
                        attr->type = type;
                        attr->config = config;
                        *strp = endp;
-                        return 1;
+                        return EVT_HANDLED;
                }
        }
-        return 0;
+        return EVT_FAILED;
 }
-static int
+static enum event_result
 parse_event_modifier(const char **strp, struct perf_counter_attr *attr)
 {
        const char *str = *strp;
@@ -569,37 +655,84 @@ parse_event_modifier(const char **strp, struct perf_counter_attr *attr)
 * Each event can have multiple symbolic names.
 * Symbolic names are (almost) exactly matched.
 */
-static int parse_event_symbols(const char **str, struct perf_counter_attr *attr)
+static enum event_result
+parse_event_symbols(const char **str, struct perf_counter_attr *attr)
 {
-        if (!(parse_tracepoint_event(str, attr) ||
+        enum event_result ret;
-              parse_raw_event(str, attr) ||
-              parse_numeric_event(str, attr) ||
+        ret = parse_tracepoint_event(str, attr);
-              parse_symbolic_event(str, attr) ||
+        if (ret != EVT_FAILED)
-              parse_generic_hw_event(str, attr)))
+                goto modifier;
-                return 0;
+        ret = parse_raw_event(str, attr);
+        if (ret != EVT_FAILED)
+                goto modifier;
+        ret = parse_numeric_event(str, attr);
+        if (ret != EVT_FAILED)
+                goto modifier;
+        ret = parse_symbolic_event(str, attr);
+        if (ret != EVT_FAILED)
+                goto modifier;
+        ret = parse_generic_hw_event(str, attr);
+        if (ret != EVT_FAILED)
+                goto modifier;
+        return EVT_FAILED;
+modifier:
        parse_event_modifier(str, attr);
-        return 1;
+        return ret;
 }
+static void store_event_type(const char *orgname)
+{
+        char filename[PATH_MAX], *c;
+        FILE *file;
+        int id;
+        sprintf(filename, "/sys/kernel/debug/tracing/events/%s/id", orgname);
+        c = strchr(filename, ':');
+        if (c)
+                *c = '/';
+        file = fopen(filename, "r");
+        if (!file)
+                return;
+        if (fscanf(file, "%i", &id) < 1)
+                die("cannot store event ID");
+        fclose(file);
+        perf_header__push_event(id, orgname);
+}
 int parse_events(const struct option *opt __used, const char *str, int unset __used)
 {
        struct perf_counter_attr attr;
+        enum event_result ret;
+        if (strchr(str, ':'))
+                store_event_type(str);
        for (;;) {
                if (nr_counters == MAX_COUNTERS)
                        return -1;
                memset(&attr, 0, sizeof(attr));
-                if (!parse_event_symbols(&str, &attr))
+                ret = parse_event_symbols(&str, &attr);
+                if (ret == EVT_FAILED)
                        return -1;
                if (!(*str == 0 || *str == ',' || isspace(*str)))
                        return -1;
-                attrs[nr_counters] = attr;
+                if (ret != EVT_HANDLED_ALL) {
-                nr_counters++;
+                        attrs[nr_counters] = attr;
+                        nr_counters++;
+                }
                if (*str == 0)
                        break;
diff --git a/tools/perf/util/parse-options.h b/tools/perf/util/parse-options.h
index 8aa3464c7090..2ee248ff27e5 100644
--- a/tools/perf/util/parse-options.h
+++ b/tools/perf/util/parse-options.h
@@ -104,6 +104,8 @@ struct option {
        { .type = OPTION_CALLBACK, .short_name = (s), .long_name = (l), .value = (v), .argh = "time", .help = (h), .callback = parse_opt_approxidate_cb }
 #define OPT_CALLBACK(s, l, v, a, h, f) \
        { .type = OPTION_CALLBACK, .short_name = (s), .long_name = (l), .value = (v), (a), .help = (h), .callback = (f) }
+#define OPT_CALLBACK_NOOPT(s, l, v, a, h, f) \
+        { .type = OPTION_CALLBACK, .short_name = (s), .long_name = (l), .value = (v), (a), .help = (h), .callback = (f), .flags = PARSE_OPT_NOARG }
 #define OPT_CALLBACK_DEFAULT(s, l, v, a, h, f, d) \
        { .type = OPTION_CALLBACK, .short_name = (s), .long_name = (l), .value = (v), (a), .help = (h), .callback = (f), .defval = (intptr_t)d, .flags = PARSE_OPT_LASTARG_DEFAULT }
diff --git a/tools/perf/util/svghelper.c b/tools/perf/util/svghelper.c
new file mode 100644
index 000000000000..b0fcecdf378d
--- /dev/null
+++ b/tools/perf/util/svghelper.c
@@ -0,0 +1,384 @@
+/*
+ * svghelper.c - helper functions for outputting svg
+ *
+ * (C) Copyright 2009 Intel Corporation
+ *
+ * Authors:
+ *     Arjan van de Ven <arjan@linux.intel.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; version 2
+ * of the License.
+ */
+#include <stdio.h>
+#include <stdlib.h>
+#include <unistd.h>
+#include <string.h>
+#include "svghelper.h"
+static u64 first_time, last_time;
+static u64 turbo_frequency, max_freq;
+#define SLOT_MULT 30.0
+#define SLOT_HEIGHT 25.0
+#define WIDTH 1000.0
+#define MIN_TEXT_SIZE 0.001
+static u64 total_height;
+static FILE *svgfile;
+static double cpu2slot(int cpu)
+{
+        return 2 * cpu + 1;
+}
+static double cpu2y(int cpu)
+{
+        return cpu2slot(cpu) * SLOT_MULT;
+}
+static double time2pixels(u64 time)
+{
+        double X;
+        X = WIDTH * (time - first_time) / (last_time - first_time);
+        return X;
+}
+void open_svg(const char *filename, int cpus, int rows)
+{
+        svgfile = fopen(filename, "w");
+        if (!svgfile) {
+                fprintf(stderr, "Cannot open %s for output\n", filename);
+                return;
+        }
+        total_height = (1 + rows + cpu2slot(cpus)) * SLOT_MULT;
+        fprintf(svgfile, "<?xml version=\"1.0\" standalone=\"no\"?> \n");
+        fprintf(svgfile, "<svg width=\"%4.1f\" height=\"%llu\" version=\"1.1\" xmlns=\"http://www.w3.org/2000/svg\">\n", WIDTH, total_height);
+        fprintf(svgfile, "<defs>\n  <style type=\"text/css\">\n    <![CDATA[\n");
+        fprintf(svgfile, "      rect          { stroke-width: 1; }\n");
+        fprintf(svgfile, "      rect.process  { fill:rgb(180,180,180); fill-opacity:0.9; stroke-width:1;   stroke:rgb(  0,  0,  0); } \n");
+        fprintf(svgfile, "      rect.process2 { fill:rgb(180,180,180); fill-opacity:0.9; stroke-width:0;   stroke:rgb(  0,  0,  0); } \n");
+        fprintf(svgfile, "      rect.sample   { fill:rgb(  0,  0,255); fill-opacity:0.8; stroke-width:0;   stroke:rgb(  0,  0,  0); } \n");
+        fprintf(svgfile, "      rect.blocked  { fill:rgb(255,  0,  0); fill-opacity:0.5; stroke-width:0;   stroke:rgb(  0,  0,  0); } \n");
+        fprintf(svgfile, "      rect.waiting  { fill:rgb(255,255,  0); fill-opacity:0.3; stroke-width:0;   stroke:rgb(  0,  0,  0); } \n");
+        fprintf(svgfile, "      rect.cpu      { fill:rgb(192,192,192); fill-opacity:0.2; stroke-width:0.5; stroke:rgb(128,128,128); } \n");
+        fprintf(svgfile, "      rect.pstate   { fill:rgb(128,128,128); fill-opacity:0.8; stroke-width:0; } \n");
+        fprintf(svgfile, "      rect.c1       { fill:rgb(255,214,214); fill-opacity:0.5; stroke-width:0; } \n");
+        fprintf(svgfile, "      rect.c2       { fill:rgb(255,172,172); fill-opacity:0.5; stroke-width:0; } \n");
+        fprintf(svgfile, "      rect.c3       { fill:rgb(255,130,130); fill-opacity:0.5; stroke-width:0; } \n");
+        fprintf(svgfile, "      rect.c4       { fill:rgb(255, 88, 88); fill-opacity:0.5; stroke-width:0; } \n");
+        fprintf(svgfile, "      rect.c5       { fill:rgb(255, 44, 44); fill-opacity:0.5; stroke-width:0; } \n");
+        fprintf(svgfile, "      rect.c6       { fill:rgb(255,  0,  0); fill-opacity:0.5; stroke-width:0; } \n");
+        fprintf(svgfile, "      line.pstate   { stroke:rgb(255,255,  0); stroke-opacity:0.8; stroke-width:2; } \n");
+        fprintf(svgfile, "    ]]>\n   </style>\n</defs>\n");
+}
+void svg_box(int Yslot, u64 start, u64 end, const char *type)
+{
+        if (!svgfile)
+                return;
+        fprintf(svgfile, "<rect x=\"%4.8f\" width=\"%4.8f\" y=\"%4.1f\" height=\"%4.1f\" class=\"%s\"/>\n",
+                time2pixels(start), time2pixels(end)-time2pixels(start), Yslot * SLOT_MULT, SLOT_HEIGHT, type);
+}
+void svg_sample(int Yslot, int cpu, u64 start, u64 end, const char *type)
+{
+        double text_size;
+        if (!svgfile)
+                return;
+        fprintf(svgfile, "<rect x=\"%4.8f\" width=\"%4.8f\" y=\"%4.1f\" height=\"%4.1f\" class=\"%s\"/>\n",
+                time2pixels(start), time2pixels(end)-time2pixels(start), Yslot * SLOT_MULT, SLOT_HEIGHT, type);
+        text_size = (time2pixels(end)-time2pixels(start));
+        if (cpu > 9)
+                text_size = text_size/2;
+        if (text_size > 1.25)
+                text_size = 1.25;
+        if (text_size > MIN_TEXT_SIZE)
+                fprintf(svgfile, "<text transform=\"translate(%1.8f,%1.8f)\" font-size=\"%1.6fpt\">%i</text>\n",
+                        time2pixels(start), Yslot *  SLOT_MULT + SLOT_HEIGHT - 1, text_size,  cpu + 1);
+}
+static char *cpu_model(void)
+{
+        static char cpu_m[255];
+        char buf[256];
+        FILE *file;
+        cpu_m[0] = 0;
+        /* CPU type */
+        file = fopen("/proc/cpuinfo", "r");
+        if (file) {
+                while (fgets(buf, 255, file)) {
+                        if (strstr(buf, "model name")) {
+                                strncpy(cpu_m, &buf[13], 255);
+                                break;
+                        }
+                }
+                fclose(file);
+        }
+        return cpu_m;
+}
+void svg_cpu_box(int cpu, u64 __max_freq, u64 __turbo_freq)
+{
+        char cpu_string[80];
+        if (!svgfile)
+                return;
+        max_freq = __max_freq;
+        turbo_frequency = __turbo_freq;
+        fprintf(svgfile, "<rect x=\"%4.8f\" width=\"%4.8f\" y=\"%4.1f\" height=\"%4.1f\" class=\"cpu\"/>\n",
+                time2pixels(first_time),
+                time2pixels(last_time)-time2pixels(first_time),
+                cpu2y(cpu), SLOT_MULT+SLOT_HEIGHT);
+        sprintf(cpu_string, "CPU %i", (int)cpu+1);
+        fprintf(svgfile, "<text transform=\"translate(%4.8f,%4.8f)\">%s</text>\n",
+                10+time2pixels(first_time), cpu2y(cpu) + SLOT_HEIGHT/2, cpu_string);
+        fprintf(svgfile, "<text transform=\"translate(%4.8f,%4.8f)\" font-size=\"1.25pt\">%s</text>\n",
+                10+time2pixels(first_time), cpu2y(cpu) + SLOT_MULT + SLOT_HEIGHT - 4, cpu_model());
+}
+void svg_process(int cpu, u64 start, u64 end, const char *type, const char *name)
+{
+        double width;
+        if (!svgfile)
+                return;
+        fprintf(svgfile, "<rect x=\"%4.8f\" width=\"%4.8f\" y=\"%4.1f\" height=\"%4.1f\" class=\"%s\"/>\n",
+                time2pixels(start), time2pixels(end)-time2pixels(start), cpu2y(cpu), SLOT_MULT+SLOT_HEIGHT, type);
+        width = time2pixels(end)-time2pixels(start);
+        if (width > 6)
+                width = 6;
+        if (width > MIN_TEXT_SIZE)
+                fprintf(svgfile, "<text  transform=\"translate(%4.8f,%4.8f) rotate(90)\" font-size=\"%3.4fpt\">%s</text>\n",
+                        time2pixels(start), cpu2y(cpu), width, name);
+}
+void svg_cstate(int cpu, u64 start, u64 end, int type)
+{
+        double width;
+        char style[128];
+        if (!svgfile)
+                return;
+        if (type > 6)
+                type = 6;
+        sprintf(style, "c%i", type);
+        fprintf(svgfile, "<rect class=\"%s\" x=\"%4.8f\" width=\"%4.8f\" y=\"%4.1f\" height=\"%4.1f\"/>\n",
+                style,
+                time2pixels(start), time2pixels(end)-time2pixels(start),
+                cpu2y(cpu), SLOT_MULT+SLOT_HEIGHT);
+        width = time2pixels(end)-time2pixels(start);
+        if (width > 6)
+                width = 6;
+        if (width > MIN_TEXT_SIZE)
+                fprintf(svgfile, "<text  transform=\"translate(%4.8f,%4.8f) rotate(90)\" font-size=\"%3.4fpt\">C%i</text>\n",
+                        time2pixels(start), cpu2y(cpu), width, type);
+}
+static char *HzToHuman(unsigned long hz)
+{
+        static char buffer[1024];
+        unsigned long long Hz;
+        memset(buffer, 0, 1024);
+        Hz = hz;
+        /* default: just put the Number in */
+        sprintf(buffer, "%9lli", Hz);
+        if (Hz > 1000)
+                sprintf(buffer, " %6lli Mhz", (Hz+500)/1000);
+        if (Hz > 1500000)
+                sprintf(buffer, " %6.2f Ghz", (Hz+5000.0)/1000000);
+        if (Hz == turbo_frequency)
+                sprintf(buffer, "Turbo");
+        return buffer;
+}
+void svg_pstate(int cpu, u64 start, u64 end, u64 freq)
+{
+        double height = 0;
+        if (!svgfile)
+                return;
+        if (max_freq)
+                height = freq * 1.0 / max_freq * (SLOT_HEIGHT + SLOT_MULT);
+        height = 1 + cpu2y(cpu) + SLOT_MULT + SLOT_HEIGHT - height;
+        fprintf(svgfile, "<line x1=\"%4.8f\" x2=\"%4.8f\" y1=\"%4.1f\" y2=\"%4.1f\" class=\"pstate\"/>\n",
+                time2pixels(start), time2pixels(end), height, height);
+        fprintf(svgfile, "<text transform=\"translate(%4.8f,%4.8f)\" font-size=\"0.25pt\">%s</text>\n",
+                time2pixels(start), height+0.9, HzToHuman(freq));
+}
+void svg_partial_wakeline(u64 start, int row1, int row2)
+{
+        double height;
+        if (!svgfile)
+                return;
+        if (row1 < row2) {
+                if (row1)
+                        fprintf(svgfile, "<line x1=\"%4.8f\" y1=\"%4.2f\" x2=\"%4.8f\" y2=\"%4.2f\" style=\"stroke:rgb(32,255,32);stroke-width:0.009\"/>\n",
+                                time2pixels(start), row1 * SLOT_MULT + SLOT_HEIGHT,  time2pixels(start), row1 * SLOT_MULT + SLOT_HEIGHT + SLOT_MULT/32);
+                if (row2)
+                        fprintf(svgfile, "<line x1=\"%4.8f\" y1=\"%4.2f\" x2=\"%4.8f\" y2=\"%4.2f\" style=\"stroke:rgb(32,255,32);stroke-width:0.009\"/>\n",
+                                time2pixels(start), row2 * SLOT_MULT - SLOT_MULT/32,  time2pixels(start), row2 * SLOT_MULT);
+        } else {
+                if (row2)
+                        fprintf(svgfile, "<line x1=\"%4.8f\" y1=\"%4.2f\" x2=\"%4.8f\" y2=\"%4.2f\" style=\"stroke:rgb(32,255,32);stroke-width:0.009\"/>\n",
+                                time2pixels(start), row2 * SLOT_MULT + SLOT_HEIGHT,  time2pixels(start), row2 * SLOT_MULT + SLOT_HEIGHT + SLOT_MULT/32);
+                if (row1)
+                        fprintf(svgfile, "<line x1=\"%4.8f\" y1=\"%4.2f\" x2=\"%4.8f\" y2=\"%4.2f\" style=\"stroke:rgb(32,255,32);stroke-width:0.009\"/>\n",
+                                time2pixels(start), row1 * SLOT_MULT - SLOT_MULT/32,  time2pixels(start), row1 * SLOT_MULT);
+        }
+        height = row1 * SLOT_MULT;
+        if (row2 > row1)
+                height += SLOT_HEIGHT;
+        if (row1)
+                fprintf(svgfile, "<circle  cx=\"%4.8f\" cy=\"%4.2f\" r = \"0.01\"  style=\"fill:rgb(32,255,32)\"/>\n",
+                        time2pixels(start), height);
+}
+void svg_wakeline(u64 start, int row1, int row2)
+{
+        double height;
+        if (!svgfile)
+                return;
+        if (row1 < row2)
+                fprintf(svgfile, "<line x1=\"%4.8f\" y1=\"%4.2f\" x2=\"%4.8f\" y2=\"%4.2f\" style=\"stroke:rgb(32,255,32);stroke-width:0.009\"/>\n",
+                        time2pixels(start), row1 * SLOT_MULT + SLOT_HEIGHT,  time2pixels(start), row2 * SLOT_MULT);
+        else
+                fprintf(svgfile, "<line x1=\"%4.8f\" y1=\"%4.2f\" x2=\"%4.8f\" y2=\"%4.2f\" style=\"stroke:rgb(32,255,32);stroke-width:0.009\"/>\n",
+                        time2pixels(start), row2 * SLOT_MULT + SLOT_HEIGHT,  time2pixels(start), row1 * SLOT_MULT);
+        height = row1 * SLOT_MULT;
+        if (row2 > row1)
+                height += SLOT_HEIGHT;
+        fprintf(svgfile, "<circle  cx=\"%4.8f\" cy=\"%4.2f\" r = \"0.01\"  style=\"fill:rgb(32,255,32)\"/>\n",
+                        time2pixels(start), height);
+}
+void svg_interrupt(u64 start, int row)
+{
+        if (!svgfile)
+                return;
+        fprintf(svgfile, "<circle  cx=\"%4.8f\" cy=\"%4.2f\" r = \"0.01\"  style=\"fill:rgb(255,128,128)\"/>\n",
+                        time2pixels(start), row * SLOT_MULT);
+        fprintf(svgfile, "<circle  cx=\"%4.8f\" cy=\"%4.2f\" r = \"0.01\"  style=\"fill:rgb(255,128,128)\"/>\n",
+                        time2pixels(start), row * SLOT_MULT + SLOT_HEIGHT);
+}
+void svg_text(int Yslot, u64 start, const char *text)
+{
+        if (!svgfile)
+                return;
+        fprintf(svgfile, "<text transform=\"translate(%4.8f,%4.8f)\">%s</text>\n",
+                time2pixels(start), Yslot * SLOT_MULT+SLOT_HEIGHT/2, text);
+}
+static void svg_legenda_box(int X, const char *text, const char *style)
+{
+        double boxsize;
+        boxsize = SLOT_HEIGHT / 2;
+        fprintf(svgfile, "<rect x=\"%i\" width=\"%4.8f\" y=\"0\" height=\"%4.1f\" class=\"%s\"/>\n",
+                X, boxsize, boxsize, style);
+        fprintf(svgfile, "<text transform=\"translate(%4.8f, %4.8f)\" font-size=\"%4.4fpt\">%s</text>\n",
+                X + boxsize + 5, boxsize, 0.8 * boxsize, text);
+}
+void svg_legenda(void)
+{
+        if (!svgfile)
+                return;
+        svg_legenda_box(0,      "Running", "sample");
+        svg_legenda_box(100,    "Idle","rect.c1");
+        svg_legenda_box(200,    "Deeper Idle", "rect.c3");
+        svg_legenda_box(350,    "Deepest Idle", "rect.c6");
+        svg_legenda_box(550,    "Sleeping", "process2");
+        svg_legenda_box(650,    "Waiting for cpu", "waiting");
+        svg_legenda_box(800,    "Blocked on IO", "blocked");
+}
+void svg_time_grid(u64 start, u64 end)
+{
+        u64 i;
+        first_time = start;
+        last_time = end;
+        first_time = first_time / 100000000 * 100000000;
+        if (!svgfile)
+                return;
+        i = first_time;
+        while (i < last_time) {
+                int color = 220;
+                double thickness = 0.075;
+                if ((i % 100000000) == 0) {
+                        thickness = 0.5;
+                        color = 192;
+                }
+                if ((i % 1000000000) == 0) {
+                        thickness = 2.0;
+                        color = 128;
+                }
+                fprintf(svgfile, "<line x1=\"%4.8f\" y1=\"%4.2f\" x2=\"%4.8f\" y2=\"%llu\" style=\"stroke:rgb(%i,%i,%i);stroke-width:%1.3f\"/>\n",
+                        time2pixels(i), SLOT_MULT/2, time2pixels(i), total_height, color, color, color, thickness);
+                i += 10000000;
+        }
+}
+void svg_close(void)
+{
+        if (svgfile) {
+                fprintf(svgfile, "</svg>\n");
+                fclose(svgfile);
+                svgfile = NULL;
+        }
+}
diff --git a/tools/perf/util/svghelper.h b/tools/perf/util/svghelper.h
new file mode 100644
index 000000000000..ad79b5dc53de
--- /dev/null
+++ b/tools/perf/util/svghelper.h
@@ -0,0 +1,25 @@
+#ifndef _INCLUDE_GUARD_SVG_HELPER_
+#define _INCLUDE_GUARD_SVG_HELPER_
+#include "types.h"
+extern void open_svg(const char *filename, int cpus, int rows);
+extern void svg_box(int Yslot, u64 start, u64 end, const char *type);
+extern void svg_sample(int Yslot, int cpu, u64 start, u64 end, const char *type);
+extern void svg_cpu_box(int cpu, u64 max_frequency, u64 turbo_frequency);
+extern void svg_process(int cpu, u64 start, u64 end, const char *type, const char *name);
+extern void svg_cstate(int cpu, u64 start, u64 end, int type);
+extern void svg_pstate(int cpu, u64 start, u64 end, u64 freq);
+extern void svg_time_grid(u64 start, u64 end);
+extern void svg_legenda(void);
+extern void svg_wakeline(u64 start, int row1, int row2);
+extern void svg_partial_wakeline(u64 start, int row1, int row2);
+extern void svg_interrupt(u64 start, int row);
+extern void svg_text(int Yslot, u64 start, const char *text);
+extern void svg_close(void);
+#endif
diff --git a/tools/perf/util/thread.c b/tools/perf/util/thread.c
index 7635928ca278..45efb5db0d19 100644
--- a/tools/perf/util/thread.c
+++ b/tools/perf/util/thread.c
@@ -8,7 +8,7 @@
 static struct thread *thread__new(pid_t pid)
 {
-        struct thread *self = malloc(sizeof(*self));
+        struct thread *self = calloc(1, sizeof(*self));
        if (self != NULL) {
                self->pid = pid;
@@ -85,7 +85,7 @@ register_idle_thread(struct rb_root *threads, struct thread **last_match)
 {
        struct thread *thread = threads__findnew(0, threads, last_match);
-        if (!thread || thread__set_comm(thread, "[init]")) {
+        if (!thread || thread__set_comm(thread, "swapper")) {
                fprintf(stderr, "problem inserting idle task.\n");
                exit(-1);
        }
diff --git a/tools/perf/util/thread.h b/tools/perf/util/thread.h
index 634f2809a342..32aea3c1c2ad 100644
--- a/tools/perf/util/thread.h
+++ b/tools/perf/util/thread.h
@@ -4,10 +4,11 @@
 #include "symbol.h"
 struct thread {
-        struct rb_node   rb_node;
+        struct rb_node          rb_node;
-        struct list_head maps;
+        struct list_head        maps;
-        pid_t            pid;
+        pid_t                   pid;
-        char             *comm;
+        char                    shortname[3];
+        char                    *comm;
 };
 int thread__set_comm(struct thread *self, const char *comm);
diff --git a/tools/perf/util/trace-event-info.c b/tools/perf/util/trace-event-info.c
index 6c9302a7274c..1fd824c1f1c4 100644
--- a/tools/perf/util/trace-event-info.c
+++ b/tools/perf/util/trace-event-info.c
@@ -458,7 +458,7 @@ static void read_proc_kallsyms(void)
 static void read_ftrace_printk(void)
 {
        unsigned int size, check_size;
-        const char *path;
+        char *path;
        struct stat st;
        int ret;
@@ -468,14 +468,15 @@ static void read_ftrace_printk(void)
                /* not found */
                size = 0;
                write_or_die(&size, 4);
-                return;
+                goto out;
        }
        size = get_size(path);
        write_or_die(&size, 4);
        check_size = copy_file(path);
        if (size != check_size)
                die("error in size of file '%s'", path);
+out:
+        put_tracing_file(path);
 }
 static struct tracepoint_path *
diff --git a/tools/perf/util/trace-event-parse.c b/tools/perf/util/trace-event-parse.c
index 629e602d9405..f6a8437141c8 100644
--- a/tools/perf/util/trace-event-parse.c
+++ b/tools/perf/util/trace-event-parse.c
@@ -1776,6 +1776,29 @@ static unsigned long long read_size(void *ptr, int size)
        }
 }
+unsigned long long
+raw_field_value(struct event *event, const char *name, void *data)
+{
+        struct format_field *field;
+        field = find_any_field(event, name);
+        if (!field)
+                return 0ULL;
+        return read_size(data + field->offset, field->size);
+}
+void *raw_field_ptr(struct event *event, const char *name, void *data)
+{
+        struct format_field *field;
+        field = find_any_field(event, name);
+        if (!field)
+                return NULL;
+        return data + field->offset;
+}
 static int get_common_info(const char *type, int *offset, int *size)
 {
        struct event *event;
@@ -1799,7 +1822,7 @@ static int get_common_info(const char *type, int *offset, int *size)
        return 0;
 }
-static int parse_common_type(void *data)
+int trace_parse_common_type(void *data)
 {
        static int type_offset;
        static int type_size;
@@ -1832,7 +1855,7 @@ static int parse_common_pid(void *data)
        return read_size(data + pid_offset, pid_size);
 }
-static struct event *find_event(int id)
+struct event *trace_find_event(int id)
 {
        struct event *event;
@@ -2420,8 +2443,8 @@ get_return_for_leaf(int cpu, int cur_pid, unsigned long long cur_func,
        int type;
        int pid;
-        type = parse_common_type(next->data);
+        type = trace_parse_common_type(next->data);
-        event = find_event(type);
+        event = trace_find_event(type);
        if (!event)
                return NULL;
@@ -2502,8 +2525,8 @@ print_graph_entry_leaf(struct event *event, void *data, struct record *ret_rec)
        int type;
        int i;
-        type = parse_common_type(ret_rec->data);
+        type = trace_parse_common_type(ret_rec->data);
-        ret_event = find_event(type);
+        ret_event = trace_find_event(type);
        field = find_field(ret_event, "rettime");
        if (!field)
@@ -2696,11 +2719,13 @@ void print_event(int cpu, void *data, int size, unsigned long long nsecs,
        nsecs -= secs * NSECS_PER_SEC;
        usecs = nsecs / NSECS_PER_USEC;
-        type = parse_common_type(data);
+        type = trace_parse_common_type(data);
-        event = find_event(type);
+        event = trace_find_event(type);
-        if (!event)
+        if (!event) {
-                die("ug! no event found for type %d", type);
+                printf("ug! no event found for type %d\n", type);
+                return;
+        }
        pid = parse_common_pid(data);
diff --git a/tools/perf/util/trace-event-read.c b/tools/perf/util/trace-event-read.c
index a1217a10632f..1b5c847d2c22 100644
--- a/tools/perf/util/trace-event-read.c
+++ b/tools/perf/util/trace-event-read.c
@@ -458,12 +458,13 @@ struct record *trace_read_data(int cpu)
        return data;
 }
-void trace_report (void)
+void trace_report(void)
 {
        const char *input_file = "trace.info";
        char buf[BUFSIZ];
        char test[] = { 23, 8, 68 };
        char *version;
+        int show_version = 0;
        int show_funcs = 0;
        int show_printk = 0;
@@ -480,7 +481,8 @@ void trace_report (void)
                die("not a trace file (missing tracing)");
        version = read_string();
-        printf("version = %s\n", version);
+        if (show_version)
+                printf("version = %s\n", version);
        free(version);
        read_or_die(buf, 1);
diff --git a/tools/perf/util/trace-event.h b/tools/perf/util/trace-event.h
index 420294a5773e..d35ebf1e29ff 100644
--- a/tools/perf/util/trace-event.h
+++ b/tools/perf/util/trace-event.h
@@ -234,6 +234,11 @@ extern int header_page_data_offset;
 extern int header_page_data_size;
 int parse_header_page(char *buf, unsigned long size);
+int trace_parse_common_type(void *data);
+struct event *trace_find_event(int id);
+unsigned long long
+raw_field_value(struct event *event, const char *name, void *data);
+void *raw_field_ptr(struct event *event, const char *name, void *data);
 void read_tracing_data(struct perf_counter_attr *pattrs, int nb_counters);