1 files changed, 56 insertions, 3 deletions
diff --git a/drivers/ata/sata_inic162x.c b/drivers/ata/sata_inic162x.c
index 1f5d17eb0f38..1b10455e1ae0 100644
--- a/drivers/ata/sata_inic162x.c
+++ b/drivers/ata/sata_inic162x.c
@@ -35,6 +35,7 @@ enum {
        NR_PORTS                = 2,
+        HOST_ACTRL              = 0x08,
        HOST_CTL                = 0x7c,
        HOST_STAT               = 0x7e,
        HOST_IRQ_STAT           = 0xbc,
@@ -43,22 +44,37 @@ enum {
        PORT_SIZE               = 0x40,
        /* registers for ATA TF operation */
-        PORT_TF                 = 0x00,
+        PORT_TF_DATA            = 0x00,
-        PORT_ALT_STAT           = 0x08,
+        PORT_TF_FEATURE         = 0x01,
+        PORT_TF_NSECT           = 0x02,
+        PORT_TF_LBAL            = 0x03,
+        PORT_TF_LBAM            = 0x04,
+        PORT_TF_LBAH            = 0x05,
+        PORT_TF_DEVICE          = 0x06,
+        PORT_TF_COMMAND         = 0x07,
+        PORT_TF_ALT_STAT        = 0x08,
        PORT_IRQ_STAT           = 0x09,
        PORT_IRQ_MASK           = 0x0a,
        PORT_PRD_CTL            = 0x0b,
        PORT_PRD_ADDR           = 0x0c,
        PORT_PRD_XFERLEN        = 0x10,
+        PORT_CPB_CPBLAR         = 0x18,
+        PORT_CPB_PTQFIFO        = 0x1c,
        /* IDMA register */
        PORT_IDMA_CTL           = 0x14,
+        PORT_IDMA_STAT          = 0x16,
+        PORT_RPQ_FIFO           = 0x1e,
+        PORT_RPQ_CNT            = 0x1f,
        PORT_SCR                = 0x20,
        /* HOST_CTL bits */
        HCTL_IRQOFF             = (1 << 8),  /* global IRQ off */
-        HCTL_PWRDWN             = (1 << 13), /* power down PHYs */
+        HCTL_FTHD0              = (1 << 10), /* fifo threshold 0 */
+        HCTL_FTHD1              = (1 << 11), /* fifo threshold 1*/
+        HCTL_PWRDWN             = (1 << 12), /* power down PHYs */
        HCTL_SOFTRST            = (1 << 13), /* global reset (no phy reset) */
        HCTL_RPGSEL             = (1 << 15), /* register page select */
@@ -96,6 +112,43 @@ enum {
        IDMA_CTL_RST_IDMA       = (1 << 5),  /* reset IDMA machinary */
        IDMA_CTL_GO             = (1 << 7),  /* IDMA mode go */
        IDMA_CTL_ATA_NIEN       = (1 << 8),  /* ATA IRQ disable */
+        /* PORT_IDMA_STAT bits */
+        IDMA_STAT_PERR          = (1 << 0),  /* PCI ERROR MODE */
+        IDMA_STAT_CPBERR        = (1 << 1),  /* ADMA CPB error */
+        IDMA_STAT_LGCY          = (1 << 3),  /* ADMA legacy */
+        IDMA_STAT_UIRQ          = (1 << 4),  /* ADMA unsolicited irq */
+        IDMA_STAT_STPD          = (1 << 5),  /* ADMA stopped */
+        IDMA_STAT_PSD           = (1 << 6),  /* ADMA pause */
+        IDMA_STAT_DONE          = (1 << 7),  /* ADMA done */
+        IDMA_STAT_ERR           = IDMA_STAT_PERR | IDMA_STAT_CPBERR,
+        /* CPB Control Flags*/
+        CPB_CTL_VALID           = (1 << 0),  /* CPB valid */
+        CPB_CTL_QUEUED          = (1 << 1),  /* queued command */
+        CPB_CTL_DATA            = (1 << 2),  /* data, rsvd in datasheet */
+        CPB_CTL_IEN             = (1 << 3),  /* PCI interrupt enable */
+        CPB_CTL_DEVDIR          = (1 << 4),  /* device direction control */
+        /* CPB Response Flags */
+        CPB_RESP_DONE           = (1 << 0),  /* ATA command complete */
+        CPB_RESP_REL            = (1 << 1),  /* ATA release */
+        CPB_RESP_IGNORED        = (1 << 2),  /* CPB ignored */
+        CPB_RESP_ATA_ERR        = (1 << 3),  /* ATA command error */
+        CPB_RESP_SPURIOUS       = (1 << 4),  /* ATA spurious interrupt error */
+        CPB_RESP_UNDERFLOW      = (1 << 5),  /* APRD deficiency length error */
+        CPB_RESP_OVERFLOW       = (1 << 6),  /* APRD exccess length error */
+        CPB_RESP_CPB_ERR        = (1 << 7),  /* CPB error flag */
+        /* PRD Control Flags */
+        PRD_DRAIN               = (1 << 1),  /* ignore data excess */
+        PRD_CDB                 = (1 << 2),  /* atapi packet command pointer */
+        PRD_DIRECT_INTR         = (1 << 3),  /* direct interrupt */
+        PRD_DMA                 = (1 << 4),  /* data transfer method */
+        PRD_WRITE               = (1 << 5),  /* data dir, rsvd in datasheet */
+        PRD_IOM                 = (1 << 6),  /* io/memory transfer */
+        PRD_END                 = (1 << 7),  /* APRD chain end */
 };
 struct inic_host_priv {

diff --git a/drivers/ata/sata_inic162x.c b/drivers/ata/sata_inic162x.c index 1f5d17eb0f38..1b10455e1ae0 100644 --- a/drivers/ata/sata_inic162x.c +++ b/drivers/ata/sata_inic162x.c
@@ -35,6 +35,7 @@ enum {
35		35
36	NR_PORTS = 2,	36	NR_PORTS = 2,
37		37
		38	HOST_ACTRL = 0x08,
38	HOST_CTL = 0x7c,	39	HOST_CTL = 0x7c,
39	HOST_STAT = 0x7e,	40	HOST_STAT = 0x7e,
40	HOST_IRQ_STAT = 0xbc,	41	HOST_IRQ_STAT = 0xbc,
@@ -43,22 +44,37 @@ enum {
43	PORT_SIZE = 0x40,	44	PORT_SIZE = 0x40,
44		45
45	/* registers for ATA TF operation */	46	/* registers for ATA TF operation */
46	PORT_TF = 0x00,	47	PORT_TF_DATA = 0x00,
47	PORT_ALT_STAT = 0x08,	48	PORT_TF_FEATURE = 0x01,
		49	PORT_TF_NSECT = 0x02,
		50	PORT_TF_LBAL = 0x03,
		51	PORT_TF_LBAM = 0x04,
		52	PORT_TF_LBAH = 0x05,
		53	PORT_TF_DEVICE = 0x06,
		54	PORT_TF_COMMAND = 0x07,
		55	PORT_TF_ALT_STAT = 0x08,
48	PORT_IRQ_STAT = 0x09,	56	PORT_IRQ_STAT = 0x09,
49	PORT_IRQ_MASK = 0x0a,	57	PORT_IRQ_MASK = 0x0a,
50	PORT_PRD_CTL = 0x0b,	58	PORT_PRD_CTL = 0x0b,
51	PORT_PRD_ADDR = 0x0c,	59	PORT_PRD_ADDR = 0x0c,
52	PORT_PRD_XFERLEN = 0x10,	60	PORT_PRD_XFERLEN = 0x10,
		61	PORT_CPB_CPBLAR = 0x18,
		62	PORT_CPB_PTQFIFO = 0x1c,
53		63
54	/* IDMA register */	64	/* IDMA register */
55	PORT_IDMA_CTL = 0x14,	65	PORT_IDMA_CTL = 0x14,
		66	PORT_IDMA_STAT = 0x16,
		67
		68	PORT_RPQ_FIFO = 0x1e,
		69	PORT_RPQ_CNT = 0x1f,
56		70
57	PORT_SCR = 0x20,	71	PORT_SCR = 0x20,
58		72
59	/* HOST_CTL bits */	73	/* HOST_CTL bits */
60	HCTL_IRQOFF = (1 << 8), /* global IRQ off */	74	HCTL_IRQOFF = (1 << 8), /* global IRQ off */
61	HCTL_PWRDWN = (1 << 13), /* power down PHYs */	75	HCTL_FTHD0 = (1 << 10), /* fifo threshold 0 */
		76	HCTL_FTHD1 = (1 << 11), /* fifo threshold 1*/
		77	HCTL_PWRDWN = (1 << 12), /* power down PHYs */
62	HCTL_SOFTRST = (1 << 13), /* global reset (no phy reset) */	78	HCTL_SOFTRST = (1 << 13), /* global reset (no phy reset) */
63	HCTL_RPGSEL = (1 << 15), /* register page select */	79	HCTL_RPGSEL = (1 << 15), /* register page select */
64		80
@@ -96,6 +112,43 @@ enum {
96	IDMA_CTL_RST_IDMA = (1 << 5), /* reset IDMA machinary */	112	IDMA_CTL_RST_IDMA = (1 << 5), /* reset IDMA machinary */
97	IDMA_CTL_GO = (1 << 7), /* IDMA mode go */	113	IDMA_CTL_GO = (1 << 7), /* IDMA mode go */
98	IDMA_CTL_ATA_NIEN = (1 << 8), /* ATA IRQ disable */	114	IDMA_CTL_ATA_NIEN = (1 << 8), /* ATA IRQ disable */
		115
		116	/* PORT_IDMA_STAT bits */
		117	IDMA_STAT_PERR = (1 << 0), /* PCI ERROR MODE */
		118	IDMA_STAT_CPBERR = (1 << 1), /* ADMA CPB error */
		119	IDMA_STAT_LGCY = (1 << 3), /* ADMA legacy */
		120	IDMA_STAT_UIRQ = (1 << 4), /* ADMA unsolicited irq */
		121	IDMA_STAT_STPD = (1 << 5), /* ADMA stopped */
		122	IDMA_STAT_PSD = (1 << 6), /* ADMA pause */
		123	IDMA_STAT_DONE = (1 << 7), /* ADMA done */
		124
		125	IDMA_STAT_ERR = IDMA_STAT_PERR \| IDMA_STAT_CPBERR,
		126
		127	/* CPB Control Flags*/
		128	CPB_CTL_VALID = (1 << 0), /* CPB valid */
		129	CPB_CTL_QUEUED = (1 << 1), /* queued command */
		130	CPB_CTL_DATA = (1 << 2), /* data, rsvd in datasheet */
		131	CPB_CTL_IEN = (1 << 3), /* PCI interrupt enable */
		132	CPB_CTL_DEVDIR = (1 << 4), /* device direction control */
		133
		134	/* CPB Response Flags */
		135	CPB_RESP_DONE = (1 << 0), /* ATA command complete */
		136	CPB_RESP_REL = (1 << 1), /* ATA release */
		137	CPB_RESP_IGNORED = (1 << 2), /* CPB ignored */
		138	CPB_RESP_ATA_ERR = (1 << 3), /* ATA command error */
		139	CPB_RESP_SPURIOUS = (1 << 4), /* ATA spurious interrupt error */
		140	CPB_RESP_UNDERFLOW = (1 << 5), /* APRD deficiency length error */
		141	CPB_RESP_OVERFLOW = (1 << 6), /* APRD exccess length error */
		142	CPB_RESP_CPB_ERR = (1 << 7), /* CPB error flag */
		143
		144	/* PRD Control Flags */
		145	PRD_DRAIN = (1 << 1), /* ignore data excess */
		146	PRD_CDB = (1 << 2), /* atapi packet command pointer */
		147	PRD_DIRECT_INTR = (1 << 3), /* direct interrupt */
		148	PRD_DMA = (1 << 4), /* data transfer method */
		149	PRD_WRITE = (1 << 5), /* data dir, rsvd in datasheet */
		150	PRD_IOM = (1 << 6), /* io/memory transfer */
		151	PRD_END = (1 << 7), /* APRD chain end */
99	};	152	};
100		153
101	struct inic_host_priv {	154	struct inic_host_priv {