diff options
| -rw-r--r-- | drivers/infiniband/core/mad.c | 4 | ||||
| -rw-r--r-- | drivers/infiniband/hw/cxgb4/cq.c | 6 | ||||
| -rw-r--r-- | drivers/infiniband/hw/cxgb4/device.c | 50 | ||||
| -rw-r--r-- | drivers/infiniband/hw/cxgb4/iw_cxgb4.h | 1 | ||||
| -rw-r--r-- | drivers/infiniband/hw/cxgb4/mem.c | 11 | ||||
| -rw-r--r-- | drivers/infiniband/hw/cxgb4/provider.c | 2 | ||||
| -rw-r--r-- | drivers/infiniband/hw/cxgb4/qp.c | 33 | ||||
| -rw-r--r-- | drivers/infiniband/hw/cxgb4/t4.h | 76 | ||||
| -rw-r--r-- | drivers/infiniband/hw/nes/nes_hw.c | 12 | ||||
| -rw-r--r-- | drivers/infiniband/hw/nes/nes_nic.c | 72 | ||||
| -rw-r--r-- | drivers/net/mlx4/icm.c | 36 |
11 files changed, 191 insertions, 112 deletions
diff --git a/drivers/infiniband/core/mad.c b/drivers/infiniband/core/mad.c index 6dc7b77d5d29..ef1304f151dc 100644 --- a/drivers/infiniband/core/mad.c +++ b/drivers/infiniband/core/mad.c | |||
| @@ -47,8 +47,8 @@ MODULE_DESCRIPTION("kernel IB MAD API"); | |||
| 47 | MODULE_AUTHOR("Hal Rosenstock"); | 47 | MODULE_AUTHOR("Hal Rosenstock"); |
| 48 | MODULE_AUTHOR("Sean Hefty"); | 48 | MODULE_AUTHOR("Sean Hefty"); |
| 49 | 49 | ||
| 50 | int mad_sendq_size = IB_MAD_QP_SEND_SIZE; | 50 | static int mad_sendq_size = IB_MAD_QP_SEND_SIZE; |
| 51 | int mad_recvq_size = IB_MAD_QP_RECV_SIZE; | 51 | static int mad_recvq_size = IB_MAD_QP_RECV_SIZE; |
| 52 | 52 | ||
| 53 | module_param_named(send_queue_size, mad_sendq_size, int, 0444); | 53 | module_param_named(send_queue_size, mad_sendq_size, int, 0444); |
| 54 | MODULE_PARM_DESC(send_queue_size, "Size of send queue in number of work requests"); | 54 | MODULE_PARM_DESC(send_queue_size, "Size of send queue in number of work requests"); |
diff --git a/drivers/infiniband/hw/cxgb4/cq.c b/drivers/infiniband/hw/cxgb4/cq.c index fb1aafcc294f..2447f5295482 100644 --- a/drivers/infiniband/hw/cxgb4/cq.c +++ b/drivers/infiniband/hw/cxgb4/cq.c | |||
| @@ -373,6 +373,7 @@ static void create_read_req_cqe(struct t4_wq *wq, struct t4_cqe *hw_cqe, | |||
| 373 | V_CQE_SWCQE(SW_CQE(hw_cqe)) | | 373 | V_CQE_SWCQE(SW_CQE(hw_cqe)) | |
| 374 | V_CQE_OPCODE(FW_RI_READ_REQ) | | 374 | V_CQE_OPCODE(FW_RI_READ_REQ) | |
| 375 | V_CQE_TYPE(1)); | 375 | V_CQE_TYPE(1)); |
| 376 | read_cqe->bits_type_ts = hw_cqe->bits_type_ts; | ||
| 376 | } | 377 | } |
| 377 | 378 | ||
| 378 | /* | 379 | /* |
| @@ -780,6 +781,9 @@ struct ib_cq *c4iw_create_cq(struct ib_device *ibdev, int entries, | |||
| 780 | /* account for the status page. */ | 781 | /* account for the status page. */ |
| 781 | entries++; | 782 | entries++; |
| 782 | 783 | ||
| 784 | /* IQ needs one extra entry to differentiate full vs empty. */ | ||
| 785 | entries++; | ||
| 786 | |||
| 783 | /* | 787 | /* |
| 784 | * entries must be multiple of 16 for HW. | 788 | * entries must be multiple of 16 for HW. |
| 785 | */ | 789 | */ |
| @@ -801,7 +805,7 @@ struct ib_cq *c4iw_create_cq(struct ib_device *ibdev, int entries, | |||
| 801 | 805 | ||
| 802 | chp->rhp = rhp; | 806 | chp->rhp = rhp; |
| 803 | chp->cq.size--; /* status page */ | 807 | chp->cq.size--; /* status page */ |
| 804 | chp->ibcq.cqe = chp->cq.size; | 808 | chp->ibcq.cqe = chp->cq.size - 1; |
| 805 | spin_lock_init(&chp->lock); | 809 | spin_lock_init(&chp->lock); |
| 806 | atomic_set(&chp->refcnt, 1); | 810 | atomic_set(&chp->refcnt, 1); |
| 807 | init_waitqueue_head(&chp->wait); | 811 | init_waitqueue_head(&chp->wait); |
diff --git a/drivers/infiniband/hw/cxgb4/device.c b/drivers/infiniband/hw/cxgb4/device.c index be23b5eab13b..d870f9c17c1e 100644 --- a/drivers/infiniband/hw/cxgb4/device.c +++ b/drivers/infiniband/hw/cxgb4/device.c | |||
| @@ -306,7 +306,8 @@ static void c4iw_remove(struct c4iw_dev *dev) | |||
| 306 | PDBG("%s c4iw_dev %p\n", __func__, dev); | 306 | PDBG("%s c4iw_dev %p\n", __func__, dev); |
| 307 | cancel_delayed_work_sync(&dev->db_drop_task); | 307 | cancel_delayed_work_sync(&dev->db_drop_task); |
| 308 | list_del(&dev->entry); | 308 | list_del(&dev->entry); |
| 309 | c4iw_unregister_device(dev); | 309 | if (dev->registered) |
| 310 | c4iw_unregister_device(dev); | ||
| 310 | c4iw_rdev_close(&dev->rdev); | 311 | c4iw_rdev_close(&dev->rdev); |
| 311 | idr_destroy(&dev->cqidr); | 312 | idr_destroy(&dev->cqidr); |
| 312 | idr_destroy(&dev->qpidr); | 313 | idr_destroy(&dev->qpidr); |
| @@ -343,12 +344,6 @@ static struct c4iw_dev *c4iw_alloc(const struct cxgb4_lld_info *infop) | |||
| 343 | list_add_tail(&devp->entry, &dev_list); | 344 | list_add_tail(&devp->entry, &dev_list); |
| 344 | mutex_unlock(&dev_mutex); | 345 | mutex_unlock(&dev_mutex); |
| 345 | 346 | ||
| 346 | if (c4iw_register_device(devp)) { | ||
| 347 | printk(KERN_ERR MOD "Unable to register device\n"); | ||
| 348 | mutex_lock(&dev_mutex); | ||
| 349 | c4iw_remove(devp); | ||
| 350 | mutex_unlock(&dev_mutex); | ||
| 351 | } | ||
| 352 | if (c4iw_debugfs_root) { | 347 | if (c4iw_debugfs_root) { |
| 353 | devp->debugfs_root = debugfs_create_dir( | 348 | devp->debugfs_root = debugfs_create_dir( |
| 354 | pci_name(devp->rdev.lldi.pdev), | 349 | pci_name(devp->rdev.lldi.pdev), |
| @@ -379,9 +374,6 @@ static void *c4iw_uld_add(const struct cxgb4_lld_info *infop) | |||
| 379 | 374 | ||
| 380 | for (i = 0; i < dev->rdev.lldi.nrxq; i++) | 375 | for (i = 0; i < dev->rdev.lldi.nrxq; i++) |
| 381 | PDBG("rxqid[%u] %u\n", i, dev->rdev.lldi.rxq_ids[i]); | 376 | PDBG("rxqid[%u] %u\n", i, dev->rdev.lldi.rxq_ids[i]); |
| 382 | |||
| 383 | printk(KERN_INFO MOD "Initialized device %s\n", | ||
| 384 | pci_name(dev->rdev.lldi.pdev)); | ||
| 385 | out: | 377 | out: |
| 386 | return dev; | 378 | return dev; |
| 387 | } | 379 | } |
| @@ -471,7 +463,41 @@ nomem: | |||
| 471 | 463 | ||
| 472 | static int c4iw_uld_state_change(void *handle, enum cxgb4_state new_state) | 464 | static int c4iw_uld_state_change(void *handle, enum cxgb4_state new_state) |
| 473 | { | 465 | { |
| 466 | struct c4iw_dev *dev = handle; | ||
| 467 | |||
| 474 | PDBG("%s new_state %u\n", __func__, new_state); | 468 | PDBG("%s new_state %u\n", __func__, new_state); |
| 469 | switch (new_state) { | ||
| 470 | case CXGB4_STATE_UP: | ||
| 471 | printk(KERN_INFO MOD "%s: Up\n", pci_name(dev->rdev.lldi.pdev)); | ||
| 472 | if (!dev->registered) { | ||
| 473 | int ret; | ||
| 474 | ret = c4iw_register_device(dev); | ||
| 475 | if (ret) | ||
| 476 | printk(KERN_ERR MOD | ||
| 477 | "%s: RDMA registration failed: %d\n", | ||
| 478 | pci_name(dev->rdev.lldi.pdev), ret); | ||
| 479 | } | ||
| 480 | break; | ||
| 481 | case CXGB4_STATE_DOWN: | ||
| 482 | printk(KERN_INFO MOD "%s: Down\n", | ||
| 483 | pci_name(dev->rdev.lldi.pdev)); | ||
| 484 | if (dev->registered) | ||
| 485 | c4iw_unregister_device(dev); | ||
| 486 | break; | ||
| 487 | case CXGB4_STATE_START_RECOVERY: | ||
| 488 | printk(KERN_INFO MOD "%s: Fatal Error\n", | ||
| 489 | pci_name(dev->rdev.lldi.pdev)); | ||
| 490 | if (dev->registered) | ||
| 491 | c4iw_unregister_device(dev); | ||
| 492 | break; | ||
| 493 | case CXGB4_STATE_DETACH: | ||
| 494 | printk(KERN_INFO MOD "%s: Detach\n", | ||
| 495 | pci_name(dev->rdev.lldi.pdev)); | ||
| 496 | mutex_lock(&dev_mutex); | ||
| 497 | c4iw_remove(dev); | ||
| 498 | mutex_unlock(&dev_mutex); | ||
| 499 | break; | ||
| 500 | } | ||
| 475 | return 0; | 501 | return 0; |
| 476 | } | 502 | } |
| 477 | 503 | ||
| @@ -504,14 +530,12 @@ static void __exit c4iw_exit_module(void) | |||
| 504 | { | 530 | { |
| 505 | struct c4iw_dev *dev, *tmp; | 531 | struct c4iw_dev *dev, *tmp; |
| 506 | 532 | ||
| 507 | cxgb4_unregister_uld(CXGB4_ULD_RDMA); | ||
| 508 | |||
| 509 | mutex_lock(&dev_mutex); | 533 | mutex_lock(&dev_mutex); |
| 510 | list_for_each_entry_safe(dev, tmp, &dev_list, entry) { | 534 | list_for_each_entry_safe(dev, tmp, &dev_list, entry) { |
| 511 | c4iw_remove(dev); | 535 | c4iw_remove(dev); |
| 512 | } | 536 | } |
| 513 | mutex_unlock(&dev_mutex); | 537 | mutex_unlock(&dev_mutex); |
| 514 | 538 | cxgb4_unregister_uld(CXGB4_ULD_RDMA); | |
| 515 | c4iw_cm_term(); | 539 | c4iw_cm_term(); |
| 516 | debugfs_remove_recursive(c4iw_debugfs_root); | 540 | debugfs_remove_recursive(c4iw_debugfs_root); |
| 517 | } | 541 | } |
diff --git a/drivers/infiniband/hw/cxgb4/iw_cxgb4.h b/drivers/infiniband/hw/cxgb4/iw_cxgb4.h index a6269981e815..277ab589b44d 100644 --- a/drivers/infiniband/hw/cxgb4/iw_cxgb4.h +++ b/drivers/infiniband/hw/cxgb4/iw_cxgb4.h | |||
| @@ -152,6 +152,7 @@ struct c4iw_dev { | |||
| 152 | struct list_head entry; | 152 | struct list_head entry; |
| 153 | struct delayed_work db_drop_task; | 153 | struct delayed_work db_drop_task; |
| 154 | struct dentry *debugfs_root; | 154 | struct dentry *debugfs_root; |
| 155 | u8 registered; | ||
| 155 | }; | 156 | }; |
| 156 | 157 | ||
| 157 | static inline struct c4iw_dev *to_c4iw_dev(struct ib_device *ibdev) | 158 | static inline struct c4iw_dev *to_c4iw_dev(struct ib_device *ibdev) |
diff --git a/drivers/infiniband/hw/cxgb4/mem.c b/drivers/infiniband/hw/cxgb4/mem.c index e54ff6d25691..7f94da1a2437 100644 --- a/drivers/infiniband/hw/cxgb4/mem.c +++ b/drivers/infiniband/hw/cxgb4/mem.c | |||
| @@ -712,8 +712,10 @@ struct ib_mr *c4iw_alloc_fast_reg_mr(struct ib_pd *pd, int pbl_depth) | |||
| 712 | php = to_c4iw_pd(pd); | 712 | php = to_c4iw_pd(pd); |
| 713 | rhp = php->rhp; | 713 | rhp = php->rhp; |
| 714 | mhp = kzalloc(sizeof(*mhp), GFP_KERNEL); | 714 | mhp = kzalloc(sizeof(*mhp), GFP_KERNEL); |
| 715 | if (!mhp) | 715 | if (!mhp) { |
| 716 | ret = -ENOMEM; | ||
| 716 | goto err; | 717 | goto err; |
| 718 | } | ||
| 717 | 719 | ||
| 718 | mhp->rhp = rhp; | 720 | mhp->rhp = rhp; |
| 719 | ret = alloc_pbl(mhp, pbl_depth); | 721 | ret = alloc_pbl(mhp, pbl_depth); |
| @@ -730,8 +732,10 @@ struct ib_mr *c4iw_alloc_fast_reg_mr(struct ib_pd *pd, int pbl_depth) | |||
| 730 | mhp->attr.state = 1; | 732 | mhp->attr.state = 1; |
| 731 | mmid = (stag) >> 8; | 733 | mmid = (stag) >> 8; |
| 732 | mhp->ibmr.rkey = mhp->ibmr.lkey = stag; | 734 | mhp->ibmr.rkey = mhp->ibmr.lkey = stag; |
| 733 | if (insert_handle(rhp, &rhp->mmidr, mhp, mmid)) | 735 | if (insert_handle(rhp, &rhp->mmidr, mhp, mmid)) { |
| 736 | ret = -ENOMEM; | ||
| 734 | goto err3; | 737 | goto err3; |
| 738 | } | ||
| 735 | 739 | ||
| 736 | PDBG("%s mmid 0x%x mhp %p stag 0x%x\n", __func__, mmid, mhp, stag); | 740 | PDBG("%s mmid 0x%x mhp %p stag 0x%x\n", __func__, mmid, mhp, stag); |
| 737 | return &(mhp->ibmr); | 741 | return &(mhp->ibmr); |
| @@ -755,9 +759,6 @@ struct ib_fast_reg_page_list *c4iw_alloc_fastreg_pbl(struct ib_device *device, | |||
| 755 | dma_addr_t dma_addr; | 759 | dma_addr_t dma_addr; |
| 756 | int size = sizeof *c4pl + page_list_len * sizeof(u64); | 760 | int size = sizeof *c4pl + page_list_len * sizeof(u64); |
| 757 | 761 | ||
| 758 | if (page_list_len > T4_MAX_FR_DEPTH) | ||
| 759 | return ERR_PTR(-EINVAL); | ||
| 760 | |||
| 761 | c4pl = dma_alloc_coherent(&dev->rdev.lldi.pdev->dev, size, | 762 | c4pl = dma_alloc_coherent(&dev->rdev.lldi.pdev->dev, size, |
| 762 | &dma_addr, GFP_KERNEL); | 763 | &dma_addr, GFP_KERNEL); |
| 763 | if (!c4pl) | 764 | if (!c4pl) |
diff --git a/drivers/infiniband/hw/cxgb4/provider.c b/drivers/infiniband/hw/cxgb4/provider.c index cd3d6e2c7edf..8f645c83a125 100644 --- a/drivers/infiniband/hw/cxgb4/provider.c +++ b/drivers/infiniband/hw/cxgb4/provider.c | |||
| @@ -496,6 +496,7 @@ int c4iw_register_device(struct c4iw_dev *dev) | |||
| 496 | if (ret) | 496 | if (ret) |
| 497 | goto bail2; | 497 | goto bail2; |
| 498 | } | 498 | } |
| 499 | dev->registered = 1; | ||
| 499 | return 0; | 500 | return 0; |
| 500 | bail2: | 501 | bail2: |
| 501 | ib_unregister_device(&dev->ibdev); | 502 | ib_unregister_device(&dev->ibdev); |
| @@ -514,5 +515,6 @@ void c4iw_unregister_device(struct c4iw_dev *dev) | |||
| 514 | c4iw_class_attributes[i]); | 515 | c4iw_class_attributes[i]); |
| 515 | ib_unregister_device(&dev->ibdev); | 516 | ib_unregister_device(&dev->ibdev); |
| 516 | kfree(dev->ibdev.iwcm); | 517 | kfree(dev->ibdev.iwcm); |
| 518 | dev->registered = 0; | ||
| 517 | return; | 519 | return; |
| 518 | } | 520 | } |
diff --git a/drivers/infiniband/hw/cxgb4/qp.c b/drivers/infiniband/hw/cxgb4/qp.c index 83a01dc0c4c1..0c28ed1eafa6 100644 --- a/drivers/infiniband/hw/cxgb4/qp.c +++ b/drivers/infiniband/hw/cxgb4/qp.c | |||
| @@ -572,9 +572,13 @@ int c4iw_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr, | |||
| 572 | err = build_rdma_write(wqe, wr, &len16); | 572 | err = build_rdma_write(wqe, wr, &len16); |
| 573 | break; | 573 | break; |
| 574 | case IB_WR_RDMA_READ: | 574 | case IB_WR_RDMA_READ: |
| 575 | case IB_WR_RDMA_READ_WITH_INV: | ||
| 575 | fw_opcode = FW_RI_RDMA_READ_WR; | 576 | fw_opcode = FW_RI_RDMA_READ_WR; |
| 576 | swsqe->opcode = FW_RI_READ_REQ; | 577 | swsqe->opcode = FW_RI_READ_REQ; |
| 577 | fw_flags = 0; | 578 | if (wr->opcode == IB_WR_RDMA_READ_WITH_INV) |
| 579 | fw_flags |= FW_RI_RDMA_READ_INVALIDATE; | ||
| 580 | else | ||
| 581 | fw_flags = 0; | ||
| 578 | err = build_rdma_read(wqe, wr, &len16); | 582 | err = build_rdma_read(wqe, wr, &len16); |
| 579 | if (err) | 583 | if (err) |
| 580 | break; | 584 | break; |
| @@ -588,6 +592,8 @@ int c4iw_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr, | |||
| 588 | err = build_fastreg(wqe, wr, &len16); | 592 | err = build_fastreg(wqe, wr, &len16); |
| 589 | break; | 593 | break; |
| 590 | case IB_WR_LOCAL_INV: | 594 | case IB_WR_LOCAL_INV: |
| 595 | if (wr->send_flags & IB_SEND_FENCE) | ||
| 596 | fw_flags |= FW_RI_LOCAL_FENCE_FLAG; | ||
| 591 | fw_opcode = FW_RI_INV_LSTAG_WR; | 597 | fw_opcode = FW_RI_INV_LSTAG_WR; |
| 592 | swsqe->opcode = FW_RI_LOCAL_INV; | 598 | swsqe->opcode = FW_RI_LOCAL_INV; |
| 593 | err = build_inv_stag(wqe, wr, &len16); | 599 | err = build_inv_stag(wqe, wr, &len16); |
| @@ -1339,7 +1345,6 @@ int c4iw_destroy_qp(struct ib_qp *ib_qp) | |||
| 1339 | wait_event(qhp->wait, !qhp->ep); | 1345 | wait_event(qhp->wait, !qhp->ep); |
| 1340 | 1346 | ||
| 1341 | remove_handle(rhp, &rhp->qpidr, qhp->wq.sq.qid); | 1347 | remove_handle(rhp, &rhp->qpidr, qhp->wq.sq.qid); |
| 1342 | remove_handle(rhp, &rhp->qpidr, qhp->wq.rq.qid); | ||
| 1343 | atomic_dec(&qhp->refcnt); | 1348 | atomic_dec(&qhp->refcnt); |
| 1344 | wait_event(qhp->wait, !atomic_read(&qhp->refcnt)); | 1349 | wait_event(qhp->wait, !atomic_read(&qhp->refcnt)); |
| 1345 | 1350 | ||
| @@ -1442,30 +1447,26 @@ struct ib_qp *c4iw_create_qp(struct ib_pd *pd, struct ib_qp_init_attr *attrs, | |||
| 1442 | if (ret) | 1447 | if (ret) |
| 1443 | goto err2; | 1448 | goto err2; |
| 1444 | 1449 | ||
| 1445 | ret = insert_handle(rhp, &rhp->qpidr, qhp, qhp->wq.rq.qid); | ||
| 1446 | if (ret) | ||
| 1447 | goto err3; | ||
| 1448 | |||
| 1449 | if (udata) { | 1450 | if (udata) { |
| 1450 | mm1 = kmalloc(sizeof *mm1, GFP_KERNEL); | 1451 | mm1 = kmalloc(sizeof *mm1, GFP_KERNEL); |
| 1451 | if (!mm1) { | 1452 | if (!mm1) { |
| 1452 | ret = -ENOMEM; | 1453 | ret = -ENOMEM; |
| 1453 | goto err4; | 1454 | goto err3; |
| 1454 | } | 1455 | } |
| 1455 | mm2 = kmalloc(sizeof *mm2, GFP_KERNEL); | 1456 | mm2 = kmalloc(sizeof *mm2, GFP_KERNEL); |
| 1456 | if (!mm2) { | 1457 | if (!mm2) { |
| 1457 | ret = -ENOMEM; | 1458 | ret = -ENOMEM; |
| 1458 | goto err5; | 1459 | goto err4; |
| 1459 | } | 1460 | } |
| 1460 | mm3 = kmalloc(sizeof *mm3, GFP_KERNEL); | 1461 | mm3 = kmalloc(sizeof *mm3, GFP_KERNEL); |
| 1461 | if (!mm3) { | 1462 | if (!mm3) { |
| 1462 | ret = -ENOMEM; | 1463 | ret = -ENOMEM; |
| 1463 | goto err6; | 1464 | goto err5; |
| 1464 | } | 1465 | } |
| 1465 | mm4 = kmalloc(sizeof *mm4, GFP_KERNEL); | 1466 | mm4 = kmalloc(sizeof *mm4, GFP_KERNEL); |
| 1466 | if (!mm4) { | 1467 | if (!mm4) { |
| 1467 | ret = -ENOMEM; | 1468 | ret = -ENOMEM; |
| 1468 | goto err7; | 1469 | goto err6; |
| 1469 | } | 1470 | } |
| 1470 | 1471 | ||
| 1471 | uresp.qid_mask = rhp->rdev.qpmask; | 1472 | uresp.qid_mask = rhp->rdev.qpmask; |
| @@ -1487,7 +1488,7 @@ struct ib_qp *c4iw_create_qp(struct ib_pd *pd, struct ib_qp_init_attr *attrs, | |||
| 1487 | spin_unlock(&ucontext->mmap_lock); | 1488 | spin_unlock(&ucontext->mmap_lock); |
| 1488 | ret = ib_copy_to_udata(udata, &uresp, sizeof uresp); | 1489 | ret = ib_copy_to_udata(udata, &uresp, sizeof uresp); |
| 1489 | if (ret) | 1490 | if (ret) |
| 1490 | goto err8; | 1491 | goto err7; |
| 1491 | mm1->key = uresp.sq_key; | 1492 | mm1->key = uresp.sq_key; |
| 1492 | mm1->addr = virt_to_phys(qhp->wq.sq.queue); | 1493 | mm1->addr = virt_to_phys(qhp->wq.sq.queue); |
| 1493 | mm1->len = PAGE_ALIGN(qhp->wq.sq.memsize); | 1494 | mm1->len = PAGE_ALIGN(qhp->wq.sq.memsize); |
| @@ -1511,16 +1512,14 @@ struct ib_qp *c4iw_create_qp(struct ib_pd *pd, struct ib_qp_init_attr *attrs, | |||
| 1511 | __func__, qhp, qhp->attr.sq_num_entries, qhp->attr.rq_num_entries, | 1512 | __func__, qhp, qhp->attr.sq_num_entries, qhp->attr.rq_num_entries, |
| 1512 | qhp->wq.sq.qid); | 1513 | qhp->wq.sq.qid); |
| 1513 | return &qhp->ibqp; | 1514 | return &qhp->ibqp; |
| 1514 | err8: | ||
| 1515 | kfree(mm4); | ||
| 1516 | err7: | 1515 | err7: |
| 1517 | kfree(mm3); | 1516 | kfree(mm4); |
| 1518 | err6: | 1517 | err6: |
| 1519 | kfree(mm2); | 1518 | kfree(mm3); |
| 1520 | err5: | 1519 | err5: |
| 1521 | kfree(mm1); | 1520 | kfree(mm2); |
| 1522 | err4: | 1521 | err4: |
| 1523 | remove_handle(rhp, &rhp->qpidr, qhp->wq.rq.qid); | 1522 | kfree(mm1); |
| 1524 | err3: | 1523 | err3: |
| 1525 | remove_handle(rhp, &rhp->qpidr, qhp->wq.sq.qid); | 1524 | remove_handle(rhp, &rhp->qpidr, qhp->wq.sq.qid); |
| 1526 | err2: | 1525 | err2: |
diff --git a/drivers/infiniband/hw/cxgb4/t4.h b/drivers/infiniband/hw/cxgb4/t4.h index d0e8af352408..1057cb96302e 100644 --- a/drivers/infiniband/hw/cxgb4/t4.h +++ b/drivers/infiniband/hw/cxgb4/t4.h | |||
| @@ -41,11 +41,13 @@ | |||
| 41 | #define T4_MAX_NUM_QP (1<<16) | 41 | #define T4_MAX_NUM_QP (1<<16) |
| 42 | #define T4_MAX_NUM_CQ (1<<15) | 42 | #define T4_MAX_NUM_CQ (1<<15) |
| 43 | #define T4_MAX_NUM_PD (1<<15) | 43 | #define T4_MAX_NUM_PD (1<<15) |
| 44 | #define T4_MAX_PBL_SIZE 256 | 44 | #define T4_EQ_STATUS_ENTRIES (L1_CACHE_BYTES > 64 ? 2 : 1) |
| 45 | #define T4_MAX_RQ_SIZE 1024 | 45 | #define T4_MAX_EQ_SIZE (65520 - T4_EQ_STATUS_ENTRIES) |
| 46 | #define T4_MAX_SQ_SIZE 1024 | 46 | #define T4_MAX_IQ_SIZE (65520 - 1) |
| 47 | #define T4_MAX_QP_DEPTH (T4_MAX_RQ_SIZE-1) | 47 | #define T4_MAX_RQ_SIZE (8192 - T4_EQ_STATUS_ENTRIES) |
| 48 | #define T4_MAX_CQ_DEPTH 8192 | 48 | #define T4_MAX_SQ_SIZE (T4_MAX_EQ_SIZE - 1) |
| 49 | #define T4_MAX_QP_DEPTH (T4_MAX_RQ_SIZE - 1) | ||
| 50 | #define T4_MAX_CQ_DEPTH (T4_MAX_IQ_SIZE - 1) | ||
| 49 | #define T4_MAX_NUM_STAG (1<<15) | 51 | #define T4_MAX_NUM_STAG (1<<15) |
| 50 | #define T4_MAX_MR_SIZE (~0ULL - 1) | 52 | #define T4_MAX_MR_SIZE (~0ULL - 1) |
| 51 | #define T4_PAGESIZE_MASK 0xffff000 /* 4KB-128MB */ | 53 | #define T4_PAGESIZE_MASK 0xffff000 /* 4KB-128MB */ |
| @@ -79,12 +81,11 @@ struct t4_status_page { | |||
| 79 | sizeof(struct fw_ri_isgl)) / sizeof(struct fw_ri_sge)) | 81 | sizeof(struct fw_ri_isgl)) / sizeof(struct fw_ri_sge)) |
| 80 | #define T4_MAX_FR_IMMD ((T4_SQ_NUM_BYTES - sizeof(struct fw_ri_fr_nsmr_wr) - \ | 82 | #define T4_MAX_FR_IMMD ((T4_SQ_NUM_BYTES - sizeof(struct fw_ri_fr_nsmr_wr) - \ |
| 81 | sizeof(struct fw_ri_immd))) | 83 | sizeof(struct fw_ri_immd))) |
| 82 | #define T4_MAX_FR_DEPTH 255 | 84 | #define T4_MAX_FR_DEPTH (T4_MAX_FR_IMMD / sizeof(u64)) |
| 83 | 85 | ||
| 84 | #define T4_RQ_NUM_SLOTS 2 | 86 | #define T4_RQ_NUM_SLOTS 2 |
| 85 | #define T4_RQ_NUM_BYTES (T4_EQ_SIZE * T4_RQ_NUM_SLOTS) | 87 | #define T4_RQ_NUM_BYTES (T4_EQ_SIZE * T4_RQ_NUM_SLOTS) |
| 86 | #define T4_MAX_RECV_SGE ((T4_RQ_NUM_BYTES - sizeof(struct fw_ri_recv_wr) - \ | 88 | #define T4_MAX_RECV_SGE 4 |
| 87 | sizeof(struct fw_ri_isgl)) / sizeof(struct fw_ri_sge)) | ||
| 88 | 89 | ||
| 89 | union t4_wr { | 90 | union t4_wr { |
| 90 | struct fw_ri_res_wr res; | 91 | struct fw_ri_res_wr res; |
| @@ -434,7 +435,7 @@ struct t4_cq { | |||
| 434 | struct c4iw_rdev *rdev; | 435 | struct c4iw_rdev *rdev; |
| 435 | u64 ugts; | 436 | u64 ugts; |
| 436 | size_t memsize; | 437 | size_t memsize; |
| 437 | u64 timestamp; | 438 | __be64 bits_type_ts; |
| 438 | u32 cqid; | 439 | u32 cqid; |
| 439 | u16 size; /* including status page */ | 440 | u16 size; /* including status page */ |
| 440 | u16 cidx; | 441 | u16 cidx; |
| @@ -449,25 +450,17 @@ struct t4_cq { | |||
| 449 | static inline int t4_arm_cq(struct t4_cq *cq, int se) | 450 | static inline int t4_arm_cq(struct t4_cq *cq, int se) |
| 450 | { | 451 | { |
| 451 | u32 val; | 452 | u32 val; |
| 452 | u16 inc; | 453 | |
| 453 | 454 | while (cq->cidx_inc > CIDXINC_MASK) { | |
| 454 | do { | 455 | val = SEINTARM(0) | CIDXINC(CIDXINC_MASK) | TIMERREG(7) | |
| 455 | /* | 456 | INGRESSQID(cq->cqid); |
| 456 | * inc must be less the both the max update value -and- | ||
| 457 | * the size of the CQ. | ||
| 458 | */ | ||
| 459 | inc = cq->cidx_inc <= CIDXINC_MASK ? cq->cidx_inc : | ||
| 460 | CIDXINC_MASK; | ||
| 461 | inc = inc <= (cq->size - 1) ? inc : (cq->size - 1); | ||
| 462 | if (inc == cq->cidx_inc) | ||
| 463 | val = SEINTARM(se) | CIDXINC(inc) | TIMERREG(6) | | ||
| 464 | INGRESSQID(cq->cqid); | ||
| 465 | else | ||
| 466 | val = SEINTARM(0) | CIDXINC(inc) | TIMERREG(7) | | ||
| 467 | INGRESSQID(cq->cqid); | ||
| 468 | cq->cidx_inc -= inc; | ||
| 469 | writel(val, cq->gts); | 457 | writel(val, cq->gts); |
| 470 | } while (cq->cidx_inc); | 458 | cq->cidx_inc -= CIDXINC_MASK; |
| 459 | } | ||
| 460 | val = SEINTARM(se) | CIDXINC(cq->cidx_inc) | TIMERREG(6) | | ||
| 461 | INGRESSQID(cq->cqid); | ||
| 462 | writel(val, cq->gts); | ||
| 463 | cq->cidx_inc = 0; | ||
| 471 | return 0; | 464 | return 0; |
| 472 | } | 465 | } |
| 473 | 466 | ||
| @@ -487,7 +480,9 @@ static inline void t4_swcq_consume(struct t4_cq *cq) | |||
| 487 | 480 | ||
| 488 | static inline void t4_hwcq_consume(struct t4_cq *cq) | 481 | static inline void t4_hwcq_consume(struct t4_cq *cq) |
| 489 | { | 482 | { |
| 490 | cq->cidx_inc++; | 483 | cq->bits_type_ts = cq->queue[cq->cidx].bits_type_ts; |
| 484 | if (++cq->cidx_inc == cq->size) | ||
| 485 | cq->cidx_inc = 0; | ||
| 491 | if (++cq->cidx == cq->size) { | 486 | if (++cq->cidx == cq->size) { |
| 492 | cq->cidx = 0; | 487 | cq->cidx = 0; |
| 493 | cq->gen ^= 1; | 488 | cq->gen ^= 1; |
| @@ -501,20 +496,23 @@ static inline int t4_valid_cqe(struct t4_cq *cq, struct t4_cqe *cqe) | |||
| 501 | 496 | ||
| 502 | static inline int t4_next_hw_cqe(struct t4_cq *cq, struct t4_cqe **cqe) | 497 | static inline int t4_next_hw_cqe(struct t4_cq *cq, struct t4_cqe **cqe) |
| 503 | { | 498 | { |
| 504 | int ret = 0; | 499 | int ret; |
| 505 | u64 bits_type_ts = be64_to_cpu(cq->queue[cq->cidx].bits_type_ts); | 500 | u16 prev_cidx; |
| 506 | 501 | ||
| 507 | if (G_CQE_GENBIT(bits_type_ts) == cq->gen) { | 502 | if (cq->cidx == 0) |
| 508 | *cqe = &cq->queue[cq->cidx]; | 503 | prev_cidx = cq->size - 1; |
| 509 | cq->timestamp = G_CQE_TS(bits_type_ts); | ||
| 510 | } else if (G_CQE_TS(bits_type_ts) > cq->timestamp) | ||
| 511 | ret = -EOVERFLOW; | ||
| 512 | else | 504 | else |
| 513 | ret = -ENODATA; | 505 | prev_cidx = cq->cidx - 1; |
| 514 | if (ret == -EOVERFLOW) { | 506 | |
| 515 | printk(KERN_ERR MOD "cq overflow cqid %u\n", cq->cqid); | 507 | if (cq->queue[prev_cidx].bits_type_ts != cq->bits_type_ts) { |
| 508 | ret = -EOVERFLOW; | ||
| 516 | cq->error = 1; | 509 | cq->error = 1; |
| 517 | } | 510 | printk(KERN_ERR MOD "cq overflow cqid %u\n", cq->cqid); |
| 511 | } else if (t4_valid_cqe(cq, &cq->queue[cq->cidx])) { | ||
| 512 | *cqe = &cq->queue[cq->cidx]; | ||
| 513 | ret = 0; | ||
| 514 | } else | ||
| 515 | ret = -ENODATA; | ||
| 518 | return ret; | 516 | return ret; |
| 519 | } | 517 | } |
| 520 | 518 | ||
diff --git a/drivers/infiniband/hw/nes/nes_hw.c b/drivers/infiniband/hw/nes/nes_hw.c index 86acb7d57064..57874a165083 100644 --- a/drivers/infiniband/hw/nes/nes_hw.c +++ b/drivers/infiniband/hw/nes/nes_hw.c | |||
| @@ -2584,7 +2584,6 @@ static void nes_process_mac_intr(struct nes_device *nesdev, u32 mac_number) | |||
| 2584 | break; | 2584 | break; |
| 2585 | } | 2585 | } |
| 2586 | } | 2586 | } |
| 2587 | spin_unlock_irqrestore(&nesadapter->phy_lock, flags); | ||
| 2588 | 2587 | ||
| 2589 | if (phy_data & 0x0004) { | 2588 | if (phy_data & 0x0004) { |
| 2590 | if (wide_ppm_offset && | 2589 | if (wide_ppm_offset && |
| @@ -2639,6 +2638,8 @@ static void nes_process_mac_intr(struct nes_device *nesdev, u32 mac_number) | |||
| 2639 | } | 2638 | } |
| 2640 | } | 2639 | } |
| 2641 | 2640 | ||
| 2641 | spin_unlock_irqrestore(&nesadapter->phy_lock, flags); | ||
| 2642 | |||
| 2642 | nesadapter->mac_sw_state[mac_number] = NES_MAC_SW_IDLE; | 2643 | nesadapter->mac_sw_state[mac_number] = NES_MAC_SW_IDLE; |
| 2643 | } | 2644 | } |
| 2644 | 2645 | ||
| @@ -3422,6 +3423,7 @@ static void nes_process_iwarp_aeqe(struct nes_device *nesdev, | |||
| 3422 | struct nes_adapter *nesadapter = nesdev->nesadapter; | 3423 | struct nes_adapter *nesadapter = nesdev->nesadapter; |
| 3423 | u32 aeq_info; | 3424 | u32 aeq_info; |
| 3424 | u32 next_iwarp_state = 0; | 3425 | u32 next_iwarp_state = 0; |
| 3426 | u32 aeqe_cq_id; | ||
| 3425 | u16 async_event_id; | 3427 | u16 async_event_id; |
| 3426 | u8 tcp_state; | 3428 | u8 tcp_state; |
| 3427 | u8 iwarp_state; | 3429 | u8 iwarp_state; |
| @@ -3449,6 +3451,14 @@ static void nes_process_iwarp_aeqe(struct nes_device *nesdev, | |||
| 3449 | le32_to_cpu(aeqe->aeqe_words[NES_AEQE_COMP_QP_CQ_ID_IDX]), aeqe, | 3451 | le32_to_cpu(aeqe->aeqe_words[NES_AEQE_COMP_QP_CQ_ID_IDX]), aeqe, |
| 3450 | nes_tcp_state_str[tcp_state], nes_iwarp_state_str[iwarp_state]); | 3452 | nes_tcp_state_str[tcp_state], nes_iwarp_state_str[iwarp_state]); |
| 3451 | 3453 | ||
| 3454 | aeqe_cq_id = le32_to_cpu(aeqe->aeqe_words[NES_AEQE_COMP_QP_CQ_ID_IDX]); | ||
| 3455 | if (aeq_info & NES_AEQE_QP) { | ||
| 3456 | if ((!nes_is_resource_allocated(nesadapter, nesadapter->allocated_qps, | ||
| 3457 | aeqe_cq_id)) || | ||
| 3458 | (atomic_read(&nesqp->close_timer_started))) | ||
| 3459 | return; | ||
| 3460 | } | ||
| 3461 | |||
| 3452 | switch (async_event_id) { | 3462 | switch (async_event_id) { |
| 3453 | case NES_AEQE_AEID_LLP_FIN_RECEIVED: | 3463 | case NES_AEQE_AEID_LLP_FIN_RECEIVED: |
| 3454 | if (nesqp->term_flags) | 3464 | if (nesqp->term_flags) |
diff --git a/drivers/infiniband/hw/nes/nes_nic.c b/drivers/infiniband/hw/nes/nes_nic.c index 9f4cadf9f851..242f42d8c1c6 100644 --- a/drivers/infiniband/hw/nes/nes_nic.c +++ b/drivers/infiniband/hw/nes/nes_nic.c | |||
| @@ -1002,6 +1002,7 @@ static int nes_netdev_change_mtu(struct net_device *netdev, int new_mtu) | |||
| 1002 | return ret; | 1002 | return ret; |
| 1003 | } | 1003 | } |
| 1004 | 1004 | ||
| 1005 | |||
| 1005 | static const char nes_ethtool_stringset[][ETH_GSTRING_LEN] = { | 1006 | static const char nes_ethtool_stringset[][ETH_GSTRING_LEN] = { |
| 1006 | "Link Change Interrupts", | 1007 | "Link Change Interrupts", |
| 1007 | "Linearized SKBs", | 1008 | "Linearized SKBs", |
| @@ -1016,11 +1017,15 @@ static const char nes_ethtool_stringset[][ETH_GSTRING_LEN] = { | |||
| 1016 | "Rx Jabber Errors", | 1017 | "Rx Jabber Errors", |
| 1017 | "Rx Oversized Frames", | 1018 | "Rx Oversized Frames", |
| 1018 | "Rx Short Frames", | 1019 | "Rx Short Frames", |
| 1020 | "Rx Length Errors", | ||
| 1021 | "Rx CRC Errors", | ||
| 1022 | "Rx Port Discard", | ||
| 1019 | "Endnode Rx Discards", | 1023 | "Endnode Rx Discards", |
| 1020 | "Endnode Rx Octets", | 1024 | "Endnode Rx Octets", |
| 1021 | "Endnode Rx Frames", | 1025 | "Endnode Rx Frames", |
| 1022 | "Endnode Tx Octets", | 1026 | "Endnode Tx Octets", |
| 1023 | "Endnode Tx Frames", | 1027 | "Endnode Tx Frames", |
| 1028 | "Tx Errors", | ||
| 1024 | "mh detected", | 1029 | "mh detected", |
| 1025 | "mh pauses", | 1030 | "mh pauses", |
| 1026 | "Retransmission Count", | 1031 | "Retransmission Count", |
| @@ -1049,19 +1054,13 @@ static const char nes_ethtool_stringset[][ETH_GSTRING_LEN] = { | |||
| 1049 | "CM Nodes Destroyed", | 1054 | "CM Nodes Destroyed", |
| 1050 | "CM Accel Drops", | 1055 | "CM Accel Drops", |
| 1051 | "CM Resets Received", | 1056 | "CM Resets Received", |
| 1057 | "Free 4Kpbls", | ||
| 1058 | "Free 256pbls", | ||
| 1052 | "Timer Inits", | 1059 | "Timer Inits", |
| 1053 | "CQ Depth 1", | ||
| 1054 | "CQ Depth 4", | ||
| 1055 | "CQ Depth 16", | ||
| 1056 | "CQ Depth 24", | ||
| 1057 | "CQ Depth 32", | ||
| 1058 | "CQ Depth 128", | ||
| 1059 | "CQ Depth 256", | ||
| 1060 | "LRO aggregated", | 1060 | "LRO aggregated", |
| 1061 | "LRO flushed", | 1061 | "LRO flushed", |
| 1062 | "LRO no_desc", | 1062 | "LRO no_desc", |
| 1063 | }; | 1063 | }; |
| 1064 | |||
| 1065 | #define NES_ETHTOOL_STAT_COUNT ARRAY_SIZE(nes_ethtool_stringset) | 1064 | #define NES_ETHTOOL_STAT_COUNT ARRAY_SIZE(nes_ethtool_stringset) |
| 1066 | 1065 | ||
| 1067 | /** | 1066 | /** |
| @@ -1121,12 +1120,14 @@ static void nes_netdev_get_strings(struct net_device *netdev, u32 stringset, | |||
| 1121 | /** | 1120 | /** |
| 1122 | * nes_netdev_get_ethtool_stats | 1121 | * nes_netdev_get_ethtool_stats |
| 1123 | */ | 1122 | */ |
| 1123 | |||
| 1124 | static void nes_netdev_get_ethtool_stats(struct net_device *netdev, | 1124 | static void nes_netdev_get_ethtool_stats(struct net_device *netdev, |
| 1125 | struct ethtool_stats *target_ethtool_stats, u64 *target_stat_values) | 1125 | struct ethtool_stats *target_ethtool_stats, u64 *target_stat_values) |
| 1126 | { | 1126 | { |
| 1127 | u64 u64temp; | 1127 | u64 u64temp; |
| 1128 | struct nes_vnic *nesvnic = netdev_priv(netdev); | 1128 | struct nes_vnic *nesvnic = netdev_priv(netdev); |
| 1129 | struct nes_device *nesdev = nesvnic->nesdev; | 1129 | struct nes_device *nesdev = nesvnic->nesdev; |
| 1130 | struct nes_adapter *nesadapter = nesdev->nesadapter; | ||
| 1130 | u32 nic_count; | 1131 | u32 nic_count; |
| 1131 | u32 u32temp; | 1132 | u32 u32temp; |
| 1132 | u32 index = 0; | 1133 | u32 index = 0; |
| @@ -1155,6 +1156,46 @@ static void nes_netdev_get_ethtool_stats(struct net_device *netdev, | |||
| 1155 | nesvnic->nesdev->port_tx_discards += u32temp; | 1156 | nesvnic->nesdev->port_tx_discards += u32temp; |
| 1156 | nesvnic->netstats.tx_dropped += u32temp; | 1157 | nesvnic->netstats.tx_dropped += u32temp; |
| 1157 | 1158 | ||
| 1159 | u32temp = nes_read_indexed(nesdev, | ||
| 1160 | NES_IDX_MAC_RX_SHORT_FRAMES + (nesvnic->nesdev->mac_index*0x200)); | ||
| 1161 | nesvnic->netstats.rx_dropped += u32temp; | ||
| 1162 | nesvnic->nesdev->mac_rx_errors += u32temp; | ||
| 1163 | nesvnic->nesdev->mac_rx_short_frames += u32temp; | ||
| 1164 | |||
| 1165 | u32temp = nes_read_indexed(nesdev, | ||
| 1166 | NES_IDX_MAC_RX_OVERSIZED_FRAMES + (nesvnic->nesdev->mac_index*0x200)); | ||
| 1167 | nesvnic->netstats.rx_dropped += u32temp; | ||
| 1168 | nesvnic->nesdev->mac_rx_errors += u32temp; | ||
| 1169 | nesvnic->nesdev->mac_rx_oversized_frames += u32temp; | ||
| 1170 | |||
| 1171 | u32temp = nes_read_indexed(nesdev, | ||
| 1172 | NES_IDX_MAC_RX_JABBER_FRAMES + (nesvnic->nesdev->mac_index*0x200)); | ||
| 1173 | nesvnic->netstats.rx_dropped += u32temp; | ||
| 1174 | nesvnic->nesdev->mac_rx_errors += u32temp; | ||
| 1175 | nesvnic->nesdev->mac_rx_jabber_frames += u32temp; | ||
| 1176 | |||
| 1177 | u32temp = nes_read_indexed(nesdev, | ||
| 1178 | NES_IDX_MAC_RX_SYMBOL_ERR_FRAMES + (nesvnic->nesdev->mac_index*0x200)); | ||
| 1179 | nesvnic->netstats.rx_dropped += u32temp; | ||
| 1180 | nesvnic->nesdev->mac_rx_errors += u32temp; | ||
| 1181 | nesvnic->nesdev->mac_rx_symbol_err_frames += u32temp; | ||
| 1182 | |||
| 1183 | u32temp = nes_read_indexed(nesdev, | ||
| 1184 | NES_IDX_MAC_RX_LENGTH_ERR_FRAMES + (nesvnic->nesdev->mac_index*0x200)); | ||
| 1185 | nesvnic->netstats.rx_length_errors += u32temp; | ||
| 1186 | nesvnic->nesdev->mac_rx_errors += u32temp; | ||
| 1187 | |||
| 1188 | u32temp = nes_read_indexed(nesdev, | ||
| 1189 | NES_IDX_MAC_RX_CRC_ERR_FRAMES + (nesvnic->nesdev->mac_index*0x200)); | ||
| 1190 | nesvnic->nesdev->mac_rx_errors += u32temp; | ||
| 1191 | nesvnic->nesdev->mac_rx_crc_errors += u32temp; | ||
| 1192 | nesvnic->netstats.rx_crc_errors += u32temp; | ||
| 1193 | |||
| 1194 | u32temp = nes_read_indexed(nesdev, | ||
| 1195 | NES_IDX_MAC_TX_ERRORS + (nesvnic->nesdev->mac_index*0x200)); | ||
| 1196 | nesvnic->nesdev->mac_tx_errors += u32temp; | ||
| 1197 | nesvnic->netstats.tx_errors += u32temp; | ||
| 1198 | |||
| 1158 | for (nic_count = 0; nic_count < NES_MAX_PORT_COUNT; nic_count++) { | 1199 | for (nic_count = 0; nic_count < NES_MAX_PORT_COUNT; nic_count++) { |
| 1159 | if (nesvnic->qp_nic_index[nic_count] == 0xf) | 1200 | if (nesvnic->qp_nic_index[nic_count] == 0xf) |
| 1160 | break; | 1201 | break; |
| @@ -1219,11 +1260,15 @@ static void nes_netdev_get_ethtool_stats(struct net_device *netdev, | |||
| 1219 | target_stat_values[++index] = nesvnic->nesdev->mac_rx_jabber_frames; | 1260 | target_stat_values[++index] = nesvnic->nesdev->mac_rx_jabber_frames; |
| 1220 | target_stat_values[++index] = nesvnic->nesdev->mac_rx_oversized_frames; | 1261 | target_stat_values[++index] = nesvnic->nesdev->mac_rx_oversized_frames; |
| 1221 | target_stat_values[++index] = nesvnic->nesdev->mac_rx_short_frames; | 1262 | target_stat_values[++index] = nesvnic->nesdev->mac_rx_short_frames; |
| 1263 | target_stat_values[++index] = nesvnic->netstats.rx_length_errors; | ||
| 1264 | target_stat_values[++index] = nesvnic->nesdev->mac_rx_crc_errors; | ||
| 1265 | target_stat_values[++index] = nesvnic->nesdev->port_rx_discards; | ||
| 1222 | target_stat_values[++index] = nesvnic->endnode_nstat_rx_discard; | 1266 | target_stat_values[++index] = nesvnic->endnode_nstat_rx_discard; |
| 1223 | target_stat_values[++index] = nesvnic->endnode_nstat_rx_octets; | 1267 | target_stat_values[++index] = nesvnic->endnode_nstat_rx_octets; |
| 1224 | target_stat_values[++index] = nesvnic->endnode_nstat_rx_frames; | 1268 | target_stat_values[++index] = nesvnic->endnode_nstat_rx_frames; |
| 1225 | target_stat_values[++index] = nesvnic->endnode_nstat_tx_octets; | 1269 | target_stat_values[++index] = nesvnic->endnode_nstat_tx_octets; |
| 1226 | target_stat_values[++index] = nesvnic->endnode_nstat_tx_frames; | 1270 | target_stat_values[++index] = nesvnic->endnode_nstat_tx_frames; |
| 1271 | target_stat_values[++index] = nesvnic->nesdev->mac_tx_errors; | ||
| 1227 | target_stat_values[++index] = mh_detected; | 1272 | target_stat_values[++index] = mh_detected; |
| 1228 | target_stat_values[++index] = mh_pauses_sent; | 1273 | target_stat_values[++index] = mh_pauses_sent; |
| 1229 | target_stat_values[++index] = nesvnic->endnode_ipv4_tcp_retransmits; | 1274 | target_stat_values[++index] = nesvnic->endnode_ipv4_tcp_retransmits; |
| @@ -1252,21 +1297,14 @@ static void nes_netdev_get_ethtool_stats(struct net_device *netdev, | |||
| 1252 | target_stat_values[++index] = atomic_read(&cm_nodes_destroyed); | 1297 | target_stat_values[++index] = atomic_read(&cm_nodes_destroyed); |
| 1253 | target_stat_values[++index] = atomic_read(&cm_accel_dropped_pkts); | 1298 | target_stat_values[++index] = atomic_read(&cm_accel_dropped_pkts); |
| 1254 | target_stat_values[++index] = atomic_read(&cm_resets_recvd); | 1299 | target_stat_values[++index] = atomic_read(&cm_resets_recvd); |
| 1300 | target_stat_values[++index] = nesadapter->free_4kpbl; | ||
| 1301 | target_stat_values[++index] = nesadapter->free_256pbl; | ||
| 1255 | target_stat_values[++index] = int_mod_timer_init; | 1302 | target_stat_values[++index] = int_mod_timer_init; |
| 1256 | target_stat_values[++index] = int_mod_cq_depth_1; | ||
| 1257 | target_stat_values[++index] = int_mod_cq_depth_4; | ||
| 1258 | target_stat_values[++index] = int_mod_cq_depth_16; | ||
| 1259 | target_stat_values[++index] = int_mod_cq_depth_24; | ||
| 1260 | target_stat_values[++index] = int_mod_cq_depth_32; | ||
| 1261 | target_stat_values[++index] = int_mod_cq_depth_128; | ||
| 1262 | target_stat_values[++index] = int_mod_cq_depth_256; | ||
| 1263 | target_stat_values[++index] = nesvnic->lro_mgr.stats.aggregated; | 1303 | target_stat_values[++index] = nesvnic->lro_mgr.stats.aggregated; |
| 1264 | target_stat_values[++index] = nesvnic->lro_mgr.stats.flushed; | 1304 | target_stat_values[++index] = nesvnic->lro_mgr.stats.flushed; |
| 1265 | target_stat_values[++index] = nesvnic->lro_mgr.stats.no_desc; | 1305 | target_stat_values[++index] = nesvnic->lro_mgr.stats.no_desc; |
| 1266 | |||
| 1267 | } | 1306 | } |
| 1268 | 1307 | ||
| 1269 | |||
| 1270 | /** | 1308 | /** |
| 1271 | * nes_netdev_get_drvinfo | 1309 | * nes_netdev_get_drvinfo |
| 1272 | */ | 1310 | */ |
diff --git a/drivers/net/mlx4/icm.c b/drivers/net/mlx4/icm.c index 57288ca1395f..b07e4dee80aa 100644 --- a/drivers/net/mlx4/icm.c +++ b/drivers/net/mlx4/icm.c | |||
| @@ -163,28 +163,30 @@ struct mlx4_icm *mlx4_alloc_icm(struct mlx4_dev *dev, int npages, | |||
| 163 | ret = mlx4_alloc_icm_pages(&chunk->mem[chunk->npages], | 163 | ret = mlx4_alloc_icm_pages(&chunk->mem[chunk->npages], |
| 164 | cur_order, gfp_mask); | 164 | cur_order, gfp_mask); |
| 165 | 165 | ||
| 166 | if (!ret) { | 166 | if (ret) { |
| 167 | ++chunk->npages; | 167 | if (--cur_order < 0) |
| 168 | 168 | goto fail; | |
| 169 | if (coherent) | 169 | else |
| 170 | ++chunk->nsg; | 170 | continue; |
| 171 | else if (chunk->npages == MLX4_ICM_CHUNK_LEN) { | 171 | } |
| 172 | chunk->nsg = pci_map_sg(dev->pdev, chunk->mem, | ||
| 173 | chunk->npages, | ||
| 174 | PCI_DMA_BIDIRECTIONAL); | ||
| 175 | 172 | ||
| 176 | if (chunk->nsg <= 0) | 173 | ++chunk->npages; |
| 177 | goto fail; | ||
| 178 | 174 | ||
| 179 | chunk = NULL; | 175 | if (coherent) |
| 180 | } | 176 | ++chunk->nsg; |
| 177 | else if (chunk->npages == MLX4_ICM_CHUNK_LEN) { | ||
| 178 | chunk->nsg = pci_map_sg(dev->pdev, chunk->mem, | ||
| 179 | chunk->npages, | ||
| 180 | PCI_DMA_BIDIRECTIONAL); | ||
| 181 | 181 | ||
| 182 | npages -= 1 << cur_order; | 182 | if (chunk->nsg <= 0) |
| 183 | } else { | ||
| 184 | --cur_order; | ||
| 185 | if (cur_order < 0) | ||
| 186 | goto fail; | 183 | goto fail; |
| 187 | } | 184 | } |
| 185 | |||
| 186 | if (chunk->npages == MLX4_ICM_CHUNK_LEN) | ||
| 187 | chunk = NULL; | ||
| 188 | |||
| 189 | npages -= 1 << cur_order; | ||
| 188 | } | 190 | } |
| 189 | 191 | ||
| 190 | if (!coherent && chunk) { | 192 | if (!coherent && chunk) { |
