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-rw-r--r--arch/arm/mach-ixp4xx/Kconfig10
-rw-r--r--arch/arm/mach-ixp4xx/Makefile1
-rw-r--r--arch/arm/mach-ixp4xx/nslu2-pci.c77
-rw-r--r--arch/arm/mach-ixp4xx/nslu2-power.c92
-rw-r--r--arch/arm/mach-ixp4xx/nslu2-setup.c134
-rw-r--r--include/asm-arm/arch-ixp4xx/hardware.h1
-rw-r--r--include/asm-arm/arch-ixp4xx/irqs.h7
-rw-r--r--include/asm-arm/arch-ixp4xx/nslu2.h96
8 files changed, 418 insertions, 0 deletions
diff --git a/arch/arm/mach-ixp4xx/Kconfig b/arch/arm/mach-ixp4xx/Kconfig
index 89762a26495c..385285851cb5 100644
--- a/arch/arm/mach-ixp4xx/Kconfig
+++ b/arch/arm/mach-ixp4xx/Kconfig
@@ -8,6 +8,16 @@ menu "Intel IXP4xx Implementation Options"
8 8
9comment "IXP4xx Platforms" 9comment "IXP4xx Platforms"
10 10
11# This entry is placed on top because otherwise it would have
12# been shown as a submenu.
13config MACH_NSLU2
14 bool
15 prompt "NSLU2" if !(MACH_IXDP465 || MACH_IXDPG425 || ARCH_IXDP425 || ARCH_ADI_COYOTE || ARCH_AVILA || ARCH_IXCDP1100 || ARCH_PRPMC1100 || MACH_GTWX5715)
16 help
17 Say 'Y' here if you want your kernel to support Linksys's
18 NSLU2 NAS device. For more information on this platform,
19 see http://www.nslu2-linux.org
20
11config ARCH_AVILA 21config ARCH_AVILA
12 bool "Avila" 22 bool "Avila"
13 help 23 help
diff --git a/arch/arm/mach-ixp4xx/Makefile b/arch/arm/mach-ixp4xx/Makefile
index ddecbda4a633..7a15629c18d0 100644
--- a/arch/arm/mach-ixp4xx/Makefile
+++ b/arch/arm/mach-ixp4xx/Makefile
@@ -8,4 +8,5 @@ obj-$(CONFIG_ARCH_IXDP4XX) += ixdp425-pci.o ixdp425-setup.o
8obj-$(CONFIG_MACH_IXDPG425) += ixdpg425-pci.o coyote-setup.o 8obj-$(CONFIG_MACH_IXDPG425) += ixdpg425-pci.o coyote-setup.o
9obj-$(CONFIG_ARCH_ADI_COYOTE) += coyote-pci.o coyote-setup.o 9obj-$(CONFIG_ARCH_ADI_COYOTE) += coyote-pci.o coyote-setup.o
10obj-$(CONFIG_MACH_GTWX5715) += gtwx5715-pci.o gtwx5715-setup.o 10obj-$(CONFIG_MACH_GTWX5715) += gtwx5715-pci.o gtwx5715-setup.o
11obj-$(CONFIG_MACH_NSLU2) += nslu2-pci.o nslu2-setup.o nslu2-power.o
11 12
diff --git a/arch/arm/mach-ixp4xx/nslu2-pci.c b/arch/arm/mach-ixp4xx/nslu2-pci.c
new file mode 100644
index 000000000000..a575f2e0b2c8
--- /dev/null
+++ b/arch/arm/mach-ixp4xx/nslu2-pci.c
@@ -0,0 +1,77 @@
1/*
2 * arch/arm/mach-ixp4xx/nslu2-pci.c
3 *
4 * NSLU2 board-level PCI initialization
5 *
6 * based on ixdp425-pci.c:
7 * Copyright (C) 2002 Intel Corporation.
8 * Copyright (C) 2003-2004 MontaVista Software, Inc.
9 *
10 * Maintainer: http://www.nslu2-linux.org/
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License version 2 as
14 * published by the Free Software Foundation.
15 *
16 */
17
18#include <linux/config.h>
19#include <linux/pci.h>
20#include <linux/init.h>
21
22#include <asm/mach/pci.h>
23#include <asm/mach-types.h>
24
25void __init nslu2_pci_preinit(void)
26{
27 set_irq_type(IRQ_NSLU2_PCI_INTA, IRQT_LOW);
28 set_irq_type(IRQ_NSLU2_PCI_INTB, IRQT_LOW);
29 set_irq_type(IRQ_NSLU2_PCI_INTC, IRQT_LOW);
30
31 gpio_line_isr_clear(NSLU2_PCI_INTA_PIN);
32 gpio_line_isr_clear(NSLU2_PCI_INTB_PIN);
33 gpio_line_isr_clear(NSLU2_PCI_INTC_PIN);
34
35 /* INTD is not configured as GPIO is used
36 * for the power input button.
37 */
38
39 ixp4xx_pci_preinit();
40}
41
42static int __init nslu2_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
43{
44 static int pci_irq_table[NSLU2_PCI_IRQ_LINES] = {
45 IRQ_NSLU2_PCI_INTA,
46 IRQ_NSLU2_PCI_INTB,
47 IRQ_NSLU2_PCI_INTC,
48 };
49
50 int irq = -1;
51
52 if (slot >= 1 && slot <= NSLU2_PCI_MAX_DEV &&
53 pin >= 1 && pin <= NSLU2_PCI_IRQ_LINES) {
54 irq = pci_irq_table[(slot + pin - 2) % NSLU2_PCI_IRQ_LINES];
55 }
56
57 return irq;
58}
59
60struct hw_pci __initdata nslu2_pci = {
61 .nr_controllers = 1,
62 .preinit = nslu2_pci_preinit,
63 .swizzle = pci_std_swizzle,
64 .setup = ixp4xx_setup,
65 .scan = ixp4xx_scan_bus,
66 .map_irq = nslu2_map_irq,
67};
68
69int __init nslu2_pci_init(void) /* monkey see, monkey do */
70{
71 if (machine_is_nslu2())
72 pci_common_init(&nslu2_pci);
73
74 return 0;
75}
76
77subsys_initcall(nslu2_pci_init);
diff --git a/arch/arm/mach-ixp4xx/nslu2-power.c b/arch/arm/mach-ixp4xx/nslu2-power.c
new file mode 100644
index 000000000000..18fbc8c0fb30
--- /dev/null
+++ b/arch/arm/mach-ixp4xx/nslu2-power.c
@@ -0,0 +1,92 @@
1/*
2 * arch/arm/mach-ixp4xx/nslu2-power.c
3 *
4 * NSLU2 Power/Reset driver
5 *
6 * Copyright (C) 2005 Tower Technologies
7 *
8 * based on nslu2-io.c
9 * Copyright (C) 2004 Karen Spearel
10 *
11 * Author: Alessandro Zummo <a.zummo@towertech.it>
12 * Maintainers: http://www.nslu2-linux.org/
13 *
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License version 2 as
16 * published by the Free Software Foundation.
17 *
18 */
19
20#include <linux/module.h>
21#include <linux/reboot.h>
22#include <linux/interrupt.h>
23
24#include <asm/mach-types.h>
25
26extern void ctrl_alt_del(void);
27
28static irqreturn_t nslu2_power_handler(int irq, void *dev_id, struct pt_regs *regs)
29{
30 /* Signal init to do the ctrlaltdel action, this will bypass init if
31 * it hasn't started and do a kernel_restart.
32 */
33 ctrl_alt_del();
34
35 return IRQ_HANDLED;
36}
37
38static irqreturn_t nslu2_reset_handler(int irq, void *dev_id, struct pt_regs *regs)
39{
40 /* This is the paper-clip reset, it shuts the machine down directly.
41 */
42 machine_power_off();
43
44 return IRQ_HANDLED;
45}
46
47static int __init nslu2_power_init(void)
48{
49 if (!(machine_is_nslu2()))
50 return 0;
51
52 *IXP4XX_GPIO_GPISR = 0x20400000; /* read the 2 irqs to clr */
53
54 set_irq_type(NSLU2_RB_IRQ, IRQT_LOW);
55 set_irq_type(NSLU2_PB_IRQ, IRQT_HIGH);
56
57 gpio_line_isr_clear(NSLU2_RB_GPIO);
58 gpio_line_isr_clear(NSLU2_PB_GPIO);
59
60 if (request_irq(NSLU2_RB_IRQ, &nslu2_reset_handler,
61 SA_INTERRUPT, "NSLU2 reset button", NULL) < 0) {
62
63 printk(KERN_DEBUG "Reset Button IRQ %d not available\n",
64 NSLU2_RB_IRQ);
65
66 return -EIO;
67 }
68
69 if (request_irq(NSLU2_PB_IRQ, &nslu2_power_handler,
70 SA_INTERRUPT, "NSLU2 power button", NULL) < 0) {
71
72 printk(KERN_DEBUG "Power Button IRQ %d not available\n",
73 NSLU2_PB_IRQ);
74
75 return -EIO;
76 }
77
78 return 0;
79}
80
81static void __exit nslu2_power_exit(void)
82{
83 free_irq(NSLU2_RB_IRQ, NULL);
84 free_irq(NSLU2_PB_IRQ, NULL);
85}
86
87module_init(nslu2_power_init);
88module_exit(nslu2_power_exit);
89
90MODULE_AUTHOR("Alessandro Zummo <a.zummo@towertech.it>");
91MODULE_DESCRIPTION("NSLU2 Power/Reset driver");
92MODULE_LICENSE("GPL");
diff --git a/arch/arm/mach-ixp4xx/nslu2-setup.c b/arch/arm/mach-ixp4xx/nslu2-setup.c
new file mode 100644
index 000000000000..289e94cb65c2
--- /dev/null
+++ b/arch/arm/mach-ixp4xx/nslu2-setup.c
@@ -0,0 +1,134 @@
1/*
2 * arch/arm/mach-ixp4xx/nslu2-setup.c
3 *
4 * NSLU2 board-setup
5 *
6 * based ixdp425-setup.c:
7 * Copyright (C) 2003-2004 MontaVista Software, Inc.
8 *
9 * Author: Mark Rakes <mrakes at mac.com>
10 * Maintainers: http://www.nslu2-linux.org/
11 *
12 * Fixed missing init_time in MACHINE_START kas11 10/22/04
13 * Changed to conform to new style __init ixdp425 kas11 10/22/04
14 */
15
16#include <linux/kernel.h>
17#include <linux/serial.h>
18#include <linux/serial_8250.h>
19
20#include <asm/mach-types.h>
21#include <asm/mach/arch.h>
22#include <asm/mach/flash.h>
23
24static struct flash_platform_data nslu2_flash_data = {
25 .map_name = "cfi_probe",
26 .width = 2,
27};
28
29static struct resource nslu2_flash_resource = {
30 .start = NSLU2_FLASH_BASE,
31 .end = NSLU2_FLASH_BASE + NSLU2_FLASH_SIZE,
32 .flags = IORESOURCE_MEM,
33};
34
35static struct platform_device nslu2_flash = {
36 .name = "IXP4XX-Flash",
37 .id = 0,
38 .dev.platform_data = &nslu2_flash_data,
39 .num_resources = 1,
40 .resource = &nslu2_flash_resource,
41};
42
43static struct ixp4xx_i2c_pins nslu2_i2c_gpio_pins = {
44 .sda_pin = NSLU2_SDA_PIN,
45 .scl_pin = NSLU2_SCL_PIN,
46};
47
48static struct platform_device nslu2_i2c_controller = {
49 .name = "IXP4XX-I2C",
50 .id = 0,
51 .dev.platform_data = &nslu2_i2c_gpio_pins,
52 .num_resources = 0,
53};
54
55static struct resource nslu2_uart_resources[] = {
56 {
57 .start = IXP4XX_UART1_BASE_PHYS,
58 .end = IXP4XX_UART1_BASE_PHYS + 0x0fff,
59 .flags = IORESOURCE_MEM,
60 },
61 {
62 .start = IXP4XX_UART2_BASE_PHYS,
63 .end = IXP4XX_UART2_BASE_PHYS + 0x0fff,
64 .flags = IORESOURCE_MEM,
65 }
66};
67
68static struct plat_serial8250_port nslu2_uart_data[] = {
69 {
70 .mapbase = IXP4XX_UART1_BASE_PHYS,
71 .membase = (char *)IXP4XX_UART1_BASE_VIRT + REG_OFFSET,
72 .irq = IRQ_IXP4XX_UART1,
73 .flags = UPF_BOOT_AUTOCONF,
74 .iotype = UPIO_MEM,
75 .regshift = 2,
76 .uartclk = IXP4XX_UART_XTAL,
77 },
78 {
79 .mapbase = IXP4XX_UART2_BASE_PHYS,
80 .membase = (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET,
81 .irq = IRQ_IXP4XX_UART2,
82 .flags = UPF_BOOT_AUTOCONF,
83 .iotype = UPIO_MEM,
84 .regshift = 2,
85 .uartclk = IXP4XX_UART_XTAL,
86 },
87 { }
88};
89
90static struct platform_device nslu2_uart = {
91 .name = "serial8250",
92 .id = PLAT8250_DEV_PLATFORM,
93 .dev.platform_data = nslu2_uart_data,
94 .num_resources = 2,
95 .resource = nslu2_uart_resources,
96};
97
98static struct platform_device *nslu2_devices[] __initdata = {
99 &nslu2_i2c_controller,
100 &nslu2_flash,
101 &nslu2_uart,
102};
103
104static void nslu2_power_off(void)
105{
106 /* This causes the box to drop the power and go dead. */
107
108 /* enable the pwr cntl gpio */
109 gpio_line_config(NSLU2_PO_GPIO, IXP4XX_GPIO_OUT);
110
111 /* do the deed */
112 gpio_line_set(NSLU2_PO_GPIO, IXP4XX_GPIO_HIGH);
113}
114
115static void __init nslu2_init(void)
116{
117 ixp4xx_sys_init();
118
119 pm_power_off = nslu2_power_off;
120
121 platform_add_devices(nslu2_devices, ARRAY_SIZE(nslu2_devices));
122}
123
124MACHINE_START(NSLU2, "Linksys NSLU2")
125 /* Maintainer: www.nslu2-linux.org */
126 .phys_ram = PHYS_OFFSET,
127 .phys_io = IXP4XX_PERIPHERAL_BASE_PHYS,
128 .io_pg_offst = ((IXP4XX_PERIPHERAL_BASE_VIRT) >> 18) & 0xFFFC,
129 .boot_params = 0x00000100,
130 .map_io = ixp4xx_map_io,
131 .init_irq = ixp4xx_init_irq,
132 .timer = &ixp4xx_timer,
133 .init_machine = nslu2_init,
134MACHINE_END
diff --git a/include/asm-arm/arch-ixp4xx/hardware.h b/include/asm-arm/arch-ixp4xx/hardware.h
index 55d85eea8c1a..cfb413c845f7 100644
--- a/include/asm-arm/arch-ixp4xx/hardware.h
+++ b/include/asm-arm/arch-ixp4xx/hardware.h
@@ -44,5 +44,6 @@ extern unsigned int processor_id;
44#include "ixdp425.h" 44#include "ixdp425.h"
45#include "coyote.h" 45#include "coyote.h"
46#include "prpmc1100.h" 46#include "prpmc1100.h"
47#include "nslu2.h"
47 48
48#endif /* _ASM_ARCH_HARDWARE_H */ 49#endif /* _ASM_ARCH_HARDWARE_H */
diff --git a/include/asm-arm/arch-ixp4xx/irqs.h b/include/asm-arm/arch-ixp4xx/irqs.h
index ca808281c7f9..2cf4930372bc 100644
--- a/include/asm-arm/arch-ixp4xx/irqs.h
+++ b/include/asm-arm/arch-ixp4xx/irqs.h
@@ -93,4 +93,11 @@
93#define IRQ_COYOTE_PCI_SLOT1 IRQ_IXP4XX_GPIO11 93#define IRQ_COYOTE_PCI_SLOT1 IRQ_IXP4XX_GPIO11
94#define IRQ_COYOTE_IDE IRQ_IXP4XX_GPIO5 94#define IRQ_COYOTE_IDE IRQ_IXP4XX_GPIO5
95 95
96/*
97 * NSLU2 board IRQs
98 */
99#define IRQ_NSLU2_PCI_INTA IRQ_IXP4XX_GPIO11
100#define IRQ_NSLU2_PCI_INTB IRQ_IXP4XX_GPIO10
101#define IRQ_NSLU2_PCI_INTC IRQ_IXP4XX_GPIO9
102
96#endif 103#endif
diff --git a/include/asm-arm/arch-ixp4xx/nslu2.h b/include/asm-arm/arch-ixp4xx/nslu2.h
new file mode 100644
index 000000000000..b8b347a559c7
--- /dev/null
+++ b/include/asm-arm/arch-ixp4xx/nslu2.h
@@ -0,0 +1,96 @@
1/*
2 * include/asm-arm/arch-ixp4xx/nslu2.h
3 *
4 * NSLU2 platform specific definitions
5 *
6 * Author: Mark Rakes <mrakes AT mac.com>
7 * Maintainers: http://www.nslu2-linux.org
8 *
9 * based on ixdp425.h:
10 * Copyright 2004 (c) MontaVista, Software, Inc.
11 *
12 * This file is licensed under the terms of the GNU General Public
13 * License version 2. This program is licensed "as is" without any
14 * warranty of any kind, whether express or implied.
15 */
16
17#ifndef __ASM_ARCH_HARDWARE_H__
18#error "Do not include this directly, instead #include <asm/hardware.h>"
19#endif
20
21#define NSLU2_FLASH_BASE IXP4XX_EXP_BUS_CS0_BASE_PHYS
22#define NSLU2_FLASH_SIZE IXP4XX_EXP_BUS_CSX_REGION_SIZE
23
24#define NSLU2_SDA_PIN 7
25#define NSLU2_SCL_PIN 6
26
27/*
28 * NSLU2 PCI IRQs
29 */
30#define NSLU2_PCI_MAX_DEV 3
31#define NSLU2_PCI_IRQ_LINES 3
32
33
34/* PCI controller GPIO to IRQ pin mappings */
35#define NSLU2_PCI_INTA_PIN 11
36#define NSLU2_PCI_INTB_PIN 10
37#define NSLU2_PCI_INTC_PIN 9
38#define NSLU2_PCI_INTD_PIN 8
39
40
41/* NSLU2 Timer */
42#define NSLU2_FREQ 66000000
43#define NSLU2_CLOCK_TICK_RATE (((NSLU2_FREQ / HZ & ~IXP4XX_OST_RELOAD_MASK) + 1) * HZ)
44#define NSLU2_CLOCK_TICKS_PER_USEC ((NSLU2_CLOCK_TICK_RATE + USEC_PER_SEC/2) / USEC_PER_SEC)
45
46/* GPIO */
47
48#define NSLU2_GPIO0 0
49#define NSLU2_GPIO1 1
50#define NSLU2_GPIO2 2
51#define NSLU2_GPIO3 3
52#define NSLU2_GPIO4 4
53#define NSLU2_GPIO5 5
54#define NSLU2_GPIO6 6
55#define NSLU2_GPIO7 7
56#define NSLU2_GPIO8 8
57#define NSLU2_GPIO9 9
58#define NSLU2_GPIO10 10
59#define NSLU2_GPIO11 11
60#define NSLU2_GPIO12 12
61#define NSLU2_GPIO13 13
62#define NSLU2_GPIO14 14
63#define NSLU2_GPIO15 15
64
65/* Buttons */
66
67#define NSLU2_PB_GPIO NSLU2_GPIO5
68#define NSLU2_PO_GPIO NSLU2_GPIO8 /* power off */
69#define NSLU2_RB_GPIO NSLU2_GPIO12
70
71#define NSLU2_PB_IRQ IRQ_IXP4XX_GPIO5
72#define NSLU2_RB_IRQ IRQ_IXP4XX_GPIO12
73
74#define NSLU2_PB_BM (1L << NSLU2_PB_GPIO)
75#define NSLU2_PO_BM (1L << NSLU2_PO_GPIO)
76#define NSLU2_RB_BM (1L << NSLU2_RB_GPIO)
77
78/* Buzzer */
79
80#define NSLU2_GPIO_BUZZ 4
81#define NSLU2_BZ_BM (1L << NSLU2_GPIO_BUZZ)
82/* LEDs */
83
84#define NSLU2_LED_RED NSLU2_GPIO0
85#define NSLU2_LED_GRN NSLU2_GPIO1
86
87#define NSLU2_LED_RED_BM (1L << NSLU2_LED_RED)
88#define NSLU2_LED_GRN_BM (1L << NSLU2_LED_GRN)
89
90#define NSLU2_LED_DISK1 NSLU2_GPIO2
91#define NSLU2_LED_DISK2 NSLU2_GPIO3
92
93#define NSLU2_LED_DISK1_BM (1L << NSLU2_GPIO2)
94#define NSLU2_LED_DISK2_BM (1L << NSLU2_GPIO3)
95
96
generated by cgit v1.2.2 (git 2.25.0) at 2025-12-01 11:43:26 -0500