diff options
| -rw-r--r-- | arch/x86/include/asm/mrst.h | 7 | ||||
| -rw-r--r-- | arch/x86/kernel/mrst.c | 17 |
2 files changed, 12 insertions, 12 deletions
diff --git a/arch/x86/include/asm/mrst.h b/arch/x86/include/asm/mrst.h index 67ad31545778..1869c18d15ca 100644 --- a/arch/x86/include/asm/mrst.h +++ b/arch/x86/include/asm/mrst.h | |||
| @@ -11,7 +11,6 @@ | |||
| 11 | #ifndef _ASM_X86_MRST_H | 11 | #ifndef _ASM_X86_MRST_H |
| 12 | #define _ASM_X86_MRST_H | 12 | #define _ASM_X86_MRST_H |
| 13 | extern int pci_mrst_init(void); | 13 | extern int pci_mrst_init(void); |
| 14 | extern int mrst_identify_cpu(void); | ||
| 15 | extern int mrst_timer_options __cpuinitdata; | 14 | extern int mrst_timer_options __cpuinitdata; |
| 16 | int __init sfi_parse_mrtc(struct sfi_table_header *table); | 15 | int __init sfi_parse_mrtc(struct sfi_table_header *table); |
| 17 | 16 | ||
| @@ -27,6 +26,12 @@ enum mrst_cpu_type { | |||
| 27 | MRST_CPU_CHIP_PENWELL, | 26 | MRST_CPU_CHIP_PENWELL, |
| 28 | }; | 27 | }; |
| 29 | 28 | ||
| 29 | extern enum mrst_cpu_type __mrst_cpu_chip; | ||
| 30 | static enum mrst_cpu_type mrst_identify_cpu(void) | ||
| 31 | { | ||
| 32 | return __mrst_cpu_chip; | ||
| 33 | } | ||
| 34 | |||
| 30 | enum mrst_timer_options { | 35 | enum mrst_timer_options { |
| 31 | MRST_TIMER_DEFAULT, | 36 | MRST_TIMER_DEFAULT, |
| 32 | MRST_TIMER_APBT_ONLY, | 37 | MRST_TIMER_APBT_ONLY, |
diff --git a/arch/x86/kernel/mrst.c b/arch/x86/kernel/mrst.c index 636b53bd4198..967f2686adb0 100644 --- a/arch/x86/kernel/mrst.c +++ b/arch/x86/kernel/mrst.c | |||
| @@ -50,7 +50,8 @@ int mrst_timer_options __cpuinitdata; | |||
| 50 | 50 | ||
| 51 | static u32 sfi_mtimer_usage[SFI_MTMR_MAX_NUM]; | 51 | static u32 sfi_mtimer_usage[SFI_MTMR_MAX_NUM]; |
| 52 | static struct sfi_timer_table_entry sfi_mtimer_array[SFI_MTMR_MAX_NUM]; | 52 | static struct sfi_timer_table_entry sfi_mtimer_array[SFI_MTMR_MAX_NUM]; |
| 53 | static int mrst_cpu_chip; | 53 | enum mrst_cpu_type __mrst_cpu_chip; |
| 54 | EXPORT_SYMBOL_GPL(__mrst_cpu_chip); | ||
| 54 | 55 | ||
| 55 | int sfi_mtimer_num; | 56 | int sfi_mtimer_num; |
| 56 | 57 | ||
| @@ -233,25 +234,19 @@ void __init mrst_rtc_init(void) | |||
| 233 | sfi_table_parse(SFI_SIG_MRTC, NULL, NULL, sfi_parse_mrtc); | 234 | sfi_table_parse(SFI_SIG_MRTC, NULL, NULL, sfi_parse_mrtc); |
| 234 | } | 235 | } |
| 235 | 236 | ||
| 236 | int mrst_identify_cpu(void) | ||
| 237 | { | ||
| 238 | return mrst_cpu_chip; | ||
| 239 | } | ||
| 240 | EXPORT_SYMBOL_GPL(mrst_identify_cpu); | ||
| 241 | |||
| 242 | void __cpuinit mrst_arch_setup(void) | 237 | void __cpuinit mrst_arch_setup(void) |
| 243 | { | 238 | { |
| 244 | if (boot_cpu_data.x86 == 6 && boot_cpu_data.x86_model == 0x27) | 239 | if (boot_cpu_data.x86 == 6 && boot_cpu_data.x86_model == 0x27) |
| 245 | mrst_cpu_chip = MRST_CPU_CHIP_PENWELL; | 240 | __mrst_cpu_chip = MRST_CPU_CHIP_PENWELL; |
| 246 | else if (boot_cpu_data.x86 == 6 && boot_cpu_data.x86_model == 0x26) | 241 | else if (boot_cpu_data.x86 == 6 && boot_cpu_data.x86_model == 0x26) |
| 247 | mrst_cpu_chip = MRST_CPU_CHIP_LINCROFT; | 242 | __mrst_cpu_chip = MRST_CPU_CHIP_LINCROFT; |
| 248 | else { | 243 | else { |
| 249 | pr_err("Unknown Moorestown CPU (%d:%d), default to Lincroft\n", | 244 | pr_err("Unknown Moorestown CPU (%d:%d), default to Lincroft\n", |
| 250 | boot_cpu_data.x86, boot_cpu_data.x86_model); | 245 | boot_cpu_data.x86, boot_cpu_data.x86_model); |
| 251 | mrst_cpu_chip = MRST_CPU_CHIP_LINCROFT; | 246 | __mrst_cpu_chip = MRST_CPU_CHIP_LINCROFT; |
| 252 | } | 247 | } |
| 253 | pr_debug("Moorestown CPU %s identified\n", | 248 | pr_debug("Moorestown CPU %s identified\n", |
| 254 | (mrst_cpu_chip == MRST_CPU_CHIP_LINCROFT) ? | 249 | (__mrst_cpu_chip == MRST_CPU_CHIP_LINCROFT) ? |
| 255 | "Lincroft" : "Penwell"); | 250 | "Lincroft" : "Penwell"); |
| 256 | } | 251 | } |
| 257 | 252 | ||
