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-rw-r--r--arch/powerpc/platforms/powermac/low_i2c.c318
-rw-r--r--arch/powerpc/platforms/powermac/setup.c18
-rw-r--r--drivers/i2c/busses/Kconfig24
-rw-r--r--drivers/i2c/busses/Makefile3
-rw-r--r--drivers/i2c/busses/i2c-keywest.c754
-rw-r--r--drivers/i2c/busses/i2c-keywest.h108
-rw-r--r--drivers/i2c/busses/i2c-pmac-smu.c324
-rw-r--r--drivers/i2c/busses/i2c-powermac.c290
-rw-r--r--drivers/macintosh/Kconfig10
-rw-r--r--drivers/macintosh/smu.c26
-rw-r--r--drivers/macintosh/windfarm_lm75_sensor.c50
-rw-r--r--include/asm-powerpc/pmac_low_i2c.h2
12 files changed, 563 insertions, 1364 deletions
diff --git a/arch/powerpc/platforms/powermac/low_i2c.c b/arch/powerpc/platforms/powermac/low_i2c.c
index f31d6a678b9e..a25e447f907f 100644
--- a/arch/powerpc/platforms/powermac/low_i2c.c
+++ b/arch/powerpc/platforms/powermac/low_i2c.c
@@ -39,6 +39,10 @@
39#include <linux/pmu.h> 39#include <linux/pmu.h>
40#include <linux/delay.h> 40#include <linux/delay.h>
41#include <linux/completion.h> 41#include <linux/completion.h>
42#include <linux/platform_device.h>
43#include <linux/interrupt.h>
44#include <linux/completion.h>
45#include <linux/timer.h>
42#include <asm/keylargo.h> 46#include <asm/keylargo.h>
43#include <asm/uninorth.h> 47#include <asm/uninorth.h>
44#include <asm/io.h> 48#include <asm/io.h>
@@ -63,6 +67,9 @@
63#define DBG_LOW(x...) 67#define DBG_LOW(x...)
64#endif 68#endif
65 69
70
71static int pmac_i2c_force_poll = 1;
72
66/* 73/*
67 * A bus structure. Each bus in the system has such a structure associated. 74 * A bus structure. Each bus in the system has such a structure associated.
68 */ 75 */
@@ -80,6 +87,7 @@ struct pmac_i2c_bus
80 struct semaphore sem; 87 struct semaphore sem;
81 int opened; 88 int opened;
82 int polled; /* open mode */ 89 int polled; /* open mode */
90 struct platform_device *platform_dev;
83 91
84 /* ops */ 92 /* ops */
85 int (*open)(struct pmac_i2c_bus *bus); 93 int (*open)(struct pmac_i2c_bus *bus);
@@ -101,6 +109,16 @@ struct pmac_i2c_host_kw
101 void __iomem *base; /* register base address */ 109 void __iomem *base; /* register base address */
102 int bsteps; /* register stepping */ 110 int bsteps; /* register stepping */
103 int speed; /* speed */ 111 int speed; /* speed */
112 int irq;
113 u8 *data;
114 unsigned len;
115 int state;
116 int rw;
117 int polled;
118 int result;
119 struct completion complete;
120 spinlock_t lock;
121 struct timer_list timeout_timer;
104}; 122};
105 123
106/* Register indices */ 124/* Register indices */
@@ -115,6 +133,8 @@ typedef enum {
115 reg_data 133 reg_data
116} reg_t; 134} reg_t;
117 135
136/* The Tumbler audio equalizer can be really slow sometimes */
137#define KW_POLL_TIMEOUT (2*HZ)
118 138
119/* Mode register */ 139/* Mode register */
120#define KW_I2C_MODE_100KHZ 0x00 140#define KW_I2C_MODE_100KHZ 0x00
@@ -158,8 +178,9 @@ enum {
158}; 178};
159 179
160#define WRONG_STATE(name) do {\ 180#define WRONG_STATE(name) do {\
161 printk(KERN_DEBUG "KW: wrong state. Got %s, state: %s (isr: %02x)\n", \ 181 printk(KERN_DEBUG "KW: wrong state. Got %s, state: %s " \
162 name, __kw_state_names[state], isr); \ 182 "(isr: %02x)\n", \
183 name, __kw_state_names[host->state], isr); \
163 } while(0) 184 } while(0)
164 185
165static const char *__kw_state_names[] = { 186static const char *__kw_state_names[] = {
@@ -171,23 +192,22 @@ static const char *__kw_state_names[] = {
171 "state_dead" 192 "state_dead"
172}; 193};
173 194
174static inline u8 __kw_read_reg(struct pmac_i2c_bus *bus, reg_t reg) 195static inline u8 __kw_read_reg(struct pmac_i2c_host_kw *host, reg_t reg)
175{ 196{
176 struct pmac_i2c_host_kw *host = bus->hostdata;
177 return readb(host->base + (((unsigned int)reg) << host->bsteps)); 197 return readb(host->base + (((unsigned int)reg) << host->bsteps));
178} 198}
179 199
180static inline void __kw_write_reg(struct pmac_i2c_bus *bus, reg_t reg, u8 val) 200static inline void __kw_write_reg(struct pmac_i2c_host_kw *host,
201 reg_t reg, u8 val)
181{ 202{
182 struct pmac_i2c_host_kw *host = bus->hostdata;
183 writeb(val, host->base + (((unsigned)reg) << host->bsteps)); 203 writeb(val, host->base + (((unsigned)reg) << host->bsteps));
184 (void)__kw_read_reg(bus, reg_subaddr); 204 (void)__kw_read_reg(host, reg_subaddr);
185} 205}
186 206
187#define kw_write_reg(reg, val) __kw_write_reg(bus, reg, val) 207#define kw_write_reg(reg, val) __kw_write_reg(host, reg, val)
188#define kw_read_reg(reg) __kw_read_reg(bus, reg) 208#define kw_read_reg(reg) __kw_read_reg(host, reg)
189 209
190static u8 kw_i2c_wait_interrupt(struct pmac_i2c_bus* bus) 210static u8 kw_i2c_wait_interrupt(struct pmac_i2c_host_kw *host)
191{ 211{
192 int i, j; 212 int i, j;
193 u8 isr; 213 u8 isr;
@@ -201,8 +221,8 @@ static u8 kw_i2c_wait_interrupt(struct pmac_i2c_bus* bus)
201 * on udelay nor schedule when in polled mode ! 221 * on udelay nor schedule when in polled mode !
202 * For now, just use a bogus loop.... 222 * For now, just use a bogus loop....
203 */ 223 */
204 if (bus->polled) { 224 if (host->polled) {
205 for (j = 1; j < 1000000; j++) 225 for (j = 1; j < 100000; j++)
206 mb(); 226 mb();
207 } else 227 } else
208 msleep(1); 228 msleep(1);
@@ -210,86 +230,99 @@ static u8 kw_i2c_wait_interrupt(struct pmac_i2c_bus* bus)
210 return isr; 230 return isr;
211} 231}
212 232
213static int kw_i2c_handle_interrupt(struct pmac_i2c_bus *bus, int state, int rw, 233static void kw_i2c_handle_interrupt(struct pmac_i2c_host_kw *host, u8 isr)
214 int *rc, u8 **data, int *len, u8 isr)
215{ 234{
216 u8 ack; 235 u8 ack;
217 236
218 DBG_LOW("kw_handle_interrupt(%s, isr: %x)\n", 237 DBG_LOW("kw_handle_interrupt(%s, isr: %x)\n",
219 __kw_state_names[state], isr); 238 __kw_state_names[host->state], isr);
239
240 if (host->state == state_idle) {
241 printk(KERN_WARNING "low_i2c: Keywest got an out of state"
242 " interrupt, ignoring\n");
243 kw_write_reg(reg_isr, isr);
244 return;
245 }
220 246
221 if (isr == 0) { 247 if (isr == 0) {
222 if (state != state_stop) { 248 if (host->state != state_stop) {
223 DBG_LOW("KW: Timeout !\n"); 249 DBG_LOW("KW: Timeout !\n");
224 *rc = -EIO; 250 host->result = -EIO;
225 goto stop; 251 goto stop;
226 } 252 }
227 if (state == state_stop) { 253 if (host->state == state_stop) {
228 ack = kw_read_reg(reg_status); 254 ack = kw_read_reg(reg_status);
229 if (!(ack & KW_I2C_STAT_BUSY)) { 255 if (ack & KW_I2C_STAT_BUSY)
230 state = state_idle; 256 kw_write_reg(reg_status, 0);
231 kw_write_reg(reg_ier, 0x00); 257 host->state = state_idle;
232 } 258 kw_write_reg(reg_ier, 0x00);
259 if (!host->polled)
260 complete(&host->complete);
233 } 261 }
234 return state; 262 return;
235 } 263 }
236 264
237 if (isr & KW_I2C_IRQ_ADDR) { 265 if (isr & KW_I2C_IRQ_ADDR) {
238 ack = kw_read_reg(reg_status); 266 ack = kw_read_reg(reg_status);
239 if (state != state_addr) { 267 if (host->state != state_addr) {
240 kw_write_reg(reg_isr, KW_I2C_IRQ_ADDR); 268 kw_write_reg(reg_isr, KW_I2C_IRQ_ADDR);
241 WRONG_STATE("KW_I2C_IRQ_ADDR"); 269 WRONG_STATE("KW_I2C_IRQ_ADDR");
242 *rc = -EIO; 270 host->result = -EIO;
243 goto stop; 271 goto stop;
244 } 272 }
245 if ((ack & KW_I2C_STAT_LAST_AAK) == 0) { 273 if ((ack & KW_I2C_STAT_LAST_AAK) == 0) {
246 *rc = -ENODEV; 274 host->result = -ENODEV;
247 DBG_LOW("KW: NAK on address\n"); 275 DBG_LOW("KW: NAK on address\n");
248 return state_stop; 276 host->state = state_stop;
277 return;
249 } else { 278 } else {
250 if (rw) { 279 if (host->len == 0) {
251 state = state_read; 280 kw_write_reg(reg_isr, KW_I2C_IRQ_ADDR);
252 if (*len > 1) 281 goto stop;
282 }
283 if (host->rw) {
284 host->state = state_read;
285 if (host->len > 1)
253 kw_write_reg(reg_control, 286 kw_write_reg(reg_control,
254 KW_I2C_CTL_AAK); 287 KW_I2C_CTL_AAK);
255 } else { 288 } else {
256 state = state_write; 289 host->state = state_write;
257 kw_write_reg(reg_data, **data); 290 kw_write_reg(reg_data, *(host->data++));
258 (*data)++; (*len)--; 291 host->len--;
259 } 292 }
260 } 293 }
261 kw_write_reg(reg_isr, KW_I2C_IRQ_ADDR); 294 kw_write_reg(reg_isr, KW_I2C_IRQ_ADDR);
262 } 295 }
263 296
264 if (isr & KW_I2C_IRQ_DATA) { 297 if (isr & KW_I2C_IRQ_DATA) {
265 if (state == state_read) { 298 if (host->state == state_read) {
266 **data = kw_read_reg(reg_data); 299 *(host->data++) = kw_read_reg(reg_data);
267 (*data)++; (*len)--; 300 host->len--;
268 kw_write_reg(reg_isr, KW_I2C_IRQ_DATA); 301 kw_write_reg(reg_isr, KW_I2C_IRQ_DATA);
269 if ((*len) == 0) 302 if (host->len == 0)
270 state = state_stop; 303 host->state = state_stop;
271 else if ((*len) == 1) 304 else if (host->len == 1)
272 kw_write_reg(reg_control, 0); 305 kw_write_reg(reg_control, 0);
273 } else if (state == state_write) { 306 } else if (host->state == state_write) {
274 ack = kw_read_reg(reg_status); 307 ack = kw_read_reg(reg_status);
275 if ((ack & KW_I2C_STAT_LAST_AAK) == 0) { 308 if ((ack & KW_I2C_STAT_LAST_AAK) == 0) {
276 DBG_LOW("KW: nack on data write\n"); 309 DBG_LOW("KW: nack on data write\n");
277 *rc = -EIO; 310 host->result = -EIO;
278 goto stop; 311 goto stop;
279 } else if (*len) { 312 } else if (host->len) {
280 kw_write_reg(reg_data, **data); 313 kw_write_reg(reg_data, *(host->data++));
281 (*data)++; (*len)--; 314 host->len--;
282 } else { 315 } else {
283 kw_write_reg(reg_control, KW_I2C_CTL_STOP); 316 kw_write_reg(reg_control, KW_I2C_CTL_STOP);
284 state = state_stop; 317 host->state = state_stop;
285 *rc = 0; 318 host->result = 0;
286 } 319 }
287 kw_write_reg(reg_isr, KW_I2C_IRQ_DATA); 320 kw_write_reg(reg_isr, KW_I2C_IRQ_DATA);
288 } else { 321 } else {
289 kw_write_reg(reg_isr, KW_I2C_IRQ_DATA); 322 kw_write_reg(reg_isr, KW_I2C_IRQ_DATA);
290 WRONG_STATE("KW_I2C_IRQ_DATA"); 323 WRONG_STATE("KW_I2C_IRQ_DATA");
291 if (state != state_stop) { 324 if (host->state != state_stop) {
292 *rc = -EIO; 325 host->result = -EIO;
293 goto stop; 326 goto stop;
294 } 327 }
295 } 328 }
@@ -297,21 +330,54 @@ static int kw_i2c_handle_interrupt(struct pmac_i2c_bus *bus, int state, int rw,
297 330
298 if (isr & KW_I2C_IRQ_STOP) { 331 if (isr & KW_I2C_IRQ_STOP) {
299 kw_write_reg(reg_isr, KW_I2C_IRQ_STOP); 332 kw_write_reg(reg_isr, KW_I2C_IRQ_STOP);
300 if (state != state_stop) { 333 if (host->state != state_stop) {
301 WRONG_STATE("KW_I2C_IRQ_STOP"); 334 WRONG_STATE("KW_I2C_IRQ_STOP");
302 *rc = -EIO; 335 host->result = -EIO;
303 } 336 }
304 return state_idle; 337 host->state = state_idle;
338 if (!host->polled)
339 complete(&host->complete);
305 } 340 }
306 341
307 if (isr & KW_I2C_IRQ_START) 342 if (isr & KW_I2C_IRQ_START)
308 kw_write_reg(reg_isr, KW_I2C_IRQ_START); 343 kw_write_reg(reg_isr, KW_I2C_IRQ_START);
309 344
310 return state; 345 return;
311
312 stop: 346 stop:
313 kw_write_reg(reg_control, KW_I2C_CTL_STOP); 347 kw_write_reg(reg_control, KW_I2C_CTL_STOP);
314 return state_stop; 348 host->state = state_stop;
349 return;
350}
351
352/* Interrupt handler */
353static irqreturn_t kw_i2c_irq(int irq, void *dev_id, struct pt_regs *regs)
354{
355 struct pmac_i2c_host_kw *host = dev_id;
356 unsigned long flags;
357
358 spin_lock_irqsave(&host->lock, flags);
359 del_timer(&host->timeout_timer);
360 kw_i2c_handle_interrupt(host, kw_read_reg(reg_isr));
361 if (host->state != state_idle) {
362 host->timeout_timer.expires = jiffies + KW_POLL_TIMEOUT;
363 add_timer(&host->timeout_timer);
364 }
365 spin_unlock_irqrestore(&host->lock, flags);
366 return IRQ_HANDLED;
367}
368
369static void kw_i2c_timeout(unsigned long data)
370{
371 struct pmac_i2c_host_kw *host = (struct pmac_i2c_host_kw *)data;
372 unsigned long flags;
373
374 spin_lock_irqsave(&host->lock, flags);
375 kw_i2c_handle_interrupt(host, kw_read_reg(reg_isr));
376 if (host->state != state_idle) {
377 host->timeout_timer.expires = jiffies + KW_POLL_TIMEOUT;
378 add_timer(&host->timeout_timer);
379 }
380 spin_unlock_irqrestore(&host->lock, flags);
315} 381}
316 382
317static int kw_i2c_open(struct pmac_i2c_bus *bus) 383static int kw_i2c_open(struct pmac_i2c_bus *bus)
@@ -332,8 +398,7 @@ static int kw_i2c_xfer(struct pmac_i2c_bus *bus, u8 addrdir, int subsize,
332{ 398{
333 struct pmac_i2c_host_kw *host = bus->hostdata; 399 struct pmac_i2c_host_kw *host = bus->hostdata;
334 u8 mode_reg = host->speed; 400 u8 mode_reg = host->speed;
335 int state = state_addr; 401 int use_irq = host->irq != NO_IRQ && !bus->polled;
336 int rc = 0;
337 402
338 /* Setup mode & subaddress if any */ 403 /* Setup mode & subaddress if any */
339 switch(bus->mode) { 404 switch(bus->mode) {
@@ -371,18 +436,50 @@ static int kw_i2c_xfer(struct pmac_i2c_bus *bus, u8 addrdir, int subsize,
371 || (mode_reg & KW_I2C_MODE_MODE_MASK) == KW_I2C_MODE_COMBINED) 436 || (mode_reg & KW_I2C_MODE_MODE_MASK) == KW_I2C_MODE_COMBINED)
372 kw_write_reg(reg_subaddr, subaddr); 437 kw_write_reg(reg_subaddr, subaddr);
373 438
374 /* Start sending address & disable interrupt*/ 439 /* Prepare for async operations */
375 kw_write_reg(reg_ier, 0 /*KW_I2C_IRQ_MASK*/); 440 host->data = data;
441 host->len = len;
442 host->state = state_addr;
443 host->result = 0;
444 host->rw = (addrdir & 1);
445 host->polled = bus->polled;
446
447 /* Enable interrupt if not using polled mode and interrupt is
448 * available
449 */
450 if (use_irq) {
451 /* Clear completion */
452 INIT_COMPLETION(host->complete);
453 /* Ack stale interrupts */
454 kw_write_reg(reg_isr, kw_read_reg(reg_isr));
455 /* Arm timeout */
456 host->timeout_timer.expires = jiffies + KW_POLL_TIMEOUT;
457 add_timer(&host->timeout_timer);
458 /* Enable emission */
459 kw_write_reg(reg_ier, KW_I2C_IRQ_MASK);
460 }
461
462 /* Start sending address */
376 kw_write_reg(reg_control, KW_I2C_CTL_XADDR); 463 kw_write_reg(reg_control, KW_I2C_CTL_XADDR);
377 464
378 /* State machine, to turn into an interrupt handler in the future */ 465 /* Wait for completion */
379 while(state != state_idle) { 466 if (use_irq)
380 u8 isr = kw_i2c_wait_interrupt(bus); 467 wait_for_completion(&host->complete);
381 state = kw_i2c_handle_interrupt(bus, state, addrdir & 1, &rc, 468 else {
382 &data, &len, isr); 469 while(host->state != state_idle) {
470 unsigned long flags;
471
472 u8 isr = kw_i2c_wait_interrupt(host);
473 spin_lock_irqsave(&host->lock, flags);
474 kw_i2c_handle_interrupt(host, isr);
475 spin_unlock_irqrestore(&host->lock, flags);
476 }
383 } 477 }
384 478
385 return rc; 479 /* Disable emission */
480 kw_write_reg(reg_ier, 0);
481
482 return host->result;
386} 483}
387 484
388static struct pmac_i2c_host_kw *__init kw_i2c_host_init(struct device_node *np) 485static struct pmac_i2c_host_kw *__init kw_i2c_host_init(struct device_node *np)
@@ -409,6 +506,12 @@ static struct pmac_i2c_host_kw *__init kw_i2c_host_init(struct device_node *np)
409 return NULL; 506 return NULL;
410 } 507 }
411 init_MUTEX(&host->mutex); 508 init_MUTEX(&host->mutex);
509 init_completion(&host->complete);
510 spin_lock_init(&host->lock);
511 init_timer(&host->timeout_timer);
512 host->timeout_timer.function = kw_i2c_timeout;
513 host->timeout_timer.data = (unsigned long)host;
514
412 psteps = (u32 *)get_property(np, "AAPL,address-step", NULL); 515 psteps = (u32 *)get_property(np, "AAPL,address-step", NULL);
413 steps = psteps ? (*psteps) : 0x10; 516 steps = psteps ? (*psteps) : 0x10;
414 for (host->bsteps = 0; (steps & 0x01) == 0; host->bsteps++) 517 for (host->bsteps = 0; (steps & 0x01) == 0; host->bsteps++)
@@ -427,9 +530,28 @@ static struct pmac_i2c_host_kw *__init kw_i2c_host_init(struct device_node *np)
427 host->speed = KW_I2C_MODE_25KHZ; 530 host->speed = KW_I2C_MODE_25KHZ;
428 break; 531 break;
429 } 532 }
533 if (np->n_intrs > 0)
534 host->irq = np->intrs[0].line;
535 else
536 host->irq = NO_IRQ;
430 537
431 printk(KERN_INFO "KeyWest i2c @0x%08x %s\n", *addrp, np->full_name);
432 host->base = ioremap((*addrp), 0x1000); 538 host->base = ioremap((*addrp), 0x1000);
539 if (host->base == NULL) {
540 printk(KERN_ERR "low_i2c: Can't map registers for %s\n",
541 np->full_name);
542 kfree(host);
543 return NULL;
544 }
545
546 /* Make sure IRA is disabled */
547 kw_write_reg(reg_ier, 0);
548
549 /* Request chip interrupt */
550 if (request_irq(host->irq, kw_i2c_irq, SA_SHIRQ, "keywest i2c", host))
551 host->irq = NO_IRQ;
552
553 printk(KERN_INFO "KeyWest i2c @0x%08x irq %d %s\n",
554 *addrp, host->irq, np->full_name);
433 555
434 return host; 556 return host;
435} 557}
@@ -591,7 +713,7 @@ static int pmu_i2c_xfer(struct pmac_i2c_bus *bus, u8 addrdir, int subsize,
591 req->nbytes = sizeof(struct pmu_i2c_hdr) + 1; 713 req->nbytes = sizeof(struct pmu_i2c_hdr) + 1;
592 req->done = pmu_i2c_complete; 714 req->done = pmu_i2c_complete;
593 req->arg = &comp; 715 req->arg = &comp;
594 if (!read) { 716 if (!read && len) {
595 memcpy(hdr->data, data, len); 717 memcpy(hdr->data, data, len);
596 req->nbytes += len; 718 req->nbytes += len;
597 } 719 }
@@ -637,7 +759,8 @@ static int pmu_i2c_xfer(struct pmac_i2c_bus *bus, u8 addrdir, int subsize,
637 " bytes, expected %d !\n", rlen, len); 759 " bytes, expected %d !\n", rlen, len);
638 return -EIO; 760 return -EIO;
639 } 761 }
640 memcpy(data, &req->reply[1], len); 762 if (len)
763 memcpy(data, &req->reply[1], len);
641 return 0; 764 return 0;
642 } 765 }
643 } 766 }
@@ -713,6 +836,10 @@ static int smu_i2c_xfer(struct pmac_i2c_bus *bus, u8 addrdir, int subsize,
713 int read = addrdir & 1; 836 int read = addrdir & 1;
714 int rc = 0; 837 int rc = 0;
715 838
839 if ((read && len > SMU_I2C_READ_MAX) ||
840 ((!read) && len > SMU_I2C_WRITE_MAX))
841 return -EINVAL;
842
716 memset(cmd, 0, sizeof(struct smu_i2c_cmd)); 843 memset(cmd, 0, sizeof(struct smu_i2c_cmd));
717 cmd->info.bus = bus->channel; 844 cmd->info.bus = bus->channel;
718 cmd->info.devaddr = addrdir; 845 cmd->info.devaddr = addrdir;
@@ -740,7 +867,7 @@ static int smu_i2c_xfer(struct pmac_i2c_bus *bus, u8 addrdir, int subsize,
740 default: 867 default:
741 return -EINVAL; 868 return -EINVAL;
742 } 869 }
743 if (!read) 870 if (!read && len)
744 memcpy(cmd->info.data, data, len); 871 memcpy(cmd->info.data, data, len);
745 872
746 init_completion(&comp); 873 init_completion(&comp);
@@ -752,7 +879,7 @@ static int smu_i2c_xfer(struct pmac_i2c_bus *bus, u8 addrdir, int subsize,
752 wait_for_completion(&comp); 879 wait_for_completion(&comp);
753 rc = cmd->status; 880 rc = cmd->status;
754 881
755 if (read) 882 if (read && len)
756 memcpy(data, cmd->info.data, len); 883 memcpy(data, cmd->info.data, len);
757 return rc < 0 ? rc : 0; 884 return rc < 0 ? rc : 0;
758} 885}
@@ -767,7 +894,7 @@ static void __init smu_i2c_probe(void)
767 if (!smu_present()) 894 if (!smu_present())
768 return; 895 return;
769 896
770 controller = of_find_node_by_name(NULL, "smu_i2c_control"); 897 controller = of_find_node_by_name(NULL, "smu-i2c-control");
771 if (controller == NULL) 898 if (controller == NULL)
772 controller = of_find_node_by_name(NULL, "smu"); 899 controller = of_find_node_by_name(NULL, "smu");
773 if (controller == NULL) 900 if (controller == NULL)
@@ -884,6 +1011,13 @@ int pmac_i2c_get_flags(struct pmac_i2c_bus *bus)
884} 1011}
885EXPORT_SYMBOL_GPL(pmac_i2c_get_flags); 1012EXPORT_SYMBOL_GPL(pmac_i2c_get_flags);
886 1013
1014int pmac_i2c_get_channel(struct pmac_i2c_bus *bus)
1015{
1016 return bus->channel;
1017}
1018EXPORT_SYMBOL_GPL(pmac_i2c_get_channel);
1019
1020
887void pmac_i2c_attach_adapter(struct pmac_i2c_bus *bus, 1021void pmac_i2c_attach_adapter(struct pmac_i2c_bus *bus,
888 struct i2c_adapter *adapter) 1022 struct i2c_adapter *adapter)
889{ 1023{
@@ -906,6 +1040,17 @@ struct i2c_adapter *pmac_i2c_get_adapter(struct pmac_i2c_bus *bus)
906} 1040}
907EXPORT_SYMBOL_GPL(pmac_i2c_get_adapter); 1041EXPORT_SYMBOL_GPL(pmac_i2c_get_adapter);
908 1042
1043struct pmac_i2c_bus *pmac_i2c_adapter_to_bus(struct i2c_adapter *adapter)
1044{
1045 struct pmac_i2c_bus *bus;
1046
1047 list_for_each_entry(bus, &pmac_i2c_busses, link)
1048 if (bus->adapter == adapter)
1049 return bus;
1050 return NULL;
1051}
1052EXPORT_SYMBOL_GPL(pmac_i2c_adapter_to_bus);
1053
909extern int pmac_i2c_match_adapter(struct device_node *dev, 1054extern int pmac_i2c_match_adapter(struct device_node *dev,
910 struct i2c_adapter *adapter) 1055 struct i2c_adapter *adapter)
911{ 1056{
@@ -956,7 +1101,7 @@ int pmac_i2c_open(struct pmac_i2c_bus *bus, int polled)
956 int rc; 1101 int rc;
957 1102
958 down(&bus->sem); 1103 down(&bus->sem);
959 bus->polled = polled; 1104 bus->polled = polled || pmac_i2c_force_poll;
960 bus->opened = 1; 1105 bus->opened = 1;
961 bus->mode = pmac_i2c_mode_std; 1106 bus->mode = pmac_i2c_mode_std;
962 if (bus->open && (rc = bus->open(bus)) != 0) { 1107 if (bus->open && (rc = bus->open(bus)) != 0) {
@@ -1034,14 +1179,43 @@ int __init pmac_i2c_init(void)
1034 kw_i2c_probe(); 1179 kw_i2c_probe();
1035 1180
1036#ifdef CONFIG_ADB_PMU 1181#ifdef CONFIG_ADB_PMU
1182 /* Probe PMU i2c busses */
1037 pmu_i2c_probe(); 1183 pmu_i2c_probe();
1038#endif 1184#endif
1039 1185
1040#ifdef CONFIG_PMAC_SMU 1186#ifdef CONFIG_PMAC_SMU
1187 /* Probe SMU i2c busses */
1041 smu_i2c_probe(); 1188 smu_i2c_probe();
1042#endif 1189#endif
1043
1044 return 0; 1190 return 0;
1045} 1191}
1046arch_initcall(pmac_i2c_init); 1192arch_initcall(pmac_i2c_init);
1047 1193
1194/* Since pmac_i2c_init can be called too early for the platform device
1195 * registration, we need to do it at a later time. In our case, subsys
1196 * happens to fit well, though I agree it's a bit of a hack...
1197 */
1198static int __init pmac_i2c_create_platform_devices(void)
1199{
1200 struct pmac_i2c_bus *bus;
1201 int i = 0;
1202
1203 /* In the case where we are initialized from smp_init(), we must
1204 * not use the timer (and thus the irq). It's safe from now on
1205 * though
1206 */
1207 pmac_i2c_force_poll = 0;
1208
1209 /* Create platform devices */
1210 list_for_each_entry(bus, &pmac_i2c_busses, link) {
1211 bus->platform_dev =
1212 platform_device_alloc("i2c-powermac", i++);
1213 if (bus->platform_dev == NULL)
1214 return -ENOMEM;
1215 bus->platform_dev->dev.platform_data = bus;
1216 platform_device_add(bus->platform_dev);
1217 }
1218
1219 return 0;
1220}
1221subsys_initcall(pmac_i2c_create_platform_devices);
diff --git a/arch/powerpc/platforms/powermac/setup.c b/arch/powerpc/platforms/powermac/setup.c
index dc5cdc1484e8..3b1a9d4fcbc6 100644
--- a/arch/powerpc/platforms/powermac/setup.c
+++ b/arch/powerpc/platforms/powermac/setup.c
@@ -650,7 +650,7 @@ static int pmac_check_legacy_ioport(unsigned int baseport)
650 650
651static int __init pmac_declare_of_platform_devices(void) 651static int __init pmac_declare_of_platform_devices(void)
652{ 652{
653 struct device_node *np, *npp; 653 struct device_node *np;
654 654
655 np = of_find_node_by_name(NULL, "valkyrie"); 655 np = of_find_node_by_name(NULL, "valkyrie");
656 if (np) 656 if (np)
@@ -658,22 +658,6 @@ static int __init pmac_declare_of_platform_devices(void)
658 np = of_find_node_by_name(NULL, "platinum"); 658 np = of_find_node_by_name(NULL, "platinum");
659 if (np) 659 if (np)
660 of_platform_device_create(np, "platinum", NULL); 660 of_platform_device_create(np, "platinum", NULL);
661 npp = of_find_node_by_name(NULL, "uni-n");
662 if (npp == NULL)
663 npp = of_find_node_by_name(NULL, "u3");
664 if (npp == NULL)
665 npp = of_find_node_by_name(NULL, "u4");
666 if (npp) {
667 for (np = NULL; (np = of_get_next_child(npp, np)) != NULL;) {
668 if (strncmp(np->name, "i2c", 3) == 0) {
669 of_platform_device_create(np, "uni-n-i2c",
670 NULL);
671 of_node_put(np);
672 break;
673 }
674 }
675 of_node_put(npp);
676 }
677 np = of_find_node_by_type(NULL, "smu"); 661 np = of_find_node_by_type(NULL, "smu");
678 if (np) { 662 if (np) {
679 of_platform_device_create(np, "smu", NULL); 663 of_platform_device_create(np, "smu", NULL);
diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig
index 4010fe92e72b..08d5b8fed2dc 100644
--- a/drivers/i2c/busses/Kconfig
+++ b/drivers/i2c/busses/Kconfig
@@ -236,27 +236,17 @@ config I2C_IXP2000
236 This support is also available as a module. If so, the module 236 This support is also available as a module. If so, the module
237 will be called i2c-ixp2000. 237 will be called i2c-ixp2000.
238 238
239config I2C_KEYWEST 239config I2C_POWERMAC
240 tristate "Powermac Keywest I2C interface" 240 tristate "Powermac I2C interface"
241 depends on I2C && PPC_PMAC 241 depends on I2C && PPC_PMAC
242 default y
242 help 243 help
243 This supports the use of the I2C interface in the combo-I/O 244 This exposes the various PowerMac i2c interfaces to the linux i2c
244 chip on recent Apple machines. Say Y if you have such a machine. 245 layer and to userland. It is used by various drivers on the powemac
245 246 platform, thus should generally be enabled.
246 This support is also available as a module. If so, the module
247 will be called i2c-keywest.
248
249config I2C_PMAC_SMU
250 tristate "Powermac SMU I2C interface"
251 depends on I2C && PMAC_SMU
252 help
253 This supports the use of the I2C interface in the SMU
254 chip on recent Apple machines like the iMac G5. It is used
255 among others by the thermal control driver for those machines.
256 Say Y if you have such a machine.
257 247
258 This support is also available as a module. If so, the module 248 This support is also available as a module. If so, the module
259 will be called i2c-pmac-smu. 249 will be called i2c-powermac.
260 250
261config I2C_MPC 251config I2C_MPC
262 tristate "MPC107/824x/85xx/52xx" 252 tristate "MPC107/824x/85xx/52xx"
diff --git a/drivers/i2c/busses/Makefile b/drivers/i2c/busses/Makefile
index f1df00f66c6c..b44831dff683 100644
--- a/drivers/i2c/busses/Makefile
+++ b/drivers/i2c/busses/Makefile
@@ -19,8 +19,7 @@ obj-$(CONFIG_I2C_ISA) += i2c-isa.o
19obj-$(CONFIG_I2C_ITE) += i2c-ite.o 19obj-$(CONFIG_I2C_ITE) += i2c-ite.o
20obj-$(CONFIG_I2C_IXP2000) += i2c-ixp2000.o 20obj-$(CONFIG_I2C_IXP2000) += i2c-ixp2000.o
21obj-$(CONFIG_I2C_IXP4XX) += i2c-ixp4xx.o 21obj-$(CONFIG_I2C_IXP4XX) += i2c-ixp4xx.o
22obj-$(CONFIG_I2C_KEYWEST) += i2c-keywest.o 22obj-$(CONFIG_I2C_POWERMAC) += i2c-powermac.o
23obj-$(CONFIG_I2C_PMAC_SMU) += i2c-pmac-smu.o
24obj-$(CONFIG_I2C_MPC) += i2c-mpc.o 23obj-$(CONFIG_I2C_MPC) += i2c-mpc.o
25obj-$(CONFIG_I2C_MV64XXX) += i2c-mv64xxx.o 24obj-$(CONFIG_I2C_MV64XXX) += i2c-mv64xxx.o
26obj-$(CONFIG_I2C_NFORCE2) += i2c-nforce2.o 25obj-$(CONFIG_I2C_NFORCE2) += i2c-nforce2.o
diff --git a/drivers/i2c/busses/i2c-keywest.c b/drivers/i2c/busses/i2c-keywest.c
deleted file mode 100644
index 93e7080e3bc5..000000000000
--- a/drivers/i2c/busses/i2c-keywest.c
+++ /dev/null
@@ -1,754 +0,0 @@
1/*
2 i2c Support for Apple Keywest I2C Bus Controller
3
4 Copyright (c) 2001 Benjamin Herrenschmidt <benh@kernel.crashing.org>
5
6 Original work by
7
8 Copyright (c) 2000 Philip Edelbrock <phil@stimpy.netroedge.com>
9
10 This program is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
12 the Free Software Foundation; either version 2 of the License, or
13 (at your option) any later version.
14
15 This program is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
19
20 You should have received a copy of the GNU General Public License
21 along with this program; if not, write to the Free Software
22 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23
24 Changes:
25
26 2001/12/13 BenH New implementation
27 2001/12/15 BenH Add support for "byte" and "quick"
28 transfers. Add i2c_xfer routine.
29 2003/09/21 BenH Rework state machine with Paulus help
30 2004/01/21 BenH Merge in Greg KH changes, polled mode is back
31 2004/02/05 BenH Merge 64 bits fixes from the g5 ppc64 tree
32
33 My understanding of the various modes supported by keywest are:
34
35 - Dumb mode : not implemented, probably direct tweaking of lines
36 - Standard mode : simple i2c transaction of type
37 S Addr R/W A Data A Data ... T
38 - Standard sub mode : combined 8 bit subaddr write with data read
39 S Addr R/W A SubAddr A Data A Data ... T
40 - Combined mode : Subaddress and Data sequences appended with no stop
41 S Addr R/W A SubAddr S Addr R/W A Data A Data ... T
42
43 Currently, this driver uses only Standard mode for i2c xfer, and
44 smbus byte & quick transfers ; and uses StandardSub mode for
45 other smbus transfers instead of combined as we need that for the
46 sound driver to be happy
47*/
48
49#include <linux/module.h>
50#include <linux/kernel.h>
51#include <linux/ioport.h>
52#include <linux/pci.h>
53#include <linux/types.h>
54#include <linux/delay.h>
55#include <linux/i2c.h>
56#include <linux/init.h>
57#include <linux/mm.h>
58#include <linux/timer.h>
59#include <linux/spinlock.h>
60#include <linux/completion.h>
61#include <linux/interrupt.h>
62
63#include <asm/io.h>
64#include <asm/prom.h>
65#include <asm/machdep.h>
66#include <asm/pmac_feature.h>
67#include <asm/pmac_low_i2c.h>
68
69#include "i2c-keywest.h"
70
71#undef POLLED_MODE
72
73/* Some debug macros */
74#define WRONG_STATE(name) do {\
75 pr_debug("KW: wrong state. Got %s, state: %s (isr: %02x)\n", \
76 name, __kw_state_names[iface->state], isr); \
77 } while(0)
78
79#ifdef DEBUG
80static const char *__kw_state_names[] = {
81 "state_idle",
82 "state_addr",
83 "state_read",
84 "state_write",
85 "state_stop",
86 "state_dead"
87};
88#endif /* DEBUG */
89
90MODULE_AUTHOR("Benjamin Herrenschmidt <benh@kernel.crashing.org>");
91MODULE_DESCRIPTION("I2C driver for Apple's Keywest");
92MODULE_LICENSE("GPL");
93
94#ifdef POLLED_MODE
95/* Don't schedule, the g5 fan controller is too
96 * timing sensitive
97 */
98static u8
99wait_interrupt(struct keywest_iface* iface)
100{
101 int i;
102 u8 isr;
103
104 for (i = 0; i < 200000; i++) {
105 isr = read_reg(reg_isr) & KW_I2C_IRQ_MASK;
106 if (isr != 0)
107 return isr;
108 udelay(10);
109 }
110 return isr;
111}
112#endif /* POLLED_MODE */
113
114static void
115do_stop(struct keywest_iface* iface, int result)
116{
117 write_reg(reg_control, KW_I2C_CTL_STOP);
118 iface->state = state_stop;
119 iface->result = result;
120}
121
122/* Main state machine for standard & standard sub mode */
123static void
124handle_interrupt(struct keywest_iface *iface, u8 isr)
125{
126 int ack;
127
128 if (isr == 0) {
129 if (iface->state != state_stop) {
130 pr_debug("KW: Timeout !\n");
131 do_stop(iface, -EIO);
132 }
133 if (iface->state == state_stop) {
134 ack = read_reg(reg_status);
135 if (!(ack & KW_I2C_STAT_BUSY)) {
136 iface->state = state_idle;
137 write_reg(reg_ier, 0x00);
138#ifndef POLLED_MODE
139 complete(&iface->complete);
140#endif /* POLLED_MODE */
141 }
142 }
143 return;
144 }
145
146 if (isr & KW_I2C_IRQ_ADDR) {
147 ack = read_reg(reg_status);
148 if (iface->state != state_addr) {
149 write_reg(reg_isr, KW_I2C_IRQ_ADDR);
150 WRONG_STATE("KW_I2C_IRQ_ADDR");
151 do_stop(iface, -EIO);
152 return;
153 }
154 if ((ack & KW_I2C_STAT_LAST_AAK) == 0) {
155 iface->state = state_stop;
156 iface->result = -ENODEV;
157 pr_debug("KW: NAK on address\n");
158 } else {
159 /* Handle rw "quick" mode */
160 if (iface->datalen == 0) {
161 do_stop(iface, 0);
162 } else if (iface->read_write == I2C_SMBUS_READ) {
163 iface->state = state_read;
164 if (iface->datalen > 1)
165 write_reg(reg_control, KW_I2C_CTL_AAK);
166 } else {
167 iface->state = state_write;
168 write_reg(reg_data, *(iface->data++));
169 iface->datalen--;
170 }
171 }
172 write_reg(reg_isr, KW_I2C_IRQ_ADDR);
173 }
174
175 if (isr & KW_I2C_IRQ_DATA) {
176 if (iface->state == state_read) {
177 *(iface->data++) = read_reg(reg_data);
178 write_reg(reg_isr, KW_I2C_IRQ_DATA);
179 iface->datalen--;
180 if (iface->datalen == 0)
181 iface->state = state_stop;
182 else if (iface->datalen == 1)
183 write_reg(reg_control, 0);
184 } else if (iface->state == state_write) {
185 /* Check ack status */
186 ack = read_reg(reg_status);
187 if ((ack & KW_I2C_STAT_LAST_AAK) == 0) {
188 pr_debug("KW: nack on data write (%x): %x\n",
189 iface->data[-1], ack);
190 do_stop(iface, -EIO);
191 } else if (iface->datalen) {
192 write_reg(reg_data, *(iface->data++));
193 iface->datalen--;
194 } else {
195 write_reg(reg_control, KW_I2C_CTL_STOP);
196 iface->state = state_stop;
197 iface->result = 0;
198 }
199 write_reg(reg_isr, KW_I2C_IRQ_DATA);
200 } else {
201 write_reg(reg_isr, KW_I2C_IRQ_DATA);
202 WRONG_STATE("KW_I2C_IRQ_DATA");
203 if (iface->state != state_stop)
204 do_stop(iface, -EIO);
205 }
206 }
207
208 if (isr & KW_I2C_IRQ_STOP) {
209 write_reg(reg_isr, KW_I2C_IRQ_STOP);
210 if (iface->state != state_stop) {
211 WRONG_STATE("KW_I2C_IRQ_STOP");
212 iface->result = -EIO;
213 }
214 iface->state = state_idle;
215 write_reg(reg_ier, 0x00);
216#ifndef POLLED_MODE
217 complete(&iface->complete);
218#endif /* POLLED_MODE */
219 }
220
221 if (isr & KW_I2C_IRQ_START)
222 write_reg(reg_isr, KW_I2C_IRQ_START);
223}
224
225#ifndef POLLED_MODE
226
227/* Interrupt handler */
228static irqreturn_t
229keywest_irq(int irq, void *dev_id, struct pt_regs *regs)
230{
231 struct keywest_iface *iface = (struct keywest_iface *)dev_id;
232 unsigned long flags;
233
234 spin_lock_irqsave(&iface->lock, flags);
235 del_timer(&iface->timeout_timer);
236 handle_interrupt(iface, read_reg(reg_isr));
237 if (iface->state != state_idle) {
238 iface->timeout_timer.expires = jiffies + POLL_TIMEOUT;
239 add_timer(&iface->timeout_timer);
240 }
241 spin_unlock_irqrestore(&iface->lock, flags);
242 return IRQ_HANDLED;
243}
244
245static void
246keywest_timeout(unsigned long data)
247{
248 struct keywest_iface *iface = (struct keywest_iface *)data;
249 unsigned long flags;
250
251 pr_debug("timeout !\n");
252 spin_lock_irqsave(&iface->lock, flags);
253 handle_interrupt(iface, read_reg(reg_isr));
254 if (iface->state != state_idle) {
255 iface->timeout_timer.expires = jiffies + POLL_TIMEOUT;
256 add_timer(&iface->timeout_timer);
257 }
258 spin_unlock_irqrestore(&iface->lock, flags);
259}
260
261#endif /* POLLED_MODE */
262
263/*
264 * SMBUS-type transfer entrypoint
265 */
266static s32
267keywest_smbus_xfer( struct i2c_adapter* adap,
268 u16 addr,
269 unsigned short flags,
270 char read_write,
271 u8 command,
272 int size,
273 union i2c_smbus_data* data)
274{
275 struct keywest_chan* chan = i2c_get_adapdata(adap);
276 struct keywest_iface* iface = chan->iface;
277 int len;
278 u8* buffer;
279 u16 cur_word;
280 int rc = 0;
281
282 if (iface->state == state_dead)
283 return -ENXIO;
284
285 /* Prepare datas & select mode */
286 iface->cur_mode &= ~KW_I2C_MODE_MODE_MASK;
287 switch (size) {
288 case I2C_SMBUS_QUICK:
289 len = 0;
290 buffer = NULL;
291 iface->cur_mode |= KW_I2C_MODE_STANDARD;
292 break;
293 case I2C_SMBUS_BYTE:
294 len = 1;
295 buffer = &data->byte;
296 iface->cur_mode |= KW_I2C_MODE_STANDARD;
297 break;
298 case I2C_SMBUS_BYTE_DATA:
299 len = 1;
300 buffer = &data->byte;
301 iface->cur_mode |= KW_I2C_MODE_STANDARDSUB;
302 break;
303 case I2C_SMBUS_WORD_DATA:
304 len = 2;
305 cur_word = cpu_to_le16(data->word);
306 buffer = (u8 *)&cur_word;
307 iface->cur_mode |= KW_I2C_MODE_STANDARDSUB;
308 break;
309 case I2C_SMBUS_BLOCK_DATA:
310 len = data->block[0];
311 buffer = &data->block[1];
312 iface->cur_mode |= KW_I2C_MODE_STANDARDSUB;
313 break;
314 default:
315 return -1;
316 }
317
318 /* Turn a standardsub read into a combined mode access */
319 if (read_write == I2C_SMBUS_READ
320 && (iface->cur_mode & KW_I2C_MODE_MODE_MASK) == KW_I2C_MODE_STANDARDSUB) {
321 iface->cur_mode &= ~KW_I2C_MODE_MODE_MASK;
322 iface->cur_mode |= KW_I2C_MODE_COMBINED;
323 }
324
325 /* Original driver had this limitation */
326 if (len > 32)
327 len = 32;
328
329 if (pmac_low_i2c_lock(iface->node))
330 return -ENXIO;
331
332 pr_debug("chan: %d, addr: 0x%x, transfer len: %d, read: %d\n",
333 chan->chan_no, addr, len, read_write == I2C_SMBUS_READ);
334
335 iface->data = buffer;
336 iface->datalen = len;
337 iface->state = state_addr;
338 iface->result = 0;
339 iface->read_write = read_write;
340
341 /* Setup channel & clear pending irqs */
342 write_reg(reg_isr, read_reg(reg_isr));
343 write_reg(reg_mode, iface->cur_mode | (chan->chan_no << 4));
344 write_reg(reg_status, 0);
345
346 /* Set up address and r/w bit */
347 write_reg(reg_addr,
348 (addr << 1) | ((read_write == I2C_SMBUS_READ) ? 0x01 : 0x00));
349
350 /* Set up the sub address */
351 if ((iface->cur_mode & KW_I2C_MODE_MODE_MASK) == KW_I2C_MODE_STANDARDSUB
352 || (iface->cur_mode & KW_I2C_MODE_MODE_MASK) == KW_I2C_MODE_COMBINED)
353 write_reg(reg_subaddr, command);
354
355#ifndef POLLED_MODE
356 /* Arm timeout */
357 iface->timeout_timer.expires = jiffies + POLL_TIMEOUT;
358 add_timer(&iface->timeout_timer);
359#endif
360
361 /* Start sending address & enable interrupt*/
362 write_reg(reg_control, KW_I2C_CTL_XADDR);
363 write_reg(reg_ier, KW_I2C_IRQ_MASK);
364
365#ifdef POLLED_MODE
366 pr_debug("using polled mode...\n");
367 /* State machine, to turn into an interrupt handler */
368 while(iface->state != state_idle) {
369 unsigned long flags;
370
371 u8 isr = wait_interrupt(iface);
372 spin_lock_irqsave(&iface->lock, flags);
373 handle_interrupt(iface, isr);
374 spin_unlock_irqrestore(&iface->lock, flags);
375 }
376#else /* POLLED_MODE */
377 pr_debug("using interrupt mode...\n");
378 wait_for_completion(&iface->complete);
379#endif /* POLLED_MODE */
380
381 rc = iface->result;
382 pr_debug("transfer done, result: %d\n", rc);
383
384 if (rc == 0 && size == I2C_SMBUS_WORD_DATA && read_write == I2C_SMBUS_READ)
385 data->word = le16_to_cpu(cur_word);
386
387 /* Release sem */
388 pmac_low_i2c_unlock(iface->node);
389
390 return rc;
391}
392
393/*
394 * Generic i2c master transfer entrypoint
395 */
396static int
397keywest_xfer( struct i2c_adapter *adap,
398 struct i2c_msg *msgs,
399 int num)
400{
401 struct keywest_chan* chan = i2c_get_adapdata(adap);
402 struct keywest_iface* iface = chan->iface;
403 struct i2c_msg *pmsg;
404 int i, completed;
405 int rc = 0;
406
407 if (iface->state == state_dead)
408 return -ENXIO;
409
410 if (pmac_low_i2c_lock(iface->node))
411 return -ENXIO;
412
413 /* Set adapter to standard mode */
414 iface->cur_mode &= ~KW_I2C_MODE_MODE_MASK;
415 iface->cur_mode |= KW_I2C_MODE_STANDARD;
416
417 completed = 0;
418 for (i = 0; rc >= 0 && i < num;) {
419 u8 addr;
420
421 pmsg = &msgs[i++];
422 addr = pmsg->addr;
423 if (pmsg->flags & I2C_M_TEN) {
424 printk(KERN_ERR "i2c-keywest: 10 bits addr not supported !\n");
425 rc = -EINVAL;
426 break;
427 }
428 pr_debug("xfer: chan: %d, doing %s %d bytes to 0x%02x - %d of %d messages\n",
429 chan->chan_no,
430 pmsg->flags & I2C_M_RD ? "read" : "write",
431 pmsg->len, addr, i, num);
432
433 /* Setup channel & clear pending irqs */
434 write_reg(reg_mode, iface->cur_mode | (chan->chan_no << 4));
435 write_reg(reg_isr, read_reg(reg_isr));
436 write_reg(reg_status, 0);
437
438 iface->data = pmsg->buf;
439 iface->datalen = pmsg->len;
440 iface->state = state_addr;
441 iface->result = 0;
442 if (pmsg->flags & I2C_M_RD)
443 iface->read_write = I2C_SMBUS_READ;
444 else
445 iface->read_write = I2C_SMBUS_WRITE;
446
447 /* Set up address and r/w bit */
448 if (pmsg->flags & I2C_M_REV_DIR_ADDR)
449 addr ^= 1;
450 write_reg(reg_addr,
451 (addr << 1) |
452 ((iface->read_write == I2C_SMBUS_READ) ? 0x01 : 0x00));
453
454#ifndef POLLED_MODE
455 /* Arm timeout */
456 iface->timeout_timer.expires = jiffies + POLL_TIMEOUT;
457 add_timer(&iface->timeout_timer);
458#endif
459
460 /* Start sending address & enable interrupt*/
461 write_reg(reg_ier, KW_I2C_IRQ_MASK);
462 write_reg(reg_control, KW_I2C_CTL_XADDR);
463
464#ifdef POLLED_MODE
465 pr_debug("using polled mode...\n");
466 /* State machine, to turn into an interrupt handler */
467 while(iface->state != state_idle) {
468 u8 isr = wait_interrupt(iface);
469 handle_interrupt(iface, isr);
470 }
471#else /* POLLED_MODE */
472 pr_debug("using interrupt mode...\n");
473 wait_for_completion(&iface->complete);
474#endif /* POLLED_MODE */
475
476 rc = iface->result;
477 if (rc == 0)
478 completed++;
479 pr_debug("transfer done, result: %d\n", rc);
480 }
481
482 /* Release sem */
483 pmac_low_i2c_unlock(iface->node);
484
485 return completed;
486}
487
488static u32
489keywest_func(struct i2c_adapter * adapter)
490{
491 return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE |
492 I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA |
493 I2C_FUNC_SMBUS_BLOCK_DATA;
494}
495
496/* For now, we only handle combined mode (smbus) */
497static struct i2c_algorithm keywest_algorithm = {
498 .smbus_xfer = keywest_smbus_xfer,
499 .master_xfer = keywest_xfer,
500 .functionality = keywest_func,
501};
502
503
504static int
505create_iface(struct device_node *np, struct device *dev)
506{
507 unsigned long steps;
508 unsigned bsteps, tsize, i, nchan;
509 struct keywest_iface* iface;
510 u32 *psteps, *prate, *addrp;
511 int rc;
512
513 if (np->n_intrs < 1) {
514 printk(KERN_ERR "%s: Missing interrupt !\n",
515 np->full_name);
516 return -ENODEV;
517 }
518 addrp = (u32 *)get_property(np, "AAPL,address", NULL);
519 if (addrp == NULL) {
520 printk(KERN_ERR "%s: Can't find address !\n",
521 np->full_name);
522 return -ENODEV;
523 }
524
525 if (pmac_low_i2c_lock(np))
526 return -ENODEV;
527
528 psteps = (u32 *)get_property(np, "AAPL,address-step", NULL);
529 steps = psteps ? (*psteps) : 0x10;
530
531 /* Hrm... maybe we can be smarter here */
532 for (bsteps = 0; (steps & 0x01) == 0; bsteps++)
533 steps >>= 1;
534
535 if (np->parent->name[0] == 'u')
536 nchan = 2;
537 else
538 nchan = 1;
539
540 tsize = sizeof(struct keywest_iface) +
541 (sizeof(struct keywest_chan) + 4) * nchan;
542 iface = kzalloc(tsize, GFP_KERNEL);
543 if (iface == NULL) {
544 printk(KERN_ERR "i2c-keywest: can't allocate inteface !\n");
545 pmac_low_i2c_unlock(np);
546 return -ENOMEM;
547 }
548 spin_lock_init(&iface->lock);
549 init_completion(&iface->complete);
550 iface->node = of_node_get(np);
551 iface->bsteps = bsteps;
552 iface->chan_count = nchan;
553 iface->state = state_idle;
554 iface->irq = np->intrs[0].line;
555 iface->channels = (struct keywest_chan *)
556 (((unsigned long)(iface + 1) + 3UL) & ~3UL);
557 iface->base = ioremap(*addrp, 0x1000);
558 if (!iface->base) {
559 printk(KERN_ERR "i2c-keywest: can't map inteface !\n");
560 kfree(iface);
561 pmac_low_i2c_unlock(np);
562 return -ENOMEM;
563 }
564
565#ifndef POLLED_MODE
566 init_timer(&iface->timeout_timer);
567 iface->timeout_timer.function = keywest_timeout;
568 iface->timeout_timer.data = (unsigned long)iface;
569#endif
570
571 /* Select interface rate */
572 iface->cur_mode = KW_I2C_MODE_100KHZ;
573 prate = (u32 *)get_property(np, "AAPL,i2c-rate", NULL);
574 if (prate) switch(*prate) {
575 case 100:
576 iface->cur_mode = KW_I2C_MODE_100KHZ;
577 break;
578 case 50:
579 iface->cur_mode = KW_I2C_MODE_50KHZ;
580 break;
581 case 25:
582 iface->cur_mode = KW_I2C_MODE_25KHZ;
583 break;
584 default:
585 printk(KERN_WARNING "i2c-keywest: unknown rate %ldKhz, using 100KHz\n",
586 (long)*prate);
587 }
588
589 /* Select standard mode by default */
590 iface->cur_mode |= KW_I2C_MODE_STANDARD;
591
592 /* Write mode */
593 write_reg(reg_mode, iface->cur_mode);
594
595 /* Switch interrupts off & clear them*/
596 write_reg(reg_ier, 0x00);
597 write_reg(reg_isr, KW_I2C_IRQ_MASK);
598
599#ifndef POLLED_MODE
600 /* Request chip interrupt */
601 rc = request_irq(iface->irq, keywest_irq, SA_INTERRUPT, "keywest i2c", iface);
602 if (rc) {
603 printk(KERN_ERR "i2c-keywest: can't get IRQ %d !\n", iface->irq);
604 iounmap(iface->base);
605 kfree(iface);
606 pmac_low_i2c_unlock(np);
607 return -ENODEV;
608 }
609#endif /* POLLED_MODE */
610
611 pmac_low_i2c_unlock(np);
612 dev_set_drvdata(dev, iface);
613
614 for (i=0; i<nchan; i++) {
615 struct keywest_chan* chan = &iface->channels[i];
616
617 sprintf(chan->adapter.name, "%s %d", np->parent->name, i);
618 chan->iface = iface;
619 chan->chan_no = i;
620 chan->adapter.algo = &keywest_algorithm;
621 chan->adapter.algo_data = NULL;
622 chan->adapter.client_register = NULL;
623 chan->adapter.client_unregister = NULL;
624 i2c_set_adapdata(&chan->adapter, chan);
625 chan->adapter.dev.parent = dev;
626
627 rc = i2c_add_adapter(&chan->adapter);
628 if (rc) {
629 printk("i2c-keywest.c: Adapter %s registration failed\n",
630 chan->adapter.name);
631 i2c_set_adapdata(&chan->adapter, NULL);
632 }
633 }
634
635 printk(KERN_INFO "Found KeyWest i2c on \"%s\", %d channel%s, stepping: %d bits\n",
636 np->parent->name, nchan, nchan > 1 ? "s" : "", bsteps);
637
638 return 0;
639}
640
641static int
642dispose_iface(struct device *dev)
643{
644 struct keywest_iface *iface = dev_get_drvdata(dev);
645 int i, rc;
646
647 /* Make sure we stop all activity */
648 if (pmac_low_i2c_lock(iface->node))
649 return -ENODEV;
650
651#ifndef POLLED_MODE
652 spin_lock_irq(&iface->lock);
653 while (iface->state != state_idle) {
654 spin_unlock_irq(&iface->lock);
655 msleep(100);
656 spin_lock_irq(&iface->lock);
657 }
658#endif /* POLLED_MODE */
659 iface->state = state_dead;
660#ifndef POLLED_MODE
661 spin_unlock_irq(&iface->lock);
662 free_irq(iface->irq, iface);
663#endif /* POLLED_MODE */
664
665 pmac_low_i2c_unlock(iface->node);
666
667 /* Release all channels */
668 for (i=0; i<iface->chan_count; i++) {
669 struct keywest_chan* chan = &iface->channels[i];
670 if (i2c_get_adapdata(&chan->adapter) == NULL)
671 continue;
672 rc = i2c_del_adapter(&chan->adapter);
673 i2c_set_adapdata(&chan->adapter, NULL);
674 /* We aren't that prepared to deal with this... */
675 if (rc)
676 printk("i2c-keywest.c: i2c_del_adapter failed, that's bad !\n");
677 }
678 iounmap(iface->base);
679 dev_set_drvdata(dev, NULL);
680 of_node_put(iface->node);
681 kfree(iface);
682
683 return 0;
684}
685
686static int
687create_iface_macio(struct macio_dev* dev, const struct of_device_id *match)
688{
689 return create_iface(dev->ofdev.node, &dev->ofdev.dev);
690}
691
692static int
693dispose_iface_macio(struct macio_dev* dev)
694{
695 return dispose_iface(&dev->ofdev.dev);
696}
697
698static int
699create_iface_of_platform(struct of_device* dev, const struct of_device_id *match)
700{
701 return create_iface(dev->node, &dev->dev);
702}
703
704static int
705dispose_iface_of_platform(struct of_device* dev)
706{
707 return dispose_iface(&dev->dev);
708}
709
710static struct of_device_id i2c_keywest_match[] =
711{
712 {
713 .type = "i2c",
714 .compatible = "keywest"
715 },
716 {},
717};
718
719static struct macio_driver i2c_keywest_macio_driver =
720{
721 .owner = THIS_MODULE,
722 .name = "i2c-keywest",
723 .match_table = i2c_keywest_match,
724 .probe = create_iface_macio,
725 .remove = dispose_iface_macio
726};
727
728static struct of_platform_driver i2c_keywest_of_platform_driver =
729{
730 .owner = THIS_MODULE,
731 .name = "i2c-keywest",
732 .match_table = i2c_keywest_match,
733 .probe = create_iface_of_platform,
734 .remove = dispose_iface_of_platform
735};
736
737static int __init
738i2c_keywest_init(void)
739{
740 of_register_driver(&i2c_keywest_of_platform_driver);
741 macio_register_driver(&i2c_keywest_macio_driver);
742
743 return 0;
744}
745
746static void __exit
747i2c_keywest_cleanup(void)
748{
749 of_unregister_driver(&i2c_keywest_of_platform_driver);
750 macio_unregister_driver(&i2c_keywest_macio_driver);
751}
752
753module_init(i2c_keywest_init);
754module_exit(i2c_keywest_cleanup);
diff --git a/drivers/i2c/busses/i2c-keywest.h b/drivers/i2c/busses/i2c-keywest.h
deleted file mode 100644
index c5022e1ca6ff..000000000000
--- a/drivers/i2c/busses/i2c-keywest.h
+++ /dev/null
@@ -1,108 +0,0 @@
1#ifndef __I2C_KEYWEST_H__
2#define __I2C_KEYWEST_H__
3
4/* The Tumbler audio equalizer can be really slow sometimes */
5#define POLL_TIMEOUT (2*HZ)
6
7/* Register indices */
8typedef enum {
9 reg_mode = 0,
10 reg_control,
11 reg_status,
12 reg_isr,
13 reg_ier,
14 reg_addr,
15 reg_subaddr,
16 reg_data
17} reg_t;
18
19
20/* Mode register */
21#define KW_I2C_MODE_100KHZ 0x00
22#define KW_I2C_MODE_50KHZ 0x01
23#define KW_I2C_MODE_25KHZ 0x02
24#define KW_I2C_MODE_DUMB 0x00
25#define KW_I2C_MODE_STANDARD 0x04
26#define KW_I2C_MODE_STANDARDSUB 0x08
27#define KW_I2C_MODE_COMBINED 0x0C
28#define KW_I2C_MODE_MODE_MASK 0x0C
29#define KW_I2C_MODE_CHAN_MASK 0xF0
30
31/* Control register */
32#define KW_I2C_CTL_AAK 0x01
33#define KW_I2C_CTL_XADDR 0x02
34#define KW_I2C_CTL_STOP 0x04
35#define KW_I2C_CTL_START 0x08
36
37/* Status register */
38#define KW_I2C_STAT_BUSY 0x01
39#define KW_I2C_STAT_LAST_AAK 0x02
40#define KW_I2C_STAT_LAST_RW 0x04
41#define KW_I2C_STAT_SDA 0x08
42#define KW_I2C_STAT_SCL 0x10
43
44/* IER & ISR registers */
45#define KW_I2C_IRQ_DATA 0x01
46#define KW_I2C_IRQ_ADDR 0x02
47#define KW_I2C_IRQ_STOP 0x04
48#define KW_I2C_IRQ_START 0x08
49#define KW_I2C_IRQ_MASK 0x0F
50
51/* Physical interface */
52struct keywest_iface
53{
54 struct device_node *node;
55 void __iomem * base;
56 unsigned bsteps;
57 int irq;
58 spinlock_t lock;
59 struct keywest_chan *channels;
60 unsigned chan_count;
61 u8 cur_mode;
62 char read_write;
63 u8 *data;
64 unsigned datalen;
65 int state;
66 int result;
67 struct timer_list timeout_timer;
68 struct completion complete;
69};
70
71enum {
72 state_idle,
73 state_addr,
74 state_read,
75 state_write,
76 state_stop,
77 state_dead
78};
79
80/* Channel on an interface */
81struct keywest_chan
82{
83 struct i2c_adapter adapter;
84 struct keywest_iface* iface;
85 unsigned chan_no;
86};
87
88/* Register access */
89
90static inline u8 __read_reg(struct keywest_iface *iface, reg_t reg)
91{
92 return in_8(iface->base
93 + (((unsigned)reg) << iface->bsteps));
94}
95
96static inline void __write_reg(struct keywest_iface *iface, reg_t reg, u8 val)
97{
98 out_8(iface->base
99 + (((unsigned)reg) << iface->bsteps), val);
100 (void)__read_reg(iface, reg_subaddr);
101}
102
103#define write_reg(reg, val) __write_reg(iface, reg, val)
104#define read_reg(reg) __read_reg(iface, reg)
105
106
107
108#endif /* __I2C_KEYWEST_H__ */
diff --git a/drivers/i2c/busses/i2c-pmac-smu.c b/drivers/i2c/busses/i2c-pmac-smu.c
deleted file mode 100644
index 7d925be3fd4b..000000000000
--- a/drivers/i2c/busses/i2c-pmac-smu.c
+++ /dev/null
@@ -1,324 +0,0 @@
1/*
2 i2c Support for Apple SMU Controller
3
4 Copyright (c) 2005 Benjamin Herrenschmidt, IBM Corp.
5 <benh@kernel.crashing.org>
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20
21*/
22
23#include <linux/config.h>
24#include <linux/module.h>
25#include <linux/kernel.h>
26#include <linux/types.h>
27#include <linux/i2c.h>
28#include <linux/init.h>
29#include <linux/completion.h>
30#include <linux/device.h>
31#include <asm/prom.h>
32#include <asm/of_device.h>
33#include <asm/smu.h>
34
35static int probe;
36
37MODULE_AUTHOR("Benjamin Herrenschmidt <benh@kernel.crashing.org>");
38MODULE_DESCRIPTION("I2C driver for Apple's SMU");
39MODULE_LICENSE("GPL");
40module_param(probe, bool, 0);
41
42
43/* Physical interface */
44struct smu_iface
45{
46 struct i2c_adapter adapter;
47 struct completion complete;
48 u32 busid;
49};
50
51static void smu_i2c_done(struct smu_i2c_cmd *cmd, void *misc)
52{
53 struct smu_iface *iface = misc;
54 complete(&iface->complete);
55}
56
57/*
58 * SMBUS-type transfer entrypoint
59 */
60static s32 smu_smbus_xfer( struct i2c_adapter* adap,
61 u16 addr,
62 unsigned short flags,
63 char read_write,
64 u8 command,
65 int size,
66 union i2c_smbus_data* data)
67{
68 struct smu_iface *iface = i2c_get_adapdata(adap);
69 struct smu_i2c_cmd cmd;
70 int rc = 0;
71 int read = (read_write == I2C_SMBUS_READ);
72
73 cmd.info.bus = iface->busid;
74 cmd.info.devaddr = (addr << 1) | (read ? 0x01 : 0x00);
75
76 /* Prepare datas & select mode */
77 switch (size) {
78 case I2C_SMBUS_QUICK:
79 cmd.info.type = SMU_I2C_TRANSFER_SIMPLE;
80 cmd.info.datalen = 0;
81 break;
82 case I2C_SMBUS_BYTE:
83 cmd.info.type = SMU_I2C_TRANSFER_SIMPLE;
84 cmd.info.datalen = 1;
85 if (!read)
86 cmd.info.data[0] = data->byte;
87 break;
88 case I2C_SMBUS_BYTE_DATA:
89 cmd.info.type = SMU_I2C_TRANSFER_STDSUB;
90 cmd.info.datalen = 1;
91 cmd.info.sublen = 1;
92 cmd.info.subaddr[0] = command;
93 cmd.info.subaddr[1] = 0;
94 cmd.info.subaddr[2] = 0;
95 if (!read)
96 cmd.info.data[0] = data->byte;
97 break;
98 case I2C_SMBUS_WORD_DATA:
99 cmd.info.type = SMU_I2C_TRANSFER_STDSUB;
100 cmd.info.datalen = 2;
101 cmd.info.sublen = 1;
102 cmd.info.subaddr[0] = command;
103 cmd.info.subaddr[1] = 0;
104 cmd.info.subaddr[2] = 0;
105 if (!read) {
106 cmd.info.data[0] = data->word & 0xff;
107 cmd.info.data[1] = (data->word >> 8) & 0xff;
108 }
109 break;
110 /* Note that these are broken vs. the expected smbus API where
111 * on reads, the lenght is actually returned from the function,
112 * but I think the current API makes no sense and I don't want
113 * any driver that I haven't verified for correctness to go
114 * anywhere near a pmac i2c bus anyway ...
115 */
116 case I2C_SMBUS_BLOCK_DATA:
117 cmd.info.type = SMU_I2C_TRANSFER_STDSUB;
118 cmd.info.datalen = data->block[0] + 1;
119 if (cmd.info.datalen > (SMU_I2C_WRITE_MAX + 1))
120 return -EINVAL;
121 if (!read)
122 memcpy(cmd.info.data, data->block, cmd.info.datalen);
123 cmd.info.sublen = 1;
124 cmd.info.subaddr[0] = command;
125 cmd.info.subaddr[1] = 0;
126 cmd.info.subaddr[2] = 0;
127 break;
128 case I2C_SMBUS_I2C_BLOCK_DATA:
129 cmd.info.type = SMU_I2C_TRANSFER_STDSUB;
130 cmd.info.datalen = data->block[0];
131 if (cmd.info.datalen > 7)
132 return -EINVAL;
133 if (!read)
134 memcpy(cmd.info.data, &data->block[1],
135 cmd.info.datalen);
136 cmd.info.sublen = 1;
137 cmd.info.subaddr[0] = command;
138 cmd.info.subaddr[1] = 0;
139 cmd.info.subaddr[2] = 0;
140 break;
141
142 default:
143 return -EINVAL;
144 }
145
146 /* Turn a standardsub read into a combined mode access */
147 if (read_write == I2C_SMBUS_READ &&
148 cmd.info.type == SMU_I2C_TRANSFER_STDSUB)
149 cmd.info.type = SMU_I2C_TRANSFER_COMBINED;
150
151 /* Finish filling command and submit it */
152 cmd.done = smu_i2c_done;
153 cmd.misc = iface;
154 rc = smu_queue_i2c(&cmd);
155 if (rc < 0)
156 return rc;
157 wait_for_completion(&iface->complete);
158 rc = cmd.status;
159
160 if (!read || rc < 0)
161 return rc;
162
163 switch (size) {
164 case I2C_SMBUS_BYTE:
165 case I2C_SMBUS_BYTE_DATA:
166 data->byte = cmd.info.data[0];
167 break;
168 case I2C_SMBUS_WORD_DATA:
169 data->word = ((u16)cmd.info.data[1]) << 8;
170 data->word |= cmd.info.data[0];
171 break;
172 /* Note that these are broken vs. the expected smbus API where
173 * on reads, the lenght is actually returned from the function,
174 * but I think the current API makes no sense and I don't want
175 * any driver that I haven't verified for correctness to go
176 * anywhere near a pmac i2c bus anyway ...
177 */
178 case I2C_SMBUS_BLOCK_DATA:
179 case I2C_SMBUS_I2C_BLOCK_DATA:
180 memcpy(&data->block[0], cmd.info.data, cmd.info.datalen);
181 break;
182 }
183
184 return rc;
185}
186
187static u32
188smu_smbus_func(struct i2c_adapter * adapter)
189{
190 return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE |
191 I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA |
192 I2C_FUNC_SMBUS_BLOCK_DATA;
193}
194
195/* For now, we only handle combined mode (smbus) */
196static struct i2c_algorithm smu_algorithm = {
197 .smbus_xfer = smu_smbus_xfer,
198 .functionality = smu_smbus_func,
199};
200
201static int create_iface(struct device_node *np, struct device *dev)
202{
203 struct smu_iface* iface;
204 u32 *reg, busid;
205 int rc;
206
207 reg = (u32 *)get_property(np, "reg", NULL);
208 if (reg == NULL) {
209 printk(KERN_ERR "i2c-pmac-smu: can't find bus number !\n");
210 return -ENXIO;
211 }
212 busid = *reg;
213
214 iface = kzalloc(sizeof(struct smu_iface), GFP_KERNEL);
215 if (iface == NULL) {
216 printk(KERN_ERR "i2c-pmac-smu: can't allocate inteface !\n");
217 return -ENOMEM;
218 }
219 init_completion(&iface->complete);
220 iface->busid = busid;
221
222 dev_set_drvdata(dev, iface);
223
224 sprintf(iface->adapter.name, "smu-i2c-%02x", busid);
225 iface->adapter.algo = &smu_algorithm;
226 iface->adapter.algo_data = NULL;
227 iface->adapter.client_register = NULL;
228 iface->adapter.client_unregister = NULL;
229 i2c_set_adapdata(&iface->adapter, iface);
230 iface->adapter.dev.parent = dev;
231
232 rc = i2c_add_adapter(&iface->adapter);
233 if (rc) {
234 printk(KERN_ERR "i2c-pamc-smu.c: Adapter %s registration "
235 "failed\n", iface->adapter.name);
236 i2c_set_adapdata(&iface->adapter, NULL);
237 }
238
239 if (probe) {
240 unsigned char addr;
241 printk("Probe: ");
242 for (addr = 0x00; addr <= 0x7f; addr++) {
243 if (i2c_smbus_xfer(&iface->adapter,addr,
244 0,0,0,I2C_SMBUS_QUICK,NULL) >= 0)
245 printk("%02x ", addr);
246 }
247 printk("\n");
248 }
249
250 printk(KERN_INFO "SMU i2c bus %x registered\n", busid);
251
252 return 0;
253}
254
255static int dispose_iface(struct device *dev)
256{
257 struct smu_iface *iface = dev_get_drvdata(dev);
258 int rc;
259
260 rc = i2c_del_adapter(&iface->adapter);
261 i2c_set_adapdata(&iface->adapter, NULL);
262 /* We aren't that prepared to deal with this... */
263 if (rc)
264 printk("i2c-pmac-smu.c: Failed to remove bus %s !\n",
265 iface->adapter.name);
266 dev_set_drvdata(dev, NULL);
267 kfree(iface);
268
269 return 0;
270}
271
272
273static int create_iface_of_platform(struct of_device* dev,
274 const struct of_device_id *match)
275{
276 struct device_node *node = dev->node;
277
278 if (device_is_compatible(node, "smu-i2c") ||
279 (node->parent != NULL &&
280 device_is_compatible(node->parent, "smu-i2c-control")))
281 return create_iface(node, &dev->dev);
282 return -ENODEV;
283}
284
285
286static int dispose_iface_of_platform(struct of_device* dev)
287{
288 return dispose_iface(&dev->dev);
289}
290
291
292static struct of_device_id i2c_smu_match[] =
293{
294 {
295 .compatible = "smu-i2c",
296 },
297 {
298 .compatible = "i2c-bus",
299 },
300 {},
301};
302static struct of_platform_driver i2c_smu_of_platform_driver =
303{
304 .name = "i2c-smu",
305 .match_table = i2c_smu_match,
306 .probe = create_iface_of_platform,
307 .remove = dispose_iface_of_platform
308};
309
310
311static int __init i2c_pmac_smu_init(void)
312{
313 of_register_driver(&i2c_smu_of_platform_driver);
314 return 0;
315}
316
317
318static void __exit i2c_pmac_smu_cleanup(void)
319{
320 of_unregister_driver(&i2c_smu_of_platform_driver);
321}
322
323module_init(i2c_pmac_smu_init);
324module_exit(i2c_pmac_smu_cleanup);
diff --git a/drivers/i2c/busses/i2c-powermac.c b/drivers/i2c/busses/i2c-powermac.c
new file mode 100644
index 000000000000..df786eb55295
--- /dev/null
+++ b/drivers/i2c/busses/i2c-powermac.c
@@ -0,0 +1,290 @@
1/*
2 i2c Support for Apple SMU Controller
3
4 Copyright (c) 2005 Benjamin Herrenschmidt, IBM Corp.
5 <benh@kernel.crashing.org>
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20
21*/
22
23#include <linux/config.h>
24#include <linux/module.h>
25#include <linux/kernel.h>
26#include <linux/types.h>
27#include <linux/i2c.h>
28#include <linux/init.h>
29#include <linux/completion.h>
30#include <linux/device.h>
31#include <linux/platform_device.h>
32#include <asm/prom.h>
33#include <asm/pmac_low_i2c.h>
34
35MODULE_AUTHOR("Benjamin Herrenschmidt <benh@kernel.crashing.org>");
36MODULE_DESCRIPTION("I2C driver for Apple PowerMac");
37MODULE_LICENSE("GPL");
38
39/*
40 * SMBUS-type transfer entrypoint
41 */
42static s32 i2c_powermac_smbus_xfer( struct i2c_adapter* adap,
43 u16 addr,
44 unsigned short flags,
45 char read_write,
46 u8 command,
47 int size,
48 union i2c_smbus_data* data)
49{
50 struct pmac_i2c_bus *bus = i2c_get_adapdata(adap);
51 int rc = 0;
52 int read = (read_write == I2C_SMBUS_READ);
53 int addrdir = (addr << 1) | read;
54 u8 local[2];
55
56 rc = pmac_i2c_open(bus, 0);
57 if (rc)
58 return rc;
59
60 switch (size) {
61 case I2C_SMBUS_QUICK:
62 rc = pmac_i2c_setmode(bus, pmac_i2c_mode_std);
63 if (rc)
64 goto bail;
65 rc = pmac_i2c_xfer(bus, addrdir, 0, 0, NULL, 0);
66 break;
67 case I2C_SMBUS_BYTE:
68 rc = pmac_i2c_setmode(bus, pmac_i2c_mode_std);
69 if (rc)
70 goto bail;
71 rc = pmac_i2c_xfer(bus, addrdir, 0, 0, &data->byte, 1);
72 break;
73 case I2C_SMBUS_BYTE_DATA:
74 rc = pmac_i2c_setmode(bus, read ?
75 pmac_i2c_mode_combined :
76 pmac_i2c_mode_stdsub);
77 if (rc)
78 goto bail;
79 rc = pmac_i2c_xfer(bus, addrdir, 1, command, &data->byte, 1);
80 break;
81 case I2C_SMBUS_WORD_DATA:
82 rc = pmac_i2c_setmode(bus, read ?
83 pmac_i2c_mode_combined :
84 pmac_i2c_mode_stdsub);
85 if (rc)
86 goto bail;
87 if (!read) {
88 local[0] = data->word & 0xff;
89 local[1] = (data->word >> 8) & 0xff;
90 }
91 rc = pmac_i2c_xfer(bus, addrdir, 1, command, local, 2);
92 if (rc == 0 && read) {
93 data->word = ((u16)local[1]) << 8;
94 data->word |= local[0];
95 }
96 break;
97
98 /* Note that these are broken vs. the expected smbus API where
99 * on reads, the lenght is actually returned from the function,
100 * but I think the current API makes no sense and I don't want
101 * any driver that I haven't verified for correctness to go
102 * anywhere near a pmac i2c bus anyway ...
103 *
104 * I'm also not completely sure what kind of phases to do between
105 * the actual command and the data (what I am _supposed_ to do that
106 * is). For now, I assume writes are a single stream and reads have
107 * a repeat start/addr phase (but not stop in between)
108 */
109 case I2C_SMBUS_BLOCK_DATA:
110 rc = pmac_i2c_setmode(bus, read ?
111 pmac_i2c_mode_combined :
112 pmac_i2c_mode_stdsub);
113 if (rc)
114 goto bail;
115 rc = pmac_i2c_xfer(bus, addrdir, 1, command, data->block,
116 data->block[0] + 1);
117
118 break;
119 case I2C_SMBUS_I2C_BLOCK_DATA:
120 rc = pmac_i2c_setmode(bus, read ?
121 pmac_i2c_mode_combined :
122 pmac_i2c_mode_stdsub);
123 if (rc)
124 goto bail;
125 rc = pmac_i2c_xfer(bus, addrdir, 1, command,
126 read ? data->block : &data->block[1],
127 data->block[0]);
128 break;
129
130 default:
131 rc = -EINVAL;
132 }
133 bail:
134 pmac_i2c_close(bus);
135 return rc;
136}
137
138/*
139 * Generic i2c master transfer entrypoint. This driver only support single
140 * messages (for "lame i2c" transfers). Anything else should use the smbus
141 * entry point
142 */
143static int i2c_powermac_master_xfer( struct i2c_adapter *adap,
144 struct i2c_msg *msgs,
145 int num)
146{
147 struct pmac_i2c_bus *bus = i2c_get_adapdata(adap);
148 int rc = 0;
149 int read;
150 int addrdir;
151
152 if (num != 1)
153 return -EINVAL;
154 if (msgs->flags & I2C_M_TEN)
155 return -EINVAL;
156 read = (msgs->flags & I2C_M_RD) != 0;
157 addrdir = (msgs->addr << 1) | read;
158 if (msgs->flags & I2C_M_REV_DIR_ADDR)
159 addrdir ^= 1;
160
161 rc = pmac_i2c_open(bus, 0);
162 if (rc)
163 return rc;
164 rc = pmac_i2c_setmode(bus, pmac_i2c_mode_std);
165 if (rc)
166 goto bail;
167 rc = pmac_i2c_xfer(bus, addrdir, 0, 0, msgs->buf, msgs->len);
168 bail:
169 pmac_i2c_close(bus);
170 return rc < 0 ? rc : msgs->len;
171}
172
173static u32 i2c_powermac_func(struct i2c_adapter * adapter)
174{
175 return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE |
176 I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA |
177 I2C_FUNC_SMBUS_BLOCK_DATA | I2C_FUNC_I2C;
178}
179
180/* For now, we only handle smbus */
181static struct i2c_algorithm i2c_powermac_algorithm = {
182 .smbus_xfer = i2c_powermac_smbus_xfer,
183 .master_xfer = i2c_powermac_master_xfer,
184 .functionality = i2c_powermac_func,
185};
186
187
188static int i2c_powermac_remove(struct device *dev)
189{
190 struct i2c_adapter *adapter = dev_get_drvdata(dev);
191 struct pmac_i2c_bus *bus = i2c_get_adapdata(adapter);
192 int rc;
193
194 rc = i2c_del_adapter(adapter);
195 pmac_i2c_detach_adapter(bus, adapter);
196 i2c_set_adapdata(adapter, NULL);
197 /* We aren't that prepared to deal with this... */
198 if (rc)
199 printk("i2c-powermac.c: Failed to remove bus %s !\n",
200 adapter->name);
201 dev_set_drvdata(dev, NULL);
202 kfree(adapter);
203
204 return 0;
205}
206
207
208static int i2c_powermac_probe(struct device *dev)
209{
210 struct pmac_i2c_bus *bus = dev->platform_data;
211 struct device_node *parent = NULL;
212 struct i2c_adapter *adapter;
213 char name[32], *basename;
214 int rc;
215
216 if (bus == NULL)
217 return -EINVAL;
218
219 /* Ok, now we need to make up a name for the interface that will
220 * match what we used to do in the past, that is basically the
221 * controller's parent device node for keywest. PMU didn't have a
222 * naming convention and SMU has a different one
223 */
224 switch(pmac_i2c_get_type(bus)) {
225 case pmac_i2c_bus_keywest:
226 parent = of_get_parent(pmac_i2c_get_controller(bus));
227 if (parent == NULL)
228 return -EINVAL;
229 basename = parent->name;
230 break;
231 case pmac_i2c_bus_pmu:
232 basename = "pmu";
233 break;
234 case pmac_i2c_bus_smu:
235 /* This is not what we used to do but I'm fixing drivers at
236 * the same time as this change
237 */
238 basename = "smu";
239 break;
240 default:
241 return -EINVAL;
242 }
243 snprintf(name, 32, "%s %d", basename, pmac_i2c_get_channel(bus));
244 of_node_put(parent);
245
246 adapter = kzalloc(sizeof(struct i2c_adapter), GFP_KERNEL);
247 if (adapter == NULL) {
248 printk(KERN_ERR "i2c-powermac: can't allocate inteface !\n");
249 return -ENOMEM;
250 }
251 dev_set_drvdata(dev, adapter);
252 strcpy(adapter->name, name);
253 adapter->algo = &i2c_powermac_algorithm;
254 i2c_set_adapdata(adapter, bus);
255 adapter->dev.parent = dev;
256 pmac_i2c_attach_adapter(bus, adapter);
257 rc = i2c_add_adapter(adapter);
258 if (rc) {
259 printk(KERN_ERR "i2c-powermac: Adapter %s registration "
260 "failed\n", name);
261 i2c_set_adapdata(adapter, NULL);
262 pmac_i2c_detach_adapter(bus, adapter);
263 }
264
265 printk(KERN_INFO "PowerMac i2c bus %s registered\n", name);
266 return rc;
267}
268
269
270static struct device_driver i2c_powermac_driver = {
271 .name = "i2c-powermac",
272 .bus = &platform_bus_type,
273 .probe = i2c_powermac_probe,
274 .remove = i2c_powermac_remove,
275};
276
277static int __init i2c_powermac_init(void)
278{
279 driver_register(&i2c_powermac_driver);
280 return 0;
281}
282
283
284static void __exit i2c_powermac_cleanup(void)
285{
286 driver_unregister(&i2c_powermac_driver);
287}
288
289module_init(i2c_powermac_init);
290module_exit(i2c_powermac_cleanup);
diff --git a/drivers/macintosh/Kconfig b/drivers/macintosh/Kconfig
index a0ea44c3e8b1..7d4a0ac28c06 100644
--- a/drivers/macintosh/Kconfig
+++ b/drivers/macintosh/Kconfig
@@ -149,14 +149,14 @@ config MAC_EMUMOUSEBTN
149 149
150config THERM_WINDTUNNEL 150config THERM_WINDTUNNEL
151 tristate "Support for thermal management on Windtunnel G4s" 151 tristate "Support for thermal management on Windtunnel G4s"
152 depends on I2C && I2C_KEYWEST && PPC_PMAC && !PPC_PMAC64 152 depends on I2C && I2C_POWERMAC && PPC_PMAC && !PPC_PMAC64
153 help 153 help
154 This driver provides some thermostat and fan control for the desktop 154 This driver provides some thermostat and fan control for the desktop
155 G4 "Windtunnel" 155 G4 "Windtunnel"
156 156
157config THERM_ADT746X 157config THERM_ADT746X
158 tristate "Support for thermal mgmnt on laptops with ADT 746x chipset" 158 tristate "Support for thermal mgmnt on laptops with ADT 746x chipset"
159 depends on I2C && I2C_KEYWEST && PPC_PMAC && !PPC_PMAC64 159 depends on I2C && I2C_POWERMAC && PPC_PMAC && !PPC_PMAC64
160 help 160 help
161 This driver provides some thermostat and fan control for the 161 This driver provides some thermostat and fan control for the
162 iBook G4, and the ATI based aluminium PowerBooks, allowing slighlty 162 iBook G4, and the ATI based aluminium PowerBooks, allowing slighlty
@@ -164,7 +164,7 @@ config THERM_ADT746X
164 164
165config THERM_PM72 165config THERM_PM72
166 tristate "Support for thermal management on PowerMac G5" 166 tristate "Support for thermal management on PowerMac G5"
167 depends on I2C && I2C_KEYWEST && PPC_PMAC64 167 depends on I2C && I2C_POWERMAC && PPC_PMAC64
168 help 168 help
169 This driver provides thermostat and fan control for the desktop 169 This driver provides thermostat and fan control for the desktop
170 G5 machines. 170 G5 machines.
@@ -175,14 +175,14 @@ config WINDFARM
175config WINDFARM_PM81 175config WINDFARM_PM81
176 tristate "Support for thermal management on iMac G5" 176 tristate "Support for thermal management on iMac G5"
177 depends on WINDFARM && I2C && CPU_FREQ_PMAC64 && PMAC_SMU 177 depends on WINDFARM && I2C && CPU_FREQ_PMAC64 && PMAC_SMU
178 select I2C_PMAC_SMU 178 select I2C_POWERMAC
179 help 179 help
180 This driver provides thermal control for the iMacG5 180 This driver provides thermal control for the iMacG5
181 181
182config WINDFARM_PM91 182config WINDFARM_PM91
183 tristate "Support for thermal management on PowerMac9,1" 183 tristate "Support for thermal management on PowerMac9,1"
184 depends on WINDFARM && I2C && CPU_FREQ_PMAC64 && PMAC_SMU 184 depends on WINDFARM && I2C && CPU_FREQ_PMAC64 && PMAC_SMU
185 select I2C_PMAC_SMU 185 select I2C_POWERMAC
186 help 186 help
187 This driver provides thermal control for the PowerMac9,1 187 This driver provides thermal control for the PowerMac9,1
188 which is the recent (SMU based) single CPU desktop G5 188 which is the recent (SMU based) single CPU desktop G5
diff --git a/drivers/macintosh/smu.c b/drivers/macintosh/smu.c
index 9ecd76849e35..db2ae71d07ef 100644
--- a/drivers/macintosh/smu.c
+++ b/drivers/macintosh/smu.c
@@ -584,34 +584,14 @@ core_initcall(smu_late_init);
584 * sysfs visibility 584 * sysfs visibility
585 */ 585 */
586 586
587static void smu_create_i2c(struct device_node *np)
588{
589 char name[32];
590 u32 *reg = (u32 *)get_property(np, "reg", NULL);
591
592 if (reg != NULL) {
593 sprintf(name, "smu-i2c-%02x", *reg);
594 of_platform_device_create(np, name, &smu->of_dev->dev);
595 }
596}
597
598static void smu_expose_childs(void *unused) 587static void smu_expose_childs(void *unused)
599{ 588{
600 struct device_node *np, *gp; 589 struct device_node *np;
601 590
602 for (np = NULL; (np = of_get_next_child(smu->of_node, np)) != NULL;) { 591 for (np = NULL; (np = of_get_next_child(smu->of_node, np)) != NULL;)
603 if (device_is_compatible(np, "smu-i2c-control")) {
604 gp = NULL;
605 while ((gp = of_get_next_child(np, gp)) != NULL)
606 if (device_is_compatible(gp, "i2c-bus"))
607 smu_create_i2c(gp);
608 } else if (device_is_compatible(np, "smu-i2c"))
609 smu_create_i2c(np);
610 if (device_is_compatible(np, "smu-sensors")) 592 if (device_is_compatible(np, "smu-sensors"))
611 of_platform_device_create(np, "smu-sensors", 593 of_platform_device_create(np, "smu-sensors",
612 &smu->of_dev->dev); 594 &smu->of_dev->dev);
613 }
614
615} 595}
616 596
617static DECLARE_WORK(smu_expose_childs_work, smu_expose_childs, NULL); 597static DECLARE_WORK(smu_expose_childs_work, smu_expose_childs, NULL);
diff --git a/drivers/macintosh/windfarm_lm75_sensor.c b/drivers/macintosh/windfarm_lm75_sensor.c
index 57460e46c89f..906d3ecae6e6 100644
--- a/drivers/macintosh/windfarm_lm75_sensor.c
+++ b/drivers/macintosh/windfarm_lm75_sensor.c
@@ -21,6 +21,7 @@
21#include <asm/io.h> 21#include <asm/io.h>
22#include <asm/system.h> 22#include <asm/system.h>
23#include <asm/sections.h> 23#include <asm/sections.h>
24#include <asm/pmac_low_i2c.h>
24 25
25#include "windfarm.h" 26#include "windfarm.h"
26 27
@@ -157,53 +158,21 @@ static struct wf_lm75_sensor *wf_lm75_create(struct i2c_adapter *adapter,
157 158
158static int wf_lm75_attach(struct i2c_adapter *adapter) 159static int wf_lm75_attach(struct i2c_adapter *adapter)
159{ 160{
160 u8 bus_id; 161 struct device_node *busnode, *dev;
161 struct device_node *smu, *bus, *dev; 162 struct pmac_i2c_bus *bus;
162
163 /* We currently only deal with LM75's hanging off the SMU
164 * i2c busses. If we extend that driver to other/older
165 * machines, we should split this function into SMU-i2c,
166 * keywest-i2c, PMU-i2c, ...
167 */
168 163
169 DBG("wf_lm75: adapter %s detected\n", adapter->name); 164 DBG("wf_lm75: adapter %s detected\n", adapter->name);
170 165
171 if (strncmp(adapter->name, "smu-i2c-", 8) != 0) 166 bus = pmac_i2c_adapter_to_bus(adapter);
172 return 0; 167 if (bus == NULL)
173 smu = of_find_node_by_type(NULL, "smu"); 168 return -ENODEV;
174 if (smu == NULL) 169 busnode = pmac_i2c_get_bus_node(bus);
175 return 0;
176
177 /* Look for the bus in the device-tree */
178 bus_id = (u8)simple_strtoul(adapter->name + 8, NULL, 16);
179
180 DBG("wf_lm75: bus ID is %x\n", bus_id);
181
182 /* Look for sensors subdir */
183 for (bus = NULL;
184 (bus = of_get_next_child(smu, bus)) != NULL;) {
185 u32 *reg;
186
187 if (strcmp(bus->name, "i2c"))
188 continue;
189 reg = (u32 *)get_property(bus, "reg", NULL);
190 if (reg == NULL)
191 continue;
192 if (bus_id == *reg)
193 break;
194 }
195 of_node_put(smu);
196 if (bus == NULL) {
197 printk(KERN_WARNING "windfarm: SMU i2c bus 0x%x not found"
198 " in device-tree !\n", bus_id);
199 return 0;
200 }
201 170
202 DBG("wf_lm75: bus found, looking for device...\n"); 171 DBG("wf_lm75: bus found, looking for device...\n");
203 172
204 /* Now look for lm75(s) in there */ 173 /* Now look for lm75(s) in there */
205 for (dev = NULL; 174 for (dev = NULL;
206 (dev = of_get_next_child(bus, dev)) != NULL;) { 175 (dev = of_get_next_child(busnode, dev)) != NULL;) {
207 const char *loc = 176 const char *loc =
208 get_property(dev, "hwsensor-location", NULL); 177 get_property(dev, "hwsensor-location", NULL);
209 u32 *reg = (u32 *)get_property(dev, "reg", NULL); 178 u32 *reg = (u32 *)get_property(dev, "reg", NULL);
@@ -217,9 +186,6 @@ static int wf_lm75_attach(struct i2c_adapter *adapter)
217 else if (device_is_compatible(dev, "ds1775")) 186 else if (device_is_compatible(dev, "ds1775"))
218 wf_lm75_create(adapter, *reg, 1, loc); 187 wf_lm75_create(adapter, *reg, 1, loc);
219 } 188 }
220
221 of_node_put(bus);
222
223 return 0; 189 return 0;
224} 190}
225 191
diff --git a/include/asm-powerpc/pmac_low_i2c.h b/include/asm-powerpc/pmac_low_i2c.h
index adf4fa956572..480018f41e1a 100644
--- a/include/asm-powerpc/pmac_low_i2c.h
+++ b/include/asm-powerpc/pmac_low_i2c.h
@@ -70,6 +70,7 @@ extern struct device_node *pmac_i2c_get_controller(struct pmac_i2c_bus *bus);
70extern struct device_node *pmac_i2c_get_bus_node(struct pmac_i2c_bus *bus); 70extern struct device_node *pmac_i2c_get_bus_node(struct pmac_i2c_bus *bus);
71extern int pmac_i2c_get_type(struct pmac_i2c_bus *bus); 71extern int pmac_i2c_get_type(struct pmac_i2c_bus *bus);
72extern int pmac_i2c_get_flags(struct pmac_i2c_bus *bus); 72extern int pmac_i2c_get_flags(struct pmac_i2c_bus *bus);
73extern int pmac_i2c_get_channel(struct pmac_i2c_bus *bus);
73 74
74/* i2c layer adapter attach/detach */ 75/* i2c layer adapter attach/detach */
75extern void pmac_i2c_attach_adapter(struct pmac_i2c_bus *bus, 76extern void pmac_i2c_attach_adapter(struct pmac_i2c_bus *bus,
@@ -77,6 +78,7 @@ extern void pmac_i2c_attach_adapter(struct pmac_i2c_bus *bus,
77extern void pmac_i2c_detach_adapter(struct pmac_i2c_bus *bus, 78extern void pmac_i2c_detach_adapter(struct pmac_i2c_bus *bus,
78 struct i2c_adapter *adapter); 79 struct i2c_adapter *adapter);
79extern struct i2c_adapter *pmac_i2c_get_adapter(struct pmac_i2c_bus *bus); 80extern struct i2c_adapter *pmac_i2c_get_adapter(struct pmac_i2c_bus *bus);
81extern struct pmac_i2c_bus *pmac_i2c_adapter_to_bus(struct i2c_adapter *adapter);
80 82
81/* March a device or bus with an i2c adapter structure, to be used by drivers 83/* March a device or bus with an i2c adapter structure, to be used by drivers
82 * to match device-tree nodes with i2c adapters during adapter discovery 84 * to match device-tree nodes with i2c adapters during adapter discovery
generated by cgit v1.2.2 (git 2.25.0) at 2025-10-26 18:20:44 -0400