diff options
41 files changed, 1595 insertions, 2096 deletions
diff --git a/arch/sparc/defconfig b/arch/sparc/defconfig index fdc67238408a..f7a509149199 100644 --- a/arch/sparc/defconfig +++ b/arch/sparc/defconfig | |||
| @@ -1,12 +1,14 @@ | |||
| 1 | # | 1 | # |
| 2 | # Automatically generated make config: don't edit | 2 | # Automatically generated make config: don't edit |
| 3 | # Linux kernel version: 2.6.22-rc1 | 3 | # Linux kernel version: 2.6.23-rc1 |
| 4 | # Mon May 14 03:25:14 2007 | 4 | # Wed Jul 25 15:30:21 2007 |
| 5 | # | 5 | # |
| 6 | CONFIG_MMU=y | 6 | CONFIG_MMU=y |
| 7 | CONFIG_HIGHMEM=y | 7 | CONFIG_HIGHMEM=y |
| 8 | CONFIG_ZONE_DMA=y | 8 | CONFIG_ZONE_DMA=y |
| 9 | CONFIG_GENERIC_ISA_DMA=y | 9 | CONFIG_GENERIC_ISA_DMA=y |
| 10 | CONFIG_ARCH_NO_VIRT_TO_BUS=y | ||
| 11 | CONFIG_OF=y | ||
| 10 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" | 12 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" |
| 11 | 13 | ||
| 12 | # | 14 | # |
| @@ -23,12 +25,11 @@ CONFIG_LOCALVERSION="" | |||
| 23 | CONFIG_LOCALVERSION_AUTO=y | 25 | CONFIG_LOCALVERSION_AUTO=y |
| 24 | CONFIG_SWAP=y | 26 | CONFIG_SWAP=y |
| 25 | CONFIG_SYSVIPC=y | 27 | CONFIG_SYSVIPC=y |
| 26 | # CONFIG_IPC_NS is not set | ||
| 27 | CONFIG_SYSVIPC_SYSCTL=y | 28 | CONFIG_SYSVIPC_SYSCTL=y |
| 28 | CONFIG_POSIX_MQUEUE=y | 29 | CONFIG_POSIX_MQUEUE=y |
| 29 | # CONFIG_BSD_PROCESS_ACCT is not set | 30 | # CONFIG_BSD_PROCESS_ACCT is not set |
| 30 | # CONFIG_TASKSTATS is not set | 31 | # CONFIG_TASKSTATS is not set |
| 31 | # CONFIG_UTS_NS is not set | 32 | # CONFIG_USER_NS is not set |
| 32 | # CONFIG_AUDIT is not set | 33 | # CONFIG_AUDIT is not set |
| 33 | # CONFIG_IKCONFIG is not set | 34 | # CONFIG_IKCONFIG is not set |
| 34 | CONFIG_LOG_BUF_SHIFT=14 | 35 | CONFIG_LOG_BUF_SHIFT=14 |
| @@ -63,24 +64,17 @@ CONFIG_SLAB=y | |||
| 63 | CONFIG_RT_MUTEXES=y | 64 | CONFIG_RT_MUTEXES=y |
| 64 | # CONFIG_TINY_SHMEM is not set | 65 | # CONFIG_TINY_SHMEM is not set |
| 65 | CONFIG_BASE_SMALL=0 | 66 | CONFIG_BASE_SMALL=0 |
| 66 | |||
| 67 | # | ||
| 68 | # Loadable module support | ||
| 69 | # | ||
| 70 | CONFIG_MODULES=y | 67 | CONFIG_MODULES=y |
| 71 | CONFIG_MODULE_UNLOAD=y | 68 | CONFIG_MODULE_UNLOAD=y |
| 72 | # CONFIG_MODULE_FORCE_UNLOAD is not set | 69 | # CONFIG_MODULE_FORCE_UNLOAD is not set |
| 73 | # CONFIG_MODVERSIONS is not set | 70 | # CONFIG_MODVERSIONS is not set |
| 74 | # CONFIG_MODULE_SRCVERSION_ALL is not set | 71 | # CONFIG_MODULE_SRCVERSION_ALL is not set |
| 75 | CONFIG_KMOD=y | 72 | CONFIG_KMOD=y |
| 76 | |||
| 77 | # | ||
| 78 | # Block layer | ||
| 79 | # | ||
| 80 | CONFIG_BLOCK=y | 73 | CONFIG_BLOCK=y |
| 81 | # CONFIG_LBD is not set | 74 | # CONFIG_LBD is not set |
| 82 | # CONFIG_BLK_DEV_IO_TRACE is not set | 75 | # CONFIG_BLK_DEV_IO_TRACE is not set |
| 83 | # CONFIG_LSF is not set | 76 | # CONFIG_LSF is not set |
| 77 | # CONFIG_BLK_DEV_BSG is not set | ||
| 84 | 78 | ||
| 85 | # | 79 | # |
| 86 | # IO Schedulers | 80 | # IO Schedulers |
| @@ -113,11 +107,14 @@ CONFIG_GENERIC_CALIBRATE_DELAY=y | |||
| 113 | CONFIG_ARCH_MAY_HAVE_PC_FDC=y | 107 | CONFIG_ARCH_MAY_HAVE_PC_FDC=y |
| 114 | # CONFIG_ARCH_HAS_ILOG2_U32 is not set | 108 | # CONFIG_ARCH_HAS_ILOG2_U32 is not set |
| 115 | # CONFIG_ARCH_HAS_ILOG2_U64 is not set | 109 | # CONFIG_ARCH_HAS_ILOG2_U64 is not set |
| 110 | CONFIG_EMULATED_CMPXCHG=y | ||
| 116 | CONFIG_SUN_PM=y | 111 | CONFIG_SUN_PM=y |
| 117 | # CONFIG_SUN4 is not set | 112 | # CONFIG_SUN4 is not set |
| 118 | CONFIG_PCI=y | 113 | CONFIG_PCI=y |
| 114 | CONFIG_PCI_SYSCALL=y | ||
| 119 | # CONFIG_ARCH_SUPPORTS_MSI is not set | 115 | # CONFIG_ARCH_SUPPORTS_MSI is not set |
| 120 | # CONFIG_PCI_DEBUG is not set | 116 | # CONFIG_PCI_DEBUG is not set |
| 117 | # CONFIG_NO_DMA is not set | ||
| 121 | CONFIG_SUN_OPENPROMFS=m | 118 | CONFIG_SUN_OPENPROMFS=m |
| 122 | # CONFIG_SPARC_LED is not set | 119 | # CONFIG_SPARC_LED is not set |
| 123 | CONFIG_BINFMT_ELF=y | 120 | CONFIG_BINFMT_ELF=y |
| @@ -134,6 +131,7 @@ CONFIG_FLAT_NODE_MEM_MAP=y | |||
| 134 | CONFIG_SPLIT_PTLOCK_CPUS=4 | 131 | CONFIG_SPLIT_PTLOCK_CPUS=4 |
| 135 | # CONFIG_RESOURCES_64BIT is not set | 132 | # CONFIG_RESOURCES_64BIT is not set |
| 136 | CONFIG_ZONE_DMA_FLAG=1 | 133 | CONFIG_ZONE_DMA_FLAG=1 |
| 134 | CONFIG_BOUNCE=y | ||
| 137 | 135 | ||
| 138 | # | 136 | # |
| 139 | # Networking | 137 | # Networking |
| @@ -197,25 +195,13 @@ CONFIG_IPV6_TUNNEL=m | |||
| 197 | # CONFIG_IPV6_MULTIPLE_TABLES is not set | 195 | # CONFIG_IPV6_MULTIPLE_TABLES is not set |
| 198 | # CONFIG_NETWORK_SECMARK is not set | 196 | # CONFIG_NETWORK_SECMARK is not set |
| 199 | # CONFIG_NETFILTER is not set | 197 | # CONFIG_NETFILTER is not set |
| 200 | |||
| 201 | # | ||
| 202 | # DCCP Configuration (EXPERIMENTAL) | ||
| 203 | # | ||
| 204 | # CONFIG_IP_DCCP is not set | 198 | # CONFIG_IP_DCCP is not set |
| 205 | |||
| 206 | # | ||
| 207 | # SCTP Configuration (EXPERIMENTAL) | ||
| 208 | # | ||
| 209 | CONFIG_IP_SCTP=m | 199 | CONFIG_IP_SCTP=m |
| 210 | # CONFIG_SCTP_DBG_MSG is not set | 200 | # CONFIG_SCTP_DBG_MSG is not set |
| 211 | CONFIG_SCTP_DBG_OBJCNT=y | 201 | CONFIG_SCTP_DBG_OBJCNT=y |
| 212 | # CONFIG_SCTP_HMAC_NONE is not set | 202 | # CONFIG_SCTP_HMAC_NONE is not set |
| 213 | # CONFIG_SCTP_HMAC_SHA1 is not set | 203 | # CONFIG_SCTP_HMAC_SHA1 is not set |
| 214 | CONFIG_SCTP_HMAC_MD5=y | 204 | CONFIG_SCTP_HMAC_MD5=y |
| 215 | |||
| 216 | # | ||
| 217 | # TIPC Configuration (EXPERIMENTAL) | ||
| 218 | # | ||
| 219 | # CONFIG_TIPC is not set | 205 | # CONFIG_TIPC is not set |
| 220 | # CONFIG_ATM is not set | 206 | # CONFIG_ATM is not set |
| 221 | # CONFIG_BRIDGE is not set | 207 | # CONFIG_BRIDGE is not set |
| @@ -253,6 +239,7 @@ CONFIG_AF_RXRPC=m | |||
| 253 | # CONFIG_MAC80211 is not set | 239 | # CONFIG_MAC80211 is not set |
| 254 | # CONFIG_IEEE80211 is not set | 240 | # CONFIG_IEEE80211 is not set |
| 255 | # CONFIG_RFKILL is not set | 241 | # CONFIG_RFKILL is not set |
| 242 | # CONFIG_NET_9P is not set | ||
| 256 | 243 | ||
| 257 | # | 244 | # |
| 258 | # Device Drivers | 245 | # Device Drivers |
| @@ -267,28 +254,12 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y | |||
| 267 | # CONFIG_DEBUG_DRIVER is not set | 254 | # CONFIG_DEBUG_DRIVER is not set |
| 268 | # CONFIG_DEBUG_DEVRES is not set | 255 | # CONFIG_DEBUG_DEVRES is not set |
| 269 | # CONFIG_SYS_HYPERVISOR is not set | 256 | # CONFIG_SYS_HYPERVISOR is not set |
| 270 | |||
| 271 | # | ||
| 272 | # Connector - unified userspace <-> kernelspace linker | ||
| 273 | # | ||
| 274 | # CONFIG_CONNECTOR is not set | 257 | # CONFIG_CONNECTOR is not set |
| 275 | # CONFIG_MTD is not set | 258 | # CONFIG_MTD is not set |
| 276 | 259 | CONFIG_OF_DEVICE=y | |
| 277 | # | ||
| 278 | # Parallel port support | ||
| 279 | # | ||
| 280 | # CONFIG_PARPORT is not set | 260 | # CONFIG_PARPORT is not set |
| 281 | 261 | CONFIG_BLK_DEV=y | |
| 282 | # | ||
| 283 | # Plug and Play support | ||
| 284 | # | ||
| 285 | # CONFIG_PNPACPI is not set | ||
| 286 | |||
| 287 | # | ||
| 288 | # Block devices | ||
| 289 | # | ||
| 290 | # CONFIG_BLK_DEV_FD is not set | 262 | # CONFIG_BLK_DEV_FD is not set |
| 291 | # CONFIG_BLK_CPQ_DA is not set | ||
| 292 | # CONFIG_BLK_CPQ_CISS_DA is not set | 263 | # CONFIG_BLK_CPQ_CISS_DA is not set |
| 293 | # CONFIG_BLK_DEV_DAC960 is not set | 264 | # CONFIG_BLK_DEV_DAC960 is not set |
| 294 | # CONFIG_BLK_DEV_UMEM is not set | 265 | # CONFIG_BLK_DEV_UMEM is not set |
| @@ -303,18 +274,11 @@ CONFIG_BLK_DEV_RAM_SIZE=4096 | |||
| 303 | CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024 | 274 | CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024 |
| 304 | # CONFIG_CDROM_PKTCDVD is not set | 275 | # CONFIG_CDROM_PKTCDVD is not set |
| 305 | # CONFIG_ATA_OVER_ETH is not set | 276 | # CONFIG_ATA_OVER_ETH is not set |
| 306 | 277 | CONFIG_MISC_DEVICES=y | |
| 307 | # | ||
| 308 | # Misc devices | ||
| 309 | # | ||
| 310 | # CONFIG_PHANTOM is not set | 278 | # CONFIG_PHANTOM is not set |
| 279 | # CONFIG_EEPROM_93CX6 is not set | ||
| 311 | # CONFIG_SGI_IOC4 is not set | 280 | # CONFIG_SGI_IOC4 is not set |
| 312 | # CONFIG_TIFM_CORE is not set | 281 | # CONFIG_TIFM_CORE is not set |
| 313 | # CONFIG_BLINK is not set | ||
| 314 | |||
| 315 | # | ||
| 316 | # ATA/ATAPI/MFM/RLL support | ||
| 317 | # | ||
| 318 | # CONFIG_IDE is not set | 282 | # CONFIG_IDE is not set |
| 319 | 283 | ||
| 320 | # | 284 | # |
| @@ -322,6 +286,7 @@ CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024 | |||
| 322 | # | 286 | # |
| 323 | # CONFIG_RAID_ATTRS is not set | 287 | # CONFIG_RAID_ATTRS is not set |
| 324 | CONFIG_SCSI=y | 288 | CONFIG_SCSI=y |
| 289 | CONFIG_SCSI_DMA=y | ||
| 325 | # CONFIG_SCSI_TGT is not set | 290 | # CONFIG_SCSI_TGT is not set |
| 326 | # CONFIG_SCSI_NETLINK is not set | 291 | # CONFIG_SCSI_NETLINK is not set |
| 327 | CONFIG_SCSI_PROC_FS=y | 292 | CONFIG_SCSI_PROC_FS=y |
| @@ -352,12 +317,8 @@ CONFIG_SCSI_WAIT_SCAN=m | |||
| 352 | CONFIG_SCSI_SPI_ATTRS=y | 317 | CONFIG_SCSI_SPI_ATTRS=y |
| 353 | # CONFIG_SCSI_FC_ATTRS is not set | 318 | # CONFIG_SCSI_FC_ATTRS is not set |
| 354 | # CONFIG_SCSI_ISCSI_ATTRS is not set | 319 | # CONFIG_SCSI_ISCSI_ATTRS is not set |
| 355 | # CONFIG_SCSI_SAS_ATTRS is not set | ||
| 356 | # CONFIG_SCSI_SAS_LIBSAS is not set | 320 | # CONFIG_SCSI_SAS_LIBSAS is not set |
| 357 | 321 | CONFIG_SCSI_LOWLEVEL=y | |
| 358 | # | ||
| 359 | # SCSI low-level drivers | ||
| 360 | # | ||
| 361 | # CONFIG_ISCSI_TCP is not set | 322 | # CONFIG_ISCSI_TCP is not set |
| 362 | # CONFIG_BLK_DEV_3W_XXXX_RAID is not set | 323 | # CONFIG_BLK_DEV_3W_XXXX_RAID is not set |
| 363 | # CONFIG_SCSI_3W_9XXX is not set | 324 | # CONFIG_SCSI_3W_9XXX is not set |
| @@ -367,7 +328,6 @@ CONFIG_SCSI_SPI_ATTRS=y | |||
| 367 | # CONFIG_SCSI_AIC7XXX_OLD is not set | 328 | # CONFIG_SCSI_AIC7XXX_OLD is not set |
| 368 | # CONFIG_SCSI_AIC79XX is not set | 329 | # CONFIG_SCSI_AIC79XX is not set |
| 369 | # CONFIG_SCSI_AIC94XX is not set | 330 | # CONFIG_SCSI_AIC94XX is not set |
| 370 | # CONFIG_SCSI_DPT_I2O is not set | ||
| 371 | # CONFIG_SCSI_ARCMSR is not set | 331 | # CONFIG_SCSI_ARCMSR is not set |
| 372 | # CONFIG_MEGARAID_NEWGEN is not set | 332 | # CONFIG_MEGARAID_NEWGEN is not set |
| 373 | # CONFIG_MEGARAID_LEGACY is not set | 333 | # CONFIG_MEGARAID_LEGACY is not set |
| @@ -389,14 +349,9 @@ CONFIG_SCSI_QLOGICPTI=m | |||
| 389 | # CONFIG_SCSI_DC390T is not set | 349 | # CONFIG_SCSI_DC390T is not set |
| 390 | # CONFIG_SCSI_NSP32 is not set | 350 | # CONFIG_SCSI_NSP32 is not set |
| 391 | # CONFIG_SCSI_DEBUG is not set | 351 | # CONFIG_SCSI_DEBUG is not set |
| 392 | CONFIG_SCSI_ESP_CORE=y | ||
| 393 | CONFIG_SCSI_SUNESP=y | 352 | CONFIG_SCSI_SUNESP=y |
| 394 | # CONFIG_SCSI_SRP is not set | 353 | # CONFIG_SCSI_SRP is not set |
| 395 | # CONFIG_ATA is not set | 354 | # CONFIG_ATA is not set |
| 396 | |||
| 397 | # | ||
| 398 | # Multi-device support (RAID and LVM) | ||
| 399 | # | ||
| 400 | # CONFIG_MD is not set | 355 | # CONFIG_MD is not set |
| 401 | 356 | ||
| 402 | # | 357 | # |
| @@ -412,30 +367,16 @@ CONFIG_SCSI_SUNESP=y | |||
| 412 | # | 367 | # |
| 413 | # CONFIG_FIREWIRE is not set | 368 | # CONFIG_FIREWIRE is not set |
| 414 | # CONFIG_IEEE1394 is not set | 369 | # CONFIG_IEEE1394 is not set |
| 415 | |||
| 416 | # | ||
| 417 | # I2O device support | ||
| 418 | # | ||
| 419 | # CONFIG_I2O is not set | 370 | # CONFIG_I2O is not set |
| 420 | |||
| 421 | # | ||
| 422 | # Network device support | ||
| 423 | # | ||
| 424 | CONFIG_NETDEVICES=y | 371 | CONFIG_NETDEVICES=y |
| 372 | # CONFIG_NETDEVICES_MULTIQUEUE is not set | ||
| 425 | CONFIG_DUMMY=m | 373 | CONFIG_DUMMY=m |
| 426 | # CONFIG_BONDING is not set | 374 | # CONFIG_BONDING is not set |
| 375 | # CONFIG_MACVLAN is not set | ||
| 427 | # CONFIG_EQUALIZER is not set | 376 | # CONFIG_EQUALIZER is not set |
| 428 | CONFIG_TUN=m | 377 | CONFIG_TUN=m |
| 429 | |||
| 430 | # | ||
| 431 | # ARCnet devices | ||
| 432 | # | ||
| 433 | # CONFIG_ARCNET is not set | 378 | # CONFIG_ARCNET is not set |
| 434 | # CONFIG_PHYLIB is not set | 379 | # CONFIG_PHYLIB is not set |
| 435 | |||
| 436 | # | ||
| 437 | # Ethernet (10 or 100Mbit) | ||
| 438 | # | ||
| 439 | CONFIG_NET_ETHERNET=y | 380 | CONFIG_NET_ETHERNET=y |
| 440 | CONFIG_MII=m | 381 | CONFIG_MII=m |
| 441 | CONFIG_SUNLANCE=y | 382 | CONFIG_SUNLANCE=y |
| @@ -445,10 +386,6 @@ CONFIG_SUNQE=m | |||
| 445 | # CONFIG_SUNGEM is not set | 386 | # CONFIG_SUNGEM is not set |
| 446 | # CONFIG_CASSINI is not set | 387 | # CONFIG_CASSINI is not set |
| 447 | # CONFIG_NET_VENDOR_3COM is not set | 388 | # CONFIG_NET_VENDOR_3COM is not set |
| 448 | |||
| 449 | # | ||
| 450 | # Tulip family network device support | ||
| 451 | # | ||
| 452 | # CONFIG_NET_TULIP is not set | 389 | # CONFIG_NET_TULIP is not set |
| 453 | # CONFIG_HP100 is not set | 390 | # CONFIG_HP100 is not set |
| 454 | # CONFIG_NET_PCI is not set | 391 | # CONFIG_NET_PCI is not set |
| @@ -464,7 +401,7 @@ CONFIG_NETDEV_1000=y | |||
| 464 | # CONFIG_SIS190 is not set | 401 | # CONFIG_SIS190 is not set |
| 465 | # CONFIG_SKGE is not set | 402 | # CONFIG_SKGE is not set |
| 466 | # CONFIG_SKY2 is not set | 403 | # CONFIG_SKY2 is not set |
| 467 | # CONFIG_SK98LIN is not set | 404 | # CONFIG_VIA_VELOCITY is not set |
| 468 | # CONFIG_TIGON3 is not set | 405 | # CONFIG_TIGON3 is not set |
| 469 | # CONFIG_BNX2 is not set | 406 | # CONFIG_BNX2 is not set |
| 470 | # CONFIG_QLA3XXX is not set | 407 | # CONFIG_QLA3XXX is not set |
| @@ -477,11 +414,6 @@ CONFIG_NETDEV_10000=y | |||
| 477 | # CONFIG_MYRI10GE is not set | 414 | # CONFIG_MYRI10GE is not set |
| 478 | # CONFIG_NETXEN_NIC is not set | 415 | # CONFIG_NETXEN_NIC is not set |
| 479 | # CONFIG_MLX4_CORE is not set | 416 | # CONFIG_MLX4_CORE is not set |
| 480 | CONFIG_MLX4_DEBUG=y | ||
| 481 | |||
| 482 | # | ||
| 483 | # Token Ring devices | ||
| 484 | # | ||
| 485 | # CONFIG_TR is not set | 417 | # CONFIG_TR is not set |
| 486 | 418 | ||
| 487 | # | 419 | # |
| @@ -499,15 +431,7 @@ CONFIG_MLX4_DEBUG=y | |||
| 499 | # CONFIG_NETCONSOLE is not set | 431 | # CONFIG_NETCONSOLE is not set |
| 500 | # CONFIG_NETPOLL is not set | 432 | # CONFIG_NETPOLL is not set |
| 501 | # CONFIG_NET_POLL_CONTROLLER is not set | 433 | # CONFIG_NET_POLL_CONTROLLER is not set |
| 502 | |||
| 503 | # | ||
| 504 | # ISDN subsystem | ||
| 505 | # | ||
| 506 | # CONFIG_ISDN is not set | 434 | # CONFIG_ISDN is not set |
| 507 | |||
| 508 | # | ||
| 509 | # Telephony Support | ||
| 510 | # | ||
| 511 | # CONFIG_PHONE is not set | 435 | # CONFIG_PHONE is not set |
| 512 | 436 | ||
| 513 | # | 437 | # |
| @@ -515,6 +439,7 @@ CONFIG_MLX4_DEBUG=y | |||
| 515 | # | 439 | # |
| 516 | CONFIG_INPUT=y | 440 | CONFIG_INPUT=y |
| 517 | # CONFIG_INPUT_FF_MEMLESS is not set | 441 | # CONFIG_INPUT_FF_MEMLESS is not set |
| 442 | # CONFIG_INPUT_POLLDEV is not set | ||
| 518 | 443 | ||
| 519 | # | 444 | # |
| 520 | # Userland interfaces | 445 | # Userland interfaces |
| @@ -593,22 +518,13 @@ CONFIG_SERIAL_CORE_CONSOLE=y | |||
| 593 | CONFIG_UNIX98_PTYS=y | 518 | CONFIG_UNIX98_PTYS=y |
| 594 | CONFIG_LEGACY_PTYS=y | 519 | CONFIG_LEGACY_PTYS=y |
| 595 | CONFIG_LEGACY_PTY_COUNT=256 | 520 | CONFIG_LEGACY_PTY_COUNT=256 |
| 596 | |||
| 597 | # | ||
| 598 | # IPMI | ||
| 599 | # | ||
| 600 | # CONFIG_IPMI_HANDLER is not set | 521 | # CONFIG_IPMI_HANDLER is not set |
| 601 | # CONFIG_WATCHDOG is not set | 522 | # CONFIG_WATCHDOG is not set |
| 602 | CONFIG_HW_RANDOM=m | 523 | CONFIG_HW_RANDOM=m |
| 603 | CONFIG_JS_RTC=m | 524 | CONFIG_JS_RTC=m |
| 604 | # CONFIG_R3964 is not set | 525 | # CONFIG_R3964 is not set |
| 605 | # CONFIG_APPLICOM is not set | 526 | # CONFIG_APPLICOM is not set |
| 606 | # CONFIG_DRM is not set | ||
| 607 | # CONFIG_RAW_DRIVER is not set | 527 | # CONFIG_RAW_DRIVER is not set |
| 608 | |||
| 609 | # | ||
| 610 | # TPM devices | ||
| 611 | # | ||
| 612 | # CONFIG_TCG_TPM is not set | 528 | # CONFIG_TCG_TPM is not set |
| 613 | CONFIG_DEVPORT=y | 529 | CONFIG_DEVPORT=y |
| 614 | # CONFIG_I2C is not set | 530 | # CONFIG_I2C is not set |
| @@ -618,20 +534,24 @@ CONFIG_DEVPORT=y | |||
| 618 | # | 534 | # |
| 619 | # CONFIG_SPI is not set | 535 | # CONFIG_SPI is not set |
| 620 | # CONFIG_SPI_MASTER is not set | 536 | # CONFIG_SPI_MASTER is not set |
| 621 | |||
| 622 | # | ||
| 623 | # Dallas's 1-wire bus | ||
| 624 | # | ||
| 625 | # CONFIG_W1 is not set | 537 | # CONFIG_W1 is not set |
| 538 | # CONFIG_POWER_SUPPLY is not set | ||
| 626 | CONFIG_HWMON=y | 539 | CONFIG_HWMON=y |
| 627 | # CONFIG_HWMON_VID is not set | 540 | # CONFIG_HWMON_VID is not set |
| 628 | # CONFIG_SENSORS_ABITUGURU is not set | 541 | # CONFIG_SENSORS_ABITUGURU is not set |
| 542 | # CONFIG_SENSORS_ABITUGURU3 is not set | ||
| 629 | # CONFIG_SENSORS_F71805F is not set | 543 | # CONFIG_SENSORS_F71805F is not set |
| 544 | # CONFIG_SENSORS_IT87 is not set | ||
| 545 | # CONFIG_SENSORS_PC87360 is not set | ||
| 630 | # CONFIG_SENSORS_PC87427 is not set | 546 | # CONFIG_SENSORS_PC87427 is not set |
| 547 | # CONFIG_SENSORS_SIS5595 is not set | ||
| 631 | # CONFIG_SENSORS_SMSC47M1 is not set | 548 | # CONFIG_SENSORS_SMSC47M1 is not set |
| 632 | # CONFIG_SENSORS_SMSC47B397 is not set | 549 | # CONFIG_SENSORS_SMSC47B397 is not set |
| 550 | # CONFIG_SENSORS_VIA686A is not set | ||
| 633 | # CONFIG_SENSORS_VT1211 is not set | 551 | # CONFIG_SENSORS_VT1211 is not set |
| 552 | # CONFIG_SENSORS_VT8231 is not set | ||
| 634 | # CONFIG_SENSORS_W83627HF is not set | 553 | # CONFIG_SENSORS_W83627HF is not set |
| 554 | # CONFIG_SENSORS_W83627EHF is not set | ||
| 635 | # CONFIG_HWMON_DEBUG_CHIP is not set | 555 | # CONFIG_HWMON_DEBUG_CHIP is not set |
| 636 | 556 | ||
| 637 | # | 557 | # |
| @@ -656,6 +576,7 @@ CONFIG_HWMON=y | |||
| 656 | # | 576 | # |
| 657 | # CONFIG_DISPLAY_SUPPORT is not set | 577 | # CONFIG_DISPLAY_SUPPORT is not set |
| 658 | # CONFIG_VGASTATE is not set | 578 | # CONFIG_VGASTATE is not set |
| 579 | # CONFIG_VIDEO_OUTPUT_CONTROL is not set | ||
| 659 | # CONFIG_FB is not set | 580 | # CONFIG_FB is not set |
| 660 | 581 | ||
| 661 | # | 582 | # |
| @@ -668,16 +589,10 @@ CONFIG_DUMMY_CONSOLE=y | |||
| 668 | # Sound | 589 | # Sound |
| 669 | # | 590 | # |
| 670 | # CONFIG_SOUND is not set | 591 | # CONFIG_SOUND is not set |
| 671 | 592 | CONFIG_HID_SUPPORT=y | |
| 672 | # | ||
| 673 | # HID Devices | ||
| 674 | # | ||
| 675 | CONFIG_HID=y | 593 | CONFIG_HID=y |
| 676 | # CONFIG_HID_DEBUG is not set | 594 | # CONFIG_HID_DEBUG is not set |
| 677 | 595 | CONFIG_USB_SUPPORT=y | |
| 678 | # | ||
| 679 | # USB support | ||
| 680 | # | ||
| 681 | CONFIG_USB_ARCH_HAS_HCD=y | 596 | CONFIG_USB_ARCH_HAS_HCD=y |
| 682 | CONFIG_USB_ARCH_HAS_OHCI=y | 597 | CONFIG_USB_ARCH_HAS_OHCI=y |
| 683 | CONFIG_USB_ARCH_HAS_EHCI=y | 598 | CONFIG_USB_ARCH_HAS_EHCI=y |
| @@ -692,30 +607,10 @@ CONFIG_USB_ARCH_HAS_EHCI=y | |||
| 692 | # | 607 | # |
| 693 | # CONFIG_USB_GADGET is not set | 608 | # CONFIG_USB_GADGET is not set |
| 694 | # CONFIG_MMC is not set | 609 | # CONFIG_MMC is not set |
| 695 | |||
| 696 | # | ||
| 697 | # LED devices | ||
| 698 | # | ||
| 699 | # CONFIG_NEW_LEDS is not set | 610 | # CONFIG_NEW_LEDS is not set |
| 700 | |||
| 701 | # | ||
| 702 | # LED drivers | ||
| 703 | # | ||
| 704 | |||
| 705 | # | ||
| 706 | # LED Triggers | ||
| 707 | # | ||
| 708 | |||
| 709 | # | ||
| 710 | # InfiniBand support | ||
| 711 | # | ||
| 712 | # CONFIG_INFINIBAND is not set | 611 | # CONFIG_INFINIBAND is not set |
| 713 | 612 | ||
| 714 | # | 613 | # |
| 715 | # EDAC - error detection and reporting (RAS) (EXPERIMENTAL) | ||
| 716 | # | ||
| 717 | |||
| 718 | # | ||
| 719 | # Real Time Clock | 614 | # Real Time Clock |
| 720 | # | 615 | # |
| 721 | # CONFIG_RTC_CLASS is not set | 616 | # CONFIG_RTC_CLASS is not set |
| @@ -734,6 +629,11 @@ CONFIG_USB_ARCH_HAS_EHCI=y | |||
| 734 | # | 629 | # |
| 735 | 630 | ||
| 736 | # | 631 | # |
| 632 | # Userspace I/O | ||
| 633 | # | ||
| 634 | # CONFIG_UIO is not set | ||
| 635 | |||
| 636 | # | ||
| 737 | # Misc Linux/SPARC drivers | 637 | # Misc Linux/SPARC drivers |
| 738 | # | 638 | # |
| 739 | CONFIG_SUN_OPENPROMIO=m | 639 | CONFIG_SUN_OPENPROMIO=m |
| @@ -853,7 +753,6 @@ CONFIG_CIFS=m | |||
| 853 | # CONFIG_CODA_FS is not set | 753 | # CONFIG_CODA_FS is not set |
| 854 | CONFIG_AFS_FS=m | 754 | CONFIG_AFS_FS=m |
| 855 | # CONFIG_AFS_DEBUG is not set | 755 | # CONFIG_AFS_DEBUG is not set |
| 856 | # CONFIG_9P_FS is not set | ||
| 857 | 756 | ||
| 858 | # | 757 | # |
| 859 | # Partition Types | 758 | # Partition Types |
| @@ -927,6 +826,7 @@ CONFIG_MAGIC_SYSRQ=y | |||
| 927 | # CONFIG_HEADERS_CHECK is not set | 826 | # CONFIG_HEADERS_CHECK is not set |
| 928 | CONFIG_DEBUG_KERNEL=y | 827 | CONFIG_DEBUG_KERNEL=y |
| 929 | CONFIG_DETECT_SOFTLOCKUP=y | 828 | CONFIG_DETECT_SOFTLOCKUP=y |
| 829 | # CONFIG_SCHED_DEBUG is not set | ||
| 930 | # CONFIG_SCHEDSTATS is not set | 830 | # CONFIG_SCHEDSTATS is not set |
| 931 | # CONFIG_TIMER_STATS is not set | 831 | # CONFIG_TIMER_STATS is not set |
| 932 | # CONFIG_DEBUG_SLAB is not set | 832 | # CONFIG_DEBUG_SLAB is not set |
| @@ -953,10 +853,6 @@ CONFIG_FORCED_INLINING=y | |||
| 953 | CONFIG_KEYS=y | 853 | CONFIG_KEYS=y |
| 954 | # CONFIG_KEYS_DEBUG_PROC_KEYS is not set | 854 | # CONFIG_KEYS_DEBUG_PROC_KEYS is not set |
| 955 | # CONFIG_SECURITY is not set | 855 | # CONFIG_SECURITY is not set |
| 956 | |||
| 957 | # | ||
| 958 | # Cryptographic options | ||
| 959 | # | ||
| 960 | CONFIG_CRYPTO=y | 856 | CONFIG_CRYPTO=y |
| 961 | CONFIG_CRYPTO_ALGAPI=y | 857 | CONFIG_CRYPTO_ALGAPI=y |
| 962 | CONFIG_CRYPTO_BLKCIPHER=y | 858 | CONFIG_CRYPTO_BLKCIPHER=y |
| @@ -996,10 +892,7 @@ CONFIG_CRYPTO_MICHAEL_MIC=m | |||
| 996 | CONFIG_CRYPTO_CRC32C=m | 892 | CONFIG_CRYPTO_CRC32C=m |
| 997 | # CONFIG_CRYPTO_CAMELLIA is not set | 893 | # CONFIG_CRYPTO_CAMELLIA is not set |
| 998 | # CONFIG_CRYPTO_TEST is not set | 894 | # CONFIG_CRYPTO_TEST is not set |
| 999 | 895 | # CONFIG_CRYPTO_HW is not set | |
| 1000 | # | ||
| 1001 | # Hardware crypto devices | ||
| 1002 | # | ||
| 1003 | 896 | ||
| 1004 | # | 897 | # |
| 1005 | # Library routines | 898 | # Library routines |
| @@ -1009,6 +902,7 @@ CONFIG_BITREVERSE=y | |||
| 1009 | # CONFIG_CRC16 is not set | 902 | # CONFIG_CRC16 is not set |
| 1010 | # CONFIG_CRC_ITU_T is not set | 903 | # CONFIG_CRC_ITU_T is not set |
| 1011 | CONFIG_CRC32=y | 904 | CONFIG_CRC32=y |
| 905 | # CONFIG_CRC7 is not set | ||
| 1012 | CONFIG_LIBCRC32C=m | 906 | CONFIG_LIBCRC32C=m |
| 1013 | CONFIG_ZLIB_INFLATE=y | 907 | CONFIG_ZLIB_INFLATE=y |
| 1014 | CONFIG_ZLIB_DEFLATE=y | 908 | CONFIG_ZLIB_DEFLATE=y |
diff --git a/arch/sparc/kernel/prom.c b/arch/sparc/kernel/prom.c index e3a537650db1..39fbd3c8ab0b 100644 --- a/arch/sparc/kernel/prom.c +++ b/arch/sparc/kernel/prom.c | |||
| @@ -415,7 +415,7 @@ static void __init of_console_init(void) | |||
| 415 | unsigned long flags; | 415 | unsigned long flags; |
| 416 | const char *type; | 416 | const char *type; |
| 417 | phandle node; | 417 | phandle node; |
| 418 | int skip, fd; | 418 | int skip, tmp, fd; |
| 419 | 419 | ||
| 420 | of_console_path = prom_early_alloc(256); | 420 | of_console_path = prom_early_alloc(256); |
| 421 | 421 | ||
| @@ -442,8 +442,9 @@ static void __init of_console_init(void) | |||
| 442 | prom_halt(); | 442 | prom_halt(); |
| 443 | } | 443 | } |
| 444 | 444 | ||
| 445 | tmp = skip; | ||
| 445 | for_each_node_by_type(dp, type) { | 446 | for_each_node_by_type(dp, type) { |
| 446 | if (!skip--) | 447 | if (!tmp--) |
| 447 | break; | 448 | break; |
| 448 | } | 449 | } |
| 449 | if (!dp) { | 450 | if (!dp) { |
diff --git a/arch/sparc64/kernel/Makefile b/arch/sparc64/kernel/Makefile index b66876bf410c..40d2f3aae91e 100644 --- a/arch/sparc64/kernel/Makefile +++ b/arch/sparc64/kernel/Makefile | |||
| @@ -8,14 +8,14 @@ EXTRA_CFLAGS := -Werror | |||
| 8 | extra-y := head.o init_task.o vmlinux.lds | 8 | extra-y := head.o init_task.o vmlinux.lds |
| 9 | 9 | ||
| 10 | obj-y := process.o setup.o cpu.o idprom.o \ | 10 | obj-y := process.o setup.o cpu.o idprom.o \ |
| 11 | traps.o auxio.o una_asm.o sysfs.o \ | 11 | traps.o auxio.o una_asm.o sysfs.o iommu.o \ |
| 12 | irq.o ptrace.o time.o sys_sparc.o signal.o \ | 12 | irq.o ptrace.o time.o sys_sparc.o signal.o \ |
| 13 | unaligned.o central.o pci.o starfire.o semaphore.o \ | 13 | unaligned.o central.o pci.o starfire.o semaphore.o \ |
| 14 | power.o sbus.o iommu_common.o sparc64_ksyms.o chmc.o \ | 14 | power.o sbus.o iommu_common.o sparc64_ksyms.o chmc.o \ |
| 15 | visemul.o prom.o of_device.o hvapi.o sstate.o mdesc.o | 15 | visemul.o prom.o of_device.o hvapi.o sstate.o mdesc.o |
| 16 | 16 | ||
| 17 | obj-$(CONFIG_STACKTRACE) += stacktrace.o | 17 | obj-$(CONFIG_STACKTRACE) += stacktrace.o |
| 18 | obj-$(CONFIG_PCI) += ebus.o isa.o pci_common.o pci_iommu.o \ | 18 | obj-$(CONFIG_PCI) += ebus.o isa.o pci_common.o \ |
| 19 | pci_psycho.o pci_sabre.o pci_schizo.o \ | 19 | pci_psycho.o pci_sabre.o pci_schizo.o \ |
| 20 | pci_sun4v.o pci_sun4v_asm.o pci_fire.o | 20 | pci_sun4v.o pci_sun4v_asm.o pci_fire.o |
| 21 | obj-$(CONFIG_SMP) += smp.o trampoline.o hvtramp.o | 21 | obj-$(CONFIG_SMP) += smp.o trampoline.o hvtramp.o |
diff --git a/arch/sparc64/kernel/ebus.c b/arch/sparc64/kernel/ebus.c index 6d2956179cde..bc9ae36f7a43 100644 --- a/arch/sparc64/kernel/ebus.c +++ b/arch/sparc64/kernel/ebus.c | |||
| @@ -391,6 +391,8 @@ static void __init fill_ebus_device(struct device_node *dp, struct linux_ebus_de | |||
| 391 | sd = &dev->ofdev.dev.archdata; | 391 | sd = &dev->ofdev.dev.archdata; |
| 392 | sd->prom_node = dp; | 392 | sd->prom_node = dp; |
| 393 | sd->op = &dev->ofdev; | 393 | sd->op = &dev->ofdev; |
| 394 | sd->iommu = dev->bus->ofdev.dev.parent->archdata.iommu; | ||
| 395 | sd->stc = dev->bus->ofdev.dev.parent->archdata.stc; | ||
| 394 | 396 | ||
| 395 | dev->ofdev.node = dp; | 397 | dev->ofdev.node = dp; |
| 396 | dev->ofdev.dev.parent = &dev->bus->ofdev.dev; | 398 | dev->ofdev.dev.parent = &dev->bus->ofdev.dev; |
diff --git a/arch/sparc64/kernel/pci_iommu.c b/arch/sparc64/kernel/iommu.c index 70d2364fdfe0..b35a62167e9c 100644 --- a/arch/sparc64/kernel/pci_iommu.c +++ b/arch/sparc64/kernel/iommu.c | |||
| @@ -1,28 +1,32 @@ | |||
| 1 | /* pci_iommu.c: UltraSparc PCI controller IOM/STC support. | 1 | /* iommu.c: Generic sparc64 IOMMU support. |
| 2 | * | 2 | * |
| 3 | * Copyright (C) 1999, 2007 David S. Miller (davem@davemloft.net) | 3 | * Copyright (C) 1999, 2007 David S. Miller (davem@davemloft.net) |
| 4 | * Copyright (C) 1999, 2000 Jakub Jelinek (jakub@redhat.com) | 4 | * Copyright (C) 1999, 2000 Jakub Jelinek (jakub@redhat.com) |
| 5 | */ | 5 | */ |
| 6 | 6 | ||
| 7 | #include <linux/kernel.h> | 7 | #include <linux/kernel.h> |
| 8 | #include <linux/sched.h> | 8 | #include <linux/module.h> |
| 9 | #include <linux/mm.h> | ||
| 10 | #include <linux/delay.h> | 9 | #include <linux/delay.h> |
| 10 | #include <linux/device.h> | ||
| 11 | #include <linux/dma-mapping.h> | ||
| 12 | #include <linux/errno.h> | ||
| 13 | |||
| 14 | #ifdef CONFIG_PCI | ||
| 11 | #include <linux/pci.h> | 15 | #include <linux/pci.h> |
| 16 | #endif | ||
| 12 | 17 | ||
| 13 | #include <asm/oplib.h> | 18 | #include <asm/iommu.h> |
| 14 | 19 | ||
| 15 | #include "iommu_common.h" | 20 | #include "iommu_common.h" |
| 16 | #include "pci_impl.h" | ||
| 17 | 21 | ||
| 18 | #define PCI_STC_CTXMATCH_ADDR(STC, CTX) \ | 22 | #define STC_CTXMATCH_ADDR(STC, CTX) \ |
| 19 | ((STC)->strbuf_ctxmatch_base + ((CTX) << 3)) | 23 | ((STC)->strbuf_ctxmatch_base + ((CTX) << 3)) |
| 24 | #define STC_FLUSHFLAG_INIT(STC) \ | ||
| 25 | (*((STC)->strbuf_flushflag) = 0UL) | ||
| 26 | #define STC_FLUSHFLAG_SET(STC) \ | ||
| 27 | (*((STC)->strbuf_flushflag) != 0UL) | ||
| 20 | 28 | ||
| 21 | /* Accessing IOMMU and Streaming Buffer registers. | 29 | #define iommu_read(__reg) \ |
| 22 | * REG parameter is a physical address. All registers | ||
| 23 | * are 64-bits in size. | ||
| 24 | */ | ||
| 25 | #define pci_iommu_read(__reg) \ | ||
| 26 | ({ u64 __ret; \ | 30 | ({ u64 __ret; \ |
| 27 | __asm__ __volatile__("ldxa [%1] %2, %0" \ | 31 | __asm__ __volatile__("ldxa [%1] %2, %0" \ |
| 28 | : "=r" (__ret) \ | 32 | : "=r" (__ret) \ |
| @@ -30,7 +34,7 @@ | |||
| 30 | : "memory"); \ | 34 | : "memory"); \ |
| 31 | __ret; \ | 35 | __ret; \ |
| 32 | }) | 36 | }) |
| 33 | #define pci_iommu_write(__reg, __val) \ | 37 | #define iommu_write(__reg, __val) \ |
| 34 | __asm__ __volatile__("stxa %0, [%1] %2" \ | 38 | __asm__ __volatile__("stxa %0, [%1] %2" \ |
| 35 | : /* no outputs */ \ | 39 | : /* no outputs */ \ |
| 36 | : "r" (__val), "r" (__reg), \ | 40 | : "r" (__val), "r" (__reg), \ |
| @@ -40,19 +44,19 @@ | |||
| 40 | static void __iommu_flushall(struct iommu *iommu) | 44 | static void __iommu_flushall(struct iommu *iommu) |
| 41 | { | 45 | { |
| 42 | if (iommu->iommu_flushinv) { | 46 | if (iommu->iommu_flushinv) { |
| 43 | pci_iommu_write(iommu->iommu_flushinv, ~(u64)0); | 47 | iommu_write(iommu->iommu_flushinv, ~(u64)0); |
| 44 | } else { | 48 | } else { |
| 45 | unsigned long tag; | 49 | unsigned long tag; |
| 46 | int entry; | 50 | int entry; |
| 47 | 51 | ||
| 48 | tag = iommu->iommu_flush + (0xa580UL - 0x0210UL); | 52 | tag = iommu->iommu_tags; |
| 49 | for (entry = 0; entry < 16; entry++) { | 53 | for (entry = 0; entry < 16; entry++) { |
| 50 | pci_iommu_write(tag, 0); | 54 | iommu_write(tag, 0); |
| 51 | tag += 8; | 55 | tag += 8; |
| 52 | } | 56 | } |
| 53 | 57 | ||
| 54 | /* Ensure completion of previous PIO writes. */ | 58 | /* Ensure completion of previous PIO writes. */ |
| 55 | (void) pci_iommu_read(iommu->write_complete_reg); | 59 | (void) iommu_read(iommu->write_complete_reg); |
| 56 | } | 60 | } |
| 57 | } | 61 | } |
| 58 | 62 | ||
| @@ -80,7 +84,7 @@ static inline void iopte_make_dummy(struct iommu *iommu, iopte_t *iopte) | |||
| 80 | } | 84 | } |
| 81 | 85 | ||
| 82 | /* Based largely upon the ppc64 iommu allocator. */ | 86 | /* Based largely upon the ppc64 iommu allocator. */ |
| 83 | static long pci_arena_alloc(struct iommu *iommu, unsigned long npages) | 87 | static long arena_alloc(struct iommu *iommu, unsigned long npages) |
| 84 | { | 88 | { |
| 85 | struct iommu_arena *arena = &iommu->arena; | 89 | struct iommu_arena *arena = &iommu->arena; |
| 86 | unsigned long n, i, start, end, limit; | 90 | unsigned long n, i, start, end, limit; |
| @@ -121,7 +125,7 @@ again: | |||
| 121 | return n; | 125 | return n; |
| 122 | } | 126 | } |
| 123 | 127 | ||
| 124 | static void pci_arena_free(struct iommu_arena *arena, unsigned long base, unsigned long npages) | 128 | static void arena_free(struct iommu_arena *arena, unsigned long base, unsigned long npages) |
| 125 | { | 129 | { |
| 126 | unsigned long i; | 130 | unsigned long i; |
| 127 | 131 | ||
| @@ -129,7 +133,8 @@ static void pci_arena_free(struct iommu_arena *arena, unsigned long base, unsign | |||
| 129 | __clear_bit(i, arena->map); | 133 | __clear_bit(i, arena->map); |
| 130 | } | 134 | } |
| 131 | 135 | ||
| 132 | void pci_iommu_table_init(struct iommu *iommu, int tsbsize, u32 dma_offset, u32 dma_addr_mask) | 136 | int iommu_table_init(struct iommu *iommu, int tsbsize, |
| 137 | u32 dma_offset, u32 dma_addr_mask) | ||
| 133 | { | 138 | { |
| 134 | unsigned long i, tsbbase, order, sz, num_tsb_entries; | 139 | unsigned long i, tsbbase, order, sz, num_tsb_entries; |
| 135 | 140 | ||
| @@ -146,8 +151,8 @@ void pci_iommu_table_init(struct iommu *iommu, int tsbsize, u32 dma_offset, u32 | |||
| 146 | sz = (sz + 7UL) & ~7UL; | 151 | sz = (sz + 7UL) & ~7UL; |
| 147 | iommu->arena.map = kzalloc(sz, GFP_KERNEL); | 152 | iommu->arena.map = kzalloc(sz, GFP_KERNEL); |
| 148 | if (!iommu->arena.map) { | 153 | if (!iommu->arena.map) { |
| 149 | prom_printf("PCI_IOMMU: Error, kmalloc(arena.map) failed.\n"); | 154 | printk(KERN_ERR "IOMMU: Error, kmalloc(arena.map) failed.\n"); |
| 150 | prom_halt(); | 155 | return -ENOMEM; |
| 151 | } | 156 | } |
| 152 | iommu->arena.limit = num_tsb_entries; | 157 | iommu->arena.limit = num_tsb_entries; |
| 153 | 158 | ||
| @@ -156,8 +161,8 @@ void pci_iommu_table_init(struct iommu *iommu, int tsbsize, u32 dma_offset, u32 | |||
| 156 | */ | 161 | */ |
| 157 | iommu->dummy_page = __get_free_pages(GFP_KERNEL, 0); | 162 | iommu->dummy_page = __get_free_pages(GFP_KERNEL, 0); |
| 158 | if (!iommu->dummy_page) { | 163 | if (!iommu->dummy_page) { |
| 159 | prom_printf("PCI_IOMMU: Error, gfp(dummy_page) failed.\n"); | 164 | printk(KERN_ERR "IOMMU: Error, gfp(dummy_page) failed.\n"); |
| 160 | prom_halt(); | 165 | goto out_free_map; |
| 161 | } | 166 | } |
| 162 | memset((void *)iommu->dummy_page, 0, PAGE_SIZE); | 167 | memset((void *)iommu->dummy_page, 0, PAGE_SIZE); |
| 163 | iommu->dummy_page_pa = (unsigned long) __pa(iommu->dummy_page); | 168 | iommu->dummy_page_pa = (unsigned long) __pa(iommu->dummy_page); |
| @@ -166,20 +171,32 @@ void pci_iommu_table_init(struct iommu *iommu, int tsbsize, u32 dma_offset, u32 | |||
| 166 | order = get_order(tsbsize); | 171 | order = get_order(tsbsize); |
| 167 | tsbbase = __get_free_pages(GFP_KERNEL, order); | 172 | tsbbase = __get_free_pages(GFP_KERNEL, order); |
| 168 | if (!tsbbase) { | 173 | if (!tsbbase) { |
| 169 | prom_printf("PCI_IOMMU: Error, gfp(tsb) failed.\n"); | 174 | printk(KERN_ERR "IOMMU: Error, gfp(tsb) failed.\n"); |
| 170 | prom_halt(); | 175 | goto out_free_dummy_page; |
| 171 | } | 176 | } |
| 172 | iommu->page_table = (iopte_t *)tsbbase; | 177 | iommu->page_table = (iopte_t *)tsbbase; |
| 173 | 178 | ||
| 174 | for (i = 0; i < num_tsb_entries; i++) | 179 | for (i = 0; i < num_tsb_entries; i++) |
| 175 | iopte_make_dummy(iommu, &iommu->page_table[i]); | 180 | iopte_make_dummy(iommu, &iommu->page_table[i]); |
| 181 | |||
| 182 | return 0; | ||
| 183 | |||
| 184 | out_free_dummy_page: | ||
| 185 | free_page(iommu->dummy_page); | ||
| 186 | iommu->dummy_page = 0UL; | ||
| 187 | |||
| 188 | out_free_map: | ||
| 189 | kfree(iommu->arena.map); | ||
| 190 | iommu->arena.map = NULL; | ||
| 191 | |||
| 192 | return -ENOMEM; | ||
| 176 | } | 193 | } |
| 177 | 194 | ||
| 178 | static inline iopte_t *alloc_npages(struct iommu *iommu, unsigned long npages) | 195 | static inline iopte_t *alloc_npages(struct iommu *iommu, unsigned long npages) |
| 179 | { | 196 | { |
| 180 | long entry; | 197 | long entry; |
| 181 | 198 | ||
| 182 | entry = pci_arena_alloc(iommu, npages); | 199 | entry = arena_alloc(iommu, npages); |
| 183 | if (unlikely(entry < 0)) | 200 | if (unlikely(entry < 0)) |
| 184 | return NULL; | 201 | return NULL; |
| 185 | 202 | ||
| @@ -188,7 +205,7 @@ static inline iopte_t *alloc_npages(struct iommu *iommu, unsigned long npages) | |||
| 188 | 205 | ||
| 189 | static inline void free_npages(struct iommu *iommu, dma_addr_t base, unsigned long npages) | 206 | static inline void free_npages(struct iommu *iommu, dma_addr_t base, unsigned long npages) |
| 190 | { | 207 | { |
| 191 | pci_arena_free(&iommu->arena, base >> IO_PAGE_SHIFT, npages); | 208 | arena_free(&iommu->arena, base >> IO_PAGE_SHIFT, npages); |
| 192 | } | 209 | } |
| 193 | 210 | ||
| 194 | static int iommu_alloc_ctx(struct iommu *iommu) | 211 | static int iommu_alloc_ctx(struct iommu *iommu) |
| @@ -219,11 +236,8 @@ static inline void iommu_free_ctx(struct iommu *iommu, int ctx) | |||
| 219 | } | 236 | } |
| 220 | } | 237 | } |
| 221 | 238 | ||
| 222 | /* Allocate and map kernel buffer of size SIZE using consistent mode | 239 | static void *dma_4u_alloc_coherent(struct device *dev, size_t size, |
| 223 | * DMA for PCI device PDEV. Return non-NULL cpu-side address if | 240 | dma_addr_t *dma_addrp, gfp_t gfp) |
| 224 | * successful and set *DMA_ADDRP to the PCI side dma address. | ||
| 225 | */ | ||
| 226 | static void *pci_4u_alloc_consistent(struct pci_dev *pdev, size_t size, dma_addr_t *dma_addrp, gfp_t gfp) | ||
| 227 | { | 241 | { |
| 228 | struct iommu *iommu; | 242 | struct iommu *iommu; |
| 229 | iopte_t *iopte; | 243 | iopte_t *iopte; |
| @@ -241,7 +255,7 @@ static void *pci_4u_alloc_consistent(struct pci_dev *pdev, size_t size, dma_addr | |||
| 241 | return NULL; | 255 | return NULL; |
| 242 | memset((char *)first_page, 0, PAGE_SIZE << order); | 256 | memset((char *)first_page, 0, PAGE_SIZE << order); |
| 243 | 257 | ||
| 244 | iommu = pdev->dev.archdata.iommu; | 258 | iommu = dev->archdata.iommu; |
| 245 | 259 | ||
| 246 | spin_lock_irqsave(&iommu->lock, flags); | 260 | spin_lock_irqsave(&iommu->lock, flags); |
| 247 | iopte = alloc_npages(iommu, size >> IO_PAGE_SHIFT); | 261 | iopte = alloc_npages(iommu, size >> IO_PAGE_SHIFT); |
| @@ -268,15 +282,15 @@ static void *pci_4u_alloc_consistent(struct pci_dev *pdev, size_t size, dma_addr | |||
| 268 | return ret; | 282 | return ret; |
| 269 | } | 283 | } |
| 270 | 284 | ||
| 271 | /* Free and unmap a consistent DMA translation. */ | 285 | static void dma_4u_free_coherent(struct device *dev, size_t size, |
| 272 | static void pci_4u_free_consistent(struct pci_dev *pdev, size_t size, void *cpu, dma_addr_t dvma) | 286 | void *cpu, dma_addr_t dvma) |
| 273 | { | 287 | { |
| 274 | struct iommu *iommu; | 288 | struct iommu *iommu; |
| 275 | iopte_t *iopte; | 289 | iopte_t *iopte; |
| 276 | unsigned long flags, order, npages; | 290 | unsigned long flags, order, npages; |
| 277 | 291 | ||
| 278 | npages = IO_PAGE_ALIGN(size) >> IO_PAGE_SHIFT; | 292 | npages = IO_PAGE_ALIGN(size) >> IO_PAGE_SHIFT; |
| 279 | iommu = pdev->dev.archdata.iommu; | 293 | iommu = dev->archdata.iommu; |
| 280 | iopte = iommu->page_table + | 294 | iopte = iommu->page_table + |
| 281 | ((dvma - iommu->page_table_map_base) >> IO_PAGE_SHIFT); | 295 | ((dvma - iommu->page_table_map_base) >> IO_PAGE_SHIFT); |
| 282 | 296 | ||
| @@ -291,10 +305,8 @@ static void pci_4u_free_consistent(struct pci_dev *pdev, size_t size, void *cpu, | |||
| 291 | free_pages((unsigned long)cpu, order); | 305 | free_pages((unsigned long)cpu, order); |
| 292 | } | 306 | } |
| 293 | 307 | ||
| 294 | /* Map a single buffer at PTR of SZ bytes for PCI DMA | 308 | static dma_addr_t dma_4u_map_single(struct device *dev, void *ptr, size_t sz, |
| 295 | * in streaming mode. | 309 | enum dma_data_direction direction) |
| 296 | */ | ||
| 297 | static dma_addr_t pci_4u_map_single(struct pci_dev *pdev, void *ptr, size_t sz, int direction) | ||
| 298 | { | 310 | { |
| 299 | struct iommu *iommu; | 311 | struct iommu *iommu; |
| 300 | struct strbuf *strbuf; | 312 | struct strbuf *strbuf; |
| @@ -304,10 +316,10 @@ static dma_addr_t pci_4u_map_single(struct pci_dev *pdev, void *ptr, size_t sz, | |||
| 304 | u32 bus_addr, ret; | 316 | u32 bus_addr, ret; |
| 305 | unsigned long iopte_protection; | 317 | unsigned long iopte_protection; |
| 306 | 318 | ||
| 307 | iommu = pdev->dev.archdata.iommu; | 319 | iommu = dev->archdata.iommu; |
| 308 | strbuf = pdev->dev.archdata.stc; | 320 | strbuf = dev->archdata.stc; |
| 309 | 321 | ||
| 310 | if (unlikely(direction == PCI_DMA_NONE)) | 322 | if (unlikely(direction == DMA_NONE)) |
| 311 | goto bad_no_ctx; | 323 | goto bad_no_ctx; |
| 312 | 324 | ||
| 313 | oaddr = (unsigned long)ptr; | 325 | oaddr = (unsigned long)ptr; |
| @@ -332,7 +344,7 @@ static dma_addr_t pci_4u_map_single(struct pci_dev *pdev, void *ptr, size_t sz, | |||
| 332 | iopte_protection = IOPTE_STREAMING(ctx); | 344 | iopte_protection = IOPTE_STREAMING(ctx); |
| 333 | else | 345 | else |
| 334 | iopte_protection = IOPTE_CONSISTENT(ctx); | 346 | iopte_protection = IOPTE_CONSISTENT(ctx); |
| 335 | if (direction != PCI_DMA_TODEVICE) | 347 | if (direction != DMA_TO_DEVICE) |
| 336 | iopte_protection |= IOPTE_WRITE; | 348 | iopte_protection |= IOPTE_WRITE; |
| 337 | 349 | ||
| 338 | for (i = 0; i < npages; i++, base++, base_paddr += IO_PAGE_SIZE) | 350 | for (i = 0; i < npages; i++, base++, base_paddr += IO_PAGE_SIZE) |
| @@ -345,10 +357,12 @@ bad: | |||
| 345 | bad_no_ctx: | 357 | bad_no_ctx: |
| 346 | if (printk_ratelimit()) | 358 | if (printk_ratelimit()) |
| 347 | WARN_ON(1); | 359 | WARN_ON(1); |
| 348 | return PCI_DMA_ERROR_CODE; | 360 | return DMA_ERROR_CODE; |
| 349 | } | 361 | } |
| 350 | 362 | ||
| 351 | static void pci_strbuf_flush(struct strbuf *strbuf, struct iommu *iommu, u32 vaddr, unsigned long ctx, unsigned long npages, int direction) | 363 | static void strbuf_flush(struct strbuf *strbuf, struct iommu *iommu, |
| 364 | u32 vaddr, unsigned long ctx, unsigned long npages, | ||
| 365 | enum dma_data_direction direction) | ||
| 352 | { | 366 | { |
| 353 | int limit; | 367 | int limit; |
| 354 | 368 | ||
| @@ -358,22 +372,22 @@ static void pci_strbuf_flush(struct strbuf *strbuf, struct iommu *iommu, u32 vad | |||
| 358 | u64 val; | 372 | u64 val; |
| 359 | 373 | ||
| 360 | flushreg = strbuf->strbuf_ctxflush; | 374 | flushreg = strbuf->strbuf_ctxflush; |
| 361 | matchreg = PCI_STC_CTXMATCH_ADDR(strbuf, ctx); | 375 | matchreg = STC_CTXMATCH_ADDR(strbuf, ctx); |
| 362 | 376 | ||
| 363 | pci_iommu_write(flushreg, ctx); | 377 | iommu_write(flushreg, ctx); |
| 364 | val = pci_iommu_read(matchreg); | 378 | val = iommu_read(matchreg); |
| 365 | val &= 0xffff; | 379 | val &= 0xffff; |
| 366 | if (!val) | 380 | if (!val) |
| 367 | goto do_flush_sync; | 381 | goto do_flush_sync; |
| 368 | 382 | ||
| 369 | while (val) { | 383 | while (val) { |
| 370 | if (val & 0x1) | 384 | if (val & 0x1) |
| 371 | pci_iommu_write(flushreg, ctx); | 385 | iommu_write(flushreg, ctx); |
| 372 | val >>= 1; | 386 | val >>= 1; |
| 373 | } | 387 | } |
| 374 | val = pci_iommu_read(matchreg); | 388 | val = iommu_read(matchreg); |
| 375 | if (unlikely(val)) { | 389 | if (unlikely(val)) { |
| 376 | printk(KERN_WARNING "pci_strbuf_flush: ctx flush " | 390 | printk(KERN_WARNING "strbuf_flush: ctx flush " |
| 377 | "timeout matchreg[%lx] ctx[%lx]\n", | 391 | "timeout matchreg[%lx] ctx[%lx]\n", |
| 378 | val, ctx); | 392 | val, ctx); |
| 379 | goto do_page_flush; | 393 | goto do_page_flush; |
| @@ -383,7 +397,7 @@ static void pci_strbuf_flush(struct strbuf *strbuf, struct iommu *iommu, u32 vad | |||
| 383 | 397 | ||
| 384 | do_page_flush: | 398 | do_page_flush: |
| 385 | for (i = 0; i < npages; i++, vaddr += IO_PAGE_SIZE) | 399 | for (i = 0; i < npages; i++, vaddr += IO_PAGE_SIZE) |
| 386 | pci_iommu_write(strbuf->strbuf_pflush, vaddr); | 400 | iommu_write(strbuf->strbuf_pflush, vaddr); |
| 387 | } | 401 | } |
| 388 | 402 | ||
| 389 | do_flush_sync: | 403 | do_flush_sync: |
| @@ -391,15 +405,15 @@ do_flush_sync: | |||
| 391 | * the streaming cache, no flush-flag synchronization needs | 405 | * the streaming cache, no flush-flag synchronization needs |
| 392 | * to be performed. | 406 | * to be performed. |
| 393 | */ | 407 | */ |
| 394 | if (direction == PCI_DMA_TODEVICE) | 408 | if (direction == DMA_TO_DEVICE) |
| 395 | return; | 409 | return; |
| 396 | 410 | ||
| 397 | PCI_STC_FLUSHFLAG_INIT(strbuf); | 411 | STC_FLUSHFLAG_INIT(strbuf); |
| 398 | pci_iommu_write(strbuf->strbuf_fsync, strbuf->strbuf_flushflag_pa); | 412 | iommu_write(strbuf->strbuf_fsync, strbuf->strbuf_flushflag_pa); |
| 399 | (void) pci_iommu_read(iommu->write_complete_reg); | 413 | (void) iommu_read(iommu->write_complete_reg); |
| 400 | 414 | ||
| 401 | limit = 100000; | 415 | limit = 100000; |
| 402 | while (!PCI_STC_FLUSHFLAG_SET(strbuf)) { | 416 | while (!STC_FLUSHFLAG_SET(strbuf)) { |
| 403 | limit--; | 417 | limit--; |
| 404 | if (!limit) | 418 | if (!limit) |
| 405 | break; | 419 | break; |
| @@ -407,37 +421,32 @@ do_flush_sync: | |||
| 407 | rmb(); | 421 | rmb(); |
| 408 | } | 422 | } |
| 409 | if (!limit) | 423 | if (!limit) |
| 410 | printk(KERN_WARNING "pci_strbuf_flush: flushflag timeout " | 424 | printk(KERN_WARNING "strbuf_flush: flushflag timeout " |
| 411 | "vaddr[%08x] ctx[%lx] npages[%ld]\n", | 425 | "vaddr[%08x] ctx[%lx] npages[%ld]\n", |
| 412 | vaddr, ctx, npages); | 426 | vaddr, ctx, npages); |
| 413 | } | 427 | } |
| 414 | 428 | ||
| 415 | /* Unmap a single streaming mode DMA translation. */ | 429 | static void dma_4u_unmap_single(struct device *dev, dma_addr_t bus_addr, |
| 416 | static void pci_4u_unmap_single(struct pci_dev *pdev, dma_addr_t bus_addr, size_t sz, int direction) | 430 | size_t sz, enum dma_data_direction direction) |
| 417 | { | 431 | { |
| 418 | struct iommu *iommu; | 432 | struct iommu *iommu; |
| 419 | struct strbuf *strbuf; | 433 | struct strbuf *strbuf; |
| 420 | iopte_t *base; | 434 | iopte_t *base; |
| 421 | unsigned long flags, npages, ctx, i; | 435 | unsigned long flags, npages, ctx, i; |
| 422 | 436 | ||
| 423 | if (unlikely(direction == PCI_DMA_NONE)) { | 437 | if (unlikely(direction == DMA_NONE)) { |
| 424 | if (printk_ratelimit()) | 438 | if (printk_ratelimit()) |
| 425 | WARN_ON(1); | 439 | WARN_ON(1); |
| 426 | return; | 440 | return; |
| 427 | } | 441 | } |
| 428 | 442 | ||
| 429 | iommu = pdev->dev.archdata.iommu; | 443 | iommu = dev->archdata.iommu; |
| 430 | strbuf = pdev->dev.archdata.stc; | 444 | strbuf = dev->archdata.stc; |
| 431 | 445 | ||
| 432 | npages = IO_PAGE_ALIGN(bus_addr + sz) - (bus_addr & IO_PAGE_MASK); | 446 | npages = IO_PAGE_ALIGN(bus_addr + sz) - (bus_addr & IO_PAGE_MASK); |
| 433 | npages >>= IO_PAGE_SHIFT; | 447 | npages >>= IO_PAGE_SHIFT; |
| 434 | base = iommu->page_table + | 448 | base = iommu->page_table + |
| 435 | ((bus_addr - iommu->page_table_map_base) >> IO_PAGE_SHIFT); | 449 | ((bus_addr - iommu->page_table_map_base) >> IO_PAGE_SHIFT); |
| 436 | #ifdef DEBUG_PCI_IOMMU | ||
| 437 | if (IOPTE_IS_DUMMY(iommu, base)) | ||
| 438 | printk("pci_unmap_single called on non-mapped region %08x,%08x from %016lx\n", | ||
| 439 | bus_addr, sz, __builtin_return_address(0)); | ||
| 440 | #endif | ||
| 441 | bus_addr &= IO_PAGE_MASK; | 450 | bus_addr &= IO_PAGE_MASK; |
| 442 | 451 | ||
| 443 | spin_lock_irqsave(&iommu->lock, flags); | 452 | spin_lock_irqsave(&iommu->lock, flags); |
| @@ -449,8 +458,8 @@ static void pci_4u_unmap_single(struct pci_dev *pdev, dma_addr_t bus_addr, size_ | |||
| 449 | 458 | ||
| 450 | /* Step 1: Kick data out of streaming buffers if necessary. */ | 459 | /* Step 1: Kick data out of streaming buffers if necessary. */ |
| 451 | if (strbuf->strbuf_enabled) | 460 | if (strbuf->strbuf_enabled) |
| 452 | pci_strbuf_flush(strbuf, iommu, bus_addr, ctx, | 461 | strbuf_flush(strbuf, iommu, bus_addr, ctx, |
| 453 | npages, direction); | 462 | npages, direction); |
| 454 | 463 | ||
| 455 | /* Step 2: Clear out TSB entries. */ | 464 | /* Step 2: Clear out TSB entries. */ |
| 456 | for (i = 0; i < npages; i++) | 465 | for (i = 0; i < npages; i++) |
| @@ -467,7 +476,8 @@ static void pci_4u_unmap_single(struct pci_dev *pdev, dma_addr_t bus_addr, size_ | |||
| 467 | (__pa(page_address((SG)->page)) + (SG)->offset) | 476 | (__pa(page_address((SG)->page)) + (SG)->offset) |
| 468 | 477 | ||
| 469 | static inline void fill_sg(iopte_t *iopte, struct scatterlist *sg, | 478 | static inline void fill_sg(iopte_t *iopte, struct scatterlist *sg, |
| 470 | int nused, int nelems, unsigned long iopte_protection) | 479 | int nused, int nelems, |
| 480 | unsigned long iopte_protection) | ||
| 471 | { | 481 | { |
| 472 | struct scatterlist *dma_sg = sg; | 482 | struct scatterlist *dma_sg = sg; |
| 473 | struct scatterlist *sg_end = sg + nelems; | 483 | struct scatterlist *sg_end = sg + nelems; |
| @@ -539,12 +549,8 @@ static inline void fill_sg(iopte_t *iopte, struct scatterlist *sg, | |||
| 539 | } | 549 | } |
| 540 | } | 550 | } |
| 541 | 551 | ||
| 542 | /* Map a set of buffers described by SGLIST with NELEMS array | 552 | static int dma_4u_map_sg(struct device *dev, struct scatterlist *sglist, |
| 543 | * elements in streaming mode for PCI DMA. | 553 | int nelems, enum dma_data_direction direction) |
| 544 | * When making changes here, inspect the assembly output. I was having | ||
| 545 | * hard time to keep this routine out of using stack slots for holding variables. | ||
| 546 | */ | ||
| 547 | static int pci_4u_map_sg(struct pci_dev *pdev, struct scatterlist *sglist, int nelems, int direction) | ||
| 548 | { | 554 | { |
| 549 | struct iommu *iommu; | 555 | struct iommu *iommu; |
| 550 | struct strbuf *strbuf; | 556 | struct strbuf *strbuf; |
| @@ -557,19 +563,20 @@ static int pci_4u_map_sg(struct pci_dev *pdev, struct scatterlist *sglist, int n | |||
| 557 | /* Fast path single entry scatterlists. */ | 563 | /* Fast path single entry scatterlists. */ |
| 558 | if (nelems == 1) { | 564 | if (nelems == 1) { |
| 559 | sglist->dma_address = | 565 | sglist->dma_address = |
| 560 | pci_4u_map_single(pdev, | 566 | dma_4u_map_single(dev, |
| 561 | (page_address(sglist->page) + sglist->offset), | 567 | (page_address(sglist->page) + |
| 568 | sglist->offset), | ||
| 562 | sglist->length, direction); | 569 | sglist->length, direction); |
| 563 | if (unlikely(sglist->dma_address == PCI_DMA_ERROR_CODE)) | 570 | if (unlikely(sglist->dma_address == DMA_ERROR_CODE)) |
| 564 | return 0; | 571 | return 0; |
| 565 | sglist->dma_length = sglist->length; | 572 | sglist->dma_length = sglist->length; |
| 566 | return 1; | 573 | return 1; |
| 567 | } | 574 | } |
| 568 | 575 | ||
| 569 | iommu = pdev->dev.archdata.iommu; | 576 | iommu = dev->archdata.iommu; |
| 570 | strbuf = pdev->dev.archdata.stc; | 577 | strbuf = dev->archdata.stc; |
| 571 | 578 | ||
| 572 | if (unlikely(direction == PCI_DMA_NONE)) | 579 | if (unlikely(direction == DMA_NONE)) |
| 573 | goto bad_no_ctx; | 580 | goto bad_no_ctx; |
| 574 | 581 | ||
| 575 | /* Step 1: Prepare scatter list. */ | 582 | /* Step 1: Prepare scatter list. */ |
| @@ -609,7 +616,7 @@ static int pci_4u_map_sg(struct pci_dev *pdev, struct scatterlist *sglist, int n | |||
| 609 | iopte_protection = IOPTE_STREAMING(ctx); | 616 | iopte_protection = IOPTE_STREAMING(ctx); |
| 610 | else | 617 | else |
| 611 | iopte_protection = IOPTE_CONSISTENT(ctx); | 618 | iopte_protection = IOPTE_CONSISTENT(ctx); |
| 612 | if (direction != PCI_DMA_TODEVICE) | 619 | if (direction != DMA_TO_DEVICE) |
| 613 | iopte_protection |= IOPTE_WRITE; | 620 | iopte_protection |= IOPTE_WRITE; |
| 614 | 621 | ||
| 615 | fill_sg(base, sglist, used, nelems, iopte_protection); | 622 | fill_sg(base, sglist, used, nelems, iopte_protection); |
| @@ -628,8 +635,8 @@ bad_no_ctx: | |||
| 628 | return 0; | 635 | return 0; |
| 629 | } | 636 | } |
| 630 | 637 | ||
| 631 | /* Unmap a set of streaming mode DMA translations. */ | 638 | static void dma_4u_unmap_sg(struct device *dev, struct scatterlist *sglist, |
| 632 | static void pci_4u_unmap_sg(struct pci_dev *pdev, struct scatterlist *sglist, int nelems, int direction) | 639 | int nelems, enum dma_data_direction direction) |
| 633 | { | 640 | { |
| 634 | struct iommu *iommu; | 641 | struct iommu *iommu; |
| 635 | struct strbuf *strbuf; | 642 | struct strbuf *strbuf; |
| @@ -637,14 +644,14 @@ static void pci_4u_unmap_sg(struct pci_dev *pdev, struct scatterlist *sglist, in | |||
| 637 | unsigned long flags, ctx, i, npages; | 644 | unsigned long flags, ctx, i, npages; |
| 638 | u32 bus_addr; | 645 | u32 bus_addr; |
| 639 | 646 | ||
| 640 | if (unlikely(direction == PCI_DMA_NONE)) { | 647 | if (unlikely(direction == DMA_NONE)) { |
| 641 | if (printk_ratelimit()) | 648 | if (printk_ratelimit()) |
| 642 | WARN_ON(1); | 649 | WARN_ON(1); |
| 643 | } | 650 | } |
| 644 | 651 | ||
| 645 | iommu = pdev->dev.archdata.iommu; | 652 | iommu = dev->archdata.iommu; |
| 646 | strbuf = pdev->dev.archdata.stc; | 653 | strbuf = dev->archdata.stc; |
| 647 | 654 | ||
| 648 | bus_addr = sglist->dma_address & IO_PAGE_MASK; | 655 | bus_addr = sglist->dma_address & IO_PAGE_MASK; |
| 649 | 656 | ||
| 650 | for (i = 1; i < nelems; i++) | 657 | for (i = 1; i < nelems; i++) |
| @@ -657,11 +664,6 @@ static void pci_4u_unmap_sg(struct pci_dev *pdev, struct scatterlist *sglist, in | |||
| 657 | base = iommu->page_table + | 664 | base = iommu->page_table + |
| 658 | ((bus_addr - iommu->page_table_map_base) >> IO_PAGE_SHIFT); | 665 | ((bus_addr - iommu->page_table_map_base) >> IO_PAGE_SHIFT); |
| 659 | 666 | ||
| 660 | #ifdef DEBUG_PCI_IOMMU | ||
| 661 | if (IOPTE_IS_DUMMY(iommu, base)) | ||
| 662 | printk("pci_unmap_sg called on non-mapped region %016lx,%d from %016lx\n", sglist->dma_address, nelems, __builtin_return_address(0)); | ||
| 663 | #endif | ||
| 664 | |||
| 665 | spin_lock_irqsave(&iommu->lock, flags); | 667 | spin_lock_irqsave(&iommu->lock, flags); |
| 666 | 668 | ||
| 667 | /* Record the context, if any. */ | 669 | /* Record the context, if any. */ |
| @@ -671,7 +673,7 @@ static void pci_4u_unmap_sg(struct pci_dev *pdev, struct scatterlist *sglist, in | |||
| 671 | 673 | ||
| 672 | /* Step 1: Kick data out of streaming buffers if necessary. */ | 674 | /* Step 1: Kick data out of streaming buffers if necessary. */ |
| 673 | if (strbuf->strbuf_enabled) | 675 | if (strbuf->strbuf_enabled) |
| 674 | pci_strbuf_flush(strbuf, iommu, bus_addr, ctx, npages, direction); | 676 | strbuf_flush(strbuf, iommu, bus_addr, ctx, npages, direction); |
| 675 | 677 | ||
| 676 | /* Step 2: Clear out the TSB entries. */ | 678 | /* Step 2: Clear out the TSB entries. */ |
| 677 | for (i = 0; i < npages; i++) | 679 | for (i = 0; i < npages; i++) |
| @@ -684,17 +686,16 @@ static void pci_4u_unmap_sg(struct pci_dev *pdev, struct scatterlist *sglist, in | |||
| 684 | spin_unlock_irqrestore(&iommu->lock, flags); | 686 | spin_unlock_irqrestore(&iommu->lock, flags); |
| 685 | } | 687 | } |
| 686 | 688 | ||
| 687 | /* Make physical memory consistent for a single | 689 | static void dma_4u_sync_single_for_cpu(struct device *dev, |
| 688 | * streaming mode DMA translation after a transfer. | 690 | dma_addr_t bus_addr, size_t sz, |
| 689 | */ | 691 | enum dma_data_direction direction) |
| 690 | static void pci_4u_dma_sync_single_for_cpu(struct pci_dev *pdev, dma_addr_t bus_addr, size_t sz, int direction) | ||
| 691 | { | 692 | { |
| 692 | struct iommu *iommu; | 693 | struct iommu *iommu; |
| 693 | struct strbuf *strbuf; | 694 | struct strbuf *strbuf; |
| 694 | unsigned long flags, ctx, npages; | 695 | unsigned long flags, ctx, npages; |
| 695 | 696 | ||
| 696 | iommu = pdev->dev.archdata.iommu; | 697 | iommu = dev->archdata.iommu; |
| 697 | strbuf = pdev->dev.archdata.stc; | 698 | strbuf = dev->archdata.stc; |
| 698 | 699 | ||
| 699 | if (!strbuf->strbuf_enabled) | 700 | if (!strbuf->strbuf_enabled) |
| 700 | return; | 701 | return; |
| @@ -717,23 +718,22 @@ static void pci_4u_dma_sync_single_for_cpu(struct pci_dev *pdev, dma_addr_t bus_ | |||
| 717 | } | 718 | } |
| 718 | 719 | ||
| 719 | /* Step 2: Kick data out of streaming buffers. */ | 720 | /* Step 2: Kick data out of streaming buffers. */ |
| 720 | pci_strbuf_flush(strbuf, iommu, bus_addr, ctx, npages, direction); | 721 | strbuf_flush(strbuf, iommu, bus_addr, ctx, npages, direction); |
| 721 | 722 | ||
| 722 | spin_unlock_irqrestore(&iommu->lock, flags); | 723 | spin_unlock_irqrestore(&iommu->lock, flags); |
| 723 | } | 724 | } |
| 724 | 725 | ||
| 725 | /* Make physical memory consistent for a set of streaming | 726 | static void dma_4u_sync_sg_for_cpu(struct device *dev, |
| 726 | * mode DMA translations after a transfer. | 727 | struct scatterlist *sglist, int nelems, |
| 727 | */ | 728 | enum dma_data_direction direction) |
| 728 | static void pci_4u_dma_sync_sg_for_cpu(struct pci_dev *pdev, struct scatterlist *sglist, int nelems, int direction) | ||
| 729 | { | 729 | { |
| 730 | struct iommu *iommu; | 730 | struct iommu *iommu; |
| 731 | struct strbuf *strbuf; | 731 | struct strbuf *strbuf; |
| 732 | unsigned long flags, ctx, npages, i; | 732 | unsigned long flags, ctx, npages, i; |
| 733 | u32 bus_addr; | 733 | u32 bus_addr; |
| 734 | 734 | ||
| 735 | iommu = pdev->dev.archdata.iommu; | 735 | iommu = dev->archdata.iommu; |
| 736 | strbuf = pdev->dev.archdata.stc; | 736 | strbuf = dev->archdata.stc; |
| 737 | 737 | ||
| 738 | if (!strbuf->strbuf_enabled) | 738 | if (!strbuf->strbuf_enabled) |
| 739 | return; | 739 | return; |
| @@ -759,65 +759,51 @@ static void pci_4u_dma_sync_sg_for_cpu(struct pci_dev *pdev, struct scatterlist | |||
| 759 | i--; | 759 | i--; |
| 760 | npages = (IO_PAGE_ALIGN(sglist[i].dma_address + sglist[i].dma_length) | 760 | npages = (IO_PAGE_ALIGN(sglist[i].dma_address + sglist[i].dma_length) |
| 761 | - bus_addr) >> IO_PAGE_SHIFT; | 761 | - bus_addr) >> IO_PAGE_SHIFT; |
| 762 | pci_strbuf_flush(strbuf, iommu, bus_addr, ctx, npages, direction); | 762 | strbuf_flush(strbuf, iommu, bus_addr, ctx, npages, direction); |
| 763 | 763 | ||
| 764 | spin_unlock_irqrestore(&iommu->lock, flags); | 764 | spin_unlock_irqrestore(&iommu->lock, flags); |
| 765 | } | 765 | } |
| 766 | 766 | ||
| 767 | const struct pci_iommu_ops pci_sun4u_iommu_ops = { | 767 | const struct dma_ops sun4u_dma_ops = { |
| 768 | .alloc_consistent = pci_4u_alloc_consistent, | 768 | .alloc_coherent = dma_4u_alloc_coherent, |
| 769 | .free_consistent = pci_4u_free_consistent, | 769 | .free_coherent = dma_4u_free_coherent, |
| 770 | .map_single = pci_4u_map_single, | 770 | .map_single = dma_4u_map_single, |
| 771 | .unmap_single = pci_4u_unmap_single, | 771 | .unmap_single = dma_4u_unmap_single, |
| 772 | .map_sg = pci_4u_map_sg, | 772 | .map_sg = dma_4u_map_sg, |
| 773 | .unmap_sg = pci_4u_unmap_sg, | 773 | .unmap_sg = dma_4u_unmap_sg, |
| 774 | .dma_sync_single_for_cpu = pci_4u_dma_sync_single_for_cpu, | 774 | .sync_single_for_cpu = dma_4u_sync_single_for_cpu, |
| 775 | .dma_sync_sg_for_cpu = pci_4u_dma_sync_sg_for_cpu, | 775 | .sync_sg_for_cpu = dma_4u_sync_sg_for_cpu, |
| 776 | }; | 776 | }; |
| 777 | 777 | ||
| 778 | static void ali_sound_dma_hack(struct pci_dev *pdev, int set_bit) | 778 | const struct dma_ops *dma_ops = &sun4u_dma_ops; |
| 779 | { | 779 | EXPORT_SYMBOL(dma_ops); |
| 780 | struct pci_dev *ali_isa_bridge; | ||
| 781 | u8 val; | ||
| 782 | 780 | ||
| 783 | /* ALI sound chips generate 31-bits of DMA, a special register | 781 | int dma_supported(struct device *dev, u64 device_mask) |
| 784 | * determines what bit 31 is emitted as. | ||
| 785 | */ | ||
| 786 | ali_isa_bridge = pci_get_device(PCI_VENDOR_ID_AL, | ||
| 787 | PCI_DEVICE_ID_AL_M1533, | ||
| 788 | NULL); | ||
| 789 | |||
| 790 | pci_read_config_byte(ali_isa_bridge, 0x7e, &val); | ||
| 791 | if (set_bit) | ||
| 792 | val |= 0x01; | ||
| 793 | else | ||
| 794 | val &= ~0x01; | ||
| 795 | pci_write_config_byte(ali_isa_bridge, 0x7e, val); | ||
| 796 | pci_dev_put(ali_isa_bridge); | ||
| 797 | } | ||
| 798 | |||
| 799 | int pci_dma_supported(struct pci_dev *pdev, u64 device_mask) | ||
| 800 | { | 782 | { |
| 801 | u64 dma_addr_mask; | 783 | struct iommu *iommu = dev->archdata.iommu; |
| 784 | u64 dma_addr_mask = iommu->dma_addr_mask; | ||
| 802 | 785 | ||
| 803 | if (pdev == NULL) { | 786 | if (device_mask >= (1UL << 32UL)) |
| 804 | dma_addr_mask = 0xffffffff; | 787 | return 0; |
| 805 | } else { | ||
| 806 | struct iommu *iommu = pdev->dev.archdata.iommu; | ||
| 807 | 788 | ||
| 808 | dma_addr_mask = iommu->dma_addr_mask; | 789 | if ((device_mask & dma_addr_mask) == dma_addr_mask) |
| 790 | return 1; | ||
| 809 | 791 | ||
| 810 | if (pdev->vendor == PCI_VENDOR_ID_AL && | 792 | #ifdef CONFIG_PCI |
| 811 | pdev->device == PCI_DEVICE_ID_AL_M5451 && | 793 | if (dev->bus == &pci_bus_type) |
| 812 | device_mask == 0x7fffffff) { | 794 | return pci_dma_supported(to_pci_dev(dev), device_mask); |
| 813 | ali_sound_dma_hack(pdev, | 795 | #endif |
| 814 | (dma_addr_mask & 0x80000000) != 0); | ||
| 815 | return 1; | ||
| 816 | } | ||
| 817 | } | ||
| 818 | 796 | ||
| 819 | if (device_mask >= (1UL << 32UL)) | 797 | return 0; |
| 820 | return 0; | 798 | } |
| 799 | EXPORT_SYMBOL(dma_supported); | ||
| 821 | 800 | ||
| 822 | return (device_mask & dma_addr_mask) == dma_addr_mask; | 801 | int dma_set_mask(struct device *dev, u64 dma_mask) |
| 802 | { | ||
| 803 | #ifdef CONFIG_PCI | ||
| 804 | if (dev->bus == &pci_bus_type) | ||
| 805 | return pci_set_dma_mask(to_pci_dev(dev), dma_mask); | ||
| 806 | #endif | ||
| 807 | return -EINVAL; | ||
| 823 | } | 808 | } |
| 809 | EXPORT_SYMBOL(dma_set_mask); | ||
diff --git a/arch/sparc64/kernel/isa.c b/arch/sparc64/kernel/isa.c index 1a1043fcf97d..0f19dce1c905 100644 --- a/arch/sparc64/kernel/isa.c +++ b/arch/sparc64/kernel/isa.c | |||
| @@ -90,6 +90,8 @@ static void __init isa_fill_devices(struct sparc_isa_bridge *isa_br) | |||
| 90 | sd = &isa_dev->ofdev.dev.archdata; | 90 | sd = &isa_dev->ofdev.dev.archdata; |
| 91 | sd->prom_node = dp; | 91 | sd->prom_node = dp; |
| 92 | sd->op = &isa_dev->ofdev; | 92 | sd->op = &isa_dev->ofdev; |
| 93 | sd->iommu = isa_br->ofdev.dev.parent->archdata.iommu; | ||
| 94 | sd->stc = isa_br->ofdev.dev.parent->archdata.stc; | ||
| 93 | 95 | ||
| 94 | isa_dev->ofdev.node = dp; | 96 | isa_dev->ofdev.node = dp; |
| 95 | isa_dev->ofdev.dev.parent = &isa_br->ofdev.dev; | 97 | isa_dev->ofdev.dev.parent = &isa_br->ofdev.dev; |
diff --git a/arch/sparc64/kernel/pci.c b/arch/sparc64/kernel/pci.c index 55ad1b899bb8..3d93e9203ba2 100644 --- a/arch/sparc64/kernel/pci.c +++ b/arch/sparc64/kernel/pci.c | |||
| @@ -283,12 +283,6 @@ int __init pcic_present(void) | |||
| 283 | return pci_controller_scan(pci_is_controller); | 283 | return pci_controller_scan(pci_is_controller); |
| 284 | } | 284 | } |
| 285 | 285 | ||
| 286 | const struct pci_iommu_ops *pci_iommu_ops; | ||
| 287 | EXPORT_SYMBOL(pci_iommu_ops); | ||
| 288 | |||
| 289 | extern const struct pci_iommu_ops pci_sun4u_iommu_ops, | ||
| 290 | pci_sun4v_iommu_ops; | ||
| 291 | |||
| 292 | /* Find each controller in the system, attach and initialize | 286 | /* Find each controller in the system, attach and initialize |
| 293 | * software state structure for each and link into the | 287 | * software state structure for each and link into the |
| 294 | * pci_pbm_root. Setup the controller enough such | 288 | * pci_pbm_root. Setup the controller enough such |
| @@ -296,11 +290,6 @@ extern const struct pci_iommu_ops pci_sun4u_iommu_ops, | |||
| 296 | */ | 290 | */ |
| 297 | static void __init pci_controller_probe(void) | 291 | static void __init pci_controller_probe(void) |
| 298 | { | 292 | { |
| 299 | if (tlb_type == hypervisor) | ||
| 300 | pci_iommu_ops = &pci_sun4v_iommu_ops; | ||
| 301 | else | ||
| 302 | pci_iommu_ops = &pci_sun4u_iommu_ops; | ||
| 303 | |||
| 304 | printk("PCI: Probing for controllers.\n"); | 293 | printk("PCI: Probing for controllers.\n"); |
| 305 | 294 | ||
| 306 | pci_controller_scan(pci_controller_init); | 295 | pci_controller_scan(pci_controller_init); |
| @@ -406,6 +395,10 @@ struct pci_dev *of_create_pci_dev(struct pci_pbm_info *pbm, | |||
| 406 | sd->op = of_find_device_by_node(node); | 395 | sd->op = of_find_device_by_node(node); |
| 407 | sd->msi_num = 0xffffffff; | 396 | sd->msi_num = 0xffffffff; |
| 408 | 397 | ||
| 398 | sd = &sd->op->dev.archdata; | ||
| 399 | sd->iommu = pbm->iommu; | ||
| 400 | sd->stc = &pbm->stc; | ||
| 401 | |||
| 409 | type = of_get_property(node, "device_type", NULL); | 402 | type = of_get_property(node, "device_type", NULL); |
| 410 | if (type == NULL) | 403 | if (type == NULL) |
| 411 | type = ""; | 404 | type = ""; |
| @@ -422,10 +415,15 @@ struct pci_dev *of_create_pci_dev(struct pci_pbm_info *pbm, | |||
| 422 | dev->multifunction = 0; /* maybe a lie? */ | 415 | dev->multifunction = 0; /* maybe a lie? */ |
| 423 | 416 | ||
| 424 | if (host_controller) { | 417 | if (host_controller) { |
| 425 | dev->vendor = 0x108e; | 418 | if (tlb_type != hypervisor) { |
| 426 | dev->device = 0x8000; | 419 | pci_read_config_word(dev, PCI_VENDOR_ID, |
| 427 | dev->subsystem_vendor = 0x0000; | 420 | &dev->vendor); |
| 428 | dev->subsystem_device = 0x0000; | 421 | pci_read_config_word(dev, PCI_DEVICE_ID, |
| 422 | &dev->device); | ||
| 423 | } else { | ||
| 424 | dev->vendor = PCI_VENDOR_ID_SUN; | ||
| 425 | dev->device = 0x80f0; | ||
| 426 | } | ||
| 429 | dev->cfg_size = 256; | 427 | dev->cfg_size = 256; |
| 430 | dev->class = PCI_CLASS_BRIDGE_HOST << 8; | 428 | dev->class = PCI_CLASS_BRIDGE_HOST << 8; |
| 431 | sprintf(pci_name(dev), "%04x:%02x:%02x.%d", pci_domain_nr(bus), | 429 | sprintf(pci_name(dev), "%04x:%02x:%02x.%d", pci_domain_nr(bus), |
| @@ -818,7 +816,7 @@ int pci_host_bridge_read_pci_cfg(struct pci_bus *bus_dev, | |||
| 818 | { | 816 | { |
| 819 | static u8 fake_pci_config[] = { | 817 | static u8 fake_pci_config[] = { |
| 820 | 0x8e, 0x10, /* Vendor: 0x108e (Sun) */ | 818 | 0x8e, 0x10, /* Vendor: 0x108e (Sun) */ |
| 821 | 0x00, 0x80, /* Device: 0x8000 (PBM) */ | 819 | 0xf0, 0x80, /* Device: 0x80f0 (Fire) */ |
| 822 | 0x46, 0x01, /* Command: 0x0146 (SERR, PARITY, MASTER, MEM) */ | 820 | 0x46, 0x01, /* Command: 0x0146 (SERR, PARITY, MASTER, MEM) */ |
| 823 | 0xa0, 0x22, /* Status: 0x02a0 (DEVSEL_MED, FB2B, 66MHZ) */ | 821 | 0xa0, 0x22, /* Status: 0x02a0 (DEVSEL_MED, FB2B, 66MHZ) */ |
| 824 | 0x00, 0x00, 0x00, 0x06, /* Class: 0x06000000 host bridge */ | 822 | 0x00, 0x00, 0x00, 0x06, /* Class: 0x06000000 host bridge */ |
| @@ -1221,4 +1219,51 @@ struct device_node *pci_device_to_OF_node(struct pci_dev *pdev) | |||
| 1221 | } | 1219 | } |
| 1222 | EXPORT_SYMBOL(pci_device_to_OF_node); | 1220 | EXPORT_SYMBOL(pci_device_to_OF_node); |
| 1223 | 1221 | ||
| 1222 | static void ali_sound_dma_hack(struct pci_dev *pdev, int set_bit) | ||
| 1223 | { | ||
| 1224 | struct pci_dev *ali_isa_bridge; | ||
| 1225 | u8 val; | ||
| 1226 | |||
| 1227 | /* ALI sound chips generate 31-bits of DMA, a special register | ||
| 1228 | * determines what bit 31 is emitted as. | ||
| 1229 | */ | ||
| 1230 | ali_isa_bridge = pci_get_device(PCI_VENDOR_ID_AL, | ||
| 1231 | PCI_DEVICE_ID_AL_M1533, | ||
| 1232 | NULL); | ||
| 1233 | |||
| 1234 | pci_read_config_byte(ali_isa_bridge, 0x7e, &val); | ||
| 1235 | if (set_bit) | ||
| 1236 | val |= 0x01; | ||
| 1237 | else | ||
| 1238 | val &= ~0x01; | ||
| 1239 | pci_write_config_byte(ali_isa_bridge, 0x7e, val); | ||
| 1240 | pci_dev_put(ali_isa_bridge); | ||
| 1241 | } | ||
| 1242 | |||
| 1243 | int pci_dma_supported(struct pci_dev *pdev, u64 device_mask) | ||
| 1244 | { | ||
| 1245 | u64 dma_addr_mask; | ||
| 1246 | |||
| 1247 | if (pdev == NULL) { | ||
| 1248 | dma_addr_mask = 0xffffffff; | ||
| 1249 | } else { | ||
| 1250 | struct iommu *iommu = pdev->dev.archdata.iommu; | ||
| 1251 | |||
| 1252 | dma_addr_mask = iommu->dma_addr_mask; | ||
| 1253 | |||
| 1254 | if (pdev->vendor == PCI_VENDOR_ID_AL && | ||
| 1255 | pdev->device == PCI_DEVICE_ID_AL_M5451 && | ||
| 1256 | device_mask == 0x7fffffff) { | ||
| 1257 | ali_sound_dma_hack(pdev, | ||
| 1258 | (dma_addr_mask & 0x80000000) != 0); | ||
| 1259 | return 1; | ||
| 1260 | } | ||
| 1261 | } | ||
| 1262 | |||
| 1263 | if (device_mask >= (1UL << 32UL)) | ||
| 1264 | return 0; | ||
| 1265 | |||
| 1266 | return (device_mask & dma_addr_mask) == dma_addr_mask; | ||
| 1267 | } | ||
| 1268 | |||
| 1224 | #endif /* !(CONFIG_PCI) */ | 1269 | #endif /* !(CONFIG_PCI) */ |
diff --git a/arch/sparc64/kernel/pci_common.c b/arch/sparc64/kernel/pci_common.c index 4249214608af..2f61c4b12596 100644 --- a/arch/sparc64/kernel/pci_common.c +++ b/arch/sparc64/kernel/pci_common.c | |||
| @@ -44,6 +44,67 @@ static void *sun4u_config_mkaddr(struct pci_pbm_info *pbm, | |||
| 44 | return (void *) (pbm->config_space | bus | devfn | reg); | 44 | return (void *) (pbm->config_space | bus | devfn | reg); |
| 45 | } | 45 | } |
| 46 | 46 | ||
| 47 | /* At least on Sabre, it is necessary to access all PCI host controller | ||
| 48 | * registers at their natural size, otherwise zeros are returned. | ||
| 49 | * Strange but true, and I see no language in the UltraSPARC-IIi | ||
| 50 | * programmer's manual that mentions this even indirectly. | ||
| 51 | */ | ||
| 52 | static int sun4u_read_pci_cfg_host(struct pci_pbm_info *pbm, | ||
| 53 | unsigned char bus, unsigned int devfn, | ||
| 54 | int where, int size, u32 *value) | ||
| 55 | { | ||
| 56 | u32 tmp32, *addr; | ||
| 57 | u16 tmp16; | ||
| 58 | u8 tmp8; | ||
| 59 | |||
| 60 | addr = sun4u_config_mkaddr(pbm, bus, devfn, where); | ||
| 61 | if (!addr) | ||
| 62 | return PCIBIOS_SUCCESSFUL; | ||
| 63 | |||
| 64 | switch (size) { | ||
| 65 | case 1: | ||
| 66 | if (where < 8) { | ||
| 67 | unsigned long align = (unsigned long) addr; | ||
| 68 | |||
| 69 | align &= ~1; | ||
| 70 | pci_config_read16((u16 *)align, &tmp16); | ||
| 71 | if (where & 1) | ||
| 72 | *value = tmp16 >> 8; | ||
| 73 | else | ||
| 74 | *value = tmp16 & 0xff; | ||
| 75 | } else { | ||
| 76 | pci_config_read8((u8 *)addr, &tmp8); | ||
| 77 | *value = (u32) tmp8; | ||
| 78 | } | ||
| 79 | break; | ||
| 80 | |||
| 81 | case 2: | ||
| 82 | if (where < 8) { | ||
| 83 | pci_config_read16((u16 *)addr, &tmp16); | ||
| 84 | *value = (u32) tmp16; | ||
| 85 | } else { | ||
| 86 | pci_config_read8((u8 *)addr, &tmp8); | ||
| 87 | *value = (u32) tmp8; | ||
| 88 | pci_config_read8(((u8 *)addr) + 1, &tmp8); | ||
| 89 | *value |= ((u32) tmp8) << 8; | ||
| 90 | } | ||
| 91 | break; | ||
| 92 | |||
| 93 | case 4: | ||
| 94 | tmp32 = 0xffffffff; | ||
| 95 | sun4u_read_pci_cfg_host(pbm, bus, devfn, | ||
| 96 | where, 2, &tmp32); | ||
| 97 | *value = tmp32; | ||
| 98 | |||
| 99 | tmp32 = 0xffffffff; | ||
| 100 | sun4u_read_pci_cfg_host(pbm, bus, devfn, | ||
| 101 | where + 2, 2, &tmp32); | ||
| 102 | *value |= tmp32 << 16; | ||
| 103 | break; | ||
| 104 | } | ||
| 105 | return PCIBIOS_SUCCESSFUL; | ||
| 106 | } | ||
| 107 | |||
| 47 | static int sun4u_read_pci_cfg(struct pci_bus *bus_dev, unsigned int devfn, | 108 | static int sun4u_read_pci_cfg(struct pci_bus *bus_dev, unsigned int devfn, |
| 48 | int where, int size, u32 *value) | 109 | int where, int size, u32 *value) |
| 49 | { | 110 | { |
| @@ -53,10 +114,6 @@ static int sun4u_read_pci_cfg(struct pci_bus *bus_dev, unsigned int devfn, | |||
| 53 | u16 tmp16; | 114 | u16 tmp16; |
| 54 | u8 tmp8; | 115 | u8 tmp8; |
| 55 | 116 | ||
| 56 | if (bus_dev == pbm->pci_bus && devfn == 0x00) | ||
| 57 | return pci_host_bridge_read_pci_cfg(bus_dev, devfn, where, | ||
| 58 | size, value); | ||
| 59 | |||
| 60 | switch (size) { | 117 | switch (size) { |
| 61 | case 1: | 118 | case 1: |
| 62 | *value = 0xff; | 119 | *value = 0xff; |
| @@ -69,6 +126,10 @@ static int sun4u_read_pci_cfg(struct pci_bus *bus_dev, unsigned int devfn, | |||
| 69 | break; | 126 | break; |
| 70 | } | 127 | } |
| 71 | 128 | ||
| 129 | if (!bus_dev->number && !PCI_SLOT(devfn)) | ||
| 130 | return sun4u_read_pci_cfg_host(pbm, bus, devfn, where, | ||
| 131 | size, value); | ||
| 132 | |||
| 72 | addr = sun4u_config_mkaddr(pbm, bus, devfn, where); | 133 | addr = sun4u_config_mkaddr(pbm, bus, devfn, where); |
| 73 | if (!addr) | 134 | if (!addr) |
| 74 | return PCIBIOS_SUCCESSFUL; | 135 | return PCIBIOS_SUCCESSFUL; |
| @@ -101,6 +162,53 @@ static int sun4u_read_pci_cfg(struct pci_bus *bus_dev, unsigned int devfn, | |||
| 101 | return PCIBIOS_SUCCESSFUL; | 162 | return PCIBIOS_SUCCESSFUL; |
| 102 | } | 163 | } |
| 103 | 164 | ||
| 165 | static int sun4u_write_pci_cfg_host(struct pci_pbm_info *pbm, | ||
| 166 | unsigned char bus, unsigned int devfn, | ||
| 167 | int where, int size, u32 value) | ||
| 168 | { | ||
| 169 | u32 *addr; | ||
| 170 | |||
| 171 | addr = sun4u_config_mkaddr(pbm, bus, devfn, where); | ||
| 172 | if (!addr) | ||
| 173 | return PCIBIOS_SUCCESSFUL; | ||
| 174 | |||
| 175 | switch (size) { | ||
| 176 | case 1: | ||
| 177 | if (where < 8) { | ||
| 178 | unsigned long align = (unsigned long) addr; | ||
| 179 | u16 tmp16; | ||
| 180 | |||
| 181 | align &= ~1; | ||
| 182 | pci_config_read16((u16 *)align, &tmp16); | ||
| 183 | if (where & 1) { | ||
| 184 | tmp16 &= 0x00ff; | ||
| 185 | tmp16 |= value << 8; | ||
| 186 | } else { | ||
| 187 | tmp16 &= 0xff00; | ||
| 188 | tmp16 |= value; | ||
| 189 | } | ||
| 190 | pci_config_write16((u16 *)align, tmp16); | ||
| 191 | } else | ||
| 192 | pci_config_write8((u8 *)addr, value); | ||
| 193 | break; | ||
| 194 | case 2: | ||
| 195 | if (where < 8) { | ||
| 196 | pci_config_write16((u16 *)addr, value); | ||
| 197 | } else { | ||
| 198 | pci_config_write8((u8 *)addr, value & 0xff); | ||
| 199 | pci_config_write8(((u8 *)addr) + 1, value >> 8); | ||
| 200 | } | ||
| 201 | break; | ||
| 202 | case 4: | ||
| 203 | sun4u_write_pci_cfg_host(pbm, bus, devfn, | ||
| 204 | where, 2, value & 0xffff); | ||
| 205 | sun4u_write_pci_cfg_host(pbm, bus, devfn, | ||
| 206 | where + 2, 2, value >> 16); | ||
| 207 | break; | ||
| 208 | } | ||
| 209 | return PCIBIOS_SUCCESSFUL; | ||
| 210 | } | ||
| 211 | |||
| 104 | static int sun4u_write_pci_cfg(struct pci_bus *bus_dev, unsigned int devfn, | 212 | static int sun4u_write_pci_cfg(struct pci_bus *bus_dev, unsigned int devfn, |
| 105 | int where, int size, u32 value) | 213 | int where, int size, u32 value) |
| 106 | { | 214 | { |
| @@ -108,9 +216,10 @@ static int sun4u_write_pci_cfg(struct pci_bus *bus_dev, unsigned int devfn, | |||
| 108 | unsigned char bus = bus_dev->number; | 216 | unsigned char bus = bus_dev->number; |
| 109 | u32 *addr; | 217 | u32 *addr; |
| 110 | 218 | ||
| 111 | if (bus_dev == pbm->pci_bus && devfn == 0x00) | 219 | if (!bus_dev->number && !PCI_SLOT(devfn)) |
| 112 | return pci_host_bridge_write_pci_cfg(bus_dev, devfn, where, | 220 | return sun4u_write_pci_cfg_host(pbm, bus, devfn, where, |
| 113 | size, value); | 221 | size, value); |
| 222 | |||
| 114 | addr = sun4u_config_mkaddr(pbm, bus, devfn, where); | 223 | addr = sun4u_config_mkaddr(pbm, bus, devfn, where); |
| 115 | if (!addr) | 224 | if (!addr) |
| 116 | return PCIBIOS_SUCCESSFUL; | 225 | return PCIBIOS_SUCCESSFUL; |
diff --git a/arch/sparc64/kernel/pci_fire.c b/arch/sparc64/kernel/pci_fire.c index 7f5d473901c4..14d67fe21ab2 100644 --- a/arch/sparc64/kernel/pci_fire.c +++ b/arch/sparc64/kernel/pci_fire.c | |||
| @@ -39,12 +39,12 @@ static void pci_fire_scan_bus(struct pci_pbm_info *pbm) | |||
| 39 | #define FIRE_IOMMU_FLUSH 0x40100UL | 39 | #define FIRE_IOMMU_FLUSH 0x40100UL |
| 40 | #define FIRE_IOMMU_FLUSHINV 0x40108UL | 40 | #define FIRE_IOMMU_FLUSHINV 0x40108UL |
| 41 | 41 | ||
| 42 | static void pci_fire_pbm_iommu_init(struct pci_pbm_info *pbm) | 42 | static int pci_fire_pbm_iommu_init(struct pci_pbm_info *pbm) |
| 43 | { | 43 | { |
| 44 | struct iommu *iommu = pbm->iommu; | 44 | struct iommu *iommu = pbm->iommu; |
| 45 | u32 vdma[2], dma_mask; | 45 | u32 vdma[2], dma_mask; |
| 46 | u64 control; | 46 | u64 control; |
| 47 | int tsbsize; | 47 | int tsbsize, err; |
| 48 | 48 | ||
| 49 | /* No virtual-dma property on these guys, use largest size. */ | 49 | /* No virtual-dma property on these guys, use largest size. */ |
| 50 | vdma[0] = 0xc0000000; /* base */ | 50 | vdma[0] = 0xc0000000; /* base */ |
| @@ -68,7 +68,9 @@ static void pci_fire_pbm_iommu_init(struct pci_pbm_info *pbm) | |||
| 68 | */ | 68 | */ |
| 69 | fire_write(iommu->iommu_flushinv, ~(u64)0); | 69 | fire_write(iommu->iommu_flushinv, ~(u64)0); |
| 70 | 70 | ||
| 71 | pci_iommu_table_init(iommu, tsbsize * 8 * 1024, vdma[0], dma_mask); | 71 | err = iommu_table_init(iommu, tsbsize * 8 * 1024, vdma[0], dma_mask); |
| 72 | if (err) | ||
| 73 | return err; | ||
| 72 | 74 | ||
| 73 | fire_write(iommu->iommu_tsbbase, __pa(iommu->page_table) | 0x7UL); | 75 | fire_write(iommu->iommu_tsbbase, __pa(iommu->page_table) | 0x7UL); |
| 74 | 76 | ||
| @@ -78,6 +80,8 @@ static void pci_fire_pbm_iommu_init(struct pci_pbm_info *pbm) | |||
| 78 | 0x00000002 /* Bypass enable */ | | 80 | 0x00000002 /* Bypass enable */ | |
| 79 | 0x00000001 /* Translation enable */); | 81 | 0x00000001 /* Translation enable */); |
| 80 | fire_write(iommu->iommu_control, control); | 82 | fire_write(iommu->iommu_control, control); |
| 83 | |||
| 84 | return 0; | ||
| 81 | } | 85 | } |
| 82 | 86 | ||
| 83 | /* Based at pbm->controller_regs */ | 87 | /* Based at pbm->controller_regs */ |
| @@ -167,8 +171,8 @@ static void pci_fire_hw_init(struct pci_pbm_info *pbm) | |||
| 167 | fire_write(pbm->pbm_regs + FIRE_PEC_IENAB, ~(u64)0); | 171 | fire_write(pbm->pbm_regs + FIRE_PEC_IENAB, ~(u64)0); |
| 168 | } | 172 | } |
| 169 | 173 | ||
| 170 | static void pci_fire_pbm_init(struct pci_controller_info *p, | 174 | static int pci_fire_pbm_init(struct pci_controller_info *p, |
| 171 | struct device_node *dp, u32 portid) | 175 | struct device_node *dp, u32 portid) |
| 172 | { | 176 | { |
| 173 | const struct linux_prom64_registers *regs; | 177 | const struct linux_prom64_registers *regs; |
| 174 | struct pci_pbm_info *pbm; | 178 | struct pci_pbm_info *pbm; |
| @@ -203,7 +207,8 @@ static void pci_fire_pbm_init(struct pci_controller_info *p, | |||
| 203 | pci_get_pbm_props(pbm); | 207 | pci_get_pbm_props(pbm); |
| 204 | 208 | ||
| 205 | pci_fire_hw_init(pbm); | 209 | pci_fire_hw_init(pbm); |
| 206 | pci_fire_pbm_iommu_init(pbm); | 210 | |
| 211 | return pci_fire_pbm_iommu_init(pbm); | ||
| 207 | } | 212 | } |
| 208 | 213 | ||
| 209 | static inline int portid_compare(u32 x, u32 y) | 214 | static inline int portid_compare(u32 x, u32 y) |
| @@ -222,7 +227,8 @@ void fire_pci_init(struct device_node *dp, const char *model_name) | |||
| 222 | 227 | ||
| 223 | for (pbm = pci_pbm_root; pbm; pbm = pbm->next) { | 228 | for (pbm = pci_pbm_root; pbm; pbm = pbm->next) { |
| 224 | if (portid_compare(pbm->portid, portid)) { | 229 | if (portid_compare(pbm->portid, portid)) { |
| 225 | pci_fire_pbm_init(pbm->parent, dp, portid); | 230 | if (pci_fire_pbm_init(pbm->parent, dp, portid)) |
| 231 | goto fatal_memory_error; | ||
| 226 | return; | 232 | return; |
| 227 | } | 233 | } |
| 228 | } | 234 | } |
| @@ -250,7 +256,9 @@ void fire_pci_init(struct device_node *dp, const char *model_name) | |||
| 250 | */ | 256 | */ |
| 251 | pci_memspace_mask = 0x7fffffffUL; | 257 | pci_memspace_mask = 0x7fffffffUL; |
| 252 | 258 | ||
| 253 | pci_fire_pbm_init(p, dp, portid); | 259 | if (pci_fire_pbm_init(p, dp, portid)) |
| 260 | goto fatal_memory_error; | ||
| 261 | |||
| 254 | return; | 262 | return; |
| 255 | 263 | ||
| 256 | fatal_memory_error: | 264 | fatal_memory_error: |
diff --git a/arch/sparc64/kernel/pci_psycho.c b/arch/sparc64/kernel/pci_psycho.c index 598393a2df16..b6b4cfea5b5f 100644 --- a/arch/sparc64/kernel/pci_psycho.c +++ b/arch/sparc64/kernel/pci_psycho.c | |||
| @@ -813,16 +813,19 @@ static void psycho_scan_bus(struct pci_pbm_info *pbm) | |||
| 813 | psycho_register_error_handlers(pbm); | 813 | psycho_register_error_handlers(pbm); |
| 814 | } | 814 | } |
| 815 | 815 | ||
| 816 | static void psycho_iommu_init(struct pci_pbm_info *pbm) | 816 | static int psycho_iommu_init(struct pci_pbm_info *pbm) |
| 817 | { | 817 | { |
| 818 | struct iommu *iommu = pbm->iommu; | 818 | struct iommu *iommu = pbm->iommu; |
| 819 | unsigned long i; | 819 | unsigned long i; |
| 820 | u64 control; | 820 | u64 control; |
| 821 | int err; | ||
| 821 | 822 | ||
| 822 | /* Register addresses. */ | 823 | /* Register addresses. */ |
| 823 | iommu->iommu_control = pbm->controller_regs + PSYCHO_IOMMU_CONTROL; | 824 | iommu->iommu_control = pbm->controller_regs + PSYCHO_IOMMU_CONTROL; |
| 824 | iommu->iommu_tsbbase = pbm->controller_regs + PSYCHO_IOMMU_TSBBASE; | 825 | iommu->iommu_tsbbase = pbm->controller_regs + PSYCHO_IOMMU_TSBBASE; |
| 825 | iommu->iommu_flush = pbm->controller_regs + PSYCHO_IOMMU_FLUSH; | 826 | iommu->iommu_flush = pbm->controller_regs + PSYCHO_IOMMU_FLUSH; |
| 827 | iommu->iommu_tags = iommu->iommu_flush + (0xa580UL - 0x0210UL); | ||
| 828 | |||
| 826 | /* PSYCHO's IOMMU lacks ctx flushing. */ | 829 | /* PSYCHO's IOMMU lacks ctx flushing. */ |
| 827 | iommu->iommu_ctxflush = 0; | 830 | iommu->iommu_ctxflush = 0; |
| 828 | 831 | ||
| @@ -845,7 +848,9 @@ static void psycho_iommu_init(struct pci_pbm_info *pbm) | |||
| 845 | /* Leave diag mode enabled for full-flushing done | 848 | /* Leave diag mode enabled for full-flushing done |
| 846 | * in pci_iommu.c | 849 | * in pci_iommu.c |
| 847 | */ | 850 | */ |
| 848 | pci_iommu_table_init(iommu, IO_TSB_SIZE, 0xc0000000, 0xffffffff); | 851 | err = iommu_table_init(iommu, IO_TSB_SIZE, 0xc0000000, 0xffffffff); |
| 852 | if (err) | ||
| 853 | return err; | ||
| 849 | 854 | ||
| 850 | psycho_write(pbm->controller_regs + PSYCHO_IOMMU_TSBBASE, | 855 | psycho_write(pbm->controller_regs + PSYCHO_IOMMU_TSBBASE, |
| 851 | __pa(iommu->page_table)); | 856 | __pa(iommu->page_table)); |
| @@ -858,6 +863,8 @@ static void psycho_iommu_init(struct pci_pbm_info *pbm) | |||
| 858 | /* If necessary, hook us up for starfire IRQ translations. */ | 863 | /* If necessary, hook us up for starfire IRQ translations. */ |
| 859 | if (this_is_starfire) | 864 | if (this_is_starfire) |
| 860 | starfire_hookup(pbm->portid); | 865 | starfire_hookup(pbm->portid); |
| 866 | |||
| 867 | return 0; | ||
| 861 | } | 868 | } |
| 862 | 869 | ||
| 863 | #define PSYCHO_IRQ_RETRY 0x1a00UL | 870 | #define PSYCHO_IRQ_RETRY 0x1a00UL |
| @@ -1031,15 +1038,12 @@ void psycho_init(struct device_node *dp, char *model_name) | |||
| 1031 | } | 1038 | } |
| 1032 | 1039 | ||
| 1033 | p = kzalloc(sizeof(struct pci_controller_info), GFP_ATOMIC); | 1040 | p = kzalloc(sizeof(struct pci_controller_info), GFP_ATOMIC); |
| 1034 | if (!p) { | 1041 | if (!p) |
| 1035 | prom_printf("PSYCHO: Fatal memory allocation error.\n"); | 1042 | goto fatal_memory_error; |
| 1036 | prom_halt(); | ||
| 1037 | } | ||
| 1038 | iommu = kzalloc(sizeof(struct iommu), GFP_ATOMIC); | 1043 | iommu = kzalloc(sizeof(struct iommu), GFP_ATOMIC); |
| 1039 | if (!iommu) { | 1044 | if (!iommu) |
| 1040 | prom_printf("PSYCHO: Fatal memory allocation error.\n"); | 1045 | goto fatal_memory_error; |
| 1041 | prom_halt(); | 1046 | |
| 1042 | } | ||
| 1043 | p->pbm_A.iommu = p->pbm_B.iommu = iommu; | 1047 | p->pbm_A.iommu = p->pbm_B.iommu = iommu; |
| 1044 | 1048 | ||
| 1045 | p->pbm_A.portid = upa_portid; | 1049 | p->pbm_A.portid = upa_portid; |
| @@ -1062,8 +1066,14 @@ void psycho_init(struct device_node *dp, char *model_name) | |||
| 1062 | 1066 | ||
| 1063 | psycho_controller_hwinit(&p->pbm_A); | 1067 | psycho_controller_hwinit(&p->pbm_A); |
| 1064 | 1068 | ||
| 1065 | psycho_iommu_init(&p->pbm_A); | 1069 | if (psycho_iommu_init(&p->pbm_A)) |
| 1070 | goto fatal_memory_error; | ||
| 1066 | 1071 | ||
| 1067 | is_pbm_a = ((pr_regs[0].phys_addr & 0x6000) == 0x2000); | 1072 | is_pbm_a = ((pr_regs[0].phys_addr & 0x6000) == 0x2000); |
| 1068 | psycho_pbm_init(p, dp, is_pbm_a); | 1073 | psycho_pbm_init(p, dp, is_pbm_a); |
| 1074 | return; | ||
| 1075 | |||
| 1076 | fatal_memory_error: | ||
| 1077 | prom_printf("PSYCHO: Fatal memory allocation error.\n"); | ||
| 1078 | prom_halt(); | ||
| 1069 | } | 1079 | } |
diff --git a/arch/sparc64/kernel/pci_sabre.c b/arch/sparc64/kernel/pci_sabre.c index 22e1be5c7489..fba67c3d8809 100644 --- a/arch/sparc64/kernel/pci_sabre.c +++ b/arch/sparc64/kernel/pci_sabre.c | |||
| @@ -672,18 +672,20 @@ static void sabre_scan_bus(struct pci_pbm_info *pbm) | |||
| 672 | sabre_register_error_handlers(pbm); | 672 | sabre_register_error_handlers(pbm); |
| 673 | } | 673 | } |
| 674 | 674 | ||
| 675 | static void sabre_iommu_init(struct pci_pbm_info *pbm, | 675 | static int sabre_iommu_init(struct pci_pbm_info *pbm, |
| 676 | int tsbsize, unsigned long dvma_offset, | 676 | int tsbsize, unsigned long dvma_offset, |
| 677 | u32 dma_mask) | 677 | u32 dma_mask) |
| 678 | { | 678 | { |
| 679 | struct iommu *iommu = pbm->iommu; | 679 | struct iommu *iommu = pbm->iommu; |
| 680 | unsigned long i; | 680 | unsigned long i; |
| 681 | u64 control; | 681 | u64 control; |
| 682 | int err; | ||
| 682 | 683 | ||
| 683 | /* Register addresses. */ | 684 | /* Register addresses. */ |
| 684 | iommu->iommu_control = pbm->controller_regs + SABRE_IOMMU_CONTROL; | 685 | iommu->iommu_control = pbm->controller_regs + SABRE_IOMMU_CONTROL; |
| 685 | iommu->iommu_tsbbase = pbm->controller_regs + SABRE_IOMMU_TSBBASE; | 686 | iommu->iommu_tsbbase = pbm->controller_regs + SABRE_IOMMU_TSBBASE; |
| 686 | iommu->iommu_flush = pbm->controller_regs + SABRE_IOMMU_FLUSH; | 687 | iommu->iommu_flush = pbm->controller_regs + SABRE_IOMMU_FLUSH; |
| 688 | iommu->iommu_tags = iommu->iommu_flush + (0xa580UL - 0x0210UL); | ||
| 687 | iommu->write_complete_reg = pbm->controller_regs + SABRE_WRSYNC; | 689 | iommu->write_complete_reg = pbm->controller_regs + SABRE_WRSYNC; |
| 688 | /* Sabre's IOMMU lacks ctx flushing. */ | 690 | /* Sabre's IOMMU lacks ctx flushing. */ |
| 689 | iommu->iommu_ctxflush = 0; | 691 | iommu->iommu_ctxflush = 0; |
| @@ -701,7 +703,10 @@ static void sabre_iommu_init(struct pci_pbm_info *pbm, | |||
| 701 | /* Leave diag mode enabled for full-flushing done | 703 | /* Leave diag mode enabled for full-flushing done |
| 702 | * in pci_iommu.c | 704 | * in pci_iommu.c |
| 703 | */ | 705 | */ |
| 704 | pci_iommu_table_init(iommu, tsbsize * 1024 * 8, dvma_offset, dma_mask); | 706 | err = iommu_table_init(iommu, tsbsize * 1024 * 8, |
| 707 | dvma_offset, dma_mask); | ||
| 708 | if (err) | ||
| 709 | return err; | ||
| 705 | 710 | ||
| 706 | sabre_write(pbm->controller_regs + SABRE_IOMMU_TSBBASE, | 711 | sabre_write(pbm->controller_regs + SABRE_IOMMU_TSBBASE, |
| 707 | __pa(iommu->page_table)); | 712 | __pa(iommu->page_table)); |
| @@ -722,6 +727,8 @@ static void sabre_iommu_init(struct pci_pbm_info *pbm, | |||
| 722 | break; | 727 | break; |
| 723 | } | 728 | } |
| 724 | sabre_write(pbm->controller_regs + SABRE_IOMMU_CONTROL, control); | 729 | sabre_write(pbm->controller_regs + SABRE_IOMMU_CONTROL, control); |
| 730 | |||
| 731 | return 0; | ||
| 725 | } | 732 | } |
| 726 | 733 | ||
| 727 | static void sabre_pbm_init(struct pci_controller_info *p, struct pci_pbm_info *pbm, struct device_node *dp) | 734 | static void sabre_pbm_init(struct pci_controller_info *p, struct pci_pbm_info *pbm, struct device_node *dp) |
| @@ -775,16 +782,12 @@ void sabre_init(struct device_node *dp, char *model_name) | |||
| 775 | } | 782 | } |
| 776 | 783 | ||
| 777 | p = kzalloc(sizeof(*p), GFP_ATOMIC); | 784 | p = kzalloc(sizeof(*p), GFP_ATOMIC); |
| 778 | if (!p) { | 785 | if (!p) |
| 779 | prom_printf("SABRE: Error, kmalloc(pci_controller_info) failed.\n"); | 786 | goto fatal_memory_error; |
| 780 | prom_halt(); | ||
| 781 | } | ||
| 782 | 787 | ||
| 783 | iommu = kzalloc(sizeof(*iommu), GFP_ATOMIC); | 788 | iommu = kzalloc(sizeof(*iommu), GFP_ATOMIC); |
| 784 | if (!iommu) { | 789 | if (!iommu) |
| 785 | prom_printf("SABRE: Error, kmalloc(pci_iommu) failed.\n"); | 790 | goto fatal_memory_error; |
| 786 | prom_halt(); | ||
| 787 | } | ||
| 788 | pbm = &p->pbm_A; | 791 | pbm = &p->pbm_A; |
| 789 | pbm->iommu = iommu; | 792 | pbm->iommu = iommu; |
| 790 | 793 | ||
| @@ -847,10 +850,16 @@ void sabre_init(struct device_node *dp, char *model_name) | |||
| 847 | prom_halt(); | 850 | prom_halt(); |
| 848 | } | 851 | } |
| 849 | 852 | ||
| 850 | sabre_iommu_init(pbm, tsbsize, vdma[0], dma_mask); | 853 | if (sabre_iommu_init(pbm, tsbsize, vdma[0], dma_mask)) |
| 854 | goto fatal_memory_error; | ||
| 851 | 855 | ||
| 852 | /* | 856 | /* |
| 853 | * Look for APB underneath. | 857 | * Look for APB underneath. |
| 854 | */ | 858 | */ |
| 855 | sabre_pbm_init(p, pbm, dp); | 859 | sabre_pbm_init(p, pbm, dp); |
| 860 | return; | ||
| 861 | |||
| 862 | fatal_memory_error: | ||
| 863 | prom_printf("SABRE: Fatal memory allocation error.\n"); | ||
| 864 | prom_halt(); | ||
| 856 | } | 865 | } |
diff --git a/arch/sparc64/kernel/pci_schizo.c b/arch/sparc64/kernel/pci_schizo.c index ae76898bbe2b..3c30bfa1f3a3 100644 --- a/arch/sparc64/kernel/pci_schizo.c +++ b/arch/sparc64/kernel/pci_schizo.c | |||
| @@ -1148,14 +1148,14 @@ static void schizo_pbm_strbuf_init(struct pci_pbm_info *pbm) | |||
| 1148 | #define SCHIZO_IOMMU_FLUSH (0x00210UL) | 1148 | #define SCHIZO_IOMMU_FLUSH (0x00210UL) |
| 1149 | #define SCHIZO_IOMMU_CTXFLUSH (0x00218UL) | 1149 | #define SCHIZO_IOMMU_CTXFLUSH (0x00218UL) |
| 1150 | 1150 | ||
| 1151 | static void schizo_pbm_iommu_init(struct pci_pbm_info *pbm) | 1151 | static int schizo_pbm_iommu_init(struct pci_pbm_info *pbm) |
| 1152 | { | 1152 | { |
| 1153 | struct iommu *iommu = pbm->iommu; | 1153 | struct iommu *iommu = pbm->iommu; |
| 1154 | unsigned long i, tagbase, database; | 1154 | unsigned long i, tagbase, database; |
| 1155 | struct property *prop; | 1155 | struct property *prop; |
| 1156 | u32 vdma[2], dma_mask; | 1156 | u32 vdma[2], dma_mask; |
| 1157 | int tsbsize, err; | ||
| 1157 | u64 control; | 1158 | u64 control; |
| 1158 | int tsbsize; | ||
| 1159 | 1159 | ||
| 1160 | prop = of_find_property(pbm->prom_node, "virtual-dma", NULL); | 1160 | prop = of_find_property(pbm->prom_node, "virtual-dma", NULL); |
| 1161 | if (prop) { | 1161 | if (prop) { |
| @@ -1195,6 +1195,7 @@ static void schizo_pbm_iommu_init(struct pci_pbm_info *pbm) | |||
| 1195 | iommu->iommu_control = pbm->pbm_regs + SCHIZO_IOMMU_CONTROL; | 1195 | iommu->iommu_control = pbm->pbm_regs + SCHIZO_IOMMU_CONTROL; |
| 1196 | iommu->iommu_tsbbase = pbm->pbm_regs + SCHIZO_IOMMU_TSBBASE; | 1196 | iommu->iommu_tsbbase = pbm->pbm_regs + SCHIZO_IOMMU_TSBBASE; |
| 1197 | iommu->iommu_flush = pbm->pbm_regs + SCHIZO_IOMMU_FLUSH; | 1197 | iommu->iommu_flush = pbm->pbm_regs + SCHIZO_IOMMU_FLUSH; |
| 1198 | iommu->iommu_tags = iommu->iommu_flush + (0xa580UL - 0x0210UL); | ||
| 1198 | iommu->iommu_ctxflush = pbm->pbm_regs + SCHIZO_IOMMU_CTXFLUSH; | 1199 | iommu->iommu_ctxflush = pbm->pbm_regs + SCHIZO_IOMMU_CTXFLUSH; |
| 1199 | 1200 | ||
| 1200 | /* We use the main control/status register of SCHIZO as the write | 1201 | /* We use the main control/status register of SCHIZO as the write |
| @@ -1219,7 +1220,9 @@ static void schizo_pbm_iommu_init(struct pci_pbm_info *pbm) | |||
| 1219 | /* Leave diag mode enabled for full-flushing done | 1220 | /* Leave diag mode enabled for full-flushing done |
| 1220 | * in pci_iommu.c | 1221 | * in pci_iommu.c |
| 1221 | */ | 1222 | */ |
| 1222 | pci_iommu_table_init(iommu, tsbsize * 8 * 1024, vdma[0], dma_mask); | 1223 | err = iommu_table_init(iommu, tsbsize * 8 * 1024, vdma[0], dma_mask); |
| 1224 | if (err) | ||
| 1225 | return err; | ||
| 1223 | 1226 | ||
| 1224 | schizo_write(iommu->iommu_tsbbase, __pa(iommu->page_table)); | 1227 | schizo_write(iommu->iommu_tsbbase, __pa(iommu->page_table)); |
| 1225 | 1228 | ||
| @@ -1236,6 +1239,8 @@ static void schizo_pbm_iommu_init(struct pci_pbm_info *pbm) | |||
| 1236 | 1239 | ||
| 1237 | control |= SCHIZO_IOMMU_CTRL_ENAB; | 1240 | control |= SCHIZO_IOMMU_CTRL_ENAB; |
| 1238 | schizo_write(iommu->iommu_control, control); | 1241 | schizo_write(iommu->iommu_control, control); |
| 1242 | |||
| 1243 | return 0; | ||
| 1239 | } | 1244 | } |
| 1240 | 1245 | ||
| 1241 | #define SCHIZO_PCI_IRQ_RETRY (0x1a00UL) | 1246 | #define SCHIZO_PCI_IRQ_RETRY (0x1a00UL) |
| @@ -1328,14 +1333,14 @@ static void schizo_pbm_hw_init(struct pci_pbm_info *pbm) | |||
| 1328 | } | 1333 | } |
| 1329 | } | 1334 | } |
| 1330 | 1335 | ||
| 1331 | static void schizo_pbm_init(struct pci_controller_info *p, | 1336 | static int schizo_pbm_init(struct pci_controller_info *p, |
| 1332 | struct device_node *dp, u32 portid, | 1337 | struct device_node *dp, u32 portid, |
| 1333 | int chip_type) | 1338 | int chip_type) |
| 1334 | { | 1339 | { |
| 1335 | const struct linux_prom64_registers *regs; | 1340 | const struct linux_prom64_registers *regs; |
| 1336 | struct pci_pbm_info *pbm; | 1341 | struct pci_pbm_info *pbm; |
| 1337 | const char *chipset_name; | 1342 | const char *chipset_name; |
| 1338 | int is_pbm_a; | 1343 | int is_pbm_a, err; |
| 1339 | 1344 | ||
| 1340 | switch (chip_type) { | 1345 | switch (chip_type) { |
| 1341 | case PBM_CHIP_TYPE_TOMATILLO: | 1346 | case PBM_CHIP_TYPE_TOMATILLO: |
| @@ -1406,8 +1411,13 @@ static void schizo_pbm_init(struct pci_controller_info *p, | |||
| 1406 | 1411 | ||
| 1407 | pci_get_pbm_props(pbm); | 1412 | pci_get_pbm_props(pbm); |
| 1408 | 1413 | ||
| 1409 | schizo_pbm_iommu_init(pbm); | 1414 | err = schizo_pbm_iommu_init(pbm); |
| 1415 | if (err) | ||
| 1416 | return err; | ||
| 1417 | |||
| 1410 | schizo_pbm_strbuf_init(pbm); | 1418 | schizo_pbm_strbuf_init(pbm); |
| 1419 | |||
| 1420 | return 0; | ||
| 1411 | } | 1421 | } |
| 1412 | 1422 | ||
| 1413 | static inline int portid_compare(u32 x, u32 y, int chip_type) | 1423 | static inline int portid_compare(u32 x, u32 y, int chip_type) |
| @@ -1431,34 +1441,38 @@ static void __schizo_init(struct device_node *dp, char *model_name, int chip_typ | |||
| 1431 | 1441 | ||
| 1432 | for (pbm = pci_pbm_root; pbm; pbm = pbm->next) { | 1442 | for (pbm = pci_pbm_root; pbm; pbm = pbm->next) { |
| 1433 | if (portid_compare(pbm->portid, portid, chip_type)) { | 1443 | if (portid_compare(pbm->portid, portid, chip_type)) { |
| 1434 | schizo_pbm_init(pbm->parent, dp, portid, chip_type); | 1444 | if (schizo_pbm_init(pbm->parent, dp, |
| 1445 | portid, chip_type)) | ||
| 1446 | goto fatal_memory_error; | ||
| 1435 | return; | 1447 | return; |
| 1436 | } | 1448 | } |
| 1437 | } | 1449 | } |
| 1438 | 1450 | ||
| 1439 | p = kzalloc(sizeof(struct pci_controller_info), GFP_ATOMIC); | 1451 | p = kzalloc(sizeof(struct pci_controller_info), GFP_ATOMIC); |
| 1440 | if (!p) | 1452 | if (!p) |
| 1441 | goto memfail; | 1453 | goto fatal_memory_error; |
| 1442 | 1454 | ||
| 1443 | iommu = kzalloc(sizeof(struct iommu), GFP_ATOMIC); | 1455 | iommu = kzalloc(sizeof(struct iommu), GFP_ATOMIC); |
| 1444 | if (!iommu) | 1456 | if (!iommu) |
| 1445 | goto memfail; | 1457 | goto fatal_memory_error; |
| 1446 | 1458 | ||
| 1447 | p->pbm_A.iommu = iommu; | 1459 | p->pbm_A.iommu = iommu; |
| 1448 | 1460 | ||
| 1449 | iommu = kzalloc(sizeof(struct iommu), GFP_ATOMIC); | 1461 | iommu = kzalloc(sizeof(struct iommu), GFP_ATOMIC); |
| 1450 | if (!iommu) | 1462 | if (!iommu) |
| 1451 | goto memfail; | 1463 | goto fatal_memory_error; |
| 1452 | 1464 | ||
| 1453 | p->pbm_B.iommu = iommu; | 1465 | p->pbm_B.iommu = iommu; |
| 1454 | 1466 | ||
| 1455 | /* Like PSYCHO we have a 2GB aligned area for memory space. */ | 1467 | /* Like PSYCHO we have a 2GB aligned area for memory space. */ |
| 1456 | pci_memspace_mask = 0x7fffffffUL; | 1468 | pci_memspace_mask = 0x7fffffffUL; |
| 1457 | 1469 | ||
| 1458 | schizo_pbm_init(p, dp, portid, chip_type); | 1470 | if (schizo_pbm_init(p, dp, portid, chip_type)) |
| 1471 | goto fatal_memory_error; | ||
| 1472 | |||
| 1459 | return; | 1473 | return; |
| 1460 | 1474 | ||
| 1461 | memfail: | 1475 | fatal_memory_error: |
| 1462 | prom_printf("SCHIZO: Fatal memory allocation error.\n"); | 1476 | prom_printf("SCHIZO: Fatal memory allocation error.\n"); |
| 1463 | prom_halt(); | 1477 | prom_halt(); |
| 1464 | } | 1478 | } |
diff --git a/arch/sparc64/kernel/pci_sun4v.c b/arch/sparc64/kernel/pci_sun4v.c index 639cf06ca372..466f4aa8fc82 100644 --- a/arch/sparc64/kernel/pci_sun4v.c +++ b/arch/sparc64/kernel/pci_sun4v.c | |||
| @@ -33,30 +33,30 @@ static unsigned long vpci_minor = 1; | |||
| 33 | #define PGLIST_NENTS (PAGE_SIZE / sizeof(u64)) | 33 | #define PGLIST_NENTS (PAGE_SIZE / sizeof(u64)) |
| 34 | 34 | ||
| 35 | struct iommu_batch { | 35 | struct iommu_batch { |
| 36 | struct pci_dev *pdev; /* Device mapping is for. */ | 36 | struct device *dev; /* Device mapping is for. */ |
| 37 | unsigned long prot; /* IOMMU page protections */ | 37 | unsigned long prot; /* IOMMU page protections */ |
| 38 | unsigned long entry; /* Index into IOTSB. */ | 38 | unsigned long entry; /* Index into IOTSB. */ |
| 39 | u64 *pglist; /* List of physical pages */ | 39 | u64 *pglist; /* List of physical pages */ |
| 40 | unsigned long npages; /* Number of pages in list. */ | 40 | unsigned long npages; /* Number of pages in list. */ |
| 41 | }; | 41 | }; |
| 42 | 42 | ||
| 43 | static DEFINE_PER_CPU(struct iommu_batch, pci_iommu_batch); | 43 | static DEFINE_PER_CPU(struct iommu_batch, iommu_batch); |
| 44 | 44 | ||
| 45 | /* Interrupts must be disabled. */ | 45 | /* Interrupts must be disabled. */ |
| 46 | static inline void pci_iommu_batch_start(struct pci_dev *pdev, unsigned long prot, unsigned long entry) | 46 | static inline void iommu_batch_start(struct device *dev, unsigned long prot, unsigned long entry) |
| 47 | { | 47 | { |
| 48 | struct iommu_batch *p = &__get_cpu_var(pci_iommu_batch); | 48 | struct iommu_batch *p = &__get_cpu_var(iommu_batch); |
| 49 | 49 | ||
| 50 | p->pdev = pdev; | 50 | p->dev = dev; |
| 51 | p->prot = prot; | 51 | p->prot = prot; |
| 52 | p->entry = entry; | 52 | p->entry = entry; |
| 53 | p->npages = 0; | 53 | p->npages = 0; |
| 54 | } | 54 | } |
| 55 | 55 | ||
| 56 | /* Interrupts must be disabled. */ | 56 | /* Interrupts must be disabled. */ |
| 57 | static long pci_iommu_batch_flush(struct iommu_batch *p) | 57 | static long iommu_batch_flush(struct iommu_batch *p) |
| 58 | { | 58 | { |
| 59 | struct pci_pbm_info *pbm = p->pdev->dev.archdata.host_controller; | 59 | struct pci_pbm_info *pbm = p->dev->archdata.host_controller; |
| 60 | unsigned long devhandle = pbm->devhandle; | 60 | unsigned long devhandle = pbm->devhandle; |
| 61 | unsigned long prot = p->prot; | 61 | unsigned long prot = p->prot; |
| 62 | unsigned long entry = p->entry; | 62 | unsigned long entry = p->entry; |
| @@ -70,7 +70,7 @@ static long pci_iommu_batch_flush(struct iommu_batch *p) | |||
| 70 | npages, prot, __pa(pglist)); | 70 | npages, prot, __pa(pglist)); |
| 71 | if (unlikely(num < 0)) { | 71 | if (unlikely(num < 0)) { |
| 72 | if (printk_ratelimit()) | 72 | if (printk_ratelimit()) |
| 73 | printk("pci_iommu_batch_flush: IOMMU map of " | 73 | printk("iommu_batch_flush: IOMMU map of " |
| 74 | "[%08lx:%08lx:%lx:%lx:%lx] failed with " | 74 | "[%08lx:%08lx:%lx:%lx:%lx] failed with " |
| 75 | "status %ld\n", | 75 | "status %ld\n", |
| 76 | devhandle, HV_PCI_TSBID(0, entry), | 76 | devhandle, HV_PCI_TSBID(0, entry), |
| @@ -90,30 +90,30 @@ static long pci_iommu_batch_flush(struct iommu_batch *p) | |||
| 90 | } | 90 | } |
| 91 | 91 | ||
| 92 | /* Interrupts must be disabled. */ | 92 | /* Interrupts must be disabled. */ |
| 93 | static inline long pci_iommu_batch_add(u64 phys_page) | 93 | static inline long iommu_batch_add(u64 phys_page) |
| 94 | { | 94 | { |
| 95 | struct iommu_batch *p = &__get_cpu_var(pci_iommu_batch); | 95 | struct iommu_batch *p = &__get_cpu_var(iommu_batch); |
| 96 | 96 | ||
| 97 | BUG_ON(p->npages >= PGLIST_NENTS); | 97 | BUG_ON(p->npages >= PGLIST_NENTS); |
| 98 | 98 | ||
| 99 | p->pglist[p->npages++] = phys_page; | 99 | p->pglist[p->npages++] = phys_page; |
| 100 | if (p->npages == PGLIST_NENTS) | 100 | if (p->npages == PGLIST_NENTS) |
| 101 | return pci_iommu_batch_flush(p); | 101 | return iommu_batch_flush(p); |
| 102 | 102 | ||
| 103 | return 0; | 103 | return 0; |
| 104 | } | 104 | } |
| 105 | 105 | ||
| 106 | /* Interrupts must be disabled. */ | 106 | /* Interrupts must be disabled. */ |
| 107 | static inline long pci_iommu_batch_end(void) | 107 | static inline long iommu_batch_end(void) |
| 108 | { | 108 | { |
| 109 | struct iommu_batch *p = &__get_cpu_var(pci_iommu_batch); | 109 | struct iommu_batch *p = &__get_cpu_var(iommu_batch); |
| 110 | 110 | ||
| 111 | BUG_ON(p->npages >= PGLIST_NENTS); | 111 | BUG_ON(p->npages >= PGLIST_NENTS); |
| 112 | 112 | ||
| 113 | return pci_iommu_batch_flush(p); | 113 | return iommu_batch_flush(p); |
| 114 | } | 114 | } |
| 115 | 115 | ||
| 116 | static long pci_arena_alloc(struct iommu_arena *arena, unsigned long npages) | 116 | static long arena_alloc(struct iommu_arena *arena, unsigned long npages) |
| 117 | { | 117 | { |
| 118 | unsigned long n, i, start, end, limit; | 118 | unsigned long n, i, start, end, limit; |
| 119 | int pass; | 119 | int pass; |
| @@ -152,7 +152,8 @@ again: | |||
| 152 | return n; | 152 | return n; |
| 153 | } | 153 | } |
| 154 | 154 | ||
| 155 | static void pci_arena_free(struct iommu_arena *arena, unsigned long base, unsigned long npages) | 155 | static void arena_free(struct iommu_arena *arena, unsigned long base, |
| 156 | unsigned long npages) | ||
| 156 | { | 157 | { |
| 157 | unsigned long i; | 158 | unsigned long i; |
| 158 | 159 | ||
| @@ -160,7 +161,8 @@ static void pci_arena_free(struct iommu_arena *arena, unsigned long base, unsign | |||
| 160 | __clear_bit(i, arena->map); | 161 | __clear_bit(i, arena->map); |
| 161 | } | 162 | } |
| 162 | 163 | ||
| 163 | static void *pci_4v_alloc_consistent(struct pci_dev *pdev, size_t size, dma_addr_t *dma_addrp, gfp_t gfp) | 164 | static void *dma_4v_alloc_coherent(struct device *dev, size_t size, |
| 165 | dma_addr_t *dma_addrp, gfp_t gfp) | ||
| 164 | { | 166 | { |
| 165 | struct iommu *iommu; | 167 | struct iommu *iommu; |
| 166 | unsigned long flags, order, first_page, npages, n; | 168 | unsigned long flags, order, first_page, npages, n; |
| @@ -180,10 +182,10 @@ static void *pci_4v_alloc_consistent(struct pci_dev *pdev, size_t size, dma_addr | |||
| 180 | 182 | ||
| 181 | memset((char *)first_page, 0, PAGE_SIZE << order); | 183 | memset((char *)first_page, 0, PAGE_SIZE << order); |
| 182 | 184 | ||
| 183 | iommu = pdev->dev.archdata.iommu; | 185 | iommu = dev->archdata.iommu; |
| 184 | 186 | ||
| 185 | spin_lock_irqsave(&iommu->lock, flags); | 187 | spin_lock_irqsave(&iommu->lock, flags); |
| 186 | entry = pci_arena_alloc(&iommu->arena, npages); | 188 | entry = arena_alloc(&iommu->arena, npages); |
| 187 | spin_unlock_irqrestore(&iommu->lock, flags); | 189 | spin_unlock_irqrestore(&iommu->lock, flags); |
| 188 | 190 | ||
| 189 | if (unlikely(entry < 0L)) | 191 | if (unlikely(entry < 0L)) |
| @@ -196,18 +198,18 @@ static void *pci_4v_alloc_consistent(struct pci_dev *pdev, size_t size, dma_addr | |||
| 196 | 198 | ||
| 197 | local_irq_save(flags); | 199 | local_irq_save(flags); |
| 198 | 200 | ||
| 199 | pci_iommu_batch_start(pdev, | 201 | iommu_batch_start(dev, |
| 200 | (HV_PCI_MAP_ATTR_READ | | 202 | (HV_PCI_MAP_ATTR_READ | |
| 201 | HV_PCI_MAP_ATTR_WRITE), | 203 | HV_PCI_MAP_ATTR_WRITE), |
| 202 | entry); | 204 | entry); |
| 203 | 205 | ||
| 204 | for (n = 0; n < npages; n++) { | 206 | for (n = 0; n < npages; n++) { |
| 205 | long err = pci_iommu_batch_add(first_page + (n * PAGE_SIZE)); | 207 | long err = iommu_batch_add(first_page + (n * PAGE_SIZE)); |
| 206 | if (unlikely(err < 0L)) | 208 | if (unlikely(err < 0L)) |
| 207 | goto iommu_map_fail; | 209 | goto iommu_map_fail; |
| 208 | } | 210 | } |
| 209 | 211 | ||
| 210 | if (unlikely(pci_iommu_batch_end() < 0L)) | 212 | if (unlikely(iommu_batch_end() < 0L)) |
| 211 | goto iommu_map_fail; | 213 | goto iommu_map_fail; |
| 212 | 214 | ||
| 213 | local_irq_restore(flags); | 215 | local_irq_restore(flags); |
| @@ -217,7 +219,7 @@ static void *pci_4v_alloc_consistent(struct pci_dev *pdev, size_t size, dma_addr | |||
| 217 | iommu_map_fail: | 219 | iommu_map_fail: |
| 218 | /* Interrupts are disabled. */ | 220 | /* Interrupts are disabled. */ |
| 219 | spin_lock(&iommu->lock); | 221 | spin_lock(&iommu->lock); |
| 220 | pci_arena_free(&iommu->arena, entry, npages); | 222 | arena_free(&iommu->arena, entry, npages); |
| 221 | spin_unlock_irqrestore(&iommu->lock, flags); | 223 | spin_unlock_irqrestore(&iommu->lock, flags); |
| 222 | 224 | ||
| 223 | arena_alloc_fail: | 225 | arena_alloc_fail: |
| @@ -225,7 +227,8 @@ arena_alloc_fail: | |||
| 225 | return NULL; | 227 | return NULL; |
| 226 | } | 228 | } |
| 227 | 229 | ||
| 228 | static void pci_4v_free_consistent(struct pci_dev *pdev, size_t size, void *cpu, dma_addr_t dvma) | 230 | static void dma_4v_free_coherent(struct device *dev, size_t size, void *cpu, |
| 231 | dma_addr_t dvma) | ||
| 229 | { | 232 | { |
| 230 | struct pci_pbm_info *pbm; | 233 | struct pci_pbm_info *pbm; |
| 231 | struct iommu *iommu; | 234 | struct iommu *iommu; |
| @@ -233,14 +236,14 @@ static void pci_4v_free_consistent(struct pci_dev *pdev, size_t size, void *cpu, | |||
| 233 | u32 devhandle; | 236 | u32 devhandle; |
| 234 | 237 | ||
| 235 | npages = IO_PAGE_ALIGN(size) >> IO_PAGE_SHIFT; | 238 | npages = IO_PAGE_ALIGN(size) >> IO_PAGE_SHIFT; |
| 236 | iommu = pdev->dev.archdata.iommu; | 239 | iommu = dev->archdata.iommu; |
| 237 | pbm = pdev->dev.archdata.host_controller; | 240 | pbm = dev->archdata.host_controller; |
| 238 | devhandle = pbm->devhandle; | 241 | devhandle = pbm->devhandle; |
| 239 | entry = ((dvma - iommu->page_table_map_base) >> IO_PAGE_SHIFT); | 242 | entry = ((dvma - iommu->page_table_map_base) >> IO_PAGE_SHIFT); |
| 240 | 243 | ||
| 241 | spin_lock_irqsave(&iommu->lock, flags); | 244 | spin_lock_irqsave(&iommu->lock, flags); |
| 242 | 245 | ||
| 243 | pci_arena_free(&iommu->arena, entry, npages); | 246 | arena_free(&iommu->arena, entry, npages); |
| 244 | 247 | ||
| 245 | do { | 248 | do { |
| 246 | unsigned long num; | 249 | unsigned long num; |
| @@ -258,7 +261,8 @@ static void pci_4v_free_consistent(struct pci_dev *pdev, size_t size, void *cpu, | |||
| 258 | free_pages((unsigned long)cpu, order); | 261 | free_pages((unsigned long)cpu, order); |
| 259 | } | 262 | } |
| 260 | 263 | ||
| 261 | static dma_addr_t pci_4v_map_single(struct pci_dev *pdev, void *ptr, size_t sz, int direction) | 264 | static dma_addr_t dma_4v_map_single(struct device *dev, void *ptr, size_t sz, |
| 265 | enum dma_data_direction direction) | ||
| 262 | { | 266 | { |
| 263 | struct iommu *iommu; | 267 | struct iommu *iommu; |
| 264 | unsigned long flags, npages, oaddr; | 268 | unsigned long flags, npages, oaddr; |
| @@ -267,9 +271,9 @@ static dma_addr_t pci_4v_map_single(struct pci_dev *pdev, void *ptr, size_t sz, | |||
| 267 | unsigned long prot; | 271 | unsigned long prot; |
| 268 | long entry; | 272 | long entry; |
| 269 | 273 | ||
| 270 | iommu = pdev->dev.archdata.iommu; | 274 | iommu = dev->archdata.iommu; |
| 271 | 275 | ||
| 272 | if (unlikely(direction == PCI_DMA_NONE)) | 276 | if (unlikely(direction == DMA_NONE)) |
| 273 | goto bad; | 277 | goto bad; |
| 274 | 278 | ||
| 275 | oaddr = (unsigned long)ptr; | 279 | oaddr = (unsigned long)ptr; |
| @@ -277,7 +281,7 @@ static dma_addr_t pci_4v_map_single(struct pci_dev *pdev, void *ptr, size_t sz, | |||
| 277 | npages >>= IO_PAGE_SHIFT; | 281 | npages >>= IO_PAGE_SHIFT; |
| 278 | 282 | ||
| 279 | spin_lock_irqsave(&iommu->lock, flags); | 283 | spin_lock_irqsave(&iommu->lock, flags); |
| 280 | entry = pci_arena_alloc(&iommu->arena, npages); | 284 | entry = arena_alloc(&iommu->arena, npages); |
| 281 | spin_unlock_irqrestore(&iommu->lock, flags); | 285 | spin_unlock_irqrestore(&iommu->lock, flags); |
| 282 | 286 | ||
| 283 | if (unlikely(entry < 0L)) | 287 | if (unlikely(entry < 0L)) |
| @@ -288,19 +292,19 @@ static dma_addr_t pci_4v_map_single(struct pci_dev *pdev, void *ptr, size_t sz, | |||
| 288 | ret = bus_addr | (oaddr & ~IO_PAGE_MASK); | 292 | ret = bus_addr | (oaddr & ~IO_PAGE_MASK); |
| 289 | base_paddr = __pa(oaddr & IO_PAGE_MASK); | 293 | base_paddr = __pa(oaddr & IO_PAGE_MASK); |
| 290 | prot = HV_PCI_MAP_ATTR_READ; | 294 | prot = HV_PCI_MAP_ATTR_READ; |
| 291 | if (direction != PCI_DMA_TODEVICE) | 295 | if (direction != DMA_TO_DEVICE) |
| 292 | prot |= HV_PCI_MAP_ATTR_WRITE; | 296 | prot |= HV_PCI_MAP_ATTR_WRITE; |
| 293 | 297 | ||
| 294 | local_irq_save(flags); | 298 | local_irq_save(flags); |
| 295 | 299 | ||
| 296 | pci_iommu_batch_start(pdev, prot, entry); | 300 | iommu_batch_start(dev, prot, entry); |
| 297 | 301 | ||
| 298 | for (i = 0; i < npages; i++, base_paddr += IO_PAGE_SIZE) { | 302 | for (i = 0; i < npages; i++, base_paddr += IO_PAGE_SIZE) { |
| 299 | long err = pci_iommu_batch_add(base_paddr); | 303 | long err = iommu_batch_add(base_paddr); |
| 300 | if (unlikely(err < 0L)) | 304 | if (unlikely(err < 0L)) |
| 301 | goto iommu_map_fail; | 305 | goto iommu_map_fail; |
| 302 | } | 306 | } |
| 303 | if (unlikely(pci_iommu_batch_end() < 0L)) | 307 | if (unlikely(iommu_batch_end() < 0L)) |
| 304 | goto iommu_map_fail; | 308 | goto iommu_map_fail; |
| 305 | 309 | ||
| 306 | local_irq_restore(flags); | 310 | local_irq_restore(flags); |
| @@ -310,18 +314,19 @@ static dma_addr_t pci_4v_map_single(struct pci_dev *pdev, void *ptr, size_t sz, | |||
| 310 | bad: | 314 | bad: |
| 311 | if (printk_ratelimit()) | 315 | if (printk_ratelimit()) |
| 312 | WARN_ON(1); | 316 | WARN_ON(1); |
| 313 | return PCI_DMA_ERROR_CODE; | 317 | return DMA_ERROR_CODE; |
| 314 | 318 | ||
| 315 | iommu_map_fail: | 319 | iommu_map_fail: |
| 316 | /* Interrupts are disabled. */ | 320 | /* Interrupts are disabled. */ |
| 317 | spin_lock(&iommu->lock); | 321 | spin_lock(&iommu->lock); |
| 318 | pci_arena_free(&iommu->arena, entry, npages); | 322 | arena_free(&iommu->arena, entry, npages); |
| 319 | spin_unlock_irqrestore(&iommu->lock, flags); | 323 | spin_unlock_irqrestore(&iommu->lock, flags); |
| 320 | 324 | ||
| 321 | return PCI_DMA_ERROR_CODE; | 325 | return DMA_ERROR_CODE; |
| 322 | } | 326 | } |
| 323 | 327 | ||
| 324 | static void pci_4v_unmap_single(struct pci_dev *pdev, dma_addr_t bus_addr, size_t sz, int direction) | 328 | static void dma_4v_unmap_single(struct device *dev, dma_addr_t bus_addr, |
| 329 | size_t sz, enum dma_data_direction direction) | ||
| 325 | { | 330 | { |
| 326 | struct pci_pbm_info *pbm; | 331 | struct pci_pbm_info *pbm; |
| 327 | struct iommu *iommu; | 332 | struct iommu *iommu; |
| @@ -329,14 +334,14 @@ static void pci_4v_unmap_single(struct pci_dev *pdev, dma_addr_t bus_addr, size_ | |||
| 329 | long entry; | 334 | long entry; |
| 330 | u32 devhandle; | 335 | u32 devhandle; |
| 331 | 336 | ||
| 332 | if (unlikely(direction == PCI_DMA_NONE)) { | 337 | if (unlikely(direction == DMA_NONE)) { |
| 333 | if (printk_ratelimit()) | 338 | if (printk_ratelimit()) |
| 334 | WARN_ON(1); | 339 | WARN_ON(1); |
| 335 | return; | 340 | return; |
| 336 | } | 341 | } |
| 337 | 342 | ||
| 338 | iommu = pdev->dev.archdata.iommu; | 343 | iommu = dev->archdata.iommu; |
| 339 | pbm = pdev->dev.archdata.host_controller; | 344 | pbm = dev->archdata.host_controller; |
| 340 | devhandle = pbm->devhandle; | 345 | devhandle = pbm->devhandle; |
| 341 | 346 | ||
| 342 | npages = IO_PAGE_ALIGN(bus_addr + sz) - (bus_addr & IO_PAGE_MASK); | 347 | npages = IO_PAGE_ALIGN(bus_addr + sz) - (bus_addr & IO_PAGE_MASK); |
| @@ -346,7 +351,7 @@ static void pci_4v_unmap_single(struct pci_dev *pdev, dma_addr_t bus_addr, size_ | |||
| 346 | spin_lock_irqsave(&iommu->lock, flags); | 351 | spin_lock_irqsave(&iommu->lock, flags); |
| 347 | 352 | ||
| 348 | entry = (bus_addr - iommu->page_table_map_base) >> IO_PAGE_SHIFT; | 353 | entry = (bus_addr - iommu->page_table_map_base) >> IO_PAGE_SHIFT; |
| 349 | pci_arena_free(&iommu->arena, entry, npages); | 354 | arena_free(&iommu->arena, entry, npages); |
| 350 | 355 | ||
| 351 | do { | 356 | do { |
| 352 | unsigned long num; | 357 | unsigned long num; |
| @@ -363,7 +368,7 @@ static void pci_4v_unmap_single(struct pci_dev *pdev, dma_addr_t bus_addr, size_ | |||
| 363 | #define SG_ENT_PHYS_ADDRESS(SG) \ | 368 | #define SG_ENT_PHYS_ADDRESS(SG) \ |
| 364 | (__pa(page_address((SG)->page)) + (SG)->offset) | 369 | (__pa(page_address((SG)->page)) + (SG)->offset) |
| 365 | 370 | ||
| 366 | static inline long fill_sg(long entry, struct pci_dev *pdev, | 371 | static inline long fill_sg(long entry, struct device *dev, |
| 367 | struct scatterlist *sg, | 372 | struct scatterlist *sg, |
| 368 | int nused, int nelems, unsigned long prot) | 373 | int nused, int nelems, unsigned long prot) |
| 369 | { | 374 | { |
| @@ -374,7 +379,7 @@ static inline long fill_sg(long entry, struct pci_dev *pdev, | |||
| 374 | 379 | ||
| 375 | local_irq_save(flags); | 380 | local_irq_save(flags); |
| 376 | 381 | ||
| 377 | pci_iommu_batch_start(pdev, prot, entry); | 382 | iommu_batch_start(dev, prot, entry); |
| 378 | 383 | ||
| 379 | for (i = 0; i < nused; i++) { | 384 | for (i = 0; i < nused; i++) { |
| 380 | unsigned long pteval = ~0UL; | 385 | unsigned long pteval = ~0UL; |
| @@ -415,7 +420,7 @@ static inline long fill_sg(long entry, struct pci_dev *pdev, | |||
| 415 | while (len > 0) { | 420 | while (len > 0) { |
| 416 | long err; | 421 | long err; |
| 417 | 422 | ||
| 418 | err = pci_iommu_batch_add(pteval); | 423 | err = iommu_batch_add(pteval); |
| 419 | if (unlikely(err < 0L)) | 424 | if (unlikely(err < 0L)) |
| 420 | goto iommu_map_failed; | 425 | goto iommu_map_failed; |
| 421 | 426 | ||
| @@ -446,7 +451,7 @@ static inline long fill_sg(long entry, struct pci_dev *pdev, | |||
| 446 | dma_sg++; | 451 | dma_sg++; |
| 447 | } | 452 | } |
| 448 | 453 | ||
| 449 | if (unlikely(pci_iommu_batch_end() < 0L)) | 454 | if (unlikely(iommu_batch_end() < 0L)) |
| 450 | goto iommu_map_failed; | 455 | goto iommu_map_failed; |
| 451 | 456 | ||
| 452 | local_irq_restore(flags); | 457 | local_irq_restore(flags); |
| @@ -457,7 +462,8 @@ iommu_map_failed: | |||
| 457 | return -1L; | 462 | return -1L; |
| 458 | } | 463 | } |
| 459 | 464 | ||
| 460 | static int pci_4v_map_sg(struct pci_dev *pdev, struct scatterlist *sglist, int nelems, int direction) | 465 | static int dma_4v_map_sg(struct device *dev, struct scatterlist *sglist, |
| 466 | int nelems, enum dma_data_direction direction) | ||
| 461 | { | 467 | { |
| 462 | struct iommu *iommu; | 468 | struct iommu *iommu; |
| 463 | unsigned long flags, npages, prot; | 469 | unsigned long flags, npages, prot; |
| @@ -469,18 +475,19 @@ static int pci_4v_map_sg(struct pci_dev *pdev, struct scatterlist *sglist, int n | |||
| 469 | /* Fast path single entry scatterlists. */ | 475 | /* Fast path single entry scatterlists. */ |
| 470 | if (nelems == 1) { | 476 | if (nelems == 1) { |
| 471 | sglist->dma_address = | 477 | sglist->dma_address = |
| 472 | pci_4v_map_single(pdev, | 478 | dma_4v_map_single(dev, |
| 473 | (page_address(sglist->page) + sglist->offset), | 479 | (page_address(sglist->page) + |
| 480 | sglist->offset), | ||
| 474 | sglist->length, direction); | 481 | sglist->length, direction); |
| 475 | if (unlikely(sglist->dma_address == PCI_DMA_ERROR_CODE)) | 482 | if (unlikely(sglist->dma_address == DMA_ERROR_CODE)) |
| 476 | return 0; | 483 | return 0; |
| 477 | sglist->dma_length = sglist->length; | 484 | sglist->dma_length = sglist->length; |
| 478 | return 1; | 485 | return 1; |
| 479 | } | 486 | } |
| 480 | 487 | ||
| 481 | iommu = pdev->dev.archdata.iommu; | 488 | iommu = dev->archdata.iommu; |
| 482 | 489 | ||
| 483 | if (unlikely(direction == PCI_DMA_NONE)) | 490 | if (unlikely(direction == DMA_NONE)) |
| 484 | goto bad; | 491 | goto bad; |
| 485 | 492 | ||
| 486 | /* Step 1: Prepare scatter list. */ | 493 | /* Step 1: Prepare scatter list. */ |
| @@ -488,7 +495,7 @@ static int pci_4v_map_sg(struct pci_dev *pdev, struct scatterlist *sglist, int n | |||
| 488 | 495 | ||
| 489 | /* Step 2: Allocate a cluster and context, if necessary. */ | 496 | /* Step 2: Allocate a cluster and context, if necessary. */ |
| 490 | spin_lock_irqsave(&iommu->lock, flags); | 497 | spin_lock_irqsave(&iommu->lock, flags); |
| 491 | entry = pci_arena_alloc(&iommu->arena, npages); | 498 | entry = arena_alloc(&iommu->arena, npages); |
| 492 | spin_unlock_irqrestore(&iommu->lock, flags); | 499 | spin_unlock_irqrestore(&iommu->lock, flags); |
| 493 | 500 | ||
| 494 | if (unlikely(entry < 0L)) | 501 | if (unlikely(entry < 0L)) |
| @@ -510,10 +517,10 @@ static int pci_4v_map_sg(struct pci_dev *pdev, struct scatterlist *sglist, int n | |||
| 510 | 517 | ||
| 511 | /* Step 4: Create the mappings. */ | 518 | /* Step 4: Create the mappings. */ |
| 512 | prot = HV_PCI_MAP_ATTR_READ; | 519 | prot = HV_PCI_MAP_ATTR_READ; |
| 513 | if (direction != PCI_DMA_TODEVICE) | 520 | if (direction != DMA_TO_DEVICE) |
| 514 | prot |= HV_PCI_MAP_ATTR_WRITE; | 521 | prot |= HV_PCI_MAP_ATTR_WRITE; |
| 515 | 522 | ||
| 516 | err = fill_sg(entry, pdev, sglist, used, nelems, prot); | 523 | err = fill_sg(entry, dev, sglist, used, nelems, prot); |
| 517 | if (unlikely(err < 0L)) | 524 | if (unlikely(err < 0L)) |
| 518 | goto iommu_map_failed; | 525 | goto iommu_map_failed; |
| 519 | 526 | ||
| @@ -526,13 +533,14 @@ bad: | |||
| 526 | 533 | ||
| 527 | iommu_map_failed: | 534 | iommu_map_failed: |
| 528 | spin_lock_irqsave(&iommu->lock, flags); | 535 | spin_lock_irqsave(&iommu->lock, flags); |
| 529 | pci_arena_free(&iommu->arena, entry, npages); | 536 | arena_free(&iommu->arena, entry, npages); |
| 530 | spin_unlock_irqrestore(&iommu->lock, flags); | 537 | spin_unlock_irqrestore(&iommu->lock, flags); |
| 531 | 538 | ||
| 532 | return 0; | 539 | return 0; |
| 533 | } | 540 | } |
| 534 | 541 | ||
| 535 | static void pci_4v_unmap_sg(struct pci_dev *pdev, struct scatterlist *sglist, int nelems, int direction) | 542 | static void dma_4v_unmap_sg(struct device *dev, struct scatterlist *sglist, |
| 543 | int nelems, enum dma_data_direction direction) | ||
| 536 | { | 544 | { |
| 537 | struct pci_pbm_info *pbm; | 545 | struct pci_pbm_info *pbm; |
| 538 | struct iommu *iommu; | 546 | struct iommu *iommu; |
| @@ -540,13 +548,13 @@ static void pci_4v_unmap_sg(struct pci_dev *pdev, struct scatterlist *sglist, in | |||
| 540 | long entry; | 548 | long entry; |
| 541 | u32 devhandle, bus_addr; | 549 | u32 devhandle, bus_addr; |
| 542 | 550 | ||
| 543 | if (unlikely(direction == PCI_DMA_NONE)) { | 551 | if (unlikely(direction == DMA_NONE)) { |
| 544 | if (printk_ratelimit()) | 552 | if (printk_ratelimit()) |
| 545 | WARN_ON(1); | 553 | WARN_ON(1); |
| 546 | } | 554 | } |
| 547 | 555 | ||
| 548 | iommu = pdev->dev.archdata.iommu; | 556 | iommu = dev->archdata.iommu; |
| 549 | pbm = pdev->dev.archdata.host_controller; | 557 | pbm = dev->archdata.host_controller; |
| 550 | devhandle = pbm->devhandle; | 558 | devhandle = pbm->devhandle; |
| 551 | 559 | ||
| 552 | bus_addr = sglist->dma_address & IO_PAGE_MASK; | 560 | bus_addr = sglist->dma_address & IO_PAGE_MASK; |
| @@ -562,7 +570,7 @@ static void pci_4v_unmap_sg(struct pci_dev *pdev, struct scatterlist *sglist, in | |||
| 562 | 570 | ||
| 563 | spin_lock_irqsave(&iommu->lock, flags); | 571 | spin_lock_irqsave(&iommu->lock, flags); |
| 564 | 572 | ||
| 565 | pci_arena_free(&iommu->arena, entry, npages); | 573 | arena_free(&iommu->arena, entry, npages); |
| 566 | 574 | ||
| 567 | do { | 575 | do { |
| 568 | unsigned long num; | 576 | unsigned long num; |
| @@ -576,25 +584,29 @@ static void pci_4v_unmap_sg(struct pci_dev *pdev, struct scatterlist *sglist, in | |||
| 576 | spin_unlock_irqrestore(&iommu->lock, flags); | 584 | spin_unlock_irqrestore(&iommu->lock, flags); |
| 577 | } | 585 | } |
| 578 | 586 | ||
| 579 | static void pci_4v_dma_sync_single_for_cpu(struct pci_dev *pdev, dma_addr_t bus_addr, size_t sz, int direction) | 587 | static void dma_4v_sync_single_for_cpu(struct device *dev, |
| 588 | dma_addr_t bus_addr, size_t sz, | ||
| 589 | enum dma_data_direction direction) | ||
| 580 | { | 590 | { |
| 581 | /* Nothing to do... */ | 591 | /* Nothing to do... */ |
| 582 | } | 592 | } |
| 583 | 593 | ||
| 584 | static void pci_4v_dma_sync_sg_for_cpu(struct pci_dev *pdev, struct scatterlist *sglist, int nelems, int direction) | 594 | static void dma_4v_sync_sg_for_cpu(struct device *dev, |
| 595 | struct scatterlist *sglist, int nelems, | ||
| 596 | enum dma_data_direction direction) | ||
| 585 | { | 597 | { |
| 586 | /* Nothing to do... */ | 598 | /* Nothing to do... */ |
| 587 | } | 599 | } |
| 588 | 600 | ||
| 589 | const struct pci_iommu_ops pci_sun4v_iommu_ops = { | 601 | const struct dma_ops sun4v_dma_ops = { |
| 590 | .alloc_consistent = pci_4v_alloc_consistent, | 602 | .alloc_coherent = dma_4v_alloc_coherent, |
| 591 | .free_consistent = pci_4v_free_consistent, | 603 | .free_coherent = dma_4v_free_coherent, |
| 592 | .map_single = pci_4v_map_single, | 604 | .map_single = dma_4v_map_single, |
| 593 | .unmap_single = pci_4v_unmap_single, | 605 | .unmap_single = dma_4v_unmap_single, |
| 594 | .map_sg = pci_4v_map_sg, | 606 | .map_sg = dma_4v_map_sg, |
| 595 | .unmap_sg = pci_4v_unmap_sg, | 607 | .unmap_sg = dma_4v_unmap_sg, |
| 596 | .dma_sync_single_for_cpu = pci_4v_dma_sync_single_for_cpu, | 608 | .sync_single_for_cpu = dma_4v_sync_single_for_cpu, |
| 597 | .dma_sync_sg_for_cpu = pci_4v_dma_sync_sg_for_cpu, | 609 | .sync_sg_for_cpu = dma_4v_sync_sg_for_cpu, |
| 598 | }; | 610 | }; |
| 599 | 611 | ||
| 600 | static void pci_sun4v_scan_bus(struct pci_pbm_info *pbm) | 612 | static void pci_sun4v_scan_bus(struct pci_pbm_info *pbm) |
| @@ -1186,6 +1198,8 @@ void __init sun4v_pci_init(struct device_node *dp, char *model_name) | |||
| 1186 | } | 1198 | } |
| 1187 | printk("SUN4V_PCI: Registered hvapi major[%lu] minor[%lu]\n", | 1199 | printk("SUN4V_PCI: Registered hvapi major[%lu] minor[%lu]\n", |
| 1188 | vpci_major, vpci_minor); | 1200 | vpci_major, vpci_minor); |
| 1201 | |||
| 1202 | dma_ops = &sun4v_dma_ops; | ||
| 1189 | } | 1203 | } |
| 1190 | 1204 | ||
| 1191 | prop = of_find_property(dp, "reg", NULL); | 1205 | prop = of_find_property(dp, "reg", NULL); |
| @@ -1206,7 +1220,7 @@ void __init sun4v_pci_init(struct device_node *dp, char *model_name) | |||
| 1206 | if (!page) | 1220 | if (!page) |
| 1207 | goto fatal_memory_error; | 1221 | goto fatal_memory_error; |
| 1208 | 1222 | ||
| 1209 | per_cpu(pci_iommu_batch, i).pglist = (u64 *) page; | 1223 | per_cpu(iommu_batch, i).pglist = (u64 *) page; |
| 1210 | } | 1224 | } |
| 1211 | 1225 | ||
| 1212 | p = kzalloc(sizeof(struct pci_controller_info), GFP_ATOMIC); | 1226 | p = kzalloc(sizeof(struct pci_controller_info), GFP_ATOMIC); |
diff --git a/arch/sparc64/kernel/sbus.c b/arch/sparc64/kernel/sbus.c index a1fd9bcc0b87..d1fb13ba02b5 100644 --- a/arch/sparc64/kernel/sbus.c +++ b/arch/sparc64/kernel/sbus.c | |||
| @@ -26,11 +26,6 @@ | |||
| 26 | 26 | ||
| 27 | #define MAP_BASE ((u32)0xc0000000) | 27 | #define MAP_BASE ((u32)0xc0000000) |
| 28 | 28 | ||
| 29 | struct sbus_info { | ||
| 30 | struct iommu iommu; | ||
| 31 | struct strbuf strbuf; | ||
| 32 | }; | ||
| 33 | |||
| 34 | /* Offsets from iommu_regs */ | 29 | /* Offsets from iommu_regs */ |
| 35 | #define SYSIO_IOMMUREG_BASE 0x2400UL | 30 | #define SYSIO_IOMMUREG_BASE 0x2400UL |
| 36 | #define IOMMU_CONTROL (0x2400UL - 0x2400UL) /* IOMMU control register */ | 31 | #define IOMMU_CONTROL (0x2400UL - 0x2400UL) /* IOMMU control register */ |
| @@ -44,19 +39,6 @@ struct sbus_info { | |||
| 44 | 39 | ||
| 45 | #define IOMMU_DRAM_VALID (1UL << 30UL) | 40 | #define IOMMU_DRAM_VALID (1UL << 30UL) |
| 46 | 41 | ||
| 47 | static void __iommu_flushall(struct iommu *iommu) | ||
| 48 | { | ||
| 49 | unsigned long tag; | ||
| 50 | int entry; | ||
| 51 | |||
| 52 | tag = iommu->iommu_control + (IOMMU_TAGDIAG - IOMMU_CONTROL); | ||
| 53 | for (entry = 0; entry < 16; entry++) { | ||
| 54 | upa_writeq(0, tag); | ||
| 55 | tag += 8UL; | ||
| 56 | } | ||
| 57 | upa_readq(iommu->write_complete_reg); | ||
| 58 | } | ||
| 59 | |||
| 60 | /* Offsets from strbuf_regs */ | 42 | /* Offsets from strbuf_regs */ |
| 61 | #define SYSIO_STRBUFREG_BASE 0x2800UL | 43 | #define SYSIO_STRBUFREG_BASE 0x2800UL |
| 62 | #define STRBUF_CONTROL (0x2800UL - 0x2800UL) /* Control */ | 44 | #define STRBUF_CONTROL (0x2800UL - 0x2800UL) /* Control */ |
| @@ -69,511 +51,10 @@ static void __iommu_flushall(struct iommu *iommu) | |||
| 69 | 51 | ||
| 70 | #define STRBUF_TAG_VALID 0x02UL | 52 | #define STRBUF_TAG_VALID 0x02UL |
| 71 | 53 | ||
| 72 | static void sbus_strbuf_flush(struct iommu *iommu, struct strbuf *strbuf, u32 base, unsigned long npages, int direction) | ||
| 73 | { | ||
| 74 | unsigned long n; | ||
| 75 | int limit; | ||
| 76 | |||
| 77 | n = npages; | ||
| 78 | while (n--) | ||
| 79 | upa_writeq(base + (n << IO_PAGE_SHIFT), strbuf->strbuf_pflush); | ||
| 80 | |||
| 81 | /* If the device could not have possibly put dirty data into | ||
| 82 | * the streaming cache, no flush-flag synchronization needs | ||
| 83 | * to be performed. | ||
| 84 | */ | ||
| 85 | if (direction == SBUS_DMA_TODEVICE) | ||
| 86 | return; | ||
| 87 | |||
| 88 | *(strbuf->strbuf_flushflag) = 0UL; | ||
| 89 | |||
| 90 | /* Whoopee cushion! */ | ||
| 91 | upa_writeq(strbuf->strbuf_flushflag_pa, strbuf->strbuf_fsync); | ||
| 92 | upa_readq(iommu->write_complete_reg); | ||
| 93 | |||
| 94 | limit = 100000; | ||
| 95 | while (*(strbuf->strbuf_flushflag) == 0UL) { | ||
| 96 | limit--; | ||
| 97 | if (!limit) | ||
| 98 | break; | ||
| 99 | udelay(1); | ||
| 100 | rmb(); | ||
| 101 | } | ||
| 102 | if (!limit) | ||
| 103 | printk(KERN_WARNING "sbus_strbuf_flush: flushflag timeout " | ||
| 104 | "vaddr[%08x] npages[%ld]\n", | ||
| 105 | base, npages); | ||
| 106 | } | ||
| 107 | |||
| 108 | /* Based largely upon the ppc64 iommu allocator. */ | ||
| 109 | static long sbus_arena_alloc(struct iommu *iommu, unsigned long npages) | ||
| 110 | { | ||
| 111 | struct iommu_arena *arena = &iommu->arena; | ||
| 112 | unsigned long n, i, start, end, limit; | ||
| 113 | int pass; | ||
| 114 | |||
| 115 | limit = arena->limit; | ||
| 116 | start = arena->hint; | ||
| 117 | pass = 0; | ||
| 118 | |||
| 119 | again: | ||
| 120 | n = find_next_zero_bit(arena->map, limit, start); | ||
| 121 | end = n + npages; | ||
| 122 | if (unlikely(end >= limit)) { | ||
| 123 | if (likely(pass < 1)) { | ||
| 124 | limit = start; | ||
| 125 | start = 0; | ||
| 126 | __iommu_flushall(iommu); | ||
| 127 | pass++; | ||
| 128 | goto again; | ||
| 129 | } else { | ||
| 130 | /* Scanned the whole thing, give up. */ | ||
| 131 | return -1; | ||
| 132 | } | ||
| 133 | } | ||
| 134 | |||
| 135 | for (i = n; i < end; i++) { | ||
| 136 | if (test_bit(i, arena->map)) { | ||
| 137 | start = i + 1; | ||
| 138 | goto again; | ||
| 139 | } | ||
| 140 | } | ||
| 141 | |||
| 142 | for (i = n; i < end; i++) | ||
| 143 | __set_bit(i, arena->map); | ||
| 144 | |||
| 145 | arena->hint = end; | ||
| 146 | |||
| 147 | return n; | ||
| 148 | } | ||
| 149 | |||
| 150 | static void sbus_arena_free(struct iommu_arena *arena, unsigned long base, unsigned long npages) | ||
| 151 | { | ||
| 152 | unsigned long i; | ||
| 153 | |||
| 154 | for (i = base; i < (base + npages); i++) | ||
| 155 | __clear_bit(i, arena->map); | ||
| 156 | } | ||
| 157 | |||
| 158 | static void sbus_iommu_table_init(struct iommu *iommu, unsigned int tsbsize) | ||
| 159 | { | ||
| 160 | unsigned long tsbbase, order, sz, num_tsb_entries; | ||
| 161 | |||
| 162 | num_tsb_entries = tsbsize / sizeof(iopte_t); | ||
| 163 | |||
| 164 | /* Setup initial software IOMMU state. */ | ||
| 165 | spin_lock_init(&iommu->lock); | ||
| 166 | iommu->page_table_map_base = MAP_BASE; | ||
| 167 | |||
| 168 | /* Allocate and initialize the free area map. */ | ||
| 169 | sz = num_tsb_entries / 8; | ||
| 170 | sz = (sz + 7UL) & ~7UL; | ||
| 171 | iommu->arena.map = kzalloc(sz, GFP_KERNEL); | ||
| 172 | if (!iommu->arena.map) { | ||
| 173 | prom_printf("SBUS_IOMMU: Error, kmalloc(arena.map) failed.\n"); | ||
| 174 | prom_halt(); | ||
| 175 | } | ||
| 176 | iommu->arena.limit = num_tsb_entries; | ||
| 177 | |||
| 178 | /* Now allocate and setup the IOMMU page table itself. */ | ||
| 179 | order = get_order(tsbsize); | ||
| 180 | tsbbase = __get_free_pages(GFP_KERNEL, order); | ||
| 181 | if (!tsbbase) { | ||
| 182 | prom_printf("IOMMU: Error, gfp(tsb) failed.\n"); | ||
| 183 | prom_halt(); | ||
| 184 | } | ||
| 185 | iommu->page_table = (iopte_t *)tsbbase; | ||
| 186 | memset(iommu->page_table, 0, tsbsize); | ||
| 187 | } | ||
| 188 | |||
| 189 | static inline iopte_t *alloc_npages(struct iommu *iommu, unsigned long npages) | ||
| 190 | { | ||
| 191 | long entry; | ||
| 192 | |||
| 193 | entry = sbus_arena_alloc(iommu, npages); | ||
| 194 | if (unlikely(entry < 0)) | ||
| 195 | return NULL; | ||
| 196 | |||
| 197 | return iommu->page_table + entry; | ||
| 198 | } | ||
| 199 | |||
| 200 | static inline void free_npages(struct iommu *iommu, dma_addr_t base, unsigned long npages) | ||
| 201 | { | ||
| 202 | sbus_arena_free(&iommu->arena, base >> IO_PAGE_SHIFT, npages); | ||
| 203 | } | ||
| 204 | |||
| 205 | void *sbus_alloc_consistent(struct sbus_dev *sdev, size_t size, dma_addr_t *dvma_addr) | ||
| 206 | { | ||
| 207 | struct sbus_info *info; | ||
| 208 | struct iommu *iommu; | ||
| 209 | iopte_t *iopte; | ||
| 210 | unsigned long flags, order, first_page; | ||
| 211 | void *ret; | ||
| 212 | int npages; | ||
| 213 | |||
| 214 | size = IO_PAGE_ALIGN(size); | ||
| 215 | order = get_order(size); | ||
| 216 | if (order >= 10) | ||
| 217 | return NULL; | ||
| 218 | |||
| 219 | first_page = __get_free_pages(GFP_KERNEL|__GFP_COMP, order); | ||
| 220 | if (first_page == 0UL) | ||
| 221 | return NULL; | ||
| 222 | memset((char *)first_page, 0, PAGE_SIZE << order); | ||
| 223 | |||
| 224 | info = sdev->bus->iommu; | ||
| 225 | iommu = &info->iommu; | ||
| 226 | |||
| 227 | spin_lock_irqsave(&iommu->lock, flags); | ||
| 228 | iopte = alloc_npages(iommu, size >> IO_PAGE_SHIFT); | ||
| 229 | spin_unlock_irqrestore(&iommu->lock, flags); | ||
| 230 | |||
| 231 | if (unlikely(iopte == NULL)) { | ||
| 232 | free_pages(first_page, order); | ||
| 233 | return NULL; | ||
| 234 | } | ||
| 235 | |||
| 236 | *dvma_addr = (iommu->page_table_map_base + | ||
| 237 | ((iopte - iommu->page_table) << IO_PAGE_SHIFT)); | ||
| 238 | ret = (void *) first_page; | ||
| 239 | npages = size >> IO_PAGE_SHIFT; | ||
| 240 | first_page = __pa(first_page); | ||
| 241 | while (npages--) { | ||
| 242 | iopte_val(*iopte) = (IOPTE_VALID | IOPTE_CACHE | | ||
| 243 | IOPTE_WRITE | | ||
| 244 | (first_page & IOPTE_PAGE)); | ||
| 245 | iopte++; | ||
| 246 | first_page += IO_PAGE_SIZE; | ||
| 247 | } | ||
| 248 | |||
| 249 | return ret; | ||
| 250 | } | ||
| 251 | |||
| 252 | void sbus_free_consistent(struct sbus_dev *sdev, size_t size, void *cpu, dma_addr_t dvma) | ||
| 253 | { | ||
| 254 | struct sbus_info *info; | ||
| 255 | struct iommu *iommu; | ||
| 256 | iopte_t *iopte; | ||
| 257 | unsigned long flags, order, npages; | ||
| 258 | |||
| 259 | npages = IO_PAGE_ALIGN(size) >> IO_PAGE_SHIFT; | ||
| 260 | info = sdev->bus->iommu; | ||
| 261 | iommu = &info->iommu; | ||
| 262 | iopte = iommu->page_table + | ||
| 263 | ((dvma - iommu->page_table_map_base) >> IO_PAGE_SHIFT); | ||
| 264 | |||
| 265 | spin_lock_irqsave(&iommu->lock, flags); | ||
| 266 | |||
| 267 | free_npages(iommu, dvma - iommu->page_table_map_base, npages); | ||
| 268 | |||
| 269 | spin_unlock_irqrestore(&iommu->lock, flags); | ||
| 270 | |||
| 271 | order = get_order(size); | ||
| 272 | if (order < 10) | ||
| 273 | free_pages((unsigned long)cpu, order); | ||
| 274 | } | ||
| 275 | |||
| 276 | dma_addr_t sbus_map_single(struct sbus_dev *sdev, void *ptr, size_t sz, int direction) | ||
| 277 | { | ||
| 278 | struct sbus_info *info; | ||
| 279 | struct iommu *iommu; | ||
| 280 | iopte_t *base; | ||
| 281 | unsigned long flags, npages, oaddr; | ||
| 282 | unsigned long i, base_paddr; | ||
| 283 | u32 bus_addr, ret; | ||
| 284 | unsigned long iopte_protection; | ||
| 285 | |||
| 286 | info = sdev->bus->iommu; | ||
| 287 | iommu = &info->iommu; | ||
| 288 | |||
| 289 | if (unlikely(direction == SBUS_DMA_NONE)) | ||
| 290 | BUG(); | ||
| 291 | |||
| 292 | oaddr = (unsigned long)ptr; | ||
| 293 | npages = IO_PAGE_ALIGN(oaddr + sz) - (oaddr & IO_PAGE_MASK); | ||
| 294 | npages >>= IO_PAGE_SHIFT; | ||
| 295 | |||
| 296 | spin_lock_irqsave(&iommu->lock, flags); | ||
| 297 | base = alloc_npages(iommu, npages); | ||
| 298 | spin_unlock_irqrestore(&iommu->lock, flags); | ||
| 299 | |||
| 300 | if (unlikely(!base)) | ||
| 301 | BUG(); | ||
| 302 | |||
| 303 | bus_addr = (iommu->page_table_map_base + | ||
| 304 | ((base - iommu->page_table) << IO_PAGE_SHIFT)); | ||
| 305 | ret = bus_addr | (oaddr & ~IO_PAGE_MASK); | ||
| 306 | base_paddr = __pa(oaddr & IO_PAGE_MASK); | ||
| 307 | |||
| 308 | iopte_protection = IOPTE_VALID | IOPTE_STBUF | IOPTE_CACHE; | ||
| 309 | if (direction != SBUS_DMA_TODEVICE) | ||
| 310 | iopte_protection |= IOPTE_WRITE; | ||
| 311 | |||
| 312 | for (i = 0; i < npages; i++, base++, base_paddr += IO_PAGE_SIZE) | ||
| 313 | iopte_val(*base) = iopte_protection | base_paddr; | ||
| 314 | |||
| 315 | return ret; | ||
| 316 | } | ||
| 317 | |||
| 318 | void sbus_unmap_single(struct sbus_dev *sdev, dma_addr_t bus_addr, size_t sz, int direction) | ||
| 319 | { | ||
| 320 | struct sbus_info *info = sdev->bus->iommu; | ||
| 321 | struct iommu *iommu = &info->iommu; | ||
| 322 | struct strbuf *strbuf = &info->strbuf; | ||
| 323 | iopte_t *base; | ||
| 324 | unsigned long flags, npages, i; | ||
| 325 | |||
| 326 | if (unlikely(direction == SBUS_DMA_NONE)) | ||
| 327 | BUG(); | ||
| 328 | |||
| 329 | npages = IO_PAGE_ALIGN(bus_addr + sz) - (bus_addr & IO_PAGE_MASK); | ||
| 330 | npages >>= IO_PAGE_SHIFT; | ||
| 331 | base = iommu->page_table + | ||
| 332 | ((bus_addr - iommu->page_table_map_base) >> IO_PAGE_SHIFT); | ||
| 333 | |||
| 334 | bus_addr &= IO_PAGE_MASK; | ||
| 335 | |||
| 336 | spin_lock_irqsave(&iommu->lock, flags); | ||
| 337 | sbus_strbuf_flush(iommu, strbuf, bus_addr, npages, direction); | ||
| 338 | for (i = 0; i < npages; i++) | ||
| 339 | iopte_val(base[i]) = 0UL; | ||
| 340 | free_npages(iommu, bus_addr - iommu->page_table_map_base, npages); | ||
| 341 | spin_unlock_irqrestore(&iommu->lock, flags); | ||
| 342 | } | ||
| 343 | |||
| 344 | #define SG_ENT_PHYS_ADDRESS(SG) \ | ||
| 345 | (__pa(page_address((SG)->page)) + (SG)->offset) | ||
| 346 | |||
| 347 | static inline void fill_sg(iopte_t *iopte, struct scatterlist *sg, | ||
| 348 | int nused, int nelems, unsigned long iopte_protection) | ||
| 349 | { | ||
| 350 | struct scatterlist *dma_sg = sg; | ||
| 351 | struct scatterlist *sg_end = sg + nelems; | ||
| 352 | int i; | ||
| 353 | |||
| 354 | for (i = 0; i < nused; i++) { | ||
| 355 | unsigned long pteval = ~0UL; | ||
| 356 | u32 dma_npages; | ||
| 357 | |||
| 358 | dma_npages = ((dma_sg->dma_address & (IO_PAGE_SIZE - 1UL)) + | ||
| 359 | dma_sg->dma_length + | ||
| 360 | ((IO_PAGE_SIZE - 1UL))) >> IO_PAGE_SHIFT; | ||
| 361 | do { | ||
| 362 | unsigned long offset; | ||
| 363 | signed int len; | ||
| 364 | |||
| 365 | /* If we are here, we know we have at least one | ||
| 366 | * more page to map. So walk forward until we | ||
| 367 | * hit a page crossing, and begin creating new | ||
| 368 | * mappings from that spot. | ||
| 369 | */ | ||
| 370 | for (;;) { | ||
| 371 | unsigned long tmp; | ||
| 372 | |||
| 373 | tmp = SG_ENT_PHYS_ADDRESS(sg); | ||
| 374 | len = sg->length; | ||
| 375 | if (((tmp ^ pteval) >> IO_PAGE_SHIFT) != 0UL) { | ||
| 376 | pteval = tmp & IO_PAGE_MASK; | ||
| 377 | offset = tmp & (IO_PAGE_SIZE - 1UL); | ||
| 378 | break; | ||
| 379 | } | ||
| 380 | if (((tmp ^ (tmp + len - 1UL)) >> IO_PAGE_SHIFT) != 0UL) { | ||
| 381 | pteval = (tmp + IO_PAGE_SIZE) & IO_PAGE_MASK; | ||
| 382 | offset = 0UL; | ||
| 383 | len -= (IO_PAGE_SIZE - (tmp & (IO_PAGE_SIZE - 1UL))); | ||
| 384 | break; | ||
| 385 | } | ||
| 386 | sg++; | ||
| 387 | } | ||
| 388 | |||
| 389 | pteval = iopte_protection | (pteval & IOPTE_PAGE); | ||
| 390 | while (len > 0) { | ||
| 391 | *iopte++ = __iopte(pteval); | ||
| 392 | pteval += IO_PAGE_SIZE; | ||
| 393 | len -= (IO_PAGE_SIZE - offset); | ||
| 394 | offset = 0; | ||
| 395 | dma_npages--; | ||
| 396 | } | ||
| 397 | |||
| 398 | pteval = (pteval & IOPTE_PAGE) + len; | ||
| 399 | sg++; | ||
| 400 | |||
| 401 | /* Skip over any tail mappings we've fully mapped, | ||
| 402 | * adjusting pteval along the way. Stop when we | ||
| 403 | * detect a page crossing event. | ||
| 404 | */ | ||
| 405 | while (sg < sg_end && | ||
| 406 | (pteval << (64 - IO_PAGE_SHIFT)) != 0UL && | ||
| 407 | (pteval == SG_ENT_PHYS_ADDRESS(sg)) && | ||
| 408 | ((pteval ^ | ||
| 409 | (SG_ENT_PHYS_ADDRESS(sg) + sg->length - 1UL)) >> IO_PAGE_SHIFT) == 0UL) { | ||
| 410 | pteval += sg->length; | ||
| 411 | sg++; | ||
| 412 | } | ||
| 413 | if ((pteval << (64 - IO_PAGE_SHIFT)) == 0UL) | ||
| 414 | pteval = ~0UL; | ||
| 415 | } while (dma_npages != 0); | ||
| 416 | dma_sg++; | ||
| 417 | } | ||
| 418 | } | ||
| 419 | |||
| 420 | int sbus_map_sg(struct sbus_dev *sdev, struct scatterlist *sglist, int nelems, int direction) | ||
| 421 | { | ||
| 422 | struct sbus_info *info; | ||
| 423 | struct iommu *iommu; | ||
| 424 | unsigned long flags, npages, iopte_protection; | ||
| 425 | iopte_t *base; | ||
| 426 | u32 dma_base; | ||
| 427 | struct scatterlist *sgtmp; | ||
| 428 | int used; | ||
| 429 | |||
| 430 | /* Fast path single entry scatterlists. */ | ||
| 431 | if (nelems == 1) { | ||
| 432 | sglist->dma_address = | ||
| 433 | sbus_map_single(sdev, | ||
| 434 | (page_address(sglist->page) + sglist->offset), | ||
| 435 | sglist->length, direction); | ||
| 436 | sglist->dma_length = sglist->length; | ||
| 437 | return 1; | ||
| 438 | } | ||
| 439 | |||
| 440 | info = sdev->bus->iommu; | ||
| 441 | iommu = &info->iommu; | ||
| 442 | |||
| 443 | if (unlikely(direction == SBUS_DMA_NONE)) | ||
| 444 | BUG(); | ||
| 445 | |||
| 446 | npages = prepare_sg(sglist, nelems); | ||
| 447 | |||
| 448 | spin_lock_irqsave(&iommu->lock, flags); | ||
| 449 | base = alloc_npages(iommu, npages); | ||
| 450 | spin_unlock_irqrestore(&iommu->lock, flags); | ||
| 451 | |||
| 452 | if (unlikely(base == NULL)) | ||
| 453 | BUG(); | ||
| 454 | |||
| 455 | dma_base = iommu->page_table_map_base + | ||
| 456 | ((base - iommu->page_table) << IO_PAGE_SHIFT); | ||
| 457 | |||
| 458 | /* Normalize DVMA addresses. */ | ||
| 459 | used = nelems; | ||
| 460 | |||
| 461 | sgtmp = sglist; | ||
| 462 | while (used && sgtmp->dma_length) { | ||
| 463 | sgtmp->dma_address += dma_base; | ||
| 464 | sgtmp++; | ||
| 465 | used--; | ||
| 466 | } | ||
| 467 | used = nelems - used; | ||
| 468 | |||
| 469 | iopte_protection = IOPTE_VALID | IOPTE_STBUF | IOPTE_CACHE; | ||
| 470 | if (direction != SBUS_DMA_TODEVICE) | ||
| 471 | iopte_protection |= IOPTE_WRITE; | ||
| 472 | |||
| 473 | fill_sg(base, sglist, used, nelems, iopte_protection); | ||
| 474 | |||
| 475 | #ifdef VERIFY_SG | ||
| 476 | verify_sglist(sglist, nelems, base, npages); | ||
| 477 | #endif | ||
| 478 | |||
| 479 | return used; | ||
| 480 | } | ||
| 481 | |||
| 482 | void sbus_unmap_sg(struct sbus_dev *sdev, struct scatterlist *sglist, int nelems, int direction) | ||
| 483 | { | ||
| 484 | struct sbus_info *info; | ||
| 485 | struct iommu *iommu; | ||
| 486 | struct strbuf *strbuf; | ||
| 487 | iopte_t *base; | ||
| 488 | unsigned long flags, i, npages; | ||
| 489 | u32 bus_addr; | ||
| 490 | |||
| 491 | if (unlikely(direction == SBUS_DMA_NONE)) | ||
| 492 | BUG(); | ||
| 493 | |||
| 494 | info = sdev->bus->iommu; | ||
| 495 | iommu = &info->iommu; | ||
| 496 | strbuf = &info->strbuf; | ||
| 497 | |||
| 498 | bus_addr = sglist->dma_address & IO_PAGE_MASK; | ||
| 499 | |||
| 500 | for (i = 1; i < nelems; i++) | ||
| 501 | if (sglist[i].dma_length == 0) | ||
| 502 | break; | ||
| 503 | i--; | ||
| 504 | npages = (IO_PAGE_ALIGN(sglist[i].dma_address + sglist[i].dma_length) - | ||
| 505 | bus_addr) >> IO_PAGE_SHIFT; | ||
| 506 | |||
| 507 | base = iommu->page_table + | ||
| 508 | ((bus_addr - iommu->page_table_map_base) >> IO_PAGE_SHIFT); | ||
| 509 | |||
| 510 | spin_lock_irqsave(&iommu->lock, flags); | ||
| 511 | sbus_strbuf_flush(iommu, strbuf, bus_addr, npages, direction); | ||
| 512 | for (i = 0; i < npages; i++) | ||
| 513 | iopte_val(base[i]) = 0UL; | ||
| 514 | free_npages(iommu, bus_addr - iommu->page_table_map_base, npages); | ||
| 515 | spin_unlock_irqrestore(&iommu->lock, flags); | ||
| 516 | } | ||
| 517 | |||
| 518 | void sbus_dma_sync_single_for_cpu(struct sbus_dev *sdev, dma_addr_t bus_addr, size_t sz, int direction) | ||
| 519 | { | ||
| 520 | struct sbus_info *info; | ||
| 521 | struct iommu *iommu; | ||
| 522 | struct strbuf *strbuf; | ||
| 523 | unsigned long flags, npages; | ||
| 524 | |||
| 525 | info = sdev->bus->iommu; | ||
| 526 | iommu = &info->iommu; | ||
| 527 | strbuf = &info->strbuf; | ||
| 528 | |||
| 529 | npages = IO_PAGE_ALIGN(bus_addr + sz) - (bus_addr & IO_PAGE_MASK); | ||
| 530 | npages >>= IO_PAGE_SHIFT; | ||
| 531 | bus_addr &= IO_PAGE_MASK; | ||
| 532 | |||
| 533 | spin_lock_irqsave(&iommu->lock, flags); | ||
| 534 | sbus_strbuf_flush(iommu, strbuf, bus_addr, npages, direction); | ||
| 535 | spin_unlock_irqrestore(&iommu->lock, flags); | ||
| 536 | } | ||
| 537 | |||
| 538 | void sbus_dma_sync_single_for_device(struct sbus_dev *sdev, dma_addr_t base, size_t size, int direction) | ||
| 539 | { | ||
| 540 | } | ||
| 541 | |||
| 542 | void sbus_dma_sync_sg_for_cpu(struct sbus_dev *sdev, struct scatterlist *sglist, int nelems, int direction) | ||
| 543 | { | ||
| 544 | struct sbus_info *info; | ||
| 545 | struct iommu *iommu; | ||
| 546 | struct strbuf *strbuf; | ||
| 547 | unsigned long flags, npages, i; | ||
| 548 | u32 bus_addr; | ||
| 549 | |||
| 550 | info = sdev->bus->iommu; | ||
| 551 | iommu = &info->iommu; | ||
| 552 | strbuf = &info->strbuf; | ||
| 553 | |||
| 554 | bus_addr = sglist[0].dma_address & IO_PAGE_MASK; | ||
| 555 | for (i = 0; i < nelems; i++) { | ||
| 556 | if (!sglist[i].dma_length) | ||
| 557 | break; | ||
| 558 | } | ||
| 559 | i--; | ||
| 560 | npages = (IO_PAGE_ALIGN(sglist[i].dma_address + sglist[i].dma_length) | ||
| 561 | - bus_addr) >> IO_PAGE_SHIFT; | ||
| 562 | |||
| 563 | spin_lock_irqsave(&iommu->lock, flags); | ||
| 564 | sbus_strbuf_flush(iommu, strbuf, bus_addr, npages, direction); | ||
| 565 | spin_unlock_irqrestore(&iommu->lock, flags); | ||
| 566 | } | ||
| 567 | |||
| 568 | void sbus_dma_sync_sg_for_device(struct sbus_dev *sdev, struct scatterlist *sg, int nents, int direction) | ||
| 569 | { | ||
| 570 | } | ||
| 571 | |||
| 572 | /* Enable 64-bit DVMA mode for the given device. */ | 54 | /* Enable 64-bit DVMA mode for the given device. */ |
| 573 | void sbus_set_sbus64(struct sbus_dev *sdev, int bursts) | 55 | void sbus_set_sbus64(struct sbus_dev *sdev, int bursts) |
| 574 | { | 56 | { |
| 575 | struct sbus_info *info = sdev->bus->iommu; | 57 | struct iommu *iommu = sdev->ofdev.dev.archdata.iommu; |
| 576 | struct iommu *iommu = &info->iommu; | ||
| 577 | int slot = sdev->slot; | 58 | int slot = sdev->slot; |
| 578 | unsigned long cfg_reg; | 59 | unsigned long cfg_reg; |
| 579 | u64 val; | 60 | u64 val; |
| @@ -713,8 +194,7 @@ static unsigned long sysio_imap_to_iclr(unsigned long imap) | |||
| 713 | unsigned int sbus_build_irq(void *buscookie, unsigned int ino) | 194 | unsigned int sbus_build_irq(void *buscookie, unsigned int ino) |
| 714 | { | 195 | { |
| 715 | struct sbus_bus *sbus = (struct sbus_bus *)buscookie; | 196 | struct sbus_bus *sbus = (struct sbus_bus *)buscookie; |
| 716 | struct sbus_info *info = sbus->iommu; | 197 | struct iommu *iommu = sbus->ofdev.dev.archdata.iommu; |
| 717 | struct iommu *iommu = &info->iommu; | ||
| 718 | unsigned long reg_base = iommu->write_complete_reg - 0x2000UL; | 198 | unsigned long reg_base = iommu->write_complete_reg - 0x2000UL; |
| 719 | unsigned long imap, iclr; | 199 | unsigned long imap, iclr; |
| 720 | int sbus_level = 0; | 200 | int sbus_level = 0; |
| @@ -776,8 +256,7 @@ unsigned int sbus_build_irq(void *buscookie, unsigned int ino) | |||
| 776 | static irqreturn_t sysio_ue_handler(int irq, void *dev_id) | 256 | static irqreturn_t sysio_ue_handler(int irq, void *dev_id) |
| 777 | { | 257 | { |
| 778 | struct sbus_bus *sbus = dev_id; | 258 | struct sbus_bus *sbus = dev_id; |
| 779 | struct sbus_info *info = sbus->iommu; | 259 | struct iommu *iommu = sbus->ofdev.dev.archdata.iommu; |
| 780 | struct iommu *iommu = &info->iommu; | ||
| 781 | unsigned long reg_base = iommu->write_complete_reg - 0x2000UL; | 260 | unsigned long reg_base = iommu->write_complete_reg - 0x2000UL; |
| 782 | unsigned long afsr_reg, afar_reg; | 261 | unsigned long afsr_reg, afar_reg; |
| 783 | unsigned long afsr, afar, error_bits; | 262 | unsigned long afsr, afar, error_bits; |
| @@ -849,8 +328,7 @@ static irqreturn_t sysio_ue_handler(int irq, void *dev_id) | |||
| 849 | static irqreturn_t sysio_ce_handler(int irq, void *dev_id) | 328 | static irqreturn_t sysio_ce_handler(int irq, void *dev_id) |
| 850 | { | 329 | { |
| 851 | struct sbus_bus *sbus = dev_id; | 330 | struct sbus_bus *sbus = dev_id; |
| 852 | struct sbus_info *info = sbus->iommu; | 331 | struct iommu *iommu = sbus->ofdev.dev.archdata.iommu; |
| 853 | struct iommu *iommu = &info->iommu; | ||
| 854 | unsigned long reg_base = iommu->write_complete_reg - 0x2000UL; | 332 | unsigned long reg_base = iommu->write_complete_reg - 0x2000UL; |
| 855 | unsigned long afsr_reg, afar_reg; | 333 | unsigned long afsr_reg, afar_reg; |
| 856 | unsigned long afsr, afar, error_bits; | 334 | unsigned long afsr, afar, error_bits; |
| @@ -927,8 +405,7 @@ static irqreturn_t sysio_ce_handler(int irq, void *dev_id) | |||
| 927 | static irqreturn_t sysio_sbus_error_handler(int irq, void *dev_id) | 405 | static irqreturn_t sysio_sbus_error_handler(int irq, void *dev_id) |
| 928 | { | 406 | { |
| 929 | struct sbus_bus *sbus = dev_id; | 407 | struct sbus_bus *sbus = dev_id; |
| 930 | struct sbus_info *info = sbus->iommu; | 408 | struct iommu *iommu = sbus->ofdev.dev.archdata.iommu; |
| 931 | struct iommu *iommu = &info->iommu; | ||
| 932 | unsigned long afsr_reg, afar_reg, reg_base; | 409 | unsigned long afsr_reg, afar_reg, reg_base; |
| 933 | unsigned long afsr, afar, error_bits; | 410 | unsigned long afsr, afar, error_bits; |
| 934 | int reported; | 411 | int reported; |
| @@ -995,8 +472,7 @@ static irqreturn_t sysio_sbus_error_handler(int irq, void *dev_id) | |||
| 995 | 472 | ||
| 996 | static void __init sysio_register_error_handlers(struct sbus_bus *sbus) | 473 | static void __init sysio_register_error_handlers(struct sbus_bus *sbus) |
| 997 | { | 474 | { |
| 998 | struct sbus_info *info = sbus->iommu; | 475 | struct iommu *iommu = sbus->ofdev.dev.archdata.iommu; |
| 999 | struct iommu *iommu = &info->iommu; | ||
| 1000 | unsigned long reg_base = iommu->write_complete_reg - 0x2000UL; | 476 | unsigned long reg_base = iommu->write_complete_reg - 0x2000UL; |
| 1001 | unsigned int irq; | 477 | unsigned int irq; |
| 1002 | u64 control; | 478 | u64 control; |
| @@ -1041,7 +517,6 @@ static void __init sbus_iommu_init(int __node, struct sbus_bus *sbus) | |||
| 1041 | { | 517 | { |
| 1042 | const struct linux_prom64_registers *pr; | 518 | const struct linux_prom64_registers *pr; |
| 1043 | struct device_node *dp; | 519 | struct device_node *dp; |
| 1044 | struct sbus_info *info; | ||
| 1045 | struct iommu *iommu; | 520 | struct iommu *iommu; |
| 1046 | struct strbuf *strbuf; | 521 | struct strbuf *strbuf; |
| 1047 | unsigned long regs, reg_base; | 522 | unsigned long regs, reg_base; |
| @@ -1054,25 +529,28 @@ static void __init sbus_iommu_init(int __node, struct sbus_bus *sbus) | |||
| 1054 | 529 | ||
| 1055 | pr = of_get_property(dp, "reg", NULL); | 530 | pr = of_get_property(dp, "reg", NULL); |
| 1056 | if (!pr) { | 531 | if (!pr) { |
| 1057 | prom_printf("sbus_iommu_init: Cannot map SYSIO control registers.\n"); | 532 | prom_printf("sbus_iommu_init: Cannot map SYSIO " |
| 533 | "control registers.\n"); | ||
| 1058 | prom_halt(); | 534 | prom_halt(); |
| 1059 | } | 535 | } |
| 1060 | regs = pr->phys_addr; | 536 | regs = pr->phys_addr; |
| 1061 | 537 | ||
| 1062 | info = kzalloc(sizeof(*info), GFP_ATOMIC); | 538 | iommu = kzalloc(sizeof(*iommu), GFP_ATOMIC); |
| 1063 | if (info == NULL) { | 539 | if (!iommu) |
| 1064 | prom_printf("sbus_iommu_init: Fatal error, " | 540 | goto fatal_memory_error; |
| 1065 | "kmalloc(info) failed\n"); | 541 | strbuf = kzalloc(sizeof(*strbuf), GFP_ATOMIC); |
| 1066 | prom_halt(); | 542 | if (!strbuf) |
| 1067 | } | 543 | goto fatal_memory_error; |
| 1068 | 544 | ||
| 1069 | iommu = &info->iommu; | 545 | sbus->ofdev.dev.archdata.iommu = iommu; |
| 1070 | strbuf = &info->strbuf; | 546 | sbus->ofdev.dev.archdata.stc = strbuf; |
| 1071 | 547 | ||
| 1072 | reg_base = regs + SYSIO_IOMMUREG_BASE; | 548 | reg_base = regs + SYSIO_IOMMUREG_BASE; |
| 1073 | iommu->iommu_control = reg_base + IOMMU_CONTROL; | 549 | iommu->iommu_control = reg_base + IOMMU_CONTROL; |
| 1074 | iommu->iommu_tsbbase = reg_base + IOMMU_TSBBASE; | 550 | iommu->iommu_tsbbase = reg_base + IOMMU_TSBBASE; |
| 1075 | iommu->iommu_flush = reg_base + IOMMU_FLUSH; | 551 | iommu->iommu_flush = reg_base + IOMMU_FLUSH; |
| 552 | iommu->iommu_tags = iommu->iommu_control + | ||
| 553 | (IOMMU_TAGDIAG - IOMMU_CONTROL); | ||
| 1076 | 554 | ||
| 1077 | reg_base = regs + SYSIO_STRBUFREG_BASE; | 555 | reg_base = regs + SYSIO_STRBUFREG_BASE; |
| 1078 | strbuf->strbuf_control = reg_base + STRBUF_CONTROL; | 556 | strbuf->strbuf_control = reg_base + STRBUF_CONTROL; |
| @@ -1093,14 +571,12 @@ static void __init sbus_iommu_init(int __node, struct sbus_bus *sbus) | |||
| 1093 | */ | 571 | */ |
| 1094 | iommu->write_complete_reg = regs + 0x2000UL; | 572 | iommu->write_complete_reg = regs + 0x2000UL; |
| 1095 | 573 | ||
| 1096 | /* Link into SYSIO software state. */ | ||
| 1097 | sbus->iommu = info; | ||
| 1098 | |||
| 1099 | printk("SYSIO: UPA portID %x, at %016lx\n", | 574 | printk("SYSIO: UPA portID %x, at %016lx\n", |
| 1100 | sbus->portid, regs); | 575 | sbus->portid, regs); |
| 1101 | 576 | ||
| 1102 | /* Setup for TSB_SIZE=7, TBW_SIZE=0, MMU_DE=1, MMU_EN=1 */ | 577 | /* Setup for TSB_SIZE=7, TBW_SIZE=0, MMU_DE=1, MMU_EN=1 */ |
| 1103 | sbus_iommu_table_init(iommu, IO_TSB_SIZE); | 578 | if (iommu_table_init(iommu, IO_TSB_SIZE, MAP_BASE, 0xffffffff)) |
| 579 | goto fatal_memory_error; | ||
| 1104 | 580 | ||
| 1105 | control = upa_readq(iommu->iommu_control); | 581 | control = upa_readq(iommu->iommu_control); |
| 1106 | control = ((7UL << 16UL) | | 582 | control = ((7UL << 16UL) | |
| @@ -1157,6 +633,10 @@ static void __init sbus_iommu_init(int __node, struct sbus_bus *sbus) | |||
| 1157 | starfire_hookup(sbus->portid); | 633 | starfire_hookup(sbus->portid); |
| 1158 | 634 | ||
| 1159 | sysio_register_error_handlers(sbus); | 635 | sysio_register_error_handlers(sbus); |
| 636 | return; | ||
| 637 | |||
| 638 | fatal_memory_error: | ||
| 639 | prom_printf("sbus_iommu_init: Fatal memory allocation error.\n"); | ||
| 1160 | } | 640 | } |
| 1161 | 641 | ||
| 1162 | void sbus_fill_device_irq(struct sbus_dev *sdev) | 642 | void sbus_fill_device_irq(struct sbus_dev *sdev) |
diff --git a/arch/sparc64/kernel/time.c b/arch/sparc64/kernel/time.c index 49063ca2efcd..69cad1b653c1 100644 --- a/arch/sparc64/kernel/time.c +++ b/arch/sparc64/kernel/time.c | |||
| @@ -1460,6 +1460,74 @@ static int cmos_set_rtc_time(struct rtc_time *rtc_tm) | |||
| 1460 | } | 1460 | } |
| 1461 | #endif /* CONFIG_PCI */ | 1461 | #endif /* CONFIG_PCI */ |
| 1462 | 1462 | ||
| 1463 | static void mostek_get_rtc_time(struct rtc_time *rtc_tm) | ||
| 1464 | { | ||
| 1465 | void __iomem *regs = mstk48t02_regs; | ||
| 1466 | u8 tmp; | ||
| 1467 | |||
| 1468 | spin_lock_irq(&mostek_lock); | ||
| 1469 | |||
| 1470 | tmp = mostek_read(regs + MOSTEK_CREG); | ||
| 1471 | tmp |= MSTK_CREG_READ; | ||
| 1472 | mostek_write(regs + MOSTEK_CREG, tmp); | ||
| 1473 | |||
| 1474 | rtc_tm->tm_sec = MSTK_REG_SEC(regs); | ||
| 1475 | rtc_tm->tm_min = MSTK_REG_MIN(regs); | ||
| 1476 | rtc_tm->tm_hour = MSTK_REG_HOUR(regs); | ||
| 1477 | rtc_tm->tm_mday = MSTK_REG_DOM(regs); | ||
| 1478 | rtc_tm->tm_mon = MSTK_REG_MONTH(regs); | ||
| 1479 | rtc_tm->tm_year = MSTK_CVT_YEAR( MSTK_REG_YEAR(regs) ); | ||
| 1480 | rtc_tm->tm_wday = MSTK_REG_DOW(regs); | ||
| 1481 | |||
| 1482 | tmp = mostek_read(regs + MOSTEK_CREG); | ||
| 1483 | tmp &= ~MSTK_CREG_READ; | ||
| 1484 | mostek_write(regs + MOSTEK_CREG, tmp); | ||
| 1485 | |||
| 1486 | spin_unlock_irq(&mostek_lock); | ||
| 1487 | |||
| 1488 | rtc_tm->tm_mon--; | ||
| 1489 | rtc_tm->tm_wday--; | ||
| 1490 | rtc_tm->tm_year -= 1900; | ||
| 1491 | } | ||
| 1492 | |||
| 1493 | static int mostek_set_rtc_time(struct rtc_time *rtc_tm) | ||
| 1494 | { | ||
| 1495 | unsigned char mon, day, hrs, min, sec, wday; | ||
| 1496 | void __iomem *regs = mstk48t02_regs; | ||
| 1497 | unsigned int yrs; | ||
| 1498 | u8 tmp; | ||
| 1499 | |||
| 1500 | yrs = rtc_tm->tm_year + 1900; | ||
| 1501 | mon = rtc_tm->tm_mon + 1; | ||
| 1502 | day = rtc_tm->tm_mday; | ||
| 1503 | wday = rtc_tm->tm_wday + 1; | ||
| 1504 | hrs = rtc_tm->tm_hour; | ||
| 1505 | min = rtc_tm->tm_min; | ||
| 1506 | sec = rtc_tm->tm_sec; | ||
| 1507 | |||
| 1508 | spin_lock_irq(&mostek_lock); | ||
| 1509 | |||
| 1510 | tmp = mostek_read(regs + MOSTEK_CREG); | ||
| 1511 | tmp |= MSTK_CREG_WRITE; | ||
| 1512 | mostek_write(regs + MOSTEK_CREG, tmp); | ||
| 1513 | |||
| 1514 | MSTK_SET_REG_SEC(regs, sec); | ||
| 1515 | MSTK_SET_REG_MIN(regs, min); | ||
| 1516 | MSTK_SET_REG_HOUR(regs, hrs); | ||
| 1517 | MSTK_SET_REG_DOW(regs, wday); | ||
| 1518 | MSTK_SET_REG_DOM(regs, day); | ||
| 1519 | MSTK_SET_REG_MONTH(regs, mon); | ||
| 1520 | MSTK_SET_REG_YEAR(regs, yrs - MSTK_YEAR_ZERO); | ||
| 1521 | |||
| 1522 | tmp = mostek_read(regs + MOSTEK_CREG); | ||
| 1523 | tmp &= ~MSTK_CREG_WRITE; | ||
| 1524 | mostek_write(regs + MOSTEK_CREG, tmp); | ||
| 1525 | |||
| 1526 | spin_unlock_irq(&mostek_lock); | ||
| 1527 | |||
| 1528 | return 0; | ||
| 1529 | } | ||
| 1530 | |||
| 1463 | struct mini_rtc_ops { | 1531 | struct mini_rtc_ops { |
| 1464 | void (*get_rtc_time)(struct rtc_time *); | 1532 | void (*get_rtc_time)(struct rtc_time *); |
| 1465 | int (*set_rtc_time)(struct rtc_time *); | 1533 | int (*set_rtc_time)(struct rtc_time *); |
| @@ -1487,6 +1555,11 @@ static struct mini_rtc_ops cmos_rtc_ops = { | |||
| 1487 | }; | 1555 | }; |
| 1488 | #endif /* CONFIG_PCI */ | 1556 | #endif /* CONFIG_PCI */ |
| 1489 | 1557 | ||
| 1558 | static struct mini_rtc_ops mostek_rtc_ops = { | ||
| 1559 | .get_rtc_time = mostek_get_rtc_time, | ||
| 1560 | .set_rtc_time = mostek_set_rtc_time, | ||
| 1561 | }; | ||
| 1562 | |||
| 1490 | static struct mini_rtc_ops *mini_rtc_ops; | 1563 | static struct mini_rtc_ops *mini_rtc_ops; |
| 1491 | 1564 | ||
| 1492 | static inline void mini_get_rtc_time(struct rtc_time *time) | 1565 | static inline void mini_get_rtc_time(struct rtc_time *time) |
| @@ -1615,6 +1688,8 @@ static int __init rtc_mini_init(void) | |||
| 1615 | else if (ds1287_regs) | 1688 | else if (ds1287_regs) |
| 1616 | mini_rtc_ops = &cmos_rtc_ops; | 1689 | mini_rtc_ops = &cmos_rtc_ops; |
| 1617 | #endif /* CONFIG_PCI */ | 1690 | #endif /* CONFIG_PCI */ |
| 1691 | else if (mstk48t02_regs) | ||
| 1692 | mini_rtc_ops = &mostek_rtc_ops; | ||
| 1618 | else | 1693 | else |
| 1619 | return -ENODEV; | 1694 | return -ENODEV; |
| 1620 | 1695 | ||
diff --git a/arch/sparc64/kernel/traps.c b/arch/sparc64/kernel/traps.c index 6ef2d299fb10..6ef42b8e53d8 100644 --- a/arch/sparc64/kernel/traps.c +++ b/arch/sparc64/kernel/traps.c | |||
| @@ -2134,12 +2134,20 @@ static void user_instruction_dump (unsigned int __user *pc) | |||
| 2134 | void show_stack(struct task_struct *tsk, unsigned long *_ksp) | 2134 | void show_stack(struct task_struct *tsk, unsigned long *_ksp) |
| 2135 | { | 2135 | { |
| 2136 | unsigned long pc, fp, thread_base, ksp; | 2136 | unsigned long pc, fp, thread_base, ksp; |
| 2137 | void *tp = task_stack_page(tsk); | 2137 | struct thread_info *tp; |
| 2138 | struct reg_window *rw; | 2138 | struct reg_window *rw; |
| 2139 | int count = 0; | 2139 | int count = 0; |
| 2140 | 2140 | ||
| 2141 | ksp = (unsigned long) _ksp; | 2141 | ksp = (unsigned long) _ksp; |
| 2142 | 2142 | if (!tsk) | |
| 2143 | tsk = current; | ||
| 2144 | tp = task_thread_info(tsk); | ||
| 2145 | if (ksp == 0UL) { | ||
| 2146 | if (tsk == current) | ||
| 2147 | asm("mov %%fp, %0" : "=r" (ksp)); | ||
| 2148 | else | ||
| 2149 | ksp = tp->ksp; | ||
| 2150 | } | ||
| 2143 | if (tp == current_thread_info()) | 2151 | if (tp == current_thread_info()) |
| 2144 | flushw_all(); | 2152 | flushw_all(); |
| 2145 | 2153 | ||
| @@ -2168,11 +2176,7 @@ void show_stack(struct task_struct *tsk, unsigned long *_ksp) | |||
| 2168 | 2176 | ||
| 2169 | void dump_stack(void) | 2177 | void dump_stack(void) |
| 2170 | { | 2178 | { |
| 2171 | unsigned long *ksp; | 2179 | show_stack(current, NULL); |
| 2172 | |||
| 2173 | __asm__ __volatile__("mov %%fp, %0" | ||
| 2174 | : "=r" (ksp)); | ||
| 2175 | show_stack(current, ksp); | ||
| 2176 | } | 2180 | } |
| 2177 | 2181 | ||
| 2178 | EXPORT_SYMBOL(dump_stack); | 2182 | EXPORT_SYMBOL(dump_stack); |
diff --git a/arch/sparc64/mm/fault.c b/arch/sparc64/mm/fault.c index 17123e9ecf78..9f7740eee8d2 100644 --- a/arch/sparc64/mm/fault.c +++ b/arch/sparc64/mm/fault.c | |||
| @@ -112,15 +112,12 @@ static void __kprobes unhandled_fault(unsigned long address, | |||
| 112 | 112 | ||
| 113 | static void bad_kernel_pc(struct pt_regs *regs, unsigned long vaddr) | 113 | static void bad_kernel_pc(struct pt_regs *regs, unsigned long vaddr) |
| 114 | { | 114 | { |
| 115 | unsigned long *ksp; | ||
| 116 | |||
| 117 | printk(KERN_CRIT "OOPS: Bogus kernel PC [%016lx] in fault handler\n", | 115 | printk(KERN_CRIT "OOPS: Bogus kernel PC [%016lx] in fault handler\n", |
| 118 | regs->tpc); | 116 | regs->tpc); |
| 119 | printk(KERN_CRIT "OOPS: RPC [%016lx]\n", regs->u_regs[15]); | 117 | printk(KERN_CRIT "OOPS: RPC [%016lx]\n", regs->u_regs[15]); |
| 120 | print_symbol("RPC: <%s>\n", regs->u_regs[15]); | 118 | print_symbol("RPC: <%s>\n", regs->u_regs[15]); |
| 121 | printk(KERN_CRIT "OOPS: Fault was to vaddr[%lx]\n", vaddr); | 119 | printk(KERN_CRIT "OOPS: Fault was to vaddr[%lx]\n", vaddr); |
| 122 | __asm__("mov %%sp, %0" : "=r" (ksp)); | 120 | dump_stack(); |
| 123 | show_stack(current, ksp); | ||
| 124 | unhandled_fault(regs->tpc, current, regs); | 121 | unhandled_fault(regs->tpc, current, regs); |
| 125 | } | 122 | } |
| 126 | 123 | ||
diff --git a/drivers/sbus/sbus.c b/drivers/sbus/sbus.c index 2553629ec15d..c37d7c2587ff 100644 --- a/drivers/sbus/sbus.c +++ b/drivers/sbus/sbus.c | |||
| @@ -210,6 +210,10 @@ static void __init walk_children(struct device_node *dp, struct sbus_dev *parent | |||
| 210 | 210 | ||
| 211 | sdev->bus = sbus; | 211 | sdev->bus = sbus; |
| 212 | sdev->parent = parent; | 212 | sdev->parent = parent; |
| 213 | sdev->ofdev.dev.archdata.iommu = | ||
| 214 | sbus->ofdev.dev.archdata.iommu; | ||
| 215 | sdev->ofdev.dev.archdata.stc = | ||
| 216 | sbus->ofdev.dev.archdata.stc; | ||
| 213 | 217 | ||
| 214 | fill_sbus_device(dp, sdev); | 218 | fill_sbus_device(dp, sdev); |
| 215 | 219 | ||
| @@ -269,6 +273,11 @@ static void __init build_one_sbus(struct device_node *dp, int num_sbus) | |||
| 269 | 273 | ||
| 270 | sdev->bus = sbus; | 274 | sdev->bus = sbus; |
| 271 | sdev->parent = NULL; | 275 | sdev->parent = NULL; |
| 276 | sdev->ofdev.dev.archdata.iommu = | ||
| 277 | sbus->ofdev.dev.archdata.iommu; | ||
| 278 | sdev->ofdev.dev.archdata.stc = | ||
| 279 | sbus->ofdev.dev.archdata.stc; | ||
| 280 | |||
| 272 | fill_sbus_device(dev_dp, sdev); | 281 | fill_sbus_device(dev_dp, sdev); |
| 273 | 282 | ||
| 274 | walk_children(dev_dp, sdev, sbus); | 283 | walk_children(dev_dp, sdev, sbus); |
diff --git a/drivers/video/bw2.c b/drivers/video/bw2.c index b0b2e40bbd9f..718b9f83736e 100644 --- a/drivers/video/bw2.c +++ b/drivers/video/bw2.c | |||
| @@ -279,90 +279,91 @@ static void __devinit bw2_do_default_mode(struct bw2_par *par, | |||
| 279 | } | 279 | } |
| 280 | } | 280 | } |
| 281 | 281 | ||
| 282 | struct all_info { | 282 | static int __devinit bw2_probe(struct of_device *op, const struct of_device_id *match) |
| 283 | struct fb_info info; | ||
| 284 | struct bw2_par par; | ||
| 285 | }; | ||
| 286 | |||
| 287 | static int __devinit bw2_init_one(struct of_device *op) | ||
| 288 | { | 283 | { |
| 289 | struct device_node *dp = op->node; | 284 | struct device_node *dp = op->node; |
| 290 | struct all_info *all; | 285 | struct fb_info *info; |
| 286 | struct bw2_par *par; | ||
| 291 | int linebytes, err; | 287 | int linebytes, err; |
| 292 | 288 | ||
| 293 | all = kzalloc(sizeof(*all), GFP_KERNEL); | 289 | info = framebuffer_alloc(sizeof(struct bw2_par), &op->dev); |
| 294 | if (!all) | ||
| 295 | return -ENOMEM; | ||
| 296 | 290 | ||
| 297 | spin_lock_init(&all->par.lock); | 291 | err = -ENOMEM; |
| 292 | if (!info) | ||
| 293 | goto out_err; | ||
| 294 | par = info->par; | ||
| 298 | 295 | ||
| 299 | all->par.physbase = op->resource[0].start; | 296 | spin_lock_init(&par->lock); |
| 300 | all->par.which_io = op->resource[0].flags & IORESOURCE_BITS; | ||
| 301 | 297 | ||
| 302 | sbusfb_fill_var(&all->info.var, dp->node, 1); | 298 | par->physbase = op->resource[0].start; |
| 299 | par->which_io = op->resource[0].flags & IORESOURCE_BITS; | ||
| 300 | |||
| 301 | sbusfb_fill_var(&info->var, dp->node, 1); | ||
| 303 | linebytes = of_getintprop_default(dp, "linebytes", | 302 | linebytes = of_getintprop_default(dp, "linebytes", |
| 304 | all->info.var.xres); | 303 | info->var.xres); |
| 305 | 304 | ||
| 306 | all->info.var.red.length = all->info.var.green.length = | 305 | info->var.red.length = info->var.green.length = |
| 307 | all->info.var.blue.length = all->info.var.bits_per_pixel; | 306 | info->var.blue.length = info->var.bits_per_pixel; |
| 308 | all->info.var.red.offset = all->info.var.green.offset = | 307 | info->var.red.offset = info->var.green.offset = |
| 309 | all->info.var.blue.offset = 0; | 308 | info->var.blue.offset = 0; |
| 310 | 309 | ||
| 311 | all->par.regs = of_ioremap(&op->resource[0], BWTWO_REGISTER_OFFSET, | 310 | par->regs = of_ioremap(&op->resource[0], BWTWO_REGISTER_OFFSET, |
| 312 | sizeof(struct bw2_regs), "bw2 regs"); | 311 | sizeof(struct bw2_regs), "bw2 regs"); |
| 312 | if (!par->regs) | ||
| 313 | goto out_release_fb; | ||
| 313 | 314 | ||
| 314 | if (!of_find_property(dp, "width", NULL)) | 315 | if (!of_find_property(dp, "width", NULL)) |
| 315 | bw2_do_default_mode(&all->par, &all->info, &linebytes); | 316 | bw2_do_default_mode(par, info, &linebytes); |
| 316 | 317 | ||
| 317 | all->par.fbsize = PAGE_ALIGN(linebytes * all->info.var.yres); | 318 | par->fbsize = PAGE_ALIGN(linebytes * info->var.yres); |
| 318 | 319 | ||
| 319 | all->info.flags = FBINFO_DEFAULT; | 320 | info->flags = FBINFO_DEFAULT; |
| 320 | all->info.fbops = &bw2_ops; | 321 | info->fbops = &bw2_ops; |
| 321 | 322 | ||
| 322 | all->info.screen_base = | 323 | info->screen_base = of_ioremap(&op->resource[0], 0, |
| 323 | of_ioremap(&op->resource[0], 0, all->par.fbsize, "bw2 ram"); | 324 | par->fbsize, "bw2 ram"); |
| 324 | all->info.par = &all->par; | 325 | if (!info->screen_base) |
| 326 | goto out_unmap_regs; | ||
| 325 | 327 | ||
| 326 | bw2_blank(0, &all->info); | 328 | bw2_blank(0, info); |
| 327 | 329 | ||
| 328 | bw2_init_fix(&all->info, linebytes); | 330 | bw2_init_fix(info, linebytes); |
| 329 | 331 | ||
| 330 | err= register_framebuffer(&all->info); | 332 | err = register_framebuffer(info); |
| 331 | if (err < 0) { | 333 | if (err < 0) |
| 332 | of_iounmap(&op->resource[0], | 334 | goto out_unmap_screen; |
| 333 | all->par.regs, sizeof(struct bw2_regs)); | ||
| 334 | of_iounmap(&op->resource[0], | ||
| 335 | all->info.screen_base, all->par.fbsize); | ||
| 336 | kfree(all); | ||
| 337 | return err; | ||
| 338 | } | ||
| 339 | 335 | ||
| 340 | dev_set_drvdata(&op->dev, all); | 336 | dev_set_drvdata(&op->dev, info); |
| 341 | 337 | ||
| 342 | printk("%s: bwtwo at %lx:%lx\n", | 338 | printk("%s: bwtwo at %lx:%lx\n", |
| 343 | dp->full_name, | 339 | dp->full_name, par->which_io, par->physbase); |
| 344 | all->par.which_io, all->par.physbase); | ||
| 345 | 340 | ||
| 346 | return 0; | 341 | return 0; |
| 347 | } | ||
| 348 | 342 | ||
| 349 | static int __devinit bw2_probe(struct of_device *dev, const struct of_device_id *match) | 343 | out_unmap_screen: |
| 350 | { | 344 | of_iounmap(&op->resource[0], info->screen_base, par->fbsize); |
| 351 | struct of_device *op = to_of_device(&dev->dev); | 345 | |
| 346 | out_unmap_regs: | ||
| 347 | of_iounmap(&op->resource[0], par->regs, sizeof(struct bw2_regs)); | ||
| 348 | |||
| 349 | out_release_fb: | ||
| 350 | framebuffer_release(info); | ||
| 352 | 351 | ||
| 353 | return bw2_init_one(op); | 352 | out_err: |
| 353 | return err; | ||
| 354 | } | 354 | } |
| 355 | 355 | ||
| 356 | static int __devexit bw2_remove(struct of_device *op) | 356 | static int __devexit bw2_remove(struct of_device *op) |
| 357 | { | 357 | { |
| 358 | struct all_info *all = dev_get_drvdata(&op->dev); | 358 | struct fb_info *info = dev_get_drvdata(&op->dev); |
| 359 | struct bw2_par *par = info->par; | ||
| 359 | 360 | ||
| 360 | unregister_framebuffer(&all->info); | 361 | unregister_framebuffer(info); |
| 361 | 362 | ||
| 362 | of_iounmap(&op->resource[0], all->par.regs, sizeof(struct bw2_regs)); | 363 | of_iounmap(&op->resource[0], par->regs, sizeof(struct bw2_regs)); |
| 363 | of_iounmap(&op->resource[0], all->info.screen_base, all->par.fbsize); | 364 | of_iounmap(&op->resource[0], info->screen_base, par->fbsize); |
| 364 | 365 | ||
| 365 | kfree(all); | 366 | framebuffer_release(info); |
| 366 | 367 | ||
| 367 | dev_set_drvdata(&op->dev, NULL); | 368 | dev_set_drvdata(&op->dev, NULL); |
| 368 | 369 | ||
diff --git a/drivers/video/cg14.c b/drivers/video/cg14.c index b071bb632b97..41f6dbf61be7 100644 --- a/drivers/video/cg14.c +++ b/drivers/video/cg14.c | |||
| @@ -448,81 +448,79 @@ static struct sbus_mmap_map __cg14_mmap_map[CG14_MMAP_ENTRIES] __devinitdata = { | |||
| 448 | { .size = 0 } | 448 | { .size = 0 } |
| 449 | }; | 449 | }; |
| 450 | 450 | ||
| 451 | struct all_info { | 451 | static void cg14_unmap_regs(struct of_device *op, struct fb_info *info, |
| 452 | struct fb_info info; | 452 | struct cg14_par *par) |
| 453 | struct cg14_par par; | ||
| 454 | }; | ||
| 455 | |||
| 456 | static void cg14_unmap_regs(struct of_device *op, struct all_info *all) | ||
| 457 | { | 453 | { |
| 458 | if (all->par.regs) | 454 | if (par->regs) |
| 459 | of_iounmap(&op->resource[0], | 455 | of_iounmap(&op->resource[0], |
| 460 | all->par.regs, sizeof(struct cg14_regs)); | 456 | par->regs, sizeof(struct cg14_regs)); |
| 461 | if (all->par.clut) | 457 | if (par->clut) |
| 462 | of_iounmap(&op->resource[0], | 458 | of_iounmap(&op->resource[0], |
| 463 | all->par.clut, sizeof(struct cg14_clut)); | 459 | par->clut, sizeof(struct cg14_clut)); |
| 464 | if (all->par.cursor) | 460 | if (par->cursor) |
| 465 | of_iounmap(&op->resource[0], | 461 | of_iounmap(&op->resource[0], |
| 466 | all->par.cursor, sizeof(struct cg14_cursor)); | 462 | par->cursor, sizeof(struct cg14_cursor)); |
| 467 | if (all->info.screen_base) | 463 | if (info->screen_base) |
| 468 | of_iounmap(&op->resource[1], | 464 | of_iounmap(&op->resource[1], |
| 469 | all->info.screen_base, all->par.fbsize); | 465 | info->screen_base, par->fbsize); |
| 470 | } | 466 | } |
| 471 | 467 | ||
| 472 | static int __devinit cg14_init_one(struct of_device *op) | 468 | static int __devinit cg14_probe(struct of_device *op, const struct of_device_id *match) |
| 473 | { | 469 | { |
| 474 | struct device_node *dp = op->node; | 470 | struct device_node *dp = op->node; |
| 475 | struct all_info *all; | 471 | struct fb_info *info; |
| 472 | struct cg14_par *par; | ||
| 476 | int is_8mb, linebytes, i, err; | 473 | int is_8mb, linebytes, i, err; |
| 477 | 474 | ||
| 478 | all = kzalloc(sizeof(*all), GFP_KERNEL); | 475 | info = framebuffer_alloc(sizeof(struct cg14_par), &op->dev); |
| 479 | if (!all) | 476 | |
| 480 | return -ENOMEM; | 477 | err = -ENOMEM; |
| 478 | if (!info) | ||
| 479 | goto out_err; | ||
| 480 | par = info->par; | ||
| 481 | 481 | ||
| 482 | spin_lock_init(&all->par.lock); | 482 | spin_lock_init(&par->lock); |
| 483 | 483 | ||
| 484 | sbusfb_fill_var(&all->info.var, dp->node, 8); | 484 | sbusfb_fill_var(&info->var, dp->node, 8); |
| 485 | all->info.var.red.length = 8; | 485 | info->var.red.length = 8; |
| 486 | all->info.var.green.length = 8; | 486 | info->var.green.length = 8; |
| 487 | all->info.var.blue.length = 8; | 487 | info->var.blue.length = 8; |
| 488 | 488 | ||
| 489 | linebytes = of_getintprop_default(dp, "linebytes", | 489 | linebytes = of_getintprop_default(dp, "linebytes", |
| 490 | all->info.var.xres); | 490 | info->var.xres); |
| 491 | all->par.fbsize = PAGE_ALIGN(linebytes * all->info.var.yres); | 491 | par->fbsize = PAGE_ALIGN(linebytes * info->var.yres); |
| 492 | 492 | ||
| 493 | if (!strcmp(dp->parent->name, "sbus") || | 493 | if (!strcmp(dp->parent->name, "sbus") || |
| 494 | !strcmp(dp->parent->name, "sbi")) { | 494 | !strcmp(dp->parent->name, "sbi")) { |
| 495 | all->par.physbase = op->resource[0].start; | 495 | par->physbase = op->resource[0].start; |
| 496 | all->par.iospace = op->resource[0].flags & IORESOURCE_BITS; | 496 | par->iospace = op->resource[0].flags & IORESOURCE_BITS; |
| 497 | } else { | 497 | } else { |
| 498 | all->par.physbase = op->resource[1].start; | 498 | par->physbase = op->resource[1].start; |
| 499 | all->par.iospace = op->resource[0].flags & IORESOURCE_BITS; | 499 | par->iospace = op->resource[0].flags & IORESOURCE_BITS; |
| 500 | } | 500 | } |
| 501 | 501 | ||
| 502 | all->par.regs = of_ioremap(&op->resource[0], 0, | 502 | par->regs = of_ioremap(&op->resource[0], 0, |
| 503 | sizeof(struct cg14_regs), "cg14 regs"); | 503 | sizeof(struct cg14_regs), "cg14 regs"); |
| 504 | all->par.clut = of_ioremap(&op->resource[0], CG14_CLUT1, | 504 | par->clut = of_ioremap(&op->resource[0], CG14_CLUT1, |
| 505 | sizeof(struct cg14_clut), "cg14 clut"); | 505 | sizeof(struct cg14_clut), "cg14 clut"); |
| 506 | all->par.cursor = of_ioremap(&op->resource[0], CG14_CURSORREGS, | 506 | par->cursor = of_ioremap(&op->resource[0], CG14_CURSORREGS, |
| 507 | sizeof(struct cg14_cursor), "cg14 cursor"); | 507 | sizeof(struct cg14_cursor), "cg14 cursor"); |
| 508 | 508 | ||
| 509 | all->info.screen_base = of_ioremap(&op->resource[1], 0, | 509 | info->screen_base = of_ioremap(&op->resource[1], 0, |
| 510 | all->par.fbsize, "cg14 ram"); | 510 | par->fbsize, "cg14 ram"); |
| 511 | 511 | ||
| 512 | if (!all->par.regs || !all->par.clut || !all->par.cursor || | 512 | if (!par->regs || !par->clut || !par->cursor || !info->screen_base) |
| 513 | !all->info.screen_base) | 513 | goto out_unmap_regs; |
| 514 | cg14_unmap_regs(op, all); | ||
| 515 | 514 | ||
| 516 | is_8mb = (((op->resource[1].end - op->resource[1].start) + 1) == | 515 | is_8mb = (((op->resource[1].end - op->resource[1].start) + 1) == |
| 517 | (8 * 1024 * 1024)); | 516 | (8 * 1024 * 1024)); |
| 518 | 517 | ||
| 519 | BUILD_BUG_ON(sizeof(all->par.mmap_map) != sizeof(__cg14_mmap_map)); | 518 | BUILD_BUG_ON(sizeof(par->mmap_map) != sizeof(__cg14_mmap_map)); |
| 520 | 519 | ||
| 521 | memcpy(&all->par.mmap_map, &__cg14_mmap_map, | 520 | memcpy(&par->mmap_map, &__cg14_mmap_map, sizeof(par->mmap_map)); |
| 522 | sizeof(all->par.mmap_map)); | ||
| 523 | 521 | ||
| 524 | for (i = 0; i < CG14_MMAP_ENTRIES; i++) { | 522 | for (i = 0; i < CG14_MMAP_ENTRIES; i++) { |
| 525 | struct sbus_mmap_map *map = &all->par.mmap_map[i]; | 523 | struct sbus_mmap_map *map = &par->mmap_map[i]; |
| 526 | 524 | ||
| 527 | if (!map->size) | 525 | if (!map->size) |
| 528 | break; | 526 | break; |
| @@ -536,59 +534,55 @@ static int __devinit cg14_init_one(struct of_device *op) | |||
| 536 | map->size *= 2; | 534 | map->size *= 2; |
| 537 | } | 535 | } |
| 538 | 536 | ||
| 539 | all->par.mode = MDI_8_PIX; | 537 | par->mode = MDI_8_PIX; |
| 540 | all->par.ramsize = (is_8mb ? 0x800000 : 0x400000); | 538 | par->ramsize = (is_8mb ? 0x800000 : 0x400000); |
| 541 | 539 | ||
| 542 | all->info.flags = FBINFO_DEFAULT | FBINFO_HWACCEL_YPAN; | 540 | info->flags = FBINFO_DEFAULT | FBINFO_HWACCEL_YPAN; |
| 543 | all->info.fbops = &cg14_ops; | 541 | info->fbops = &cg14_ops; |
| 544 | all->info.par = &all->par; | ||
| 545 | 542 | ||
| 546 | __cg14_reset(&all->par); | 543 | __cg14_reset(par); |
| 547 | 544 | ||
| 548 | if (fb_alloc_cmap(&all->info.cmap, 256, 0)) { | 545 | if (fb_alloc_cmap(&info->cmap, 256, 0)) |
| 549 | cg14_unmap_regs(op, all); | 546 | goto out_unmap_regs; |
| 550 | kfree(all); | ||
| 551 | return -ENOMEM; | ||
| 552 | } | ||
| 553 | fb_set_cmap(&all->info.cmap, &all->info); | ||
| 554 | 547 | ||
| 555 | cg14_init_fix(&all->info, linebytes, dp); | 548 | fb_set_cmap(&info->cmap, info); |
| 556 | 549 | ||
| 557 | err = register_framebuffer(&all->info); | 550 | cg14_init_fix(info, linebytes, dp); |
| 558 | if (err < 0) { | 551 | |
| 559 | fb_dealloc_cmap(&all->info.cmap); | 552 | err = register_framebuffer(info); |
| 560 | cg14_unmap_regs(op, all); | 553 | if (err < 0) |
| 561 | kfree(all); | 554 | goto out_dealloc_cmap; |
| 562 | return err; | ||
| 563 | } | ||
| 564 | 555 | ||
| 565 | dev_set_drvdata(&op->dev, all); | 556 | dev_set_drvdata(&op->dev, info); |
| 566 | 557 | ||
| 567 | printk("%s: cgfourteen at %lx:%lx, %dMB\n", | 558 | printk("%s: cgfourteen at %lx:%lx, %dMB\n", |
| 568 | dp->full_name, | 559 | dp->full_name, |
| 569 | all->par.iospace, all->par.physbase, | 560 | par->iospace, par->physbase, |
| 570 | all->par.ramsize >> 20); | 561 | par->ramsize >> 20); |
| 571 | 562 | ||
| 572 | return 0; | 563 | return 0; |
| 573 | } | ||
| 574 | 564 | ||
| 575 | static int __devinit cg14_probe(struct of_device *dev, const struct of_device_id *match) | 565 | out_dealloc_cmap: |
| 576 | { | 566 | fb_dealloc_cmap(&info->cmap); |
| 577 | struct of_device *op = to_of_device(&dev->dev); | 567 | |
| 568 | out_unmap_regs: | ||
| 569 | cg14_unmap_regs(op, info, par); | ||
| 578 | 570 | ||
| 579 | return cg14_init_one(op); | 571 | out_err: |
| 572 | return err; | ||
| 580 | } | 573 | } |
| 581 | 574 | ||
| 582 | static int __devexit cg14_remove(struct of_device *op) | 575 | static int __devexit cg14_remove(struct of_device *op) |
| 583 | { | 576 | { |
| 584 | struct all_info *all = dev_get_drvdata(&op->dev); | 577 | struct fb_info *info = dev_get_drvdata(&op->dev); |
| 578 | struct cg14_par *par = info->par; | ||
| 585 | 579 | ||
| 586 | unregister_framebuffer(&all->info); | 580 | unregister_framebuffer(info); |
| 587 | fb_dealloc_cmap(&all->info.cmap); | 581 | fb_dealloc_cmap(&info->cmap); |
| 588 | 582 | ||
| 589 | cg14_unmap_regs(op, all); | 583 | cg14_unmap_regs(op, info, par); |
| 590 | 584 | ||
| 591 | kfree(all); | 585 | framebuffer_release(info); |
| 592 | 586 | ||
| 593 | dev_set_drvdata(&op->dev, NULL); | 587 | dev_set_drvdata(&op->dev, NULL); |
| 594 | 588 | ||
diff --git a/drivers/video/cg3.c b/drivers/video/cg3.c index f042428a84f4..5741b46ade1b 100644 --- a/drivers/video/cg3.c +++ b/drivers/video/cg3.c | |||
| @@ -353,104 +353,102 @@ static void __devinit cg3_do_default_mode(struct cg3_par *par) | |||
| 353 | } | 353 | } |
| 354 | } | 354 | } |
| 355 | 355 | ||
| 356 | struct all_info { | 356 | static int __devinit cg3_probe(struct of_device *op, |
| 357 | struct fb_info info; | 357 | const struct of_device_id *match) |
| 358 | struct cg3_par par; | ||
| 359 | }; | ||
| 360 | |||
| 361 | static int __devinit cg3_init_one(struct of_device *op) | ||
| 362 | { | 358 | { |
| 363 | struct device_node *dp = op->node; | 359 | struct device_node *dp = op->node; |
| 364 | struct all_info *all; | 360 | struct fb_info *info; |
| 361 | struct cg3_par *par; | ||
| 365 | int linebytes, err; | 362 | int linebytes, err; |
| 366 | 363 | ||
| 367 | all = kzalloc(sizeof(*all), GFP_KERNEL); | 364 | info = framebuffer_alloc(sizeof(struct cg3_par), &op->dev); |
| 368 | if (!all) | ||
| 369 | return -ENOMEM; | ||
| 370 | 365 | ||
| 371 | spin_lock_init(&all->par.lock); | 366 | err = -ENOMEM; |
| 367 | if (!info) | ||
| 368 | goto out_err; | ||
| 369 | par = info->par; | ||
| 372 | 370 | ||
| 373 | all->par.physbase = op->resource[0].start; | 371 | spin_lock_init(&par->lock); |
| 374 | all->par.which_io = op->resource[0].flags & IORESOURCE_BITS; | ||
| 375 | 372 | ||
| 376 | sbusfb_fill_var(&all->info.var, dp->node, 8); | 373 | par->physbase = op->resource[0].start; |
| 377 | all->info.var.red.length = 8; | 374 | par->which_io = op->resource[0].flags & IORESOURCE_BITS; |
| 378 | all->info.var.green.length = 8; | 375 | |
| 379 | all->info.var.blue.length = 8; | 376 | sbusfb_fill_var(&info->var, dp->node, 8); |
| 377 | info->var.red.length = 8; | ||
| 378 | info->var.green.length = 8; | ||
| 379 | info->var.blue.length = 8; | ||
| 380 | if (!strcmp(dp->name, "cgRDI")) | 380 | if (!strcmp(dp->name, "cgRDI")) |
| 381 | all->par.flags |= CG3_FLAG_RDI; | 381 | par->flags |= CG3_FLAG_RDI; |
| 382 | if (all->par.flags & CG3_FLAG_RDI) | 382 | if (par->flags & CG3_FLAG_RDI) |
| 383 | cg3_rdi_maybe_fixup_var(&all->info.var, dp); | 383 | cg3_rdi_maybe_fixup_var(&info->var, dp); |
| 384 | 384 | ||
| 385 | linebytes = of_getintprop_default(dp, "linebytes", | 385 | linebytes = of_getintprop_default(dp, "linebytes", |
| 386 | all->info.var.xres); | 386 | info->var.xres); |
| 387 | all->par.fbsize = PAGE_ALIGN(linebytes * all->info.var.yres); | 387 | par->fbsize = PAGE_ALIGN(linebytes * info->var.yres); |
| 388 | 388 | ||
| 389 | all->par.regs = of_ioremap(&op->resource[0], CG3_REGS_OFFSET, | 389 | par->regs = of_ioremap(&op->resource[0], CG3_REGS_OFFSET, |
| 390 | sizeof(struct cg3_regs), "cg3 regs"); | 390 | sizeof(struct cg3_regs), "cg3 regs"); |
| 391 | if (!par->regs) | ||
| 392 | goto out_release_fb; | ||
| 391 | 393 | ||
| 392 | all->info.flags = FBINFO_DEFAULT; | 394 | info->flags = FBINFO_DEFAULT; |
| 393 | all->info.fbops = &cg3_ops; | 395 | info->fbops = &cg3_ops; |
| 394 | all->info.screen_base = | 396 | info->screen_base = of_ioremap(&op->resource[0], CG3_RAM_OFFSET, |
| 395 | of_ioremap(&op->resource[0], CG3_RAM_OFFSET, | 397 | par->fbsize, "cg3 ram"); |
| 396 | all->par.fbsize, "cg3 ram"); | 398 | if (!info->screen_base) |
| 397 | all->info.par = &all->par; | 399 | goto out_unmap_regs; |
| 398 | 400 | ||
| 399 | cg3_blank(0, &all->info); | 401 | cg3_blank(0, info); |
| 400 | 402 | ||
| 401 | if (!of_find_property(dp, "width", NULL)) | 403 | if (!of_find_property(dp, "width", NULL)) |
| 402 | cg3_do_default_mode(&all->par); | 404 | cg3_do_default_mode(par); |
| 403 | 405 | ||
| 404 | if (fb_alloc_cmap(&all->info.cmap, 256, 0)) { | 406 | if (fb_alloc_cmap(&info->cmap, 256, 0)) |
| 405 | of_iounmap(&op->resource[0], | 407 | goto out_unmap_screen; |
| 406 | all->par.regs, sizeof(struct cg3_regs)); | 408 | |
| 407 | of_iounmap(&op->resource[0], | 409 | fb_set_cmap(&info->cmap, info); |
| 408 | all->info.screen_base, all->par.fbsize); | ||
| 409 | kfree(all); | ||
| 410 | return -ENOMEM; | ||
| 411 | } | ||
| 412 | fb_set_cmap(&all->info.cmap, &all->info); | ||
| 413 | |||
| 414 | cg3_init_fix(&all->info, linebytes, dp); | ||
| 415 | |||
| 416 | err = register_framebuffer(&all->info); | ||
| 417 | if (err < 0) { | ||
| 418 | fb_dealloc_cmap(&all->info.cmap); | ||
| 419 | of_iounmap(&op->resource[0], | ||
| 420 | all->par.regs, sizeof(struct cg3_regs)); | ||
| 421 | of_iounmap(&op->resource[0], | ||
| 422 | all->info.screen_base, all->par.fbsize); | ||
| 423 | kfree(all); | ||
| 424 | return err; | ||
| 425 | } | ||
| 426 | 410 | ||
| 427 | dev_set_drvdata(&op->dev, all); | 411 | cg3_init_fix(info, linebytes, dp); |
| 412 | |||
| 413 | err = register_framebuffer(info); | ||
| 414 | if (err < 0) | ||
| 415 | goto out_dealloc_cmap; | ||
| 416 | |||
| 417 | dev_set_drvdata(&op->dev, info); | ||
| 428 | 418 | ||
| 429 | printk("%s: cg3 at %lx:%lx\n", | 419 | printk("%s: cg3 at %lx:%lx\n", |
| 430 | dp->full_name, all->par.which_io, all->par.physbase); | 420 | dp->full_name, par->which_io, par->physbase); |
| 431 | 421 | ||
| 432 | return 0; | 422 | return 0; |
| 433 | } | ||
| 434 | 423 | ||
| 435 | static int __devinit cg3_probe(struct of_device *dev, | 424 | out_dealloc_cmap: |
| 436 | const struct of_device_id *match) | 425 | fb_dealloc_cmap(&info->cmap); |
| 437 | { | 426 | |
| 438 | struct of_device *op = to_of_device(&dev->dev); | 427 | out_unmap_screen: |
| 428 | of_iounmap(&op->resource[0], info->screen_base, par->fbsize); | ||
| 429 | |||
| 430 | out_unmap_regs: | ||
| 431 | of_iounmap(&op->resource[0], par->regs, sizeof(struct cg3_regs)); | ||
| 432 | |||
| 433 | out_release_fb: | ||
| 434 | framebuffer_release(info); | ||
| 439 | 435 | ||
| 440 | return cg3_init_one(op); | 436 | out_err: |
| 437 | return err; | ||
| 441 | } | 438 | } |
| 442 | 439 | ||
| 443 | static int __devexit cg3_remove(struct of_device *op) | 440 | static int __devexit cg3_remove(struct of_device *op) |
| 444 | { | 441 | { |
| 445 | struct all_info *all = dev_get_drvdata(&op->dev); | 442 | struct fb_info *info = dev_get_drvdata(&op->dev); |
| 443 | struct cg3_par *par = info->par; | ||
| 446 | 444 | ||
| 447 | unregister_framebuffer(&all->info); | 445 | unregister_framebuffer(info); |
| 448 | fb_dealloc_cmap(&all->info.cmap); | 446 | fb_dealloc_cmap(&info->cmap); |
| 449 | 447 | ||
| 450 | of_iounmap(&op->resource[0], all->par.regs, sizeof(struct cg3_regs)); | 448 | of_iounmap(&op->resource[0], par->regs, sizeof(struct cg3_regs)); |
| 451 | of_iounmap(&op->resource[0], all->info.screen_base, all->par.fbsize); | 449 | of_iounmap(&op->resource[0], info->screen_base, par->fbsize); |
| 452 | 450 | ||
| 453 | kfree(all); | 451 | framebuffer_release(info); |
| 454 | 452 | ||
| 455 | dev_set_drvdata(&op->dev, NULL); | 453 | dev_set_drvdata(&op->dev, NULL); |
| 456 | 454 | ||
diff --git a/drivers/video/cg6.c b/drivers/video/cg6.c index 4dad23a28f58..87c747123538 100644 --- a/drivers/video/cg6.c +++ b/drivers/video/cg6.c | |||
| @@ -653,135 +653,120 @@ static void cg6_chip_init(struct fb_info *info) | |||
| 653 | sbus_writel(info->var.yres - 1, &fbc->clipmaxy); | 653 | sbus_writel(info->var.yres - 1, &fbc->clipmaxy); |
| 654 | } | 654 | } |
| 655 | 655 | ||
| 656 | struct all_info { | 656 | static void cg6_unmap_regs(struct of_device *op, struct fb_info *info, |
| 657 | struct fb_info info; | 657 | struct cg6_par *par) |
| 658 | struct cg6_par par; | ||
| 659 | }; | ||
| 660 | |||
| 661 | static void cg6_unmap_regs(struct of_device *op, struct all_info *all) | ||
| 662 | { | 658 | { |
| 663 | if (all->par.fbc) | 659 | if (par->fbc) |
| 664 | of_iounmap(&op->resource[0], all->par.fbc, 4096); | 660 | of_iounmap(&op->resource[0], par->fbc, 4096); |
| 665 | if (all->par.tec) | 661 | if (par->tec) |
| 666 | of_iounmap(&op->resource[0], | 662 | of_iounmap(&op->resource[0], par->tec, sizeof(struct cg6_tec)); |
| 667 | all->par.tec, sizeof(struct cg6_tec)); | 663 | if (par->thc) |
| 668 | if (all->par.thc) | 664 | of_iounmap(&op->resource[0], par->thc, sizeof(struct cg6_thc)); |
| 669 | of_iounmap(&op->resource[0], | 665 | if (par->bt) |
| 670 | all->par.thc, sizeof(struct cg6_thc)); | 666 | of_iounmap(&op->resource[0], par->bt, sizeof(struct bt_regs)); |
| 671 | if (all->par.bt) | 667 | if (par->fhc) |
| 672 | of_iounmap(&op->resource[0], | 668 | of_iounmap(&op->resource[0], par->fhc, sizeof(u32)); |
| 673 | all->par.bt, sizeof(struct bt_regs)); | 669 | |
| 674 | if (all->par.fhc) | 670 | if (info->screen_base) |
| 675 | of_iounmap(&op->resource[0], | 671 | of_iounmap(&op->resource[0], info->screen_base, par->fbsize); |
| 676 | all->par.fhc, sizeof(u32)); | ||
| 677 | |||
| 678 | if (all->info.screen_base) | ||
| 679 | of_iounmap(&op->resource[0], | ||
| 680 | all->info.screen_base, all->par.fbsize); | ||
| 681 | } | 672 | } |
| 682 | 673 | ||
| 683 | static int __devinit cg6_init_one(struct of_device *op) | 674 | static int __devinit cg6_probe(struct of_device *op, const struct of_device_id *match) |
| 684 | { | 675 | { |
| 685 | struct device_node *dp = op->node; | 676 | struct device_node *dp = op->node; |
| 686 | struct all_info *all; | 677 | struct fb_info *info; |
| 678 | struct cg6_par *par; | ||
| 687 | int linebytes, err; | 679 | int linebytes, err; |
| 688 | 680 | ||
| 689 | all = kzalloc(sizeof(*all), GFP_KERNEL); | 681 | info = framebuffer_alloc(sizeof(struct cg6_par), &op->dev); |
| 690 | if (!all) | 682 | |
| 691 | return -ENOMEM; | 683 | err = -ENOMEM; |
| 684 | if (!info) | ||
| 685 | goto out_err; | ||
| 686 | par = info->par; | ||
| 692 | 687 | ||
| 693 | spin_lock_init(&all->par.lock); | 688 | spin_lock_init(&par->lock); |
| 694 | 689 | ||
| 695 | all->par.physbase = op->resource[0].start; | 690 | par->physbase = op->resource[0].start; |
| 696 | all->par.which_io = op->resource[0].flags & IORESOURCE_BITS; | 691 | par->which_io = op->resource[0].flags & IORESOURCE_BITS; |
| 697 | 692 | ||
| 698 | sbusfb_fill_var(&all->info.var, dp->node, 8); | 693 | sbusfb_fill_var(&info->var, dp->node, 8); |
| 699 | all->info.var.red.length = 8; | 694 | info->var.red.length = 8; |
| 700 | all->info.var.green.length = 8; | 695 | info->var.green.length = 8; |
| 701 | all->info.var.blue.length = 8; | 696 | info->var.blue.length = 8; |
| 702 | 697 | ||
| 703 | linebytes = of_getintprop_default(dp, "linebytes", | 698 | linebytes = of_getintprop_default(dp, "linebytes", |
| 704 | all->info.var.xres); | 699 | info->var.xres); |
| 705 | all->par.fbsize = PAGE_ALIGN(linebytes * all->info.var.yres); | 700 | par->fbsize = PAGE_ALIGN(linebytes * info->var.yres); |
| 706 | if (of_find_property(dp, "dblbuf", NULL)) | 701 | if (of_find_property(dp, "dblbuf", NULL)) |
| 707 | all->par.fbsize *= 4; | 702 | par->fbsize *= 4; |
| 708 | 703 | ||
| 709 | all->par.fbc = of_ioremap(&op->resource[0], CG6_FBC_OFFSET, | 704 | par->fbc = of_ioremap(&op->resource[0], CG6_FBC_OFFSET, |
| 710 | 4096, "cgsix fbc"); | 705 | 4096, "cgsix fbc"); |
| 711 | all->par.tec = of_ioremap(&op->resource[0], CG6_TEC_OFFSET, | 706 | par->tec = of_ioremap(&op->resource[0], CG6_TEC_OFFSET, |
| 712 | sizeof(struct cg6_tec), "cgsix tec"); | 707 | sizeof(struct cg6_tec), "cgsix tec"); |
| 713 | all->par.thc = of_ioremap(&op->resource[0], CG6_THC_OFFSET, | 708 | par->thc = of_ioremap(&op->resource[0], CG6_THC_OFFSET, |
| 714 | sizeof(struct cg6_thc), "cgsix thc"); | 709 | sizeof(struct cg6_thc), "cgsix thc"); |
| 715 | all->par.bt = of_ioremap(&op->resource[0], CG6_BROOKTREE_OFFSET, | 710 | par->bt = of_ioremap(&op->resource[0], CG6_BROOKTREE_OFFSET, |
| 716 | sizeof(struct bt_regs), "cgsix dac"); | 711 | sizeof(struct bt_regs), "cgsix dac"); |
| 717 | all->par.fhc = of_ioremap(&op->resource[0], CG6_FHC_OFFSET, | 712 | par->fhc = of_ioremap(&op->resource[0], CG6_FHC_OFFSET, |
| 718 | sizeof(u32), "cgsix fhc"); | 713 | sizeof(u32), "cgsix fhc"); |
| 719 | 714 | ||
| 720 | all->info.flags = FBINFO_DEFAULT | FBINFO_HWACCEL_IMAGEBLIT | | 715 | info->flags = FBINFO_DEFAULT | FBINFO_HWACCEL_IMAGEBLIT | |
| 721 | FBINFO_HWACCEL_COPYAREA | FBINFO_HWACCEL_FILLRECT; | 716 | FBINFO_HWACCEL_COPYAREA | FBINFO_HWACCEL_FILLRECT; |
| 722 | all->info.fbops = &cg6_ops; | 717 | info->fbops = &cg6_ops; |
| 723 | |||
| 724 | all->info.screen_base = of_ioremap(&op->resource[0], CG6_RAM_OFFSET, | ||
| 725 | all->par.fbsize, "cgsix ram"); | ||
| 726 | if (!all->par.fbc || !all->par.tec || !all->par.thc || | ||
| 727 | !all->par.bt || !all->par.fhc || !all->info.screen_base) { | ||
| 728 | cg6_unmap_regs(op, all); | ||
| 729 | kfree(all); | ||
| 730 | return -ENOMEM; | ||
| 731 | } | ||
| 732 | 718 | ||
| 733 | all->info.par = &all->par; | 719 | info->screen_base = of_ioremap(&op->resource[0], CG6_RAM_OFFSET, |
| 720 | par->fbsize, "cgsix ram"); | ||
| 721 | if (!par->fbc || !par->tec || !par->thc || | ||
| 722 | !par->bt || !par->fhc || !info->screen_base) | ||
| 723 | goto out_unmap_regs; | ||
| 734 | 724 | ||
| 735 | all->info.var.accel_flags = FB_ACCELF_TEXT; | 725 | info->var.accel_flags = FB_ACCELF_TEXT; |
| 736 | 726 | ||
| 737 | cg6_bt_init(&all->par); | 727 | cg6_bt_init(par); |
| 738 | cg6_chip_init(&all->info); | 728 | cg6_chip_init(info); |
| 739 | cg6_blank(0, &all->info); | 729 | cg6_blank(0, info); |
| 740 | 730 | ||
| 741 | if (fb_alloc_cmap(&all->info.cmap, 256, 0)) { | 731 | if (fb_alloc_cmap(&info->cmap, 256, 0)) |
| 742 | cg6_unmap_regs(op, all); | 732 | goto out_unmap_regs; |
| 743 | kfree(all); | ||
| 744 | return -ENOMEM; | ||
| 745 | } | ||
| 746 | 733 | ||
| 747 | fb_set_cmap(&all->info.cmap, &all->info); | 734 | fb_set_cmap(&info->cmap, info); |
| 748 | cg6_init_fix(&all->info, linebytes); | 735 | cg6_init_fix(info, linebytes); |
| 749 | 736 | ||
| 750 | err = register_framebuffer(&all->info); | 737 | err = register_framebuffer(info); |
| 751 | if (err < 0) { | 738 | if (err < 0) |
| 752 | cg6_unmap_regs(op, all); | 739 | goto out_dealloc_cmap; |
| 753 | fb_dealloc_cmap(&all->info.cmap); | ||
| 754 | kfree(all); | ||
| 755 | return err; | ||
| 756 | } | ||
| 757 | 740 | ||
| 758 | dev_set_drvdata(&op->dev, all); | 741 | dev_set_drvdata(&op->dev, info); |
| 759 | 742 | ||
| 760 | printk("%s: CGsix [%s] at %lx:%lx\n", | 743 | printk("%s: CGsix [%s] at %lx:%lx\n", |
| 761 | dp->full_name, | 744 | dp->full_name, info->fix.id, |
| 762 | all->info.fix.id, | 745 | par->which_io, par->physbase); |
| 763 | all->par.which_io, all->par.physbase); | ||
| 764 | 746 | ||
| 765 | return 0; | 747 | return 0; |
| 766 | } | ||
| 767 | 748 | ||
| 768 | static int __devinit cg6_probe(struct of_device *dev, const struct of_device_id *match) | 749 | out_dealloc_cmap: |
| 769 | { | 750 | fb_dealloc_cmap(&info->cmap); |
| 770 | struct of_device *op = to_of_device(&dev->dev); | 751 | |
| 752 | out_unmap_regs: | ||
| 753 | cg6_unmap_regs(op, info, par); | ||
| 771 | 754 | ||
| 772 | return cg6_init_one(op); | 755 | out_err: |
| 756 | return err; | ||
| 773 | } | 757 | } |
| 774 | 758 | ||
| 775 | static int __devexit cg6_remove(struct of_device *op) | 759 | static int __devexit cg6_remove(struct of_device *op) |
| 776 | { | 760 | { |
| 777 | struct all_info *all = dev_get_drvdata(&op->dev); | 761 | struct fb_info *info = dev_get_drvdata(&op->dev); |
| 762 | struct cg6_par *par = info->par; | ||
| 778 | 763 | ||
| 779 | unregister_framebuffer(&all->info); | 764 | unregister_framebuffer(info); |
| 780 | fb_dealloc_cmap(&all->info.cmap); | 765 | fb_dealloc_cmap(&info->cmap); |
| 781 | 766 | ||
| 782 | cg6_unmap_regs(op, all); | 767 | cg6_unmap_regs(op, info, par); |
| 783 | 768 | ||
| 784 | kfree(all); | 769 | framebuffer_release(info); |
| 785 | 770 | ||
| 786 | dev_set_drvdata(&op->dev, NULL); | 771 | dev_set_drvdata(&op->dev, NULL); |
| 787 | 772 | ||
diff --git a/drivers/video/ffb.c b/drivers/video/ffb.c index 3f6c98fad437..4b520b573911 100644 --- a/drivers/video/ffb.c +++ b/drivers/video/ffb.c | |||
| @@ -371,6 +371,8 @@ struct ffb_par { | |||
| 371 | unsigned long fbsize; | 371 | unsigned long fbsize; |
| 372 | 372 | ||
| 373 | int board_type; | 373 | int board_type; |
| 374 | |||
| 375 | u32 pseudo_palette[16]; | ||
| 374 | }; | 376 | }; |
| 375 | 377 | ||
| 376 | static void FFBFifo(struct ffb_par *par, int n) | 378 | static void FFBFifo(struct ffb_par *par, int n) |
| @@ -900,75 +902,67 @@ ffb_init_fix(struct fb_info *info) | |||
| 900 | info->fix.accel = FB_ACCEL_SUN_CREATOR; | 902 | info->fix.accel = FB_ACCEL_SUN_CREATOR; |
| 901 | } | 903 | } |
| 902 | 904 | ||
| 903 | struct all_info { | 905 | static int __devinit ffb_probe(struct of_device *op, const struct of_device_id *match) |
| 904 | struct fb_info info; | ||
| 905 | struct ffb_par par; | ||
| 906 | u32 pseudo_palette[16]; | ||
| 907 | }; | ||
| 908 | |||
| 909 | static int ffb_init_one(struct of_device *op) | ||
| 910 | { | 906 | { |
| 911 | struct device_node *dp = op->node; | 907 | struct device_node *dp = op->node; |
| 912 | struct ffb_fbc __iomem *fbc; | 908 | struct ffb_fbc __iomem *fbc; |
| 913 | struct ffb_dac __iomem *dac; | 909 | struct ffb_dac __iomem *dac; |
| 914 | struct all_info *all; | 910 | struct fb_info *info; |
| 915 | int err; | 911 | struct ffb_par *par; |
| 916 | u32 dac_pnum, dac_rev, dac_mrev; | 912 | u32 dac_pnum, dac_rev, dac_mrev; |
| 913 | int err; | ||
| 917 | 914 | ||
| 918 | all = kzalloc(sizeof(*all), GFP_KERNEL); | 915 | info = framebuffer_alloc(sizeof(struct ffb_par), &op->dev); |
| 919 | if (!all) | ||
| 920 | return -ENOMEM; | ||
| 921 | 916 | ||
| 922 | spin_lock_init(&all->par.lock); | 917 | err = -ENOMEM; |
| 923 | all->par.fbc = of_ioremap(&op->resource[2], 0, | 918 | if (!info) |
| 924 | sizeof(struct ffb_fbc), "ffb fbc"); | 919 | goto out_err; |
| 925 | if (!all->par.fbc) { | ||
| 926 | kfree(all); | ||
| 927 | return -ENOMEM; | ||
| 928 | } | ||
| 929 | 920 | ||
| 930 | all->par.dac = of_ioremap(&op->resource[1], 0, | 921 | par = info->par; |
| 931 | sizeof(struct ffb_dac), "ffb dac"); | 922 | |
| 932 | if (!all->par.dac) { | 923 | spin_lock_init(&par->lock); |
| 933 | of_iounmap(&op->resource[2], | 924 | par->fbc = of_ioremap(&op->resource[2], 0, |
| 934 | all->par.fbc, sizeof(struct ffb_fbc)); | 925 | sizeof(struct ffb_fbc), "ffb fbc"); |
| 935 | kfree(all); | 926 | if (!par->fbc) |
| 936 | return -ENOMEM; | 927 | goto out_release_fb; |
| 937 | } | 928 | |
| 929 | par->dac = of_ioremap(&op->resource[1], 0, | ||
| 930 | sizeof(struct ffb_dac), "ffb dac"); | ||
| 931 | if (!par->dac) | ||
| 932 | goto out_unmap_fbc; | ||
| 938 | 933 | ||
| 939 | all->par.rop_cache = FFB_ROP_NEW; | 934 | par->rop_cache = FFB_ROP_NEW; |
| 940 | all->par.physbase = op->resource[0].start; | 935 | par->physbase = op->resource[0].start; |
| 941 | 936 | ||
| 942 | /* Don't mention copyarea, so SCROLL_REDRAW is always | 937 | /* Don't mention copyarea, so SCROLL_REDRAW is always |
| 943 | * used. It is the fastest on this chip. | 938 | * used. It is the fastest on this chip. |
| 944 | */ | 939 | */ |
| 945 | all->info.flags = (FBINFO_DEFAULT | | 940 | info->flags = (FBINFO_DEFAULT | |
| 946 | /* FBINFO_HWACCEL_COPYAREA | */ | 941 | /* FBINFO_HWACCEL_COPYAREA | */ |
| 947 | FBINFO_HWACCEL_FILLRECT | | 942 | FBINFO_HWACCEL_FILLRECT | |
| 948 | FBINFO_HWACCEL_IMAGEBLIT); | 943 | FBINFO_HWACCEL_IMAGEBLIT); |
| 949 | all->info.fbops = &ffb_ops; | 944 | |
| 950 | all->info.screen_base = (char *) all->par.physbase + FFB_DFB24_POFF; | 945 | info->fbops = &ffb_ops; |
| 951 | all->info.par = &all->par; | 946 | |
| 952 | all->info.pseudo_palette = all->pseudo_palette; | 947 | info->screen_base = (char *) par->physbase + FFB_DFB24_POFF; |
| 953 | 948 | info->pseudo_palette = par->pseudo_palette; | |
| 954 | sbusfb_fill_var(&all->info.var, dp->node, 32); | 949 | |
| 955 | all->par.fbsize = PAGE_ALIGN(all->info.var.xres * | 950 | sbusfb_fill_var(&info->var, dp->node, 32); |
| 956 | all->info.var.yres * | 951 | par->fbsize = PAGE_ALIGN(info->var.xres * info->var.yres * 4); |
| 957 | 4); | 952 | ffb_fixup_var_rgb(&info->var); |
| 958 | ffb_fixup_var_rgb(&all->info.var); | 953 | |
| 959 | 954 | info->var.accel_flags = FB_ACCELF_TEXT; | |
| 960 | all->info.var.accel_flags = FB_ACCELF_TEXT; | ||
| 961 | 955 | ||
| 962 | if (!strcmp(dp->name, "SUNW,afb")) | 956 | if (!strcmp(dp->name, "SUNW,afb")) |
| 963 | all->par.flags |= FFB_FLAG_AFB; | 957 | par->flags |= FFB_FLAG_AFB; |
| 964 | 958 | ||
| 965 | all->par.board_type = of_getintprop_default(dp, "board_type", 0); | 959 | par->board_type = of_getintprop_default(dp, "board_type", 0); |
| 966 | 960 | ||
| 967 | fbc = all->par.fbc; | 961 | fbc = par->fbc; |
| 968 | if ((upa_readl(&fbc->ucsr) & FFB_UCSR_ALL_ERRORS) != 0) | 962 | if ((upa_readl(&fbc->ucsr) & FFB_UCSR_ALL_ERRORS) != 0) |
| 969 | upa_writel(FFB_UCSR_ALL_ERRORS, &fbc->ucsr); | 963 | upa_writel(FFB_UCSR_ALL_ERRORS, &fbc->ucsr); |
| 970 | 964 | ||
| 971 | dac = all->par.dac; | 965 | dac = par->dac; |
| 972 | upa_writel(FFB_DAC_DID, &dac->type); | 966 | upa_writel(FFB_DAC_DID, &dac->type); |
| 973 | dac_pnum = upa_readl(&dac->value); | 967 | dac_pnum = upa_readl(&dac->value); |
| 974 | dac_rev = (dac_pnum & FFB_DAC_DID_REV) >> FFB_DAC_DID_REV_SHIFT; | 968 | dac_rev = (dac_pnum & FFB_DAC_DID_REV) >> FFB_DAC_DID_REV_SHIFT; |
| @@ -985,76 +979,70 @@ static int ffb_init_one(struct of_device *op) | |||
| 985 | * cursor logic. We identify Pacifica 1 as not Pacifica 2, the | 979 | * cursor logic. We identify Pacifica 1 as not Pacifica 2, the |
| 986 | * latter having a part number value of 0x236e. | 980 | * latter having a part number value of 0x236e. |
| 987 | */ | 981 | */ |
| 988 | if ((all->par.flags & FFB_FLAG_AFB) || dac_pnum == 0x236e) { | 982 | if ((par->flags & FFB_FLAG_AFB) || dac_pnum == 0x236e) { |
| 989 | all->par.flags &= ~FFB_FLAG_INVCURSOR; | 983 | par->flags &= ~FFB_FLAG_INVCURSOR; |
| 990 | } else { | 984 | } else { |
| 991 | if (dac_mrev < 3) | 985 | if (dac_mrev < 3) |
| 992 | all->par.flags |= FFB_FLAG_INVCURSOR; | 986 | par->flags |= FFB_FLAG_INVCURSOR; |
| 993 | } | 987 | } |
| 994 | 988 | ||
| 995 | ffb_switch_from_graph(&all->par); | 989 | ffb_switch_from_graph(par); |
| 996 | 990 | ||
| 997 | /* Unblank it just to be sure. When there are multiple | 991 | /* Unblank it just to be sure. When there are multiple |
| 998 | * FFB/AFB cards in the system, or it is not the OBP | 992 | * FFB/AFB cards in the system, or it is not the OBP |
| 999 | * chosen console, it will have video outputs off in | 993 | * chosen console, it will have video outputs off in |
| 1000 | * the DAC. | 994 | * the DAC. |
| 1001 | */ | 995 | */ |
| 1002 | ffb_blank(0, &all->info); | 996 | ffb_blank(0, info); |
| 1003 | |||
| 1004 | if (fb_alloc_cmap(&all->info.cmap, 256, 0)) { | ||
| 1005 | printk(KERN_ERR "ffb: Could not allocate color map.\n"); | ||
| 1006 | of_iounmap(&op->resource[2], | ||
| 1007 | all->par.fbc, sizeof(struct ffb_fbc)); | ||
| 1008 | of_iounmap(&op->resource[1], | ||
| 1009 | all->par.dac, sizeof(struct ffb_dac)); | ||
| 1010 | kfree(all); | ||
| 1011 | return -ENOMEM; | ||
| 1012 | } | ||
| 1013 | 997 | ||
| 1014 | ffb_init_fix(&all->info); | 998 | if (fb_alloc_cmap(&info->cmap, 256, 0)) |
| 1015 | 999 | goto out_unmap_dac; | |
| 1016 | err = register_framebuffer(&all->info); | 1000 | |
| 1017 | if (err < 0) { | 1001 | ffb_init_fix(info); |
| 1018 | printk(KERN_ERR "ffb: Could not register framebuffer.\n"); | ||
| 1019 | fb_dealloc_cmap(&all->info.cmap); | ||
| 1020 | of_iounmap(&op->resource[2], | ||
| 1021 | all->par.fbc, sizeof(struct ffb_fbc)); | ||
| 1022 | of_iounmap(&op->resource[1], | ||
| 1023 | all->par.dac, sizeof(struct ffb_dac)); | ||
| 1024 | kfree(all); | ||
| 1025 | return err; | ||
| 1026 | } | ||
| 1027 | 1002 | ||
| 1028 | dev_set_drvdata(&op->dev, all); | 1003 | err = register_framebuffer(info); |
| 1004 | if (err < 0) | ||
| 1005 | goto out_dealloc_cmap; | ||
| 1006 | |||
| 1007 | dev_set_drvdata(&op->dev, info); | ||
| 1029 | 1008 | ||
| 1030 | printk("%s: %s at %016lx, type %d, " | 1009 | printk("%s: %s at %016lx, type %d, " |
| 1031 | "DAC pnum[%x] rev[%d] manuf_rev[%d]\n", | 1010 | "DAC pnum[%x] rev[%d] manuf_rev[%d]\n", |
| 1032 | dp->full_name, | 1011 | dp->full_name, |
| 1033 | ((all->par.flags & FFB_FLAG_AFB) ? "AFB" : "FFB"), | 1012 | ((par->flags & FFB_FLAG_AFB) ? "AFB" : "FFB"), |
| 1034 | all->par.physbase, all->par.board_type, | 1013 | par->physbase, par->board_type, |
| 1035 | dac_pnum, dac_rev, dac_mrev); | 1014 | dac_pnum, dac_rev, dac_mrev); |
| 1036 | 1015 | ||
| 1037 | return 0; | 1016 | return 0; |
| 1038 | } | ||
| 1039 | 1017 | ||
| 1040 | static int __devinit ffb_probe(struct of_device *dev, const struct of_device_id *match) | 1018 | out_dealloc_cmap: |
| 1041 | { | 1019 | fb_dealloc_cmap(&info->cmap); |
| 1042 | struct of_device *op = to_of_device(&dev->dev); | 1020 | |
| 1021 | out_unmap_dac: | ||
| 1022 | of_iounmap(&op->resource[2], par->fbc, sizeof(struct ffb_fbc)); | ||
| 1023 | |||
| 1024 | out_unmap_fbc: | ||
| 1025 | of_iounmap(&op->resource[2], par->fbc, sizeof(struct ffb_fbc)); | ||
| 1026 | |||
| 1027 | out_release_fb: | ||
| 1028 | framebuffer_release(info); | ||
| 1043 | 1029 | ||
| 1044 | return ffb_init_one(op); | 1030 | out_err: |
| 1031 | return err; | ||
| 1045 | } | 1032 | } |
| 1046 | 1033 | ||
| 1047 | static int __devexit ffb_remove(struct of_device *op) | 1034 | static int __devexit ffb_remove(struct of_device *op) |
| 1048 | { | 1035 | { |
| 1049 | struct all_info *all = dev_get_drvdata(&op->dev); | 1036 | struct fb_info *info = dev_get_drvdata(&op->dev); |
| 1037 | struct ffb_par *par = info->par; | ||
| 1050 | 1038 | ||
| 1051 | unregister_framebuffer(&all->info); | 1039 | unregister_framebuffer(info); |
| 1052 | fb_dealloc_cmap(&all->info.cmap); | 1040 | fb_dealloc_cmap(&info->cmap); |
| 1053 | 1041 | ||
| 1054 | of_iounmap(&op->resource[2], all->par.fbc, sizeof(struct ffb_fbc)); | 1042 | of_iounmap(&op->resource[2], par->fbc, sizeof(struct ffb_fbc)); |
| 1055 | of_iounmap(&op->resource[1], all->par.dac, sizeof(struct ffb_dac)); | 1043 | of_iounmap(&op->resource[1], par->dac, sizeof(struct ffb_dac)); |
| 1056 | 1044 | ||
| 1057 | kfree(all); | 1045 | framebuffer_release(info); |
| 1058 | 1046 | ||
| 1059 | dev_set_drvdata(&op->dev, NULL); | 1047 | dev_set_drvdata(&op->dev, NULL); |
| 1060 | 1048 | ||
diff --git a/drivers/video/leo.c b/drivers/video/leo.c index a038aa5a9e1c..45b9a5d55dec 100644 --- a/drivers/video/leo.c +++ b/drivers/video/leo.c | |||
| @@ -525,130 +525,123 @@ static void leo_fixup_var_rgb(struct fb_var_screeninfo *var) | |||
| 525 | var->transp.length = 0; | 525 | var->transp.length = 0; |
| 526 | } | 526 | } |
| 527 | 527 | ||
| 528 | struct all_info { | 528 | static void leo_unmap_regs(struct of_device *op, struct fb_info *info, |
| 529 | struct fb_info info; | 529 | struct leo_par *par) |
| 530 | struct leo_par par; | ||
| 531 | }; | ||
| 532 | |||
| 533 | static void leo_unmap_regs(struct of_device *op, struct all_info *all) | ||
| 534 | { | 530 | { |
| 535 | if (all->par.lc_ss0_usr) | 531 | if (par->lc_ss0_usr) |
| 536 | of_iounmap(&op->resource[0], all->par.lc_ss0_usr, 0x1000); | 532 | of_iounmap(&op->resource[0], par->lc_ss0_usr, 0x1000); |
| 537 | if (all->par.ld_ss0) | 533 | if (par->ld_ss0) |
| 538 | of_iounmap(&op->resource[0], all->par.ld_ss0, 0x1000); | 534 | of_iounmap(&op->resource[0], par->ld_ss0, 0x1000); |
| 539 | if (all->par.ld_ss1) | 535 | if (par->ld_ss1) |
| 540 | of_iounmap(&op->resource[0], all->par.ld_ss1, 0x1000); | 536 | of_iounmap(&op->resource[0], par->ld_ss1, 0x1000); |
| 541 | if (all->par.lx_krn) | 537 | if (par->lx_krn) |
| 542 | of_iounmap(&op->resource[0], all->par.lx_krn, 0x1000); | 538 | of_iounmap(&op->resource[0], par->lx_krn, 0x1000); |
| 543 | if (all->par.cursor) | 539 | if (par->cursor) |
| 544 | of_iounmap(&op->resource[0], | 540 | of_iounmap(&op->resource[0], |
| 545 | all->par.cursor, sizeof(struct leo_cursor)); | 541 | par->cursor, sizeof(struct leo_cursor)); |
| 546 | if (all->info.screen_base) | 542 | if (info->screen_base) |
| 547 | of_iounmap(&op->resource[0], all->info.screen_base, 0x800000); | 543 | of_iounmap(&op->resource[0], info->screen_base, 0x800000); |
| 548 | } | 544 | } |
| 549 | 545 | ||
| 550 | static int __devinit leo_init_one(struct of_device *op) | 546 | static int __devinit leo_probe(struct of_device *op, const struct of_device_id *match) |
| 551 | { | 547 | { |
| 552 | struct device_node *dp = op->node; | 548 | struct device_node *dp = op->node; |
| 553 | struct all_info *all; | 549 | struct fb_info *info; |
| 550 | struct leo_par *par; | ||
| 554 | int linebytes, err; | 551 | int linebytes, err; |
| 555 | 552 | ||
| 556 | all = kzalloc(sizeof(*all), GFP_KERNEL); | 553 | info = framebuffer_alloc(sizeof(struct leo_par), &op->dev); |
| 557 | if (!all) | 554 | |
| 558 | return -ENOMEM; | 555 | err = -ENOMEM; |
| 556 | if (!info) | ||
| 557 | goto out_err; | ||
| 558 | par = info->par; | ||
| 559 | 559 | ||
| 560 | spin_lock_init(&all->par.lock); | 560 | spin_lock_init(&par->lock); |
| 561 | 561 | ||
| 562 | all->par.physbase = op->resource[0].start; | 562 | par->physbase = op->resource[0].start; |
| 563 | all->par.which_io = op->resource[0].flags & IORESOURCE_BITS; | 563 | par->which_io = op->resource[0].flags & IORESOURCE_BITS; |
| 564 | 564 | ||
| 565 | sbusfb_fill_var(&all->info.var, dp->node, 32); | 565 | sbusfb_fill_var(&info->var, dp->node, 32); |
| 566 | leo_fixup_var_rgb(&all->info.var); | 566 | leo_fixup_var_rgb(&info->var); |
| 567 | 567 | ||
| 568 | linebytes = of_getintprop_default(dp, "linebytes", | 568 | linebytes = of_getintprop_default(dp, "linebytes", |
| 569 | all->info.var.xres); | 569 | info->var.xres); |
| 570 | all->par.fbsize = PAGE_ALIGN(linebytes * all->info.var.yres); | 570 | par->fbsize = PAGE_ALIGN(linebytes * info->var.yres); |
| 571 | 571 | ||
| 572 | all->par.lc_ss0_usr = | 572 | par->lc_ss0_usr = |
| 573 | of_ioremap(&op->resource[0], LEO_OFF_LC_SS0_USR, | 573 | of_ioremap(&op->resource[0], LEO_OFF_LC_SS0_USR, |
| 574 | 0x1000, "leolc ss0usr"); | 574 | 0x1000, "leolc ss0usr"); |
| 575 | all->par.ld_ss0 = | 575 | par->ld_ss0 = |
| 576 | of_ioremap(&op->resource[0], LEO_OFF_LD_SS0, | 576 | of_ioremap(&op->resource[0], LEO_OFF_LD_SS0, |
| 577 | 0x1000, "leold ss0"); | 577 | 0x1000, "leold ss0"); |
| 578 | all->par.ld_ss1 = | 578 | par->ld_ss1 = |
| 579 | of_ioremap(&op->resource[0], LEO_OFF_LD_SS1, | 579 | of_ioremap(&op->resource[0], LEO_OFF_LD_SS1, |
| 580 | 0x1000, "leold ss1"); | 580 | 0x1000, "leold ss1"); |
| 581 | all->par.lx_krn = | 581 | par->lx_krn = |
| 582 | of_ioremap(&op->resource[0], LEO_OFF_LX_KRN, | 582 | of_ioremap(&op->resource[0], LEO_OFF_LX_KRN, |
| 583 | 0x1000, "leolx krn"); | 583 | 0x1000, "leolx krn"); |
| 584 | all->par.cursor = | 584 | par->cursor = |
| 585 | of_ioremap(&op->resource[0], LEO_OFF_LX_CURSOR, | 585 | of_ioremap(&op->resource[0], LEO_OFF_LX_CURSOR, |
| 586 | sizeof(struct leo_cursor), "leolx cursor"); | 586 | sizeof(struct leo_cursor), "leolx cursor"); |
| 587 | all->info.screen_base = | 587 | info->screen_base = |
| 588 | of_ioremap(&op->resource[0], LEO_OFF_SS0, | 588 | of_ioremap(&op->resource[0], LEO_OFF_SS0, |
| 589 | 0x800000, "leo ram"); | 589 | 0x800000, "leo ram"); |
| 590 | if (!all->par.lc_ss0_usr || | 590 | if (!par->lc_ss0_usr || |
| 591 | !all->par.ld_ss0 || | 591 | !par->ld_ss0 || |
| 592 | !all->par.ld_ss1 || | 592 | !par->ld_ss1 || |
| 593 | !all->par.lx_krn || | 593 | !par->lx_krn || |
| 594 | !all->par.cursor || | 594 | !par->cursor || |
| 595 | !all->info.screen_base) { | 595 | !info->screen_base) |
| 596 | leo_unmap_regs(op, all); | 596 | goto out_unmap_regs; |
| 597 | kfree(all); | ||
| 598 | return -ENOMEM; | ||
| 599 | } | ||
| 600 | 597 | ||
| 601 | all->info.flags = FBINFO_DEFAULT | FBINFO_HWACCEL_YPAN; | 598 | info->flags = FBINFO_DEFAULT | FBINFO_HWACCEL_YPAN; |
| 602 | all->info.fbops = &leo_ops; | 599 | info->fbops = &leo_ops; |
| 603 | all->info.par = &all->par; | ||
| 604 | 600 | ||
| 605 | leo_init_wids(&all->info); | 601 | leo_init_wids(info); |
| 606 | leo_init_hw(&all->info); | 602 | leo_init_hw(info); |
| 607 | 603 | ||
| 608 | leo_blank(0, &all->info); | 604 | leo_blank(0, info); |
| 609 | 605 | ||
| 610 | if (fb_alloc_cmap(&all->info.cmap, 256, 0)) { | 606 | if (fb_alloc_cmap(&info->cmap, 256, 0)) |
| 611 | leo_unmap_regs(op, all); | 607 | goto out_unmap_regs; |
| 612 | kfree(all); | ||
| 613 | return -ENOMEM;; | ||
| 614 | } | ||
| 615 | 608 | ||
| 616 | leo_init_fix(&all->info, dp); | 609 | leo_init_fix(info, dp); |
| 617 | 610 | ||
| 618 | err = register_framebuffer(&all->info); | 611 | err = register_framebuffer(info); |
| 619 | if (err < 0) { | 612 | if (err < 0) |
| 620 | fb_dealloc_cmap(&all->info.cmap); | 613 | goto out_dealloc_cmap; |
| 621 | leo_unmap_regs(op, all); | ||
| 622 | kfree(all); | ||
| 623 | return err; | ||
| 624 | } | ||
| 625 | 614 | ||
| 626 | dev_set_drvdata(&op->dev, all); | 615 | dev_set_drvdata(&op->dev, info); |
| 627 | 616 | ||
| 628 | printk("%s: leo at %lx:%lx\n", | 617 | printk("%s: leo at %lx:%lx\n", |
| 629 | dp->full_name, | 618 | dp->full_name, |
| 630 | all->par.which_io, all->par.physbase); | 619 | par->which_io, par->physbase); |
| 631 | 620 | ||
| 632 | return 0; | 621 | return 0; |
| 633 | } | ||
| 634 | 622 | ||
| 635 | static int __devinit leo_probe(struct of_device *dev, const struct of_device_id *match) | 623 | out_dealloc_cmap: |
| 636 | { | 624 | fb_dealloc_cmap(&info->cmap); |
| 637 | struct of_device *op = to_of_device(&dev->dev); | 625 | |
| 626 | out_unmap_regs: | ||
| 627 | leo_unmap_regs(op, info, par); | ||
| 628 | framebuffer_release(info); | ||
| 638 | 629 | ||
| 639 | return leo_init_one(op); | 630 | out_err: |
| 631 | return err; | ||
| 640 | } | 632 | } |
| 641 | 633 | ||
| 642 | static int __devexit leo_remove(struct of_device *op) | 634 | static int __devexit leo_remove(struct of_device *op) |
| 643 | { | 635 | { |
| 644 | struct all_info *all = dev_get_drvdata(&op->dev); | 636 | struct fb_info *info = dev_get_drvdata(&op->dev); |
| 637 | struct leo_par *par = info->par; | ||
| 645 | 638 | ||
| 646 | unregister_framebuffer(&all->info); | 639 | unregister_framebuffer(info); |
| 647 | fb_dealloc_cmap(&all->info.cmap); | 640 | fb_dealloc_cmap(&info->cmap); |
| 648 | 641 | ||
| 649 | leo_unmap_regs(op, all); | 642 | leo_unmap_regs(op, info, par); |
| 650 | 643 | ||
| 651 | kfree(all); | 644 | framebuffer_release(info); |
| 652 | 645 | ||
| 653 | dev_set_drvdata(&op->dev, NULL); | 646 | dev_set_drvdata(&op->dev, NULL); |
| 654 | 647 | ||
diff --git a/drivers/video/p9100.c b/drivers/video/p9100.c index 637b78bb4bf7..58496061142d 100644 --- a/drivers/video/p9100.c +++ b/drivers/video/p9100.c | |||
| @@ -255,107 +255,95 @@ static void p9100_init_fix(struct fb_info *info, int linebytes, struct device_no | |||
| 255 | info->fix.accel = FB_ACCEL_SUN_CGTHREE; | 255 | info->fix.accel = FB_ACCEL_SUN_CGTHREE; |
| 256 | } | 256 | } |
| 257 | 257 | ||
| 258 | struct all_info { | 258 | static int __devinit p9100_probe(struct of_device *op, const struct of_device_id *match) |
| 259 | struct fb_info info; | ||
| 260 | struct p9100_par par; | ||
| 261 | }; | ||
| 262 | |||
| 263 | static int __devinit p9100_init_one(struct of_device *op) | ||
| 264 | { | 259 | { |
| 265 | struct device_node *dp = op->node; | 260 | struct device_node *dp = op->node; |
| 266 | struct all_info *all; | 261 | struct fb_info *info; |
| 262 | struct p9100_par *par; | ||
| 267 | int linebytes, err; | 263 | int linebytes, err; |
| 268 | 264 | ||
| 269 | all = kzalloc(sizeof(*all), GFP_KERNEL); | 265 | info = framebuffer_alloc(sizeof(struct p9100_par), &op->dev); |
| 270 | if (!all) | 266 | |
| 271 | return -ENOMEM; | 267 | err = -ENOMEM; |
| 268 | if (!info) | ||
| 269 | goto out_err; | ||
| 270 | par = info->par; | ||
| 272 | 271 | ||
| 273 | spin_lock_init(&all->par.lock); | 272 | spin_lock_init(&par->lock); |
| 274 | 273 | ||
| 275 | /* This is the framebuffer and the only resource apps can mmap. */ | 274 | /* This is the framebuffer and the only resource apps can mmap. */ |
| 276 | all->par.physbase = op->resource[2].start; | 275 | par->physbase = op->resource[2].start; |
| 277 | all->par.which_io = op->resource[2].flags & IORESOURCE_BITS; | 276 | par->which_io = op->resource[2].flags & IORESOURCE_BITS; |
| 278 | |||
| 279 | sbusfb_fill_var(&all->info.var, dp->node, 8); | ||
| 280 | all->info.var.red.length = 8; | ||
| 281 | all->info.var.green.length = 8; | ||
| 282 | all->info.var.blue.length = 8; | ||
| 283 | |||
| 284 | linebytes = of_getintprop_default(dp, "linebytes", | ||
| 285 | all->info.var.xres); | ||
| 286 | all->par.fbsize = PAGE_ALIGN(linebytes * all->info.var.yres); | ||
| 287 | |||
| 288 | all->par.regs = of_ioremap(&op->resource[0], 0, | ||
| 289 | sizeof(struct p9100_regs), "p9100 regs"); | ||
| 290 | if (!all->par.regs) { | ||
| 291 | kfree(all); | ||
| 292 | return -ENOMEM; | ||
| 293 | } | ||
| 294 | 277 | ||
| 295 | all->info.flags = FBINFO_DEFAULT; | 278 | sbusfb_fill_var(&info->var, dp->node, 8); |
| 296 | all->info.fbops = &p9100_ops; | 279 | info->var.red.length = 8; |
| 297 | all->info.screen_base = of_ioremap(&op->resource[2], 0, | 280 | info->var.green.length = 8; |
| 298 | all->par.fbsize, "p9100 ram"); | 281 | info->var.blue.length = 8; |
| 299 | if (!all->info.screen_base) { | ||
| 300 | of_iounmap(&op->resource[0], | ||
| 301 | all->par.regs, sizeof(struct p9100_regs)); | ||
| 302 | kfree(all); | ||
| 303 | return -ENOMEM; | ||
| 304 | } | ||
| 305 | all->info.par = &all->par; | ||
| 306 | 282 | ||
| 307 | p9100_blank(0, &all->info); | 283 | linebytes = of_getintprop_default(dp, "linebytes", info->var.xres); |
| 284 | par->fbsize = PAGE_ALIGN(linebytes * info->var.yres); | ||
| 308 | 285 | ||
| 309 | if (fb_alloc_cmap(&all->info.cmap, 256, 0)) { | 286 | par->regs = of_ioremap(&op->resource[0], 0, |
| 310 | of_iounmap(&op->resource[0], | 287 | sizeof(struct p9100_regs), "p9100 regs"); |
| 311 | all->par.regs, sizeof(struct p9100_regs)); | 288 | if (!par->regs) |
| 312 | of_iounmap(&op->resource[2], | 289 | goto out_release_fb; |
| 313 | all->info.screen_base, all->par.fbsize); | ||
| 314 | kfree(all); | ||
| 315 | return -ENOMEM; | ||
| 316 | } | ||
| 317 | 290 | ||
| 318 | p9100_init_fix(&all->info, linebytes, dp); | 291 | info->flags = FBINFO_DEFAULT; |
| 319 | 292 | info->fbops = &p9100_ops; | |
| 320 | err = register_framebuffer(&all->info); | 293 | info->screen_base = of_ioremap(&op->resource[2], 0, |
| 321 | if (err < 0) { | 294 | par->fbsize, "p9100 ram"); |
| 322 | fb_dealloc_cmap(&all->info.cmap); | 295 | if (!info->screen_base) |
| 323 | of_iounmap(&op->resource[0], | 296 | goto out_unmap_regs; |
| 324 | all->par.regs, sizeof(struct p9100_regs)); | 297 | |
| 325 | of_iounmap(&op->resource[2], | 298 | p9100_blank(0, info); |
| 326 | all->info.screen_base, all->par.fbsize); | 299 | |
| 327 | kfree(all); | 300 | if (fb_alloc_cmap(&info->cmap, 256, 0)) |
| 328 | return err; | 301 | goto out_unmap_screen; |
| 329 | } | ||
| 330 | fb_set_cmap(&all->info.cmap, &all->info); | ||
| 331 | 302 | ||
| 332 | dev_set_drvdata(&op->dev, all); | 303 | p9100_init_fix(info, linebytes, dp); |
| 304 | |||
| 305 | err = register_framebuffer(info); | ||
| 306 | if (err < 0) | ||
| 307 | goto out_dealloc_cmap; | ||
| 308 | |||
| 309 | fb_set_cmap(&info->cmap, info); | ||
| 310 | |||
| 311 | dev_set_drvdata(&op->dev, info); | ||
| 333 | 312 | ||
| 334 | printk("%s: p9100 at %lx:%lx\n", | 313 | printk("%s: p9100 at %lx:%lx\n", |
| 335 | dp->full_name, | 314 | dp->full_name, |
| 336 | all->par.which_io, all->par.physbase); | 315 | par->which_io, par->physbase); |
| 337 | 316 | ||
| 338 | return 0; | 317 | return 0; |
| 339 | } | ||
| 340 | 318 | ||
| 341 | static int __devinit p9100_probe(struct of_device *dev, const struct of_device_id *match) | 319 | out_dealloc_cmap: |
| 342 | { | 320 | fb_dealloc_cmap(&info->cmap); |
| 343 | struct of_device *op = to_of_device(&dev->dev); | 321 | |
| 322 | out_unmap_screen: | ||
| 323 | of_iounmap(&op->resource[2], info->screen_base, par->fbsize); | ||
| 324 | |||
| 325 | out_unmap_regs: | ||
| 326 | of_iounmap(&op->resource[0], par->regs, sizeof(struct p9100_regs)); | ||
| 327 | |||
| 328 | out_release_fb: | ||
| 329 | framebuffer_release(info); | ||
| 344 | 330 | ||
| 345 | return p9100_init_one(op); | 331 | out_err: |
| 332 | return err; | ||
| 346 | } | 333 | } |
| 347 | 334 | ||
| 348 | static int __devexit p9100_remove(struct of_device *op) | 335 | static int __devexit p9100_remove(struct of_device *op) |
| 349 | { | 336 | { |
| 350 | struct all_info *all = dev_get_drvdata(&op->dev); | 337 | struct fb_info *info = dev_get_drvdata(&op->dev); |
| 338 | struct p9100_par *par = info->par; | ||
| 351 | 339 | ||
| 352 | unregister_framebuffer(&all->info); | 340 | unregister_framebuffer(info); |
| 353 | fb_dealloc_cmap(&all->info.cmap); | 341 | fb_dealloc_cmap(&info->cmap); |
| 354 | 342 | ||
| 355 | of_iounmap(&op->resource[0], all->par.regs, sizeof(struct p9100_regs)); | 343 | of_iounmap(&op->resource[0], par->regs, sizeof(struct p9100_regs)); |
| 356 | of_iounmap(&op->resource[2], all->info.screen_base, all->par.fbsize); | 344 | of_iounmap(&op->resource[2], info->screen_base, par->fbsize); |
| 357 | 345 | ||
| 358 | kfree(all); | 346 | framebuffer_release(info); |
| 359 | 347 | ||
| 360 | dev_set_drvdata(&op->dev, NULL); | 348 | dev_set_drvdata(&op->dev, NULL); |
| 361 | 349 | ||
diff --git a/drivers/video/sbuslib.c b/drivers/video/sbuslib.c index 34ef859ee414..963a454b7074 100644 --- a/drivers/video/sbuslib.c +++ b/drivers/video/sbuslib.c | |||
| @@ -190,17 +190,6 @@ int sbusfb_ioctl_helper(unsigned long cmd, unsigned long arg, | |||
| 190 | EXPORT_SYMBOL(sbusfb_ioctl_helper); | 190 | EXPORT_SYMBOL(sbusfb_ioctl_helper); |
| 191 | 191 | ||
| 192 | #ifdef CONFIG_COMPAT | 192 | #ifdef CONFIG_COMPAT |
| 193 | struct fbcmap32 { | ||
| 194 | int index; /* first element (0 origin) */ | ||
| 195 | int count; | ||
| 196 | u32 red; | ||
| 197 | u32 green; | ||
| 198 | u32 blue; | ||
| 199 | }; | ||
| 200 | |||
| 201 | #define FBIOPUTCMAP32 _IOW('F', 3, struct fbcmap32) | ||
| 202 | #define FBIOGETCMAP32 _IOW('F', 4, struct fbcmap32) | ||
| 203 | |||
| 204 | static int fbiogetputcmap(struct fb_info *info, unsigned int cmd, unsigned long arg) | 193 | static int fbiogetputcmap(struct fb_info *info, unsigned int cmd, unsigned long arg) |
| 205 | { | 194 | { |
| 206 | struct fbcmap32 __user *argp = (void __user *)arg; | 195 | struct fbcmap32 __user *argp = (void __user *)arg; |
| @@ -223,20 +212,6 @@ static int fbiogetputcmap(struct fb_info *info, unsigned int cmd, unsigned long | |||
| 223 | (unsigned long)p); | 212 | (unsigned long)p); |
| 224 | } | 213 | } |
| 225 | 214 | ||
| 226 | struct fbcursor32 { | ||
| 227 | short set; /* what to set, choose from the list above */ | ||
| 228 | short enable; /* cursor on/off */ | ||
| 229 | struct fbcurpos pos; /* cursor position */ | ||
| 230 | struct fbcurpos hot; /* cursor hot spot */ | ||
| 231 | struct fbcmap32 cmap; /* color map info */ | ||
| 232 | struct fbcurpos size; /* cursor bit map size */ | ||
| 233 | u32 image; /* cursor image bits */ | ||
| 234 | u32 mask; /* cursor mask bits */ | ||
| 235 | }; | ||
| 236 | |||
| 237 | #define FBIOSCURSOR32 _IOW('F', 24, struct fbcursor32) | ||
| 238 | #define FBIOGCURSOR32 _IOW('F', 25, struct fbcursor32) | ||
| 239 | |||
| 240 | static int fbiogscursor(struct fb_info *info, unsigned long arg) | 215 | static int fbiogscursor(struct fb_info *info, unsigned long arg) |
| 241 | { | 216 | { |
| 242 | struct fbcursor __user *p = compat_alloc_user_space(sizeof(*p)); | 217 | struct fbcursor __user *p = compat_alloc_user_space(sizeof(*p)); |
diff --git a/drivers/video/tcx.c b/drivers/video/tcx.c index 5a99669232ce..e5a9ddb3c8be 100644 --- a/drivers/video/tcx.c +++ b/drivers/video/tcx.c | |||
| @@ -345,88 +345,82 @@ tcx_init_fix(struct fb_info *info, int linebytes) | |||
| 345 | info->fix.accel = FB_ACCEL_SUN_TCX; | 345 | info->fix.accel = FB_ACCEL_SUN_TCX; |
| 346 | } | 346 | } |
| 347 | 347 | ||
| 348 | struct all_info { | 348 | static void tcx_unmap_regs(struct of_device *op, struct fb_info *info, |
| 349 | struct fb_info info; | 349 | struct tcx_par *par) |
| 350 | struct tcx_par par; | ||
| 351 | }; | ||
| 352 | |||
| 353 | static void tcx_unmap_regs(struct of_device *op, struct all_info *all) | ||
| 354 | { | 350 | { |
| 355 | if (all->par.tec) | 351 | if (par->tec) |
| 356 | of_iounmap(&op->resource[7], | 352 | of_iounmap(&op->resource[7], |
| 357 | all->par.tec, sizeof(struct tcx_tec)); | 353 | par->tec, sizeof(struct tcx_tec)); |
| 358 | if (all->par.thc) | 354 | if (par->thc) |
| 359 | of_iounmap(&op->resource[9], | 355 | of_iounmap(&op->resource[9], |
| 360 | all->par.thc, sizeof(struct tcx_thc)); | 356 | par->thc, sizeof(struct tcx_thc)); |
| 361 | if (all->par.bt) | 357 | if (par->bt) |
| 362 | of_iounmap(&op->resource[8], | 358 | of_iounmap(&op->resource[8], |
| 363 | all->par.bt, sizeof(struct bt_regs)); | 359 | par->bt, sizeof(struct bt_regs)); |
| 364 | if (all->par.cplane) | 360 | if (par->cplane) |
| 365 | of_iounmap(&op->resource[4], | 361 | of_iounmap(&op->resource[4], |
| 366 | all->par.cplane, all->par.fbsize * sizeof(u32)); | 362 | par->cplane, par->fbsize * sizeof(u32)); |
| 367 | if (all->info.screen_base) | 363 | if (info->screen_base) |
| 368 | of_iounmap(&op->resource[0], | 364 | of_iounmap(&op->resource[0], |
| 369 | all->info.screen_base, all->par.fbsize); | 365 | info->screen_base, par->fbsize); |
| 370 | } | 366 | } |
| 371 | 367 | ||
| 372 | static int __devinit tcx_init_one(struct of_device *op) | 368 | static int __devinit tcx_init_one(struct of_device *op) |
| 373 | { | 369 | { |
| 374 | struct device_node *dp = op->node; | 370 | struct device_node *dp = op->node; |
| 375 | struct all_info *all; | 371 | struct fb_info *info; |
| 372 | struct tcx_par *par; | ||
| 376 | int linebytes, i, err; | 373 | int linebytes, i, err; |
| 377 | 374 | ||
| 378 | all = kzalloc(sizeof(*all), GFP_KERNEL); | 375 | info = framebuffer_alloc(sizeof(struct tcx_par), &op->dev); |
| 379 | if (!all) | ||
| 380 | return -ENOMEM; | ||
| 381 | 376 | ||
| 382 | spin_lock_init(&all->par.lock); | 377 | err = -ENOMEM; |
| 378 | if (!info) | ||
| 379 | goto out_err; | ||
| 380 | par = info->par; | ||
| 383 | 381 | ||
| 384 | all->par.lowdepth = | 382 | spin_lock_init(&par->lock); |
| 383 | |||
| 384 | par->lowdepth = | ||
| 385 | (of_find_property(dp, "tcx-8-bit", NULL) != NULL); | 385 | (of_find_property(dp, "tcx-8-bit", NULL) != NULL); |
| 386 | 386 | ||
| 387 | sbusfb_fill_var(&all->info.var, dp->node, 8); | 387 | sbusfb_fill_var(&info->var, dp->node, 8); |
| 388 | all->info.var.red.length = 8; | 388 | info->var.red.length = 8; |
| 389 | all->info.var.green.length = 8; | 389 | info->var.green.length = 8; |
| 390 | all->info.var.blue.length = 8; | 390 | info->var.blue.length = 8; |
| 391 | 391 | ||
| 392 | linebytes = of_getintprop_default(dp, "linebytes", | 392 | linebytes = of_getintprop_default(dp, "linebytes", |
| 393 | all->info.var.xres); | 393 | info->var.xres); |
| 394 | all->par.fbsize = PAGE_ALIGN(linebytes * all->info.var.yres); | 394 | par->fbsize = PAGE_ALIGN(linebytes * info->var.yres); |
| 395 | 395 | ||
| 396 | all->par.tec = of_ioremap(&op->resource[7], 0, | 396 | par->tec = of_ioremap(&op->resource[7], 0, |
| 397 | sizeof(struct tcx_tec), "tcx tec"); | 397 | sizeof(struct tcx_tec), "tcx tec"); |
| 398 | all->par.thc = of_ioremap(&op->resource[9], 0, | 398 | par->thc = of_ioremap(&op->resource[9], 0, |
| 399 | sizeof(struct tcx_thc), "tcx thc"); | 399 | sizeof(struct tcx_thc), "tcx thc"); |
| 400 | all->par.bt = of_ioremap(&op->resource[8], 0, | 400 | par->bt = of_ioremap(&op->resource[8], 0, |
| 401 | sizeof(struct bt_regs), "tcx dac"); | 401 | sizeof(struct bt_regs), "tcx dac"); |
| 402 | all->info.screen_base = of_ioremap(&op->resource[0], 0, | 402 | info->screen_base = of_ioremap(&op->resource[0], 0, |
| 403 | all->par.fbsize, "tcx ram"); | 403 | par->fbsize, "tcx ram"); |
| 404 | if (!all->par.tec || !all->par.thc || | 404 | if (!par->tec || !par->thc || |
| 405 | !all->par.bt || !all->info.screen_base) { | 405 | !par->bt || !info->screen_base) |
| 406 | tcx_unmap_regs(op, all); | 406 | goto out_unmap_regs; |
| 407 | kfree(all); | 407 | |
| 408 | return -ENOMEM; | 408 | memcpy(&par->mmap_map, &__tcx_mmap_map, sizeof(par->mmap_map)); |
| 409 | } | 409 | if (!par->lowdepth) { |
| 410 | 410 | par->cplane = of_ioremap(&op->resource[4], 0, | |
| 411 | memcpy(&all->par.mmap_map, &__tcx_mmap_map, sizeof(all->par.mmap_map)); | 411 | par->fbsize * sizeof(u32), |
| 412 | if (!all->par.lowdepth) { | ||
| 413 | all->par.cplane = of_ioremap(&op->resource[4], 0, | ||
| 414 | all->par.fbsize * sizeof(u32), | ||
| 415 | "tcx cplane"); | 412 | "tcx cplane"); |
| 416 | if (!all->par.cplane) { | 413 | if (!par->cplane) |
| 417 | tcx_unmap_regs(op, all); | 414 | goto out_unmap_regs; |
| 418 | kfree(all); | ||
| 419 | return -ENOMEM; | ||
| 420 | } | ||
| 421 | } else { | 415 | } else { |
| 422 | all->par.mmap_map[1].size = SBUS_MMAP_EMPTY; | 416 | par->mmap_map[1].size = SBUS_MMAP_EMPTY; |
| 423 | all->par.mmap_map[4].size = SBUS_MMAP_EMPTY; | 417 | par->mmap_map[4].size = SBUS_MMAP_EMPTY; |
| 424 | all->par.mmap_map[5].size = SBUS_MMAP_EMPTY; | 418 | par->mmap_map[5].size = SBUS_MMAP_EMPTY; |
| 425 | all->par.mmap_map[6].size = SBUS_MMAP_EMPTY; | 419 | par->mmap_map[6].size = SBUS_MMAP_EMPTY; |
| 426 | } | 420 | } |
| 427 | 421 | ||
| 428 | all->par.physbase = 0; | 422 | par->physbase = 0; |
| 429 | all->par.which_io = op->resource[0].flags & IORESOURCE_BITS; | 423 | par->which_io = op->resource[0].flags & IORESOURCE_BITS; |
| 430 | 424 | ||
| 431 | for (i = 0; i < TCX_MMAP_ENTRIES; i++) { | 425 | for (i = 0; i < TCX_MMAP_ENTRIES; i++) { |
| 432 | int j; | 426 | int j; |
| @@ -444,53 +438,54 @@ static int __devinit tcx_init_one(struct of_device *op) | |||
| 444 | j = i; | 438 | j = i; |
| 445 | break; | 439 | break; |
| 446 | }; | 440 | }; |
| 447 | all->par.mmap_map[i].poff = op->resource[j].start; | 441 | par->mmap_map[i].poff = op->resource[j].start; |
| 448 | } | 442 | } |
| 449 | 443 | ||
| 450 | all->info.flags = FBINFO_DEFAULT; | 444 | info->flags = FBINFO_DEFAULT; |
| 451 | all->info.fbops = &tcx_ops; | 445 | info->fbops = &tcx_ops; |
| 452 | all->info.par = &all->par; | ||
| 453 | 446 | ||
| 454 | /* Initialize brooktree DAC. */ | 447 | /* Initialize brooktree DAC. */ |
| 455 | sbus_writel(0x04 << 24, &all->par.bt->addr); /* color planes */ | 448 | sbus_writel(0x04 << 24, &par->bt->addr); /* color planes */ |
| 456 | sbus_writel(0xff << 24, &all->par.bt->control); | 449 | sbus_writel(0xff << 24, &par->bt->control); |
| 457 | sbus_writel(0x05 << 24, &all->par.bt->addr); | 450 | sbus_writel(0x05 << 24, &par->bt->addr); |
| 458 | sbus_writel(0x00 << 24, &all->par.bt->control); | 451 | sbus_writel(0x00 << 24, &par->bt->control); |
| 459 | sbus_writel(0x06 << 24, &all->par.bt->addr); /* overlay plane */ | 452 | sbus_writel(0x06 << 24, &par->bt->addr); /* overlay plane */ |
| 460 | sbus_writel(0x73 << 24, &all->par.bt->control); | 453 | sbus_writel(0x73 << 24, &par->bt->control); |
| 461 | sbus_writel(0x07 << 24, &all->par.bt->addr); | 454 | sbus_writel(0x07 << 24, &par->bt->addr); |
| 462 | sbus_writel(0x00 << 24, &all->par.bt->control); | 455 | sbus_writel(0x00 << 24, &par->bt->control); |
| 463 | 456 | ||
| 464 | tcx_reset(&all->info); | 457 | tcx_reset(info); |
| 465 | |||
| 466 | tcx_blank(FB_BLANK_UNBLANK, &all->info); | ||
| 467 | |||
| 468 | if (fb_alloc_cmap(&all->info.cmap, 256, 0)) { | ||
| 469 | tcx_unmap_regs(op, all); | ||
| 470 | kfree(all); | ||
| 471 | return -ENOMEM; | ||
| 472 | } | ||
| 473 | 458 | ||
| 474 | fb_set_cmap(&all->info.cmap, &all->info); | 459 | tcx_blank(FB_BLANK_UNBLANK, info); |
| 475 | tcx_init_fix(&all->info, linebytes); | ||
| 476 | 460 | ||
| 477 | err = register_framebuffer(&all->info); | 461 | if (fb_alloc_cmap(&info->cmap, 256, 0)) |
| 478 | if (err < 0) { | 462 | goto out_unmap_regs; |
| 479 | fb_dealloc_cmap(&all->info.cmap); | 463 | |
| 480 | tcx_unmap_regs(op, all); | 464 | fb_set_cmap(&info->cmap, info); |
| 481 | kfree(all); | 465 | tcx_init_fix(info, linebytes); |
| 482 | return err; | 466 | |
| 483 | } | 467 | err = register_framebuffer(info); |
| 468 | if (err < 0) | ||
| 469 | goto out_dealloc_cmap; | ||
| 484 | 470 | ||
| 485 | dev_set_drvdata(&op->dev, all); | 471 | dev_set_drvdata(&op->dev, info); |
| 486 | 472 | ||
| 487 | printk("%s: TCX at %lx:%lx, %s\n", | 473 | printk("%s: TCX at %lx:%lx, %s\n", |
| 488 | dp->full_name, | 474 | dp->full_name, |
| 489 | all->par.which_io, | 475 | par->which_io, |
| 490 | op->resource[0].start, | 476 | op->resource[0].start, |
| 491 | all->par.lowdepth ? "8-bit only" : "24-bit depth"); | 477 | par->lowdepth ? "8-bit only" : "24-bit depth"); |
| 492 | 478 | ||
| 493 | return 0; | 479 | return 0; |
| 480 | |||
| 481 | out_dealloc_cmap: | ||
| 482 | fb_dealloc_cmap(&info->cmap); | ||
| 483 | |||
| 484 | out_unmap_regs: | ||
| 485 | tcx_unmap_regs(op, info, par); | ||
| 486 | |||
| 487 | out_err: | ||
| 488 | return err; | ||
| 494 | } | 489 | } |
| 495 | 490 | ||
| 496 | static int __devinit tcx_probe(struct of_device *dev, const struct of_device_id *match) | 491 | static int __devinit tcx_probe(struct of_device *dev, const struct of_device_id *match) |
| @@ -502,14 +497,15 @@ static int __devinit tcx_probe(struct of_device *dev, const struct of_device_id | |||
| 502 | 497 | ||
| 503 | static int __devexit tcx_remove(struct of_device *op) | 498 | static int __devexit tcx_remove(struct of_device *op) |
| 504 | { | 499 | { |
| 505 | struct all_info *all = dev_get_drvdata(&op->dev); | 500 | struct fb_info *info = dev_get_drvdata(&op->dev); |
| 501 | struct tcx_par *par = info->par; | ||
| 506 | 502 | ||
| 507 | unregister_framebuffer(&all->info); | 503 | unregister_framebuffer(info); |
| 508 | fb_dealloc_cmap(&all->info.cmap); | 504 | fb_dealloc_cmap(&info->cmap); |
| 509 | 505 | ||
| 510 | tcx_unmap_regs(op, all); | 506 | tcx_unmap_regs(op, info, par); |
| 511 | 507 | ||
| 512 | kfree(all); | 508 | framebuffer_release(info); |
| 513 | 509 | ||
| 514 | dev_set_drvdata(&op->dev, NULL); | 510 | dev_set_drvdata(&op->dev, NULL); |
| 515 | 511 | ||
diff --git a/fs/compat_ioctl.c b/fs/compat_ioctl.c index e440a7b95d02..2bc1428d621c 100644 --- a/fs/compat_ioctl.c +++ b/fs/compat_ioctl.c | |||
| @@ -115,6 +115,10 @@ | |||
| 115 | #include <linux/dvb/video.h> | 115 | #include <linux/dvb/video.h> |
| 116 | #include <linux/lp.h> | 116 | #include <linux/lp.h> |
| 117 | 117 | ||
| 118 | #ifdef CONFIG_SPARC | ||
| 119 | #include <asm/fbio.h> | ||
| 120 | #endif | ||
| 121 | |||
| 118 | static int do_ioctl32_pointer(unsigned int fd, unsigned int cmd, | 122 | static int do_ioctl32_pointer(unsigned int fd, unsigned int cmd, |
| 119 | unsigned long arg, struct file *f) | 123 | unsigned long arg, struct file *f) |
| 120 | { | 124 | { |
| @@ -3493,6 +3497,22 @@ IGNORE_IOCTL(VFAT_IOCTL_READDIR_SHORT32) | |||
| 3493 | 3497 | ||
| 3494 | /* loop */ | 3498 | /* loop */ |
| 3495 | IGNORE_IOCTL(LOOP_CLR_FD) | 3499 | IGNORE_IOCTL(LOOP_CLR_FD) |
| 3500 | |||
| 3501 | #ifdef CONFIG_SPARC | ||
| 3502 | /* Sparc framebuffers, handled in sbusfb_compat_ioctl() */ | ||
| 3503 | IGNORE_IOCTL(FBIOGTYPE) | ||
| 3504 | IGNORE_IOCTL(FBIOSATTR) | ||
| 3505 | IGNORE_IOCTL(FBIOGATTR) | ||
| 3506 | IGNORE_IOCTL(FBIOSVIDEO) | ||
| 3507 | IGNORE_IOCTL(FBIOGVIDEO) | ||
| 3508 | IGNORE_IOCTL(FBIOSCURPOS) | ||
| 3509 | IGNORE_IOCTL(FBIOGCURPOS) | ||
| 3510 | IGNORE_IOCTL(FBIOGCURMAX) | ||
| 3511 | IGNORE_IOCTL(FBIOPUTCMAP32) | ||
| 3512 | IGNORE_IOCTL(FBIOGETCMAP32) | ||
| 3513 | IGNORE_IOCTL(FBIOSCURSOR32) | ||
| 3514 | IGNORE_IOCTL(FBIOGCURSOR32) | ||
| 3515 | #endif | ||
| 3496 | }; | 3516 | }; |
| 3497 | 3517 | ||
| 3498 | #define IOCTL_HASHSIZE 256 | 3518 | #define IOCTL_HASHSIZE 256 |
diff --git a/fs/partitions/msdos.c b/fs/partitions/msdos.c index 4ccec4cd1367..5567ec0d03a3 100644 --- a/fs/partitions/msdos.c +++ b/fs/partitions/msdos.c | |||
| @@ -203,6 +203,7 @@ parse_solaris_x86(struct parsed_partitions *state, struct block_device *bdev, | |||
| 203 | Sector sect; | 203 | Sector sect; |
| 204 | struct solaris_x86_vtoc *v; | 204 | struct solaris_x86_vtoc *v; |
| 205 | int i; | 205 | int i; |
| 206 | short max_nparts; | ||
| 206 | 207 | ||
| 207 | v = (struct solaris_x86_vtoc *)read_dev_sector(bdev, offset+1, §); | 208 | v = (struct solaris_x86_vtoc *)read_dev_sector(bdev, offset+1, §); |
| 208 | if (!v) | 209 | if (!v) |
| @@ -218,7 +219,9 @@ parse_solaris_x86(struct parsed_partitions *state, struct block_device *bdev, | |||
| 218 | put_dev_sector(sect); | 219 | put_dev_sector(sect); |
| 219 | return; | 220 | return; |
| 220 | } | 221 | } |
| 221 | for (i=0; i<SOLARIS_X86_NUMSLICE && state->next<state->limit; i++) { | 222 | /* Ensure we can handle previous case of VTOC with 8 entries gracefully */ |
| 223 | max_nparts = le16_to_cpu (v->v_nparts) > 8 ? SOLARIS_X86_NUMSLICE : 8; | ||
| 224 | for (i=0; i<max_nparts && state->next<state->limit; i++) { | ||
| 222 | struct solaris_x86_slice *s = &v->v_slice[i]; | 225 | struct solaris_x86_slice *s = &v->v_slice[i]; |
| 223 | if (s->s_size == 0) | 226 | if (s->s_size == 0) |
| 224 | continue; | 227 | continue; |
diff --git a/fs/partitions/sun.c b/fs/partitions/sun.c index 123f8b46c8ba..794118da4ef3 100644 --- a/fs/partitions/sun.c +++ b/fs/partitions/sun.c | |||
| @@ -19,34 +19,47 @@ int sun_partition(struct parsed_partitions *state, struct block_device *bdev) | |||
| 19 | Sector sect; | 19 | Sector sect; |
| 20 | struct sun_disklabel { | 20 | struct sun_disklabel { |
| 21 | unsigned char info[128]; /* Informative text string */ | 21 | unsigned char info[128]; /* Informative text string */ |
| 22 | unsigned char spare0[14]; | 22 | struct sun_vtoc { |
| 23 | struct sun_info { | 23 | __be32 version; /* Layout version */ |
| 24 | unsigned char spare1; | 24 | char volume[8]; /* Volume name */ |
| 25 | unsigned char id; | 25 | __be16 nparts; /* Number of partitions */ |
| 26 | unsigned char spare2; | 26 | struct sun_info { /* Partition hdrs, sec 2 */ |
| 27 | unsigned char flags; | 27 | __be16 id; |
| 28 | } infos[8]; | 28 | __be16 flags; |
| 29 | unsigned char spare[246]; /* Boot information etc. */ | 29 | } infos[8]; |
| 30 | __be16 padding; /* Alignment padding */ | ||
| 31 | __be32 bootinfo[3]; /* Info needed by mboot */ | ||
| 32 | __be32 sanity; /* To verify vtoc sanity */ | ||
| 33 | __be32 reserved[10]; /* Free space */ | ||
| 34 | __be32 timestamp[8]; /* Partition timestamp */ | ||
| 35 | } vtoc; | ||
| 36 | __be32 write_reinstruct; /* sectors to skip, writes */ | ||
| 37 | __be32 read_reinstruct; /* sectors to skip, reads */ | ||
| 38 | unsigned char spare[148]; /* Padding */ | ||
| 30 | __be16 rspeed; /* Disk rotational speed */ | 39 | __be16 rspeed; /* Disk rotational speed */ |
| 31 | __be16 pcylcount; /* Physical cylinder count */ | 40 | __be16 pcylcount; /* Physical cylinder count */ |
| 32 | __be16 sparecyl; /* extra sects per cylinder */ | 41 | __be16 sparecyl; /* extra sects per cylinder */ |
| 33 | unsigned char spare2[4]; /* More magic... */ | 42 | __be16 obs1; /* gap1 */ |
| 43 | __be16 obs2; /* gap2 */ | ||
| 34 | __be16 ilfact; /* Interleave factor */ | 44 | __be16 ilfact; /* Interleave factor */ |
| 35 | __be16 ncyl; /* Data cylinder count */ | 45 | __be16 ncyl; /* Data cylinder count */ |
| 36 | __be16 nacyl; /* Alt. cylinder count */ | 46 | __be16 nacyl; /* Alt. cylinder count */ |
| 37 | __be16 ntrks; /* Tracks per cylinder */ | 47 | __be16 ntrks; /* Tracks per cylinder */ |
| 38 | __be16 nsect; /* Sectors per track */ | 48 | __be16 nsect; /* Sectors per track */ |
| 39 | unsigned char spare3[4]; /* Even more magic... */ | 49 | __be16 obs3; /* bhead - Label head offset */ |
| 50 | __be16 obs4; /* ppart - Physical Partition */ | ||
| 40 | struct sun_partition { | 51 | struct sun_partition { |
| 41 | __be32 start_cylinder; | 52 | __be32 start_cylinder; |
| 42 | __be32 num_sectors; | 53 | __be32 num_sectors; |
| 43 | } partitions[8]; | 54 | } partitions[8]; |
| 44 | __be16 magic; /* Magic number */ | 55 | __be16 magic; /* Magic number */ |
| 45 | __be16 csum; /* Label xor'd checksum */ | 56 | __be16 csum; /* Label xor'd checksum */ |
| 46 | } * label; | 57 | } * label; |
| 47 | struct sun_partition *p; | 58 | struct sun_partition *p; |
| 48 | unsigned long spc; | 59 | unsigned long spc; |
| 49 | char b[BDEVNAME_SIZE]; | 60 | char b[BDEVNAME_SIZE]; |
| 61 | int use_vtoc; | ||
| 62 | int nparts; | ||
| 50 | 63 | ||
| 51 | label = (struct sun_disklabel *)read_dev_sector(bdev, 0, §); | 64 | label = (struct sun_disklabel *)read_dev_sector(bdev, 0, §); |
| 52 | if (!label) | 65 | if (!label) |
| @@ -70,9 +83,22 @@ int sun_partition(struct parsed_partitions *state, struct block_device *bdev) | |||
| 70 | return 0; | 83 | return 0; |
| 71 | } | 84 | } |
| 72 | 85 | ||
| 73 | /* All Sun disks have 8 partition entries */ | 86 | /* Check to see if we can use the VTOC table */ |
| 87 | use_vtoc = ((be32_to_cpu(label->vtoc.sanity) == SUN_VTOC_SANITY) && | ||
| 88 | (be32_to_cpu(label->vtoc.version) == 1) && | ||
| 89 | (be16_to_cpu(label->vtoc.nparts) <= 8)); | ||
| 90 | |||
| 91 | /* Use 8 partition entries if not specified in validated VTOC */ | ||
| 92 | nparts = (use_vtoc) ? be16_to_cpu(label->vtoc.nparts) : 8; | ||
| 93 | |||
| 94 | /* | ||
| 95 | * So that old Linux-Sun partitions continue to work, | ||
| 96 | * alow the VTOC to be used under the additional condition ... | ||
| 97 | */ | ||
| 98 | use_vtoc = use_vtoc || !(label->vtoc.sanity | | ||
| 99 | label->vtoc.version | label->vtoc.nparts); | ||
| 74 | spc = be16_to_cpu(label->ntrks) * be16_to_cpu(label->nsect); | 100 | spc = be16_to_cpu(label->ntrks) * be16_to_cpu(label->nsect); |
| 75 | for (i = 0; i < 8; i++, p++) { | 101 | for (i = 0; i < nparts; i++, p++) { |
| 76 | unsigned long st_sector; | 102 | unsigned long st_sector; |
| 77 | unsigned int num_sectors; | 103 | unsigned int num_sectors; |
| 78 | 104 | ||
| @@ -81,10 +107,12 @@ int sun_partition(struct parsed_partitions *state, struct block_device *bdev) | |||
| 81 | if (num_sectors) { | 107 | if (num_sectors) { |
| 82 | put_partition(state, slot, st_sector, num_sectors); | 108 | put_partition(state, slot, st_sector, num_sectors); |
| 83 | state->parts[slot].flags = 0; | 109 | state->parts[slot].flags = 0; |
| 84 | if (label->infos[i].id == LINUX_RAID_PARTITION) | 110 | if (use_vtoc) { |
| 85 | state->parts[slot].flags |= ADDPART_FLAG_RAID; | 111 | if (be16_to_cpu(label->vtoc.infos[i].id) == LINUX_RAID_PARTITION) |
| 86 | if (label->infos[i].id == SUN_WHOLE_DISK) | 112 | state->parts[slot].flags |= ADDPART_FLAG_RAID; |
| 87 | state->parts[slot].flags |= ADDPART_FLAG_WHOLEDISK; | 113 | else if (be16_to_cpu(label->vtoc.infos[i].id) == SUN_WHOLE_DISK) |
| 114 | state->parts[slot].flags |= ADDPART_FLAG_WHOLEDISK; | ||
| 115 | } | ||
| 88 | } | 116 | } |
| 89 | slot++; | 117 | slot++; |
| 90 | } | 118 | } |
diff --git a/fs/partitions/sun.h b/fs/partitions/sun.h index b1b19fda7b22..7f864d1f86d4 100644 --- a/fs/partitions/sun.h +++ b/fs/partitions/sun.h | |||
| @@ -3,5 +3,6 @@ | |||
| 3 | */ | 3 | */ |
| 4 | 4 | ||
| 5 | #define SUN_LABEL_MAGIC 0xDABE | 5 | #define SUN_LABEL_MAGIC 0xDABE |
| 6 | #define SUN_VTOC_SANITY 0x600DDEEE | ||
| 6 | 7 | ||
| 7 | int sun_partition(struct parsed_partitions *state, struct block_device *bdev); | 8 | int sun_partition(struct parsed_partitions *state, struct block_device *bdev); |
diff --git a/include/asm-sparc/device.h b/include/asm-sparc/device.h index 4a56d84d69c4..c0a7786d65f7 100644 --- a/include/asm-sparc/device.h +++ b/include/asm-sparc/device.h | |||
| @@ -10,6 +10,10 @@ struct device_node; | |||
| 10 | struct of_device; | 10 | struct of_device; |
| 11 | 11 | ||
| 12 | struct dev_archdata { | 12 | struct dev_archdata { |
| 13 | void *iommu; | ||
| 14 | void *stc; | ||
| 15 | void *host_controller; | ||
| 16 | |||
| 13 | struct device_node *prom_node; | 17 | struct device_node *prom_node; |
| 14 | struct of_device *op; | 18 | struct of_device *op; |
| 15 | }; | 19 | }; |
diff --git a/include/asm-sparc/floppy.h b/include/asm-sparc/floppy.h index 9073c84218ce..28ce2b9c3da8 100644 --- a/include/asm-sparc/floppy.h +++ b/include/asm-sparc/floppy.h | |||
| @@ -101,6 +101,29 @@ static struct sun_floppy_ops sun_fdops; | |||
| 101 | #define CROSS_64KB(a,s) (0) | 101 | #define CROSS_64KB(a,s) (0) |
| 102 | 102 | ||
| 103 | /* Routines unique to each controller type on a Sun. */ | 103 | /* Routines unique to each controller type on a Sun. */ |
| 104 | static void sun_set_dor(unsigned char value, int fdc_82077) | ||
| 105 | { | ||
| 106 | if (sparc_cpu_model == sun4c) { | ||
| 107 | unsigned int bits = 0; | ||
| 108 | if (value & 0x10) | ||
| 109 | bits |= AUXIO_FLPY_DSEL; | ||
| 110 | if ((value & 0x80) == 0) | ||
| 111 | bits |= AUXIO_FLPY_EJCT; | ||
| 112 | set_auxio(bits, (~bits) & (AUXIO_FLPY_DSEL|AUXIO_FLPY_EJCT)); | ||
| 113 | } | ||
| 114 | if (fdc_82077) { | ||
| 115 | sun_fdc->dor_82077 = value; | ||
| 116 | } | ||
| 117 | } | ||
| 118 | |||
| 119 | static unsigned char sun_read_dir(void) | ||
| 120 | { | ||
| 121 | if (sparc_cpu_model == sun4c) | ||
| 122 | return (get_auxio() & AUXIO_FLPY_DCHG) ? 0x80 : 0; | ||
| 123 | else | ||
| 124 | return sun_fdc->dir_82077; | ||
| 125 | } | ||
| 126 | |||
| 104 | static unsigned char sun_82072_fd_inb(int port) | 127 | static unsigned char sun_82072_fd_inb(int port) |
| 105 | { | 128 | { |
| 106 | udelay(5); | 129 | udelay(5); |
| @@ -113,7 +136,7 @@ static unsigned char sun_82072_fd_inb(int port) | |||
| 113 | case 5: /* FD_DATA */ | 136 | case 5: /* FD_DATA */ |
| 114 | return sun_fdc->data_82072; | 137 | return sun_fdc->data_82072; |
| 115 | case 7: /* FD_DIR */ | 138 | case 7: /* FD_DIR */ |
| 116 | return (get_auxio() & AUXIO_FLPY_DCHG)? 0x80: 0; | 139 | return sun_read_dir(); |
| 117 | }; | 140 | }; |
| 118 | panic("sun_82072_fd_inb: How did I get here?"); | 141 | panic("sun_82072_fd_inb: How did I get here?"); |
| 119 | } | 142 | } |
| @@ -126,20 +149,7 @@ static void sun_82072_fd_outb(unsigned char value, int port) | |||
| 126 | printk("floppy: Asked to write to unknown port %d\n", port); | 149 | printk("floppy: Asked to write to unknown port %d\n", port); |
| 127 | panic("floppy: Port bolixed."); | 150 | panic("floppy: Port bolixed."); |
| 128 | case 2: /* FD_DOR */ | 151 | case 2: /* FD_DOR */ |
| 129 | /* Oh geese, 82072 on the Sun has no DOR register, | 152 | sun_set_dor(value, 0); |
| 130 | * the functionality is implemented via the AUXIO | ||
| 131 | * I/O register. So we must emulate the behavior. | ||
| 132 | * | ||
| 133 | * ASSUMPTIONS: There will only ever be one floppy | ||
| 134 | * drive attached to a Sun controller | ||
| 135 | * and it will be at drive zero. | ||
| 136 | */ | ||
| 137 | { | ||
| 138 | unsigned bits = 0; | ||
| 139 | if (value & 0x10) bits |= AUXIO_FLPY_DSEL; | ||
| 140 | if ((value & 0x80) == 0) bits |= AUXIO_FLPY_EJCT; | ||
| 141 | set_auxio(bits, (~bits) & (AUXIO_FLPY_DSEL|AUXIO_FLPY_EJCT)); | ||
| 142 | } | ||
| 143 | break; | 153 | break; |
| 144 | case 5: /* FD_DATA */ | 154 | case 5: /* FD_DATA */ |
| 145 | sun_fdc->data_82072 = value; | 155 | sun_fdc->data_82072 = value; |
| @@ -161,15 +171,22 @@ static unsigned char sun_82077_fd_inb(int port) | |||
| 161 | default: | 171 | default: |
| 162 | printk("floppy: Asked to read unknown port %d\n", port); | 172 | printk("floppy: Asked to read unknown port %d\n", port); |
| 163 | panic("floppy: Port bolixed."); | 173 | panic("floppy: Port bolixed."); |
| 174 | case 0: /* FD_STATUS_0 */ | ||
| 175 | return sun_fdc->status1_82077; | ||
| 176 | case 1: /* FD_STATUS_1 */ | ||
| 177 | return sun_fdc->status2_82077; | ||
| 178 | case 2: /* FD_DOR */ | ||
| 179 | return sun_fdc->dor_82077; | ||
| 180 | case 3: /* FD_TDR */ | ||
| 181 | return sun_fdc->tapectl_82077; | ||
| 164 | case 4: /* FD_STATUS */ | 182 | case 4: /* FD_STATUS */ |
| 165 | return sun_fdc->status_82077 & ~STATUS_DMA; | 183 | return sun_fdc->status_82077 & ~STATUS_DMA; |
| 166 | case 5: /* FD_DATA */ | 184 | case 5: /* FD_DATA */ |
| 167 | return sun_fdc->data_82077; | 185 | return sun_fdc->data_82077; |
| 168 | case 7: /* FD_DIR */ | 186 | case 7: /* FD_DIR */ |
| 169 | /* XXX: Is DCL on 0x80 in sun4m? */ | 187 | return sun_read_dir(); |
| 170 | return sun_fdc->dir_82077; | ||
| 171 | }; | 188 | }; |
| 172 | panic("sun_82072_fd_inb: How did I get here?"); | 189 | panic("sun_82077_fd_inb: How did I get here?"); |
| 173 | } | 190 | } |
| 174 | 191 | ||
| 175 | static void sun_82077_fd_outb(unsigned char value, int port) | 192 | static void sun_82077_fd_outb(unsigned char value, int port) |
| @@ -180,8 +197,7 @@ static void sun_82077_fd_outb(unsigned char value, int port) | |||
| 180 | printk("floppy: Asked to write to unknown port %d\n", port); | 197 | printk("floppy: Asked to write to unknown port %d\n", port); |
| 181 | panic("floppy: Port bolixed."); | 198 | panic("floppy: Port bolixed."); |
| 182 | case 2: /* FD_DOR */ | 199 | case 2: /* FD_DOR */ |
| 183 | /* Happily, the 82077 has a real DOR register. */ | 200 | sun_set_dor(value, 1); |
| 184 | sun_fdc->dor_82077 = value; | ||
| 185 | break; | 201 | break; |
| 186 | case 5: /* FD_DATA */ | 202 | case 5: /* FD_DATA */ |
| 187 | sun_fdc->data_82077 = value; | 203 | sun_fdc->data_82077 = value; |
| @@ -192,6 +208,9 @@ static void sun_82077_fd_outb(unsigned char value, int port) | |||
| 192 | case 4: /* FD_STATUS */ | 208 | case 4: /* FD_STATUS */ |
| 193 | sun_fdc->status_82077 = value; | 209 | sun_fdc->status_82077 = value; |
| 194 | break; | 210 | break; |
| 211 | case 3: /* FD_TDR */ | ||
| 212 | sun_fdc->tapectl_82077 = value; | ||
| 213 | break; | ||
| 195 | }; | 214 | }; |
| 196 | return; | 215 | return; |
| 197 | } | 216 | } |
| @@ -332,16 +351,17 @@ static int sun_floppy_init(void) | |||
| 332 | goto no_sun_fdc; | 351 | goto no_sun_fdc; |
| 333 | } | 352 | } |
| 334 | 353 | ||
| 335 | if(sparc_cpu_model == sun4c) { | 354 | sun_fdops.fd_inb = sun_82077_fd_inb; |
| 336 | sun_fdops.fd_inb = sun_82072_fd_inb; | 355 | sun_fdops.fd_outb = sun_82077_fd_outb; |
| 337 | sun_fdops.fd_outb = sun_82072_fd_outb; | 356 | fdc_status = &sun_fdc->status_82077; |
| 338 | fdc_status = &sun_fdc->status_82072; | 357 | |
| 339 | /* printk("AUXIO @0x%lx\n", auxio_register); */ /* P3 */ | 358 | if (sun_fdc->dor_82077 == 0x80) { |
| 340 | } else { | 359 | sun_fdc->dor_82077 = 0x02; |
| 341 | sun_fdops.fd_inb = sun_82077_fd_inb; | 360 | if (sun_fdc->dor_82077 == 0x80) { |
| 342 | sun_fdops.fd_outb = sun_82077_fd_outb; | 361 | sun_fdops.fd_inb = sun_82072_fd_inb; |
| 343 | fdc_status = &sun_fdc->status_82077; | 362 | sun_fdops.fd_outb = sun_82072_fd_outb; |
| 344 | /* printk("DOR @0x%p\n", &sun_fdc->dor_82077); */ /* P3 */ | 363 | fdc_status = &sun_fdc->status_82072; |
| 364 | } | ||
| 345 | } | 365 | } |
| 346 | 366 | ||
| 347 | /* Success... */ | 367 | /* Success... */ |
diff --git a/include/asm-sparc64/dma-mapping.h b/include/asm-sparc64/dma-mapping.h index c58ec1661df8..0a1006692bb2 100644 --- a/include/asm-sparc64/dma-mapping.h +++ b/include/asm-sparc64/dma-mapping.h | |||
| @@ -1,307 +1,134 @@ | |||
| 1 | #ifndef _ASM_SPARC64_DMA_MAPPING_H | 1 | #ifndef _ASM_SPARC64_DMA_MAPPING_H |
| 2 | #define _ASM_SPARC64_DMA_MAPPING_H | 2 | #define _ASM_SPARC64_DMA_MAPPING_H |
| 3 | 3 | ||
| 4 | 4 | #include <linux/scatterlist.h> | |
| 5 | #ifdef CONFIG_PCI | ||
| 6 | |||
| 7 | /* we implement the API below in terms of the existing PCI one, | ||
| 8 | * so include it */ | ||
| 9 | #include <linux/pci.h> | ||
| 10 | /* need struct page definitions */ | ||
| 11 | #include <linux/mm.h> | 5 | #include <linux/mm.h> |
| 12 | 6 | ||
| 13 | #include <asm/of_device.h> | 7 | #define DMA_ERROR_CODE (~(dma_addr_t)0x0) |
| 14 | 8 | ||
| 15 | static inline int | 9 | struct dma_ops { |
| 16 | dma_supported(struct device *dev, u64 mask) | 10 | void *(*alloc_coherent)(struct device *dev, size_t size, |
| 17 | { | 11 | dma_addr_t *dma_handle, gfp_t flag); |
| 18 | BUG_ON(dev->bus != &pci_bus_type); | 12 | void (*free_coherent)(struct device *dev, size_t size, |
| 19 | 13 | void *cpu_addr, dma_addr_t dma_handle); | |
| 20 | return pci_dma_supported(to_pci_dev(dev), mask); | 14 | dma_addr_t (*map_single)(struct device *dev, void *cpu_addr, |
| 21 | } | 15 | size_t size, |
| 22 | 16 | enum dma_data_direction direction); | |
| 23 | static inline int | 17 | void (*unmap_single)(struct device *dev, dma_addr_t dma_addr, |
| 24 | dma_set_mask(struct device *dev, u64 dma_mask) | 18 | size_t size, |
| 25 | { | 19 | enum dma_data_direction direction); |
| 26 | BUG_ON(dev->bus != &pci_bus_type); | 20 | int (*map_sg)(struct device *dev, struct scatterlist *sg, int nents, |
| 27 | 21 | enum dma_data_direction direction); | |
| 28 | return pci_set_dma_mask(to_pci_dev(dev), dma_mask); | 22 | void (*unmap_sg)(struct device *dev, struct scatterlist *sg, |
| 29 | } | 23 | int nhwentries, |
| 30 | 24 | enum dma_data_direction direction); | |
| 31 | static inline void * | 25 | void (*sync_single_for_cpu)(struct device *dev, |
| 32 | dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *dma_handle, | 26 | dma_addr_t dma_handle, size_t size, |
| 33 | gfp_t flag) | 27 | enum dma_data_direction direction); |
| 34 | { | 28 | void (*sync_single_for_device)(struct device *dev, |
| 35 | BUG_ON(dev->bus != &pci_bus_type); | 29 | dma_addr_t dma_handle, size_t size, |
| 36 | 30 | enum dma_data_direction direction); | |
| 37 | return pci_iommu_ops->alloc_consistent(to_pci_dev(dev), size, dma_handle, flag); | 31 | void (*sync_sg_for_cpu)(struct device *dev, struct scatterlist *sg, |
| 38 | } | 32 | int nelems, |
| 39 | 33 | enum dma_data_direction direction); | |
| 40 | static inline void | 34 | void (*sync_sg_for_device)(struct device *dev, struct scatterlist *sg, |
| 41 | dma_free_coherent(struct device *dev, size_t size, void *cpu_addr, | 35 | int nelems, |
| 42 | dma_addr_t dma_handle) | 36 | enum dma_data_direction direction); |
| 43 | { | 37 | }; |
| 44 | BUG_ON(dev->bus != &pci_bus_type); | 38 | extern const struct dma_ops *dma_ops; |
| 45 | 39 | ||
| 46 | pci_free_consistent(to_pci_dev(dev), size, cpu_addr, dma_handle); | 40 | extern int dma_supported(struct device *dev, u64 mask); |
| 47 | } | 41 | extern int dma_set_mask(struct device *dev, u64 dma_mask); |
| 48 | |||
| 49 | static inline dma_addr_t | ||
| 50 | dma_map_single(struct device *dev, void *cpu_addr, size_t size, | ||
| 51 | enum dma_data_direction direction) | ||
| 52 | { | ||
| 53 | BUG_ON(dev->bus != &pci_bus_type); | ||
| 54 | |||
| 55 | return pci_map_single(to_pci_dev(dev), cpu_addr, size, (int)direction); | ||
| 56 | } | ||
| 57 | |||
| 58 | static inline void | ||
| 59 | dma_unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size, | ||
| 60 | enum dma_data_direction direction) | ||
| 61 | { | ||
| 62 | BUG_ON(dev->bus != &pci_bus_type); | ||
| 63 | |||
| 64 | pci_unmap_single(to_pci_dev(dev), dma_addr, size, (int)direction); | ||
| 65 | } | ||
| 66 | |||
| 67 | static inline dma_addr_t | ||
| 68 | dma_map_page(struct device *dev, struct page *page, | ||
| 69 | unsigned long offset, size_t size, | ||
| 70 | enum dma_data_direction direction) | ||
| 71 | { | ||
| 72 | BUG_ON(dev->bus != &pci_bus_type); | ||
| 73 | |||
| 74 | return pci_map_page(to_pci_dev(dev), page, offset, size, (int)direction); | ||
| 75 | } | ||
| 76 | |||
| 77 | static inline void | ||
| 78 | dma_unmap_page(struct device *dev, dma_addr_t dma_address, size_t size, | ||
| 79 | enum dma_data_direction direction) | ||
| 80 | { | ||
| 81 | BUG_ON(dev->bus != &pci_bus_type); | ||
| 82 | |||
| 83 | pci_unmap_page(to_pci_dev(dev), dma_address, size, (int)direction); | ||
| 84 | } | ||
| 85 | |||
| 86 | static inline int | ||
| 87 | dma_map_sg(struct device *dev, struct scatterlist *sg, int nents, | ||
| 88 | enum dma_data_direction direction) | ||
| 89 | { | ||
| 90 | BUG_ON(dev->bus != &pci_bus_type); | ||
| 91 | |||
| 92 | return pci_map_sg(to_pci_dev(dev), sg, nents, (int)direction); | ||
| 93 | } | ||
| 94 | |||
| 95 | static inline void | ||
| 96 | dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nhwentries, | ||
| 97 | enum dma_data_direction direction) | ||
| 98 | { | ||
| 99 | BUG_ON(dev->bus != &pci_bus_type); | ||
| 100 | |||
| 101 | pci_unmap_sg(to_pci_dev(dev), sg, nhwentries, (int)direction); | ||
| 102 | } | ||
| 103 | |||
| 104 | static inline void | ||
| 105 | dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle, size_t size, | ||
| 106 | enum dma_data_direction direction) | ||
| 107 | { | ||
| 108 | BUG_ON(dev->bus != &pci_bus_type); | ||
| 109 | |||
| 110 | pci_dma_sync_single_for_cpu(to_pci_dev(dev), dma_handle, | ||
| 111 | size, (int)direction); | ||
| 112 | } | ||
| 113 | |||
| 114 | static inline void | ||
| 115 | dma_sync_single_for_device(struct device *dev, dma_addr_t dma_handle, size_t size, | ||
| 116 | enum dma_data_direction direction) | ||
| 117 | { | ||
| 118 | BUG_ON(dev->bus != &pci_bus_type); | ||
| 119 | |||
| 120 | pci_dma_sync_single_for_device(to_pci_dev(dev), dma_handle, | ||
| 121 | size, (int)direction); | ||
| 122 | } | ||
| 123 | |||
| 124 | static inline void | ||
| 125 | dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, int nelems, | ||
| 126 | enum dma_data_direction direction) | ||
| 127 | { | ||
| 128 | BUG_ON(dev->bus != &pci_bus_type); | ||
| 129 | |||
| 130 | pci_dma_sync_sg_for_cpu(to_pci_dev(dev), sg, nelems, (int)direction); | ||
| 131 | } | ||
| 132 | |||
| 133 | static inline void | ||
| 134 | dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int nelems, | ||
| 135 | enum dma_data_direction direction) | ||
| 136 | { | ||
| 137 | BUG_ON(dev->bus != &pci_bus_type); | ||
| 138 | |||
| 139 | pci_dma_sync_sg_for_device(to_pci_dev(dev), sg, nelems, (int)direction); | ||
| 140 | } | ||
| 141 | |||
| 142 | static inline int | ||
| 143 | dma_mapping_error(dma_addr_t dma_addr) | ||
| 144 | { | ||
| 145 | return pci_dma_mapping_error(dma_addr); | ||
| 146 | } | ||
| 147 | |||
| 148 | #else | ||
| 149 | |||
| 150 | struct device; | ||
| 151 | struct page; | ||
| 152 | struct scatterlist; | ||
| 153 | |||
| 154 | static inline int | ||
| 155 | dma_supported(struct device *dev, u64 mask) | ||
| 156 | { | ||
| 157 | BUG(); | ||
| 158 | return 0; | ||
| 159 | } | ||
| 160 | |||
| 161 | static inline int | ||
| 162 | dma_set_mask(struct device *dev, u64 dma_mask) | ||
| 163 | { | ||
| 164 | BUG(); | ||
| 165 | return 0; | ||
| 166 | } | ||
| 167 | 42 | ||
| 168 | static inline void *dma_alloc_coherent(struct device *dev, size_t size, | 43 | static inline void *dma_alloc_coherent(struct device *dev, size_t size, |
| 169 | dma_addr_t *dma_handle, gfp_t flag) | 44 | dma_addr_t *dma_handle, gfp_t flag) |
| 170 | { | 45 | { |
| 171 | BUG(); | 46 | return dma_ops->alloc_coherent(dev, size, dma_handle, flag); |
| 172 | return NULL; | ||
| 173 | } | 47 | } |
| 174 | 48 | ||
| 175 | static inline void dma_free_coherent(struct device *dev, size_t size, | 49 | static inline void dma_free_coherent(struct device *dev, size_t size, |
| 176 | void *vaddr, dma_addr_t dma_handle) | 50 | void *cpu_addr, dma_addr_t dma_handle) |
| 177 | { | 51 | { |
| 178 | BUG(); | 52 | dma_ops->free_coherent(dev, size, cpu_addr, dma_handle); |
| 179 | } | 53 | } |
| 180 | 54 | ||
| 181 | static inline dma_addr_t | 55 | static inline dma_addr_t dma_map_single(struct device *dev, void *cpu_addr, |
| 182 | dma_map_single(struct device *dev, void *cpu_addr, size_t size, | 56 | size_t size, |
| 183 | enum dma_data_direction direction) | 57 | enum dma_data_direction direction) |
| 184 | { | 58 | { |
| 185 | BUG(); | 59 | return dma_ops->map_single(dev, cpu_addr, size, direction); |
| 186 | return 0; | ||
| 187 | } | 60 | } |
| 188 | 61 | ||
| 189 | static inline void | 62 | static inline void dma_unmap_single(struct device *dev, dma_addr_t dma_addr, |
| 190 | dma_unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size, | 63 | size_t size, |
| 191 | enum dma_data_direction direction) | 64 | enum dma_data_direction direction) |
| 192 | { | 65 | { |
| 193 | BUG(); | 66 | dma_ops->unmap_single(dev, dma_addr, size, direction); |
| 194 | } | 67 | } |
| 195 | 68 | ||
| 196 | static inline dma_addr_t | 69 | static inline dma_addr_t dma_map_page(struct device *dev, struct page *page, |
| 197 | dma_map_page(struct device *dev, struct page *page, | 70 | unsigned long offset, size_t size, |
| 198 | unsigned long offset, size_t size, | 71 | enum dma_data_direction direction) |
| 199 | enum dma_data_direction direction) | ||
| 200 | { | 72 | { |
| 201 | BUG(); | 73 | return dma_ops->map_single(dev, page_address(page) + offset, |
| 202 | return 0; | 74 | size, direction); |
| 203 | } | 75 | } |
| 204 | 76 | ||
| 205 | static inline void | 77 | static inline void dma_unmap_page(struct device *dev, dma_addr_t dma_address, |
| 206 | dma_unmap_page(struct device *dev, dma_addr_t dma_address, size_t size, | 78 | size_t size, |
| 207 | enum dma_data_direction direction) | 79 | enum dma_data_direction direction) |
| 208 | { | 80 | { |
| 209 | BUG(); | 81 | dma_ops->unmap_single(dev, dma_address, size, direction); |
| 210 | } | 82 | } |
| 211 | 83 | ||
| 212 | static inline int | 84 | static inline int dma_map_sg(struct device *dev, struct scatterlist *sg, |
| 213 | dma_map_sg(struct device *dev, struct scatterlist *sg, int nents, | 85 | int nents, enum dma_data_direction direction) |
| 214 | enum dma_data_direction direction) | ||
| 215 | { | 86 | { |
| 216 | BUG(); | 87 | return dma_ops->map_sg(dev, sg, nents, direction); |
| 217 | return 0; | ||
| 218 | } | 88 | } |
| 219 | 89 | ||
| 220 | static inline void | 90 | static inline void dma_unmap_sg(struct device *dev, struct scatterlist *sg, |
| 221 | dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nhwentries, | 91 | int nents, enum dma_data_direction direction) |
| 222 | enum dma_data_direction direction) | ||
| 223 | { | 92 | { |
| 224 | BUG(); | 93 | dma_ops->unmap_sg(dev, sg, nents, direction); |
| 225 | } | 94 | } |
| 226 | 95 | ||
| 227 | static inline void | 96 | static inline void dma_sync_single_for_cpu(struct device *dev, |
| 228 | dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle, size_t size, | 97 | dma_addr_t dma_handle, size_t size, |
| 229 | enum dma_data_direction direction) | 98 | enum dma_data_direction direction) |
| 230 | { | 99 | { |
| 231 | BUG(); | 100 | dma_ops->sync_single_for_cpu(dev, dma_handle, size, direction); |
| 232 | } | 101 | } |
| 233 | 102 | ||
| 234 | static inline void | 103 | static inline void dma_sync_single_for_device(struct device *dev, |
| 235 | dma_sync_single_for_device(struct device *dev, dma_addr_t dma_handle, size_t size, | 104 | dma_addr_t dma_handle, |
| 236 | enum dma_data_direction direction) | 105 | size_t size, |
| 106 | enum dma_data_direction direction) | ||
| 237 | { | 107 | { |
| 238 | BUG(); | 108 | dma_ops->sync_single_for_device(dev, dma_handle, size, direction); |
| 239 | } | 109 | } |
| 240 | 110 | ||
| 241 | static inline void | 111 | static inline void dma_sync_sg_for_cpu(struct device *dev, |
| 242 | dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, int nelems, | 112 | struct scatterlist *sg, int nelems, |
| 243 | enum dma_data_direction direction) | 113 | enum dma_data_direction direction) |
| 244 | { | 114 | { |
| 245 | BUG(); | 115 | dma_ops->sync_sg_for_cpu(dev, sg, nelems, direction); |
| 246 | } | 116 | } |
| 247 | 117 | ||
| 248 | static inline void | 118 | static inline void dma_sync_sg_for_device(struct device *dev, |
| 249 | dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int nelems, | 119 | struct scatterlist *sg, int nelems, |
| 250 | enum dma_data_direction direction) | 120 | enum dma_data_direction direction) |
| 251 | { | 121 | { |
| 252 | BUG(); | 122 | dma_ops->sync_sg_for_device(dev, sg, nelems, direction); |
| 253 | } | 123 | } |
| 254 | 124 | ||
| 255 | static inline int | 125 | static inline int dma_mapping_error(dma_addr_t dma_addr) |
| 256 | dma_mapping_error(dma_addr_t dma_addr) | ||
| 257 | { | 126 | { |
| 258 | BUG(); | 127 | return (dma_addr == DMA_ERROR_CODE); |
| 259 | return 0; | ||
| 260 | } | 128 | } |
| 261 | 129 | ||
| 262 | #endif /* PCI */ | ||
| 263 | |||
| 264 | |||
| 265 | /* Now for the API extensions over the pci_ one */ | ||
| 266 | |||
| 267 | #define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f) | 130 | #define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f) |
| 268 | #define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h) | 131 | #define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h) |
| 269 | #define dma_is_consistent(d, h) (1) | 132 | #define dma_is_consistent(d, h) (1) |
| 270 | 133 | ||
| 271 | static inline int | ||
| 272 | dma_get_cache_alignment(void) | ||
| 273 | { | ||
| 274 | /* no easy way to get cache size on all processors, so return | ||
| 275 | * the maximum possible, to be safe */ | ||
| 276 | return (1 << INTERNODE_CACHE_SHIFT); | ||
| 277 | } | ||
| 278 | |||
| 279 | static inline void | ||
| 280 | dma_sync_single_range_for_cpu(struct device *dev, dma_addr_t dma_handle, | ||
| 281 | unsigned long offset, size_t size, | ||
| 282 | enum dma_data_direction direction) | ||
| 283 | { | ||
| 284 | /* just sync everything, that's all the pci API can do */ | ||
| 285 | dma_sync_single_for_cpu(dev, dma_handle, offset+size, direction); | ||
| 286 | } | ||
| 287 | |||
| 288 | static inline void | ||
| 289 | dma_sync_single_range_for_device(struct device *dev, dma_addr_t dma_handle, | ||
| 290 | unsigned long offset, size_t size, | ||
| 291 | enum dma_data_direction direction) | ||
| 292 | { | ||
| 293 | /* just sync everything, that's all the pci API can do */ | ||
| 294 | dma_sync_single_for_device(dev, dma_handle, offset+size, direction); | ||
| 295 | } | ||
| 296 | |||
| 297 | static inline void | ||
| 298 | dma_cache_sync(struct device *dev, void *vaddr, size_t size, | ||
| 299 | enum dma_data_direction direction) | ||
| 300 | { | ||
| 301 | /* could define this in terms of the dma_cache ... operations, | ||
| 302 | * but if you get this on a platform, you should convert the platform | ||
| 303 | * to using the generic device DMA API */ | ||
| 304 | BUG(); | ||
| 305 | } | ||
| 306 | |||
| 307 | #endif /* _ASM_SPARC64_DMA_MAPPING_H */ | 134 | #endif /* _ASM_SPARC64_DMA_MAPPING_H */ |
diff --git a/include/asm-sparc64/fbio.h b/include/asm-sparc64/fbio.h index 500026d9f6e1..b9215a0907d3 100644 --- a/include/asm-sparc64/fbio.h +++ b/include/asm-sparc64/fbio.h | |||
| @@ -2,6 +2,7 @@ | |||
| 2 | #define __LINUX_FBIO_H | 2 | #define __LINUX_FBIO_H |
| 3 | 3 | ||
| 4 | #include <linux/compiler.h> | 4 | #include <linux/compiler.h> |
| 5 | #include <linux/types.h> | ||
| 5 | 6 | ||
| 6 | /* Constants used for fbio SunOS compatibility */ | 7 | /* Constants used for fbio SunOS compatibility */ |
| 7 | /* (C) 1996 Miguel de Icaza */ | 8 | /* (C) 1996 Miguel de Icaza */ |
| @@ -299,4 +300,31 @@ struct fb_clut32 { | |||
| 299 | #define LEO_LD_GBL_MAP 0x01009000 | 300 | #define LEO_LD_GBL_MAP 0x01009000 |
| 300 | #define LEO_UNK2_MAP 0x0100a000 | 301 | #define LEO_UNK2_MAP 0x0100a000 |
| 301 | 302 | ||
| 303 | #ifdef __KERNEL__ | ||
| 304 | struct fbcmap32 { | ||
| 305 | int index; /* first element (0 origin) */ | ||
| 306 | int count; | ||
| 307 | u32 red; | ||
| 308 | u32 green; | ||
| 309 | u32 blue; | ||
| 310 | }; | ||
| 311 | |||
| 312 | #define FBIOPUTCMAP32 _IOW('F', 3, struct fbcmap32) | ||
| 313 | #define FBIOGETCMAP32 _IOW('F', 4, struct fbcmap32) | ||
| 314 | |||
| 315 | struct fbcursor32 { | ||
| 316 | short set; /* what to set, choose from the list above */ | ||
| 317 | short enable; /* cursor on/off */ | ||
| 318 | struct fbcurpos pos; /* cursor position */ | ||
| 319 | struct fbcurpos hot; /* cursor hot spot */ | ||
| 320 | struct fbcmap32 cmap; /* color map info */ | ||
| 321 | struct fbcurpos size; /* cursor bit map size */ | ||
| 322 | u32 image; /* cursor image bits */ | ||
| 323 | u32 mask; /* cursor mask bits */ | ||
| 324 | }; | ||
| 325 | |||
| 326 | #define FBIOSCURSOR32 _IOW('F', 24, struct fbcursor32) | ||
| 327 | #define FBIOGCURSOR32 _IOW('F', 25, struct fbcursor32) | ||
| 328 | #endif | ||
| 329 | |||
| 302 | #endif /* __LINUX_FBIO_H */ | 330 | #endif /* __LINUX_FBIO_H */ |
diff --git a/include/asm-sparc64/floppy.h b/include/asm-sparc64/floppy.h index 4aa0925e1b1b..1783239c7b40 100644 --- a/include/asm-sparc64/floppy.h +++ b/include/asm-sparc64/floppy.h | |||
| @@ -1,7 +1,6 @@ | |||
| 1 | /* $Id: floppy.h,v 1.32 2001/10/26 17:59:36 davem Exp $ | 1 | /* floppy.h: Sparc specific parts of the Floppy driver. |
| 2 | * asm-sparc64/floppy.h: Sparc specific parts of the Floppy driver. | ||
| 3 | * | 2 | * |
| 4 | * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu) | 3 | * Copyright (C) 1996, 2007 David S. Miller (davem@davemloft.net) |
| 5 | * Copyright (C) 1997 Jakub Jelinek (jj@sunsite.mff.cuni.cz) | 4 | * Copyright (C) 1997 Jakub Jelinek (jj@sunsite.mff.cuni.cz) |
| 6 | * | 5 | * |
| 7 | * Ultra/PCI support added: Sep 1997 Eddie C. Dost (ecd@skynet.be) | 6 | * Ultra/PCI support added: Sep 1997 Eddie C. Dost (ecd@skynet.be) |
| @@ -11,6 +10,7 @@ | |||
| 11 | #define __ASM_SPARC64_FLOPPY_H | 10 | #define __ASM_SPARC64_FLOPPY_H |
| 12 | 11 | ||
| 13 | #include <linux/init.h> | 12 | #include <linux/init.h> |
| 13 | #include <linux/pci.h> | ||
| 14 | 14 | ||
| 15 | #include <asm/page.h> | 15 | #include <asm/page.h> |
| 16 | #include <asm/pgtable.h> | 16 | #include <asm/pgtable.h> |
diff --git a/include/asm-sparc64/iommu.h b/include/asm-sparc64/iommu.h index 0b1813f41045..9eac6676caf1 100644 --- a/include/asm-sparc64/iommu.h +++ b/include/asm-sparc64/iommu.h | |||
| @@ -1,7 +1,6 @@ | |||
| 1 | /* $Id: iommu.h,v 1.10 2001/03/08 09:55:56 davem Exp $ | 1 | /* iommu.h: Definitions for the sun5 IOMMU. |
| 2 | * iommu.h: Definitions for the sun5 IOMMU. | ||
| 3 | * | 2 | * |
| 4 | * Copyright (C) 1996, 1999 David S. Miller (davem@caip.rutgers.edu) | 3 | * Copyright (C) 1996, 1999, 2007 David S. Miller (davem@davemloft.net) |
| 5 | */ | 4 | */ |
| 6 | #ifndef _SPARC64_IOMMU_H | 5 | #ifndef _SPARC64_IOMMU_H |
| 7 | #define _SPARC64_IOMMU_H | 6 | #define _SPARC64_IOMMU_H |
| @@ -33,6 +32,7 @@ struct iommu { | |||
| 33 | unsigned long iommu_tsbbase; | 32 | unsigned long iommu_tsbbase; |
| 34 | unsigned long iommu_flush; | 33 | unsigned long iommu_flush; |
| 35 | unsigned long iommu_flushinv; | 34 | unsigned long iommu_flushinv; |
| 35 | unsigned long iommu_tags; | ||
| 36 | unsigned long iommu_ctxflush; | 36 | unsigned long iommu_ctxflush; |
| 37 | unsigned long write_complete_reg; | 37 | unsigned long write_complete_reg; |
| 38 | unsigned long dummy_page; | 38 | unsigned long dummy_page; |
| @@ -54,4 +54,7 @@ struct strbuf { | |||
| 54 | volatile unsigned long __flushflag_buf[(64+(64-1)) / sizeof(long)]; | 54 | volatile unsigned long __flushflag_buf[(64+(64-1)) / sizeof(long)]; |
| 55 | }; | 55 | }; |
| 56 | 56 | ||
| 57 | #endif /* !(_SPARC_IOMMU_H) */ | 57 | extern int iommu_table_init(struct iommu *iommu, int tsbsize, |
| 58 | u32 dma_offset, u32 dma_addr_mask); | ||
| 59 | |||
| 60 | #endif /* !(_SPARC64_IOMMU_H) */ | ||
diff --git a/include/asm-sparc64/parport.h b/include/asm-sparc64/parport.h index 600afe5ae2e3..8116e8f6062c 100644 --- a/include/asm-sparc64/parport.h +++ b/include/asm-sparc64/parport.h | |||
| @@ -117,7 +117,7 @@ static int __devinit ecpp_probe(struct of_device *op, const struct of_device_id | |||
| 117 | if (!strcmp(parent->name, "dma")) { | 117 | if (!strcmp(parent->name, "dma")) { |
| 118 | p = parport_pc_probe_port(base, base + 0x400, | 118 | p = parport_pc_probe_port(base, base + 0x400, |
| 119 | op->irqs[0], PARPORT_DMA_NOFIFO, | 119 | op->irqs[0], PARPORT_DMA_NOFIFO, |
| 120 | op->dev.parent); | 120 | op->dev.parent->parent); |
| 121 | if (!p) | 121 | if (!p) |
| 122 | return -ENOMEM; | 122 | return -ENOMEM; |
| 123 | dev_set_drvdata(&op->dev, p); | 123 | dev_set_drvdata(&op->dev, p); |
diff --git a/include/asm-sparc64/pci.h b/include/asm-sparc64/pci.h index e11ac100f043..1393e57d50fb 100644 --- a/include/asm-sparc64/pci.h +++ b/include/asm-sparc64/pci.h | |||
| @@ -3,8 +3,7 @@ | |||
| 3 | 3 | ||
| 4 | #ifdef __KERNEL__ | 4 | #ifdef __KERNEL__ |
| 5 | 5 | ||
| 6 | #include <linux/fs.h> | 6 | #include <linux/dma-mapping.h> |
| 7 | #include <linux/mm.h> | ||
| 8 | 7 | ||
| 9 | /* Can be used to override the logic in pci_scan_bus for skipping | 8 | /* Can be used to override the logic in pci_scan_bus for skipping |
| 10 | * already-configured bus numbers - to be used for buggy BIOSes | 9 | * already-configured bus numbers - to be used for buggy BIOSes |
| @@ -30,80 +29,42 @@ static inline void pcibios_penalize_isa_irq(int irq, int active) | |||
| 30 | /* We don't do dynamic PCI IRQ allocation */ | 29 | /* We don't do dynamic PCI IRQ allocation */ |
| 31 | } | 30 | } |
| 32 | 31 | ||
| 33 | /* Dynamic DMA mapping stuff. | ||
| 34 | */ | ||
| 35 | |||
| 36 | /* The PCI address space does not equal the physical memory | 32 | /* The PCI address space does not equal the physical memory |
| 37 | * address space. The networking and block device layers use | 33 | * address space. The networking and block device layers use |
| 38 | * this boolean for bounce buffer decisions. | 34 | * this boolean for bounce buffer decisions. |
| 39 | */ | 35 | */ |
| 40 | #define PCI_DMA_BUS_IS_PHYS (0) | 36 | #define PCI_DMA_BUS_IS_PHYS (0) |
| 41 | 37 | ||
| 42 | #include <asm/scatterlist.h> | 38 | static inline void *pci_alloc_consistent(struct pci_dev *pdev, size_t size, |
| 43 | 39 | dma_addr_t *dma_handle) | |
| 44 | struct pci_dev; | ||
| 45 | |||
| 46 | struct pci_iommu_ops { | ||
| 47 | void *(*alloc_consistent)(struct pci_dev *, size_t, dma_addr_t *, gfp_t); | ||
| 48 | void (*free_consistent)(struct pci_dev *, size_t, void *, dma_addr_t); | ||
| 49 | dma_addr_t (*map_single)(struct pci_dev *, void *, size_t, int); | ||
| 50 | void (*unmap_single)(struct pci_dev *, dma_addr_t, size_t, int); | ||
| 51 | int (*map_sg)(struct pci_dev *, struct scatterlist *, int, int); | ||
| 52 | void (*unmap_sg)(struct pci_dev *, struct scatterlist *, int, int); | ||
| 53 | void (*dma_sync_single_for_cpu)(struct pci_dev *, dma_addr_t, size_t, int); | ||
| 54 | void (*dma_sync_sg_for_cpu)(struct pci_dev *, struct scatterlist *, int, int); | ||
| 55 | }; | ||
| 56 | |||
| 57 | extern const struct pci_iommu_ops *pci_iommu_ops; | ||
| 58 | |||
| 59 | /* Allocate and map kernel buffer using consistent mode DMA for a device. | ||
| 60 | * hwdev should be valid struct pci_dev pointer for PCI devices. | ||
| 61 | */ | ||
| 62 | static inline void *pci_alloc_consistent(struct pci_dev *hwdev, size_t size, dma_addr_t *dma_handle) | ||
| 63 | { | 40 | { |
| 64 | return pci_iommu_ops->alloc_consistent(hwdev, size, dma_handle, GFP_ATOMIC); | 41 | return dma_alloc_coherent(&pdev->dev, size, dma_handle, GFP_ATOMIC); |
| 65 | } | 42 | } |
| 66 | 43 | ||
| 67 | /* Free and unmap a consistent DMA buffer. | 44 | static inline void pci_free_consistent(struct pci_dev *pdev, size_t size, |
| 68 | * cpu_addr is what was returned from pci_alloc_consistent, | 45 | void *vaddr, dma_addr_t dma_handle) |
| 69 | * size must be the same as what as passed into pci_alloc_consistent, | ||
| 70 | * and likewise dma_addr must be the same as what *dma_addrp was set to. | ||
| 71 | * | ||
| 72 | * References to the memory and mappings associated with cpu_addr/dma_addr | ||
| 73 | * past this call are illegal. | ||
| 74 | */ | ||
| 75 | static inline void pci_free_consistent(struct pci_dev *hwdev, size_t size, void *vaddr, dma_addr_t dma_handle) | ||
| 76 | { | 46 | { |
| 77 | return pci_iommu_ops->free_consistent(hwdev, size, vaddr, dma_handle); | 47 | return dma_free_coherent(&pdev->dev, size, vaddr, dma_handle); |
| 78 | } | 48 | } |
| 79 | 49 | ||
| 80 | /* Map a single buffer of the indicated size for DMA in streaming mode. | 50 | static inline dma_addr_t pci_map_single(struct pci_dev *pdev, void *ptr, |
| 81 | * The 32-bit bus address to use is returned. | 51 | size_t size, int direction) |
| 82 | * | ||
| 83 | * Once the device is given the dma address, the device owns this memory | ||
| 84 | * until either pci_unmap_single or pci_dma_sync_single_for_cpu is performed. | ||
| 85 | */ | ||
| 86 | static inline dma_addr_t pci_map_single(struct pci_dev *hwdev, void *ptr, size_t size, int direction) | ||
| 87 | { | 52 | { |
| 88 | return pci_iommu_ops->map_single(hwdev, ptr, size, direction); | 53 | return dma_map_single(&pdev->dev, ptr, size, |
| 54 | (enum dma_data_direction) direction); | ||
| 89 | } | 55 | } |
| 90 | 56 | ||
| 91 | /* Unmap a single streaming mode DMA translation. The dma_addr and size | 57 | static inline void pci_unmap_single(struct pci_dev *pdev, dma_addr_t dma_addr, |
| 92 | * must match what was provided for in a previous pci_map_single call. All | 58 | size_t size, int direction) |
| 93 | * other usages are undefined. | ||
| 94 | * | ||
| 95 | * After this call, reads by the cpu to the buffer are guaranteed to see | ||
| 96 | * whatever the device wrote there. | ||
| 97 | */ | ||
| 98 | static inline void pci_unmap_single(struct pci_dev *hwdev, dma_addr_t dma_addr, size_t size, int direction) | ||
| 99 | { | 59 | { |
| 100 | pci_iommu_ops->unmap_single(hwdev, dma_addr, size, direction); | 60 | dma_unmap_single(&pdev->dev, dma_addr, size, |
| 61 | (enum dma_data_direction) direction); | ||
| 101 | } | 62 | } |
| 102 | 63 | ||
| 103 | /* No highmem on sparc64, plus we have an IOMMU, so mapping pages is easy. */ | ||
| 104 | #define pci_map_page(dev, page, off, size, dir) \ | 64 | #define pci_map_page(dev, page, off, size, dir) \ |
| 105 | pci_map_single(dev, (page_address(page) + (off)), size, dir) | 65 | pci_map_single(dev, (page_address(page) + (off)), size, dir) |
| 106 | #define pci_unmap_page(dev,addr,sz,dir) pci_unmap_single(dev,addr,sz,dir) | 66 | #define pci_unmap_page(dev,addr,sz,dir) \ |
| 67 | pci_unmap_single(dev,addr,sz,dir) | ||
| 107 | 68 | ||
| 108 | /* pci_unmap_{single,page} is not a nop, thus... */ | 69 | /* pci_unmap_{single,page} is not a nop, thus... */ |
| 109 | #define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) \ | 70 | #define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) \ |
| @@ -119,75 +80,48 @@ static inline void pci_unmap_single(struct pci_dev *hwdev, dma_addr_t dma_addr, | |||
| 119 | #define pci_unmap_len_set(PTR, LEN_NAME, VAL) \ | 80 | #define pci_unmap_len_set(PTR, LEN_NAME, VAL) \ |
| 120 | (((PTR)->LEN_NAME) = (VAL)) | 81 | (((PTR)->LEN_NAME) = (VAL)) |
| 121 | 82 | ||
| 122 | /* Map a set of buffers described by scatterlist in streaming | 83 | static inline int pci_map_sg(struct pci_dev *pdev, struct scatterlist *sg, |
| 123 | * mode for DMA. This is the scatter-gather version of the | 84 | int nents, int direction) |
| 124 | * above pci_map_single interface. Here the scatter gather list | ||
| 125 | * elements are each tagged with the appropriate dma address | ||
| 126 | * and length. They are obtained via sg_dma_{address,length}(SG). | ||
| 127 | * | ||
| 128 | * NOTE: An implementation may be able to use a smaller number of | ||
| 129 | * DMA address/length pairs than there are SG table elements. | ||
| 130 | * (for example via virtual mapping capabilities) | ||
| 131 | * The routine returns the number of addr/length pairs actually | ||
| 132 | * used, at most nents. | ||
| 133 | * | ||
| 134 | * Device ownership issues as mentioned above for pci_map_single are | ||
| 135 | * the same here. | ||
| 136 | */ | ||
| 137 | static inline int pci_map_sg(struct pci_dev *hwdev, struct scatterlist *sg, int nents, int direction) | ||
| 138 | { | 85 | { |
| 139 | return pci_iommu_ops->map_sg(hwdev, sg, nents, direction); | 86 | return dma_map_sg(&pdev->dev, sg, nents, |
| 87 | (enum dma_data_direction) direction); | ||
| 140 | } | 88 | } |
| 141 | 89 | ||
| 142 | /* Unmap a set of streaming mode DMA translations. | 90 | static inline void pci_unmap_sg(struct pci_dev *pdev, struct scatterlist *sg, |
| 143 | * Again, cpu read rules concerning calls here are the same as for | 91 | int nents, int direction) |
| 144 | * pci_unmap_single() above. | ||
| 145 | */ | ||
| 146 | static inline void pci_unmap_sg(struct pci_dev *hwdev, struct scatterlist *sg, int nhwents, int direction) | ||
| 147 | { | 92 | { |
| 148 | pci_iommu_ops->unmap_sg(hwdev, sg, nhwents, direction); | 93 | dma_unmap_sg(&pdev->dev, sg, nents, |
| 94 | (enum dma_data_direction) direction); | ||
| 149 | } | 95 | } |
| 150 | 96 | ||
| 151 | /* Make physical memory consistent for a single | 97 | static inline void pci_dma_sync_single_for_cpu(struct pci_dev *pdev, |
| 152 | * streaming mode DMA translation after a transfer. | 98 | dma_addr_t dma_handle, |
| 153 | * | 99 | size_t size, int direction) |
| 154 | * If you perform a pci_map_single() but wish to interrogate the | ||
| 155 | * buffer using the cpu, yet do not wish to teardown the PCI dma | ||
| 156 | * mapping, you must call this function before doing so. At the | ||
| 157 | * next point you give the PCI dma address back to the card, you | ||
| 158 | * must first perform a pci_dma_sync_for_device, and then the | ||
| 159 | * device again owns the buffer. | ||
| 160 | */ | ||
| 161 | static inline void pci_dma_sync_single_for_cpu(struct pci_dev *hwdev, dma_addr_t dma_handle, size_t size, int direction) | ||
| 162 | { | 100 | { |
| 163 | pci_iommu_ops->dma_sync_single_for_cpu(hwdev, dma_handle, size, direction); | 101 | dma_sync_single_for_cpu(&pdev->dev, dma_handle, size, |
| 102 | (enum dma_data_direction) direction); | ||
| 164 | } | 103 | } |
| 165 | 104 | ||
| 166 | static inline void | 105 | static inline void pci_dma_sync_single_for_device(struct pci_dev *pdev, |
| 167 | pci_dma_sync_single_for_device(struct pci_dev *hwdev, dma_addr_t dma_handle, | 106 | dma_addr_t dma_handle, |
| 168 | size_t size, int direction) | 107 | size_t size, int direction) |
| 169 | { | 108 | { |
| 170 | /* No flushing needed to sync cpu writes to the device. */ | 109 | /* No flushing needed to sync cpu writes to the device. */ |
| 171 | BUG_ON(direction == PCI_DMA_NONE); | ||
| 172 | } | 110 | } |
| 173 | 111 | ||
| 174 | /* Make physical memory consistent for a set of streaming | 112 | static inline void pci_dma_sync_sg_for_cpu(struct pci_dev *pdev, |
| 175 | * mode DMA translations after a transfer. | 113 | struct scatterlist *sg, |
| 176 | * | 114 | int nents, int direction) |
| 177 | * The same as pci_dma_sync_single_* but for a scatter-gather list, | ||
| 178 | * same rules and usage. | ||
| 179 | */ | ||
| 180 | static inline void pci_dma_sync_sg_for_cpu(struct pci_dev *hwdev, struct scatterlist *sg, int nelems, int direction) | ||
| 181 | { | 115 | { |
| 182 | pci_iommu_ops->dma_sync_sg_for_cpu(hwdev, sg, nelems, direction); | 116 | dma_sync_sg_for_cpu(&pdev->dev, sg, nents, |
| 117 | (enum dma_data_direction) direction); | ||
| 183 | } | 118 | } |
| 184 | 119 | ||
| 185 | static inline void | 120 | static inline void pci_dma_sync_sg_for_device(struct pci_dev *pdev, |
| 186 | pci_dma_sync_sg_for_device(struct pci_dev *hwdev, struct scatterlist *sg, | 121 | struct scatterlist *sg, |
| 187 | int nelems, int direction) | 122 | int nelems, int direction) |
| 188 | { | 123 | { |
| 189 | /* No flushing needed to sync cpu writes to the device. */ | 124 | /* No flushing needed to sync cpu writes to the device. */ |
| 190 | BUG_ON(direction == PCI_DMA_NONE); | ||
| 191 | } | 125 | } |
| 192 | 126 | ||
| 193 | /* Return whether the given PCI device DMA address mask can | 127 | /* Return whether the given PCI device DMA address mask can |
| @@ -206,11 +140,9 @@ extern int pci_dma_supported(struct pci_dev *hwdev, u64 mask); | |||
| 206 | #define PCI64_REQUIRED_MASK (~(dma64_addr_t)0) | 140 | #define PCI64_REQUIRED_MASK (~(dma64_addr_t)0) |
| 207 | #define PCI64_ADDR_BASE 0xfffc000000000000UL | 141 | #define PCI64_ADDR_BASE 0xfffc000000000000UL |
| 208 | 142 | ||
| 209 | #define PCI_DMA_ERROR_CODE (~(dma_addr_t)0x0) | ||
| 210 | |||
| 211 | static inline int pci_dma_mapping_error(dma_addr_t dma_addr) | 143 | static inline int pci_dma_mapping_error(dma_addr_t dma_addr) |
| 212 | { | 144 | { |
| 213 | return (dma_addr == PCI_DMA_ERROR_CODE); | 145 | return dma_mapping_error(dma_addr); |
| 214 | } | 146 | } |
| 215 | 147 | ||
| 216 | #ifdef CONFIG_PCI | 148 | #ifdef CONFIG_PCI |
diff --git a/include/asm-sparc64/sbus.h b/include/asm-sparc64/sbus.h index 7efd49d31bb8..0151cad486f3 100644 --- a/include/asm-sparc64/sbus.h +++ b/include/asm-sparc64/sbus.h | |||
| @@ -1,7 +1,6 @@ | |||
| 1 | /* $Id: sbus.h,v 1.14 2000/02/18 13:50:55 davem Exp $ | 1 | /* sbus.h: Defines for the Sun SBus. |
| 2 | * sbus.h: Defines for the Sun SBus. | ||
| 3 | * | 2 | * |
| 4 | * Copyright (C) 1996, 1999 David S. Miller (davem@redhat.com) | 3 | * Copyright (C) 1996, 1999, 2007 David S. Miller (davem@davemloft.net) |
| 5 | */ | 4 | */ |
| 6 | 5 | ||
| 7 | #ifndef _SPARC64_SBUS_H | 6 | #ifndef _SPARC64_SBUS_H |
| @@ -69,7 +68,6 @@ struct sbus_dev { | |||
| 69 | /* This struct describes the SBus(s) found on this machine. */ | 68 | /* This struct describes the SBus(s) found on this machine. */ |
| 70 | struct sbus_bus { | 69 | struct sbus_bus { |
| 71 | struct of_device ofdev; | 70 | struct of_device ofdev; |
| 72 | void *iommu; /* Opaque IOMMU cookie */ | ||
| 73 | struct sbus_dev *devices; /* Tree of SBUS devices */ | 71 | struct sbus_dev *devices; /* Tree of SBUS devices */ |
| 74 | struct sbus_bus *next; /* Next SBUS in system */ | 72 | struct sbus_bus *next; /* Next SBUS in system */ |
| 75 | int prom_node; /* OBP node of SBUS */ | 73 | int prom_node; /* OBP node of SBUS */ |
| @@ -102,9 +100,18 @@ extern struct sbus_bus *sbus_root; | |||
| 102 | extern void sbus_set_sbus64(struct sbus_dev *, int); | 100 | extern void sbus_set_sbus64(struct sbus_dev *, int); |
| 103 | extern void sbus_fill_device_irq(struct sbus_dev *); | 101 | extern void sbus_fill_device_irq(struct sbus_dev *); |
| 104 | 102 | ||
| 105 | /* These yield IOMMU mappings in consistent mode. */ | 103 | static inline void *sbus_alloc_consistent(struct sbus_dev *sdev , size_t size, |
| 106 | extern void *sbus_alloc_consistent(struct sbus_dev *, size_t, dma_addr_t *dma_addrp); | 104 | dma_addr_t *dma_handle) |
| 107 | extern void sbus_free_consistent(struct sbus_dev *, size_t, void *, dma_addr_t); | 105 | { |
| 106 | return dma_alloc_coherent(&sdev->ofdev.dev, size, | ||
| 107 | dma_handle, GFP_ATOMIC); | ||
| 108 | } | ||
| 109 | |||
| 110 | static inline void sbus_free_consistent(struct sbus_dev *sdev, size_t size, | ||
| 111 | void *vaddr, dma_addr_t dma_handle) | ||
| 112 | { | ||
| 113 | return dma_free_coherent(&sdev->ofdev.dev, size, vaddr, dma_handle); | ||
| 114 | } | ||
| 108 | 115 | ||
| 109 | #define SBUS_DMA_BIDIRECTIONAL DMA_BIDIRECTIONAL | 116 | #define SBUS_DMA_BIDIRECTIONAL DMA_BIDIRECTIONAL |
| 110 | #define SBUS_DMA_TODEVICE DMA_TO_DEVICE | 117 | #define SBUS_DMA_TODEVICE DMA_TO_DEVICE |
| @@ -112,18 +119,67 @@ extern void sbus_free_consistent(struct sbus_dev *, size_t, void *, dma_addr_t); | |||
| 112 | #define SBUS_DMA_NONE DMA_NONE | 119 | #define SBUS_DMA_NONE DMA_NONE |
| 113 | 120 | ||
| 114 | /* All the rest use streaming mode mappings. */ | 121 | /* All the rest use streaming mode mappings. */ |
| 115 | extern dma_addr_t sbus_map_single(struct sbus_dev *, void *, size_t, int); | 122 | static inline dma_addr_t sbus_map_single(struct sbus_dev *sdev, void *ptr, |
| 116 | extern void sbus_unmap_single(struct sbus_dev *, dma_addr_t, size_t, int); | 123 | size_t size, int direction) |
| 117 | extern int sbus_map_sg(struct sbus_dev *, struct scatterlist *, int, int); | 124 | { |
| 118 | extern void sbus_unmap_sg(struct sbus_dev *, struct scatterlist *, int, int); | 125 | return dma_map_single(&sdev->ofdev.dev, ptr, size, |
| 126 | (enum dma_data_direction) direction); | ||
| 127 | } | ||
| 128 | |||
| 129 | static inline void sbus_unmap_single(struct sbus_dev *sdev, | ||
| 130 | dma_addr_t dma_addr, size_t size, | ||
| 131 | int direction) | ||
| 132 | { | ||
| 133 | dma_unmap_single(&sdev->ofdev.dev, dma_addr, size, | ||
| 134 | (enum dma_data_direction) direction); | ||
| 135 | } | ||
| 136 | |||
| 137 | static inline int sbus_map_sg(struct sbus_dev *sdev, struct scatterlist *sg, | ||
| 138 | int nents, int direction) | ||
| 139 | { | ||
| 140 | return dma_map_sg(&sdev->ofdev.dev, sg, nents, | ||
| 141 | (enum dma_data_direction) direction); | ||
| 142 | } | ||
| 143 | |||
| 144 | static inline void sbus_unmap_sg(struct sbus_dev *sdev, struct scatterlist *sg, | ||
| 145 | int nents, int direction) | ||
| 146 | { | ||
| 147 | dma_unmap_sg(&sdev->ofdev.dev, sg, nents, | ||
| 148 | (enum dma_data_direction) direction); | ||
| 149 | } | ||
| 119 | 150 | ||
| 120 | /* Finally, allow explicit synchronization of streamable mappings. */ | 151 | /* Finally, allow explicit synchronization of streamable mappings. */ |
| 121 | extern void sbus_dma_sync_single_for_cpu(struct sbus_dev *, dma_addr_t, size_t, int); | 152 | static inline void sbus_dma_sync_single_for_cpu(struct sbus_dev *sdev, |
| 153 | dma_addr_t dma_handle, | ||
| 154 | size_t size, int direction) | ||
| 155 | { | ||
| 156 | dma_sync_single_for_cpu(&sdev->ofdev.dev, dma_handle, size, | ||
| 157 | (enum dma_data_direction) direction); | ||
| 158 | } | ||
| 122 | #define sbus_dma_sync_single sbus_dma_sync_single_for_cpu | 159 | #define sbus_dma_sync_single sbus_dma_sync_single_for_cpu |
| 123 | extern void sbus_dma_sync_single_for_device(struct sbus_dev *, dma_addr_t, size_t, int); | 160 | |
| 124 | extern void sbus_dma_sync_sg_for_cpu(struct sbus_dev *, struct scatterlist *, int, int); | 161 | static inline void sbus_dma_sync_single_for_device(struct sbus_dev *sdev, |
| 162 | dma_addr_t dma_handle, | ||
| 163 | size_t size, int direction) | ||
| 164 | { | ||
| 165 | /* No flushing needed to sync cpu writes to the device. */ | ||
| 166 | } | ||
| 167 | |||
| 168 | static inline void sbus_dma_sync_sg_for_cpu(struct sbus_dev *sdev, | ||
| 169 | struct scatterlist *sg, | ||
| 170 | int nents, int direction) | ||
| 171 | { | ||
| 172 | dma_sync_sg_for_cpu(&sdev->ofdev.dev, sg, nents, | ||
| 173 | (enum dma_data_direction) direction); | ||
| 174 | } | ||
| 125 | #define sbus_dma_sync_sg sbus_dma_sync_sg_for_cpu | 175 | #define sbus_dma_sync_sg sbus_dma_sync_sg_for_cpu |
| 126 | extern void sbus_dma_sync_sg_for_device(struct sbus_dev *, struct scatterlist *, int, int); | 176 | |
| 177 | static inline void sbus_dma_sync_sg_for_device(struct sbus_dev *sdev, | ||
| 178 | struct scatterlist *sg, | ||
| 179 | int nents, int direction) | ||
| 180 | { | ||
| 181 | /* No flushing needed to sync cpu writes to the device. */ | ||
| 182 | } | ||
| 127 | 183 | ||
| 128 | extern void sbus_arch_bus_ranges_init(struct device_node *, struct sbus_bus *); | 184 | extern void sbus_arch_bus_ranges_init(struct device_node *, struct sbus_bus *); |
| 129 | extern void sbus_setup_iommu(struct sbus_bus *, struct device_node *); | 185 | extern void sbus_setup_iommu(struct sbus_bus *, struct device_node *); |
diff --git a/include/linux/genhd.h b/include/linux/genhd.h index 9756fc102a83..a47b8025d399 100644 --- a/include/linux/genhd.h +++ b/include/linux/genhd.h | |||
| @@ -264,7 +264,7 @@ static inline void set_capacity(struct gendisk *disk, sector_t size) | |||
| 264 | 264 | ||
| 265 | #ifdef CONFIG_SOLARIS_X86_PARTITION | 265 | #ifdef CONFIG_SOLARIS_X86_PARTITION |
| 266 | 266 | ||
| 267 | #define SOLARIS_X86_NUMSLICE 8 | 267 | #define SOLARIS_X86_NUMSLICE 16 |
| 268 | #define SOLARIS_X86_VTOC_SANE (0x600DDEEEUL) | 268 | #define SOLARIS_X86_VTOC_SANE (0x600DDEEEUL) |
| 269 | 269 | ||
| 270 | struct solaris_x86_slice { | 270 | struct solaris_x86_slice { |
