diff options
| -rw-r--r-- | drivers/infiniband/hw/mthca/mthca_cmd.c | 16 |
1 files changed, 9 insertions, 7 deletions
diff --git a/drivers/infiniband/hw/mthca/mthca_cmd.c b/drivers/infiniband/hw/mthca/mthca_cmd.c index c33e1c53c799..6d55f9d748f6 100644 --- a/drivers/infiniband/hw/mthca/mthca_cmd.c +++ b/drivers/infiniband/hw/mthca/mthca_cmd.c | |||
| @@ -157,13 +157,15 @@ enum { | |||
| 157 | enum { | 157 | enum { |
| 158 | CMD_TIME_CLASS_A = (HZ + 999) / 1000 + 1, | 158 | CMD_TIME_CLASS_A = (HZ + 999) / 1000 + 1, |
| 159 | CMD_TIME_CLASS_B = (HZ + 99) / 100 + 1, | 159 | CMD_TIME_CLASS_B = (HZ + 99) / 100 + 1, |
| 160 | CMD_TIME_CLASS_C = (HZ + 9) / 10 + 1 | 160 | CMD_TIME_CLASS_C = (HZ + 9) / 10 + 1, |
| 161 | CMD_TIME_CLASS_D = 60 * HZ | ||
| 161 | }; | 162 | }; |
| 162 | #else | 163 | #else |
| 163 | enum { | 164 | enum { |
| 164 | CMD_TIME_CLASS_A = 60 * HZ, | 165 | CMD_TIME_CLASS_A = 60 * HZ, |
| 165 | CMD_TIME_CLASS_B = 60 * HZ, | 166 | CMD_TIME_CLASS_B = 60 * HZ, |
| 166 | CMD_TIME_CLASS_C = 60 * HZ | 167 | CMD_TIME_CLASS_C = 60 * HZ, |
| 168 | CMD_TIME_CLASS_D = 60 * HZ | ||
| 167 | }; | 169 | }; |
| 168 | #endif | 170 | #endif |
| 169 | 171 | ||
| @@ -598,7 +600,7 @@ int mthca_SYS_EN(struct mthca_dev *dev, u8 *status) | |||
| 598 | u64 out; | 600 | u64 out; |
| 599 | int ret; | 601 | int ret; |
| 600 | 602 | ||
| 601 | ret = mthca_cmd_imm(dev, 0, &out, 0, 0, CMD_SYS_EN, HZ, status); | 603 | ret = mthca_cmd_imm(dev, 0, &out, 0, 0, CMD_SYS_EN, CMD_TIME_CLASS_D, status); |
| 602 | 604 | ||
| 603 | if (*status == MTHCA_CMD_STAT_DDR_MEM_ERR) | 605 | if (*status == MTHCA_CMD_STAT_DDR_MEM_ERR) |
| 604 | mthca_warn(dev, "SYS_EN DDR error: syn=%x, sock=%d, " | 606 | mthca_warn(dev, "SYS_EN DDR error: syn=%x, sock=%d, " |
| @@ -611,7 +613,7 @@ int mthca_SYS_EN(struct mthca_dev *dev, u8 *status) | |||
| 611 | 613 | ||
| 612 | int mthca_SYS_DIS(struct mthca_dev *dev, u8 *status) | 614 | int mthca_SYS_DIS(struct mthca_dev *dev, u8 *status) |
| 613 | { | 615 | { |
| 614 | return mthca_cmd(dev, 0, 0, 0, CMD_SYS_DIS, HZ, status); | 616 | return mthca_cmd(dev, 0, 0, 0, CMD_SYS_DIS, CMD_TIME_CLASS_C, status); |
| 615 | } | 617 | } |
| 616 | 618 | ||
| 617 | static int mthca_map_cmd(struct mthca_dev *dev, u16 op, struct mthca_icm *icm, | 619 | static int mthca_map_cmd(struct mthca_dev *dev, u16 op, struct mthca_icm *icm, |
| @@ -1390,7 +1392,7 @@ int mthca_INIT_HCA(struct mthca_dev *dev, | |||
| 1390 | MTHCA_PUT(inbox, param->uarc_base, INIT_HCA_UAR_CTX_BASE_OFFSET); | 1392 | MTHCA_PUT(inbox, param->uarc_base, INIT_HCA_UAR_CTX_BASE_OFFSET); |
| 1391 | } | 1393 | } |
| 1392 | 1394 | ||
| 1393 | err = mthca_cmd(dev, mailbox->dma, 0, 0, CMD_INIT_HCA, HZ, status); | 1395 | err = mthca_cmd(dev, mailbox->dma, 0, 0, CMD_INIT_HCA, CMD_TIME_CLASS_D, status); |
| 1394 | 1396 | ||
| 1395 | mthca_free_mailbox(dev, mailbox); | 1397 | mthca_free_mailbox(dev, mailbox); |
| 1396 | return err; | 1398 | return err; |
| @@ -1450,12 +1452,12 @@ int mthca_INIT_IB(struct mthca_dev *dev, | |||
| 1450 | 1452 | ||
| 1451 | int mthca_CLOSE_IB(struct mthca_dev *dev, int port, u8 *status) | 1453 | int mthca_CLOSE_IB(struct mthca_dev *dev, int port, u8 *status) |
| 1452 | { | 1454 | { |
| 1453 | return mthca_cmd(dev, 0, port, 0, CMD_CLOSE_IB, HZ, status); | 1455 | return mthca_cmd(dev, 0, port, 0, CMD_CLOSE_IB, CMD_TIME_CLASS_A, status); |
| 1454 | } | 1456 | } |
| 1455 | 1457 | ||
| 1456 | int mthca_CLOSE_HCA(struct mthca_dev *dev, int panic, u8 *status) | 1458 | int mthca_CLOSE_HCA(struct mthca_dev *dev, int panic, u8 *status) |
| 1457 | { | 1459 | { |
| 1458 | return mthca_cmd(dev, 0, 0, panic, CMD_CLOSE_HCA, HZ, status); | 1460 | return mthca_cmd(dev, 0, 0, panic, CMD_CLOSE_HCA, CMD_TIME_CLASS_C, status); |
| 1459 | } | 1461 | } |
| 1460 | 1462 | ||
| 1461 | int mthca_SET_IB(struct mthca_dev *dev, struct mthca_set_ib_param *param, | 1463 | int mthca_SET_IB(struct mthca_dev *dev, struct mthca_set_ib_param *param, |
