diff options
| -rw-r--r-- | drivers/edac/i7core_edac.c | 37 |
1 files changed, 2 insertions, 35 deletions
diff --git a/drivers/edac/i7core_edac.c b/drivers/edac/i7core_edac.c index d55f74a6cd49..9868796f4871 100644 --- a/drivers/edac/i7core_edac.c +++ b/drivers/edac/i7core_edac.c | |||
| @@ -281,7 +281,8 @@ static const struct pci_id_descr pci_dev_descr_i7core_nehalem[] = { | |||
| 281 | /* Memory controller */ | 281 | /* Memory controller */ |
| 282 | { PCI_DESCR(3, 0, PCI_DEVICE_ID_INTEL_I7_MCR) }, | 282 | { PCI_DESCR(3, 0, PCI_DEVICE_ID_INTEL_I7_MCR) }, |
| 283 | { PCI_DESCR(3, 1, PCI_DEVICE_ID_INTEL_I7_MC_TAD) }, | 283 | { PCI_DESCR(3, 1, PCI_DEVICE_ID_INTEL_I7_MC_TAD) }, |
| 284 | /* Exists only for RDIMM */ | 284 | |
| 285 | /* Exists only for RDIMM */ | ||
| 285 | { PCI_DESCR(3, 2, PCI_DEVICE_ID_INTEL_I7_MC_RAS), .optional = 1 }, | 286 | { PCI_DESCR(3, 2, PCI_DEVICE_ID_INTEL_I7_MC_RAS), .optional = 1 }, |
| 286 | { PCI_DESCR(3, 4, PCI_DEVICE_ID_INTEL_I7_MC_TEST) }, | 287 | { PCI_DESCR(3, 4, PCI_DEVICE_ID_INTEL_I7_MC_TEST) }, |
| 287 | 288 | ||
| @@ -302,16 +303,6 @@ static const struct pci_id_descr pci_dev_descr_i7core_nehalem[] = { | |||
| 302 | { PCI_DESCR(6, 1, PCI_DEVICE_ID_INTEL_I7_MC_CH2_ADDR) }, | 303 | { PCI_DESCR(6, 1, PCI_DEVICE_ID_INTEL_I7_MC_CH2_ADDR) }, |
| 303 | { PCI_DESCR(6, 2, PCI_DEVICE_ID_INTEL_I7_MC_CH2_RANK) }, | 304 | { PCI_DESCR(6, 2, PCI_DEVICE_ID_INTEL_I7_MC_CH2_RANK) }, |
| 304 | { PCI_DESCR(6, 3, PCI_DEVICE_ID_INTEL_I7_MC_CH2_TC) }, | 305 | { PCI_DESCR(6, 3, PCI_DEVICE_ID_INTEL_I7_MC_CH2_TC) }, |
| 305 | |||
| 306 | /* Generic Non-core registers */ | ||
| 307 | /* | ||
| 308 | * This is the PCI device on i7core and on Xeon 35xx (8086:2c41) | ||
| 309 | * On Xeon 55xx, however, it has a different id (8086:2c40). So, | ||
| 310 | * the probing code needs to test for the other address in case of | ||
| 311 | * failure of this one | ||
| 312 | */ | ||
| 313 | { PCI_DESCR(0, 0, PCI_DEVICE_ID_INTEL_I7_NONCORE) }, | ||
| 314 | |||
| 315 | }; | 306 | }; |
| 316 | 307 | ||
| 317 | static const struct pci_id_descr pci_dev_descr_lynnfield[] = { | 308 | static const struct pci_id_descr pci_dev_descr_lynnfield[] = { |
| @@ -328,12 +319,6 @@ static const struct pci_id_descr pci_dev_descr_lynnfield[] = { | |||
| 328 | { PCI_DESCR( 5, 1, PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH1_ADDR) }, | 319 | { PCI_DESCR( 5, 1, PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH1_ADDR) }, |
| 329 | { PCI_DESCR( 5, 2, PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH1_RANK) }, | 320 | { PCI_DESCR( 5, 2, PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH1_RANK) }, |
| 330 | { PCI_DESCR( 5, 3, PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH1_TC) }, | 321 | { PCI_DESCR( 5, 3, PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH1_TC) }, |
| 331 | |||
| 332 | /* | ||
| 333 | * This is the PCI device has an alternate address on some | ||
| 334 | * processors like Core i7 860 | ||
| 335 | */ | ||
| 336 | { PCI_DESCR( 0, 0, PCI_DEVICE_ID_INTEL_LYNNFIELD_NONCORE) }, | ||
| 337 | }; | 322 | }; |
| 338 | 323 | ||
| 339 | static const struct pci_id_descr pci_dev_descr_i7core_westmere[] = { | 324 | static const struct pci_id_descr pci_dev_descr_i7core_westmere[] = { |
| @@ -361,10 +346,6 @@ static const struct pci_id_descr pci_dev_descr_i7core_westmere[] = { | |||
| 361 | { PCI_DESCR(6, 1, PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH2_ADDR_REV2) }, | 346 | { PCI_DESCR(6, 1, PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH2_ADDR_REV2) }, |
| 362 | { PCI_DESCR(6, 2, PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH2_RANK_REV2) }, | 347 | { PCI_DESCR(6, 2, PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH2_RANK_REV2) }, |
| 363 | { PCI_DESCR(6, 3, PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH2_TC_REV2) }, | 348 | { PCI_DESCR(6, 3, PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH2_TC_REV2) }, |
| 364 | |||
| 365 | /* Generic Non-core registers */ | ||
| 366 | { PCI_DESCR(0, 0, PCI_DEVICE_ID_INTEL_LYNNFIELD_NONCORE_REV2) }, | ||
| 367 | |||
| 368 | }; | 349 | }; |
| 369 | 350 | ||
| 370 | #define PCI_ID_TABLE_ENTRY(A) { .descr=A, .n_devs = ARRAY_SIZE(A) } | 351 | #define PCI_ID_TABLE_ENTRY(A) { .descr=A, .n_devs = ARRAY_SIZE(A) } |
| @@ -1342,20 +1323,6 @@ static int i7core_get_onedevice(struct pci_dev **prev, | |||
| 1342 | pdev = pci_get_device(PCI_VENDOR_ID_INTEL, | 1323 | pdev = pci_get_device(PCI_VENDOR_ID_INTEL, |
| 1343 | dev_descr->dev_id, *prev); | 1324 | dev_descr->dev_id, *prev); |
| 1344 | 1325 | ||
| 1345 | /* | ||
| 1346 | * On Xeon 55xx, the Intel Quckpath Arch Generic Non-core regs | ||
| 1347 | * is at addr 8086:2c40, instead of 8086:2c41. So, we need | ||
| 1348 | * to probe for the alternate address in case of failure | ||
| 1349 | */ | ||
| 1350 | if (dev_descr->dev_id == PCI_DEVICE_ID_INTEL_I7_NONCORE && !pdev) | ||
| 1351 | pdev = pci_get_device(PCI_VENDOR_ID_INTEL, | ||
| 1352 | PCI_DEVICE_ID_INTEL_I7_NONCORE_ALT, *prev); | ||
| 1353 | |||
| 1354 | if (dev_descr->dev_id == PCI_DEVICE_ID_INTEL_LYNNFIELD_NONCORE && !pdev) | ||
| 1355 | pdev = pci_get_device(PCI_VENDOR_ID_INTEL, | ||
| 1356 | PCI_DEVICE_ID_INTEL_LYNNFIELD_NONCORE_ALT, | ||
| 1357 | *prev); | ||
| 1358 | |||
| 1359 | if (!pdev) { | 1326 | if (!pdev) { |
| 1360 | if (*prev) { | 1327 | if (*prev) { |
| 1361 | *prev = pdev; | 1328 | *prev = pdev; |
