diff options
| -rw-r--r-- | drivers/char/drm/radeon_irq.c | 27 |
1 files changed, 13 insertions, 14 deletions
diff --git a/drivers/char/drm/radeon_irq.c b/drivers/char/drm/radeon_irq.c index cd25f28e26a3..40474a65f56d 100644 --- a/drivers/char/drm/radeon_irq.c +++ b/drivers/char/drm/radeon_irq.c | |||
| @@ -35,6 +35,14 @@ | |||
| 35 | #include "radeon_drm.h" | 35 | #include "radeon_drm.h" |
| 36 | #include "radeon_drv.h" | 36 | #include "radeon_drv.h" |
| 37 | 37 | ||
| 38 | static __inline__ u32 radeon_acknowledge_irqs(drm_radeon_private_t *dev_priv, u32 mask) | ||
| 39 | { | ||
| 40 | u32 irqs = RADEON_READ(RADEON_GEN_INT_STATUS) & mask; | ||
| 41 | if (irqs) | ||
| 42 | RADEON_WRITE(RADEON_GEN_INT_STATUS, irqs); | ||
| 43 | return irqs; | ||
| 44 | } | ||
| 45 | |||
| 38 | /* Interrupts - Used for device synchronization and flushing in the | 46 | /* Interrupts - Used for device synchronization and flushing in the |
| 39 | * following circumstances: | 47 | * following circumstances: |
| 40 | * | 48 | * |
| @@ -63,8 +71,8 @@ irqreturn_t radeon_driver_irq_handler( DRM_IRQ_ARGS ) | |||
| 63 | /* Only consider the bits we're interested in - others could be used | 71 | /* Only consider the bits we're interested in - others could be used |
| 64 | * outside the DRM | 72 | * outside the DRM |
| 65 | */ | 73 | */ |
| 66 | stat = RADEON_READ(RADEON_GEN_INT_STATUS) | 74 | stat = radeon_acknowledge_irqs(dev_priv, (RADEON_SW_INT_TEST_ACK | |
| 67 | & (RADEON_SW_INT_TEST | RADEON_CRTC_VBLANK_STAT); | 75 | RADEON_CRTC_VBLANK_STAT)); |
| 68 | if (!stat) | 76 | if (!stat) |
| 69 | return IRQ_NONE; | 77 | return IRQ_NONE; |
| 70 | 78 | ||
| @@ -80,19 +88,9 @@ irqreturn_t radeon_driver_irq_handler( DRM_IRQ_ARGS ) | |||
| 80 | drm_vbl_send_signals( dev ); | 88 | drm_vbl_send_signals( dev ); |
| 81 | } | 89 | } |
| 82 | 90 | ||
| 83 | /* Acknowledge interrupts we handle */ | ||
| 84 | RADEON_WRITE(RADEON_GEN_INT_STATUS, stat); | ||
| 85 | return IRQ_HANDLED; | 91 | return IRQ_HANDLED; |
| 86 | } | 92 | } |
| 87 | 93 | ||
| 88 | static __inline__ void radeon_acknowledge_irqs(drm_radeon_private_t *dev_priv) | ||
| 89 | { | ||
| 90 | u32 tmp = RADEON_READ( RADEON_GEN_INT_STATUS ) | ||
| 91 | & (RADEON_SW_INT_TEST_ACK | RADEON_CRTC_VBLANK_STAT); | ||
| 92 | if (tmp) | ||
| 93 | RADEON_WRITE( RADEON_GEN_INT_STATUS, tmp ); | ||
| 94 | } | ||
| 95 | |||
| 96 | static int radeon_emit_irq(drm_device_t *dev) | 94 | static int radeon_emit_irq(drm_device_t *dev) |
| 97 | { | 95 | { |
| 98 | drm_radeon_private_t *dev_priv = dev->dev_private; | 96 | drm_radeon_private_t *dev_priv = dev->dev_private; |
| @@ -141,7 +139,7 @@ int radeon_driver_vblank_wait(drm_device_t *dev, unsigned int *sequence) | |||
| 141 | return DRM_ERR(EINVAL); | 139 | return DRM_ERR(EINVAL); |
| 142 | } | 140 | } |
| 143 | 141 | ||
| 144 | radeon_acknowledge_irqs( dev_priv ); | 142 | radeon_acknowledge_irqs(dev_priv, RADEON_CRTC_VBLANK_STAT); |
| 145 | 143 | ||
| 146 | dev_priv->stats.boxes |= RADEON_BOX_WAIT_IDLE; | 144 | dev_priv->stats.boxes |= RADEON_BOX_WAIT_IDLE; |
| 147 | 145 | ||
| @@ -219,7 +217,8 @@ void radeon_driver_irq_preinstall( drm_device_t *dev ) { | |||
| 219 | RADEON_WRITE( RADEON_GEN_INT_CNTL, 0 ); | 217 | RADEON_WRITE( RADEON_GEN_INT_CNTL, 0 ); |
| 220 | 218 | ||
| 221 | /* Clear bits if they're already high */ | 219 | /* Clear bits if they're already high */ |
| 222 | radeon_acknowledge_irqs( dev_priv ); | 220 | radeon_acknowledge_irqs(dev_priv, (RADEON_SW_INT_TEST_ACK | |
| 221 | RADEON_CRTC_VBLANK_STAT)); | ||
| 223 | } | 222 | } |
| 224 | 223 | ||
| 225 | void radeon_driver_irq_postinstall( drm_device_t *dev ) { | 224 | void radeon_driver_irq_postinstall( drm_device_t *dev ) { |
