diff options
| -rw-r--r-- | include/asm-frv/atomic.h | 81 | ||||
| -rw-r--r-- | include/asm-frv/bitops.h | 83 | ||||
| -rw-r--r-- | include/asm-frv/system.h | 3 |
3 files changed, 83 insertions, 84 deletions
diff --git a/include/asm-frv/atomic.h b/include/asm-frv/atomic.h index 6ec494a5bc5a..46d696b331e7 100644 --- a/include/asm-frv/atomic.h +++ b/include/asm-frv/atomic.h | |||
| @@ -125,87 +125,6 @@ static inline void atomic_dec(atomic_t *v) | |||
| 125 | #define atomic_dec_and_test(v) (atomic_sub_return(1, (v)) == 0) | 125 | #define atomic_dec_and_test(v) (atomic_sub_return(1, (v)) == 0) |
| 126 | #define atomic_inc_and_test(v) (atomic_add_return(1, (v)) == 0) | 126 | #define atomic_inc_and_test(v) (atomic_add_return(1, (v)) == 0) |
| 127 | 127 | ||
| 128 | #ifndef CONFIG_FRV_OUTOFLINE_ATOMIC_OPS | ||
| 129 | static inline | ||
| 130 | unsigned long atomic_test_and_ANDNOT_mask(unsigned long mask, volatile unsigned long *v) | ||
| 131 | { | ||
| 132 | unsigned long old, tmp; | ||
| 133 | |||
| 134 | asm volatile( | ||
| 135 | "0: \n" | ||
| 136 | " orcc gr0,gr0,gr0,icc3 \n" /* set ICC3.Z */ | ||
| 137 | " ckeq icc3,cc7 \n" | ||
| 138 | " ld.p %M0,%1 \n" /* LD.P/ORCR are atomic */ | ||
| 139 | " orcr cc7,cc7,cc3 \n" /* set CC3 to true */ | ||
| 140 | " and%I3 %1,%3,%2 \n" | ||
| 141 | " cst.p %2,%M0 ,cc3,#1 \n" /* if store happens... */ | ||
| 142 | " corcc gr29,gr29,gr0 ,cc3,#1 \n" /* ... clear ICC3.Z */ | ||
| 143 | " beq icc3,#0,0b \n" | ||
| 144 | : "+U"(*v), "=&r"(old), "=r"(tmp) | ||
| 145 | : "NPr"(~mask) | ||
| 146 | : "memory", "cc7", "cc3", "icc3" | ||
| 147 | ); | ||
| 148 | |||
| 149 | return old; | ||
| 150 | } | ||
| 151 | |||
| 152 | static inline | ||
| 153 | unsigned long atomic_test_and_OR_mask(unsigned long mask, volatile unsigned long *v) | ||
| 154 | { | ||
| 155 | unsigned long old, tmp; | ||
| 156 | |||
| 157 | asm volatile( | ||
| 158 | "0: \n" | ||
| 159 | " orcc gr0,gr0,gr0,icc3 \n" /* set ICC3.Z */ | ||
| 160 | " ckeq icc3,cc7 \n" | ||
| 161 | " ld.p %M0,%1 \n" /* LD.P/ORCR are atomic */ | ||
| 162 | " orcr cc7,cc7,cc3 \n" /* set CC3 to true */ | ||
| 163 | " or%I3 %1,%3,%2 \n" | ||
| 164 | " cst.p %2,%M0 ,cc3,#1 \n" /* if store happens... */ | ||
| 165 | " corcc gr29,gr29,gr0 ,cc3,#1 \n" /* ... clear ICC3.Z */ | ||
| 166 | " beq icc3,#0,0b \n" | ||
| 167 | : "+U"(*v), "=&r"(old), "=r"(tmp) | ||
| 168 | : "NPr"(mask) | ||
| 169 | : "memory", "cc7", "cc3", "icc3" | ||
| 170 | ); | ||
| 171 | |||
| 172 | return old; | ||
| 173 | } | ||
| 174 | |||
| 175 | static inline | ||
| 176 | unsigned long atomic_test_and_XOR_mask(unsigned long mask, volatile unsigned long *v) | ||
| 177 | { | ||
| 178 | unsigned long old, tmp; | ||
| 179 | |||
| 180 | asm volatile( | ||
| 181 | "0: \n" | ||
| 182 | " orcc gr0,gr0,gr0,icc3 \n" /* set ICC3.Z */ | ||
| 183 | " ckeq icc3,cc7 \n" | ||
| 184 | " ld.p %M0,%1 \n" /* LD.P/ORCR are atomic */ | ||
| 185 | " orcr cc7,cc7,cc3 \n" /* set CC3 to true */ | ||
| 186 | " xor%I3 %1,%3,%2 \n" | ||
| 187 | " cst.p %2,%M0 ,cc3,#1 \n" /* if store happens... */ | ||
| 188 | " corcc gr29,gr29,gr0 ,cc3,#1 \n" /* ... clear ICC3.Z */ | ||
| 189 | " beq icc3,#0,0b \n" | ||
| 190 | : "+U"(*v), "=&r"(old), "=r"(tmp) | ||
| 191 | : "NPr"(mask) | ||
| 192 | : "memory", "cc7", "cc3", "icc3" | ||
| 193 | ); | ||
| 194 | |||
| 195 | return old; | ||
| 196 | } | ||
| 197 | |||
| 198 | #else | ||
| 199 | |||
| 200 | extern unsigned long atomic_test_and_ANDNOT_mask(unsigned long mask, volatile unsigned long *v); | ||
| 201 | extern unsigned long atomic_test_and_OR_mask(unsigned long mask, volatile unsigned long *v); | ||
| 202 | extern unsigned long atomic_test_and_XOR_mask(unsigned long mask, volatile unsigned long *v); | ||
| 203 | |||
| 204 | #endif | ||
| 205 | |||
| 206 | #define atomic_clear_mask(mask, v) atomic_test_and_ANDNOT_mask((mask), (v)) | ||
| 207 | #define atomic_set_mask(mask, v) atomic_test_and_OR_mask((mask), (v)) | ||
| 208 | |||
| 209 | /*****************************************************************************/ | 128 | /*****************************************************************************/ |
| 210 | /* | 129 | /* |
| 211 | * exchange value with memory | 130 | * exchange value with memory |
diff --git a/include/asm-frv/bitops.h b/include/asm-frv/bitops.h index 5f86b876b298..39456ba0ec17 100644 --- a/include/asm-frv/bitops.h +++ b/include/asm-frv/bitops.h | |||
| @@ -16,8 +16,6 @@ | |||
| 16 | 16 | ||
| 17 | #include <linux/compiler.h> | 17 | #include <linux/compiler.h> |
| 18 | #include <asm/byteorder.h> | 18 | #include <asm/byteorder.h> |
| 19 | #include <asm/system.h> | ||
| 20 | #include <asm/atomic.h> | ||
| 21 | 19 | ||
| 22 | #ifdef __KERNEL__ | 20 | #ifdef __KERNEL__ |
| 23 | 21 | ||
| @@ -33,6 +31,87 @@ | |||
| 33 | #define smp_mb__before_clear_bit() barrier() | 31 | #define smp_mb__before_clear_bit() barrier() |
| 34 | #define smp_mb__after_clear_bit() barrier() | 32 | #define smp_mb__after_clear_bit() barrier() |
| 35 | 33 | ||
| 34 | #ifndef CONFIG_FRV_OUTOFLINE_ATOMIC_OPS | ||
| 35 | static inline | ||
| 36 | unsigned long atomic_test_and_ANDNOT_mask(unsigned long mask, volatile unsigned long *v) | ||
| 37 | { | ||
| 38 | unsigned long old, tmp; | ||
| 39 | |||
| 40 | asm volatile( | ||
| 41 | "0: \n" | ||
| 42 | " orcc gr0,gr0,gr0,icc3 \n" /* set ICC3.Z */ | ||
| 43 | " ckeq icc3,cc7 \n" | ||
| 44 | " ld.p %M0,%1 \n" /* LD.P/ORCR are atomic */ | ||
| 45 | " orcr cc7,cc7,cc3 \n" /* set CC3 to true */ | ||
| 46 | " and%I3 %1,%3,%2 \n" | ||
| 47 | " cst.p %2,%M0 ,cc3,#1 \n" /* if store happens... */ | ||
| 48 | " corcc gr29,gr29,gr0 ,cc3,#1 \n" /* ... clear ICC3.Z */ | ||
| 49 | " beq icc3,#0,0b \n" | ||
| 50 | : "+U"(*v), "=&r"(old), "=r"(tmp) | ||
| 51 | : "NPr"(~mask) | ||
| 52 | : "memory", "cc7", "cc3", "icc3" | ||
| 53 | ); | ||
| 54 | |||
| 55 | return old; | ||
| 56 | } | ||
| 57 | |||
| 58 | static inline | ||
| 59 | unsigned long atomic_test_and_OR_mask(unsigned long mask, volatile unsigned long *v) | ||
| 60 | { | ||
| 61 | unsigned long old, tmp; | ||
| 62 | |||
| 63 | asm volatile( | ||
| 64 | "0: \n" | ||
| 65 | " orcc gr0,gr0,gr0,icc3 \n" /* set ICC3.Z */ | ||
| 66 | " ckeq icc3,cc7 \n" | ||
| 67 | " ld.p %M0,%1 \n" /* LD.P/ORCR are atomic */ | ||
| 68 | " orcr cc7,cc7,cc3 \n" /* set CC3 to true */ | ||
| 69 | " or%I3 %1,%3,%2 \n" | ||
| 70 | " cst.p %2,%M0 ,cc3,#1 \n" /* if store happens... */ | ||
| 71 | " corcc gr29,gr29,gr0 ,cc3,#1 \n" /* ... clear ICC3.Z */ | ||
| 72 | " beq icc3,#0,0b \n" | ||
| 73 | : "+U"(*v), "=&r"(old), "=r"(tmp) | ||
| 74 | : "NPr"(mask) | ||
| 75 | : "memory", "cc7", "cc3", "icc3" | ||
| 76 | ); | ||
| 77 | |||
| 78 | return old; | ||
| 79 | } | ||
| 80 | |||
| 81 | static inline | ||
| 82 | unsigned long atomic_test_and_XOR_mask(unsigned long mask, volatile unsigned long *v) | ||
| 83 | { | ||
| 84 | unsigned long old, tmp; | ||
| 85 | |||
| 86 | asm volatile( | ||
| 87 | "0: \n" | ||
| 88 | " orcc gr0,gr0,gr0,icc3 \n" /* set ICC3.Z */ | ||
| 89 | " ckeq icc3,cc7 \n" | ||
| 90 | " ld.p %M0,%1 \n" /* LD.P/ORCR are atomic */ | ||
| 91 | " orcr cc7,cc7,cc3 \n" /* set CC3 to true */ | ||
| 92 | " xor%I3 %1,%3,%2 \n" | ||
| 93 | " cst.p %2,%M0 ,cc3,#1 \n" /* if store happens... */ | ||
| 94 | " corcc gr29,gr29,gr0 ,cc3,#1 \n" /* ... clear ICC3.Z */ | ||
| 95 | " beq icc3,#0,0b \n" | ||
| 96 | : "+U"(*v), "=&r"(old), "=r"(tmp) | ||
| 97 | : "NPr"(mask) | ||
| 98 | : "memory", "cc7", "cc3", "icc3" | ||
| 99 | ); | ||
| 100 | |||
| 101 | return old; | ||
| 102 | } | ||
| 103 | |||
| 104 | #else | ||
| 105 | |||
| 106 | extern unsigned long atomic_test_and_ANDNOT_mask(unsigned long mask, volatile unsigned long *v); | ||
| 107 | extern unsigned long atomic_test_and_OR_mask(unsigned long mask, volatile unsigned long *v); | ||
| 108 | extern unsigned long atomic_test_and_XOR_mask(unsigned long mask, volatile unsigned long *v); | ||
| 109 | |||
| 110 | #endif | ||
| 111 | |||
| 112 | #define atomic_clear_mask(mask, v) atomic_test_and_ANDNOT_mask((mask), (v)) | ||
| 113 | #define atomic_set_mask(mask, v) atomic_test_and_OR_mask((mask), (v)) | ||
| 114 | |||
| 36 | static inline int test_and_clear_bit(int nr, volatile void *addr) | 115 | static inline int test_and_clear_bit(int nr, volatile void *addr) |
| 37 | { | 116 | { |
| 38 | volatile unsigned long *ptr = addr; | 117 | volatile unsigned long *ptr = addr; |
diff --git a/include/asm-frv/system.h b/include/asm-frv/system.h index 59be5443a68f..b400cea81487 100644 --- a/include/asm-frv/system.h +++ b/include/asm-frv/system.h | |||
| @@ -14,6 +14,7 @@ | |||
| 14 | 14 | ||
| 15 | #include <linux/types.h> | 15 | #include <linux/types.h> |
| 16 | #include <linux/linkage.h> | 16 | #include <linux/linkage.h> |
| 17 | #include <linux/kernel.h> | ||
| 17 | 18 | ||
| 18 | struct thread_struct; | 19 | struct thread_struct; |
| 19 | 20 | ||
| @@ -276,7 +277,7 @@ static inline unsigned long __cmpxchg_local(volatile void *ptr, | |||
| 276 | { | 277 | { |
| 277 | switch (size) { | 278 | switch (size) { |
| 278 | case 4: | 279 | case 4: |
| 279 | return cmpxchg(ptr, old, new); | 280 | return cmpxchg((unsigned long *)ptr, old, new); |
| 280 | default: | 281 | default: |
| 281 | return __cmpxchg_local_generic(ptr, old, new, size); | 282 | return __cmpxchg_local_generic(ptr, old, new, size); |
| 282 | } | 283 | } |
