diff options
| -rw-r--r-- | arch/arm/mach-pxa/zeus.c | 11 |
1 files changed, 10 insertions, 1 deletions
diff --git a/arch/arm/mach-pxa/zeus.c b/arch/arm/mach-pxa/zeus.c index 865df5d840e7..2f480a2b1531 100644 --- a/arch/arm/mach-pxa/zeus.c +++ b/arch/arm/mach-pxa/zeus.c | |||
| @@ -726,9 +726,18 @@ static mfp_cfg_t zeus_pin_config[] __initdata = { | |||
| 726 | GPIO99_GPIO, /* CF RDY */ | 726 | GPIO99_GPIO, /* CF RDY */ |
| 727 | }; | 727 | }; |
| 728 | 728 | ||
| 729 | /* | ||
| 730 | * DM9k MSCx settings: SRAM, 16 bits | ||
| 731 | * 17 cycles delay first access | ||
| 732 | * 5 cycles delay next access | ||
| 733 | * 13 cycles recovery time | ||
| 734 | * faster device | ||
| 735 | */ | ||
| 736 | #define DM9K_MSC_VALUE 0xe4c9 | ||
| 737 | |||
| 729 | static void __init zeus_init(void) | 738 | static void __init zeus_init(void) |
| 730 | { | 739 | { |
| 731 | u16 dm9000_msc = 0xe279; | 740 | u16 dm9000_msc = DM9K_MSC_VALUE; |
| 732 | 741 | ||
| 733 | system_rev = __raw_readw(ZEUS_CPLD_VERSION); | 742 | system_rev = __raw_readw(ZEUS_CPLD_VERSION); |
| 734 | pr_info("Zeus CPLD V%dI%d\n", (system_rev & 0xf0) >> 4, (system_rev & 0x0f)); | 743 | pr_info("Zeus CPLD V%dI%d\n", (system_rev & 0xf0) >> 4, (system_rev & 0x0f)); |
