diff options
| -rw-r--r-- | arch/sparc64/kernel/entry.S | 15 |
1 files changed, 4 insertions, 11 deletions
diff --git a/arch/sparc64/kernel/entry.S b/arch/sparc64/kernel/entry.S index 88332f00094a..6d0476ff4ff8 100644 --- a/arch/sparc64/kernel/entry.S +++ b/arch/sparc64/kernel/entry.S | |||
| @@ -690,11 +690,6 @@ netbsd_syscall: | |||
| 690 | retl | 690 | retl |
| 691 | nop | 691 | nop |
| 692 | 692 | ||
| 693 | /* These next few routines must be sure to clear the | ||
| 694 | * SFSR FaultValid bit so that the fast tlb data protection | ||
| 695 | * handler does not flush the wrong context and lock up the | ||
| 696 | * box. | ||
| 697 | */ | ||
| 698 | .globl __do_data_access_exception | 693 | .globl __do_data_access_exception |
| 699 | .globl __do_data_access_exception_tl1 | 694 | .globl __do_data_access_exception_tl1 |
| 700 | __do_data_access_exception_tl1: | 695 | __do_data_access_exception_tl1: |
| @@ -733,9 +728,8 @@ __do_instruction_access_exception_tl1: | |||
| 733 | rdpr %pstate, %g4 | 728 | rdpr %pstate, %g4 |
| 734 | wrpr %g4, PSTATE_MG|PSTATE_AG, %pstate | 729 | wrpr %g4, PSTATE_MG|PSTATE_AG, %pstate |
| 735 | mov TLB_SFSR, %g3 | 730 | mov TLB_SFSR, %g3 |
| 736 | mov DMMU_SFAR, %g5 | 731 | ldxa [%g3] ASI_IMMU, %g4 ! Get SFSR |
| 737 | ldxa [%g3] ASI_DMMU, %g4 ! Get SFSR | 732 | rdpr %tpc, %g5 ! IMMU has no SFAR, use TPC |
| 738 | ldxa [%g5] ASI_DMMU, %g5 ! Get SFAR | ||
| 739 | stxa %g0, [%g3] ASI_IMMU ! Clear FaultValid bit | 733 | stxa %g0, [%g3] ASI_IMMU ! Clear FaultValid bit |
| 740 | membar #Sync | 734 | membar #Sync |
| 741 | sethi %hi(109f), %g7 | 735 | sethi %hi(109f), %g7 |
| @@ -752,9 +746,8 @@ __do_instruction_access_exception: | |||
| 752 | rdpr %pstate, %g4 | 746 | rdpr %pstate, %g4 |
| 753 | wrpr %g4, PSTATE_MG|PSTATE_AG, %pstate | 747 | wrpr %g4, PSTATE_MG|PSTATE_AG, %pstate |
| 754 | mov TLB_SFSR, %g3 | 748 | mov TLB_SFSR, %g3 |
| 755 | mov DMMU_SFAR, %g5 | 749 | ldxa [%g3] ASI_IMMU, %g4 ! Get SFSR |
| 756 | ldxa [%g3] ASI_DMMU, %g4 ! Get SFSR | 750 | rdpr %tpc, %g5 ! IMMU has no SFAR, use TPC |
| 757 | ldxa [%g5] ASI_DMMU, %g5 ! Get SFAR | ||
| 758 | stxa %g0, [%g3] ASI_IMMU ! Clear FaultValid bit | 751 | stxa %g0, [%g3] ASI_IMMU ! Clear FaultValid bit |
| 759 | membar #Sync | 752 | membar #Sync |
| 760 | sethi %hi(109f), %g7 | 753 | sethi %hi(109f), %g7 |
