diff options
| -rw-r--r-- | drivers/ide/pci/cmd64x.c | 129 |
1 files changed, 55 insertions, 74 deletions
diff --git a/drivers/ide/pci/cmd64x.c b/drivers/ide/pci/cmd64x.c index 63fd9294c7c4..24acddfc27bc 100644 --- a/drivers/ide/pci/cmd64x.c +++ b/drivers/ide/pci/cmd64x.c | |||
| @@ -1,5 +1,5 @@ | |||
| 1 | /* | 1 | /* |
| 2 | * linux/drivers/ide/pci/cmd64x.c Version 1.45 Mar 14, 2007 | 2 | * linux/drivers/ide/pci/cmd64x.c Version 1.46 Mar 16, 2007 |
| 3 | * | 3 | * |
| 4 | * cmd64x.c: Enable interrupts at initialization time on Ultra/PCI machines. | 4 | * cmd64x.c: Enable interrupts at initialization time on Ultra/PCI machines. |
| 5 | * Due to massive hardware bugs, UltraDMA is only supported | 5 | * Due to massive hardware bugs, UltraDMA is only supported |
| @@ -38,9 +38,10 @@ | |||
| 38 | #define CFR 0x50 | 38 | #define CFR 0x50 |
| 39 | #define CFR_INTR_CH0 0x04 | 39 | #define CFR_INTR_CH0 0x04 |
| 40 | #define CNTRL 0x51 | 40 | #define CNTRL 0x51 |
| 41 | #define CNTRL_DIS_RA0 0x40 | 41 | #define CNTRL_ENA_1ST 0x04 |
| 42 | #define CNTRL_DIS_RA1 0x80 | 42 | #define CNTRL_ENA_2ND 0x08 |
| 43 | #define CNTRL_ENA_2ND 0x08 | 43 | #define CNTRL_DIS_RA0 0x40 |
| 44 | #define CNTRL_DIS_RA1 0x80 | ||
| 44 | 45 | ||
| 45 | #define CMDTIM 0x52 | 46 | #define CMDTIM 0x52 |
| 46 | #define ARTTIM0 0x53 | 47 | #define ARTTIM0 0x53 |
| @@ -87,86 +88,67 @@ static int n_cmd_devs; | |||
| 87 | static char * print_cmd64x_get_info (char *buf, struct pci_dev *dev, int index) | 88 | static char * print_cmd64x_get_info (char *buf, struct pci_dev *dev, int index) |
| 88 | { | 89 | { |
| 89 | char *p = buf; | 90 | char *p = buf; |
| 90 | |||
| 91 | u8 reg53 = 0, reg54 = 0, reg55 = 0, reg56 = 0; /* primary */ | ||
| 92 | u8 reg57 = 0, reg58 = 0, reg5b; /* secondary */ | ||
| 93 | u8 reg72 = 0, reg73 = 0; /* primary */ | 91 | u8 reg72 = 0, reg73 = 0; /* primary */ |
| 94 | u8 reg7a = 0, reg7b = 0; /* secondary */ | 92 | u8 reg7a = 0, reg7b = 0; /* secondary */ |
| 95 | u8 reg50 = 0, reg71 = 0; /* extra */ | 93 | u8 reg50 = 1, reg51 = 1, reg57 = 0, reg71 = 0; /* extra */ |
| 94 | u8 rev = 0; | ||
| 96 | 95 | ||
| 97 | p += sprintf(p, "\nController: %d\n", index); | 96 | p += sprintf(p, "\nController: %d\n", index); |
| 98 | p += sprintf(p, "CMD%x Chipset.\n", dev->device); | 97 | p += sprintf(p, "PCI-%x Chipset.\n", dev->device); |
| 98 | |||
| 99 | (void) pci_read_config_byte(dev, CFR, ®50); | 99 | (void) pci_read_config_byte(dev, CFR, ®50); |
| 100 | (void) pci_read_config_byte(dev, ARTTIM0, ®53); | 100 | (void) pci_read_config_byte(dev, CNTRL, ®51); |
| 101 | (void) pci_read_config_byte(dev, DRWTIM0, ®54); | 101 | (void) pci_read_config_byte(dev, ARTTIM23, ®57); |
| 102 | (void) pci_read_config_byte(dev, ARTTIM1, ®55); | ||
| 103 | (void) pci_read_config_byte(dev, DRWTIM1, ®56); | ||
| 104 | (void) pci_read_config_byte(dev, ARTTIM2, ®57); | ||
| 105 | (void) pci_read_config_byte(dev, DRWTIM2, ®58); | ||
| 106 | (void) pci_read_config_byte(dev, DRWTIM3, ®5b); | ||
| 107 | (void) pci_read_config_byte(dev, MRDMODE, ®71); | 102 | (void) pci_read_config_byte(dev, MRDMODE, ®71); |
| 108 | (void) pci_read_config_byte(dev, BMIDESR0, ®72); | 103 | (void) pci_read_config_byte(dev, BMIDESR0, ®72); |
| 109 | (void) pci_read_config_byte(dev, UDIDETCR0, ®73); | 104 | (void) pci_read_config_byte(dev, UDIDETCR0, ®73); |
| 110 | (void) pci_read_config_byte(dev, BMIDESR1, ®7a); | 105 | (void) pci_read_config_byte(dev, BMIDESR1, ®7a); |
| 111 | (void) pci_read_config_byte(dev, UDIDETCR1, ®7b); | 106 | (void) pci_read_config_byte(dev, UDIDETCR1, ®7b); |
| 112 | 107 | ||
| 113 | p += sprintf(p, "--------------- Primary Channel " | 108 | /* PCI0643/6 originally didn't have the primary channel enable bit */ |
| 114 | "---------------- Secondary Channel " | 109 | (void) pci_read_config_byte(dev, PCI_REVISION_ID, &rev); |
| 115 | "-------------\n"); | 110 | if ((dev->device == PCI_DEVICE_ID_CMD_643) || |
| 116 | p += sprintf(p, " %sabled " | 111 | (dev->device == PCI_DEVICE_ID_CMD_646 && rev < 3)) |
| 117 | " %sabled\n", | 112 | reg51 |= CNTRL_ENA_1ST; |
| 118 | (reg72&0x80)?"dis":" en", | 113 | |
| 119 | (reg7a&0x80)?"dis":" en"); | 114 | p += sprintf(p, "---------------- Primary Channel " |
| 120 | p += sprintf(p, "--------------- drive0 " | 115 | "---------------- Secondary Channel ------------\n"); |
| 121 | "--------- drive1 -------- drive0 " | 116 | p += sprintf(p, " %s %s\n", |
| 122 | "---------- drive1 ------\n"); | 117 | (reg51 & CNTRL_ENA_1ST) ? "enabled " : "disabled", |
| 123 | p += sprintf(p, "DMA enabled: %s %s" | 118 | (reg51 & CNTRL_ENA_2ND) ? "enabled " : "disabled"); |
| 124 | " %s %s\n", | 119 | p += sprintf(p, "---------------- drive0 --------- drive1 " |
| 125 | (reg72&0x20)?"yes":"no ", (reg72&0x40)?"yes":"no ", | 120 | "-------- drive0 --------- drive1 ------\n"); |
| 126 | (reg7a&0x20)?"yes":"no ", (reg7a&0x40)?"yes":"no "); | 121 | p += sprintf(p, "DMA enabled: %s %s" |
| 127 | 122 | " %s %s\n", | |
| 128 | p += sprintf(p, "DMA Mode: %s(%s) %s(%s)", | 123 | (reg72 & 0x20) ? "yes" : "no ", (reg72 & 0x40) ? "yes" : "no ", |
| 129 | (reg72&0x20)?((reg73&0x01)?"UDMA":" DMA"):" PIO", | 124 | (reg7a & 0x20) ? "yes" : "no ", (reg7a & 0x40) ? "yes" : "no "); |
| 130 | (reg72&0x20)?( | 125 | p += sprintf(p, "UltraDMA mode: %s (%c) %s (%c)", |
| 131 | ((reg73&0x30)==0x30)?(((reg73&0x35)==0x35)?"3":"0"): | 126 | ( reg73 & 0x01) ? " on" : "off", |
| 132 | ((reg73&0x20)==0x20)?(((reg73&0x25)==0x25)?"3":"1"): | 127 | ((reg73 & 0x30) == 0x30) ? ((reg73 & 0x04) ? '3' : '0') : |
| 133 | ((reg73&0x10)==0x10)?(((reg73&0x15)==0x15)?"4":"2"): | 128 | ((reg73 & 0x30) == 0x20) ? ((reg73 & 0x04) ? '3' : '1') : |
| 134 | ((reg73&0x00)==0x00)?(((reg73&0x05)==0x05)?"5":"2"): | 129 | ((reg73 & 0x30) == 0x10) ? ((reg73 & 0x04) ? '4' : '2') : |
| 135 | "X"):"?", | 130 | ((reg73 & 0x30) == 0x00) ? ((reg73 & 0x04) ? '5' : '2') : '?', |
| 136 | (reg72&0x40)?((reg73&0x02)?"UDMA":" DMA"):" PIO", | 131 | ( reg73 & 0x02) ? " on" : "off", |
| 137 | (reg72&0x40)?( | 132 | ((reg73 & 0xC0) == 0xC0) ? ((reg73 & 0x08) ? '3' : '0') : |
| 138 | ((reg73&0xC0)==0xC0)?(((reg73&0xC5)==0xC5)?"3":"0"): | 133 | ((reg73 & 0xC0) == 0x80) ? ((reg73 & 0x08) ? '3' : '1') : |
| 139 | ((reg73&0x80)==0x80)?(((reg73&0x85)==0x85)?"3":"1"): | 134 | ((reg73 & 0xC0) == 0x40) ? ((reg73 & 0x08) ? '4' : '2') : |
| 140 | ((reg73&0x40)==0x40)?(((reg73&0x4A)==0x4A)?"4":"2"): | 135 | ((reg73 & 0xC0) == 0x00) ? ((reg73 & 0x08) ? '5' : '2') : '?'); |
| 141 | ((reg73&0x00)==0x00)?(((reg73&0x0A)==0x0A)?"5":"2"): | 136 | p += sprintf(p, " %s (%c) %s (%c)\n", |
| 142 | "X"):"?"); | 137 | ( reg7b & 0x01) ? " on" : "off", |
| 143 | p += sprintf(p, " %s(%s) %s(%s)\n", | 138 | ((reg7b & 0x30) == 0x30) ? ((reg7b & 0x04) ? '3' : '0') : |
| 144 | (reg7a&0x20)?((reg7b&0x01)?"UDMA":" DMA"):" PIO", | 139 | ((reg7b & 0x30) == 0x20) ? ((reg7b & 0x04) ? '3' : '1') : |
| 145 | (reg7a&0x20)?( | 140 | ((reg7b & 0x30) == 0x10) ? ((reg7b & 0x04) ? '4' : '2') : |
| 146 | ((reg7b&0x30)==0x30)?(((reg7b&0x35)==0x35)?"3":"0"): | 141 | ((reg7b & 0x30) == 0x00) ? ((reg7b & 0x04) ? '5' : '2') : '?', |
| 147 | ((reg7b&0x20)==0x20)?(((reg7b&0x25)==0x25)?"3":"1"): | 142 | ( reg7b & 0x02) ? " on" : "off", |
| 148 | ((reg7b&0x10)==0x10)?(((reg7b&0x15)==0x15)?"4":"2"): | 143 | ((reg7b & 0xC0) == 0xC0) ? ((reg7b & 0x08) ? '3' : '0') : |
| 149 | ((reg7b&0x00)==0x00)?(((reg7b&0x05)==0x05)?"5":"2"): | 144 | ((reg7b & 0xC0) == 0x80) ? ((reg7b & 0x08) ? '3' : '1') : |
| 150 | "X"):"?", | 145 | ((reg7b & 0xC0) == 0x40) ? ((reg7b & 0x08) ? '4' : '2') : |
| 151 | (reg7a&0x40)?((reg7b&0x02)?"UDMA":" DMA"):" PIO", | 146 | ((reg7b & 0xC0) == 0x00) ? ((reg7b & 0x08) ? '5' : '2') : '?'); |
| 152 | (reg7a&0x40)?( | 147 | p += sprintf(p, "Interrupt: %s, %s %s, %s\n", |
| 153 | ((reg7b&0xC0)==0xC0)?(((reg7b&0xC5)==0xC5)?"3":"0"): | 148 | (reg71 & MRDMODE_BLK_CH0 ) ? "blocked" : "enabled", |
| 154 | ((reg7b&0x80)==0x80)?(((reg7b&0x85)==0x85)?"3":"1"): | 149 | (reg50 & CFR_INTR_CH0 ) ? "pending" : "clear ", |
| 155 | ((reg7b&0x40)==0x40)?(((reg7b&0x4A)==0x4A)?"4":"2"): | 150 | (reg71 & MRDMODE_BLK_CH1 ) ? "blocked" : "enabled", |
| 156 | ((reg7b&0x00)==0x00)?(((reg7b&0x0A)==0x0A)?"5":"2"): | 151 | (reg57 & ARTTIM23_INTR_CH1) ? "pending" : "clear "); |
| 157 | "X"):"?" ); | ||
| 158 | p += sprintf(p, "PIO Mode: %s %s" | ||
| 159 | " %s %s\n", | ||
| 160 | "?", "?", "?", "?"); | ||
| 161 | p += sprintf(p, " %s %s\n", | ||
| 162 | (reg50 & CFR_INTR_CH0) ? "interrupting" : "polling ", | ||
| 163 | (reg57 & ARTTIM23_INTR_CH1) ? "interrupting" : "polling"); | ||
| 164 | p += sprintf(p, " %s %s\n", | ||
| 165 | (reg71 & MRDMODE_INTR_CH0) ? "pending" : "clear ", | ||
| 166 | (reg71 & MRDMODE_INTR_CH1) ? "pending" : "clear"); | ||
| 167 | p += sprintf(p, " %s %s\n", | ||
| 168 | (reg71 & MRDMODE_BLK_CH0) ? "blocked" : "enabled", | ||
| 169 | (reg71 & MRDMODE_BLK_CH1) ? "blocked" : "enabled"); | ||
| 170 | 152 | ||
| 171 | return (char *)p; | 153 | return (char *)p; |
| 172 | } | 154 | } |
| @@ -176,7 +158,6 @@ static int cmd64x_get_info (char *buffer, char **addr, off_t offset, int count) | |||
| 176 | char *p = buffer; | 158 | char *p = buffer; |
| 177 | int i; | 159 | int i; |
| 178 | 160 | ||
| 179 | p += sprintf(p, "\n"); | ||
| 180 | for (i = 0; i < n_cmd_devs; i++) { | 161 | for (i = 0; i < n_cmd_devs; i++) { |
| 181 | struct pci_dev *dev = cmd_devs[i]; | 162 | struct pci_dev *dev = cmd_devs[i]; |
| 182 | p = print_cmd64x_get_info(p, dev, i); | 163 | p = print_cmd64x_get_info(p, dev, i); |
