2 files changed, 15 insertions, 18 deletions

diff --git a/arch/blackfin/mach-bf561/smp.c b/arch/blackfin/mach-bf561/smp.c
index 510f57641495..0192532e96a2 100644
--- a/arch/blackfin/mach-bf561/smp.c
+++ b/arch/blackfin/mach-bf561/smp.c
@@ -52,8 +52,6 @@ int __init setup_profiling_timer(unsigned int multiplier) /* not supported */
 
 void __cpuinit platform_secondary_init(unsigned int cpu)
 {
-        local_irq_disable();
-
         /* Clone setup for peripheral interrupt sources from CoreA. */
         bfin_write_SICB_IMASK0(bfin_read_SICA_IMASK0());
         bfin_write_SICB_IMASK1(bfin_read_SICA_IMASK1());
@@ -70,11 +68,6 @@ void __cpuinit platform_secondary_init(unsigned int cpu)
         bfin_write_SICB_IAR7(bfin_read_SICA_IAR7());
         SSYNC();
 
-        local_irq_enable();
-
-        /* Calibrate loops per jiffy value. */
-        calibrate_delay();
-
         /* Store CPU-private information to the cpu_data array. */
         bfin_setup_cpudata(cpu);
 
@@ -108,9 +101,13 @@ int __cpuinit platform_boot_secondary(unsigned int cpu, struct task_struct *idle
                 barrier();
         }
 
-        spin_unlock(&boot_lock);
-
-        return cpu_isset(cpu, cpu_callin_map) ? 0 : -ENOSYS;
+        if (cpu_isset(cpu, cpu_callin_map)) {
+                cpu_set(cpu, cpu_online_map);
+                /* release the lock and let coreb run */
+                spin_unlock(&boot_lock);
+                return 0;
+        } else
+                panic("CPU%u: processor failed to boot\n", cpu);
 }
 
 void __init platform_request_ipi(irq_handler_t handler)
diff --git a/arch/blackfin/mach-common/smp.c b/arch/blackfin/mach-common/smp.c
index d92b168c8328..369e687582b7 100644
--- a/arch/blackfin/mach-common/smp.c
+++ b/arch/blackfin/mach-common/smp.c
@@ -336,13 +336,6 @@ int __cpuinit __cpu_up(unsigned int cpu)
 
         ret = platform_boot_secondary(cpu, idle);
 
-        if (ret) {
-                cpu_clear(cpu, cpu_present_map);
-                printk(KERN_CRIT "CPU%u: processor failed to boot (%d)\n", cpu, ret);
-                free_task(idle);
-        } else
-                cpu_set(cpu, cpu_online_map);
-
         secondary_stack = NULL;
 
         return ret;
@@ -418,9 +411,16 @@ void __cpuinit secondary_start_kernel(void)
 
         setup_secondary(cpu);
 
+        platform_secondary_init(cpu);
+
         local_irq_enable();
 
-        platform_secondary_init(cpu);
+        /*
+         * Calibrate loops per jiffy value.
+         * IRQs need to be enabled here - D-cache can be invalidated
+         * in timer irq handler, so core B can read correct jiffies.
+         */
+        calibrate_delay();
 
         cpu_idle();
 }