diff options
| -rw-r--r-- | include/asm-blackfin/mach-bf533/irq.h | 14 | ||||
| -rw-r--r-- | include/asm-blackfin/mach-bf537/irq.h | 35 | ||||
| -rw-r--r-- | include/asm-blackfin/mach-bf561/irq.h | 13 |
3 files changed, 28 insertions, 34 deletions
diff --git a/include/asm-blackfin/mach-bf533/irq.h b/include/asm-blackfin/mach-bf533/irq.h index 832e6f6122da..5aa38e5da6b7 100644 --- a/include/asm-blackfin/mach-bf533/irq.h +++ b/include/asm-blackfin/mach-bf533/irq.h | |||
| @@ -66,12 +66,13 @@ Core Emulation ** | |||
| 66 | DMA8/9 Interrupt IVG13 28 | 66 | DMA8/9 Interrupt IVG13 28 |
| 67 | DMA10/11 Interrupt IVG13 29 | 67 | DMA10/11 Interrupt IVG13 29 |
| 68 | Watchdog Timer IVG13 30 | 68 | Watchdog Timer IVG13 30 |
| 69 | Software Interrupt 1 IVG14 31 | 69 | |
| 70 | Software Interrupt 2 -- | 70 | Softirq IVG14 31 |
| 71 | System Call -- | ||
| 71 | (lowest priority) IVG15 32 * | 72 | (lowest priority) IVG15 32 * |
| 72 | */ | 73 | */ |
| 73 | #define SYS_IRQS 32 | 74 | #define SYS_IRQS 31 |
| 74 | #define NR_PERI_INTS 24 | 75 | #define NR_PERI_INTS 24 |
| 75 | 76 | ||
| 76 | /* The ABSTRACT IRQ definitions */ | 77 | /* The ABSTRACT IRQ definitions */ |
| 77 | /** the first seven of the following are fixed, the rest you change if you need to **/ | 78 | /** the first seven of the following are fixed, the rest you change if you need to **/ |
| @@ -96,7 +97,7 @@ Core Emulation ** | |||
| 96 | #define IRQ_SPORT0_TX 17 /*DMA2 Interrupt (SPORT0 TX) */ | 97 | #define IRQ_SPORT0_TX 17 /*DMA2 Interrupt (SPORT0 TX) */ |
| 97 | #define IRQ_SPORT1_RX 18 /*DMA3 Interrupt (SPORT1 RX) */ | 98 | #define IRQ_SPORT1_RX 18 /*DMA3 Interrupt (SPORT1 RX) */ |
| 98 | #define IRQ_SPORT1_TX 19 /*DMA4 Interrupt (SPORT1 TX) */ | 99 | #define IRQ_SPORT1_TX 19 /*DMA4 Interrupt (SPORT1 TX) */ |
| 99 | #define IRQ_SPI 20 /*DMA5 Interrupt (SPI) */ | 100 | #define IRQ_SPI 20 /*DMA5 Interrupt (SPI) */ |
| 100 | #define IRQ_UART_RX 21 /*DMA6 Interrupt (UART RX) */ | 101 | #define IRQ_UART_RX 21 /*DMA6 Interrupt (UART RX) */ |
| 101 | #define IRQ_UART_TX 22 /*DMA7 Interrupt (UART TX) */ | 102 | #define IRQ_UART_TX 22 /*DMA7 Interrupt (UART TX) */ |
| 102 | #define IRQ_TMR0 23 /*Timer 0 */ | 103 | #define IRQ_TMR0 23 /*Timer 0 */ |
| @@ -108,9 +109,6 @@ Core Emulation ** | |||
| 108 | #define IRQ_MEM_DMA1 29 /*DMA10/11 Interrupt (Memory DMA Stream 1) */ | 109 | #define IRQ_MEM_DMA1 29 /*DMA10/11 Interrupt (Memory DMA Stream 1) */ |
| 109 | #define IRQ_WATCH 30 /*Watch Dog Timer */ | 110 | #define IRQ_WATCH 30 /*Watch Dog Timer */ |
| 110 | 111 | ||
| 111 | #define IRQ_SW_INT1 31 /*Software Int 1 */ | ||
| 112 | #define IRQ_SW_INT2 32 /*Software Int 2 (reserved for SYSCALL) */ | ||
| 113 | |||
| 114 | #define IRQ_PF0 33 | 112 | #define IRQ_PF0 33 |
| 115 | #define IRQ_PF1 34 | 113 | #define IRQ_PF1 34 |
| 116 | #define IRQ_PF2 35 | 114 | #define IRQ_PF2 35 |
diff --git a/include/asm-blackfin/mach-bf537/irq.h b/include/asm-blackfin/mach-bf537/irq.h index be6f2ff77f31..2e68a8a1e730 100644 --- a/include/asm-blackfin/mach-bf537/irq.h +++ b/include/asm-blackfin/mach-bf537/irq.h | |||
| @@ -34,24 +34,23 @@ | |||
| 34 | 34 | ||
| 35 | /* | 35 | /* |
| 36 | * Interrupt source definitions | 36 | * Interrupt source definitions |
| 37 | Event Source Core Event Name | 37 | * Event Source Core Event Name |
| 38 | Core Emulation ** | 38 | * Core Emulation ** |
| 39 | Events (highest priority) EMU 0 | 39 | * Events (highest priority) EMU 0 |
| 40 | Reset RST 1 | 40 | * Reset RST 1 |
| 41 | NMI NMI 2 | 41 | * NMI NMI 2 |
| 42 | Exception EVX 3 | 42 | * Exception EVX 3 |
| 43 | Reserved -- 4 | 43 | * Reserved -- 4 |
| 44 | Hardware Error IVHW 5 | 44 | * Hardware Error IVHW 5 |
| 45 | Core Timer IVTMR 6 * | 45 | * Core Timer IVTMR 6 |
| 46 | 46 | * ..... | |
| 47 | ..... | 47 | * |
| 48 | 48 | * Softirq IVG14 | |
| 49 | Software Interrupt 1 IVG14 31 | 49 | * System Call -- |
| 50 | Software Interrupt 2 -- | 50 | * (lowest priority) IVG15 |
| 51 | (lowest priority) IVG15 32 * | ||
| 52 | */ | 51 | */ |
| 53 | 52 | ||
| 54 | #define SYS_IRQS 41 | 53 | #define SYS_IRQS 39 |
| 55 | #define NR_PERI_INTS 32 | 54 | #define NR_PERI_INTS 32 |
| 56 | 55 | ||
| 57 | /* The ABSTRACT IRQ definitions */ | 56 | /* The ABSTRACT IRQ definitions */ |
| @@ -95,10 +94,8 @@ Core Emulation ** | |||
| 95 | #define IRQ_PORTG_INTB 35 /* PF Port G (PF15:0) Interrupt B */ | 94 | #define IRQ_PORTG_INTB 35 /* PF Port G (PF15:0) Interrupt B */ |
| 96 | #define IRQ_MEM_DMA0 36 /*(Memory DMA Stream 0) */ | 95 | #define IRQ_MEM_DMA0 36 /*(Memory DMA Stream 0) */ |
| 97 | #define IRQ_MEM_DMA1 37 /*(Memory DMA Stream 1) */ | 96 | #define IRQ_MEM_DMA1 37 /*(Memory DMA Stream 1) */ |
| 98 | #define IRQ_PROG_INTB 38 /* PF Ports F (PF15:0) Interrupt B */ | 97 | #define IRQ_PROG_INTB 38 /* PF Ports F (PF15:0) Interrupt B */ |
| 99 | #define IRQ_WATCH 38 /*Watch Dog Timer */ | 98 | #define IRQ_WATCH 38 /*Watch Dog Timer */ |
| 100 | #define IRQ_SW_INT1 40 /*Software Int 1 */ | ||
| 101 | #define IRQ_SW_INT2 41 /*Software Int 2 (reserved for SYSCALL) */ | ||
| 102 | 99 | ||
| 103 | #define IRQ_PPI_ERROR 42 /*PPI Error Interrupt */ | 100 | #define IRQ_PPI_ERROR 42 /*PPI Error Interrupt */ |
| 104 | #define IRQ_CAN_ERROR 43 /*CAN Error Interrupt */ | 101 | #define IRQ_CAN_ERROR 43 /*CAN Error Interrupt */ |
diff --git a/include/asm-blackfin/mach-bf561/irq.h b/include/asm-blackfin/mach-bf561/irq.h index 83f0383957d2..6698389c5564 100644 --- a/include/asm-blackfin/mach-bf561/irq.h +++ b/include/asm-blackfin/mach-bf561/irq.h | |||
| @@ -118,12 +118,13 @@ | |||
| 118 | Supplemental interrupt 0 IVG7 69 | 118 | Supplemental interrupt 0 IVG7 69 |
| 119 | supplemental interrupt 1 IVG7 70 | 119 | supplemental interrupt 1 IVG7 70 |
| 120 | 120 | ||
| 121 | Software Interrupt 1 IVG14 71 | 121 | Softirq IVG14 |
| 122 | Software Interrupt 2 IVG15 72 * | 122 | System Call -- |
| 123 | (lowest priority) | 123 | (lowest priority) IVG15 |
| 124 | |||
| 124 | **********************************************************************/ | 125 | **********************************************************************/ |
| 125 | 126 | ||
| 126 | #define SYS_IRQS 72 | 127 | #define SYS_IRQS 71 |
| 127 | #define NR_PERI_INTS 64 | 128 | #define NR_PERI_INTS 64 |
| 128 | 129 | ||
| 129 | /* | 130 | /* |
| @@ -237,9 +238,7 @@ | |||
| 237 | #define IRQ_RESERVED_2 (IVG_BASE + 61) /* Reserved interrupt */ | 238 | #define IRQ_RESERVED_2 (IVG_BASE + 61) /* Reserved interrupt */ |
| 238 | #define IRQ_SUPPLE_0 (IVG_BASE + 62) /* Supplemental interrupt 0 */ | 239 | #define IRQ_SUPPLE_0 (IVG_BASE + 62) /* Supplemental interrupt 0 */ |
| 239 | #define IRQ_SUPPLE_1 (IVG_BASE + 63) /* supplemental interrupt 1 */ | 240 | #define IRQ_SUPPLE_1 (IVG_BASE + 63) /* supplemental interrupt 1 */ |
| 240 | #define IRQ_SW_INT1 71 /* Software Interrupt 1 */ | 241 | |
| 241 | #define IRQ_SW_INT2 72 /* Software Interrupt 2 */ | ||
| 242 | /* reserved for SYSCALL */ | ||
| 243 | #define IRQ_PF0 73 | 242 | #define IRQ_PF0 73 |
| 244 | #define IRQ_PF1 74 | 243 | #define IRQ_PF1 74 |
| 245 | #define IRQ_PF2 75 | 244 | #define IRQ_PF2 75 |
