diff options
38 files changed, 1355 insertions, 568 deletions
diff --git a/arch/arm/common/clkdev.c b/arch/arm/common/clkdev.c index 17a17b49a45b..1037bba18329 100644 --- a/arch/arm/common/clkdev.c +++ b/arch/arm/common/clkdev.c | |||
| @@ -24,6 +24,15 @@ | |||
| 24 | static LIST_HEAD(clocks); | 24 | static LIST_HEAD(clocks); |
| 25 | static DEFINE_MUTEX(clocks_mutex); | 25 | static DEFINE_MUTEX(clocks_mutex); |
| 26 | 26 | ||
| 27 | /* | ||
| 28 | * Find the correct struct clk for the device and connection ID. | ||
| 29 | * We do slightly fuzzy matching here: | ||
| 30 | * An entry with a NULL ID is assumed to be a wildcard. | ||
| 31 | * If an entry has a device ID, it must match | ||
| 32 | * If an entry has a connection ID, it must match | ||
| 33 | * Then we take the most specific entry - with the following | ||
| 34 | * order of precidence: dev+con > dev only > con only. | ||
| 35 | */ | ||
| 27 | static struct clk *clk_find(const char *dev_id, const char *con_id) | 36 | static struct clk *clk_find(const char *dev_id, const char *con_id) |
| 28 | { | 37 | { |
| 29 | struct clk_lookup *p; | 38 | struct clk_lookup *p; |
| @@ -31,13 +40,17 @@ static struct clk *clk_find(const char *dev_id, const char *con_id) | |||
| 31 | int match, best = 0; | 40 | int match, best = 0; |
| 32 | 41 | ||
| 33 | list_for_each_entry(p, &clocks, node) { | 42 | list_for_each_entry(p, &clocks, node) { |
| 34 | if ((p->dev_id && !dev_id) || (p->con_id && !con_id)) | ||
| 35 | continue; | ||
| 36 | match = 0; | 43 | match = 0; |
| 37 | if (p->dev_id) | 44 | if (p->dev_id) { |
| 38 | match += 2 * (strcmp(p->dev_id, dev_id) == 0); | 45 | if (!dev_id || strcmp(p->dev_id, dev_id)) |
| 39 | if (p->con_id) | 46 | continue; |
| 40 | match += 1 * (strcmp(p->con_id, con_id) == 0); | 47 | match += 2; |
| 48 | } | ||
| 49 | if (p->con_id) { | ||
| 50 | if (!con_id || strcmp(p->con_id, con_id)) | ||
| 51 | continue; | ||
| 52 | match += 1; | ||
| 53 | } | ||
| 41 | if (match == 0) | 54 | if (match == 0) |
| 42 | continue; | 55 | continue; |
| 43 | 56 | ||
diff --git a/arch/arm/mach-davinci/usb.c b/arch/arm/mach-davinci/usb.c index fe182a85159c..c6fb32c36c52 100644 --- a/arch/arm/mach-davinci/usb.c +++ b/arch/arm/mach-davinci/usb.c | |||
| @@ -12,6 +12,7 @@ | |||
| 12 | 12 | ||
| 13 | #include <mach/common.h> | 13 | #include <mach/common.h> |
| 14 | #include <mach/hardware.h> | 14 | #include <mach/hardware.h> |
| 15 | #include <mach/irqs.h> | ||
| 15 | 16 | ||
| 16 | #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE) | 17 | #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE) |
| 17 | static struct musb_hdrc_eps_bits musb_eps[] = { | 18 | static struct musb_hdrc_eps_bits musb_eps[] = { |
diff --git a/arch/arm/mach-omap1/board-h2.c b/arch/arm/mach-omap1/board-h2.c index b240c5f861da..0d784a795092 100644 --- a/arch/arm/mach-omap1/board-h2.c +++ b/arch/arm/mach-omap1/board-h2.c | |||
| @@ -37,16 +37,14 @@ | |||
| 37 | #include <asm/mach/flash.h> | 37 | #include <asm/mach/flash.h> |
| 38 | #include <asm/mach/map.h> | 38 | #include <asm/mach/map.h> |
| 39 | 39 | ||
| 40 | #include <mach/gpio-switch.h> | ||
| 41 | #include <mach/mux.h> | 40 | #include <mach/mux.h> |
| 41 | #include <mach/dma.h> | ||
| 42 | #include <mach/tc.h> | 42 | #include <mach/tc.h> |
| 43 | #include <mach/nand.h> | 43 | #include <mach/nand.h> |
| 44 | #include <mach/irda.h> | 44 | #include <mach/irda.h> |
| 45 | #include <mach/usb.h> | 45 | #include <mach/usb.h> |
| 46 | #include <mach/keypad.h> | 46 | #include <mach/keypad.h> |
| 47 | #include <mach/common.h> | 47 | #include <mach/common.h> |
| 48 | #include <mach/mcbsp.h> | ||
| 49 | #include <mach/omap-alsa.h> | ||
| 50 | 48 | ||
| 51 | static int h2_keymap[] = { | 49 | static int h2_keymap[] = { |
| 52 | KEY(0, 0, KEY_LEFT), | 50 | KEY(0, 0, KEY_LEFT), |
| @@ -292,41 +290,6 @@ static struct platform_device h2_lcd_device = { | |||
| 292 | .id = -1, | 290 | .id = -1, |
| 293 | }; | 291 | }; |
| 294 | 292 | ||
| 295 | static struct omap_mcbsp_reg_cfg mcbsp_regs = { | ||
| 296 | .spcr2 = FREE | FRST | GRST | XRST | XINTM(3), | ||
| 297 | .spcr1 = RINTM(3) | RRST, | ||
| 298 | .rcr2 = RPHASE | RFRLEN2(OMAP_MCBSP_WORD_8) | | ||
| 299 | RWDLEN2(OMAP_MCBSP_WORD_16) | RDATDLY(1), | ||
| 300 | .rcr1 = RFRLEN1(OMAP_MCBSP_WORD_8) | RWDLEN1(OMAP_MCBSP_WORD_16), | ||
| 301 | .xcr2 = XPHASE | XFRLEN2(OMAP_MCBSP_WORD_8) | | ||
| 302 | XWDLEN2(OMAP_MCBSP_WORD_16) | XDATDLY(1) | XFIG, | ||
| 303 | .xcr1 = XFRLEN1(OMAP_MCBSP_WORD_8) | XWDLEN1(OMAP_MCBSP_WORD_16), | ||
| 304 | .srgr1 = FWID(15), | ||
| 305 | .srgr2 = GSYNC | CLKSP | FSGM | FPER(31), | ||
| 306 | |||
| 307 | .pcr0 = CLKXM | CLKRM | FSXP | FSRP | CLKXP | CLKRP, | ||
| 308 | /*.pcr0 = CLKXP | CLKRP,*/ /* mcbsp: slave */ | ||
| 309 | }; | ||
| 310 | |||
| 311 | static struct omap_alsa_codec_config alsa_config = { | ||
| 312 | .name = "H2 TSC2101", | ||
| 313 | .mcbsp_regs_alsa = &mcbsp_regs, | ||
| 314 | .codec_configure_dev = NULL, /* tsc2101_configure, */ | ||
| 315 | .codec_set_samplerate = NULL, /* tsc2101_set_samplerate, */ | ||
| 316 | .codec_clock_setup = NULL, /* tsc2101_clock_setup, */ | ||
| 317 | .codec_clock_on = NULL, /* tsc2101_clock_on, */ | ||
| 318 | .codec_clock_off = NULL, /* tsc2101_clock_off, */ | ||
| 319 | .get_default_samplerate = NULL, /* tsc2101_get_default_samplerate, */ | ||
| 320 | }; | ||
| 321 | |||
| 322 | static struct platform_device h2_mcbsp1_device = { | ||
| 323 | .name = "omap_alsa_mcbsp", | ||
| 324 | .id = 1, | ||
| 325 | .dev = { | ||
| 326 | .platform_data = &alsa_config, | ||
| 327 | }, | ||
| 328 | }; | ||
| 329 | |||
| 330 | static struct platform_device *h2_devices[] __initdata = { | 293 | static struct platform_device *h2_devices[] __initdata = { |
| 331 | &h2_nor_device, | 294 | &h2_nor_device, |
| 332 | &h2_nand_device, | 295 | &h2_nand_device, |
| @@ -334,7 +297,6 @@ static struct platform_device *h2_devices[] __initdata = { | |||
| 334 | &h2_irda_device, | 297 | &h2_irda_device, |
| 335 | &h2_kp_device, | 298 | &h2_kp_device, |
| 336 | &h2_lcd_device, | 299 | &h2_lcd_device, |
| 337 | &h2_mcbsp1_device, | ||
| 338 | }; | 300 | }; |
| 339 | 301 | ||
| 340 | static void __init h2_init_smc91x(void) | 302 | static void __init h2_init_smc91x(void) |
| @@ -409,11 +371,6 @@ static struct omap_board_config_kernel h2_config[] __initdata = { | |||
| 409 | 371 | ||
| 410 | #define H2_NAND_RB_GPIO_PIN 62 | 372 | #define H2_NAND_RB_GPIO_PIN 62 |
| 411 | 373 | ||
| 412 | static int h2_nand_dev_ready(struct omap_nand_platform_data *data) | ||
| 413 | { | ||
| 414 | return gpio_get_value(H2_NAND_RB_GPIO_PIN); | ||
| 415 | } | ||
| 416 | |||
| 417 | static void __init h2_init(void) | 374 | static void __init h2_init(void) |
| 418 | { | 375 | { |
| 419 | /* Here we assume the NOR boot config: NOR on CS3 (possibly swapped | 376 | /* Here we assume the NOR boot config: NOR on CS3 (possibly swapped |
diff --git a/arch/arm/mach-omap1/board-h3.c b/arch/arm/mach-omap1/board-h3.c index 5157eea9be35..bf08b6ad22ee 100644 --- a/arch/arm/mach-omap1/board-h3.c +++ b/arch/arm/mach-omap1/board-h3.c | |||
| @@ -49,8 +49,6 @@ | |||
| 49 | #include <mach/keypad.h> | 49 | #include <mach/keypad.h> |
| 50 | #include <mach/dma.h> | 50 | #include <mach/dma.h> |
| 51 | #include <mach/common.h> | 51 | #include <mach/common.h> |
| 52 | #include <mach/mcbsp.h> | ||
| 53 | #include <mach/omap-alsa.h> | ||
| 54 | 52 | ||
| 55 | #define H3_TS_GPIO 48 | 53 | #define H3_TS_GPIO 48 |
| 56 | 54 | ||
| @@ -387,41 +385,6 @@ static struct spi_board_info h3_spi_board_info[] __initdata = { | |||
| 387 | }, | 385 | }, |
| 388 | }; | 386 | }; |
| 389 | 387 | ||
| 390 | static struct omap_mcbsp_reg_cfg mcbsp_regs = { | ||
| 391 | .spcr2 = FREE | FRST | GRST | XRST | XINTM(3), | ||
| 392 | .spcr1 = RINTM(3) | RRST, | ||
| 393 | .rcr2 = RPHASE | RFRLEN2(OMAP_MCBSP_WORD_8) | | ||
| 394 | RWDLEN2(OMAP_MCBSP_WORD_16) | RDATDLY(1), | ||
| 395 | .rcr1 = RFRLEN1(OMAP_MCBSP_WORD_8) | RWDLEN1(OMAP_MCBSP_WORD_16), | ||
| 396 | .xcr2 = XPHASE | XFRLEN2(OMAP_MCBSP_WORD_8) | | ||
| 397 | XWDLEN2(OMAP_MCBSP_WORD_16) | XDATDLY(1) | XFIG, | ||
| 398 | .xcr1 = XFRLEN1(OMAP_MCBSP_WORD_8) | XWDLEN1(OMAP_MCBSP_WORD_16), | ||
| 399 | .srgr1 = FWID(15), | ||
| 400 | .srgr2 = GSYNC | CLKSP | FSGM | FPER(31), | ||
| 401 | |||
| 402 | .pcr0 = CLKRM | SCLKME | FSXP | FSRP | CLKXP | CLKRP, | ||
| 403 | /*.pcr0 = CLKXP | CLKRP,*/ /* mcbsp: slave */ | ||
| 404 | }; | ||
| 405 | |||
| 406 | static struct omap_alsa_codec_config alsa_config = { | ||
| 407 | .name = "H3 TSC2101", | ||
| 408 | .mcbsp_regs_alsa = &mcbsp_regs, | ||
| 409 | .codec_configure_dev = NULL, /* tsc2101_configure, */ | ||
| 410 | .codec_set_samplerate = NULL, /* tsc2101_set_samplerate, */ | ||
| 411 | .codec_clock_setup = NULL, /* tsc2101_clock_setup, */ | ||
| 412 | .codec_clock_on = NULL, /* tsc2101_clock_on, */ | ||
| 413 | .codec_clock_off = NULL, /* tsc2101_clock_off, */ | ||
| 414 | .get_default_samplerate = NULL, /* tsc2101_get_default_samplerate, */ | ||
| 415 | }; | ||
| 416 | |||
| 417 | static struct platform_device h3_mcbsp1_device = { | ||
| 418 | .name = "omap_alsa_mcbsp", | ||
| 419 | .id = 1, | ||
| 420 | .dev = { | ||
| 421 | .platform_data = &alsa_config, | ||
| 422 | }, | ||
| 423 | }; | ||
| 424 | |||
| 425 | static struct platform_device *devices[] __initdata = { | 388 | static struct platform_device *devices[] __initdata = { |
| 426 | &nor_device, | 389 | &nor_device, |
| 427 | &nand_device, | 390 | &nand_device, |
| @@ -430,7 +393,6 @@ static struct platform_device *devices[] __initdata = { | |||
| 430 | &h3_irda_device, | 393 | &h3_irda_device, |
| 431 | &h3_kp_device, | 394 | &h3_kp_device, |
| 432 | &h3_lcd_device, | 395 | &h3_lcd_device, |
| 433 | &h3_mcbsp1_device, | ||
| 434 | }; | 396 | }; |
| 435 | 397 | ||
| 436 | static struct omap_usb_config h3_usb_config __initdata = { | 398 | static struct omap_usb_config h3_usb_config __initdata = { |
| @@ -472,18 +434,6 @@ static struct i2c_board_info __initdata h3_i2c_board_info[] = { | |||
| 472 | }, | 434 | }, |
| 473 | }; | 435 | }; |
| 474 | 436 | ||
| 475 | static struct omap_gpio_switch h3_gpio_switches[] __initdata = { | ||
| 476 | { | ||
| 477 | .name = "mmc_slot", | ||
| 478 | .gpio = OMAP_MPUIO(1), | ||
| 479 | .type = OMAP_GPIO_SWITCH_TYPE_COVER, | ||
| 480 | .debounce_rising = 100, | ||
| 481 | .debounce_falling = 0, | ||
| 482 | .notify = h3_mmc_slot_cover_handler, | ||
| 483 | .notify_data = NULL, | ||
| 484 | }, | ||
| 485 | }; | ||
| 486 | |||
| 487 | #define H3_NAND_RB_GPIO_PIN 10 | 437 | #define H3_NAND_RB_GPIO_PIN 10 |
| 488 | 438 | ||
| 489 | static int nand_dev_ready(struct omap_nand_platform_data *data) | 439 | static int nand_dev_ready(struct omap_nand_platform_data *data) |
diff --git a/arch/arm/mach-omap1/board-innovator.c b/arch/arm/mach-omap1/board-innovator.c index af2fb9070083..071cd02a734e 100644 --- a/arch/arm/mach-omap1/board-innovator.c +++ b/arch/arm/mach-omap1/board-innovator.c | |||
| @@ -37,8 +37,6 @@ | |||
| 37 | #include <mach/usb.h> | 37 | #include <mach/usb.h> |
| 38 | #include <mach/keypad.h> | 38 | #include <mach/keypad.h> |
| 39 | #include <mach/common.h> | 39 | #include <mach/common.h> |
| 40 | #include <mach/mcbsp.h> | ||
| 41 | #include <mach/omap-alsa.h> | ||
| 42 | #include <mach/mmc.h> | 40 | #include <mach/mmc.h> |
| 43 | 41 | ||
| 44 | static int innovator_keymap[] = { | 42 | static int innovator_keymap[] = { |
| @@ -115,42 +113,6 @@ static struct platform_device innovator_flash_device = { | |||
| 115 | .resource = &innovator_flash_resource, | 113 | .resource = &innovator_flash_resource, |
| 116 | }; | 114 | }; |
| 117 | 115 | ||
| 118 | #define DEFAULT_BITPERSAMPLE 16 | ||
| 119 | |||
| 120 | static struct omap_mcbsp_reg_cfg mcbsp_regs = { | ||
| 121 | .spcr2 = FREE | FRST | GRST | XRST | XINTM(3), | ||
| 122 | .spcr1 = RINTM(3) | RRST, | ||
| 123 | .rcr2 = RPHASE | RFRLEN2(OMAP_MCBSP_WORD_8) | | ||
| 124 | RWDLEN2(OMAP_MCBSP_WORD_16) | RDATDLY(0), | ||
| 125 | .rcr1 = RFRLEN1(OMAP_MCBSP_WORD_8) | RWDLEN1(OMAP_MCBSP_WORD_16), | ||
| 126 | .xcr2 = XPHASE | XFRLEN2(OMAP_MCBSP_WORD_8) | | ||
| 127 | XWDLEN2(OMAP_MCBSP_WORD_16) | XDATDLY(0) | XFIG, | ||
| 128 | .xcr1 = XFRLEN1(OMAP_MCBSP_WORD_8) | XWDLEN1(OMAP_MCBSP_WORD_16), | ||
| 129 | .srgr1 = FWID(DEFAULT_BITPERSAMPLE - 1), | ||
| 130 | .srgr2 = GSYNC | CLKSP | FSGM | FPER(DEFAULT_BITPERSAMPLE * 2 - 1), | ||
| 131 | /*.pcr0 = FSXM | FSRM | CLKXM | CLKRM | CLKXP | CLKRP,*/ /* mcbsp: master */ | ||
| 132 | .pcr0 = CLKXP | CLKRP, /* mcbsp: slave */ | ||
| 133 | }; | ||
| 134 | |||
| 135 | static struct omap_alsa_codec_config alsa_config = { | ||
| 136 | .name = "OMAP Innovator AIC23", | ||
| 137 | .mcbsp_regs_alsa = &mcbsp_regs, | ||
| 138 | .codec_configure_dev = NULL, /* aic23_configure, */ | ||
| 139 | .codec_set_samplerate = NULL, /* aic23_set_samplerate, */ | ||
| 140 | .codec_clock_setup = NULL, /* aic23_clock_setup, */ | ||
| 141 | .codec_clock_on = NULL, /* aic23_clock_on, */ | ||
| 142 | .codec_clock_off = NULL, /* aic23_clock_off, */ | ||
| 143 | .get_default_samplerate = NULL, /* aic23_get_default_samplerate, */ | ||
| 144 | }; | ||
| 145 | |||
| 146 | static struct platform_device innovator_mcbsp1_device = { | ||
| 147 | .name = "omap_alsa_mcbsp", | ||
| 148 | .id = 1, | ||
| 149 | .dev = { | ||
| 150 | .platform_data = &alsa_config, | ||
| 151 | }, | ||
| 152 | }; | ||
| 153 | |||
| 154 | static struct resource innovator_kp_resources[] = { | 116 | static struct resource innovator_kp_resources[] = { |
| 155 | [0] = { | 117 | [0] = { |
| 156 | .start = INT_KEYBOARD, | 118 | .start = INT_KEYBOARD, |
| @@ -227,7 +189,6 @@ static struct platform_device innovator1510_spi_device = { | |||
| 227 | static struct platform_device *innovator1510_devices[] __initdata = { | 189 | static struct platform_device *innovator1510_devices[] __initdata = { |
| 228 | &innovator_flash_device, | 190 | &innovator_flash_device, |
| 229 | &innovator1510_smc91x_device, | 191 | &innovator1510_smc91x_device, |
| 230 | &innovator_mcbsp1_device, | ||
| 231 | &innovator_kp_device, | 192 | &innovator_kp_device, |
| 232 | &innovator1510_lcd_device, | 193 | &innovator1510_lcd_device, |
| 233 | &innovator1510_spi_device, | 194 | &innovator1510_spi_device, |
diff --git a/arch/arm/mach-omap1/board-nokia770.c b/arch/arm/mach-omap1/board-nokia770.c index 4970c402a594..af51e0b180f2 100644 --- a/arch/arm/mach-omap1/board-nokia770.c +++ b/arch/arm/mach-omap1/board-nokia770.c | |||
| @@ -32,7 +32,6 @@ | |||
| 32 | #include <mach/keypad.h> | 32 | #include <mach/keypad.h> |
| 33 | #include <mach/common.h> | 33 | #include <mach/common.h> |
| 34 | #include <mach/dsp_common.h> | 34 | #include <mach/dsp_common.h> |
| 35 | #include <mach/aic23.h> | ||
| 36 | #include <mach/omapfb.h> | 35 | #include <mach/omapfb.h> |
| 37 | #include <mach/lcd_mipid.h> | 36 | #include <mach/lcd_mipid.h> |
| 38 | #include <mach/mmc.h> | 37 | #include <mach/mmc.h> |
| @@ -261,6 +260,13 @@ static DEFINE_MUTEX(audio_pwr_lock); | |||
| 261 | */ | 260 | */ |
| 262 | static int audio_pwr_state = -1; | 261 | static int audio_pwr_state = -1; |
| 263 | 262 | ||
| 263 | static inline void aic23_power_up(void) | ||
| 264 | { | ||
| 265 | } | ||
| 266 | static inline void aic23_power_down(void) | ||
| 267 | { | ||
| 268 | } | ||
| 269 | |||
| 264 | /* | 270 | /* |
| 265 | * audio_pwr_up / down should be called under audio_pwr_lock | 271 | * audio_pwr_up / down should be called under audio_pwr_lock |
| 266 | */ | 272 | */ |
diff --git a/arch/arm/mach-omap1/board-osk.c b/arch/arm/mach-omap1/board-osk.c index ff9e67baa5c9..1a16ecb2ccc8 100644 --- a/arch/arm/mach-omap1/board-osk.c +++ b/arch/arm/mach-omap1/board-osk.c | |||
| @@ -51,8 +51,6 @@ | |||
| 51 | #include <mach/mux.h> | 51 | #include <mach/mux.h> |
| 52 | #include <mach/tc.h> | 52 | #include <mach/tc.h> |
| 53 | #include <mach/common.h> | 53 | #include <mach/common.h> |
| 54 | #include <mach/mcbsp.h> | ||
| 55 | #include <mach/omap-alsa.h> | ||
| 56 | 54 | ||
| 57 | static struct mtd_partition osk_partitions[] = { | 55 | static struct mtd_partition osk_partitions[] = { |
| 58 | /* bootloader (U-Boot, etc) in first sector */ | 56 | /* bootloader (U-Boot, etc) in first sector */ |
| @@ -141,47 +139,10 @@ static struct platform_device osk5912_cf_device = { | |||
| 141 | .resource = osk5912_cf_resources, | 139 | .resource = osk5912_cf_resources, |
| 142 | }; | 140 | }; |
| 143 | 141 | ||
| 144 | #define DEFAULT_BITPERSAMPLE 16 | ||
| 145 | |||
| 146 | static struct omap_mcbsp_reg_cfg mcbsp_regs = { | ||
| 147 | .spcr2 = FREE | FRST | GRST | XRST | XINTM(3), | ||
| 148 | .spcr1 = RINTM(3) | RRST, | ||
| 149 | .rcr2 = RPHASE | RFRLEN2(OMAP_MCBSP_WORD_8) | | ||
| 150 | RWDLEN2(OMAP_MCBSP_WORD_16) | RDATDLY(0), | ||
| 151 | .rcr1 = RFRLEN1(OMAP_MCBSP_WORD_8) | RWDLEN1(OMAP_MCBSP_WORD_16), | ||
| 152 | .xcr2 = XPHASE | XFRLEN2(OMAP_MCBSP_WORD_8) | | ||
| 153 | XWDLEN2(OMAP_MCBSP_WORD_16) | XDATDLY(0) | XFIG, | ||
| 154 | .xcr1 = XFRLEN1(OMAP_MCBSP_WORD_8) | XWDLEN1(OMAP_MCBSP_WORD_16), | ||
| 155 | .srgr1 = FWID(DEFAULT_BITPERSAMPLE - 1), | ||
| 156 | .srgr2 = GSYNC | CLKSP | FSGM | FPER(DEFAULT_BITPERSAMPLE * 2 - 1), | ||
| 157 | /*.pcr0 = FSXM | FSRM | CLKXM | CLKRM | CLKXP | CLKRP,*/ /* mcbsp: master */ | ||
| 158 | .pcr0 = CLKXP | CLKRP, /* mcbsp: slave */ | ||
| 159 | }; | ||
| 160 | |||
| 161 | static struct omap_alsa_codec_config alsa_config = { | ||
| 162 | .name = "OSK AIC23", | ||
| 163 | .mcbsp_regs_alsa = &mcbsp_regs, | ||
| 164 | .codec_configure_dev = NULL, /* aic23_configure, */ | ||
| 165 | .codec_set_samplerate = NULL, /* aic23_set_samplerate, */ | ||
| 166 | .codec_clock_setup = NULL, /* aic23_clock_setup, */ | ||
| 167 | .codec_clock_on = NULL, /* aic23_clock_on, */ | ||
| 168 | .codec_clock_off = NULL, /* aic23_clock_off, */ | ||
| 169 | .get_default_samplerate = NULL, /* aic23_get_default_samplerate, */ | ||
| 170 | }; | ||
| 171 | |||
| 172 | static struct platform_device osk5912_mcbsp1_device = { | ||
| 173 | .name = "omap_alsa_mcbsp", | ||
| 174 | .id = 1, | ||
| 175 | .dev = { | ||
| 176 | .platform_data = &alsa_config, | ||
| 177 | }, | ||
| 178 | }; | ||
| 179 | |||
| 180 | static struct platform_device *osk5912_devices[] __initdata = { | 142 | static struct platform_device *osk5912_devices[] __initdata = { |
| 181 | &osk5912_flash_device, | 143 | &osk5912_flash_device, |
| 182 | &osk5912_smc91x_device, | 144 | &osk5912_smc91x_device, |
| 183 | &osk5912_cf_device, | 145 | &osk5912_cf_device, |
| 184 | &osk5912_mcbsp1_device, | ||
| 185 | }; | 146 | }; |
| 186 | 147 | ||
| 187 | static struct gpio_led tps_leds[] = { | 148 | static struct gpio_led tps_leds[] = { |
| @@ -259,8 +220,10 @@ static struct i2c_board_info __initdata osk_i2c_board_info[] = { | |||
| 259 | .platform_data = &tps_board, | 220 | .platform_data = &tps_board, |
| 260 | 221 | ||
| 261 | }, | 222 | }, |
| 223 | { | ||
| 224 | I2C_BOARD_INFO("tlv320aic23", 0x1B), | ||
| 225 | }, | ||
| 262 | /* TODO when driver support is ready: | 226 | /* TODO when driver support is ready: |
| 263 | * - aic23 audio chip at 0x1a | ||
| 264 | * - optionally on Mistral, ov9640 camera sensor at 0x30 | 227 | * - optionally on Mistral, ov9640 camera sensor at 0x30 |
| 265 | */ | 228 | */ |
| 266 | }; | 229 | }; |
diff --git a/arch/arm/mach-omap1/board-palmte.c b/arch/arm/mach-omap1/board-palmte.c index 75e32d35afd9..99f2b43f2541 100644 --- a/arch/arm/mach-omap1/board-palmte.c +++ b/arch/arm/mach-omap1/board-palmte.c | |||
| @@ -42,8 +42,6 @@ | |||
| 42 | #include <mach/irda.h> | 42 | #include <mach/irda.h> |
| 43 | #include <mach/keypad.h> | 43 | #include <mach/keypad.h> |
| 44 | #include <mach/common.h> | 44 | #include <mach/common.h> |
| 45 | #include <mach/mcbsp.h> | ||
| 46 | #include <mach/omap-alsa.h> | ||
| 47 | 45 | ||
| 48 | static void __init omap_palmte_init_irq(void) | 46 | static void __init omap_palmte_init_irq(void) |
| 49 | { | 47 | { |
| @@ -195,15 +193,6 @@ static struct omap_usb_config palmte_usb_config __initdata = { | |||
| 195 | .pins[0] = 2, | 193 | .pins[0] = 2, |
| 196 | }; | 194 | }; |
| 197 | 195 | ||
| 198 | static struct omap_mmc_config palmte_mmc_config __initdata = { | ||
| 199 | .mmc[0] = { | ||
| 200 | .enabled = 1, | ||
| 201 | .wp_pin = PALMTE_MMC_WP_GPIO, | ||
| 202 | .power_pin = PALMTE_MMC_POWER_GPIO, | ||
| 203 | .switch_pin = PALMTE_MMC_SWITCH_GPIO, | ||
| 204 | }, | ||
| 205 | }; | ||
| 206 | |||
| 207 | static struct omap_lcd_config palmte_lcd_config __initdata = { | 196 | static struct omap_lcd_config palmte_lcd_config __initdata = { |
| 208 | .ctrl_name = "internal", | 197 | .ctrl_name = "internal", |
| 209 | }; | 198 | }; |
| @@ -212,24 +201,6 @@ static struct omap_uart_config palmte_uart_config __initdata = { | |||
| 212 | .enabled_uarts = (1 << 0) | (1 << 1) | (0 << 2), | 201 | .enabled_uarts = (1 << 0) | (1 << 1) | (0 << 2), |
| 213 | }; | 202 | }; |
| 214 | 203 | ||
| 215 | static struct omap_mcbsp_reg_cfg palmte_mcbsp1_regs = { | ||
| 216 | .spcr2 = FRST | GRST | XRST | XINTM(3), | ||
| 217 | .xcr2 = XDATDLY(1) | XFIG, | ||
| 218 | .xcr1 = XWDLEN1(OMAP_MCBSP_WORD_32), | ||
| 219 | .pcr0 = SCLKME | FSXP | CLKXP, | ||
| 220 | }; | ||
| 221 | |||
| 222 | static struct omap_alsa_codec_config palmte_alsa_config = { | ||
| 223 | .name = "TSC2102 audio", | ||
| 224 | .mcbsp_regs_alsa = &palmte_mcbsp1_regs, | ||
| 225 | .codec_configure_dev = NULL, /* tsc2102_configure, */ | ||
| 226 | .codec_set_samplerate = NULL, /* tsc2102_set_samplerate, */ | ||
| 227 | .codec_clock_setup = NULL, /* tsc2102_clock_setup, */ | ||
| 228 | .codec_clock_on = NULL, /* tsc2102_clock_on, */ | ||
| 229 | .codec_clock_off = NULL, /* tsc2102_clock_off, */ | ||
| 230 | .get_default_samplerate = NULL, /* tsc2102_get_default_samplerate, */ | ||
| 231 | }; | ||
| 232 | |||
| 233 | #ifdef CONFIG_APM | 204 | #ifdef CONFIG_APM |
| 234 | /* | 205 | /* |
| 235 | * Values measured in 10 minute intervals averaged over 10 samples. | 206 | * Values measured in 10 minute intervals averaged over 10 samples. |
diff --git a/arch/arm/mach-omap1/board-palmtt.c b/arch/arm/mach-omap1/board-palmtt.c index 5c001afe8062..1cbc1275c95f 100644 --- a/arch/arm/mach-omap1/board-palmtt.c +++ b/arch/arm/mach-omap1/board-palmtt.c | |||
| @@ -30,7 +30,6 @@ | |||
| 30 | #include <asm/mach/flash.h> | 30 | #include <asm/mach/flash.h> |
| 31 | 31 | ||
| 32 | #include <mach/led.h> | 32 | #include <mach/led.h> |
| 33 | #include <mach/mcbsp.h> | ||
| 34 | #include <mach/gpio.h> | 33 | #include <mach/gpio.h> |
| 35 | #include <mach/mux.h> | 34 | #include <mach/mux.h> |
| 36 | #include <mach/usb.h> | 35 | #include <mach/usb.h> |
| @@ -40,7 +39,6 @@ | |||
| 40 | #include <mach/irda.h> | 39 | #include <mach/irda.h> |
| 41 | #include <mach/keypad.h> | 40 | #include <mach/keypad.h> |
| 42 | #include <mach/common.h> | 41 | #include <mach/common.h> |
| 43 | #include <mach/omap-alsa.h> | ||
| 44 | 42 | ||
| 45 | #include <linux/spi/spi.h> | 43 | #include <linux/spi/spi.h> |
| 46 | #include <linux/spi/ads7846.h> | 44 | #include <linux/spi/ads7846.h> |
| @@ -122,44 +120,6 @@ static struct platform_device palmtt_flash_device = { | |||
| 122 | .resource = &palmtt_flash_resource, | 120 | .resource = &palmtt_flash_resource, |
| 123 | }; | 121 | }; |
| 124 | 122 | ||
| 125 | #define DEFAULT_BITPERSAMPLE 16 | ||
| 126 | |||
| 127 | static struct omap_mcbsp_reg_cfg mcbsp_regs = { | ||
| 128 | .spcr2 = FREE | FRST | GRST | XRST | XINTM(3), | ||
| 129 | .spcr1 = RINTM(3) | RRST, | ||
| 130 | .rcr2 = RPHASE | RFRLEN2(OMAP_MCBSP_WORD_8) | | ||
| 131 | RWDLEN2(OMAP_MCBSP_WORD_16) | RDATDLY(0), | ||
| 132 | .rcr1 = RFRLEN1(OMAP_MCBSP_WORD_8) | | ||
| 133 | RWDLEN1(OMAP_MCBSP_WORD_16), | ||
| 134 | .xcr2 = XPHASE | XFRLEN2(OMAP_MCBSP_WORD_8) | | ||
| 135 | XWDLEN2(OMAP_MCBSP_WORD_16) | XDATDLY(0) | XFIG, | ||
| 136 | .xcr1 = XFRLEN1(OMAP_MCBSP_WORD_8) | | ||
| 137 | XWDLEN1(OMAP_MCBSP_WORD_16), | ||
| 138 | .srgr1 = FWID(DEFAULT_BITPERSAMPLE - 1), | ||
| 139 | .srgr2 = GSYNC | CLKSP | FSGM | | ||
| 140 | FPER(DEFAULT_BITPERSAMPLE * 2 - 1), | ||
| 141 | .pcr0 = CLKXP | CLKRP, /* mcbsp: slave */ | ||
| 142 | }; | ||
| 143 | |||
| 144 | static struct omap_alsa_codec_config alsa_config = { | ||
| 145 | .name = "PalmTT AIC23", | ||
| 146 | .mcbsp_regs_alsa = &mcbsp_regs, | ||
| 147 | .codec_configure_dev = NULL, /* aic23_configure, */ | ||
| 148 | .codec_set_samplerate = NULL, /* aic23_set_samplerate, */ | ||
| 149 | .codec_clock_setup = NULL, /* aic23_clock_setup, */ | ||
| 150 | .codec_clock_on = NULL, /* aic23_clock_on, */ | ||
| 151 | .codec_clock_off = NULL, /* aic23_clock_off, */ | ||
| 152 | .get_default_samplerate = NULL, /* aic23_get_default_samplerate, */ | ||
| 153 | }; | ||
| 154 | |||
| 155 | static struct platform_device palmtt_mcbsp1_device = { | ||
| 156 | .name = "omap_alsa_mcbsp", | ||
| 157 | .id = 1, | ||
| 158 | .dev = { | ||
| 159 | .platform_data = &alsa_config, | ||
| 160 | }, | ||
| 161 | }; | ||
| 162 | |||
| 163 | static struct resource palmtt_kp_resources[] = { | 123 | static struct resource palmtt_kp_resources[] = { |
| 164 | [0] = { | 124 | [0] = { |
| 165 | .start = INT_KEYBOARD, | 125 | .start = INT_KEYBOARD, |
| @@ -257,7 +217,6 @@ static struct platform_device palmtt_led_device = { | |||
| 257 | 217 | ||
| 258 | static struct platform_device *palmtt_devices[] __initdata = { | 218 | static struct platform_device *palmtt_devices[] __initdata = { |
| 259 | &palmtt_flash_device, | 219 | &palmtt_flash_device, |
| 260 | &palmtt_mcbsp1_device, | ||
| 261 | &palmtt_kp_device, | 220 | &palmtt_kp_device, |
| 262 | &palmtt_lcd_device, | 221 | &palmtt_lcd_device, |
| 263 | &palmtt_irda_device, | 222 | &palmtt_irda_device, |
diff --git a/arch/arm/mach-omap1/board-palmz71.c b/arch/arm/mach-omap1/board-palmz71.c index cc05257eb1cd..baf5efbfe3e8 100644 --- a/arch/arm/mach-omap1/board-palmz71.c +++ b/arch/arm/mach-omap1/board-palmz71.c | |||
| @@ -32,7 +32,6 @@ | |||
| 32 | #include <asm/mach/map.h> | 32 | #include <asm/mach/map.h> |
| 33 | #include <asm/mach/flash.h> | 33 | #include <asm/mach/flash.h> |
| 34 | 34 | ||
| 35 | #include <mach/mcbsp.h> | ||
| 36 | #include <mach/gpio.h> | 35 | #include <mach/gpio.h> |
| 37 | #include <mach/mux.h> | 36 | #include <mach/mux.h> |
| 38 | #include <mach/usb.h> | 37 | #include <mach/usb.h> |
| @@ -179,41 +178,6 @@ static struct platform_device palmz71_spi_device = { | |||
| 179 | .id = -1, | 178 | .id = -1, |
| 180 | }; | 179 | }; |
| 181 | 180 | ||
| 182 | #define DEFAULT_BITPERSAMPLE 16 | ||
| 183 | |||
| 184 | static struct omap_mcbsp_reg_cfg mcbsp_regs = { | ||
| 185 | .spcr2 = FREE | FRST | GRST | XRST | XINTM(3), | ||
| 186 | .spcr1 = RINTM(3) | RRST, | ||
| 187 | .rcr2 = RPHASE | RFRLEN2(OMAP_MCBSP_WORD_8) | | ||
| 188 | RWDLEN2(OMAP_MCBSP_WORD_16) | RDATDLY(0), | ||
| 189 | .rcr1 = RFRLEN1(OMAP_MCBSP_WORD_8) | RWDLEN1(OMAP_MCBSP_WORD_16), | ||
| 190 | .xcr2 = XPHASE | XFRLEN2(OMAP_MCBSP_WORD_8) | | ||
| 191 | XWDLEN2(OMAP_MCBSP_WORD_16) | XDATDLY(0) | XFIG, | ||
| 192 | .xcr1 = XFRLEN1(OMAP_MCBSP_WORD_8) | XWDLEN1(OMAP_MCBSP_WORD_16), | ||
| 193 | .srgr1 = FWID(DEFAULT_BITPERSAMPLE - 1), | ||
| 194 | .srgr2 = GSYNC | CLKSP | FSGM | FPER(DEFAULT_BITPERSAMPLE * 2 - 1), | ||
| 195 | .pcr0 = CLKXP | CLKRP, /* mcbsp: slave */ | ||
| 196 | }; | ||
| 197 | |||
| 198 | static struct omap_alsa_codec_config alsa_config = { | ||
| 199 | .name = "PalmZ71 AIC23", | ||
| 200 | .mcbsp_regs_alsa = &mcbsp_regs, | ||
| 201 | .codec_configure_dev = NULL, /* aic23_configure */ | ||
| 202 | .codec_set_samplerate = NULL, /* aic23_set_samplerate */ | ||
| 203 | .codec_clock_setup = NULL, /* aic23_clock_setup */ | ||
| 204 | .codec_clock_on = NULL, /* aic23_clock_on */ | ||
| 205 | .codec_clock_off = NULL, /* aic23_clock_off */ | ||
| 206 | .get_default_samplerate = NULL, /* aic23_get_default_samplerate */ | ||
| 207 | }; | ||
| 208 | |||
| 209 | static struct platform_device palmz71_mcbsp1_device = { | ||
| 210 | .name = "omap_alsa_mcbsp", | ||
| 211 | .id = 1, | ||
| 212 | .dev = { | ||
| 213 | .platform_data = &alsa_config, | ||
| 214 | }, | ||
| 215 | }; | ||
| 216 | |||
| 217 | static struct omap_backlight_config palmz71_backlight_config = { | 181 | static struct omap_backlight_config palmz71_backlight_config = { |
| 218 | .default_intensity = 0xa0, | 182 | .default_intensity = 0xa0, |
| 219 | }; | 183 | }; |
| @@ -229,7 +193,6 @@ static struct platform_device palmz71_backlight_device = { | |||
| 229 | static struct platform_device *devices[] __initdata = { | 193 | static struct platform_device *devices[] __initdata = { |
| 230 | &palmz71_rom_device, | 194 | &palmz71_rom_device, |
| 231 | &palmz71_kp_device, | 195 | &palmz71_kp_device, |
| 232 | &palmz71_mcbsp1_device, | ||
| 233 | &palmz71_lcd_device, | 196 | &palmz71_lcd_device, |
| 234 | &palmz71_irda_device, | 197 | &palmz71_irda_device, |
| 235 | &palmz71_spi_device, | 198 | &palmz71_spi_device, |
diff --git a/arch/arm/mach-omap1/board-sx1.c b/arch/arm/mach-omap1/board-sx1.c index 8171fe0ca082..28c76a1e71c0 100644 --- a/arch/arm/mach-omap1/board-sx1.c +++ b/arch/arm/mach-omap1/board-sx1.c | |||
| @@ -34,13 +34,12 @@ | |||
| 34 | 34 | ||
| 35 | #include <mach/gpio.h> | 35 | #include <mach/gpio.h> |
| 36 | #include <mach/mux.h> | 36 | #include <mach/mux.h> |
| 37 | #include <mach/dma.h> | ||
| 37 | #include <mach/irda.h> | 38 | #include <mach/irda.h> |
| 38 | #include <mach/usb.h> | 39 | #include <mach/usb.h> |
| 39 | #include <mach/tc.h> | 40 | #include <mach/tc.h> |
| 40 | #include <mach/board.h> | 41 | #include <mach/board.h> |
| 41 | #include <mach/common.h> | 42 | #include <mach/common.h> |
| 42 | #include <mach/mcbsp.h> | ||
| 43 | #include <mach/omap-alsa.h> | ||
| 44 | #include <mach/keypad.h> | 43 | #include <mach/keypad.h> |
| 45 | 44 | ||
| 46 | /* Write to I2C device */ | 45 | /* Write to I2C device */ |
| @@ -254,35 +253,6 @@ static struct platform_device sx1_irda_device = { | |||
| 254 | .resource = sx1_irda_resources, | 253 | .resource = sx1_irda_resources, |
| 255 | }; | 254 | }; |
| 256 | 255 | ||
| 257 | /*----------- McBSP & Sound -------------------------*/ | ||
| 258 | |||
| 259 | /* Playback interface - McBSP1 */ | ||
| 260 | static struct omap_mcbsp_reg_cfg mcbsp1_regs = { | ||
| 261 | .spcr2 = XINTM(3), /* SPCR2=30 */ | ||
| 262 | .spcr1 = RINTM(3), /* SPCR1=30 */ | ||
| 263 | .rcr2 = 0, /* RCR2 =00 */ | ||
| 264 | .rcr1 = RFRLEN1(1) | RWDLEN1(OMAP_MCBSP_WORD_16), /* RCR1=140 */ | ||
| 265 | .xcr2 = 0, /* XCR2 = 0 */ | ||
| 266 | .xcr1 = XFRLEN1(1) | XWDLEN1(OMAP_MCBSP_WORD_16), /* XCR1 = 140 */ | ||
| 267 | .srgr1 = FWID(15) | CLKGDV(12), /* SRGR1=0f0c */ | ||
| 268 | .srgr2 = FSGM | FPER(31), /* SRGR2=101f */ | ||
| 269 | .pcr0 = FSXM | FSRM | CLKXM | CLKRM | FSXP | FSRP | CLKXP | CLKRP, | ||
| 270 | /* PCR0 =0f0f */ | ||
| 271 | }; | ||
| 272 | |||
| 273 | static struct omap_alsa_codec_config sx1_alsa_config = { | ||
| 274 | .name = "SX1 EGold", | ||
| 275 | .mcbsp_regs_alsa = &mcbsp1_regs, | ||
| 276 | }; | ||
| 277 | |||
| 278 | static struct platform_device sx1_mcbsp1_device = { | ||
| 279 | .name = "omap_alsa_mcbsp", | ||
| 280 | .id = 1, | ||
| 281 | .dev = { | ||
| 282 | .platform_data = &sx1_alsa_config, | ||
| 283 | }, | ||
| 284 | }; | ||
| 285 | |||
| 286 | /*----------- MTD -------------------------*/ | 256 | /*----------- MTD -------------------------*/ |
| 287 | 257 | ||
| 288 | static struct mtd_partition sx1_partitions[] = { | 258 | static struct mtd_partition sx1_partitions[] = { |
| @@ -394,7 +364,6 @@ static struct platform_device *sx1_devices[] __initdata = { | |||
| 394 | &sx1_flash_device, | 364 | &sx1_flash_device, |
| 395 | &sx1_kp_device, | 365 | &sx1_kp_device, |
| 396 | &sx1_lcd_device, | 366 | &sx1_lcd_device, |
| 397 | &sx1_mcbsp1_device, | ||
| 398 | &sx1_irda_device, | 367 | &sx1_irda_device, |
| 399 | }; | 368 | }; |
| 400 | /*-----------------------------------------*/ | 369 | /*-----------------------------------------*/ |
| @@ -423,9 +392,9 @@ static void __init omap_sx1_init(void) | |||
| 423 | 392 | ||
| 424 | /* turn on USB power */ | 393 | /* turn on USB power */ |
| 425 | /* sx1_setusbpower(1); cant do it here because i2c is not ready */ | 394 | /* sx1_setusbpower(1); cant do it here because i2c is not ready */ |
| 426 | omap_request_gpio(1); /* A_IRDA_OFF */ | 395 | gpio_request(1, "A_IRDA_OFF"); |
| 427 | omap_request_gpio(11); /* A_SWITCH */ | 396 | gpio_request(11, "A_SWITCH"); |
| 428 | omap_request_gpio(15); /* A_USB_ON */ | 397 | gpio_request(15, "A_USB_ON"); |
| 429 | gpio_direction_output(1, 1); /*A_IRDA_OFF = 1 */ | 398 | gpio_direction_output(1, 1); /*A_IRDA_OFF = 1 */ |
| 430 | gpio_direction_output(11, 0); /*A_SWITCH = 0 */ | 399 | gpio_direction_output(11, 0); /*A_SWITCH = 0 */ |
| 431 | gpio_direction_output(15, 0); /*A_USB_ON = 0 */ | 400 | gpio_direction_output(15, 0); /*A_USB_ON = 0 */ |
diff --git a/arch/arm/mach-omap1/board-voiceblue.c b/arch/arm/mach-omap1/board-voiceblue.c index c224f3c64235..a7653542a2b0 100644 --- a/arch/arm/mach-omap1/board-voiceblue.c +++ b/arch/arm/mach-omap1/board-voiceblue.c | |||
| @@ -22,7 +22,6 @@ | |||
| 22 | #include <linux/reboot.h> | 22 | #include <linux/reboot.h> |
| 23 | #include <linux/serial_8250.h> | 23 | #include <linux/serial_8250.h> |
| 24 | #include <linux/serial_reg.h> | 24 | #include <linux/serial_reg.h> |
| 25 | #include <linux/irq.h> | ||
| 26 | 25 | ||
| 27 | #include <mach/hardware.h> | 26 | #include <mach/hardware.h> |
| 28 | #include <asm/mach-types.h> | 27 | #include <asm/mach-types.h> |
diff --git a/arch/arm/mach-omap1/mcbsp.c b/arch/arm/mach-omap1/mcbsp.c index 4474da7bc88a..ca7a0cc1707c 100644 --- a/arch/arm/mach-omap1/mcbsp.c +++ b/arch/arm/mach-omap1/mcbsp.c | |||
| @@ -17,6 +17,7 @@ | |||
| 17 | #include <linux/io.h> | 17 | #include <linux/io.h> |
| 18 | #include <linux/platform_device.h> | 18 | #include <linux/platform_device.h> |
| 19 | 19 | ||
| 20 | #include <mach/irqs.h> | ||
| 20 | #include <mach/dma.h> | 21 | #include <mach/dma.h> |
| 21 | #include <mach/irqs.h> | 22 | #include <mach/irqs.h> |
| 22 | #include <mach/mux.h> | 23 | #include <mach/mux.h> |
diff --git a/arch/arm/mach-omap2/board-apollon.c b/arch/arm/mach-omap2/board-apollon.c index bf1e5d32c2a3..0a7b24ba1652 100644 --- a/arch/arm/mach-omap2/board-apollon.c +++ b/arch/arm/mach-omap2/board-apollon.c | |||
| @@ -22,8 +22,6 @@ | |||
| 22 | #include <linux/mtd/mtd.h> | 22 | #include <linux/mtd/mtd.h> |
| 23 | #include <linux/mtd/partitions.h> | 23 | #include <linux/mtd/partitions.h> |
| 24 | #include <linux/mtd/onenand.h> | 24 | #include <linux/mtd/onenand.h> |
| 25 | #include <linux/irq.h> | ||
| 26 | #include <linux/interrupt.h> | ||
| 27 | #include <linux/delay.h> | 25 | #include <linux/delay.h> |
| 28 | #include <linux/leds.h> | 26 | #include <linux/leds.h> |
| 29 | #include <linux/err.h> | 27 | #include <linux/err.h> |
| @@ -282,65 +280,16 @@ static void __init apollon_led_init(void) | |||
| 282 | { | 280 | { |
| 283 | /* LED0 - AA10 */ | 281 | /* LED0 - AA10 */ |
| 284 | omap_cfg_reg(AA10_242X_GPIO13); | 282 | omap_cfg_reg(AA10_242X_GPIO13); |
| 285 | omap_request_gpio(LED0_GPIO13); | 283 | gpio_request(LED0_GPIO13, "LED0"); |
| 286 | omap_set_gpio_direction(LED0_GPIO13, 0); | 284 | gpio_direction_output(LED0_GPIO13, 0); |
| 287 | omap_set_gpio_dataout(LED0_GPIO13, 0); | ||
| 288 | /* LED1 - AA6 */ | 285 | /* LED1 - AA6 */ |
| 289 | omap_cfg_reg(AA6_242X_GPIO14); | 286 | omap_cfg_reg(AA6_242X_GPIO14); |
| 290 | omap_request_gpio(LED1_GPIO14); | 287 | gpio_request(LED1_GPIO14, "LED1"); |
| 291 | omap_set_gpio_direction(LED1_GPIO14, 0); | 288 | gpio_direction_output(LED1_GPIO14, 0); |
| 292 | omap_set_gpio_dataout(LED1_GPIO14, 0); | ||
| 293 | /* LED2 - AA4 */ | 289 | /* LED2 - AA4 */ |
| 294 | omap_cfg_reg(AA4_242X_GPIO15); | 290 | omap_cfg_reg(AA4_242X_GPIO15); |
| 295 | omap_request_gpio(LED2_GPIO15); | 291 | gpio_request(LED2_GPIO15, "LED2"); |
| 296 | omap_set_gpio_direction(LED2_GPIO15, 0); | 292 | gpio_direction_output(LED2_GPIO15, 0); |
| 297 | omap_set_gpio_dataout(LED2_GPIO15, 0); | ||
| 298 | } | ||
| 299 | |||
| 300 | static irqreturn_t apollon_sw_interrupt(int irq, void *ignored) | ||
| 301 | { | ||
| 302 | static unsigned int led0, led1, led2; | ||
| 303 | |||
| 304 | if (irq == OMAP_GPIO_IRQ(SW_ENTER_GPIO16)) | ||
| 305 | omap_set_gpio_dataout(LED0_GPIO13, led0 ^= 1); | ||
| 306 | else if (irq == OMAP_GPIO_IRQ(SW_UP_GPIO17)) | ||
| 307 | omap_set_gpio_dataout(LED1_GPIO14, led1 ^= 1); | ||
| 308 | else if (irq == OMAP_GPIO_IRQ(SW_DOWN_GPIO58)) | ||
| 309 | omap_set_gpio_dataout(LED2_GPIO15, led2 ^= 1); | ||
| 310 | |||
| 311 | return IRQ_HANDLED; | ||
| 312 | } | ||
| 313 | |||
| 314 | static void __init apollon_sw_init(void) | ||
| 315 | { | ||
| 316 | /* Enter SW - Y11 */ | ||
| 317 | omap_cfg_reg(Y11_242X_GPIO16); | ||
| 318 | omap_request_gpio(SW_ENTER_GPIO16); | ||
| 319 | gpio_direction_input(SW_ENTER_GPIO16); | ||
| 320 | /* Up SW - AA12 */ | ||
| 321 | omap_cfg_reg(AA12_242X_GPIO17); | ||
| 322 | omap_request_gpio(SW_UP_GPIO17); | ||
| 323 | gpio_direction_input(SW_UP_GPIO17); | ||
| 324 | /* Down SW - AA8 */ | ||
| 325 | omap_cfg_reg(AA8_242X_GPIO58); | ||
| 326 | omap_request_gpio(SW_DOWN_GPIO58); | ||
| 327 | gpio_direction_input(SW_DOWN_GPIO58); | ||
| 328 | |||
| 329 | set_irq_type(OMAP_GPIO_IRQ(SW_ENTER_GPIO16), IRQ_TYPE_EDGE_RISING); | ||
| 330 | if (request_irq(OMAP_GPIO_IRQ(SW_ENTER_GPIO16), &apollon_sw_interrupt, | ||
| 331 | IRQF_SHARED, "enter sw", | ||
| 332 | &apollon_sw_interrupt)) | ||
| 333 | return; | ||
| 334 | set_irq_type(OMAP_GPIO_IRQ(SW_UP_GPIO17), IRQ_TYPE_EDGE_RISING); | ||
| 335 | if (request_irq(OMAP_GPIO_IRQ(SW_UP_GPIO17), &apollon_sw_interrupt, | ||
| 336 | IRQF_SHARED, "up sw", | ||
| 337 | &apollon_sw_interrupt)) | ||
| 338 | return; | ||
| 339 | set_irq_type(OMAP_GPIO_IRQ(SW_DOWN_GPIO58), IRQ_TYPE_EDGE_RISING); | ||
| 340 | if (request_irq(OMAP_GPIO_IRQ(SW_DOWN_GPIO58), &apollon_sw_interrupt, | ||
| 341 | IRQF_SHARED, "down sw", | ||
| 342 | &apollon_sw_interrupt)) | ||
| 343 | return; | ||
| 344 | } | 293 | } |
| 345 | 294 | ||
| 346 | static void __init apollon_usb_init(void) | 295 | static void __init apollon_usb_init(void) |
| @@ -357,7 +306,6 @@ static void __init omap_apollon_init(void) | |||
| 357 | u32 v; | 306 | u32 v; |
| 358 | 307 | ||
| 359 | apollon_led_init(); | 308 | apollon_led_init(); |
| 360 | apollon_sw_init(); | ||
| 361 | apollon_flash_init(); | 309 | apollon_flash_init(); |
| 362 | apollon_usb_init(); | 310 | apollon_usb_init(); |
| 363 | 311 | ||
diff --git a/arch/arm/mach-omap2/board-ldp.c b/arch/arm/mach-omap2/board-ldp.c index aa6972781e4a..f6a13451d1fd 100644 --- a/arch/arm/mach-omap2/board-ldp.c +++ b/arch/arm/mach-omap2/board-ldp.c | |||
| @@ -88,7 +88,7 @@ static inline void __init ldp_init_smc911x(void) | |||
| 88 | 88 | ||
| 89 | ldp_smc911x_resources[1].start = OMAP_GPIO_IRQ(eth_gpio); | 89 | ldp_smc911x_resources[1].start = OMAP_GPIO_IRQ(eth_gpio); |
| 90 | 90 | ||
| 91 | if (omap_request_gpio(eth_gpio) < 0) { | 91 | if (gpio_request(eth_gpio, "smc911x irq") < 0) { |
| 92 | printk(KERN_ERR "Failed to request GPIO%d for smc911x IRQ\n", | 92 | printk(KERN_ERR "Failed to request GPIO%d for smc911x IRQ\n", |
| 93 | eth_gpio); | 93 | eth_gpio); |
| 94 | return; | 94 | return; |
diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c index 9e5ada01b5fa..38c88fbe658d 100644 --- a/arch/arm/mach-omap2/board-omap3beagle.c +++ b/arch/arm/mach-omap2/board-omap3beagle.c | |||
| @@ -28,6 +28,8 @@ | |||
| 28 | #include <linux/mtd/partitions.h> | 28 | #include <linux/mtd/partitions.h> |
| 29 | #include <linux/mtd/nand.h> | 29 | #include <linux/mtd/nand.h> |
| 30 | 30 | ||
| 31 | #include <linux/i2c/twl4030.h> | ||
| 32 | |||
| 31 | #include <mach/hardware.h> | 33 | #include <mach/hardware.h> |
| 32 | #include <asm/mach-types.h> | 34 | #include <asm/mach-types.h> |
| 33 | #include <asm/mach/arch.h> | 35 | #include <asm/mach/arch.h> |
| @@ -120,6 +122,9 @@ static int beagle_twl_gpio_setup(struct device *dev, | |||
| 120 | unsigned gpio, unsigned ngpio) | 122 | unsigned gpio, unsigned ngpio) |
| 121 | { | 123 | { |
| 122 | /* gpio + 0 is "mmc0_cd" (input/IRQ) */ | 124 | /* gpio + 0 is "mmc0_cd" (input/IRQ) */ |
| 125 | omap_cfg_reg(AH8_34XX_GPIO29); | ||
| 126 | mmc[0].gpio_cd = gpio + 0; | ||
| 127 | twl4030_mmc_init(mmc); | ||
| 123 | 128 | ||
| 124 | /* REVISIT: need ehci-omap hooks for external VBUS | 129 | /* REVISIT: need ehci-omap hooks for external VBUS |
| 125 | * power switch and overcurrent detect | 130 | * power switch and overcurrent detect |
| @@ -304,10 +309,6 @@ static void __init omap3_beagle_init(void) | |||
| 304 | omap_board_config_size = ARRAY_SIZE(omap3_beagle_config); | 309 | omap_board_config_size = ARRAY_SIZE(omap3_beagle_config); |
| 305 | omap_serial_init(); | 310 | omap_serial_init(); |
| 306 | 311 | ||
| 307 | omap_cfg_reg(AH8_34XX_GPIO29); | ||
| 308 | mmc[0].gpio_cd = gpio + 0; | ||
| 309 | twl4030_mmc_init(mmc); | ||
| 310 | |||
| 311 | omap_cfg_reg(J25_34XX_GPIO170); | 312 | omap_cfg_reg(J25_34XX_GPIO170); |
| 312 | gpio_request(170, "DVI_nPD"); | 313 | gpio_request(170, "DVI_nPD"); |
| 313 | /* REVISIT leave DVI powered down until it's needed ... */ | 314 | /* REVISIT leave DVI powered down until it's needed ... */ |
diff --git a/arch/arm/mach-omap2/mcbsp.c b/arch/arm/mach-omap2/mcbsp.c index acdc709901cd..e20023c9d15d 100644 --- a/arch/arm/mach-omap2/mcbsp.c +++ b/arch/arm/mach-omap2/mcbsp.c | |||
| @@ -17,6 +17,7 @@ | |||
| 17 | #include <linux/io.h> | 17 | #include <linux/io.h> |
| 18 | #include <linux/platform_device.h> | 18 | #include <linux/platform_device.h> |
| 19 | 19 | ||
| 20 | #include <mach/irqs.h> | ||
| 20 | #include <mach/dma.h> | 21 | #include <mach/dma.h> |
| 21 | #include <mach/irqs.h> | 22 | #include <mach/irqs.h> |
| 22 | #include <mach/mux.h> | 23 | #include <mach/mux.h> |
diff --git a/arch/arm/mm/copypage-v4mc.c b/arch/arm/mm/copypage-v4mc.c index bdb5fd983b15..1601698b9800 100644 --- a/arch/arm/mm/copypage-v4mc.c +++ b/arch/arm/mm/copypage-v4mc.c | |||
| @@ -68,7 +68,7 @@ mc_copy_user_page(void *from, void *to) | |||
| 68 | : "r" (from), "r" (to), "I" (PAGE_SIZE / 64)); | 68 | : "r" (from), "r" (to), "I" (PAGE_SIZE / 64)); |
| 69 | } | 69 | } |
| 70 | 70 | ||
| 71 | void v4_mc_copy_user_highpage(struct page *from, struct page *to, | 71 | void v4_mc_copy_user_highpage(struct page *to, struct page *from, |
| 72 | unsigned long vaddr) | 72 | unsigned long vaddr) |
| 73 | { | 73 | { |
| 74 | void *kto = kmap_atomic(to, KM_USER1); | 74 | void *kto = kmap_atomic(to, KM_USER1); |
diff --git a/arch/arm/mm/ioremap.c b/arch/arm/mm/ioremap.c index 18373f73f2fc..9f88dd3be601 100644 --- a/arch/arm/mm/ioremap.c +++ b/arch/arm/mm/ioremap.c | |||
| @@ -138,7 +138,7 @@ void __check_kvm_seq(struct mm_struct *mm) | |||
| 138 | */ | 138 | */ |
| 139 | static void unmap_area_sections(unsigned long virt, unsigned long size) | 139 | static void unmap_area_sections(unsigned long virt, unsigned long size) |
| 140 | { | 140 | { |
| 141 | unsigned long addr = virt, end = virt + (size & ~SZ_1M); | 141 | unsigned long addr = virt, end = virt + (size & ~(SZ_1M - 1)); |
| 142 | pgd_t *pgd; | 142 | pgd_t *pgd; |
| 143 | 143 | ||
| 144 | flush_cache_vunmap(addr, end); | 144 | flush_cache_vunmap(addr, end); |
| @@ -337,10 +337,7 @@ void __iounmap(volatile void __iomem *io_addr) | |||
| 337 | void *addr = (void *)(PAGE_MASK & (unsigned long)io_addr); | 337 | void *addr = (void *)(PAGE_MASK & (unsigned long)io_addr); |
| 338 | #ifndef CONFIG_SMP | 338 | #ifndef CONFIG_SMP |
| 339 | struct vm_struct **p, *tmp; | 339 | struct vm_struct **p, *tmp; |
| 340 | #endif | ||
| 341 | unsigned int section_mapping = 0; | ||
| 342 | 340 | ||
| 343 | #ifndef CONFIG_SMP | ||
| 344 | /* | 341 | /* |
| 345 | * If this is a section based mapping we need to handle it | 342 | * If this is a section based mapping we need to handle it |
| 346 | * specially as the VM subsystem does not know how to handle | 343 | * specially as the VM subsystem does not know how to handle |
| @@ -352,11 +349,8 @@ void __iounmap(volatile void __iomem *io_addr) | |||
| 352 | for (p = &vmlist ; (tmp = *p) ; p = &tmp->next) { | 349 | for (p = &vmlist ; (tmp = *p) ; p = &tmp->next) { |
| 353 | if ((tmp->flags & VM_IOREMAP) && (tmp->addr == addr)) { | 350 | if ((tmp->flags & VM_IOREMAP) && (tmp->addr == addr)) { |
| 354 | if (tmp->flags & VM_ARM_SECTION_MAPPING) { | 351 | if (tmp->flags & VM_ARM_SECTION_MAPPING) { |
| 355 | *p = tmp->next; | ||
| 356 | unmap_area_sections((unsigned long)tmp->addr, | 352 | unmap_area_sections((unsigned long)tmp->addr, |
| 357 | tmp->size); | 353 | tmp->size); |
| 358 | kfree(tmp); | ||
| 359 | section_mapping = 1; | ||
| 360 | } | 354 | } |
| 361 | break; | 355 | break; |
| 362 | } | 356 | } |
| @@ -364,7 +358,6 @@ void __iounmap(volatile void __iomem *io_addr) | |||
| 364 | write_unlock(&vmlist_lock); | 358 | write_unlock(&vmlist_lock); |
| 365 | #endif | 359 | #endif |
| 366 | 360 | ||
| 367 | if (!section_mapping) | 361 | vunmap(addr); |
| 368 | vunmap(addr); | ||
| 369 | } | 362 | } |
| 370 | EXPORT_SYMBOL(__iounmap); | 363 | EXPORT_SYMBOL(__iounmap); |
diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c index 692d2b495af3..e77373c39f8c 100644 --- a/arch/arm/plat-omap/dma.c +++ b/arch/arm/plat-omap/dma.c | |||
| @@ -278,14 +278,11 @@ void omap_set_dma_transfer_params(int lch, int data_type, int elem_count, | |||
| 278 | u32 val; | 278 | u32 val; |
| 279 | 279 | ||
| 280 | val = dma_read(CCR(lch)); | 280 | val = dma_read(CCR(lch)); |
| 281 | val &= ~(3 << 19); | 281 | |
| 282 | if (dma_trigger > 63) | 282 | /* DMA_SYNCHRO_CONTROL_UPPER depends on the channel number */ |
| 283 | val |= 1 << 20; | 283 | val &= ~((3 << 19) | 0x1f); |
| 284 | if (dma_trigger > 31) | 284 | val |= (dma_trigger & ~0x1f) << 14; |
| 285 | val |= 1 << 19; | 285 | val |= dma_trigger & 0x1f; |
| 286 | |||
| 287 | val &= ~(0x1f); | ||
| 288 | val |= (dma_trigger & 0x1f); | ||
| 289 | 286 | ||
| 290 | if (sync_mode & OMAP_DMA_SYNC_FRAME) | 287 | if (sync_mode & OMAP_DMA_SYNC_FRAME) |
| 291 | val |= 1 << 5; | 288 | val |= 1 << 5; |
diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c index 07b6968a7d16..f856a90b264e 100644 --- a/arch/arm/plat-omap/gpio.c +++ b/arch/arm/plat-omap/gpio.c | |||
| @@ -1789,6 +1789,8 @@ static int dbg_gpio_show(struct seq_file *s, void *unused) | |||
| 1789 | /* FIXME for at least omap2, show pullup/pulldown state */ | 1789 | /* FIXME for at least omap2, show pullup/pulldown state */ |
| 1790 | 1790 | ||
| 1791 | irqstat = irq_desc[irq].status; | 1791 | irqstat = irq_desc[irq].status; |
| 1792 | #if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP24XX) || \ | ||
| 1793 | defined(CONFIG_ARCH_OMAP34XX) | ||
| 1792 | if (is_in && ((bank->suspend_wakeup & mask) | 1794 | if (is_in && ((bank->suspend_wakeup & mask) |
| 1793 | || irqstat & IRQ_TYPE_SENSE_MASK)) { | 1795 | || irqstat & IRQ_TYPE_SENSE_MASK)) { |
| 1794 | char *trigger = NULL; | 1796 | char *trigger = NULL; |
| @@ -1818,6 +1820,7 @@ static int dbg_gpio_show(struct seq_file *s, void *unused) | |||
| 1818 | (bank->suspend_wakeup & mask) | 1820 | (bank->suspend_wakeup & mask) |
| 1819 | ? " wakeup" : ""); | 1821 | ? " wakeup" : ""); |
| 1820 | } | 1822 | } |
| 1823 | #endif | ||
| 1821 | seq_printf(s, "\n"); | 1824 | seq_printf(s, "\n"); |
| 1822 | } | 1825 | } |
| 1823 | 1826 | ||
diff --git a/arch/arm/plat-omap/include/mach/aic23.h b/arch/arm/plat-omap/include/mach/aic23.h deleted file mode 100644 index 5ccedac77526..000000000000 --- a/arch/arm/plat-omap/include/mach/aic23.h +++ /dev/null | |||
| @@ -1,116 +0,0 @@ | |||
| 1 | /* | ||
| 2 | * arch/arm/plat-omap/include/mach/aic23.h | ||
| 3 | * | ||
| 4 | * Hardware definitions for TI TLV320AIC23 audio codec | ||
| 5 | * | ||
| 6 | * Copyright (C) 2002 RidgeRun, Inc. | ||
| 7 | * Author: Steve Johnson | ||
| 8 | * | ||
| 9 | * This program is free software; you can redistribute it and/or modify it | ||
| 10 | * under the terms of the GNU General Public License as published by the | ||
| 11 | * Free Software Foundation; either version 2 of the License, or (at your | ||
| 12 | * option) any later version. | ||
| 13 | * | ||
| 14 | * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED | ||
| 15 | * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF | ||
| 16 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN | ||
| 17 | * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, | ||
| 18 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT | ||
| 19 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF | ||
| 20 | * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON | ||
| 21 | * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT | ||
| 22 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF | ||
| 23 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | ||
| 24 | * | ||
| 25 | * You should have received a copy of the GNU General Public License along | ||
| 26 | * with this program; if not, write to the Free Software Foundation, Inc., | ||
| 27 | * 675 Mass Ave, Cambridge, MA 02139, USA. | ||
| 28 | */ | ||
| 29 | |||
| 30 | #ifndef __ASM_ARCH_AIC23_H | ||
| 31 | #define __ASM_ARCH_AIC23_H | ||
| 32 | |||
| 33 | // Codec TLV320AIC23 | ||
| 34 | #define LEFT_LINE_VOLUME_ADDR 0x00 | ||
| 35 | #define RIGHT_LINE_VOLUME_ADDR 0x01 | ||
| 36 | #define LEFT_CHANNEL_VOLUME_ADDR 0x02 | ||
| 37 | #define RIGHT_CHANNEL_VOLUME_ADDR 0x03 | ||
| 38 | #define ANALOG_AUDIO_CONTROL_ADDR 0x04 | ||
| 39 | #define DIGITAL_AUDIO_CONTROL_ADDR 0x05 | ||
| 40 | #define POWER_DOWN_CONTROL_ADDR 0x06 | ||
| 41 | #define DIGITAL_AUDIO_FORMAT_ADDR 0x07 | ||
| 42 | #define SAMPLE_RATE_CONTROL_ADDR 0x08 | ||
| 43 | #define DIGITAL_INTERFACE_ACT_ADDR 0x09 | ||
| 44 | #define RESET_CONTROL_ADDR 0x0F | ||
| 45 | |||
| 46 | // Left (right) line input volume control register | ||
| 47 | #define LRS_ENABLED 0x0100 | ||
| 48 | #define LIM_MUTED 0x0080 | ||
| 49 | #define LIV_DEFAULT 0x0017 | ||
| 50 | #define LIV_MAX 0x001f | ||
| 51 | #define LIV_MIN 0x0000 | ||
| 52 | |||
| 53 | // Left (right) channel headphone volume control register | ||
| 54 | #define LZC_ON 0x0080 | ||
| 55 | #define LHV_DEFAULT 0x0079 | ||
| 56 | #define LHV_MAX 0x007f | ||
| 57 | #define LHV_MIN 0x0000 | ||
| 58 | |||
| 59 | // Analog audio path control register | ||
| 60 | #define STA_REG(x) ((x)<<6) | ||
| 61 | #define STE_ENABLED 0x0020 | ||
| 62 | #define DAC_SELECTED 0x0010 | ||
| 63 | #define BYPASS_ON 0x0008 | ||
| 64 | #define INSEL_MIC 0x0004 | ||
| 65 | #define MICM_MUTED 0x0002 | ||
| 66 | #define MICB_20DB 0x0001 | ||
| 67 | |||
| 68 | // Digital audio path control register | ||
| 69 | #define DACM_MUTE 0x0008 | ||
| 70 | #define DEEMP_32K 0x0002 | ||
| 71 | #define DEEMP_44K 0x0004 | ||
| 72 | #define DEEMP_48K 0x0006 | ||
| 73 | #define ADCHP_ON 0x0001 | ||
| 74 | |||
| 75 | // Power control down register | ||
| 76 | #define DEVICE_POWER_OFF 0x0080 | ||
| 77 | #define CLK_OFF 0x0040 | ||
| 78 | #define OSC_OFF 0x0020 | ||
| 79 | #define OUT_OFF 0x0010 | ||
| 80 | #define DAC_OFF 0x0008 | ||
| 81 | #define ADC_OFF 0x0004 | ||
| 82 | #define MIC_OFF 0x0002 | ||
| 83 | #define LINE_OFF 0x0001 | ||
| 84 | |||
| 85 | // Digital audio interface register | ||
| 86 | #define MS_MASTER 0x0040 | ||
| 87 | #define LRSWAP_ON 0x0020 | ||
| 88 | #define LRP_ON 0x0010 | ||
| 89 | #define IWL_16 0x0000 | ||
| 90 | #define IWL_20 0x0004 | ||
| 91 | #define IWL_24 0x0008 | ||
| 92 | #define IWL_32 0x000C | ||
| 93 | #define FOR_I2S 0x0002 | ||
| 94 | #define FOR_DSP 0x0003 | ||
| 95 | |||
| 96 | // Sample rate control register | ||
| 97 | #define CLKOUT_HALF 0x0080 | ||
| 98 | #define CLKIN_HALF 0x0040 | ||
| 99 | #define BOSR_384fs 0x0002 // BOSR_272fs when in USB mode | ||
| 100 | #define USB_CLK_ON 0x0001 | ||
| 101 | #define SR_MASK 0xf | ||
| 102 | #define CLKOUT_SHIFT 7 | ||
| 103 | #define CLKIN_SHIFT 6 | ||
| 104 | #define SR_SHIFT 2 | ||
| 105 | #define BOSR_SHIFT 1 | ||
| 106 | |||
| 107 | // Digital interface register | ||
| 108 | #define ACT_ON 0x0001 | ||
| 109 | |||
| 110 | #define TLV320AIC23ID1 (0x1a) // cs low | ||
| 111 | #define TLV320AIC23ID2 (0x1b) // cs high | ||
| 112 | |||
| 113 | void aic23_power_up(void); | ||
| 114 | void aic23_power_down(void); | ||
| 115 | |||
| 116 | #endif /* __ASM_ARCH_AIC23_H */ | ||
diff --git a/arch/arm/plat-omap/include/mach/board-h3.h b/arch/arm/plat-omap/include/mach/board-h3.h index 14909dc7858a..1888326da7ea 100644 --- a/arch/arm/plat-omap/include/mach/board-h3.h +++ b/arch/arm/plat-omap/include/mach/board-h3.h | |||
| @@ -30,7 +30,9 @@ | |||
| 30 | /* In OMAP1710 H3 the Ethernet is directly connected to CS1 */ | 30 | /* In OMAP1710 H3 the Ethernet is directly connected to CS1 */ |
| 31 | #define OMAP1710_ETHR_START 0x04000300 | 31 | #define OMAP1710_ETHR_START 0x04000300 |
| 32 | 32 | ||
| 33 | #define H3_TPS_GPIO_BASE (OMAP_MAX_GPIO_LINES + 16 /* MPUIO */) | ||
| 34 | # define H3_TPS_GPIO_MMC_PWR_EN (H3_TPS_GPIO_BASE + 4) | ||
| 35 | |||
| 33 | extern void h3_mmc_init(void); | 36 | extern void h3_mmc_init(void); |
| 34 | extern void h3_mmc_slot_cover_handler(void *arg, int state); | ||
| 35 | 37 | ||
| 36 | #endif /* __ASM_ARCH_OMAP_H3_H */ | 38 | #endif /* __ASM_ARCH_OMAP_H3_H */ |
diff --git a/arch/arm/plat-omap/include/mach/gpio.h b/arch/arm/plat-omap/include/mach/gpio.h index 04e68e88f134..8d9dfe314387 100644 --- a/arch/arm/plat-omap/include/mach/gpio.h +++ b/arch/arm/plat-omap/include/mach/gpio.h | |||
| @@ -87,16 +87,6 @@ extern void omap_set_gpio_debounce_time(int gpio, int enable); | |||
| 87 | #include <linux/errno.h> | 87 | #include <linux/errno.h> |
| 88 | #include <asm-generic/gpio.h> | 88 | #include <asm-generic/gpio.h> |
| 89 | 89 | ||
| 90 | static inline int omap_request_gpio(int gpio) | ||
| 91 | { | ||
| 92 | return gpio_request(gpio, "FIXME"); | ||
| 93 | } | ||
| 94 | |||
| 95 | static inline void omap_free_gpio(int gpio) | ||
| 96 | { | ||
| 97 | gpio_free(gpio); | ||
| 98 | } | ||
| 99 | |||
| 100 | static inline int gpio_get_value(unsigned gpio) | 90 | static inline int gpio_get_value(unsigned gpio) |
| 101 | { | 91 | { |
| 102 | return __gpio_get_value(gpio); | 92 | return __gpio_get_value(gpio); |
diff --git a/arch/arm/plat-omap/include/mach/mcbsp.h b/arch/arm/plat-omap/include/mach/mcbsp.h index 6a0d1a0a24a7..eef873db3d48 100644 --- a/arch/arm/plat-omap/include/mach/mcbsp.h +++ b/arch/arm/plat-omap/include/mach/mcbsp.h | |||
| @@ -87,6 +87,10 @@ | |||
| 87 | #define OMAP_MCBSP_REG_XCERG 0x3A | 87 | #define OMAP_MCBSP_REG_XCERG 0x3A |
| 88 | #define OMAP_MCBSP_REG_XCERH 0x3C | 88 | #define OMAP_MCBSP_REG_XCERH 0x3C |
| 89 | 89 | ||
| 90 | /* Dummy defines, these are not available on omap1 */ | ||
| 91 | #define OMAP_MCBSP_REG_XCCR 0x00 | ||
| 92 | #define OMAP_MCBSP_REG_RCCR 0x00 | ||
| 93 | |||
| 90 | #define AUDIO_MCBSP_DATAWRITE (OMAP1510_MCBSP1_BASE + OMAP_MCBSP_REG_DXR1) | 94 | #define AUDIO_MCBSP_DATAWRITE (OMAP1510_MCBSP1_BASE + OMAP_MCBSP_REG_DXR1) |
| 91 | #define AUDIO_MCBSP_DATAREAD (OMAP1510_MCBSP1_BASE + OMAP_MCBSP_REG_DRR1) | 95 | #define AUDIO_MCBSP_DATAREAD (OMAP1510_MCBSP1_BASE + OMAP_MCBSP_REG_DRR1) |
| 92 | 96 | ||
| @@ -231,11 +235,16 @@ | |||
| 231 | #define XPBBLK(value) ((value)<<7) /* Bits 7:8 */ | 235 | #define XPBBLK(value) ((value)<<7) /* Bits 7:8 */ |
| 232 | 236 | ||
| 233 | /*********************** McBSP XCCR bit definitions *************************/ | 237 | /*********************** McBSP XCCR bit definitions *************************/ |
| 238 | #define EXTCLKGATE 0x8000 | ||
| 239 | #define PPCONNECT 0x4000 | ||
| 240 | #define DXENDLY(value) ((value)<<12) /* Bits 12:13 */ | ||
| 241 | #define XFULL_CYCLE 0x0800 | ||
| 234 | #define DILB 0x0020 | 242 | #define DILB 0x0020 |
| 235 | #define XDMAEN 0x0008 | 243 | #define XDMAEN 0x0008 |
| 236 | #define XDISABLE 0x0001 | 244 | #define XDISABLE 0x0001 |
| 237 | 245 | ||
| 238 | /********************** McBSP RCCR bit definitions *************************/ | 246 | /********************** McBSP RCCR bit definitions *************************/ |
| 247 | #define RFULL_CYCLE 0x0800 | ||
| 239 | #define RDMAEN 0x0008 | 248 | #define RDMAEN 0x0008 |
| 240 | #define RDISABLE 0x0001 | 249 | #define RDISABLE 0x0001 |
| 241 | 250 | ||
| @@ -267,6 +276,8 @@ struct omap_mcbsp_reg_cfg { | |||
| 267 | u16 rcerh; | 276 | u16 rcerh; |
| 268 | u16 xcerg; | 277 | u16 xcerg; |
| 269 | u16 xcerh; | 278 | u16 xcerh; |
| 279 | u16 xccr; | ||
| 280 | u16 rccr; | ||
| 270 | }; | 281 | }; |
| 271 | 282 | ||
| 272 | typedef enum { | 283 | typedef enum { |
diff --git a/arch/arm/plat-omap/mcbsp.c b/arch/arm/plat-omap/mcbsp.c index af33fc713e1a..f2401a831f99 100644 --- a/arch/arm/plat-omap/mcbsp.c +++ b/arch/arm/plat-omap/mcbsp.c | |||
| @@ -173,6 +173,10 @@ void omap_mcbsp_config(unsigned int id, const struct omap_mcbsp_reg_cfg *config) | |||
| 173 | OMAP_MCBSP_WRITE(io_base, MCR2, config->mcr2); | 173 | OMAP_MCBSP_WRITE(io_base, MCR2, config->mcr2); |
| 174 | OMAP_MCBSP_WRITE(io_base, MCR1, config->mcr1); | 174 | OMAP_MCBSP_WRITE(io_base, MCR1, config->mcr1); |
| 175 | OMAP_MCBSP_WRITE(io_base, PCR0, config->pcr0); | 175 | OMAP_MCBSP_WRITE(io_base, PCR0, config->pcr0); |
| 176 | if (cpu_is_omap2430() || cpu_is_omap34xx()) { | ||
| 177 | OMAP_MCBSP_WRITE(io_base, XCCR, config->xccr); | ||
| 178 | OMAP_MCBSP_WRITE(io_base, RCCR, config->rccr); | ||
| 179 | } | ||
| 176 | } | 180 | } |
| 177 | EXPORT_SYMBOL(omap_mcbsp_config); | 181 | EXPORT_SYMBOL(omap_mcbsp_config); |
| 178 | 182 | ||
diff --git a/arch/arm/plat-omap/usb.c b/arch/arm/plat-omap/usb.c index add0485703b5..e278de6862ae 100644 --- a/arch/arm/plat-omap/usb.c +++ b/arch/arm/plat-omap/usb.c | |||
| @@ -431,15 +431,6 @@ bad: | |||
| 431 | 431 | ||
| 432 | /*-------------------------------------------------------------------------*/ | 432 | /*-------------------------------------------------------------------------*/ |
| 433 | 433 | ||
| 434 | #if defined(CONFIG_USB_GADGET_OMAP) || \ | ||
| 435 | defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) || \ | ||
| 436 | (defined(CONFIG_USB_OTG) && defined(CONFIG_ARCH_OMAP_OTG)) | ||
| 437 | static void usb_release(struct device *dev) | ||
| 438 | { | ||
| 439 | /* normally not freed */ | ||
| 440 | } | ||
| 441 | #endif | ||
| 442 | |||
| 443 | #ifdef CONFIG_USB_GADGET_OMAP | 434 | #ifdef CONFIG_USB_GADGET_OMAP |
| 444 | 435 | ||
| 445 | static struct resource udc_resources[] = { | 436 | static struct resource udc_resources[] = { |
| @@ -466,7 +457,6 @@ static struct platform_device udc_device = { | |||
| 466 | .name = "omap_udc", | 457 | .name = "omap_udc", |
| 467 | .id = -1, | 458 | .id = -1, |
| 468 | .dev = { | 459 | .dev = { |
| 469 | .release = usb_release, | ||
| 470 | .dma_mask = &udc_dmamask, | 460 | .dma_mask = &udc_dmamask, |
| 471 | .coherent_dma_mask = 0xffffffff, | 461 | .coherent_dma_mask = 0xffffffff, |
| 472 | }, | 462 | }, |
| @@ -497,7 +487,6 @@ static struct platform_device ohci_device = { | |||
| 497 | .name = "ohci", | 487 | .name = "ohci", |
| 498 | .id = -1, | 488 | .id = -1, |
| 499 | .dev = { | 489 | .dev = { |
| 500 | .release = usb_release, | ||
| 501 | .dma_mask = &ohci_dmamask, | 490 | .dma_mask = &ohci_dmamask, |
| 502 | .coherent_dma_mask = 0xffffffff, | 491 | .coherent_dma_mask = 0xffffffff, |
| 503 | }, | 492 | }, |
| @@ -524,9 +513,6 @@ static struct resource otg_resources[] = { | |||
| 524 | static struct platform_device otg_device = { | 513 | static struct platform_device otg_device = { |
| 525 | .name = "omap_otg", | 514 | .name = "omap_otg", |
| 526 | .id = -1, | 515 | .id = -1, |
| 527 | .dev = { | ||
| 528 | .release = usb_release, | ||
| 529 | }, | ||
| 530 | .num_resources = ARRAY_SIZE(otg_resources), | 516 | .num_resources = ARRAY_SIZE(otg_resources), |
| 531 | .resource = otg_resources, | 517 | .resource = otg_resources, |
| 532 | }; | 518 | }; |
diff --git a/drivers/char/hw_random/omap-rng.c b/drivers/char/hw_random/omap-rng.c index d4e7dca06e4f..ba68a4671cb5 100644 --- a/drivers/char/hw_random/omap-rng.c +++ b/drivers/char/hw_random/omap-rng.c | |||
| @@ -102,7 +102,7 @@ static int __init omap_rng_probe(struct platform_device *pdev) | |||
| 102 | return -EBUSY; | 102 | return -EBUSY; |
| 103 | 103 | ||
| 104 | if (cpu_is_omap24xx()) { | 104 | if (cpu_is_omap24xx()) { |
| 105 | rng_ick = clk_get(NULL, "rng_ick"); | 105 | rng_ick = clk_get(&pdev->dev, "rng_ick"); |
| 106 | if (IS_ERR(rng_ick)) { | 106 | if (IS_ERR(rng_ick)) { |
| 107 | dev_err(&pdev->dev, "Could not get rng_ick\n"); | 107 | dev_err(&pdev->dev, "Could not get rng_ick\n"); |
| 108 | ret = PTR_ERR(rng_ick); | 108 | ret = PTR_ERR(rng_ick); |
diff --git a/drivers/mmc/host/Kconfig b/drivers/mmc/host/Kconfig index dfa585f7feaf..0efa390978bd 100644 --- a/drivers/mmc/host/Kconfig +++ b/drivers/mmc/host/Kconfig | |||
| @@ -76,6 +76,16 @@ config MMC_OMAP | |||
| 76 | 76 | ||
| 77 | If unsure, say N. | 77 | If unsure, say N. |
| 78 | 78 | ||
| 79 | config MMC_OMAP_HS | ||
| 80 | tristate "TI OMAP High Speed Multimedia Card Interface support" | ||
| 81 | depends on ARCH_OMAP2430 || ARCH_OMAP3 | ||
| 82 | help | ||
| 83 | This selects the TI OMAP High Speed Multimedia card Interface. | ||
| 84 | If you have an OMAP2430 or OMAP3 board with a Multimedia Card slot, | ||
| 85 | say Y or M here. | ||
| 86 | |||
| 87 | If unsure, say N. | ||
| 88 | |||
| 79 | config MMC_WBSD | 89 | config MMC_WBSD |
| 80 | tristate "Winbond W83L51xD SD/MMC Card Interface support" | 90 | tristate "Winbond W83L51xD SD/MMC Card Interface support" |
| 81 | depends on ISA_DMA_API | 91 | depends on ISA_DMA_API |
diff --git a/drivers/mmc/host/Makefile b/drivers/mmc/host/Makefile index f4853288bbb1..98cab84829b8 100644 --- a/drivers/mmc/host/Makefile +++ b/drivers/mmc/host/Makefile | |||
| @@ -15,6 +15,7 @@ obj-$(CONFIG_MMC_RICOH_MMC) += ricoh_mmc.o | |||
| 15 | obj-$(CONFIG_MMC_WBSD) += wbsd.o | 15 | obj-$(CONFIG_MMC_WBSD) += wbsd.o |
| 16 | obj-$(CONFIG_MMC_AU1X) += au1xmmc.o | 16 | obj-$(CONFIG_MMC_AU1X) += au1xmmc.o |
| 17 | obj-$(CONFIG_MMC_OMAP) += omap.o | 17 | obj-$(CONFIG_MMC_OMAP) += omap.o |
| 18 | obj-$(CONFIG_MMC_OMAP_HS) += omap_hsmmc.o | ||
| 18 | obj-$(CONFIG_MMC_AT91) += at91_mci.o | 19 | obj-$(CONFIG_MMC_AT91) += at91_mci.o |
| 19 | obj-$(CONFIG_MMC_ATMELMCI) += atmel-mci.o | 20 | obj-$(CONFIG_MMC_ATMELMCI) += atmel-mci.o |
| 20 | obj-$(CONFIG_MMC_TIFM_SD) += tifm_sd.o | 21 | obj-$(CONFIG_MMC_TIFM_SD) += tifm_sd.o |
diff --git a/drivers/mmc/host/omap_hsmmc.c b/drivers/mmc/host/omap_hsmmc.c new file mode 100644 index 000000000000..db37490f67ec --- /dev/null +++ b/drivers/mmc/host/omap_hsmmc.c | |||
| @@ -0,0 +1,1242 @@ | |||
| 1 | /* | ||
| 2 | * drivers/mmc/host/omap_hsmmc.c | ||
| 3 | * | ||
| 4 | * Driver for OMAP2430/3430 MMC controller. | ||
| 5 | * | ||
| 6 | * Copyright (C) 2007 Texas Instruments. | ||
| 7 | * | ||
| 8 | * Authors: | ||
| 9 | * Syed Mohammed Khasim <x0khasim@ti.com> | ||
| 10 | * Madhusudhan <madhu.cr@ti.com> | ||
| 11 | * Mohit Jalori <mjalori@ti.com> | ||
| 12 | * | ||
| 13 | * This file is licensed under the terms of the GNU General Public License | ||
| 14 | * version 2. This program is licensed "as is" without any warranty of any | ||
| 15 | * kind, whether express or implied. | ||
| 16 | */ | ||
| 17 | |||
| 18 | #include <linux/module.h> | ||
| 19 | #include <linux/init.h> | ||
| 20 | #include <linux/interrupt.h> | ||
| 21 | #include <linux/delay.h> | ||
| 22 | #include <linux/dma-mapping.h> | ||
| 23 | #include <linux/platform_device.h> | ||
| 24 | #include <linux/workqueue.h> | ||
| 25 | #include <linux/timer.h> | ||
| 26 | #include <linux/clk.h> | ||
| 27 | #include <linux/mmc/host.h> | ||
| 28 | #include <linux/io.h> | ||
| 29 | #include <linux/semaphore.h> | ||
| 30 | #include <mach/dma.h> | ||
| 31 | #include <mach/hardware.h> | ||
| 32 | #include <mach/board.h> | ||
| 33 | #include <mach/mmc.h> | ||
| 34 | #include <mach/cpu.h> | ||
| 35 | |||
| 36 | /* OMAP HSMMC Host Controller Registers */ | ||
| 37 | #define OMAP_HSMMC_SYSCONFIG 0x0010 | ||
| 38 | #define OMAP_HSMMC_CON 0x002C | ||
| 39 | #define OMAP_HSMMC_BLK 0x0104 | ||
| 40 | #define OMAP_HSMMC_ARG 0x0108 | ||
| 41 | #define OMAP_HSMMC_CMD 0x010C | ||
| 42 | #define OMAP_HSMMC_RSP10 0x0110 | ||
| 43 | #define OMAP_HSMMC_RSP32 0x0114 | ||
| 44 | #define OMAP_HSMMC_RSP54 0x0118 | ||
| 45 | #define OMAP_HSMMC_RSP76 0x011C | ||
| 46 | #define OMAP_HSMMC_DATA 0x0120 | ||
| 47 | #define OMAP_HSMMC_HCTL 0x0128 | ||
| 48 | #define OMAP_HSMMC_SYSCTL 0x012C | ||
| 49 | #define OMAP_HSMMC_STAT 0x0130 | ||
| 50 | #define OMAP_HSMMC_IE 0x0134 | ||
| 51 | #define OMAP_HSMMC_ISE 0x0138 | ||
| 52 | #define OMAP_HSMMC_CAPA 0x0140 | ||
| 53 | |||
| 54 | #define VS18 (1 << 26) | ||
| 55 | #define VS30 (1 << 25) | ||
| 56 | #define SDVS18 (0x5 << 9) | ||
| 57 | #define SDVS30 (0x6 << 9) | ||
| 58 | #define SDVSCLR 0xFFFFF1FF | ||
| 59 | #define SDVSDET 0x00000400 | ||
| 60 | #define AUTOIDLE 0x1 | ||
| 61 | #define SDBP (1 << 8) | ||
| 62 | #define DTO 0xe | ||
| 63 | #define ICE 0x1 | ||
| 64 | #define ICS 0x2 | ||
| 65 | #define CEN (1 << 2) | ||
| 66 | #define CLKD_MASK 0x0000FFC0 | ||
| 67 | #define CLKD_SHIFT 6 | ||
| 68 | #define DTO_MASK 0x000F0000 | ||
| 69 | #define DTO_SHIFT 16 | ||
| 70 | #define INT_EN_MASK 0x307F0033 | ||
| 71 | #define INIT_STREAM (1 << 1) | ||
| 72 | #define DP_SELECT (1 << 21) | ||
| 73 | #define DDIR (1 << 4) | ||
| 74 | #define DMA_EN 0x1 | ||
| 75 | #define MSBS (1 << 5) | ||
| 76 | #define BCE (1 << 1) | ||
| 77 | #define FOUR_BIT (1 << 1) | ||
| 78 | #define CC 0x1 | ||
| 79 | #define TC 0x02 | ||
| 80 | #define OD 0x1 | ||
| 81 | #define ERR (1 << 15) | ||
| 82 | #define CMD_TIMEOUT (1 << 16) | ||
| 83 | #define DATA_TIMEOUT (1 << 20) | ||
| 84 | #define CMD_CRC (1 << 17) | ||
| 85 | #define DATA_CRC (1 << 21) | ||
| 86 | #define CARD_ERR (1 << 28) | ||
| 87 | #define STAT_CLEAR 0xFFFFFFFF | ||
| 88 | #define INIT_STREAM_CMD 0x00000000 | ||
| 89 | #define DUAL_VOLT_OCR_BIT 7 | ||
| 90 | #define SRC (1 << 25) | ||
| 91 | #define SRD (1 << 26) | ||
| 92 | |||
| 93 | /* | ||
| 94 | * FIXME: Most likely all the data using these _DEVID defines should come | ||
| 95 | * from the platform_data, or implemented in controller and slot specific | ||
| 96 | * functions. | ||
| 97 | */ | ||
| 98 | #define OMAP_MMC1_DEVID 0 | ||
| 99 | #define OMAP_MMC2_DEVID 1 | ||
| 100 | |||
| 101 | #define OMAP_MMC_DATADIR_NONE 0 | ||
| 102 | #define OMAP_MMC_DATADIR_READ 1 | ||
| 103 | #define OMAP_MMC_DATADIR_WRITE 2 | ||
| 104 | #define MMC_TIMEOUT_MS 20 | ||
| 105 | #define OMAP_MMC_MASTER_CLOCK 96000000 | ||
| 106 | #define DRIVER_NAME "mmci-omap-hs" | ||
| 107 | |||
| 108 | /* | ||
| 109 | * One controller can have multiple slots, like on some omap boards using | ||
| 110 | * omap.c controller driver. Luckily this is not currently done on any known | ||
| 111 | * omap_hsmmc.c device. | ||
| 112 | */ | ||
| 113 | #define mmc_slot(host) (host->pdata->slots[host->slot_id]) | ||
| 114 | |||
| 115 | /* | ||
| 116 | * MMC Host controller read/write API's | ||
| 117 | */ | ||
| 118 | #define OMAP_HSMMC_READ(base, reg) \ | ||
| 119 | __raw_readl((base) + OMAP_HSMMC_##reg) | ||
| 120 | |||
| 121 | #define OMAP_HSMMC_WRITE(base, reg, val) \ | ||
| 122 | __raw_writel((val), (base) + OMAP_HSMMC_##reg) | ||
| 123 | |||
| 124 | struct mmc_omap_host { | ||
| 125 | struct device *dev; | ||
| 126 | struct mmc_host *mmc; | ||
| 127 | struct mmc_request *mrq; | ||
| 128 | struct mmc_command *cmd; | ||
| 129 | struct mmc_data *data; | ||
| 130 | struct clk *fclk; | ||
| 131 | struct clk *iclk; | ||
| 132 | struct clk *dbclk; | ||
| 133 | struct semaphore sem; | ||
| 134 | struct work_struct mmc_carddetect_work; | ||
| 135 | void __iomem *base; | ||
| 136 | resource_size_t mapbase; | ||
| 137 | unsigned int id; | ||
| 138 | unsigned int dma_len; | ||
| 139 | unsigned int dma_dir; | ||
| 140 | unsigned char bus_mode; | ||
| 141 | unsigned char datadir; | ||
| 142 | u32 *buffer; | ||
| 143 | u32 bytesleft; | ||
| 144 | int suspended; | ||
| 145 | int irq; | ||
| 146 | int carddetect; | ||
| 147 | int use_dma, dma_ch; | ||
| 148 | int initstr; | ||
| 149 | int slot_id; | ||
| 150 | int dbclk_enabled; | ||
| 151 | struct omap_mmc_platform_data *pdata; | ||
| 152 | }; | ||
| 153 | |||
| 154 | /* | ||
| 155 | * Stop clock to the card | ||
| 156 | */ | ||
| 157 | static void omap_mmc_stop_clock(struct mmc_omap_host *host) | ||
| 158 | { | ||
| 159 | OMAP_HSMMC_WRITE(host->base, SYSCTL, | ||
| 160 | OMAP_HSMMC_READ(host->base, SYSCTL) & ~CEN); | ||
| 161 | if ((OMAP_HSMMC_READ(host->base, SYSCTL) & CEN) != 0x0) | ||
| 162 | dev_dbg(mmc_dev(host->mmc), "MMC Clock is not stoped\n"); | ||
| 163 | } | ||
| 164 | |||
| 165 | /* | ||
| 166 | * Send init stream sequence to card | ||
| 167 | * before sending IDLE command | ||
| 168 | */ | ||
| 169 | static void send_init_stream(struct mmc_omap_host *host) | ||
| 170 | { | ||
| 171 | int reg = 0; | ||
| 172 | unsigned long timeout; | ||
| 173 | |||
| 174 | disable_irq(host->irq); | ||
| 175 | OMAP_HSMMC_WRITE(host->base, CON, | ||
| 176 | OMAP_HSMMC_READ(host->base, CON) | INIT_STREAM); | ||
| 177 | OMAP_HSMMC_WRITE(host->base, CMD, INIT_STREAM_CMD); | ||
| 178 | |||
| 179 | timeout = jiffies + msecs_to_jiffies(MMC_TIMEOUT_MS); | ||
| 180 | while ((reg != CC) && time_before(jiffies, timeout)) | ||
| 181 | reg = OMAP_HSMMC_READ(host->base, STAT) & CC; | ||
| 182 | |||
| 183 | OMAP_HSMMC_WRITE(host->base, CON, | ||
| 184 | OMAP_HSMMC_READ(host->base, CON) & ~INIT_STREAM); | ||
| 185 | enable_irq(host->irq); | ||
| 186 | } | ||
| 187 | |||
| 188 | static inline | ||
| 189 | int mmc_omap_cover_is_closed(struct mmc_omap_host *host) | ||
| 190 | { | ||
| 191 | int r = 1; | ||
| 192 | |||
| 193 | if (host->pdata->slots[host->slot_id].get_cover_state) | ||
| 194 | r = host->pdata->slots[host->slot_id].get_cover_state(host->dev, | ||
| 195 | host->slot_id); | ||
| 196 | return r; | ||
| 197 | } | ||
| 198 | |||
| 199 | static ssize_t | ||
| 200 | mmc_omap_show_cover_switch(struct device *dev, struct device_attribute *attr, | ||
| 201 | char *buf) | ||
| 202 | { | ||
| 203 | struct mmc_host *mmc = container_of(dev, struct mmc_host, class_dev); | ||
| 204 | struct mmc_omap_host *host = mmc_priv(mmc); | ||
| 205 | |||
| 206 | return sprintf(buf, "%s\n", mmc_omap_cover_is_closed(host) ? "closed" : | ||
| 207 | "open"); | ||
| 208 | } | ||
| 209 | |||
| 210 | static DEVICE_ATTR(cover_switch, S_IRUGO, mmc_omap_show_cover_switch, NULL); | ||
| 211 | |||
| 212 | static ssize_t | ||
| 213 | mmc_omap_show_slot_name(struct device *dev, struct device_attribute *attr, | ||
| 214 | char *buf) | ||
| 215 | { | ||
| 216 | struct mmc_host *mmc = container_of(dev, struct mmc_host, class_dev); | ||
| 217 | struct mmc_omap_host *host = mmc_priv(mmc); | ||
| 218 | struct omap_mmc_slot_data slot = host->pdata->slots[host->slot_id]; | ||
| 219 | |||
| 220 | return sprintf(buf, "slot:%s\n", slot.name); | ||
| 221 | } | ||
| 222 | |||
| 223 | static DEVICE_ATTR(slot_name, S_IRUGO, mmc_omap_show_slot_name, NULL); | ||
| 224 | |||
| 225 | /* | ||
| 226 | * Configure the response type and send the cmd. | ||
| 227 | */ | ||
| 228 | static void | ||
| 229 | mmc_omap_start_command(struct mmc_omap_host *host, struct mmc_command *cmd, | ||
| 230 | struct mmc_data *data) | ||
| 231 | { | ||
| 232 | int cmdreg = 0, resptype = 0, cmdtype = 0; | ||
| 233 | |||
| 234 | dev_dbg(mmc_dev(host->mmc), "%s: CMD%d, argument 0x%08x\n", | ||
| 235 | mmc_hostname(host->mmc), cmd->opcode, cmd->arg); | ||
| 236 | host->cmd = cmd; | ||
| 237 | |||
| 238 | /* | ||
| 239 | * Clear status bits and enable interrupts | ||
| 240 | */ | ||
| 241 | OMAP_HSMMC_WRITE(host->base, STAT, STAT_CLEAR); | ||
| 242 | OMAP_HSMMC_WRITE(host->base, ISE, INT_EN_MASK); | ||
| 243 | OMAP_HSMMC_WRITE(host->base, IE, INT_EN_MASK); | ||
| 244 | |||
| 245 | if (cmd->flags & MMC_RSP_PRESENT) { | ||
| 246 | if (cmd->flags & MMC_RSP_136) | ||
| 247 | resptype = 1; | ||
| 248 | else | ||
| 249 | resptype = 2; | ||
| 250 | } | ||
| 251 | |||
| 252 | /* | ||
| 253 | * Unlike OMAP1 controller, the cmdtype does not seem to be based on | ||
| 254 | * ac, bc, adtc, bcr. Only commands ending an open ended transfer need | ||
| 255 | * a val of 0x3, rest 0x0. | ||
| 256 | */ | ||
| 257 | if (cmd == host->mrq->stop) | ||
| 258 | cmdtype = 0x3; | ||
| 259 | |||
| 260 | cmdreg = (cmd->opcode << 24) | (resptype << 16) | (cmdtype << 22); | ||
| 261 | |||
| 262 | if (data) { | ||
| 263 | cmdreg |= DP_SELECT | MSBS | BCE; | ||
| 264 | if (data->flags & MMC_DATA_READ) | ||
| 265 | cmdreg |= DDIR; | ||
| 266 | else | ||
| 267 | cmdreg &= ~(DDIR); | ||
| 268 | } | ||
| 269 | |||
| 270 | if (host->use_dma) | ||
| 271 | cmdreg |= DMA_EN; | ||
| 272 | |||
| 273 | OMAP_HSMMC_WRITE(host->base, ARG, cmd->arg); | ||
| 274 | OMAP_HSMMC_WRITE(host->base, CMD, cmdreg); | ||
| 275 | } | ||
| 276 | |||
| 277 | /* | ||
| 278 | * Notify the transfer complete to MMC core | ||
| 279 | */ | ||
| 280 | static void | ||
| 281 | mmc_omap_xfer_done(struct mmc_omap_host *host, struct mmc_data *data) | ||
| 282 | { | ||
| 283 | host->data = NULL; | ||
| 284 | |||
| 285 | if (host->use_dma && host->dma_ch != -1) | ||
| 286 | dma_unmap_sg(mmc_dev(host->mmc), data->sg, host->dma_len, | ||
| 287 | host->dma_dir); | ||
| 288 | |||
| 289 | host->datadir = OMAP_MMC_DATADIR_NONE; | ||
| 290 | |||
| 291 | if (!data->error) | ||
| 292 | data->bytes_xfered += data->blocks * (data->blksz); | ||
| 293 | else | ||
| 294 | data->bytes_xfered = 0; | ||
| 295 | |||
| 296 | if (!data->stop) { | ||
| 297 | host->mrq = NULL; | ||
| 298 | mmc_request_done(host->mmc, data->mrq); | ||
| 299 | return; | ||
| 300 | } | ||
| 301 | mmc_omap_start_command(host, data->stop, NULL); | ||
| 302 | } | ||
| 303 | |||
| 304 | /* | ||
| 305 | * Notify the core about command completion | ||
| 306 | */ | ||
| 307 | static void | ||
| 308 | mmc_omap_cmd_done(struct mmc_omap_host *host, struct mmc_command *cmd) | ||
| 309 | { | ||
| 310 | host->cmd = NULL; | ||
| 311 | |||
| 312 | if (cmd->flags & MMC_RSP_PRESENT) { | ||
| 313 | if (cmd->flags & MMC_RSP_136) { | ||
| 314 | /* response type 2 */ | ||
| 315 | cmd->resp[3] = OMAP_HSMMC_READ(host->base, RSP10); | ||
| 316 | cmd->resp[2] = OMAP_HSMMC_READ(host->base, RSP32); | ||
| 317 | cmd->resp[1] = OMAP_HSMMC_READ(host->base, RSP54); | ||
| 318 | cmd->resp[0] = OMAP_HSMMC_READ(host->base, RSP76); | ||
| 319 | } else { | ||
| 320 | /* response types 1, 1b, 3, 4, 5, 6 */ | ||
| 321 | cmd->resp[0] = OMAP_HSMMC_READ(host->base, RSP10); | ||
| 322 | } | ||
| 323 | } | ||
| 324 | if (host->data == NULL || cmd->error) { | ||
| 325 | host->mrq = NULL; | ||
| 326 | mmc_request_done(host->mmc, cmd->mrq); | ||
| 327 | } | ||
| 328 | } | ||
| 329 | |||
| 330 | /* | ||
| 331 | * DMA clean up for command errors | ||
| 332 | */ | ||
| 333 | static void mmc_dma_cleanup(struct mmc_omap_host *host) | ||
| 334 | { | ||
| 335 | host->data->error = -ETIMEDOUT; | ||
| 336 | |||
| 337 | if (host->use_dma && host->dma_ch != -1) { | ||
| 338 | dma_unmap_sg(mmc_dev(host->mmc), host->data->sg, host->dma_len, | ||
| 339 | host->dma_dir); | ||
| 340 | omap_free_dma(host->dma_ch); | ||
| 341 | host->dma_ch = -1; | ||
| 342 | up(&host->sem); | ||
| 343 | } | ||
| 344 | host->data = NULL; | ||
| 345 | host->datadir = OMAP_MMC_DATADIR_NONE; | ||
| 346 | } | ||
| 347 | |||
| 348 | /* | ||
| 349 | * Readable error output | ||
| 350 | */ | ||
| 351 | #ifdef CONFIG_MMC_DEBUG | ||
| 352 | static void mmc_omap_report_irq(struct mmc_omap_host *host, u32 status) | ||
| 353 | { | ||
| 354 | /* --- means reserved bit without definition at documentation */ | ||
| 355 | static const char *mmc_omap_status_bits[] = { | ||
| 356 | "CC", "TC", "BGE", "---", "BWR", "BRR", "---", "---", "CIRQ", | ||
| 357 | "OBI", "---", "---", "---", "---", "---", "ERRI", "CTO", "CCRC", | ||
| 358 | "CEB", "CIE", "DTO", "DCRC", "DEB", "---", "ACE", "---", | ||
| 359 | "---", "---", "---", "CERR", "CERR", "BADA", "---", "---", "---" | ||
| 360 | }; | ||
| 361 | char res[256]; | ||
| 362 | char *buf = res; | ||
| 363 | int len, i; | ||
| 364 | |||
| 365 | len = sprintf(buf, "MMC IRQ 0x%x :", status); | ||
| 366 | buf += len; | ||
| 367 | |||
| 368 | for (i = 0; i < ARRAY_SIZE(mmc_omap_status_bits); i++) | ||
| 369 | if (status & (1 << i)) { | ||
| 370 | len = sprintf(buf, " %s", mmc_omap_status_bits[i]); | ||
| 371 | buf += len; | ||
| 372 | } | ||
| 373 | |||
| 374 | dev_dbg(mmc_dev(host->mmc), "%s\n", res); | ||
| 375 | } | ||
| 376 | #endif /* CONFIG_MMC_DEBUG */ | ||
| 377 | |||
| 378 | |||
| 379 | /* | ||
| 380 | * MMC controller IRQ handler | ||
| 381 | */ | ||
| 382 | static irqreturn_t mmc_omap_irq(int irq, void *dev_id) | ||
| 383 | { | ||
| 384 | struct mmc_omap_host *host = dev_id; | ||
| 385 | struct mmc_data *data; | ||
| 386 | int end_cmd = 0, end_trans = 0, status; | ||
| 387 | |||
| 388 | if (host->cmd == NULL && host->data == NULL) { | ||
| 389 | OMAP_HSMMC_WRITE(host->base, STAT, | ||
| 390 | OMAP_HSMMC_READ(host->base, STAT)); | ||
| 391 | return IRQ_HANDLED; | ||
| 392 | } | ||
| 393 | |||
| 394 | data = host->data; | ||
| 395 | status = OMAP_HSMMC_READ(host->base, STAT); | ||
| 396 | dev_dbg(mmc_dev(host->mmc), "IRQ Status is %x\n", status); | ||
| 397 | |||
| 398 | if (status & ERR) { | ||
| 399 | #ifdef CONFIG_MMC_DEBUG | ||
| 400 | mmc_omap_report_irq(host, status); | ||
| 401 | #endif | ||
| 402 | if ((status & CMD_TIMEOUT) || | ||
| 403 | (status & CMD_CRC)) { | ||
| 404 | if (host->cmd) { | ||
| 405 | if (status & CMD_TIMEOUT) { | ||
| 406 | OMAP_HSMMC_WRITE(host->base, SYSCTL, | ||
| 407 | OMAP_HSMMC_READ(host->base, | ||
| 408 | SYSCTL) | SRC); | ||
| 409 | while (OMAP_HSMMC_READ(host->base, | ||
| 410 | SYSCTL) & SRC) | ||
| 411 | ; | ||
| 412 | |||
| 413 | host->cmd->error = -ETIMEDOUT; | ||
| 414 | } else { | ||
| 415 | host->cmd->error = -EILSEQ; | ||
| 416 | } | ||
| 417 | end_cmd = 1; | ||
| 418 | } | ||
| 419 | if (host->data) | ||
| 420 | mmc_dma_cleanup(host); | ||
| 421 | } | ||
| 422 | if ((status & DATA_TIMEOUT) || | ||
| 423 | (status & DATA_CRC)) { | ||
| 424 | if (host->data) { | ||
| 425 | if (status & DATA_TIMEOUT) | ||
| 426 | mmc_dma_cleanup(host); | ||
| 427 | else | ||
| 428 | host->data->error = -EILSEQ; | ||
| 429 | OMAP_HSMMC_WRITE(host->base, SYSCTL, | ||
| 430 | OMAP_HSMMC_READ(host->base, | ||
| 431 | SYSCTL) | SRD); | ||
| 432 | while (OMAP_HSMMC_READ(host->base, | ||
| 433 | SYSCTL) & SRD) | ||
| 434 | ; | ||
| 435 | end_trans = 1; | ||
| 436 | } | ||
| 437 | } | ||
| 438 | if (status & CARD_ERR) { | ||
| 439 | dev_dbg(mmc_dev(host->mmc), | ||
| 440 | "Ignoring card err CMD%d\n", host->cmd->opcode); | ||
| 441 | if (host->cmd) | ||
| 442 | end_cmd = 1; | ||
| 443 | if (host->data) | ||
| 444 | end_trans = 1; | ||
| 445 | } | ||
| 446 | } | ||
| 447 | |||
| 448 | OMAP_HSMMC_WRITE(host->base, STAT, status); | ||
| 449 | |||
| 450 | if (end_cmd || (status & CC)) | ||
| 451 | mmc_omap_cmd_done(host, host->cmd); | ||
| 452 | if (end_trans || (status & TC)) | ||
| 453 | mmc_omap_xfer_done(host, data); | ||
| 454 | |||
| 455 | return IRQ_HANDLED; | ||
| 456 | } | ||
| 457 | |||
| 458 | /* | ||
| 459 | * Switch MMC operating voltage | ||
| 460 | */ | ||
| 461 | static int omap_mmc_switch_opcond(struct mmc_omap_host *host, int vdd) | ||
| 462 | { | ||
| 463 | u32 reg_val = 0; | ||
| 464 | int ret; | ||
| 465 | |||
| 466 | /* Disable the clocks */ | ||
| 467 | clk_disable(host->fclk); | ||
| 468 | clk_disable(host->iclk); | ||
| 469 | clk_disable(host->dbclk); | ||
| 470 | |||
| 471 | /* Turn the power off */ | ||
| 472 | ret = mmc_slot(host).set_power(host->dev, host->slot_id, 0, 0); | ||
| 473 | if (ret != 0) | ||
| 474 | goto err; | ||
| 475 | |||
| 476 | /* Turn the power ON with given VDD 1.8 or 3.0v */ | ||
| 477 | ret = mmc_slot(host).set_power(host->dev, host->slot_id, 1, vdd); | ||
| 478 | if (ret != 0) | ||
| 479 | goto err; | ||
| 480 | |||
| 481 | clk_enable(host->fclk); | ||
| 482 | clk_enable(host->iclk); | ||
| 483 | clk_enable(host->dbclk); | ||
| 484 | |||
| 485 | OMAP_HSMMC_WRITE(host->base, HCTL, | ||
| 486 | OMAP_HSMMC_READ(host->base, HCTL) & SDVSCLR); | ||
| 487 | reg_val = OMAP_HSMMC_READ(host->base, HCTL); | ||
| 488 | /* | ||
| 489 | * If a MMC dual voltage card is detected, the set_ios fn calls | ||
| 490 | * this fn with VDD bit set for 1.8V. Upon card removal from the | ||
| 491 | * slot, omap_mmc_set_ios sets the VDD back to 3V on MMC_POWER_OFF. | ||
| 492 | * | ||
| 493 | * Only MMC1 supports 3.0V. MMC2 will not function if SDVS30 is | ||
| 494 | * set in HCTL. | ||
| 495 | */ | ||
| 496 | if (host->id == OMAP_MMC1_DEVID && (((1 << vdd) == MMC_VDD_32_33) || | ||
| 497 | ((1 << vdd) == MMC_VDD_33_34))) | ||
| 498 | reg_val |= SDVS30; | ||
| 499 | if ((1 << vdd) == MMC_VDD_165_195) | ||
| 500 | reg_val |= SDVS18; | ||
| 501 | |||
| 502 | OMAP_HSMMC_WRITE(host->base, HCTL, reg_val); | ||
| 503 | |||
| 504 | OMAP_HSMMC_WRITE(host->base, HCTL, | ||
| 505 | OMAP_HSMMC_READ(host->base, HCTL) | SDBP); | ||
| 506 | |||
| 507 | return 0; | ||
| 508 | err: | ||
| 509 | dev_dbg(mmc_dev(host->mmc), "Unable to switch operating voltage\n"); | ||
| 510 | return ret; | ||
| 511 | } | ||
| 512 | |||
| 513 | /* | ||
| 514 | * Work Item to notify the core about card insertion/removal | ||
| 515 | */ | ||
| 516 | static void mmc_omap_detect(struct work_struct *work) | ||
| 517 | { | ||
| 518 | struct mmc_omap_host *host = container_of(work, struct mmc_omap_host, | ||
| 519 | mmc_carddetect_work); | ||
| 520 | |||
| 521 | sysfs_notify(&host->mmc->class_dev.kobj, NULL, "cover_switch"); | ||
| 522 | if (host->carddetect) { | ||
| 523 | mmc_detect_change(host->mmc, (HZ * 200) / 1000); | ||
| 524 | } else { | ||
| 525 | OMAP_HSMMC_WRITE(host->base, SYSCTL, | ||
| 526 | OMAP_HSMMC_READ(host->base, SYSCTL) | SRD); | ||
| 527 | while (OMAP_HSMMC_READ(host->base, SYSCTL) & SRD) | ||
| 528 | ; | ||
| 529 | |||
| 530 | mmc_detect_change(host->mmc, (HZ * 50) / 1000); | ||
| 531 | } | ||
| 532 | } | ||
| 533 | |||
| 534 | /* | ||
| 535 | * ISR for handling card insertion and removal | ||
| 536 | */ | ||
| 537 | static irqreturn_t omap_mmc_cd_handler(int irq, void *dev_id) | ||
| 538 | { | ||
| 539 | struct mmc_omap_host *host = (struct mmc_omap_host *)dev_id; | ||
| 540 | |||
| 541 | host->carddetect = mmc_slot(host).card_detect(irq); | ||
| 542 | schedule_work(&host->mmc_carddetect_work); | ||
| 543 | |||
| 544 | return IRQ_HANDLED; | ||
| 545 | } | ||
| 546 | |||
| 547 | /* | ||
| 548 | * DMA call back function | ||
| 549 | */ | ||
| 550 | static void mmc_omap_dma_cb(int lch, u16 ch_status, void *data) | ||
| 551 | { | ||
| 552 | struct mmc_omap_host *host = data; | ||
| 553 | |||
| 554 | if (ch_status & OMAP2_DMA_MISALIGNED_ERR_IRQ) | ||
| 555 | dev_dbg(mmc_dev(host->mmc), "MISALIGNED_ADRS_ERR\n"); | ||
| 556 | |||
| 557 | if (host->dma_ch < 0) | ||
| 558 | return; | ||
| 559 | |||
| 560 | omap_free_dma(host->dma_ch); | ||
| 561 | host->dma_ch = -1; | ||
| 562 | /* | ||
| 563 | * DMA Callback: run in interrupt context. | ||
| 564 | * mutex_unlock will through a kernel warning if used. | ||
| 565 | */ | ||
| 566 | up(&host->sem); | ||
| 567 | } | ||
| 568 | |||
| 569 | /* | ||
| 570 | * Configure dma src and destination parameters | ||
| 571 | */ | ||
| 572 | static int mmc_omap_config_dma_param(int sync_dir, struct mmc_omap_host *host, | ||
| 573 | struct mmc_data *data) | ||
| 574 | { | ||
| 575 | if (sync_dir == 0) { | ||
| 576 | omap_set_dma_dest_params(host->dma_ch, 0, | ||
| 577 | OMAP_DMA_AMODE_CONSTANT, | ||
| 578 | (host->mapbase + OMAP_HSMMC_DATA), 0, 0); | ||
| 579 | omap_set_dma_src_params(host->dma_ch, 0, | ||
| 580 | OMAP_DMA_AMODE_POST_INC, | ||
| 581 | sg_dma_address(&data->sg[0]), 0, 0); | ||
| 582 | } else { | ||
| 583 | omap_set_dma_src_params(host->dma_ch, 0, | ||
| 584 | OMAP_DMA_AMODE_CONSTANT, | ||
| 585 | (host->mapbase + OMAP_HSMMC_DATA), 0, 0); | ||
| 586 | omap_set_dma_dest_params(host->dma_ch, 0, | ||
| 587 | OMAP_DMA_AMODE_POST_INC, | ||
| 588 | sg_dma_address(&data->sg[0]), 0, 0); | ||
| 589 | } | ||
| 590 | return 0; | ||
| 591 | } | ||
| 592 | /* | ||
| 593 | * Routine to configure and start DMA for the MMC card | ||
| 594 | */ | ||
| 595 | static int | ||
| 596 | mmc_omap_start_dma_transfer(struct mmc_omap_host *host, struct mmc_request *req) | ||
| 597 | { | ||
| 598 | int sync_dev, sync_dir = 0; | ||
| 599 | int dma_ch = 0, ret = 0, err = 1; | ||
| 600 | struct mmc_data *data = req->data; | ||
| 601 | |||
| 602 | /* | ||
| 603 | * If for some reason the DMA transfer is still active, | ||
| 604 | * we wait for timeout period and free the dma | ||
| 605 | */ | ||
| 606 | if (host->dma_ch != -1) { | ||
| 607 | set_current_state(TASK_UNINTERRUPTIBLE); | ||
| 608 | schedule_timeout(100); | ||
| 609 | if (down_trylock(&host->sem)) { | ||
| 610 | omap_free_dma(host->dma_ch); | ||
| 611 | host->dma_ch = -1; | ||
| 612 | up(&host->sem); | ||
| 613 | return err; | ||
| 614 | } | ||
| 615 | } else { | ||
| 616 | if (down_trylock(&host->sem)) | ||
| 617 | return err; | ||
| 618 | } | ||
| 619 | |||
| 620 | if (!(data->flags & MMC_DATA_WRITE)) { | ||
| 621 | host->dma_dir = DMA_FROM_DEVICE; | ||
| 622 | if (host->id == OMAP_MMC1_DEVID) | ||
| 623 | sync_dev = OMAP24XX_DMA_MMC1_RX; | ||
| 624 | else | ||
| 625 | sync_dev = OMAP24XX_DMA_MMC2_RX; | ||
| 626 | } else { | ||
| 627 | host->dma_dir = DMA_TO_DEVICE; | ||
| 628 | if (host->id == OMAP_MMC1_DEVID) | ||
| 629 | sync_dev = OMAP24XX_DMA_MMC1_TX; | ||
| 630 | else | ||
| 631 | sync_dev = OMAP24XX_DMA_MMC2_TX; | ||
| 632 | } | ||
| 633 | |||
| 634 | ret = omap_request_dma(sync_dev, "MMC/SD", mmc_omap_dma_cb, | ||
| 635 | host, &dma_ch); | ||
| 636 | if (ret != 0) { | ||
| 637 | dev_dbg(mmc_dev(host->mmc), | ||
| 638 | "%s: omap_request_dma() failed with %d\n", | ||
| 639 | mmc_hostname(host->mmc), ret); | ||
| 640 | return ret; | ||
| 641 | } | ||
| 642 | |||
| 643 | host->dma_len = dma_map_sg(mmc_dev(host->mmc), data->sg, | ||
| 644 | data->sg_len, host->dma_dir); | ||
| 645 | host->dma_ch = dma_ch; | ||
| 646 | |||
| 647 | if (!(data->flags & MMC_DATA_WRITE)) | ||
| 648 | mmc_omap_config_dma_param(1, host, data); | ||
| 649 | else | ||
| 650 | mmc_omap_config_dma_param(0, host, data); | ||
| 651 | |||
| 652 | if ((data->blksz % 4) == 0) | ||
| 653 | omap_set_dma_transfer_params(dma_ch, OMAP_DMA_DATA_TYPE_S32, | ||
| 654 | (data->blksz / 4), data->blocks, OMAP_DMA_SYNC_FRAME, | ||
| 655 | sync_dev, sync_dir); | ||
| 656 | else | ||
| 657 | /* REVISIT: The MMC buffer increments only when MSB is written. | ||
| 658 | * Return error for blksz which is non multiple of four. | ||
| 659 | */ | ||
| 660 | return -EINVAL; | ||
| 661 | |||
| 662 | omap_start_dma(dma_ch); | ||
| 663 | return 0; | ||
| 664 | } | ||
| 665 | |||
| 666 | static void set_data_timeout(struct mmc_omap_host *host, | ||
| 667 | struct mmc_request *req) | ||
| 668 | { | ||
| 669 | unsigned int timeout, cycle_ns; | ||
| 670 | uint32_t reg, clkd, dto = 0; | ||
| 671 | |||
| 672 | reg = OMAP_HSMMC_READ(host->base, SYSCTL); | ||
| 673 | clkd = (reg & CLKD_MASK) >> CLKD_SHIFT; | ||
| 674 | if (clkd == 0) | ||
| 675 | clkd = 1; | ||
| 676 | |||
| 677 | cycle_ns = 1000000000 / (clk_get_rate(host->fclk) / clkd); | ||
| 678 | timeout = req->data->timeout_ns / cycle_ns; | ||
| 679 | timeout += req->data->timeout_clks; | ||
| 680 | if (timeout) { | ||
| 681 | while ((timeout & 0x80000000) == 0) { | ||
| 682 | dto += 1; | ||
| 683 | timeout <<= 1; | ||
| 684 | } | ||
| 685 | dto = 31 - dto; | ||
| 686 | timeout <<= 1; | ||
| 687 | if (timeout && dto) | ||
| 688 | dto += 1; | ||
| 689 | if (dto >= 13) | ||
| 690 | dto -= 13; | ||
| 691 | else | ||
| 692 | dto = 0; | ||
| 693 | if (dto > 14) | ||
| 694 | dto = 14; | ||
| 695 | } | ||
| 696 | |||
| 697 | reg &= ~DTO_MASK; | ||
| 698 | reg |= dto << DTO_SHIFT; | ||
| 699 | OMAP_HSMMC_WRITE(host->base, SYSCTL, reg); | ||
| 700 | } | ||
| 701 | |||
| 702 | /* | ||
| 703 | * Configure block length for MMC/SD cards and initiate the transfer. | ||
| 704 | */ | ||
| 705 | static int | ||
| 706 | mmc_omap_prepare_data(struct mmc_omap_host *host, struct mmc_request *req) | ||
| 707 | { | ||
| 708 | int ret; | ||
| 709 | host->data = req->data; | ||
| 710 | |||
| 711 | if (req->data == NULL) { | ||
| 712 | host->datadir = OMAP_MMC_DATADIR_NONE; | ||
| 713 | OMAP_HSMMC_WRITE(host->base, BLK, 0); | ||
| 714 | return 0; | ||
| 715 | } | ||
| 716 | |||
| 717 | OMAP_HSMMC_WRITE(host->base, BLK, (req->data->blksz) | ||
| 718 | | (req->data->blocks << 16)); | ||
| 719 | set_data_timeout(host, req); | ||
| 720 | |||
| 721 | host->datadir = (req->data->flags & MMC_DATA_WRITE) ? | ||
| 722 | OMAP_MMC_DATADIR_WRITE : OMAP_MMC_DATADIR_READ; | ||
| 723 | |||
| 724 | if (host->use_dma) { | ||
| 725 | ret = mmc_omap_start_dma_transfer(host, req); | ||
| 726 | if (ret != 0) { | ||
| 727 | dev_dbg(mmc_dev(host->mmc), "MMC start dma failure\n"); | ||
| 728 | return ret; | ||
| 729 | } | ||
| 730 | } | ||
| 731 | return 0; | ||
| 732 | } | ||
| 733 | |||
| 734 | /* | ||
| 735 | * Request function. for read/write operation | ||
| 736 | */ | ||
| 737 | static void omap_mmc_request(struct mmc_host *mmc, struct mmc_request *req) | ||
| 738 | { | ||
| 739 | struct mmc_omap_host *host = mmc_priv(mmc); | ||
| 740 | |||
| 741 | WARN_ON(host->mrq != NULL); | ||
| 742 | host->mrq = req; | ||
| 743 | mmc_omap_prepare_data(host, req); | ||
| 744 | mmc_omap_start_command(host, req->cmd, req->data); | ||
| 745 | } | ||
| 746 | |||
| 747 | |||
| 748 | /* Routine to configure clock values. Exposed API to core */ | ||
| 749 | static void omap_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) | ||
| 750 | { | ||
| 751 | struct mmc_omap_host *host = mmc_priv(mmc); | ||
| 752 | u16 dsor = 0; | ||
| 753 | unsigned long regval; | ||
| 754 | unsigned long timeout; | ||
| 755 | |||
| 756 | switch (ios->power_mode) { | ||
| 757 | case MMC_POWER_OFF: | ||
| 758 | mmc_slot(host).set_power(host->dev, host->slot_id, 0, 0); | ||
| 759 | /* | ||
| 760 | * Reset bus voltage to 3V if it got set to 1.8V earlier. | ||
| 761 | * REVISIT: If we are able to detect cards after unplugging | ||
| 762 | * a 1.8V card, this code should not be needed. | ||
| 763 | */ | ||
| 764 | if (!(OMAP_HSMMC_READ(host->base, HCTL) & SDVSDET)) { | ||
| 765 | int vdd = fls(host->mmc->ocr_avail) - 1; | ||
| 766 | if (omap_mmc_switch_opcond(host, vdd) != 0) | ||
| 767 | host->mmc->ios.vdd = vdd; | ||
| 768 | } | ||
| 769 | break; | ||
| 770 | case MMC_POWER_UP: | ||
| 771 | mmc_slot(host).set_power(host->dev, host->slot_id, 1, ios->vdd); | ||
| 772 | break; | ||
| 773 | } | ||
| 774 | |||
| 775 | switch (mmc->ios.bus_width) { | ||
| 776 | case MMC_BUS_WIDTH_4: | ||
| 777 | OMAP_HSMMC_WRITE(host->base, HCTL, | ||
| 778 | OMAP_HSMMC_READ(host->base, HCTL) | FOUR_BIT); | ||
| 779 | break; | ||
| 780 | case MMC_BUS_WIDTH_1: | ||
| 781 | OMAP_HSMMC_WRITE(host->base, HCTL, | ||
| 782 | OMAP_HSMMC_READ(host->base, HCTL) & ~FOUR_BIT); | ||
| 783 | break; | ||
| 784 | } | ||
| 785 | |||
| 786 | if (host->id == OMAP_MMC1_DEVID) { | ||
| 787 | /* Only MMC1 can operate at 3V/1.8V */ | ||
| 788 | if ((OMAP_HSMMC_READ(host->base, HCTL) & SDVSDET) && | ||
| 789 | (ios->vdd == DUAL_VOLT_OCR_BIT)) { | ||
| 790 | /* | ||
| 791 | * The mmc_select_voltage fn of the core does | ||
| 792 | * not seem to set the power_mode to | ||
| 793 | * MMC_POWER_UP upon recalculating the voltage. | ||
| 794 | * vdd 1.8v. | ||
| 795 | */ | ||
| 796 | if (omap_mmc_switch_opcond(host, ios->vdd) != 0) | ||
| 797 | dev_dbg(mmc_dev(host->mmc), | ||
| 798 | "Switch operation failed\n"); | ||
| 799 | } | ||
| 800 | } | ||
| 801 | |||
| 802 | if (ios->clock) { | ||
| 803 | dsor = OMAP_MMC_MASTER_CLOCK / ios->clock; | ||
| 804 | if (dsor < 1) | ||
| 805 | dsor = 1; | ||
| 806 | |||
| 807 | if (OMAP_MMC_MASTER_CLOCK / dsor > ios->clock) | ||
| 808 | dsor++; | ||
| 809 | |||
| 810 | if (dsor > 250) | ||
| 811 | dsor = 250; | ||
| 812 | } | ||
| 813 | omap_mmc_stop_clock(host); | ||
| 814 | regval = OMAP_HSMMC_READ(host->base, SYSCTL); | ||
| 815 | regval = regval & ~(CLKD_MASK); | ||
| 816 | regval = regval | (dsor << 6) | (DTO << 16); | ||
| 817 | OMAP_HSMMC_WRITE(host->base, SYSCTL, regval); | ||
| 818 | OMAP_HSMMC_WRITE(host->base, SYSCTL, | ||
| 819 | OMAP_HSMMC_READ(host->base, SYSCTL) | ICE); | ||
| 820 | |||
| 821 | /* Wait till the ICS bit is set */ | ||
| 822 | timeout = jiffies + msecs_to_jiffies(MMC_TIMEOUT_MS); | ||
| 823 | while ((OMAP_HSMMC_READ(host->base, SYSCTL) & ICS) != 0x2 | ||
| 824 | && time_before(jiffies, timeout)) | ||
| 825 | msleep(1); | ||
| 826 | |||
| 827 | OMAP_HSMMC_WRITE(host->base, SYSCTL, | ||
| 828 | OMAP_HSMMC_READ(host->base, SYSCTL) | CEN); | ||
| 829 | |||
| 830 | if (ios->power_mode == MMC_POWER_ON) | ||
| 831 | send_init_stream(host); | ||
| 832 | |||
| 833 | if (ios->bus_mode == MMC_BUSMODE_OPENDRAIN) | ||
| 834 | OMAP_HSMMC_WRITE(host->base, CON, | ||
| 835 | OMAP_HSMMC_READ(host->base, CON) | OD); | ||
| 836 | } | ||
| 837 | |||
| 838 | static int omap_hsmmc_get_cd(struct mmc_host *mmc) | ||
| 839 | { | ||
| 840 | struct mmc_omap_host *host = mmc_priv(mmc); | ||
| 841 | struct omap_mmc_platform_data *pdata = host->pdata; | ||
| 842 | |||
| 843 | if (!pdata->slots[0].card_detect) | ||
| 844 | return -ENOSYS; | ||
| 845 | return pdata->slots[0].card_detect(pdata->slots[0].card_detect_irq); | ||
| 846 | } | ||
| 847 | |||
| 848 | static int omap_hsmmc_get_ro(struct mmc_host *mmc) | ||
| 849 | { | ||
| 850 | struct mmc_omap_host *host = mmc_priv(mmc); | ||
| 851 | struct omap_mmc_platform_data *pdata = host->pdata; | ||
| 852 | |||
| 853 | if (!pdata->slots[0].get_ro) | ||
| 854 | return -ENOSYS; | ||
| 855 | return pdata->slots[0].get_ro(host->dev, 0); | ||
| 856 | } | ||
| 857 | |||
| 858 | static struct mmc_host_ops mmc_omap_ops = { | ||
| 859 | .request = omap_mmc_request, | ||
| 860 | .set_ios = omap_mmc_set_ios, | ||
| 861 | .get_cd = omap_hsmmc_get_cd, | ||
| 862 | .get_ro = omap_hsmmc_get_ro, | ||
| 863 | /* NYET -- enable_sdio_irq */ | ||
| 864 | }; | ||
| 865 | |||
| 866 | static int __init omap_mmc_probe(struct platform_device *pdev) | ||
| 867 | { | ||
| 868 | struct omap_mmc_platform_data *pdata = pdev->dev.platform_data; | ||
| 869 | struct mmc_host *mmc; | ||
| 870 | struct mmc_omap_host *host = NULL; | ||
| 871 | struct resource *res; | ||
| 872 | int ret = 0, irq; | ||
| 873 | u32 hctl, capa; | ||
| 874 | |||
| 875 | if (pdata == NULL) { | ||
| 876 | dev_err(&pdev->dev, "Platform Data is missing\n"); | ||
| 877 | return -ENXIO; | ||
| 878 | } | ||
| 879 | |||
| 880 | if (pdata->nr_slots == 0) { | ||
| 881 | dev_err(&pdev->dev, "No Slots\n"); | ||
| 882 | return -ENXIO; | ||
| 883 | } | ||
| 884 | |||
| 885 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | ||
| 886 | irq = platform_get_irq(pdev, 0); | ||
| 887 | if (res == NULL || irq < 0) | ||
| 888 | return -ENXIO; | ||
| 889 | |||
| 890 | res = request_mem_region(res->start, res->end - res->start + 1, | ||
| 891 | pdev->name); | ||
| 892 | if (res == NULL) | ||
| 893 | return -EBUSY; | ||
| 894 | |||
| 895 | mmc = mmc_alloc_host(sizeof(struct mmc_omap_host), &pdev->dev); | ||
| 896 | if (!mmc) { | ||
| 897 | ret = -ENOMEM; | ||
| 898 | goto err; | ||
| 899 | } | ||
| 900 | |||
| 901 | host = mmc_priv(mmc); | ||
| 902 | host->mmc = mmc; | ||
| 903 | host->pdata = pdata; | ||
| 904 | host->dev = &pdev->dev; | ||
| 905 | host->use_dma = 1; | ||
| 906 | host->dev->dma_mask = &pdata->dma_mask; | ||
| 907 | host->dma_ch = -1; | ||
| 908 | host->irq = irq; | ||
| 909 | host->id = pdev->id; | ||
| 910 | host->slot_id = 0; | ||
| 911 | host->mapbase = res->start; | ||
| 912 | host->base = ioremap(host->mapbase, SZ_4K); | ||
| 913 | |||
| 914 | platform_set_drvdata(pdev, host); | ||
| 915 | INIT_WORK(&host->mmc_carddetect_work, mmc_omap_detect); | ||
| 916 | |||
| 917 | mmc->ops = &mmc_omap_ops; | ||
| 918 | mmc->f_min = 400000; | ||
| 919 | mmc->f_max = 52000000; | ||
| 920 | |||
| 921 | sema_init(&host->sem, 1); | ||
| 922 | |||
| 923 | host->iclk = clk_get(&pdev->dev, "mmchs_ick"); | ||
| 924 | if (IS_ERR(host->iclk)) { | ||
| 925 | ret = PTR_ERR(host->iclk); | ||
| 926 | host->iclk = NULL; | ||
| 927 | goto err1; | ||
| 928 | } | ||
| 929 | host->fclk = clk_get(&pdev->dev, "mmchs_fck"); | ||
| 930 | if (IS_ERR(host->fclk)) { | ||
| 931 | ret = PTR_ERR(host->fclk); | ||
| 932 | host->fclk = NULL; | ||
| 933 | clk_put(host->iclk); | ||
| 934 | goto err1; | ||
| 935 | } | ||
| 936 | |||
| 937 | if (clk_enable(host->fclk) != 0) { | ||
| 938 | clk_put(host->iclk); | ||
| 939 | clk_put(host->fclk); | ||
| 940 | goto err1; | ||
| 941 | } | ||
| 942 | |||
| 943 | if (clk_enable(host->iclk) != 0) { | ||
| 944 | clk_disable(host->fclk); | ||
| 945 | clk_put(host->iclk); | ||
| 946 | clk_put(host->fclk); | ||
| 947 | goto err1; | ||
| 948 | } | ||
| 949 | |||
| 950 | host->dbclk = clk_get(&pdev->dev, "mmchsdb_fck"); | ||
| 951 | /* | ||
| 952 | * MMC can still work without debounce clock. | ||
| 953 | */ | ||
| 954 | if (IS_ERR(host->dbclk)) | ||
| 955 | dev_warn(mmc_dev(host->mmc), "Failed to get debounce clock\n"); | ||
| 956 | else | ||
| 957 | if (clk_enable(host->dbclk) != 0) | ||
| 958 | dev_dbg(mmc_dev(host->mmc), "Enabling debounce" | ||
| 959 | " clk failed\n"); | ||
| 960 | else | ||
| 961 | host->dbclk_enabled = 1; | ||
| 962 | |||
| 963 | #ifdef CONFIG_MMC_BLOCK_BOUNCE | ||
| 964 | mmc->max_phys_segs = 1; | ||
| 965 | mmc->max_hw_segs = 1; | ||
| 966 | #endif | ||
| 967 | mmc->max_blk_size = 512; /* Block Length at max can be 1024 */ | ||
| 968 | mmc->max_blk_count = 0xFFFF; /* No. of Blocks is 16 bits */ | ||
| 969 | mmc->max_req_size = mmc->max_blk_size * mmc->max_blk_count; | ||
| 970 | mmc->max_seg_size = mmc->max_req_size; | ||
| 971 | |||
| 972 | mmc->ocr_avail = mmc_slot(host).ocr_mask; | ||
| 973 | mmc->caps |= MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED; | ||
| 974 | |||
| 975 | if (pdata->slots[host->slot_id].wires >= 4) | ||
| 976 | mmc->caps |= MMC_CAP_4_BIT_DATA; | ||
| 977 | |||
| 978 | /* Only MMC1 supports 3.0V */ | ||
| 979 | if (host->id == OMAP_MMC1_DEVID) { | ||
| 980 | hctl = SDVS30; | ||
| 981 | capa = VS30 | VS18; | ||
| 982 | } else { | ||
| 983 | hctl = SDVS18; | ||
| 984 | capa = VS18; | ||
| 985 | } | ||
| 986 | |||
| 987 | OMAP_HSMMC_WRITE(host->base, HCTL, | ||
| 988 | OMAP_HSMMC_READ(host->base, HCTL) | hctl); | ||
| 989 | |||
| 990 | OMAP_HSMMC_WRITE(host->base, CAPA, | ||
| 991 | OMAP_HSMMC_READ(host->base, CAPA) | capa); | ||
| 992 | |||
| 993 | /* Set the controller to AUTO IDLE mode */ | ||
| 994 | OMAP_HSMMC_WRITE(host->base, SYSCONFIG, | ||
| 995 | OMAP_HSMMC_READ(host->base, SYSCONFIG) | AUTOIDLE); | ||
| 996 | |||
| 997 | /* Set SD bus power bit */ | ||
| 998 | OMAP_HSMMC_WRITE(host->base, HCTL, | ||
| 999 | OMAP_HSMMC_READ(host->base, HCTL) | SDBP); | ||
| 1000 | |||
| 1001 | /* Request IRQ for MMC operations */ | ||
| 1002 | ret = request_irq(host->irq, mmc_omap_irq, IRQF_DISABLED, | ||
| 1003 | mmc_hostname(mmc), host); | ||
| 1004 | if (ret) { | ||
| 1005 | dev_dbg(mmc_dev(host->mmc), "Unable to grab HSMMC IRQ\n"); | ||
| 1006 | goto err_irq; | ||
| 1007 | } | ||
| 1008 | |||
| 1009 | if (pdata->init != NULL) { | ||
| 1010 | if (pdata->init(&pdev->dev) != 0) { | ||
| 1011 | dev_dbg(mmc_dev(host->mmc), | ||
| 1012 | "Unable to configure MMC IRQs\n"); | ||
| 1013 | goto err_irq_cd_init; | ||
| 1014 | } | ||
| 1015 | } | ||
| 1016 | |||
| 1017 | /* Request IRQ for card detect */ | ||
| 1018 | if ((mmc_slot(host).card_detect_irq) && (mmc_slot(host).card_detect)) { | ||
| 1019 | ret = request_irq(mmc_slot(host).card_detect_irq, | ||
| 1020 | omap_mmc_cd_handler, | ||
| 1021 | IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING | ||
| 1022 | | IRQF_DISABLED, | ||
| 1023 | mmc_hostname(mmc), host); | ||
| 1024 | if (ret) { | ||
| 1025 | dev_dbg(mmc_dev(host->mmc), | ||
| 1026 | "Unable to grab MMC CD IRQ\n"); | ||
| 1027 | goto err_irq_cd; | ||
| 1028 | } | ||
| 1029 | } | ||
| 1030 | |||
| 1031 | OMAP_HSMMC_WRITE(host->base, ISE, INT_EN_MASK); | ||
| 1032 | OMAP_HSMMC_WRITE(host->base, IE, INT_EN_MASK); | ||
| 1033 | |||
| 1034 | mmc_add_host(mmc); | ||
| 1035 | |||
| 1036 | if (host->pdata->slots[host->slot_id].name != NULL) { | ||
| 1037 | ret = device_create_file(&mmc->class_dev, &dev_attr_slot_name); | ||
| 1038 | if (ret < 0) | ||
| 1039 | goto err_slot_name; | ||
| 1040 | } | ||
| 1041 | if (mmc_slot(host).card_detect_irq && mmc_slot(host).card_detect && | ||
| 1042 | host->pdata->slots[host->slot_id].get_cover_state) { | ||
| 1043 | ret = device_create_file(&mmc->class_dev, | ||
| 1044 | &dev_attr_cover_switch); | ||
| 1045 | if (ret < 0) | ||
| 1046 | goto err_cover_switch; | ||
| 1047 | } | ||
| 1048 | |||
| 1049 | return 0; | ||
| 1050 | |||
| 1051 | err_cover_switch: | ||
| 1052 | device_remove_file(&mmc->class_dev, &dev_attr_cover_switch); | ||
| 1053 | err_slot_name: | ||
| 1054 | mmc_remove_host(mmc); | ||
| 1055 | err_irq_cd: | ||
| 1056 | free_irq(mmc_slot(host).card_detect_irq, host); | ||
| 1057 | err_irq_cd_init: | ||
| 1058 | free_irq(host->irq, host); | ||
| 1059 | err_irq: | ||
| 1060 | clk_disable(host->fclk); | ||
| 1061 | clk_disable(host->iclk); | ||
| 1062 | clk_put(host->fclk); | ||
| 1063 | clk_put(host->iclk); | ||
| 1064 | if (host->dbclk_enabled) { | ||
| 1065 | clk_disable(host->dbclk); | ||
| 1066 | clk_put(host->dbclk); | ||
| 1067 | } | ||
| 1068 | |||
| 1069 | err1: | ||
| 1070 | iounmap(host->base); | ||
| 1071 | err: | ||
| 1072 | dev_dbg(mmc_dev(host->mmc), "Probe Failed\n"); | ||
| 1073 | release_mem_region(res->start, res->end - res->start + 1); | ||
| 1074 | if (host) | ||
| 1075 | mmc_free_host(mmc); | ||
| 1076 | return ret; | ||
| 1077 | } | ||
| 1078 | |||
| 1079 | static int omap_mmc_remove(struct platform_device *pdev) | ||
| 1080 | { | ||
| 1081 | struct mmc_omap_host *host = platform_get_drvdata(pdev); | ||
| 1082 | struct resource *res; | ||
| 1083 | |||
| 1084 | if (host) { | ||
| 1085 | mmc_remove_host(host->mmc); | ||
| 1086 | if (host->pdata->cleanup) | ||
| 1087 | host->pdata->cleanup(&pdev->dev); | ||
| 1088 | free_irq(host->irq, host); | ||
| 1089 | if (mmc_slot(host).card_detect_irq) | ||
| 1090 | free_irq(mmc_slot(host).card_detect_irq, host); | ||
| 1091 | flush_scheduled_work(); | ||
| 1092 | |||
| 1093 | clk_disable(host->fclk); | ||
| 1094 | clk_disable(host->iclk); | ||
| 1095 | clk_put(host->fclk); | ||
| 1096 | clk_put(host->iclk); | ||
| 1097 | if (host->dbclk_enabled) { | ||
| 1098 | clk_disable(host->dbclk); | ||
| 1099 | clk_put(host->dbclk); | ||
| 1100 | } | ||
| 1101 | |||
| 1102 | mmc_free_host(host->mmc); | ||
| 1103 | iounmap(host->base); | ||
| 1104 | } | ||
| 1105 | |||
| 1106 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | ||
| 1107 | if (res) | ||
| 1108 | release_mem_region(res->start, res->end - res->start + 1); | ||
| 1109 | platform_set_drvdata(pdev, NULL); | ||
| 1110 | |||
| 1111 | return 0; | ||
| 1112 | } | ||
| 1113 | |||
| 1114 | #ifdef CONFIG_PM | ||
| 1115 | static int omap_mmc_suspend(struct platform_device *pdev, pm_message_t state) | ||
| 1116 | { | ||
| 1117 | int ret = 0; | ||
| 1118 | struct mmc_omap_host *host = platform_get_drvdata(pdev); | ||
| 1119 | |||
| 1120 | if (host && host->suspended) | ||
| 1121 | return 0; | ||
| 1122 | |||
| 1123 | if (host) { | ||
| 1124 | ret = mmc_suspend_host(host->mmc, state); | ||
| 1125 | if (ret == 0) { | ||
| 1126 | host->suspended = 1; | ||
| 1127 | |||
| 1128 | OMAP_HSMMC_WRITE(host->base, ISE, 0); | ||
| 1129 | OMAP_HSMMC_WRITE(host->base, IE, 0); | ||
| 1130 | |||
| 1131 | if (host->pdata->suspend) { | ||
| 1132 | ret = host->pdata->suspend(&pdev->dev, | ||
| 1133 | host->slot_id); | ||
| 1134 | if (ret) | ||
| 1135 | dev_dbg(mmc_dev(host->mmc), | ||
| 1136 | "Unable to handle MMC board" | ||
| 1137 | " level suspend\n"); | ||
| 1138 | } | ||
| 1139 | |||
| 1140 | if (!(OMAP_HSMMC_READ(host->base, HCTL) & SDVSDET)) { | ||
| 1141 | OMAP_HSMMC_WRITE(host->base, HCTL, | ||
| 1142 | OMAP_HSMMC_READ(host->base, HCTL) | ||
| 1143 | & SDVSCLR); | ||
| 1144 | OMAP_HSMMC_WRITE(host->base, HCTL, | ||
| 1145 | OMAP_HSMMC_READ(host->base, HCTL) | ||
| 1146 | | SDVS30); | ||
| 1147 | OMAP_HSMMC_WRITE(host->base, HCTL, | ||
| 1148 | OMAP_HSMMC_READ(host->base, HCTL) | ||
| 1149 | | SDBP); | ||
| 1150 | } | ||
| 1151 | |||
| 1152 | clk_disable(host->fclk); | ||
| 1153 | clk_disable(host->iclk); | ||
| 1154 | clk_disable(host->dbclk); | ||
| 1155 | } | ||
| 1156 | |||
| 1157 | } | ||
| 1158 | return ret; | ||
| 1159 | } | ||
| 1160 | |||
| 1161 | /* Routine to resume the MMC device */ | ||
| 1162 | static int omap_mmc_resume(struct platform_device *pdev) | ||
| 1163 | { | ||
| 1164 | int ret = 0; | ||
| 1165 | struct mmc_omap_host *host = platform_get_drvdata(pdev); | ||
| 1166 | |||
| 1167 | if (host && !host->suspended) | ||
| 1168 | return 0; | ||
| 1169 | |||
| 1170 | if (host) { | ||
| 1171 | |||
| 1172 | ret = clk_enable(host->fclk); | ||
| 1173 | if (ret) | ||
| 1174 | goto clk_en_err; | ||
| 1175 | |||
| 1176 | ret = clk_enable(host->iclk); | ||
| 1177 | if (ret) { | ||
| 1178 | clk_disable(host->fclk); | ||
| 1179 | clk_put(host->fclk); | ||
| 1180 | goto clk_en_err; | ||
| 1181 | } | ||
| 1182 | |||
| 1183 | if (clk_enable(host->dbclk) != 0) | ||
| 1184 | dev_dbg(mmc_dev(host->mmc), | ||
| 1185 | "Enabling debounce clk failed\n"); | ||
| 1186 | |||
| 1187 | if (host->pdata->resume) { | ||
| 1188 | ret = host->pdata->resume(&pdev->dev, host->slot_id); | ||
| 1189 | if (ret) | ||
| 1190 | dev_dbg(mmc_dev(host->mmc), | ||
| 1191 | "Unmask interrupt failed\n"); | ||
| 1192 | } | ||
| 1193 | |||
| 1194 | /* Notify the core to resume the host */ | ||
| 1195 | ret = mmc_resume_host(host->mmc); | ||
| 1196 | if (ret == 0) | ||
| 1197 | host->suspended = 0; | ||
| 1198 | } | ||
| 1199 | |||
| 1200 | return ret; | ||
| 1201 | |||
| 1202 | clk_en_err: | ||
| 1203 | dev_dbg(mmc_dev(host->mmc), | ||
| 1204 | "Failed to enable MMC clocks during resume\n"); | ||
| 1205 | return ret; | ||
| 1206 | } | ||
| 1207 | |||
| 1208 | #else | ||
| 1209 | #define omap_mmc_suspend NULL | ||
| 1210 | #define omap_mmc_resume NULL | ||
| 1211 | #endif | ||
| 1212 | |||
| 1213 | static struct platform_driver omap_mmc_driver = { | ||
| 1214 | .probe = omap_mmc_probe, | ||
| 1215 | .remove = omap_mmc_remove, | ||
| 1216 | .suspend = omap_mmc_suspend, | ||
| 1217 | .resume = omap_mmc_resume, | ||
| 1218 | .driver = { | ||
| 1219 | .name = DRIVER_NAME, | ||
| 1220 | .owner = THIS_MODULE, | ||
| 1221 | }, | ||
| 1222 | }; | ||
| 1223 | |||
| 1224 | static int __init omap_mmc_init(void) | ||
| 1225 | { | ||
| 1226 | /* Register the MMC driver */ | ||
| 1227 | return platform_driver_register(&omap_mmc_driver); | ||
| 1228 | } | ||
| 1229 | |||
| 1230 | static void __exit omap_mmc_cleanup(void) | ||
| 1231 | { | ||
| 1232 | /* Unregister MMC driver */ | ||
| 1233 | platform_driver_unregister(&omap_mmc_driver); | ||
| 1234 | } | ||
| 1235 | |||
| 1236 | module_init(omap_mmc_init); | ||
| 1237 | module_exit(omap_mmc_cleanup); | ||
| 1238 | |||
| 1239 | MODULE_DESCRIPTION("OMAP High Speed Multimedia Card driver"); | ||
| 1240 | MODULE_LICENSE("GPL"); | ||
| 1241 | MODULE_ALIAS("platform:" DRIVER_NAME); | ||
| 1242 | MODULE_AUTHOR("Texas Instruments Inc"); | ||
diff --git a/drivers/mmc/host/s3cmci.c b/drivers/mmc/host/s3cmci.c index fcc98a4cce3c..35a98eec7414 100644 --- a/drivers/mmc/host/s3cmci.c +++ b/drivers/mmc/host/s3cmci.c | |||
| @@ -20,7 +20,7 @@ | |||
| 20 | #include <linux/irq.h> | 20 | #include <linux/irq.h> |
| 21 | #include <linux/io.h> | 21 | #include <linux/io.h> |
| 22 | 22 | ||
| 23 | #include <asm/dma.h> | 23 | #include <mach/dma.h> |
| 24 | 24 | ||
| 25 | #include <mach/regs-sdi.h> | 25 | #include <mach/regs-sdi.h> |
| 26 | #include <mach/regs-gpio.h> | 26 | #include <mach/regs-gpio.h> |
diff --git a/drivers/mtd/onenand/omap2.c b/drivers/mtd/onenand/omap2.c index 96ecc1766fa8..77a4f1446156 100644 --- a/drivers/mtd/onenand/omap2.c +++ b/drivers/mtd/onenand/omap2.c | |||
| @@ -629,7 +629,7 @@ static int __devinit omap2_onenand_probe(struct platform_device *pdev) | |||
| 629 | } | 629 | } |
| 630 | 630 | ||
| 631 | if (c->gpio_irq) { | 631 | if (c->gpio_irq) { |
| 632 | if ((r = omap_request_gpio(c->gpio_irq)) < 0) { | 632 | if ((r = gpio_request(c->gpio_irq, "OneNAND irq")) < 0) { |
| 633 | dev_err(&pdev->dev, "Failed to request GPIO%d for " | 633 | dev_err(&pdev->dev, "Failed to request GPIO%d for " |
| 634 | "OneNAND\n", c->gpio_irq); | 634 | "OneNAND\n", c->gpio_irq); |
| 635 | goto err_iounmap; | 635 | goto err_iounmap; |
| @@ -726,7 +726,7 @@ err_release_dma: | |||
| 726 | free_irq(gpio_to_irq(c->gpio_irq), c); | 726 | free_irq(gpio_to_irq(c->gpio_irq), c); |
| 727 | err_release_gpio: | 727 | err_release_gpio: |
| 728 | if (c->gpio_irq) | 728 | if (c->gpio_irq) |
| 729 | omap_free_gpio(c->gpio_irq); | 729 | gpio_free(c->gpio_irq); |
| 730 | err_iounmap: | 730 | err_iounmap: |
| 731 | iounmap(c->onenand.base); | 731 | iounmap(c->onenand.base); |
| 732 | err_release_mem_region: | 732 | err_release_mem_region: |
| @@ -761,7 +761,7 @@ static int __devexit omap2_onenand_remove(struct platform_device *pdev) | |||
| 761 | platform_set_drvdata(pdev, NULL); | 761 | platform_set_drvdata(pdev, NULL); |
| 762 | if (c->gpio_irq) { | 762 | if (c->gpio_irq) { |
| 763 | free_irq(gpio_to_irq(c->gpio_irq), c); | 763 | free_irq(gpio_to_irq(c->gpio_irq), c); |
| 764 | omap_free_gpio(c->gpio_irq); | 764 | gpio_free(c->gpio_irq); |
| 765 | } | 765 | } |
| 766 | iounmap(c->onenand.base); | 766 | iounmap(c->onenand.base); |
| 767 | release_mem_region(c->phys_base, ONENAND_IO_SIZE); | 767 | release_mem_region(c->phys_base, ONENAND_IO_SIZE); |
diff --git a/drivers/net/arm/am79c961a.c b/drivers/net/arm/am79c961a.c index 0c628a9e5339..c2d012fcc29b 100644 --- a/drivers/net/arm/am79c961a.c +++ b/drivers/net/arm/am79c961a.c | |||
| @@ -208,9 +208,9 @@ am79c961_init_for_open(struct net_device *dev) | |||
| 208 | /* | 208 | /* |
| 209 | * Stop the chip. | 209 | * Stop the chip. |
| 210 | */ | 210 | */ |
| 211 | spin_lock_irqsave(priv->chip_lock, flags); | 211 | spin_lock_irqsave(&priv->chip_lock, flags); |
| 212 | write_rreg (dev->base_addr, CSR0, CSR0_BABL|CSR0_CERR|CSR0_MISS|CSR0_MERR|CSR0_TINT|CSR0_RINT|CSR0_STOP); | 212 | write_rreg (dev->base_addr, CSR0, CSR0_BABL|CSR0_CERR|CSR0_MISS|CSR0_MERR|CSR0_TINT|CSR0_RINT|CSR0_STOP); |
| 213 | spin_unlock_irqrestore(priv->chip_lock, flags); | 213 | spin_unlock_irqrestore(&priv->chip_lock, flags); |
| 214 | 214 | ||
| 215 | write_ireg (dev->base_addr, 5, 0x00a0); /* Receive address LED */ | 215 | write_ireg (dev->base_addr, 5, 0x00a0); /* Receive address LED */ |
| 216 | write_ireg (dev->base_addr, 6, 0x0081); /* Collision LED */ | 216 | write_ireg (dev->base_addr, 6, 0x0081); /* Collision LED */ |
| @@ -332,10 +332,10 @@ am79c961_close(struct net_device *dev) | |||
| 332 | netif_stop_queue(dev); | 332 | netif_stop_queue(dev); |
| 333 | netif_carrier_off(dev); | 333 | netif_carrier_off(dev); |
| 334 | 334 | ||
| 335 | spin_lock_irqsave(priv->chip_lock, flags); | 335 | spin_lock_irqsave(&priv->chip_lock, flags); |
| 336 | write_rreg (dev->base_addr, CSR0, CSR0_STOP); | 336 | write_rreg (dev->base_addr, CSR0, CSR0_STOP); |
| 337 | write_rreg (dev->base_addr, CSR3, CSR3_MASKALL); | 337 | write_rreg (dev->base_addr, CSR3, CSR3_MASKALL); |
| 338 | spin_unlock_irqrestore(priv->chip_lock, flags); | 338 | spin_unlock_irqrestore(&priv->chip_lock, flags); |
| 339 | 339 | ||
| 340 | free_irq (dev->irq, dev); | 340 | free_irq (dev->irq, dev); |
| 341 | 341 | ||
| @@ -391,7 +391,7 @@ static void am79c961_setmulticastlist (struct net_device *dev) | |||
| 391 | am79c961_mc_hash(dmi, multi_hash); | 391 | am79c961_mc_hash(dmi, multi_hash); |
| 392 | } | 392 | } |
| 393 | 393 | ||
| 394 | spin_lock_irqsave(priv->chip_lock, flags); | 394 | spin_lock_irqsave(&priv->chip_lock, flags); |
| 395 | 395 | ||
| 396 | stopped = read_rreg(dev->base_addr, CSR0) & CSR0_STOP; | 396 | stopped = read_rreg(dev->base_addr, CSR0) & CSR0_STOP; |
| 397 | 397 | ||
| @@ -405,9 +405,9 @@ static void am79c961_setmulticastlist (struct net_device *dev) | |||
| 405 | * Spin waiting for chip to report suspend mode | 405 | * Spin waiting for chip to report suspend mode |
| 406 | */ | 406 | */ |
| 407 | while ((read_rreg(dev->base_addr, CTRL1) & CTRL1_SPND) == 0) { | 407 | while ((read_rreg(dev->base_addr, CTRL1) & CTRL1_SPND) == 0) { |
| 408 | spin_unlock_irqrestore(priv->chip_lock, flags); | 408 | spin_unlock_irqrestore(&priv->chip_lock, flags); |
| 409 | nop(); | 409 | nop(); |
| 410 | spin_lock_irqsave(priv->chip_lock, flags); | 410 | spin_lock_irqsave(&priv->chip_lock, flags); |
| 411 | } | 411 | } |
| 412 | } | 412 | } |
| 413 | 413 | ||
| @@ -429,7 +429,7 @@ static void am79c961_setmulticastlist (struct net_device *dev) | |||
| 429 | write_rreg(dev->base_addr, CTRL1, 0); | 429 | write_rreg(dev->base_addr, CTRL1, 0); |
| 430 | } | 430 | } |
| 431 | 431 | ||
| 432 | spin_unlock_irqrestore(priv->chip_lock, flags); | 432 | spin_unlock_irqrestore(&priv->chip_lock, flags); |
| 433 | } | 433 | } |
| 434 | 434 | ||
| 435 | static void am79c961_timeout(struct net_device *dev) | 435 | static void am79c961_timeout(struct net_device *dev) |
| @@ -467,10 +467,10 @@ am79c961_sendpacket(struct sk_buff *skb, struct net_device *dev) | |||
| 467 | am_writeword (dev, hdraddr + 2, TMD_OWN|TMD_STP|TMD_ENP); | 467 | am_writeword (dev, hdraddr + 2, TMD_OWN|TMD_STP|TMD_ENP); |
| 468 | priv->txhead = head; | 468 | priv->txhead = head; |
| 469 | 469 | ||
| 470 | spin_lock_irqsave(priv->chip_lock, flags); | 470 | spin_lock_irqsave(&priv->chip_lock, flags); |
| 471 | write_rreg (dev->base_addr, CSR0, CSR0_TDMD|CSR0_IENA); | 471 | write_rreg (dev->base_addr, CSR0, CSR0_TDMD|CSR0_IENA); |
| 472 | dev->trans_start = jiffies; | 472 | dev->trans_start = jiffies; |
| 473 | spin_unlock_irqrestore(priv->chip_lock, flags); | 473 | spin_unlock_irqrestore(&priv->chip_lock, flags); |
| 474 | 474 | ||
| 475 | /* | 475 | /* |
| 476 | * If the next packet is owned by the ethernet device, | 476 | * If the next packet is owned by the ethernet device, |
diff --git a/drivers/usb/host/ohci-omap.c b/drivers/usb/host/ohci-omap.c index 4bbddb73abd9..f3aaba35e912 100644 --- a/drivers/usb/host/ohci-omap.c +++ b/drivers/usb/host/ohci-omap.c | |||
| @@ -315,14 +315,14 @@ static int usb_hcd_omap_probe (const struct hc_driver *driver, | |||
| 315 | return -ENODEV; | 315 | return -ENODEV; |
| 316 | } | 316 | } |
| 317 | 317 | ||
| 318 | usb_host_ck = clk_get(0, "usb_hhc_ck"); | 318 | usb_host_ck = clk_get(&pdev->dev, "usb_hhc_ck"); |
| 319 | if (IS_ERR(usb_host_ck)) | 319 | if (IS_ERR(usb_host_ck)) |
| 320 | return PTR_ERR(usb_host_ck); | 320 | return PTR_ERR(usb_host_ck); |
| 321 | 321 | ||
| 322 | if (!cpu_is_omap15xx()) | 322 | if (!cpu_is_omap15xx()) |
| 323 | usb_dc_ck = clk_get(0, "usb_dc_ck"); | 323 | usb_dc_ck = clk_get(&pdev->dev, "usb_dc_ck"); |
| 324 | else | 324 | else |
| 325 | usb_dc_ck = clk_get(0, "lb_ck"); | 325 | usb_dc_ck = clk_get(&pdev->dev, "lb_ck"); |
| 326 | 326 | ||
| 327 | if (IS_ERR(usb_dc_ck)) { | 327 | if (IS_ERR(usb_dc_ck)) { |
| 328 | clk_put(usb_host_ck); | 328 | clk_put(usb_host_ck); |
diff --git a/drivers/video/omap/lcdc.c b/drivers/video/omap/lcdc.c index 6e2ea7518761..ab3949256677 100644 --- a/drivers/video/omap/lcdc.c +++ b/drivers/video/omap/lcdc.c | |||
| @@ -800,14 +800,14 @@ static int omap_lcdc_init(struct omapfb_device *fbdev, int ext_mode, | |||
| 800 | /* FIXME: | 800 | /* FIXME: |
| 801 | * According to errata some platforms have a clock rate limitiation | 801 | * According to errata some platforms have a clock rate limitiation |
| 802 | */ | 802 | */ |
| 803 | lcdc.lcd_ck = clk_get(NULL, "lcd_ck"); | 803 | lcdc.lcd_ck = clk_get(fbdev->dev, "lcd_ck"); |
| 804 | if (IS_ERR(lcdc.lcd_ck)) { | 804 | if (IS_ERR(lcdc.lcd_ck)) { |
| 805 | dev_err(fbdev->dev, "unable to access LCD clock\n"); | 805 | dev_err(fbdev->dev, "unable to access LCD clock\n"); |
| 806 | r = PTR_ERR(lcdc.lcd_ck); | 806 | r = PTR_ERR(lcdc.lcd_ck); |
| 807 | goto fail0; | 807 | goto fail0; |
| 808 | } | 808 | } |
| 809 | 809 | ||
| 810 | tc_ck = clk_get(NULL, "tc_ck"); | 810 | tc_ck = clk_get(fbdev->dev, "tc_ck"); |
| 811 | if (IS_ERR(tc_ck)) { | 811 | if (IS_ERR(tc_ck)) { |
| 812 | dev_err(fbdev->dev, "unable to access TC clock\n"); | 812 | dev_err(fbdev->dev, "unable to access TC clock\n"); |
| 813 | r = PTR_ERR(tc_ck); | 813 | r = PTR_ERR(tc_ck); |
diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig index 3efa12f9ee50..09a3d5522b43 100644 --- a/drivers/watchdog/Kconfig +++ b/drivers/watchdog/Kconfig | |||
| @@ -187,10 +187,10 @@ config EP93XX_WATCHDOG | |||
| 187 | 187 | ||
| 188 | config OMAP_WATCHDOG | 188 | config OMAP_WATCHDOG |
| 189 | tristate "OMAP Watchdog" | 189 | tristate "OMAP Watchdog" |
| 190 | depends on ARCH_OMAP16XX || ARCH_OMAP24XX | 190 | depends on ARCH_OMAP16XX || ARCH_OMAP24XX || ARCH_OMAP34XX |
| 191 | help | 191 | help |
| 192 | Support for TI OMAP1610/OMAP1710/OMAP2420 watchdog. Say 'Y' here to | 192 | Support for TI OMAP1610/OMAP1710/OMAP2420/OMAP3430 watchdog. Say 'Y' |
| 193 | enable the OMAP1610/OMAP1710 watchdog timer. | 193 | here to enable the OMAP1610/OMAP1710/OMAP2420/OMAP3430 watchdog timer. |
| 194 | 194 | ||
| 195 | config PNX4008_WATCHDOG | 195 | config PNX4008_WATCHDOG |
| 196 | tristate "PNX4008 Watchdog" | 196 | tristate "PNX4008 Watchdog" |
diff --git a/drivers/watchdog/at91rm9200_wdt.c b/drivers/watchdog/at91rm9200_wdt.c index 993e5f52afef..5531691f46ea 100644 --- a/drivers/watchdog/at91rm9200_wdt.c +++ b/drivers/watchdog/at91rm9200_wdt.c | |||
| @@ -13,6 +13,7 @@ | |||
| 13 | #include <linux/errno.h> | 13 | #include <linux/errno.h> |
| 14 | #include <linux/fs.h> | 14 | #include <linux/fs.h> |
| 15 | #include <linux/init.h> | 15 | #include <linux/init.h> |
| 16 | #include <linux/io.h> | ||
| 16 | #include <linux/kernel.h> | 17 | #include <linux/kernel.h> |
| 17 | #include <linux/miscdevice.h> | 18 | #include <linux/miscdevice.h> |
| 18 | #include <linux/module.h> | 19 | #include <linux/module.h> |
