diff options
| -rw-r--r-- | arch/arm/mach-mmp/mmp2.c | 21 | ||||
| -rw-r--r-- | arch/arm/mach-mmp/time.c | 21 |
2 files changed, 21 insertions, 21 deletions
diff --git a/arch/arm/mach-mmp/mmp2.c b/arch/arm/mach-mmp/mmp2.c index 7f5eb059bb01..b3fddacc7cb5 100644 --- a/arch/arm/mach-mmp/mmp2.c +++ b/arch/arm/mach-mmp/mmp2.c | |||
| @@ -17,6 +17,7 @@ | |||
| 17 | 17 | ||
| 18 | #include <asm/hardware/cache-tauros2.h> | 18 | #include <asm/hardware/cache-tauros2.h> |
| 19 | 19 | ||
| 20 | #include <asm/mach/time.h> | ||
| 20 | #include <mach/addr-map.h> | 21 | #include <mach/addr-map.h> |
| 21 | #include <mach/regs-apbc.h> | 22 | #include <mach/regs-apbc.h> |
| 22 | #include <mach/regs-apmu.h> | 23 | #include <mach/regs-apmu.h> |
| @@ -158,6 +159,26 @@ static int __init mmp2_init(void) | |||
| 158 | } | 159 | } |
| 159 | postcore_initcall(mmp2_init); | 160 | postcore_initcall(mmp2_init); |
| 160 | 161 | ||
| 162 | static void __init mmp2_timer_init(void) | ||
| 163 | { | ||
| 164 | unsigned long clk_rst; | ||
| 165 | |||
| 166 | __raw_writel(APBC_APBCLK | APBC_RST, APBC_MMP2_TIMERS); | ||
| 167 | |||
| 168 | /* | ||
| 169 | * enable bus/functional clock, enable 6.5MHz (divider 4), | ||
| 170 | * release reset | ||
| 171 | */ | ||
| 172 | clk_rst = APBC_APBCLK | APBC_FNCLK | APBC_FNCLKSEL(1); | ||
| 173 | __raw_writel(clk_rst, APBC_MMP2_TIMERS); | ||
| 174 | |||
| 175 | timer_init(IRQ_MMP2_TIMER1); | ||
| 176 | } | ||
| 177 | |||
| 178 | struct sys_timer mmp2_timer = { | ||
| 179 | .init = mmp2_timer_init, | ||
| 180 | }; | ||
| 181 | |||
| 161 | /* on-chip devices */ | 182 | /* on-chip devices */ |
| 162 | MMP2_DEVICE(uart1, "pxa2xx-uart", 0, UART1, 0xd4030000, 0x30, 4, 5); | 183 | MMP2_DEVICE(uart1, "pxa2xx-uart", 0, UART1, 0xd4030000, 0x30, 4, 5); |
| 163 | MMP2_DEVICE(uart2, "pxa2xx-uart", 1, UART2, 0xd4017000, 0x30, 20, 21); | 184 | MMP2_DEVICE(uart2, "pxa2xx-uart", 1, UART2, 0xd4017000, 0x30, 20, 21); |
diff --git a/arch/arm/mach-mmp/time.c b/arch/arm/mach-mmp/time.c index cf75694e9687..66528193f939 100644 --- a/arch/arm/mach-mmp/time.c +++ b/arch/arm/mach-mmp/time.c | |||
| @@ -200,24 +200,3 @@ void __init timer_init(int irq) | |||
| 200 | clocksource_register(&cksrc); | 200 | clocksource_register(&cksrc); |
| 201 | clockevents_register_device(&ckevt); | 201 | clockevents_register_device(&ckevt); |
| 202 | } | 202 | } |
| 203 | |||
| 204 | static void __init mmp2_timer_init(void) | ||
| 205 | { | ||
| 206 | unsigned long clk_rst; | ||
| 207 | |||
| 208 | __raw_writel(APBC_APBCLK | APBC_RST, APBC_MMP2_TIMERS); | ||
| 209 | |||
| 210 | /* | ||
| 211 | * enable bus/functional clock, enable 6.5MHz (divider 4), | ||
| 212 | * release reset | ||
| 213 | */ | ||
| 214 | clk_rst = APBC_APBCLK | APBC_FNCLK | APBC_FNCLKSEL(1); | ||
| 215 | __raw_writel(clk_rst, APBC_MMP2_TIMERS); | ||
| 216 | |||
| 217 | timer_init(IRQ_MMP2_TIMER1); | ||
| 218 | } | ||
| 219 | |||
| 220 | struct sys_timer mmp2_timer = { | ||
| 221 | .init = mmp2_timer_init, | ||
| 222 | }; | ||
| 223 | |||
