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-rw-r--r--arch/powerpc/kernel/Makefile2
-rw-r--r--arch/powerpc/kernel/cputable.c (renamed from arch/ppc/kernel/cputable.c)413
-rw-r--r--arch/ppc/kernel/Makefile4
-rw-r--r--arch/ppc64/kernel/Makefile85
-rw-r--r--arch/ppc64/kernel/cputable.c260
-rw-r--r--include/asm-powerpc/cputable.h3
6 files changed, 329 insertions, 438 deletions
diff --git a/arch/powerpc/kernel/Makefile b/arch/powerpc/kernel/Makefile
index 931795380978..f03f6d4ffaa6 100644
--- a/arch/powerpc/kernel/Makefile
+++ b/arch/powerpc/kernel/Makefile
@@ -10,7 +10,7 @@ CFLAGS_prom_init.o += -fPIC
10CFLAGS_btext.o += -fPIC 10CFLAGS_btext.o += -fPIC
11endif 11endif
12 12
13obj-y := semaphore.o 13obj-y := semaphore.o cputable.o
14obj-$(CONFIG_ALTIVEC) += vecemu.o vector.o 14obj-$(CONFIG_ALTIVEC) += vecemu.o vector.o
15obj-$(CONFIG_POWER4) += idle_power4.o 15obj-$(CONFIG_POWER4) += idle_power4.o
16 16
diff --git a/arch/ppc/kernel/cputable.c b/arch/powerpc/kernel/cputable.c
index 207d4dd059d9..214f3b088edf 100644
--- a/arch/ppc/kernel/cputable.c
+++ b/arch/powerpc/kernel/cputable.c
@@ -1,8 +1,9 @@
1/* 1/*
2 * arch/ppc/kernel/cputable.c
3 *
4 * Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org) 2 * Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org)
5 * 3 *
4 * Modifications for ppc64:
5 * Copyright (C) 2003 Dave Engebretsen <engebret@us.ibm.com>
6 *
6 * This program is free software; you can redistribute it and/or 7 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License 8 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 9 * as published by the Free Software Foundation; either version
@@ -20,7 +21,22 @@
20#include <asm/cputable.h> 21#include <asm/cputable.h>
21 22
22struct cpu_spec* cur_cpu_spec = NULL; 23struct cpu_spec* cur_cpu_spec = NULL;
24#ifdef CONFIG_PPC64
25EXPORT_SYMBOL(cur_cpu_spec);
26#endif
23 27
28/* NOTE:
29 * Unlike ppc32, ppc64 will only call this once for the boot CPU, it's
30 * the responsibility of the appropriate CPU save/restore functions to
31 * eventually copy these settings over. Those save/restore aren't yet
32 * part of the cputable though. That has to be fixed for both ppc32
33 * and ppc64
34 */
35#ifdef CONFIG_PPC64
36extern void __setup_cpu_power3(unsigned long offset, struct cpu_spec* spec);
37extern void __setup_cpu_power4(unsigned long offset, struct cpu_spec* spec);
38extern void __setup_cpu_be(unsigned long offset, struct cpu_spec* spec);
39#else
24extern void __setup_cpu_603(unsigned long offset, struct cpu_spec* spec); 40extern void __setup_cpu_603(unsigned long offset, struct cpu_spec* spec);
25extern void __setup_cpu_604(unsigned long offset, struct cpu_spec* spec); 41extern void __setup_cpu_604(unsigned long offset, struct cpu_spec* spec);
26extern void __setup_cpu_750(unsigned long offset, struct cpu_spec* spec); 42extern void __setup_cpu_750(unsigned long offset, struct cpu_spec* spec);
@@ -29,35 +45,264 @@ extern void __setup_cpu_750fx(unsigned long offset, struct cpu_spec* spec);
29extern void __setup_cpu_7400(unsigned long offset, struct cpu_spec* spec); 45extern void __setup_cpu_7400(unsigned long offset, struct cpu_spec* spec);
30extern void __setup_cpu_7410(unsigned long offset, struct cpu_spec* spec); 46extern void __setup_cpu_7410(unsigned long offset, struct cpu_spec* spec);
31extern void __setup_cpu_745x(unsigned long offset, struct cpu_spec* spec); 47extern void __setup_cpu_745x(unsigned long offset, struct cpu_spec* spec);
48#endif /* CONFIG_PPC32 */
32extern void __setup_cpu_ppc970(unsigned long offset, struct cpu_spec* spec); 49extern void __setup_cpu_ppc970(unsigned long offset, struct cpu_spec* spec);
33 50
34#define CLASSIC_PPC (!defined(CONFIG_8xx) && !defined(CONFIG_4xx) && \
35 !defined(CONFIG_POWER3) && !defined(CONFIG_POWER4) && \
36 !defined(CONFIG_BOOKE))
37
38/* This table only contains "desktop" CPUs, it need to be filled with embedded 51/* This table only contains "desktop" CPUs, it need to be filled with embedded
39 * ones as well... 52 * ones as well...
40 */ 53 */
41#define COMMON_PPC (PPC_FEATURE_32 | PPC_FEATURE_HAS_FPU | \ 54#define COMMON_USER (PPC_FEATURE_32 | PPC_FEATURE_HAS_FPU | \
42 PPC_FEATURE_HAS_MMU) 55 PPC_FEATURE_HAS_MMU)
56#define COMMON_USER_PPC64 (COMMON_USER | PPC_FEATURE_64)
57
43 58
44/* We only set the spe features if the kernel was compiled with 59/* We only set the spe features if the kernel was compiled with
45 * spe support 60 * spe support
46 */ 61 */
47#ifdef CONFIG_SPE 62#ifdef CONFIG_SPE
48#define PPC_FEATURE_SPE_COMP PPC_FEATURE_HAS_SPE 63#define PPC_FEATURE_SPE_COMP PPC_FEATURE_HAS_SPE
49#else 64#else
50#define PPC_FEATURE_SPE_COMP 0 65#define PPC_FEATURE_SPE_COMP 0
51#endif 66#endif
52 67
53struct cpu_spec cpu_specs[] = { 68struct cpu_spec cpu_specs[] = {
69#ifdef CONFIG_PPC64
70 { /* Power3 */
71 .pvr_mask = 0xffff0000,
72 .pvr_value = 0x00400000,
73 .cpu_name = "POWER3 (630)",
74 .cpu_features = CPU_FTRS_POWER3,
75 .cpu_user_features = COMMON_USER_PPC64,
76 .icache_bsize = 128,
77 .dcache_bsize = 128,
78 .num_pmcs = 8,
79 .cpu_setup = __setup_cpu_power3,
80#ifdef CONFIG_OPROFILE
81 .oprofile_cpu_type = "ppc64/power3",
82 .oprofile_model = &op_model_rs64,
83#endif
84 },
85 { /* Power3+ */
86 .pvr_mask = 0xffff0000,
87 .pvr_value = 0x00410000,
88 .cpu_name = "POWER3 (630+)",
89 .cpu_features = CPU_FTRS_POWER3,
90 .cpu_user_features = COMMON_USER_PPC64,
91 .icache_bsize = 128,
92 .dcache_bsize = 128,
93 .num_pmcs = 8,
94 .cpu_setup = __setup_cpu_power3,
95#ifdef CONFIG_OPROFILE
96 .oprofile_cpu_type = "ppc64/power3",
97 .oprofile_model = &op_model_rs64,
98#endif
99 },
100 { /* Northstar */
101 .pvr_mask = 0xffff0000,
102 .pvr_value = 0x00330000,
103 .cpu_name = "RS64-II (northstar)",
104 .cpu_features = CPU_FTRS_RS64,
105 .cpu_user_features = COMMON_USER_PPC64,
106 .icache_bsize = 128,
107 .dcache_bsize = 128,
108 .num_pmcs = 8,
109 .cpu_setup = __setup_cpu_power3,
110#ifdef CONFIG_OPROFILE
111 .oprofile_cpu_type = "ppc64/rs64",
112 .oprofile_model = &op_model_rs64,
113#endif
114 },
115 { /* Pulsar */
116 .pvr_mask = 0xffff0000,
117 .pvr_value = 0x00340000,
118 .cpu_name = "RS64-III (pulsar)",
119 .cpu_features = CPU_FTRS_RS64,
120 .cpu_user_features = COMMON_USER_PPC64,
121 .icache_bsize = 128,
122 .dcache_bsize = 128,
123 .num_pmcs = 8,
124 .cpu_setup = __setup_cpu_power3,
125#ifdef CONFIG_OPROFILE
126 .oprofile_cpu_type = "ppc64/rs64",
127 .oprofile_model = &op_model_rs64,
128#endif
129 },
130 { /* I-star */
131 .pvr_mask = 0xffff0000,
132 .pvr_value = 0x00360000,
133 .cpu_name = "RS64-III (icestar)",
134 .cpu_features = CPU_FTRS_RS64,
135 .cpu_user_features = COMMON_USER_PPC64,
136 .icache_bsize = 128,
137 .dcache_bsize = 128,
138 .num_pmcs = 8,
139 .cpu_setup = __setup_cpu_power3,
140#ifdef CONFIG_OPROFILE
141 .oprofile_cpu_type = "ppc64/rs64",
142 .oprofile_model = &op_model_rs64,
143#endif
144 },
145 { /* S-star */
146 .pvr_mask = 0xffff0000,
147 .pvr_value = 0x00370000,
148 .cpu_name = "RS64-IV (sstar)",
149 .cpu_features = CPU_FTRS_RS64,
150 .cpu_user_features = COMMON_USER_PPC64,
151 .icache_bsize = 128,
152 .dcache_bsize = 128,
153 .num_pmcs = 8,
154 .cpu_setup = __setup_cpu_power3,
155#ifdef CONFIG_OPROFILE
156 .oprofile_cpu_type = "ppc64/rs64",
157 .oprofile_model = &op_model_rs64,
158#endif
159 },
160 { /* Power4 */
161 .pvr_mask = 0xffff0000,
162 .pvr_value = 0x00350000,
163 .cpu_name = "POWER4 (gp)",
164 .cpu_features = CPU_FTRS_POWER4,
165 .cpu_user_features = COMMON_USER_PPC64,
166 .icache_bsize = 128,
167 .dcache_bsize = 128,
168 .num_pmcs = 8,
169 .cpu_setup = __setup_cpu_power4,
170#ifdef CONFIG_OPROFILE
171 .oprofile_cpu_type = "ppc64/power4",
172 .oprofile_model = &op_model_rs64,
173#endif
174 },
175 { /* Power4+ */
176 .pvr_mask = 0xffff0000,
177 .pvr_value = 0x00380000,
178 .cpu_name = "POWER4+ (gq)",
179 .cpu_features = CPU_FTRS_POWER4,
180 .cpu_user_features = COMMON_USER_PPC64,
181 .icache_bsize = 128,
182 .dcache_bsize = 128,
183 .num_pmcs = 8,
184 .cpu_setup = __setup_cpu_power4,
185#ifdef CONFIG_OPROFILE
186 .oprofile_cpu_type = "ppc64/power4",
187 .oprofile_model = &op_model_power4,
188#endif
189 },
190 { /* PPC970 */
191 .pvr_mask = 0xffff0000,
192 .pvr_value = 0x00390000,
193 .cpu_name = "PPC970",
194 .cpu_features = CPU_FTRS_PPC970,
195 .cpu_user_features = COMMON_USER_PPC64 |
196 PPC_FEATURE_HAS_ALTIVEC_COMP,
197 .icache_bsize = 128,
198 .dcache_bsize = 128,
199 .num_pmcs = 8,
200 .cpu_setup = __setup_cpu_ppc970,
201#ifdef CONFIG_OPROFILE
202 .oprofile_cpu_type = "ppc64/970",
203 .oprofile_model = &op_model_power4,
204#endif
205 },
206#endif /* CONFIG_PPC64 */
207#if defined(CONFIG_PPC64) || defined(CONFIG_POWER4)
208 { /* PPC970FX */
209 .pvr_mask = 0xffff0000,
210 .pvr_value = 0x003c0000,
211 .cpu_name = "PPC970FX",
212#ifdef CONFIG_PPC32
213 .cpu_features = CPU_FTRS_970_32,
214#else
215 .cpu_features = CPU_FTRS_PPC970,
216#endif
217 .cpu_user_features = COMMON_USER_PPC64 |
218 PPC_FEATURE_HAS_ALTIVEC_COMP,
219 .icache_bsize = 128,
220 .dcache_bsize = 128,
221 .num_pmcs = 8,
222 .cpu_setup = __setup_cpu_ppc970,
223#ifdef CONFIG_OPROFILE
224 .oprofile_cpu_type = "ppc64/970",
225 .oprofile_model = &op_model_power4,
226#endif
227 },
228#endif /* defined(CONFIG_PPC64) || defined(CONFIG_POWER4) */
229#ifdef CONFIG_PPC64
230 { /* PPC970MP */
231 .pvr_mask = 0xffff0000,
232 .pvr_value = 0x00440000,
233 .cpu_name = "PPC970MP",
234 .cpu_features = CPU_FTRS_PPC970,
235 .cpu_user_features = COMMON_USER_PPC64 |
236 PPC_FEATURE_HAS_ALTIVEC_COMP,
237 .icache_bsize = 128,
238 .dcache_bsize = 128,
239 .cpu_setup = __setup_cpu_ppc970,
240#ifdef CONFIG_OPROFILE
241 .oprofile_cpu_type = "ppc64/970",
242 .oprofile_model = &op_model_power4,
243#endif
244 },
245 { /* Power5 */
246 .pvr_mask = 0xffff0000,
247 .pvr_value = 0x003a0000,
248 .cpu_name = "POWER5 (gr)",
249 .cpu_features = CPU_FTRS_POWER5,
250 .cpu_user_features = COMMON_USER_PPC64,
251 .icache_bsize = 128,
252 .dcache_bsize = 128,
253 .num_pmcs = 6,
254 .cpu_setup = __setup_cpu_power4,
255#ifdef CONFIG_OPROFILE
256 .oprofile_cpu_type = "ppc64/power5",
257 .oprofile_model = &op_model_power4,
258#endif
259 },
260 { /* Power5 */
261 .pvr_mask = 0xffff0000,
262 .pvr_value = 0x003b0000,
263 .cpu_name = "POWER5 (gs)",
264 .cpu_features = CPU_FTRS_POWER5,
265 .cpu_user_features = COMMON_USER_PPC64,
266 .icache_bsize = 128,
267 .dcache_bsize = 128,
268 .num_pmcs = 6,
269 .cpu_setup = __setup_cpu_power4,
270#ifdef CONFIG_OPROFILE
271 .oprofile_cpu_type = "ppc64/power5",
272 .oprofile_model = &op_model_power4,
273#endif
274 },
275 { /* BE DD1.x */
276 .pvr_mask = 0xffff0000,
277 .pvr_value = 0x00700000,
278 .cpu_name = "Cell Broadband Engine",
279 .cpu_features = CPU_FTRS_CELL,
280 .cpu_user_features = COMMON_USER_PPC64 |
281 PPC_FEATURE_HAS_ALTIVEC_COMP,
282 .icache_bsize = 128,
283 .dcache_bsize = 128,
284 .cpu_setup = __setup_cpu_be,
285 },
286 { /* default match */
287 .pvr_mask = 0x00000000,
288 .pvr_value = 0x00000000,
289 .cpu_name = "POWER4 (compatible)",
290 .cpu_features = CPU_FTRS_COMPATIBLE,
291 .cpu_user_features = COMMON_USER_PPC64,
292 .icache_bsize = 128,
293 .dcache_bsize = 128,
294 .num_pmcs = 6,
295 .cpu_setup = __setup_cpu_power4,
296 }
297#endif /* CONFIG_PPC64 */
298#ifdef CONFIG_PPC32
54#if CLASSIC_PPC 299#if CLASSIC_PPC
55 { /* 601 */ 300 { /* 601 */
56 .pvr_mask = 0xffff0000, 301 .pvr_mask = 0xffff0000,
57 .pvr_value = 0x00010000, 302 .pvr_value = 0x00010000,
58 .cpu_name = "601", 303 .cpu_name = "601",
59 .cpu_features = CPU_FTRS_PPC601, 304 .cpu_features = CPU_FTRS_PPC601,
60 .cpu_user_features = COMMON_PPC | PPC_FEATURE_601_INSTR | 305 .cpu_user_features = COMMON_USER | PPC_FEATURE_601_INSTR |
61 PPC_FEATURE_UNIFIED_CACHE, 306 PPC_FEATURE_UNIFIED_CACHE,
62 .icache_bsize = 32, 307 .icache_bsize = 32,
63 .dcache_bsize = 32, 308 .dcache_bsize = 32,
@@ -67,7 +312,7 @@ struct cpu_spec cpu_specs[] = {
67 .pvr_value = 0x00030000, 312 .pvr_value = 0x00030000,
68 .cpu_name = "603", 313 .cpu_name = "603",
69 .cpu_features = CPU_FTRS_603, 314 .cpu_features = CPU_FTRS_603,
70 .cpu_user_features = COMMON_PPC, 315 .cpu_user_features = COMMON_USER,
71 .icache_bsize = 32, 316 .icache_bsize = 32,
72 .dcache_bsize = 32, 317 .dcache_bsize = 32,
73 .cpu_setup = __setup_cpu_603 318 .cpu_setup = __setup_cpu_603
@@ -77,7 +322,7 @@ struct cpu_spec cpu_specs[] = {
77 .pvr_value = 0x00060000, 322 .pvr_value = 0x00060000,
78 .cpu_name = "603e", 323 .cpu_name = "603e",
79 .cpu_features = CPU_FTRS_603, 324 .cpu_features = CPU_FTRS_603,
80 .cpu_user_features = COMMON_PPC, 325 .cpu_user_features = COMMON_USER,
81 .icache_bsize = 32, 326 .icache_bsize = 32,
82 .dcache_bsize = 32, 327 .dcache_bsize = 32,
83 .cpu_setup = __setup_cpu_603 328 .cpu_setup = __setup_cpu_603
@@ -87,7 +332,7 @@ struct cpu_spec cpu_specs[] = {
87 .pvr_value = 0x00070000, 332 .pvr_value = 0x00070000,
88 .cpu_name = "603ev", 333 .cpu_name = "603ev",
89 .cpu_features = CPU_FTRS_603, 334 .cpu_features = CPU_FTRS_603,
90 .cpu_user_features = COMMON_PPC, 335 .cpu_user_features = COMMON_USER,
91 .icache_bsize = 32, 336 .icache_bsize = 32,
92 .dcache_bsize = 32, 337 .dcache_bsize = 32,
93 .cpu_setup = __setup_cpu_603 338 .cpu_setup = __setup_cpu_603
@@ -97,7 +342,7 @@ struct cpu_spec cpu_specs[] = {
97 .pvr_value = 0x00040000, 342 .pvr_value = 0x00040000,
98 .cpu_name = "604", 343 .cpu_name = "604",
99 .cpu_features = CPU_FTRS_604, 344 .cpu_features = CPU_FTRS_604,
100 .cpu_user_features = COMMON_PPC, 345 .cpu_user_features = COMMON_USER,
101 .icache_bsize = 32, 346 .icache_bsize = 32,
102 .dcache_bsize = 32, 347 .dcache_bsize = 32,
103 .num_pmcs = 2, 348 .num_pmcs = 2,
@@ -108,7 +353,7 @@ struct cpu_spec cpu_specs[] = {
108 .pvr_value = 0x00090000, 353 .pvr_value = 0x00090000,
109 .cpu_name = "604e", 354 .cpu_name = "604e",
110 .cpu_features = CPU_FTRS_604, 355 .cpu_features = CPU_FTRS_604,
111 .cpu_user_features = COMMON_PPC, 356 .cpu_user_features = COMMON_USER,
112 .icache_bsize = 32, 357 .icache_bsize = 32,
113 .dcache_bsize = 32, 358 .dcache_bsize = 32,
114 .num_pmcs = 4, 359 .num_pmcs = 4,
@@ -119,7 +364,7 @@ struct cpu_spec cpu_specs[] = {
119 .pvr_value = 0x00090000, 364 .pvr_value = 0x00090000,
120 .cpu_name = "604r", 365 .cpu_name = "604r",
121 .cpu_features = CPU_FTRS_604, 366 .cpu_features = CPU_FTRS_604,
122 .cpu_user_features = COMMON_PPC, 367 .cpu_user_features = COMMON_USER,
123 .icache_bsize = 32, 368 .icache_bsize = 32,
124 .dcache_bsize = 32, 369 .dcache_bsize = 32,
125 .num_pmcs = 4, 370 .num_pmcs = 4,
@@ -130,7 +375,7 @@ struct cpu_spec cpu_specs[] = {
130 .pvr_value = 0x000a0000, 375 .pvr_value = 0x000a0000,
131 .cpu_name = "604ev", 376 .cpu_name = "604ev",
132 .cpu_features = CPU_FTRS_604, 377 .cpu_features = CPU_FTRS_604,
133 .cpu_user_features = COMMON_PPC, 378 .cpu_user_features = COMMON_USER,
134 .icache_bsize = 32, 379 .icache_bsize = 32,
135 .dcache_bsize = 32, 380 .dcache_bsize = 32,
136 .num_pmcs = 4, 381 .num_pmcs = 4,
@@ -141,7 +386,7 @@ struct cpu_spec cpu_specs[] = {
141 .pvr_value = 0x00084202, 386 .pvr_value = 0x00084202,
142 .cpu_name = "740/750", 387 .cpu_name = "740/750",
143 .cpu_features = CPU_FTRS_740_NOTAU, 388 .cpu_features = CPU_FTRS_740_NOTAU,
144 .cpu_user_features = COMMON_PPC, 389 .cpu_user_features = COMMON_USER,
145 .icache_bsize = 32, 390 .icache_bsize = 32,
146 .dcache_bsize = 32, 391 .dcache_bsize = 32,
147 .num_pmcs = 4, 392 .num_pmcs = 4,
@@ -152,7 +397,7 @@ struct cpu_spec cpu_specs[] = {
152 .pvr_value = 0x00080100, 397 .pvr_value = 0x00080100,
153 .cpu_name = "750CX", 398 .cpu_name = "750CX",
154 .cpu_features = CPU_FTRS_750, 399 .cpu_features = CPU_FTRS_750,
155 .cpu_user_features = COMMON_PPC, 400 .cpu_user_features = COMMON_USER,
156 .icache_bsize = 32, 401 .icache_bsize = 32,
157 .dcache_bsize = 32, 402 .dcache_bsize = 32,
158 .num_pmcs = 4, 403 .num_pmcs = 4,
@@ -163,7 +408,7 @@ struct cpu_spec cpu_specs[] = {
163 .pvr_value = 0x00082200, 408 .pvr_value = 0x00082200,
164 .cpu_name = "750CX", 409 .cpu_name = "750CX",
165 .cpu_features = CPU_FTRS_750, 410 .cpu_features = CPU_FTRS_750,
166 .cpu_user_features = COMMON_PPC, 411 .cpu_user_features = COMMON_USER,
167 .icache_bsize = 32, 412 .icache_bsize = 32,
168 .dcache_bsize = 32, 413 .dcache_bsize = 32,
169 .num_pmcs = 4, 414 .num_pmcs = 4,
@@ -174,7 +419,7 @@ struct cpu_spec cpu_specs[] = {
174 .pvr_value = 0x00082210, 419 .pvr_value = 0x00082210,
175 .cpu_name = "750CXe", 420 .cpu_name = "750CXe",
176 .cpu_features = CPU_FTRS_750, 421 .cpu_features = CPU_FTRS_750,
177 .cpu_user_features = COMMON_PPC, 422 .cpu_user_features = COMMON_USER,
178 .icache_bsize = 32, 423 .icache_bsize = 32,
179 .dcache_bsize = 32, 424 .dcache_bsize = 32,
180 .num_pmcs = 4, 425 .num_pmcs = 4,
@@ -185,7 +430,7 @@ struct cpu_spec cpu_specs[] = {
185 .pvr_value = 0x00083214, 430 .pvr_value = 0x00083214,
186 .cpu_name = "750CXe", 431 .cpu_name = "750CXe",
187 .cpu_features = CPU_FTRS_750, 432 .cpu_features = CPU_FTRS_750,
188 .cpu_user_features = COMMON_PPC, 433 .cpu_user_features = COMMON_USER,
189 .icache_bsize = 32, 434 .icache_bsize = 32,
190 .dcache_bsize = 32, 435 .dcache_bsize = 32,
191 .num_pmcs = 4, 436 .num_pmcs = 4,
@@ -196,7 +441,7 @@ struct cpu_spec cpu_specs[] = {
196 .pvr_value = 0x00083000, 441 .pvr_value = 0x00083000,
197 .cpu_name = "745/755", 442 .cpu_name = "745/755",
198 .cpu_features = CPU_FTRS_750, 443 .cpu_features = CPU_FTRS_750,
199 .cpu_user_features = COMMON_PPC, 444 .cpu_user_features = COMMON_USER,
200 .icache_bsize = 32, 445 .icache_bsize = 32,
201 .dcache_bsize = 32, 446 .dcache_bsize = 32,
202 .num_pmcs = 4, 447 .num_pmcs = 4,
@@ -207,7 +452,7 @@ struct cpu_spec cpu_specs[] = {
207 .pvr_value = 0x70000100, 452 .pvr_value = 0x70000100,
208 .cpu_name = "750FX", 453 .cpu_name = "750FX",
209 .cpu_features = CPU_FTRS_750FX1, 454 .cpu_features = CPU_FTRS_750FX1,
210 .cpu_user_features = COMMON_PPC, 455 .cpu_user_features = COMMON_USER,
211 .icache_bsize = 32, 456 .icache_bsize = 32,
212 .dcache_bsize = 32, 457 .dcache_bsize = 32,
213 .num_pmcs = 4, 458 .num_pmcs = 4,
@@ -218,7 +463,7 @@ struct cpu_spec cpu_specs[] = {
218 .pvr_value = 0x70000200, 463 .pvr_value = 0x70000200,
219 .cpu_name = "750FX", 464 .cpu_name = "750FX",
220 .cpu_features = CPU_FTRS_750FX2, 465 .cpu_features = CPU_FTRS_750FX2,
221 .cpu_user_features = COMMON_PPC, 466 .cpu_user_features = COMMON_USER,
222 .icache_bsize = 32, 467 .icache_bsize = 32,
223 .dcache_bsize = 32, 468 .dcache_bsize = 32,
224 .num_pmcs = 4, 469 .num_pmcs = 4,
@@ -229,7 +474,7 @@ struct cpu_spec cpu_specs[] = {
229 .pvr_value = 0x70000000, 474 .pvr_value = 0x70000000,
230 .cpu_name = "750FX", 475 .cpu_name = "750FX",
231 .cpu_features = CPU_FTRS_750FX, 476 .cpu_features = CPU_FTRS_750FX,
232 .cpu_user_features = COMMON_PPC, 477 .cpu_user_features = COMMON_USER,
233 .icache_bsize = 32, 478 .icache_bsize = 32,
234 .dcache_bsize = 32, 479 .dcache_bsize = 32,
235 .num_pmcs = 4, 480 .num_pmcs = 4,
@@ -240,7 +485,7 @@ struct cpu_spec cpu_specs[] = {
240 .pvr_value = 0x70020000, 485 .pvr_value = 0x70020000,
241 .cpu_name = "750GX", 486 .cpu_name = "750GX",
242 .cpu_features = CPU_FTRS_750GX, 487 .cpu_features = CPU_FTRS_750GX,
243 .cpu_user_features = COMMON_PPC, 488 .cpu_user_features = COMMON_USER,
244 .icache_bsize = 32, 489 .icache_bsize = 32,
245 .dcache_bsize = 32, 490 .dcache_bsize = 32,
246 .num_pmcs = 4, 491 .num_pmcs = 4,
@@ -251,7 +496,7 @@ struct cpu_spec cpu_specs[] = {
251 .pvr_value = 0x00080000, 496 .pvr_value = 0x00080000,
252 .cpu_name = "740/750", 497 .cpu_name = "740/750",
253 .cpu_features = CPU_FTRS_740, 498 .cpu_features = CPU_FTRS_740,
254 .cpu_user_features = COMMON_PPC, 499 .cpu_user_features = COMMON_USER,
255 .icache_bsize = 32, 500 .icache_bsize = 32,
256 .dcache_bsize = 32, 501 .dcache_bsize = 32,
257 .num_pmcs = 4, 502 .num_pmcs = 4,
@@ -262,7 +507,7 @@ struct cpu_spec cpu_specs[] = {
262 .pvr_value = 0x000c1101, 507 .pvr_value = 0x000c1101,
263 .cpu_name = "7400 (1.1)", 508 .cpu_name = "7400 (1.1)",
264 .cpu_features = CPU_FTRS_7400_NOTAU, 509 .cpu_features = CPU_FTRS_7400_NOTAU,
265 .cpu_user_features = COMMON_PPC | PPC_FEATURE_HAS_ALTIVEC_COMP, 510 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP,
266 .icache_bsize = 32, 511 .icache_bsize = 32,
267 .dcache_bsize = 32, 512 .dcache_bsize = 32,
268 .num_pmcs = 4, 513 .num_pmcs = 4,
@@ -273,7 +518,7 @@ struct cpu_spec cpu_specs[] = {
273 .pvr_value = 0x000c0000, 518 .pvr_value = 0x000c0000,
274 .cpu_name = "7400", 519 .cpu_name = "7400",
275 .cpu_features = CPU_FTRS_7400, 520 .cpu_features = CPU_FTRS_7400,
276 .cpu_user_features = COMMON_PPC | PPC_FEATURE_HAS_ALTIVEC_COMP, 521 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP,
277 .icache_bsize = 32, 522 .icache_bsize = 32,
278 .dcache_bsize = 32, 523 .dcache_bsize = 32,
279 .num_pmcs = 4, 524 .num_pmcs = 4,
@@ -284,7 +529,7 @@ struct cpu_spec cpu_specs[] = {
284 .pvr_value = 0x800c0000, 529 .pvr_value = 0x800c0000,
285 .cpu_name = "7410", 530 .cpu_name = "7410",
286 .cpu_features = CPU_FTRS_7400, 531 .cpu_features = CPU_FTRS_7400,
287 .cpu_user_features = COMMON_PPC | PPC_FEATURE_HAS_ALTIVEC_COMP, 532 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP,
288 .icache_bsize = 32, 533 .icache_bsize = 32,
289 .dcache_bsize = 32, 534 .dcache_bsize = 32,
290 .num_pmcs = 4, 535 .num_pmcs = 4,
@@ -295,7 +540,7 @@ struct cpu_spec cpu_specs[] = {
295 .pvr_value = 0x80000200, 540 .pvr_value = 0x80000200,
296 .cpu_name = "7450", 541 .cpu_name = "7450",
297 .cpu_features = CPU_FTRS_7450_20, 542 .cpu_features = CPU_FTRS_7450_20,
298 .cpu_user_features = COMMON_PPC | PPC_FEATURE_HAS_ALTIVEC_COMP, 543 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP,
299 .icache_bsize = 32, 544 .icache_bsize = 32,
300 .dcache_bsize = 32, 545 .dcache_bsize = 32,
301 .num_pmcs = 6, 546 .num_pmcs = 6,
@@ -306,7 +551,7 @@ struct cpu_spec cpu_specs[] = {
306 .pvr_value = 0x80000201, 551 .pvr_value = 0x80000201,
307 .cpu_name = "7450", 552 .cpu_name = "7450",
308 .cpu_features = CPU_FTRS_7450_21, 553 .cpu_features = CPU_FTRS_7450_21,
309 .cpu_user_features = COMMON_PPC | PPC_FEATURE_HAS_ALTIVEC_COMP, 554 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP,
310 .icache_bsize = 32, 555 .icache_bsize = 32,
311 .dcache_bsize = 32, 556 .dcache_bsize = 32,
312 .num_pmcs = 6, 557 .num_pmcs = 6,
@@ -317,7 +562,7 @@ struct cpu_spec cpu_specs[] = {
317 .pvr_value = 0x80000000, 562 .pvr_value = 0x80000000,
318 .cpu_name = "7450", 563 .cpu_name = "7450",
319 .cpu_features = CPU_FTRS_7450_23, 564 .cpu_features = CPU_FTRS_7450_23,
320 .cpu_user_features = COMMON_PPC | PPC_FEATURE_HAS_ALTIVEC_COMP, 565 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP,
321 .icache_bsize = 32, 566 .icache_bsize = 32,
322 .dcache_bsize = 32, 567 .dcache_bsize = 32,
323 .num_pmcs = 6, 568 .num_pmcs = 6,
@@ -328,7 +573,7 @@ struct cpu_spec cpu_specs[] = {
328 .pvr_value = 0x80010100, 573 .pvr_value = 0x80010100,
329 .cpu_name = "7455", 574 .cpu_name = "7455",
330 .cpu_features = CPU_FTRS_7455_1, 575 .cpu_features = CPU_FTRS_7455_1,
331 .cpu_user_features = COMMON_PPC | PPC_FEATURE_HAS_ALTIVEC_COMP, 576 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP,
332 .icache_bsize = 32, 577 .icache_bsize = 32,
333 .dcache_bsize = 32, 578 .dcache_bsize = 32,
334 .num_pmcs = 6, 579 .num_pmcs = 6,
@@ -339,7 +584,7 @@ struct cpu_spec cpu_specs[] = {
339 .pvr_value = 0x80010200, 584 .pvr_value = 0x80010200,
340 .cpu_name = "7455", 585 .cpu_name = "7455",
341 .cpu_features = CPU_FTRS_7455_20, 586 .cpu_features = CPU_FTRS_7455_20,
342 .cpu_user_features = COMMON_PPC | PPC_FEATURE_HAS_ALTIVEC_COMP, 587 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP,
343 .icache_bsize = 32, 588 .icache_bsize = 32,
344 .dcache_bsize = 32, 589 .dcache_bsize = 32,
345 .num_pmcs = 6, 590 .num_pmcs = 6,
@@ -350,7 +595,7 @@ struct cpu_spec cpu_specs[] = {
350 .pvr_value = 0x80010000, 595 .pvr_value = 0x80010000,
351 .cpu_name = "7455", 596 .cpu_name = "7455",
352 .cpu_features = CPU_FTRS_7455, 597 .cpu_features = CPU_FTRS_7455,
353 .cpu_user_features = COMMON_PPC | PPC_FEATURE_HAS_ALTIVEC_COMP, 598 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP,
354 .icache_bsize = 32, 599 .icache_bsize = 32,
355 .dcache_bsize = 32, 600 .dcache_bsize = 32,
356 .num_pmcs = 6, 601 .num_pmcs = 6,
@@ -361,7 +606,7 @@ struct cpu_spec cpu_specs[] = {
361 .pvr_value = 0x80020100, 606 .pvr_value = 0x80020100,
362 .cpu_name = "7447/7457", 607 .cpu_name = "7447/7457",
363 .cpu_features = CPU_FTRS_7447_10, 608 .cpu_features = CPU_FTRS_7447_10,
364 .cpu_user_features = COMMON_PPC | PPC_FEATURE_HAS_ALTIVEC_COMP, 609 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP,
365 .icache_bsize = 32, 610 .icache_bsize = 32,
366 .dcache_bsize = 32, 611 .dcache_bsize = 32,
367 .num_pmcs = 6, 612 .num_pmcs = 6,
@@ -372,7 +617,7 @@ struct cpu_spec cpu_specs[] = {
372 .pvr_value = 0x80020101, 617 .pvr_value = 0x80020101,
373 .cpu_name = "7447/7457", 618 .cpu_name = "7447/7457",
374 .cpu_features = CPU_FTRS_7447_10, 619 .cpu_features = CPU_FTRS_7447_10,
375 .cpu_user_features = COMMON_PPC | PPC_FEATURE_HAS_ALTIVEC_COMP, 620 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP,
376 .icache_bsize = 32, 621 .icache_bsize = 32,
377 .dcache_bsize = 32, 622 .dcache_bsize = 32,
378 .num_pmcs = 6, 623 .num_pmcs = 6,
@@ -383,7 +628,7 @@ struct cpu_spec cpu_specs[] = {
383 .pvr_value = 0x80020000, 628 .pvr_value = 0x80020000,
384 .cpu_name = "7447/7457", 629 .cpu_name = "7447/7457",
385 .cpu_features = CPU_FTRS_7447, 630 .cpu_features = CPU_FTRS_7447,
386 .cpu_user_features = COMMON_PPC | PPC_FEATURE_HAS_ALTIVEC_COMP, 631 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP,
387 .icache_bsize = 32, 632 .icache_bsize = 32,
388 .dcache_bsize = 32, 633 .dcache_bsize = 32,
389 .num_pmcs = 6, 634 .num_pmcs = 6,
@@ -394,7 +639,7 @@ struct cpu_spec cpu_specs[] = {
394 .pvr_value = 0x80030000, 639 .pvr_value = 0x80030000,
395 .cpu_name = "7447A", 640 .cpu_name = "7447A",
396 .cpu_features = CPU_FTRS_7447A, 641 .cpu_features = CPU_FTRS_7447A,
397 .cpu_user_features = COMMON_PPC | PPC_FEATURE_HAS_ALTIVEC_COMP, 642 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP,
398 .icache_bsize = 32, 643 .icache_bsize = 32,
399 .dcache_bsize = 32, 644 .dcache_bsize = 32,
400 .num_pmcs = 6, 645 .num_pmcs = 6,
@@ -405,7 +650,7 @@ struct cpu_spec cpu_specs[] = {
405 .pvr_value = 0x80040000, 650 .pvr_value = 0x80040000,
406 .cpu_name = "7448", 651 .cpu_name = "7448",
407 .cpu_features = CPU_FTRS_7447A, 652 .cpu_features = CPU_FTRS_7447A,
408 .cpu_user_features = COMMON_PPC | PPC_FEATURE_HAS_ALTIVEC_COMP, 653 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP,
409 .icache_bsize = 32, 654 .icache_bsize = 32,
410 .dcache_bsize = 32, 655 .dcache_bsize = 32,
411 .num_pmcs = 6, 656 .num_pmcs = 6,
@@ -416,7 +661,7 @@ struct cpu_spec cpu_specs[] = {
416 .pvr_value = 0x00810000, 661 .pvr_value = 0x00810000,
417 .cpu_name = "82xx", 662 .cpu_name = "82xx",
418 .cpu_features = CPU_FTRS_82XX, 663 .cpu_features = CPU_FTRS_82XX,
419 .cpu_user_features = COMMON_PPC, 664 .cpu_user_features = COMMON_USER,
420 .icache_bsize = 32, 665 .icache_bsize = 32,
421 .dcache_bsize = 32, 666 .dcache_bsize = 32,
422 .cpu_setup = __setup_cpu_603 667 .cpu_setup = __setup_cpu_603
@@ -426,7 +671,7 @@ struct cpu_spec cpu_specs[] = {
426 .pvr_value = 0x00820000, 671 .pvr_value = 0x00820000,
427 .cpu_name = "G2_LE", 672 .cpu_name = "G2_LE",
428 .cpu_features = CPU_FTRS_G2_LE, 673 .cpu_features = CPU_FTRS_G2_LE,
429 .cpu_user_features = COMMON_PPC, 674 .cpu_user_features = COMMON_USER,
430 .icache_bsize = 32, 675 .icache_bsize = 32,
431 .dcache_bsize = 32, 676 .dcache_bsize = 32,
432 .cpu_setup = __setup_cpu_603 677 .cpu_setup = __setup_cpu_603
@@ -436,7 +681,7 @@ struct cpu_spec cpu_specs[] = {
436 .pvr_value = 0x00830000, 681 .pvr_value = 0x00830000,
437 .cpu_name = "e300", 682 .cpu_name = "e300",
438 .cpu_features = CPU_FTRS_E300, 683 .cpu_features = CPU_FTRS_E300,
439 .cpu_user_features = COMMON_PPC, 684 .cpu_user_features = COMMON_USER,
440 .icache_bsize = 32, 685 .icache_bsize = 32,
441 .dcache_bsize = 32, 686 .dcache_bsize = 32,
442 .cpu_setup = __setup_cpu_603 687 .cpu_setup = __setup_cpu_603
@@ -446,66 +691,11 @@ struct cpu_spec cpu_specs[] = {
446 .pvr_value = 0x00000000, 691 .pvr_value = 0x00000000,
447 .cpu_name = "(generic PPC)", 692 .cpu_name = "(generic PPC)",
448 .cpu_features = CPU_FTRS_CLASSIC32, 693 .cpu_features = CPU_FTRS_CLASSIC32,
449 .cpu_user_features = COMMON_PPC, 694 .cpu_user_features = COMMON_USER,
450 .icache_bsize = 32, 695 .icache_bsize = 32,
451 .dcache_bsize = 32, 696 .dcache_bsize = 32,
452 }, 697 },
453#endif /* CLASSIC_PPC */ 698#endif /* CLASSIC_PPC */
454#ifdef CONFIG_PPC64BRIDGE
455 { /* Power3 */
456 .pvr_mask = 0xffff0000,
457 .pvr_value = 0x00400000,
458 .cpu_name = "Power3 (630)",
459 .cpu_features = CPU_FTRS_POWER3_32,
460 .cpu_user_features = COMMON_PPC | PPC_FEATURE_64,
461 .icache_bsize = 128,
462 .dcache_bsize = 128,
463 .num_pmcs = 8,
464 },
465 { /* Power3+ */
466 .pvr_mask = 0xffff0000,
467 .pvr_value = 0x00410000,
468 .cpu_name = "Power3 (630+)",
469 .cpu_features = CPU_FTRS_POWER3_32,
470 .cpu_user_features = COMMON_PPC | PPC_FEATURE_64,
471 .icache_bsize = 128,
472 .dcache_bsize = 128,
473 .num_pmcs = 8,
474 },
475 { /* I-star */
476 .pvr_mask = 0xffff0000,
477 .pvr_value = 0x00360000,
478 .cpu_name = "I-star",
479 .cpu_features = CPU_FTRS_POWER3_32,
480 .cpu_user_features = COMMON_PPC | PPC_FEATURE_64,
481 .icache_bsize = 128,
482 .dcache_bsize = 128,
483 .num_pmcs = 8,
484 },
485 { /* S-star */
486 .pvr_mask = 0xffff0000,
487 .pvr_value = 0x00370000,
488 .cpu_name = "S-star",
489 .cpu_features = CPU_FTRS_POWER3_32,
490 .cpu_user_features = COMMON_PPC | PPC_FEATURE_64,
491 .icache_bsize = 128,
492 .dcache_bsize = 128,
493 .num_pmcs = 8,
494 },
495#endif /* CONFIG_PPC64BRIDGE */
496#ifdef CONFIG_POWER4
497 { /* PPC970FX */
498 .pvr_mask = 0xffff0000,
499 .pvr_value = 0x003c0000,
500 .cpu_name = "PPC970FX",
501 .cpu_features = CPU_FTRS_970_32,
502 .cpu_user_features = COMMON_PPC | PPC_FEATURE_64 | PPC_FEATURE_HAS_ALTIVEC_COMP,
503 .icache_bsize = 128,
504 .dcache_bsize = 128,
505 .num_pmcs = 8,
506 .cpu_setup = __setup_cpu_ppc970
507 },
508#endif /* CONFIG_POWER4 */
509#ifdef CONFIG_8xx 699#ifdef CONFIG_8xx
510 { /* 8xx */ 700 { /* 8xx */
511 .pvr_mask = 0xffff0000, 701 .pvr_mask = 0xffff0000,
@@ -664,7 +854,7 @@ struct cpu_spec cpu_specs[] = {
664 .pvr_value = 0x40000850, 854 .pvr_value = 0x40000850,
665 .cpu_name = "440EP Rev. A", 855 .cpu_name = "440EP Rev. A",
666 .cpu_features = CPU_FTRS_44X, 856 .cpu_features = CPU_FTRS_44X,
667 .cpu_user_features = COMMON_PPC, /* 440EP has an FPU */ 857 .cpu_user_features = COMMON_USER, /* 440EP has an FPU */
668 .icache_bsize = 32, 858 .icache_bsize = 32,
669 .dcache_bsize = 32, 859 .dcache_bsize = 32,
670 }, 860 },
@@ -673,11 +863,11 @@ struct cpu_spec cpu_specs[] = {
673 .pvr_value = 0x400008d3, 863 .pvr_value = 0x400008d3,
674 .cpu_name = "440EP Rev. B", 864 .cpu_name = "440EP Rev. B",
675 .cpu_features = CPU_FTRS_44X, 865 .cpu_features = CPU_FTRS_44X,
676 .cpu_user_features = COMMON_PPC, /* 440EP has an FPU */ 866 .cpu_user_features = COMMON_USER, /* 440EP has an FPU */
677 .icache_bsize = 32, 867 .icache_bsize = 32,
678 .dcache_bsize = 32, 868 .dcache_bsize = 32,
679 }, 869 },
680 { /* 440GP Rev. B */ 870 { /* 440GP Rev. B */
681 .pvr_mask = 0xf0000fff, 871 .pvr_mask = 0xf0000fff,
682 .pvr_value = 0x40000440, 872 .pvr_value = 0x40000440,
683 .cpu_name = "440GP Rev. B", 873 .cpu_name = "440GP Rev. B",
@@ -686,7 +876,7 @@ struct cpu_spec cpu_specs[] = {
686 .icache_bsize = 32, 876 .icache_bsize = 32,
687 .dcache_bsize = 32, 877 .dcache_bsize = 32,
688 }, 878 },
689 { /* 440GP Rev. C */ 879 { /* 440GP Rev. C */
690 .pvr_mask = 0xf0000fff, 880 .pvr_mask = 0xf0000fff,
691 .pvr_value = 0x40000481, 881 .pvr_value = 0x40000481,
692 .cpu_name = "440GP Rev. C", 882 .cpu_name = "440GP Rev. C",
@@ -742,7 +932,7 @@ struct cpu_spec cpu_specs[] = {
742 }, 932 },
743#endif /* CONFIG_44x */ 933#endif /* CONFIG_44x */
744#ifdef CONFIG_FSL_BOOKE 934#ifdef CONFIG_FSL_BOOKE
745 { /* e200z5 */ 935 { /* e200z5 */
746 .pvr_mask = 0xfff00000, 936 .pvr_mask = 0xfff00000,
747 .pvr_value = 0x81000000, 937 .pvr_value = 0x81000000,
748 .cpu_name = "e200z5", 938 .cpu_name = "e200z5",
@@ -753,7 +943,7 @@ struct cpu_spec cpu_specs[] = {
753 PPC_FEATURE_UNIFIED_CACHE, 943 PPC_FEATURE_UNIFIED_CACHE,
754 .dcache_bsize = 32, 944 .dcache_bsize = 32,
755 }, 945 },
756 { /* e200z6 */ 946 { /* e200z6 */
757 .pvr_mask = 0xfff00000, 947 .pvr_mask = 0xfff00000,
758 .pvr_value = 0x81100000, 948 .pvr_value = 0x81100000,
759 .cpu_name = "e200z6", 949 .cpu_name = "e200z6",
@@ -765,7 +955,7 @@ struct cpu_spec cpu_specs[] = {
765 PPC_FEATURE_UNIFIED_CACHE, 955 PPC_FEATURE_UNIFIED_CACHE,
766 .dcache_bsize = 32, 956 .dcache_bsize = 32,
767 }, 957 },
768 { /* e500 */ 958 { /* e500 */
769 .pvr_mask = 0xffff0000, 959 .pvr_mask = 0xffff0000,
770 .pvr_value = 0x80200000, 960 .pvr_value = 0x80200000,
771 .cpu_name = "e500", 961 .cpu_name = "e500",
@@ -778,7 +968,7 @@ struct cpu_spec cpu_specs[] = {
778 .dcache_bsize = 32, 968 .dcache_bsize = 32,
779 .num_pmcs = 4, 969 .num_pmcs = 4,
780 }, 970 },
781 { /* e500v2 */ 971 { /* e500v2 */
782 .pvr_mask = 0xffff0000, 972 .pvr_mask = 0xffff0000,
783 .pvr_value = 0x80210000, 973 .pvr_value = 0x80210000,
784 .cpu_name = "e500v2", 974 .cpu_name = "e500v2",
@@ -803,4 +993,5 @@ struct cpu_spec cpu_specs[] = {
803 .dcache_bsize = 32, 993 .dcache_bsize = 32,
804 } 994 }
805#endif /* !CLASSIC_PPC */ 995#endif /* !CLASSIC_PPC */
996#endif /* CONFIG_PPC32 */
806}; 997};
diff --git a/arch/ppc/kernel/Makefile b/arch/ppc/kernel/Makefile
index 59b6b62d1120..0cba463adf9a 100644
--- a/arch/ppc/kernel/Makefile
+++ b/arch/ppc/kernel/Makefile
@@ -15,7 +15,7 @@ extra-y += vmlinux.lds
15obj-y := entry.o traps.o irq.o idle.o time.o misc.o \ 15obj-y := entry.o traps.o irq.o idle.o time.o misc.o \
16 process.o signal.o ptrace.o align.o \ 16 process.o signal.o ptrace.o align.o \
17 syscalls.o setup.o \ 17 syscalls.o setup.o \
18 cputable.o ppc_htab.o perfmon.o 18 ppc_htab.o perfmon.o
19obj-$(CONFIG_6xx) += l2cr.o cpu_setup_6xx.o 19obj-$(CONFIG_6xx) += l2cr.o cpu_setup_6xx.o
20obj-$(CONFIG_SOFTWARE_SUSPEND) += swsusp.o 20obj-$(CONFIG_SOFTWARE_SUSPEND) += swsusp.o
21obj-$(CONFIG_POWER4) += cpu_setup_power4.o 21obj-$(CONFIG_POWER4) += cpu_setup_power4.o
@@ -39,7 +39,7 @@ endif
39else 39else
40obj-y := irq.o idle.o time.o \ 40obj-y := irq.o idle.o time.o \
41 signal.o ptrace.o align.o \ 41 signal.o ptrace.o align.o \
42 syscalls.o cputable.o perfmon.o 42 syscalls.o perfmon.o
43obj-$(CONFIG_6xx) += l2cr.o cpu_setup_6xx.o 43obj-$(CONFIG_6xx) += l2cr.o cpu_setup_6xx.o
44obj-$(CONFIG_SOFTWARE_SUSPEND) += swsusp.o 44obj-$(CONFIG_SOFTWARE_SUSPEND) += swsusp.o
45obj-$(CONFIG_MODULES) += module.o 45obj-$(CONFIG_MODULES) += module.o
diff --git a/arch/ppc64/kernel/Makefile b/arch/ppc64/kernel/Makefile
index 5569ea7e6830..834aef034b77 100644
--- a/arch/ppc64/kernel/Makefile
+++ b/arch/ppc64/kernel/Makefile
@@ -7,13 +7,17 @@ ifneq ($(CONFIG_PPC_MERGE),y)
7EXTRA_CFLAGS += -mno-minimal-toc 7EXTRA_CFLAGS += -mno-minimal-toc
8extra-y := head.o vmlinux.lds 8extra-y := head.o vmlinux.lds
9 9
10obj-y := setup.o entry.o irq.o idle.o dma.o \ 10obj-y := setup.o entry.o misc.o prom.o
11 time.o signal.o syscalls.o misc.o ptrace.o \ 11
12endif
13
14obj-y += irq.o idle.o dma.o \
15 time.o signal.o syscalls.o ptrace.o \
12 align.o bitops.o pacaData.o \ 16 align.o bitops.o pacaData.o \
13 udbg.o binfmt_elf32.o sys_ppc32.o ioctl32.o \ 17 udbg.o binfmt_elf32.o sys_ppc32.o ioctl32.o \
14 ptrace32.o signal32.o rtc.o \ 18 ptrace32.o signal32.o rtc.o \
15 cputable.o cpu_setup_power4.o \ 19 cpu_setup_power4.o \
16 iommu.o sysfs.o vdso.o pmc.o firmware.o prom.o 20 iommu.o sysfs.o vdso.o pmc.o firmware.o
17obj-y += vdso32/ vdso64/ 21obj-y += vdso32/ vdso64/
18 22
19obj-$(CONFIG_PPC_OF) += of_device.o 23obj-$(CONFIG_PPC_OF) += of_device.o
@@ -22,7 +26,10 @@ pci-obj-$(CONFIG_PPC_MULTIPLATFORM) += pci_dn.o pci_direct_iommu.o
22 26
23obj-$(CONFIG_PCI) += pci.o pci_iommu.o iomap.o $(pci-obj-y) 27obj-$(CONFIG_PCI) += pci.o pci_iommu.o iomap.o $(pci-obj-y)
24 28
25obj-$(CONFIG_PPC_MULTIPLATFORM) += nvram.o i8259.o prom_init.o 29obj-$(CONFIG_PPC_MULTIPLATFORM) += nvram.o i8259.o
30ifneq ($(CONFIG_PPC_MERGE),y)
31obj-$(CONFIG_PPC_MULTIPLATFORM) += prom_init.o
32endif
26 33
27obj-$(CONFIG_PPC_PSERIES) += rtasd.o ras.o udbg_16550.o 34obj-$(CONFIG_PPC_PSERIES) += rtasd.o ras.o udbg_16550.o
28 35
@@ -34,22 +41,29 @@ obj-$(CONFIG_EEH) += eeh.o
34obj-$(CONFIG_PROC_FS) += proc_ppc64.o 41obj-$(CONFIG_PROC_FS) += proc_ppc64.o
35obj-$(CONFIG_RTAS_FLASH) += rtas_flash.o 42obj-$(CONFIG_RTAS_FLASH) += rtas_flash.o
36obj-$(CONFIG_SMP) += smp.o 43obj-$(CONFIG_SMP) += smp.o
37obj-$(CONFIG_MODULES) += module.o ppc_ksyms.o 44obj-$(CONFIG_MODULES) += module.o
45ifneq ($(CONFIG_PPC_MERGE),y)
46obj-$(CONFIG_MODULES) += ppc_ksyms.o
47endif
38obj-$(CONFIG_PPC_RTAS) += rtas.o rtas_pci.o 48obj-$(CONFIG_PPC_RTAS) += rtas.o rtas_pci.o
39obj-$(CONFIG_RTAS_PROC) += rtas-proc.o 49obj-$(CONFIG_RTAS_PROC) += rtas-proc.o
40obj-$(CONFIG_SCANLOG) += scanlog.o 50obj-$(CONFIG_SCANLOG) += scanlog.o
41obj-$(CONFIG_LPARCFG) += lparcfg.o 51obj-$(CONFIG_LPARCFG) += lparcfg.o
42obj-$(CONFIG_HVC_CONSOLE) += hvconsole.o 52obj-$(CONFIG_HVC_CONSOLE) += hvconsole.o
53ifneq ($(CONFIG_PPC_MERGE),y)
43obj-$(CONFIG_BOOTX_TEXT) += btext.o 54obj-$(CONFIG_BOOTX_TEXT) += btext.o
55endif
44obj-$(CONFIG_HVCS) += hvcserver.o 56obj-$(CONFIG_HVCS) += hvcserver.o
45 57
46obj-$(CONFIG_IBMVIO) += vio.o $(vio-obj-y) 58obj-$(CONFIG_IBMVIO) += vio.o
47obj-$(CONFIG_XICS) += xics.o 59obj-$(CONFIG_XICS) += xics.o
60ifneq ($(CONFIG_PPC_MERGE),y)
48obj-$(CONFIG_MPIC) += mpic.o 61obj-$(CONFIG_MPIC) += mpic.o
49 62
50obj-$(CONFIG_PPC_PMAC) += pmac_setup.o pmac_feature.o pmac_pci.o \ 63obj-$(CONFIG_PPC_PMAC) += pmac_setup.o pmac_feature.o pmac_pci.o \
51 pmac_time.o pmac_nvram.o pmac_low_i2c.o \ 64 pmac_time.o pmac_nvram.o pmac_low_i2c.o \
52 udbg_scc.o 65 udbg_scc.o
66endif
53 67
54obj-$(CONFIG_PPC_MAPLE) += maple_setup.o maple_pci.o maple_time.o \ 68obj-$(CONFIG_PPC_MAPLE) += maple_setup.o maple_pci.o maple_time.o \
55 udbg_16550.o 69 udbg_16550.o
@@ -57,7 +71,9 @@ obj-$(CONFIG_PPC_MAPLE) += maple_setup.o maple_pci.o maple_time.o \
57obj-$(CONFIG_U3_DART) += u3_iommu.o 71obj-$(CONFIG_U3_DART) += u3_iommu.o
58 72
59ifdef CONFIG_SMP 73ifdef CONFIG_SMP
74ifneq ($(CONFIG_PPC_MERGE),y)
60obj-$(CONFIG_PPC_PMAC) += pmac_smp.o smp-tbsync.o 75obj-$(CONFIG_PPC_PMAC) += pmac_smp.o smp-tbsync.o
76endif
61obj-$(CONFIG_PPC_MAPLE) += smp-tbsync.o 77obj-$(CONFIG_PPC_MAPLE) += smp-tbsync.o
62endif 78endif
63 79
@@ -65,62 +81,9 @@ obj-$(CONFIG_KPROBES) += kprobes.o
65 81
66CFLAGS_ioctl32.o += -Ifs/ 82CFLAGS_ioctl32.o += -Ifs/
67 83
84ifneq ($(CONFIG_PPC_MERGE),y)
68ifeq ($(CONFIG_PPC_ISERIES),y) 85ifeq ($(CONFIG_PPC_ISERIES),y)
69arch/ppc64/kernel/head.o: arch/powerpc/kernel/lparmap.s 86arch/ppc64/kernel/head.o: arch/powerpc/kernel/lparmap.s
70AFLAGS_head.o += -Iarch/powerpc/kernel 87AFLAGS_head.o += -Iarch/powerpc/kernel
71endif 88endif
72
73else
74
75# Things still needed from here by the merged ppc code
76
77obj-y := irq.o idle.o dma.o \
78 time.o signal.o syscalls.o ptrace.o \
79 align.o bitops.o pacaData.o \
80 udbg.o binfmt_elf32.o sys_ppc32.o ioctl32.o \
81 ptrace32.o signal32.o rtc.o \
82 cputable.o cpu_setup_power4.o \
83 iommu.o sysfs.o vdso.o pmc.o firmware.o
84obj-y += vdso32/ vdso64/
85
86pci-obj-$(CONFIG_PPC_MULTIPLATFORM) += pci_dn.o pci_direct_iommu.o
87
88obj-$(CONFIG_PCI) += pci.o pci_iommu.o iomap.o $(pci-obj-y)
89
90obj-$(CONFIG_PPC_MULTIPLATFORM) += nvram.o i8259.o
91
92obj-$(CONFIG_PPC_PSERIES) += rtasd.o ras.o udbg_16550.o
93
94obj-$(CONFIG_PPC_BPA) += bpa_setup.o bpa_iommu.o bpa_nvram.o \
95 bpa_iic.o spider-pic.o
96
97obj-$(CONFIG_KEXEC) += machine_kexec.o
98obj-$(CONFIG_EEH) += eeh.o
99obj-$(CONFIG_PROC_FS) += proc_ppc64.o
100obj-$(CONFIG_RTAS_FLASH) += rtas_flash.o
101obj-$(CONFIG_SMP) += smp.o
102obj-$(CONFIG_MODULES) += module.o
103obj-$(CONFIG_PPC_RTAS) += rtas.o rtas_pci.o
104obj-$(CONFIG_RTAS_PROC) += rtas-proc.o
105obj-$(CONFIG_SCANLOG) += scanlog.o
106obj-$(CONFIG_LPARCFG) += lparcfg.o
107obj-$(CONFIG_HVC_CONSOLE) += hvconsole.o
108obj-$(CONFIG_HVCS) += hvcserver.o
109
110obj-$(CONFIG_IBMVIO) += vio.o
111obj-$(CONFIG_XICS) += xics.o
112
113obj-$(CONFIG_PPC_MAPLE) += maple_setup.o maple_pci.o maple_time.o \
114 udbg_16550.o
115
116obj-$(CONFIG_U3_DART) += u3_iommu.o
117
118ifdef CONFIG_SMP
119obj-$(CONFIG_PPC_MAPLE) += smp-tbsync.o
120endif
121
122obj-$(CONFIG_KPROBES) += kprobes.o
123
124CFLAGS_ioctl32.o += -Ifs/
125
126endif 89endif
diff --git a/arch/ppc64/kernel/cputable.c b/arch/ppc64/kernel/cputable.c
deleted file mode 100644
index 5134c53d536d..000000000000
--- a/arch/ppc64/kernel/cputable.c
+++ /dev/null
@@ -1,260 +0,0 @@
1/*
2 * arch/ppc64/kernel/cputable.c
3 *
4 * Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org)
5 *
6 * Modifications for ppc64:
7 * Copyright (C) 2003 Dave Engebretsen <engebret@us.ibm.com>
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * as published by the Free Software Foundation; either version
12 * 2 of the License, or (at your option) any later version.
13 */
14
15#include <linux/config.h>
16#include <linux/string.h>
17#include <linux/sched.h>
18#include <linux/threads.h>
19#include <linux/init.h>
20#include <linux/module.h>
21
22#include <asm/oprofile_impl.h>
23#include <asm/cputable.h>
24
25struct cpu_spec* cur_cpu_spec = NULL;
26EXPORT_SYMBOL(cur_cpu_spec);
27
28/* NOTE:
29 * Unlike ppc32, ppc64 will only call this once for the boot CPU, it's
30 * the responsibility of the appropriate CPU save/restore functions to
31 * eventually copy these settings over. Those save/restore aren't yet
32 * part of the cputable though. That has to be fixed for both ppc32
33 * and ppc64
34 */
35extern void __setup_cpu_power3(unsigned long offset, struct cpu_spec* spec);
36extern void __setup_cpu_power4(unsigned long offset, struct cpu_spec* spec);
37extern void __setup_cpu_ppc970(unsigned long offset, struct cpu_spec* spec);
38extern void __setup_cpu_be(unsigned long offset, struct cpu_spec* spec);
39
40struct cpu_spec cpu_specs[] = {
41 { /* Power3 */
42 .pvr_mask = 0xffff0000,
43 .pvr_value = 0x00400000,
44 .cpu_name = "POWER3 (630)",
45 .cpu_features = CPU_FTRS_POWER3,
46 .cpu_user_features = COMMON_USER_PPC64,
47 .icache_bsize = 128,
48 .dcache_bsize = 128,
49 .num_pmcs = 8,
50 .cpu_setup = __setup_cpu_power3,
51#ifdef CONFIG_OPROFILE
52 .oprofile_cpu_type = "ppc64/power3",
53 .oprofile_model = &op_model_rs64,
54#endif
55 },
56 { /* Power3+ */
57 .pvr_mask = 0xffff0000,
58 .pvr_value = 0x00410000,
59 .cpu_name = "POWER3 (630+)",
60 .cpu_features = CPU_FTRS_POWER3,
61 .cpu_user_features = COMMON_USER_PPC64,
62 .icache_bsize = 128,
63 .dcache_bsize = 128,
64 .num_pmcs = 8,
65 .cpu_setup = __setup_cpu_power3,
66#ifdef CONFIG_OPROFILE
67 .oprofile_cpu_type = "ppc64/power3",
68 .oprofile_model = &op_model_rs64,
69#endif
70 },
71 { /* Northstar */
72 .pvr_mask = 0xffff0000,
73 .pvr_value = 0x00330000,
74 .cpu_name = "RS64-II (northstar)",
75 .cpu_features = CPU_FTRS_RS64,
76 .cpu_user_features = COMMON_USER_PPC64,
77 .icache_bsize = 128,
78 .dcache_bsize = 128,
79 .num_pmcs = 8,
80 .cpu_setup = __setup_cpu_power3,
81#ifdef CONFIG_OPROFILE
82 .oprofile_cpu_type = "ppc64/rs64",
83 .oprofile_model = &op_model_rs64,
84#endif
85 },
86 { /* Pulsar */
87 .pvr_mask = 0xffff0000,
88 .pvr_value = 0x00340000,
89 .cpu_name = "RS64-III (pulsar)",
90 .cpu_features = CPU_FTRS_RS64,
91 .cpu_user_features = COMMON_USER_PPC64,
92 .icache_bsize = 128,
93 .dcache_bsize = 128,
94 .num_pmcs = 8,
95 .cpu_setup = __setup_cpu_power3,
96#ifdef CONFIG_OPROFILE
97 .oprofile_cpu_type = "ppc64/rs64",
98 .oprofile_model = &op_model_rs64,
99#endif
100 },
101 { /* I-star */
102 .pvr_mask = 0xffff0000,
103 .pvr_value = 0x00360000,
104 .cpu_name = "RS64-III (icestar)",
105 .cpu_features = CPU_FTRS_RS64,
106 .cpu_user_features = COMMON_USER_PPC64,
107 .icache_bsize = 128,
108 .dcache_bsize = 128,
109 .num_pmcs = 8,
110 .cpu_setup = __setup_cpu_power3,
111#ifdef CONFIG_OPROFILE
112 .oprofile_cpu_type = "ppc64/rs64",
113 .oprofile_model = &op_model_rs64,
114#endif
115 },
116 { /* S-star */
117 .pvr_mask = 0xffff0000,
118 .pvr_value = 0x00370000,
119 .cpu_name = "RS64-IV (sstar)",
120 .cpu_features = CPU_FTRS_RS64,
121 .cpu_user_features = COMMON_USER_PPC64,
122 .icache_bsize = 128,
123 .dcache_bsize = 128,
124 .num_pmcs = 8,
125 .cpu_setup = __setup_cpu_power3,
126#ifdef CONFIG_OPROFILE
127 .oprofile_cpu_type = "ppc64/rs64",
128 .oprofile_model = &op_model_rs64,
129#endif
130 },
131 { /* Power4 */
132 .pvr_mask = 0xffff0000,
133 .pvr_value = 0x00350000,
134 .cpu_name = "POWER4 (gp)",
135 .cpu_features = CPU_FTRS_POWER4,
136 .cpu_user_features = COMMON_USER_PPC64,
137 .icache_bsize = 128,
138 .dcache_bsize = 128,
139 .num_pmcs = 8,
140 .cpu_setup = __setup_cpu_power4,
141#ifdef CONFIG_OPROFILE
142 .oprofile_cpu_type = "ppc64/power4",
143 .oprofile_model = &op_model_rs64,
144#endif
145 },
146 { /* Power4+ */
147 .pvr_mask = 0xffff0000,
148 .pvr_value = 0x00380000,
149 .cpu_name = "POWER4+ (gq)",
150 .cpu_features = CPU_FTRS_POWER4,
151 .cpu_user_features = COMMON_USER_PPC64,
152 .icache_bsize = 128,
153 .dcache_bsize = 128,
154 .num_pmcs = 8,
155 .cpu_setup = __setup_cpu_power4,
156#ifdef CONFIG_OPROFILE
157 .oprofile_cpu_type = "ppc64/power4",
158 .oprofile_model = &op_model_power4,
159#endif
160 },
161 { /* PPC970 */
162 .pvr_mask = 0xffff0000,
163 .pvr_value = 0x00390000,
164 .cpu_name = "PPC970",
165 .cpu_features = CPU_FTRS_PPC970,
166 .cpu_user_features = COMMON_USER_PPC64 |
167 PPC_FEATURE_HAS_ALTIVEC_COMP,
168 .icache_bsize = 128,
169 .dcache_bsize = 128,
170 .num_pmcs = 8,
171 .cpu_setup = __setup_cpu_ppc970,
172#ifdef CONFIG_OPROFILE
173 .oprofile_cpu_type = "ppc64/970",
174 .oprofile_model = &op_model_power4,
175#endif
176 },
177 { /* PPC970FX */
178 .pvr_mask = 0xffff0000,
179 .pvr_value = 0x003c0000,
180 .cpu_name = "PPC970FX",
181 .cpu_features = CPU_FTRS_PPC970,
182 .cpu_user_features = COMMON_USER_PPC64 |
183 PPC_FEATURE_HAS_ALTIVEC_COMP,
184 .icache_bsize = 128,
185 .dcache_bsize = 128,
186 .num_pmcs = 8,
187 .cpu_setup = __setup_cpu_ppc970,
188#ifdef CONFIG_OPROFILE
189 .oprofile_cpu_type = "ppc64/970",
190 .oprofile_model = &op_model_power4,
191#endif
192 },
193 { /* PPC970MP */
194 .pvr_mask = 0xffff0000,
195 .pvr_value = 0x00440000,
196 .cpu_name = "PPC970MP",
197 .cpu_features = CPU_FTRS_PPC970,
198 .cpu_user_features = COMMON_USER_PPC64 |
199 PPC_FEATURE_HAS_ALTIVEC_COMP,
200 .icache_bsize = 128,
201 .dcache_bsize = 128,
202 .cpu_setup = __setup_cpu_ppc970,
203#ifdef CONFIG_OPROFILE
204 .oprofile_cpu_type = "ppc64/970",
205 .oprofile_model = &op_model_power4,
206#endif
207 },
208 { /* Power5 */
209 .pvr_mask = 0xffff0000,
210 .pvr_value = 0x003a0000,
211 .cpu_name = "POWER5 (gr)",
212 .cpu_features = CPU_FTRS_POWER5,
213 .cpu_user_features = COMMON_USER_PPC64,
214 .icache_bsize = 128,
215 .dcache_bsize = 128,
216 .num_pmcs = 6,
217 .cpu_setup = __setup_cpu_power4,
218#ifdef CONFIG_OPROFILE
219 .oprofile_cpu_type = "ppc64/power5",
220 .oprofile_model = &op_model_power4,
221#endif
222 },
223 { /* Power5 */
224 .pvr_mask = 0xffff0000,
225 .pvr_value = 0x003b0000,
226 .cpu_name = "POWER5 (gs)",
227 .cpu_features = CPU_FTRS_POWER5,
228 .cpu_user_features = COMMON_USER_PPC64,
229 .icache_bsize = 128,
230 .dcache_bsize = 128,
231 .num_pmcs = 6,
232 .cpu_setup = __setup_cpu_power4,
233#ifdef CONFIG_OPROFILE
234 .oprofile_cpu_type = "ppc64/power5",
235 .oprofile_model = &op_model_power4,
236#endif
237 },
238 { /* BE DD1.x */
239 .pvr_mask = 0xffff0000,
240 .pvr_value = 0x00700000,
241 .cpu_name = "Cell Broadband Engine",
242 .cpu_features = CPU_FTRS_CELL,
243 .cpu_user_features = COMMON_USER_PPC64 |
244 PPC_FEATURE_HAS_ALTIVEC_COMP,
245 .icache_bsize = 128,
246 .dcache_bsize = 128,
247 .cpu_setup = __setup_cpu_be,
248 },
249 { /* default match */
250 .pvr_mask = 0x00000000,
251 .pvr_value = 0x00000000,
252 .cpu_name = "POWER4 (compatible)",
253 .cpu_features = CPU_FTRS_COMPATIBLE,
254 .cpu_user_features = COMMON_USER_PPC64,
255 .icache_bsize = 128,
256 .dcache_bsize = 128,
257 .num_pmcs = 6,
258 .cpu_setup = __setup_cpu_power4,
259 }
260};
diff --git a/include/asm-powerpc/cputable.h b/include/asm-powerpc/cputable.h
index a4a50d08d384..373642aff7d8 100644
--- a/include/asm-powerpc/cputable.h
+++ b/include/asm-powerpc/cputable.h
@@ -119,9 +119,6 @@ extern void do_cpu_ftr_fixups(unsigned long offset);
119 119
120#ifndef __ASSEMBLY__ 120#ifndef __ASSEMBLY__
121 121
122#define COMMON_USER_PPC64 (PPC_FEATURE_32 | PPC_FEATURE_64 | \
123 PPC_FEATURE_HAS_FPU | PPC_FEATURE_HAS_MMU)
124
125#define CPU_FTR_PPCAS_ARCH_V2_BASE (CPU_FTR_SLB | \ 122#define CPU_FTR_PPCAS_ARCH_V2_BASE (CPU_FTR_SLB | \
126 CPU_FTR_TLBIEL | CPU_FTR_NOEXECUTE | \ 123 CPU_FTR_TLBIEL | CPU_FTR_NOEXECUTE | \
127 CPU_FTR_NODSISRALIGN | CPU_FTR_CTRL) 124 CPU_FTR_NODSISRALIGN | CPU_FTR_CTRL)
generated by cgit v1.2.2 (git 2.25.0) at 2026-01-07 01:46:02 -0500