diff options
| -rw-r--r-- | arch/powerpc/kernel/cputable.c | 12 | ||||
| -rw-r--r-- | arch/powerpc/platforms/86xx/mpc86xx.h | 8 | ||||
| -rw-r--r-- | arch/powerpc/platforms/86xx/mpc86xx_hpcn.c | 128 | ||||
| -rw-r--r-- | arch/powerpc/platforms/86xx/mpc86xx_smp.c | 9 | ||||
| -rw-r--r-- | arch/powerpc/platforms/86xx/pci.c | 136 | ||||
| -rw-r--r-- | include/asm-powerpc/mpc86xx.h | 4 |
6 files changed, 138 insertions, 159 deletions
diff --git a/arch/powerpc/kernel/cputable.c b/arch/powerpc/kernel/cputable.c index 1c114880dc05..abf7d42a8b07 100644 --- a/arch/powerpc/kernel/cputable.c +++ b/arch/powerpc/kernel/cputable.c | |||
| @@ -722,18 +722,6 @@ struct cpu_spec cpu_specs[] = { | |||
| 722 | .oprofile_type = PPC_OPROFILE_G4, | 722 | .oprofile_type = PPC_OPROFILE_G4, |
| 723 | .platform = "ppc7450", | 723 | .platform = "ppc7450", |
| 724 | }, | 724 | }, |
| 725 | { /* 8641 */ | ||
| 726 | .pvr_mask = 0xffffffff, | ||
| 727 | .pvr_value = 0x80040010, | ||
| 728 | .cpu_name = "8641", | ||
| 729 | .cpu_features = CPU_FTRS_7447A, | ||
| 730 | .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP, | ||
| 731 | .icache_bsize = 32, | ||
| 732 | .dcache_bsize = 32, | ||
| 733 | .num_pmcs = 6, | ||
| 734 | .cpu_setup = __setup_cpu_745x | ||
| 735 | }, | ||
| 736 | |||
| 737 | { /* 82xx (8240, 8245, 8260 are all 603e cores) */ | 725 | { /* 82xx (8240, 8245, 8260 are all 603e cores) */ |
| 738 | .pvr_mask = 0x7fff0000, | 726 | .pvr_mask = 0x7fff0000, |
| 739 | .pvr_value = 0x00810000, | 727 | .pvr_value = 0x00810000, |
diff --git a/arch/powerpc/platforms/86xx/mpc86xx.h b/arch/powerpc/platforms/86xx/mpc86xx.h index e3c9e4f417d3..2834462590b8 100644 --- a/arch/powerpc/platforms/86xx/mpc86xx.h +++ b/arch/powerpc/platforms/86xx/mpc86xx.h | |||
| @@ -15,11 +15,13 @@ | |||
| 15 | * mpc86xx_* files. Mostly for use by mpc86xx_setup(). | 15 | * mpc86xx_* files. Mostly for use by mpc86xx_setup(). |
| 16 | */ | 16 | */ |
| 17 | 17 | ||
| 18 | extern int __init add_bridge(struct device_node *dev); | 18 | extern int add_bridge(struct device_node *dev); |
| 19 | 19 | ||
| 20 | extern void __init setup_indirect_pcie(struct pci_controller *hose, | 20 | extern int mpc86xx_exclude_device(u_char bus, u_char devfn); |
| 21 | |||
| 22 | extern void setup_indirect_pcie(struct pci_controller *hose, | ||
| 21 | u32 cfg_addr, u32 cfg_data); | 23 | u32 cfg_addr, u32 cfg_data); |
| 22 | extern void __init setup_indirect_pcie_nomap(struct pci_controller *hose, | 24 | extern void setup_indirect_pcie_nomap(struct pci_controller *hose, |
| 23 | void __iomem *cfg_addr, | 25 | void __iomem *cfg_addr, |
| 24 | void __iomem *cfg_data); | 26 | void __iomem *cfg_data); |
| 25 | 27 | ||
diff --git a/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c b/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c index a9a8539ec0a2..ebae73eb0063 100644 --- a/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c +++ b/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c | |||
| @@ -35,6 +35,7 @@ | |||
| 35 | #include <sysdev/fsl_soc.h> | 35 | #include <sysdev/fsl_soc.h> |
| 36 | 36 | ||
| 37 | #include "mpc86xx.h" | 37 | #include "mpc86xx.h" |
| 38 | #include "mpc8641_hpcn.h" | ||
| 38 | 39 | ||
| 39 | #ifndef CONFIG_PCI | 40 | #ifndef CONFIG_PCI |
| 40 | unsigned long isa_io_base = 0; | 41 | unsigned long isa_io_base = 0; |
| @@ -185,17 +186,130 @@ mpc86xx_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin) | |||
| 185 | return PCI_IRQ_TABLE_LOOKUP + I8259_OFFSET; | 186 | return PCI_IRQ_TABLE_LOOKUP + I8259_OFFSET; |
| 186 | } | 187 | } |
| 187 | 188 | ||
| 189 | static void __devinit quirk_ali1575(struct pci_dev *dev) | ||
| 190 | { | ||
| 191 | unsigned short temp; | ||
| 192 | |||
| 193 | /* | ||
| 194 | * ALI1575 interrupts route table setup: | ||
| 195 | * | ||
| 196 | * IRQ pin IRQ# | ||
| 197 | * PIRQA ---- 3 | ||
| 198 | * PIRQB ---- 4 | ||
| 199 | * PIRQC ---- 5 | ||
| 200 | * PIRQD ---- 6 | ||
| 201 | * PIRQE ---- 9 | ||
| 202 | * PIRQF ---- 10 | ||
| 203 | * PIRQG ---- 11 | ||
| 204 | * PIRQH ---- 12 | ||
| 205 | * | ||
| 206 | * interrupts for PCI slot0 -- PIRQA / PIRQB / PIRQC / PIRQD | ||
| 207 | * PCI slot1 -- PIRQB / PIRQC / PIRQD / PIRQA | ||
| 208 | */ | ||
| 209 | pci_write_config_dword(dev, 0x48, 0xb9317542); | ||
| 210 | |||
| 211 | /* USB 1.1 OHCI controller 1, interrupt: PIRQE */ | ||
| 212 | pci_write_config_byte(dev, 0x86, 0x0c); | ||
| 213 | |||
| 214 | /* USB 1.1 OHCI controller 2, interrupt: PIRQF */ | ||
| 215 | pci_write_config_byte(dev, 0x87, 0x0d); | ||
| 216 | |||
| 217 | /* USB 1.1 OHCI controller 3, interrupt: PIRQH */ | ||
| 218 | pci_write_config_byte(dev, 0x88, 0x0f); | ||
| 219 | |||
| 220 | /* USB 2.0 controller, interrupt: PIRQ7 */ | ||
| 221 | pci_write_config_byte(dev, 0x74, 0x06); | ||
| 222 | |||
| 223 | /* Audio controller, interrupt: PIRQE */ | ||
| 224 | pci_write_config_byte(dev, 0x8a, 0x0c); | ||
| 225 | |||
| 226 | /* Modem controller, interrupt: PIRQF */ | ||
| 227 | pci_write_config_byte(dev, 0x8b, 0x0d); | ||
| 228 | |||
| 229 | /* HD audio controller, interrupt: PIRQG */ | ||
| 230 | pci_write_config_byte(dev, 0x8c, 0x0e); | ||
| 231 | |||
| 232 | /* Serial ATA interrupt: PIRQD */ | ||
| 233 | pci_write_config_byte(dev, 0x8d, 0x0b); | ||
| 234 | |||
| 235 | /* SMB interrupt: PIRQH */ | ||
| 236 | pci_write_config_byte(dev, 0x8e, 0x0f); | ||
| 237 | |||
| 238 | /* PMU ACPI SCI interrupt: PIRQH */ | ||
| 239 | pci_write_config_byte(dev, 0x8f, 0x0f); | ||
| 240 | |||
| 241 | /* Primary PATA IDE IRQ: 14 | ||
| 242 | * Secondary PATA IDE IRQ: 15 | ||
| 243 | */ | ||
| 244 | pci_write_config_byte(dev, 0x44, 0x3d); | ||
| 245 | pci_write_config_byte(dev, 0x75, 0x0f); | ||
| 246 | |||
| 247 | /* Set IRQ14 and IRQ15 to legacy IRQs */ | ||
| 248 | pci_read_config_word(dev, 0x46, &temp); | ||
| 249 | temp |= 0xc000; | ||
| 250 | pci_write_config_word(dev, 0x46, temp); | ||
| 251 | |||
| 252 | /* Set i8259 interrupt trigger | ||
| 253 | * IRQ 3: Level | ||
| 254 | * IRQ 4: Level | ||
| 255 | * IRQ 5: Level | ||
| 256 | * IRQ 6: Level | ||
| 257 | * IRQ 7: Level | ||
| 258 | * IRQ 9: Level | ||
| 259 | * IRQ 10: Level | ||
| 260 | * IRQ 11: Level | ||
| 261 | * IRQ 12: Level | ||
| 262 | * IRQ 14: Edge | ||
| 263 | * IRQ 15: Edge | ||
| 264 | */ | ||
| 265 | outb(0xfa, 0x4d0); | ||
| 266 | outb(0x1e, 0x4d1); | ||
| 267 | } | ||
| 188 | 268 | ||
| 189 | int | 269 | static void __devinit quirk_uli5288(struct pci_dev *dev) |
| 190 | mpc86xx_exclude_device(u_char bus, u_char devfn) | ||
| 191 | { | 270 | { |
| 192 | #if !defined(CONFIG_PCI) | 271 | unsigned char c; |
| 193 | if (bus == 0 && PCI_SLOT(devfn) == 0) | 272 | |
| 194 | return PCIBIOS_DEVICE_NOT_FOUND; | 273 | pci_read_config_byte(dev,0x83,&c); |
| 195 | #endif | 274 | c |= 0x80; |
| 275 | pci_write_config_byte(dev, 0x83, c); | ||
| 276 | |||
| 277 | pci_write_config_byte(dev, 0x09, 0x01); | ||
| 278 | pci_write_config_byte(dev, 0x0a, 0x06); | ||
| 279 | |||
| 280 | pci_read_config_byte(dev,0x83,&c); | ||
| 281 | c &= 0x7f; | ||
| 282 | pci_write_config_byte(dev, 0x83, c); | ||
| 196 | 283 | ||
| 197 | return PCIBIOS_SUCCESSFUL; | 284 | pci_read_config_byte(dev,0x84,&c); |
| 285 | c |= 0x01; | ||
| 286 | pci_write_config_byte(dev, 0x84, c); | ||
| 198 | } | 287 | } |
| 288 | |||
| 289 | static void __devinit quirk_uli5229(struct pci_dev *dev) | ||
| 290 | { | ||
| 291 | unsigned short temp; | ||
| 292 | pci_write_config_word(dev, 0x04, 0x0405); | ||
| 293 | pci_read_config_word(dev, 0x4a, &temp); | ||
| 294 | temp |= 0x1000; | ||
| 295 | pci_write_config_word(dev, 0x4a, temp); | ||
| 296 | } | ||
| 297 | |||
| 298 | static void __devinit early_uli5249(struct pci_dev *dev) | ||
| 299 | { | ||
| 300 | unsigned char temp; | ||
| 301 | pci_write_config_word(dev, 0x04, 0x0007); | ||
| 302 | pci_read_config_byte(dev, 0x7c, &temp); | ||
| 303 | pci_write_config_byte(dev, 0x7c, 0x80); | ||
| 304 | pci_write_config_byte(dev, 0x09, 0x01); | ||
| 305 | pci_write_config_byte(dev, 0x7c, temp); | ||
| 306 | dev->class |= 0x1; | ||
| 307 | } | ||
| 308 | |||
| 309 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL, 0x1575, quirk_ali1575); | ||
| 310 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL, 0x5288, quirk_uli5288); | ||
| 311 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL, 0x5229, quirk_uli5229); | ||
| 312 | DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_AL, 0x5249, early_uli5249); | ||
| 199 | #endif /* CONFIG_PCI */ | 313 | #endif /* CONFIG_PCI */ |
| 200 | 314 | ||
| 201 | 315 | ||
diff --git a/arch/powerpc/platforms/86xx/mpc86xx_smp.c b/arch/powerpc/platforms/86xx/mpc86xx_smp.c index 167f0401a1c5..bb7fb41933ad 100644 --- a/arch/powerpc/platforms/86xx/mpc86xx_smp.c +++ b/arch/powerpc/platforms/86xx/mpc86xx_smp.c | |||
| @@ -33,8 +33,8 @@ extern unsigned long __secondary_hold_acknowledge; | |||
| 33 | static void __init | 33 | static void __init |
| 34 | smp_86xx_release_core(int nr) | 34 | smp_86xx_release_core(int nr) |
| 35 | { | 35 | { |
| 36 | void *mcm_vaddr; | 36 | __be32 __iomem *mcm_vaddr; |
| 37 | unsigned long vaddr, pcr; | 37 | unsigned long pcr; |
| 38 | 38 | ||
| 39 | if (nr < 0 || nr >= NR_CPUS) | 39 | if (nr < 0 || nr >= NR_CPUS) |
| 40 | return; | 40 | return; |
| @@ -44,10 +44,9 @@ smp_86xx_release_core(int nr) | |||
| 44 | */ | 44 | */ |
| 45 | mcm_vaddr = ioremap(get_immrbase() + MPC86xx_MCM_OFFSET, | 45 | mcm_vaddr = ioremap(get_immrbase() + MPC86xx_MCM_OFFSET, |
| 46 | MPC86xx_MCM_SIZE); | 46 | MPC86xx_MCM_SIZE); |
| 47 | vaddr = (unsigned long)mcm_vaddr + MCM_PORT_CONFIG_OFFSET; | 47 | pcr = in_be32(mcm_vaddr + (MCM_PORT_CONFIG_OFFSET >> 2)); |
| 48 | pcr = in_be32((volatile unsigned *)vaddr); | ||
| 49 | pcr |= 1 << (nr + 24); | 48 | pcr |= 1 << (nr + 24); |
| 50 | out_be32((volatile unsigned *)vaddr, pcr); | 49 | out_be32(mcm_vaddr + (MCM_PORT_CONFIG_OFFSET >> 2), pcr); |
| 51 | } | 50 | } |
| 52 | 51 | ||
| 53 | 52 | ||
diff --git a/arch/powerpc/platforms/86xx/pci.c b/arch/powerpc/platforms/86xx/pci.c index 6dfdcb875878..bc5139043112 100644 --- a/arch/powerpc/platforms/86xx/pci.c +++ b/arch/powerpc/platforms/86xx/pci.c | |||
| @@ -121,15 +121,12 @@ static void __init setup_pcie_atmu(struct pci_controller *hose, struct resource | |||
| 121 | static void __init | 121 | static void __init |
| 122 | mpc86xx_setup_pcie(struct pci_controller *hose, u32 pcie_offset, u32 pcie_size) | 122 | mpc86xx_setup_pcie(struct pci_controller *hose, u32 pcie_offset, u32 pcie_size) |
| 123 | { | 123 | { |
| 124 | volatile struct ccsr_pex *pcie; | ||
| 125 | u16 cmd; | 124 | u16 cmd; |
| 126 | unsigned int temps; | 125 | unsigned int temps; |
| 127 | 126 | ||
| 128 | DBG("PCIE host controller register offset 0x%08x, size 0x%08x.\n", | 127 | DBG("PCIE host controller register offset 0x%08x, size 0x%08x.\n", |
| 129 | pcie_offset, pcie_size); | 128 | pcie_offset, pcie_size); |
| 130 | 129 | ||
| 131 | pcie = ioremap(pcie_offset, pcie_size); | ||
| 132 | |||
| 133 | early_read_config_word(hose, 0, 0, PCI_COMMAND, &cmd); | 130 | early_read_config_word(hose, 0, 0, PCI_COMMAND, &cmd); |
| 134 | cmd |= PCI_COMMAND_SERR | PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY | 131 | cmd |= PCI_COMMAND_SERR | PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY |
| 135 | | PCI_COMMAND_IO; | 132 | | PCI_COMMAND_IO; |
| @@ -143,6 +140,14 @@ mpc86xx_setup_pcie(struct pci_controller *hose, u32 pcie_offset, u32 pcie_size) | |||
| 143 | early_write_config_dword(hose, 0, 0, PCI_PRIMARY_BUS, temps); | 140 | early_write_config_dword(hose, 0, 0, PCI_PRIMARY_BUS, temps); |
| 144 | } | 141 | } |
| 145 | 142 | ||
| 143 | int mpc86xx_exclude_device(u_char bus, u_char devfn) | ||
| 144 | { | ||
| 145 | if (bus == 0 && PCI_SLOT(devfn) == 0) | ||
| 146 | return PCIBIOS_DEVICE_NOT_FOUND; | ||
| 147 | |||
| 148 | return PCIBIOS_SUCCESSFUL; | ||
| 149 | } | ||
| 150 | |||
| 146 | int __init add_bridge(struct device_node *dev) | 151 | int __init add_bridge(struct device_node *dev) |
| 147 | { | 152 | { |
| 148 | int len; | 153 | int len; |
| @@ -197,128 +202,3 @@ int __init add_bridge(struct device_node *dev) | |||
| 197 | 202 | ||
| 198 | return 0; | 203 | return 0; |
| 199 | } | 204 | } |
| 200 | |||
| 201 | static void __devinit quirk_ali1575(struct pci_dev *dev) | ||
| 202 | { | ||
| 203 | unsigned short temp; | ||
| 204 | |||
| 205 | /* | ||
| 206 | * ALI1575 interrupts route table setup: | ||
| 207 | * | ||
| 208 | * IRQ pin IRQ# | ||
| 209 | * PIRQA ---- 3 | ||
| 210 | * PIRQB ---- 4 | ||
| 211 | * PIRQC ---- 5 | ||
| 212 | * PIRQD ---- 6 | ||
| 213 | * PIRQE ---- 9 | ||
| 214 | * PIRQF ---- 10 | ||
| 215 | * PIRQG ---- 11 | ||
| 216 | * PIRQH ---- 12 | ||
| 217 | * | ||
| 218 | * interrupts for PCI slot0 -- PIRQA / PIRQB / PIRQC / PIRQD | ||
| 219 | * PCI slot1 -- PIRQB / PIRQC / PIRQD / PIRQA | ||
| 220 | */ | ||
| 221 | pci_write_config_dword(dev, 0x48, 0xb9317542); | ||
| 222 | |||
| 223 | /* USB 1.1 OHCI controller 1, interrupt: PIRQE */ | ||
| 224 | pci_write_config_byte(dev, 0x86, 0x0c); | ||
| 225 | |||
| 226 | /* USB 1.1 OHCI controller 2, interrupt: PIRQF */ | ||
| 227 | pci_write_config_byte(dev, 0x87, 0x0d); | ||
| 228 | |||
| 229 | /* USB 1.1 OHCI controller 3, interrupt: PIRQH */ | ||
| 230 | pci_write_config_byte(dev, 0x88, 0x0f); | ||
| 231 | |||
| 232 | /* USB 2.0 controller, interrupt: PIRQ7 */ | ||
| 233 | pci_write_config_byte(dev, 0x74, 0x06); | ||
| 234 | |||
| 235 | /* Audio controller, interrupt: PIRQE */ | ||
| 236 | pci_write_config_byte(dev, 0x8a, 0x0c); | ||
| 237 | |||
| 238 | /* Modem controller, interrupt: PIRQF */ | ||
| 239 | pci_write_config_byte(dev, 0x8b, 0x0d); | ||
| 240 | |||
| 241 | /* HD audio controller, interrupt: PIRQG */ | ||
| 242 | pci_write_config_byte(dev, 0x8c, 0x0e); | ||
| 243 | |||
| 244 | /* Serial ATA interrupt: PIRQD */ | ||
| 245 | pci_write_config_byte(dev, 0x8d, 0x0b); | ||
| 246 | |||
| 247 | /* SMB interrupt: PIRQH */ | ||
| 248 | pci_write_config_byte(dev, 0x8e, 0x0f); | ||
| 249 | |||
| 250 | /* PMU ACPI SCI interrupt: PIRQH */ | ||
| 251 | pci_write_config_byte(dev, 0x8f, 0x0f); | ||
| 252 | |||
| 253 | /* Primary PATA IDE IRQ: 14 | ||
| 254 | * Secondary PATA IDE IRQ: 15 | ||
| 255 | */ | ||
| 256 | pci_write_config_byte(dev, 0x44, 0x3d); | ||
| 257 | pci_write_config_byte(dev, 0x75, 0x0f); | ||
| 258 | |||
| 259 | /* Set IRQ14 and IRQ15 to legacy IRQs */ | ||
| 260 | pci_read_config_word(dev, 0x46, &temp); | ||
| 261 | temp |= 0xc000; | ||
| 262 | pci_write_config_word(dev, 0x46, temp); | ||
| 263 | |||
| 264 | /* Set i8259 interrupt trigger | ||
| 265 | * IRQ 3: Level | ||
| 266 | * IRQ 4: Level | ||
| 267 | * IRQ 5: Level | ||
| 268 | * IRQ 6: Level | ||
| 269 | * IRQ 7: Level | ||
| 270 | * IRQ 9: Level | ||
| 271 | * IRQ 10: Level | ||
| 272 | * IRQ 11: Level | ||
| 273 | * IRQ 12: Level | ||
| 274 | * IRQ 14: Edge | ||
| 275 | * IRQ 15: Edge | ||
| 276 | */ | ||
| 277 | outb(0xfa, 0x4d0); | ||
| 278 | outb(0x1e, 0x4d1); | ||
| 279 | } | ||
| 280 | |||
| 281 | static void __devinit quirk_uli5288(struct pci_dev *dev) | ||
| 282 | { | ||
| 283 | unsigned char c; | ||
| 284 | |||
| 285 | pci_read_config_byte(dev,0x83,&c); | ||
| 286 | c |= 0x80; | ||
| 287 | pci_write_config_byte(dev, 0x83, c); | ||
| 288 | |||
| 289 | pci_write_config_byte(dev, 0x09, 0x01); | ||
| 290 | pci_write_config_byte(dev, 0x0a, 0x06); | ||
| 291 | |||
| 292 | pci_read_config_byte(dev,0x83,&c); | ||
| 293 | c &= 0x7f; | ||
| 294 | pci_write_config_byte(dev, 0x83, c); | ||
| 295 | |||
| 296 | pci_read_config_byte(dev,0x84,&c); | ||
| 297 | c |= 0x01; | ||
| 298 | pci_write_config_byte(dev, 0x84, c); | ||
| 299 | } | ||
| 300 | |||
| 301 | static void __devinit quirk_uli5229(struct pci_dev *dev) | ||
| 302 | { | ||
| 303 | unsigned short temp; | ||
| 304 | pci_write_config_word(dev, 0x04, 0x0405); | ||
| 305 | pci_read_config_word(dev, 0x4a, &temp); | ||
| 306 | temp |= 0x1000; | ||
| 307 | pci_write_config_word(dev, 0x4a, temp); | ||
| 308 | } | ||
| 309 | |||
| 310 | static void __devinit early_uli5249(struct pci_dev *dev) | ||
| 311 | { | ||
| 312 | unsigned char temp; | ||
| 313 | pci_write_config_word(dev, 0x04, 0x0007); | ||
| 314 | pci_read_config_byte(dev, 0x7c, &temp); | ||
| 315 | pci_write_config_byte(dev, 0x7c, 0x80); | ||
| 316 | pci_write_config_byte(dev, 0x09, 0x01); | ||
| 317 | pci_write_config_byte(dev, 0x7c, temp); | ||
| 318 | dev->class |= 0x1; | ||
| 319 | } | ||
| 320 | |||
| 321 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL, 0x1575, quirk_ali1575); | ||
| 322 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL, 0x5288, quirk_uli5288); | ||
| 323 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL, 0x5229, quirk_uli5229); | ||
| 324 | DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_AL, 0x5249, early_uli5249); | ||
diff --git a/include/asm-powerpc/mpc86xx.h b/include/asm-powerpc/mpc86xx.h index 1ed72f6b1210..f260382739fa 100644 --- a/include/asm-powerpc/mpc86xx.h +++ b/include/asm-powerpc/mpc86xx.h | |||
| @@ -19,10 +19,6 @@ | |||
| 19 | 19 | ||
| 20 | #ifdef CONFIG_PPC_86xx | 20 | #ifdef CONFIG_PPC_86xx |
| 21 | 21 | ||
| 22 | #ifdef CONFIG_MPC8641_HPCN | ||
| 23 | #include <platforms/86xx/mpc8641_hpcn.h> | ||
| 24 | #endif | ||
| 25 | |||
| 26 | #define _IO_BASE isa_io_base | 22 | #define _IO_BASE isa_io_base |
| 27 | #define _ISA_MEM_BASE isa_mem_base | 23 | #define _ISA_MEM_BASE isa_mem_base |
| 28 | #ifdef CONFIG_PCI | 24 | #ifdef CONFIG_PCI |
