diff options
| -rw-r--r-- | drivers/scsi/sata_sil24.c | 47 |
1 files changed, 28 insertions, 19 deletions
diff --git a/drivers/scsi/sata_sil24.c b/drivers/scsi/sata_sil24.c index 8ef51d0dcda7..e9fd869140c5 100644 --- a/drivers/scsi/sata_sil24.c +++ b/drivers/scsi/sata_sil24.c | |||
| @@ -485,6 +485,7 @@ static int sil24_softreset(struct ata_port *ap, unsigned int *class) | |||
| 485 | prb->fis[1] = 0; /* no PM yet */ | 485 | prb->fis[1] = 0; /* no PM yet */ |
| 486 | 486 | ||
| 487 | writel((u32)paddr, port + PORT_CMD_ACTIVATE); | 487 | writel((u32)paddr, port + PORT_CMD_ACTIVATE); |
| 488 | writel((u64)paddr >> 32, port + PORT_CMD_ACTIVATE + 4); | ||
| 488 | 489 | ||
| 489 | mask = (PORT_IRQ_COMPLETE | PORT_IRQ_ERROR) << PORT_IRQ_RAW_SHIFT; | 490 | mask = (PORT_IRQ_COMPLETE | PORT_IRQ_ERROR) << PORT_IRQ_RAW_SHIFT; |
| 490 | irq_stat = ata_wait_register(port + PORT_IRQ_STAT, mask, 0x0, | 491 | irq_stat = ata_wait_register(port + PORT_IRQ_STAT, mask, 0x0, |
| @@ -644,6 +645,8 @@ static unsigned int sil24_qc_issue(struct ata_queued_cmd *qc) | |||
| 644 | dma_addr_t paddr = pp->cmd_block_dma + qc->tag * sizeof(*pp->cmd_block); | 645 | dma_addr_t paddr = pp->cmd_block_dma + qc->tag * sizeof(*pp->cmd_block); |
| 645 | 646 | ||
| 646 | writel((u32)paddr, port + PORT_CMD_ACTIVATE); | 647 | writel((u32)paddr, port + PORT_CMD_ACTIVATE); |
| 648 | writel((u64)paddr >> 32, port + PORT_CMD_ACTIVATE + 4); | ||
| 649 | |||
| 647 | return 0; | 650 | return 0; |
| 648 | } | 651 | } |
| 649 | 652 | ||
| @@ -980,22 +983,29 @@ static int sil24_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) | |||
| 980 | /* | 983 | /* |
| 981 | * Configure the device | 984 | * Configure the device |
| 982 | */ | 985 | */ |
| 983 | /* | 986 | if (!pci_set_dma_mask(pdev, DMA_64BIT_MASK)) { |
| 984 | * FIXME: This device is certainly 64-bit capable. We just | 987 | rc = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK); |
| 985 | * don't know how to use it. After fixing 32bit activation in | 988 | if (rc) { |
| 986 | * this function, enable 64bit masks here. | 989 | rc = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK); |
| 987 | */ | 990 | if (rc) { |
| 988 | rc = pci_set_dma_mask(pdev, DMA_32BIT_MASK); | 991 | dev_printk(KERN_ERR, &pdev->dev, |
| 989 | if (rc) { | 992 | "64-bit DMA enable failed\n"); |
| 990 | dev_printk(KERN_ERR, &pdev->dev, | 993 | goto out_free; |
| 991 | "32-bit DMA enable failed\n"); | 994 | } |
| 992 | goto out_free; | 995 | } |
| 993 | } | 996 | } else { |
| 994 | rc = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK); | 997 | rc = pci_set_dma_mask(pdev, DMA_32BIT_MASK); |
| 995 | if (rc) { | 998 | if (rc) { |
| 996 | dev_printk(KERN_ERR, &pdev->dev, | 999 | dev_printk(KERN_ERR, &pdev->dev, |
| 997 | "32-bit consistent DMA enable failed\n"); | 1000 | "32-bit DMA enable failed\n"); |
| 998 | goto out_free; | 1001 | goto out_free; |
| 1002 | } | ||
| 1003 | rc = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK); | ||
| 1004 | if (rc) { | ||
| 1005 | dev_printk(KERN_ERR, &pdev->dev, | ||
| 1006 | "32-bit consistent DMA enable failed\n"); | ||
| 1007 | goto out_free; | ||
| 1008 | } | ||
| 999 | } | 1009 | } |
| 1000 | 1010 | ||
| 1001 | /* GPIO off */ | 1011 | /* GPIO off */ |
| @@ -1053,9 +1063,8 @@ static int sil24_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) | |||
| 1053 | writel(0x0000, port + PORT_CRC_ERR_CNT); | 1063 | writel(0x0000, port + PORT_CRC_ERR_CNT); |
| 1054 | writel(0x0000, port + PORT_HSHK_ERR_CNT); | 1064 | writel(0x0000, port + PORT_HSHK_ERR_CNT); |
| 1055 | 1065 | ||
| 1056 | /* FIXME: 32bit activation? */ | 1066 | /* Always use 64bit activation */ |
| 1057 | writel(0, port + PORT_ACTIVATE_UPPER_ADDR); | 1067 | writel(PORT_CS_32BIT_ACTV, port + PORT_CTRL_CLR); |
| 1058 | writel(PORT_CS_32BIT_ACTV, port + PORT_CTRL_STAT); | ||
| 1059 | 1068 | ||
| 1060 | /* Configure interrupts */ | 1069 | /* Configure interrupts */ |
| 1061 | writel(0xffff, port + PORT_IRQ_ENABLE_CLR); | 1070 | writel(0xffff, port + PORT_IRQ_ENABLE_CLR); |
