diff options
| -rw-r--r-- | arch/powerpc/kernel/prom_init.c | 10 | ||||
| -rw-r--r-- | arch/powerpc/platforms/chrp/pci.c | 42 | ||||
| -rw-r--r-- | arch/powerpc/platforms/chrp/setup.c | 27 | ||||
| -rw-r--r-- | include/asm-powerpc/processor.h | 1 |
4 files changed, 73 insertions, 7 deletions
diff --git a/arch/powerpc/kernel/prom_init.c b/arch/powerpc/kernel/prom_init.c index 462bced40c12..90972ef6c471 100644 --- a/arch/powerpc/kernel/prom_init.c +++ b/arch/powerpc/kernel/prom_init.c | |||
| @@ -2033,16 +2033,22 @@ static void __init fixup_device_tree_maple(void) | |||
| 2033 | #endif | 2033 | #endif |
| 2034 | 2034 | ||
| 2035 | #ifdef CONFIG_PPC_CHRP | 2035 | #ifdef CONFIG_PPC_CHRP |
| 2036 | /* Pegasos lacks the "ranges" property in the isa node */ | 2036 | /* Pegasos and BriQ lacks the "ranges" property in the isa node */ |
| 2037 | static void __init fixup_device_tree_chrp(void) | 2037 | static void __init fixup_device_tree_chrp(void) |
| 2038 | { | 2038 | { |
| 2039 | phandle isa; | 2039 | phandle isa; |
| 2040 | u32 isa_ranges[6]; | 2040 | u32 isa_ranges[6]; |
| 2041 | u32 rloc = 0x01006000; /* IO space; PCI device = 12 */ | ||
| 2041 | char *name; | 2042 | char *name; |
| 2042 | int rc; | 2043 | int rc; |
| 2043 | 2044 | ||
| 2044 | name = "/pci@80000000/isa@c"; | 2045 | name = "/pci@80000000/isa@c"; |
| 2045 | isa = call_prom("finddevice", 1, 1, ADDR(name)); | 2046 | isa = call_prom("finddevice", 1, 1, ADDR(name)); |
| 2047 | if (!PHANDLE_VALID(isa)) { | ||
| 2048 | name = "/pci@ff500000/isa@6"; | ||
| 2049 | isa = call_prom("finddevice", 1, 1, ADDR(name)); | ||
| 2050 | rloc = 0x01003000; /* IO space; PCI device = 6 */ | ||
| 2051 | } | ||
| 2046 | if (!PHANDLE_VALID(isa)) | 2052 | if (!PHANDLE_VALID(isa)) |
| 2047 | return; | 2053 | return; |
| 2048 | 2054 | ||
| @@ -2054,7 +2060,7 @@ static void __init fixup_device_tree_chrp(void) | |||
| 2054 | 2060 | ||
| 2055 | isa_ranges[0] = 0x1; | 2061 | isa_ranges[0] = 0x1; |
| 2056 | isa_ranges[1] = 0x0; | 2062 | isa_ranges[1] = 0x0; |
| 2057 | isa_ranges[2] = 0x01006000; | 2063 | isa_ranges[2] = rloc; |
| 2058 | isa_ranges[3] = 0x0; | 2064 | isa_ranges[3] = 0x0; |
| 2059 | isa_ranges[4] = 0x0; | 2065 | isa_ranges[4] = 0x0; |
| 2060 | isa_ranges[5] = 0x00010000; | 2066 | isa_ranges[5] = 0x00010000; |
diff --git a/arch/powerpc/platforms/chrp/pci.c b/arch/powerpc/platforms/chrp/pci.c index 6802cdc3168a..6d7ac649b45e 100644 --- a/arch/powerpc/platforms/chrp/pci.c +++ b/arch/powerpc/platforms/chrp/pci.c | |||
| @@ -257,7 +257,7 @@ chrp_find_bridges(void) | |||
| 257 | else | 257 | else |
| 258 | printk(KERN_INFO "PCI buses %d..%d", | 258 | printk(KERN_INFO "PCI buses %d..%d", |
| 259 | bus_range[0], bus_range[1]); | 259 | bus_range[0], bus_range[1]); |
| 260 | printk(" controlled by %s", dev->type); | 260 | printk(" controlled by %s", dev->full_name); |
| 261 | if (!is_longtrail) | 261 | if (!is_longtrail) |
| 262 | printk(" at %llx", (unsigned long long)r.start); | 262 | printk(" at %llx", (unsigned long long)r.start); |
| 263 | printk("\n"); | 263 | printk("\n"); |
| @@ -289,6 +289,19 @@ chrp_find_bridges(void) | |||
| 289 | setup_indirect_pci(hose, 0xfec00cf8, 0xfee00cfc); | 289 | setup_indirect_pci(hose, 0xfec00cf8, 0xfee00cfc); |
| 290 | } else if (is_pegasos == 2) { | 290 | } else if (is_pegasos == 2) { |
| 291 | setup_peg2(hose, dev); | 291 | setup_peg2(hose, dev); |
| 292 | } else if (!strncmp(model, "IBM,CPC710", 10)) { | ||
| 293 | setup_indirect_pci(hose, | ||
| 294 | r.start + 0x000f8000, | ||
| 295 | r.start + 0x000f8010); | ||
| 296 | if (index == 0) { | ||
| 297 | dma = get_property(dev, "system-dma-base",&len); | ||
| 298 | if (dma && len >= sizeof(*dma)) { | ||
| 299 | dma = (unsigned int *) | ||
| 300 | (((unsigned long)dma) + | ||
| 301 | len - sizeof(*dma)); | ||
| 302 | pci_dram_offset = *dma; | ||
| 303 | } | ||
| 304 | } | ||
| 292 | } else { | 305 | } else { |
| 293 | printk("No methods for %s (model %s), using RTAS\n", | 306 | printk("No methods for %s (model %s), using RTAS\n", |
| 294 | dev->full_name, model); | 307 | dev->full_name, model); |
| @@ -306,8 +319,29 @@ chrp_find_bridges(void) | |||
| 306 | printk("pci_dram_offset = %lx\n", pci_dram_offset); | 319 | printk("pci_dram_offset = %lx\n", pci_dram_offset); |
| 307 | } | 320 | } |
| 308 | } | 321 | } |
| 322 | } | ||
| 323 | |||
| 324 | /* SL82C105 IDE Control/Status Register */ | ||
| 325 | #define SL82C105_IDECSR 0x40 | ||
| 326 | |||
| 327 | /* Fixup for Winbond ATA quirk, required for briq */ | ||
| 328 | void chrp_pci_fixup_winbond_ata(struct pci_dev *sl82c105) | ||
| 329 | { | ||
| 330 | u8 progif; | ||
| 309 | 331 | ||
| 310 | /* Do not fixup interrupts from OF tree on pegasos */ | 332 | /* If non-briq machines need that fixup too, please speak up */ |
| 311 | if (is_pegasos) | 333 | if (!machine_is(chrp) || _chrp_type != _CHRP_briq) |
| 312 | ppc_md.pcibios_fixup = NULL; | 334 | return; |
| 335 | |||
| 336 | if ((sl82c105->class & 5) != 5) { | ||
| 337 | printk("W83C553: Switching SL82C105 IDE to PCI native mode\n"); | ||
| 338 | /* Enable SL82C105 PCI native IDE mode */ | ||
| 339 | pci_read_config_byte(sl82c105, PCI_CLASS_PROG, &progif); | ||
| 340 | pci_write_config_byte(sl82c105, PCI_CLASS_PROG, progif | 0x05); | ||
| 341 | sl82c105->class |= 0x05; | ||
| 342 | /* Disable SL82C105 second port */ | ||
| 343 | pci_write_config_word(sl82c105, SL82C105_IDECSR, 0x0003); | ||
| 344 | } | ||
| 313 | } | 345 | } |
| 346 | DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_WINBOND, PCI_DEVICE_ID_WINBOND_82C105, | ||
| 347 | chrp_pci_fixup_winbond_ata); | ||
diff --git a/arch/powerpc/platforms/chrp/setup.c b/arch/powerpc/platforms/chrp/setup.c index 9c08ff322290..be39742db809 100644 --- a/arch/powerpc/platforms/chrp/setup.c +++ b/arch/powerpc/platforms/chrp/setup.c | |||
| @@ -74,6 +74,9 @@ extern irqreturn_t xmon_irq(int, void *, struct pt_regs *); | |||
| 74 | 74 | ||
| 75 | extern unsigned long loops_per_jiffy; | 75 | extern unsigned long loops_per_jiffy; |
| 76 | 76 | ||
| 77 | /* To be replaced by RTAS when available */ | ||
| 78 | static unsigned int *briq_SPOR; | ||
| 79 | |||
| 77 | #ifdef CONFIG_SMP | 80 | #ifdef CONFIG_SMP |
| 78 | extern struct smp_ops_t chrp_smp_ops; | 81 | extern struct smp_ops_t chrp_smp_ops; |
| 79 | #endif | 82 | #endif |
| @@ -92,6 +95,15 @@ static const char *gg2_cachemodes[4] = { | |||
| 92 | "Disabled", "Write-Through", "Copy-Back", "Transparent Mode" | 95 | "Disabled", "Write-Through", "Copy-Back", "Transparent Mode" |
| 93 | }; | 96 | }; |
| 94 | 97 | ||
| 98 | static const char *chrp_names[] = { | ||
| 99 | "Unknown", | ||
| 100 | "","","", | ||
| 101 | "Motorola", | ||
| 102 | "IBM or Longtrail", | ||
| 103 | "Genesi Pegasos", | ||
| 104 | "Total Impact Briq" | ||
| 105 | }; | ||
| 106 | |||
| 95 | void chrp_show_cpuinfo(struct seq_file *m) | 107 | void chrp_show_cpuinfo(struct seq_file *m) |
| 96 | { | 108 | { |
| 97 | int i, sdramen; | 109 | int i, sdramen; |
| @@ -229,6 +241,14 @@ static void __init pegasos_set_l2cr(void) | |||
| 229 | } | 241 | } |
| 230 | } | 242 | } |
| 231 | 243 | ||
| 244 | static void briq_restart(char *cmd) | ||
| 245 | { | ||
| 246 | local_irq_disable(); | ||
| 247 | if (briq_SPOR) | ||
| 248 | out_be32(briq_SPOR, 0); | ||
| 249 | for(;;); | ||
| 250 | } | ||
| 251 | |||
| 232 | void __init chrp_setup_arch(void) | 252 | void __init chrp_setup_arch(void) |
| 233 | { | 253 | { |
| 234 | struct device_node *root = find_path_device ("/"); | 254 | struct device_node *root = find_path_device ("/"); |
| @@ -245,11 +265,16 @@ void __init chrp_setup_arch(void) | |||
| 245 | _chrp_type = _CHRP_IBM; | 265 | _chrp_type = _CHRP_IBM; |
| 246 | } else if (machine && strncmp(machine, "MOT", 3) == 0) { | 266 | } else if (machine && strncmp(machine, "MOT", 3) == 0) { |
| 247 | _chrp_type = _CHRP_Motorola; | 267 | _chrp_type = _CHRP_Motorola; |
| 268 | } else if (machine && strncmp(machine, "TotalImpact,BRIQ-1", 18) == 0) { | ||
| 269 | _chrp_type = _CHRP_briq; | ||
| 270 | /* Map the SPOR register on briq and change the restart hook */ | ||
| 271 | briq_SPOR = (unsigned int *)ioremap(0xff0000e8, 4); | ||
| 272 | ppc_md.restart = briq_restart; | ||
| 248 | } else { | 273 | } else { |
| 249 | /* Let's assume it is an IBM chrp if all else fails */ | 274 | /* Let's assume it is an IBM chrp if all else fails */ |
| 250 | _chrp_type = _CHRP_IBM; | 275 | _chrp_type = _CHRP_IBM; |
| 251 | } | 276 | } |
| 252 | printk("chrp type = %x\n", _chrp_type); | 277 | printk("chrp type = %x [%s]\n", _chrp_type, chrp_names[_chrp_type]); |
| 253 | 278 | ||
| 254 | rtas_initialize(); | 279 | rtas_initialize(); |
| 255 | if (rtas_token("display-character") >= 0) | 280 | if (rtas_token("display-character") >= 0) |
diff --git a/include/asm-powerpc/processor.h b/include/asm-powerpc/processor.h index 22e54a2a6604..6cb6fb19e57f 100644 --- a/include/asm-powerpc/processor.h +++ b/include/asm-powerpc/processor.h | |||
| @@ -32,6 +32,7 @@ | |||
| 32 | #define _CHRP_Motorola 0x04 /* motorola chrp, the cobra */ | 32 | #define _CHRP_Motorola 0x04 /* motorola chrp, the cobra */ |
| 33 | #define _CHRP_IBM 0x05 /* IBM chrp, the longtrail and longtrail 2 */ | 33 | #define _CHRP_IBM 0x05 /* IBM chrp, the longtrail and longtrail 2 */ |
| 34 | #define _CHRP_Pegasos 0x06 /* Genesi/bplan's Pegasos and Pegasos2 */ | 34 | #define _CHRP_Pegasos 0x06 /* Genesi/bplan's Pegasos and Pegasos2 */ |
| 35 | #define _CHRP_briq 0x07 /* TotalImpact's briQ */ | ||
| 35 | 36 | ||
| 36 | #if defined(__KERNEL__) && defined(CONFIG_PPC32) | 37 | #if defined(__KERNEL__) && defined(CONFIG_PPC32) |
| 37 | 38 | ||
