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-rw-r--r--drivers/media/dvb/frontends/bsru6.h140
-rw-r--r--drivers/media/dvb/ttpci/av7110.c104
-rw-r--r--drivers/media/dvb/ttpci/budget-ci.c118
-rw-r--r--drivers/media/dvb/ttpci/budget-patch.c99
-rw-r--r--drivers/media/dvb/ttpci/budget.c98
5 files changed, 145 insertions, 414 deletions
diff --git a/drivers/media/dvb/frontends/bsru6.h b/drivers/media/dvb/frontends/bsru6.h
new file mode 100644
index 000000000000..2a5366ce79cc
--- /dev/null
+++ b/drivers/media/dvb/frontends/bsru6.h
@@ -0,0 +1,140 @@
1/*
2 * bsru6.h - ALPS BSRU6 tuner support (moved from budget-ci.c)
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version 2
7 * of the License, or (at your option) any later version.
8 *
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
19 * Or, point your browser to http://www.gnu.org/copyleft/gpl.html
20 *
21 *
22 * the project's page is at http://www.linuxtv.org
23 */
24
25#ifndef BSRU6_H
26#define BSRU6_H
27
28static u8 alps_bsru6_inittab[] = {
29 0x01, 0x15,
30 0x02, 0x00,
31 0x03, 0x00,
32 0x04, 0x7d, /* F22FR = 0x7d, F22 = f_VCO / 128 / 0x7d = 22 kHz */
33 0x05, 0x35, /* I2CT = 0, SCLT = 1, SDAT = 1 */
34 0x06, 0x40, /* DAC not used, set to high impendance mode */
35 0x07, 0x00, /* DAC LSB */
36 0x08, 0x40, /* DiSEqC off, LNB power on OP2/LOCK pin on */
37 0x09, 0x00, /* FIFO */
38 0x0c, 0x51, /* OP1 ctl = Normal, OP1 val = 1 (LNB Power ON) */
39 0x0d, 0x82, /* DC offset compensation = ON, beta_agc1 = 2 */
40 0x0e, 0x23, /* alpha_tmg = 2, beta_tmg = 3 */
41 0x10, 0x3f, // AGC2 0x3d
42 0x11, 0x84,
43 0x12, 0xb9,
44 0x15, 0xc9, // lock detector threshold
45 0x16, 0x00,
46 0x17, 0x00,
47 0x18, 0x00,
48 0x19, 0x00,
49 0x1a, 0x00,
50 0x1f, 0x50,
51 0x20, 0x00,
52 0x21, 0x00,
53 0x22, 0x00,
54 0x23, 0x00,
55 0x28, 0x00, // out imp: normal out type: parallel FEC mode:0
56 0x29, 0x1e, // 1/2 threshold
57 0x2a, 0x14, // 2/3 threshold
58 0x2b, 0x0f, // 3/4 threshold
59 0x2c, 0x09, // 5/6 threshold
60 0x2d, 0x05, // 7/8 threshold
61 0x2e, 0x01,
62 0x31, 0x1f, // test all FECs
63 0x32, 0x19, // viterbi and synchro search
64 0x33, 0xfc, // rs control
65 0x34, 0x93, // error control
66 0x0f, 0x52,
67 0xff, 0xff
68};
69
70static int alps_bsru6_set_symbol_rate(struct dvb_frontend *fe, u32 srate, u32 ratio)
71{
72 u8 aclk = 0;
73 u8 bclk = 0;
74
75 if (srate < 1500000) {
76 aclk = 0xb7;
77 bclk = 0x47;
78 } else if (srate < 3000000) {
79 aclk = 0xb7;
80 bclk = 0x4b;
81 } else if (srate < 7000000) {
82 aclk = 0xb7;
83 bclk = 0x4f;
84 } else if (srate < 14000000) {
85 aclk = 0xb7;
86 bclk = 0x53;
87 } else if (srate < 30000000) {
88 aclk = 0xb6;
89 bclk = 0x53;
90 } else if (srate < 45000000) {
91 aclk = 0xb4;
92 bclk = 0x51;
93 }
94
95 stv0299_writereg(fe, 0x13, aclk);
96 stv0299_writereg(fe, 0x14, bclk);
97 stv0299_writereg(fe, 0x1f, (ratio >> 16) & 0xff);
98 stv0299_writereg(fe, 0x20, (ratio >> 8) & 0xff);
99 stv0299_writereg(fe, 0x21, ratio & 0xf0);
100
101 return 0;
102}
103
104static int alps_bsru6_pll_set(struct dvb_frontend *fe, struct i2c_adapter *i2c, struct dvb_frontend_parameters *params)
105{
106 u8 buf[4];
107 u32 div;
108 struct i2c_msg msg = { .addr = 0x61, .flags = 0, .buf = buf, .len = sizeof(buf) };
109
110 if ((params->frequency < 950000) || (params->frequency > 2150000))
111 return -EINVAL;
112
113 div = (params->frequency + (125 - 1)) / 125; // round correctly
114 buf[0] = (div >> 8) & 0x7f;
115 buf[1] = div & 0xff;
116 buf[2] = 0x80 | ((div & 0x18000) >> 10) | 4;
117 buf[3] = 0xC4;
118
119 if (params->frequency > 1530000)
120 buf[3] = 0xc0;
121
122 if (i2c_transfer(i2c, &msg, 1) != 1)
123 return -EIO;
124 return 0;
125}
126
127static struct stv0299_config alps_bsru6_config = {
128 .demod_address = 0x68,
129 .inittab = alps_bsru6_inittab,
130 .mclk = 88000000UL,
131 .invert = 1,
132 .skip_reinit = 0,
133 .lock_output = STV0229_LOCKOUTPUT_1,
134 .volt13_op0_op1 = STV0299_VOLT13_OP1,
135 .min_delay_ms = 100,
136 .set_symbol_rate = alps_bsru6_set_symbol_rate,
137 .pll_set = alps_bsru6_pll_set,
138};
139
140#endif
diff --git a/drivers/media/dvb/ttpci/av7110.c b/drivers/media/dvb/ttpci/av7110.c
index 7497b1e8d883..5cf5b7d044ff 100644
--- a/drivers/media/dvb/ttpci/av7110.c
+++ b/drivers/media/dvb/ttpci/av7110.c
@@ -68,6 +68,7 @@
68 68
69#include "bsbe1.h" 69#include "bsbe1.h"
70#include "lnbp21.h" 70#include "lnbp21.h"
71#include "bsru6.h"
71 72
72#define TS_WIDTH 376 73#define TS_WIDTH 376
73#define TS_HEIGHT 512 74#define TS_HEIGHT 512
@@ -1570,109 +1571,6 @@ static struct ves1x93_config alps_bsrv2_config = {
1570 .pll_set = alps_bsrv2_pll_set, 1571 .pll_set = alps_bsrv2_pll_set,
1571}; 1572};
1572 1573
1573
1574static u8 alps_bsru6_inittab[] = {
1575 0x01, 0x15,
1576 0x02, 0x30,
1577 0x03, 0x00,
1578 0x04, 0x7d, /* F22FR = 0x7d, F22 = f_VCO / 128 / 0x7d = 22 kHz */
1579 0x05, 0x35, /* I2CT = 0, SCLT = 1, SDAT = 1 */
1580 0x06, 0x40, /* DAC not used, set to high impendance mode */
1581 0x07, 0x00, /* DAC LSB */
1582 0x08, 0x40, /* DiSEqC off, LNB power on OP2/LOCK pin on */
1583 0x09, 0x00, /* FIFO */
1584 0x0c, 0x51, /* OP1 ctl = Normal, OP1 val = 1 (LNB Power ON) */
1585 0x0d, 0x82, /* DC offset compensation = ON, beta_agc1 = 2 */
1586 0x0e, 0x23, /* alpha_tmg = 2, beta_tmg = 3 */
1587 0x10, 0x3f, // AGC2 0x3d
1588 0x11, 0x84,
1589 0x12, 0xb9,
1590 0x15, 0xc9, // lock detector threshold
1591 0x16, 0x00,
1592 0x17, 0x00,
1593 0x18, 0x00,
1594 0x19, 0x00,
1595 0x1a, 0x00,
1596 0x1f, 0x50,
1597 0x20, 0x00,
1598 0x21, 0x00,
1599 0x22, 0x00,
1600 0x23, 0x00,
1601 0x28, 0x00, // out imp: normal out type: parallel FEC mode:0
1602 0x29, 0x1e, // 1/2 threshold
1603 0x2a, 0x14, // 2/3 threshold
1604 0x2b, 0x0f, // 3/4 threshold
1605 0x2c, 0x09, // 5/6 threshold
1606 0x2d, 0x05, // 7/8 threshold
1607 0x2e, 0x01,
1608 0x31, 0x1f, // test all FECs
1609 0x32, 0x19, // viterbi and synchro search
1610 0x33, 0xfc, // rs control
1611 0x34, 0x93, // error control
1612 0x0f, 0x52,
1613 0xff, 0xff
1614};
1615
1616static int alps_bsru6_set_symbol_rate(struct dvb_frontend* fe, u32 srate, u32 ratio)
1617{
1618 u8 aclk = 0;
1619 u8 bclk = 0;
1620
1621 if (srate < 1500000) { aclk = 0xb7; bclk = 0x47; }
1622 else if (srate < 3000000) { aclk = 0xb7; bclk = 0x4b; }
1623 else if (srate < 7000000) { aclk = 0xb7; bclk = 0x4f; }
1624 else if (srate < 14000000) { aclk = 0xb7; bclk = 0x53; }
1625 else if (srate < 30000000) { aclk = 0xb6; bclk = 0x53; }
1626 else if (srate < 45000000) { aclk = 0xb4; bclk = 0x51; }
1627
1628 stv0299_writereg(fe, 0x13, aclk);
1629 stv0299_writereg(fe, 0x14, bclk);
1630 stv0299_writereg(fe, 0x1f, (ratio >> 16) & 0xff);
1631 stv0299_writereg(fe, 0x20, (ratio >> 8) & 0xff);
1632 stv0299_writereg(fe, 0x21, (ratio ) & 0xf0);
1633
1634 return 0;
1635}
1636
1637static int alps_bsru6_pll_set(struct dvb_frontend* fe, struct i2c_adapter *i2c, struct dvb_frontend_parameters* params)
1638{
1639 int ret;
1640 u8 data[4];
1641 u32 div;
1642 struct i2c_msg msg = { .addr = 0x61, .flags = 0, .buf = data, .len = sizeof(data) };
1643
1644 if ((params->frequency < 950000) || (params->frequency > 2150000))
1645 return -EINVAL;
1646
1647 div = (params->frequency + (125 - 1)) / 125; // round correctly
1648 data[0] = (div >> 8) & 0x7f;
1649 data[1] = div & 0xff;
1650 data[2] = 0x80 | ((div & 0x18000) >> 10) | 4;
1651 data[3] = 0xC4;
1652
1653 if (params->frequency > 1530000) data[3] = 0xc0;
1654
1655 ret = i2c_transfer(i2c, &msg, 1);
1656 if (ret != 1)
1657 return -EIO;
1658 return 0;
1659}
1660
1661static struct stv0299_config alps_bsru6_config = {
1662
1663 .demod_address = 0x68,
1664 .inittab = alps_bsru6_inittab,
1665 .mclk = 88000000UL,
1666 .invert = 1,
1667 .skip_reinit = 0,
1668 .lock_output = STV0229_LOCKOUTPUT_1,
1669 .volt13_op0_op1 = STV0299_VOLT13_OP1,
1670 .min_delay_ms = 100,
1671 .set_symbol_rate = alps_bsru6_set_symbol_rate,
1672 .pll_set = alps_bsru6_pll_set,
1673};
1674
1675
1676static int alps_tdbe2_pll_set(struct dvb_frontend* fe, struct dvb_frontend_parameters* params) 1574static int alps_tdbe2_pll_set(struct dvb_frontend* fe, struct dvb_frontend_parameters* params)
1677{ 1575{
1678 struct av7110* av7110 = fe->dvb->priv; 1576 struct av7110* av7110 = fe->dvb->priv;
diff --git a/drivers/media/dvb/ttpci/budget-ci.c b/drivers/media/dvb/ttpci/budget-ci.c
index 09b972b9ffe3..5f91036f5b87 100644
--- a/drivers/media/dvb/ttpci/budget-ci.c
+++ b/drivers/media/dvb/ttpci/budget-ci.c
@@ -44,6 +44,7 @@
44#include "tda1004x.h" 44#include "tda1004x.h"
45#include "lnbp21.h" 45#include "lnbp21.h"
46#include "bsbe1.h" 46#include "bsbe1.h"
47#include "bsru6.h"
47 48
48#define DEBIADDR_IR 0x1234 49#define DEBIADDR_IR 0x1234
49#define DEBIADDR_CICONTROL 0x0000 50#define DEBIADDR_CICONTROL 0x0000
@@ -476,123 +477,6 @@ static void budget_ci_irq(struct saa7146_dev *dev, u32 * isr)
476 tasklet_schedule(&budget_ci->ciintf_irq_tasklet); 477 tasklet_schedule(&budget_ci->ciintf_irq_tasklet);
477} 478}
478 479
479
480static u8 alps_bsru6_inittab[] = {
481 0x01, 0x15,
482 0x02, 0x00,
483 0x03, 0x00,
484 0x04, 0x7d, /* F22FR = 0x7d, F22 = f_VCO / 128 / 0x7d = 22 kHz */
485 0x05, 0x35, /* I2CT = 0, SCLT = 1, SDAT = 1 */
486 0x06, 0x40, /* DAC not used, set to high impendance mode */
487 0x07, 0x00, /* DAC LSB */
488 0x08, 0x40, /* DiSEqC off, LNB power on OP2/LOCK pin on */
489 0x09, 0x00, /* FIFO */
490 0x0c, 0x51, /* OP1 ctl = Normal, OP1 val = 1 (LNB Power ON) */
491 0x0d, 0x82, /* DC offset compensation = ON, beta_agc1 = 2 */
492 0x0e, 0x23, /* alpha_tmg = 2, beta_tmg = 3 */
493 0x10, 0x3f, // AGC2 0x3d
494 0x11, 0x84,
495 0x12, 0xb9,
496 0x15, 0xc9, // lock detector threshold
497 0x16, 0x00,
498 0x17, 0x00,
499 0x18, 0x00,
500 0x19, 0x00,
501 0x1a, 0x00,
502 0x1f, 0x50,
503 0x20, 0x00,
504 0x21, 0x00,
505 0x22, 0x00,
506 0x23, 0x00,
507 0x28, 0x00, // out imp: normal out type: parallel FEC mode:0
508 0x29, 0x1e, // 1/2 threshold
509 0x2a, 0x14, // 2/3 threshold
510 0x2b, 0x0f, // 3/4 threshold
511 0x2c, 0x09, // 5/6 threshold
512 0x2d, 0x05, // 7/8 threshold
513 0x2e, 0x01,
514 0x31, 0x1f, // test all FECs
515 0x32, 0x19, // viterbi and synchro search
516 0x33, 0xfc, // rs control
517 0x34, 0x93, // error control
518 0x0f, 0x52,
519 0xff, 0xff
520};
521
522static int alps_bsru6_set_symbol_rate(struct dvb_frontend *fe, u32 srate, u32 ratio)
523{
524 u8 aclk = 0;
525 u8 bclk = 0;
526
527 if (srate < 1500000) {
528 aclk = 0xb7;
529 bclk = 0x47;
530 } else if (srate < 3000000) {
531 aclk = 0xb7;
532 bclk = 0x4b;
533 } else if (srate < 7000000) {
534 aclk = 0xb7;
535 bclk = 0x4f;
536 } else if (srate < 14000000) {
537 aclk = 0xb7;
538 bclk = 0x53;
539 } else if (srate < 30000000) {
540 aclk = 0xb6;
541 bclk = 0x53;
542 } else if (srate < 45000000) {
543 aclk = 0xb4;
544 bclk = 0x51;
545 }
546
547 stv0299_writereg(fe, 0x13, aclk);
548 stv0299_writereg(fe, 0x14, bclk);
549 stv0299_writereg(fe, 0x1f, (ratio >> 16) & 0xff);
550 stv0299_writereg(fe, 0x20, (ratio >> 8) & 0xff);
551 stv0299_writereg(fe, 0x21, (ratio) & 0xf0);
552
553 return 0;
554}
555
556static int alps_bsru6_pll_set(struct dvb_frontend *fe, struct i2c_adapter *i2c, struct dvb_frontend_parameters *params)
557{
558 u8 buf[4];
559 u32 div;
560 struct i2c_msg msg = {.addr = 0x61,.flags = 0,.buf = buf,.len = sizeof(buf) };
561
562 if ((params->frequency < 950000) || (params->frequency > 2150000))
563 return -EINVAL;
564
565 div = (params->frequency + (125 - 1)) / 125; // round correctly
566 buf[0] = (div >> 8) & 0x7f;
567 buf[1] = div & 0xff;
568 buf[2] = 0x80 | ((div & 0x18000) >> 10) | 4;
569 buf[3] = 0xC4;
570
571 if (params->frequency > 1530000)
572 buf[3] = 0xc0;
573
574 if (i2c_transfer(i2c, &msg, 1) != 1)
575 return -EIO;
576 return 0;
577}
578
579static struct stv0299_config alps_bsru6_config = {
580
581 .demod_address = 0x68,
582 .inittab = alps_bsru6_inittab,
583 .mclk = 88000000UL,
584 .invert = 1,
585 .skip_reinit = 0,
586 .lock_output = STV0229_LOCKOUTPUT_1,
587 .volt13_op0_op1 = STV0299_VOLT13_OP1,
588 .min_delay_ms = 100,
589 .set_symbol_rate = alps_bsru6_set_symbol_rate,
590 .pll_set = alps_bsru6_pll_set,
591};
592
593
594
595
596static u8 philips_su1278_tt_inittab[] = { 480static u8 philips_su1278_tt_inittab[] = {
597 0x01, 0x0f, 481 0x01, 0x0f,
598 0x02, 0x30, 482 0x02, 0x30,
diff --git a/drivers/media/dvb/ttpci/budget-patch.c b/drivers/media/dvb/ttpci/budget-patch.c
index fc416cf5253c..9fc9185a8426 100644
--- a/drivers/media/dvb/ttpci/budget-patch.c
+++ b/drivers/media/dvb/ttpci/budget-patch.c
@@ -37,6 +37,8 @@
37#include "ves1x93.h" 37#include "ves1x93.h"
38#include "tda8083.h" 38#include "tda8083.h"
39 39
40#include "bsru6.h"
41
40#define budget_patch budget 42#define budget_patch budget
41 43
42static struct saa7146_extension budget_extension; 44static struct saa7146_extension budget_extension;
@@ -290,103 +292,6 @@ static struct ves1x93_config alps_bsrv2_config = {
290 .pll_set = alps_bsrv2_pll_set, 292 .pll_set = alps_bsrv2_pll_set,
291}; 293};
292 294
293static u8 alps_bsru6_inittab[] = {
294 0x01, 0x15,
295 0x02, 0x00,
296 0x03, 0x00,
297 0x04, 0x7d, /* F22FR = 0x7d, F22 = f_VCO / 128 / 0x7d = 22 kHz */
298 0x05, 0x35, /* I2CT = 0, SCLT = 1, SDAT = 1 */
299 0x06, 0x40, /* DAC not used, set to high impendance mode */
300 0x07, 0x00, /* DAC LSB */
301 0x08, 0x40, /* DiSEqC off, LNB power on OP2/LOCK pin on */
302 0x09, 0x00, /* FIFO */
303 0x0c, 0x51, /* OP1 ctl = Normal, OP1 val = 1 (LNB Power ON) */
304 0x0d, 0x82, /* DC offset compensation = ON, beta_agc1 = 2 */
305 0x0e, 0x23, /* alpha_tmg = 2, beta_tmg = 3 */
306 0x10, 0x3f, // AGC2 0x3d
307 0x11, 0x84,
308 0x12, 0xb9,
309 0x15, 0xc9, // lock detector threshold
310 0x16, 0x00,
311 0x17, 0x00,
312 0x18, 0x00,
313 0x19, 0x00,
314 0x1a, 0x00,
315 0x1f, 0x50,
316 0x20, 0x00,
317 0x21, 0x00,
318 0x22, 0x00,
319 0x23, 0x00,
320 0x28, 0x00, // out imp: normal out type: parallel FEC mode:0
321 0x29, 0x1e, // 1/2 threshold
322 0x2a, 0x14, // 2/3 threshold
323 0x2b, 0x0f, // 3/4 threshold
324 0x2c, 0x09, // 5/6 threshold
325 0x2d, 0x05, // 7/8 threshold
326 0x2e, 0x01,
327 0x31, 0x1f, // test all FECs
328 0x32, 0x19, // viterbi and synchro search
329 0x33, 0xfc, // rs control
330 0x34, 0x93, // error control
331 0x0f, 0x52,
332 0xff, 0xff
333};
334
335static int alps_bsru6_set_symbol_rate(struct dvb_frontend* fe, u32 srate, u32 ratio)
336{
337 u8 aclk = 0;
338 u8 bclk = 0;
339
340 if (srate < 1500000) { aclk = 0xb7; bclk = 0x47; }
341 else if (srate < 3000000) { aclk = 0xb7; bclk = 0x4b; }
342 else if (srate < 7000000) { aclk = 0xb7; bclk = 0x4f; }
343 else if (srate < 14000000) { aclk = 0xb7; bclk = 0x53; }
344 else if (srate < 30000000) { aclk = 0xb6; bclk = 0x53; }
345 else if (srate < 45000000) { aclk = 0xb4; bclk = 0x51; }
346
347 stv0299_writereg (fe, 0x13, aclk);
348 stv0299_writereg (fe, 0x14, bclk);
349 stv0299_writereg (fe, 0x1f, (ratio >> 16) & 0xff);
350 stv0299_writereg (fe, 0x20, (ratio >> 8) & 0xff);
351 stv0299_writereg (fe, 0x21, (ratio ) & 0xf0);
352
353 return 0;
354}
355
356static int alps_bsru6_pll_set(struct dvb_frontend* fe, struct i2c_adapter *i2c, struct dvb_frontend_parameters* params)
357{
358 u8 data[4];
359 u32 div;
360 struct i2c_msg msg = { .addr = 0x61, .flags = 0, .buf = data, .len = sizeof(data) };
361
362 if ((params->frequency < 950000) || (params->frequency > 2150000)) return -EINVAL;
363
364 div = (params->frequency + (125 - 1)) / 125; // round correctly
365 data[0] = (div >> 8) & 0x7f;
366 data[1] = div & 0xff;
367 data[2] = 0x80 | ((div & 0x18000) >> 10) | 4;
368 data[3] = 0xC4;
369
370 if (params->frequency > 1530000) data[3] = 0xc0;
371
372 if (i2c_transfer(i2c, &msg, 1) != 1) return -EIO;
373 return 0;
374}
375
376static struct stv0299_config alps_bsru6_config = {
377
378 .demod_address = 0x68,
379 .inittab = alps_bsru6_inittab,
380 .mclk = 88000000UL,
381 .invert = 1,
382 .skip_reinit = 0,
383 .lock_output = STV0229_LOCKOUTPUT_1,
384 .volt13_op0_op1 = STV0299_VOLT13_OP1,
385 .min_delay_ms = 100,
386 .set_symbol_rate = alps_bsru6_set_symbol_rate,
387 .pll_set = alps_bsru6_pll_set,
388};
389
390static int grundig_29504_451_pll_set(struct dvb_frontend* fe, struct dvb_frontend_parameters* params) 295static int grundig_29504_451_pll_set(struct dvb_frontend* fe, struct dvb_frontend_parameters* params)
391{ 296{
392 struct budget_patch* budget = (struct budget_patch*) fe->dvb->priv; 297 struct budget_patch* budget = (struct budget_patch*) fe->dvb->priv;
diff --git a/drivers/media/dvb/ttpci/budget.c b/drivers/media/dvb/ttpci/budget.c
index bfb80925019a..c23c02d95641 100644
--- a/drivers/media/dvb/ttpci/budget.c
+++ b/drivers/media/dvb/ttpci/budget.c
@@ -42,6 +42,7 @@
42#include "tda8083.h" 42#include "tda8083.h"
43#include "s5h1420.h" 43#include "s5h1420.h"
44#include "lnbp21.h" 44#include "lnbp21.h"
45#include "bsru6.h"
45 46
46static void Set22K (struct budget *budget, int state) 47static void Set22K (struct budget *budget, int state)
47{ 48{
@@ -220,103 +221,6 @@ static struct ves1x93_config alps_bsrv2_config =
220 .pll_set = alps_bsrv2_pll_set, 221 .pll_set = alps_bsrv2_pll_set,
221}; 222};
222 223
223static u8 alps_bsru6_inittab[] = {
224 0x01, 0x15,
225 0x02, 0x00,
226 0x03, 0x00,
227 0x04, 0x7d, /* F22FR = 0x7d, F22 = f_VCO / 128 / 0x7d = 22 kHz */
228 0x05, 0x35, /* I2CT = 0, SCLT = 1, SDAT = 1 */
229 0x06, 0x40, /* DAC not used, set to high impendance mode */
230 0x07, 0x00, /* DAC LSB */
231 0x08, 0x40, /* DiSEqC off, LNB power on OP2/LOCK pin on */
232 0x09, 0x00, /* FIFO */
233 0x0c, 0x51, /* OP1 ctl = Normal, OP1 val = 1 (LNB Power ON) */
234 0x0d, 0x82, /* DC offset compensation = ON, beta_agc1 = 2 */
235 0x0e, 0x23, /* alpha_tmg = 2, beta_tmg = 3 */
236 0x10, 0x3f, // AGC2 0x3d
237 0x11, 0x84,
238 0x12, 0xb9,
239 0x15, 0xc9, // lock detector threshold
240 0x16, 0x00,
241 0x17, 0x00,
242 0x18, 0x00,
243 0x19, 0x00,
244 0x1a, 0x00,
245 0x1f, 0x50,
246 0x20, 0x00,
247 0x21, 0x00,
248 0x22, 0x00,
249 0x23, 0x00,
250 0x28, 0x00, // out imp: normal out type: parallel FEC mode:0
251 0x29, 0x1e, // 1/2 threshold
252 0x2a, 0x14, // 2/3 threshold
253 0x2b, 0x0f, // 3/4 threshold
254 0x2c, 0x09, // 5/6 threshold
255 0x2d, 0x05, // 7/8 threshold
256 0x2e, 0x01,
257 0x31, 0x1f, // test all FECs
258 0x32, 0x19, // viterbi and synchro search
259 0x33, 0xfc, // rs control
260 0x34, 0x93, // error control
261 0x0f, 0x52,
262 0xff, 0xff
263};
264
265static int alps_bsru6_set_symbol_rate(struct dvb_frontend* fe, u32 srate, u32 ratio)
266{
267 u8 aclk = 0;
268 u8 bclk = 0;
269
270 if (srate < 1500000) { aclk = 0xb7; bclk = 0x47; }
271 else if (srate < 3000000) { aclk = 0xb7; bclk = 0x4b; }
272 else if (srate < 7000000) { aclk = 0xb7; bclk = 0x4f; }
273 else if (srate < 14000000) { aclk = 0xb7; bclk = 0x53; }
274 else if (srate < 30000000) { aclk = 0xb6; bclk = 0x53; }
275 else if (srate < 45000000) { aclk = 0xb4; bclk = 0x51; }
276
277 stv0299_writereg (fe, 0x13, aclk);
278 stv0299_writereg (fe, 0x14, bclk);
279 stv0299_writereg (fe, 0x1f, (ratio >> 16) & 0xff);
280 stv0299_writereg (fe, 0x20, (ratio >> 8) & 0xff);
281 stv0299_writereg (fe, 0x21, (ratio ) & 0xf0);
282
283 return 0;
284}
285
286static int alps_bsru6_pll_set(struct dvb_frontend* fe, struct i2c_adapter *i2c, struct dvb_frontend_parameters* params)
287{
288 u8 data[4];
289 u32 div;
290 struct i2c_msg msg = { .addr = 0x61, .flags = 0, .buf = data, .len = sizeof(data) };
291
292 if ((params->frequency < 950000) || (params->frequency > 2150000)) return -EINVAL;
293
294 div = (params->frequency + (125 - 1)) / 125; // round correctly
295 data[0] = (div >> 8) & 0x7f;
296 data[1] = div & 0xff;
297 data[2] = 0x80 | ((div & 0x18000) >> 10) | 4;
298 data[3] = 0xC4;
299
300 if (params->frequency > 1530000) data[3] = 0xc0;
301
302 if (i2c_transfer(i2c, &msg, 1) != 1) return -EIO;
303 return 0;
304}
305
306static struct stv0299_config alps_bsru6_config = {
307
308 .demod_address = 0x68,
309 .inittab = alps_bsru6_inittab,
310 .mclk = 88000000UL,
311 .invert = 1,
312 .skip_reinit = 0,
313 .lock_output = STV0229_LOCKOUTPUT_1,
314 .volt13_op0_op1 = STV0299_VOLT13_OP1,
315 .min_delay_ms = 100,
316 .set_symbol_rate = alps_bsru6_set_symbol_rate,
317 .pll_set = alps_bsru6_pll_set,
318};
319
320static int alps_tdbe2_pll_set(struct dvb_frontend* fe, struct dvb_frontend_parameters* params) 224static int alps_tdbe2_pll_set(struct dvb_frontend* fe, struct dvb_frontend_parameters* params)
321{ 225{
322 struct budget* budget = (struct budget*) fe->dvb->priv; 226 struct budget* budget = (struct budget*) fe->dvb->priv;
generated by cgit v1.2.2 (git 2.25.0) at 2025-11-12 15:06:39 -0500