diff options
| -rw-r--r-- | arch/arm/kernel/setup.c | 4 | ||||
| -rw-r--r-- | arch/arm/mm/proc-arm1020e.S | 20 | ||||
| -rw-r--r-- | arch/arm/mm/proc-arm1022.S | 20 | ||||
| -rw-r--r-- | arch/arm/mm/proc-arm1026.S | 20 | ||||
| -rw-r--r-- | arch/arm/mm/proc-arm920.S | 14 | ||||
| -rw-r--r-- | arch/arm/mm/proc-arm922.S | 14 | ||||
| -rw-r--r-- | arch/arm/mm/proc-arm925.S | 17 | ||||
| -rw-r--r-- | arch/arm/mm/proc-arm926.S | 17 |
8 files changed, 9 insertions, 117 deletions
diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c index 093ccba0503c..7d02f96eeb9d 100644 --- a/arch/arm/kernel/setup.c +++ b/arch/arm/kernel/setup.c | |||
| @@ -315,9 +315,9 @@ static void __init setup_processor(void) | |||
| 315 | cpu_cache = *list->cache; | 315 | cpu_cache = *list->cache; |
| 316 | #endif | 316 | #endif |
| 317 | 317 | ||
| 318 | printk("CPU: %s [%08x] revision %d (ARMv%s)\n", | 318 | printk("CPU: %s [%08x] revision %d (ARMv%s), cr=%08x\n", |
| 319 | cpu_name, processor_id, (int)processor_id & 15, | 319 | cpu_name, processor_id, (int)processor_id & 15, |
| 320 | proc_arch[cpu_architecture()]); | 320 | proc_arch[cpu_architecture()], cr_alignment); |
| 321 | 321 | ||
| 322 | sprintf(system_utsname.machine, "%s%c", list->arch_name, ENDIANNESS); | 322 | sprintf(system_utsname.machine, "%s%c", list->arch_name, ENDIANNESS); |
| 323 | sprintf(elf_platform, "%s%c", list->elf_name, ENDIANNESS); | 323 | sprintf(elf_platform, "%s%c", list->elf_name, ENDIANNESS); |
diff --git a/arch/arm/mm/proc-arm1020e.S b/arch/arm/mm/proc-arm1020e.S index bcd5ee022e00..8c7e25f4b7e7 100644 --- a/arch/arm/mm/proc-arm1020e.S +++ b/arch/arm/mm/proc-arm1020e.S | |||
| @@ -477,25 +477,7 @@ cpu_elf_name: | |||
| 477 | 477 | ||
| 478 | .type cpu_arm1020e_name, #object | 478 | .type cpu_arm1020e_name, #object |
| 479 | cpu_arm1020e_name: | 479 | cpu_arm1020e_name: |
| 480 | .ascii "ARM1020E" | 480 | .asciz "ARM1020E" |
| 481 | #ifndef CONFIG_CPU_ICACHE_DISABLE | ||
| 482 | .ascii "i" | ||
| 483 | #endif | ||
| 484 | #ifndef CONFIG_CPU_DCACHE_DISABLE | ||
| 485 | .ascii "d" | ||
| 486 | #ifdef CONFIG_CPU_DCACHE_WRITETHROUGH | ||
| 487 | .ascii "(wt)" | ||
| 488 | #else | ||
| 489 | .ascii "(wb)" | ||
| 490 | #endif | ||
| 491 | #endif | ||
| 492 | #ifndef CONFIG_CPU_BPREDICT_DISABLE | ||
| 493 | .ascii "B" | ||
| 494 | #endif | ||
| 495 | #ifdef CONFIG_CPU_CACHE_ROUND_ROBIN | ||
| 496 | .ascii "RR" | ||
| 497 | #endif | ||
| 498 | .ascii "\0" | ||
| 499 | .size cpu_arm1020e_name, . - cpu_arm1020e_name | 481 | .size cpu_arm1020e_name, . - cpu_arm1020e_name |
| 500 | 482 | ||
| 501 | .align | 483 | .align |
diff --git a/arch/arm/mm/proc-arm1022.S b/arch/arm/mm/proc-arm1022.S index b0ccff4fadd2..92218e6b3906 100644 --- a/arch/arm/mm/proc-arm1022.S +++ b/arch/arm/mm/proc-arm1022.S | |||
| @@ -460,25 +460,7 @@ cpu_elf_name: | |||
| 460 | 460 | ||
| 461 | .type cpu_arm1022_name, #object | 461 | .type cpu_arm1022_name, #object |
| 462 | cpu_arm1022_name: | 462 | cpu_arm1022_name: |
| 463 | .ascii "arm1022" | 463 | .asciz "ARM1022" |
| 464 | #ifndef CONFIG_CPU_ICACHE_DISABLE | ||
| 465 | .ascii "i" | ||
| 466 | #endif | ||
| 467 | #ifndef CONFIG_CPU_DCACHE_DISABLE | ||
| 468 | .ascii "d" | ||
| 469 | #ifdef CONFIG_CPU_DCACHE_WRITETHROUGH | ||
| 470 | .ascii "(wt)" | ||
| 471 | #else | ||
| 472 | .ascii "(wb)" | ||
| 473 | #endif | ||
| 474 | #endif | ||
| 475 | #ifndef CONFIG_CPU_BPREDICT_DISABLE | ||
| 476 | .ascii "B" | ||
| 477 | #endif | ||
| 478 | #ifdef CONFIG_CPU_CACHE_ROUND_ROBIN | ||
| 479 | .ascii "RR" | ||
| 480 | #endif | ||
| 481 | .ascii "\0" | ||
| 482 | .size cpu_arm1022_name, . - cpu_arm1022_name | 464 | .size cpu_arm1022_name, . - cpu_arm1022_name |
| 483 | 465 | ||
| 484 | .align | 466 | .align |
diff --git a/arch/arm/mm/proc-arm1026.S b/arch/arm/mm/proc-arm1026.S index abe850c9a641..2796c8e0ddf3 100644 --- a/arch/arm/mm/proc-arm1026.S +++ b/arch/arm/mm/proc-arm1026.S | |||
| @@ -456,25 +456,7 @@ cpu_elf_name: | |||
| 456 | 456 | ||
| 457 | .type cpu_arm1026_name, #object | 457 | .type cpu_arm1026_name, #object |
| 458 | cpu_arm1026_name: | 458 | cpu_arm1026_name: |
| 459 | .ascii "ARM1026EJ-S" | 459 | .asciz "ARM1026EJ-S" |
| 460 | #ifndef CONFIG_CPU_ICACHE_DISABLE | ||
| 461 | .ascii "i" | ||
| 462 | #endif | ||
| 463 | #ifndef CONFIG_CPU_DCACHE_DISABLE | ||
| 464 | .ascii "d" | ||
| 465 | #ifdef CONFIG_CPU_DCACHE_WRITETHROUGH | ||
| 466 | .ascii "(wt)" | ||
| 467 | #else | ||
| 468 | .ascii "(wb)" | ||
| 469 | #endif | ||
| 470 | #endif | ||
| 471 | #ifndef CONFIG_CPU_BPREDICT_DISABLE | ||
| 472 | .ascii "B" | ||
| 473 | #endif | ||
| 474 | #ifdef CONFIG_CPU_CACHE_ROUND_ROBIN | ||
| 475 | .ascii "RR" | ||
| 476 | #endif | ||
| 477 | .ascii "\0" | ||
| 478 | .size cpu_arm1026_name, . - cpu_arm1026_name | 460 | .size cpu_arm1026_name, . - cpu_arm1026_name |
| 479 | 461 | ||
| 480 | .align | 462 | .align |
diff --git a/arch/arm/mm/proc-arm920.S b/arch/arm/mm/proc-arm920.S index 31dc839ba07c..02af3e2a8247 100644 --- a/arch/arm/mm/proc-arm920.S +++ b/arch/arm/mm/proc-arm920.S | |||
| @@ -444,19 +444,7 @@ cpu_elf_name: | |||
| 444 | 444 | ||
| 445 | .type cpu_arm920_name, #object | 445 | .type cpu_arm920_name, #object |
| 446 | cpu_arm920_name: | 446 | cpu_arm920_name: |
| 447 | .ascii "ARM920T" | 447 | .asciz "ARM920T" |
| 448 | #ifndef CONFIG_CPU_ICACHE_DISABLE | ||
| 449 | .ascii "i" | ||
| 450 | #endif | ||
| 451 | #ifndef CONFIG_CPU_DCACHE_DISABLE | ||
| 452 | .ascii "d" | ||
| 453 | #ifdef CONFIG_CPU_DCACHE_WRITETHROUGH | ||
| 454 | .ascii "(wt)" | ||
| 455 | #else | ||
| 456 | .ascii "(wb)" | ||
| 457 | #endif | ||
| 458 | #endif | ||
| 459 | .ascii "\0" | ||
| 460 | .size cpu_arm920_name, . - cpu_arm920_name | 448 | .size cpu_arm920_name, . - cpu_arm920_name |
| 461 | 449 | ||
| 462 | .align | 450 | .align |
diff --git a/arch/arm/mm/proc-arm922.S b/arch/arm/mm/proc-arm922.S index 9e57c34f5c09..33dae4929f09 100644 --- a/arch/arm/mm/proc-arm922.S +++ b/arch/arm/mm/proc-arm922.S | |||
| @@ -448,19 +448,7 @@ cpu_elf_name: | |||
| 448 | 448 | ||
| 449 | .type cpu_arm922_name, #object | 449 | .type cpu_arm922_name, #object |
| 450 | cpu_arm922_name: | 450 | cpu_arm922_name: |
| 451 | .ascii "ARM922T" | 451 | .asciz "ARM922T" |
| 452 | #ifndef CONFIG_CPU_ICACHE_DISABLE | ||
| 453 | .ascii "i" | ||
| 454 | #endif | ||
| 455 | #ifndef CONFIG_CPU_DCACHE_DISABLE | ||
| 456 | .ascii "d" | ||
| 457 | #ifdef CONFIG_CPU_DCACHE_WRITETHROUGH | ||
| 458 | .ascii "(wt)" | ||
| 459 | #else | ||
| 460 | .ascii "(wb)" | ||
| 461 | #endif | ||
| 462 | #endif | ||
| 463 | .ascii "\0" | ||
| 464 | .size cpu_arm922_name, . - cpu_arm922_name | 452 | .size cpu_arm922_name, . - cpu_arm922_name |
| 465 | 453 | ||
| 466 | .align | 454 | .align |
diff --git a/arch/arm/mm/proc-arm925.S b/arch/arm/mm/proc-arm925.S index 8d47c9f3f931..aaa9f985b246 100644 --- a/arch/arm/mm/proc-arm925.S +++ b/arch/arm/mm/proc-arm925.S | |||
| @@ -511,22 +511,7 @@ cpu_elf_name: | |||
| 511 | 511 | ||
| 512 | .type cpu_arm925_name, #object | 512 | .type cpu_arm925_name, #object |
| 513 | cpu_arm925_name: | 513 | cpu_arm925_name: |
| 514 | .ascii "ARM925T" | 514 | .asciz "ARM925T" |
| 515 | #ifndef CONFIG_CPU_ICACHE_DISABLE | ||
| 516 | .ascii "i" | ||
| 517 | #endif | ||
| 518 | #ifndef CONFIG_CPU_DCACHE_DISABLE | ||
| 519 | .ascii "d" | ||
| 520 | #ifdef CONFIG_CPU_DCACHE_WRITETHROUGH | ||
| 521 | .ascii "(wt)" | ||
| 522 | #else | ||
| 523 | .ascii "(wb)" | ||
| 524 | #endif | ||
| 525 | #ifdef CONFIG_CPU_CACHE_ROUND_ROBIN | ||
| 526 | .ascii "RR" | ||
| 527 | #endif | ||
| 528 | #endif | ||
| 529 | .ascii "\0" | ||
| 530 | .size cpu_arm925_name, . - cpu_arm925_name | 515 | .size cpu_arm925_name, . - cpu_arm925_name |
| 531 | 516 | ||
| 532 | .align | 517 | .align |
diff --git a/arch/arm/mm/proc-arm926.S b/arch/arm/mm/proc-arm926.S index cb4d8f33d2a3..ce246dd7b407 100644 --- a/arch/arm/mm/proc-arm926.S +++ b/arch/arm/mm/proc-arm926.S | |||
| @@ -460,22 +460,7 @@ cpu_elf_name: | |||
| 460 | 460 | ||
| 461 | .type cpu_arm926_name, #object | 461 | .type cpu_arm926_name, #object |
| 462 | cpu_arm926_name: | 462 | cpu_arm926_name: |
| 463 | .ascii "ARM926EJ-S" | 463 | .asciz "ARM926EJ-S" |
| 464 | #ifndef CONFIG_CPU_ICACHE_DISABLE | ||
| 465 | .ascii "i" | ||
| 466 | #endif | ||
| 467 | #ifndef CONFIG_CPU_DCACHE_DISABLE | ||
| 468 | .ascii "d" | ||
| 469 | #ifdef CONFIG_CPU_DCACHE_WRITETHROUGH | ||
| 470 | .ascii "(wt)" | ||
| 471 | #else | ||
| 472 | .ascii "(wb)" | ||
| 473 | #endif | ||
| 474 | #ifdef CONFIG_CPU_CACHE_ROUND_ROBIN | ||
| 475 | .ascii "RR" | ||
| 476 | #endif | ||
| 477 | #endif | ||
| 478 | .ascii "\0" | ||
| 479 | .size cpu_arm926_name, . - cpu_arm926_name | 464 | .size cpu_arm926_name, . - cpu_arm926_name |
| 480 | 465 | ||
| 481 | .align | 466 | .align |
