1 files changed, 0 insertions, 31 deletions

diff --git a/drivers/ide/pci/piix.c b/drivers/ide/pci/piix.c
index b1e9a8eba6b6..8ecd2d668dba 100644
--- a/drivers/ide/pci/piix.c
+++ b/drivers/ide/pci/piix.c
@@ -353,33 +353,6 @@ static int piix_tune_chipset (ide_drive_t *drive, u8 xferspeed)
 }
 
 /**
- *      piix_faulty_dma0                -       check for DMA0 errata
- *      @hwif: IDE interface to check
- *
- *      If an ICH/ICH0/ICH2 interface is is operating in multi-word
- *      DMA mode with 600nS cycle time the IDE PIO prefetch buffer will
- *      inadvertently provide an extra piece of secondary data to the primary
- *      device resulting in data corruption.
- *
- *      With such a device this test function returns true. This allows
- *      our tuning code to follow Intel recommendations and use PIO on
- *      such devices.
- */
- 
-static int piix_faulty_dma0(ide_hwif_t *hwif)
-{
-        switch(hwif->pci_dev->device)
-        {
-                case PCI_DEVICE_ID_INTEL_82801AA_1:     /* ICH */
-                case PCI_DEVICE_ID_INTEL_82801AB_1:     /* ICH0 */
-                case PCI_DEVICE_ID_INTEL_82801BA_8:     /* ICH2 */
-                case PCI_DEVICE_ID_INTEL_82801BA_9:     /* ICH2 */
-                        return 1;
-        }
-        return 0;
-}
-
-/**
  *      piix_config_drive_for_dma       -       configure drive for DMA
  *      @drive: IDE drive to configure
  *
@@ -391,10 +364,6 @@ static int piix_faulty_dma0(ide_hwif_t *hwif)
 static int piix_config_drive_for_dma (ide_drive_t *drive)
 {
         u8 speed = ide_dma_speed(drive, piix_ratemask(drive));
-        
-        /* Some ICH devices cannot support DMA mode 0 */
-        if(speed == XFER_MW_DMA_0 && piix_faulty_dma0(HWIF(drive)))
-                speed = 0;
 
         /* If no DMA speed was available or the chipset has DMA bugs
            then disable DMA and use PIO */