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-rw-r--r--drivers/scsi/qla2xxx/qla_dbg.c105
-rw-r--r--drivers/scsi/qla2xxx/qla_dbg.h4
2 files changed, 55 insertions, 54 deletions
diff --git a/drivers/scsi/qla2xxx/qla_dbg.c b/drivers/scsi/qla2xxx/qla_dbg.c
index 5c5d2315cfab..2d9b12ffe09c 100644
--- a/drivers/scsi/qla2xxx/qla_dbg.c
+++ b/drivers/scsi/qla2xxx/qla_dbg.c
@@ -1003,10 +1003,10 @@ qla24xx_fw_dump(scsi_qla_host_t *ha, int hardware_locked)
1003 fw = (struct qla24xx_fw_dump *) ha->fw_dump24; 1003 fw = (struct qla24xx_fw_dump *) ha->fw_dump24;
1004 1004
1005 rval = QLA_SUCCESS; 1005 rval = QLA_SUCCESS;
1006 fw->hccr = RD_REG_DWORD(&reg->hccr); 1006 fw->host_status = RD_REG_DWORD(&reg->host_status);
1007 1007
1008 /* Pause RISC. */ 1008 /* Pause RISC. */
1009 if ((fw->hccr & HCCRX_RISC_PAUSE) == 0) { 1009 if ((RD_REG_DWORD(&reg->hccr) & HCCRX_RISC_PAUSE) == 0) {
1010 WRT_REG_DWORD(&reg->hccr, HCCRX_SET_RISC_RESET | 1010 WRT_REG_DWORD(&reg->hccr, HCCRX_SET_RISC_RESET |
1011 HCCRX_CLR_HOST_INT); 1011 HCCRX_CLR_HOST_INT);
1012 RD_REG_DWORD(&reg->hccr); /* PCI Posting. */ 1012 RD_REG_DWORD(&reg->hccr); /* PCI Posting. */
@@ -1021,16 +1021,54 @@ qla24xx_fw_dump(scsi_qla_host_t *ha, int hardware_locked)
1021 } 1021 }
1022 } 1022 }
1023 1023
1024 /* Disable interrupts. */
1025 WRT_REG_DWORD(&reg->ictrl, 0);
1026 RD_REG_DWORD(&reg->ictrl);
1027
1028 if (rval == QLA_SUCCESS) { 1024 if (rval == QLA_SUCCESS) {
1029 /* Host interface registers. */ 1025 /* Host interface registers. */
1030 dmp_reg = (uint32_t __iomem *)(reg + 0); 1026 dmp_reg = (uint32_t __iomem *)(reg + 0);
1031 for (cnt = 0; cnt < sizeof(fw->host_reg) / 4; cnt++) 1027 for (cnt = 0; cnt < sizeof(fw->host_reg) / 4; cnt++)
1032 fw->host_reg[cnt] = RD_REG_DWORD(dmp_reg++); 1028 fw->host_reg[cnt] = RD_REG_DWORD(dmp_reg++);
1033 1029
1030 /* Disable interrupts. */
1031 WRT_REG_DWORD(&reg->ictrl, 0);
1032 RD_REG_DWORD(&reg->ictrl);
1033
1034 /* Shadow registers. */
1035 WRT_REG_DWORD(&reg->iobase_addr, 0x0F70);
1036 RD_REG_DWORD(&reg->iobase_addr);
1037 dmp_reg = (uint32_t __iomem *)((uint8_t __iomem *)reg + 0xF0);
1038 WRT_REG_DWORD(dmp_reg, 0xB0000000);
1039 dmp_reg = (uint32_t __iomem *)((uint8_t __iomem *)reg + 0xFC);
1040 fw->shadow_reg[0] = RD_REG_DWORD(dmp_reg);
1041
1042 dmp_reg = (uint32_t __iomem *)((uint8_t __iomem *)reg + 0xF0);
1043 WRT_REG_DWORD(dmp_reg, 0xB0100000);
1044 dmp_reg = (uint32_t __iomem *)((uint8_t __iomem *)reg + 0xFC);
1045 fw->shadow_reg[1] = RD_REG_DWORD(dmp_reg);
1046
1047 dmp_reg = (uint32_t __iomem *)((uint8_t __iomem *)reg + 0xF0);
1048 WRT_REG_DWORD(dmp_reg, 0xB0200000);
1049 dmp_reg = (uint32_t __iomem *)((uint8_t __iomem *)reg + 0xFC);
1050 fw->shadow_reg[2] = RD_REG_DWORD(dmp_reg);
1051
1052 dmp_reg = (uint32_t __iomem *)((uint8_t __iomem *)reg + 0xF0);
1053 WRT_REG_DWORD(dmp_reg, 0xB0300000);
1054 dmp_reg = (uint32_t __iomem *)((uint8_t __iomem *)reg + 0xFC);
1055 fw->shadow_reg[3] = RD_REG_DWORD(dmp_reg);
1056
1057 dmp_reg = (uint32_t __iomem *)((uint8_t __iomem *)reg + 0xF0);
1058 WRT_REG_DWORD(dmp_reg, 0xB0400000);
1059 dmp_reg = (uint32_t __iomem *)((uint8_t __iomem *)reg + 0xFC);
1060 fw->shadow_reg[4] = RD_REG_DWORD(dmp_reg);
1061
1062 dmp_reg = (uint32_t __iomem *)((uint8_t __iomem *)reg + 0xF0);
1063 WRT_REG_DWORD(dmp_reg, 0xB0500000);
1064 dmp_reg = (uint32_t __iomem *)((uint8_t __iomem *)reg + 0xFC);
1065 fw->shadow_reg[5] = RD_REG_DWORD(dmp_reg);
1066
1067 dmp_reg = (uint32_t __iomem *)((uint8_t __iomem *)reg + 0xF0);
1068 WRT_REG_DWORD(dmp_reg, 0xB0600000);
1069 dmp_reg = (uint32_t __iomem *)((uint8_t __iomem *)reg + 0xFC);
1070 fw->shadow_reg[6] = RD_REG_DWORD(dmp_reg);
1071
1034 /* Mailbox registers. */ 1072 /* Mailbox registers. */
1035 mbx_reg = (uint16_t __iomem *)((uint8_t __iomem *)reg + 0x80); 1073 mbx_reg = (uint16_t __iomem *)((uint8_t __iomem *)reg + 0x80);
1036 for (cnt = 0; cnt < sizeof(fw->mailbox_reg) / 2; cnt++) 1074 for (cnt = 0; cnt < sizeof(fw->mailbox_reg) / 2; cnt++)
@@ -1308,43 +1346,6 @@ qla24xx_fw_dump(scsi_qla_host_t *ha, int hardware_locked)
1308 for (cnt = 0; cnt < 16; cnt++) 1346 for (cnt = 0; cnt < 16; cnt++)
1309 *iter_reg++ = RD_REG_DWORD(dmp_reg++); 1347 *iter_reg++ = RD_REG_DWORD(dmp_reg++);
1310 1348
1311 WRT_REG_DWORD(&reg->iobase_addr, 0x0F70);
1312 RD_REG_DWORD(&reg->iobase_addr);
1313 dmp_reg = (uint32_t __iomem *)((uint8_t __iomem *)reg + 0xF0);
1314 WRT_REG_DWORD(dmp_reg, 0xB0000000);
1315 dmp_reg = (uint32_t __iomem *)((uint8_t __iomem *)reg + 0xFC);
1316 fw->shadow_reg[0] = RD_REG_DWORD(dmp_reg);
1317
1318 dmp_reg = (uint32_t __iomem *)((uint8_t __iomem *)reg + 0xF0);
1319 WRT_REG_DWORD(dmp_reg, 0xB0100000);
1320 dmp_reg = (uint32_t __iomem *)((uint8_t __iomem *)reg + 0xFC);
1321 fw->shadow_reg[1] = RD_REG_DWORD(dmp_reg);
1322
1323 dmp_reg = (uint32_t __iomem *)((uint8_t __iomem *)reg + 0xF0);
1324 WRT_REG_DWORD(dmp_reg, 0xB0200000);
1325 dmp_reg = (uint32_t __iomem *)((uint8_t __iomem *)reg + 0xFC);
1326 fw->shadow_reg[2] = RD_REG_DWORD(dmp_reg);
1327
1328 dmp_reg = (uint32_t __iomem *)((uint8_t __iomem *)reg + 0xF0);
1329 WRT_REG_DWORD(dmp_reg, 0xB0300000);
1330 dmp_reg = (uint32_t __iomem *)((uint8_t __iomem *)reg + 0xFC);
1331 fw->shadow_reg[3] = RD_REG_DWORD(dmp_reg);
1332
1333 dmp_reg = (uint32_t __iomem *)((uint8_t __iomem *)reg + 0xF0);
1334 WRT_REG_DWORD(dmp_reg, 0xB0400000);
1335 dmp_reg = (uint32_t __iomem *)((uint8_t __iomem *)reg + 0xFC);
1336 fw->shadow_reg[4] = RD_REG_DWORD(dmp_reg);
1337
1338 dmp_reg = (uint32_t __iomem *)((uint8_t __iomem *)reg + 0xF0);
1339 WRT_REG_DWORD(dmp_reg, 0xB0500000);
1340 dmp_reg = (uint32_t __iomem *)((uint8_t __iomem *)reg + 0xFC);
1341 fw->shadow_reg[5] = RD_REG_DWORD(dmp_reg);
1342
1343 dmp_reg = (uint32_t __iomem *)((uint8_t __iomem *)reg + 0xF0);
1344 WRT_REG_DWORD(dmp_reg, 0xB0600000);
1345 dmp_reg = (uint32_t __iomem *)((uint8_t __iomem *)reg + 0xFC);
1346 fw->shadow_reg[6] = RD_REG_DWORD(dmp_reg);
1347
1348 /* Local memory controller registers. */ 1349 /* Local memory controller registers. */
1349 iter_reg = fw->lmc_reg; 1350 iter_reg = fw->lmc_reg;
1350 WRT_REG_DWORD(&reg->iobase_addr, 0x3000); 1351 WRT_REG_DWORD(&reg->iobase_addr, 0x3000);
@@ -1677,7 +1678,7 @@ qla24xx_ascii_fw_dump(scsi_qla_host_t *ha)
1677 ha->fw_major_version, ha->fw_minor_version, 1678 ha->fw_major_version, ha->fw_minor_version,
1678 ha->fw_subminor_version, ha->fw_attributes); 1679 ha->fw_subminor_version, ha->fw_attributes);
1679 1680
1680 qla_uprintf(&uiter, "\nHCCR Register\n%04x\n", fw->hccr); 1681 qla_uprintf(&uiter, "\nR2H Status Register\n%04x\n", fw->host_status);
1681 1682
1682 qla_uprintf(&uiter, "\nHost Interface Registers"); 1683 qla_uprintf(&uiter, "\nHost Interface Registers");
1683 for (cnt = 0; cnt < sizeof(fw->host_reg) / 4; cnt++) { 1684 for (cnt = 0; cnt < sizeof(fw->host_reg) / 4; cnt++) {
@@ -1687,6 +1688,14 @@ qla24xx_ascii_fw_dump(scsi_qla_host_t *ha)
1687 qla_uprintf(&uiter, "%08x ", fw->host_reg[cnt]); 1688 qla_uprintf(&uiter, "%08x ", fw->host_reg[cnt]);
1688 } 1689 }
1689 1690
1691 qla_uprintf(&uiter, "\n\nShadow Registers");
1692 for (cnt = 0; cnt < sizeof(fw->shadow_reg) / 4; cnt++) {
1693 if (cnt % 8 == 0)
1694 qla_uprintf(&uiter, "\n");
1695
1696 qla_uprintf(&uiter, "%08x ", fw->shadow_reg[cnt]);
1697 }
1698
1690 qla_uprintf(&uiter, "\n\nMailbox Registers"); 1699 qla_uprintf(&uiter, "\n\nMailbox Registers");
1691 for (cnt = 0; cnt < sizeof(fw->mailbox_reg) / 2; cnt++) { 1700 for (cnt = 0; cnt < sizeof(fw->mailbox_reg) / 2; cnt++) {
1692 if (cnt % 8 == 0) 1701 if (cnt % 8 == 0)
@@ -1855,14 +1864,6 @@ qla24xx_ascii_fw_dump(scsi_qla_host_t *ha)
1855 qla_uprintf(&uiter, "%08x ", fw->risc_gp_reg[cnt]); 1864 qla_uprintf(&uiter, "%08x ", fw->risc_gp_reg[cnt]);
1856 } 1865 }
1857 1866
1858 qla_uprintf(&uiter, "\n\nShadow Registers");
1859 for (cnt = 0; cnt < sizeof(fw->shadow_reg) / 4; cnt++) {
1860 if (cnt % 8 == 0)
1861 qla_uprintf(&uiter, "\n");
1862
1863 qla_uprintf(&uiter, "%08x ", fw->shadow_reg[cnt]);
1864 }
1865
1866 qla_uprintf(&uiter, "\n\nLMC Registers"); 1867 qla_uprintf(&uiter, "\n\nLMC Registers");
1867 for (cnt = 0; cnt < sizeof(fw->lmc_reg) / 4; cnt++) { 1868 for (cnt = 0; cnt < sizeof(fw->lmc_reg) / 4; cnt++) {
1868 if (cnt % 8 == 0) 1869 if (cnt % 8 == 0)
diff --git a/drivers/scsi/qla2xxx/qla_dbg.h b/drivers/scsi/qla2xxx/qla_dbg.h
index 935a59a8c054..ab6afeaa2f2c 100644
--- a/drivers/scsi/qla2xxx/qla_dbg.h
+++ b/drivers/scsi/qla2xxx/qla_dbg.h
@@ -227,8 +227,9 @@ struct qla2100_fw_dump {
227#define FW_DUMP_SIZE_24XX 0x2B0000 227#define FW_DUMP_SIZE_24XX 0x2B0000
228 228
229struct qla24xx_fw_dump { 229struct qla24xx_fw_dump {
230 uint32_t hccr; 230 uint32_t host_status;
231 uint32_t host_reg[32]; 231 uint32_t host_reg[32];
232 uint32_t shadow_reg[7];
232 uint16_t mailbox_reg[32]; 233 uint16_t mailbox_reg[32];
233 uint32_t xseq_gp_reg[128]; 234 uint32_t xseq_gp_reg[128];
234 uint32_t xseq_0_reg[16]; 235 uint32_t xseq_0_reg[16];
@@ -250,7 +251,6 @@ struct qla24xx_fw_dump {
250 uint32_t rcvt0_data_dma_reg[32]; 251 uint32_t rcvt0_data_dma_reg[32];
251 uint32_t rcvt1_data_dma_reg[32]; 252 uint32_t rcvt1_data_dma_reg[32];
252 uint32_t risc_gp_reg[128]; 253 uint32_t risc_gp_reg[128];
253 uint32_t shadow_reg[7];
254 uint32_t lmc_reg[112]; 254 uint32_t lmc_reg[112];
255 uint32_t fpm_hdw_reg[192]; 255 uint32_t fpm_hdw_reg[192];
256 uint32_t fb_hdw_reg[176]; 256 uint32_t fb_hdw_reg[176];
generated by cgit v1.2.2 (git 2.25.0) at 2025-11-09 03:24:30 -0500