diff options
| -rw-r--r-- | arch/arm/mach-omap2/devices.c | 61 |
1 files changed, 61 insertions, 0 deletions
diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c index 5eb0b58b2e95..818452ac905d 100644 --- a/arch/arm/mach-omap2/devices.c +++ b/arch/arm/mach-omap2/devices.c | |||
| @@ -914,11 +914,72 @@ static inline void omap_init_vout(void) {} | |||
| 914 | 914 | ||
| 915 | /*-------------------------------------------------------------------------*/ | 915 | /*-------------------------------------------------------------------------*/ |
| 916 | 916 | ||
| 917 | /* | ||
| 918 | * Inorder to avoid any assumptions from bootloader regarding WDT | ||
| 919 | * settings, WDT module is reset during init. This enables the watchdog | ||
| 920 | * timer. Hence it is required to disable the watchdog after the WDT reset | ||
| 921 | * during init. Otherwise the system would reboot as per the default | ||
| 922 | * watchdog timer registers settings. | ||
| 923 | */ | ||
| 924 | #define OMAP_WDT_WPS (0x34) | ||
| 925 | #define OMAP_WDT_SPR (0x48) | ||
| 926 | |||
| 927 | static int omap2_disable_wdt(struct omap_hwmod *oh, void *unused) | ||
| 928 | { | ||
| 929 | void __iomem *base; | ||
| 930 | int ret; | ||
| 931 | |||
| 932 | if (!oh) { | ||
| 933 | pr_err("%s: Could not look up wdtimer_hwmod\n", __func__); | ||
| 934 | return -EINVAL; | ||
| 935 | } | ||
| 936 | |||
| 937 | base = omap_hwmod_get_mpu_rt_va(oh); | ||
| 938 | if (!base) { | ||
| 939 | pr_err("%s: Could not get the base address for %s\n", | ||
| 940 | oh->name, __func__); | ||
| 941 | return -EINVAL; | ||
| 942 | } | ||
| 943 | |||
| 944 | /* Enable the clocks before accessing the WDT registers */ | ||
| 945 | ret = omap_hwmod_enable(oh); | ||
| 946 | if (ret) { | ||
| 947 | pr_err("%s: Could not enable clocks for %s\n", | ||
| 948 | oh->name, __func__); | ||
| 949 | return ret; | ||
| 950 | } | ||
| 951 | |||
| 952 | /* sequence required to disable watchdog */ | ||
| 953 | __raw_writel(0xAAAA, base + OMAP_WDT_SPR); | ||
| 954 | while (__raw_readl(base + OMAP_WDT_WPS) & 0x10) | ||
| 955 | cpu_relax(); | ||
| 956 | |||
| 957 | __raw_writel(0x5555, base + OMAP_WDT_SPR); | ||
| 958 | while (__raw_readl(base + OMAP_WDT_WPS) & 0x10) | ||
| 959 | cpu_relax(); | ||
| 960 | |||
| 961 | ret = omap_hwmod_idle(oh); | ||
| 962 | if (ret) | ||
| 963 | pr_err("%s: Could not disable clocks for %s\n", | ||
| 964 | oh->name, __func__); | ||
| 965 | |||
| 966 | return ret; | ||
| 967 | } | ||
| 968 | |||
| 969 | static void __init omap_disable_wdt(void) | ||
| 970 | { | ||
| 971 | if (cpu_class_is_omap2()) | ||
| 972 | omap_hwmod_for_each_by_class("wd_timer", | ||
| 973 | omap2_disable_wdt, NULL); | ||
| 974 | return; | ||
| 975 | } | ||
| 976 | |||
| 917 | static int __init omap2_init_devices(void) | 977 | static int __init omap2_init_devices(void) |
| 918 | { | 978 | { |
| 919 | /* please keep these calls, and their implementations above, | 979 | /* please keep these calls, and their implementations above, |
| 920 | * in alphabetical order so they're easier to sort through. | 980 | * in alphabetical order so they're easier to sort through. |
| 921 | */ | 981 | */ |
| 982 | omap_disable_wdt(); | ||
| 922 | omap_hsmmc_reset(); | 983 | omap_hsmmc_reset(); |
| 923 | omap_init_camera(); | 984 | omap_init_camera(); |
| 924 | omap_init_mbox(); | 985 | omap_init_mbox(); |
